diff options
Diffstat (limited to 'arch')
432 files changed, 6578 insertions, 2850 deletions
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index da677f829f76..63af36cf7f6e 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c | |||
@@ -49,15 +49,15 @@ select_smp_affinity(unsigned int irq) | |||
49 | static int last_cpu; | 49 | static int last_cpu; |
50 | int cpu = last_cpu + 1; | 50 | int cpu = last_cpu + 1; |
51 | 51 | ||
52 | if (!irq_desc[irq].handler->set_affinity || irq_user_affinity[irq]) | 52 | if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq]) |
53 | return 1; | 53 | return 1; |
54 | 54 | ||
55 | while (!cpu_possible(cpu)) | 55 | while (!cpu_possible(cpu)) |
56 | cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); | 56 | cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); |
57 | last_cpu = cpu; | 57 | last_cpu = cpu; |
58 | 58 | ||
59 | irq_affinity[irq] = cpumask_of_cpu(cpu); | 59 | irq_desc[irq].affinity = cpumask_of_cpu(cpu); |
60 | irq_desc[irq].handler->set_affinity(irq, cpumask_of_cpu(cpu)); | 60 | irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu)); |
61 | return 0; | 61 | return 0; |
62 | } | 62 | } |
63 | #endif /* CONFIG_SMP */ | 63 | #endif /* CONFIG_SMP */ |
@@ -93,7 +93,7 @@ show_interrupts(struct seq_file *p, void *v) | |||
93 | for_each_online_cpu(j) | 93 | for_each_online_cpu(j) |
94 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]); | 94 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]); |
95 | #endif | 95 | #endif |
96 | seq_printf(p, " %14s", irq_desc[irq].handler->typename); | 96 | seq_printf(p, " %14s", irq_desc[irq].chip->typename); |
97 | seq_printf(p, " %c%s", | 97 | seq_printf(p, " %c%s", |
98 | (action->flags & SA_INTERRUPT)?'+':' ', | 98 | (action->flags & SA_INTERRUPT)?'+':' ', |
99 | action->name); | 99 | action->name); |
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c index 9d34ce26e5ef..f20f2dff9c43 100644 --- a/arch/alpha/kernel/irq_alpha.c +++ b/arch/alpha/kernel/irq_alpha.c | |||
@@ -233,7 +233,7 @@ void __init | |||
233 | init_rtc_irq(void) | 233 | init_rtc_irq(void) |
234 | { | 234 | { |
235 | irq_desc[RTC_IRQ].status = IRQ_DISABLED; | 235 | irq_desc[RTC_IRQ].status = IRQ_DISABLED; |
236 | irq_desc[RTC_IRQ].handler = &rtc_irq_type; | 236 | irq_desc[RTC_IRQ].chip = &rtc_irq_type; |
237 | setup_irq(RTC_IRQ, &timer_irqaction); | 237 | setup_irq(RTC_IRQ, &timer_irqaction); |
238 | } | 238 | } |
239 | 239 | ||
diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c index b188683b83fd..ac893bd48036 100644 --- a/arch/alpha/kernel/irq_i8259.c +++ b/arch/alpha/kernel/irq_i8259.c | |||
@@ -109,7 +109,7 @@ init_i8259a_irqs(void) | |||
109 | 109 | ||
110 | for (i = 0; i < 16; i++) { | 110 | for (i = 0; i < 16; i++) { |
111 | irq_desc[i].status = IRQ_DISABLED; | 111 | irq_desc[i].status = IRQ_DISABLED; |
112 | irq_desc[i].handler = &i8259a_irq_type; | 112 | irq_desc[i].chip = &i8259a_irq_type; |
113 | } | 113 | } |
114 | 114 | ||
115 | setup_irq(2, &cascade); | 115 | setup_irq(2, &cascade); |
diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c index 146a20b9e3d5..3b581415bab0 100644 --- a/arch/alpha/kernel/irq_pyxis.c +++ b/arch/alpha/kernel/irq_pyxis.c | |||
@@ -120,7 +120,7 @@ init_pyxis_irqs(unsigned long ignore_mask) | |||
120 | if ((ignore_mask >> i) & 1) | 120 | if ((ignore_mask >> i) & 1) |
121 | continue; | 121 | continue; |
122 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 122 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
123 | irq_desc[i].handler = &pyxis_irq_type; | 123 | irq_desc[i].chip = &pyxis_irq_type; |
124 | } | 124 | } |
125 | 125 | ||
126 | setup_irq(16+7, &isa_cascade_irqaction); | 126 | setup_irq(16+7, &isa_cascade_irqaction); |
diff --git a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c index 0a87e466918c..8e4d121f84cc 100644 --- a/arch/alpha/kernel/irq_srm.c +++ b/arch/alpha/kernel/irq_srm.c | |||
@@ -67,7 +67,7 @@ init_srm_irqs(long max, unsigned long ignore_mask) | |||
67 | if (i < 64 && ((ignore_mask >> i) & 1)) | 67 | if (i < 64 && ((ignore_mask >> i) & 1)) |
68 | continue; | 68 | continue; |
69 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 69 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
70 | irq_desc[i].handler = &srm_irq_type; | 70 | irq_desc[i].chip = &srm_irq_type; |
71 | } | 71 | } |
72 | } | 72 | } |
73 | 73 | ||
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c index 2a8b364c822e..4ea6711e55aa 100644 --- a/arch/alpha/kernel/pci.c +++ b/arch/alpha/kernel/pci.c | |||
@@ -124,12 +124,12 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_final); | |||
124 | 124 | ||
125 | void | 125 | void |
126 | pcibios_align_resource(void *data, struct resource *res, | 126 | pcibios_align_resource(void *data, struct resource *res, |
127 | unsigned long size, unsigned long align) | 127 | resource_size_t size, resource_size_t align) |
128 | { | 128 | { |
129 | struct pci_dev *dev = data; | 129 | struct pci_dev *dev = data; |
130 | struct pci_controller *hose = dev->sysdata; | 130 | struct pci_controller *hose = dev->sysdata; |
131 | unsigned long alignto; | 131 | unsigned long alignto; |
132 | unsigned long start = res->start; | 132 | resource_size_t start = res->start; |
133 | 133 | ||
134 | if (res->flags & IORESOURCE_IO) { | 134 | if (res->flags & IORESOURCE_IO) { |
135 | /* Make sure we start at our min on all hoses */ | 135 | /* Make sure we start at our min on all hoses */ |
diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c index 558b83368559..254c507a608c 100644 --- a/arch/alpha/kernel/setup.c +++ b/arch/alpha/kernel/setup.c | |||
@@ -481,7 +481,7 @@ register_cpus(void) | |||
481 | struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); | 481 | struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); |
482 | if (!p) | 482 | if (!p) |
483 | return -ENOMEM; | 483 | return -ENOMEM; |
484 | register_cpu(p, i, NULL); | 484 | register_cpu(p, i); |
485 | } | 485 | } |
486 | return 0; | 486 | return 0; |
487 | } | 487 | } |
diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c index d7f0e97fe56f..1a1a2c7a3d94 100644 --- a/arch/alpha/kernel/sys_alcor.c +++ b/arch/alpha/kernel/sys_alcor.c | |||
@@ -144,7 +144,7 @@ alcor_init_irq(void) | |||
144 | if (i >= 16+20 && i <= 16+30) | 144 | if (i >= 16+20 && i <= 16+30) |
145 | continue; | 145 | continue; |
146 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 146 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
147 | irq_desc[i].handler = &alcor_irq_type; | 147 | irq_desc[i].chip = &alcor_irq_type; |
148 | } | 148 | } |
149 | i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq; | 149 | i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq; |
150 | 150 | ||
diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c index 8e3374d34c95..8c9e443d93ad 100644 --- a/arch/alpha/kernel/sys_cabriolet.c +++ b/arch/alpha/kernel/sys_cabriolet.c | |||
@@ -124,7 +124,7 @@ common_init_irq(void (*srm_dev_int)(unsigned long v, struct pt_regs *r)) | |||
124 | 124 | ||
125 | for (i = 16; i < 35; ++i) { | 125 | for (i = 16; i < 35; ++i) { |
126 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 126 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
127 | irq_desc[i].handler = &cabriolet_irq_type; | 127 | irq_desc[i].chip = &cabriolet_irq_type; |
128 | } | 128 | } |
129 | } | 129 | } |
130 | 130 | ||
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index d5da6b1b28ee..b28c8f1c6e10 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c | |||
@@ -300,7 +300,7 @@ init_tsunami_irqs(struct hw_interrupt_type * ops, int imin, int imax) | |||
300 | long i; | 300 | long i; |
301 | for (i = imin; i <= imax; ++i) { | 301 | for (i = imin; i <= imax; ++i) { |
302 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 302 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
303 | irq_desc[i].handler = ops; | 303 | irq_desc[i].chip = ops; |
304 | } | 304 | } |
305 | } | 305 | } |
306 | 306 | ||
diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c index 61a79c354f0b..aeb8e0277905 100644 --- a/arch/alpha/kernel/sys_eb64p.c +++ b/arch/alpha/kernel/sys_eb64p.c | |||
@@ -137,7 +137,7 @@ eb64p_init_irq(void) | |||
137 | 137 | ||
138 | for (i = 16; i < 32; ++i) { | 138 | for (i = 16; i < 32; ++i) { |
139 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 139 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
140 | irq_desc[i].handler = &eb64p_irq_type; | 140 | irq_desc[i].chip = &eb64p_irq_type; |
141 | } | 141 | } |
142 | 142 | ||
143 | common_init_isa_dma(); | 143 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c index bd6e5f0e43c7..64a785baf53a 100644 --- a/arch/alpha/kernel/sys_eiger.c +++ b/arch/alpha/kernel/sys_eiger.c | |||
@@ -154,7 +154,7 @@ eiger_init_irq(void) | |||
154 | 154 | ||
155 | for (i = 16; i < 128; ++i) { | 155 | for (i = 16; i < 128; ++i) { |
156 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 156 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
157 | irq_desc[i].handler = &eiger_irq_type; | 157 | irq_desc[i].chip = &eiger_irq_type; |
158 | } | 158 | } |
159 | } | 159 | } |
160 | 160 | ||
diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c index fcabb7c96a16..0148e095638f 100644 --- a/arch/alpha/kernel/sys_jensen.c +++ b/arch/alpha/kernel/sys_jensen.c | |||
@@ -206,11 +206,11 @@ jensen_init_irq(void) | |||
206 | { | 206 | { |
207 | init_i8259a_irqs(); | 207 | init_i8259a_irqs(); |
208 | 208 | ||
209 | irq_desc[1].handler = &jensen_local_irq_type; | 209 | irq_desc[1].chip = &jensen_local_irq_type; |
210 | irq_desc[4].handler = &jensen_local_irq_type; | 210 | irq_desc[4].chip = &jensen_local_irq_type; |
211 | irq_desc[3].handler = &jensen_local_irq_type; | 211 | irq_desc[3].chip = &jensen_local_irq_type; |
212 | irq_desc[7].handler = &jensen_local_irq_type; | 212 | irq_desc[7].chip = &jensen_local_irq_type; |
213 | irq_desc[9].handler = &jensen_local_irq_type; | 213 | irq_desc[9].chip = &jensen_local_irq_type; |
214 | 214 | ||
215 | common_init_isa_dma(); | 215 | common_init_isa_dma(); |
216 | } | 216 | } |
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index e32fee505220..36d215954376 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c | |||
@@ -303,7 +303,7 @@ init_io7_irqs(struct io7 *io7, | |||
303 | /* Set up the lsi irqs. */ | 303 | /* Set up the lsi irqs. */ |
304 | for (i = 0; i < 128; ++i) { | 304 | for (i = 0; i < 128; ++i) { |
305 | irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; | 305 | irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; |
306 | irq_desc[base + i].handler = lsi_ops; | 306 | irq_desc[base + i].chip = lsi_ops; |
307 | } | 307 | } |
308 | 308 | ||
309 | /* Disable the implemented irqs in hardware. */ | 309 | /* Disable the implemented irqs in hardware. */ |
@@ -317,7 +317,7 @@ init_io7_irqs(struct io7 *io7, | |||
317 | /* Set up the msi irqs. */ | 317 | /* Set up the msi irqs. */ |
318 | for (i = 128; i < (128 + 512); ++i) { | 318 | for (i = 128; i < (128 + 512); ++i) { |
319 | irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; | 319 | irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; |
320 | irq_desc[base + i].handler = msi_ops; | 320 | irq_desc[base + i].chip = msi_ops; |
321 | } | 321 | } |
322 | 322 | ||
323 | for (i = 0; i < 16; ++i) | 323 | for (i = 0; i < 16; ++i) |
@@ -335,7 +335,7 @@ marvel_init_irq(void) | |||
335 | /* Reserve the legacy irqs. */ | 335 | /* Reserve the legacy irqs. */ |
336 | for (i = 0; i < 16; ++i) { | 336 | for (i = 0; i < 16; ++i) { |
337 | irq_desc[i].status = IRQ_DISABLED; | 337 | irq_desc[i].status = IRQ_DISABLED; |
338 | irq_desc[i].handler = &marvel_legacy_irq_type; | 338 | irq_desc[i].chip = &marvel_legacy_irq_type; |
339 | } | 339 | } |
340 | 340 | ||
341 | /* Init the io7 irqs. */ | 341 | /* Init the io7 irqs. */ |
diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c index d78a0daa6168..b741600e3761 100644 --- a/arch/alpha/kernel/sys_mikasa.c +++ b/arch/alpha/kernel/sys_mikasa.c | |||
@@ -117,7 +117,7 @@ mikasa_init_irq(void) | |||
117 | 117 | ||
118 | for (i = 16; i < 32; ++i) { | 118 | for (i = 16; i < 32; ++i) { |
119 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 119 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
120 | irq_desc[i].handler = &mikasa_irq_type; | 120 | irq_desc[i].chip = &mikasa_irq_type; |
121 | } | 121 | } |
122 | 122 | ||
123 | init_i8259a_irqs(); | 123 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c index 65061f5d7410..55db02d318d7 100644 --- a/arch/alpha/kernel/sys_noritake.c +++ b/arch/alpha/kernel/sys_noritake.c | |||
@@ -139,7 +139,7 @@ noritake_init_irq(void) | |||
139 | 139 | ||
140 | for (i = 16; i < 48; ++i) { | 140 | for (i = 16; i < 48; ++i) { |
141 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 141 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
142 | irq_desc[i].handler = &noritake_irq_type; | 142 | irq_desc[i].chip = &noritake_irq_type; |
143 | } | 143 | } |
144 | 144 | ||
145 | init_i8259a_irqs(); | 145 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c index 05888a02a604..949607e3d6fb 100644 --- a/arch/alpha/kernel/sys_rawhide.c +++ b/arch/alpha/kernel/sys_rawhide.c | |||
@@ -180,7 +180,7 @@ rawhide_init_irq(void) | |||
180 | 180 | ||
181 | for (i = 16; i < 128; ++i) { | 181 | for (i = 16; i < 128; ++i) { |
182 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 182 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
183 | irq_desc[i].handler = &rawhide_irq_type; | 183 | irq_desc[i].chip = &rawhide_irq_type; |
184 | } | 184 | } |
185 | 185 | ||
186 | init_i8259a_irqs(); | 186 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c index 58404243057b..6ae506052635 100644 --- a/arch/alpha/kernel/sys_rx164.c +++ b/arch/alpha/kernel/sys_rx164.c | |||
@@ -117,7 +117,7 @@ rx164_init_irq(void) | |||
117 | rx164_update_irq_hw(0); | 117 | rx164_update_irq_hw(0); |
118 | for (i = 16; i < 40; ++i) { | 118 | for (i = 16; i < 40; ++i) { |
119 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 119 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
120 | irq_desc[i].handler = &rx164_irq_type; | 120 | irq_desc[i].chip = &rx164_irq_type; |
121 | } | 121 | } |
122 | 122 | ||
123 | init_i8259a_irqs(); | 123 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c index a7ff84474ace..24dea40c9bfe 100644 --- a/arch/alpha/kernel/sys_sable.c +++ b/arch/alpha/kernel/sys_sable.c | |||
@@ -537,7 +537,7 @@ sable_lynx_init_irq(int nr_irqs) | |||
537 | 537 | ||
538 | for (i = 0; i < nr_irqs; ++i) { | 538 | for (i = 0; i < nr_irqs; ++i) { |
539 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 539 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
540 | irq_desc[i].handler = &sable_lynx_irq_type; | 540 | irq_desc[i].chip = &sable_lynx_irq_type; |
541 | } | 541 | } |
542 | 542 | ||
543 | common_init_isa_dma(); | 543 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c index 7955bdfc2db0..2c75cd1fd81a 100644 --- a/arch/alpha/kernel/sys_takara.c +++ b/arch/alpha/kernel/sys_takara.c | |||
@@ -154,7 +154,7 @@ takara_init_irq(void) | |||
154 | 154 | ||
155 | for (i = 16; i < 128; ++i) { | 155 | for (i = 16; i < 128; ++i) { |
156 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 156 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
157 | irq_desc[i].handler = &takara_irq_type; | 157 | irq_desc[i].chip = &takara_irq_type; |
158 | } | 158 | } |
159 | 159 | ||
160 | common_init_isa_dma(); | 160 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index 2551fb49ae09..13f3ed8ed7ac 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c | |||
@@ -189,7 +189,7 @@ init_titan_irqs(struct hw_interrupt_type * ops, int imin, int imax) | |||
189 | long i; | 189 | long i; |
190 | for (i = imin; i <= imax; ++i) { | 190 | for (i = imin; i <= imax; ++i) { |
191 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; | 191 | irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; |
192 | irq_desc[i].handler = ops; | 192 | irq_desc[i].chip = ops; |
193 | } | 193 | } |
194 | } | 194 | } |
195 | 195 | ||
diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c index 1553f470246e..22c5798fe083 100644 --- a/arch/alpha/kernel/sys_wildfire.c +++ b/arch/alpha/kernel/sys_wildfire.c | |||
@@ -199,14 +199,14 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) | |||
199 | if (i == 2) | 199 | if (i == 2) |
200 | continue; | 200 | continue; |
201 | irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; | 201 | irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; |
202 | irq_desc[i+irq_bias].handler = &wildfire_irq_type; | 202 | irq_desc[i+irq_bias].chip = &wildfire_irq_type; |
203 | } | 203 | } |
204 | 204 | ||
205 | irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; | 205 | irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; |
206 | irq_desc[36+irq_bias].handler = &wildfire_irq_type; | 206 | irq_desc[36+irq_bias].chip = &wildfire_irq_type; |
207 | for (i = 40; i < 64; ++i) { | 207 | for (i = 40; i < 64; ++i) { |
208 | irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; | 208 | irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; |
209 | irq_desc[i+irq_bias].handler = &wildfire_irq_type; | 209 | irq_desc[i+irq_bias].chip = &wildfire_irq_type; |
210 | } | 210 | } |
211 | 211 | ||
212 | setup_irq(32+irq_bias, &isa_enable); | 212 | setup_irq(32+irq_bias, &isa_enable); |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3d1a3fb7d5fc..f123c7c9fc98 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -188,23 +188,27 @@ config ARCH_IMX | |||
188 | 188 | ||
189 | config ARCH_IOP3XX | 189 | config ARCH_IOP3XX |
190 | bool "IOP3xx-based" | 190 | bool "IOP3xx-based" |
191 | depends on MMU | ||
191 | select PCI | 192 | select PCI |
192 | help | 193 | help |
193 | Support for Intel's IOP3XX (XScale) family of processors. | 194 | Support for Intel's IOP3XX (XScale) family of processors. |
194 | 195 | ||
195 | config ARCH_IXP4XX | 196 | config ARCH_IXP4XX |
196 | bool "IXP4xx-based" | 197 | bool "IXP4xx-based" |
198 | depends on MMU | ||
197 | help | 199 | help |
198 | Support for Intel's IXP4XX (XScale) family of processors. | 200 | Support for Intel's IXP4XX (XScale) family of processors. |
199 | 201 | ||
200 | config ARCH_IXP2000 | 202 | config ARCH_IXP2000 |
201 | bool "IXP2400/2800-based" | 203 | bool "IXP2400/2800-based" |
204 | depends on MMU | ||
202 | select PCI | 205 | select PCI |
203 | help | 206 | help |
204 | Support for Intel's IXP2400/2800 (XScale) family of processors. | 207 | Support for Intel's IXP2400/2800 (XScale) family of processors. |
205 | 208 | ||
206 | config ARCH_IXP23XX | 209 | config ARCH_IXP23XX |
207 | bool "IXP23XX-based" | 210 | bool "IXP23XX-based" |
211 | depends on MMU | ||
208 | select PCI | 212 | select PCI |
209 | help | 213 | help |
210 | Support for Intel's IXP23xx (XScale) family of processors. | 214 | Support for Intel's IXP23xx (XScale) family of processors. |
@@ -229,6 +233,7 @@ config ARCH_PNX4008 | |||
229 | 233 | ||
230 | config ARCH_PXA | 234 | config ARCH_PXA |
231 | bool "PXA2xx-based" | 235 | bool "PXA2xx-based" |
236 | depends on MMU | ||
232 | select ARCH_MTD_XIP | 237 | select ARCH_MTD_XIP |
233 | help | 238 | help |
234 | Support for Intel's PXA2XX processor line. | 239 | Support for Intel's PXA2XX processor line. |
@@ -339,6 +344,10 @@ config XSCALE_PMU | |||
339 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER | 344 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER |
340 | default y | 345 | default y |
341 | 346 | ||
347 | if !MMU | ||
348 | source "arch/arm/Kconfig-nommu" | ||
349 | endif | ||
350 | |||
342 | endmenu | 351 | endmenu |
343 | 352 | ||
344 | source "arch/arm/common/Kconfig" | 353 | source "arch/arm/common/Kconfig" |
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index a601b8b55f35..7cffbaef064b 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -22,6 +22,9 @@ obj-$(CONFIG_PCI) += bios32.o | |||
22 | obj-$(CONFIG_SMP) += smp.o | 22 | obj-$(CONFIG_SMP) += smp.o |
23 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o | 23 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o |
24 | 24 | ||
25 | obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o | ||
26 | AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 | ||
27 | |||
25 | obj-$(CONFIG_IWMMXT) += iwmmxt.o | 28 | obj-$(CONFIG_IWMMXT) += iwmmxt.o |
26 | AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt | 29 | AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt |
27 | 30 | ||
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index c49b5d4d7fca..da69e660574b 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c | |||
@@ -109,11 +109,13 @@ EXPORT_SYMBOL(memchr); | |||
109 | EXPORT_SYMBOL(__memzero); | 109 | EXPORT_SYMBOL(__memzero); |
110 | 110 | ||
111 | /* user mem (segment) */ | 111 | /* user mem (segment) */ |
112 | EXPORT_SYMBOL(__arch_copy_from_user); | 112 | EXPORT_SYMBOL(__strnlen_user); |
113 | EXPORT_SYMBOL(__arch_copy_to_user); | 113 | EXPORT_SYMBOL(__strncpy_from_user); |
114 | EXPORT_SYMBOL(__arch_clear_user); | 114 | |
115 | EXPORT_SYMBOL(__arch_strnlen_user); | 115 | #ifdef CONFIG_MMU |
116 | EXPORT_SYMBOL(__arch_strncpy_from_user); | 116 | EXPORT_SYMBOL(__copy_from_user); |
117 | EXPORT_SYMBOL(__copy_to_user); | ||
118 | EXPORT_SYMBOL(__clear_user); | ||
117 | 119 | ||
118 | EXPORT_SYMBOL(__get_user_1); | 120 | EXPORT_SYMBOL(__get_user_1); |
119 | EXPORT_SYMBOL(__get_user_2); | 121 | EXPORT_SYMBOL(__get_user_2); |
@@ -123,6 +125,7 @@ EXPORT_SYMBOL(__put_user_1); | |||
123 | EXPORT_SYMBOL(__put_user_2); | 125 | EXPORT_SYMBOL(__put_user_2); |
124 | EXPORT_SYMBOL(__put_user_4); | 126 | EXPORT_SYMBOL(__put_user_4); |
125 | EXPORT_SYMBOL(__put_user_8); | 127 | EXPORT_SYMBOL(__put_user_8); |
128 | #endif | ||
126 | 129 | ||
127 | /* crypto hash */ | 130 | /* crypto hash */ |
128 | EXPORT_SYMBOL(sha_transform); | 131 | EXPORT_SYMBOL(sha_transform); |
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 396efba9bacd..447ede5143a8 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c | |||
@@ -60,6 +60,9 @@ int main(void) | |||
60 | #ifdef CONFIG_IWMMXT | 60 | #ifdef CONFIG_IWMMXT |
61 | DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt)); | 61 | DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt)); |
62 | #endif | 62 | #endif |
63 | #ifdef CONFIG_CRUNCH | ||
64 | DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate)); | ||
65 | #endif | ||
63 | BLANK(); | 66 | BLANK(); |
64 | DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0)); | 67 | DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0)); |
65 | DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1)); | 68 | DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1)); |
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index 302fc1401547..45da06fc1ba1 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c | |||
@@ -304,7 +304,7 @@ static inline int pdev_bad_for_parity(struct pci_dev *dev) | |||
304 | static void __devinit | 304 | static void __devinit |
305 | pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev) | 305 | pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev) |
306 | { | 306 | { |
307 | unsigned long offset; | 307 | resource_size_t offset; |
308 | int i; | 308 | int i; |
309 | 309 | ||
310 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | 310 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
@@ -634,9 +634,9 @@ char * __init pcibios_setup(char *str) | |||
634 | * which might be mirrored at 0x0100-0x03ff.. | 634 | * which might be mirrored at 0x0100-0x03ff.. |
635 | */ | 635 | */ |
636 | void pcibios_align_resource(void *data, struct resource *res, | 636 | void pcibios_align_resource(void *data, struct resource *res, |
637 | unsigned long size, unsigned long align) | 637 | resource_size_t size, resource_size_t align) |
638 | { | 638 | { |
639 | unsigned long start = res->start; | 639 | resource_size_t start = res->start; |
640 | 640 | ||
641 | if (res->flags & IORESOURCE_IO && start & 0x300) | 641 | if (res->flags & IORESOURCE_IO && start & 0x300) |
642 | start = (start + 0x3ff) & ~0x3ff; | 642 | start = (start + 0x3ff) & ~0x3ff; |
diff --git a/arch/arm/kernel/crunch-bits.S b/arch/arm/kernel/crunch-bits.S new file mode 100644 index 000000000000..a26886758c67 --- /dev/null +++ b/arch/arm/kernel/crunch-bits.S | |||
@@ -0,0 +1,305 @@ | |||
1 | /* | ||
2 | * arch/arm/kernel/crunch-bits.S | ||
3 | * Cirrus MaverickCrunch context switching and handling | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * Shamelessly stolen from the iWMMXt code by Nicolas Pitre, which is | ||
8 | * Copyright (c) 2003-2004, MontaVista Software, Inc. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/linkage.h> | ||
16 | #include <asm/ptrace.h> | ||
17 | #include <asm/thread_info.h> | ||
18 | #include <asm/asm-offsets.h> | ||
19 | #include <asm/arch/ep93xx-regs.h> | ||
20 | |||
21 | /* | ||
22 | * We can't use hex constants here due to a bug in gas. | ||
23 | */ | ||
24 | #define CRUNCH_MVDX0 0 | ||
25 | #define CRUNCH_MVDX1 8 | ||
26 | #define CRUNCH_MVDX2 16 | ||
27 | #define CRUNCH_MVDX3 24 | ||
28 | #define CRUNCH_MVDX4 32 | ||
29 | #define CRUNCH_MVDX5 40 | ||
30 | #define CRUNCH_MVDX6 48 | ||
31 | #define CRUNCH_MVDX7 56 | ||
32 | #define CRUNCH_MVDX8 64 | ||
33 | #define CRUNCH_MVDX9 72 | ||
34 | #define CRUNCH_MVDX10 80 | ||
35 | #define CRUNCH_MVDX11 88 | ||
36 | #define CRUNCH_MVDX12 96 | ||
37 | #define CRUNCH_MVDX13 104 | ||
38 | #define CRUNCH_MVDX14 112 | ||
39 | #define CRUNCH_MVDX15 120 | ||
40 | #define CRUNCH_MVAX0L 128 | ||
41 | #define CRUNCH_MVAX0M 132 | ||
42 | #define CRUNCH_MVAX0H 136 | ||
43 | #define CRUNCH_MVAX1L 140 | ||
44 | #define CRUNCH_MVAX1M 144 | ||
45 | #define CRUNCH_MVAX1H 148 | ||
46 | #define CRUNCH_MVAX2L 152 | ||
47 | #define CRUNCH_MVAX2M 156 | ||
48 | #define CRUNCH_MVAX2H 160 | ||
49 | #define CRUNCH_MVAX3L 164 | ||
50 | #define CRUNCH_MVAX3M 168 | ||
51 | #define CRUNCH_MVAX3H 172 | ||
52 | #define CRUNCH_DSPSC 176 | ||
53 | |||
54 | #define CRUNCH_SIZE 184 | ||
55 | |||
56 | .text | ||
57 | |||
58 | /* | ||
59 | * Lazy switching of crunch coprocessor context | ||
60 | * | ||
61 | * r10 = struct thread_info pointer | ||
62 | * r9 = ret_from_exception | ||
63 | * lr = undefined instr exit | ||
64 | * | ||
65 | * called from prefetch exception handler with interrupts disabled | ||
66 | */ | ||
67 | ENTRY(crunch_task_enable) | ||
68 | ldr r8, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr | ||
69 | |||
70 | ldr r1, [r8, #0x80] | ||
71 | tst r1, #0x00800000 @ access to crunch enabled? | ||
72 | movne pc, lr @ if so no business here | ||
73 | mov r3, #0xaa @ unlock syscon swlock | ||
74 | str r3, [r8, #0xc0] | ||
75 | orr r1, r1, #0x00800000 @ enable access to crunch | ||
76 | str r1, [r8, #0x80] | ||
77 | |||
78 | ldr r3, =crunch_owner | ||
79 | add r0, r10, #TI_CRUNCH_STATE @ get task crunch save area | ||
80 | ldr r2, [sp, #60] @ current task pc value | ||
81 | ldr r1, [r3] @ get current crunch owner | ||
82 | str r0, [r3] @ this task now owns crunch | ||
83 | sub r2, r2, #4 @ adjust pc back | ||
84 | str r2, [sp, #60] | ||
85 | |||
86 | ldr r2, [r8, #0x80] | ||
87 | mov r2, r2 @ flush out enable (@@@) | ||
88 | |||
89 | teq r1, #0 @ test for last ownership | ||
90 | mov lr, r9 @ normal exit from exception | ||
91 | beq crunch_load @ no owner, skip save | ||
92 | |||
93 | crunch_save: | ||
94 | cfstr64 mvdx0, [r1, #CRUNCH_MVDX0] @ save 64b registers | ||
95 | cfstr64 mvdx1, [r1, #CRUNCH_MVDX1] | ||
96 | cfstr64 mvdx2, [r1, #CRUNCH_MVDX2] | ||
97 | cfstr64 mvdx3, [r1, #CRUNCH_MVDX3] | ||
98 | cfstr64 mvdx4, [r1, #CRUNCH_MVDX4] | ||
99 | cfstr64 mvdx5, [r1, #CRUNCH_MVDX5] | ||
100 | cfstr64 mvdx6, [r1, #CRUNCH_MVDX6] | ||
101 | cfstr64 mvdx7, [r1, #CRUNCH_MVDX7] | ||
102 | cfstr64 mvdx8, [r1, #CRUNCH_MVDX8] | ||
103 | cfstr64 mvdx9, [r1, #CRUNCH_MVDX9] | ||
104 | cfstr64 mvdx10, [r1, #CRUNCH_MVDX10] | ||
105 | cfstr64 mvdx11, [r1, #CRUNCH_MVDX11] | ||
106 | cfstr64 mvdx12, [r1, #CRUNCH_MVDX12] | ||
107 | cfstr64 mvdx13, [r1, #CRUNCH_MVDX13] | ||
108 | cfstr64 mvdx14, [r1, #CRUNCH_MVDX14] | ||
109 | cfstr64 mvdx15, [r1, #CRUNCH_MVDX15] | ||
110 | |||
111 | #ifdef __ARMEB__ | ||
112 | #error fix me for ARMEB | ||
113 | #endif | ||
114 | |||
115 | cfmv32al mvfx0, mvax0 @ save 72b accumulators | ||
116 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX0L] | ||
117 | cfmv32am mvfx0, mvax0 | ||
118 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX0M] | ||
119 | cfmv32ah mvfx0, mvax0 | ||
120 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX0H] | ||
121 | cfmv32al mvfx0, mvax1 | ||
122 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX1L] | ||
123 | cfmv32am mvfx0, mvax1 | ||
124 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX1M] | ||
125 | cfmv32ah mvfx0, mvax1 | ||
126 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX1H] | ||
127 | cfmv32al mvfx0, mvax2 | ||
128 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX2L] | ||
129 | cfmv32am mvfx0, mvax2 | ||
130 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX2M] | ||
131 | cfmv32ah mvfx0, mvax2 | ||
132 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX2H] | ||
133 | cfmv32al mvfx0, mvax3 | ||
134 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX3L] | ||
135 | cfmv32am mvfx0, mvax3 | ||
136 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX3M] | ||
137 | cfmv32ah mvfx0, mvax3 | ||
138 | cfstr32 mvfx0, [r1, #CRUNCH_MVAX3H] | ||
139 | |||
140 | cfmv32sc mvdx0, dspsc @ save status word | ||
141 | cfstr64 mvdx0, [r1, #CRUNCH_DSPSC] | ||
142 | |||
143 | teq r0, #0 @ anything to load? | ||
144 | cfldr64eq mvdx0, [r1, #CRUNCH_MVDX0] @ mvdx0 was clobbered | ||
145 | moveq pc, lr | ||
146 | |||
147 | crunch_load: | ||
148 | cfldr64 mvdx0, [r0, #CRUNCH_DSPSC] @ load status word | ||
149 | cfmvsc32 dspsc, mvdx0 | ||
150 | |||
151 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX0L] @ load 72b accumulators | ||
152 | cfmval32 mvax0, mvfx0 | ||
153 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX0M] | ||
154 | cfmvam32 mvax0, mvfx0 | ||
155 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX0H] | ||
156 | cfmvah32 mvax0, mvfx0 | ||
157 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX1L] | ||
158 | cfmval32 mvax1, mvfx0 | ||
159 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX1M] | ||
160 | cfmvam32 mvax1, mvfx0 | ||
161 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX1H] | ||
162 | cfmvah32 mvax1, mvfx0 | ||
163 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX2L] | ||
164 | cfmval32 mvax2, mvfx0 | ||
165 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX2M] | ||
166 | cfmvam32 mvax2, mvfx0 | ||
167 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX2H] | ||
168 | cfmvah32 mvax2, mvfx0 | ||
169 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX3L] | ||
170 | cfmval32 mvax3, mvfx0 | ||
171 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX3M] | ||
172 | cfmvam32 mvax3, mvfx0 | ||
173 | cfldr32 mvfx0, [r0, #CRUNCH_MVAX3H] | ||
174 | cfmvah32 mvax3, mvfx0 | ||
175 | |||
176 | cfldr64 mvdx0, [r0, #CRUNCH_MVDX0] @ load 64b registers | ||
177 | cfldr64 mvdx1, [r0, #CRUNCH_MVDX1] | ||
178 | cfldr64 mvdx2, [r0, #CRUNCH_MVDX2] | ||
179 | cfldr64 mvdx3, [r0, #CRUNCH_MVDX3] | ||
180 | cfldr64 mvdx4, [r0, #CRUNCH_MVDX4] | ||
181 | cfldr64 mvdx5, [r0, #CRUNCH_MVDX5] | ||
182 | cfldr64 mvdx6, [r0, #CRUNCH_MVDX6] | ||
183 | cfldr64 mvdx7, [r0, #CRUNCH_MVDX7] | ||
184 | cfldr64 mvdx8, [r0, #CRUNCH_MVDX8] | ||
185 | cfldr64 mvdx9, [r0, #CRUNCH_MVDX9] | ||
186 | cfldr64 mvdx10, [r0, #CRUNCH_MVDX10] | ||
187 | cfldr64 mvdx11, [r0, #CRUNCH_MVDX11] | ||
188 | cfldr64 mvdx12, [r0, #CRUNCH_MVDX12] | ||
189 | cfldr64 mvdx13, [r0, #CRUNCH_MVDX13] | ||
190 | cfldr64 mvdx14, [r0, #CRUNCH_MVDX14] | ||
191 | cfldr64 mvdx15, [r0, #CRUNCH_MVDX15] | ||
192 | |||
193 | mov pc, lr | ||
194 | |||
195 | /* | ||
196 | * Back up crunch regs to save area and disable access to them | ||
197 | * (mainly for gdb or sleep mode usage) | ||
198 | * | ||
199 | * r0 = struct thread_info pointer of target task or NULL for any | ||
200 | */ | ||
201 | ENTRY(crunch_task_disable) | ||
202 | stmfd sp!, {r4, r5, lr} | ||
203 | |||
204 | mrs ip, cpsr | ||
205 | orr r2, ip, #PSR_I_BIT @ disable interrupts | ||
206 | msr cpsr_c, r2 | ||
207 | |||
208 | ldr r4, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr | ||
209 | |||
210 | ldr r3, =crunch_owner | ||
211 | add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area | ||
212 | ldr r1, [r3] @ get current crunch owner | ||
213 | teq r1, #0 @ any current owner? | ||
214 | beq 1f @ no: quit | ||
215 | teq r0, #0 @ any owner? | ||
216 | teqne r1, r2 @ or specified one? | ||
217 | bne 1f @ no: quit | ||
218 | |||
219 | ldr r5, [r4, #0x80] @ enable access to crunch | ||
220 | mov r2, #0xaa | ||
221 | str r2, [r4, #0xc0] | ||
222 | orr r5, r5, #0x00800000 | ||
223 | str r5, [r4, #0x80] | ||
224 | |||
225 | mov r0, #0 @ nothing to load | ||
226 | str r0, [r3] @ no more current owner | ||
227 | ldr r2, [r4, #0x80] @ flush out enable (@@@) | ||
228 | mov r2, r2 | ||
229 | bl crunch_save | ||
230 | |||
231 | mov r2, #0xaa @ disable access to crunch | ||
232 | str r2, [r4, #0xc0] | ||
233 | bic r5, r5, #0x00800000 | ||
234 | str r5, [r4, #0x80] | ||
235 | ldr r5, [r4, #0x80] @ flush out enable (@@@) | ||
236 | mov r5, r5 | ||
237 | |||
238 | 1: msr cpsr_c, ip @ restore interrupt mode | ||
239 | ldmfd sp!, {r4, r5, pc} | ||
240 | |||
241 | /* | ||
242 | * Copy crunch state to given memory address | ||
243 | * | ||
244 | * r0 = struct thread_info pointer of target task | ||
245 | * r1 = memory address where to store crunch state | ||
246 | * | ||
247 | * this is called mainly in the creation of signal stack frames | ||
248 | */ | ||
249 | ENTRY(crunch_task_copy) | ||
250 | mrs ip, cpsr | ||
251 | orr r2, ip, #PSR_I_BIT @ disable interrupts | ||
252 | msr cpsr_c, r2 | ||
253 | |||
254 | ldr r3, =crunch_owner | ||
255 | add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area | ||
256 | ldr r3, [r3] @ get current crunch owner | ||
257 | teq r2, r3 @ does this task own it... | ||
258 | beq 1f | ||
259 | |||
260 | @ current crunch values are in the task save area | ||
261 | msr cpsr_c, ip @ restore interrupt mode | ||
262 | mov r0, r1 | ||
263 | mov r1, r2 | ||
264 | mov r2, #CRUNCH_SIZE | ||
265 | b memcpy | ||
266 | |||
267 | 1: @ this task owns crunch regs -- grab a copy from there | ||
268 | mov r0, #0 @ nothing to load | ||
269 | mov r3, lr @ preserve return address | ||
270 | bl crunch_save | ||
271 | msr cpsr_c, ip @ restore interrupt mode | ||
272 | mov pc, r3 | ||
273 | |||
274 | /* | ||
275 | * Restore crunch state from given memory address | ||
276 | * | ||
277 | * r0 = struct thread_info pointer of target task | ||
278 | * r1 = memory address where to get crunch state from | ||
279 | * | ||
280 | * this is used to restore crunch state when unwinding a signal stack frame | ||
281 | */ | ||
282 | ENTRY(crunch_task_restore) | ||
283 | mrs ip, cpsr | ||
284 | orr r2, ip, #PSR_I_BIT @ disable interrupts | ||
285 | msr cpsr_c, r2 | ||
286 | |||
287 | ldr r3, =crunch_owner | ||
288 | add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area | ||
289 | ldr r3, [r3] @ get current crunch owner | ||
290 | teq r2, r3 @ does this task own it... | ||
291 | beq 1f | ||
292 | |||
293 | @ this task doesn't own crunch regs -- use its save area | ||
294 | msr cpsr_c, ip @ restore interrupt mode | ||
295 | mov r0, r2 | ||
296 | mov r2, #CRUNCH_SIZE | ||
297 | b memcpy | ||
298 | |||
299 | 1: @ this task owns crunch regs -- load them directly | ||
300 | mov r0, r1 | ||
301 | mov r1, #0 @ nothing to save | ||
302 | mov r3, lr @ preserve return address | ||
303 | bl crunch_load | ||
304 | msr cpsr_c, ip @ restore interrupt mode | ||
305 | mov pc, r3 | ||
diff --git a/arch/arm/kernel/crunch.c b/arch/arm/kernel/crunch.c new file mode 100644 index 000000000000..748175921f9b --- /dev/null +++ b/arch/arm/kernel/crunch.c | |||
@@ -0,0 +1,83 @@ | |||
1 | /* | ||
2 | * arch/arm/kernel/crunch.c | ||
3 | * Cirrus MaverickCrunch context switching and handling | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/module.h> | ||
13 | #include <linux/config.h> | ||
14 | #include <linux/types.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/signal.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <asm/arch/ep93xx-regs.h> | ||
20 | #include <asm/thread_notify.h> | ||
21 | #include <asm/io.h> | ||
22 | |||
23 | struct crunch_state *crunch_owner; | ||
24 | |||
25 | void crunch_task_release(struct thread_info *thread) | ||
26 | { | ||
27 | local_irq_disable(); | ||
28 | if (crunch_owner == &thread->crunchstate) | ||
29 | crunch_owner = NULL; | ||
30 | local_irq_enable(); | ||
31 | } | ||
32 | |||
33 | static int crunch_enabled(u32 devcfg) | ||
34 | { | ||
35 | return !!(devcfg & EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE); | ||
36 | } | ||
37 | |||
38 | static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t) | ||
39 | { | ||
40 | struct thread_info *thread = (struct thread_info *)t; | ||
41 | struct crunch_state *crunch_state; | ||
42 | u32 devcfg; | ||
43 | |||
44 | crunch_state = &thread->crunchstate; | ||
45 | |||
46 | switch (cmd) { | ||
47 | case THREAD_NOTIFY_FLUSH: | ||
48 | memset(crunch_state, 0, sizeof(*crunch_state)); | ||
49 | |||
50 | /* | ||
51 | * FALLTHROUGH: Ensure we don't try to overwrite our newly | ||
52 | * initialised state information on the first fault. | ||
53 | */ | ||
54 | |||
55 | case THREAD_NOTIFY_RELEASE: | ||
56 | crunch_task_release(thread); | ||
57 | break; | ||
58 | |||
59 | case THREAD_NOTIFY_SWITCH: | ||
60 | devcfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG); | ||
61 | if (crunch_enabled(devcfg) || crunch_owner == crunch_state) { | ||
62 | devcfg ^= EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE; | ||
63 | __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); | ||
64 | __raw_writel(devcfg, EP93XX_SYSCON_DEVICE_CONFIG); | ||
65 | } | ||
66 | break; | ||
67 | } | ||
68 | |||
69 | return NOTIFY_DONE; | ||
70 | } | ||
71 | |||
72 | static struct notifier_block crunch_notifier_block = { | ||
73 | .notifier_call = crunch_do, | ||
74 | }; | ||
75 | |||
76 | static int __init crunch_init(void) | ||
77 | { | ||
78 | thread_register_notifier(&crunch_notifier_block); | ||
79 | |||
80 | return 0; | ||
81 | } | ||
82 | |||
83 | late_initcall(crunch_init); | ||
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 86c92523a346..6423a38839b8 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -492,9 +492,15 @@ call_fpe: | |||
492 | b do_fpe @ CP#1 (FPE) | 492 | b do_fpe @ CP#1 (FPE) |
493 | b do_fpe @ CP#2 (FPE) | 493 | b do_fpe @ CP#2 (FPE) |
494 | mov pc, lr @ CP#3 | 494 | mov pc, lr @ CP#3 |
495 | #ifdef CONFIG_CRUNCH | ||
496 | b crunch_task_enable @ CP#4 (MaverickCrunch) | ||
497 | b crunch_task_enable @ CP#5 (MaverickCrunch) | ||
498 | b crunch_task_enable @ CP#6 (MaverickCrunch) | ||
499 | #else | ||
495 | mov pc, lr @ CP#4 | 500 | mov pc, lr @ CP#4 |
496 | mov pc, lr @ CP#5 | 501 | mov pc, lr @ CP#5 |
497 | mov pc, lr @ CP#6 | 502 | mov pc, lr @ CP#6 |
503 | #endif | ||
498 | mov pc, lr @ CP#7 | 504 | mov pc, lr @ CP#7 |
499 | mov pc, lr @ CP#8 | 505 | mov pc, lr @ CP#8 |
500 | mov pc, lr @ CP#9 | 506 | mov pc, lr @ CP#9 |
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index a1d1b2906e8d..c40bdc770054 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
@@ -634,6 +634,32 @@ static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp) | |||
634 | 634 | ||
635 | #endif | 635 | #endif |
636 | 636 | ||
637 | #ifdef CONFIG_CRUNCH | ||
638 | /* | ||
639 | * Get the child Crunch state. | ||
640 | */ | ||
641 | static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp) | ||
642 | { | ||
643 | struct thread_info *thread = task_thread_info(tsk); | ||
644 | |||
645 | crunch_task_disable(thread); /* force it to ram */ | ||
646 | return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE) | ||
647 | ? -EFAULT : 0; | ||
648 | } | ||
649 | |||
650 | /* | ||
651 | * Set the child Crunch state. | ||
652 | */ | ||
653 | static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp) | ||
654 | { | ||
655 | struct thread_info *thread = task_thread_info(tsk); | ||
656 | |||
657 | crunch_task_release(thread); /* force a reload */ | ||
658 | return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE) | ||
659 | ? -EFAULT : 0; | ||
660 | } | ||
661 | #endif | ||
662 | |||
637 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) | 663 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
638 | { | 664 | { |
639 | unsigned long tmp; | 665 | unsigned long tmp; |
@@ -765,6 +791,16 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
765 | child->ptrace_message = data; | 791 | child->ptrace_message = data; |
766 | break; | 792 | break; |
767 | 793 | ||
794 | #ifdef CONFIG_CRUNCH | ||
795 | case PTRACE_GETCRUNCHREGS: | ||
796 | ret = ptrace_getcrunchregs(child, (void __user *)data); | ||
797 | break; | ||
798 | |||
799 | case PTRACE_SETCRUNCHREGS: | ||
800 | ret = ptrace_setcrunchregs(child, (void __user *)data); | ||
801 | break; | ||
802 | #endif | ||
803 | |||
768 | default: | 804 | default: |
769 | ret = ptrace_request(child, request, addr, data); | 805 | ret = ptrace_request(child, request, addr, data); |
770 | break; | 806 | break; |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 9fc9af88c60c..6bdf70def01f 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -119,9 +119,24 @@ DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data); | |||
119 | * Standard memory resources | 119 | * Standard memory resources |
120 | */ | 120 | */ |
121 | static struct resource mem_res[] = { | 121 | static struct resource mem_res[] = { |
122 | { "Video RAM", 0, 0, IORESOURCE_MEM }, | 122 | { |
123 | { "Kernel text", 0, 0, IORESOURCE_MEM }, | 123 | .name = "Video RAM", |
124 | { "Kernel data", 0, 0, IORESOURCE_MEM } | 124 | .start = 0, |
125 | .end = 0, | ||
126 | .flags = IORESOURCE_MEM | ||
127 | }, | ||
128 | { | ||
129 | .name = "Kernel text", | ||
130 | .start = 0, | ||
131 | .end = 0, | ||
132 | .flags = IORESOURCE_MEM | ||
133 | }, | ||
134 | { | ||
135 | .name = "Kernel data", | ||
136 | .start = 0, | ||
137 | .end = 0, | ||
138 | .flags = IORESOURCE_MEM | ||
139 | } | ||
125 | }; | 140 | }; |
126 | 141 | ||
127 | #define video_ram mem_res[0] | 142 | #define video_ram mem_res[0] |
@@ -129,9 +144,24 @@ static struct resource mem_res[] = { | |||
129 | #define kernel_data mem_res[2] | 144 | #define kernel_data mem_res[2] |
130 | 145 | ||
131 | static struct resource io_res[] = { | 146 | static struct resource io_res[] = { |
132 | { "reserved", 0x3bc, 0x3be, IORESOURCE_IO | IORESOURCE_BUSY }, | 147 | { |
133 | { "reserved", 0x378, 0x37f, IORESOURCE_IO | IORESOURCE_BUSY }, | 148 | .name = "reserved", |
134 | { "reserved", 0x278, 0x27f, IORESOURCE_IO | IORESOURCE_BUSY } | 149 | .start = 0x3bc, |
150 | .end = 0x3be, | ||
151 | .flags = IORESOURCE_IO | IORESOURCE_BUSY | ||
152 | }, | ||
153 | { | ||
154 | .name = "reserved", | ||
155 | .start = 0x378, | ||
156 | .end = 0x37f, | ||
157 | .flags = IORESOURCE_IO | IORESOURCE_BUSY | ||
158 | }, | ||
159 | { | ||
160 | .name = "reserved", | ||
161 | .start = 0x278, | ||
162 | .end = 0x27f, | ||
163 | .flags = IORESOURCE_IO | IORESOURCE_BUSY | ||
164 | } | ||
135 | }; | 165 | }; |
136 | 166 | ||
137 | #define lp0 io_res[0] | 167 | #define lp0 io_res[0] |
@@ -808,7 +838,7 @@ static int __init topology_init(void) | |||
808 | int cpu; | 838 | int cpu; |
809 | 839 | ||
810 | for_each_possible_cpu(cpu) | 840 | for_each_possible_cpu(cpu) |
811 | register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu, NULL); | 841 | register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu); |
812 | 842 | ||
813 | return 0; | 843 | return 0; |
814 | } | 844 | } |
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 1ce05ec086c6..83a8d3c95eb3 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c | |||
@@ -132,6 +132,37 @@ sys_sigaction(int sig, const struct old_sigaction __user *act, | |||
132 | return ret; | 132 | return ret; |
133 | } | 133 | } |
134 | 134 | ||
135 | #ifdef CONFIG_CRUNCH | ||
136 | static int preserve_crunch_context(struct crunch_sigframe *frame) | ||
137 | { | ||
138 | char kbuf[sizeof(*frame) + 8]; | ||
139 | struct crunch_sigframe *kframe; | ||
140 | |||
141 | /* the crunch context must be 64 bit aligned */ | ||
142 | kframe = (struct crunch_sigframe *)((unsigned long)(kbuf + 8) & ~7); | ||
143 | kframe->magic = CRUNCH_MAGIC; | ||
144 | kframe->size = CRUNCH_STORAGE_SIZE; | ||
145 | crunch_task_copy(current_thread_info(), &kframe->storage); | ||
146 | return __copy_to_user(frame, kframe, sizeof(*frame)); | ||
147 | } | ||
148 | |||
149 | static int restore_crunch_context(struct crunch_sigframe *frame) | ||
150 | { | ||
151 | char kbuf[sizeof(*frame) + 8]; | ||
152 | struct crunch_sigframe *kframe; | ||
153 | |||
154 | /* the crunch context must be 64 bit aligned */ | ||
155 | kframe = (struct crunch_sigframe *)((unsigned long)(kbuf + 8) & ~7); | ||
156 | if (__copy_from_user(kframe, frame, sizeof(*frame))) | ||
157 | return -1; | ||
158 | if (kframe->magic != CRUNCH_MAGIC || | ||
159 | kframe->size != CRUNCH_STORAGE_SIZE) | ||
160 | return -1; | ||
161 | crunch_task_restore(current_thread_info(), &kframe->storage); | ||
162 | return 0; | ||
163 | } | ||
164 | #endif | ||
165 | |||
135 | #ifdef CONFIG_IWMMXT | 166 | #ifdef CONFIG_IWMMXT |
136 | 167 | ||
137 | static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame) | 168 | static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame) |
@@ -214,6 +245,10 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf) | |||
214 | err |= !valid_user_regs(regs); | 245 | err |= !valid_user_regs(regs); |
215 | 246 | ||
216 | aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; | 247 | aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; |
248 | #ifdef CONFIG_CRUNCH | ||
249 | if (err == 0) | ||
250 | err |= restore_crunch_context(&aux->crunch); | ||
251 | #endif | ||
217 | #ifdef CONFIG_IWMMXT | 252 | #ifdef CONFIG_IWMMXT |
218 | if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) | 253 | if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) |
219 | err |= restore_iwmmxt_context(&aux->iwmmxt); | 254 | err |= restore_iwmmxt_context(&aux->iwmmxt); |
@@ -333,6 +368,10 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set) | |||
333 | err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set)); | 368 | err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set)); |
334 | 369 | ||
335 | aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; | 370 | aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; |
371 | #ifdef CONFIG_CRUNCH | ||
372 | if (err == 0) | ||
373 | err |= preserve_crunch_context(&aux->crunch); | ||
374 | #endif | ||
336 | #ifdef CONFIG_IWMMXT | 375 | #ifdef CONFIG_IWMMXT |
337 | if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) | 376 | if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) |
338 | err |= preserve_iwmmxt_context(&aux->iwmmxt); | 377 | err |= preserve_iwmmxt_context(&aux->iwmmxt); |
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 2b254e88595c..2df9688a7028 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S | |||
@@ -80,6 +80,10 @@ SECTIONS | |||
80 | *(.exit.text) | 80 | *(.exit.text) |
81 | *(.exit.data) | 81 | *(.exit.data) |
82 | *(.exitcall.exit) | 82 | *(.exitcall.exit) |
83 | #ifndef CONFIG_MMU | ||
84 | *(.fixup) | ||
85 | *(__ex_table) | ||
86 | #endif | ||
83 | } | 87 | } |
84 | 88 | ||
85 | .text : { /* Real text segment */ | 89 | .text : { /* Real text segment */ |
@@ -87,7 +91,9 @@ SECTIONS | |||
87 | *(.text) | 91 | *(.text) |
88 | SCHED_TEXT | 92 | SCHED_TEXT |
89 | LOCK_TEXT | 93 | LOCK_TEXT |
94 | #ifdef CONFIG_MMU | ||
90 | *(.fixup) | 95 | *(.fixup) |
96 | #endif | ||
91 | *(.gnu.warning) | 97 | *(.gnu.warning) |
92 | *(.rodata) | 98 | *(.rodata) |
93 | *(.rodata.*) | 99 | *(.rodata.*) |
@@ -142,7 +148,9 @@ SECTIONS | |||
142 | */ | 148 | */ |
143 | . = ALIGN(32); | 149 | . = ALIGN(32); |
144 | __start___ex_table = .; | 150 | __start___ex_table = .; |
151 | #ifdef CONFIG_MMU | ||
145 | *(__ex_table) | 152 | *(__ex_table) |
153 | #endif | ||
146 | __stop___ex_table = .; | 154 | __stop___ex_table = .; |
147 | 155 | ||
148 | /* | 156 | /* |
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 7b726b627ea5..30351cd4560d 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile | |||
@@ -6,28 +6,31 @@ | |||
6 | 6 | ||
7 | lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ | 7 | lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ |
8 | csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ | 8 | csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ |
9 | copy_page.o delay.o findbit.o memchr.o memcpy.o \ | 9 | delay.o findbit.o memchr.o memcpy.o \ |
10 | memmove.o memset.o memzero.o setbit.o \ | 10 | memmove.o memset.o memzero.o setbit.o \ |
11 | strncpy_from_user.o strnlen_user.o \ | 11 | strncpy_from_user.o strnlen_user.o \ |
12 | strchr.o strrchr.o \ | 12 | strchr.o strrchr.o \ |
13 | testchangebit.o testclearbit.o testsetbit.o \ | 13 | testchangebit.o testclearbit.o testsetbit.o \ |
14 | getuser.o putuser.o clear_user.o \ | ||
15 | ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ | 14 | ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ |
16 | ucmpdi2.o lib1funcs.o div64.o sha1.o \ | 15 | ucmpdi2.o lib1funcs.o div64.o sha1.o \ |
17 | io-readsb.o io-writesb.o io-readsl.o io-writesl.o | 16 | io-readsb.o io-writesb.o io-readsl.o io-writesl.o |
18 | 17 | ||
18 | mmu-y := clear_user.o copy_page.o getuser.o putuser.o | ||
19 | |||
19 | # the code in uaccess.S is not preemption safe and | 20 | # the code in uaccess.S is not preemption safe and |
20 | # probably faster on ARMv3 only | 21 | # probably faster on ARMv3 only |
21 | ifeq ($(CONFIG_PREEMPT),y) | 22 | ifeq ($(CONFIG_PREEMPT),y) |
22 | lib-y += copy_from_user.o copy_to_user.o | 23 | mmu-y += copy_from_user.o copy_to_user.o |
23 | else | 24 | else |
24 | ifneq ($(CONFIG_CPU_32v3),y) | 25 | ifneq ($(CONFIG_CPU_32v3),y) |
25 | lib-y += copy_from_user.o copy_to_user.o | 26 | mmu-y += copy_from_user.o copy_to_user.o |
26 | else | 27 | else |
27 | lib-y += uaccess.o | 28 | mmu-y += uaccess.o |
28 | endif | 29 | endif |
29 | endif | 30 | endif |
30 | 31 | ||
32 | lib-$(CONFIG_MMU) += $(mmu-y) | ||
33 | |||
31 | ifeq ($(CONFIG_CPU_32v3),y) | 34 | ifeq ($(CONFIG_CPU_32v3),y) |
32 | lib-y += io-readsw-armv3.o io-writesw-armv3.o | 35 | lib-y += io-readsw-armv3.o io-writesw-armv3.o |
33 | else | 36 | else |
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S index 058b80d72aa1..91f993f2e9db 100644 --- a/arch/arm/lib/backtrace.S +++ b/arch/arm/lib/backtrace.S | |||
@@ -97,16 +97,13 @@ ENTRY(c_backtrace) | |||
97 | b 1007f | 97 | b 1007f |
98 | 98 | ||
99 | /* | 99 | /* |
100 | * Fixup for LDMDB | 100 | * Fixup for LDMDB. Note that this must not be in the fixup section. |
101 | */ | 101 | */ |
102 | .section .fixup,"ax" | ||
103 | .align 0 | ||
104 | 1007: ldr r0, =.Lbad | 102 | 1007: ldr r0, =.Lbad |
105 | mov r1, frame | 103 | mov r1, frame |
106 | bl printk | 104 | bl printk |
107 | ldmfd sp!, {r4 - r8, pc} | 105 | ldmfd sp!, {r4 - r8, pc} |
108 | .ltorg | 106 | .ltorg |
109 | .previous | ||
110 | 107 | ||
111 | .section __ex_table,"a" | 108 | .section __ex_table,"a" |
112 | .align 3 | 109 | .align 3 |
diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S index ea435ae2e4a5..ecb28dcdaf7b 100644 --- a/arch/arm/lib/clear_user.S +++ b/arch/arm/lib/clear_user.S | |||
@@ -12,13 +12,13 @@ | |||
12 | 12 | ||
13 | .text | 13 | .text |
14 | 14 | ||
15 | /* Prototype: int __arch_clear_user(void *addr, size_t sz) | 15 | /* Prototype: int __clear_user(void *addr, size_t sz) |
16 | * Purpose : clear some user memory | 16 | * Purpose : clear some user memory |
17 | * Params : addr - user memory address to clear | 17 | * Params : addr - user memory address to clear |
18 | * : sz - number of bytes to clear | 18 | * : sz - number of bytes to clear |
19 | * Returns : number of bytes NOT cleared | 19 | * Returns : number of bytes NOT cleared |
20 | */ | 20 | */ |
21 | ENTRY(__arch_clear_user) | 21 | ENTRY(__clear_user) |
22 | stmfd sp!, {r1, lr} | 22 | stmfd sp!, {r1, lr} |
23 | mov r2, #0 | 23 | mov r2, #0 |
24 | cmp r1, #4 | 24 | cmp r1, #4 |
diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S index 7497393a0e81..6b7363ce749c 100644 --- a/arch/arm/lib/copy_from_user.S +++ b/arch/arm/lib/copy_from_user.S | |||
@@ -16,7 +16,7 @@ | |||
16 | /* | 16 | /* |
17 | * Prototype: | 17 | * Prototype: |
18 | * | 18 | * |
19 | * size_t __arch_copy_from_user(void *to, const void *from, size_t n) | 19 | * size_t __copy_from_user(void *to, const void *from, size_t n) |
20 | * | 20 | * |
21 | * Purpose: | 21 | * Purpose: |
22 | * | 22 | * |
@@ -83,7 +83,7 @@ | |||
83 | 83 | ||
84 | .text | 84 | .text |
85 | 85 | ||
86 | ENTRY(__arch_copy_from_user) | 86 | ENTRY(__copy_from_user) |
87 | 87 | ||
88 | #include "copy_template.S" | 88 | #include "copy_template.S" |
89 | 89 | ||
diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S index 4a6d8ea14022..5224d94688d9 100644 --- a/arch/arm/lib/copy_to_user.S +++ b/arch/arm/lib/copy_to_user.S | |||
@@ -16,7 +16,7 @@ | |||
16 | /* | 16 | /* |
17 | * Prototype: | 17 | * Prototype: |
18 | * | 18 | * |
19 | * size_t __arch_copy_to_user(void *to, const void *from, size_t n) | 19 | * size_t __copy_to_user(void *to, const void *from, size_t n) |
20 | * | 20 | * |
21 | * Purpose: | 21 | * Purpose: |
22 | * | 22 | * |
@@ -86,7 +86,7 @@ | |||
86 | 86 | ||
87 | .text | 87 | .text |
88 | 88 | ||
89 | ENTRY(__arch_copy_to_user) | 89 | ENTRY(__copy_to_user) |
90 | 90 | ||
91 | #include "copy_template.S" | 91 | #include "copy_template.S" |
92 | 92 | ||
diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S index 35649f04fcac..36e3741a3772 100644 --- a/arch/arm/lib/strncpy_from_user.S +++ b/arch/arm/lib/strncpy_from_user.S | |||
@@ -20,7 +20,7 @@ | |||
20 | * returns the number of characters copied (strlen of copied string), | 20 | * returns the number of characters copied (strlen of copied string), |
21 | * -EFAULT on exception, or "len" if we fill the whole buffer | 21 | * -EFAULT on exception, or "len" if we fill the whole buffer |
22 | */ | 22 | */ |
23 | ENTRY(__arch_strncpy_from_user) | 23 | ENTRY(__strncpy_from_user) |
24 | mov ip, r1 | 24 | mov ip, r1 |
25 | 1: subs r2, r2, #1 | 25 | 1: subs r2, r2, #1 |
26 | USER( ldrplbt r3, [r1], #1) | 26 | USER( ldrplbt r3, [r1], #1) |
diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S index 3668a15991ef..18d8fa4f925a 100644 --- a/arch/arm/lib/strnlen_user.S +++ b/arch/arm/lib/strnlen_user.S | |||
@@ -14,13 +14,13 @@ | |||
14 | .text | 14 | .text |
15 | .align 5 | 15 | .align 5 |
16 | 16 | ||
17 | /* Prototype: unsigned long __arch_strnlen_user(const char *str, long n) | 17 | /* Prototype: unsigned long __strnlen_user(const char *str, long n) |
18 | * Purpose : get length of a string in user memory | 18 | * Purpose : get length of a string in user memory |
19 | * Params : str - address of string in user memory | 19 | * Params : str - address of string in user memory |
20 | * Returns : length of string *including terminator* | 20 | * Returns : length of string *including terminator* |
21 | * or zero on exception, or n + 1 if too long | 21 | * or zero on exception, or n + 1 if too long |
22 | */ | 22 | */ |
23 | ENTRY(__arch_strnlen_user) | 23 | ENTRY(__strnlen_user) |
24 | mov r2, r0 | 24 | mov r2, r0 |
25 | 1: | 25 | 1: |
26 | USER( ldrbt r3, [r0], #1) | 26 | USER( ldrbt r3, [r0], #1) |
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S index 1f1545d737be..b48bd6d5fd83 100644 --- a/arch/arm/lib/uaccess.S +++ b/arch/arm/lib/uaccess.S | |||
@@ -19,7 +19,7 @@ | |||
19 | 19 | ||
20 | #define PAGE_SHIFT 12 | 20 | #define PAGE_SHIFT 12 |
21 | 21 | ||
22 | /* Prototype: int __arch_copy_to_user(void *to, const char *from, size_t n) | 22 | /* Prototype: int __copy_to_user(void *to, const char *from, size_t n) |
23 | * Purpose : copy a block to user memory from kernel memory | 23 | * Purpose : copy a block to user memory from kernel memory |
24 | * Params : to - user memory | 24 | * Params : to - user memory |
25 | * : from - kernel memory | 25 | * : from - kernel memory |
@@ -39,7 +39,7 @@ USER( strgtbt r3, [r0], #1) @ May fault | |||
39 | sub r2, r2, ip | 39 | sub r2, r2, ip |
40 | b .Lc2u_dest_aligned | 40 | b .Lc2u_dest_aligned |
41 | 41 | ||
42 | ENTRY(__arch_copy_to_user) | 42 | ENTRY(__copy_to_user) |
43 | stmfd sp!, {r2, r4 - r7, lr} | 43 | stmfd sp!, {r2, r4 - r7, lr} |
44 | cmp r2, #4 | 44 | cmp r2, #4 |
45 | blt .Lc2u_not_enough | 45 | blt .Lc2u_not_enough |
@@ -283,7 +283,7 @@ USER( strgtbt r3, [r0], #1) @ May fault | |||
283 | 9001: ldmfd sp!, {r0, r4 - r7, pc} | 283 | 9001: ldmfd sp!, {r0, r4 - r7, pc} |
284 | .previous | 284 | .previous |
285 | 285 | ||
286 | /* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n); | 286 | /* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n); |
287 | * Purpose : copy a block from user memory to kernel memory | 287 | * Purpose : copy a block from user memory to kernel memory |
288 | * Params : to - kernel memory | 288 | * Params : to - kernel memory |
289 | * : from - user memory | 289 | * : from - user memory |
@@ -302,7 +302,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault | |||
302 | sub r2, r2, ip | 302 | sub r2, r2, ip |
303 | b .Lcfu_dest_aligned | 303 | b .Lcfu_dest_aligned |
304 | 304 | ||
305 | ENTRY(__arch_copy_from_user) | 305 | ENTRY(__copy_from_user) |
306 | stmfd sp!, {r0, r2, r4 - r7, lr} | 306 | stmfd sp!, {r0, r2, r4 - r7, lr} |
307 | cmp r2, #4 | 307 | cmp r2, #4 |
308 | blt .Lcfu_not_enough | 308 | blt .Lcfu_not_enough |
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig index cec5a21ca4e3..e15e4c54a253 100644 --- a/arch/arm/mach-ep93xx/Kconfig +++ b/arch/arm/mach-ep93xx/Kconfig | |||
@@ -2,8 +2,19 @@ if ARCH_EP93XX | |||
2 | 2 | ||
3 | menu "Cirrus EP93xx Implementation Options" | 3 | menu "Cirrus EP93xx Implementation Options" |
4 | 4 | ||
5 | config CRUNCH | ||
6 | bool "Support for MaverickCrunch" | ||
7 | help | ||
8 | Enable kernel support for MaverickCrunch. | ||
9 | |||
5 | comment "EP93xx Platforms" | 10 | comment "EP93xx Platforms" |
6 | 11 | ||
12 | config MACH_EDB9315 | ||
13 | bool "Support Cirrus Logic EDB9315" | ||
14 | help | ||
15 | Say 'Y' here if you want your kernel to support the Cirrus | ||
16 | Logic EDB9315 Evaluation Board. | ||
17 | |||
7 | config MACH_GESBC9312 | 18 | config MACH_GESBC9312 |
8 | bool "Support Glomation GESBC-9312-sx" | 19 | bool "Support Glomation GESBC-9312-sx" |
9 | help | 20 | help |
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile index 05a48a21038e..dfa7e2e8a18b 100644 --- a/arch/arm/mach-ep93xx/Makefile +++ b/arch/arm/mach-ep93xx/Makefile | |||
@@ -6,5 +6,6 @@ obj-m := | |||
6 | obj-n := | 6 | obj-n := |
7 | obj- := | 7 | obj- := |
8 | 8 | ||
9 | obj-$(CONFIG_MACH_EDB9315) += edb9315.o | ||
9 | obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o | 10 | obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o |
10 | obj-$(CONFIG_MACH_TS72XX) += ts72xx.o | 11 | obj-$(CONFIG_MACH_TS72XX) += ts72xx.o |
diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c new file mode 100644 index 000000000000..ef7482faad81 --- /dev/null +++ b/arch/arm/mach-ep93xx/edb9315.c | |||
@@ -0,0 +1,62 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/edb9315.c | ||
3 | * Cirrus Logic EDB9315 support. | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or (at | ||
10 | * your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/config.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/sched.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/ioport.h> | ||
20 | #include <linux/mtd/physmap.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <asm/io.h> | ||
23 | #include <asm/hardware.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | #include <asm/mach/arch.h> | ||
26 | |||
27 | static struct physmap_flash_data edb9315_flash_data = { | ||
28 | .width = 4, | ||
29 | }; | ||
30 | |||
31 | static struct resource edb9315_flash_resource = { | ||
32 | .start = 0x60000000, | ||
33 | .end = 0x61ffffff, | ||
34 | .flags = IORESOURCE_MEM, | ||
35 | }; | ||
36 | |||
37 | static struct platform_device edb9315_flash = { | ||
38 | .name = "physmap-flash", | ||
39 | .id = 0, | ||
40 | .dev = { | ||
41 | .platform_data = &edb9315_flash_data, | ||
42 | }, | ||
43 | .num_resources = 1, | ||
44 | .resource = &edb9315_flash_resource, | ||
45 | }; | ||
46 | |||
47 | static void __init edb9315_init_machine(void) | ||
48 | { | ||
49 | ep93xx_init_devices(); | ||
50 | platform_device_register(&edb9315_flash); | ||
51 | } | ||
52 | |||
53 | MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board") | ||
54 | /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */ | ||
55 | .phys_io = EP93XX_APB_PHYS_BASE, | ||
56 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | ||
57 | .boot_params = 0x00000100, | ||
58 | .map_io = ep93xx_map_io, | ||
59 | .init_irq = ep93xx_init_irq, | ||
60 | .timer = &ep93xx_timer, | ||
61 | .init_machine = edb9315_init_machine, | ||
62 | MACHINE_END | ||
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c index 47cc6c8b7c79..2c28d66d260e 100644 --- a/arch/arm/mach-ep93xx/gesbc9312.c +++ b/arch/arm/mach-ep93xx/gesbc9312.c | |||
@@ -30,7 +30,7 @@ static struct physmap_flash_data gesbc9312_flash_data = { | |||
30 | 30 | ||
31 | static struct resource gesbc9312_flash_resource = { | 31 | static struct resource gesbc9312_flash_resource = { |
32 | .start = 0x60000000, | 32 | .start = 0x60000000, |
33 | .end = 0x60800000, | 33 | .end = 0x607fffff, |
34 | .flags = IORESOURCE_MEM, | 34 | .flags = IORESOURCE_MEM, |
35 | }; | 35 | }; |
36 | 36 | ||
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c index 6e5a56cd5ae8..0b3b875b1875 100644 --- a/arch/arm/mach-ep93xx/ts72xx.c +++ b/arch/arm/mach-ep93xx/ts72xx.c | |||
@@ -118,7 +118,7 @@ static struct physmap_flash_data ts72xx_flash_data = { | |||
118 | 118 | ||
119 | static struct resource ts72xx_flash_resource = { | 119 | static struct resource ts72xx_flash_resource = { |
120 | .start = TS72XX_NOR_PHYS_BASE, | 120 | .start = TS72XX_NOR_PHYS_BASE, |
121 | .end = TS72XX_NOR_PHYS_BASE + 0x01000000, | 121 | .end = TS72XX_NOR_PHYS_BASE + 0x00ffffff, |
122 | .flags = IORESOURCE_MEM, | 122 | .flags = IORESOURCE_MEM, |
123 | }; | 123 | }; |
124 | 124 | ||
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c index dc5e489c70bc..357351fbb1e2 100644 --- a/arch/arm/mach-ixp23xx/espresso.c +++ b/arch/arm/mach-ixp23xx/espresso.c | |||
@@ -59,7 +59,7 @@ static struct physmap_flash_data espresso_flash_data = { | |||
59 | 59 | ||
60 | static struct resource espresso_flash_resource = { | 60 | static struct resource espresso_flash_resource = { |
61 | .start = 0x90000000, | 61 | .start = 0x90000000, |
62 | .end = 0x92000000, | 62 | .end = 0x91ffffff, |
63 | .flags = IORESOURCE_MEM, | 63 | .flags = IORESOURCE_MEM, |
64 | }; | 64 | }; |
65 | 65 | ||
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index 535b334ee045..e0886871cc77 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c | |||
@@ -304,7 +304,7 @@ static struct physmap_flash_data ixdp2351_flash_data = { | |||
304 | 304 | ||
305 | static struct resource ixdp2351_flash_resource = { | 305 | static struct resource ixdp2351_flash_resource = { |
306 | .start = 0x90000000, | 306 | .start = 0x90000000, |
307 | .end = 0x94000000, | 307 | .end = 0x93ffffff, |
308 | .flags = IORESOURCE_MEM, | 308 | .flags = IORESOURCE_MEM, |
309 | }; | 309 | }; |
310 | 310 | ||
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index b9f5d13fcfe1..92ad18f41251 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c | |||
@@ -143,7 +143,7 @@ static struct physmap_flash_data roadrunner_flash_data = { | |||
143 | 143 | ||
144 | static struct resource roadrunner_flash_resource = { | 144 | static struct resource roadrunner_flash_resource = { |
145 | .start = 0x90000000, | 145 | .start = 0x90000000, |
146 | .end = 0x94000000, | 146 | .end = 0x93ffffff, |
147 | .flags = IORESOURCE_MEM, | 147 | .flags = IORESOURCE_MEM, |
148 | }; | 148 | }; |
149 | 149 | ||
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 539b596005fc..d9635ff4b10c 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -88,8 +88,8 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | |||
88 | 88 | ||
89 | if (type == IRQT_PROBE) { | 89 | if (type == IRQT_PROBE) { |
90 | /* Don't mess with enabled GPIOs using preconfigured edges or | 90 | /* Don't mess with enabled GPIOs using preconfigured edges or |
91 | GPIOs set to alternate function during probe */ | 91 | GPIOs set to alternate function or to output during probe */ |
92 | if ((GPIO_IRQ_rising_edge[idx] | GPIO_IRQ_falling_edge[idx]) & | 92 | if ((GPIO_IRQ_rising_edge[idx] | GPIO_IRQ_falling_edge[idx] | GPDR(gpio)) & |
93 | GPIO_bit(gpio)) | 93 | GPIO_bit(gpio)) |
94 | return 0; | 94 | return 0; |
95 | if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2))) | 95 | if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2))) |
diff --git a/arch/arm/mach-s3c2410/s3c244x.c b/arch/arm/mach-s3c2410/s3c244x.c index 838bc525e836..9a2258270de9 100644 --- a/arch/arm/mach-s3c2410/s3c244x.c +++ b/arch/arm/mach-s3c2410/s3c244x.c | |||
@@ -69,6 +69,7 @@ void __init s3c244x_map_io(struct map_desc *mach_desc, int size) | |||
69 | 69 | ||
70 | s3c_device_i2c.name = "s3c2440-i2c"; | 70 | s3c_device_i2c.name = "s3c2440-i2c"; |
71 | s3c_device_nand.name = "s3c2440-nand"; | 71 | s3c_device_nand.name = "s3c2440-nand"; |
72 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; | ||
72 | } | 73 | } |
73 | 74 | ||
74 | void __init s3c244x_init_clocks(int xtal) | 75 | void __init s3c244x_init_clocks(int xtal) |
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index ecf5e232a6fc..c4bca753165b 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -15,8 +15,8 @@ config CPU_ARM610 | |||
15 | select CPU_32v3 | 15 | select CPU_32v3 |
16 | select CPU_CACHE_V3 | 16 | select CPU_CACHE_V3 |
17 | select CPU_CACHE_VIVT | 17 | select CPU_CACHE_VIVT |
18 | select CPU_COPY_V3 | 18 | select CPU_COPY_V3 if MMU |
19 | select CPU_TLB_V3 | 19 | select CPU_TLB_V3 if MMU |
20 | help | 20 | help |
21 | The ARM610 is the successor to the ARM3 processor | 21 | The ARM610 is the successor to the ARM3 processor |
22 | and was produced by VLSI Technology Inc. | 22 | and was produced by VLSI Technology Inc. |
@@ -31,8 +31,8 @@ config CPU_ARM710 | |||
31 | select CPU_32v3 | 31 | select CPU_32v3 |
32 | select CPU_CACHE_V3 | 32 | select CPU_CACHE_V3 |
33 | select CPU_CACHE_VIVT | 33 | select CPU_CACHE_VIVT |
34 | select CPU_COPY_V3 | 34 | select CPU_COPY_V3 if MMU |
35 | select CPU_TLB_V3 | 35 | select CPU_TLB_V3 if MMU |
36 | help | 36 | help |
37 | A 32-bit RISC microprocessor based on the ARM7 processor core | 37 | A 32-bit RISC microprocessor based on the ARM7 processor core |
38 | designed by Advanced RISC Machines Ltd. The ARM710 is the | 38 | designed by Advanced RISC Machines Ltd. The ARM710 is the |
@@ -50,8 +50,8 @@ config CPU_ARM720T | |||
50 | select CPU_ABRT_LV4T | 50 | select CPU_ABRT_LV4T |
51 | select CPU_CACHE_V4 | 51 | select CPU_CACHE_V4 |
52 | select CPU_CACHE_VIVT | 52 | select CPU_CACHE_VIVT |
53 | select CPU_COPY_V4WT | 53 | select CPU_COPY_V4WT if MMU |
54 | select CPU_TLB_V4WT | 54 | select CPU_TLB_V4WT if MMU |
55 | help | 55 | help |
56 | A 32-bit RISC processor with 8kByte Cache, Write Buffer and | 56 | A 32-bit RISC processor with 8kByte Cache, Write Buffer and |
57 | MMU built around an ARM7TDMI core. | 57 | MMU built around an ARM7TDMI core. |
@@ -68,8 +68,8 @@ config CPU_ARM920T | |||
68 | select CPU_ABRT_EV4T | 68 | select CPU_ABRT_EV4T |
69 | select CPU_CACHE_V4WT | 69 | select CPU_CACHE_V4WT |
70 | select CPU_CACHE_VIVT | 70 | select CPU_CACHE_VIVT |
71 | select CPU_COPY_V4WB | 71 | select CPU_COPY_V4WB if MMU |
72 | select CPU_TLB_V4WBI | 72 | select CPU_TLB_V4WBI if MMU |
73 | help | 73 | help |
74 | The ARM920T is licensed to be produced by numerous vendors, | 74 | The ARM920T is licensed to be produced by numerous vendors, |
75 | and is used in the Maverick EP9312 and the Samsung S3C2410. | 75 | and is used in the Maverick EP9312 and the Samsung S3C2410. |
@@ -89,8 +89,8 @@ config CPU_ARM922T | |||
89 | select CPU_ABRT_EV4T | 89 | select CPU_ABRT_EV4T |
90 | select CPU_CACHE_V4WT | 90 | select CPU_CACHE_V4WT |
91 | select CPU_CACHE_VIVT | 91 | select CPU_CACHE_VIVT |
92 | select CPU_COPY_V4WB | 92 | select CPU_COPY_V4WB if MMU |
93 | select CPU_TLB_V4WBI | 93 | select CPU_TLB_V4WBI if MMU |
94 | help | 94 | help |
95 | The ARM922T is a version of the ARM920T, but with smaller | 95 | The ARM922T is a version of the ARM920T, but with smaller |
96 | instruction and data caches. It is used in Altera's | 96 | instruction and data caches. It is used in Altera's |
@@ -108,8 +108,8 @@ config CPU_ARM925T | |||
108 | select CPU_ABRT_EV4T | 108 | select CPU_ABRT_EV4T |
109 | select CPU_CACHE_V4WT | 109 | select CPU_CACHE_V4WT |
110 | select CPU_CACHE_VIVT | 110 | select CPU_CACHE_VIVT |
111 | select CPU_COPY_V4WB | 111 | select CPU_COPY_V4WB if MMU |
112 | select CPU_TLB_V4WBI | 112 | select CPU_TLB_V4WBI if MMU |
113 | help | 113 | help |
114 | The ARM925T is a mix between the ARM920T and ARM926T, but with | 114 | The ARM925T is a mix between the ARM920T and ARM926T, but with |
115 | different instruction and data caches. It is used in TI's OMAP | 115 | different instruction and data caches. It is used in TI's OMAP |
@@ -126,8 +126,8 @@ config CPU_ARM926T | |||
126 | select CPU_32v5 | 126 | select CPU_32v5 |
127 | select CPU_ABRT_EV5TJ | 127 | select CPU_ABRT_EV5TJ |
128 | select CPU_CACHE_VIVT | 128 | select CPU_CACHE_VIVT |
129 | select CPU_COPY_V4WB | 129 | select CPU_COPY_V4WB if MMU |
130 | select CPU_TLB_V4WBI | 130 | select CPU_TLB_V4WBI if MMU |
131 | help | 131 | help |
132 | This is a variant of the ARM920. It has slightly different | 132 | This is a variant of the ARM920. It has slightly different |
133 | instruction sequences for cache and TLB operations. Curiously, | 133 | instruction sequences for cache and TLB operations. Curiously, |
@@ -144,8 +144,8 @@ config CPU_ARM1020 | |||
144 | select CPU_ABRT_EV4T | 144 | select CPU_ABRT_EV4T |
145 | select CPU_CACHE_V4WT | 145 | select CPU_CACHE_V4WT |
146 | select CPU_CACHE_VIVT | 146 | select CPU_CACHE_VIVT |
147 | select CPU_COPY_V4WB | 147 | select CPU_COPY_V4WB if MMU |
148 | select CPU_TLB_V4WBI | 148 | select CPU_TLB_V4WBI if MMU |
149 | help | 149 | help |
150 | The ARM1020 is the 32K cached version of the ARM10 processor, | 150 | The ARM1020 is the 32K cached version of the ARM10 processor, |
151 | with an addition of a floating-point unit. | 151 | with an addition of a floating-point unit. |
@@ -161,8 +161,8 @@ config CPU_ARM1020E | |||
161 | select CPU_ABRT_EV4T | 161 | select CPU_ABRT_EV4T |
162 | select CPU_CACHE_V4WT | 162 | select CPU_CACHE_V4WT |
163 | select CPU_CACHE_VIVT | 163 | select CPU_CACHE_VIVT |
164 | select CPU_COPY_V4WB | 164 | select CPU_COPY_V4WB if MMU |
165 | select CPU_TLB_V4WBI | 165 | select CPU_TLB_V4WBI if MMU |
166 | depends on n | 166 | depends on n |
167 | 167 | ||
168 | # ARM1022E | 168 | # ARM1022E |
@@ -172,8 +172,8 @@ config CPU_ARM1022 | |||
172 | select CPU_32v5 | 172 | select CPU_32v5 |
173 | select CPU_ABRT_EV4T | 173 | select CPU_ABRT_EV4T |
174 | select CPU_CACHE_VIVT | 174 | select CPU_CACHE_VIVT |
175 | select CPU_COPY_V4WB # can probably do better | 175 | select CPU_COPY_V4WB if MMU # can probably do better |
176 | select CPU_TLB_V4WBI | 176 | select CPU_TLB_V4WBI if MMU |
177 | help | 177 | help |
178 | The ARM1022E is an implementation of the ARMv5TE architecture | 178 | The ARM1022E is an implementation of the ARMv5TE architecture |
179 | based upon the ARM10 integer core with a 16KiB L1 Harvard cache, | 179 | based upon the ARM10 integer core with a 16KiB L1 Harvard cache, |
@@ -189,8 +189,8 @@ config CPU_ARM1026 | |||
189 | select CPU_32v5 | 189 | select CPU_32v5 |
190 | select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 | 190 | select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 |
191 | select CPU_CACHE_VIVT | 191 | select CPU_CACHE_VIVT |
192 | select CPU_COPY_V4WB # can probably do better | 192 | select CPU_COPY_V4WB if MMU # can probably do better |
193 | select CPU_TLB_V4WBI | 193 | select CPU_TLB_V4WBI if MMU |
194 | help | 194 | help |
195 | The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture | 195 | The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture |
196 | based upon the ARM10 integer core. | 196 | based upon the ARM10 integer core. |
@@ -207,8 +207,8 @@ config CPU_SA110 | |||
207 | select CPU_ABRT_EV4 | 207 | select CPU_ABRT_EV4 |
208 | select CPU_CACHE_V4WB | 208 | select CPU_CACHE_V4WB |
209 | select CPU_CACHE_VIVT | 209 | select CPU_CACHE_VIVT |
210 | select CPU_COPY_V4WB | 210 | select CPU_COPY_V4WB if MMU |
211 | select CPU_TLB_V4WB | 211 | select CPU_TLB_V4WB if MMU |
212 | help | 212 | help |
213 | The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and | 213 | The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and |
214 | is available at five speeds ranging from 100 MHz to 233 MHz. | 214 | is available at five speeds ranging from 100 MHz to 233 MHz. |
@@ -227,7 +227,7 @@ config CPU_SA1100 | |||
227 | select CPU_ABRT_EV4 | 227 | select CPU_ABRT_EV4 |
228 | select CPU_CACHE_V4WB | 228 | select CPU_CACHE_V4WB |
229 | select CPU_CACHE_VIVT | 229 | select CPU_CACHE_VIVT |
230 | select CPU_TLB_V4WB | 230 | select CPU_TLB_V4WB if MMU |
231 | 231 | ||
232 | # XScale | 232 | # XScale |
233 | config CPU_XSCALE | 233 | config CPU_XSCALE |
@@ -237,7 +237,7 @@ config CPU_XSCALE | |||
237 | select CPU_32v5 | 237 | select CPU_32v5 |
238 | select CPU_ABRT_EV5T | 238 | select CPU_ABRT_EV5T |
239 | select CPU_CACHE_VIVT | 239 | select CPU_CACHE_VIVT |
240 | select CPU_TLB_V4WBI | 240 | select CPU_TLB_V4WBI if MMU |
241 | 241 | ||
242 | # XScale Core Version 3 | 242 | # XScale Core Version 3 |
243 | config CPU_XSC3 | 243 | config CPU_XSC3 |
@@ -247,7 +247,7 @@ config CPU_XSC3 | |||
247 | select CPU_32v5 | 247 | select CPU_32v5 |
248 | select CPU_ABRT_EV5T | 248 | select CPU_ABRT_EV5T |
249 | select CPU_CACHE_VIVT | 249 | select CPU_CACHE_VIVT |
250 | select CPU_TLB_V4WBI | 250 | select CPU_TLB_V4WBI if MMU |
251 | select IO_36 | 251 | select IO_36 |
252 | 252 | ||
253 | # ARMv6 | 253 | # ARMv6 |
@@ -258,8 +258,8 @@ config CPU_V6 | |||
258 | select CPU_ABRT_EV6 | 258 | select CPU_ABRT_EV6 |
259 | select CPU_CACHE_V6 | 259 | select CPU_CACHE_V6 |
260 | select CPU_CACHE_VIPT | 260 | select CPU_CACHE_VIPT |
261 | select CPU_COPY_V6 | 261 | select CPU_COPY_V6 if MMU |
262 | select CPU_TLB_V6 | 262 | select CPU_TLB_V6 if MMU |
263 | 263 | ||
264 | # ARMv6k | 264 | # ARMv6k |
265 | config CPU_32v6K | 265 | config CPU_32v6K |
@@ -277,17 +277,17 @@ config CPU_32v6K | |||
277 | # This defines the compiler instruction set which depends on the machine type. | 277 | # This defines the compiler instruction set which depends on the machine type. |
278 | config CPU_32v3 | 278 | config CPU_32v3 |
279 | bool | 279 | bool |
280 | select TLS_REG_EMUL if SMP | 280 | select TLS_REG_EMUL if SMP || !MMU |
281 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP | 281 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP |
282 | 282 | ||
283 | config CPU_32v4 | 283 | config CPU_32v4 |
284 | bool | 284 | bool |
285 | select TLS_REG_EMUL if SMP | 285 | select TLS_REG_EMUL if SMP || !MMU |
286 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP | 286 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP |
287 | 287 | ||
288 | config CPU_32v5 | 288 | config CPU_32v5 |
289 | bool | 289 | bool |
290 | select TLS_REG_EMUL if SMP | 290 | select TLS_REG_EMUL if SMP || !MMU |
291 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP | 291 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP |
292 | 292 | ||
293 | config CPU_32v6 | 293 | config CPU_32v6 |
@@ -334,6 +334,7 @@ config CPU_CACHE_VIVT | |||
334 | config CPU_CACHE_VIPT | 334 | config CPU_CACHE_VIPT |
335 | bool | 335 | bool |
336 | 336 | ||
337 | if MMU | ||
337 | # The copy-page model | 338 | # The copy-page model |
338 | config CPU_COPY_V3 | 339 | config CPU_COPY_V3 |
339 | bool | 340 | bool |
@@ -372,6 +373,8 @@ config CPU_TLB_V4WBI | |||
372 | config CPU_TLB_V6 | 373 | config CPU_TLB_V6 |
373 | bool | 374 | bool |
374 | 375 | ||
376 | endif | ||
377 | |||
375 | # | 378 | # |
376 | # CPU supports 36-bit I/O | 379 | # CPU supports 36-bit I/O |
377 | # | 380 | # |
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 07a538505784..21a2770226ee 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile | |||
@@ -2,10 +2,16 @@ | |||
2 | # Makefile for the linux arm-specific parts of the memory manager. | 2 | # Makefile for the linux arm-specific parts of the memory manager. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := consistent.o extable.o fault-armv.o \ | 5 | obj-y := consistent.o extable.o fault.o init.o \ |
6 | fault.o flush.o init.o ioremap.o mmap.o \ | 6 | iomap.o |
7 | |||
8 | obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \ | ||
7 | mm-armv.o | 9 | mm-armv.o |
8 | 10 | ||
11 | ifneq ($(CONFIG_MMU),y) | ||
12 | obj-y += nommu.o | ||
13 | endif | ||
14 | |||
9 | obj-$(CONFIG_MODULES) += proc-syms.o | 15 | obj-$(CONFIG_MODULES) += proc-syms.o |
10 | 16 | ||
11 | obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o | 17 | obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 9ea1f87a7079..989fd681c822 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -26,8 +26,6 @@ | |||
26 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
28 | 28 | ||
29 | #define TABLE_SIZE (2 * PTRS_PER_PTE * sizeof(pte_t)) | ||
30 | |||
31 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | 29 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); |
32 | 30 | ||
33 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; | 31 | extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; |
diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c new file mode 100644 index 000000000000..62066f3020c8 --- /dev/null +++ b/arch/arm/mm/iomap.c | |||
@@ -0,0 +1,55 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mm/iomap.c | ||
3 | * | ||
4 | * Map IO port and PCI memory spaces so that {read,write}[bwl] can | ||
5 | * be used to access this memory. | ||
6 | */ | ||
7 | #include <linux/module.h> | ||
8 | #include <linux/pci.h> | ||
9 | #include <linux/ioport.h> | ||
10 | |||
11 | #include <asm/io.h> | ||
12 | |||
13 | #ifdef __io | ||
14 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
15 | { | ||
16 | return __io(port); | ||
17 | } | ||
18 | EXPORT_SYMBOL(ioport_map); | ||
19 | |||
20 | void ioport_unmap(void __iomem *addr) | ||
21 | { | ||
22 | } | ||
23 | EXPORT_SYMBOL(ioport_unmap); | ||
24 | #endif | ||
25 | |||
26 | #ifdef CONFIG_PCI | ||
27 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) | ||
28 | { | ||
29 | unsigned long start = pci_resource_start(dev, bar); | ||
30 | unsigned long len = pci_resource_len(dev, bar); | ||
31 | unsigned long flags = pci_resource_flags(dev, bar); | ||
32 | |||
33 | if (!len || !start) | ||
34 | return NULL; | ||
35 | if (maxlen && len > maxlen) | ||
36 | len = maxlen; | ||
37 | if (flags & IORESOURCE_IO) | ||
38 | return ioport_map(start, len); | ||
39 | if (flags & IORESOURCE_MEM) { | ||
40 | if (flags & IORESOURCE_CACHEABLE) | ||
41 | return ioremap(start, len); | ||
42 | return ioremap_nocache(start, len); | ||
43 | } | ||
44 | return NULL; | ||
45 | } | ||
46 | EXPORT_SYMBOL(pci_iomap); | ||
47 | |||
48 | void pci_iounmap(struct pci_dev *dev, void __iomem *addr) | ||
49 | { | ||
50 | if ((unsigned long)addr >= VMALLOC_START && | ||
51 | (unsigned long)addr < VMALLOC_END) | ||
52 | iounmap(addr); | ||
53 | } | ||
54 | EXPORT_SYMBOL(pci_iounmap); | ||
55 | #endif | ||
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index c1f7180c7bed..7691cfdba567 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
@@ -176,50 +176,3 @@ void __iounmap(void __iomem *addr) | |||
176 | vunmap((void *)(PAGE_MASK & (unsigned long)addr)); | 176 | vunmap((void *)(PAGE_MASK & (unsigned long)addr)); |
177 | } | 177 | } |
178 | EXPORT_SYMBOL(__iounmap); | 178 | EXPORT_SYMBOL(__iounmap); |
179 | |||
180 | #ifdef __io | ||
181 | void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
182 | { | ||
183 | return __io(port); | ||
184 | } | ||
185 | EXPORT_SYMBOL(ioport_map); | ||
186 | |||
187 | void ioport_unmap(void __iomem *addr) | ||
188 | { | ||
189 | } | ||
190 | EXPORT_SYMBOL(ioport_unmap); | ||
191 | #endif | ||
192 | |||
193 | #ifdef CONFIG_PCI | ||
194 | #include <linux/pci.h> | ||
195 | #include <linux/ioport.h> | ||
196 | |||
197 | void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) | ||
198 | { | ||
199 | unsigned long start = pci_resource_start(dev, bar); | ||
200 | unsigned long len = pci_resource_len(dev, bar); | ||
201 | unsigned long flags = pci_resource_flags(dev, bar); | ||
202 | |||
203 | if (!len || !start) | ||
204 | return NULL; | ||
205 | if (maxlen && len > maxlen) | ||
206 | len = maxlen; | ||
207 | if (flags & IORESOURCE_IO) | ||
208 | return ioport_map(start, len); | ||
209 | if (flags & IORESOURCE_MEM) { | ||
210 | if (flags & IORESOURCE_CACHEABLE) | ||
211 | return ioremap(start, len); | ||
212 | return ioremap_nocache(start, len); | ||
213 | } | ||
214 | return NULL; | ||
215 | } | ||
216 | EXPORT_SYMBOL(pci_iomap); | ||
217 | |||
218 | void pci_iounmap(struct pci_dev *dev, void __iomem *addr) | ||
219 | { | ||
220 | if ((unsigned long)addr >= VMALLOC_START && | ||
221 | (unsigned long)addr < VMALLOC_END) | ||
222 | iounmap(addr); | ||
223 | } | ||
224 | EXPORT_SYMBOL(pci_iounmap); | ||
225 | #endif | ||
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c new file mode 100644 index 000000000000..1464ed817b5d --- /dev/null +++ b/arch/arm/mm/nommu.c | |||
@@ -0,0 +1,39 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mm/nommu.c | ||
3 | * | ||
4 | * ARM uCLinux supporting functions. | ||
5 | */ | ||
6 | #include <linux/module.h> | ||
7 | #include <linux/mm.h> | ||
8 | #include <linux/pagemap.h> | ||
9 | |||
10 | #include <asm/cacheflush.h> | ||
11 | #include <asm/io.h> | ||
12 | #include <asm/page.h> | ||
13 | |||
14 | void flush_dcache_page(struct page *page) | ||
15 | { | ||
16 | __cpuc_flush_dcache_page(page_address(page)); | ||
17 | } | ||
18 | EXPORT_SYMBOL(flush_dcache_page); | ||
19 | |||
20 | void __iomem *__ioremap_pfn(unsigned long pfn, unsigned long offset, | ||
21 | size_t size, unsigned long flags) | ||
22 | { | ||
23 | if (pfn >= (0x100000000ULL >> PAGE_SHIFT)) | ||
24 | return NULL; | ||
25 | return (void __iomem *) (offset + (pfn << PAGE_SHIFT)); | ||
26 | } | ||
27 | EXPORT_SYMBOL(__ioremap_pfn); | ||
28 | |||
29 | void __iomem *__ioremap(unsigned long phys_addr, size_t size, | ||
30 | unsigned long flags) | ||
31 | { | ||
32 | return (void __iomem *)phys_addr; | ||
33 | } | ||
34 | EXPORT_SYMBOL(__ioremap); | ||
35 | |||
36 | void __iounmap(void __iomem *addr) | ||
37 | { | ||
38 | } | ||
39 | EXPORT_SYMBOL(__iounmap); | ||
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 959588884fa5..b9abbafca812 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2000 ARM Limited | 4 | * Copyright (C) 2000 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. |
6 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -101,7 +102,9 @@ ENTRY(cpu_arm1020_reset) | |||
101 | mov ip, #0 | 102 | mov ip, #0 |
102 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 103 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
103 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 104 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
105 | #ifdef CONFIG_MMU | ||
104 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 106 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
107 | #endif | ||
105 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 108 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
106 | bic ip, ip, #0x000f @ ............wcam | 109 | bic ip, ip, #0x000f @ ............wcam |
107 | bic ip, ip, #0x1100 @ ...i...s........ | 110 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -359,6 +362,7 @@ ENTRY(cpu_arm1020_dcache_clean_area) | |||
359 | */ | 362 | */ |
360 | .align 5 | 363 | .align 5 |
361 | ENTRY(cpu_arm1020_switch_mm) | 364 | ENTRY(cpu_arm1020_switch_mm) |
365 | #ifdef CONFIG_MMU | ||
362 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 366 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
363 | mcr p15, 0, r3, c7, c10, 4 | 367 | mcr p15, 0, r3, c7, c10, 4 |
364 | mov r1, #0xF @ 16 segments | 368 | mov r1, #0xF @ 16 segments |
@@ -383,6 +387,7 @@ ENTRY(cpu_arm1020_switch_mm) | |||
383 | mcr p15, 0, r1, c7, c10, 4 @ drain WB | 387 | mcr p15, 0, r1, c7, c10, 4 @ drain WB |
384 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 388 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
385 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs | 389 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs |
390 | #endif /* CONFIG_MMU */ | ||
386 | mov pc, lr | 391 | mov pc, lr |
387 | 392 | ||
388 | /* | 393 | /* |
@@ -392,6 +397,7 @@ ENTRY(cpu_arm1020_switch_mm) | |||
392 | */ | 397 | */ |
393 | .align 5 | 398 | .align 5 |
394 | ENTRY(cpu_arm1020_set_pte) | 399 | ENTRY(cpu_arm1020_set_pte) |
400 | #ifdef CONFIG_MMU | ||
395 | str r1, [r0], #-2048 @ linux version | 401 | str r1, [r0], #-2048 @ linux version |
396 | 402 | ||
397 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 403 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -421,6 +427,7 @@ ENTRY(cpu_arm1020_set_pte) | |||
421 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 427 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
422 | #endif | 428 | #endif |
423 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 429 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
430 | #endif /* CONFIG_MMU */ | ||
424 | mov pc, lr | 431 | mov pc, lr |
425 | 432 | ||
426 | __INIT | 433 | __INIT |
@@ -430,7 +437,9 @@ __arm1020_setup: | |||
430 | mov r0, #0 | 437 | mov r0, #0 |
431 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 438 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
432 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 439 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
440 | #ifdef CONFIG_MMU | ||
433 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 441 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
442 | #endif | ||
434 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 443 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
435 | ldr r5, arm1020_cr1_clear | 444 | ldr r5, arm1020_cr1_clear |
436 | bic r0, r0, r5 | 445 | bic r0, r0, r5 |
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index be6d081ff2b7..bcd5ee022e00 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2000 ARM Limited | 4 | * Copyright (C) 2000 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. |
6 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -101,7 +102,9 @@ ENTRY(cpu_arm1020e_reset) | |||
101 | mov ip, #0 | 102 | mov ip, #0 |
102 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 103 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
103 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 104 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
105 | #ifdef CONFIG_MMU | ||
104 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 106 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
107 | #endif | ||
105 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 108 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
106 | bic ip, ip, #0x000f @ ............wcam | 109 | bic ip, ip, #0x000f @ ............wcam |
107 | bic ip, ip, #0x1100 @ ...i...s........ | 110 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -344,6 +347,7 @@ ENTRY(cpu_arm1020e_dcache_clean_area) | |||
344 | */ | 347 | */ |
345 | .align 5 | 348 | .align 5 |
346 | ENTRY(cpu_arm1020e_switch_mm) | 349 | ENTRY(cpu_arm1020e_switch_mm) |
350 | #ifdef CONFIG_MMU | ||
347 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 351 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
348 | mcr p15, 0, r3, c7, c10, 4 | 352 | mcr p15, 0, r3, c7, c10, 4 |
349 | mov r1, #0xF @ 16 segments | 353 | mov r1, #0xF @ 16 segments |
@@ -367,6 +371,7 @@ ENTRY(cpu_arm1020e_switch_mm) | |||
367 | mcr p15, 0, r1, c7, c10, 4 @ drain WB | 371 | mcr p15, 0, r1, c7, c10, 4 @ drain WB |
368 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 372 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
369 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs | 373 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs |
374 | #endif | ||
370 | mov pc, lr | 375 | mov pc, lr |
371 | 376 | ||
372 | /* | 377 | /* |
@@ -376,6 +381,7 @@ ENTRY(cpu_arm1020e_switch_mm) | |||
376 | */ | 381 | */ |
377 | .align 5 | 382 | .align 5 |
378 | ENTRY(cpu_arm1020e_set_pte) | 383 | ENTRY(cpu_arm1020e_set_pte) |
384 | #ifdef CONFIG_MMU | ||
379 | str r1, [r0], #-2048 @ linux version | 385 | str r1, [r0], #-2048 @ linux version |
380 | 386 | ||
381 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 387 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -403,6 +409,7 @@ ENTRY(cpu_arm1020e_set_pte) | |||
403 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 409 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
404 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 410 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
405 | #endif | 411 | #endif |
412 | #endif /* CONFIG_MMU */ | ||
406 | mov pc, lr | 413 | mov pc, lr |
407 | 414 | ||
408 | __INIT | 415 | __INIT |
@@ -412,7 +419,9 @@ __arm1020e_setup: | |||
412 | mov r0, #0 | 419 | mov r0, #0 |
413 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 420 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
414 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 421 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
422 | #ifdef CONFIG_MMU | ||
415 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 423 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
424 | #endif | ||
416 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 425 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
417 | ldr r5, arm1020e_cr1_clear | 426 | ldr r5, arm1020e_cr1_clear |
418 | bic r0, r0, r5 | 427 | bic r0, r0, r5 |
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index f778545d57a2..b0ccff4fadd2 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2000 ARM Limited | 4 | * Copyright (C) 2000 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. |
6 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -90,7 +91,9 @@ ENTRY(cpu_arm1022_reset) | |||
90 | mov ip, #0 | 91 | mov ip, #0 |
91 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 92 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
92 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 93 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
94 | #ifdef CONFIG_MMU | ||
93 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 95 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
96 | #endif | ||
94 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 97 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
95 | bic ip, ip, #0x000f @ ............wcam | 98 | bic ip, ip, #0x000f @ ............wcam |
96 | bic ip, ip, #0x1100 @ ...i...s........ | 99 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -333,6 +336,7 @@ ENTRY(cpu_arm1022_dcache_clean_area) | |||
333 | */ | 336 | */ |
334 | .align 5 | 337 | .align 5 |
335 | ENTRY(cpu_arm1022_switch_mm) | 338 | ENTRY(cpu_arm1022_switch_mm) |
339 | #ifdef CONFIG_MMU | ||
336 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 340 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
337 | mov r1, #(CACHE_DSEGMENTS - 1) << 5 @ 16 segments | 341 | mov r1, #(CACHE_DSEGMENTS - 1) << 5 @ 16 segments |
338 | 1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries | 342 | 1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries |
@@ -349,6 +353,7 @@ ENTRY(cpu_arm1022_switch_mm) | |||
349 | mcr p15, 0, r1, c7, c10, 4 @ drain WB | 353 | mcr p15, 0, r1, c7, c10, 4 @ drain WB |
350 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 354 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
351 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs | 355 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs |
356 | #endif | ||
352 | mov pc, lr | 357 | mov pc, lr |
353 | 358 | ||
354 | /* | 359 | /* |
@@ -358,6 +363,7 @@ ENTRY(cpu_arm1022_switch_mm) | |||
358 | */ | 363 | */ |
359 | .align 5 | 364 | .align 5 |
360 | ENTRY(cpu_arm1022_set_pte) | 365 | ENTRY(cpu_arm1022_set_pte) |
366 | #ifdef CONFIG_MMU | ||
361 | str r1, [r0], #-2048 @ linux version | 367 | str r1, [r0], #-2048 @ linux version |
362 | 368 | ||
363 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 369 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -385,6 +391,7 @@ ENTRY(cpu_arm1022_set_pte) | |||
385 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 391 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
386 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 392 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
387 | #endif | 393 | #endif |
394 | #endif /* CONFIG_MMU */ | ||
388 | mov pc, lr | 395 | mov pc, lr |
389 | 396 | ||
390 | __INIT | 397 | __INIT |
@@ -394,7 +401,9 @@ __arm1022_setup: | |||
394 | mov r0, #0 | 401 | mov r0, #0 |
395 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 402 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
396 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 403 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
404 | #ifdef CONFIG_MMU | ||
397 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 405 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
406 | #endif | ||
398 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 407 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
399 | ldr r5, arm1022_cr1_clear | 408 | ldr r5, arm1022_cr1_clear |
400 | bic r0, r0, r5 | 409 | bic r0, r0, r5 |
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 148c111fde73..abe850c9a641 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2000 ARM Limited | 4 | * Copyright (C) 2000 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. |
6 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -90,7 +91,9 @@ ENTRY(cpu_arm1026_reset) | |||
90 | mov ip, #0 | 91 | mov ip, #0 |
91 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 92 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
92 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 93 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
94 | #ifdef CONFIG_MMU | ||
93 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 95 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
96 | #endif | ||
94 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 97 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
95 | bic ip, ip, #0x000f @ ............wcam | 98 | bic ip, ip, #0x000f @ ............wcam |
96 | bic ip, ip, #0x1100 @ ...i...s........ | 99 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -327,6 +330,7 @@ ENTRY(cpu_arm1026_dcache_clean_area) | |||
327 | */ | 330 | */ |
328 | .align 5 | 331 | .align 5 |
329 | ENTRY(cpu_arm1026_switch_mm) | 332 | ENTRY(cpu_arm1026_switch_mm) |
333 | #ifdef CONFIG_MMU | ||
330 | mov r1, #0 | 334 | mov r1, #0 |
331 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 335 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
332 | 1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate | 336 | 1: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate |
@@ -338,6 +342,7 @@ ENTRY(cpu_arm1026_switch_mm) | |||
338 | mcr p15, 0, r1, c7, c10, 4 @ drain WB | 342 | mcr p15, 0, r1, c7, c10, 4 @ drain WB |
339 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 343 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
340 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs | 344 | mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs |
345 | #endif | ||
341 | mov pc, lr | 346 | mov pc, lr |
342 | 347 | ||
343 | /* | 348 | /* |
@@ -347,6 +352,7 @@ ENTRY(cpu_arm1026_switch_mm) | |||
347 | */ | 352 | */ |
348 | .align 5 | 353 | .align 5 |
349 | ENTRY(cpu_arm1026_set_pte) | 354 | ENTRY(cpu_arm1026_set_pte) |
355 | #ifdef CONFIG_MMU | ||
350 | str r1, [r0], #-2048 @ linux version | 356 | str r1, [r0], #-2048 @ linux version |
351 | 357 | ||
352 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 358 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -374,6 +380,7 @@ ENTRY(cpu_arm1026_set_pte) | |||
374 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 380 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
375 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 381 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
376 | #endif | 382 | #endif |
383 | #endif /* CONFIG_MMU */ | ||
377 | mov pc, lr | 384 | mov pc, lr |
378 | 385 | ||
379 | 386 | ||
@@ -384,8 +391,10 @@ __arm1026_setup: | |||
384 | mov r0, #0 | 391 | mov r0, #0 |
385 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 392 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
386 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 393 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
394 | #ifdef CONFIG_MMU | ||
387 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 395 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
388 | mcr p15, 0, r4, c2, c0 @ load page table pointer | 396 | mcr p15, 0, r4, c2, c0 @ load page table pointer |
397 | #endif | ||
389 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | 398 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH |
390 | mov r0, #4 @ explicitly disable writeback | 399 | mov r0, #4 @ explicitly disable writeback |
391 | mcr p15, 7, r0, c15, c0, 0 | 400 | mcr p15, 7, r0, c15, c0, 0 |
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S index 540359b475d0..7a705edfa4b2 100644 --- a/arch/arm/mm/proc-arm6_7.S +++ b/arch/arm/mm/proc-arm6_7.S | |||
@@ -2,6 +2,7 @@ | |||
2 | * linux/arch/arm/mm/proc-arm6,7.S | 2 | * linux/arch/arm/mm/proc-arm6,7.S |
3 | * | 3 | * |
4 | * Copyright (C) 1997-2000 Russell King | 4 | * Copyright (C) 1997-2000 Russell King |
5 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -199,10 +200,12 @@ ENTRY(cpu_arm7_do_idle) | |||
199 | */ | 200 | */ |
200 | ENTRY(cpu_arm6_switch_mm) | 201 | ENTRY(cpu_arm6_switch_mm) |
201 | ENTRY(cpu_arm7_switch_mm) | 202 | ENTRY(cpu_arm7_switch_mm) |
203 | #ifdef CONFIG_MMU | ||
202 | mov r1, #0 | 204 | mov r1, #0 |
203 | mcr p15, 0, r1, c7, c0, 0 @ flush cache | 205 | mcr p15, 0, r1, c7, c0, 0 @ flush cache |
204 | mcr p15, 0, r0, c2, c0, 0 @ update page table ptr | 206 | mcr p15, 0, r0, c2, c0, 0 @ update page table ptr |
205 | mcr p15, 0, r1, c5, c0, 0 @ flush TLBs | 207 | mcr p15, 0, r1, c5, c0, 0 @ flush TLBs |
208 | #endif | ||
206 | mov pc, lr | 209 | mov pc, lr |
207 | 210 | ||
208 | /* | 211 | /* |
@@ -214,6 +217,7 @@ ENTRY(cpu_arm7_switch_mm) | |||
214 | .align 5 | 217 | .align 5 |
215 | ENTRY(cpu_arm6_set_pte) | 218 | ENTRY(cpu_arm6_set_pte) |
216 | ENTRY(cpu_arm7_set_pte) | 219 | ENTRY(cpu_arm7_set_pte) |
220 | #ifdef CONFIG_MMU | ||
217 | str r1, [r0], #-2048 @ linux version | 221 | str r1, [r0], #-2048 @ linux version |
218 | 222 | ||
219 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 223 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -232,6 +236,7 @@ ENTRY(cpu_arm7_set_pte) | |||
232 | movne r2, #0 | 236 | movne r2, #0 |
233 | 237 | ||
234 | str r2, [r0] @ hardware version | 238 | str r2, [r0] @ hardware version |
239 | #endif /* CONFIG_MMU */ | ||
235 | mov pc, lr | 240 | mov pc, lr |
236 | 241 | ||
237 | /* | 242 | /* |
@@ -243,7 +248,9 @@ ENTRY(cpu_arm6_reset) | |||
243 | ENTRY(cpu_arm7_reset) | 248 | ENTRY(cpu_arm7_reset) |
244 | mov r1, #0 | 249 | mov r1, #0 |
245 | mcr p15, 0, r1, c7, c0, 0 @ flush cache | 250 | mcr p15, 0, r1, c7, c0, 0 @ flush cache |
251 | #ifdef CONFIG_MMU | ||
246 | mcr p15, 0, r1, c5, c0, 0 @ flush TLB | 252 | mcr p15, 0, r1, c5, c0, 0 @ flush TLB |
253 | #endif | ||
247 | mov r1, #0x30 | 254 | mov r1, #0x30 |
248 | mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc | 255 | mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc |
249 | mov pc, r0 | 256 | mov pc, r0 |
@@ -253,19 +260,27 @@ ENTRY(cpu_arm7_reset) | |||
253 | .type __arm6_setup, #function | 260 | .type __arm6_setup, #function |
254 | __arm6_setup: mov r0, #0 | 261 | __arm6_setup: mov r0, #0 |
255 | mcr p15, 0, r0, c7, c0 @ flush caches on v3 | 262 | mcr p15, 0, r0, c7, c0 @ flush caches on v3 |
263 | #ifdef CONFIG_MMU | ||
256 | mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 | 264 | mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 |
257 | mov r0, #0x3d @ . ..RS BLDP WCAM | 265 | mov r0, #0x3d @ . ..RS BLDP WCAM |
258 | orr r0, r0, #0x100 @ . ..01 0011 1101 | 266 | orr r0, r0, #0x100 @ . ..01 0011 1101 |
267 | #else | ||
268 | mov r0, #0x3c @ . ..RS BLDP WCA. | ||
269 | #endif | ||
259 | mov pc, lr | 270 | mov pc, lr |
260 | .size __arm6_setup, . - __arm6_setup | 271 | .size __arm6_setup, . - __arm6_setup |
261 | 272 | ||
262 | .type __arm7_setup, #function | 273 | .type __arm7_setup, #function |
263 | __arm7_setup: mov r0, #0 | 274 | __arm7_setup: mov r0, #0 |
264 | mcr p15, 0, r0, c7, c0 @ flush caches on v3 | 275 | mcr p15, 0, r0, c7, c0 @ flush caches on v3 |
276 | #ifdef CONFIG_MMU | ||
265 | mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 | 277 | mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 |
266 | mcr p15, 0, r0, c3, c0 @ load domain access register | 278 | mcr p15, 0, r0, c3, c0 @ load domain access register |
267 | mov r0, #0x7d @ . ..RS BLDP WCAM | 279 | mov r0, #0x7d @ . ..RS BLDP WCAM |
268 | orr r0, r0, #0x100 @ . ..01 0111 1101 | 280 | orr r0, r0, #0x100 @ . ..01 0111 1101 |
281 | #else | ||
282 | mov r0, #0x7c @ . ..RS BLDP WCA. | ||
283 | #endif | ||
269 | mov pc, lr | 284 | mov pc, lr |
270 | .size __arm7_setup, . - __arm7_setup | 285 | .size __arm7_setup, . - __arm7_setup |
271 | 286 | ||
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index 26f00ee2ad9a..86102467d37f 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S | |||
@@ -4,6 +4,7 @@ | |||
4 | * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) | 4 | * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) |
5 | * Rob Scott (rscott@mtrob.fdns.net) | 5 | * Rob Scott (rscott@mtrob.fdns.net) |
6 | * Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd. | 6 | * Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd. |
7 | * hacked for non-paged-MM by Hyok S. Choi, 2004. | ||
7 | * | 8 | * |
8 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 10 | * it under the terms of the GNU General Public License as published by |
@@ -29,6 +30,7 @@ | |||
29 | * out of 'proc-arm6,7.S' per RMK discussion | 30 | * out of 'proc-arm6,7.S' per RMK discussion |
30 | * 07-25-2000 SJH Added idle function. | 31 | * 07-25-2000 SJH Added idle function. |
31 | * 08-25-2000 DBS Updated for integration of ARM Ltd version. | 32 | * 08-25-2000 DBS Updated for integration of ARM Ltd version. |
33 | * 04-20-2004 HSC modified for non-paged memory management mode. | ||
32 | */ | 34 | */ |
33 | #include <linux/linkage.h> | 35 | #include <linux/linkage.h> |
34 | #include <linux/init.h> | 36 | #include <linux/init.h> |
@@ -75,10 +77,12 @@ ENTRY(cpu_arm720_do_idle) | |||
75 | * the new. | 77 | * the new. |
76 | */ | 78 | */ |
77 | ENTRY(cpu_arm720_switch_mm) | 79 | ENTRY(cpu_arm720_switch_mm) |
80 | #ifdef CONFIG_MMU | ||
78 | mov r1, #0 | 81 | mov r1, #0 |
79 | mcr p15, 0, r1, c7, c7, 0 @ invalidate cache | 82 | mcr p15, 0, r1, c7, c7, 0 @ invalidate cache |
80 | mcr p15, 0, r0, c2, c0, 0 @ update page table ptr | 83 | mcr p15, 0, r0, c2, c0, 0 @ update page table ptr |
81 | mcr p15, 0, r1, c8, c7, 0 @ flush TLB (v4) | 84 | mcr p15, 0, r1, c8, c7, 0 @ flush TLB (v4) |
85 | #endif | ||
82 | mov pc, lr | 86 | mov pc, lr |
83 | 87 | ||
84 | /* | 88 | /* |
@@ -89,6 +93,7 @@ ENTRY(cpu_arm720_switch_mm) | |||
89 | */ | 93 | */ |
90 | .align 5 | 94 | .align 5 |
91 | ENTRY(cpu_arm720_set_pte) | 95 | ENTRY(cpu_arm720_set_pte) |
96 | #ifdef CONFIG_MMU | ||
92 | str r1, [r0], #-2048 @ linux version | 97 | str r1, [r0], #-2048 @ linux version |
93 | 98 | ||
94 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 99 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -107,6 +112,7 @@ ENTRY(cpu_arm720_set_pte) | |||
107 | movne r2, #0 | 112 | movne r2, #0 |
108 | 113 | ||
109 | str r2, [r0] @ hardware version | 114 | str r2, [r0] @ hardware version |
115 | #endif | ||
110 | mov pc, lr | 116 | mov pc, lr |
111 | 117 | ||
112 | /* | 118 | /* |
@@ -117,7 +123,9 @@ ENTRY(cpu_arm720_set_pte) | |||
117 | ENTRY(cpu_arm720_reset) | 123 | ENTRY(cpu_arm720_reset) |
118 | mov ip, #0 | 124 | mov ip, #0 |
119 | mcr p15, 0, ip, c7, c7, 0 @ invalidate cache | 125 | mcr p15, 0, ip, c7, c7, 0 @ invalidate cache |
126 | #ifdef CONFIG_MMU | ||
120 | mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4) | 127 | mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4) |
128 | #endif | ||
121 | mrc p15, 0, ip, c1, c0, 0 @ get ctrl register | 129 | mrc p15, 0, ip, c1, c0, 0 @ get ctrl register |
122 | bic ip, ip, #0x000f @ ............wcam | 130 | bic ip, ip, #0x000f @ ............wcam |
123 | bic ip, ip, #0x2100 @ ..v....s........ | 131 | bic ip, ip, #0x2100 @ ..v....s........ |
@@ -130,7 +138,9 @@ ENTRY(cpu_arm720_reset) | |||
130 | __arm710_setup: | 138 | __arm710_setup: |
131 | mov r0, #0 | 139 | mov r0, #0 |
132 | mcr p15, 0, r0, c7, c7, 0 @ invalidate caches | 140 | mcr p15, 0, r0, c7, c7, 0 @ invalidate caches |
141 | #ifdef CONFIG_MMU | ||
133 | mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) | 142 | mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) |
143 | #endif | ||
134 | mrc p15, 0, r0, c1, c0 @ get control register | 144 | mrc p15, 0, r0, c1, c0 @ get control register |
135 | ldr r5, arm710_cr1_clear | 145 | ldr r5, arm710_cr1_clear |
136 | bic r0, r0, r5 | 146 | bic r0, r0, r5 |
@@ -156,7 +166,9 @@ arm710_cr1_set: | |||
156 | __arm720_setup: | 166 | __arm720_setup: |
157 | mov r0, #0 | 167 | mov r0, #0 |
158 | mcr p15, 0, r0, c7, c7, 0 @ invalidate caches | 168 | mcr p15, 0, r0, c7, c7, 0 @ invalidate caches |
169 | #ifdef CONFIG_MMU | ||
159 | mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) | 170 | mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) |
171 | #endif | ||
160 | mrc p15, 0, r0, c1, c0 @ get control register | 172 | mrc p15, 0, r0, c1, c0 @ get control register |
161 | ldr r5, arm720_cr1_clear | 173 | ldr r5, arm720_cr1_clear |
162 | bic r0, r0, r5 | 174 | bic r0, r0, r5 |
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index a17f79e0199c..31dc839ba07c 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 1999,2000 ARM Limited | 4 | * Copyright (C) 1999,2000 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. |
6 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -97,7 +98,9 @@ ENTRY(cpu_arm920_reset) | |||
97 | mov ip, #0 | 98 | mov ip, #0 |
98 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 99 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
99 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 100 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
101 | #ifdef CONFIG_MMU | ||
100 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 102 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
103 | #endif | ||
101 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 104 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
102 | bic ip, ip, #0x000f @ ............wcam | 105 | bic ip, ip, #0x000f @ ............wcam |
103 | bic ip, ip, #0x1100 @ ...i...s........ | 106 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -317,6 +320,7 @@ ENTRY(cpu_arm920_dcache_clean_area) | |||
317 | */ | 320 | */ |
318 | .align 5 | 321 | .align 5 |
319 | ENTRY(cpu_arm920_switch_mm) | 322 | ENTRY(cpu_arm920_switch_mm) |
323 | #ifdef CONFIG_MMU | ||
320 | mov ip, #0 | 324 | mov ip, #0 |
321 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | 325 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH |
322 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache | 326 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache |
@@ -337,6 +341,7 @@ ENTRY(cpu_arm920_switch_mm) | |||
337 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 341 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
338 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 342 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
339 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 343 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
344 | #endif | ||
340 | mov pc, lr | 345 | mov pc, lr |
341 | 346 | ||
342 | /* | 347 | /* |
@@ -346,6 +351,7 @@ ENTRY(cpu_arm920_switch_mm) | |||
346 | */ | 351 | */ |
347 | .align 5 | 352 | .align 5 |
348 | ENTRY(cpu_arm920_set_pte) | 353 | ENTRY(cpu_arm920_set_pte) |
354 | #ifdef CONFIG_MMU | ||
349 | str r1, [r0], #-2048 @ linux version | 355 | str r1, [r0], #-2048 @ linux version |
350 | 356 | ||
351 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 357 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -372,6 +378,7 @@ ENTRY(cpu_arm920_set_pte) | |||
372 | mov r0, r0 | 378 | mov r0, r0 |
373 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 379 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
374 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 380 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
381 | #endif /* CONFIG_MMU */ | ||
375 | mov pc, lr | 382 | mov pc, lr |
376 | 383 | ||
377 | __INIT | 384 | __INIT |
@@ -381,7 +388,9 @@ __arm920_setup: | |||
381 | mov r0, #0 | 388 | mov r0, #0 |
382 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 389 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
383 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 390 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
391 | #ifdef CONFIG_MMU | ||
384 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 392 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
393 | #endif | ||
385 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 394 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
386 | ldr r5, arm920_cr1_clear | 395 | ldr r5, arm920_cr1_clear |
387 | bic r0, r0, r5 | 396 | bic r0, r0, r5 |
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index bbde4a024a48..9e57c34f5c09 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S | |||
@@ -4,6 +4,7 @@ | |||
4 | * Copyright (C) 1999,2000 ARM Limited | 4 | * Copyright (C) 1999,2000 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. |
6 | * Copyright (C) 2001 Altera Corporation | 6 | * Copyright (C) 2001 Altera Corporation |
7 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
7 | * | 8 | * |
8 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 10 | * it under the terms of the GNU General Public License as published by |
@@ -99,7 +100,9 @@ ENTRY(cpu_arm922_reset) | |||
99 | mov ip, #0 | 100 | mov ip, #0 |
100 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 101 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
101 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 102 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
103 | #ifdef CONFIG_MMU | ||
102 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 104 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
105 | #endif | ||
103 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 106 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
104 | bic ip, ip, #0x000f @ ............wcam | 107 | bic ip, ip, #0x000f @ ............wcam |
105 | bic ip, ip, #0x1100 @ ...i...s........ | 108 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -321,6 +324,7 @@ ENTRY(cpu_arm922_dcache_clean_area) | |||
321 | */ | 324 | */ |
322 | .align 5 | 325 | .align 5 |
323 | ENTRY(cpu_arm922_switch_mm) | 326 | ENTRY(cpu_arm922_switch_mm) |
327 | #ifdef CONFIG_MMU | ||
324 | mov ip, #0 | 328 | mov ip, #0 |
325 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | 329 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH |
326 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache | 330 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache |
@@ -341,6 +345,7 @@ ENTRY(cpu_arm922_switch_mm) | |||
341 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 345 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
342 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 346 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
343 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 347 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
348 | #endif | ||
344 | mov pc, lr | 349 | mov pc, lr |
345 | 350 | ||
346 | /* | 351 | /* |
@@ -350,6 +355,7 @@ ENTRY(cpu_arm922_switch_mm) | |||
350 | */ | 355 | */ |
351 | .align 5 | 356 | .align 5 |
352 | ENTRY(cpu_arm922_set_pte) | 357 | ENTRY(cpu_arm922_set_pte) |
358 | #ifdef CONFIG_MMU | ||
353 | str r1, [r0], #-2048 @ linux version | 359 | str r1, [r0], #-2048 @ linux version |
354 | 360 | ||
355 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 361 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -376,6 +382,7 @@ ENTRY(cpu_arm922_set_pte) | |||
376 | mov r0, r0 | 382 | mov r0, r0 |
377 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 383 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
378 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 384 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
385 | #endif /* CONFIG_MMU */ | ||
379 | mov pc, lr | 386 | mov pc, lr |
380 | 387 | ||
381 | __INIT | 388 | __INIT |
@@ -385,7 +392,9 @@ __arm922_setup: | |||
385 | mov r0, #0 | 392 | mov r0, #0 |
386 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 393 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
387 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 394 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
395 | #ifdef CONFIG_MMU | ||
388 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 396 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
397 | #endif | ||
389 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 398 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
390 | ldr r5, arm922_cr1_clear | 399 | ldr r5, arm922_cr1_clear |
391 | bic r0, r0, r5 | 400 | bic r0, r0, r5 |
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 224ce226a01b..8d47c9f3f931 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
@@ -9,6 +9,8 @@ | |||
9 | * Update for Linux-2.6 and cache flush improvements | 9 | * Update for Linux-2.6 and cache flush improvements |
10 | * Copyright (C) 2004 Nokia Corporation by Tony Lindgren <tony@atomide.com> | 10 | * Copyright (C) 2004 Nokia Corporation by Tony Lindgren <tony@atomide.com> |
11 | * | 11 | * |
12 | * hacked for non-paged-MM by Hyok S. Choi, 2004. | ||
13 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | 14 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License as published by | 15 | * it under the terms of the GNU General Public License as published by |
14 | * the Free Software Foundation; either version 2 of the License, or | 16 | * the Free Software Foundation; either version 2 of the License, or |
@@ -122,7 +124,9 @@ ENTRY(cpu_arm925_reset) | |||
122 | mov ip, #0 | 124 | mov ip, #0 |
123 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 125 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
124 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 126 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
127 | #ifdef CONFIG_MMU | ||
125 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 128 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
129 | #endif | ||
126 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 130 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
127 | bic ip, ip, #0x000f @ ............wcam | 131 | bic ip, ip, #0x000f @ ............wcam |
128 | bic ip, ip, #0x1100 @ ...i...s........ | 132 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -369,6 +373,7 @@ ENTRY(cpu_arm925_dcache_clean_area) | |||
369 | */ | 373 | */ |
370 | .align 5 | 374 | .align 5 |
371 | ENTRY(cpu_arm925_switch_mm) | 375 | ENTRY(cpu_arm925_switch_mm) |
376 | #ifdef CONFIG_MMU | ||
372 | mov ip, #0 | 377 | mov ip, #0 |
373 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | 378 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH |
374 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache | 379 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache |
@@ -383,6 +388,7 @@ ENTRY(cpu_arm925_switch_mm) | |||
383 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 388 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
384 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 389 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
385 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 390 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
391 | #endif | ||
386 | mov pc, lr | 392 | mov pc, lr |
387 | 393 | ||
388 | /* | 394 | /* |
@@ -392,6 +398,7 @@ ENTRY(cpu_arm925_switch_mm) | |||
392 | */ | 398 | */ |
393 | .align 5 | 399 | .align 5 |
394 | ENTRY(cpu_arm925_set_pte) | 400 | ENTRY(cpu_arm925_set_pte) |
401 | #ifdef CONFIG_MMU | ||
395 | str r1, [r0], #-2048 @ linux version | 402 | str r1, [r0], #-2048 @ linux version |
396 | 403 | ||
397 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 404 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -420,6 +427,7 @@ ENTRY(cpu_arm925_set_pte) | |||
420 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 427 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
421 | #endif | 428 | #endif |
422 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 429 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
430 | #endif /* CONFIG_MMU */ | ||
423 | mov pc, lr | 431 | mov pc, lr |
424 | 432 | ||
425 | __INIT | 433 | __INIT |
@@ -438,7 +446,9 @@ __arm925_setup: | |||
438 | mov r0, #0 | 446 | mov r0, #0 |
439 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 447 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
440 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 448 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
449 | #ifdef CONFIG_MMU | ||
441 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 450 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
451 | #endif | ||
442 | 452 | ||
443 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | 453 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH |
444 | mov r0, #4 @ disable write-back on caches explicitly | 454 | mov r0, #4 @ disable write-back on caches explicitly |
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 4e2a087cf388..cb4d8f33d2a3 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 1999-2001 ARM Limited | 4 | * Copyright (C) 1999-2001 ARM Limited |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. |
6 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -85,7 +86,9 @@ ENTRY(cpu_arm926_reset) | |||
85 | mov ip, #0 | 86 | mov ip, #0 |
86 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 87 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
87 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 88 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
89 | #ifdef CONFIG_MMU | ||
88 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 90 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
91 | #endif | ||
89 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 92 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
90 | bic ip, ip, #0x000f @ ............wcam | 93 | bic ip, ip, #0x000f @ ............wcam |
91 | bic ip, ip, #0x1100 @ ...i...s........ | 94 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -329,6 +332,7 @@ ENTRY(cpu_arm926_dcache_clean_area) | |||
329 | */ | 332 | */ |
330 | .align 5 | 333 | .align 5 |
331 | ENTRY(cpu_arm926_switch_mm) | 334 | ENTRY(cpu_arm926_switch_mm) |
335 | #ifdef CONFIG_MMU | ||
332 | mov ip, #0 | 336 | mov ip, #0 |
333 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | 337 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH |
334 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache | 338 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache |
@@ -341,6 +345,7 @@ ENTRY(cpu_arm926_switch_mm) | |||
341 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 345 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
342 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 346 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
343 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 347 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
348 | #endif | ||
344 | mov pc, lr | 349 | mov pc, lr |
345 | 350 | ||
346 | /* | 351 | /* |
@@ -350,6 +355,7 @@ ENTRY(cpu_arm926_switch_mm) | |||
350 | */ | 355 | */ |
351 | .align 5 | 356 | .align 5 |
352 | ENTRY(cpu_arm926_set_pte) | 357 | ENTRY(cpu_arm926_set_pte) |
358 | #ifdef CONFIG_MMU | ||
353 | str r1, [r0], #-2048 @ linux version | 359 | str r1, [r0], #-2048 @ linux version |
354 | 360 | ||
355 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 361 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -378,6 +384,7 @@ ENTRY(cpu_arm926_set_pte) | |||
378 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 384 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
379 | #endif | 385 | #endif |
380 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 386 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
387 | #endif | ||
381 | mov pc, lr | 388 | mov pc, lr |
382 | 389 | ||
383 | __INIT | 390 | __INIT |
@@ -387,7 +394,9 @@ __arm926_setup: | |||
387 | mov r0, #0 | 394 | mov r0, #0 |
388 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 395 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
389 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 396 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
397 | #ifdef CONFIG_MMU | ||
390 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 398 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
399 | #endif | ||
391 | 400 | ||
392 | 401 | ||
393 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | 402 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH |
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S index a2dd5ae1077d..5a760a2c629c 100644 --- a/arch/arm/mm/proc-sa110.S +++ b/arch/arm/mm/proc-sa110.S | |||
@@ -2,6 +2,7 @@ | |||
2 | * linux/arch/arm/mm/proc-sa110.S | 2 | * linux/arch/arm/mm/proc-sa110.S |
3 | * | 3 | * |
4 | * Copyright (C) 1997-2002 Russell King | 4 | * Copyright (C) 1997-2002 Russell King |
5 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -67,7 +68,9 @@ ENTRY(cpu_sa110_reset) | |||
67 | mov ip, #0 | 68 | mov ip, #0 |
68 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 69 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
69 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 70 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
71 | #ifdef CONFIG_MMU | ||
70 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 72 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
73 | #endif | ||
71 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 74 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
72 | bic ip, ip, #0x000f @ ............wcam | 75 | bic ip, ip, #0x000f @ ............wcam |
73 | bic ip, ip, #0x1100 @ ...i...s........ | 76 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -130,11 +133,15 @@ ENTRY(cpu_sa110_dcache_clean_area) | |||
130 | */ | 133 | */ |
131 | .align 5 | 134 | .align 5 |
132 | ENTRY(cpu_sa110_switch_mm) | 135 | ENTRY(cpu_sa110_switch_mm) |
136 | #ifdef CONFIG_MMU | ||
133 | str lr, [sp, #-4]! | 137 | str lr, [sp, #-4]! |
134 | bl v4wb_flush_kern_cache_all @ clears IP | 138 | bl v4wb_flush_kern_cache_all @ clears IP |
135 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 139 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
136 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 140 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
137 | ldr pc, [sp], #4 | 141 | ldr pc, [sp], #4 |
142 | #else | ||
143 | mov pc, lr | ||
144 | #endif | ||
138 | 145 | ||
139 | /* | 146 | /* |
140 | * cpu_sa110_set_pte(ptep, pte) | 147 | * cpu_sa110_set_pte(ptep, pte) |
@@ -143,6 +150,7 @@ ENTRY(cpu_sa110_switch_mm) | |||
143 | */ | 150 | */ |
144 | .align 5 | 151 | .align 5 |
145 | ENTRY(cpu_sa110_set_pte) | 152 | ENTRY(cpu_sa110_set_pte) |
153 | #ifdef CONFIG_MMU | ||
146 | str r1, [r0], #-2048 @ linux version | 154 | str r1, [r0], #-2048 @ linux version |
147 | 155 | ||
148 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 156 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -164,6 +172,7 @@ ENTRY(cpu_sa110_set_pte) | |||
164 | mov r0, r0 | 172 | mov r0, r0 |
165 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 173 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
166 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 174 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
175 | #endif | ||
167 | mov pc, lr | 176 | mov pc, lr |
168 | 177 | ||
169 | __INIT | 178 | __INIT |
@@ -173,7 +182,9 @@ __sa110_setup: | |||
173 | mov r10, #0 | 182 | mov r10, #0 |
174 | mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4 | 183 | mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4 |
175 | mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4 | 184 | mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4 |
185 | #ifdef CONFIG_MMU | ||
176 | mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4 | 186 | mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4 |
187 | #endif | ||
177 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 188 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
178 | ldr r5, sa110_cr1_clear | 189 | ldr r5, sa110_cr1_clear |
179 | bic r0, r0, r5 | 190 | bic r0, r0, r5 |
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index 777ad99c1439..0a2107ad4c32 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S | |||
@@ -2,6 +2,7 @@ | |||
2 | * linux/arch/arm/mm/proc-sa1100.S | 2 | * linux/arch/arm/mm/proc-sa1100.S |
3 | * | 3 | * |
4 | * Copyright (C) 1997-2002 Russell King | 4 | * Copyright (C) 1997-2002 Russell King |
5 | * hacked for non-paged-MM by Hyok S. Choi, 2003. | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -77,7 +78,9 @@ ENTRY(cpu_sa1100_reset) | |||
77 | mov ip, #0 | 78 | mov ip, #0 |
78 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | 79 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches |
79 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 80 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
81 | #ifdef CONFIG_MMU | ||
80 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 82 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
83 | #endif | ||
81 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | 84 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register |
82 | bic ip, ip, #0x000f @ ............wcam | 85 | bic ip, ip, #0x000f @ ............wcam |
83 | bic ip, ip, #0x1100 @ ...i...s........ | 86 | bic ip, ip, #0x1100 @ ...i...s........ |
@@ -142,12 +145,16 @@ ENTRY(cpu_sa1100_dcache_clean_area) | |||
142 | */ | 145 | */ |
143 | .align 5 | 146 | .align 5 |
144 | ENTRY(cpu_sa1100_switch_mm) | 147 | ENTRY(cpu_sa1100_switch_mm) |
148 | #ifdef CONFIG_MMU | ||
145 | str lr, [sp, #-4]! | 149 | str lr, [sp, #-4]! |
146 | bl v4wb_flush_kern_cache_all @ clears IP | 150 | bl v4wb_flush_kern_cache_all @ clears IP |
147 | mcr p15, 0, ip, c9, c0, 0 @ invalidate RB | 151 | mcr p15, 0, ip, c9, c0, 0 @ invalidate RB |
148 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | 152 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer |
149 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | 153 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs |
150 | ldr pc, [sp], #4 | 154 | ldr pc, [sp], #4 |
155 | #else | ||
156 | mov pc, lr | ||
157 | #endif | ||
151 | 158 | ||
152 | /* | 159 | /* |
153 | * cpu_sa1100_set_pte(ptep, pte) | 160 | * cpu_sa1100_set_pte(ptep, pte) |
@@ -156,6 +163,7 @@ ENTRY(cpu_sa1100_switch_mm) | |||
156 | */ | 163 | */ |
157 | .align 5 | 164 | .align 5 |
158 | ENTRY(cpu_sa1100_set_pte) | 165 | ENTRY(cpu_sa1100_set_pte) |
166 | #ifdef CONFIG_MMU | ||
159 | str r1, [r0], #-2048 @ linux version | 167 | str r1, [r0], #-2048 @ linux version |
160 | 168 | ||
161 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | 169 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY |
@@ -177,6 +185,7 @@ ENTRY(cpu_sa1100_set_pte) | |||
177 | mov r0, r0 | 185 | mov r0, r0 |
178 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 186 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
179 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | 187 | mcr p15, 0, r0, c7, c10, 4 @ drain WB |
188 | #endif | ||
180 | mov pc, lr | 189 | mov pc, lr |
181 | 190 | ||
182 | __INIT | 191 | __INIT |
@@ -186,7 +195,9 @@ __sa1100_setup: | |||
186 | mov r0, #0 | 195 | mov r0, #0 |
187 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | 196 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 |
188 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | 197 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 |
198 | #ifdef CONFIG_MMU | ||
189 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 199 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
200 | #endif | ||
190 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 201 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
191 | ldr r5, sa1100_cr1_clear | 202 | ldr r5, sa1100_cr1_clear |
192 | bic r0, r0, r5 | 203 | bic r0, r0, r5 |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 09b1a41a6de8..ca13d4d05f65 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -2,6 +2,7 @@ | |||
2 | * linux/arch/arm/mm/proc-v6.S | 2 | * linux/arch/arm/mm/proc-v6.S |
3 | * | 3 | * |
4 | * Copyright (C) 2001 Deep Blue Solutions Ltd. | 4 | * Copyright (C) 2001 Deep Blue Solutions Ltd. |
5 | * Modified by Catalin Marinas for noMMU support | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -88,6 +89,7 @@ ENTRY(cpu_v6_dcache_clean_area) | |||
88 | * - we are not using split page tables | 89 | * - we are not using split page tables |
89 | */ | 90 | */ |
90 | ENTRY(cpu_v6_switch_mm) | 91 | ENTRY(cpu_v6_switch_mm) |
92 | #ifdef CONFIG_MMU | ||
91 | mov r2, #0 | 93 | mov r2, #0 |
92 | ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id | 94 | ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id |
93 | #ifdef CONFIG_SMP | 95 | #ifdef CONFIG_SMP |
@@ -97,6 +99,7 @@ ENTRY(cpu_v6_switch_mm) | |||
97 | mcr p15, 0, r2, c7, c10, 4 @ drain write buffer | 99 | mcr p15, 0, r2, c7, c10, 4 @ drain write buffer |
98 | mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | 100 | mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 |
99 | mcr p15, 0, r1, c13, c0, 1 @ set context ID | 101 | mcr p15, 0, r1, c13, c0, 1 @ set context ID |
102 | #endif | ||
100 | mov pc, lr | 103 | mov pc, lr |
101 | 104 | ||
102 | /* | 105 | /* |
@@ -119,6 +122,7 @@ ENTRY(cpu_v6_switch_mm) | |||
119 | * 1111 0 1 1 r/w r/w | 122 | * 1111 0 1 1 r/w r/w |
120 | */ | 123 | */ |
121 | ENTRY(cpu_v6_set_pte) | 124 | ENTRY(cpu_v6_set_pte) |
125 | #ifdef CONFIG_MMU | ||
122 | str r1, [r0], #-2048 @ linux version | 126 | str r1, [r0], #-2048 @ linux version |
123 | 127 | ||
124 | bic r2, r1, #0x000003f0 | 128 | bic r2, r1, #0x000003f0 |
@@ -145,6 +149,7 @@ ENTRY(cpu_v6_set_pte) | |||
145 | 149 | ||
146 | str r2, [r0] | 150 | str r2, [r0] |
147 | mcr p15, 0, r0, c7, c10, 1 @ flush_pte | 151 | mcr p15, 0, r0, c7, c10, 1 @ flush_pte |
152 | #endif | ||
148 | mov pc, lr | 153 | mov pc, lr |
149 | 154 | ||
150 | 155 | ||
@@ -194,12 +199,14 @@ __v6_setup: | |||
194 | mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache | 199 | mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache |
195 | mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache | 200 | mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache |
196 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | 201 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer |
202 | #ifdef CONFIG_MMU | ||
197 | mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs | 203 | mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs |
198 | mcr p15, 0, r0, c2, c0, 2 @ TTB control register | 204 | mcr p15, 0, r0, c2, c0, 2 @ TTB control register |
199 | #ifdef CONFIG_SMP | 205 | #ifdef CONFIG_SMP |
200 | orr r4, r4, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable | 206 | orr r4, r4, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable |
201 | #endif | 207 | #endif |
202 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 | 208 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 |
209 | #endif /* CONFIG_MMU */ | ||
203 | #ifdef CONFIG_VFP | 210 | #ifdef CONFIG_VFP |
204 | mrc p15, 0, r0, c1, c0, 2 | 211 | mrc p15, 0, r0, c1, c0, 2 |
205 | orr r0, r0, #(0xf << 20) | 212 | orr r0, r0, #(0xf << 20) |
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig index 856b665020e7..6a1238a29d6c 100644 --- a/arch/cris/Kconfig +++ b/arch/cris/Kconfig | |||
@@ -28,6 +28,10 @@ config GENERIC_CALIBRATE_DELAY | |||
28 | bool | 28 | bool |
29 | default y | 29 | default y |
30 | 30 | ||
31 | config IRQ_PER_CPU | ||
32 | bool | ||
33 | default y | ||
34 | |||
31 | config CRIS | 35 | config CRIS |
32 | bool | 36 | bool |
33 | default y | 37 | default y |
diff --git a/arch/cris/arch-v10/kernel/debugport.c b/arch/cris/arch-v10/kernel/debugport.c index f3a85b77c17e..dde813e16294 100644 --- a/arch/cris/arch-v10/kernel/debugport.c +++ b/arch/cris/arch-v10/kernel/debugport.c | |||
@@ -541,7 +541,7 @@ init_dummy_console(void) | |||
541 | dummy_driver.init_termios = tty_std_termios; | 541 | dummy_driver.init_termios = tty_std_termios; |
542 | dummy_driver.init_termios.c_cflag = | 542 | dummy_driver.init_termios.c_cflag = |
543 | B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */ | 543 | B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */ |
544 | dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS; | 544 | dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; |
545 | 545 | ||
546 | dummy_driver.open = dummy_open; | 546 | dummy_driver.open = dummy_open; |
547 | dummy_driver.close = dummy_close; | 547 | dummy_driver.close = dummy_close; |
diff --git a/arch/cris/arch-v10/kernel/irq.c b/arch/cris/arch-v10/kernel/irq.c index 4b368a122015..2d5be93b5197 100644 --- a/arch/cris/arch-v10/kernel/irq.c +++ b/arch/cris/arch-v10/kernel/irq.c | |||
@@ -172,7 +172,7 @@ init_IRQ(void) | |||
172 | 172 | ||
173 | /* Initialize IRQ handler descriptiors. */ | 173 | /* Initialize IRQ handler descriptiors. */ |
174 | for(i = 2; i < NR_IRQS; i++) { | 174 | for(i = 2; i < NR_IRQS; i++) { |
175 | irq_desc[i].handler = &crisv10_irq_type; | 175 | irq_desc[i].chip = &crisv10_irq_type; |
176 | set_int_vector(i, interrupt[i]); | 176 | set_int_vector(i, interrupt[i]); |
177 | } | 177 | } |
178 | 178 | ||
diff --git a/arch/cris/arch-v32/drivers/pci/bios.c b/arch/cris/arch-v32/drivers/pci/bios.c index 1e9d062103ae..a2b9c60c2777 100644 --- a/arch/cris/arch-v32/drivers/pci/bios.c +++ b/arch/cris/arch-v32/drivers/pci/bios.c | |||
@@ -43,10 +43,10 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |||
43 | 43 | ||
44 | void | 44 | void |
45 | pcibios_align_resource(void *data, struct resource *res, | 45 | pcibios_align_resource(void *data, struct resource *res, |
46 | unsigned long size, unsigned long align) | 46 | resource_size_t size, resource_size_t align) |
47 | { | 47 | { |
48 | if (res->flags & IORESOURCE_IO) { | 48 | if (res->flags & IORESOURCE_IO) { |
49 | unsigned long start = res->start; | 49 | resource_size_t start = res->start; |
50 | 50 | ||
51 | if (start & 0x300) { | 51 | if (start & 0x300) { |
52 | start = (start + 0x3ff) & ~0x3ff; | 52 | start = (start + 0x3ff) & ~0x3ff; |
diff --git a/arch/cris/arch-v32/kernel/debugport.c b/arch/cris/arch-v32/kernel/debugport.c index ffc1ebf2dfee..3dc587e6201a 100644 --- a/arch/cris/arch-v32/kernel/debugport.c +++ b/arch/cris/arch-v32/kernel/debugport.c | |||
@@ -353,7 +353,7 @@ init_dummy_console(void) | |||
353 | dummy_driver.init_termios = tty_std_termios; | 353 | dummy_driver.init_termios = tty_std_termios; |
354 | dummy_driver.init_termios.c_cflag = | 354 | dummy_driver.init_termios.c_cflag = |
355 | B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */ | 355 | B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */ |
356 | dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS; | 356 | dummy_driver.flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; |
357 | 357 | ||
358 | dummy_driver.open = dummy_open; | 358 | dummy_driver.open = dummy_open; |
359 | dummy_driver.close = dummy_close; | 359 | dummy_driver.close = dummy_close; |
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index c78cc2685133..06260874f018 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c | |||
@@ -369,7 +369,7 @@ init_IRQ(void) | |||
369 | 369 | ||
370 | /* Point all IRQ's to bad handlers. */ | 370 | /* Point all IRQ's to bad handlers. */ |
371 | for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) { | 371 | for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) { |
372 | irq_desc[j].handler = &crisv32_irq_type; | 372 | irq_desc[j].chip = &crisv32_irq_type; |
373 | set_exception_vector(i, interrupt[j]); | 373 | set_exception_vector(i, interrupt[j]); |
374 | } | 374 | } |
375 | 375 | ||
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c index b504def3e346..6547bb646364 100644 --- a/arch/cris/kernel/irq.c +++ b/arch/cris/kernel/irq.c | |||
@@ -69,7 +69,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
69 | for_each_online_cpu(j) | 69 | for_each_online_cpu(j) |
70 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 70 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
71 | #endif | 71 | #endif |
72 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 72 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
73 | seq_printf(p, " %s", action->name); | 73 | seq_printf(p, " %s", action->name); |
74 | 74 | ||
75 | for (action=action->next; action; action = action->next) | 75 | for (action=action->next; action; action = action->next) |
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c index 0a26bf6f1cd4..4f165c93be42 100644 --- a/arch/frv/mb93090-mb00/pci-frv.c +++ b/arch/frv/mb93090-mb00/pci-frv.c | |||
@@ -64,10 +64,10 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root, | |||
64 | */ | 64 | */ |
65 | void | 65 | void |
66 | pcibios_align_resource(void *data, struct resource *res, | 66 | pcibios_align_resource(void *data, struct resource *res, |
67 | unsigned long size, unsigned long align) | 67 | resource_size_t size, resource_size_t align) |
68 | { | 68 | { |
69 | if (res->flags & IORESOURCE_IO) { | 69 | if (res->flags & IORESOURCE_IO) { |
70 | unsigned long start = res->start; | 70 | resource_size_t start = res->start; |
71 | 71 | ||
72 | if (start & 0x300) { | 72 | if (start & 0x300) { |
73 | start = (start + 0x3ff) & ~0x3ff; | 73 | start = (start + 0x3ff) & ~0x3ff; |
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig index 47c08bcd9b24..1718429286d4 100644 --- a/arch/i386/Kconfig +++ b/arch/i386/Kconfig | |||
@@ -233,7 +233,7 @@ config NR_CPUS | |||
233 | 233 | ||
234 | config SCHED_SMT | 234 | config SCHED_SMT |
235 | bool "SMT (Hyperthreading) scheduler support" | 235 | bool "SMT (Hyperthreading) scheduler support" |
236 | depends on SMP | 236 | depends on X86_HT |
237 | help | 237 | help |
238 | SMT scheduler support improves the CPU scheduler's decision making | 238 | SMT scheduler support improves the CPU scheduler's decision making |
239 | when dealing with Intel Pentium 4 chips with HyperThreading at a | 239 | when dealing with Intel Pentium 4 chips with HyperThreading at a |
@@ -242,7 +242,7 @@ config SCHED_SMT | |||
242 | 242 | ||
243 | config SCHED_MC | 243 | config SCHED_MC |
244 | bool "Multi-core scheduler support" | 244 | bool "Multi-core scheduler support" |
245 | depends on SMP | 245 | depends on X86_HT |
246 | default y | 246 | default y |
247 | help | 247 | help |
248 | Multi-core scheduler support improves the CPU scheduler's decision | 248 | Multi-core scheduler support improves the CPU scheduler's decision |
@@ -529,6 +529,7 @@ config X86_PAE | |||
529 | bool | 529 | bool |
530 | depends on HIGHMEM64G | 530 | depends on HIGHMEM64G |
531 | default y | 531 | default y |
532 | select RESOURCES_64BIT | ||
532 | 533 | ||
533 | # Common NUMA Features | 534 | # Common NUMA Features |
534 | config NUMA | 535 | config NUMA |
@@ -737,7 +738,7 @@ config KEXEC | |||
737 | but it is independent of the system firmware. And like a reboot | 738 | but it is independent of the system firmware. And like a reboot |
738 | you can start any kernel with it, not just Linux. | 739 | you can start any kernel with it, not just Linux. |
739 | 740 | ||
740 | The name comes from the similiarity to the exec system call. | 741 | The name comes from the similarity to the exec system call. |
741 | 742 | ||
742 | It is an ongoing process to be certain the hardware in a machine | 743 | It is an ongoing process to be certain the hardware in a machine |
743 | is properly shutdown, so do not be surprised if this code does not | 744 | is properly shutdown, so do not be surprised if this code does not |
@@ -780,9 +781,23 @@ config HOTPLUG_CPU | |||
780 | enable suspend on SMP systems. CPUs can be controlled through | 781 | enable suspend on SMP systems. CPUs can be controlled through |
781 | /sys/devices/system/cpu. | 782 | /sys/devices/system/cpu. |
782 | 783 | ||
784 | config COMPAT_VDSO | ||
785 | bool "Compat VDSO support" | ||
786 | default y | ||
787 | help | ||
788 | Map the VDSO to the predictable old-style address too. | ||
789 | ---help--- | ||
790 | Say N here if you are running a sufficiently recent glibc | ||
791 | version (2.3.3 or later), to remove the high-mapped | ||
792 | VDSO mapping and to exclusively use the randomized VDSO. | ||
793 | |||
794 | If unsure, say Y. | ||
783 | 795 | ||
784 | endmenu | 796 | endmenu |
785 | 797 | ||
798 | config ARCH_ENABLE_MEMORY_HOTPLUG | ||
799 | def_bool y | ||
800 | depends on HIGHMEM | ||
786 | 801 | ||
787 | menu "Power management options (ACPI, APM)" | 802 | menu "Power management options (ACPI, APM)" |
788 | depends on !X86_VOYAGER | 803 | depends on !X86_VOYAGER |
diff --git a/arch/i386/kernel/asm-offsets.c b/arch/i386/kernel/asm-offsets.c index 1c3a809e6421..c80271f8f084 100644 --- a/arch/i386/kernel/asm-offsets.c +++ b/arch/i386/kernel/asm-offsets.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <asm/fixmap.h> | 14 | #include <asm/fixmap.h> |
15 | #include <asm/processor.h> | 15 | #include <asm/processor.h> |
16 | #include <asm/thread_info.h> | 16 | #include <asm/thread_info.h> |
17 | #include <asm/elf.h> | ||
17 | 18 | ||
18 | #define DEFINE(sym, val) \ | 19 | #define DEFINE(sym, val) \ |
19 | asm volatile("\n->" #sym " %0 " #val : : "i" (val)) | 20 | asm volatile("\n->" #sym " %0 " #val : : "i" (val)) |
@@ -54,6 +55,7 @@ void foo(void) | |||
54 | OFFSET(TI_preempt_count, thread_info, preempt_count); | 55 | OFFSET(TI_preempt_count, thread_info, preempt_count); |
55 | OFFSET(TI_addr_limit, thread_info, addr_limit); | 56 | OFFSET(TI_addr_limit, thread_info, addr_limit); |
56 | OFFSET(TI_restart_block, thread_info, restart_block); | 57 | OFFSET(TI_restart_block, thread_info, restart_block); |
58 | OFFSET(TI_sysenter_return, thread_info, sysenter_return); | ||
57 | BLANK(); | 59 | BLANK(); |
58 | 60 | ||
59 | OFFSET(EXEC_DOMAIN_handler, exec_domain, handler); | 61 | OFFSET(EXEC_DOMAIN_handler, exec_domain, handler); |
@@ -69,7 +71,7 @@ void foo(void) | |||
69 | sizeof(struct tss_struct)); | 71 | sizeof(struct tss_struct)); |
70 | 72 | ||
71 | DEFINE(PAGE_SIZE_asm, PAGE_SIZE); | 73 | DEFINE(PAGE_SIZE_asm, PAGE_SIZE); |
72 | DEFINE(VSYSCALL_BASE, __fix_to_virt(FIX_VSYSCALL)); | 74 | DEFINE(VDSO_PRELINK, VDSO_PRELINK); |
73 | 75 | ||
74 | OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); | 76 | OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); |
75 | } | 77 | } |
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c index fd0457c9c827..e6a2d6b80cda 100644 --- a/arch/i386/kernel/cpu/amd.c +++ b/arch/i386/kernel/cpu/amd.c | |||
@@ -235,10 +235,10 @@ static void __init init_amd(struct cpuinfo_x86 *c) | |||
235 | while ((1 << bits) < c->x86_max_cores) | 235 | while ((1 << bits) < c->x86_max_cores) |
236 | bits++; | 236 | bits++; |
237 | } | 237 | } |
238 | cpu_core_id[cpu] = phys_proc_id[cpu] & ((1<<bits)-1); | 238 | c->cpu_core_id = c->phys_proc_id & ((1<<bits)-1); |
239 | phys_proc_id[cpu] >>= bits; | 239 | c->phys_proc_id >>= bits; |
240 | printk(KERN_INFO "CPU %d(%d) -> Core %d\n", | 240 | printk(KERN_INFO "CPU %d(%d) -> Core %d\n", |
241 | cpu, c->x86_max_cores, cpu_core_id[cpu]); | 241 | cpu, c->x86_max_cores, c->cpu_core_id); |
242 | } | 242 | } |
243 | #endif | 243 | #endif |
244 | 244 | ||
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c index 44f2c5f2dda1..70c87de582c7 100644 --- a/arch/i386/kernel/cpu/common.c +++ b/arch/i386/kernel/cpu/common.c | |||
@@ -294,7 +294,7 @@ void __cpuinit generic_identify(struct cpuinfo_x86 * c) | |||
294 | if (c->x86 >= 0x6) | 294 | if (c->x86 >= 0x6) |
295 | c->x86_model += ((tfms >> 16) & 0xF) << 4; | 295 | c->x86_model += ((tfms >> 16) & 0xF) << 4; |
296 | c->x86_mask = tfms & 15; | 296 | c->x86_mask = tfms & 15; |
297 | #ifdef CONFIG_SMP | 297 | #ifdef CONFIG_X86_HT |
298 | c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); | 298 | c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); |
299 | #else | 299 | #else |
300 | c->apicid = (ebx >> 24) & 0xFF; | 300 | c->apicid = (ebx >> 24) & 0xFF; |
@@ -319,7 +319,7 @@ void __cpuinit generic_identify(struct cpuinfo_x86 * c) | |||
319 | early_intel_workaround(c); | 319 | early_intel_workaround(c); |
320 | 320 | ||
321 | #ifdef CONFIG_X86_HT | 321 | #ifdef CONFIG_X86_HT |
322 | phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff; | 322 | c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff; |
323 | #endif | 323 | #endif |
324 | } | 324 | } |
325 | 325 | ||
@@ -477,11 +477,9 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
477 | { | 477 | { |
478 | u32 eax, ebx, ecx, edx; | 478 | u32 eax, ebx, ecx, edx; |
479 | int index_msb, core_bits; | 479 | int index_msb, core_bits; |
480 | int cpu = smp_processor_id(); | ||
481 | 480 | ||
482 | cpuid(1, &eax, &ebx, &ecx, &edx); | 481 | cpuid(1, &eax, &ebx, &ecx, &edx); |
483 | 482 | ||
484 | |||
485 | if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY)) | 483 | if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY)) |
486 | return; | 484 | return; |
487 | 485 | ||
@@ -492,16 +490,17 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
492 | } else if (smp_num_siblings > 1 ) { | 490 | } else if (smp_num_siblings > 1 ) { |
493 | 491 | ||
494 | if (smp_num_siblings > NR_CPUS) { | 492 | if (smp_num_siblings > NR_CPUS) { |
495 | printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings); | 493 | printk(KERN_WARNING "CPU: Unsupported number of the " |
494 | "siblings %d", smp_num_siblings); | ||
496 | smp_num_siblings = 1; | 495 | smp_num_siblings = 1; |
497 | return; | 496 | return; |
498 | } | 497 | } |
499 | 498 | ||
500 | index_msb = get_count_order(smp_num_siblings); | 499 | index_msb = get_count_order(smp_num_siblings); |
501 | phys_proc_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb); | 500 | c->phys_proc_id = phys_pkg_id((ebx >> 24) & 0xFF, index_msb); |
502 | 501 | ||
503 | printk(KERN_INFO "CPU: Physical Processor ID: %d\n", | 502 | printk(KERN_INFO "CPU: Physical Processor ID: %d\n", |
504 | phys_proc_id[cpu]); | 503 | c->phys_proc_id); |
505 | 504 | ||
506 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; | 505 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; |
507 | 506 | ||
@@ -509,12 +508,12 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c) | |||
509 | 508 | ||
510 | core_bits = get_count_order(c->x86_max_cores); | 509 | core_bits = get_count_order(c->x86_max_cores); |
511 | 510 | ||
512 | cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) & | 511 | c->cpu_core_id = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) & |
513 | ((1 << core_bits) - 1); | 512 | ((1 << core_bits) - 1); |
514 | 513 | ||
515 | if (c->x86_max_cores > 1) | 514 | if (c->x86_max_cores > 1) |
516 | printk(KERN_INFO "CPU: Processor Core ID: %d\n", | 515 | printk(KERN_INFO "CPU: Processor Core ID: %d\n", |
517 | cpu_core_id[cpu]); | 516 | c->cpu_core_id); |
518 | } | 517 | } |
519 | } | 518 | } |
520 | #endif | 519 | #endif |
@@ -613,6 +612,12 @@ void __cpuinit cpu_init(void) | |||
613 | set_in_cr4(X86_CR4_TSD); | 612 | set_in_cr4(X86_CR4_TSD); |
614 | } | 613 | } |
615 | 614 | ||
615 | /* The CPU hotplug case */ | ||
616 | if (cpu_gdt_descr->address) { | ||
617 | gdt = (struct desc_struct *)cpu_gdt_descr->address; | ||
618 | memset(gdt, 0, PAGE_SIZE); | ||
619 | goto old_gdt; | ||
620 | } | ||
616 | /* | 621 | /* |
617 | * This is a horrible hack to allocate the GDT. The problem | 622 | * This is a horrible hack to allocate the GDT. The problem |
618 | * is that cpu_init() is called really early for the boot CPU | 623 | * is that cpu_init() is called really early for the boot CPU |
@@ -631,7 +636,7 @@ void __cpuinit cpu_init(void) | |||
631 | local_irq_enable(); | 636 | local_irq_enable(); |
632 | } | 637 | } |
633 | } | 638 | } |
634 | 639 | old_gdt: | |
635 | /* | 640 | /* |
636 | * Initialize the per-CPU GDT with the boot GDT, | 641 | * Initialize the per-CPU GDT with the boot GDT, |
637 | * and set up the GDT descriptor: | 642 | * and set up the GDT descriptor: |
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c index 6c37b4fd8ce2..e9f0b928b0a9 100644 --- a/arch/i386/kernel/cpu/intel_cacheinfo.c +++ b/arch/i386/kernel/cpu/intel_cacheinfo.c | |||
@@ -159,13 +159,13 @@ union l2_cache { | |||
159 | unsigned val; | 159 | unsigned val; |
160 | }; | 160 | }; |
161 | 161 | ||
162 | static unsigned short assocs[] = { | 162 | static const unsigned short assocs[] = { |
163 | [1] = 1, [2] = 2, [4] = 4, [6] = 8, | 163 | [1] = 1, [2] = 2, [4] = 4, [6] = 8, |
164 | [8] = 16, | 164 | [8] = 16, |
165 | [0xf] = 0xffff // ?? | 165 | [0xf] = 0xffff // ?? |
166 | }; | 166 | }; |
167 | static unsigned char levels[] = { 1, 1, 2 }; | 167 | static const unsigned char levels[] = { 1, 1, 2 }; |
168 | static unsigned char types[] = { 1, 2, 3 }; | 168 | static const unsigned char types[] = { 1, 2, 3 }; |
169 | 169 | ||
170 | static void __cpuinit amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax, | 170 | static void __cpuinit amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax, |
171 | union _cpuid4_leaf_ebx *ebx, | 171 | union _cpuid4_leaf_ebx *ebx, |
@@ -261,7 +261,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c) | |||
261 | unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */ | 261 | unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */ |
262 | unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */ | 262 | unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */ |
263 | unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb; | 263 | unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb; |
264 | #ifdef CONFIG_SMP | 264 | #ifdef CONFIG_X86_HT |
265 | unsigned int cpu = (c == &boot_cpu_data) ? 0 : (c - cpu_data); | 265 | unsigned int cpu = (c == &boot_cpu_data) ? 0 : (c - cpu_data); |
266 | #endif | 266 | #endif |
267 | 267 | ||
@@ -383,14 +383,14 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c) | |||
383 | 383 | ||
384 | if (new_l2) { | 384 | if (new_l2) { |
385 | l2 = new_l2; | 385 | l2 = new_l2; |
386 | #ifdef CONFIG_SMP | 386 | #ifdef CONFIG_X86_HT |
387 | cpu_llc_id[cpu] = l2_id; | 387 | cpu_llc_id[cpu] = l2_id; |
388 | #endif | 388 | #endif |
389 | } | 389 | } |
390 | 390 | ||
391 | if (new_l3) { | 391 | if (new_l3) { |
392 | l3 = new_l3; | 392 | l3 = new_l3; |
393 | #ifdef CONFIG_SMP | 393 | #ifdef CONFIG_X86_HT |
394 | cpu_llc_id[cpu] = l3_id; | 394 | cpu_llc_id[cpu] = l3_id; |
395 | #endif | 395 | #endif |
396 | } | 396 | } |
@@ -729,7 +729,7 @@ static void __cpuexit cache_remove_dev(struct sys_device * sys_dev) | |||
729 | return; | 729 | return; |
730 | } | 730 | } |
731 | 731 | ||
732 | static int cacheinfo_cpu_callback(struct notifier_block *nfb, | 732 | static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb, |
733 | unsigned long action, void *hcpu) | 733 | unsigned long action, void *hcpu) |
734 | { | 734 | { |
735 | unsigned int cpu = (unsigned long)hcpu; | 735 | unsigned int cpu = (unsigned long)hcpu; |
@@ -747,7 +747,7 @@ static int cacheinfo_cpu_callback(struct notifier_block *nfb, | |||
747 | return NOTIFY_OK; | 747 | return NOTIFY_OK; |
748 | } | 748 | } |
749 | 749 | ||
750 | static struct notifier_block cacheinfo_cpu_notifier = | 750 | static struct notifier_block __cpuinitdata cacheinfo_cpu_notifier = |
751 | { | 751 | { |
752 | .notifier_call = cacheinfo_cpu_callback, | 752 | .notifier_call = cacheinfo_cpu_callback, |
753 | }; | 753 | }; |
diff --git a/arch/i386/kernel/cpu/proc.c b/arch/i386/kernel/cpu/proc.c index a19fcb262dbb..f54a15268ed7 100644 --- a/arch/i386/kernel/cpu/proc.c +++ b/arch/i386/kernel/cpu/proc.c | |||
@@ -18,7 +18,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
18 | * applications want to get the raw CPUID data, they should access | 18 | * applications want to get the raw CPUID data, they should access |
19 | * /dev/cpu/<cpu_nr>/cpuid instead. | 19 | * /dev/cpu/<cpu_nr>/cpuid instead. |
20 | */ | 20 | */ |
21 | static char *x86_cap_flags[] = { | 21 | static const char * const x86_cap_flags[] = { |
22 | /* Intel-defined */ | 22 | /* Intel-defined */ |
23 | "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", | 23 | "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", |
24 | "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", | 24 | "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", |
@@ -62,7 +62,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
62 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | 62 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
63 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | 63 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
64 | }; | 64 | }; |
65 | static char *x86_power_flags[] = { | 65 | static const char * const x86_power_flags[] = { |
66 | "ts", /* temperature sensor */ | 66 | "ts", /* temperature sensor */ |
67 | "fid", /* frequency id control */ | 67 | "fid", /* frequency id control */ |
68 | "vid", /* voltage id control */ | 68 | "vid", /* voltage id control */ |
@@ -109,9 +109,9 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
109 | seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); | 109 | seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); |
110 | #ifdef CONFIG_X86_HT | 110 | #ifdef CONFIG_X86_HT |
111 | if (c->x86_max_cores * smp_num_siblings > 1) { | 111 | if (c->x86_max_cores * smp_num_siblings > 1) { |
112 | seq_printf(m, "physical id\t: %d\n", phys_proc_id[n]); | 112 | seq_printf(m, "physical id\t: %d\n", c->phys_proc_id); |
113 | seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[n])); | 113 | seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[n])); |
114 | seq_printf(m, "core id\t\t: %d\n", cpu_core_id[n]); | 114 | seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id); |
115 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); | 115 | seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); |
116 | } | 116 | } |
117 | #endif | 117 | #endif |
diff --git a/arch/i386/kernel/cpuid.c b/arch/i386/kernel/cpuid.c index 1d9a4abcdfc7..f6dfa9fb675c 100644 --- a/arch/i386/kernel/cpuid.c +++ b/arch/i386/kernel/cpuid.c | |||
@@ -183,7 +183,7 @@ static int cpuid_class_cpu_callback(struct notifier_block *nfb, unsigned long ac | |||
183 | return NOTIFY_OK; | 183 | return NOTIFY_OK; |
184 | } | 184 | } |
185 | 185 | ||
186 | static struct notifier_block cpuid_class_cpu_notifier = | 186 | static struct notifier_block __cpuinitdata cpuid_class_cpu_notifier = |
187 | { | 187 | { |
188 | .notifier_call = cpuid_class_cpu_callback, | 188 | .notifier_call = cpuid_class_cpu_callback, |
189 | }; | 189 | }; |
diff --git a/arch/i386/kernel/efi.c b/arch/i386/kernel/efi.c index 9202b67c4b2e..8beb0f07d999 100644 --- a/arch/i386/kernel/efi.c +++ b/arch/i386/kernel/efi.c | |||
@@ -601,8 +601,10 @@ efi_initialize_iomem_resources(struct resource *code_resource, | |||
601 | res->end = res->start + ((md->num_pages << EFI_PAGE_SHIFT) - 1); | 601 | res->end = res->start + ((md->num_pages << EFI_PAGE_SHIFT) - 1); |
602 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; | 602 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
603 | if (request_resource(&iomem_resource, res) < 0) | 603 | if (request_resource(&iomem_resource, res) < 0) |
604 | printk(KERN_ERR PFX "Failed to allocate res %s : 0x%lx-0x%lx\n", | 604 | printk(KERN_ERR PFX "Failed to allocate res %s : " |
605 | res->name, res->start, res->end); | 605 | "0x%llx-0x%llx\n", res->name, |
606 | (unsigned long long)res->start, | ||
607 | (unsigned long long)res->end); | ||
606 | /* | 608 | /* |
607 | * We don't know which region contains kernel data so we try | 609 | * We don't know which region contains kernel data so we try |
608 | * it repeatedly and let the resource manager test it. | 610 | * it repeatedly and let the resource manager test it. |
diff --git a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S index e6e4506e749a..fbdb933251b6 100644 --- a/arch/i386/kernel/entry.S +++ b/arch/i386/kernel/entry.S | |||
@@ -83,6 +83,12 @@ VM_MASK = 0x00020000 | |||
83 | #define resume_kernel restore_nocheck | 83 | #define resume_kernel restore_nocheck |
84 | #endif | 84 | #endif |
85 | 85 | ||
86 | #ifdef CONFIG_VM86 | ||
87 | #define resume_userspace_sig check_userspace | ||
88 | #else | ||
89 | #define resume_userspace_sig resume_userspace | ||
90 | #endif | ||
91 | |||
86 | #define SAVE_ALL \ | 92 | #define SAVE_ALL \ |
87 | cld; \ | 93 | cld; \ |
88 | pushl %es; \ | 94 | pushl %es; \ |
@@ -211,6 +217,7 @@ ret_from_exception: | |||
211 | preempt_stop | 217 | preempt_stop |
212 | ret_from_intr: | 218 | ret_from_intr: |
213 | GET_THREAD_INFO(%ebp) | 219 | GET_THREAD_INFO(%ebp) |
220 | check_userspace: | ||
214 | movl EFLAGS(%esp), %eax # mix EFLAGS and CS | 221 | movl EFLAGS(%esp), %eax # mix EFLAGS and CS |
215 | movb CS(%esp), %al | 222 | movb CS(%esp), %al |
216 | testl $(VM_MASK | 3), %eax | 223 | testl $(VM_MASK | 3), %eax |
@@ -263,7 +270,12 @@ sysenter_past_esp: | |||
263 | pushl $(__USER_CS) | 270 | pushl $(__USER_CS) |
264 | CFI_ADJUST_CFA_OFFSET 4 | 271 | CFI_ADJUST_CFA_OFFSET 4 |
265 | /*CFI_REL_OFFSET cs, 0*/ | 272 | /*CFI_REL_OFFSET cs, 0*/ |
266 | pushl $SYSENTER_RETURN | 273 | /* |
274 | * Push current_thread_info()->sysenter_return to the stack. | ||
275 | * A tiny bit of offset fixup is necessary - 4*4 means the 4 words | ||
276 | * pushed above; +8 corresponds to copy_thread's esp0 setting. | ||
277 | */ | ||
278 | pushl (TI_sysenter_return-THREAD_SIZE+8+4*4)(%esp) | ||
267 | CFI_ADJUST_CFA_OFFSET 4 | 279 | CFI_ADJUST_CFA_OFFSET 4 |
268 | CFI_REL_OFFSET eip, 0 | 280 | CFI_REL_OFFSET eip, 0 |
269 | 281 | ||
@@ -415,7 +427,7 @@ work_notifysig: # deal with pending signals and | |||
415 | # vm86-space | 427 | # vm86-space |
416 | xorl %edx, %edx | 428 | xorl %edx, %edx |
417 | call do_notify_resume | 429 | call do_notify_resume |
418 | jmp resume_userspace | 430 | jmp resume_userspace_sig |
419 | 431 | ||
420 | ALIGN | 432 | ALIGN |
421 | work_notifysig_v86: | 433 | work_notifysig_v86: |
@@ -428,7 +440,7 @@ work_notifysig_v86: | |||
428 | movl %eax, %esp | 440 | movl %eax, %esp |
429 | xorl %edx, %edx | 441 | xorl %edx, %edx |
430 | call do_notify_resume | 442 | call do_notify_resume |
431 | jmp resume_userspace | 443 | jmp resume_userspace_sig |
432 | #endif | 444 | #endif |
433 | 445 | ||
434 | # perform syscall exit tracing | 446 | # perform syscall exit tracing |
@@ -515,7 +527,7 @@ ENTRY(irq_entries_start) | |||
515 | .if vector | 527 | .if vector |
516 | CFI_ADJUST_CFA_OFFSET -4 | 528 | CFI_ADJUST_CFA_OFFSET -4 |
517 | .endif | 529 | .endif |
518 | 1: pushl $vector-256 | 530 | 1: pushl $~(vector) |
519 | CFI_ADJUST_CFA_OFFSET 4 | 531 | CFI_ADJUST_CFA_OFFSET 4 |
520 | jmp common_interrupt | 532 | jmp common_interrupt |
521 | .data | 533 | .data |
@@ -535,7 +547,7 @@ common_interrupt: | |||
535 | #define BUILD_INTERRUPT(name, nr) \ | 547 | #define BUILD_INTERRUPT(name, nr) \ |
536 | ENTRY(name) \ | 548 | ENTRY(name) \ |
537 | RING0_INT_FRAME; \ | 549 | RING0_INT_FRAME; \ |
538 | pushl $nr-256; \ | 550 | pushl $~(nr); \ |
539 | CFI_ADJUST_CFA_OFFSET 4; \ | 551 | CFI_ADJUST_CFA_OFFSET 4; \ |
540 | SAVE_ALL; \ | 552 | SAVE_ALL; \ |
541 | movl %esp,%eax; \ | 553 | movl %esp,%eax; \ |
diff --git a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c index c1a42feba286..3c6063671a9f 100644 --- a/arch/i386/kernel/i8259.c +++ b/arch/i386/kernel/i8259.c | |||
@@ -132,7 +132,7 @@ void make_8259A_irq(unsigned int irq) | |||
132 | { | 132 | { |
133 | disable_irq_nosync(irq); | 133 | disable_irq_nosync(irq); |
134 | io_apic_irqs &= ~(1<<irq); | 134 | io_apic_irqs &= ~(1<<irq); |
135 | irq_desc[irq].handler = &i8259A_irq_type; | 135 | irq_desc[irq].chip = &i8259A_irq_type; |
136 | enable_irq(irq); | 136 | enable_irq(irq); |
137 | } | 137 | } |
138 | 138 | ||
@@ -386,12 +386,12 @@ void __init init_ISA_irqs (void) | |||
386 | /* | 386 | /* |
387 | * 16 old-style INTA-cycle interrupts: | 387 | * 16 old-style INTA-cycle interrupts: |
388 | */ | 388 | */ |
389 | irq_desc[i].handler = &i8259A_irq_type; | 389 | irq_desc[i].chip = &i8259A_irq_type; |
390 | } else { | 390 | } else { |
391 | /* | 391 | /* |
392 | * 'high' PCI IRQs filled in on demand | 392 | * 'high' PCI IRQs filled in on demand |
393 | */ | 393 | */ |
394 | irq_desc[i].handler = &no_irq_type; | 394 | irq_desc[i].chip = &no_irq_type; |
395 | } | 395 | } |
396 | } | 396 | } |
397 | } | 397 | } |
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c index 72ae414e4d49..ec9ea0269d36 100644 --- a/arch/i386/kernel/io_apic.c +++ b/arch/i386/kernel/io_apic.c | |||
@@ -581,7 +581,7 @@ static int balanced_irq(void *unused) | |||
581 | 581 | ||
582 | /* push everything to CPU 0 to give us a starting point. */ | 582 | /* push everything to CPU 0 to give us a starting point. */ |
583 | for (i = 0 ; i < NR_IRQS ; i++) { | 583 | for (i = 0 ; i < NR_IRQS ; i++) { |
584 | pending_irq_cpumask[i] = cpumask_of_cpu(0); | 584 | irq_desc[i].pending_mask = cpumask_of_cpu(0); |
585 | set_pending_irq(i, cpumask_of_cpu(0)); | 585 | set_pending_irq(i, cpumask_of_cpu(0)); |
586 | } | 586 | } |
587 | 587 | ||
@@ -1205,15 +1205,17 @@ static struct hw_interrupt_type ioapic_edge_type; | |||
1205 | #define IOAPIC_EDGE 0 | 1205 | #define IOAPIC_EDGE 0 |
1206 | #define IOAPIC_LEVEL 1 | 1206 | #define IOAPIC_LEVEL 1 |
1207 | 1207 | ||
1208 | static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) | 1208 | static void ioapic_register_intr(int irq, int vector, unsigned long trigger) |
1209 | { | 1209 | { |
1210 | unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; | 1210 | unsigned idx; |
1211 | |||
1212 | idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; | ||
1211 | 1213 | ||
1212 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || | 1214 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
1213 | trigger == IOAPIC_LEVEL) | 1215 | trigger == IOAPIC_LEVEL) |
1214 | irq_desc[idx].handler = &ioapic_level_type; | 1216 | irq_desc[idx].chip = &ioapic_level_type; |
1215 | else | 1217 | else |
1216 | irq_desc[idx].handler = &ioapic_edge_type; | 1218 | irq_desc[idx].chip = &ioapic_edge_type; |
1217 | set_intr_gate(vector, interrupt[idx]); | 1219 | set_intr_gate(vector, interrupt[idx]); |
1218 | } | 1220 | } |
1219 | 1221 | ||
@@ -1325,7 +1327,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in | |||
1325 | * The timer IRQ doesn't have to know that behind the | 1327 | * The timer IRQ doesn't have to know that behind the |
1326 | * scene we have a 8259A-master in AEOI mode ... | 1328 | * scene we have a 8259A-master in AEOI mode ... |
1327 | */ | 1329 | */ |
1328 | irq_desc[0].handler = &ioapic_edge_type; | 1330 | irq_desc[0].chip = &ioapic_edge_type; |
1329 | 1331 | ||
1330 | /* | 1332 | /* |
1331 | * Add it to the IO-APIC irq-routing table: | 1333 | * Add it to the IO-APIC irq-routing table: |
@@ -2069,6 +2071,13 @@ static void set_ioapic_affinity_vector (unsigned int vector, | |||
2069 | #endif | 2071 | #endif |
2070 | #endif | 2072 | #endif |
2071 | 2073 | ||
2074 | static int ioapic_retrigger(unsigned int irq) | ||
2075 | { | ||
2076 | send_IPI_self(IO_APIC_VECTOR(irq)); | ||
2077 | |||
2078 | return 1; | ||
2079 | } | ||
2080 | |||
2072 | /* | 2081 | /* |
2073 | * Level and edge triggered IO-APIC interrupts need different handling, | 2082 | * Level and edge triggered IO-APIC interrupts need different handling, |
2074 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be | 2083 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be |
@@ -2088,6 +2097,7 @@ static struct hw_interrupt_type ioapic_edge_type __read_mostly = { | |||
2088 | #ifdef CONFIG_SMP | 2097 | #ifdef CONFIG_SMP |
2089 | .set_affinity = set_ioapic_affinity, | 2098 | .set_affinity = set_ioapic_affinity, |
2090 | #endif | 2099 | #endif |
2100 | .retrigger = ioapic_retrigger, | ||
2091 | }; | 2101 | }; |
2092 | 2102 | ||
2093 | static struct hw_interrupt_type ioapic_level_type __read_mostly = { | 2103 | static struct hw_interrupt_type ioapic_level_type __read_mostly = { |
@@ -2101,6 +2111,7 @@ static struct hw_interrupt_type ioapic_level_type __read_mostly = { | |||
2101 | #ifdef CONFIG_SMP | 2111 | #ifdef CONFIG_SMP |
2102 | .set_affinity = set_ioapic_affinity, | 2112 | .set_affinity = set_ioapic_affinity, |
2103 | #endif | 2113 | #endif |
2114 | .retrigger = ioapic_retrigger, | ||
2104 | }; | 2115 | }; |
2105 | 2116 | ||
2106 | static inline void init_IO_APIC_traps(void) | 2117 | static inline void init_IO_APIC_traps(void) |
@@ -2135,7 +2146,7 @@ static inline void init_IO_APIC_traps(void) | |||
2135 | make_8259A_irq(irq); | 2146 | make_8259A_irq(irq); |
2136 | else | 2147 | else |
2137 | /* Strange. Oh, well.. */ | 2148 | /* Strange. Oh, well.. */ |
2138 | irq_desc[irq].handler = &no_irq_type; | 2149 | irq_desc[irq].chip = &no_irq_type; |
2139 | } | 2150 | } |
2140 | } | 2151 | } |
2141 | } | 2152 | } |
@@ -2351,7 +2362,7 @@ static inline void check_timer(void) | |||
2351 | printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); | 2362 | printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); |
2352 | 2363 | ||
2353 | disable_8259A_irq(0); | 2364 | disable_8259A_irq(0); |
2354 | irq_desc[0].handler = &lapic_irq_type; | 2365 | irq_desc[0].chip = &lapic_irq_type; |
2355 | apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ | 2366 | apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ |
2356 | enable_8259A_irq(0); | 2367 | enable_8259A_irq(0); |
2357 | 2368 | ||
diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c index 061533e0cb5e..16b491703967 100644 --- a/arch/i386/kernel/irq.c +++ b/arch/i386/kernel/irq.c | |||
@@ -53,13 +53,19 @@ static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; | |||
53 | */ | 53 | */ |
54 | fastcall unsigned int do_IRQ(struct pt_regs *regs) | 54 | fastcall unsigned int do_IRQ(struct pt_regs *regs) |
55 | { | 55 | { |
56 | /* high bits used in ret_from_ code */ | 56 | /* high bit used in ret_from_ code */ |
57 | int irq = regs->orig_eax & 0xff; | 57 | int irq = ~regs->orig_eax; |
58 | #ifdef CONFIG_4KSTACKS | 58 | #ifdef CONFIG_4KSTACKS |
59 | union irq_ctx *curctx, *irqctx; | 59 | union irq_ctx *curctx, *irqctx; |
60 | u32 *isp; | 60 | u32 *isp; |
61 | #endif | 61 | #endif |
62 | 62 | ||
63 | if (unlikely((unsigned)irq >= NR_IRQS)) { | ||
64 | printk(KERN_EMERG "%s: cannot handle IRQ %d\n", | ||
65 | __FUNCTION__, irq); | ||
66 | BUG(); | ||
67 | } | ||
68 | |||
63 | irq_enter(); | 69 | irq_enter(); |
64 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | 70 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
65 | /* Debugging check for stack overflow: is there less than 1KB free? */ | 71 | /* Debugging check for stack overflow: is there less than 1KB free? */ |
@@ -76,6 +82,10 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs) | |||
76 | } | 82 | } |
77 | #endif | 83 | #endif |
78 | 84 | ||
85 | if (!irq_desc[irq].handle_irq) { | ||
86 | __do_IRQ(irq, regs); | ||
87 | goto out_exit; | ||
88 | } | ||
79 | #ifdef CONFIG_4KSTACKS | 89 | #ifdef CONFIG_4KSTACKS |
80 | 90 | ||
81 | curctx = (union irq_ctx *) current_thread_info(); | 91 | curctx = (union irq_ctx *) current_thread_info(); |
@@ -100,8 +110,8 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs) | |||
100 | * softirq checks work in the hardirq context. | 110 | * softirq checks work in the hardirq context. |
101 | */ | 111 | */ |
102 | irqctx->tinfo.preempt_count = | 112 | irqctx->tinfo.preempt_count = |
103 | irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK | | 113 | (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) | |
104 | curctx->tinfo.preempt_count & SOFTIRQ_MASK; | 114 | (curctx->tinfo.preempt_count & SOFTIRQ_MASK); |
105 | 115 | ||
106 | asm volatile( | 116 | asm volatile( |
107 | " xchgl %%ebx,%%esp \n" | 117 | " xchgl %%ebx,%%esp \n" |
@@ -115,6 +125,7 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs) | |||
115 | #endif | 125 | #endif |
116 | __do_IRQ(irq, regs); | 126 | __do_IRQ(irq, regs); |
117 | 127 | ||
128 | out_exit: | ||
118 | irq_exit(); | 129 | irq_exit(); |
119 | 130 | ||
120 | return 1; | 131 | return 1; |
@@ -243,7 +254,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
243 | for_each_online_cpu(j) | 254 | for_each_online_cpu(j) |
244 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 255 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
245 | #endif | 256 | #endif |
246 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 257 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
247 | seq_printf(p, " %s", action->name); | 258 | seq_printf(p, " %s", action->name); |
248 | 259 | ||
249 | for (action=action->next; action; action = action->next) | 260 | for (action=action->next; action; action = action->next) |
@@ -285,13 +296,13 @@ void fixup_irqs(cpumask_t map) | |||
285 | if (irq == 2) | 296 | if (irq == 2) |
286 | continue; | 297 | continue; |
287 | 298 | ||
288 | cpus_and(mask, irq_affinity[irq], map); | 299 | cpus_and(mask, irq_desc[irq].affinity, map); |
289 | if (any_online_cpu(mask) == NR_CPUS) { | 300 | if (any_online_cpu(mask) == NR_CPUS) { |
290 | printk("Breaking affinity for irq %i\n", irq); | 301 | printk("Breaking affinity for irq %i\n", irq); |
291 | mask = map; | 302 | mask = map; |
292 | } | 303 | } |
293 | if (irq_desc[irq].handler->set_affinity) | 304 | if (irq_desc[irq].chip->set_affinity) |
294 | irq_desc[irq].handler->set_affinity(irq, mask); | 305 | irq_desc[irq].chip->set_affinity(irq, mask); |
295 | else if (irq_desc[irq].action && !(warned++)) | 306 | else if (irq_desc[irq].action && !(warned++)) |
296 | printk("Cannot set affinity for irq %i\n", irq); | 307 | printk("Cannot set affinity for irq %i\n", irq); |
297 | } | 308 | } |
diff --git a/arch/i386/kernel/microcode.c b/arch/i386/kernel/microcode.c index 0a865889b2a9..40b44cc0d14b 100644 --- a/arch/i386/kernel/microcode.c +++ b/arch/i386/kernel/microcode.c | |||
@@ -493,7 +493,6 @@ static struct file_operations microcode_fops = { | |||
493 | static struct miscdevice microcode_dev = { | 493 | static struct miscdevice microcode_dev = { |
494 | .minor = MICROCODE_MINOR, | 494 | .minor = MICROCODE_MINOR, |
495 | .name = "microcode", | 495 | .name = "microcode", |
496 | .devfs_name = "cpu/microcode", | ||
497 | .fops = µcode_fops, | 496 | .fops = µcode_fops, |
498 | }; | 497 | }; |
499 | 498 | ||
diff --git a/arch/i386/kernel/msr.c b/arch/i386/kernel/msr.c index 7a328230e540..d022cb8fd725 100644 --- a/arch/i386/kernel/msr.c +++ b/arch/i386/kernel/msr.c | |||
@@ -266,7 +266,7 @@ static int msr_class_cpu_callback(struct notifier_block *nfb, unsigned long acti | |||
266 | return NOTIFY_OK; | 266 | return NOTIFY_OK; |
267 | } | 267 | } |
268 | 268 | ||
269 | static struct notifier_block msr_class_cpu_notifier = | 269 | static struct notifier_block __cpuinitdata msr_class_cpu_notifier = |
270 | { | 270 | { |
271 | .notifier_call = msr_class_cpu_callback, | 271 | .notifier_call = msr_class_cpu_callback, |
272 | }; | 272 | }; |
diff --git a/arch/i386/kernel/scx200.c b/arch/i386/kernel/scx200.c index 321f5fd26e75..9bf590cefc7d 100644 --- a/arch/i386/kernel/scx200.c +++ b/arch/i386/kernel/scx200.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <linux/errno.h> | 9 | #include <linux/errno.h> |
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/mutex.h> | ||
12 | #include <linux/pci.h> | 13 | #include <linux/pci.h> |
13 | 14 | ||
14 | #include <linux/scx200.h> | 15 | #include <linux/scx200.h> |
@@ -45,11 +46,19 @@ static struct pci_driver scx200_pci_driver = { | |||
45 | .probe = scx200_probe, | 46 | .probe = scx200_probe, |
46 | }; | 47 | }; |
47 | 48 | ||
48 | static DEFINE_SPINLOCK(scx200_gpio_config_lock); | 49 | static DEFINE_MUTEX(scx200_gpio_config_lock); |
49 | 50 | ||
50 | static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | 51 | static void __devinit scx200_init_shadow(void) |
51 | { | 52 | { |
52 | int bank; | 53 | int bank; |
54 | |||
55 | /* read the current values driven on the GPIO signals */ | ||
56 | for (bank = 0; bank < 2; ++bank) | ||
57 | scx200_gpio_shadow[bank] = inl(scx200_gpio_base + 0x10 * bank); | ||
58 | } | ||
59 | |||
60 | static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
61 | { | ||
53 | unsigned base; | 62 | unsigned base; |
54 | 63 | ||
55 | if (pdev->device == PCI_DEVICE_ID_NS_SCx200_BRIDGE || | 64 | if (pdev->device == PCI_DEVICE_ID_NS_SCx200_BRIDGE || |
@@ -63,10 +72,7 @@ static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_ | |||
63 | } | 72 | } |
64 | 73 | ||
65 | scx200_gpio_base = base; | 74 | scx200_gpio_base = base; |
66 | 75 | scx200_init_shadow(); | |
67 | /* read the current values driven on the GPIO signals */ | ||
68 | for (bank = 0; bank < 2; ++bank) | ||
69 | scx200_gpio_shadow[bank] = inl(scx200_gpio_base + 0x10 * bank); | ||
70 | 76 | ||
71 | } else { | 77 | } else { |
72 | /* find the base of the Configuration Block */ | 78 | /* find the base of the Configuration Block */ |
@@ -87,12 +93,11 @@ static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_ | |||
87 | return 0; | 93 | return 0; |
88 | } | 94 | } |
89 | 95 | ||
90 | u32 scx200_gpio_configure(int index, u32 mask, u32 bits) | 96 | u32 scx200_gpio_configure(unsigned index, u32 mask, u32 bits) |
91 | { | 97 | { |
92 | u32 config, new_config; | 98 | u32 config, new_config; |
93 | unsigned long flags; | ||
94 | 99 | ||
95 | spin_lock_irqsave(&scx200_gpio_config_lock, flags); | 100 | mutex_lock(&scx200_gpio_config_lock); |
96 | 101 | ||
97 | outl(index, scx200_gpio_base + 0x20); | 102 | outl(index, scx200_gpio_base + 0x20); |
98 | config = inl(scx200_gpio_base + 0x24); | 103 | config = inl(scx200_gpio_base + 0x24); |
@@ -100,45 +105,11 @@ u32 scx200_gpio_configure(int index, u32 mask, u32 bits) | |||
100 | new_config = (config & mask) | bits; | 105 | new_config = (config & mask) | bits; |
101 | outl(new_config, scx200_gpio_base + 0x24); | 106 | outl(new_config, scx200_gpio_base + 0x24); |
102 | 107 | ||
103 | spin_unlock_irqrestore(&scx200_gpio_config_lock, flags); | 108 | mutex_unlock(&scx200_gpio_config_lock); |
104 | 109 | ||
105 | return config; | 110 | return config; |
106 | } | 111 | } |
107 | 112 | ||
108 | #if 0 | ||
109 | void scx200_gpio_dump(unsigned index) | ||
110 | { | ||
111 | u32 config = scx200_gpio_configure(index, ~0, 0); | ||
112 | printk(KERN_DEBUG "GPIO%02u: 0x%08lx", index, (unsigned long)config); | ||
113 | |||
114 | if (config & 1) | ||
115 | printk(" OE"); /* output enabled */ | ||
116 | else | ||
117 | printk(" TS"); /* tristate */ | ||
118 | if (config & 2) | ||
119 | printk(" PP"); /* push pull */ | ||
120 | else | ||
121 | printk(" OD"); /* open drain */ | ||
122 | if (config & 4) | ||
123 | printk(" PUE"); /* pull up enabled */ | ||
124 | else | ||
125 | printk(" PUD"); /* pull up disabled */ | ||
126 | if (config & 8) | ||
127 | printk(" LOCKED"); /* locked */ | ||
128 | if (config & 16) | ||
129 | printk(" LEVEL"); /* level input */ | ||
130 | else | ||
131 | printk(" EDGE"); /* edge input */ | ||
132 | if (config & 32) | ||
133 | printk(" HI"); /* trigger on rising edge */ | ||
134 | else | ||
135 | printk(" LO"); /* trigger on falling edge */ | ||
136 | if (config & 64) | ||
137 | printk(" DEBOUNCE"); /* debounce */ | ||
138 | printk("\n"); | ||
139 | } | ||
140 | #endif /* 0 */ | ||
141 | |||
142 | static int __init scx200_init(void) | 113 | static int __init scx200_init(void) |
143 | { | 114 | { |
144 | printk(KERN_INFO NAME ": NatSemi SCx200 Driver\n"); | 115 | printk(KERN_INFO NAME ": NatSemi SCx200 Driver\n"); |
@@ -159,10 +130,3 @@ EXPORT_SYMBOL(scx200_gpio_base); | |||
159 | EXPORT_SYMBOL(scx200_gpio_shadow); | 130 | EXPORT_SYMBOL(scx200_gpio_shadow); |
160 | EXPORT_SYMBOL(scx200_gpio_configure); | 131 | EXPORT_SYMBOL(scx200_gpio_configure); |
161 | EXPORT_SYMBOL(scx200_cb_base); | 132 | EXPORT_SYMBOL(scx200_cb_base); |
162 | |||
163 | /* | ||
164 | Local variables: | ||
165 | compile-command: "make -k -C ../../.. SUBDIRS=arch/i386/kernel modules" | ||
166 | c-basic-offset: 8 | ||
167 | End: | ||
168 | */ | ||
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c index 4a65040cc624..6712f0d2eb37 100644 --- a/arch/i386/kernel/setup.c +++ b/arch/i386/kernel/setup.c | |||
@@ -1314,8 +1314,10 @@ legacy_init_iomem_resources(struct resource *code_resource, struct resource *dat | |||
1314 | probe_roms(); | 1314 | probe_roms(); |
1315 | for (i = 0; i < e820.nr_map; i++) { | 1315 | for (i = 0; i < e820.nr_map; i++) { |
1316 | struct resource *res; | 1316 | struct resource *res; |
1317 | #ifndef CONFIG_RESOURCES_64BIT | ||
1317 | if (e820.map[i].addr + e820.map[i].size > 0x100000000ULL) | 1318 | if (e820.map[i].addr + e820.map[i].size > 0x100000000ULL) |
1318 | continue; | 1319 | continue; |
1320 | #endif | ||
1319 | res = kzalloc(sizeof(struct resource), GFP_ATOMIC); | 1321 | res = kzalloc(sizeof(struct resource), GFP_ATOMIC); |
1320 | switch (e820.map[i].type) { | 1322 | switch (e820.map[i].type) { |
1321 | case E820_RAM: res->name = "System RAM"; break; | 1323 | case E820_RAM: res->name = "System RAM"; break; |
diff --git a/arch/i386/kernel/signal.c b/arch/i386/kernel/signal.c index 5c352c3a9e7f..43002cfb40c4 100644 --- a/arch/i386/kernel/signal.c +++ b/arch/i386/kernel/signal.c | |||
@@ -351,7 +351,7 @@ static int setup_frame(int sig, struct k_sigaction *ka, | |||
351 | goto give_sigsegv; | 351 | goto give_sigsegv; |
352 | } | 352 | } |
353 | 353 | ||
354 | restorer = &__kernel_sigreturn; | 354 | restorer = (void *)VDSO_SYM(&__kernel_sigreturn); |
355 | if (ka->sa.sa_flags & SA_RESTORER) | 355 | if (ka->sa.sa_flags & SA_RESTORER) |
356 | restorer = ka->sa.sa_restorer; | 356 | restorer = ka->sa.sa_restorer; |
357 | 357 | ||
@@ -447,7 +447,7 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
447 | goto give_sigsegv; | 447 | goto give_sigsegv; |
448 | 448 | ||
449 | /* Set up to return from userspace. */ | 449 | /* Set up to return from userspace. */ |
450 | restorer = &__kernel_rt_sigreturn; | 450 | restorer = (void *)VDSO_SYM(&__kernel_rt_sigreturn); |
451 | if (ka->sa.sa_flags & SA_RESTORER) | 451 | if (ka->sa.sa_flags & SA_RESTORER) |
452 | restorer = ka->sa.sa_restorer; | 452 | restorer = ka->sa.sa_restorer; |
453 | err |= __put_user(restorer, &frame->pretcode); | 453 | err |= __put_user(restorer, &frame->pretcode); |
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c index bce5470ecb42..89e7315e539c 100644 --- a/arch/i386/kernel/smpboot.c +++ b/arch/i386/kernel/smpboot.c | |||
@@ -67,12 +67,6 @@ int smp_num_siblings = 1; | |||
67 | EXPORT_SYMBOL(smp_num_siblings); | 67 | EXPORT_SYMBOL(smp_num_siblings); |
68 | #endif | 68 | #endif |
69 | 69 | ||
70 | /* Package ID of each logical CPU */ | ||
71 | int phys_proc_id[NR_CPUS] __read_mostly = {[0 ... NR_CPUS-1] = BAD_APICID}; | ||
72 | |||
73 | /* Core ID of each logical CPU */ | ||
74 | int cpu_core_id[NR_CPUS] __read_mostly = {[0 ... NR_CPUS-1] = BAD_APICID}; | ||
75 | |||
76 | /* Last level cache ID of each logical CPU */ | 70 | /* Last level cache ID of each logical CPU */ |
77 | int cpu_llc_id[NR_CPUS] __cpuinitdata = {[0 ... NR_CPUS-1] = BAD_APICID}; | 71 | int cpu_llc_id[NR_CPUS] __cpuinitdata = {[0 ... NR_CPUS-1] = BAD_APICID}; |
78 | 72 | ||
@@ -454,10 +448,12 @@ cpumask_t cpu_coregroup_map(int cpu) | |||
454 | struct cpuinfo_x86 *c = cpu_data + cpu; | 448 | struct cpuinfo_x86 *c = cpu_data + cpu; |
455 | /* | 449 | /* |
456 | * For perf, we return last level cache shared map. | 450 | * For perf, we return last level cache shared map. |
457 | * TBD: when power saving sched policy is added, we will return | 451 | * And for power savings, we return cpu_core_map |
458 | * cpu_core_map when power saving policy is enabled | ||
459 | */ | 452 | */ |
460 | return c->llc_shared_map; | 453 | if (sched_mc_power_savings || sched_smt_power_savings) |
454 | return cpu_core_map[cpu]; | ||
455 | else | ||
456 | return c->llc_shared_map; | ||
461 | } | 457 | } |
462 | 458 | ||
463 | /* representing cpus for which sibling maps can be computed */ | 459 | /* representing cpus for which sibling maps can be computed */ |
@@ -473,8 +469,8 @@ set_cpu_sibling_map(int cpu) | |||
473 | 469 | ||
474 | if (smp_num_siblings > 1) { | 470 | if (smp_num_siblings > 1) { |
475 | for_each_cpu_mask(i, cpu_sibling_setup_map) { | 471 | for_each_cpu_mask(i, cpu_sibling_setup_map) { |
476 | if (phys_proc_id[cpu] == phys_proc_id[i] && | 472 | if (c[cpu].phys_proc_id == c[i].phys_proc_id && |
477 | cpu_core_id[cpu] == cpu_core_id[i]) { | 473 | c[cpu].cpu_core_id == c[i].cpu_core_id) { |
478 | cpu_set(i, cpu_sibling_map[cpu]); | 474 | cpu_set(i, cpu_sibling_map[cpu]); |
479 | cpu_set(cpu, cpu_sibling_map[i]); | 475 | cpu_set(cpu, cpu_sibling_map[i]); |
480 | cpu_set(i, cpu_core_map[cpu]); | 476 | cpu_set(i, cpu_core_map[cpu]); |
@@ -501,7 +497,7 @@ set_cpu_sibling_map(int cpu) | |||
501 | cpu_set(i, c[cpu].llc_shared_map); | 497 | cpu_set(i, c[cpu].llc_shared_map); |
502 | cpu_set(cpu, c[i].llc_shared_map); | 498 | cpu_set(cpu, c[i].llc_shared_map); |
503 | } | 499 | } |
504 | if (phys_proc_id[cpu] == phys_proc_id[i]) { | 500 | if (c[cpu].phys_proc_id == c[i].phys_proc_id) { |
505 | cpu_set(i, cpu_core_map[cpu]); | 501 | cpu_set(i, cpu_core_map[cpu]); |
506 | cpu_set(cpu, cpu_core_map[i]); | 502 | cpu_set(cpu, cpu_core_map[i]); |
507 | /* | 503 | /* |
@@ -1056,6 +1052,7 @@ static int __cpuinit __smp_prepare_cpu(int cpu) | |||
1056 | struct warm_boot_cpu_info info; | 1052 | struct warm_boot_cpu_info info; |
1057 | struct work_struct task; | 1053 | struct work_struct task; |
1058 | int apicid, ret; | 1054 | int apicid, ret; |
1055 | struct Xgt_desc_struct *cpu_gdt_descr = &per_cpu(cpu_gdt_descr, cpu); | ||
1059 | 1056 | ||
1060 | apicid = x86_cpu_to_apicid[cpu]; | 1057 | apicid = x86_cpu_to_apicid[cpu]; |
1061 | if (apicid == BAD_APICID) { | 1058 | if (apicid == BAD_APICID) { |
@@ -1063,6 +1060,18 @@ static int __cpuinit __smp_prepare_cpu(int cpu) | |||
1063 | goto exit; | 1060 | goto exit; |
1064 | } | 1061 | } |
1065 | 1062 | ||
1063 | /* | ||
1064 | * the CPU isn't initialized at boot time, allocate gdt table here. | ||
1065 | * cpu_init will initialize it | ||
1066 | */ | ||
1067 | if (!cpu_gdt_descr->address) { | ||
1068 | cpu_gdt_descr->address = get_zeroed_page(GFP_KERNEL); | ||
1069 | if (!cpu_gdt_descr->address) | ||
1070 | printk(KERN_CRIT "CPU%d failed to allocate GDT\n", cpu); | ||
1071 | ret = -ENOMEM; | ||
1072 | goto exit; | ||
1073 | } | ||
1074 | |||
1066 | info.complete = &done; | 1075 | info.complete = &done; |
1067 | info.apicid = apicid; | 1076 | info.apicid = apicid; |
1068 | info.cpu = cpu; | 1077 | info.cpu = cpu; |
@@ -1340,8 +1349,8 @@ remove_siblinginfo(int cpu) | |||
1340 | cpu_clear(cpu, cpu_sibling_map[sibling]); | 1349 | cpu_clear(cpu, cpu_sibling_map[sibling]); |
1341 | cpus_clear(cpu_sibling_map[cpu]); | 1350 | cpus_clear(cpu_sibling_map[cpu]); |
1342 | cpus_clear(cpu_core_map[cpu]); | 1351 | cpus_clear(cpu_core_map[cpu]); |
1343 | phys_proc_id[cpu] = BAD_APICID; | 1352 | c[cpu].phys_proc_id = 0; |
1344 | cpu_core_id[cpu] = BAD_APICID; | 1353 | c[cpu].cpu_core_id = 0; |
1345 | cpu_clear(cpu, cpu_sibling_setup_map); | 1354 | cpu_clear(cpu, cpu_sibling_setup_map); |
1346 | } | 1355 | } |
1347 | 1356 | ||
diff --git a/arch/i386/kernel/sysenter.c b/arch/i386/kernel/sysenter.c index 0bada1870bdf..713ba39d32c6 100644 --- a/arch/i386/kernel/sysenter.c +++ b/arch/i386/kernel/sysenter.c | |||
@@ -2,6 +2,8 @@ | |||
2 | * linux/arch/i386/kernel/sysenter.c | 2 | * linux/arch/i386/kernel/sysenter.c |
3 | * | 3 | * |
4 | * (C) Copyright 2002 Linus Torvalds | 4 | * (C) Copyright 2002 Linus Torvalds |
5 | * Portions based on the vdso-randomization code from exec-shield: | ||
6 | * Copyright(C) 2005-2006, Red Hat, Inc., Ingo Molnar | ||
5 | * | 7 | * |
6 | * This file contains the needed initializations to support sysenter. | 8 | * This file contains the needed initializations to support sysenter. |
7 | */ | 9 | */ |
@@ -13,12 +15,31 @@ | |||
13 | #include <linux/gfp.h> | 15 | #include <linux/gfp.h> |
14 | #include <linux/string.h> | 16 | #include <linux/string.h> |
15 | #include <linux/elf.h> | 17 | #include <linux/elf.h> |
18 | #include <linux/mm.h> | ||
19 | #include <linux/module.h> | ||
16 | 20 | ||
17 | #include <asm/cpufeature.h> | 21 | #include <asm/cpufeature.h> |
18 | #include <asm/msr.h> | 22 | #include <asm/msr.h> |
19 | #include <asm/pgtable.h> | 23 | #include <asm/pgtable.h> |
20 | #include <asm/unistd.h> | 24 | #include <asm/unistd.h> |
21 | 25 | ||
26 | /* | ||
27 | * Should the kernel map a VDSO page into processes and pass its | ||
28 | * address down to glibc upon exec()? | ||
29 | */ | ||
30 | unsigned int __read_mostly vdso_enabled = 1; | ||
31 | |||
32 | EXPORT_SYMBOL_GPL(vdso_enabled); | ||
33 | |||
34 | static int __init vdso_setup(char *s) | ||
35 | { | ||
36 | vdso_enabled = simple_strtoul(s, NULL, 0); | ||
37 | |||
38 | return 1; | ||
39 | } | ||
40 | |||
41 | __setup("vdso=", vdso_setup); | ||
42 | |||
22 | extern asmlinkage void sysenter_entry(void); | 43 | extern asmlinkage void sysenter_entry(void); |
23 | 44 | ||
24 | void enable_sep_cpu(void) | 45 | void enable_sep_cpu(void) |
@@ -45,23 +66,120 @@ void enable_sep_cpu(void) | |||
45 | */ | 66 | */ |
46 | extern const char vsyscall_int80_start, vsyscall_int80_end; | 67 | extern const char vsyscall_int80_start, vsyscall_int80_end; |
47 | extern const char vsyscall_sysenter_start, vsyscall_sysenter_end; | 68 | extern const char vsyscall_sysenter_start, vsyscall_sysenter_end; |
69 | static void *syscall_page; | ||
48 | 70 | ||
49 | int __init sysenter_setup(void) | 71 | int __init sysenter_setup(void) |
50 | { | 72 | { |
51 | void *page = (void *)get_zeroed_page(GFP_ATOMIC); | 73 | syscall_page = (void *)get_zeroed_page(GFP_ATOMIC); |
52 | 74 | ||
53 | __set_fixmap(FIX_VSYSCALL, __pa(page), PAGE_READONLY_EXEC); | 75 | #ifdef CONFIG_COMPAT_VDSO |
76 | __set_fixmap(FIX_VDSO, __pa(syscall_page), PAGE_READONLY); | ||
77 | printk("Compat vDSO mapped to %08lx.\n", __fix_to_virt(FIX_VDSO)); | ||
78 | #else | ||
79 | /* | ||
80 | * In the non-compat case the ELF coredumping code needs the fixmap: | ||
81 | */ | ||
82 | __set_fixmap(FIX_VDSO, __pa(syscall_page), PAGE_KERNEL_RO); | ||
83 | #endif | ||
54 | 84 | ||
55 | if (!boot_cpu_has(X86_FEATURE_SEP)) { | 85 | if (!boot_cpu_has(X86_FEATURE_SEP)) { |
56 | memcpy(page, | 86 | memcpy(syscall_page, |
57 | &vsyscall_int80_start, | 87 | &vsyscall_int80_start, |
58 | &vsyscall_int80_end - &vsyscall_int80_start); | 88 | &vsyscall_int80_end - &vsyscall_int80_start); |
59 | return 0; | 89 | return 0; |
60 | } | 90 | } |
61 | 91 | ||
62 | memcpy(page, | 92 | memcpy(syscall_page, |
63 | &vsyscall_sysenter_start, | 93 | &vsyscall_sysenter_start, |
64 | &vsyscall_sysenter_end - &vsyscall_sysenter_start); | 94 | &vsyscall_sysenter_end - &vsyscall_sysenter_start); |
65 | 95 | ||
66 | return 0; | 96 | return 0; |
67 | } | 97 | } |
98 | |||
99 | static struct page *syscall_nopage(struct vm_area_struct *vma, | ||
100 | unsigned long adr, int *type) | ||
101 | { | ||
102 | struct page *p = virt_to_page(adr - vma->vm_start + syscall_page); | ||
103 | get_page(p); | ||
104 | return p; | ||
105 | } | ||
106 | |||
107 | /* Prevent VMA merging */ | ||
108 | static void syscall_vma_close(struct vm_area_struct *vma) | ||
109 | { | ||
110 | } | ||
111 | |||
112 | static struct vm_operations_struct syscall_vm_ops = { | ||
113 | .close = syscall_vma_close, | ||
114 | .nopage = syscall_nopage, | ||
115 | }; | ||
116 | |||
117 | /* Defined in vsyscall-sysenter.S */ | ||
118 | extern void SYSENTER_RETURN; | ||
119 | |||
120 | /* Setup a VMA at program startup for the vsyscall page */ | ||
121 | int arch_setup_additional_pages(struct linux_binprm *bprm, int exstack) | ||
122 | { | ||
123 | struct vm_area_struct *vma; | ||
124 | struct mm_struct *mm = current->mm; | ||
125 | unsigned long addr; | ||
126 | int ret; | ||
127 | |||
128 | down_write(&mm->mmap_sem); | ||
129 | addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0); | ||
130 | if (IS_ERR_VALUE(addr)) { | ||
131 | ret = addr; | ||
132 | goto up_fail; | ||
133 | } | ||
134 | |||
135 | vma = kmem_cache_zalloc(vm_area_cachep, SLAB_KERNEL); | ||
136 | if (!vma) { | ||
137 | ret = -ENOMEM; | ||
138 | goto up_fail; | ||
139 | } | ||
140 | |||
141 | vma->vm_start = addr; | ||
142 | vma->vm_end = addr + PAGE_SIZE; | ||
143 | /* MAYWRITE to allow gdb to COW and set breakpoints */ | ||
144 | vma->vm_flags = VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC|VM_MAYWRITE; | ||
145 | vma->vm_flags |= mm->def_flags; | ||
146 | vma->vm_page_prot = protection_map[vma->vm_flags & 7]; | ||
147 | vma->vm_ops = &syscall_vm_ops; | ||
148 | vma->vm_mm = mm; | ||
149 | |||
150 | ret = insert_vm_struct(mm, vma); | ||
151 | if (unlikely(ret)) { | ||
152 | kmem_cache_free(vm_area_cachep, vma); | ||
153 | goto up_fail; | ||
154 | } | ||
155 | |||
156 | current->mm->context.vdso = (void *)addr; | ||
157 | current_thread_info()->sysenter_return = | ||
158 | (void *)VDSO_SYM(&SYSENTER_RETURN); | ||
159 | mm->total_vm++; | ||
160 | up_fail: | ||
161 | up_write(&mm->mmap_sem); | ||
162 | return ret; | ||
163 | } | ||
164 | |||
165 | const char *arch_vma_name(struct vm_area_struct *vma) | ||
166 | { | ||
167 | if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso) | ||
168 | return "[vdso]"; | ||
169 | return NULL; | ||
170 | } | ||
171 | |||
172 | struct vm_area_struct *get_gate_vma(struct task_struct *tsk) | ||
173 | { | ||
174 | return NULL; | ||
175 | } | ||
176 | |||
177 | int in_gate_area(struct task_struct *task, unsigned long addr) | ||
178 | { | ||
179 | return 0; | ||
180 | } | ||
181 | |||
182 | int in_gate_area_no_task(unsigned long addr) | ||
183 | { | ||
184 | return 0; | ||
185 | } | ||
diff --git a/arch/i386/kernel/topology.c b/arch/i386/kernel/topology.c index 296355292c7c..e2e281d4bcc8 100644 --- a/arch/i386/kernel/topology.c +++ b/arch/i386/kernel/topology.c | |||
@@ -32,15 +32,8 @@ | |||
32 | 32 | ||
33 | static struct i386_cpu cpu_devices[NR_CPUS]; | 33 | static struct i386_cpu cpu_devices[NR_CPUS]; |
34 | 34 | ||
35 | int arch_register_cpu(int num){ | 35 | int arch_register_cpu(int num) |
36 | struct node *parent = NULL; | 36 | { |
37 | |||
38 | #ifdef CONFIG_NUMA | ||
39 | int node = cpu_to_node(num); | ||
40 | if (node_online(node)) | ||
41 | parent = &node_devices[node].node; | ||
42 | #endif /* CONFIG_NUMA */ | ||
43 | |||
44 | /* | 37 | /* |
45 | * CPU0 cannot be offlined due to several | 38 | * CPU0 cannot be offlined due to several |
46 | * restrictions and assumptions in kernel. This basically | 39 | * restrictions and assumptions in kernel. This basically |
@@ -50,21 +43,13 @@ int arch_register_cpu(int num){ | |||
50 | if (!num) | 43 | if (!num) |
51 | cpu_devices[num].cpu.no_control = 1; | 44 | cpu_devices[num].cpu.no_control = 1; |
52 | 45 | ||
53 | return register_cpu(&cpu_devices[num].cpu, num, parent); | 46 | return register_cpu(&cpu_devices[num].cpu, num); |
54 | } | 47 | } |
55 | 48 | ||
56 | #ifdef CONFIG_HOTPLUG_CPU | 49 | #ifdef CONFIG_HOTPLUG_CPU |
57 | 50 | ||
58 | void arch_unregister_cpu(int num) { | 51 | void arch_unregister_cpu(int num) { |
59 | struct node *parent = NULL; | 52 | return unregister_cpu(&cpu_devices[num].cpu); |
60 | |||
61 | #ifdef CONFIG_NUMA | ||
62 | int node = cpu_to_node(num); | ||
63 | if (node_online(node)) | ||
64 | parent = &node_devices[node].node; | ||
65 | #endif /* CONFIG_NUMA */ | ||
66 | |||
67 | return unregister_cpu(&cpu_devices[num].cpu, parent); | ||
68 | } | 53 | } |
69 | EXPORT_SYMBOL(arch_register_cpu); | 54 | EXPORT_SYMBOL(arch_register_cpu); |
70 | EXPORT_SYMBOL(arch_unregister_cpu); | 55 | EXPORT_SYMBOL(arch_unregister_cpu); |
@@ -74,16 +59,13 @@ EXPORT_SYMBOL(arch_unregister_cpu); | |||
74 | 59 | ||
75 | #ifdef CONFIG_NUMA | 60 | #ifdef CONFIG_NUMA |
76 | #include <linux/mmzone.h> | 61 | #include <linux/mmzone.h> |
77 | #include <asm/node.h> | ||
78 | |||
79 | struct i386_node node_devices[MAX_NUMNODES]; | ||
80 | 62 | ||
81 | static int __init topology_init(void) | 63 | static int __init topology_init(void) |
82 | { | 64 | { |
83 | int i; | 65 | int i; |
84 | 66 | ||
85 | for_each_online_node(i) | 67 | for_each_online_node(i) |
86 | arch_register_node(i); | 68 | register_one_node(i); |
87 | 69 | ||
88 | for_each_present_cpu(i) | 70 | for_each_present_cpu(i) |
89 | arch_register_cpu(i); | 71 | arch_register_cpu(i); |
diff --git a/arch/i386/kernel/vsyscall-sysenter.S b/arch/i386/kernel/vsyscall-sysenter.S index 3b62baa6a371..1a36d26e15eb 100644 --- a/arch/i386/kernel/vsyscall-sysenter.S +++ b/arch/i386/kernel/vsyscall-sysenter.S | |||
@@ -42,10 +42,10 @@ __kernel_vsyscall: | |||
42 | /* 7: align return point with nop's to make disassembly easier */ | 42 | /* 7: align return point with nop's to make disassembly easier */ |
43 | .space 7,0x90 | 43 | .space 7,0x90 |
44 | 44 | ||
45 | /* 14: System call restart point is here! (SYSENTER_RETURN - 2) */ | 45 | /* 14: System call restart point is here! (SYSENTER_RETURN-2) */ |
46 | jmp .Lenter_kernel | 46 | jmp .Lenter_kernel |
47 | /* 16: System call normal return point is here! */ | 47 | /* 16: System call normal return point is here! */ |
48 | .globl SYSENTER_RETURN /* Symbol used by entry.S. */ | 48 | .globl SYSENTER_RETURN /* Symbol used by sysenter.c */ |
49 | SYSENTER_RETURN: | 49 | SYSENTER_RETURN: |
50 | pop %ebp | 50 | pop %ebp |
51 | .Lpop_ebp: | 51 | .Lpop_ebp: |
diff --git a/arch/i386/kernel/vsyscall.lds.S b/arch/i386/kernel/vsyscall.lds.S index 98699ca6e52d..e26975fc68b6 100644 --- a/arch/i386/kernel/vsyscall.lds.S +++ b/arch/i386/kernel/vsyscall.lds.S | |||
@@ -7,7 +7,7 @@ | |||
7 | 7 | ||
8 | SECTIONS | 8 | SECTIONS |
9 | { | 9 | { |
10 | . = VSYSCALL_BASE + SIZEOF_HEADERS; | 10 | . = VDSO_PRELINK + SIZEOF_HEADERS; |
11 | 11 | ||
12 | .hash : { *(.hash) } :text | 12 | .hash : { *(.hash) } :text |
13 | .dynsym : { *(.dynsym) } | 13 | .dynsym : { *(.dynsym) } |
@@ -20,7 +20,7 @@ SECTIONS | |||
20 | For the layouts to match, we need to skip more than enough | 20 | For the layouts to match, we need to skip more than enough |
21 | space for the dynamic symbol table et al. If this amount | 21 | space for the dynamic symbol table et al. If this amount |
22 | is insufficient, ld -shared will barf. Just increase it here. */ | 22 | is insufficient, ld -shared will barf. Just increase it here. */ |
23 | . = VSYSCALL_BASE + 0x400; | 23 | . = VDSO_PRELINK + 0x400; |
24 | 24 | ||
25 | .text : { *(.text) } :text =0x90909090 | 25 | .text : { *(.text) } :text =0x90909090 |
26 | .note : { *(.note.*) } :text :note | 26 | .note : { *(.note.*) } :text :note |
diff --git a/arch/i386/mach-visws/setup.c b/arch/i386/mach-visws/setup.c index 8a9e1a6f745d..1f84cdb24779 100644 --- a/arch/i386/mach-visws/setup.c +++ b/arch/i386/mach-visws/setup.c | |||
@@ -140,8 +140,8 @@ void __init time_init_hook(void) | |||
140 | 140 | ||
141 | #define MB (1024 * 1024) | 141 | #define MB (1024 * 1024) |
142 | 142 | ||
143 | static unsigned long sgivwfb_mem_phys; | 143 | unsigned long sgivwfb_mem_phys; |
144 | static unsigned long sgivwfb_mem_size; | 144 | unsigned long sgivwfb_mem_size; |
145 | 145 | ||
146 | long long mem_size __initdata = 0; | 146 | long long mem_size __initdata = 0; |
147 | 147 | ||
@@ -177,8 +177,4 @@ char * __init machine_specific_memory_setup(void) | |||
177 | add_memory_region(sgivwfb_mem_phys, sgivwfb_mem_size, E820_RESERVED); | 177 | add_memory_region(sgivwfb_mem_phys, sgivwfb_mem_size, E820_RESERVED); |
178 | 178 | ||
179 | return "PROM"; | 179 | return "PROM"; |
180 | |||
181 | /* Remove gcc warnings */ | ||
182 | (void) sanitize_e820_map(NULL, NULL); | ||
183 | (void) copy_e820_map(NULL, 0); | ||
184 | } | 180 | } |
diff --git a/arch/i386/mach-visws/visws_apic.c b/arch/i386/mach-visws/visws_apic.c index 3e64fb721291..c418521dd554 100644 --- a/arch/i386/mach-visws/visws_apic.c +++ b/arch/i386/mach-visws/visws_apic.c | |||
@@ -278,22 +278,22 @@ void init_VISWS_APIC_irqs(void) | |||
278 | irq_desc[i].depth = 1; | 278 | irq_desc[i].depth = 1; |
279 | 279 | ||
280 | if (i == 0) { | 280 | if (i == 0) { |
281 | irq_desc[i].handler = &cobalt_irq_type; | 281 | irq_desc[i].chip = &cobalt_irq_type; |
282 | } | 282 | } |
283 | else if (i == CO_IRQ_IDE0) { | 283 | else if (i == CO_IRQ_IDE0) { |
284 | irq_desc[i].handler = &cobalt_irq_type; | 284 | irq_desc[i].chip = &cobalt_irq_type; |
285 | } | 285 | } |
286 | else if (i == CO_IRQ_IDE1) { | 286 | else if (i == CO_IRQ_IDE1) { |
287 | irq_desc[i].handler = &cobalt_irq_type; | 287 | irq_desc[i].chip = &cobalt_irq_type; |
288 | } | 288 | } |
289 | else if (i == CO_IRQ_8259) { | 289 | else if (i == CO_IRQ_8259) { |
290 | irq_desc[i].handler = &piix4_master_irq_type; | 290 | irq_desc[i].chip = &piix4_master_irq_type; |
291 | } | 291 | } |
292 | else if (i < CO_IRQ_APIC0) { | 292 | else if (i < CO_IRQ_APIC0) { |
293 | irq_desc[i].handler = &piix4_virtual_irq_type; | 293 | irq_desc[i].chip = &piix4_virtual_irq_type; |
294 | } | 294 | } |
295 | else if (IS_CO_APIC(i)) { | 295 | else if (IS_CO_APIC(i)) { |
296 | irq_desc[i].handler = &cobalt_irq_type; | 296 | irq_desc[i].chip = &cobalt_irq_type; |
297 | } | 297 | } |
298 | } | 298 | } |
299 | 299 | ||
diff --git a/arch/i386/mach-voyager/setup.c b/arch/i386/mach-voyager/setup.c index 0e225054e222..defc6ebbd565 100644 --- a/arch/i386/mach-voyager/setup.c +++ b/arch/i386/mach-voyager/setup.c | |||
@@ -5,10 +5,10 @@ | |||
5 | #include <linux/config.h> | 5 | #include <linux/config.h> |
6 | #include <linux/init.h> | 6 | #include <linux/init.h> |
7 | #include <linux/interrupt.h> | 7 | #include <linux/interrupt.h> |
8 | #include <asm/acpi.h> | ||
9 | #include <asm/arch_hooks.h> | 8 | #include <asm/arch_hooks.h> |
10 | #include <asm/voyager.h> | 9 | #include <asm/voyager.h> |
11 | #include <asm/e820.h> | 10 | #include <asm/e820.h> |
11 | #include <asm/io.h> | ||
12 | #include <asm/setup.h> | 12 | #include <asm/setup.h> |
13 | 13 | ||
14 | void __init pre_intr_init_hook(void) | 14 | void __init pre_intr_init_hook(void) |
@@ -27,8 +27,7 @@ void __init intr_init_hook(void) | |||
27 | smp_intr_init(); | 27 | smp_intr_init(); |
28 | #endif | 28 | #endif |
29 | 29 | ||
30 | if (!acpi_ioapic) | 30 | setup_irq(2, &irq2); |
31 | setup_irq(2, &irq2); | ||
32 | } | 31 | } |
33 | 32 | ||
34 | void __init pre_setup_arch_hook(void) | 33 | void __init pre_setup_arch_hook(void) |
diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c index 70e560a1b79a..5b8b579a079f 100644 --- a/arch/i386/mach-voyager/voyager_smp.c +++ b/arch/i386/mach-voyager/voyager_smp.c | |||
@@ -661,6 +661,7 @@ do_boot_cpu(__u8 cpu) | |||
661 | print_cpu_info(&cpu_data[cpu]); | 661 | print_cpu_info(&cpu_data[cpu]); |
662 | wmb(); | 662 | wmb(); |
663 | cpu_set(cpu, cpu_callout_map); | 663 | cpu_set(cpu, cpu_callout_map); |
664 | cpu_set(cpu, cpu_present_map); | ||
664 | } | 665 | } |
665 | else { | 666 | else { |
666 | printk("CPU%d FAILED TO BOOT: ", cpu); | 667 | printk("CPU%d FAILED TO BOOT: ", cpu); |
@@ -1418,7 +1419,7 @@ smp_intr_init(void) | |||
1418 | * This is for later: first 16 correspond to PC IRQs; next 16 | 1419 | * This is for later: first 16 correspond to PC IRQs; next 16 |
1419 | * are Primary MC IRQs and final 16 are Secondary MC IRQs */ | 1420 | * are Primary MC IRQs and final 16 are Secondary MC IRQs */ |
1420 | for(i = 0; i < 48; i++) | 1421 | for(i = 0; i < 48; i++) |
1421 | irq_desc[i].handler = &vic_irq_type; | 1422 | irq_desc[i].chip = &vic_irq_type; |
1422 | } | 1423 | } |
1423 | 1424 | ||
1424 | /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per | 1425 | /* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per |
@@ -1912,6 +1913,7 @@ void __devinit smp_prepare_boot_cpu(void) | |||
1912 | cpu_set(smp_processor_id(), cpu_online_map); | 1913 | cpu_set(smp_processor_id(), cpu_online_map); |
1913 | cpu_set(smp_processor_id(), cpu_callout_map); | 1914 | cpu_set(smp_processor_id(), cpu_callout_map); |
1914 | cpu_set(smp_processor_id(), cpu_possible_map); | 1915 | cpu_set(smp_processor_id(), cpu_possible_map); |
1916 | cpu_set(smp_processor_id(), cpu_present_map); | ||
1915 | } | 1917 | } |
1916 | 1918 | ||
1917 | int __devinit | 1919 | int __devinit |
diff --git a/arch/i386/mm/init.c b/arch/i386/mm/init.c index bf19513f0cea..f84b16e007ff 100644 --- a/arch/i386/mm/init.c +++ b/arch/i386/mm/init.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/highmem.h> | 24 | #include <linux/highmem.h> |
25 | #include <linux/pagemap.h> | 25 | #include <linux/pagemap.h> |
26 | #include <linux/poison.h> | ||
26 | #include <linux/bootmem.h> | 27 | #include <linux/bootmem.h> |
27 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
28 | #include <linux/proc_fs.h> | 29 | #include <linux/proc_fs.h> |
@@ -654,7 +655,7 @@ void __init mem_init(void) | |||
654 | */ | 655 | */ |
655 | #ifdef CONFIG_MEMORY_HOTPLUG | 656 | #ifdef CONFIG_MEMORY_HOTPLUG |
656 | #ifndef CONFIG_NEED_MULTIPLE_NODES | 657 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
657 | int add_memory(u64 start, u64 size) | 658 | int arch_add_memory(int nid, u64 start, u64 size) |
658 | { | 659 | { |
659 | struct pglist_data *pgdata = &contig_page_data; | 660 | struct pglist_data *pgdata = &contig_page_data; |
660 | struct zone *zone = pgdata->node_zones + MAX_NR_ZONES-1; | 661 | struct zone *zone = pgdata->node_zones + MAX_NR_ZONES-1; |
@@ -753,7 +754,7 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end) | |||
753 | for (addr = begin; addr < end; addr += PAGE_SIZE) { | 754 | for (addr = begin; addr < end; addr += PAGE_SIZE) { |
754 | ClearPageReserved(virt_to_page(addr)); | 755 | ClearPageReserved(virt_to_page(addr)); |
755 | init_page_count(virt_to_page(addr)); | 756 | init_page_count(virt_to_page(addr)); |
756 | memset((void *)addr, 0xcc, PAGE_SIZE); | 757 | memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE); |
757 | free_page(addr); | 758 | free_page(addr); |
758 | totalram_pages++; | 759 | totalram_pages++; |
759 | } | 760 | } |
diff --git a/arch/i386/mm/pageattr.c b/arch/i386/mm/pageattr.c index 0887b34bc59b..353a836ed63c 100644 --- a/arch/i386/mm/pageattr.c +++ b/arch/i386/mm/pageattr.c | |||
@@ -229,8 +229,8 @@ void kernel_map_pages(struct page *page, int numpages, int enable) | |||
229 | if (PageHighMem(page)) | 229 | if (PageHighMem(page)) |
230 | return; | 230 | return; |
231 | if (!enable) | 231 | if (!enable) |
232 | mutex_debug_check_no_locks_freed(page_address(page), | 232 | debug_check_no_locks_freed(page_address(page), |
233 | numpages * PAGE_SIZE); | 233 | numpages * PAGE_SIZE); |
234 | 234 | ||
235 | /* the return value is ignored - the calls cannot fail, | 235 | /* the return value is ignored - the calls cannot fail, |
236 | * large pages are disabled at boot time. | 236 | * large pages are disabled at boot time. |
diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c index a151f7a99f5e..10154a2cac68 100644 --- a/arch/i386/pci/i386.c +++ b/arch/i386/pci/i386.c | |||
@@ -48,10 +48,10 @@ | |||
48 | */ | 48 | */ |
49 | void | 49 | void |
50 | pcibios_align_resource(void *data, struct resource *res, | 50 | pcibios_align_resource(void *data, struct resource *res, |
51 | unsigned long size, unsigned long align) | 51 | resource_size_t size, resource_size_t align) |
52 | { | 52 | { |
53 | if (res->flags & IORESOURCE_IO) { | 53 | if (res->flags & IORESOURCE_IO) { |
54 | unsigned long start = res->start; | 54 | resource_size_t start = res->start; |
55 | 55 | ||
56 | if (start & 0x300) { | 56 | if (start & 0x300) { |
57 | start = (start + 0x3ff) & ~0x3ff; | 57 | start = (start + 0x3ff) & ~0x3ff; |
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 18318749884b..b487e227a1f7 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
@@ -271,6 +271,9 @@ config HOTPLUG_CPU | |||
271 | can be controlled through /sys/devices/system/cpu/cpu#. | 271 | can be controlled through /sys/devices/system/cpu/cpu#. |
272 | Say N if you want to disable CPU hotplug. | 272 | Say N if you want to disable CPU hotplug. |
273 | 273 | ||
274 | config ARCH_ENABLE_MEMORY_HOTPLUG | ||
275 | def_bool y | ||
276 | |||
274 | config SCHED_SMT | 277 | config SCHED_SMT |
275 | bool "SMT scheduler support" | 278 | bool "SMT scheduler support" |
276 | depends on SMP | 279 | depends on SMP |
@@ -374,6 +377,10 @@ config HAVE_ARCH_EARLY_PFN_TO_NID | |||
374 | def_bool y | 377 | def_bool y |
375 | depends on NEED_MULTIPLE_NODES | 378 | depends on NEED_MULTIPLE_NODES |
376 | 379 | ||
380 | config HAVE_ARCH_NODEDATA_EXTENSION | ||
381 | def_bool y | ||
382 | depends on NUMA | ||
383 | |||
377 | config IA32_SUPPORT | 384 | config IA32_SUPPORT |
378 | bool "Support for Linux/x86 binaries" | 385 | bool "Support for Linux/x86 binaries" |
379 | help | 386 | help |
@@ -485,6 +492,10 @@ config GENERIC_PENDING_IRQ | |||
485 | depends on GENERIC_HARDIRQS && SMP | 492 | depends on GENERIC_HARDIRQS && SMP |
486 | default y | 493 | default y |
487 | 494 | ||
495 | config IRQ_PER_CPU | ||
496 | bool | ||
497 | default y | ||
498 | |||
488 | source "arch/ia64/hp/sim/Kconfig" | 499 | source "arch/ia64/hp/sim/Kconfig" |
489 | 500 | ||
490 | menu "Instrumentation Support" | 501 | menu "Instrumentation Support" |
diff --git a/arch/ia64/configs/tiger_defconfig b/arch/ia64/configs/tiger_defconfig index 766bf4955432..9d1cffb57cde 100644 --- a/arch/ia64/configs/tiger_defconfig +++ b/arch/ia64/configs/tiger_defconfig | |||
@@ -114,7 +114,7 @@ CONFIG_IA64_CYCLONE=y | |||
114 | CONFIG_IOSAPIC=y | 114 | CONFIG_IOSAPIC=y |
115 | CONFIG_FORCE_MAX_ZONEORDER=17 | 115 | CONFIG_FORCE_MAX_ZONEORDER=17 |
116 | CONFIG_SMP=y | 116 | CONFIG_SMP=y |
117 | CONFIG_NR_CPUS=4 | 117 | CONFIG_NR_CPUS=16 |
118 | CONFIG_HOTPLUG_CPU=y | 118 | CONFIG_HOTPLUG_CPU=y |
119 | CONFIG_PERMIT_BSP_REMOVE=y | 119 | CONFIG_PERMIT_BSP_REMOVE=y |
120 | CONFIG_FORCE_CPEI_RETARGET=y | 120 | CONFIG_FORCE_CPEI_RETARGET=y |
diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c index c0d25a2a3e9c..8145547bb52d 100644 --- a/arch/ia64/hp/sim/hpsim_irq.c +++ b/arch/ia64/hp/sim/hpsim_irq.c | |||
@@ -44,8 +44,8 @@ hpsim_irq_init (void) | |||
44 | int i; | 44 | int i; |
45 | 45 | ||
46 | for (i = 0; i < NR_IRQS; ++i) { | 46 | for (i = 0; i < NR_IRQS; ++i) { |
47 | idesc = irq_descp(i); | 47 | idesc = irq_desc + i; |
48 | if (idesc->handler == &no_irq_type) | 48 | if (idesc->chip == &no_irq_type) |
49 | idesc->handler = &irq_type_hp_sim; | 49 | idesc->chip = &irq_type_hp_sim; |
50 | } | 50 | } |
51 | } | 51 | } |
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c index d58c1c5c903a..efc7df4b0fd2 100644 --- a/arch/ia64/kernel/iosapic.c +++ b/arch/ia64/kernel/iosapic.c | |||
@@ -456,7 +456,7 @@ iosapic_startup_edge_irq (unsigned int irq) | |||
456 | static void | 456 | static void |
457 | iosapic_ack_edge_irq (unsigned int irq) | 457 | iosapic_ack_edge_irq (unsigned int irq) |
458 | { | 458 | { |
459 | irq_desc_t *idesc = irq_descp(irq); | 459 | irq_desc_t *idesc = irq_desc + irq; |
460 | 460 | ||
461 | move_native_irq(irq); | 461 | move_native_irq(irq); |
462 | /* | 462 | /* |
@@ -659,14 +659,14 @@ register_intr (unsigned int gsi, int vector, unsigned char delivery, | |||
659 | else | 659 | else |
660 | irq_type = &irq_type_iosapic_level; | 660 | irq_type = &irq_type_iosapic_level; |
661 | 661 | ||
662 | idesc = irq_descp(vector); | 662 | idesc = irq_desc + vector; |
663 | if (idesc->handler != irq_type) { | 663 | if (idesc->chip != irq_type) { |
664 | if (idesc->handler != &no_irq_type) | 664 | if (idesc->chip != &no_irq_type) |
665 | printk(KERN_WARNING | 665 | printk(KERN_WARNING |
666 | "%s: changing vector %d from %s to %s\n", | 666 | "%s: changing vector %d from %s to %s\n", |
667 | __FUNCTION__, vector, | 667 | __FUNCTION__, vector, |
668 | idesc->handler->typename, irq_type->typename); | 668 | idesc->chip->typename, irq_type->typename); |
669 | idesc->handler = irq_type; | 669 | idesc->chip = irq_type; |
670 | } | 670 | } |
671 | return 0; | 671 | return 0; |
672 | } | 672 | } |
@@ -793,14 +793,14 @@ again: | |||
793 | return -ENOSPC; | 793 | return -ENOSPC; |
794 | } | 794 | } |
795 | 795 | ||
796 | spin_lock_irqsave(&irq_descp(vector)->lock, flags); | 796 | spin_lock_irqsave(&irq_desc[vector].lock, flags); |
797 | spin_lock(&iosapic_lock); | 797 | spin_lock(&iosapic_lock); |
798 | { | 798 | { |
799 | if (gsi_to_vector(gsi) > 0) { | 799 | if (gsi_to_vector(gsi) > 0) { |
800 | if (list_empty(&iosapic_intr_info[vector].rtes)) | 800 | if (list_empty(&iosapic_intr_info[vector].rtes)) |
801 | free_irq_vector(vector); | 801 | free_irq_vector(vector); |
802 | spin_unlock(&iosapic_lock); | 802 | spin_unlock(&iosapic_lock); |
803 | spin_unlock_irqrestore(&irq_descp(vector)->lock, | 803 | spin_unlock_irqrestore(&irq_desc[vector].lock, |
804 | flags); | 804 | flags); |
805 | goto again; | 805 | goto again; |
806 | } | 806 | } |
@@ -810,7 +810,7 @@ again: | |||
810 | polarity, trigger); | 810 | polarity, trigger); |
811 | if (err < 0) { | 811 | if (err < 0) { |
812 | spin_unlock(&iosapic_lock); | 812 | spin_unlock(&iosapic_lock); |
813 | spin_unlock_irqrestore(&irq_descp(vector)->lock, | 813 | spin_unlock_irqrestore(&irq_desc[vector].lock, |
814 | flags); | 814 | flags); |
815 | return err; | 815 | return err; |
816 | } | 816 | } |
@@ -825,7 +825,7 @@ again: | |||
825 | set_rte(gsi, vector, dest, mask); | 825 | set_rte(gsi, vector, dest, mask); |
826 | } | 826 | } |
827 | spin_unlock(&iosapic_lock); | 827 | spin_unlock(&iosapic_lock); |
828 | spin_unlock_irqrestore(&irq_descp(vector)->lock, flags); | 828 | spin_unlock_irqrestore(&irq_desc[vector].lock, flags); |
829 | 829 | ||
830 | printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n", | 830 | printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n", |
831 | gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"), | 831 | gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"), |
@@ -860,7 +860,7 @@ iosapic_unregister_intr (unsigned int gsi) | |||
860 | } | 860 | } |
861 | vector = irq_to_vector(irq); | 861 | vector = irq_to_vector(irq); |
862 | 862 | ||
863 | idesc = irq_descp(irq); | 863 | idesc = irq_desc + irq; |
864 | spin_lock_irqsave(&idesc->lock, flags); | 864 | spin_lock_irqsave(&idesc->lock, flags); |
865 | spin_lock(&iosapic_lock); | 865 | spin_lock(&iosapic_lock); |
866 | { | 866 | { |
@@ -903,7 +903,7 @@ iosapic_unregister_intr (unsigned int gsi) | |||
903 | BUG_ON(iosapic_intr_info[vector].count); | 903 | BUG_ON(iosapic_intr_info[vector].count); |
904 | 904 | ||
905 | /* Clear the interrupt controller descriptor */ | 905 | /* Clear the interrupt controller descriptor */ |
906 | idesc->handler = &no_irq_type; | 906 | idesc->chip = &no_irq_type; |
907 | 907 | ||
908 | /* Clear the interrupt information */ | 908 | /* Clear the interrupt information */ |
909 | memset(&iosapic_intr_info[vector], 0, | 909 | memset(&iosapic_intr_info[vector], 0, |
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c index 9c72ea3f6432..7852382de2fa 100644 --- a/arch/ia64/kernel/irq.c +++ b/arch/ia64/kernel/irq.c | |||
@@ -76,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
76 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 76 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
77 | } | 77 | } |
78 | #endif | 78 | #endif |
79 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 79 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
80 | seq_printf(p, " %s", action->name); | 80 | seq_printf(p, " %s", action->name); |
81 | 81 | ||
82 | for (action=action->next; action; action = action->next) | 82 | for (action=action->next; action; action = action->next) |
@@ -100,7 +100,7 @@ void set_irq_affinity_info (unsigned int irq, int hwid, int redir) | |||
100 | cpu_set(cpu_logical_id(hwid), mask); | 100 | cpu_set(cpu_logical_id(hwid), mask); |
101 | 101 | ||
102 | if (irq < NR_IRQS) { | 102 | if (irq < NR_IRQS) { |
103 | irq_affinity[irq] = mask; | 103 | irq_desc[irq].affinity = mask; |
104 | irq_redir[irq] = (char) (redir & 0xff); | 104 | irq_redir[irq] = (char) (redir & 0xff); |
105 | } | 105 | } |
106 | } | 106 | } |
@@ -120,7 +120,7 @@ static void migrate_irqs(void) | |||
120 | int irq, new_cpu; | 120 | int irq, new_cpu; |
121 | 121 | ||
122 | for (irq=0; irq < NR_IRQS; irq++) { | 122 | for (irq=0; irq < NR_IRQS; irq++) { |
123 | desc = irq_descp(irq); | 123 | desc = irq_desc + irq; |
124 | 124 | ||
125 | /* | 125 | /* |
126 | * No handling for now. | 126 | * No handling for now. |
@@ -131,7 +131,7 @@ static void migrate_irqs(void) | |||
131 | if (desc->status == IRQ_PER_CPU) | 131 | if (desc->status == IRQ_PER_CPU) |
132 | continue; | 132 | continue; |
133 | 133 | ||
134 | cpus_and(mask, irq_affinity[irq], cpu_online_map); | 134 | cpus_and(mask, irq_desc[irq].affinity, cpu_online_map); |
135 | if (any_online_cpu(mask) == NR_CPUS) { | 135 | if (any_online_cpu(mask) == NR_CPUS) { |
136 | /* | 136 | /* |
137 | * Save it for phase 2 processing | 137 | * Save it for phase 2 processing |
@@ -144,15 +144,15 @@ static void migrate_irqs(void) | |||
144 | /* | 144 | /* |
145 | * Al three are essential, currently WARN_ON.. maybe panic? | 145 | * Al three are essential, currently WARN_ON.. maybe panic? |
146 | */ | 146 | */ |
147 | if (desc->handler && desc->handler->disable && | 147 | if (desc->chip && desc->chip->disable && |
148 | desc->handler->enable && desc->handler->set_affinity) { | 148 | desc->chip->enable && desc->chip->set_affinity) { |
149 | desc->handler->disable(irq); | 149 | desc->chip->disable(irq); |
150 | desc->handler->set_affinity(irq, mask); | 150 | desc->chip->set_affinity(irq, mask); |
151 | desc->handler->enable(irq); | 151 | desc->chip->enable(irq); |
152 | } else { | 152 | } else { |
153 | WARN_ON((!(desc->handler) || !(desc->handler->disable) || | 153 | WARN_ON((!(desc->chip) || !(desc->chip->disable) || |
154 | !(desc->handler->enable) || | 154 | !(desc->chip->enable) || |
155 | !(desc->handler->set_affinity))); | 155 | !(desc->chip->set_affinity))); |
156 | } | 156 | } |
157 | } | 157 | } |
158 | } | 158 | } |
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c index ef9a2b49307a..f5035304594e 100644 --- a/arch/ia64/kernel/irq_ia64.c +++ b/arch/ia64/kernel/irq_ia64.c | |||
@@ -249,9 +249,9 @@ register_percpu_irq (ia64_vector vec, struct irqaction *action) | |||
249 | 249 | ||
250 | for (irq = 0; irq < NR_IRQS; ++irq) | 250 | for (irq = 0; irq < NR_IRQS; ++irq) |
251 | if (irq_to_vector(irq) == vec) { | 251 | if (irq_to_vector(irq) == vec) { |
252 | desc = irq_descp(irq); | 252 | desc = irq_desc + irq; |
253 | desc->status |= IRQ_PER_CPU; | 253 | desc->status |= IRQ_PER_CPU; |
254 | desc->handler = &irq_type_ia64_lsapic; | 254 | desc->chip = &irq_type_ia64_lsapic; |
255 | if (action) | 255 | if (action) |
256 | setup_irq(irq, action); | 256 | setup_irq(irq, action); |
257 | } | 257 | } |
diff --git a/arch/ia64/kernel/irq_lsapic.c b/arch/ia64/kernel/irq_lsapic.c index ea14e6a04409..1ab58b09f3d7 100644 --- a/arch/ia64/kernel/irq_lsapic.c +++ b/arch/ia64/kernel/irq_lsapic.c | |||
@@ -26,6 +26,13 @@ lsapic_noop (unsigned int irq) | |||
26 | /* nuthing to do... */ | 26 | /* nuthing to do... */ |
27 | } | 27 | } |
28 | 28 | ||
29 | static int lsapic_retrigger(unsigned int irq) | ||
30 | { | ||
31 | ia64_resend_irq(irq); | ||
32 | |||
33 | return 1; | ||
34 | } | ||
35 | |||
29 | struct hw_interrupt_type irq_type_ia64_lsapic = { | 36 | struct hw_interrupt_type irq_type_ia64_lsapic = { |
30 | .typename = "LSAPIC", | 37 | .typename = "LSAPIC", |
31 | .startup = lsapic_noop_startup, | 38 | .startup = lsapic_noop_startup, |
@@ -33,5 +40,6 @@ struct hw_interrupt_type irq_type_ia64_lsapic = { | |||
33 | .enable = lsapic_noop, | 40 | .enable = lsapic_noop, |
34 | .disable = lsapic_noop, | 41 | .disable = lsapic_noop, |
35 | .ack = lsapic_noop, | 42 | .ack = lsapic_noop, |
36 | .end = lsapic_noop | 43 | .end = lsapic_noop, |
44 | .retrigger = lsapic_retrigger, | ||
37 | }; | 45 | }; |
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c index 6a0880639bc9..d7dc5e63de63 100644 --- a/arch/ia64/kernel/mca.c +++ b/arch/ia64/kernel/mca.c | |||
@@ -1788,7 +1788,7 @@ ia64_mca_late_init(void) | |||
1788 | cpe_poll_enabled = 0; | 1788 | cpe_poll_enabled = 0; |
1789 | for (irq = 0; irq < NR_IRQS; ++irq) | 1789 | for (irq = 0; irq < NR_IRQS; ++irq) |
1790 | if (irq_to_vector(irq) == cpe_vector) { | 1790 | if (irq_to_vector(irq) == cpe_vector) { |
1791 | desc = irq_descp(irq); | 1791 | desc = irq_desc + irq; |
1792 | desc->status |= IRQ_PER_CPU; | 1792 | desc->status |= IRQ_PER_CPU; |
1793 | setup_irq(irq, &mca_cpe_irqaction); | 1793 | setup_irq(irq, &mca_cpe_irqaction); |
1794 | ia64_cpe_irq = irq; | 1794 | ia64_cpe_irq = irq; |
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c index 859fb37ff49b..8a1208419138 100644 --- a/arch/ia64/kernel/palinfo.c +++ b/arch/ia64/kernel/palinfo.c | |||
@@ -959,7 +959,7 @@ remove_palinfo_proc_entries(unsigned int hcpu) | |||
959 | } | 959 | } |
960 | } | 960 | } |
961 | 961 | ||
962 | static int palinfo_cpu_callback(struct notifier_block *nfb, | 962 | static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb, |
963 | unsigned long action, | 963 | unsigned long action, |
964 | void *hcpu) | 964 | void *hcpu) |
965 | { | 965 | { |
@@ -978,7 +978,7 @@ static int palinfo_cpu_callback(struct notifier_block *nfb, | |||
978 | return NOTIFY_OK; | 978 | return NOTIFY_OK; |
979 | } | 979 | } |
980 | 980 | ||
981 | static struct notifier_block palinfo_cpu_notifier = | 981 | static struct notifier_block __cpuinitdata palinfo_cpu_notifier = |
982 | { | 982 | { |
983 | .notifier_call = palinfo_cpu_callback, | 983 | .notifier_call = palinfo_cpu_callback, |
984 | .priority = 0, | 984 | .priority = 0, |
@@ -998,7 +998,7 @@ palinfo_init(void) | |||
998 | } | 998 | } |
999 | 999 | ||
1000 | /* Register for future delivery via notify registration */ | 1000 | /* Register for future delivery via notify registration */ |
1001 | register_cpu_notifier(&palinfo_cpu_notifier); | 1001 | register_hotcpu_notifier(&palinfo_cpu_notifier); |
1002 | 1002 | ||
1003 | return 0; | 1003 | return 0; |
1004 | } | 1004 | } |
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c index 6d7bc8ff7b3a..a0055d3d695c 100644 --- a/arch/ia64/kernel/perfmon.c +++ b/arch/ia64/kernel/perfmon.c | |||
@@ -6165,7 +6165,7 @@ pfm_load_regs (struct task_struct *task) | |||
6165 | /* | 6165 | /* |
6166 | * will replay the PMU interrupt | 6166 | * will replay the PMU interrupt |
6167 | */ | 6167 | */ |
6168 | if (need_irq_resend) hw_resend_irq(NULL, IA64_PERFMON_VECTOR); | 6168 | if (need_irq_resend) ia64_resend_irq(IA64_PERFMON_VECTOR); |
6169 | 6169 | ||
6170 | pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++; | 6170 | pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++; |
6171 | } | 6171 | } |
@@ -6305,7 +6305,7 @@ pfm_load_regs (struct task_struct *task) | |||
6305 | /* | 6305 | /* |
6306 | * will replay the PMU interrupt | 6306 | * will replay the PMU interrupt |
6307 | */ | 6307 | */ |
6308 | if (need_irq_resend) hw_resend_irq(NULL, IA64_PERFMON_VECTOR); | 6308 | if (need_irq_resend) ia64_resend_irq(IA64_PERFMON_VECTOR); |
6309 | 6309 | ||
6310 | pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++; | 6310 | pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++; |
6311 | } | 6311 | } |
diff --git a/arch/ia64/kernel/salinfo.c b/arch/ia64/kernel/salinfo.c index 663a186ad194..9065f0f01ba3 100644 --- a/arch/ia64/kernel/salinfo.c +++ b/arch/ia64/kernel/salinfo.c | |||
@@ -572,7 +572,7 @@ static struct file_operations salinfo_data_fops = { | |||
572 | }; | 572 | }; |
573 | 573 | ||
574 | #ifdef CONFIG_HOTPLUG_CPU | 574 | #ifdef CONFIG_HOTPLUG_CPU |
575 | static int | 575 | static int __devinit |
576 | salinfo_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) | 576 | salinfo_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) |
577 | { | 577 | { |
578 | unsigned int i, cpu = (unsigned long)hcpu; | 578 | unsigned int i, cpu = (unsigned long)hcpu; |
@@ -673,9 +673,7 @@ salinfo_init(void) | |||
673 | salinfo_timer.function = &salinfo_timeout; | 673 | salinfo_timer.function = &salinfo_timeout; |
674 | add_timer(&salinfo_timer); | 674 | add_timer(&salinfo_timer); |
675 | 675 | ||
676 | #ifdef CONFIG_HOTPLUG_CPU | 676 | register_hotcpu_notifier(&salinfo_cpu_notifier); |
677 | register_cpu_notifier(&salinfo_cpu_notifier); | ||
678 | #endif | ||
679 | 677 | ||
680 | return 0; | 678 | return 0; |
681 | } | 679 | } |
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c index 44e9547878ac..5203df78f150 100644 --- a/arch/ia64/kernel/smpboot.c +++ b/arch/ia64/kernel/smpboot.c | |||
@@ -677,16 +677,16 @@ int migrate_platform_irqs(unsigned int cpu) | |||
677 | new_cpei_cpu = any_online_cpu(cpu_online_map); | 677 | new_cpei_cpu = any_online_cpu(cpu_online_map); |
678 | mask = cpumask_of_cpu(new_cpei_cpu); | 678 | mask = cpumask_of_cpu(new_cpei_cpu); |
679 | set_cpei_target_cpu(new_cpei_cpu); | 679 | set_cpei_target_cpu(new_cpei_cpu); |
680 | desc = irq_descp(ia64_cpe_irq); | 680 | desc = irq_desc + ia64_cpe_irq; |
681 | /* | 681 | /* |
682 | * Switch for now, immediatly, we need to do fake intr | 682 | * Switch for now, immediatly, we need to do fake intr |
683 | * as other interrupts, but need to study CPEI behaviour with | 683 | * as other interrupts, but need to study CPEI behaviour with |
684 | * polling before making changes. | 684 | * polling before making changes. |
685 | */ | 685 | */ |
686 | if (desc) { | 686 | if (desc) { |
687 | desc->handler->disable(ia64_cpe_irq); | 687 | desc->chip->disable(ia64_cpe_irq); |
688 | desc->handler->set_affinity(ia64_cpe_irq, mask); | 688 | desc->chip->set_affinity(ia64_cpe_irq, mask); |
689 | desc->handler->enable(ia64_cpe_irq); | 689 | desc->chip->enable(ia64_cpe_irq); |
690 | printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); | 690 | printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); |
691 | } | 691 | } |
692 | } | 692 | } |
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c index 879edb51d1e0..5511d9c6c701 100644 --- a/arch/ia64/kernel/topology.c +++ b/arch/ia64/kernel/topology.c | |||
@@ -26,19 +26,10 @@ | |||
26 | #include <asm/numa.h> | 26 | #include <asm/numa.h> |
27 | #include <asm/cpu.h> | 27 | #include <asm/cpu.h> |
28 | 28 | ||
29 | #ifdef CONFIG_NUMA | ||
30 | static struct node *sysfs_nodes; | ||
31 | #endif | ||
32 | static struct ia64_cpu *sysfs_cpus; | 29 | static struct ia64_cpu *sysfs_cpus; |
33 | 30 | ||
34 | int arch_register_cpu(int num) | 31 | int arch_register_cpu(int num) |
35 | { | 32 | { |
36 | struct node *parent = NULL; | ||
37 | |||
38 | #ifdef CONFIG_NUMA | ||
39 | parent = &sysfs_nodes[cpu_to_node(num)]; | ||
40 | #endif /* CONFIG_NUMA */ | ||
41 | |||
42 | #if defined (CONFIG_ACPI) && defined (CONFIG_HOTPLUG_CPU) | 33 | #if defined (CONFIG_ACPI) && defined (CONFIG_HOTPLUG_CPU) |
43 | /* | 34 | /* |
44 | * If CPEI cannot be re-targetted, and this is | 35 | * If CPEI cannot be re-targetted, and this is |
@@ -48,21 +39,14 @@ int arch_register_cpu(int num) | |||
48 | sysfs_cpus[num].cpu.no_control = 1; | 39 | sysfs_cpus[num].cpu.no_control = 1; |
49 | #endif | 40 | #endif |
50 | 41 | ||
51 | return register_cpu(&sysfs_cpus[num].cpu, num, parent); | 42 | return register_cpu(&sysfs_cpus[num].cpu, num); |
52 | } | 43 | } |
53 | 44 | ||
54 | #ifdef CONFIG_HOTPLUG_CPU | 45 | #ifdef CONFIG_HOTPLUG_CPU |
55 | 46 | ||
56 | void arch_unregister_cpu(int num) | 47 | void arch_unregister_cpu(int num) |
57 | { | 48 | { |
58 | struct node *parent = NULL; | 49 | return unregister_cpu(&sysfs_cpus[num].cpu); |
59 | |||
60 | #ifdef CONFIG_NUMA | ||
61 | int node = cpu_to_node(num); | ||
62 | parent = &sysfs_nodes[node]; | ||
63 | #endif /* CONFIG_NUMA */ | ||
64 | |||
65 | return unregister_cpu(&sysfs_cpus[num].cpu, parent); | ||
66 | } | 50 | } |
67 | EXPORT_SYMBOL(arch_register_cpu); | 51 | EXPORT_SYMBOL(arch_register_cpu); |
68 | EXPORT_SYMBOL(arch_unregister_cpu); | 52 | EXPORT_SYMBOL(arch_unregister_cpu); |
@@ -74,17 +58,11 @@ static int __init topology_init(void) | |||
74 | int i, err = 0; | 58 | int i, err = 0; |
75 | 59 | ||
76 | #ifdef CONFIG_NUMA | 60 | #ifdef CONFIG_NUMA |
77 | sysfs_nodes = kzalloc(sizeof(struct node) * MAX_NUMNODES, GFP_KERNEL); | ||
78 | if (!sysfs_nodes) { | ||
79 | err = -ENOMEM; | ||
80 | goto out; | ||
81 | } | ||
82 | |||
83 | /* | 61 | /* |
84 | * MCD - Do we want to register all ONLINE nodes, or all POSSIBLE nodes? | 62 | * MCD - Do we want to register all ONLINE nodes, or all POSSIBLE nodes? |
85 | */ | 63 | */ |
86 | for_each_online_node(i) { | 64 | for_each_online_node(i) { |
87 | if ((err = register_node(&sysfs_nodes[i], i, 0))) | 65 | if ((err = register_one_node(i))) |
88 | goto out; | 66 | goto out; |
89 | } | 67 | } |
90 | #endif | 68 | #endif |
@@ -426,7 +404,7 @@ static int __cpuinit cache_remove_dev(struct sys_device * sys_dev) | |||
426 | * When a cpu is hot-plugged, do a check and initiate | 404 | * When a cpu is hot-plugged, do a check and initiate |
427 | * cache kobject if necessary | 405 | * cache kobject if necessary |
428 | */ | 406 | */ |
429 | static int cache_cpu_callback(struct notifier_block *nfb, | 407 | static int __cpuinit cache_cpu_callback(struct notifier_block *nfb, |
430 | unsigned long action, void *hcpu) | 408 | unsigned long action, void *hcpu) |
431 | { | 409 | { |
432 | unsigned int cpu = (unsigned long)hcpu; | 410 | unsigned int cpu = (unsigned long)hcpu; |
@@ -444,7 +422,7 @@ static int cache_cpu_callback(struct notifier_block *nfb, | |||
444 | return NOTIFY_OK; | 422 | return NOTIFY_OK; |
445 | } | 423 | } |
446 | 424 | ||
447 | static struct notifier_block cache_cpu_notifier = | 425 | static struct notifier_block __cpuinitdata cache_cpu_notifier = |
448 | { | 426 | { |
449 | .notifier_call = cache_cpu_callback | 427 | .notifier_call = cache_cpu_callback |
450 | }; | 428 | }; |
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c index b6bcc9fa3603..525b082eb661 100644 --- a/arch/ia64/mm/discontig.c +++ b/arch/ia64/mm/discontig.c | |||
@@ -33,7 +33,6 @@ | |||
33 | */ | 33 | */ |
34 | struct early_node_data { | 34 | struct early_node_data { |
35 | struct ia64_node_data *node_data; | 35 | struct ia64_node_data *node_data; |
36 | pg_data_t *pgdat; | ||
37 | unsigned long pernode_addr; | 36 | unsigned long pernode_addr; |
38 | unsigned long pernode_size; | 37 | unsigned long pernode_size; |
39 | struct bootmem_data bootmem_data; | 38 | struct bootmem_data bootmem_data; |
@@ -46,6 +45,8 @@ struct early_node_data { | |||
46 | static struct early_node_data mem_data[MAX_NUMNODES] __initdata; | 45 | static struct early_node_data mem_data[MAX_NUMNODES] __initdata; |
47 | static nodemask_t memory_less_mask __initdata; | 46 | static nodemask_t memory_less_mask __initdata; |
48 | 47 | ||
48 | static pg_data_t *pgdat_list[MAX_NUMNODES]; | ||
49 | |||
49 | /* | 50 | /* |
50 | * To prevent cache aliasing effects, align per-node structures so that they | 51 | * To prevent cache aliasing effects, align per-node structures so that they |
51 | * start at addresses that are strided by node number. | 52 | * start at addresses that are strided by node number. |
@@ -99,7 +100,7 @@ static int __init build_node_maps(unsigned long start, unsigned long len, | |||
99 | * acpi_boot_init() (which builds the node_to_cpu_mask array) hasn't been | 100 | * acpi_boot_init() (which builds the node_to_cpu_mask array) hasn't been |
100 | * called yet. Note that node 0 will also count all non-existent cpus. | 101 | * called yet. Note that node 0 will also count all non-existent cpus. |
101 | */ | 102 | */ |
102 | static int __init early_nr_cpus_node(int node) | 103 | static int __meminit early_nr_cpus_node(int node) |
103 | { | 104 | { |
104 | int cpu, n = 0; | 105 | int cpu, n = 0; |
105 | 106 | ||
@@ -114,7 +115,7 @@ static int __init early_nr_cpus_node(int node) | |||
114 | * compute_pernodesize - compute size of pernode data | 115 | * compute_pernodesize - compute size of pernode data |
115 | * @node: the node id. | 116 | * @node: the node id. |
116 | */ | 117 | */ |
117 | static unsigned long __init compute_pernodesize(int node) | 118 | static unsigned long __meminit compute_pernodesize(int node) |
118 | { | 119 | { |
119 | unsigned long pernodesize = 0, cpus; | 120 | unsigned long pernodesize = 0, cpus; |
120 | 121 | ||
@@ -175,13 +176,13 @@ static void __init fill_pernode(int node, unsigned long pernode, | |||
175 | pernode += PERCPU_PAGE_SIZE * cpus; | 176 | pernode += PERCPU_PAGE_SIZE * cpus; |
176 | pernode += node * L1_CACHE_BYTES; | 177 | pernode += node * L1_CACHE_BYTES; |
177 | 178 | ||
178 | mem_data[node].pgdat = __va(pernode); | 179 | pgdat_list[node] = __va(pernode); |
179 | pernode += L1_CACHE_ALIGN(sizeof(pg_data_t)); | 180 | pernode += L1_CACHE_ALIGN(sizeof(pg_data_t)); |
180 | 181 | ||
181 | mem_data[node].node_data = __va(pernode); | 182 | mem_data[node].node_data = __va(pernode); |
182 | pernode += L1_CACHE_ALIGN(sizeof(struct ia64_node_data)); | 183 | pernode += L1_CACHE_ALIGN(sizeof(struct ia64_node_data)); |
183 | 184 | ||
184 | mem_data[node].pgdat->bdata = bdp; | 185 | pgdat_list[node]->bdata = bdp; |
185 | pernode += L1_CACHE_ALIGN(sizeof(pg_data_t)); | 186 | pernode += L1_CACHE_ALIGN(sizeof(pg_data_t)); |
186 | 187 | ||
187 | cpu_data = per_cpu_node_setup(cpu_data, node); | 188 | cpu_data = per_cpu_node_setup(cpu_data, node); |
@@ -268,7 +269,7 @@ static int __init find_pernode_space(unsigned long start, unsigned long len, | |||
268 | static int __init free_node_bootmem(unsigned long start, unsigned long len, | 269 | static int __init free_node_bootmem(unsigned long start, unsigned long len, |
269 | int node) | 270 | int node) |
270 | { | 271 | { |
271 | free_bootmem_node(mem_data[node].pgdat, start, len); | 272 | free_bootmem_node(pgdat_list[node], start, len); |
272 | 273 | ||
273 | return 0; | 274 | return 0; |
274 | } | 275 | } |
@@ -287,7 +288,7 @@ static void __init reserve_pernode_space(void) | |||
287 | int node; | 288 | int node; |
288 | 289 | ||
289 | for_each_online_node(node) { | 290 | for_each_online_node(node) { |
290 | pg_data_t *pdp = mem_data[node].pgdat; | 291 | pg_data_t *pdp = pgdat_list[node]; |
291 | 292 | ||
292 | if (node_isset(node, memory_less_mask)) | 293 | if (node_isset(node, memory_less_mask)) |
293 | continue; | 294 | continue; |
@@ -307,6 +308,17 @@ static void __init reserve_pernode_space(void) | |||
307 | } | 308 | } |
308 | } | 309 | } |
309 | 310 | ||
311 | static void __meminit scatter_node_data(void) | ||
312 | { | ||
313 | pg_data_t **dst; | ||
314 | int node; | ||
315 | |||
316 | for_each_online_node(node) { | ||
317 | dst = LOCAL_DATA_ADDR(pgdat_list[node])->pg_data_ptrs; | ||
318 | memcpy(dst, pgdat_list, sizeof(pgdat_list)); | ||
319 | } | ||
320 | } | ||
321 | |||
310 | /** | 322 | /** |
311 | * initialize_pernode_data - fixup per-cpu & per-node pointers | 323 | * initialize_pernode_data - fixup per-cpu & per-node pointers |
312 | * | 324 | * |
@@ -317,17 +329,10 @@ static void __init reserve_pernode_space(void) | |||
317 | */ | 329 | */ |
318 | static void __init initialize_pernode_data(void) | 330 | static void __init initialize_pernode_data(void) |
319 | { | 331 | { |
320 | pg_data_t *pgdat_list[MAX_NUMNODES]; | ||
321 | int cpu, node; | 332 | int cpu, node; |
322 | 333 | ||
323 | for_each_online_node(node) | 334 | scatter_node_data(); |
324 | pgdat_list[node] = mem_data[node].pgdat; | ||
325 | 335 | ||
326 | /* Copy the pg_data_t list to each node and init the node field */ | ||
327 | for_each_online_node(node) { | ||
328 | memcpy(mem_data[node].node_data->pg_data_ptrs, pgdat_list, | ||
329 | sizeof(pgdat_list)); | ||
330 | } | ||
331 | #ifdef CONFIG_SMP | 336 | #ifdef CONFIG_SMP |
332 | /* Set the node_data pointer for each per-cpu struct */ | 337 | /* Set the node_data pointer for each per-cpu struct */ |
333 | for (cpu = 0; cpu < NR_CPUS; cpu++) { | 338 | for (cpu = 0; cpu < NR_CPUS; cpu++) { |
@@ -372,7 +377,7 @@ static void __init *memory_less_node_alloc(int nid, unsigned long pernodesize) | |||
372 | if (bestnode == -1) | 377 | if (bestnode == -1) |
373 | bestnode = anynode; | 378 | bestnode = anynode; |
374 | 379 | ||
375 | ptr = __alloc_bootmem_node(mem_data[bestnode].pgdat, pernodesize, | 380 | ptr = __alloc_bootmem_node(pgdat_list[bestnode], pernodesize, |
376 | PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS)); | 381 | PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS)); |
377 | 382 | ||
378 | return ptr; | 383 | return ptr; |
@@ -476,7 +481,7 @@ void __init find_memory(void) | |||
476 | pernodesize = mem_data[node].pernode_size; | 481 | pernodesize = mem_data[node].pernode_size; |
477 | map = pernode + pernodesize; | 482 | map = pernode + pernodesize; |
478 | 483 | ||
479 | init_bootmem_node(mem_data[node].pgdat, | 484 | init_bootmem_node(pgdat_list[node], |
480 | map>>PAGE_SHIFT, | 485 | map>>PAGE_SHIFT, |
481 | bdp->node_boot_start>>PAGE_SHIFT, | 486 | bdp->node_boot_start>>PAGE_SHIFT, |
482 | bdp->node_low_pfn); | 487 | bdp->node_low_pfn); |
@@ -786,3 +791,21 @@ void __init paging_init(void) | |||
786 | 791 | ||
787 | zero_page_memmap_ptr = virt_to_page(ia64_imva(empty_zero_page)); | 792 | zero_page_memmap_ptr = virt_to_page(ia64_imva(empty_zero_page)); |
788 | } | 793 | } |
794 | |||
795 | pg_data_t *arch_alloc_nodedata(int nid) | ||
796 | { | ||
797 | unsigned long size = compute_pernodesize(nid); | ||
798 | |||
799 | return kzalloc(size, GFP_KERNEL); | ||
800 | } | ||
801 | |||
802 | void arch_free_nodedata(pg_data_t *pgdat) | ||
803 | { | ||
804 | kfree(pgdat); | ||
805 | } | ||
806 | |||
807 | void arch_refresh_nodedata(int update_node, pg_data_t *update_pgdat) | ||
808 | { | ||
809 | pgdat_list[update_node] = update_pgdat; | ||
810 | scatter_node_data(); | ||
811 | } | ||
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c index 11f08001f8c2..38306e98f04b 100644 --- a/arch/ia64/mm/init.c +++ b/arch/ia64/mm/init.c | |||
@@ -652,7 +652,7 @@ void online_page(struct page *page) | |||
652 | num_physpages++; | 652 | num_physpages++; |
653 | } | 653 | } |
654 | 654 | ||
655 | int add_memory(u64 start, u64 size) | 655 | int arch_add_memory(int nid, u64 start, u64 size) |
656 | { | 656 | { |
657 | pg_data_t *pgdat; | 657 | pg_data_t *pgdat; |
658 | struct zone *zone; | 658 | struct zone *zone; |
@@ -660,7 +660,7 @@ int add_memory(u64 start, u64 size) | |||
660 | unsigned long nr_pages = size >> PAGE_SHIFT; | 660 | unsigned long nr_pages = size >> PAGE_SHIFT; |
661 | int ret; | 661 | int ret; |
662 | 662 | ||
663 | pgdat = NODE_DATA(0); | 663 | pgdat = NODE_DATA(nid); |
664 | 664 | ||
665 | zone = pgdat->node_zones + ZONE_NORMAL; | 665 | zone = pgdat->node_zones + ZONE_NORMAL; |
666 | ret = __add_pages(zone, start_pfn, nr_pages); | 666 | ret = __add_pages(zone, start_pfn, nr_pages); |
@@ -671,7 +671,6 @@ int add_memory(u64 start, u64 size) | |||
671 | 671 | ||
672 | return ret; | 672 | return ret; |
673 | } | 673 | } |
674 | EXPORT_SYMBOL_GPL(add_memory); | ||
675 | 674 | ||
676 | int remove_memory(u64 start, u64 size) | 675 | int remove_memory(u64 start, u64 size) |
677 | { | 676 | { |
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 77375a55da31..5bef0e3603f2 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
@@ -568,7 +568,7 @@ pcibios_disable_device (struct pci_dev *dev) | |||
568 | 568 | ||
569 | void | 569 | void |
570 | pcibios_align_resource (void *data, struct resource *res, | 570 | pcibios_align_resource (void *data, struct resource *res, |
571 | unsigned long size, unsigned long align) | 571 | resource_size_t size, resource_size_t align) |
572 | { | 572 | { |
573 | } | 573 | } |
574 | 574 | ||
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c index dc8e2b696713..7bb6ad188ba3 100644 --- a/arch/ia64/sn/kernel/irq.c +++ b/arch/ia64/sn/kernel/irq.c | |||
@@ -27,7 +27,7 @@ static void unregister_intr_pda(struct sn_irq_info *sn_irq_info); | |||
27 | int sn_force_interrupt_flag = 1; | 27 | int sn_force_interrupt_flag = 1; |
28 | extern int sn_ioif_inited; | 28 | extern int sn_ioif_inited; |
29 | struct list_head **sn_irq_lh; | 29 | struct list_head **sn_irq_lh; |
30 | static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */ | 30 | static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */ |
31 | 31 | ||
32 | u64 sn_intr_alloc(nasid_t local_nasid, int local_widget, | 32 | u64 sn_intr_alloc(nasid_t local_nasid, int local_widget, |
33 | struct sn_irq_info *sn_irq_info, | 33 | struct sn_irq_info *sn_irq_info, |
@@ -225,8 +225,8 @@ void sn_irq_init(void) | |||
225 | ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; | 225 | ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; |
226 | 226 | ||
227 | for (i = 0; i < NR_IRQS; i++) { | 227 | for (i = 0; i < NR_IRQS; i++) { |
228 | if (base_desc[i].handler == &no_irq_type) { | 228 | if (base_desc[i].chip == &no_irq_type) { |
229 | base_desc[i].handler = &irq_type_sn; | 229 | base_desc[i].chip = &irq_type_sn; |
230 | } | 230 | } |
231 | } | 231 | } |
232 | } | 232 | } |
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c index 93577abae36d..3bfccf354343 100644 --- a/arch/ia64/sn/kernel/setup.c +++ b/arch/ia64/sn/kernel/setup.c | |||
@@ -458,7 +458,7 @@ void __init sn_setup(char **cmdline_p) | |||
458 | * support here so we don't have to listen to failed keyboard probe | 458 | * support here so we don't have to listen to failed keyboard probe |
459 | * messages. | 459 | * messages. |
460 | */ | 460 | */ |
461 | if (version <= 0x0209 && acpi_kbd_controller_present) { | 461 | if (is_shub1() && version <= 0x0209 && acpi_kbd_controller_present) { |
462 | printk(KERN_INFO "Disabling legacy keyboard support as prom " | 462 | printk(KERN_INFO "Disabling legacy keyboard support as prom " |
463 | "is too old and doesn't provide FADT\n"); | 463 | "is too old and doesn't provide FADT\n"); |
464 | acpi_kbd_controller_present = 0; | 464 | acpi_kbd_controller_present = 0; |
@@ -577,7 +577,8 @@ void __init sn_cpu_init(void) | |||
577 | int i; | 577 | int i; |
578 | static int wars_have_been_checked; | 578 | static int wars_have_been_checked; |
579 | 579 | ||
580 | if (smp_processor_id() == 0 && IS_MEDUSA()) { | 580 | cpuid = smp_processor_id(); |
581 | if (cpuid == 0 && IS_MEDUSA()) { | ||
581 | if (ia64_sn_is_fake_prom()) | 582 | if (ia64_sn_is_fake_prom()) |
582 | sn_prom_type = 2; | 583 | sn_prom_type = 2; |
583 | else | 584 | else |
@@ -597,6 +598,12 @@ void __init sn_cpu_init(void) | |||
597 | sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2; | 598 | sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2; |
598 | 599 | ||
599 | /* | 600 | /* |
601 | * Don't check status. The SAL call is not supported on all PROMs | ||
602 | * but a failure is harmless. | ||
603 | */ | ||
604 | (void) ia64_sn_set_cpu_number(cpuid); | ||
605 | |||
606 | /* | ||
600 | * The boot cpu makes this call again after platform initialization is | 607 | * The boot cpu makes this call again after platform initialization is |
601 | * complete. | 608 | * complete. |
602 | */ | 609 | */ |
@@ -607,7 +614,6 @@ void __init sn_cpu_init(void) | |||
607 | if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0) | 614 | if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0) |
608 | break; | 615 | break; |
609 | 616 | ||
610 | cpuid = smp_processor_id(); | ||
611 | cpuphyid = get_sapicid(); | 617 | cpuphyid = get_sapicid(); |
612 | 618 | ||
613 | if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice)) | 619 | if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice)) |
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c index 20de72791b97..e4aa839d0189 100644 --- a/arch/ia64/sn/pci/tioca_provider.c +++ b/arch/ia64/sn/pci/tioca_provider.c | |||
@@ -595,7 +595,7 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont | |||
595 | 595 | ||
596 | /* sanity check prom rev */ | 596 | /* sanity check prom rev */ |
597 | 597 | ||
598 | if (sn_sal_rev() < 0x0406) { | 598 | if (is_shub1() && sn_sal_rev() < 0x0406) { |
599 | printk | 599 | printk |
600 | (KERN_ERR "%s: SGI prom rev 4.06 or greater required " | 600 | (KERN_ERR "%s: SGI prom rev 4.06 or greater required " |
601 | "for tioca support\n", __FUNCTION__); | 601 | "for tioca support\n", __FUNCTION__); |
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c index a4634b06f675..3841861df6a2 100644 --- a/arch/m32r/kernel/irq.c +++ b/arch/m32r/kernel/irq.c | |||
@@ -54,7 +54,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
54 | for_each_online_cpu(j) | 54 | for_each_online_cpu(j) |
55 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 55 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
56 | #endif | 56 | #endif |
57 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 57 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
58 | seq_printf(p, " %s", action->name); | 58 | seq_printf(p, " %s", action->name); |
59 | 59 | ||
60 | for (action=action->next; action; action = action->next) | 60 | for (action=action->next; action; action = action->next) |
diff --git a/arch/m32r/kernel/setup.c b/arch/m32r/kernel/setup.c index 3cd3c2988a48..1ff483c8a4c9 100644 --- a/arch/m32r/kernel/setup.c +++ b/arch/m32r/kernel/setup.c | |||
@@ -275,7 +275,7 @@ static int __init topology_init(void) | |||
275 | int i; | 275 | int i; |
276 | 276 | ||
277 | for_each_present_cpu(i) | 277 | for_each_present_cpu(i) |
278 | register_cpu(&cpu_devices[i], i, NULL); | 278 | register_cpu(&cpu_devices[i], i); |
279 | 279 | ||
280 | return 0; | 280 | return 0; |
281 | } | 281 | } |
diff --git a/arch/m32r/kernel/setup_m32104ut.c b/arch/m32r/kernel/setup_m32104ut.c index 6328e1357a80..f9f56c270195 100644 --- a/arch/m32r/kernel/setup_m32104ut.c +++ b/arch/m32r/kernel/setup_m32104ut.c | |||
@@ -87,7 +87,7 @@ void __init init_IRQ(void) | |||
87 | #if defined(CONFIG_SMC91X) | 87 | #if defined(CONFIG_SMC91X) |
88 | /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ | 88 | /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ |
89 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; | 89 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; |
90 | irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type; | 90 | irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type; |
91 | irq_desc[M32R_IRQ_INT0].action = 0; | 91 | irq_desc[M32R_IRQ_INT0].action = 0; |
92 | irq_desc[M32R_IRQ_INT0].depth = 1; | 92 | irq_desc[M32R_IRQ_INT0].depth = 1; |
93 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */ | 93 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */ |
@@ -96,7 +96,7 @@ void __init init_IRQ(void) | |||
96 | 96 | ||
97 | /* MFT2 : system timer */ | 97 | /* MFT2 : system timer */ |
98 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 98 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
99 | irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type; | 99 | irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type; |
100 | irq_desc[M32R_IRQ_MFT2].action = 0; | 100 | irq_desc[M32R_IRQ_MFT2].action = 0; |
101 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 101 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
102 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 102 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -105,7 +105,7 @@ void __init init_IRQ(void) | |||
105 | #ifdef CONFIG_SERIAL_M32R_SIO | 105 | #ifdef CONFIG_SERIAL_M32R_SIO |
106 | /* SIO0_R : uart receive data */ | 106 | /* SIO0_R : uart receive data */ |
107 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 107 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
108 | irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type; | 108 | irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type; |
109 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 109 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
110 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 110 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
111 | icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; | 111 | icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; |
@@ -113,7 +113,7 @@ void __init init_IRQ(void) | |||
113 | 113 | ||
114 | /* SIO0_S : uart send data */ | 114 | /* SIO0_S : uart send data */ |
115 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 115 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
116 | irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type; | 116 | irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type; |
117 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 117 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
118 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 118 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
119 | icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; | 119 | icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; |
diff --git a/arch/m32r/kernel/setup_m32700ut.c b/arch/m32r/kernel/setup_m32700ut.c index fad1fc99bb27..b6ab00eff580 100644 --- a/arch/m32r/kernel/setup_m32700ut.c +++ b/arch/m32r/kernel/setup_m32700ut.c | |||
@@ -301,7 +301,7 @@ void __init init_IRQ(void) | |||
301 | #if defined(CONFIG_SMC91X) | 301 | #if defined(CONFIG_SMC91X) |
302 | /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/ | 302 | /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/ |
303 | irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED; | 303 | irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED; |
304 | irq_desc[M32700UT_LAN_IRQ_LAN].handler = &m32700ut_lanpld_irq_type; | 304 | irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type; |
305 | irq_desc[M32700UT_LAN_IRQ_LAN].action = 0; | 305 | irq_desc[M32700UT_LAN_IRQ_LAN].action = 0; |
306 | irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */ | 306 | irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */ |
307 | lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ | 307 | lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ |
@@ -310,7 +310,7 @@ void __init init_IRQ(void) | |||
310 | 310 | ||
311 | /* MFT2 : system timer */ | 311 | /* MFT2 : system timer */ |
312 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 312 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
313 | irq_desc[M32R_IRQ_MFT2].handler = &m32700ut_irq_type; | 313 | irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type; |
314 | irq_desc[M32R_IRQ_MFT2].action = 0; | 314 | irq_desc[M32R_IRQ_MFT2].action = 0; |
315 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 315 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
316 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 316 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -318,7 +318,7 @@ void __init init_IRQ(void) | |||
318 | 318 | ||
319 | /* SIO0 : receive */ | 319 | /* SIO0 : receive */ |
320 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 320 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
321 | irq_desc[M32R_IRQ_SIO0_R].handler = &m32700ut_irq_type; | 321 | irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type; |
322 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 322 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
323 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 323 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
324 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 324 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -326,7 +326,7 @@ void __init init_IRQ(void) | |||
326 | 326 | ||
327 | /* SIO0 : send */ | 327 | /* SIO0 : send */ |
328 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 328 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
329 | irq_desc[M32R_IRQ_SIO0_S].handler = &m32700ut_irq_type; | 329 | irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type; |
330 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 330 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
331 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 331 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
332 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 332 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
@@ -334,7 +334,7 @@ void __init init_IRQ(void) | |||
334 | 334 | ||
335 | /* SIO1 : receive */ | 335 | /* SIO1 : receive */ |
336 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 336 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
337 | irq_desc[M32R_IRQ_SIO1_R].handler = &m32700ut_irq_type; | 337 | irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type; |
338 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 338 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
339 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 339 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
340 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 340 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -342,7 +342,7 @@ void __init init_IRQ(void) | |||
342 | 342 | ||
343 | /* SIO1 : send */ | 343 | /* SIO1 : send */ |
344 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 344 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
345 | irq_desc[M32R_IRQ_SIO1_S].handler = &m32700ut_irq_type; | 345 | irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type; |
346 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 346 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
347 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 347 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
348 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 348 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
@@ -350,7 +350,7 @@ void __init init_IRQ(void) | |||
350 | 350 | ||
351 | /* DMA1 : */ | 351 | /* DMA1 : */ |
352 | irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED; | 352 | irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED; |
353 | irq_desc[M32R_IRQ_DMA1].handler = &m32700ut_irq_type; | 353 | irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type; |
354 | irq_desc[M32R_IRQ_DMA1].action = 0; | 354 | irq_desc[M32R_IRQ_DMA1].action = 0; |
355 | irq_desc[M32R_IRQ_DMA1].depth = 1; | 355 | irq_desc[M32R_IRQ_DMA1].depth = 1; |
356 | icu_data[M32R_IRQ_DMA1].icucr = 0; | 356 | icu_data[M32R_IRQ_DMA1].icucr = 0; |
@@ -359,7 +359,7 @@ void __init init_IRQ(void) | |||
359 | #ifdef CONFIG_SERIAL_M32R_PLDSIO | 359 | #ifdef CONFIG_SERIAL_M32R_PLDSIO |
360 | /* INT#1: SIO0 Receive on PLD */ | 360 | /* INT#1: SIO0 Receive on PLD */ |
361 | irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED; | 361 | irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED; |
362 | irq_desc[PLD_IRQ_SIO0_RCV].handler = &m32700ut_pld_irq_type; | 362 | irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type; |
363 | irq_desc[PLD_IRQ_SIO0_RCV].action = 0; | 363 | irq_desc[PLD_IRQ_SIO0_RCV].action = 0; |
364 | irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */ | 364 | irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */ |
365 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; | 365 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; |
@@ -367,7 +367,7 @@ void __init init_IRQ(void) | |||
367 | 367 | ||
368 | /* INT#1: SIO0 Send on PLD */ | 368 | /* INT#1: SIO0 Send on PLD */ |
369 | irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED; | 369 | irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED; |
370 | irq_desc[PLD_IRQ_SIO0_SND].handler = &m32700ut_pld_irq_type; | 370 | irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type; |
371 | irq_desc[PLD_IRQ_SIO0_SND].action = 0; | 371 | irq_desc[PLD_IRQ_SIO0_SND].action = 0; |
372 | irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */ | 372 | irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */ |
373 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; | 373 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; |
@@ -376,7 +376,7 @@ void __init init_IRQ(void) | |||
376 | 376 | ||
377 | /* INT#1: CFC IREQ on PLD */ | 377 | /* INT#1: CFC IREQ on PLD */ |
378 | irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; | 378 | irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; |
379 | irq_desc[PLD_IRQ_CFIREQ].handler = &m32700ut_pld_irq_type; | 379 | irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type; |
380 | irq_desc[PLD_IRQ_CFIREQ].action = 0; | 380 | irq_desc[PLD_IRQ_CFIREQ].action = 0; |
381 | irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ | 381 | irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ |
382 | pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ | 382 | pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ |
@@ -384,7 +384,7 @@ void __init init_IRQ(void) | |||
384 | 384 | ||
385 | /* INT#1: CFC Insert on PLD */ | 385 | /* INT#1: CFC Insert on PLD */ |
386 | irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; | 386 | irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; |
387 | irq_desc[PLD_IRQ_CFC_INSERT].handler = &m32700ut_pld_irq_type; | 387 | irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type; |
388 | irq_desc[PLD_IRQ_CFC_INSERT].action = 0; | 388 | irq_desc[PLD_IRQ_CFC_INSERT].action = 0; |
389 | irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ | 389 | irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ |
390 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ | 390 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ |
@@ -392,7 +392,7 @@ void __init init_IRQ(void) | |||
392 | 392 | ||
393 | /* INT#1: CFC Eject on PLD */ | 393 | /* INT#1: CFC Eject on PLD */ |
394 | irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; | 394 | irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; |
395 | irq_desc[PLD_IRQ_CFC_EJECT].handler = &m32700ut_pld_irq_type; | 395 | irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type; |
396 | irq_desc[PLD_IRQ_CFC_EJECT].action = 0; | 396 | irq_desc[PLD_IRQ_CFC_EJECT].action = 0; |
397 | irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ | 397 | irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ |
398 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ | 398 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ |
@@ -416,7 +416,7 @@ void __init init_IRQ(void) | |||
416 | outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ | 416 | outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ |
417 | 417 | ||
418 | irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED; | 418 | irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED; |
419 | irq_desc[M32700UT_LCD_IRQ_USB_INT1].handler = &m32700ut_lcdpld_irq_type; | 419 | irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type; |
420 | irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0; | 420 | irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0; |
421 | irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1; | 421 | irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1; |
422 | lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ | 422 | lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ |
@@ -434,7 +434,7 @@ void __init init_IRQ(void) | |||
434 | * INT3# is used for AR | 434 | * INT3# is used for AR |
435 | */ | 435 | */ |
436 | irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; | 436 | irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; |
437 | irq_desc[M32R_IRQ_INT3].handler = &m32700ut_irq_type; | 437 | irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type; |
438 | irq_desc[M32R_IRQ_INT3].action = 0; | 438 | irq_desc[M32R_IRQ_INT3].action = 0; |
439 | irq_desc[M32R_IRQ_INT3].depth = 1; | 439 | irq_desc[M32R_IRQ_INT3].depth = 1; |
440 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 440 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
diff --git a/arch/m32r/kernel/setup_mappi.c b/arch/m32r/kernel/setup_mappi.c index 00f253209cb3..c268044185f5 100644 --- a/arch/m32r/kernel/setup_mappi.c +++ b/arch/m32r/kernel/setup_mappi.c | |||
@@ -86,7 +86,7 @@ void __init init_IRQ(void) | |||
86 | #ifdef CONFIG_NE2000 | 86 | #ifdef CONFIG_NE2000 |
87 | /* INT0 : LAN controller (RTL8019AS) */ | 87 | /* INT0 : LAN controller (RTL8019AS) */ |
88 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; | 88 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; |
89 | irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type; | 89 | irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type; |
90 | irq_desc[M32R_IRQ_INT0].action = 0; | 90 | irq_desc[M32R_IRQ_INT0].action = 0; |
91 | irq_desc[M32R_IRQ_INT0].depth = 1; | 91 | irq_desc[M32R_IRQ_INT0].depth = 1; |
92 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 92 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
@@ -95,7 +95,7 @@ void __init init_IRQ(void) | |||
95 | 95 | ||
96 | /* MFT2 : system timer */ | 96 | /* MFT2 : system timer */ |
97 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 97 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
98 | irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type; | 98 | irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type; |
99 | irq_desc[M32R_IRQ_MFT2].action = 0; | 99 | irq_desc[M32R_IRQ_MFT2].action = 0; |
100 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 100 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
101 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 101 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -104,7 +104,7 @@ void __init init_IRQ(void) | |||
104 | #ifdef CONFIG_SERIAL_M32R_SIO | 104 | #ifdef CONFIG_SERIAL_M32R_SIO |
105 | /* SIO0_R : uart receive data */ | 105 | /* SIO0_R : uart receive data */ |
106 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 106 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
107 | irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type; | 107 | irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type; |
108 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 108 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
109 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 109 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
110 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 110 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -112,7 +112,7 @@ void __init init_IRQ(void) | |||
112 | 112 | ||
113 | /* SIO0_S : uart send data */ | 113 | /* SIO0_S : uart send data */ |
114 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 114 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
115 | irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type; | 115 | irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type; |
116 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 116 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
117 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 117 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
118 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 118 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
@@ -120,7 +120,7 @@ void __init init_IRQ(void) | |||
120 | 120 | ||
121 | /* SIO1_R : uart receive data */ | 121 | /* SIO1_R : uart receive data */ |
122 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 122 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
123 | irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type; | 123 | irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type; |
124 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 124 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
125 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 125 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
126 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 126 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -128,7 +128,7 @@ void __init init_IRQ(void) | |||
128 | 128 | ||
129 | /* SIO1_S : uart send data */ | 129 | /* SIO1_S : uart send data */ |
130 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 130 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
131 | irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type; | 131 | irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type; |
132 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 132 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
133 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 133 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
134 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 134 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
@@ -138,7 +138,7 @@ void __init init_IRQ(void) | |||
138 | #if defined(CONFIG_M32R_PCC) | 138 | #if defined(CONFIG_M32R_PCC) |
139 | /* INT1 : pccard0 interrupt */ | 139 | /* INT1 : pccard0 interrupt */ |
140 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; | 140 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; |
141 | irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type; | 141 | irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type; |
142 | irq_desc[M32R_IRQ_INT1].action = 0; | 142 | irq_desc[M32R_IRQ_INT1].action = 0; |
143 | irq_desc[M32R_IRQ_INT1].depth = 1; | 143 | irq_desc[M32R_IRQ_INT1].depth = 1; |
144 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | 144 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; |
@@ -146,7 +146,7 @@ void __init init_IRQ(void) | |||
146 | 146 | ||
147 | /* INT2 : pccard1 interrupt */ | 147 | /* INT2 : pccard1 interrupt */ |
148 | irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED; | 148 | irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED; |
149 | irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type; | 149 | irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type; |
150 | irq_desc[M32R_IRQ_INT2].action = 0; | 150 | irq_desc[M32R_IRQ_INT2].action = 0; |
151 | irq_desc[M32R_IRQ_INT2].depth = 1; | 151 | irq_desc[M32R_IRQ_INT2].depth = 1; |
152 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; | 152 | icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; |
diff --git a/arch/m32r/kernel/setup_mappi2.c b/arch/m32r/kernel/setup_mappi2.c index eebc9d8b4e72..bd2327d5cca2 100644 --- a/arch/m32r/kernel/setup_mappi2.c +++ b/arch/m32r/kernel/setup_mappi2.c | |||
@@ -87,7 +87,7 @@ void __init init_IRQ(void) | |||
87 | #if defined(CONFIG_SMC91X) | 87 | #if defined(CONFIG_SMC91X) |
88 | /* INT0 : LAN controller (SMC91111) */ | 88 | /* INT0 : LAN controller (SMC91111) */ |
89 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; | 89 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; |
90 | irq_desc[M32R_IRQ_INT0].handler = &mappi2_irq_type; | 90 | irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type; |
91 | irq_desc[M32R_IRQ_INT0].action = 0; | 91 | irq_desc[M32R_IRQ_INT0].action = 0; |
92 | irq_desc[M32R_IRQ_INT0].depth = 1; | 92 | irq_desc[M32R_IRQ_INT0].depth = 1; |
93 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 93 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
@@ -96,7 +96,7 @@ void __init init_IRQ(void) | |||
96 | 96 | ||
97 | /* MFT2 : system timer */ | 97 | /* MFT2 : system timer */ |
98 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 98 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
99 | irq_desc[M32R_IRQ_MFT2].handler = &mappi2_irq_type; | 99 | irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type; |
100 | irq_desc[M32R_IRQ_MFT2].action = 0; | 100 | irq_desc[M32R_IRQ_MFT2].action = 0; |
101 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 101 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
102 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 102 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -105,7 +105,7 @@ void __init init_IRQ(void) | |||
105 | #ifdef CONFIG_SERIAL_M32R_SIO | 105 | #ifdef CONFIG_SERIAL_M32R_SIO |
106 | /* SIO0_R : uart receive data */ | 106 | /* SIO0_R : uart receive data */ |
107 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 107 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
108 | irq_desc[M32R_IRQ_SIO0_R].handler = &mappi2_irq_type; | 108 | irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type; |
109 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 109 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
110 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 110 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
111 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 111 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -113,14 +113,14 @@ void __init init_IRQ(void) | |||
113 | 113 | ||
114 | /* SIO0_S : uart send data */ | 114 | /* SIO0_S : uart send data */ |
115 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 115 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
116 | irq_desc[M32R_IRQ_SIO0_S].handler = &mappi2_irq_type; | 116 | irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type; |
117 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 117 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
118 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 118 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
119 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 119 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
120 | disable_mappi2_irq(M32R_IRQ_SIO0_S); | 120 | disable_mappi2_irq(M32R_IRQ_SIO0_S); |
121 | /* SIO1_R : uart receive data */ | 121 | /* SIO1_R : uart receive data */ |
122 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 122 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
123 | irq_desc[M32R_IRQ_SIO1_R].handler = &mappi2_irq_type; | 123 | irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type; |
124 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 124 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
125 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 125 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
126 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 126 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -128,7 +128,7 @@ void __init init_IRQ(void) | |||
128 | 128 | ||
129 | /* SIO1_S : uart send data */ | 129 | /* SIO1_S : uart send data */ |
130 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 130 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
131 | irq_desc[M32R_IRQ_SIO1_S].handler = &mappi2_irq_type; | 131 | irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type; |
132 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 132 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
133 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 133 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
134 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 134 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
@@ -138,7 +138,7 @@ void __init init_IRQ(void) | |||
138 | #if defined(CONFIG_USB) | 138 | #if defined(CONFIG_USB) |
139 | /* INT1 : USB Host controller interrupt */ | 139 | /* INT1 : USB Host controller interrupt */ |
140 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; | 140 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; |
141 | irq_desc[M32R_IRQ_INT1].handler = &mappi2_irq_type; | 141 | irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type; |
142 | irq_desc[M32R_IRQ_INT1].action = 0; | 142 | irq_desc[M32R_IRQ_INT1].action = 0; |
143 | irq_desc[M32R_IRQ_INT1].depth = 1; | 143 | irq_desc[M32R_IRQ_INT1].depth = 1; |
144 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; | 144 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; |
@@ -147,7 +147,7 @@ void __init init_IRQ(void) | |||
147 | 147 | ||
148 | /* ICUCR40: CFC IREQ */ | 148 | /* ICUCR40: CFC IREQ */ |
149 | irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; | 149 | irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; |
150 | irq_desc[PLD_IRQ_CFIREQ].handler = &mappi2_irq_type; | 150 | irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type; |
151 | irq_desc[PLD_IRQ_CFIREQ].action = 0; | 151 | irq_desc[PLD_IRQ_CFIREQ].action = 0; |
152 | irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ | 152 | irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ |
153 | icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; | 153 | icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; |
@@ -156,7 +156,7 @@ void __init init_IRQ(void) | |||
156 | #if defined(CONFIG_M32R_CFC) | 156 | #if defined(CONFIG_M32R_CFC) |
157 | /* ICUCR41: CFC Insert */ | 157 | /* ICUCR41: CFC Insert */ |
158 | irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; | 158 | irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; |
159 | irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi2_irq_type; | 159 | irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type; |
160 | irq_desc[PLD_IRQ_CFC_INSERT].action = 0; | 160 | irq_desc[PLD_IRQ_CFC_INSERT].action = 0; |
161 | irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ | 161 | irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ |
162 | icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; | 162 | icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; |
@@ -164,7 +164,7 @@ void __init init_IRQ(void) | |||
164 | 164 | ||
165 | /* ICUCR42: CFC Eject */ | 165 | /* ICUCR42: CFC Eject */ |
166 | irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; | 166 | irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; |
167 | irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi2_irq_type; | 167 | irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type; |
168 | irq_desc[PLD_IRQ_CFC_EJECT].action = 0; | 168 | irq_desc[PLD_IRQ_CFC_EJECT].action = 0; |
169 | irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ | 169 | irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ |
170 | icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 170 | icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
diff --git a/arch/m32r/kernel/setup_mappi3.c b/arch/m32r/kernel/setup_mappi3.c index d2ff021e2d3d..014b51d17505 100644 --- a/arch/m32r/kernel/setup_mappi3.c +++ b/arch/m32r/kernel/setup_mappi3.c | |||
@@ -87,7 +87,7 @@ void __init init_IRQ(void) | |||
87 | #if defined(CONFIG_SMC91X) | 87 | #if defined(CONFIG_SMC91X) |
88 | /* INT0 : LAN controller (SMC91111) */ | 88 | /* INT0 : LAN controller (SMC91111) */ |
89 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; | 89 | irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; |
90 | irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type; | 90 | irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type; |
91 | irq_desc[M32R_IRQ_INT0].action = 0; | 91 | irq_desc[M32R_IRQ_INT0].action = 0; |
92 | irq_desc[M32R_IRQ_INT0].depth = 1; | 92 | irq_desc[M32R_IRQ_INT0].depth = 1; |
93 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 93 | icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
@@ -96,7 +96,7 @@ void __init init_IRQ(void) | |||
96 | 96 | ||
97 | /* MFT2 : system timer */ | 97 | /* MFT2 : system timer */ |
98 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 98 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
99 | irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type; | 99 | irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type; |
100 | irq_desc[M32R_IRQ_MFT2].action = 0; | 100 | irq_desc[M32R_IRQ_MFT2].action = 0; |
101 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 101 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
102 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 102 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -105,7 +105,7 @@ void __init init_IRQ(void) | |||
105 | #ifdef CONFIG_SERIAL_M32R_SIO | 105 | #ifdef CONFIG_SERIAL_M32R_SIO |
106 | /* SIO0_R : uart receive data */ | 106 | /* SIO0_R : uart receive data */ |
107 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 107 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
108 | irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type; | 108 | irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type; |
109 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 109 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
110 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 110 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
111 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 111 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -113,14 +113,14 @@ void __init init_IRQ(void) | |||
113 | 113 | ||
114 | /* SIO0_S : uart send data */ | 114 | /* SIO0_S : uart send data */ |
115 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 115 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
116 | irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type; | 116 | irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type; |
117 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 117 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
118 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 118 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
119 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 119 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
120 | disable_mappi3_irq(M32R_IRQ_SIO0_S); | 120 | disable_mappi3_irq(M32R_IRQ_SIO0_S); |
121 | /* SIO1_R : uart receive data */ | 121 | /* SIO1_R : uart receive data */ |
122 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 122 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
123 | irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type; | 123 | irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type; |
124 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 124 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
125 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 125 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
126 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 126 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -128,7 +128,7 @@ void __init init_IRQ(void) | |||
128 | 128 | ||
129 | /* SIO1_S : uart send data */ | 129 | /* SIO1_S : uart send data */ |
130 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 130 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
131 | irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type; | 131 | irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type; |
132 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 132 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
133 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 133 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
134 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 134 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
@@ -138,7 +138,7 @@ void __init init_IRQ(void) | |||
138 | #if defined(CONFIG_USB) | 138 | #if defined(CONFIG_USB) |
139 | /* INT1 : USB Host controller interrupt */ | 139 | /* INT1 : USB Host controller interrupt */ |
140 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; | 140 | irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; |
141 | irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type; | 141 | irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type; |
142 | irq_desc[M32R_IRQ_INT1].action = 0; | 142 | irq_desc[M32R_IRQ_INT1].action = 0; |
143 | irq_desc[M32R_IRQ_INT1].depth = 1; | 143 | irq_desc[M32R_IRQ_INT1].depth = 1; |
144 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; | 144 | icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; |
@@ -147,7 +147,7 @@ void __init init_IRQ(void) | |||
147 | 147 | ||
148 | /* CFC IREQ */ | 148 | /* CFC IREQ */ |
149 | irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; | 149 | irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; |
150 | irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type; | 150 | irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type; |
151 | irq_desc[PLD_IRQ_CFIREQ].action = 0; | 151 | irq_desc[PLD_IRQ_CFIREQ].action = 0; |
152 | irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ | 152 | irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ |
153 | icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; | 153 | icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; |
@@ -156,7 +156,7 @@ void __init init_IRQ(void) | |||
156 | #if defined(CONFIG_M32R_CFC) | 156 | #if defined(CONFIG_M32R_CFC) |
157 | /* ICUCR41: CFC Insert & eject */ | 157 | /* ICUCR41: CFC Insert & eject */ |
158 | irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; | 158 | irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; |
159 | irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type; | 159 | irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type; |
160 | irq_desc[PLD_IRQ_CFC_INSERT].action = 0; | 160 | irq_desc[PLD_IRQ_CFC_INSERT].action = 0; |
161 | irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ | 161 | irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ |
162 | icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; | 162 | icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; |
@@ -166,7 +166,7 @@ void __init init_IRQ(void) | |||
166 | 166 | ||
167 | /* IDE IREQ */ | 167 | /* IDE IREQ */ |
168 | irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED; | 168 | irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED; |
169 | irq_desc[PLD_IRQ_IDEIREQ].handler = &mappi3_irq_type; | 169 | irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type; |
170 | irq_desc[PLD_IRQ_IDEIREQ].action = 0; | 170 | irq_desc[PLD_IRQ_IDEIREQ].action = 0; |
171 | irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */ | 171 | irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */ |
172 | icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 172 | icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
diff --git a/arch/m32r/kernel/setup_oaks32r.c b/arch/m32r/kernel/setup_oaks32r.c index 0e9e63538c0f..ea64831aef7a 100644 --- a/arch/m32r/kernel/setup_oaks32r.c +++ b/arch/m32r/kernel/setup_oaks32r.c | |||
@@ -85,7 +85,7 @@ void __init init_IRQ(void) | |||
85 | #ifdef CONFIG_NE2000 | 85 | #ifdef CONFIG_NE2000 |
86 | /* INT3 : LAN controller (RTL8019AS) */ | 86 | /* INT3 : LAN controller (RTL8019AS) */ |
87 | irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; | 87 | irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; |
88 | irq_desc[M32R_IRQ_INT3].handler = &oaks32r_irq_type; | 88 | irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type; |
89 | irq_desc[M32R_IRQ_INT3].action = 0; | 89 | irq_desc[M32R_IRQ_INT3].action = 0; |
90 | irq_desc[M32R_IRQ_INT3].depth = 1; | 90 | irq_desc[M32R_IRQ_INT3].depth = 1; |
91 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 91 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
@@ -94,7 +94,7 @@ void __init init_IRQ(void) | |||
94 | 94 | ||
95 | /* MFT2 : system timer */ | 95 | /* MFT2 : system timer */ |
96 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 96 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
97 | irq_desc[M32R_IRQ_MFT2].handler = &oaks32r_irq_type; | 97 | irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type; |
98 | irq_desc[M32R_IRQ_MFT2].action = 0; | 98 | irq_desc[M32R_IRQ_MFT2].action = 0; |
99 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 99 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
100 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 100 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -103,7 +103,7 @@ void __init init_IRQ(void) | |||
103 | #ifdef CONFIG_SERIAL_M32R_SIO | 103 | #ifdef CONFIG_SERIAL_M32R_SIO |
104 | /* SIO0_R : uart receive data */ | 104 | /* SIO0_R : uart receive data */ |
105 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 105 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
106 | irq_desc[M32R_IRQ_SIO0_R].handler = &oaks32r_irq_type; | 106 | irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type; |
107 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 107 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
108 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 108 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
109 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 109 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -111,7 +111,7 @@ void __init init_IRQ(void) | |||
111 | 111 | ||
112 | /* SIO0_S : uart send data */ | 112 | /* SIO0_S : uart send data */ |
113 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 113 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
114 | irq_desc[M32R_IRQ_SIO0_S].handler = &oaks32r_irq_type; | 114 | irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type; |
115 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 115 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
116 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 116 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
117 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 117 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
@@ -119,7 +119,7 @@ void __init init_IRQ(void) | |||
119 | 119 | ||
120 | /* SIO1_R : uart receive data */ | 120 | /* SIO1_R : uart receive data */ |
121 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 121 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
122 | irq_desc[M32R_IRQ_SIO1_R].handler = &oaks32r_irq_type; | 122 | irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type; |
123 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 123 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
124 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 124 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
125 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 125 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -127,7 +127,7 @@ void __init init_IRQ(void) | |||
127 | 127 | ||
128 | /* SIO1_S : uart send data */ | 128 | /* SIO1_S : uart send data */ |
129 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 129 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
130 | irq_desc[M32R_IRQ_SIO1_S].handler = &oaks32r_irq_type; | 130 | irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type; |
131 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 131 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
132 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 132 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
133 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 133 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
diff --git a/arch/m32r/kernel/setup_opsput.c b/arch/m32r/kernel/setup_opsput.c index 548e8fc7949b..55e8972d455a 100644 --- a/arch/m32r/kernel/setup_opsput.c +++ b/arch/m32r/kernel/setup_opsput.c | |||
@@ -302,7 +302,7 @@ void __init init_IRQ(void) | |||
302 | #if defined(CONFIG_SMC91X) | 302 | #if defined(CONFIG_SMC91X) |
303 | /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/ | 303 | /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/ |
304 | irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED; | 304 | irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED; |
305 | irq_desc[OPSPUT_LAN_IRQ_LAN].handler = &opsput_lanpld_irq_type; | 305 | irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type; |
306 | irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0; | 306 | irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0; |
307 | irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */ | 307 | irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */ |
308 | lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ | 308 | lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ |
@@ -311,7 +311,7 @@ void __init init_IRQ(void) | |||
311 | 311 | ||
312 | /* MFT2 : system timer */ | 312 | /* MFT2 : system timer */ |
313 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 313 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
314 | irq_desc[M32R_IRQ_MFT2].handler = &opsput_irq_type; | 314 | irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type; |
315 | irq_desc[M32R_IRQ_MFT2].action = 0; | 315 | irq_desc[M32R_IRQ_MFT2].action = 0; |
316 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 316 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
317 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 317 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -319,7 +319,7 @@ void __init init_IRQ(void) | |||
319 | 319 | ||
320 | /* SIO0 : receive */ | 320 | /* SIO0 : receive */ |
321 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 321 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
322 | irq_desc[M32R_IRQ_SIO0_R].handler = &opsput_irq_type; | 322 | irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type; |
323 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 323 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
324 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 324 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
325 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 325 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -327,7 +327,7 @@ void __init init_IRQ(void) | |||
327 | 327 | ||
328 | /* SIO0 : send */ | 328 | /* SIO0 : send */ |
329 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 329 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
330 | irq_desc[M32R_IRQ_SIO0_S].handler = &opsput_irq_type; | 330 | irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type; |
331 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 331 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
332 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 332 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
333 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 333 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
@@ -335,7 +335,7 @@ void __init init_IRQ(void) | |||
335 | 335 | ||
336 | /* SIO1 : receive */ | 336 | /* SIO1 : receive */ |
337 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 337 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
338 | irq_desc[M32R_IRQ_SIO1_R].handler = &opsput_irq_type; | 338 | irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type; |
339 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 339 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
340 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 340 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
341 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 341 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -343,7 +343,7 @@ void __init init_IRQ(void) | |||
343 | 343 | ||
344 | /* SIO1 : send */ | 344 | /* SIO1 : send */ |
345 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 345 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
346 | irq_desc[M32R_IRQ_SIO1_S].handler = &opsput_irq_type; | 346 | irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type; |
347 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 347 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
348 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 348 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
349 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 349 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
@@ -351,7 +351,7 @@ void __init init_IRQ(void) | |||
351 | 351 | ||
352 | /* DMA1 : */ | 352 | /* DMA1 : */ |
353 | irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED; | 353 | irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED; |
354 | irq_desc[M32R_IRQ_DMA1].handler = &opsput_irq_type; | 354 | irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type; |
355 | irq_desc[M32R_IRQ_DMA1].action = 0; | 355 | irq_desc[M32R_IRQ_DMA1].action = 0; |
356 | irq_desc[M32R_IRQ_DMA1].depth = 1; | 356 | irq_desc[M32R_IRQ_DMA1].depth = 1; |
357 | icu_data[M32R_IRQ_DMA1].icucr = 0; | 357 | icu_data[M32R_IRQ_DMA1].icucr = 0; |
@@ -360,7 +360,7 @@ void __init init_IRQ(void) | |||
360 | #ifdef CONFIG_SERIAL_M32R_PLDSIO | 360 | #ifdef CONFIG_SERIAL_M32R_PLDSIO |
361 | /* INT#1: SIO0 Receive on PLD */ | 361 | /* INT#1: SIO0 Receive on PLD */ |
362 | irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED; | 362 | irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED; |
363 | irq_desc[PLD_IRQ_SIO0_RCV].handler = &opsput_pld_irq_type; | 363 | irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type; |
364 | irq_desc[PLD_IRQ_SIO0_RCV].action = 0; | 364 | irq_desc[PLD_IRQ_SIO0_RCV].action = 0; |
365 | irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */ | 365 | irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */ |
366 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; | 366 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; |
@@ -368,7 +368,7 @@ void __init init_IRQ(void) | |||
368 | 368 | ||
369 | /* INT#1: SIO0 Send on PLD */ | 369 | /* INT#1: SIO0 Send on PLD */ |
370 | irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED; | 370 | irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED; |
371 | irq_desc[PLD_IRQ_SIO0_SND].handler = &opsput_pld_irq_type; | 371 | irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type; |
372 | irq_desc[PLD_IRQ_SIO0_SND].action = 0; | 372 | irq_desc[PLD_IRQ_SIO0_SND].action = 0; |
373 | irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */ | 373 | irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */ |
374 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; | 374 | pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; |
@@ -378,7 +378,7 @@ void __init init_IRQ(void) | |||
378 | #if defined(CONFIG_M32R_CFC) | 378 | #if defined(CONFIG_M32R_CFC) |
379 | /* INT#1: CFC IREQ on PLD */ | 379 | /* INT#1: CFC IREQ on PLD */ |
380 | irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; | 380 | irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; |
381 | irq_desc[PLD_IRQ_CFIREQ].handler = &opsput_pld_irq_type; | 381 | irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type; |
382 | irq_desc[PLD_IRQ_CFIREQ].action = 0; | 382 | irq_desc[PLD_IRQ_CFIREQ].action = 0; |
383 | irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ | 383 | irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ |
384 | pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ | 384 | pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ |
@@ -386,7 +386,7 @@ void __init init_IRQ(void) | |||
386 | 386 | ||
387 | /* INT#1: CFC Insert on PLD */ | 387 | /* INT#1: CFC Insert on PLD */ |
388 | irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; | 388 | irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; |
389 | irq_desc[PLD_IRQ_CFC_INSERT].handler = &opsput_pld_irq_type; | 389 | irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type; |
390 | irq_desc[PLD_IRQ_CFC_INSERT].action = 0; | 390 | irq_desc[PLD_IRQ_CFC_INSERT].action = 0; |
391 | irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ | 391 | irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ |
392 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ | 392 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ |
@@ -394,7 +394,7 @@ void __init init_IRQ(void) | |||
394 | 394 | ||
395 | /* INT#1: CFC Eject on PLD */ | 395 | /* INT#1: CFC Eject on PLD */ |
396 | irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; | 396 | irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; |
397 | irq_desc[PLD_IRQ_CFC_EJECT].handler = &opsput_pld_irq_type; | 397 | irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type; |
398 | irq_desc[PLD_IRQ_CFC_EJECT].action = 0; | 398 | irq_desc[PLD_IRQ_CFC_EJECT].action = 0; |
399 | irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ | 399 | irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ |
400 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ | 400 | pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ |
@@ -420,7 +420,7 @@ void __init init_IRQ(void) | |||
420 | outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ | 420 | outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ |
421 | 421 | ||
422 | irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED; | 422 | irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED; |
423 | irq_desc[OPSPUT_LCD_IRQ_USB_INT1].handler = &opsput_lcdpld_irq_type; | 423 | irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type; |
424 | irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0; | 424 | irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0; |
425 | irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1; | 425 | irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1; |
426 | lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ | 426 | lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ |
@@ -438,7 +438,7 @@ void __init init_IRQ(void) | |||
438 | * INT3# is used for AR | 438 | * INT3# is used for AR |
439 | */ | 439 | */ |
440 | irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; | 440 | irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; |
441 | irq_desc[M32R_IRQ_INT3].handler = &opsput_irq_type; | 441 | irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type; |
442 | irq_desc[M32R_IRQ_INT3].action = 0; | 442 | irq_desc[M32R_IRQ_INT3].action = 0; |
443 | irq_desc[M32R_IRQ_INT3].depth = 1; | 443 | irq_desc[M32R_IRQ_INT3].depth = 1; |
444 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; | 444 | icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; |
diff --git a/arch/m32r/kernel/setup_usrv.c b/arch/m32r/kernel/setup_usrv.c index 64be659a23e7..7fa12d8f66b4 100644 --- a/arch/m32r/kernel/setup_usrv.c +++ b/arch/m32r/kernel/setup_usrv.c | |||
@@ -158,7 +158,7 @@ void __init init_IRQ(void) | |||
158 | 158 | ||
159 | /* MFT2 : system timer */ | 159 | /* MFT2 : system timer */ |
160 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; | 160 | irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; |
161 | irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type; | 161 | irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type; |
162 | irq_desc[M32R_IRQ_MFT2].action = 0; | 162 | irq_desc[M32R_IRQ_MFT2].action = 0; |
163 | irq_desc[M32R_IRQ_MFT2].depth = 1; | 163 | irq_desc[M32R_IRQ_MFT2].depth = 1; |
164 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; | 164 | icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; |
@@ -167,7 +167,7 @@ void __init init_IRQ(void) | |||
167 | #if defined(CONFIG_SERIAL_M32R_SIO) | 167 | #if defined(CONFIG_SERIAL_M32R_SIO) |
168 | /* SIO0_R : uart receive data */ | 168 | /* SIO0_R : uart receive data */ |
169 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; | 169 | irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; |
170 | irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type; | 170 | irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type; |
171 | irq_desc[M32R_IRQ_SIO0_R].action = 0; | 171 | irq_desc[M32R_IRQ_SIO0_R].action = 0; |
172 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; | 172 | irq_desc[M32R_IRQ_SIO0_R].depth = 1; |
173 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; | 173 | icu_data[M32R_IRQ_SIO0_R].icucr = 0; |
@@ -175,7 +175,7 @@ void __init init_IRQ(void) | |||
175 | 175 | ||
176 | /* SIO0_S : uart send data */ | 176 | /* SIO0_S : uart send data */ |
177 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; | 177 | irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; |
178 | irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type; | 178 | irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type; |
179 | irq_desc[M32R_IRQ_SIO0_S].action = 0; | 179 | irq_desc[M32R_IRQ_SIO0_S].action = 0; |
180 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; | 180 | irq_desc[M32R_IRQ_SIO0_S].depth = 1; |
181 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; | 181 | icu_data[M32R_IRQ_SIO0_S].icucr = 0; |
@@ -183,7 +183,7 @@ void __init init_IRQ(void) | |||
183 | 183 | ||
184 | /* SIO1_R : uart receive data */ | 184 | /* SIO1_R : uart receive data */ |
185 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; | 185 | irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; |
186 | irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type; | 186 | irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type; |
187 | irq_desc[M32R_IRQ_SIO1_R].action = 0; | 187 | irq_desc[M32R_IRQ_SIO1_R].action = 0; |
188 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; | 188 | irq_desc[M32R_IRQ_SIO1_R].depth = 1; |
189 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; | 189 | icu_data[M32R_IRQ_SIO1_R].icucr = 0; |
@@ -191,7 +191,7 @@ void __init init_IRQ(void) | |||
191 | 191 | ||
192 | /* SIO1_S : uart send data */ | 192 | /* SIO1_S : uart send data */ |
193 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; | 193 | irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; |
194 | irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type; | 194 | irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type; |
195 | irq_desc[M32R_IRQ_SIO1_S].action = 0; | 195 | irq_desc[M32R_IRQ_SIO1_S].action = 0; |
196 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; | 196 | irq_desc[M32R_IRQ_SIO1_S].depth = 1; |
197 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; | 197 | icu_data[M32R_IRQ_SIO1_S].icucr = 0; |
@@ -201,7 +201,7 @@ void __init init_IRQ(void) | |||
201 | /* INT#67-#71: CFC#0 IREQ on PLD */ | 201 | /* INT#67-#71: CFC#0 IREQ on PLD */ |
202 | for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) { | 202 | for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) { |
203 | irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED; | 203 | irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED; |
204 | irq_desc[PLD_IRQ_CF0 + i].handler = &m32700ut_pld_irq_type; | 204 | irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type; |
205 | irq_desc[PLD_IRQ_CF0 + i].action = 0; | 205 | irq_desc[PLD_IRQ_CF0 + i].action = 0; |
206 | irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */ | 206 | irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */ |
207 | pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr | 207 | pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr |
@@ -212,7 +212,7 @@ void __init init_IRQ(void) | |||
212 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) | 212 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) |
213 | /* INT#76: 16552D#0 IREQ on PLD */ | 213 | /* INT#76: 16552D#0 IREQ on PLD */ |
214 | irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED; | 214 | irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED; |
215 | irq_desc[PLD_IRQ_UART0].handler = &m32700ut_pld_irq_type; | 215 | irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type; |
216 | irq_desc[PLD_IRQ_UART0].action = 0; | 216 | irq_desc[PLD_IRQ_UART0].action = 0; |
217 | irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */ | 217 | irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */ |
218 | pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr | 218 | pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr |
@@ -221,7 +221,7 @@ void __init init_IRQ(void) | |||
221 | 221 | ||
222 | /* INT#77: 16552D#1 IREQ on PLD */ | 222 | /* INT#77: 16552D#1 IREQ on PLD */ |
223 | irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED; | 223 | irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED; |
224 | irq_desc[PLD_IRQ_UART1].handler = &m32700ut_pld_irq_type; | 224 | irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type; |
225 | irq_desc[PLD_IRQ_UART1].action = 0; | 225 | irq_desc[PLD_IRQ_UART1].action = 0; |
226 | irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */ | 226 | irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */ |
227 | pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr | 227 | pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr |
@@ -232,7 +232,7 @@ void __init init_IRQ(void) | |||
232 | #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE) | 232 | #if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE) |
233 | /* INT#80: AK4524 IREQ on PLD */ | 233 | /* INT#80: AK4524 IREQ on PLD */ |
234 | irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED; | 234 | irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED; |
235 | irq_desc[PLD_IRQ_SNDINT].handler = &m32700ut_pld_irq_type; | 235 | irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type; |
236 | irq_desc[PLD_IRQ_SNDINT].action = 0; | 236 | irq_desc[PLD_IRQ_SNDINT].action = 0; |
237 | irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */ | 237 | irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */ |
238 | pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr | 238 | pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr |
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index 8b6e723eb82b..e767f2ddae72 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig | |||
@@ -540,6 +540,59 @@ config RAM32BIT | |||
540 | 540 | ||
541 | endchoice | 541 | endchoice |
542 | 542 | ||
543 | comment "ROM configuration" | ||
544 | |||
545 | config ROM | ||
546 | bool "Specify ROM linker regions" | ||
547 | default n | ||
548 | help | ||
549 | Define a ROM region for the linker script. This creates a kernel | ||
550 | that can be stored in flash, with possibly the text, and data | ||
551 | regions being copied out to RAM at startup. | ||
552 | |||
553 | config ROMBASE | ||
554 | hex "Address of the base of ROM device" | ||
555 | default "0" | ||
556 | depends on ROM | ||
557 | help | ||
558 | Define the address that the ROM region starts at. Some platforms | ||
559 | use this to set their chip select region accordingly for the boot | ||
560 | device. | ||
561 | |||
562 | config ROMVEC | ||
563 | hex "Address of the base of the ROM vectors" | ||
564 | default "0" | ||
565 | depends on ROM | ||
566 | help | ||
567 | This is almost always the same as the base of the ROM. Since on all | ||
568 | 68000 type varients the vectors are at the base of the boot device | ||
569 | on system startup. | ||
570 | |||
571 | config ROMVECSIZE | ||
572 | hex "Size of ROM vector region (in bytes)" | ||
573 | default "0x400" | ||
574 | depends on ROM | ||
575 | help | ||
576 | Define the size of the vector region in ROM. For most 68000 | ||
577 | varients this would be 0x400 bytes in size. Set to 0 if you do | ||
578 | not want a vector region at the start of the ROM. | ||
579 | |||
580 | config ROMSTART | ||
581 | hex "Address of the base of system image in ROM" | ||
582 | default "0x400" | ||
583 | depends on ROM | ||
584 | help | ||
585 | Define the start address of the system image in ROM. Commonly this | ||
586 | is strait after the ROM vectors. | ||
587 | |||
588 | config ROMSIZE | ||
589 | hex "Size of the ROM device" | ||
590 | default "0x100000" | ||
591 | depends on ROM | ||
592 | help | ||
593 | Size of the ROM device. On some platforms this is used to setup | ||
594 | the chip select that controls the boot ROM device. | ||
595 | |||
543 | choice | 596 | choice |
544 | prompt "Kernel executes from" | 597 | prompt "Kernel executes from" |
545 | ---help--- | 598 | ---help--- |
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile index 6f880cbff1c8..8951793fd8d4 100644 --- a/arch/m68knommu/Makefile +++ b/arch/m68knommu/Makefile | |||
@@ -21,6 +21,7 @@ platform-$(CONFIG_M527x) := 527x | |||
21 | platform-$(CONFIG_M5272) := 5272 | 21 | platform-$(CONFIG_M5272) := 5272 |
22 | platform-$(CONFIG_M528x) := 528x | 22 | platform-$(CONFIG_M528x) := 528x |
23 | platform-$(CONFIG_M5307) := 5307 | 23 | platform-$(CONFIG_M5307) := 5307 |
24 | platform-$(CONFIG_M532x) := 532x | ||
24 | platform-$(CONFIG_M5407) := 5407 | 25 | platform-$(CONFIG_M5407) := 5407 |
25 | PLATFORM := $(platform-y) | 26 | PLATFORM := $(platform-y) |
26 | 27 | ||
@@ -44,6 +45,7 @@ board-$(CONFIG_senTec) := senTec | |||
44 | board-$(CONFIG_SNEHA) := SNEHA | 45 | board-$(CONFIG_SNEHA) := SNEHA |
45 | board-$(CONFIG_M5208EVB) := M5208EVB | 46 | board-$(CONFIG_M5208EVB) := M5208EVB |
46 | board-$(CONFIG_MOD5272) := MOD5272 | 47 | board-$(CONFIG_MOD5272) := MOD5272 |
48 | board-$(CONFIG_AVNET) := AVNET | ||
47 | BOARD := $(board-y) | 49 | BOARD := $(board-y) |
48 | 50 | ||
49 | model-$(CONFIG_RAMKERNEL) := ram | 51 | model-$(CONFIG_RAMKERNEL) := ram |
@@ -65,6 +67,7 @@ cpuclass-$(CONFIG_M527x) := 5307 | |||
65 | cpuclass-$(CONFIG_M5272) := 5307 | 67 | cpuclass-$(CONFIG_M5272) := 5307 |
66 | cpuclass-$(CONFIG_M528x) := 5307 | 68 | cpuclass-$(CONFIG_M528x) := 5307 |
67 | cpuclass-$(CONFIG_M5307) := 5307 | 69 | cpuclass-$(CONFIG_M5307) := 5307 |
70 | cpuclass-$(CONFIG_M532x) := 5307 | ||
68 | cpuclass-$(CONFIG_M5407) := 5307 | 71 | cpuclass-$(CONFIG_M5407) := 5307 |
69 | cpuclass-$(CONFIG_M68328) := 68328 | 72 | cpuclass-$(CONFIG_M68328) := 68328 |
70 | cpuclass-$(CONFIG_M68EZ328) := 68328 | 73 | cpuclass-$(CONFIG_M68EZ328) := 68328 |
@@ -81,16 +84,17 @@ export PLATFORM BOARD MODEL CPUCLASS | |||
81 | # | 84 | # |
82 | # Some CFLAG additions based on specific CPU type. | 85 | # Some CFLAG additions based on specific CPU type. |
83 | # | 86 | # |
84 | cflags-$(CONFIG_M5206) := -m5200 -Wa,-S -Wa,-m5200 | 87 | cflags-$(CONFIG_M5206) := -m5200 |
85 | cflags-$(CONFIG_M5206e) := -m5200 -Wa,-S -Wa,-m5200 | 88 | cflags-$(CONFIG_M5206e) := -m5200 |
86 | cflags-$(CONFIG_M520x) := -m5307 -Wa,-S -Wa,-m5307 | 89 | cflags-$(CONFIG_M520x) := -m5307 |
87 | cflags-$(CONFIG_M523x) := -m5307 -Wa,-S -Wa,-m5307 | 90 | cflags-$(CONFIG_M523x) := -m5307 |
88 | cflags-$(CONFIG_M5249) := -m5200 -Wa,-S -Wa,-m5200 | 91 | cflags-$(CONFIG_M5249) := -m5200 |
89 | cflags-$(CONFIG_M527x) := -m5307 -Wa,-S -Wa,-m5307 | 92 | cflags-$(CONFIG_M527x) := -m5307 |
90 | cflags-$(CONFIG_M5272) := -m5307 -Wa,-S -Wa,-m5307 | 93 | cflags-$(CONFIG_M5272) := -m5307 |
91 | cflags-$(CONFIG_M528x) := -m5307 -Wa,-S -Wa,-m5307 | 94 | cflags-$(CONFIG_M528x) := -m5307 |
92 | cflags-$(CONFIG_M5307) := -m5307 -Wa,-S -Wa,-m5307 | 95 | cflags-$(CONFIG_M5307) := -m5307 |
93 | cflags-$(CONFIG_M5407) := -m5200 -Wa,-S -Wa,-m5200 | 96 | cflags-$(CONFIG_M532x) := -m5307 |
97 | cflags-$(CONFIG_M5407) := -m5200 | ||
94 | cflags-$(CONFIG_M68328) := -m68000 | 98 | cflags-$(CONFIG_M68328) := -m68000 |
95 | cflags-$(CONFIG_M68EZ328) := -m68000 | 99 | cflags-$(CONFIG_M68EZ328) := -m68000 |
96 | cflags-$(CONFIG_M68VZ328) := -m68000 | 100 | cflags-$(CONFIG_M68VZ328) := -m68000 |
diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig index 2d59ba1a79ba..3891de09ac23 100644 --- a/arch/m68knommu/defconfig +++ b/arch/m68knommu/defconfig | |||
@@ -1,21 +1,22 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.13-uc0 | 3 | # Linux kernel version: 2.6.17 |
4 | # Wed Aug 31 15:03:26 2005 | 4 | # Tue Jun 27 12:57:06 2006 |
5 | # | 5 | # |
6 | CONFIG_M68KNOMMU=y | 6 | CONFIG_M68K=y |
7 | # CONFIG_MMU is not set | 7 | # CONFIG_MMU is not set |
8 | # CONFIG_FPU is not set | 8 | # CONFIG_FPU is not set |
9 | CONFIG_UID16=y | ||
10 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
11 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set | 10 | # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set |
11 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
12 | CONFIG_GENERIC_HWEIGHT=y | ||
12 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 13 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
14 | CONFIG_TIME_LOW_RES=y | ||
13 | 15 | ||
14 | # | 16 | # |
15 | # Code maturity level options | 17 | # Code maturity level options |
16 | # | 18 | # |
17 | CONFIG_EXPERIMENTAL=y | 19 | CONFIG_EXPERIMENTAL=y |
18 | CONFIG_CLEAN_COMPILE=y | ||
19 | CONFIG_BROKEN_ON_SMP=y | 20 | CONFIG_BROKEN_ON_SMP=y |
20 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 21 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
21 | 22 | ||
@@ -23,26 +24,30 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
23 | # General setup | 24 | # General setup |
24 | # | 25 | # |
25 | CONFIG_LOCALVERSION="" | 26 | CONFIG_LOCALVERSION="" |
27 | CONFIG_LOCALVERSION_AUTO=y | ||
28 | # CONFIG_SYSVIPC is not set | ||
26 | # CONFIG_POSIX_MQUEUE is not set | 29 | # CONFIG_POSIX_MQUEUE is not set |
27 | # CONFIG_BSD_PROCESS_ACCT is not set | 30 | # CONFIG_BSD_PROCESS_ACCT is not set |
28 | # CONFIG_SYSCTL is not set | 31 | # CONFIG_SYSCTL is not set |
29 | # CONFIG_AUDIT is not set | 32 | # CONFIG_AUDIT is not set |
30 | # CONFIG_HOTPLUG is not set | ||
31 | # CONFIG_KOBJECT_UEVENT is not set | ||
32 | # CONFIG_IKCONFIG is not set | 33 | # CONFIG_IKCONFIG is not set |
34 | # CONFIG_RELAY is not set | ||
35 | CONFIG_INITRAMFS_SOURCE="" | ||
36 | CONFIG_UID16=y | ||
37 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
33 | CONFIG_EMBEDDED=y | 38 | CONFIG_EMBEDDED=y |
34 | # CONFIG_KALLSYMS is not set | 39 | # CONFIG_KALLSYMS is not set |
40 | # CONFIG_HOTPLUG is not set | ||
35 | CONFIG_PRINTK=y | 41 | CONFIG_PRINTK=y |
36 | CONFIG_BUG=y | 42 | CONFIG_BUG=y |
43 | CONFIG_ELF_CORE=y | ||
37 | CONFIG_BASE_FULL=y | 44 | CONFIG_BASE_FULL=y |
38 | # CONFIG_FUTEX is not set | 45 | # CONFIG_FUTEX is not set |
39 | # CONFIG_EPOLL is not set | 46 | # CONFIG_EPOLL is not set |
40 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 47 | CONFIG_SLAB=y |
41 | CONFIG_CC_ALIGN_FUNCTIONS=0 | 48 | CONFIG_TINY_SHMEM=y |
42 | CONFIG_CC_ALIGN_LABELS=0 | ||
43 | CONFIG_CC_ALIGN_LOOPS=0 | ||
44 | CONFIG_CC_ALIGN_JUMPS=0 | ||
45 | CONFIG_BASE_SMALL=0 | 49 | CONFIG_BASE_SMALL=0 |
50 | # CONFIG_SLOB is not set | ||
46 | 51 | ||
47 | # | 52 | # |
48 | # Loadable module support | 53 | # Loadable module support |
@@ -50,6 +55,24 @@ CONFIG_BASE_SMALL=0 | |||
50 | # CONFIG_MODULES is not set | 55 | # CONFIG_MODULES is not set |
51 | 56 | ||
52 | # | 57 | # |
58 | # Block layer | ||
59 | # | ||
60 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
61 | |||
62 | # | ||
63 | # IO Schedulers | ||
64 | # | ||
65 | CONFIG_IOSCHED_NOOP=y | ||
66 | # CONFIG_IOSCHED_AS is not set | ||
67 | # CONFIG_IOSCHED_DEADLINE is not set | ||
68 | # CONFIG_IOSCHED_CFQ is not set | ||
69 | # CONFIG_DEFAULT_AS is not set | ||
70 | # CONFIG_DEFAULT_DEADLINE is not set | ||
71 | # CONFIG_DEFAULT_CFQ is not set | ||
72 | CONFIG_DEFAULT_NOOP=y | ||
73 | CONFIG_DEFAULT_IOSCHED="noop" | ||
74 | |||
75 | # | ||
53 | # Processor type and features | 76 | # Processor type and features |
54 | # | 77 | # |
55 | # CONFIG_M68328 is not set | 78 | # CONFIG_M68328 is not set |
@@ -58,6 +81,7 @@ CONFIG_BASE_SMALL=0 | |||
58 | # CONFIG_M68360 is not set | 81 | # CONFIG_M68360 is not set |
59 | # CONFIG_M5206 is not set | 82 | # CONFIG_M5206 is not set |
60 | # CONFIG_M5206e is not set | 83 | # CONFIG_M5206e is not set |
84 | # CONFIG_M520x is not set | ||
61 | # CONFIG_M523x is not set | 85 | # CONFIG_M523x is not set |
62 | # CONFIG_M5249 is not set | 86 | # CONFIG_M5249 is not set |
63 | # CONFIG_M5271 is not set | 87 | # CONFIG_M5271 is not set |
@@ -65,29 +89,12 @@ CONFIG_M5272=y | |||
65 | # CONFIG_M5275 is not set | 89 | # CONFIG_M5275 is not set |
66 | # CONFIG_M528x is not set | 90 | # CONFIG_M528x is not set |
67 | # CONFIG_M5307 is not set | 91 | # CONFIG_M5307 is not set |
92 | # CONFIG_M532x is not set | ||
68 | # CONFIG_M5407 is not set | 93 | # CONFIG_M5407 is not set |
69 | CONFIG_COLDFIRE=y | 94 | CONFIG_COLDFIRE=y |
70 | # CONFIG_CLOCK_AUTO is not set | 95 | CONFIG_CLOCK_SET=y |
71 | # CONFIG_CLOCK_11MHz is not set | 96 | CONFIG_CLOCK_FREQ=66666666 |
72 | # CONFIG_CLOCK_16MHz is not set | 97 | CONFIG_CLOCK_DIV=1 |
73 | # CONFIG_CLOCK_20MHz is not set | ||
74 | # CONFIG_CLOCK_24MHz is not set | ||
75 | # CONFIG_CLOCK_25MHz is not set | ||
76 | # CONFIG_CLOCK_33MHz is not set | ||
77 | # CONFIG_CLOCK_40MHz is not set | ||
78 | # CONFIG_CLOCK_45MHz is not set | ||
79 | # CONFIG_CLOCK_48MHz is not set | ||
80 | # CONFIG_CLOCK_50MHz is not set | ||
81 | # CONFIG_CLOCK_54MHz is not set | ||
82 | # CONFIG_CLOCK_60MHz is not set | ||
83 | # CONFIG_CLOCK_62_5MHz is not set | ||
84 | # CONFIG_CLOCK_64MHz is not set | ||
85 | CONFIG_CLOCK_66MHz=y | ||
86 | # CONFIG_CLOCK_70MHz is not set | ||
87 | # CONFIG_CLOCK_100MHz is not set | ||
88 | # CONFIG_CLOCK_140MHz is not set | ||
89 | # CONFIG_CLOCK_150MHz is not set | ||
90 | # CONFIG_CLOCK_166MHz is not set | ||
91 | 98 | ||
92 | # | 99 | # |
93 | # Platform | 100 | # Platform |
@@ -102,11 +109,14 @@ CONFIG_M5272C3=y | |||
102 | CONFIG_FREESCALE=y | 109 | CONFIG_FREESCALE=y |
103 | # CONFIG_LARGE_ALLOCS is not set | 110 | # CONFIG_LARGE_ALLOCS is not set |
104 | CONFIG_4KSTACKS=y | 111 | CONFIG_4KSTACKS=y |
105 | CONFIG_RAMAUTO=y | 112 | |
106 | # CONFIG_RAM4MB is not set | 113 | # |
107 | # CONFIG_RAM8MB is not set | 114 | # RAM configuration |
108 | # CONFIG_RAM16MB is not set | 115 | # |
109 | # CONFIG_RAM32MB is not set | 116 | CONFIG_RAMBASE=0x0 |
117 | CONFIG_RAMSIZE=0x800000 | ||
118 | CONFIG_VECTORBASE=0x0 | ||
119 | CONFIG_KERNELBASE=0x20000 | ||
110 | CONFIG_RAMAUTOBIT=y | 120 | CONFIG_RAMAUTOBIT=y |
111 | # CONFIG_RAM8BIT is not set | 121 | # CONFIG_RAM8BIT is not set |
112 | # CONFIG_RAM16BIT is not set | 122 | # CONFIG_RAM16BIT is not set |
@@ -119,6 +129,8 @@ CONFIG_FLATMEM_MANUAL=y | |||
119 | # CONFIG_SPARSEMEM_MANUAL is not set | 129 | # CONFIG_SPARSEMEM_MANUAL is not set |
120 | CONFIG_FLATMEM=y | 130 | CONFIG_FLATMEM=y |
121 | CONFIG_FLAT_NODE_MEM_MAP=y | 131 | CONFIG_FLAT_NODE_MEM_MAP=y |
132 | # CONFIG_SPARSEMEM_STATIC is not set | ||
133 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
122 | 134 | ||
123 | # | 135 | # |
124 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) | 136 | # Bus options (PCI, PCMCIA, EISA, MCA, ISA) |
@@ -140,6 +152,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y | |||
140 | CONFIG_BINFMT_FLAT=y | 152 | CONFIG_BINFMT_FLAT=y |
141 | # CONFIG_BINFMT_ZFLAT is not set | 153 | # CONFIG_BINFMT_ZFLAT is not set |
142 | # CONFIG_BINFMT_SHARED_FLAT is not set | 154 | # CONFIG_BINFMT_SHARED_FLAT is not set |
155 | # CONFIG_BINFMT_AOUT is not set | ||
143 | # CONFIG_BINFMT_MISC is not set | 156 | # CONFIG_BINFMT_MISC is not set |
144 | 157 | ||
145 | # | 158 | # |
@@ -155,6 +168,7 @@ CONFIG_NET=y | |||
155 | # | 168 | # |
156 | # Networking options | 169 | # Networking options |
157 | # | 170 | # |
171 | # CONFIG_NETDEBUG is not set | ||
158 | CONFIG_PACKET=y | 172 | CONFIG_PACKET=y |
159 | # CONFIG_PACKET_MMAP is not set | 173 | # CONFIG_PACKET_MMAP is not set |
160 | CONFIG_UNIX=y | 174 | CONFIG_UNIX=y |
@@ -171,18 +185,30 @@ CONFIG_IP_FIB_HASH=y | |||
171 | # CONFIG_INET_AH is not set | 185 | # CONFIG_INET_AH is not set |
172 | # CONFIG_INET_ESP is not set | 186 | # CONFIG_INET_ESP is not set |
173 | # CONFIG_INET_IPCOMP is not set | 187 | # CONFIG_INET_IPCOMP is not set |
188 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
174 | # CONFIG_INET_TUNNEL is not set | 189 | # CONFIG_INET_TUNNEL is not set |
175 | # CONFIG_IP_TCPDIAG is not set | 190 | # CONFIG_INET_DIAG is not set |
176 | # CONFIG_IP_TCPDIAG_IPV6 is not set | ||
177 | # CONFIG_TCP_CONG_ADVANCED is not set | 191 | # CONFIG_TCP_CONG_ADVANCED is not set |
178 | CONFIG_TCP_CONG_BIC=y | 192 | CONFIG_TCP_CONG_BIC=y |
179 | # CONFIG_IPV6 is not set | 193 | # CONFIG_IPV6 is not set |
194 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
195 | # CONFIG_INET6_TUNNEL is not set | ||
180 | # CONFIG_NETFILTER is not set | 196 | # CONFIG_NETFILTER is not set |
181 | 197 | ||
182 | # | 198 | # |
199 | # DCCP Configuration (EXPERIMENTAL) | ||
200 | # | ||
201 | # CONFIG_IP_DCCP is not set | ||
202 | |||
203 | # | ||
183 | # SCTP Configuration (EXPERIMENTAL) | 204 | # SCTP Configuration (EXPERIMENTAL) |
184 | # | 205 | # |
185 | # CONFIG_IP_SCTP is not set | 206 | # CONFIG_IP_SCTP is not set |
207 | |||
208 | # | ||
209 | # TIPC Configuration (EXPERIMENTAL) | ||
210 | # | ||
211 | # CONFIG_TIPC is not set | ||
186 | # CONFIG_ATM is not set | 212 | # CONFIG_ATM is not set |
187 | # CONFIG_BRIDGE is not set | 213 | # CONFIG_BRIDGE is not set |
188 | # CONFIG_VLAN_8021Q is not set | 214 | # CONFIG_VLAN_8021Q is not set |
@@ -195,8 +221,11 @@ CONFIG_TCP_CONG_BIC=y | |||
195 | # CONFIG_NET_DIVERT is not set | 221 | # CONFIG_NET_DIVERT is not set |
196 | # CONFIG_ECONET is not set | 222 | # CONFIG_ECONET is not set |
197 | # CONFIG_WAN_ROUTER is not set | 223 | # CONFIG_WAN_ROUTER is not set |
224 | |||
225 | # | ||
226 | # QoS and/or fair queueing | ||
227 | # | ||
198 | # CONFIG_NET_SCHED is not set | 228 | # CONFIG_NET_SCHED is not set |
199 | # CONFIG_NET_CLS_ROUTE is not set | ||
200 | 229 | ||
201 | # | 230 | # |
202 | # Network testing | 231 | # Network testing |
@@ -205,6 +234,7 @@ CONFIG_TCP_CONG_BIC=y | |||
205 | # CONFIG_HAMRADIO is not set | 234 | # CONFIG_HAMRADIO is not set |
206 | # CONFIG_IRDA is not set | 235 | # CONFIG_IRDA is not set |
207 | # CONFIG_BT is not set | 236 | # CONFIG_BT is not set |
237 | # CONFIG_IEEE80211 is not set | ||
208 | 238 | ||
209 | # | 239 | # |
210 | # Device Drivers | 240 | # Device Drivers |
@@ -218,6 +248,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y | |||
218 | # CONFIG_FW_LOADER is not set | 248 | # CONFIG_FW_LOADER is not set |
219 | 249 | ||
220 | # | 250 | # |
251 | # Connector - unified userspace <-> kernelspace linker | ||
252 | # | ||
253 | # CONFIG_CONNECTOR is not set | ||
254 | |||
255 | # | ||
221 | # Memory Technology Devices (MTD) | 256 | # Memory Technology Devices (MTD) |
222 | # | 257 | # |
223 | CONFIG_MTD=y | 258 | CONFIG_MTD=y |
@@ -235,6 +270,7 @@ CONFIG_MTD_BLOCK=y | |||
235 | # CONFIG_FTL is not set | 270 | # CONFIG_FTL is not set |
236 | # CONFIG_NFTL is not set | 271 | # CONFIG_NFTL is not set |
237 | # CONFIG_INFTL is not set | 272 | # CONFIG_INFTL is not set |
273 | # CONFIG_RFD_FTL is not set | ||
238 | 274 | ||
239 | # | 275 | # |
240 | # RAM/ROM/Flash chip drivers | 276 | # RAM/ROM/Flash chip drivers |
@@ -254,13 +290,13 @@ CONFIG_MTD_CFI_I2=y | |||
254 | CONFIG_MTD_RAM=y | 290 | CONFIG_MTD_RAM=y |
255 | # CONFIG_MTD_ROM is not set | 291 | # CONFIG_MTD_ROM is not set |
256 | # CONFIG_MTD_ABSENT is not set | 292 | # CONFIG_MTD_ABSENT is not set |
293 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
257 | 294 | ||
258 | # | 295 | # |
259 | # Mapping drivers for chip access | 296 | # Mapping drivers for chip access |
260 | # | 297 | # |
261 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 298 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
262 | CONFIG_MTD_UCLINUX=y | 299 | CONFIG_MTD_UCLINUX=y |
263 | # CONFIG_MTD_SNAPGEARuC is not set | ||
264 | # CONFIG_MTD_PLATRAM is not set | 300 | # CONFIG_MTD_PLATRAM is not set |
265 | 301 | ||
266 | # | 302 | # |
@@ -269,7 +305,6 @@ CONFIG_MTD_UCLINUX=y | |||
269 | # CONFIG_MTD_SLRAM is not set | 305 | # CONFIG_MTD_SLRAM is not set |
270 | # CONFIG_MTD_PHRAM is not set | 306 | # CONFIG_MTD_PHRAM is not set |
271 | # CONFIG_MTD_MTDRAM is not set | 307 | # CONFIG_MTD_MTDRAM is not set |
272 | # CONFIG_MTD_BLKMTD is not set | ||
273 | # CONFIG_MTD_BLOCK2MTD is not set | 308 | # CONFIG_MTD_BLOCK2MTD is not set |
274 | 309 | ||
275 | # | 310 | # |
@@ -285,6 +320,11 @@ CONFIG_MTD_UCLINUX=y | |||
285 | # CONFIG_MTD_NAND is not set | 320 | # CONFIG_MTD_NAND is not set |
286 | 321 | ||
287 | # | 322 | # |
323 | # OneNAND Flash Device Drivers | ||
324 | # | ||
325 | # CONFIG_MTD_ONENAND is not set | ||
326 | |||
327 | # | ||
288 | # Parallel port support | 328 | # Parallel port support |
289 | # | 329 | # |
290 | # CONFIG_PARPORT is not set | 330 | # CONFIG_PARPORT is not set |
@@ -296,7 +336,6 @@ CONFIG_MTD_UCLINUX=y | |||
296 | # | 336 | # |
297 | # Block devices | 337 | # Block devices |
298 | # | 338 | # |
299 | # CONFIG_BLK_DEV_FD is not set | ||
300 | # CONFIG_BLK_DEV_COW_COMMON is not set | 339 | # CONFIG_BLK_DEV_COW_COMMON is not set |
301 | # CONFIG_BLK_DEV_LOOP is not set | 340 | # CONFIG_BLK_DEV_LOOP is not set |
302 | # CONFIG_BLK_DEV_NBD is not set | 341 | # CONFIG_BLK_DEV_NBD is not set |
@@ -304,16 +343,7 @@ CONFIG_BLK_DEV_RAM=y | |||
304 | CONFIG_BLK_DEV_RAM_COUNT=16 | 343 | CONFIG_BLK_DEV_RAM_COUNT=16 |
305 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 344 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
306 | # CONFIG_BLK_DEV_INITRD is not set | 345 | # CONFIG_BLK_DEV_INITRD is not set |
307 | CONFIG_INITRAMFS_SOURCE="" | ||
308 | # CONFIG_CDROM_PKTCDVD is not set | 346 | # CONFIG_CDROM_PKTCDVD is not set |
309 | |||
310 | # | ||
311 | # IO Schedulers | ||
312 | # | ||
313 | CONFIG_IOSCHED_NOOP=y | ||
314 | # CONFIG_IOSCHED_AS is not set | ||
315 | # CONFIG_IOSCHED_DEADLINE is not set | ||
316 | # CONFIG_IOSCHED_CFQ is not set | ||
317 | # CONFIG_ATA_OVER_ETH is not set | 347 | # CONFIG_ATA_OVER_ETH is not set |
318 | 348 | ||
319 | # | 349 | # |
@@ -324,6 +354,7 @@ CONFIG_IOSCHED_NOOP=y | |||
324 | # | 354 | # |
325 | # SCSI device support | 355 | # SCSI device support |
326 | # | 356 | # |
357 | # CONFIG_RAID_ATTRS is not set | ||
327 | # CONFIG_SCSI is not set | 358 | # CONFIG_SCSI is not set |
328 | 359 | ||
329 | # | 360 | # |
@@ -354,13 +385,15 @@ CONFIG_NETDEVICES=y | |||
354 | # CONFIG_TUN is not set | 385 | # CONFIG_TUN is not set |
355 | 386 | ||
356 | # | 387 | # |
388 | # PHY device support | ||
389 | # | ||
390 | # CONFIG_PHYLIB is not set | ||
391 | |||
392 | # | ||
357 | # Ethernet (10 or 100Mbit) | 393 | # Ethernet (10 or 100Mbit) |
358 | # | 394 | # |
359 | CONFIG_NET_ETHERNET=y | 395 | CONFIG_NET_ETHERNET=y |
360 | # CONFIG_MII is not set | 396 | # CONFIG_MII is not set |
361 | # CONFIG_NET_VENDOR_SMC is not set | ||
362 | # CONFIG_NE2000 is not set | ||
363 | # CONFIG_NET_PCI is not set | ||
364 | CONFIG_FEC=y | 397 | CONFIG_FEC=y |
365 | # CONFIG_FEC2 is not set | 398 | # CONFIG_FEC2 is not set |
366 | 399 | ||
@@ -392,6 +425,7 @@ CONFIG_PPP=y | |||
392 | # CONFIG_PPP_SYNC_TTY is not set | 425 | # CONFIG_PPP_SYNC_TTY is not set |
393 | # CONFIG_PPP_DEFLATE is not set | 426 | # CONFIG_PPP_DEFLATE is not set |
394 | # CONFIG_PPP_BSDCOMP is not set | 427 | # CONFIG_PPP_BSDCOMP is not set |
428 | # CONFIG_PPP_MPPE is not set | ||
395 | # CONFIG_PPPOE is not set | 429 | # CONFIG_PPPOE is not set |
396 | # CONFIG_SLIP is not set | 430 | # CONFIG_SLIP is not set |
397 | # CONFIG_SHAPER is not set | 431 | # CONFIG_SHAPER is not set |
@@ -425,8 +459,6 @@ CONFIG_PPP=y | |||
425 | # | 459 | # |
426 | # CONFIG_VT is not set | 460 | # CONFIG_VT is not set |
427 | # CONFIG_SERIAL_NONSTANDARD is not set | 461 | # CONFIG_SERIAL_NONSTANDARD is not set |
428 | # CONFIG_LEDMAN is not set | ||
429 | # CONFIG_RESETSWITCH is not set | ||
430 | 462 | ||
431 | # | 463 | # |
432 | # Serial drivers | 464 | # Serial drivers |
@@ -450,8 +482,6 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
450 | # Watchdog Cards | 482 | # Watchdog Cards |
451 | # | 483 | # |
452 | # CONFIG_WATCHDOG is not set | 484 | # CONFIG_WATCHDOG is not set |
453 | # CONFIG_MCFWATCHDOG is not set | ||
454 | # CONFIG_RTC is not set | ||
455 | # CONFIG_GEN_RTC is not set | 485 | # CONFIG_GEN_RTC is not set |
456 | # CONFIG_DTLK is not set | 486 | # CONFIG_DTLK is not set |
457 | # CONFIG_R3964 is not set | 487 | # CONFIG_R3964 is not set |
@@ -464,14 +494,19 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
464 | # | 494 | # |
465 | # TPM devices | 495 | # TPM devices |
466 | # | 496 | # |
467 | # CONFIG_MCF_QSPI is not set | 497 | # CONFIG_TCG_TPM is not set |
468 | # CONFIG_M41T11M6 is not set | 498 | # CONFIG_TELCLOCK is not set |
469 | 499 | ||
470 | # | 500 | # |
471 | # I2C support | 501 | # I2C support |
472 | # | 502 | # |
473 | # CONFIG_I2C is not set | 503 | # CONFIG_I2C is not set |
474 | # CONFIG_I2C_SENSOR is not set | 504 | |
505 | # | ||
506 | # SPI support | ||
507 | # | ||
508 | # CONFIG_SPI is not set | ||
509 | # CONFIG_SPI_MASTER is not set | ||
475 | 510 | ||
476 | # | 511 | # |
477 | # Dallas's 1-wire bus | 512 | # Dallas's 1-wire bus |
@@ -482,6 +517,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
482 | # Hardware Monitoring support | 517 | # Hardware Monitoring support |
483 | # | 518 | # |
484 | # CONFIG_HWMON is not set | 519 | # CONFIG_HWMON is not set |
520 | # CONFIG_HWMON_VID is not set | ||
485 | 521 | ||
486 | # | 522 | # |
487 | # Misc devices | 523 | # Misc devices |
@@ -491,6 +527,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
491 | # Multimedia devices | 527 | # Multimedia devices |
492 | # | 528 | # |
493 | # CONFIG_VIDEO_DEV is not set | 529 | # CONFIG_VIDEO_DEV is not set |
530 | CONFIG_VIDEO_V4L2=y | ||
494 | 531 | ||
495 | # | 532 | # |
496 | # Digital Video Broadcasting Devices | 533 | # Digital Video Broadcasting Devices |
@@ -503,11 +540,6 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
503 | # CONFIG_FB is not set | 540 | # CONFIG_FB is not set |
504 | 541 | ||
505 | # | 542 | # |
506 | # SPI support | ||
507 | # | ||
508 | # CONFIG_SPI is not set | ||
509 | |||
510 | # | ||
511 | # Sound | 543 | # Sound |
512 | # | 544 | # |
513 | # CONFIG_SOUND is not set | 545 | # CONFIG_SOUND is not set |
@@ -517,6 +549,11 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
517 | # | 549 | # |
518 | # CONFIG_USB_ARCH_HAS_HCD is not set | 550 | # CONFIG_USB_ARCH_HAS_HCD is not set |
519 | # CONFIG_USB_ARCH_HAS_OHCI is not set | 551 | # CONFIG_USB_ARCH_HAS_OHCI is not set |
552 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
553 | |||
554 | # | ||
555 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
556 | # | ||
520 | 557 | ||
521 | # | 558 | # |
522 | # USB Gadget Support | 559 | # USB Gadget Support |
@@ -529,29 +566,43 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
529 | # CONFIG_MMC is not set | 566 | # CONFIG_MMC is not set |
530 | 567 | ||
531 | # | 568 | # |
569 | # LED devices | ||
570 | # | ||
571 | # CONFIG_NEW_LEDS is not set | ||
572 | |||
573 | # | ||
574 | # LED drivers | ||
575 | # | ||
576 | |||
577 | # | ||
578 | # LED Triggers | ||
579 | # | ||
580 | |||
581 | # | ||
532 | # InfiniBand support | 582 | # InfiniBand support |
533 | # | 583 | # |
534 | 584 | ||
535 | # | 585 | # |
536 | # SN Devices | 586 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) |
537 | # | 587 | # |
538 | 588 | ||
539 | # | 589 | # |
590 | # Real Time Clock | ||
591 | # | ||
592 | # CONFIG_RTC_CLASS is not set | ||
593 | |||
594 | # | ||
540 | # File systems | 595 | # File systems |
541 | # | 596 | # |
542 | CONFIG_EXT2_FS=y | 597 | CONFIG_EXT2_FS=y |
543 | # CONFIG_EXT2_FS_XATTR is not set | 598 | # CONFIG_EXT2_FS_XATTR is not set |
544 | # CONFIG_EXT2_FS_XIP is not set | 599 | # CONFIG_EXT2_FS_XIP is not set |
545 | # CONFIG_EXT3_FS is not set | 600 | # CONFIG_EXT3_FS is not set |
546 | # CONFIG_JBD is not set | ||
547 | # CONFIG_REISERFS_FS is not set | 601 | # CONFIG_REISERFS_FS is not set |
548 | # CONFIG_JFS_FS is not set | 602 | # CONFIG_JFS_FS is not set |
549 | # CONFIG_FS_POSIX_ACL is not set | 603 | # CONFIG_FS_POSIX_ACL is not set |
550 | |||
551 | # | ||
552 | # XFS support | ||
553 | # | ||
554 | # CONFIG_XFS_FS is not set | 604 | # CONFIG_XFS_FS is not set |
605 | # CONFIG_OCFS2_FS is not set | ||
555 | # CONFIG_MINIX_FS is not set | 606 | # CONFIG_MINIX_FS is not set |
556 | CONFIG_ROMFS_FS=y | 607 | CONFIG_ROMFS_FS=y |
557 | # CONFIG_INOTIFY is not set | 608 | # CONFIG_INOTIFY is not set |
@@ -559,6 +610,7 @@ CONFIG_ROMFS_FS=y | |||
559 | # CONFIG_DNOTIFY is not set | 610 | # CONFIG_DNOTIFY is not set |
560 | # CONFIG_AUTOFS_FS is not set | 611 | # CONFIG_AUTOFS_FS is not set |
561 | # CONFIG_AUTOFS4_FS is not set | 612 | # CONFIG_AUTOFS4_FS is not set |
613 | # CONFIG_FUSE_FS is not set | ||
562 | 614 | ||
563 | # | 615 | # |
564 | # CD-ROM/DVD Filesystems | 616 | # CD-ROM/DVD Filesystems |
@@ -581,6 +633,7 @@ CONFIG_SYSFS=y | |||
581 | # CONFIG_TMPFS is not set | 633 | # CONFIG_TMPFS is not set |
582 | # CONFIG_HUGETLB_PAGE is not set | 634 | # CONFIG_HUGETLB_PAGE is not set |
583 | CONFIG_RAMFS=y | 635 | CONFIG_RAMFS=y |
636 | # CONFIG_CONFIGFS_FS is not set | ||
584 | 637 | ||
585 | # | 638 | # |
586 | # Miscellaneous filesystems | 639 | # Miscellaneous filesystems |
@@ -611,6 +664,7 @@ CONFIG_RAMFS=y | |||
611 | # CONFIG_NCP_FS is not set | 664 | # CONFIG_NCP_FS is not set |
612 | # CONFIG_CODA_FS is not set | 665 | # CONFIG_CODA_FS is not set |
613 | # CONFIG_AFS_FS is not set | 666 | # CONFIG_AFS_FS is not set |
667 | # CONFIG_9P_FS is not set | ||
614 | 668 | ||
615 | # | 669 | # |
616 | # Partition Types | 670 | # Partition Types |
@@ -627,8 +681,12 @@ CONFIG_MSDOS_PARTITION=y | |||
627 | # Kernel hacking | 681 | # Kernel hacking |
628 | # | 682 | # |
629 | # CONFIG_PRINTK_TIME is not set | 683 | # CONFIG_PRINTK_TIME is not set |
684 | # CONFIG_MAGIC_SYSRQ is not set | ||
630 | # CONFIG_DEBUG_KERNEL is not set | 685 | # CONFIG_DEBUG_KERNEL is not set |
631 | CONFIG_LOG_BUF_SHIFT=14 | 686 | CONFIG_LOG_BUF_SHIFT=14 |
687 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
688 | # CONFIG_DEBUG_FS is not set | ||
689 | # CONFIG_UNWIND_INFO is not set | ||
632 | # CONFIG_FULLDEBUG is not set | 690 | # CONFIG_FULLDEBUG is not set |
633 | # CONFIG_HIGHPROFILE is not set | 691 | # CONFIG_HIGHPROFILE is not set |
634 | # CONFIG_BOOTPARAM is not set | 692 | # CONFIG_BOOTPARAM is not set |
@@ -655,5 +713,6 @@ CONFIG_LOG_BUF_SHIFT=14 | |||
655 | # Library routines | 713 | # Library routines |
656 | # | 714 | # |
657 | # CONFIG_CRC_CCITT is not set | 715 | # CONFIG_CRC_CCITT is not set |
716 | # CONFIG_CRC16 is not set | ||
658 | # CONFIG_CRC32 is not set | 717 | # CONFIG_CRC32 is not set |
659 | # CONFIG_LIBCRC32C is not set | 718 | # CONFIG_LIBCRC32C is not set |
diff --git a/arch/m68knommu/kernel/comempci.c b/arch/m68knommu/kernel/comempci.c index 8670938f1107..db7a0c1cebae 100644 --- a/arch/m68knommu/kernel/comempci.c +++ b/arch/m68knommu/kernel/comempci.c | |||
@@ -357,7 +357,8 @@ void pcibios_fixup_bus(struct pci_bus *b) | |||
357 | 357 | ||
358 | /*****************************************************************************/ | 358 | /*****************************************************************************/ |
359 | 359 | ||
360 | void pcibios_align_resource(void *data, struct resource *res, unsigned long size, unsigned long align) | 360 | void pcibios_align_resource(void *data, struct resource *res, |
361 | resource_size_t size, resource_size_t align) | ||
361 | { | 362 | { |
362 | } | 363 | } |
363 | 364 | ||
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S index 6a2f0c693254..59ced831b792 100644 --- a/arch/m68knommu/kernel/vmlinux.lds.S +++ b/arch/m68knommu/kernel/vmlinux.lds.S | |||
@@ -3,63 +3,13 @@ | |||
3 | * | 3 | * |
4 | * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com> | 4 | * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com> |
5 | * | 5 | * |
6 | * This ends up looking compilcated, because of the number of | 6 | * This linker script is equiped to build either ROM loaded or RAM |
7 | * address variations for ram and rom/flash layouts. The real | 7 | * run kernels. |
8 | * work of the linker script is all at the end, and reasonably | ||
9 | * strait forward. | ||
10 | */ | 8 | */ |
11 | 9 | ||
12 | #include <linux/config.h> | 10 | #include <linux/config.h> |
13 | #include <asm-generic/vmlinux.lds.h> | 11 | #include <asm-generic/vmlinux.lds.h> |
14 | 12 | ||
15 | /* | ||
16 | * Original Palm pilot (same for Xcopilot). | ||
17 | * There is really only a rom target for this. | ||
18 | */ | ||
19 | #ifdef CONFIG_PILOT3 | ||
20 | #define ROMVEC_START 0x10c00000 | ||
21 | #define ROMVEC_LENGTH 0x10400 | ||
22 | #define ROM_START 0x10c10400 | ||
23 | #define ROM_LENGTH 0xfec00 | ||
24 | #define ROM_END 0x10d00000 | ||
25 | #define DATA_ADDR CONFIG_KERNELBASE | ||
26 | #endif | ||
27 | |||
28 | /* | ||
29 | * Same setup on both the uCsimm and uCdimm. | ||
30 | */ | ||
31 | #if defined(CONFIG_UCSIMM) || defined(CONFIG_UCDIMM) | ||
32 | #ifdef CONFIG_RAMKERNEL | ||
33 | #define ROMVEC_START 0x10c10000 | ||
34 | #define ROMVEC_LENGTH 0x400 | ||
35 | #define ROM_START 0x10c10400 | ||
36 | #define ROM_LENGTH 0x1efc00 | ||
37 | #define ROM_END 0x10e00000 | ||
38 | #endif | ||
39 | #ifdef CONFIG_ROMKERNEL | ||
40 | #define ROMVEC_START 0x10c10000 | ||
41 | #define ROMVEC_LENGTH 0x400 | ||
42 | #define ROM_START 0x10c10400 | ||
43 | #define ROM_LENGTH 0x1efc00 | ||
44 | #define ROM_END 0x10e00000 | ||
45 | #endif | ||
46 | #ifdef CONFIG_HIMEMKERNEL | ||
47 | #define ROMVEC_START 0x00600000 | ||
48 | #define ROMVEC_LENGTH 0x400 | ||
49 | #define ROM_START 0x00600400 | ||
50 | #define ROM_LENGTH 0x1efc00 | ||
51 | #define ROM_END 0x007f0000 | ||
52 | #endif | ||
53 | #endif | ||
54 | |||
55 | #ifdef CONFIG_UCQUICC | ||
56 | #define ROMVEC_START 0x00000000 | ||
57 | #define ROMVEC_LENGTH 0x404 | ||
58 | #define ROM_START 0x00000404 | ||
59 | #define ROM_LENGTH 0x1ff6fc | ||
60 | #define ROM_END 0x00200000 | ||
61 | #endif | ||
62 | |||
63 | #if defined(CONFIG_RAMKERNEL) | 13 | #if defined(CONFIG_RAMKERNEL) |
64 | #define RAM_START CONFIG_KERNELBASE | 14 | #define RAM_START CONFIG_KERNELBASE |
65 | #define RAM_LENGTH (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE) | 15 | #define RAM_LENGTH (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE) |
@@ -71,6 +21,10 @@ | |||
71 | #if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL) | 21 | #if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL) |
72 | #define RAM_START CONFIG_RAMBASE | 22 | #define RAM_START CONFIG_RAMBASE |
73 | #define RAM_LENGTH CONFIG_RAMSIZE | 23 | #define RAM_LENGTH CONFIG_RAMSIZE |
24 | #define ROMVEC_START CONFIG_ROMVEC | ||
25 | #define ROMVEC_LENGTH CONFIG_ROMVECSIZE | ||
26 | #define ROM_START CONFIG_ROMSTART | ||
27 | #define ROM_LENGTH CONFIG_ROMSIZE | ||
74 | #define TEXT rom | 28 | #define TEXT rom |
75 | #define DATA ram | 29 | #define DATA ram |
76 | #define INIT ram | 30 | #define INIT ram |
@@ -90,7 +44,6 @@ MEMORY { | |||
90 | #ifdef ROM_START | 44 | #ifdef ROM_START |
91 | romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH | 45 | romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH |
92 | rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH | 46 | rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH |
93 | erom : ORIGIN = ROM_END, LENGTH = 0 | ||
94 | #endif | 47 | #endif |
95 | } | 48 | } |
96 | 49 | ||
@@ -167,13 +120,6 @@ SECTIONS { | |||
167 | _etext = . ; | 120 | _etext = . ; |
168 | } > TEXT | 121 | } > TEXT |
169 | 122 | ||
170 | #ifdef ROM_END | ||
171 | . = ROM_END ; | ||
172 | .erom : { | ||
173 | __rom_end = . ; | ||
174 | } > erom | ||
175 | #endif | ||
176 | |||
177 | .data DATA_ADDR : { | 123 | .data DATA_ADDR : { |
178 | . = ALIGN(4); | 124 | . = ALIGN(4); |
179 | _sdata = . ; | 125 | _sdata = . ; |
diff --git a/arch/m68knommu/platform/68328/Makefile b/arch/m68knommu/platform/68328/Makefile index 1b3b719e4479..5e5435552d56 100644 --- a/arch/m68knommu/platform/68328/Makefile +++ b/arch/m68knommu/platform/68328/Makefile | |||
@@ -8,6 +8,7 @@ head-$(CONFIG_DRAGEN2) = head-de2.o | |||
8 | 8 | ||
9 | obj-y += entry.o ints.o timers.o | 9 | obj-y += entry.o ints.o timers.o |
10 | obj-$(CONFIG_M68328) += config.o | 10 | obj-$(CONFIG_M68328) += config.o |
11 | obj-$(CONFIG_ROM) += romvec.o | ||
11 | 12 | ||
12 | extra-y := head.o | 13 | extra-y := head.o |
13 | extra-$(CONFIG_M68328) += bootlogo.rh head.o | 14 | extra-$(CONFIG_M68328) += bootlogo.rh head.o |
diff --git a/arch/m68knommu/platform/68328/head-rom.S b/arch/m68knommu/platform/68328/head-rom.S index 2b448a297011..234430b9551c 100644 --- a/arch/m68knommu/platform/68328/head-rom.S +++ b/arch/m68knommu/platform/68328/head-rom.S | |||
@@ -28,6 +28,8 @@ _ramstart: | |||
28 | _ramend: | 28 | _ramend: |
29 | .long 0 | 29 | .long 0 |
30 | 30 | ||
31 | #define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE) | ||
32 | |||
31 | #ifdef CONFIG_INIT_LCD | 33 | #ifdef CONFIG_INIT_LCD |
32 | splash_bits: | 34 | splash_bits: |
33 | #include "bootlogo.rh" | 35 | #include "bootlogo.rh" |
@@ -48,7 +50,7 @@ _stext: movew #0x2700,%sr | |||
48 | moveb #0x81, 0xfffffA27 /* LCKCON */ | 50 | moveb #0x81, 0xfffffA27 /* LCKCON */ |
49 | movew #0xff00, 0xfffff412 /* LCD pins */ | 51 | movew #0xff00, 0xfffff412 /* LCD pins */ |
50 | #endif | 52 | #endif |
51 | moveal #__ramend-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp | 53 | moveal #RAMEND-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp |
52 | movew #32767, %d0 /* PLL settle wait loop */ | 54 | movew #32767, %d0 /* PLL settle wait loop */ |
53 | 1: subq #1, %d0 | 55 | 1: subq #1, %d0 |
54 | bne 1b | 56 | bne 1b |
@@ -73,13 +75,13 @@ _stext: movew #0x2700,%sr | |||
73 | bhi 1b | 75 | bhi 1b |
74 | 76 | ||
75 | movel #_sdata, %d0 | 77 | movel #_sdata, %d0 |
76 | movel %d0, _rambase | 78 | movel %d0, _rambase |
77 | movel #_ebss, %d0 | 79 | movel #_ebss, %d0 |
78 | movel %d0, _ramstart | 80 | movel %d0, _ramstart |
79 | movel #__ramend-CONFIG_MEMORY_RESERVE*0x100000, %d0 | 81 | movel #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0 |
80 | movel %d0, _ramend | 82 | movel %d0, _ramend |
81 | movel #__ramvec, %d0 | 83 | movel #CONFIG_VECTORBASE, %d0 |
82 | movel %d0, _ramvec | 84 | movel %d0, _ramvec |
83 | 85 | ||
84 | /* | 86 | /* |
85 | * load the current task pointer and stack | 87 | * load the current task pointer and stack |
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c index 7437217813d2..2dda7339aae5 100644 --- a/arch/m68knommu/platform/68328/ints.c +++ b/arch/m68knommu/platform/68328/ints.c | |||
@@ -18,6 +18,7 @@ | |||
18 | 18 | ||
19 | #include <asm/system.h> | 19 | #include <asm/system.h> |
20 | #include <asm/irq.h> | 20 | #include <asm/irq.h> |
21 | #include <asm/irqnode.h> | ||
21 | #include <asm/traps.h> | 22 | #include <asm/traps.h> |
22 | #include <asm/io.h> | 23 | #include <asm/io.h> |
23 | #include <asm/machdep.h> | 24 | #include <asm/machdep.h> |
@@ -82,25 +83,6 @@ unsigned int local_irq_count[NR_CPUS]; | |||
82 | /* irq node variables for the 32 (potential) on chip sources */ | 83 | /* irq node variables for the 32 (potential) on chip sources */ |
83 | static irq_node_t int_irq_list[NR_IRQS]; | 84 | static irq_node_t int_irq_list[NR_IRQS]; |
84 | 85 | ||
85 | #if !defined(CONFIG_DRAGEN2) | ||
86 | asm (".global _start, __ramend/n/t" | ||
87 | ".section .romvec/n" | ||
88 | "e_vectors:\n\t" | ||
89 | ".long __ramend-4, _start, buserr, trap, trap, trap, trap, trap\n\t" | ||
90 | ".long trap, trap, trap, trap, trap, trap, trap, trap\n\t" | ||
91 | ".long trap, trap, trap, trap, trap, trap, trap, trap\n\t" | ||
92 | ".long trap, trap, trap, trap\n\t" | ||
93 | ".long trap, trap, trap, trap\n\t" | ||
94 | /*.long inthandler, inthandler, inthandler, inthandler | ||
95 | .long inthandler4, inthandler, inthandler, inthandler */ | ||
96 | /* TRAP #0-15 */ | ||
97 | ".long system_call, trap, trap, trap, trap, trap, trap, trap\n\t" | ||
98 | ".long trap, trap, trap, trap, trap, trap, trap, trap\n\t" | ||
99 | ".long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0\n\t" | ||
100 | ".text\n" | ||
101 | "ignore: rte"); | ||
102 | #endif | ||
103 | |||
104 | /* | 86 | /* |
105 | * This function should be called during kernel startup to initialize | 87 | * This function should be called during kernel startup to initialize |
106 | * the IRQ handling routines. | 88 | * the IRQ handling routines. |
diff --git a/arch/m68knommu/platform/68328/romvec.S b/arch/m68knommu/platform/68328/romvec.S new file mode 100644 index 000000000000..3e7fe1e14913 --- /dev/null +++ b/arch/m68knommu/platform/68328/romvec.S | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * linux/arch/m68knommu/platform/68328/romvec.S | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file COPYING in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright 1996 Roman Zippel | ||
9 | * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com> | ||
10 | * Copyright 2006 Greg Ungerer <gerg@snapgear.com> | ||
11 | */ | ||
12 | |||
13 | #include <linux/config.h> | ||
14 | |||
15 | .global _start | ||
16 | .global _buserr | ||
17 | .global trap | ||
18 | .global system_call | ||
19 | |||
20 | .section .romvec | ||
21 | |||
22 | e_vectors: | ||
23 | .long CONFIG_RAMBASE+CONFIG_RAMSIZE-4, _start, buserr, trap | ||
24 | .long trap, trap, trap, trap | ||
25 | .long trap, trap, trap, trap | ||
26 | .long trap, trap, trap, trap | ||
27 | .long trap, trap, trap, trap | ||
28 | .long trap, trap, trap, trap | ||
29 | .long trap, trap, trap, trap | ||
30 | .long trap, trap, trap, trap | ||
31 | /* TRAP #0-15 */ | ||
32 | .long system_call, trap, trap, trap | ||
33 | .long trap, trap, trap, trap | ||
34 | .long trap, trap, trap, trap | ||
35 | .long trap, trap, trap, trap | ||
36 | .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 | ||
37 | |||
diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68knommu/platform/68360/config.c index 3db244625f0f..69c670dfd62b 100644 --- a/arch/m68knommu/platform/68360/config.c +++ b/arch/m68knommu/platform/68360/config.c | |||
@@ -141,13 +141,13 @@ int BSP_set_clock_mmss (unsigned long nowtime) | |||
141 | void BSP_reset (void) | 141 | void BSP_reset (void) |
142 | { | 142 | { |
143 | local_irq_disable(); | 143 | local_irq_disable(); |
144 | asm volatile (" | 144 | asm volatile ( |
145 | moveal #_start, %a0; | 145 | "moveal #_start, %a0;\n" |
146 | moveb #0, 0xFFFFF300; | 146 | "moveb #0, 0xFFFFF300;\n" |
147 | moveal 0(%a0), %sp; | 147 | "moveal 0(%a0), %sp;\n" |
148 | moveal 4(%a0), %a0; | 148 | "moveal 4(%a0), %a0;\n" |
149 | jmp (%a0); | 149 | "jmp (%a0);\n" |
150 | "); | 150 | ); |
151 | } | 151 | } |
152 | 152 | ||
153 | unsigned char *scc1_hwaddr; | 153 | unsigned char *scc1_hwaddr; |
diff --git a/arch/m68knommu/platform/68360/head-ram.S b/arch/m68knommu/platform/68360/head-ram.S index a5c639a51eef..f497713a4ec7 100644 --- a/arch/m68knommu/platform/68360/head-ram.S +++ b/arch/m68knommu/platform/68360/head-ram.S | |||
@@ -18,7 +18,6 @@ | |||
18 | .global _start | 18 | .global _start |
19 | 19 | ||
20 | .global _rambase | 20 | .global _rambase |
21 | .global __ramvec | ||
22 | .global _ramvec | 21 | .global _ramvec |
23 | .global _ramstart | 22 | .global _ramstart |
24 | .global _ramend | 23 | .global _ramend |
@@ -26,6 +25,8 @@ | |||
26 | .global _quicc_base | 25 | .global _quicc_base |
27 | .global _periph_base | 26 | .global _periph_base |
28 | 27 | ||
28 | #define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE) | ||
29 | |||
29 | #define REGB 0x1000 | 30 | #define REGB 0x1000 |
30 | #define PEPAR (_dprbase + REGB + 0x0016) | 31 | #define PEPAR (_dprbase + REGB + 0x0016) |
31 | #define GMR (_dprbase + REGB + 0x0040) | 32 | #define GMR (_dprbase + REGB + 0x0040) |
@@ -103,7 +104,7 @@ _stext: | |||
103 | nop | 104 | nop |
104 | ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ | 105 | ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ |
105 | /* We should not need to setup the boot stack the reset should do it. */ | 106 | /* We should not need to setup the boot stack the reset should do it. */ |
106 | movea.l #__ramend, %sp /*set up stack at the end of DRAM:*/ | 107 | movea.l #RAMEND, %sp /*set up stack at the end of DRAM:*/ |
107 | 108 | ||
108 | set_mbar_register: | 109 | set_mbar_register: |
109 | moveq.l #0x07, %d1 /* Setup MBAR */ | 110 | moveq.l #0x07, %d1 /* Setup MBAR */ |
@@ -163,7 +164,7 @@ configure_memory_controller: | |||
163 | move.l %d0, GMR | 164 | move.l %d0, GMR |
164 | 165 | ||
165 | configure_chip_select_0: | 166 | configure_chip_select_0: |
166 | move.l #__ramend, %d0 | 167 | move.l #RAMEND, %d0 |
167 | subi.l #__ramstart, %d0 | 168 | subi.l #__ramstart, %d0 |
168 | subq.l #0x01, %d0 | 169 | subq.l #0x01, %d0 |
169 | eori.l #SIM_OR_MASK, %d0 | 170 | eori.l #SIM_OR_MASK, %d0 |
@@ -234,16 +235,10 @@ store_ram_size: | |||
234 | /* Set ram size information */ | 235 | /* Set ram size information */ |
235 | move.l #_sdata, _rambase | 236 | move.l #_sdata, _rambase |
236 | move.l #_ebss, _ramstart | 237 | move.l #_ebss, _ramstart |
237 | move.l #__ramend, %d0 | 238 | move.l #RAMEND, %d0 |
238 | sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ | 239 | sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ |
239 | move.l %d0, _ramend /* Different from __ramend.*/ | 240 | move.l %d0, _ramend /* Different from RAMEND.*/ |
240 | 241 | ||
241 | store_flash_size: | ||
242 | /* Set rom size information */ | ||
243 | move.l #__rom_end, %d0 | ||
244 | sub.l #__rom_start, %d0 | ||
245 | move.l %d0, rom_length | ||
246 | |||
247 | pea 0 | 242 | pea 0 |
248 | pea env | 243 | pea env |
249 | pea %sp@(4) | 244 | pea %sp@(4) |
@@ -286,7 +281,7 @@ _dprbase: | |||
286 | */ | 281 | */ |
287 | 282 | ||
288 | .section ".data.initvect","awx" | 283 | .section ".data.initvect","awx" |
289 | .long __ramend /* Reset: Initial Stack Pointer - 0. */ | 284 | .long RAMEND /* Reset: Initial Stack Pointer - 0. */ |
290 | .long _start /* Reset: Initial Program Counter - 1. */ | 285 | .long _start /* Reset: Initial Program Counter - 1. */ |
291 | .long buserr /* Bus Error - 2. */ | 286 | .long buserr /* Bus Error - 2. */ |
292 | .long trap /* Address Error - 3. */ | 287 | .long trap /* Address Error - 3. */ |
diff --git a/arch/m68knommu/platform/68360/head-rom.S b/arch/m68knommu/platform/68360/head-rom.S index 0da357a4cfee..2d28c3e19a88 100644 --- a/arch/m68knommu/platform/68360/head-rom.S +++ b/arch/m68knommu/platform/68360/head-rom.S | |||
@@ -18,7 +18,6 @@ | |||
18 | .global _start | 18 | .global _start |
19 | 19 | ||
20 | .global _rambase | 20 | .global _rambase |
21 | .global __ramvec | ||
22 | .global _ramvec | 21 | .global _ramvec |
23 | .global _ramstart | 22 | .global _ramstart |
24 | .global _ramend | 23 | .global _ramend |
@@ -26,6 +25,8 @@ | |||
26 | .global _quicc_base | 25 | .global _quicc_base |
27 | .global _periph_base | 26 | .global _periph_base |
28 | 27 | ||
28 | #define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE) | ||
29 | |||
29 | #define REGB 0x1000 | 30 | #define REGB 0x1000 |
30 | #define PEPAR (_dprbase + REGB + 0x0016) | 31 | #define PEPAR (_dprbase + REGB + 0x0016) |
31 | #define GMR (_dprbase + REGB + 0x0040) | 32 | #define GMR (_dprbase + REGB + 0x0040) |
@@ -115,7 +116,7 @@ _stext: | |||
115 | nop | 116 | nop |
116 | ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ | 117 | ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ |
117 | /* We should not need to setup the boot stack the reset should do it. */ | 118 | /* We should not need to setup the boot stack the reset should do it. */ |
118 | movea.l #__ramend, %sp /* set up stack at the end of DRAM:*/ | 119 | movea.l #RAMEND, %sp /* set up stack at the end of DRAM:*/ |
119 | 120 | ||
120 | 121 | ||
121 | set_mbar_register: | 122 | set_mbar_register: |
@@ -245,16 +246,10 @@ store_ram_size: | |||
245 | /* Set ram size information */ | 246 | /* Set ram size information */ |
246 | move.l #_sdata, _rambase | 247 | move.l #_sdata, _rambase |
247 | move.l #_ebss, _ramstart | 248 | move.l #_ebss, _ramstart |
248 | move.l #__ramend, %d0 | 249 | move.l #RAMEND, %d0 |
249 | sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ | 250 | sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ |
250 | move.l %d0, _ramend /* Different from __ramend.*/ | 251 | move.l %d0, _ramend /* Different from RAMEND.*/ |
251 | 252 | ||
252 | store_flash_size: | ||
253 | /* Set rom size information */ | ||
254 | move.l #__rom_end, %d0 | ||
255 | sub.l #__rom_start, %d0 | ||
256 | move.l %d0, rom_length | ||
257 | |||
258 | pea 0 | 253 | pea 0 |
259 | pea env | 254 | pea env |
260 | pea %sp@(4) | 255 | pea %sp@(4) |
@@ -298,7 +293,7 @@ _dprbase: | |||
298 | */ | 293 | */ |
299 | 294 | ||
300 | .section ".data.initvect","awx" | 295 | .section ".data.initvect","awx" |
301 | .long __ramend /* Reset: Initial Stack Pointer - 0. */ | 296 | .long RAMEND /* Reset: Initial Stack Pointer - 0. */ |
302 | .long _start /* Reset: Initial Program Counter - 1. */ | 297 | .long _start /* Reset: Initial Program Counter - 1. */ |
303 | .long buserr /* Bus Error - 2. */ | 298 | .long buserr /* Bus Error - 2. */ |
304 | .long trap /* Address Error - 3. */ | 299 | .long trap /* Address Error - 3. */ |
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c index ba184db1651b..0245fc4a4781 100644 --- a/arch/m68knommu/platform/68360/ints.c +++ b/arch/m68knommu/platform/68360/ints.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <asm/system.h> | 21 | #include <asm/system.h> |
22 | #include <asm/irq.h> | 22 | #include <asm/irq.h> |
23 | #include <asm/irqnode.h> | ||
23 | #include <asm/traps.h> | 24 | #include <asm/traps.h> |
24 | #include <asm/io.h> | 25 | #include <asm/io.h> |
25 | #include <asm/machdep.h> | 26 | #include <asm/machdep.h> |
diff --git a/arch/m68knommu/platform/68EZ328/config.c b/arch/m68knommu/platform/68EZ328/config.c index d8d56e5de310..15a14a67c2bf 100644 --- a/arch/m68knommu/platform/68EZ328/config.c +++ b/arch/m68knommu/platform/68EZ328/config.c | |||
@@ -42,13 +42,13 @@ void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int | |||
42 | void m68ez328_reset(void) | 42 | void m68ez328_reset(void) |
43 | { | 43 | { |
44 | local_irq_disable(); | 44 | local_irq_disable(); |
45 | asm volatile (" | 45 | asm volatile ( |
46 | moveal #0x10c00000, %a0; | 46 | "moveal #0x10c00000, %a0;\n" |
47 | moveb #0, 0xFFFFF300; | 47 | "moveb #0, 0xFFFFF300;\n" |
48 | moveal 0(%a0), %sp; | 48 | "moveal 0(%a0), %sp;\n" |
49 | moveal 4(%a0), %a0; | 49 | "moveal 4(%a0), %a0;\n" |
50 | jmp (%a0); | 50 | "jmp (%a0);\n" |
51 | "); | 51 | ); |
52 | } | 52 | } |
53 | 53 | ||
54 | /***************************************************************************/ | 54 | /***************************************************************************/ |
diff --git a/arch/m68knommu/platform/68VZ328/config.c b/arch/m68knommu/platform/68VZ328/config.c index d926524cdf82..4058de5c8fa2 100644 --- a/arch/m68knommu/platform/68VZ328/config.c +++ b/arch/m68knommu/platform/68VZ328/config.c | |||
@@ -141,13 +141,13 @@ static void init_hardware(char *command, int size) | |||
141 | static void m68vz328_reset(void) | 141 | static void m68vz328_reset(void) |
142 | { | 142 | { |
143 | local_irq_disable(); | 143 | local_irq_disable(); |
144 | asm volatile (" | 144 | asm volatile ( |
145 | moveal #0x10c00000, %a0; | 145 | "moveal #0x10c00000, %a0;\n\t" |
146 | moveb #0, 0xFFFFF300; | 146 | "moveb #0, 0xFFFFF300;\n\t" |
147 | moveal 0(%a0), %sp; | 147 | "moveal 0(%a0), %sp;\n\t" |
148 | moveal 4(%a0), %a0; | 148 | "moveal 4(%a0), %a0;\n\t" |
149 | jmp (%a0); | 149 | "jmp (%a0);\n" |
150 | "); | 150 | ); |
151 | } | 151 | } |
152 | 152 | ||
153 | unsigned char *cs8900a_hwaddr; | 153 | unsigned char *cs8900a_hwaddr; |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 35e038a974c6..747a9c1228f2 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -308,6 +308,7 @@ config MIPS_ATLAS | |||
308 | select SYS_SUPPORTS_64BIT_KERNEL | 308 | select SYS_SUPPORTS_64BIT_KERNEL |
309 | select SYS_SUPPORTS_BIG_ENDIAN | 309 | select SYS_SUPPORTS_BIG_ENDIAN |
310 | select SYS_SUPPORTS_LITTLE_ENDIAN | 310 | select SYS_SUPPORTS_LITTLE_ENDIAN |
311 | select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL | ||
311 | help | 312 | help |
312 | This enables support for the MIPS Technologies Atlas evaluation | 313 | This enables support for the MIPS Technologies Atlas evaluation |
313 | board. | 314 | board. |
@@ -324,6 +325,7 @@ config MIPS_MALTA | |||
324 | select I8259 | 325 | select I8259 |
325 | select MIPS_BOARDS_GEN | 326 | select MIPS_BOARDS_GEN |
326 | select MIPS_BONITO64 | 327 | select MIPS_BONITO64 |
328 | select MIPS_CPU_SCACHE | ||
327 | select MIPS_GT64120 | 329 | select MIPS_GT64120 |
328 | select MIPS_MSC | 330 | select MIPS_MSC |
329 | select SWAP_IO_SPACE | 331 | select SWAP_IO_SPACE |
@@ -336,6 +338,7 @@ config MIPS_MALTA | |||
336 | select SYS_SUPPORTS_64BIT_KERNEL | 338 | select SYS_SUPPORTS_64BIT_KERNEL |
337 | select SYS_SUPPORTS_BIG_ENDIAN | 339 | select SYS_SUPPORTS_BIG_ENDIAN |
338 | select SYS_SUPPORTS_LITTLE_ENDIAN | 340 | select SYS_SUPPORTS_LITTLE_ENDIAN |
341 | select SYS_SUPPORTS_MULTITHREADING | ||
339 | help | 342 | help |
340 | This enables support for the MIPS Technologies Malta evaluation | 343 | This enables support for the MIPS Technologies Malta evaluation |
341 | board. | 344 | board. |
@@ -358,7 +361,7 @@ config MIPS_SEAD | |||
358 | board. | 361 | board. |
359 | 362 | ||
360 | config WR_PPMC | 363 | config WR_PPMC |
361 | bool "Support for Wind River PPMC board" | 364 | bool "Wind River PPMC board" |
362 | select IRQ_CPU | 365 | select IRQ_CPU |
363 | select BOOT_ELF32 | 366 | select BOOT_ELF32 |
364 | select DMA_NONCOHERENT | 367 | select DMA_NONCOHERENT |
@@ -536,6 +539,7 @@ config PMC_YOSEMITE | |||
536 | select SYS_SUPPORTS_64BIT_KERNEL | 539 | select SYS_SUPPORTS_64BIT_KERNEL |
537 | select SYS_SUPPORTS_BIG_ENDIAN | 540 | select SYS_SUPPORTS_BIG_ENDIAN |
538 | select SYS_SUPPORTS_HIGHMEM | 541 | select SYS_SUPPORTS_HIGHMEM |
542 | select SYS_SUPPORTS_SMP | ||
539 | help | 543 | help |
540 | Yosemite is an evaluation board for the RM9000x2 processor | 544 | Yosemite is an evaluation board for the RM9000x2 processor |
541 | manufactured by PMC-Sierra. | 545 | manufactured by PMC-Sierra. |
@@ -590,6 +594,7 @@ config SGI_IP22 | |||
590 | select SYS_SUPPORTS_32BIT_KERNEL | 594 | select SYS_SUPPORTS_32BIT_KERNEL |
591 | select SYS_SUPPORTS_64BIT_KERNEL | 595 | select SYS_SUPPORTS_64BIT_KERNEL |
592 | select SYS_SUPPORTS_BIG_ENDIAN | 596 | select SYS_SUPPORTS_BIG_ENDIAN |
597 | select SYS_SUPPORTS_SMP | ||
593 | help | 598 | help |
594 | This are the SGI Indy, Challenge S and Indigo2, as well as certain | 599 | This are the SGI Indy, Challenge S and Indigo2, as well as certain |
595 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel | 600 | OEM variants like the Tandem CMN B006S. To compile a Linux kernel |
@@ -601,6 +606,7 @@ config SGI_IP27 | |||
601 | select ARC64 | 606 | select ARC64 |
602 | select BOOT_ELF64 | 607 | select BOOT_ELF64 |
603 | select DMA_IP27 | 608 | select DMA_IP27 |
609 | select EARLY_PRINTK | ||
604 | select HW_HAS_PCI | 610 | select HW_HAS_PCI |
605 | select PCI_DOMAINS | 611 | select PCI_DOMAINS |
606 | select SYS_HAS_CPU_R10000 | 612 | select SYS_HAS_CPU_R10000 |
@@ -1249,7 +1255,7 @@ config CPU_R6000 | |||
1249 | select CPU_SUPPORTS_32BIT_KERNEL | 1255 | select CPU_SUPPORTS_32BIT_KERNEL |
1250 | help | 1256 | help |
1251 | MIPS Technologies R6000 and R6000A series processors. Note these | 1257 | MIPS Technologies R6000 and R6000A series processors. Note these |
1252 | processors are extremly rare and the support for them is incomplete. | 1258 | processors are extremely rare and the support for them is incomplete. |
1253 | 1259 | ||
1254 | config CPU_NEVADA | 1260 | config CPU_NEVADA |
1255 | bool "RM52xx" | 1261 | bool "RM52xx" |
@@ -1370,7 +1376,7 @@ config SYS_HAS_CPU_SB1 | |||
1370 | endmenu | 1376 | endmenu |
1371 | 1377 | ||
1372 | # | 1378 | # |
1373 | # These two indicate any levelof the MIPS32 and MIPS64 architecture | 1379 | # These two indicate any level of the MIPS32 and MIPS64 architecture |
1374 | # | 1380 | # |
1375 | config CPU_MIPS32 | 1381 | config CPU_MIPS32 |
1376 | bool | 1382 | bool |
@@ -1381,7 +1387,7 @@ config CPU_MIPS64 | |||
1381 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 | 1387 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 |
1382 | 1388 | ||
1383 | # | 1389 | # |
1384 | # These two indicate the revision of the architecture, either 32 bot 64 bit. | 1390 | # These two indicate the revision of the architecture, either Release 1 or Release 2 |
1385 | # | 1391 | # |
1386 | config CPU_MIPSR1 | 1392 | config CPU_MIPSR1 |
1387 | bool | 1393 | bool |
@@ -1474,6 +1480,13 @@ config IP22_CPU_SCACHE | |||
1474 | bool | 1480 | bool |
1475 | select BOARD_SCACHE | 1481 | select BOARD_SCACHE |
1476 | 1482 | ||
1483 | # | ||
1484 | # Support for a MIPS32 / MIPS64 style S-caches | ||
1485 | # | ||
1486 | config MIPS_CPU_SCACHE | ||
1487 | bool | ||
1488 | select BOARD_SCACHE | ||
1489 | |||
1477 | config R5000_CPU_SCACHE | 1490 | config R5000_CPU_SCACHE |
1478 | bool | 1491 | bool |
1479 | select BOARD_SCACHE | 1492 | select BOARD_SCACHE |
@@ -1493,32 +1506,57 @@ config SIBYTE_DMA_PAGEOPS | |||
1493 | config CPU_HAS_PREFETCH | 1506 | config CPU_HAS_PREFETCH |
1494 | bool | 1507 | bool |
1495 | 1508 | ||
1496 | config MIPS_MT | ||
1497 | bool "Enable MIPS MT" | ||
1498 | |||
1499 | choice | 1509 | choice |
1500 | prompt "MIPS MT options" | 1510 | prompt "MIPS MT options" |
1501 | depends on MIPS_MT | 1511 | |
1512 | config MIPS_MT_DISABLED | ||
1513 | bool "Disable multithreading support." | ||
1514 | help | ||
1515 | Use this option if your workload can't take advantage of | ||
1516 | MIPS hardware multithreading support. On systems that don't have | ||
1517 | the option of an MT-enabled processor this option will be the only | ||
1518 | option in this menu. | ||
1502 | 1519 | ||
1503 | config MIPS_MT_SMTC | 1520 | config MIPS_MT_SMTC |
1504 | bool "SMTC: Use all TCs on all VPEs for SMP" | 1521 | bool "SMTC: Use all TCs on all VPEs for SMP" |
1522 | depends on CPU_MIPS32_R2 | ||
1523 | #depends on CPU_MIPS64_R2 # once there is hardware ... | ||
1524 | depends on SYS_SUPPORTS_MULTITHREADING | ||
1505 | select CPU_MIPSR2_IRQ_VI | 1525 | select CPU_MIPSR2_IRQ_VI |
1506 | select CPU_MIPSR2_SRS | 1526 | select CPU_MIPSR2_SRS |
1527 | select MIPS_MT | ||
1507 | select SMP | 1528 | select SMP |
1529 | help | ||
1530 | This is a kernel model which is known a SMTC or lately has been | ||
1531 | marketesed into SMVP. | ||
1508 | 1532 | ||
1509 | config MIPS_MT_SMP | 1533 | config MIPS_MT_SMP |
1510 | bool "Use 1 TC on each available VPE for SMP" | 1534 | bool "Use 1 TC on each available VPE for SMP" |
1535 | depends on SYS_SUPPORTS_MULTITHREADING | ||
1536 | select CPU_MIPSR2_IRQ_VI | ||
1537 | select CPU_MIPSR2_SRS | ||
1538 | select MIPS_MT | ||
1511 | select SMP | 1539 | select SMP |
1540 | help | ||
1541 | This is a kernel model which is also known a VSMP or lately | ||
1542 | has been marketesed into SMVP. | ||
1512 | 1543 | ||
1513 | config MIPS_VPE_LOADER | 1544 | config MIPS_VPE_LOADER |
1514 | bool "VPE loader support." | 1545 | bool "VPE loader support." |
1515 | depends on MIPS_MT | 1546 | depends on SYS_SUPPORTS_MULTITHREADING |
1547 | select MIPS_MT | ||
1516 | help | 1548 | help |
1517 | Includes a loader for loading an elf relocatable object | 1549 | Includes a loader for loading an elf relocatable object |
1518 | onto another VPE and running it. | 1550 | onto another VPE and running it. |
1519 | 1551 | ||
1520 | endchoice | 1552 | endchoice |
1521 | 1553 | ||
1554 | config MIPS_MT | ||
1555 | bool | ||
1556 | |||
1557 | config SYS_SUPPORTS_MULTITHREADING | ||
1558 | bool | ||
1559 | |||
1522 | config MIPS_MT_FPAFF | 1560 | config MIPS_MT_FPAFF |
1523 | bool "Dynamic FPU affinity for FP-intensive threads" | 1561 | bool "Dynamic FPU affinity for FP-intensive threads" |
1524 | depends on MIPS_MT | 1562 | depends on MIPS_MT |
@@ -1575,32 +1613,23 @@ config CPU_HAS_LLSC | |||
1575 | config CPU_HAS_WB | 1613 | config CPU_HAS_WB |
1576 | bool | 1614 | bool |
1577 | 1615 | ||
1616 | # | ||
1617 | # Vectored interrupt mode is an R2 feature | ||
1618 | # | ||
1578 | config CPU_MIPSR2_IRQ_VI | 1619 | config CPU_MIPSR2_IRQ_VI |
1579 | bool "Vectored interrupt mode" | 1620 | bool |
1580 | depends on CPU_MIPSR2 | ||
1581 | help | ||
1582 | Vectored interrupt mode allowing faster dispatching of interrupts. | ||
1583 | The board support code needs to be written to take advantage of this | ||
1584 | mode. Compatibility code is included to allow the kernel to run on | ||
1585 | a CPU that does not support vectored interrupts. It's safe to | ||
1586 | say Y here. | ||
1587 | 1621 | ||
1622 | # | ||
1623 | # Extended interrupt mode is an R2 feature | ||
1624 | # | ||
1588 | config CPU_MIPSR2_IRQ_EI | 1625 | config CPU_MIPSR2_IRQ_EI |
1589 | bool "External interrupt controller mode" | 1626 | bool |
1590 | depends on CPU_MIPSR2 | ||
1591 | help | ||
1592 | Extended interrupt mode takes advantage of an external interrupt | ||
1593 | controller to allow fast dispatching from many possible interrupt | ||
1594 | sources. Say N unless you know that external interrupt support is | ||
1595 | required. | ||
1596 | 1627 | ||
1628 | # | ||
1629 | # Shadow registers are an R2 feature | ||
1630 | # | ||
1597 | config CPU_MIPSR2_SRS | 1631 | config CPU_MIPSR2_SRS |
1598 | bool "Make shadow set registers available for interrupt handlers" | 1632 | bool |
1599 | depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI | ||
1600 | help | ||
1601 | Allow the kernel to use shadow register sets for fast interrupts. | ||
1602 | Interrupt handlers must be specially written to use shadow sets. | ||
1603 | Say N unless you know that shadow register set upport is needed. | ||
1604 | 1633 | ||
1605 | config CPU_HAS_SYNC | 1634 | config CPU_HAS_SYNC |
1606 | bool | 1635 | bool |
@@ -1618,6 +1647,11 @@ config GENERIC_IRQ_PROBE | |||
1618 | bool | 1647 | bool |
1619 | default y | 1648 | default y |
1620 | 1649 | ||
1650 | config IRQ_PER_CPU | ||
1651 | depends on SMP | ||
1652 | bool | ||
1653 | default y | ||
1654 | |||
1621 | # | 1655 | # |
1622 | # - Highmem only makes sense for the 32-bit kernel. | 1656 | # - Highmem only makes sense for the 32-bit kernel. |
1623 | # - The current highmem code will only work properly on physically indexed | 1657 | # - The current highmem code will only work properly on physically indexed |
@@ -1676,8 +1710,8 @@ source "mm/Kconfig" | |||
1676 | 1710 | ||
1677 | config SMP | 1711 | config SMP |
1678 | bool "Multi-Processing support" | 1712 | bool "Multi-Processing support" |
1679 | depends on CPU_RM9000 || ((SIBYTE_BCM1x80 || SIBYTE_BCM1x55 || SIBYTE_SB1250 || QEMU) && !SIBYTE_STANDALONE) || SGI_IP27 || MIPS_MT_SMP || MIPS_MT_SMTC | 1713 | depends on SYS_SUPPORTS_SMP |
1680 | ---help--- | 1714 | help |
1681 | This enables support for systems with more than one CPU. If you have | 1715 | This enables support for systems with more than one CPU. If you have |
1682 | a system with only one CPU, like most personal computers, say N. If | 1716 | a system with only one CPU, like most personal computers, say N. If |
1683 | you have a system with more than one CPU, say Y. | 1717 | you have a system with more than one CPU, say Y. |
@@ -1696,6 +1730,9 @@ config SMP | |||
1696 | 1730 | ||
1697 | If you don't know what to do here, say N. | 1731 | If you don't know what to do here, say N. |
1698 | 1732 | ||
1733 | config SYS_SUPPORTS_SMP | ||
1734 | bool | ||
1735 | |||
1699 | config NR_CPUS | 1736 | config NR_CPUS |
1700 | int "Maximum number of CPUs (2-64)" | 1737 | int "Maximum number of CPUs (2-64)" |
1701 | range 2 64 | 1738 | range 2 64 |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index d5930148495a..ebbb9adc0e2f 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -374,6 +374,7 @@ core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/ | |||
374 | cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite | 374 | cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite |
375 | load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 | 375 | load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 |
376 | 376 | ||
377 | # | ||
377 | # Qemu simulating MIPS32 4Kc | 378 | # Qemu simulating MIPS32 4Kc |
378 | # | 379 | # |
379 | core-$(CONFIG_QEMU) += arch/mips/qemu/ | 380 | core-$(CONFIG_QEMU) += arch/mips/qemu/ |
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c index 6ee090bd86c9..a547e47dd5fd 100644 --- a/arch/mips/au1000/common/dbdma.c +++ b/arch/mips/au1000/common/dbdma.c | |||
@@ -290,7 +290,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, | |||
290 | /* If kmalloc fails, it is caught below same | 290 | /* If kmalloc fails, it is caught below same |
291 | * as a channel not available. | 291 | * as a channel not available. |
292 | */ | 292 | */ |
293 | ctp = kmalloc(sizeof(chan_tab_t), GFP_KERNEL); | 293 | ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC); |
294 | chan_tab_ptr[i] = ctp; | 294 | chan_tab_ptr[i] = ctp; |
295 | break; | 295 | break; |
296 | } | 296 | } |
@@ -730,6 +730,8 @@ au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes) | |||
730 | return rv; | 730 | return rv; |
731 | } | 731 | } |
732 | 732 | ||
733 | EXPORT_SYMBOL_GPL(au1xxx_dbdma_get_dest); | ||
734 | |||
733 | void | 735 | void |
734 | au1xxx_dbdma_stop(u32 chanid) | 736 | au1xxx_dbdma_stop(u32 chanid) |
735 | { | 737 | { |
@@ -821,6 +823,8 @@ au1xxx_get_dma_residue(u32 chanid) | |||
821 | return rv; | 823 | return rv; |
822 | } | 824 | } |
823 | 825 | ||
826 | EXPORT_SYMBOL_GPL(au1xxx_get_dma_residue); | ||
827 | |||
824 | void | 828 | void |
825 | au1xxx_dbdma_chan_free(u32 chanid) | 829 | au1xxx_dbdma_chan_free(u32 chanid) |
826 | { | 830 | { |
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index afe05ec12c27..12d6edee895e 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c | |||
@@ -333,31 +333,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) | |||
333 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); | 333 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); |
334 | au_writel(1<<(irq_nr-32), IC1_CFG1CLR); | 334 | au_writel(1<<(irq_nr-32), IC1_CFG1CLR); |
335 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); | 335 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); |
336 | irq_desc[irq_nr].handler = &rise_edge_irq_type; | 336 | irq_desc[irq_nr].chip = &rise_edge_irq_type; |
337 | break; | 337 | break; |
338 | case INTC_INT_FALL_EDGE: /* 0:1:0 */ | 338 | case INTC_INT_FALL_EDGE: /* 0:1:0 */ |
339 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); | 339 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); |
340 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); | 340 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); |
341 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); | 341 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); |
342 | irq_desc[irq_nr].handler = &fall_edge_irq_type; | 342 | irq_desc[irq_nr].chip = &fall_edge_irq_type; |
343 | break; | 343 | break; |
344 | case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ | 344 | case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ |
345 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); | 345 | au_writel(1<<(irq_nr-32), IC1_CFG2CLR); |
346 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); | 346 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); |
347 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); | 347 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); |
348 | irq_desc[irq_nr].handler = &either_edge_irq_type; | 348 | irq_desc[irq_nr].chip = &either_edge_irq_type; |
349 | break; | 349 | break; |
350 | case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ | 350 | case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ |
351 | au_writel(1<<(irq_nr-32), IC1_CFG2SET); | 351 | au_writel(1<<(irq_nr-32), IC1_CFG2SET); |
352 | au_writel(1<<(irq_nr-32), IC1_CFG1CLR); | 352 | au_writel(1<<(irq_nr-32), IC1_CFG1CLR); |
353 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); | 353 | au_writel(1<<(irq_nr-32), IC1_CFG0SET); |
354 | irq_desc[irq_nr].handler = &level_irq_type; | 354 | irq_desc[irq_nr].chip = &level_irq_type; |
355 | break; | 355 | break; |
356 | case INTC_INT_LOW_LEVEL: /* 1:1:0 */ | 356 | case INTC_INT_LOW_LEVEL: /* 1:1:0 */ |
357 | au_writel(1<<(irq_nr-32), IC1_CFG2SET); | 357 | au_writel(1<<(irq_nr-32), IC1_CFG2SET); |
358 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); | 358 | au_writel(1<<(irq_nr-32), IC1_CFG1SET); |
359 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); | 359 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); |
360 | irq_desc[irq_nr].handler = &level_irq_type; | 360 | irq_desc[irq_nr].chip = &level_irq_type; |
361 | break; | 361 | break; |
362 | case INTC_INT_DISABLED: /* 0:0:0 */ | 362 | case INTC_INT_DISABLED: /* 0:0:0 */ |
363 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); | 363 | au_writel(1<<(irq_nr-32), IC1_CFG0CLR); |
@@ -385,31 +385,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req) | |||
385 | au_writel(1<<irq_nr, IC0_CFG2CLR); | 385 | au_writel(1<<irq_nr, IC0_CFG2CLR); |
386 | au_writel(1<<irq_nr, IC0_CFG1CLR); | 386 | au_writel(1<<irq_nr, IC0_CFG1CLR); |
387 | au_writel(1<<irq_nr, IC0_CFG0SET); | 387 | au_writel(1<<irq_nr, IC0_CFG0SET); |
388 | irq_desc[irq_nr].handler = &rise_edge_irq_type; | 388 | irq_desc[irq_nr].chip = &rise_edge_irq_type; |
389 | break; | 389 | break; |
390 | case INTC_INT_FALL_EDGE: /* 0:1:0 */ | 390 | case INTC_INT_FALL_EDGE: /* 0:1:0 */ |
391 | au_writel(1<<irq_nr, IC0_CFG2CLR); | 391 | au_writel(1<<irq_nr, IC0_CFG2CLR); |
392 | au_writel(1<<irq_nr, IC0_CFG1SET); | 392 | au_writel(1<<irq_nr, IC0_CFG1SET); |
393 | au_writel(1<<irq_nr, IC0_CFG0CLR); | 393 | au_writel(1<<irq_nr, IC0_CFG0CLR); |
394 | irq_desc[irq_nr].handler = &fall_edge_irq_type; | 394 | irq_desc[irq_nr].chip = &fall_edge_irq_type; |
395 | break; | 395 | break; |
396 | case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ | 396 | case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ |
397 | au_writel(1<<irq_nr, IC0_CFG2CLR); | 397 | au_writel(1<<irq_nr, IC0_CFG2CLR); |
398 | au_writel(1<<irq_nr, IC0_CFG1SET); | 398 | au_writel(1<<irq_nr, IC0_CFG1SET); |
399 | au_writel(1<<irq_nr, IC0_CFG0SET); | 399 | au_writel(1<<irq_nr, IC0_CFG0SET); |
400 | irq_desc[irq_nr].handler = &either_edge_irq_type; | 400 | irq_desc[irq_nr].chip = &either_edge_irq_type; |
401 | break; | 401 | break; |
402 | case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ | 402 | case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ |
403 | au_writel(1<<irq_nr, IC0_CFG2SET); | 403 | au_writel(1<<irq_nr, IC0_CFG2SET); |
404 | au_writel(1<<irq_nr, IC0_CFG1CLR); | 404 | au_writel(1<<irq_nr, IC0_CFG1CLR); |
405 | au_writel(1<<irq_nr, IC0_CFG0SET); | 405 | au_writel(1<<irq_nr, IC0_CFG0SET); |
406 | irq_desc[irq_nr].handler = &level_irq_type; | 406 | irq_desc[irq_nr].chip = &level_irq_type; |
407 | break; | 407 | break; |
408 | case INTC_INT_LOW_LEVEL: /* 1:1:0 */ | 408 | case INTC_INT_LOW_LEVEL: /* 1:1:0 */ |
409 | au_writel(1<<irq_nr, IC0_CFG2SET); | 409 | au_writel(1<<irq_nr, IC0_CFG2SET); |
410 | au_writel(1<<irq_nr, IC0_CFG1SET); | 410 | au_writel(1<<irq_nr, IC0_CFG1SET); |
411 | au_writel(1<<irq_nr, IC0_CFG0CLR); | 411 | au_writel(1<<irq_nr, IC0_CFG0CLR); |
412 | irq_desc[irq_nr].handler = &level_irq_type; | 412 | irq_desc[irq_nr].chip = &level_irq_type; |
413 | break; | 413 | break; |
414 | case INTC_INT_DISABLED: /* 0:0:0 */ | 414 | case INTC_INT_DISABLED: /* 0:0:0 */ |
415 | au_writel(1<<irq_nr, IC0_CFG0CLR); | 415 | au_writel(1<<irq_nr, IC0_CFG0CLR); |
@@ -585,13 +585,13 @@ void intc1_req1_irqdispatch(struct pt_regs *regs) | |||
585 | * au_sleep function in power.c.....maybe I should just pm_register() | 585 | * au_sleep function in power.c.....maybe I should just pm_register() |
586 | * them instead? | 586 | * them instead? |
587 | */ | 587 | */ |
588 | static uint sleep_intctl_config0[2]; | 588 | static unsigned int sleep_intctl_config0[2]; |
589 | static uint sleep_intctl_config1[2]; | 589 | static unsigned int sleep_intctl_config1[2]; |
590 | static uint sleep_intctl_config2[2]; | 590 | static unsigned int sleep_intctl_config2[2]; |
591 | static uint sleep_intctl_src[2]; | 591 | static unsigned int sleep_intctl_src[2]; |
592 | static uint sleep_intctl_assign[2]; | 592 | static unsigned int sleep_intctl_assign[2]; |
593 | static uint sleep_intctl_wake[2]; | 593 | static unsigned int sleep_intctl_wake[2]; |
594 | static uint sleep_intctl_mask[2]; | 594 | static unsigned int sleep_intctl_mask[2]; |
595 | 595 | ||
596 | void | 596 | void |
597 | save_au1xxx_intctl(void) | 597 | save_au1xxx_intctl(void) |
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c index f4926315fb68..b035513fe30a 100644 --- a/arch/mips/au1000/common/power.c +++ b/arch/mips/au1000/common/power.c | |||
@@ -80,17 +80,17 @@ static DEFINE_SPINLOCK(pm_lock); | |||
80 | * We only have to save/restore registers that aren't otherwise | 80 | * We only have to save/restore registers that aren't otherwise |
81 | * done as part of a driver pm_* function. | 81 | * done as part of a driver pm_* function. |
82 | */ | 82 | */ |
83 | static uint sleep_aux_pll_cntrl; | 83 | static unsigned int sleep_aux_pll_cntrl; |
84 | static uint sleep_cpu_pll_cntrl; | 84 | static unsigned int sleep_cpu_pll_cntrl; |
85 | static uint sleep_pin_function; | 85 | static unsigned int sleep_pin_function; |
86 | static uint sleep_uart0_inten; | 86 | static unsigned int sleep_uart0_inten; |
87 | static uint sleep_uart0_fifoctl; | 87 | static unsigned int sleep_uart0_fifoctl; |
88 | static uint sleep_uart0_linectl; | 88 | static unsigned int sleep_uart0_linectl; |
89 | static uint sleep_uart0_clkdiv; | 89 | static unsigned int sleep_uart0_clkdiv; |
90 | static uint sleep_uart0_enable; | 90 | static unsigned int sleep_uart0_enable; |
91 | static uint sleep_usbhost_enable; | 91 | static unsigned int sleep_usbhost_enable; |
92 | static uint sleep_usbdev_enable; | 92 | static unsigned int sleep_usbdev_enable; |
93 | static uint sleep_static_memctlr[4][3]; | 93 | static unsigned int sleep_static_memctlr[4][3]; |
94 | 94 | ||
95 | /* Define this to cause the value you write to /proc/sys/pm/sleep to | 95 | /* Define this to cause the value you write to /proc/sys/pm/sleep to |
96 | * set the TOY timer for the amount of time you want to sleep. | 96 | * set the TOY timer for the amount of time you want to sleep. |
diff --git a/arch/mips/au1000/csb250/init.c b/arch/mips/au1000/csb250/init.c index a4898b1bc66a..83f1b31a0b8e 100644 --- a/arch/mips/au1000/csb250/init.c +++ b/arch/mips/au1000/csb250/init.c | |||
@@ -65,9 +65,9 @@ int __init prom_init(int argc, char **argv, char **envp, int *prom_vec) | |||
65 | 65 | ||
66 | /* We use a0 and a1 to pass initrd start and size. | 66 | /* We use a0 and a1 to pass initrd start and size. |
67 | */ | 67 | */ |
68 | if (((uint) argc > 0) && ((uint)argv > 0)) { | 68 | if (((unsigned int) argc > 0) && ((uint)argv > 0)) { |
69 | my_initrd_start = (uint)argc; | 69 | my_initrd_start = (unsigned int)argc; |
70 | my_initrd_size = (uint)argv; | 70 | my_initrd_size = (unsigned int)argv; |
71 | } | 71 | } |
72 | 72 | ||
73 | /* First argv is ignored. | 73 | /* First argv is ignored. |
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c index bacc0c6bfe67..5dd164fc1889 100644 --- a/arch/mips/au1000/pb1200/irqmap.c +++ b/arch/mips/au1000/pb1200/irqmap.c | |||
@@ -172,7 +172,7 @@ void _board_init_irq(void) | |||
172 | 172 | ||
173 | for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) | 173 | for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) |
174 | { | 174 | { |
175 | irq_desc[irq_nr].handler = &external_irq_type; | 175 | irq_desc[irq_nr].chip = &external_irq_type; |
176 | pb1200_disable_irq(irq_nr); | 176 | pb1200_disable_irq(irq_nr); |
177 | } | 177 | } |
178 | 178 | ||
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c index 005b025605e6..3d7670edd5cd 100644 --- a/arch/mips/basler/excite/excite_setup.c +++ b/arch/mips/basler/excite/excite_setup.c | |||
@@ -254,7 +254,7 @@ static int __init excite_platform_init(void) | |||
254 | return 0; | 254 | return 0; |
255 | } | 255 | } |
256 | 256 | ||
257 | void __init plat_setup(void) | 257 | void __init plat_mem_setup(void) |
258 | { | 258 | { |
259 | volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000; | 259 | volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000; |
260 | 260 | ||
diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c index 00c62c1c28a3..20c845c84d4b 100644 --- a/arch/mips/ddb5xxx/common/prom.c +++ b/arch/mips/ddb5xxx/common/prom.c | |||
@@ -21,8 +21,6 @@ | |||
21 | const char *get_system_type(void) | 21 | const char *get_system_type(void) |
22 | { | 22 | { |
23 | switch (mips_machtype) { | 23 | switch (mips_machtype) { |
24 | case MACH_NEC_DDB5074: return "NEC DDB Vrc-5074"; | ||
25 | case MACH_NEC_DDB5476: return "NEC DDB Vrc-5476"; | ||
26 | case MACH_NEC_DDB5477: return "NEC DDB Vrc-5477"; | 24 | case MACH_NEC_DDB5477: return "NEC DDB Vrc-5477"; |
27 | case MACH_NEC_ROCKHOPPER: return "NEC Rockhopper"; | 25 | case MACH_NEC_ROCKHOPPER: return "NEC Rockhopper"; |
28 | case MACH_NEC_ROCKHOPPERII: return "NEC RockhopperII"; | 26 | case MACH_NEC_ROCKHOPPERII: return "NEC RockhopperII"; |
diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c index 5fcd5f070cdc..63c3d6534b3a 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c +++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c | |||
@@ -107,7 +107,7 @@ void __init vrc5477_irq_init(u32 irq_base) | |||
107 | irq_desc[i].status = IRQ_DISABLED; | 107 | irq_desc[i].status = IRQ_DISABLED; |
108 | irq_desc[i].action = NULL; | 108 | irq_desc[i].action = NULL; |
109 | irq_desc[i].depth = 1; | 109 | irq_desc[i].depth = 1; |
110 | irq_desc[i].handler = &vrc5477_irq_controller; | 110 | irq_desc[i].chip = &vrc5477_irq_controller; |
111 | } | 111 | } |
112 | 112 | ||
113 | vrc5477_irq_base = irq_base; | 113 | vrc5477_irq_base = irq_base; |
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index d5bca5d233b6..da2dbb42f913 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c | |||
@@ -144,13 +144,13 @@ void __init init_ioasic_irqs(int base) | |||
144 | irq_desc[i].status = IRQ_DISABLED; | 144 | irq_desc[i].status = IRQ_DISABLED; |
145 | irq_desc[i].action = 0; | 145 | irq_desc[i].action = 0; |
146 | irq_desc[i].depth = 1; | 146 | irq_desc[i].depth = 1; |
147 | irq_desc[i].handler = &ioasic_irq_type; | 147 | irq_desc[i].chip = &ioasic_irq_type; |
148 | } | 148 | } |
149 | for (; i < base + IO_IRQ_LINES; i++) { | 149 | for (; i < base + IO_IRQ_LINES; i++) { |
150 | irq_desc[i].status = IRQ_DISABLED; | 150 | irq_desc[i].status = IRQ_DISABLED; |
151 | irq_desc[i].action = 0; | 151 | irq_desc[i].action = 0; |
152 | irq_desc[i].depth = 1; | 152 | irq_desc[i].depth = 1; |
153 | irq_desc[i].handler = &ioasic_dma_irq_type; | 153 | irq_desc[i].chip = &ioasic_dma_irq_type; |
154 | } | 154 | } |
155 | 155 | ||
156 | ioasic_irq_base = base; | 156 | ioasic_irq_base = base; |
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index 898bed502a34..d44c00d9e80f 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c | |||
@@ -123,7 +123,7 @@ void __init init_kn02_irqs(int base) | |||
123 | irq_desc[i].status = IRQ_DISABLED; | 123 | irq_desc[i].status = IRQ_DISABLED; |
124 | irq_desc[i].action = 0; | 124 | irq_desc[i].action = 0; |
125 | irq_desc[i].depth = 1; | 125 | irq_desc[i].depth = 1; |
126 | irq_desc[i].handler = &kn02_irq_type; | 126 | irq_desc[i].chip = &kn02_irq_type; |
127 | } | 127 | } |
128 | 128 | ||
129 | kn02_irq_base = base; | 129 | kn02_irq_base = base; |
diff --git a/arch/mips/gt64120/common/Makefile b/arch/mips/gt64120/common/Makefile index eba5051015a5..1ef676e22ab4 100644 --- a/arch/mips/gt64120/common/Makefile +++ b/arch/mips/gt64120/common/Makefile | |||
@@ -3,4 +3,3 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y += time.o | 5 | obj-y += time.o |
6 | obj-$(CONFIG_PCI) += pci.o | ||
diff --git a/arch/mips/gt64120/common/pci.c b/arch/mips/gt64120/common/pci.c deleted file mode 100644 index e9e5419a0d53..000000000000 --- a/arch/mips/gt64120/common/pci.c +++ /dev/null | |||
@@ -1,147 +0,0 @@ | |||
1 | /* | ||
2 | * BRIEF MODULE DESCRIPTION | ||
3 | * Galileo Evaluation Boards PCI support. | ||
4 | * | ||
5 | * The general-purpose functions to read/write and configure the GT64120A's | ||
6 | * PCI registers (function names start with pci0 or pci1) are either direct | ||
7 | * copies of functions written by Galileo Technology, or are modifications | ||
8 | * of their functions to work with Linux 2.4 vs Linux 2.2. These functions | ||
9 | * are Copyright - Galileo Technology. | ||
10 | * | ||
11 | * Other functions are derived from other MIPS PCI implementations, or were | ||
12 | * written by RidgeRun, Inc, Copyright (C) 2000 RidgeRun, Inc. | ||
13 | * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify it | ||
16 | * under the terms of the GNU General Public License as published by the | ||
17 | * Free Software Foundation; either version 2 of the License, or (at your | ||
18 | * option) any later version. | ||
19 | * | ||
20 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
21 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
23 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
24 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
25 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
26 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
27 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
28 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
29 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
30 | * | ||
31 | * You should have received a copy of the GNU General Public License along | ||
32 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
33 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
34 | */ | ||
35 | #include <linux/init.h> | ||
36 | #include <linux/types.h> | ||
37 | #include <linux/pci.h> | ||
38 | #include <linux/kernel.h> | ||
39 | #include <asm/gt64120.h> | ||
40 | |||
41 | #define SELF 0 | ||
42 | |||
43 | /* | ||
44 | * pciXReadConfigReg - Read from a PCI configuration register | ||
45 | * - Make sure the GT is configured as a master before | ||
46 | * reading from another device on the PCI. | ||
47 | * - The function takes care of Big/Little endian conversion. | ||
48 | * INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI | ||
49 | * spec) | ||
50 | * pciDevNum: The device number needs to be addressed. | ||
51 | * RETURNS: data , if the data == 0xffffffff check the master abort bit in the | ||
52 | * cause register to make sure the data is valid | ||
53 | * | ||
54 | * Configuration Address 0xCF8: | ||
55 | * | ||
56 | * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number | ||
57 | * |congif|Reserved| Bus |Device|Function|Register|00| | ||
58 | * |Enable| |Number|Number| Number | Number | | <=field Name | ||
59 | * | ||
60 | */ | ||
61 | static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device) | ||
62 | { | ||
63 | unsigned int DataForRegCf8; | ||
64 | unsigned int data; | ||
65 | |||
66 | DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) | | ||
67 | (PCI_FUNC(device->devfn) << 8) | | ||
68 | (offset & ~0x3)) | 0x80000000; | ||
69 | GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8); | ||
70 | |||
71 | /* | ||
72 | * The casual observer might wonder why the READ is duplicated here, | ||
73 | * rather than immediately following the WRITE, and just have the swap | ||
74 | * in the "if". That's because there is a latency problem with trying | ||
75 | * to read immediately after setting up the address register. The "if" | ||
76 | * check gives enough time for the address to stabilize, so the READ | ||
77 | * can work. | ||
78 | */ | ||
79 | if (PCI_SLOT(device->devfn) == SELF) /* This board */ | ||
80 | return GT_READ(GT_PCI0_CFGDATA_OFS); | ||
81 | else /* PCI is little endian so swap the Data. */ | ||
82 | return __GT_READ(GT_PCI0_CFGDATA_OFS); | ||
83 | } | ||
84 | |||
85 | /* | ||
86 | * pciXWriteConfigReg - Write to a PCI configuration register | ||
87 | * - Make sure the GT is configured as a master before | ||
88 | * writingto another device on the PCI. | ||
89 | * - The function takes care of Big/Little endian conversion. | ||
90 | * Inputs: unsigned int regOffset: The register offset as it apears in the | ||
91 | * GT spec | ||
92 | * (or any other PCI device spec) | ||
93 | * pciDevNum: The device number needs to be addressed. | ||
94 | * | ||
95 | * Configuration Address 0xCF8: | ||
96 | * | ||
97 | * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number | ||
98 | * |congif|Reserved| Bus |Device|Function|Register|00| | ||
99 | * |Enable| |Number|Number| Number | Number | | <=field Name | ||
100 | * | ||
101 | */ | ||
102 | static void pci0WriteConfigReg(unsigned int offset, | ||
103 | struct pci_dev *device, unsigned int data) | ||
104 | { | ||
105 | unsigned int DataForRegCf8; | ||
106 | |||
107 | DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) | | ||
108 | (PCI_FUNC(device->devfn) << 8) | | ||
109 | (offset & ~0x3)) | 0x80000000; | ||
110 | GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8); | ||
111 | |||
112 | if (PCI_SLOT(device->devfn) == SELF) /* This board */ | ||
113 | GT_WRITE(GT_PCI0_CFGDATA_OFS, data); | ||
114 | else /* configuration Transaction over the pci. */ | ||
115 | __GT_WRITE(GT_PCI0_CFGDATA_OFS, data); | ||
116 | } | ||
117 | |||
118 | extern struct pci_ops gt64120_pci_ops; | ||
119 | |||
120 | void __init pcibios_init(void) | ||
121 | { | ||
122 | u32 tmp; | ||
123 | struct pci_dev controller; | ||
124 | |||
125 | controller.devfn = SELF; | ||
126 | |||
127 | tmp = GT_READ(GT_PCI0_CMD_OFS); /* Huh??? -- Ralf */ | ||
128 | tmp = GT_READ(GT_PCI0_BARE_OFS); | ||
129 | |||
130 | /* | ||
131 | * You have to enable bus mastering to configure any other | ||
132 | * card on the bus. | ||
133 | */ | ||
134 | tmp = pci0ReadConfigReg(PCI_COMMAND, &controller); | ||
135 | tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR; | ||
136 | pci0WriteConfigReg(PCI_COMMAND, &controller, tmp); | ||
137 | |||
138 | /* | ||
139 | * Reset PCI I/O and PCI MEM values to ones supported by EVM. | ||
140 | */ | ||
141 | ioport_resource.start = GT_PCI_IO_BASE; | ||
142 | ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1; | ||
143 | iomem_resource.start = GT_PCI_MEM_BASE; | ||
144 | iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1; | ||
145 | |||
146 | pci_scan_bus(0, >64120_pci_ops, NULL); | ||
147 | } | ||
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index 46c468b26b30..f489a8067a93 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c | |||
@@ -138,7 +138,7 @@ void __init arch_init_irq(void) | |||
138 | /* Let's initialize our IRQ descriptors */ | 138 | /* Let's initialize our IRQ descriptors */ |
139 | for (i = 0; i < NR_IRQS; i++) { | 139 | for (i = 0; i < NR_IRQS; i++) { |
140 | irq_desc[i].status = 0; | 140 | irq_desc[i].status = 0; |
141 | irq_desc[i].handler = &no_irq_type; | 141 | irq_desc[i].chip = &no_irq_type; |
142 | irq_desc[i].action = NULL; | 142 | irq_desc[i].action = NULL; |
143 | irq_desc[i].depth = 0; | 143 | irq_desc[i].depth = 0; |
144 | spin_lock_init(&irq_desc[i].lock); | 144 | spin_lock_init(&irq_desc[i].lock); |
diff --git a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c index 1193a22c4693..9804642ecf89 100644 --- a/arch/mips/gt64120/momenco_ocelot/setup.c +++ b/arch/mips/gt64120/momenco_ocelot/setup.c | |||
@@ -164,8 +164,8 @@ void __init plat_mem_setup(void) | |||
164 | pm_power_off = momenco_ocelot_power_off; | 164 | pm_power_off = momenco_ocelot_power_off; |
165 | 165 | ||
166 | /* | 166 | /* |
167 | * initrd_start = (ulong)ocelot_initrd_start; | 167 | * initrd_start = (unsigned long)ocelot_initrd_start; |
168 | * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size; | 168 | * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size; |
169 | * initrd_below_start_ok = 1; | 169 | * initrd_below_start_ok = 1; |
170 | */ | 170 | */ |
171 | 171 | ||
diff --git a/arch/mips/gt64120/wrppmc/Makefile b/arch/mips/gt64120/wrppmc/Makefile index 72606b9af12a..7cf52205511c 100644 --- a/arch/mips/gt64120/wrppmc/Makefile +++ b/arch/mips/gt64120/wrppmc/Makefile | |||
@@ -9,6 +9,6 @@ | |||
9 | # Makefile for the Wind River MIPS 4KC PPMC Eval Board | 9 | # Makefile for the Wind River MIPS 4KC PPMC Eval Board |
10 | # | 10 | # |
11 | 11 | ||
12 | obj-y += int-handler.o irq.o reset.o setup.o time.o pci.o | 12 | obj-y += irq.o reset.o setup.o time.o pci.o |
13 | 13 | ||
14 | EXTRA_AFLAGS := $(CFLAGS) | 14 | EXTRA_AFLAGS := $(CFLAGS) |
diff --git a/arch/mips/gt64120/wrppmc/int-handler.S b/arch/mips/gt64120/wrppmc/int-handler.S deleted file mode 100644 index edee7b394175..000000000000 --- a/arch/mips/gt64120/wrppmc/int-handler.S +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle | ||
7 | * Copyright (C) Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com> | ||
8 | */ | ||
9 | #include <asm/asm.h> | ||
10 | #include <asm/mipsregs.h> | ||
11 | #include <asm/addrspace.h> | ||
12 | #include <asm/regdef.h> | ||
13 | #include <asm/stackframe.h> | ||
14 | #include <asm/mach-wrppmc/mach-gt64120.h> | ||
15 | |||
16 | .align 5 | ||
17 | .set noat | ||
18 | NESTED(handle_IRQ, PT_SIZE, sp) | ||
19 | SAVE_ALL | ||
20 | CLI # Important: mark KERNEL mode ! | ||
21 | .set at | ||
22 | |||
23 | mfc0 t0, CP0_CAUSE # get pending interrupts | ||
24 | mfc0 t1, CP0_STATUS # get enabled interrupts | ||
25 | and t0, t0, t1 # get allowed interrupts | ||
26 | andi t0, t0, 0xFF00 | ||
27 | beqz t0, 1f | ||
28 | move a1, sp # Prepare 'struct pt_regs *regs' pointer | ||
29 | |||
30 | andi t1, t0, CAUSEF_IP7 # CPU Compare/Count internal timer | ||
31 | bnez t1, handle_cputimer_irq | ||
32 | andi t1, t0, CAUSEF_IP6 # UART 16550 port | ||
33 | bnez t1, handle_uart_irq | ||
34 | andi t1, t0, CAUSEF_IP3 # PCI INT_A | ||
35 | bnez t1, handle_pci_intA_irq | ||
36 | |||
37 | /* wrong alarm or masked ... */ | ||
38 | 1: j spurious_interrupt | ||
39 | nop | ||
40 | END(handle_IRQ) | ||
41 | |||
42 | .align 5 | ||
43 | handle_cputimer_irq: | ||
44 | li a0, WRPPMC_MIPS_TIMER_IRQ | ||
45 | jal do_IRQ | ||
46 | j ret_from_irq | ||
47 | |||
48 | .align 5 | ||
49 | handle_uart_irq: | ||
50 | li a0, WRPPMC_UART16550_IRQ | ||
51 | jal do_IRQ | ||
52 | j ret_from_irq | ||
53 | |||
54 | .align 5 | ||
55 | handle_pci_intA_irq: | ||
56 | li a0, WRPPMC_PCI_INTA_IRQ | ||
57 | jal do_IRQ | ||
58 | j ret_from_irq | ||
59 | |||
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c index 8605687e24ed..8d75a43ce877 100644 --- a/arch/mips/gt64120/wrppmc/irq.c +++ b/arch/mips/gt64120/wrppmc/irq.c | |||
@@ -30,7 +30,19 @@ | |||
30 | #include <asm/irq_cpu.h> | 30 | #include <asm/irq_cpu.h> |
31 | #include <asm/gt64120.h> | 31 | #include <asm/gt64120.h> |
32 | 32 | ||
33 | extern asmlinkage void handle_IRQ(void); | 33 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) |
34 | { | ||
35 | unsigned int pending = read_c0_status() & read_c0_cause(); | ||
36 | |||
37 | if (pending & STATUSF_IP7) | ||
38 | do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs); /* CPU Compare/Count internal timer */ | ||
39 | else if (pending & STATUSF_IP6) | ||
40 | do_IRQ(WRPPMC_UART16550_IRQ, regs); /* UART 16550 port */ | ||
41 | else if (pending & STATUSF_IP3) | ||
42 | do_IRQ(WRPPMC_PCI_INTA_IRQ, regs); /* PCI INT_A */ | ||
43 | else | ||
44 | spurious_interrupt(regs); | ||
45 | } | ||
34 | 46 | ||
35 | /** | 47 | /** |
36 | * Initialize GT64120 Interrupt Controller | 48 | * Initialize GT64120 Interrupt Controller |
@@ -50,12 +62,6 @@ void gt64120_init_pic(void) | |||
50 | 62 | ||
51 | void __init arch_init_irq(void) | 63 | void __init arch_init_irq(void) |
52 | { | 64 | { |
53 | /* enable all CPU interrupt bits. */ | ||
54 | set_c0_status(ST0_IM); /* IE bit is still 0 */ | ||
55 | |||
56 | /* Install MIPS Interrupt Trap Vector */ | ||
57 | set_except_vector(0, handle_IRQ); | ||
58 | |||
59 | /* IRQ 0 - 7 are for MIPS common irq_cpu controller */ | 65 | /* IRQ 0 - 7 are for MIPS common irq_cpu controller */ |
60 | mips_cpu_irq_init(0); | 66 | mips_cpu_irq_init(0); |
61 | 67 | ||
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c index 20c591e49dae..2db6375ef29e 100644 --- a/arch/mips/gt64120/wrppmc/setup.c +++ b/arch/mips/gt64120/wrppmc/setup.c | |||
@@ -125,7 +125,7 @@ static void wrppmc_setup_serial(void) | |||
125 | } | 125 | } |
126 | #endif | 126 | #endif |
127 | 127 | ||
128 | void __init plat_setup(void) | 128 | void __init plat_mem_setup(void) |
129 | { | 129 | { |
130 | extern void wrppmc_time_init(void); | 130 | extern void wrppmc_time_init(void); |
131 | extern void wrppmc_timer_setup(struct irqaction *); | 131 | extern void wrppmc_timer_setup(struct irqaction *); |
diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c index 175d22adb450..6c24a82df0dd 100644 --- a/arch/mips/gt64120/wrppmc/time.c +++ b/arch/mips/gt64120/wrppmc/time.c | |||
@@ -31,10 +31,6 @@ void __init wrppmc_timer_setup(struct irqaction *irq) | |||
31 | { | 31 | { |
32 | /* Install ISR for timer interrupt */ | 32 | /* Install ISR for timer interrupt */ |
33 | setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq); | 33 | setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq); |
34 | |||
35 | /* to generate the first timer interrupt */ | ||
36 | write_c0_compare(mips_hpt_frequency/HZ); | ||
37 | write_c0_count(0); | ||
38 | } | 34 | } |
39 | 35 | ||
40 | /* | 36 | /* |
diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c index 77be7216bdd0..a6749c56fe38 100644 --- a/arch/mips/ite-boards/generic/irq.c +++ b/arch/mips/ite-boards/generic/irq.c | |||
@@ -208,10 +208,10 @@ void __init arch_init_irq(void) | |||
208 | #endif | 208 | #endif |
209 | 209 | ||
210 | for (i = 0; i <= IT8172_LAST_IRQ; i++) { | 210 | for (i = 0; i <= IT8172_LAST_IRQ; i++) { |
211 | irq_desc[i].handler = &it8172_irq_type; | 211 | irq_desc[i].chip = &it8172_irq_type; |
212 | spin_lock_init(&irq_desc[i].lock); | 212 | spin_lock_init(&irq_desc[i].lock); |
213 | } | 213 | } |
214 | irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type; | 214 | irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type; |
215 | set_c0_status(ALLINTS_NOTIMER); | 215 | set_c0_status(ALLINTS_NOTIMER); |
216 | } | 216 | } |
217 | 217 | ||
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index becc9accd495..478be9858a1e 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c | |||
@@ -73,7 +73,7 @@ void __init init_r4030_ints(void) | |||
73 | irq_desc[i].status = IRQ_DISABLED; | 73 | irq_desc[i].status = IRQ_DISABLED; |
74 | irq_desc[i].action = 0; | 74 | irq_desc[i].action = 0; |
75 | irq_desc[i].depth = 1; | 75 | irq_desc[i].depth = 1; |
76 | irq_desc[i].handler = &r4030_irq_type; | 76 | irq_desc[i].chip = &r4030_irq_type; |
77 | } | 77 | } |
78 | 78 | ||
79 | r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); | 79 | r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); |
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index 11304d1354f4..380046ea1db5 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c | |||
@@ -435,7 +435,7 @@ void jmr3927_irq_init(u32 irq_base) | |||
435 | irq_desc[i].status = IRQ_DISABLED; | 435 | irq_desc[i].status = IRQ_DISABLED; |
436 | irq_desc[i].action = NULL; | 436 | irq_desc[i].action = NULL; |
437 | irq_desc[i].depth = 1; | 437 | irq_desc[i].depth = 1; |
438 | irq_desc[i].handler = &jmr3927_irq_controller; | 438 | irq_desc[i].chip = &jmr3927_irq_controller; |
439 | } | 439 | } |
440 | 440 | ||
441 | jmr3927_irq_base = irq_base; | 441 | jmr3927_irq_base = irq_base; |
diff --git a/arch/mips/kernel/apm.c b/arch/mips/kernel/apm.c index 15f46b4471fd..7bdbcd811b57 100644 --- a/arch/mips/kernel/apm.c +++ b/arch/mips/kernel/apm.c | |||
@@ -260,7 +260,7 @@ static unsigned int apm_poll(struct file *fp, poll_table * wait) | |||
260 | * has acknowledge does the actual suspend happen. | 260 | * has acknowledge does the actual suspend happen. |
261 | */ | 261 | */ |
262 | static int | 262 | static int |
263 | apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg) | 263 | apm_ioctl(struct inode * inode, struct file *filp, unsigned int cmd, unsigned long arg) |
264 | { | 264 | { |
265 | struct apm_user *as = filp->private_data; | 265 | struct apm_user *as = filp->private_data; |
266 | unsigned long flags; | 266 | unsigned long flags; |
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 8c2c359a05f4..e045aba4ebda 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -597,8 +597,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) | |||
597 | break; | 597 | break; |
598 | case PRID_IMP_25KF: | 598 | case PRID_IMP_25KF: |
599 | c->cputype = CPU_25KF; | 599 | c->cputype = CPU_25KF; |
600 | /* Probe for L2 cache */ | ||
601 | c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; | ||
602 | break; | 600 | break; |
603 | case PRID_IMP_34K: | 601 | case PRID_IMP_34K: |
604 | c->cputype = CPU_34K; | 602 | c->cputype = CPU_34K; |
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index a9c6de1b9542..457565162dd5 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S | |||
@@ -87,7 +87,7 @@ FEXPORT(restore_all) # restore full frame | |||
87 | ori v1, v0, TCSTATUS_IXMT | 87 | ori v1, v0, TCSTATUS_IXMT |
88 | mtc0 v1, CP0_TCSTATUS | 88 | mtc0 v1, CP0_TCSTATUS |
89 | andi v0, TCSTATUS_IXMT | 89 | andi v0, TCSTATUS_IXMT |
90 | ehb | 90 | _ehb |
91 | mfc0 t0, CP0_TCCONTEXT | 91 | mfc0 t0, CP0_TCCONTEXT |
92 | DMT 9 # dmt t1 | 92 | DMT 9 # dmt t1 |
93 | jal mips_ihb | 93 | jal mips_ihb |
@@ -95,7 +95,7 @@ FEXPORT(restore_all) # restore full frame | |||
95 | andi t3, t0, 0xff00 | 95 | andi t3, t0, 0xff00 |
96 | or t2, t2, t3 | 96 | or t2, t2, t3 |
97 | mtc0 t2, CP0_STATUS | 97 | mtc0 t2, CP0_STATUS |
98 | ehb | 98 | _ehb |
99 | andi t1, t1, VPECONTROL_TE | 99 | andi t1, t1, VPECONTROL_TE |
100 | beqz t1, 1f | 100 | beqz t1, 1f |
101 | EMT | 101 | EMT |
@@ -105,7 +105,7 @@ FEXPORT(restore_all) # restore full frame | |||
105 | xori v1, v1, TCSTATUS_IXMT | 105 | xori v1, v1, TCSTATUS_IXMT |
106 | or v1, v0, v1 | 106 | or v1, v0, v1 |
107 | mtc0 v1, CP0_TCSTATUS | 107 | mtc0 v1, CP0_TCSTATUS |
108 | ehb | 108 | _ehb |
109 | xor t0, t0, t3 | 109 | xor t0, t0, t3 |
110 | mtc0 t0, CP0_TCCONTEXT | 110 | mtc0 t0, CP0_TCCONTEXT |
111 | #endif /* CONFIG_MIPS_MT_SMTC */ | 111 | #endif /* CONFIG_MIPS_MT_SMTC */ |
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S index 5fd7a8af0c62..8760131f89d9 100644 --- a/arch/mips/kernel/gdb-low.S +++ b/arch/mips/kernel/gdb-low.S | |||
@@ -291,7 +291,7 @@ | |||
291 | ori t1, t2, TCSTATUS_IXMT | 291 | ori t1, t2, TCSTATUS_IXMT |
292 | mtc0 t1, CP0_TCSTATUS | 292 | mtc0 t1, CP0_TCSTATUS |
293 | andi t2, t2, TCSTATUS_IXMT | 293 | andi t2, t2, TCSTATUS_IXMT |
294 | ehb | 294 | _ehb |
295 | DMT 9 # dmt t1 | 295 | DMT 9 # dmt t1 |
296 | jal mips_ihb | 296 | jal mips_ihb |
297 | nop | 297 | nop |
@@ -310,7 +310,7 @@ | |||
310 | xori t1, t1, TCSTATUS_IXMT | 310 | xori t1, t1, TCSTATUS_IXMT |
311 | or t1, t1, t2 | 311 | or t1, t1, t2 |
312 | mtc0 t1, CP0_TCSTATUS | 312 | mtc0 t1, CP0_TCSTATUS |
313 | ehb | 313 | _ehb |
314 | #endif /* CONFIG_MIPS_MT_SMTC */ | 314 | #endif /* CONFIG_MIPS_MT_SMTC */ |
315 | LONG_L v0, GDB_FR_STATUS(sp) | 315 | LONG_L v0, GDB_FR_STATUS(sp) |
316 | LONG_L v1, GDB_FR_EPC(sp) | 316 | LONG_L v1, GDB_FR_EPC(sp) |
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index ff7af369f286..6888cde560af 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S | |||
@@ -214,7 +214,7 @@ NESTED(except_vec_vi_handler, 0, sp) | |||
214 | mtc0 t0, CP0_TCCONTEXT | 214 | mtc0 t0, CP0_TCCONTEXT |
215 | xor t1, t1, t0 | 215 | xor t1, t1, t0 |
216 | mtc0 t1, CP0_STATUS | 216 | mtc0 t1, CP0_STATUS |
217 | ehb | 217 | _ehb |
218 | #endif /* CONFIG_MIPS_MT_SMTC */ | 218 | #endif /* CONFIG_MIPS_MT_SMTC */ |
219 | CLI | 219 | CLI |
220 | move a0, sp | 220 | move a0, sp |
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index bdf6f6eff721..c018098c9a56 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S | |||
@@ -96,7 +96,7 @@ | |||
96 | /* Clear TKSU, leave IXMT */ | 96 | /* Clear TKSU, leave IXMT */ |
97 | xori t0, 0x00001800 | 97 | xori t0, 0x00001800 |
98 | mtc0 t0, CP0_TCSTATUS | 98 | mtc0 t0, CP0_TCSTATUS |
99 | ehb | 99 | _ehb |
100 | /* We need to leave the global IE bit set, but clear EXL...*/ | 100 | /* We need to leave the global IE bit set, but clear EXL...*/ |
101 | mfc0 t0, CP0_STATUS | 101 | mfc0 t0, CP0_STATUS |
102 | or t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr | 102 | or t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr |
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index 0cb8ed5662f3..91ffb1233cad 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c | |||
@@ -120,7 +120,7 @@ int i8259A_irq_pending(unsigned int irq) | |||
120 | void make_8259A_irq(unsigned int irq) | 120 | void make_8259A_irq(unsigned int irq) |
121 | { | 121 | { |
122 | disable_irq_nosync(irq); | 122 | disable_irq_nosync(irq); |
123 | irq_desc[irq].handler = &i8259A_irq_type; | 123 | irq_desc[irq].chip = &i8259A_irq_type; |
124 | enable_irq(irq); | 124 | enable_irq(irq); |
125 | } | 125 | } |
126 | 126 | ||
@@ -327,7 +327,7 @@ void __init init_i8259_irqs (void) | |||
327 | irq_desc[i].status = IRQ_DISABLED; | 327 | irq_desc[i].status = IRQ_DISABLED; |
328 | irq_desc[i].action = NULL; | 328 | irq_desc[i].action = NULL; |
329 | irq_desc[i].depth = 1; | 329 | irq_desc[i].depth = 1; |
330 | irq_desc[i].handler = &i8259A_irq_type; | 330 | irq_desc[i].chip = &i8259A_irq_type; |
331 | } | 331 | } |
332 | 332 | ||
333 | setup_irq(2, &irq2); | 333 | setup_irq(2, &irq2); |
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 97ebdc754b9e..f8cd1ac64d88 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c | |||
@@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) | |||
174 | 174 | ||
175 | switch (imp->im_type) { | 175 | switch (imp->im_type) { |
176 | case MSC01_IRQ_EDGE: | 176 | case MSC01_IRQ_EDGE: |
177 | irq_desc[base+n].handler = &msc_edgeirq_type; | 177 | irq_desc[base+n].chip = &msc_edgeirq_type; |
178 | if (cpu_has_veic) | 178 | if (cpu_has_veic) |
179 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); | 179 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); |
180 | else | 180 | else |
181 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); | 181 | MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); |
182 | break; | 182 | break; |
183 | case MSC01_IRQ_LEVEL: | 183 | case MSC01_IRQ_LEVEL: |
184 | irq_desc[base+n].handler = &msc_levelirq_type; | 184 | irq_desc[base+n].chip = &msc_levelirq_type; |
185 | if (cpu_has_veic) | 185 | if (cpu_has_veic) |
186 | MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); | 186 | MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); |
187 | else | 187 | else |
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c index 0613f1f36b1b..f9c763a65547 100644 --- a/arch/mips/kernel/irq-mv6434x.c +++ b/arch/mips/kernel/irq-mv6434x.c | |||
@@ -155,7 +155,7 @@ void __init mv64340_irq_init(unsigned int base) | |||
155 | irq_desc[i].status = IRQ_DISABLED; | 155 | irq_desc[i].status = IRQ_DISABLED; |
156 | irq_desc[i].action = 0; | 156 | irq_desc[i].action = 0; |
157 | irq_desc[i].depth = 2; | 157 | irq_desc[i].depth = 2; |
158 | irq_desc[i].handler = &mv64340_irq_type; | 158 | irq_desc[i].chip = &mv64340_irq_type; |
159 | } | 159 | } |
160 | 160 | ||
161 | irq_base = base; | 161 | irq_base = base; |
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 0b130c5ac5d9..121da385a94d 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c | |||
@@ -91,7 +91,7 @@ void __init rm7k_cpu_irq_init(int base) | |||
91 | irq_desc[i].status = IRQ_DISABLED; | 91 | irq_desc[i].status = IRQ_DISABLED; |
92 | irq_desc[i].action = NULL; | 92 | irq_desc[i].action = NULL; |
93 | irq_desc[i].depth = 1; | 93 | irq_desc[i].depth = 1; |
94 | irq_desc[i].handler = &rm7k_irq_controller; | 94 | irq_desc[i].chip = &rm7k_irq_controller; |
95 | } | 95 | } |
96 | 96 | ||
97 | irq_base = base; | 97 | irq_base = base; |
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index 9b5f20c32acb..25109c103e44 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c | |||
@@ -139,11 +139,11 @@ void __init rm9k_cpu_irq_init(int base) | |||
139 | irq_desc[i].status = IRQ_DISABLED; | 139 | irq_desc[i].status = IRQ_DISABLED; |
140 | irq_desc[i].action = NULL; | 140 | irq_desc[i].action = NULL; |
141 | irq_desc[i].depth = 1; | 141 | irq_desc[i].depth = 1; |
142 | irq_desc[i].handler = &rm9k_irq_controller; | 142 | irq_desc[i].chip = &rm9k_irq_controller; |
143 | } | 143 | } |
144 | 144 | ||
145 | rm9000_perfcount_irq = base + 1; | 145 | rm9000_perfcount_irq = base + 1; |
146 | irq_desc[rm9000_perfcount_irq].handler = &rm9k_perfcounter_irq; | 146 | irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq; |
147 | 147 | ||
148 | irq_base = base; | 148 | irq_base = base; |
149 | } | 149 | } |
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 3dce742e716f..5c9dcd5eed59 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c | |||
@@ -95,7 +95,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
95 | for_each_online_cpu(j) | 95 | for_each_online_cpu(j) |
96 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 96 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
97 | #endif | 97 | #endif |
98 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 98 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
99 | seq_printf(p, " %s", action->name); | 99 | seq_printf(p, " %s", action->name); |
100 | 100 | ||
101 | for (action=action->next; action; action = action->next) | 101 | for (action=action->next; action; action = action->next) |
@@ -137,7 +137,7 @@ void __init init_IRQ(void) | |||
137 | irq_desc[i].status = IRQ_DISABLED; | 137 | irq_desc[i].status = IRQ_DISABLED; |
138 | irq_desc[i].action = NULL; | 138 | irq_desc[i].action = NULL; |
139 | irq_desc[i].depth = 1; | 139 | irq_desc[i].depth = 1; |
140 | irq_desc[i].handler = &no_irq_type; | 140 | irq_desc[i].chip = &no_irq_type; |
141 | spin_lock_init(&irq_desc[i].lock); | 141 | spin_lock_init(&irq_desc[i].lock); |
142 | #ifdef CONFIG_MIPS_MT_SMTC | 142 | #ifdef CONFIG_MIPS_MT_SMTC |
143 | irq_hwmask[i] = 0; | 143 | irq_hwmask[i] = 0; |
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 5db67e31ec1a..0e455a8ad860 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c | |||
@@ -167,14 +167,14 @@ void __init mips_cpu_irq_init(int irq_base) | |||
167 | irq_desc[i].status = IRQ_DISABLED; | 167 | irq_desc[i].status = IRQ_DISABLED; |
168 | irq_desc[i].action = NULL; | 168 | irq_desc[i].action = NULL; |
169 | irq_desc[i].depth = 1; | 169 | irq_desc[i].depth = 1; |
170 | irq_desc[i].handler = &mips_mt_cpu_irq_controller; | 170 | irq_desc[i].chip = &mips_mt_cpu_irq_controller; |
171 | } | 171 | } |
172 | 172 | ||
173 | for (i = irq_base + 2; i < irq_base + 8; i++) { | 173 | for (i = irq_base + 2; i < irq_base + 8; i++) { |
174 | irq_desc[i].status = IRQ_DISABLED; | 174 | irq_desc[i].status = IRQ_DISABLED; |
175 | irq_desc[i].action = NULL; | 175 | irq_desc[i].action = NULL; |
176 | irq_desc[i].depth = 1; | 176 | irq_desc[i].depth = 1; |
177 | irq_desc[i].handler = &mips_cpu_irq_controller; | 177 | irq_desc[i].chip = &mips_cpu_irq_controller; |
178 | } | 178 | } |
179 | 179 | ||
180 | mips_cpu_irq_base = irq_base; | 180 | mips_cpu_irq_base = irq_base; |
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index db94e556fc97..e1b85e6c486a 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S | |||
@@ -94,7 +94,7 @@ | |||
94 | ori t1, t2, TCSTATUS_IXMT | 94 | ori t1, t2, TCSTATUS_IXMT |
95 | mtc0 t1, CP0_TCSTATUS | 95 | mtc0 t1, CP0_TCSTATUS |
96 | andi t2, t2, TCSTATUS_IXMT | 96 | andi t2, t2, TCSTATUS_IXMT |
97 | ehb | 97 | _ehb |
98 | DMT 8 # dmt t0 | 98 | DMT 8 # dmt t0 |
99 | move t1,ra | 99 | move t1,ra |
100 | jal mips_ihb | 100 | jal mips_ihb |
@@ -109,7 +109,7 @@ | |||
109 | or a2, t1 | 109 | or a2, t1 |
110 | mtc0 a2, CP0_STATUS | 110 | mtc0 a2, CP0_STATUS |
111 | #ifdef CONFIG_MIPS_MT_SMTC | 111 | #ifdef CONFIG_MIPS_MT_SMTC |
112 | ehb | 112 | _ehb |
113 | andi t0, t0, VPECONTROL_TE | 113 | andi t0, t0, VPECONTROL_TE |
114 | beqz t0, 1f | 114 | beqz t0, 1f |
115 | emt | 115 | emt |
@@ -118,7 +118,7 @@ | |||
118 | xori t1, t1, TCSTATUS_IXMT | 118 | xori t1, t1, TCSTATUS_IXMT |
119 | or t1, t1, t2 | 119 | or t1, t1, t2 |
120 | mtc0 t1, CP0_TCSTATUS | 120 | mtc0 t1, CP0_TCSTATUS |
121 | ehb | 121 | _ehb |
122 | #endif /* CONFIG_MIPS_MT_SMTC */ | 122 | #endif /* CONFIG_MIPS_MT_SMTC */ |
123 | move v0, a0 | 123 | move v0, a0 |
124 | jr ra | 124 | jr ra |
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 2d2fdf77e308..6344be46ca8c 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S | |||
@@ -647,6 +647,7 @@ einval: li v0, -EINVAL | |||
647 | sys sys_unshare 1 | 647 | sys sys_unshare 1 |
648 | sys sys_splice 4 | 648 | sys sys_splice 4 |
649 | sys sys_sync_file_range 7 /* 4305 */ | 649 | sys sys_sync_file_range 7 /* 4305 */ |
650 | sys sys_tee 4 | ||
650 | .endm | 651 | .endm |
651 | 652 | ||
652 | /* We pre-compute the number of _instruction_ bytes needed to | 653 | /* We pre-compute the number of _instruction_ bytes needed to |
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 9ba750887377..12d96c7d0bb2 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S | |||
@@ -462,3 +462,4 @@ sys_call_table: | |||
462 | PTR sys_unshare | 462 | PTR sys_unshare |
463 | PTR sys_splice | 463 | PTR sys_splice |
464 | PTR sys_sync_file_range | 464 | PTR sys_sync_file_range |
465 | PTR sys_tee /* 5265 */ | ||
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 942aca26f9c4..685698554a8a 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
@@ -388,3 +388,4 @@ EXPORT(sysn32_call_table) | |||
388 | PTR sys_unshare | 388 | PTR sys_unshare |
389 | PTR sys_splice | 389 | PTR sys_splice |
390 | PTR sys_sync_file_range | 390 | PTR sys_sync_file_range |
391 | PTR sys_tee | ||
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 8efb23a84131..0e632934cb76 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
@@ -510,4 +510,5 @@ sys_call_table: | |||
510 | PTR sys_unshare | 510 | PTR sys_unshare |
511 | PTR sys_splice | 511 | PTR sys_splice |
512 | PTR sys32_sync_file_range /* 4305 */ | 512 | PTR sys32_sync_file_range /* 4305 */ |
513 | PTR sys_tee | ||
513 | .size sys_call_table,.-sys_call_table | 514 | .size sys_call_table,.-sys_call_table |
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index bfcec8d9bfe4..d3e087115023 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
@@ -488,6 +488,9 @@ static inline void resource_init(void) | |||
488 | { | 488 | { |
489 | int i; | 489 | int i; |
490 | 490 | ||
491 | if (UNCAC_BASE != IO_BASE) | ||
492 | return; | ||
493 | |||
491 | code_resource.start = virt_to_phys(&_text); | 494 | code_resource.start = virt_to_phys(&_text); |
492 | code_resource.end = virt_to_phys(&_etext) - 1; | 495 | code_resource.end = virt_to_phys(&_etext) - 1; |
493 | data_resource.start = virt_to_phys(&_etext); | 496 | data_resource.start = virt_to_phys(&_etext); |
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 298f82fe8440..9096a5ea4229 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
@@ -446,7 +446,7 @@ static int __init topology_init(void) | |||
446 | int ret; | 446 | int ret; |
447 | 447 | ||
448 | for_each_present_cpu(cpu) { | 448 | for_each_present_cpu(cpu) { |
449 | ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL); | 449 | ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu); |
450 | if (ret) | 450 | if (ret) |
451 | printk(KERN_WARNING "topology_init: register_cpu %d " | 451 | printk(KERN_WARNING "topology_init: register_cpu %d " |
452 | "failed (%d)\n", cpu, ret); | 452 | "failed (%d)\n", cpu, ret); |
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S index c9d65196d917..72c6d98f8854 100644 --- a/arch/mips/kernel/smtc-asm.S +++ b/arch/mips/kernel/smtc-asm.S | |||
@@ -52,12 +52,12 @@ FEXPORT(__smtc_ipi_vector) | |||
52 | .set noat | 52 | .set noat |
53 | /* Disable thread scheduling to make Status update atomic */ | 53 | /* Disable thread scheduling to make Status update atomic */ |
54 | DMT 27 # dmt k1 | 54 | DMT 27 # dmt k1 |
55 | ehb | 55 | _ehb |
56 | /* Set EXL */ | 56 | /* Set EXL */ |
57 | mfc0 k0,CP0_STATUS | 57 | mfc0 k0,CP0_STATUS |
58 | ori k0,k0,ST0_EXL | 58 | ori k0,k0,ST0_EXL |
59 | mtc0 k0,CP0_STATUS | 59 | mtc0 k0,CP0_STATUS |
60 | ehb | 60 | _ehb |
61 | /* Thread scheduling now inhibited by EXL. Restore TE state. */ | 61 | /* Thread scheduling now inhibited by EXL. Restore TE state. */ |
62 | andi k1,k1,VPECONTROL_TE | 62 | andi k1,k1,VPECONTROL_TE |
63 | beqz k1,1f | 63 | beqz k1,1f |
@@ -82,7 +82,7 @@ FEXPORT(__smtc_ipi_vector) | |||
82 | li k1,ST0_CU0 | 82 | li k1,ST0_CU0 |
83 | or k1,k1,k0 | 83 | or k1,k1,k0 |
84 | mtc0 k1,CP0_STATUS | 84 | mtc0 k1,CP0_STATUS |
85 | ehb | 85 | _ehb |
86 | get_saved_sp | 86 | get_saved_sp |
87 | /* Interrupting TC will have pre-set values in slots in the new frame */ | 87 | /* Interrupting TC will have pre-set values in slots in the new frame */ |
88 | 2: subu k1,k1,PT_SIZE | 88 | 2: subu k1,k1,PT_SIZE |
@@ -90,7 +90,7 @@ FEXPORT(__smtc_ipi_vector) | |||
90 | lw k0,PT_TCSTATUS(k1) | 90 | lw k0,PT_TCSTATUS(k1) |
91 | /* Write it to TCStatus to restore CU/KSU/IXMT state */ | 91 | /* Write it to TCStatus to restore CU/KSU/IXMT state */ |
92 | mtc0 k0,$2,1 | 92 | mtc0 k0,$2,1 |
93 | ehb | 93 | _ehb |
94 | lw k0,PT_EPC(k1) | 94 | lw k0,PT_EPC(k1) |
95 | mtc0 k0,CP0_EPC | 95 | mtc0 k0,CP0_EPC |
96 | /* Save all will redundantly recompute the SP, but use it for now */ | 96 | /* Save all will redundantly recompute the SP, but use it for now */ |
@@ -116,7 +116,7 @@ LEAF(self_ipi) | |||
116 | mfc0 t0,CP0_TCSTATUS | 116 | mfc0 t0,CP0_TCSTATUS |
117 | ori t1,t0,TCSTATUS_IXMT | 117 | ori t1,t0,TCSTATUS_IXMT |
118 | mtc0 t1,CP0_TCSTATUS | 118 | mtc0 t1,CP0_TCSTATUS |
119 | ehb | 119 | _ehb |
120 | /* We know we're in kernel mode, so prepare stack frame */ | 120 | /* We know we're in kernel mode, so prepare stack frame */ |
121 | subu t1,sp,PT_SIZE | 121 | subu t1,sp,PT_SIZE |
122 | sw ra,PT_EPC(t1) | 122 | sw ra,PT_EPC(t1) |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 2e8e52c135e6..70cf09afdf56 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -367,7 +367,7 @@ void mipsmt_prepare_cpus(void) | |||
367 | dvpe(); | 367 | dvpe(); |
368 | dmt(); | 368 | dmt(); |
369 | 369 | ||
370 | freeIPIq.lock = SPIN_LOCK_UNLOCKED; | 370 | spin_lock_init(&freeIPIq.lock); |
371 | 371 | ||
372 | /* | 372 | /* |
373 | * We probably don't have as many VPEs as we do SMP "CPUs", | 373 | * We probably don't have as many VPEs as we do SMP "CPUs", |
@@ -375,7 +375,7 @@ void mipsmt_prepare_cpus(void) | |||
375 | */ | 375 | */ |
376 | for (i=0; i<NR_CPUS; i++) { | 376 | for (i=0; i<NR_CPUS; i++) { |
377 | IPIQ[i].head = IPIQ[i].tail = NULL; | 377 | IPIQ[i].head = IPIQ[i].tail = NULL; |
378 | IPIQ[i].lock = SPIN_LOCK_UNLOCKED; | 378 | spin_lock_init(&IPIQ[i].lock); |
379 | IPIQ[i].depth = 0; | 379 | IPIQ[i].depth = 0; |
380 | ipi_timer_latch[i] = 0; | 380 | ipi_timer_latch[i] = 0; |
381 | } | 381 | } |
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 5e8a18a8e2bd..6da8c68e89db 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c | |||
@@ -301,7 +301,7 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3) | |||
301 | * | 301 | * |
302 | * This is really horribly ugly. | 302 | * This is really horribly ugly. |
303 | */ | 303 | */ |
304 | asmlinkage int sys_ipc (uint call, int first, int second, | 304 | asmlinkage int sys_ipc (unsigned int call, int first, int second, |
305 | unsigned long third, void __user *ptr, long fifth) | 305 | unsigned long third, void __user *ptr, long fifth) |
306 | { | 306 | { |
307 | int version, ret; | 307 | int version, ret; |
@@ -359,18 +359,18 @@ asmlinkage int sys_ipc (uint call, int first, int second, | |||
359 | case SHMAT: | 359 | case SHMAT: |
360 | switch (version) { | 360 | switch (version) { |
361 | default: { | 361 | default: { |
362 | ulong raddr; | 362 | unsigned long raddr; |
363 | ret = do_shmat (first, (char __user *) ptr, second, | 363 | ret = do_shmat (first, (char __user *) ptr, second, |
364 | &raddr); | 364 | &raddr); |
365 | if (ret) | 365 | if (ret) |
366 | return ret; | 366 | return ret; |
367 | return put_user (raddr, (ulong __user *) third); | 367 | return put_user (raddr, (unsigned long __user *) third); |
368 | } | 368 | } |
369 | case 1: /* iBCS2 emulator entry point */ | 369 | case 1: /* iBCS2 emulator entry point */ |
370 | if (!segment_eq(get_fs(), get_ds())) | 370 | if (!segment_eq(get_fs(), get_ds())) |
371 | return -EINVAL; | 371 | return -EINVAL; |
372 | return do_shmat (first, (char __user *) ptr, second, | 372 | return do_shmat (first, (char __user *) ptr, second, |
373 | (ulong *) third); | 373 | (unsigned long *) third); |
374 | } | 374 | } |
375 | case SHMDT: | 375 | case SHMDT: |
376 | return sys_shmdt ((char __user *)ptr); | 376 | return sys_shmdt ((char __user *)ptr); |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index ad16eceb24dd..67971938a2cb 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -1050,7 +1050,7 @@ void *set_except_vector(int n, void *addr) | |||
1050 | return (void *)old_handler; | 1050 | return (void *)old_handler; |
1051 | } | 1051 | } |
1052 | 1052 | ||
1053 | #ifdef CONFIG_CPU_MIPSR2 | 1053 | #ifdef CONFIG_CPU_MIPSR2_SRS |
1054 | /* | 1054 | /* |
1055 | * MIPSR2 shadow register set allocation | 1055 | * MIPSR2 shadow register set allocation |
1056 | * FIXME: SMP... | 1056 | * FIXME: SMP... |
@@ -1069,11 +1069,9 @@ static struct shadow_registers { | |||
1069 | 1069 | ||
1070 | static void mips_srs_init(void) | 1070 | static void mips_srs_init(void) |
1071 | { | 1071 | { |
1072 | #ifdef CONFIG_CPU_MIPSR2_SRS | ||
1073 | shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1; | 1072 | shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1; |
1074 | printk(KERN_INFO "%d MIPSR2 register sets available\n", | 1073 | printk(KERN_INFO "%d MIPSR2 register sets available\n", |
1075 | shadow_registers.sr_supported); | 1074 | shadow_registers.sr_supported); |
1076 | #endif | ||
1077 | shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */ | 1075 | shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */ |
1078 | } | 1076 | } |
1079 | 1077 | ||
@@ -1198,7 +1196,14 @@ void *set_vi_handler(int n, void *addr) | |||
1198 | { | 1196 | { |
1199 | return set_vi_srs_handler(n, addr, 0); | 1197 | return set_vi_srs_handler(n, addr, 0); |
1200 | } | 1198 | } |
1201 | #endif | 1199 | |
1200 | #else | ||
1201 | |||
1202 | static inline void mips_srs_init(void) | ||
1203 | { | ||
1204 | } | ||
1205 | |||
1206 | #endif /* CONFIG_CPU_MIPSR2_SRS */ | ||
1202 | 1207 | ||
1203 | /* | 1208 | /* |
1204 | * This is used by native signal handling | 1209 | * This is used by native signal handling |
@@ -1388,9 +1393,7 @@ void __init trap_init(void) | |||
1388 | else | 1393 | else |
1389 | ebase = CAC_BASE; | 1394 | ebase = CAC_BASE; |
1390 | 1395 | ||
1391 | #ifdef CONFIG_CPU_MIPSR2 | ||
1392 | mips_srs_init(); | 1396 | mips_srs_init(); |
1393 | #endif | ||
1394 | 1397 | ||
1395 | per_cpu_trap_init(); | 1398 | per_cpu_trap_init(); |
1396 | 1399 | ||
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index 2d3472b21ebb..9316a024a818 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c | |||
@@ -156,6 +156,6 @@ void __init arch_init_irq(void) | |||
156 | irq_desc[i].status = IRQ_DISABLED; | 156 | irq_desc[i].status = IRQ_DISABLED; |
157 | irq_desc[i].action = 0; | 157 | irq_desc[i].action = 0; |
158 | irq_desc[i].depth = 1; | 158 | irq_desc[i].depth = 1; |
159 | irq_desc[i].handler = &lasat_irq_type; | 159 | irq_desc[i].chip = &lasat_irq_type; |
160 | } | 160 | } |
161 | } | 161 | } |
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index db53950b7cfb..9dd6b8925581 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c | |||
@@ -215,7 +215,7 @@ void __init arch_init_irq(void) | |||
215 | irq_desc[i].status = IRQ_DISABLED; | 215 | irq_desc[i].status = IRQ_DISABLED; |
216 | irq_desc[i].action = 0; | 216 | irq_desc[i].action = 0; |
217 | irq_desc[i].depth = 1; | 217 | irq_desc[i].depth = 1; |
218 | irq_desc[i].handler = &atlas_irq_type; | 218 | irq_desc[i].chip = &atlas_irq_type; |
219 | spin_lock_init(&irq_desc[i].lock); | 219 | spin_lock_init(&irq_desc[i].lock); |
220 | } | 220 | } |
221 | } | 221 | } |
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 4a6220116c96..19e41fd186c4 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile | |||
@@ -30,6 +30,7 @@ obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o | |||
30 | obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o | 30 | obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o |
31 | obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o | 31 | obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o |
32 | obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o | 32 | obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o |
33 | obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o | ||
33 | 34 | ||
34 | # | 35 | # |
35 | # Choose one DMA coherency model | 36 | # Choose one DMA coherency model |
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 4a43924cd4fc..75d887e89739 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -60,13 +60,13 @@ static unsigned long scache_size __read_mostly; | |||
60 | /* | 60 | /* |
61 | * Dummy cache handling routines for machines without boardcaches | 61 | * Dummy cache handling routines for machines without boardcaches |
62 | */ | 62 | */ |
63 | static void no_sc_noop(void) {} | 63 | static void cache_noop(void) {} |
64 | 64 | ||
65 | static struct bcache_ops no_sc_ops = { | 65 | static struct bcache_ops no_sc_ops = { |
66 | .bc_enable = (void *)no_sc_noop, | 66 | .bc_enable = (void *)cache_noop, |
67 | .bc_disable = (void *)no_sc_noop, | 67 | .bc_disable = (void *)cache_noop, |
68 | .bc_wback_inv = (void *)no_sc_noop, | 68 | .bc_wback_inv = (void *)cache_noop, |
69 | .bc_inv = (void *)no_sc_noop | 69 | .bc_inv = (void *)cache_noop |
70 | }; | 70 | }; |
71 | 71 | ||
72 | struct bcache_ops *bcops = &no_sc_ops; | 72 | struct bcache_ops *bcops = &no_sc_ops; |
@@ -94,7 +94,9 @@ static inline void r4k_blast_dcache_page_setup(void) | |||
94 | { | 94 | { |
95 | unsigned long dc_lsize = cpu_dcache_line_size(); | 95 | unsigned long dc_lsize = cpu_dcache_line_size(); |
96 | 96 | ||
97 | if (dc_lsize == 16) | 97 | if (dc_lsize == 0) |
98 | r4k_blast_dcache_page = (void *)cache_noop; | ||
99 | else if (dc_lsize == 16) | ||
98 | r4k_blast_dcache_page = blast_dcache16_page; | 100 | r4k_blast_dcache_page = blast_dcache16_page; |
99 | else if (dc_lsize == 32) | 101 | else if (dc_lsize == 32) |
100 | r4k_blast_dcache_page = r4k_blast_dcache_page_dc32; | 102 | r4k_blast_dcache_page = r4k_blast_dcache_page_dc32; |
@@ -106,7 +108,9 @@ static inline void r4k_blast_dcache_page_indexed_setup(void) | |||
106 | { | 108 | { |
107 | unsigned long dc_lsize = cpu_dcache_line_size(); | 109 | unsigned long dc_lsize = cpu_dcache_line_size(); |
108 | 110 | ||
109 | if (dc_lsize == 16) | 111 | if (dc_lsize == 0) |
112 | r4k_blast_dcache_page_indexed = (void *)cache_noop; | ||
113 | else if (dc_lsize == 16) | ||
110 | r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed; | 114 | r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed; |
111 | else if (dc_lsize == 32) | 115 | else if (dc_lsize == 32) |
112 | r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed; | 116 | r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed; |
@@ -118,7 +122,9 @@ static inline void r4k_blast_dcache_setup(void) | |||
118 | { | 122 | { |
119 | unsigned long dc_lsize = cpu_dcache_line_size(); | 123 | unsigned long dc_lsize = cpu_dcache_line_size(); |
120 | 124 | ||
121 | if (dc_lsize == 16) | 125 | if (dc_lsize == 0) |
126 | r4k_blast_dcache = (void *)cache_noop; | ||
127 | else if (dc_lsize == 16) | ||
122 | r4k_blast_dcache = blast_dcache16; | 128 | r4k_blast_dcache = blast_dcache16; |
123 | else if (dc_lsize == 32) | 129 | else if (dc_lsize == 32) |
124 | r4k_blast_dcache = blast_dcache32; | 130 | r4k_blast_dcache = blast_dcache32; |
@@ -201,7 +207,9 @@ static inline void r4k_blast_icache_page_setup(void) | |||
201 | { | 207 | { |
202 | unsigned long ic_lsize = cpu_icache_line_size(); | 208 | unsigned long ic_lsize = cpu_icache_line_size(); |
203 | 209 | ||
204 | if (ic_lsize == 16) | 210 | if (ic_lsize == 0) |
211 | r4k_blast_icache_page = (void *)cache_noop; | ||
212 | else if (ic_lsize == 16) | ||
205 | r4k_blast_icache_page = blast_icache16_page; | 213 | r4k_blast_icache_page = blast_icache16_page; |
206 | else if (ic_lsize == 32) | 214 | else if (ic_lsize == 32) |
207 | r4k_blast_icache_page = blast_icache32_page; | 215 | r4k_blast_icache_page = blast_icache32_page; |
@@ -216,7 +224,9 @@ static inline void r4k_blast_icache_page_indexed_setup(void) | |||
216 | { | 224 | { |
217 | unsigned long ic_lsize = cpu_icache_line_size(); | 225 | unsigned long ic_lsize = cpu_icache_line_size(); |
218 | 226 | ||
219 | if (ic_lsize == 16) | 227 | if (ic_lsize == 0) |
228 | r4k_blast_icache_page_indexed = (void *)cache_noop; | ||
229 | else if (ic_lsize == 16) | ||
220 | r4k_blast_icache_page_indexed = blast_icache16_page_indexed; | 230 | r4k_blast_icache_page_indexed = blast_icache16_page_indexed; |
221 | else if (ic_lsize == 32) { | 231 | else if (ic_lsize == 32) { |
222 | if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) | 232 | if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) |
@@ -238,7 +248,9 @@ static inline void r4k_blast_icache_setup(void) | |||
238 | { | 248 | { |
239 | unsigned long ic_lsize = cpu_icache_line_size(); | 249 | unsigned long ic_lsize = cpu_icache_line_size(); |
240 | 250 | ||
241 | if (ic_lsize == 16) | 251 | if (ic_lsize == 0) |
252 | r4k_blast_icache = (void *)cache_noop; | ||
253 | else if (ic_lsize == 16) | ||
242 | r4k_blast_icache = blast_icache16; | 254 | r4k_blast_icache = blast_icache16; |
243 | else if (ic_lsize == 32) { | 255 | else if (ic_lsize == 32) { |
244 | if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) | 256 | if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x()) |
@@ -258,7 +270,7 @@ static inline void r4k_blast_scache_page_setup(void) | |||
258 | unsigned long sc_lsize = cpu_scache_line_size(); | 270 | unsigned long sc_lsize = cpu_scache_line_size(); |
259 | 271 | ||
260 | if (scache_size == 0) | 272 | if (scache_size == 0) |
261 | r4k_blast_scache_page = (void *)no_sc_noop; | 273 | r4k_blast_scache_page = (void *)cache_noop; |
262 | else if (sc_lsize == 16) | 274 | else if (sc_lsize == 16) |
263 | r4k_blast_scache_page = blast_scache16_page; | 275 | r4k_blast_scache_page = blast_scache16_page; |
264 | else if (sc_lsize == 32) | 276 | else if (sc_lsize == 32) |
@@ -276,7 +288,7 @@ static inline void r4k_blast_scache_page_indexed_setup(void) | |||
276 | unsigned long sc_lsize = cpu_scache_line_size(); | 288 | unsigned long sc_lsize = cpu_scache_line_size(); |
277 | 289 | ||
278 | if (scache_size == 0) | 290 | if (scache_size == 0) |
279 | r4k_blast_scache_page_indexed = (void *)no_sc_noop; | 291 | r4k_blast_scache_page_indexed = (void *)cache_noop; |
280 | else if (sc_lsize == 16) | 292 | else if (sc_lsize == 16) |
281 | r4k_blast_scache_page_indexed = blast_scache16_page_indexed; | 293 | r4k_blast_scache_page_indexed = blast_scache16_page_indexed; |
282 | else if (sc_lsize == 32) | 294 | else if (sc_lsize == 32) |
@@ -294,7 +306,7 @@ static inline void r4k_blast_scache_setup(void) | |||
294 | unsigned long sc_lsize = cpu_scache_line_size(); | 306 | unsigned long sc_lsize = cpu_scache_line_size(); |
295 | 307 | ||
296 | if (scache_size == 0) | 308 | if (scache_size == 0) |
297 | r4k_blast_scache = (void *)no_sc_noop; | 309 | r4k_blast_scache = (void *)cache_noop; |
298 | else if (sc_lsize == 16) | 310 | else if (sc_lsize == 16) |
299 | r4k_blast_scache = blast_scache16; | 311 | r4k_blast_scache = blast_scache16; |
300 | else if (sc_lsize == 32) | 312 | else if (sc_lsize == 32) |
@@ -508,7 +520,7 @@ static inline void local_r4k_flush_icache_range(void *args) | |||
508 | unsigned long end = fir_args->end; | 520 | unsigned long end = fir_args->end; |
509 | 521 | ||
510 | if (!cpu_has_ic_fills_f_dc) { | 522 | if (!cpu_has_ic_fills_f_dc) { |
511 | if (end - start > dcache_size) { | 523 | if (end - start >= dcache_size) { |
512 | r4k_blast_dcache(); | 524 | r4k_blast_dcache(); |
513 | } else { | 525 | } else { |
514 | R4600_HIT_CACHEOP_WAR_IMPL; | 526 | R4600_HIT_CACHEOP_WAR_IMPL; |
@@ -683,10 +695,12 @@ static void local_r4k_flush_cache_sigtramp(void * arg) | |||
683 | unsigned long addr = (unsigned long) arg; | 695 | unsigned long addr = (unsigned long) arg; |
684 | 696 | ||
685 | R4600_HIT_CACHEOP_WAR_IMPL; | 697 | R4600_HIT_CACHEOP_WAR_IMPL; |
686 | protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); | 698 | if (dc_lsize) |
699 | protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); | ||
687 | if (!cpu_icache_snoops_remote_store && scache_size) | 700 | if (!cpu_icache_snoops_remote_store && scache_size) |
688 | protected_writeback_scache_line(addr & ~(sc_lsize - 1)); | 701 | protected_writeback_scache_line(addr & ~(sc_lsize - 1)); |
689 | protected_flush_icache_line(addr & ~(ic_lsize - 1)); | 702 | if (ic_lsize) |
703 | protected_flush_icache_line(addr & ~(ic_lsize - 1)); | ||
690 | if (MIPS4K_ICACHE_REFILL_WAR) { | 704 | if (MIPS4K_ICACHE_REFILL_WAR) { |
691 | __asm__ __volatile__ ( | 705 | __asm__ __volatile__ ( |
692 | ".set push\n\t" | 706 | ".set push\n\t" |
@@ -973,8 +987,10 @@ static void __init probe_pcache(void) | |||
973 | c->icache.waysize = icache_size / c->icache.ways; | 987 | c->icache.waysize = icache_size / c->icache.ways; |
974 | c->dcache.waysize = dcache_size / c->dcache.ways; | 988 | c->dcache.waysize = dcache_size / c->dcache.ways; |
975 | 989 | ||
976 | c->icache.sets = icache_size / (c->icache.linesz * c->icache.ways); | 990 | c->icache.sets = c->icache.linesz ? |
977 | c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways); | 991 | icache_size / (c->icache.linesz * c->icache.ways) : 0; |
992 | c->dcache.sets = c->dcache.linesz ? | ||
993 | dcache_size / (c->dcache.linesz * c->dcache.ways) : 0; | ||
978 | 994 | ||
979 | /* | 995 | /* |
980 | * R10000 and R12000 P-caches are odd in a positive way. They're 32kB | 996 | * R10000 and R12000 P-caches are odd in a positive way. They're 32kB |
@@ -993,10 +1009,16 @@ static void __init probe_pcache(void) | |||
993 | break; | 1009 | break; |
994 | case CPU_24K: | 1010 | case CPU_24K: |
995 | case CPU_34K: | 1011 | case CPU_34K: |
996 | if (!(read_c0_config7() & (1 << 16))) | 1012 | case CPU_74K: |
1013 | if ((read_c0_config7() & (1 << 16))) { | ||
1014 | /* effectively physically indexed dcache, | ||
1015 | thus no virtual aliases. */ | ||
1016 | c->dcache.flags |= MIPS_CACHE_PINDEX; | ||
1017 | break; | ||
1018 | } | ||
997 | default: | 1019 | default: |
998 | if (c->dcache.waysize > PAGE_SIZE) | 1020 | if (c->dcache.waysize > PAGE_SIZE) |
999 | c->dcache.flags |= MIPS_CACHE_ALIASES; | 1021 | c->dcache.flags |= MIPS_CACHE_ALIASES; |
1000 | } | 1022 | } |
1001 | 1023 | ||
1002 | switch (c->cputype) { | 1024 | switch (c->cputype) { |
@@ -1092,6 +1114,7 @@ static int __init probe_scache(void) | |||
1092 | 1114 | ||
1093 | extern int r5k_sc_init(void); | 1115 | extern int r5k_sc_init(void); |
1094 | extern int rm7k_sc_init(void); | 1116 | extern int rm7k_sc_init(void); |
1117 | extern int mips_sc_init(void); | ||
1095 | 1118 | ||
1096 | static void __init setup_scache(void) | 1119 | static void __init setup_scache(void) |
1097 | { | 1120 | { |
@@ -1139,17 +1162,29 @@ static void __init setup_scache(void) | |||
1139 | return; | 1162 | return; |
1140 | 1163 | ||
1141 | default: | 1164 | default: |
1165 | if (c->isa_level == MIPS_CPU_ISA_M32R1 || | ||
1166 | c->isa_level == MIPS_CPU_ISA_M32R2 || | ||
1167 | c->isa_level == MIPS_CPU_ISA_M64R1 || | ||
1168 | c->isa_level == MIPS_CPU_ISA_M64R2) { | ||
1169 | #ifdef CONFIG_MIPS_CPU_SCACHE | ||
1170 | if (mips_sc_init ()) { | ||
1171 | scache_size = c->scache.ways * c->scache.sets * c->scache.linesz; | ||
1172 | printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n", | ||
1173 | scache_size >> 10, | ||
1174 | way_string[c->scache.ways], c->scache.linesz); | ||
1175 | } | ||
1176 | #else | ||
1177 | if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) | ||
1178 | panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); | ||
1179 | #endif | ||
1180 | return; | ||
1181 | } | ||
1142 | sc_present = 0; | 1182 | sc_present = 0; |
1143 | } | 1183 | } |
1144 | 1184 | ||
1145 | if (!sc_present) | 1185 | if (!sc_present) |
1146 | return; | 1186 | return; |
1147 | 1187 | ||
1148 | if ((c->isa_level == MIPS_CPU_ISA_M32R1 || | ||
1149 | c->isa_level == MIPS_CPU_ISA_M64R1) && | ||
1150 | !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) | ||
1151 | panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); | ||
1152 | |||
1153 | /* compute a couple of other cache variables */ | 1188 | /* compute a couple of other cache variables */ |
1154 | c->scache.waysize = scache_size / c->scache.ways; | 1189 | c->scache.waysize = scache_size / c->scache.ways; |
1155 | 1190 | ||
@@ -1246,10 +1281,12 @@ void __init r4k_cache_init(void) | |||
1246 | * This code supports virtually indexed processors and will be | 1281 | * This code supports virtually indexed processors and will be |
1247 | * unnecessarily inefficient on physically indexed processors. | 1282 | * unnecessarily inefficient on physically indexed processors. |
1248 | */ | 1283 | */ |
1249 | shm_align_mask = max_t( unsigned long, | 1284 | if (c->dcache.linesz) |
1250 | c->dcache.sets * c->dcache.linesz - 1, | 1285 | shm_align_mask = max_t( unsigned long, |
1251 | PAGE_SIZE - 1); | 1286 | c->dcache.sets * c->dcache.linesz - 1, |
1252 | 1287 | PAGE_SIZE - 1); | |
1288 | else | ||
1289 | shm_align_mask = PAGE_SIZE-1; | ||
1253 | flush_cache_all = r4k_flush_cache_all; | 1290 | flush_cache_all = r4k_flush_cache_all; |
1254 | __flush_cache_all = r4k___flush_cache_all; | 1291 | __flush_cache_all = r4k___flush_cache_all; |
1255 | flush_cache_mm = r4k_flush_cache_mm; | 1292 | flush_cache_mm = r4k_flush_cache_mm; |
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c new file mode 100644 index 000000000000..42b50964c644 --- /dev/null +++ b/arch/mips/mm/sc-mips.c | |||
@@ -0,0 +1,112 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Chris Dearman (chris@mips.com), | ||
3 | */ | ||
4 | #include <linux/init.h> | ||
5 | #include <linux/kernel.h> | ||
6 | #include <linux/sched.h> | ||
7 | #include <linux/mm.h> | ||
8 | |||
9 | #include <asm/mipsregs.h> | ||
10 | #include <asm/bcache.h> | ||
11 | #include <asm/cacheops.h> | ||
12 | #include <asm/page.h> | ||
13 | #include <asm/pgtable.h> | ||
14 | #include <asm/system.h> | ||
15 | #include <asm/mmu_context.h> | ||
16 | #include <asm/r4kcache.h> | ||
17 | |||
18 | /* | ||
19 | * MIPS32/MIPS64 L2 cache handling | ||
20 | */ | ||
21 | |||
22 | /* | ||
23 | * Writeback and invalidate the secondary cache before DMA. | ||
24 | */ | ||
25 | static void mips_sc_wback_inv(unsigned long addr, unsigned long size) | ||
26 | { | ||
27 | blast_scache_range(addr, addr + size); | ||
28 | } | ||
29 | |||
30 | /* | ||
31 | * Invalidate the secondary cache before DMA. | ||
32 | */ | ||
33 | static void mips_sc_inv(unsigned long addr, unsigned long size) | ||
34 | { | ||
35 | blast_inv_scache_range(addr, addr + size); | ||
36 | } | ||
37 | |||
38 | static void mips_sc_enable(void) | ||
39 | { | ||
40 | /* L2 cache is permanently enabled */ | ||
41 | } | ||
42 | |||
43 | static void mips_sc_disable(void) | ||
44 | { | ||
45 | /* L2 cache is permanently enabled */ | ||
46 | } | ||
47 | |||
48 | static struct bcache_ops mips_sc_ops = { | ||
49 | .bc_enable = mips_sc_enable, | ||
50 | .bc_disable = mips_sc_disable, | ||
51 | .bc_wback_inv = mips_sc_wback_inv, | ||
52 | .bc_inv = mips_sc_inv | ||
53 | }; | ||
54 | |||
55 | static inline int __init mips_sc_probe(void) | ||
56 | { | ||
57 | struct cpuinfo_mips *c = ¤t_cpu_data; | ||
58 | unsigned int config1, config2; | ||
59 | unsigned int tmp; | ||
60 | |||
61 | /* Mark as not present until probe completed */ | ||
62 | c->scache.flags |= MIPS_CACHE_NOT_PRESENT; | ||
63 | |||
64 | /* Ignore anything but MIPSxx processors */ | ||
65 | if (c->isa_level != MIPS_CPU_ISA_M32R1 && | ||
66 | c->isa_level != MIPS_CPU_ISA_M32R2 && | ||
67 | c->isa_level != MIPS_CPU_ISA_M64R1 && | ||
68 | c->isa_level != MIPS_CPU_ISA_M64R2) | ||
69 | return 0; | ||
70 | |||
71 | /* Does this MIPS32/MIPS64 CPU have a config2 register? */ | ||
72 | config1 = read_c0_config1(); | ||
73 | if (!(config1 & MIPS_CONF_M)) | ||
74 | return 0; | ||
75 | |||
76 | config2 = read_c0_config2(); | ||
77 | tmp = (config2 >> 4) & 0x0f; | ||
78 | if (0 < tmp && tmp <= 7) | ||
79 | c->scache.linesz = 2 << tmp; | ||
80 | else | ||
81 | return 0; | ||
82 | |||
83 | tmp = (config2 >> 8) & 0x0f; | ||
84 | if (0 <= tmp && tmp <= 7) | ||
85 | c->scache.sets = 64 << tmp; | ||
86 | else | ||
87 | return 0; | ||
88 | |||
89 | tmp = (config2 >> 0) & 0x0f; | ||
90 | if (0 <= tmp && tmp <= 7) | ||
91 | c->scache.ways = tmp + 1; | ||
92 | else | ||
93 | return 0; | ||
94 | |||
95 | c->scache.waysize = c->scache.sets * c->scache.linesz; | ||
96 | c->scache.waybit = __ffs(c->scache.waysize); | ||
97 | |||
98 | c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; | ||
99 | |||
100 | return 1; | ||
101 | } | ||
102 | |||
103 | int __init mips_sc_init(void) | ||
104 | { | ||
105 | int found = mips_sc_probe (); | ||
106 | if (found) { | ||
107 | mips_sc_enable(); | ||
108 | bcops = &mips_sc_ops; | ||
109 | } | ||
110 | return found; | ||
111 | } | ||
112 | |||
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index df1485501ce6..d0419480b097 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c | |||
@@ -370,8 +370,8 @@ void __init plat_mem_setup(void) | |||
370 | pm_power_off = momenco_jaguar_power_off; | 370 | pm_power_off = momenco_jaguar_power_off; |
371 | 371 | ||
372 | /* | 372 | /* |
373 | * initrd_start = (ulong)jaguar_initrd_start; | 373 | * initrd_start = (unsigned long)jaguar_initrd_start; |
374 | * initrd_end = (ulong)jaguar_initrd_start + (ulong)jaguar_initrd_size; | 374 | * initrd_end = (unsigned long)jaguar_initrd_start + (ulong)jaguar_initrd_size; |
375 | * initrd_below_start_ok = 1; | 375 | * initrd_below_start_ok = 1; |
376 | */ | 376 | */ |
377 | 377 | ||
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c index bd885785e2f9..31d179c4673f 100644 --- a/arch/mips/momentum/ocelot_c/cpci-irq.c +++ b/arch/mips/momentum/ocelot_c/cpci-irq.c | |||
@@ -147,6 +147,6 @@ void cpci_irq_init(void) | |||
147 | irq_desc[i].status = IRQ_DISABLED; | 147 | irq_desc[i].status = IRQ_DISABLED; |
148 | irq_desc[i].action = 0; | 148 | irq_desc[i].action = 0; |
149 | irq_desc[i].depth = 2; | 149 | irq_desc[i].depth = 2; |
150 | irq_desc[i].handler = &cpci_irq_type; | 150 | irq_desc[i].chip = &cpci_irq_type; |
151 | } | 151 | } |
152 | } | 152 | } |
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c index 257e1d1b72dd..a0ee006d75cf 100644 --- a/arch/mips/momentum/ocelot_c/setup.c +++ b/arch/mips/momentum/ocelot_c/setup.c | |||
@@ -242,8 +242,8 @@ void __init plat_mem_setup(void) | |||
242 | pm_power_off = momenco_ocelot_power_off; | 242 | pm_power_off = momenco_ocelot_power_off; |
243 | 243 | ||
244 | /* | 244 | /* |
245 | * initrd_start = (ulong)ocelot_initrd_start; | 245 | * initrd_start = (unsigned long)ocelot_initrd_start; |
246 | * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size; | 246 | * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size; |
247 | * initrd_below_start_ok = 1; | 247 | * initrd_below_start_ok = 1; |
248 | */ | 248 | */ |
249 | 249 | ||
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c index 755bde5146be..852265026fd1 100644 --- a/arch/mips/momentum/ocelot_c/uart-irq.c +++ b/arch/mips/momentum/ocelot_c/uart-irq.c | |||
@@ -137,10 +137,10 @@ void uart_irq_init(void) | |||
137 | irq_desc[80].status = IRQ_DISABLED; | 137 | irq_desc[80].status = IRQ_DISABLED; |
138 | irq_desc[80].action = 0; | 138 | irq_desc[80].action = 0; |
139 | irq_desc[80].depth = 2; | 139 | irq_desc[80].depth = 2; |
140 | irq_desc[80].handler = &uart_irq_type; | 140 | irq_desc[80].chip = &uart_irq_type; |
141 | 141 | ||
142 | irq_desc[81].status = IRQ_DISABLED; | 142 | irq_desc[81].status = IRQ_DISABLED; |
143 | irq_desc[81].action = 0; | 143 | irq_desc[81].action = 0; |
144 | irq_desc[81].depth = 2; | 144 | irq_desc[81].depth = 2; |
145 | irq_desc[81].handler = &uart_irq_type; | 145 | irq_desc[81].chip = &uart_irq_type; |
146 | } | 146 | } |
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c index 72143ab1e900..39da02b4e076 100644 --- a/arch/mips/momentum/ocelot_g/setup.c +++ b/arch/mips/momentum/ocelot_g/setup.c | |||
@@ -174,8 +174,8 @@ void __init plat_mem_setup(void) | |||
174 | pm_power_off = momenco_ocelot_power_off; | 174 | pm_power_off = momenco_ocelot_power_off; |
175 | 175 | ||
176 | /* | 176 | /* |
177 | * initrd_start = (ulong)ocelot_initrd_start; | 177 | * initrd_start = (unsigned long)ocelot_initrd_start; |
178 | * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size; | 178 | * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size; |
179 | * initrd_below_start_ok = 1; | 179 | * initrd_below_start_ok = 1; |
180 | */ | 180 | */ |
181 | 181 | ||
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index f26a00e13204..a09c5f901233 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c | |||
@@ -12,16 +12,70 @@ | |||
12 | 12 | ||
13 | #include "op_impl.h" | 13 | #include "op_impl.h" |
14 | 14 | ||
15 | #define M_PERFCTL_EXL (1UL << 0) | 15 | #define M_PERFCTL_EXL (1UL << 0) |
16 | #define M_PERFCTL_KERNEL (1UL << 1) | 16 | #define M_PERFCTL_KERNEL (1UL << 1) |
17 | #define M_PERFCTL_SUPERVISOR (1UL << 2) | 17 | #define M_PERFCTL_SUPERVISOR (1UL << 2) |
18 | #define M_PERFCTL_USER (1UL << 3) | 18 | #define M_PERFCTL_USER (1UL << 3) |
19 | #define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) | 19 | #define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) |
20 | #define M_PERFCTL_EVENT(event) ((event) << 5) | 20 | #define M_PERFCTL_EVENT(event) ((event) << 5) |
21 | #define M_PERFCTL_WIDE (1UL << 30) | 21 | #define M_PERFCTL_VPEID(vpe) ((vpe) << 16) |
22 | #define M_PERFCTL_MORE (1UL << 31) | 22 | #define M_PERFCTL_MT_EN(filter) ((filter) << 20) |
23 | #define M_TC_EN_ALL M_PERFCTL_MT_EN(0) | ||
24 | #define M_TC_EN_VPE M_PERFCTL_MT_EN(1) | ||
25 | #define M_TC_EN_TC M_PERFCTL_MT_EN(2) | ||
26 | #define M_PERFCTL_TCID(tcid) ((tcid) << 22) | ||
27 | #define M_PERFCTL_WIDE (1UL << 30) | ||
28 | #define M_PERFCTL_MORE (1UL << 31) | ||
29 | |||
30 | #define M_COUNTER_OVERFLOW (1UL << 31) | ||
31 | |||
32 | #ifdef CONFIG_MIPS_MT_SMP | ||
33 | #define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id())) | ||
34 | #else | ||
35 | #define WHAT 0 | ||
36 | #endif | ||
23 | 37 | ||
24 | #define M_COUNTER_OVERFLOW (1UL << 31) | 38 | #define __define_perf_accessors(r, n, np) \ |
39 | \ | ||
40 | static inline unsigned int r_c0_ ## r ## n(void) \ | ||
41 | { \ | ||
42 | unsigned int cpu = smp_processor_id(); \ | ||
43 | \ | ||
44 | switch (cpu) { \ | ||
45 | case 0: \ | ||
46 | return read_c0_ ## r ## n(); \ | ||
47 | case 1: \ | ||
48 | return read_c0_ ## r ## np(); \ | ||
49 | default: \ | ||
50 | BUG(); \ | ||
51 | } \ | ||
52 | } \ | ||
53 | \ | ||
54 | static inline void w_c0_ ## r ## n(unsigned int value) \ | ||
55 | { \ | ||
56 | unsigned int cpu = smp_processor_id(); \ | ||
57 | \ | ||
58 | switch (cpu) { \ | ||
59 | case 0: \ | ||
60 | write_c0_ ## r ## n(value); \ | ||
61 | return; \ | ||
62 | case 1: \ | ||
63 | write_c0_ ## r ## np(value); \ | ||
64 | return; \ | ||
65 | default: \ | ||
66 | BUG(); \ | ||
67 | } \ | ||
68 | } \ | ||
69 | |||
70 | __define_perf_accessors(perfcntr, 0, 2) | ||
71 | __define_perf_accessors(perfcntr, 1, 3) | ||
72 | __define_perf_accessors(perfcntr, 2, 2) | ||
73 | __define_perf_accessors(perfcntr, 3, 2) | ||
74 | |||
75 | __define_perf_accessors(perfctrl, 0, 2) | ||
76 | __define_perf_accessors(perfctrl, 1, 3) | ||
77 | __define_perf_accessors(perfctrl, 2, 2) | ||
78 | __define_perf_accessors(perfctrl, 3, 2) | ||
25 | 79 | ||
26 | struct op_mips_model op_model_mipsxx_ops; | 80 | struct op_mips_model op_model_mipsxx_ops; |
27 | 81 | ||
@@ -66,17 +120,17 @@ static void mipsxx_cpu_setup (void *args) | |||
66 | 120 | ||
67 | switch (counters) { | 121 | switch (counters) { |
68 | case 4: | 122 | case 4: |
69 | write_c0_perfctrl3(0); | 123 | w_c0_perfctrl3(0); |
70 | write_c0_perfcntr3(reg.counter[3]); | 124 | w_c0_perfcntr3(reg.counter[3]); |
71 | case 3: | 125 | case 3: |
72 | write_c0_perfctrl2(0); | 126 | w_c0_perfctrl2(0); |
73 | write_c0_perfcntr2(reg.counter[2]); | 127 | w_c0_perfcntr2(reg.counter[2]); |
74 | case 2: | 128 | case 2: |
75 | write_c0_perfctrl1(0); | 129 | w_c0_perfctrl1(0); |
76 | write_c0_perfcntr1(reg.counter[1]); | 130 | w_c0_perfcntr1(reg.counter[1]); |
77 | case 1: | 131 | case 1: |
78 | write_c0_perfctrl0(0); | 132 | w_c0_perfctrl0(0); |
79 | write_c0_perfcntr0(reg.counter[0]); | 133 | w_c0_perfcntr0(reg.counter[0]); |
80 | } | 134 | } |
81 | } | 135 | } |
82 | 136 | ||
@@ -87,13 +141,13 @@ static void mipsxx_cpu_start(void *args) | |||
87 | 141 | ||
88 | switch (counters) { | 142 | switch (counters) { |
89 | case 4: | 143 | case 4: |
90 | write_c0_perfctrl3(reg.control[3]); | 144 | w_c0_perfctrl3(WHAT | reg.control[3]); |
91 | case 3: | 145 | case 3: |
92 | write_c0_perfctrl2(reg.control[2]); | 146 | w_c0_perfctrl2(WHAT | reg.control[2]); |
93 | case 2: | 147 | case 2: |
94 | write_c0_perfctrl1(reg.control[1]); | 148 | w_c0_perfctrl1(WHAT | reg.control[1]); |
95 | case 1: | 149 | case 1: |
96 | write_c0_perfctrl0(reg.control[0]); | 150 | w_c0_perfctrl0(WHAT | reg.control[0]); |
97 | } | 151 | } |
98 | } | 152 | } |
99 | 153 | ||
@@ -104,13 +158,13 @@ static void mipsxx_cpu_stop(void *args) | |||
104 | 158 | ||
105 | switch (counters) { | 159 | switch (counters) { |
106 | case 4: | 160 | case 4: |
107 | write_c0_perfctrl3(0); | 161 | w_c0_perfctrl3(0); |
108 | case 3: | 162 | case 3: |
109 | write_c0_perfctrl2(0); | 163 | w_c0_perfctrl2(0); |
110 | case 2: | 164 | case 2: |
111 | write_c0_perfctrl1(0); | 165 | w_c0_perfctrl1(0); |
112 | case 1: | 166 | case 1: |
113 | write_c0_perfctrl0(0); | 167 | w_c0_perfctrl0(0); |
114 | } | 168 | } |
115 | } | 169 | } |
116 | 170 | ||
@@ -124,12 +178,12 @@ static int mipsxx_perfcount_handler(struct pt_regs *regs) | |||
124 | switch (counters) { | 178 | switch (counters) { |
125 | #define HANDLE_COUNTER(n) \ | 179 | #define HANDLE_COUNTER(n) \ |
126 | case n + 1: \ | 180 | case n + 1: \ |
127 | control = read_c0_perfctrl ## n(); \ | 181 | control = r_c0_perfctrl ## n(); \ |
128 | counter = read_c0_perfcntr ## n(); \ | 182 | counter = r_c0_perfcntr ## n(); \ |
129 | if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \ | 183 | if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \ |
130 | (counter & M_COUNTER_OVERFLOW)) { \ | 184 | (counter & M_COUNTER_OVERFLOW)) { \ |
131 | oprofile_add_sample(regs, n); \ | 185 | oprofile_add_sample(regs, n); \ |
132 | write_c0_perfcntr ## n(reg.counter[n]); \ | 186 | w_c0_perfcntr ## n(reg.counter[n]); \ |
133 | handled = 1; \ | 187 | handled = 1; \ |
134 | } | 188 | } |
135 | HANDLE_COUNTER(3) | 189 | HANDLE_COUNTER(3) |
@@ -143,35 +197,47 @@ static int mipsxx_perfcount_handler(struct pt_regs *regs) | |||
143 | 197 | ||
144 | #define M_CONFIG1_PC (1 << 4) | 198 | #define M_CONFIG1_PC (1 << 4) |
145 | 199 | ||
146 | static inline int n_counters(void) | 200 | static inline int __n_counters(void) |
147 | { | 201 | { |
148 | if (!(read_c0_config1() & M_CONFIG1_PC)) | 202 | if (!(read_c0_config1() & M_CONFIG1_PC)) |
149 | return 0; | 203 | return 0; |
150 | if (!(read_c0_perfctrl0() & M_PERFCTL_MORE)) | 204 | if (!(r_c0_perfctrl0() & M_PERFCTL_MORE)) |
151 | return 1; | 205 | return 1; |
152 | if (!(read_c0_perfctrl1() & M_PERFCTL_MORE)) | 206 | if (!(r_c0_perfctrl1() & M_PERFCTL_MORE)) |
153 | return 2; | 207 | return 2; |
154 | if (!(read_c0_perfctrl2() & M_PERFCTL_MORE)) | 208 | if (!(r_c0_perfctrl2() & M_PERFCTL_MORE)) |
155 | return 3; | 209 | return 3; |
156 | 210 | ||
157 | return 4; | 211 | return 4; |
158 | } | 212 | } |
159 | 213 | ||
214 | static inline int n_counters(void) | ||
215 | { | ||
216 | int counters = __n_counters(); | ||
217 | |||
218 | #ifndef CONFIG_SMP | ||
219 | if (current_cpu_data.cputype == CPU_34K) | ||
220 | return counters >> 1; | ||
221 | #endif | ||
222 | |||
223 | return counters; | ||
224 | } | ||
225 | |||
160 | static inline void reset_counters(int counters) | 226 | static inline void reset_counters(int counters) |
161 | { | 227 | { |
162 | switch (counters) { | 228 | switch (counters) { |
163 | case 4: | 229 | case 4: |
164 | write_c0_perfctrl3(0); | 230 | w_c0_perfctrl3(0); |
165 | write_c0_perfcntr3(0); | 231 | w_c0_perfcntr3(0); |
166 | case 3: | 232 | case 3: |
167 | write_c0_perfctrl2(0); | 233 | w_c0_perfctrl2(0); |
168 | write_c0_perfcntr2(0); | 234 | w_c0_perfcntr2(0); |
169 | case 2: | 235 | case 2: |
170 | write_c0_perfctrl1(0); | 236 | w_c0_perfctrl1(0); |
171 | write_c0_perfcntr1(0); | 237 | w_c0_perfcntr1(0); |
172 | case 1: | 238 | case 1: |
173 | write_c0_perfctrl0(0); | 239 | w_c0_perfctrl0(0); |
174 | write_c0_perfcntr0(0); | 240 | w_c0_perfcntr0(0); |
175 | } | 241 | } |
176 | } | 242 | } |
177 | 243 | ||
@@ -201,7 +267,6 @@ static int __init mipsxx_init(void) | |||
201 | op_model_mipsxx_ops.cpu_type = "mips/25K"; | 267 | op_model_mipsxx_ops.cpu_type = "mips/25K"; |
202 | break; | 268 | break; |
203 | 269 | ||
204 | #ifndef CONFIG_SMP | ||
205 | case CPU_34K: | 270 | case CPU_34K: |
206 | op_model_mipsxx_ops.cpu_type = "mips/34K"; | 271 | op_model_mipsxx_ops.cpu_type = "mips/34K"; |
207 | break; | 272 | break; |
@@ -209,7 +274,6 @@ static int __init mipsxx_init(void) | |||
209 | case CPU_74K: | 274 | case CPU_74K: |
210 | op_model_mipsxx_ops.cpu_type = "mips/74K"; | 275 | op_model_mipsxx_ops.cpu_type = "mips/74K"; |
211 | break; | 276 | break; |
212 | #endif | ||
213 | 277 | ||
214 | case CPU_5KC: | 278 | case CPU_5KC: |
215 | op_model_mipsxx_ops.cpu_type = "mips/5K"; | 279 | op_model_mipsxx_ops.cpu_type = "mips/5K"; |
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 465778c5d816..35d5927706ea 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile | |||
@@ -23,7 +23,7 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o | |||
23 | # | 23 | # |
24 | # These are still pretty much in the old state, watch, go blind. | 24 | # These are still pretty much in the old state, watch, go blind. |
25 | # | 25 | # |
26 | obj-$(CONFIG_BASLER_EXCITE) = ops-titan.o pci-excite.o fixup-excite.o | 26 | obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o |
27 | obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o | 27 | obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o |
28 | obj-$(CONFIG_LASAT) += pci-lasat.o | 28 | obj-$(CONFIG_LASAT) += pci-lasat.o |
29 | obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o | 29 | obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o |
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c index 7688b7711329..150419c8b414 100644 --- a/arch/mips/pci/ops-tx4927.c +++ b/arch/mips/pci/ops-tx4927.c | |||
@@ -119,7 +119,7 @@ static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, i | |||
119 | 119 | ||
120 | switch (size) { | 120 | switch (size) { |
121 | case 1: | 121 | case 1: |
122 | *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr-> | 122 | *val = *(volatile u8 *) ((unsigned long) & tx4927_pcicptr-> |
123 | g2pcfgdata | | 123 | g2pcfgdata | |
124 | #ifdef __LITTLE_ENDIAN | 124 | #ifdef __LITTLE_ENDIAN |
125 | (where & 3)); | 125 | (where & 3)); |
@@ -128,7 +128,7 @@ static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, i | |||
128 | #endif | 128 | #endif |
129 | break; | 129 | break; |
130 | case 2: | 130 | case 2: |
131 | *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr-> | 131 | *val = *(volatile u16 *) ((unsigned long) & tx4927_pcicptr-> |
132 | g2pcfgdata | | 132 | g2pcfgdata | |
133 | #ifdef __LITTLE_ENDIAN | 133 | #ifdef __LITTLE_ENDIAN |
134 | (where & 3)); | 134 | (where & 3)); |
@@ -168,7 +168,7 @@ static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, | |||
168 | 168 | ||
169 | switch (size) { | 169 | switch (size) { |
170 | case 1: | 170 | case 1: |
171 | *(volatile u8 *) ((ulong) & tx4927_pcicptr-> | 171 | *(volatile u8 *) ((unsigned long) & tx4927_pcicptr-> |
172 | g2pcfgdata | | 172 | g2pcfgdata | |
173 | #ifdef __LITTLE_ENDIAN | 173 | #ifdef __LITTLE_ENDIAN |
174 | (where & 3)) = val; | 174 | (where & 3)) = val; |
@@ -178,7 +178,7 @@ static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, | |||
178 | break; | 178 | break; |
179 | 179 | ||
180 | case 2: | 180 | case 2: |
181 | *(volatile u16 *) ((ulong) & tx4927_pcicptr-> | 181 | *(volatile u16 *) ((unsigned long) & tx4927_pcicptr-> |
182 | g2pcfgdata | | 182 | g2pcfgdata | |
183 | #ifdef __LITTLE_ENDIAN | 183 | #ifdef __LITTLE_ENDIAN |
184 | (where & 3)) = val; | 184 | (where & 3)) = val; |
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c index 0ff083489efd..445007084515 100644 --- a/arch/mips/pci/ops-tx4938.c +++ b/arch/mips/pci/ops-tx4938.c | |||
@@ -106,7 +106,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, | |||
106 | 106 | ||
107 | switch (size) { | 107 | switch (size) { |
108 | case 1: | 108 | case 1: |
109 | *val = *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | | 109 | *val = *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata | |
110 | #ifdef __BIG_ENDIAN | 110 | #ifdef __BIG_ENDIAN |
111 | ((where & 3) ^ 3)); | 111 | ((where & 3) ^ 3)); |
112 | #else | 112 | #else |
@@ -114,7 +114,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, | |||
114 | #endif | 114 | #endif |
115 | break; | 115 | break; |
116 | case 2: | 116 | case 2: |
117 | *val = *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | | 117 | *val = *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata | |
118 | #ifdef __BIG_ENDIAN | 118 | #ifdef __BIG_ENDIAN |
119 | ((where & 3) ^ 2)); | 119 | ((where & 3) ^ 2)); |
120 | #else | 120 | #else |
@@ -154,7 +154,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, | |||
154 | 154 | ||
155 | switch (size) { | 155 | switch (size) { |
156 | case 1: | 156 | case 1: |
157 | *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | | 157 | *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata | |
158 | #ifdef __BIG_ENDIAN | 158 | #ifdef __BIG_ENDIAN |
159 | ((where & 3) ^ 3)) = val; | 159 | ((where & 3) ^ 3)) = val; |
160 | #else | 160 | #else |
@@ -162,7 +162,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, | |||
162 | #endif | 162 | #endif |
163 | break; | 163 | break; |
164 | case 2: | 164 | case 2: |
165 | *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata | | 165 | *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata | |
166 | #ifdef __BIG_ENDIAN | 166 | #ifdef __BIG_ENDIAN |
167 | ((where & 0x3) ^ 0x2)) = val; | 167 | ((where & 0x3) ^ 0x2)) = val; |
168 | #else | 168 | #else |
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 4dfce154d4af..ba66f8c9bd4e 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c | |||
@@ -51,11 +51,11 @@ unsigned long PCIBIOS_MIN_MEM = 0; | |||
51 | */ | 51 | */ |
52 | void | 52 | void |
53 | pcibios_align_resource(void *data, struct resource *res, | 53 | pcibios_align_resource(void *data, struct resource *res, |
54 | unsigned long size, unsigned long align) | 54 | resource_size_t size, resource_size_t align) |
55 | { | 55 | { |
56 | struct pci_dev *dev = data; | 56 | struct pci_dev *dev = data; |
57 | struct pci_controller *hose = dev->sysdata; | 57 | struct pci_controller *hose = dev->sysdata; |
58 | unsigned long start = res->start; | 58 | resource_size_t start = res->start; |
59 | 59 | ||
60 | if (res->flags & IORESOURCE_IO) { | 60 | if (res->flags & IORESOURCE_IO) { |
61 | /* Make sure we start at our min on all hoses */ | 61 | /* Make sure we start at our min on all hoses */ |
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index 39ee6314f627..8f18764a2359 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c | |||
@@ -236,7 +236,7 @@ void __init arch_init_irq(void) | |||
236 | int configPR; | 236 | int configPR; |
237 | 237 | ||
238 | for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { | 238 | for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { |
239 | irq_desc[i].handler = &level_irq_type; | 239 | irq_desc[i].chip = &level_irq_type; |
240 | pnx8550_ack(i); /* mask the irq just in case */ | 240 | pnx8550_ack(i); /* mask the irq just in case */ |
241 | } | 241 | } |
242 | 242 | ||
@@ -273,7 +273,7 @@ void __init arch_init_irq(void) | |||
273 | /* mask/priority is still 0 so we will not get any | 273 | /* mask/priority is still 0 so we will not get any |
274 | * interrupts until it is unmasked */ | 274 | * interrupts until it is unmasked */ |
275 | 275 | ||
276 | irq_desc[i].handler = &level_irq_type; | 276 | irq_desc[i].chip = &level_irq_type; |
277 | } | 277 | } |
278 | 278 | ||
279 | /* Priority level 0 */ | 279 | /* Priority level 0 */ |
@@ -282,12 +282,12 @@ void __init arch_init_irq(void) | |||
282 | /* Set int vector table address */ | 282 | /* Set int vector table address */ |
283 | PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; | 283 | PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; |
284 | 284 | ||
285 | irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type; | 285 | irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type; |
286 | setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); | 286 | setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); |
287 | 287 | ||
288 | /* init of Timer interrupts */ | 288 | /* init of Timer interrupts */ |
289 | for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) { | 289 | for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) { |
290 | irq_desc[i].handler = &level_irq_type; | 290 | irq_desc[i].chip = &level_irq_type; |
291 | } | 291 | } |
292 | 292 | ||
293 | /* Stop Timer 1-3 */ | 293 | /* Stop Timer 1-3 */ |
@@ -295,7 +295,7 @@ void __init arch_init_irq(void) | |||
295 | configPR |= 0x00000038; | 295 | configPR |= 0x00000038; |
296 | write_c0_config7(configPR); | 296 | write_c0_config7(configPR); |
297 | 297 | ||
298 | irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type; | 298 | irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type; |
299 | setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); | 299 | setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); |
300 | } | 300 | } |
301 | 301 | ||
diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c index 54b65a80abf5..fb523ebcafa8 100644 --- a/arch/mips/pmc-sierra/yosemite/ht.c +++ b/arch/mips/pmc-sierra/yosemite/ht.c | |||
@@ -383,12 +383,12 @@ void pcibios_update_resource(struct pci_dev *dev, struct resource *root, | |||
383 | 383 | ||
384 | 384 | ||
385 | void pcibios_align_resource(void *data, struct resource *res, | 385 | void pcibios_align_resource(void *data, struct resource *res, |
386 | unsigned long size, unsigned long align) | 386 | resource_size_t size, resource_size_t align) |
387 | { | 387 | { |
388 | struct pci_dev *dev = data; | 388 | struct pci_dev *dev = data; |
389 | 389 | ||
390 | if (res->flags & IORESOURCE_IO) { | 390 | if (res->flags & IORESOURCE_IO) { |
391 | unsigned long start = res->start; | 391 | resource_size_t start = res->start; |
392 | 392 | ||
393 | /* We need to avoid collisions with `mirrored' VGA ports | 393 | /* We need to avoid collisions with `mirrored' VGA ports |
394 | and other strange ISA hardware, so we always want the | 394 | and other strange ISA hardware, so we always want the |
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c index b19820110aa3..989167b49ce9 100644 --- a/arch/mips/sgi-ip22/ip22-eisa.c +++ b/arch/mips/sgi-ip22/ip22-eisa.c | |||
@@ -279,9 +279,9 @@ int __init ip22_eisa_init(void) | |||
279 | irq_desc[i].action = 0; | 279 | irq_desc[i].action = 0; |
280 | irq_desc[i].depth = 1; | 280 | irq_desc[i].depth = 1; |
281 | if (i < (SGINT_EISA + 8)) | 281 | if (i < (SGINT_EISA + 8)) |
282 | irq_desc[i].handler = &ip22_eisa1_irq_type; | 282 | irq_desc[i].chip = &ip22_eisa1_irq_type; |
283 | else | 283 | else |
284 | irq_desc[i].handler = &ip22_eisa2_irq_type; | 284 | irq_desc[i].chip = &ip22_eisa2_irq_type; |
285 | } | 285 | } |
286 | 286 | ||
287 | /* Cannot use request_irq because of kmalloc not being ready at such | 287 | /* Cannot use request_irq because of kmalloc not being ready at such |
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index fc6a7e2b189c..18906af69691 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c | |||
@@ -436,7 +436,7 @@ void __init arch_init_irq(void) | |||
436 | irq_desc[i].status = IRQ_DISABLED; | 436 | irq_desc[i].status = IRQ_DISABLED; |
437 | irq_desc[i].action = 0; | 437 | irq_desc[i].action = 0; |
438 | irq_desc[i].depth = 1; | 438 | irq_desc[i].depth = 1; |
439 | irq_desc[i].handler = handler; | 439 | irq_desc[i].chip = handler; |
440 | } | 440 | } |
441 | 441 | ||
442 | /* vector handler. this register the IRQ as non-sharable */ | 442 | /* vector handler. this register the IRQ as non-sharable */ |
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig index f14ef38646d0..5e960ae9735a 100644 --- a/arch/mips/sgi-ip27/Kconfig +++ b/arch/mips/sgi-ip27/Kconfig | |||
@@ -33,12 +33,13 @@ config MAPPED_KERNEL | |||
33 | depends on SGI_IP27 | 33 | depends on SGI_IP27 |
34 | help | 34 | help |
35 | Change the way a Linux kernel is loaded into memory on a MIPS64 | 35 | Change the way a Linux kernel is loaded into memory on a MIPS64 |
36 | machine. This is required in order to support text replication and | 36 | machine. This is required in order to support text replication on |
37 | NUMA. If you need to understand it, read the source code. | 37 | NUMA. If you need to understand it, read the source code. |
38 | 38 | ||
39 | config REPLICATE_KTEXT | 39 | config REPLICATE_KTEXT |
40 | bool "Kernel text replication support" | 40 | bool "Kernel text replication support" |
41 | depends on SGI_IP27 | 41 | depends on SGI_IP27 |
42 | select MAPPED_KERNEL | ||
42 | help | 43 | help |
43 | Say Y here to enable replicating the kernel text across multiple | 44 | Say Y here to enable replicating the kernel text across multiple |
44 | nodes in a NUMA cluster. This trades memory for speed. | 45 | nodes in a NUMA cluster. This trades memory for speed. |
diff --git a/arch/mips/sgi-ip27/Makefile b/arch/mips/sgi-ip27/Makefile index 686ba14e2882..a457263f4391 100644 --- a/arch/mips/sgi-ip27/Makefile +++ b/arch/mips/sgi-ip27/Makefile | |||
@@ -2,11 +2,12 @@ | |||
2 | # Makefile for the IP27 specific kernel interface routines under Linux. | 2 | # Makefile for the IP27 specific kernel interface routines under Linux. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := ip27-berr.o ip27-console.o ip27-irq.o ip27-init.o \ | 5 | obj-y := ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o ip27-klnuma.o \ |
6 | ip27-klconfig.o ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-reset.o \ | 6 | ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o ip27-hubio.o \ |
7 | ip27-timer.o ip27-hubio.o ip27-xtalk.o | 7 | ip27-xtalk.o |
8 | 8 | ||
9 | obj-$(CONFIG_KGDB) += ip27-dbgio.o | 9 | obj-$(CONFIG_EARLY_PRINTK) += ip27-console.o |
10 | obj-$(CONFIG_SMP) += ip27-smp.o | 10 | obj-$(CONFIG_KGDB) += ip27-dbgio.o |
11 | obj-$(CONFIG_SMP) += ip27-smp.o | ||
11 | 12 | ||
12 | EXTRA_AFLAGS := $(CFLAGS) | 13 | EXTRA_AFLAGS := $(CFLAGS) |
diff --git a/arch/mips/sgi-ip27/ip27-console.c b/arch/mips/sgi-ip27/ip27-console.c index 3e1ac299b804..14211e382374 100644 --- a/arch/mips/sgi-ip27/ip27-console.c +++ b/arch/mips/sgi-ip27/ip27-console.c | |||
@@ -46,33 +46,29 @@ void prom_putchar(char c) | |||
46 | uart->iu_thr = c; | 46 | uart->iu_thr = c; |
47 | } | 47 | } |
48 | 48 | ||
49 | char __init prom_getchar(void) | 49 | static void ioc3_console_write(struct console *con, const char *s, unsigned n) |
50 | { | 50 | { |
51 | return 0; | 51 | while (n-- && *s) { |
52 | if (*s == '\n') | ||
53 | prom_putchar('\r'); | ||
54 | prom_putchar(*s); | ||
55 | s++; | ||
56 | } | ||
52 | } | 57 | } |
53 | 58 | ||
54 | static void inline ioc3_console_probe(void) | 59 | static struct console ioc3_console = { |
55 | { | 60 | .name = "ioc3", |
56 | struct uart_port up; | 61 | .write = ioc3_console_write, |
57 | 62 | .flags = CON_PRINTBUFFER | CON_BOOT, | |
58 | /* | 63 | .index = -1 |
59 | * Register to interrupt zero because we share the interrupt with | 64 | }; |
60 | * the serial driver which we don't properly support yet. | ||
61 | */ | ||
62 | memset(&up, 0, sizeof(up)); | ||
63 | up.membase = (unsigned char *) console_uart(); | ||
64 | up.irq = 0; | ||
65 | up.uartclk = IOC3_CLK; | ||
66 | up.regshift = 0; | ||
67 | up.iotype = UPIO_MEM; | ||
68 | up.flags = IOC3_FLAGS; | ||
69 | up.line = 0; | ||
70 | 65 | ||
71 | if (early_serial_setup(&up)) | 66 | __init void ip27_setup_console(void) |
72 | printk(KERN_ERR "Early serial init of port 0 failed\n"); | 67 | { |
68 | register_console(&ioc3_console); | ||
73 | } | 69 | } |
74 | 70 | ||
75 | __init void ip27_setup_console(void) | 71 | void __init disable_early_printk(void) |
76 | { | 72 | { |
77 | ioc3_console_probe(); | 73 | unregister_console(&ioc3_console); |
78 | } | 74 | } |
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 0b61a39ce2bb..869566c360ae 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c | |||
@@ -386,7 +386,7 @@ void __devinit register_bridge_irq(unsigned int irq) | |||
386 | irq_desc[irq].status = IRQ_DISABLED; | 386 | irq_desc[irq].status = IRQ_DISABLED; |
387 | irq_desc[irq].action = 0; | 387 | irq_desc[irq].action = 0; |
388 | irq_desc[irq].depth = 1; | 388 | irq_desc[irq].depth = 1; |
389 | irq_desc[irq].handler = &bridge_irq_type; | 389 | irq_desc[irq].chip = &bridge_irq_type; |
390 | } | 390 | } |
391 | 391 | ||
392 | int __devinit request_bridge_irq(struct bridge_controller *bc) | 392 | int __devinit request_bridge_irq(struct bridge_controller *bc) |
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 8ba08047d164..00b94aaf6371 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c | |||
@@ -591,7 +591,7 @@ void __init arch_init_irq(void) | |||
591 | irq_desc[irq].status = IRQ_DISABLED; | 591 | irq_desc[irq].status = IRQ_DISABLED; |
592 | irq_desc[irq].action = 0; | 592 | irq_desc[irq].action = 0; |
593 | irq_desc[irq].depth = 0; | 593 | irq_desc[irq].depth = 0; |
594 | irq_desc[irq].handler = controller; | 594 | irq_desc[irq].chip = controller; |
595 | } | 595 | } |
596 | setup_irq(CRIME_MEMERR_IRQ, &memerr_irq); | 596 | setup_irq(CRIME_MEMERR_IRQ, &memerr_irq); |
597 | setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq); | 597 | setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq); |
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig index 816aee7fcd25..ec7a2cffacf0 100644 --- a/arch/mips/sibyte/Kconfig +++ b/arch/mips/sibyte/Kconfig | |||
@@ -3,6 +3,7 @@ config SIBYTE_SB1250 | |||
3 | select HW_HAS_PCI | 3 | select HW_HAS_PCI |
4 | select SIBYTE_HAS_LDT | 4 | select SIBYTE_HAS_LDT |
5 | select SIBYTE_SB1xxx_SOC | 5 | select SIBYTE_SB1xxx_SOC |
6 | select SYS_SUPPORTS_SMP | ||
6 | 7 | ||
7 | config SIBYTE_BCM1120 | 8 | config SIBYTE_BCM1120 |
8 | bool | 9 | bool |
@@ -30,11 +31,13 @@ config SIBYTE_BCM1x80 | |||
30 | bool | 31 | bool |
31 | select HW_HAS_PCI | 32 | select HW_HAS_PCI |
32 | select SIBYTE_SB1xxx_SOC | 33 | select SIBYTE_SB1xxx_SOC |
34 | select SYS_SUPPORTS_SMP | ||
33 | 35 | ||
34 | config SIBYTE_BCM1x55 | 36 | config SIBYTE_BCM1x55 |
35 | bool | 37 | bool |
36 | select HW_HAS_PCI | 38 | select HW_HAS_PCI |
37 | select SIBYTE_SB1xxx_SOC | 39 | select SIBYTE_SB1xxx_SOC |
40 | select SYS_SUPPORTS_SMP | ||
38 | 41 | ||
39 | config SIBYTE_SB1xxx_SOC | 42 | config SIBYTE_SB1xxx_SOC |
40 | bool | 43 | bool |
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index e61760b14d99..610df40cb820 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -276,10 +276,10 @@ void __init init_bcm1480_irqs(void) | |||
276 | irq_desc[i].action = 0; | 276 | irq_desc[i].action = 0; |
277 | irq_desc[i].depth = 1; | 277 | irq_desc[i].depth = 1; |
278 | if (i < BCM1480_NR_IRQS) { | 278 | if (i < BCM1480_NR_IRQS) { |
279 | irq_desc[i].handler = &bcm1480_irq_type; | 279 | irq_desc[i].chip = &bcm1480_irq_type; |
280 | bcm1480_irq_owner[i] = 0; | 280 | bcm1480_irq_owner[i] = 0; |
281 | } else { | 281 | } else { |
282 | irq_desc[i].handler = &no_irq_type; | 282 | irq_desc[i].chip = &no_irq_type; |
283 | } | 283 | } |
284 | } | 284 | } |
285 | } | 285 | } |
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index f853c32f60a0..fcc61940f1ff 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -246,10 +246,10 @@ void __init init_sb1250_irqs(void) | |||
246 | irq_desc[i].action = 0; | 246 | irq_desc[i].action = 0; |
247 | irq_desc[i].depth = 1; | 247 | irq_desc[i].depth = 1; |
248 | if (i < SB1250_NR_IRQS) { | 248 | if (i < SB1250_NR_IRQS) { |
249 | irq_desc[i].handler = &sb1250_irq_type; | 249 | irq_desc[i].chip = &sb1250_irq_type; |
250 | sb1250_irq_owner[i] = 0; | 250 | sb1250_irq_owner[i] = 0; |
251 | } else { | 251 | } else { |
252 | irq_desc[i].handler = &no_irq_type; | 252 | irq_desc[i].chip = &no_irq_type; |
253 | } | 253 | } |
254 | } | 254 | } |
255 | } | 255 | } |
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 7365b4853ddb..c19e158ec402 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c | |||
@@ -203,7 +203,7 @@ void __init arch_init_irq(void) | |||
203 | irq_desc[i].status = IRQ_DISABLED; | 203 | irq_desc[i].status = IRQ_DISABLED; |
204 | irq_desc[i].action = 0; | 204 | irq_desc[i].action = 0; |
205 | irq_desc[i].depth = 1; | 205 | irq_desc[i].depth = 1; |
206 | irq_desc[i].handler = &pciasic_irq_type; | 206 | irq_desc[i].chip = &pciasic_irq_type; |
207 | } | 207 | } |
208 | 208 | ||
209 | change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); | 209 | change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); |
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index 8ca68015cf40..a42be00483e6 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c | |||
@@ -227,7 +227,7 @@ static void __init tx4927_irq_cp0_init(void) | |||
227 | irq_desc[i].status = IRQ_DISABLED; | 227 | irq_desc[i].status = IRQ_DISABLED; |
228 | irq_desc[i].action = 0; | 228 | irq_desc[i].action = 0; |
229 | irq_desc[i].depth = 1; | 229 | irq_desc[i].depth = 1; |
230 | irq_desc[i].handler = &tx4927_irq_cp0_type; | 230 | irq_desc[i].chip = &tx4927_irq_cp0_type; |
231 | } | 231 | } |
232 | 232 | ||
233 | return; | 233 | return; |
@@ -435,7 +435,7 @@ static void __init tx4927_irq_pic_init(void) | |||
435 | irq_desc[i].status = IRQ_DISABLED; | 435 | irq_desc[i].status = IRQ_DISABLED; |
436 | irq_desc[i].action = 0; | 436 | irq_desc[i].action = 0; |
437 | irq_desc[i].depth = 2; | 437 | irq_desc[i].depth = 2; |
438 | irq_desc[i].handler = &tx4927_irq_pic_type; | 438 | irq_desc[i].chip = &tx4927_irq_pic_type; |
439 | } | 439 | } |
440 | 440 | ||
441 | setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); | 441 | setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); |
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index aee07ff2212a..c67978b6dae4 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c | |||
@@ -368,7 +368,7 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void) | |||
368 | irq_desc[i].status = IRQ_DISABLED; | 368 | irq_desc[i].status = IRQ_DISABLED; |
369 | irq_desc[i].action = 0; | 369 | irq_desc[i].action = 0; |
370 | irq_desc[i].depth = 3; | 370 | irq_desc[i].depth = 3; |
371 | irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type; | 371 | irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type; |
372 | } | 372 | } |
373 | 373 | ||
374 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, | 374 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, |
@@ -526,7 +526,7 @@ static void __init toshiba_rbtx4927_irq_isa_init(void) | |||
526 | irq_desc[i].action = 0; | 526 | irq_desc[i].action = 0; |
527 | irq_desc[i].depth = | 527 | irq_desc[i].depth = |
528 | ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5)); | 528 | ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5)); |
529 | irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type; | 529 | irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type; |
530 | } | 530 | } |
531 | 531 | ||
532 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, | 532 | setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, |
@@ -692,13 +692,13 @@ void toshiba_rbtx4927_irq_dump(char *key) | |||
692 | { | 692 | { |
693 | u32 i, j = 0; | 693 | u32 i, j = 0; |
694 | for (i = 0; i < NR_IRQS; i++) { | 694 | for (i = 0; i < NR_IRQS; i++) { |
695 | if (strcmp(irq_desc[i].handler->typename, "none") | 695 | if (strcmp(irq_desc[i].chip->typename, "none") |
696 | == 0) | 696 | == 0) |
697 | continue; | 697 | continue; |
698 | 698 | ||
699 | if ((i >= 1) | 699 | if ((i >= 1) |
700 | && (irq_desc[i - 1].handler->typename == | 700 | && (irq_desc[i - 1].chip->typename == |
701 | irq_desc[i].handler->typename)) { | 701 | irq_desc[i].chip->typename)) { |
702 | j++; | 702 | j++; |
703 | } else { | 703 | } else { |
704 | j = 0; | 704 | j = 0; |
@@ -707,12 +707,12 @@ void toshiba_rbtx4927_irq_dump(char *key) | |||
707 | (TOSHIBA_RBTX4927_IRQ_INFO, | 707 | (TOSHIBA_RBTX4927_IRQ_INFO, |
708 | "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n", | 708 | "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n", |
709 | key, i, i, irq_desc[i].status, | 709 | key, i, i, irq_desc[i].status, |
710 | (u32) irq_desc[i].handler, | 710 | (u32) irq_desc[i].chip, |
711 | (u32) irq_desc[i].action, | 711 | (u32) irq_desc[i].action, |
712 | (u32) (irq_desc[i].action ? irq_desc[i]. | 712 | (u32) (irq_desc[i].action ? irq_desc[i]. |
713 | action->handler : 0), | 713 | action->handler : 0), |
714 | irq_desc[i].depth, | 714 | irq_desc[i].depth, |
715 | irq_desc[i].handler->typename, j); | 715 | irq_desc[i].chip->typename, j); |
716 | } | 716 | } |
717 | } | 717 | } |
718 | #endif | 718 | #endif |
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c index 873805178d8e..0b2f8c849218 100644 --- a/arch/mips/tx4938/common/irq.c +++ b/arch/mips/tx4938/common/irq.c | |||
@@ -102,7 +102,7 @@ tx4938_irq_cp0_init(void) | |||
102 | irq_desc[i].status = IRQ_DISABLED; | 102 | irq_desc[i].status = IRQ_DISABLED; |
103 | irq_desc[i].action = 0; | 103 | irq_desc[i].action = 0; |
104 | irq_desc[i].depth = 1; | 104 | irq_desc[i].depth = 1; |
105 | irq_desc[i].handler = &tx4938_irq_cp0_type; | 105 | irq_desc[i].chip = &tx4938_irq_cp0_type; |
106 | } | 106 | } |
107 | 107 | ||
108 | return; | 108 | return; |
@@ -306,7 +306,7 @@ tx4938_irq_pic_init(void) | |||
306 | irq_desc[i].status = IRQ_DISABLED; | 306 | irq_desc[i].status = IRQ_DISABLED; |
307 | irq_desc[i].action = 0; | 307 | irq_desc[i].action = 0; |
308 | irq_desc[i].depth = 2; | 308 | irq_desc[i].depth = 2; |
309 | irq_desc[i].handler = &tx4938_irq_pic_type; | 309 | irq_desc[i].chip = &tx4938_irq_pic_type; |
310 | } | 310 | } |
311 | 311 | ||
312 | setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); | 312 | setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); |
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c index 9cd9c0fe2265..3b8245dc5bd3 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c | |||
@@ -146,7 +146,7 @@ toshiba_rbtx4938_irq_ioc_init(void) | |||
146 | irq_desc[i].status = IRQ_DISABLED; | 146 | irq_desc[i].status = IRQ_DISABLED; |
147 | irq_desc[i].action = 0; | 147 | irq_desc[i].action = 0; |
148 | irq_desc[i].depth = 3; | 148 | irq_desc[i].depth = 3; |
149 | irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type; | 149 | irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type; |
150 | } | 150 | } |
151 | 151 | ||
152 | setup_irq(RBTX4938_IRQ_IOCINT, | 152 | setup_irq(RBTX4938_IRQ_IOCINT, |
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 07ae19cf0c29..b9323302cc4e 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -722,10 +722,10 @@ static int __init vr41xx_icu_init(void) | |||
722 | icu2_write(MGIUINTHREG, 0xffff); | 722 | icu2_write(MGIUINTHREG, 0xffff); |
723 | 723 | ||
724 | for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) | 724 | for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) |
725 | irq_desc[i].handler = &sysint1_irq_type; | 725 | irq_desc[i].chip = &sysint1_irq_type; |
726 | 726 | ||
727 | for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) | 727 | for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) |
728 | irq_desc[i].handler = &sysint2_irq_type; | 728 | irq_desc[i].chip = &sysint2_irq_type; |
729 | 729 | ||
730 | cascade_irq(INT0_IRQ, icu_get_irq); | 730 | cascade_irq(INT0_IRQ, icu_get_irq); |
731 | cascade_irq(INT1_IRQ, icu_get_irq); | 731 | cascade_irq(INT1_IRQ, icu_get_irq); |
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 86796bb63c3c..66aa50802deb 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c | |||
@@ -73,13 +73,13 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs) | |||
73 | if (cascade->get_irq != NULL) { | 73 | if (cascade->get_irq != NULL) { |
74 | unsigned int source_irq = irq; | 74 | unsigned int source_irq = irq; |
75 | desc = irq_desc + source_irq; | 75 | desc = irq_desc + source_irq; |
76 | desc->handler->ack(source_irq); | 76 | desc->chip->ack(source_irq); |
77 | irq = cascade->get_irq(irq, regs); | 77 | irq = cascade->get_irq(irq, regs); |
78 | if (irq < 0) | 78 | if (irq < 0) |
79 | atomic_inc(&irq_err_count); | 79 | atomic_inc(&irq_err_count); |
80 | else | 80 | else |
81 | irq_dispatch(irq, regs); | 81 | irq_dispatch(irq, regs); |
82 | desc->handler->end(source_irq); | 82 | desc->chip->end(source_irq); |
83 | } else | 83 | } else |
84 | do_IRQ(irq, regs); | 84 | do_IRQ(irq, regs); |
85 | } | 85 | } |
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c index 3e31f8193d21..2d287b8893d9 100644 --- a/arch/mips/vr41xx/common/vrc4173.c +++ b/arch/mips/vr41xx/common/vrc4173.c | |||
@@ -483,7 +483,7 @@ static inline int vrc4173_icu_init(int cascade_irq) | |||
483 | vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); | 483 | vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); |
484 | 484 | ||
485 | for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) | 485 | for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) |
486 | irq_desc[i].handler = &vrc4173_irq_type; | 486 | irq_desc[i].chip = &vrc4173_irq_type; |
487 | 487 | ||
488 | return 0; | 488 | return 0; |
489 | } | 489 | } |
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c index 31db6b61a39e..7b2511ca0a61 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c | |||
@@ -104,7 +104,7 @@ void __init rockhopper_init_irq(void) | |||
104 | } | 104 | } |
105 | 105 | ||
106 | for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) | 106 | for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) |
107 | irq_desc[i].handler = &i8259_irq_type; | 107 | irq_desc[i].chip = &i8259_irq_type; |
108 | 108 | ||
109 | setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); | 109 | setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); |
110 | 110 | ||
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 910fb3afc0b5..6dd0ea8f88e0 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig | |||
@@ -51,6 +51,10 @@ config GENERIC_HARDIRQS | |||
51 | config GENERIC_IRQ_PROBE | 51 | config GENERIC_IRQ_PROBE |
52 | def_bool y | 52 | def_bool y |
53 | 53 | ||
54 | config IRQ_PER_CPU | ||
55 | bool | ||
56 | default y | ||
57 | |||
54 | # unless you want to implement ACPI on PA-RISC ... ;-) | 58 | # unless you want to implement ACPI on PA-RISC ... ;-) |
55 | config PM | 59 | config PM |
56 | bool | 60 | bool |
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c index c057ad7605ba..bc7c4a4e26a1 100644 --- a/arch/parisc/kernel/cache.c +++ b/arch/parisc/kernel/cache.c | |||
@@ -97,15 +97,17 @@ update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) | |||
97 | void | 97 | void |
98 | show_cache_info(struct seq_file *m) | 98 | show_cache_info(struct seq_file *m) |
99 | { | 99 | { |
100 | char buf[32]; | ||
101 | |||
100 | seq_printf(m, "I-cache\t\t: %ld KB\n", | 102 | seq_printf(m, "I-cache\t\t: %ld KB\n", |
101 | cache_info.ic_size/1024 ); | 103 | cache_info.ic_size/1024 ); |
102 | seq_printf(m, "D-cache\t\t: %ld KB (%s%s, %d-way associative)\n", | 104 | if (cache_info.dc_loop == 1) |
105 | snprintf(buf, 32, "%lu-way associative", cache_info.dc_loop); | ||
106 | seq_printf(m, "D-cache\t\t: %ld KB (%s%s, %s)\n", | ||
103 | cache_info.dc_size/1024, | 107 | cache_info.dc_size/1024, |
104 | (cache_info.dc_conf.cc_wt ? "WT":"WB"), | 108 | (cache_info.dc_conf.cc_wt ? "WT":"WB"), |
105 | (cache_info.dc_conf.cc_sh ? ", shared I/D":""), | 109 | (cache_info.dc_conf.cc_sh ? ", shared I/D":""), |
106 | (cache_info.dc_conf.cc_assoc) | 110 | ((cache_info.dc_loop == 1) ? "direct mapped" : buf)); |
107 | ); | ||
108 | |||
109 | seq_printf(m, "ITLB entries\t: %ld\n" "DTLB entries\t: %ld%s\n", | 111 | seq_printf(m, "ITLB entries\t: %ld\n" "DTLB entries\t: %ld%s\n", |
110 | cache_info.it_size, | 112 | cache_info.it_size, |
111 | cache_info.dt_size, | 113 | cache_info.dt_size, |
@@ -158,11 +160,11 @@ parisc_cache_init(void) | |||
158 | cache_info.dc_conf.cc_block, | 160 | cache_info.dc_conf.cc_block, |
159 | cache_info.dc_conf.cc_line, | 161 | cache_info.dc_conf.cc_line, |
160 | cache_info.dc_conf.cc_shift); | 162 | cache_info.dc_conf.cc_shift); |
161 | printk(" wt %d sh %d cst %d assoc %d\n", | 163 | printk(" wt %d sh %d cst %d hv %d\n", |
162 | cache_info.dc_conf.cc_wt, | 164 | cache_info.dc_conf.cc_wt, |
163 | cache_info.dc_conf.cc_sh, | 165 | cache_info.dc_conf.cc_sh, |
164 | cache_info.dc_conf.cc_cst, | 166 | cache_info.dc_conf.cc_cst, |
165 | cache_info.dc_conf.cc_assoc); | 167 | cache_info.dc_conf.cc_hv); |
166 | 168 | ||
167 | printk("IC base 0x%lx stride 0x%lx count 0x%lx loop 0x%lx\n", | 169 | printk("IC base 0x%lx stride 0x%lx count 0x%lx loop 0x%lx\n", |
168 | cache_info.ic_base, | 170 | cache_info.ic_base, |
@@ -176,11 +178,11 @@ parisc_cache_init(void) | |||
176 | cache_info.ic_conf.cc_block, | 178 | cache_info.ic_conf.cc_block, |
177 | cache_info.ic_conf.cc_line, | 179 | cache_info.ic_conf.cc_line, |
178 | cache_info.ic_conf.cc_shift); | 180 | cache_info.ic_conf.cc_shift); |
179 | printk(" wt %d sh %d cst %d assoc %d\n", | 181 | printk(" wt %d sh %d cst %d hv %d\n", |
180 | cache_info.ic_conf.cc_wt, | 182 | cache_info.ic_conf.cc_wt, |
181 | cache_info.ic_conf.cc_sh, | 183 | cache_info.ic_conf.cc_sh, |
182 | cache_info.ic_conf.cc_cst, | 184 | cache_info.ic_conf.cc_cst, |
183 | cache_info.ic_conf.cc_assoc); | 185 | cache_info.ic_conf.cc_hv); |
184 | 186 | ||
185 | printk("D-TLB conf: sh %d page %d cst %d aid %d pad1 %d \n", | 187 | printk("D-TLB conf: sh %d page %d cst %d aid %d pad1 %d \n", |
186 | cache_info.dt_conf.tc_sh, | 188 | cache_info.dt_conf.tc_sh, |
@@ -234,7 +236,8 @@ parisc_cache_init(void) | |||
234 | 236 | ||
235 | void disable_sr_hashing(void) | 237 | void disable_sr_hashing(void) |
236 | { | 238 | { |
237 | int srhash_type; | 239 | int srhash_type, retval; |
240 | unsigned long space_bits; | ||
238 | 241 | ||
239 | switch (boot_cpu_data.cpu_type) { | 242 | switch (boot_cpu_data.cpu_type) { |
240 | case pcx: /* We shouldn't get this far. setup.c should prevent it. */ | 243 | case pcx: /* We shouldn't get this far. setup.c should prevent it. */ |
@@ -260,6 +263,13 @@ void disable_sr_hashing(void) | |||
260 | } | 263 | } |
261 | 264 | ||
262 | disable_sr_hashing_asm(srhash_type); | 265 | disable_sr_hashing_asm(srhash_type); |
266 | |||
267 | retval = pdc_spaceid_bits(&space_bits); | ||
268 | /* If this procedure isn't implemented, don't panic. */ | ||
269 | if (retval < 0 && retval != PDC_BAD_OPTION) | ||
270 | panic("pdc_spaceid_bits call failed.\n"); | ||
271 | if (space_bits != 0) | ||
272 | panic("SpaceID hashing is still on!\n"); | ||
263 | } | 273 | } |
264 | 274 | ||
265 | void flush_dcache_page(struct page *page) | 275 | void flush_dcache_page(struct page *page) |
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index d9e53cf0372b..630730c32a5a 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S | |||
@@ -1638,7 +1638,7 @@ dbit_trap_20w: | |||
1638 | load32 PA(pa_dbit_lock),t0 | 1638 | load32 PA(pa_dbit_lock),t0 |
1639 | 1639 | ||
1640 | dbit_spin_20w: | 1640 | dbit_spin_20w: |
1641 | ldcw 0(t0),t1 | 1641 | LDCW 0(t0),t1 |
1642 | cmpib,= 0,t1,dbit_spin_20w | 1642 | cmpib,= 0,t1,dbit_spin_20w |
1643 | nop | 1643 | nop |
1644 | 1644 | ||
@@ -1674,7 +1674,7 @@ dbit_trap_11: | |||
1674 | load32 PA(pa_dbit_lock),t0 | 1674 | load32 PA(pa_dbit_lock),t0 |
1675 | 1675 | ||
1676 | dbit_spin_11: | 1676 | dbit_spin_11: |
1677 | ldcw 0(t0),t1 | 1677 | LDCW 0(t0),t1 |
1678 | cmpib,= 0,t1,dbit_spin_11 | 1678 | cmpib,= 0,t1,dbit_spin_11 |
1679 | nop | 1679 | nop |
1680 | 1680 | ||
@@ -1714,7 +1714,7 @@ dbit_trap_20: | |||
1714 | load32 PA(pa_dbit_lock),t0 | 1714 | load32 PA(pa_dbit_lock),t0 |
1715 | 1715 | ||
1716 | dbit_spin_20: | 1716 | dbit_spin_20: |
1717 | ldcw 0(t0),t1 | 1717 | LDCW 0(t0),t1 |
1718 | cmpib,= 0,t1,dbit_spin_20 | 1718 | cmpib,= 0,t1,dbit_spin_20 |
1719 | nop | 1719 | nop |
1720 | 1720 | ||
diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c index 2dc06b8e1817..4398d2a95789 100644 --- a/arch/parisc/kernel/firmware.c +++ b/arch/parisc/kernel/firmware.c | |||
@@ -11,7 +11,7 @@ | |||
11 | * Copyright 1999 The Puffin Group, (Alex deVries, David Kennedy) | 11 | * Copyright 1999 The Puffin Group, (Alex deVries, David Kennedy) |
12 | * Copyright 2003 Grant Grundler <grundler parisc-linux org> | 12 | * Copyright 2003 Grant Grundler <grundler parisc-linux org> |
13 | * Copyright 2003,2004 Ryan Bradetich <rbrad@parisc-linux.org> | 13 | * Copyright 2003,2004 Ryan Bradetich <rbrad@parisc-linux.org> |
14 | * Copyright 2004 Thibaut VARENE <varenet@parisc-linux.org> | 14 | * Copyright 2004,2006 Thibaut VARENE <varenet@parisc-linux.org> |
15 | * | 15 | * |
16 | * This program is free software; you can redistribute it and/or modify | 16 | * This program is free software; you can redistribute it and/or modify |
17 | * it under the terms of the GNU General Public License as published by | 17 | * it under the terms of the GNU General Public License as published by |
@@ -252,10 +252,8 @@ int pdc_pat_chassis_send_log(unsigned long state, unsigned long data) | |||
252 | #endif | 252 | #endif |
253 | 253 | ||
254 | /** | 254 | /** |
255 | * pdc_chassis_disp - Updates display | 255 | * pdc_chassis_disp - Updates chassis code |
256 | * @retval: -1 on error, 0 on success | 256 | * @retval: -1 on error, 0 on success |
257 | * | ||
258 | * Works on old PDC only (E class, others?) | ||
259 | */ | 257 | */ |
260 | int pdc_chassis_disp(unsigned long disp) | 258 | int pdc_chassis_disp(unsigned long disp) |
261 | { | 259 | { |
@@ -269,6 +267,22 @@ int pdc_chassis_disp(unsigned long disp) | |||
269 | } | 267 | } |
270 | 268 | ||
271 | /** | 269 | /** |
270 | * pdc_chassis_warn - Fetches chassis warnings | ||
271 | * @retval: -1 on error, 0 on success | ||
272 | */ | ||
273 | int pdc_chassis_warn(unsigned long *warn) | ||
274 | { | ||
275 | int retval = 0; | ||
276 | |||
277 | spin_lock_irq(&pdc_lock); | ||
278 | retval = mem_pdc_call(PDC_CHASSIS, PDC_CHASSIS_WARN, __pa(pdc_result)); | ||
279 | *warn = pdc_result[0]; | ||
280 | spin_unlock_irq(&pdc_lock); | ||
281 | |||
282 | return retval; | ||
283 | } | ||
284 | |||
285 | /** | ||
272 | * pdc_coproc_cfg - To identify coprocessors attached to the processor. | 286 | * pdc_coproc_cfg - To identify coprocessors attached to the processor. |
273 | * @pdc_coproc_info: Return buffer address. | 287 | * @pdc_coproc_info: Return buffer address. |
274 | * | 288 | * |
@@ -393,7 +407,9 @@ int pdc_model_info(struct pdc_model *model) | |||
393 | * pdc_model_sysmodel - Get the system model name. | 407 | * pdc_model_sysmodel - Get the system model name. |
394 | * @name: A char array of at least 81 characters. | 408 | * @name: A char array of at least 81 characters. |
395 | * | 409 | * |
396 | * Get system model name from PDC ROM (e.g. 9000/715 or 9000/778/B160L) | 410 | * Get system model name from PDC ROM (e.g. 9000/715 or 9000/778/B160L). |
411 | * Using OS_ID_HPUX will return the equivalent of the 'modelname' command | ||
412 | * on HP/UX. | ||
397 | */ | 413 | */ |
398 | int pdc_model_sysmodel(char *name) | 414 | int pdc_model_sysmodel(char *name) |
399 | { | 415 | { |
@@ -498,6 +514,26 @@ int pdc_cache_info(struct pdc_cache_info *cache_info) | |||
498 | return retval; | 514 | return retval; |
499 | } | 515 | } |
500 | 516 | ||
517 | /** | ||
518 | * pdc_spaceid_bits - Return whether Space ID hashing is turned on. | ||
519 | * @space_bits: Should be 0, if not, bad mojo! | ||
520 | * | ||
521 | * Returns information about Space ID hashing. | ||
522 | */ | ||
523 | int pdc_spaceid_bits(unsigned long *space_bits) | ||
524 | { | ||
525 | int retval; | ||
526 | |||
527 | spin_lock_irq(&pdc_lock); | ||
528 | pdc_result[0] = 0; | ||
529 | retval = mem_pdc_call(PDC_CACHE, PDC_CACHE_RET_SPID, __pa(pdc_result), 0); | ||
530 | convert_to_wide(pdc_result); | ||
531 | *space_bits = pdc_result[0]; | ||
532 | spin_unlock_irq(&pdc_lock); | ||
533 | |||
534 | return retval; | ||
535 | } | ||
536 | |||
501 | #ifndef CONFIG_PA20 | 537 | #ifndef CONFIG_PA20 |
502 | /** | 538 | /** |
503 | * pdc_btlb_info - Return block TLB information. | 539 | * pdc_btlb_info - Return block TLB information. |
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 197936d9359a..82fe6ba29727 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c | |||
@@ -94,7 +94,7 @@ int cpu_check_affinity(unsigned int irq, cpumask_t *dest) | |||
94 | if (irq == TIMER_IRQ || irq == IPI_IRQ) { | 94 | if (irq == TIMER_IRQ || irq == IPI_IRQ) { |
95 | /* Bad linux design decision. The mask has already | 95 | /* Bad linux design decision. The mask has already |
96 | * been set; we must reset it */ | 96 | * been set; we must reset it */ |
97 | irq_affinity[irq] = CPU_MASK_ALL; | 97 | irq_desc[irq].affinity = CPU_MASK_ALL; |
98 | return -EINVAL; | 98 | return -EINVAL; |
99 | } | 99 | } |
100 | 100 | ||
@@ -110,7 +110,7 @@ static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest) | |||
110 | if (cpu_check_affinity(irq, &dest)) | 110 | if (cpu_check_affinity(irq, &dest)) |
111 | return; | 111 | return; |
112 | 112 | ||
113 | irq_affinity[irq] = dest; | 113 | irq_desc[irq].affinity = dest; |
114 | } | 114 | } |
115 | #endif | 115 | #endif |
116 | 116 | ||
@@ -125,6 +125,10 @@ static struct hw_interrupt_type cpu_interrupt_type = { | |||
125 | #ifdef CONFIG_SMP | 125 | #ifdef CONFIG_SMP |
126 | .set_affinity = cpu_set_affinity_irq, | 126 | .set_affinity = cpu_set_affinity_irq, |
127 | #endif | 127 | #endif |
128 | /* XXX: Needs to be written. We managed without it so far, but | ||
129 | * we really ought to write it. | ||
130 | */ | ||
131 | .retrigger = NULL, | ||
128 | }; | 132 | }; |
129 | 133 | ||
130 | int show_interrupts(struct seq_file *p, void *v) | 134 | int show_interrupts(struct seq_file *p, void *v) |
@@ -158,7 +162,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
158 | seq_printf(p, "%10u ", kstat_irqs(i)); | 162 | seq_printf(p, "%10u ", kstat_irqs(i)); |
159 | #endif | 163 | #endif |
160 | 164 | ||
161 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 165 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
162 | #ifndef PARISC_IRQ_CR16_COUNTS | 166 | #ifndef PARISC_IRQ_CR16_COUNTS |
163 | seq_printf(p, " %s", action->name); | 167 | seq_printf(p, " %s", action->name); |
164 | 168 | ||
@@ -210,12 +214,12 @@ int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *type, void *data) | |||
210 | { | 214 | { |
211 | if (irq_desc[irq].action) | 215 | if (irq_desc[irq].action) |
212 | return -EBUSY; | 216 | return -EBUSY; |
213 | if (irq_desc[irq].handler != &cpu_interrupt_type) | 217 | if (irq_desc[irq].chip != &cpu_interrupt_type) |
214 | return -EBUSY; | 218 | return -EBUSY; |
215 | 219 | ||
216 | if (type) { | 220 | if (type) { |
217 | irq_desc[irq].handler = type; | 221 | irq_desc[irq].chip = type; |
218 | irq_desc[irq].handler_data = data; | 222 | irq_desc[irq].chip_data = data; |
219 | cpu_interrupt_type.enable(irq); | 223 | cpu_interrupt_type.enable(irq); |
220 | } | 224 | } |
221 | return 0; | 225 | return 0; |
@@ -265,7 +269,7 @@ int txn_alloc_irq(unsigned int bits_wide) | |||
265 | unsigned long txn_affinity_addr(unsigned int irq, int cpu) | 269 | unsigned long txn_affinity_addr(unsigned int irq, int cpu) |
266 | { | 270 | { |
267 | #ifdef CONFIG_SMP | 271 | #ifdef CONFIG_SMP |
268 | irq_affinity[irq] = cpumask_of_cpu(cpu); | 272 | irq_desc[irq].affinity = cpumask_of_cpu(cpu); |
269 | #endif | 273 | #endif |
270 | 274 | ||
271 | return cpu_data[cpu].txn_addr; | 275 | return cpu_data[cpu].txn_addr; |
@@ -326,7 +330,7 @@ void do_cpu_irq_mask(struct pt_regs *regs) | |||
326 | /* Work our way from MSb to LSb...same order we alloc EIRs */ | 330 | /* Work our way from MSb to LSb...same order we alloc EIRs */ |
327 | for (irq = TIMER_IRQ; eirr_val && bit; bit>>=1, irq++) { | 331 | for (irq = TIMER_IRQ; eirr_val && bit; bit>>=1, irq++) { |
328 | #ifdef CONFIG_SMP | 332 | #ifdef CONFIG_SMP |
329 | cpumask_t dest = irq_affinity[irq]; | 333 | cpumask_t dest = irq_desc[irq].affinity; |
330 | #endif | 334 | #endif |
331 | if (!(bit & eirr_val)) | 335 | if (!(bit & eirr_val)) |
332 | continue; | 336 | continue; |
@@ -378,7 +382,7 @@ static void claim_cpu_irqs(void) | |||
378 | { | 382 | { |
379 | int i; | 383 | int i; |
380 | for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { | 384 | for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { |
381 | irq_desc[i].handler = &cpu_interrupt_type; | 385 | irq_desc[i].chip = &cpu_interrupt_type; |
382 | } | 386 | } |
383 | 387 | ||
384 | irq_desc[TIMER_IRQ].action = &timer_action; | 388 | irq_desc[TIMER_IRQ].action = &timer_action; |
@@ -404,13 +408,6 @@ void __init init_IRQ(void) | |||
404 | 408 | ||
405 | } | 409 | } |
406 | 410 | ||
407 | void hw_resend_irq(struct hw_interrupt_type *type, unsigned int irq) | ||
408 | { | ||
409 | /* XXX: Needs to be written. We managed without it so far, but | ||
410 | * we really ought to write it. | ||
411 | */ | ||
412 | } | ||
413 | |||
414 | void ack_bad_irq(unsigned int irq) | 411 | void ack_bad_irq(unsigned int irq) |
415 | { | 412 | { |
416 | printk("unexpected IRQ %d\n", irq); | 413 | printk("unexpected IRQ %d\n", irq); |
diff --git a/arch/parisc/kernel/module.c b/arch/parisc/kernel/module.c index f27cfe4771b8..aee311884f3f 100644 --- a/arch/parisc/kernel/module.c +++ b/arch/parisc/kernel/module.c | |||
@@ -89,6 +89,12 @@ static inline int is_local(struct module *me, void *loc) | |||
89 | return is_init(me, loc) || is_core(me, loc); | 89 | return is_init(me, loc) || is_core(me, loc); |
90 | } | 90 | } |
91 | 91 | ||
92 | static inline int is_local_section(struct module *me, void *loc, void *dot) | ||
93 | { | ||
94 | return (is_init(me, loc) && is_init(me, dot)) || | ||
95 | (is_core(me, loc) && is_core(me, dot)); | ||
96 | } | ||
97 | |||
92 | 98 | ||
93 | #ifndef __LP64__ | 99 | #ifndef __LP64__ |
94 | struct got_entry { | 100 | struct got_entry { |
@@ -364,8 +370,14 @@ static Elf_Addr get_fdesc(struct module *me, unsigned long value) | |||
364 | } | 370 | } |
365 | #endif /* __LP64__ */ | 371 | #endif /* __LP64__ */ |
366 | 372 | ||
373 | enum elf_stub_type { | ||
374 | ELF_STUB_GOT, | ||
375 | ELF_STUB_MILLI, | ||
376 | ELF_STUB_DIRECT, | ||
377 | }; | ||
378 | |||
367 | static Elf_Addr get_stub(struct module *me, unsigned long value, long addend, | 379 | static Elf_Addr get_stub(struct module *me, unsigned long value, long addend, |
368 | int millicode, int init_section) | 380 | enum elf_stub_type stub_type, int init_section) |
369 | { | 381 | { |
370 | unsigned long i; | 382 | unsigned long i; |
371 | struct stub_entry *stub; | 383 | struct stub_entry *stub; |
@@ -396,7 +408,7 @@ static Elf_Addr get_stub(struct module *me, unsigned long value, long addend, | |||
396 | stub->insns[1] |= reassemble_17(rrsel(value, addend) / 4); | 408 | stub->insns[1] |= reassemble_17(rrsel(value, addend) / 4); |
397 | 409 | ||
398 | #else | 410 | #else |
399 | /* for 64-bit we have two kinds of stubs: | 411 | /* for 64-bit we have three kinds of stubs: |
400 | * for normal function calls: | 412 | * for normal function calls: |
401 | * ldd 0(%dp),%dp | 413 | * ldd 0(%dp),%dp |
402 | * ldd 10(%dp), %r1 | 414 | * ldd 10(%dp), %r1 |
@@ -408,18 +420,23 @@ static Elf_Addr get_stub(struct module *me, unsigned long value, long addend, | |||
408 | * ldo 0(%r1), %r1 | 420 | * ldo 0(%r1), %r1 |
409 | * ldd 10(%r1), %r1 | 421 | * ldd 10(%r1), %r1 |
410 | * bve,n (%r1) | 422 | * bve,n (%r1) |
423 | * | ||
424 | * for direct branches (jumps between different section of the | ||
425 | * same module): | ||
426 | * ldil 0, %r1 | ||
427 | * ldo 0(%r1), %r1 | ||
428 | * bve,n (%r1) | ||
411 | */ | 429 | */ |
412 | if (!millicode) | 430 | switch (stub_type) { |
413 | { | 431 | case ELF_STUB_GOT: |
414 | stub->insns[0] = 0x537b0000; /* ldd 0(%dp),%dp */ | 432 | stub->insns[0] = 0x537b0000; /* ldd 0(%dp),%dp */ |
415 | stub->insns[1] = 0x53610020; /* ldd 10(%dp),%r1 */ | 433 | stub->insns[1] = 0x53610020; /* ldd 10(%dp),%r1 */ |
416 | stub->insns[2] = 0xe820d000; /* bve (%r1) */ | 434 | stub->insns[2] = 0xe820d000; /* bve (%r1) */ |
417 | stub->insns[3] = 0x537b0030; /* ldd 18(%dp),%dp */ | 435 | stub->insns[3] = 0x537b0030; /* ldd 18(%dp),%dp */ |
418 | 436 | ||
419 | stub->insns[0] |= reassemble_14(get_got(me, value, addend) & 0x3fff); | 437 | stub->insns[0] |= reassemble_14(get_got(me, value, addend) & 0x3fff); |
420 | } | 438 | break; |
421 | else | 439 | case ELF_STUB_MILLI: |
422 | { | ||
423 | stub->insns[0] = 0x20200000; /* ldil 0,%r1 */ | 440 | stub->insns[0] = 0x20200000; /* ldil 0,%r1 */ |
424 | stub->insns[1] = 0x34210000; /* ldo 0(%r1), %r1 */ | 441 | stub->insns[1] = 0x34210000; /* ldo 0(%r1), %r1 */ |
425 | stub->insns[2] = 0x50210020; /* ldd 10(%r1),%r1 */ | 442 | stub->insns[2] = 0x50210020; /* ldd 10(%r1),%r1 */ |
@@ -427,7 +444,17 @@ static Elf_Addr get_stub(struct module *me, unsigned long value, long addend, | |||
427 | 444 | ||
428 | stub->insns[0] |= reassemble_21(lrsel(value, addend)); | 445 | stub->insns[0] |= reassemble_21(lrsel(value, addend)); |
429 | stub->insns[1] |= reassemble_14(rrsel(value, addend)); | 446 | stub->insns[1] |= reassemble_14(rrsel(value, addend)); |
447 | break; | ||
448 | case ELF_STUB_DIRECT: | ||
449 | stub->insns[0] = 0x20200000; /* ldil 0,%r1 */ | ||
450 | stub->insns[1] = 0x34210000; /* ldo 0(%r1), %r1 */ | ||
451 | stub->insns[2] = 0xe820d002; /* bve,n (%r1) */ | ||
452 | |||
453 | stub->insns[0] |= reassemble_21(lrsel(value, addend)); | ||
454 | stub->insns[1] |= reassemble_14(rrsel(value, addend)); | ||
455 | break; | ||
430 | } | 456 | } |
457 | |||
431 | #endif | 458 | #endif |
432 | 459 | ||
433 | return (Elf_Addr)stub; | 460 | return (Elf_Addr)stub; |
@@ -539,14 +566,14 @@ int apply_relocate_add(Elf_Shdr *sechdrs, | |||
539 | break; | 566 | break; |
540 | case R_PARISC_PCREL17F: | 567 | case R_PARISC_PCREL17F: |
541 | /* 17-bit PC relative address */ | 568 | /* 17-bit PC relative address */ |
542 | val = get_stub(me, val, addend, 0, is_init(me, loc)); | 569 | val = get_stub(me, val, addend, ELF_STUB_GOT, is_init(me, loc)); |
543 | val = (val - dot - 8)/4; | 570 | val = (val - dot - 8)/4; |
544 | CHECK_RELOC(val, 17) | 571 | CHECK_RELOC(val, 17) |
545 | *loc = (*loc & ~0x1f1ffd) | reassemble_17(val); | 572 | *loc = (*loc & ~0x1f1ffd) | reassemble_17(val); |
546 | break; | 573 | break; |
547 | case R_PARISC_PCREL22F: | 574 | case R_PARISC_PCREL22F: |
548 | /* 22-bit PC relative address; only defined for pa20 */ | 575 | /* 22-bit PC relative address; only defined for pa20 */ |
549 | val = get_stub(me, val, addend, 0, is_init(me, loc)); | 576 | val = get_stub(me, val, addend, ELF_STUB_GOT, is_init(me, loc)); |
550 | DEBUGP("STUB FOR %s loc %lx+%lx at %lx\n", | 577 | DEBUGP("STUB FOR %s loc %lx+%lx at %lx\n", |
551 | strtab + sym->st_name, (unsigned long)loc, addend, | 578 | strtab + sym->st_name, (unsigned long)loc, addend, |
552 | val) | 579 | val) |
@@ -643,13 +670,23 @@ int apply_relocate_add(Elf_Shdr *sechdrs, | |||
643 | strtab + sym->st_name, | 670 | strtab + sym->st_name, |
644 | loc, val); | 671 | loc, val); |
645 | /* can we reach it locally? */ | 672 | /* can we reach it locally? */ |
646 | if(!is_local(me, (void *)val)) { | 673 | if(!is_local_section(me, (void *)val, (void *)dot)) { |
647 | if (strncmp(strtab + sym->st_name, "$$", 2) | 674 | |
675 | if (is_local(me, (void *)val)) | ||
676 | /* this is the case where the | ||
677 | * symbol is local to the | ||
678 | * module, but in a different | ||
679 | * section, so stub the jump | ||
680 | * in case it's more than 22 | ||
681 | * bits away */ | ||
682 | val = get_stub(me, val, addend, ELF_STUB_DIRECT, | ||
683 | is_init(me, loc)); | ||
684 | else if (strncmp(strtab + sym->st_name, "$$", 2) | ||
648 | == 0) | 685 | == 0) |
649 | val = get_stub(me, val, addend, 1, | 686 | val = get_stub(me, val, addend, ELF_STUB_MILLI, |
650 | is_init(me, loc)); | 687 | is_init(me, loc)); |
651 | else | 688 | else |
652 | val = get_stub(me, val, addend, 0, | 689 | val = get_stub(me, val, addend, ELF_STUB_GOT, |
653 | is_init(me, loc)); | 690 | is_init(me, loc)); |
654 | } | 691 | } |
655 | DEBUGP("STUB FOR %s loc %lx, val %lx+%lx at %lx\n", | 692 | DEBUGP("STUB FOR %s loc %lx, val %lx+%lx at %lx\n", |
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 79c7db2705fd..7d6967ee367c 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c | |||
@@ -289,7 +289,7 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); | |||
289 | * than res->start. | 289 | * than res->start. |
290 | */ | 290 | */ |
291 | void pcibios_align_resource(void *data, struct resource *res, | 291 | void pcibios_align_resource(void *data, struct resource *res, |
292 | unsigned long size, unsigned long alignment) | 292 | resource_size_t size, resource_size_t alignment) |
293 | { | 293 | { |
294 | unsigned long mask, align; | 294 | unsigned long mask, align; |
295 | 295 | ||
diff --git a/arch/parisc/kernel/pdc_chassis.c b/arch/parisc/kernel/pdc_chassis.c index a45e2e2ffd9f..d47ba1aa8253 100644 --- a/arch/parisc/kernel/pdc_chassis.c +++ b/arch/parisc/kernel/pdc_chassis.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * interfaces to log Chassis Codes via PDC (firmware) | 2 | * interfaces to Chassis Codes via PDC (firmware) |
3 | * | 3 | * |
4 | * Copyright (C) 2002 Laurent Canet <canetl@esiee.fr> | 4 | * Copyright (C) 2002 Laurent Canet <canetl@esiee.fr> |
5 | * Copyright (C) 2002-2004 Thibaut VARENE <varenet@parisc-linux.org> | 5 | * Copyright (C) 2002-2006 Thibaut VARENE <varenet@parisc-linux.org> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License, version 2, as | 8 | * it under the terms of the GNU General Public License, version 2, as |
@@ -16,6 +16,10 @@ | |||
16 | * You should have received a copy of the GNU General Public License | 16 | * You should have received a copy of the GNU General Public License |
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | * | ||
20 | * TODO: poll chassis warns, trigger (configurable) machine shutdown when | ||
21 | * needed. | ||
22 | * Find out how to get Chassis warnings out of PAT boxes? | ||
19 | */ | 23 | */ |
20 | 24 | ||
21 | #undef PDC_CHASSIS_DEBUG | 25 | #undef PDC_CHASSIS_DEBUG |
@@ -30,15 +34,16 @@ | |||
30 | #include <linux/reboot.h> | 34 | #include <linux/reboot.h> |
31 | #include <linux/notifier.h> | 35 | #include <linux/notifier.h> |
32 | #include <linux/cache.h> | 36 | #include <linux/cache.h> |
37 | #include <linux/proc_fs.h> | ||
33 | 38 | ||
34 | #include <asm/pdc_chassis.h> | 39 | #include <asm/pdc_chassis.h> |
35 | #include <asm/processor.h> | 40 | #include <asm/processor.h> |
36 | #include <asm/pdc.h> | 41 | #include <asm/pdc.h> |
37 | #include <asm/pdcpat.h> | 42 | #include <asm/pdcpat.h> |
38 | 43 | ||
44 | #define PDC_CHASSIS_VER "0.05" | ||
39 | 45 | ||
40 | #ifdef CONFIG_PDC_CHASSIS | 46 | #ifdef CONFIG_PDC_CHASSIS |
41 | static int pdc_chassis_old __read_mostly = 0; | ||
42 | static unsigned int pdc_chassis_enabled __read_mostly = 1; | 47 | static unsigned int pdc_chassis_enabled __read_mostly = 1; |
43 | 48 | ||
44 | 49 | ||
@@ -64,7 +69,7 @@ __setup("pdcchassis=", pdc_chassis_setup); | |||
64 | * Currently, only E class and A180 are known to work with this. | 69 | * Currently, only E class and A180 are known to work with this. |
65 | * Inspired by Christoph Plattner | 70 | * Inspired by Christoph Plattner |
66 | */ | 71 | */ |
67 | 72 | #if 0 | |
68 | static void __init pdc_chassis_checkold(void) | 73 | static void __init pdc_chassis_checkold(void) |
69 | { | 74 | { |
70 | switch(CPU_HVERSION) { | 75 | switch(CPU_HVERSION) { |
@@ -73,7 +78,6 @@ static void __init pdc_chassis_checkold(void) | |||
73 | case 0x482: /* E45 */ | 78 | case 0x482: /* E45 */ |
74 | case 0x483: /* E55 */ | 79 | case 0x483: /* E55 */ |
75 | case 0x516: /* A180 */ | 80 | case 0x516: /* A180 */ |
76 | pdc_chassis_old = 1; | ||
77 | break; | 81 | break; |
78 | 82 | ||
79 | default: | 83 | default: |
@@ -81,7 +85,7 @@ static void __init pdc_chassis_checkold(void) | |||
81 | } | 85 | } |
82 | DPRINTK(KERN_DEBUG "%s: pdc_chassis_checkold(); pdc_chassis_old = %d\n", __FILE__, pdc_chassis_old); | 86 | DPRINTK(KERN_DEBUG "%s: pdc_chassis_checkold(); pdc_chassis_old = %d\n", __FILE__, pdc_chassis_old); |
83 | } | 87 | } |
84 | 88 | #endif | |
85 | 89 | ||
86 | /** | 90 | /** |
87 | * pdc_chassis_panic_event() - Called by the panic handler. | 91 | * pdc_chassis_panic_event() - Called by the panic handler. |
@@ -131,30 +135,20 @@ static struct notifier_block pdc_chassis_reboot_block = { | |||
131 | void __init parisc_pdc_chassis_init(void) | 135 | void __init parisc_pdc_chassis_init(void) |
132 | { | 136 | { |
133 | #ifdef CONFIG_PDC_CHASSIS | 137 | #ifdef CONFIG_PDC_CHASSIS |
134 | int handle = 0; | ||
135 | if (likely(pdc_chassis_enabled)) { | 138 | if (likely(pdc_chassis_enabled)) { |
136 | DPRINTK(KERN_DEBUG "%s: parisc_pdc_chassis_init()\n", __FILE__); | 139 | DPRINTK(KERN_DEBUG "%s: parisc_pdc_chassis_init()\n", __FILE__); |
137 | 140 | ||
138 | /* Let see if we have something to handle... */ | 141 | /* Let see if we have something to handle... */ |
139 | /* Check for PDC_PAT or old LED Panel */ | 142 | printk(KERN_INFO "Enabling %s chassis codes support v%s\n", |
140 | pdc_chassis_checkold(); | 143 | is_pdc_pat() ? "PDC_PAT" : "regular", |
141 | if (is_pdc_pat()) { | 144 | PDC_CHASSIS_VER); |
142 | printk(KERN_INFO "Enabling PDC_PAT chassis codes support.\n"); | 145 | |
143 | handle = 1; | 146 | /* initialize panic notifier chain */ |
144 | } | 147 | atomic_notifier_chain_register(&panic_notifier_list, |
145 | else if (unlikely(pdc_chassis_old)) { | 148 | &pdc_chassis_panic_block); |
146 | printk(KERN_INFO "Enabling old style chassis LED panel support.\n"); | 149 | |
147 | handle = 1; | 150 | /* initialize reboot notifier chain */ |
148 | } | 151 | register_reboot_notifier(&pdc_chassis_reboot_block); |
149 | |||
150 | if (handle) { | ||
151 | /* initialize panic notifier chain */ | ||
152 | atomic_notifier_chain_register(&panic_notifier_list, | ||
153 | &pdc_chassis_panic_block); | ||
154 | |||
155 | /* initialize reboot notifier chain */ | ||
156 | register_reboot_notifier(&pdc_chassis_reboot_block); | ||
157 | } | ||
158 | } | 152 | } |
159 | #endif /* CONFIG_PDC_CHASSIS */ | 153 | #endif /* CONFIG_PDC_CHASSIS */ |
160 | } | 154 | } |
@@ -215,9 +209,12 @@ int pdc_chassis_send_status(int message) | |||
215 | } | 209 | } |
216 | } else retval = -1; | 210 | } else retval = -1; |
217 | #else | 211 | #else |
218 | if (unlikely(pdc_chassis_old)) { | 212 | if (1) { |
219 | switch (message) { | 213 | switch (message) { |
220 | case PDC_CHASSIS_DIRECT_BSTART: | 214 | case PDC_CHASSIS_DIRECT_BSTART: |
215 | retval = pdc_chassis_disp(PDC_CHASSIS_DISP_DATA(OSTAT_INIT)); | ||
216 | break; | ||
217 | |||
221 | case PDC_CHASSIS_DIRECT_BCOMPLETE: | 218 | case PDC_CHASSIS_DIRECT_BCOMPLETE: |
222 | retval = pdc_chassis_disp(PDC_CHASSIS_DISP_DATA(OSTAT_RUN)); | 219 | retval = pdc_chassis_disp(PDC_CHASSIS_DISP_DATA(OSTAT_RUN)); |
223 | break; | 220 | break; |
@@ -244,3 +241,61 @@ int pdc_chassis_send_status(int message) | |||
244 | #endif /* CONFIG_PDC_CHASSIS */ | 241 | #endif /* CONFIG_PDC_CHASSIS */ |
245 | return retval; | 242 | return retval; |
246 | } | 243 | } |
244 | |||
245 | #ifdef CONFIG_PDC_CHASSIS_WARN | ||
246 | #ifdef CONFIG_PROC_FS | ||
247 | static int pdc_chassis_warn_pread(char *page, char **start, off_t off, | ||
248 | int count, int *eof, void *data) | ||
249 | { | ||
250 | char *out = page; | ||
251 | int len, ret; | ||
252 | unsigned long warn; | ||
253 | u32 warnreg; | ||
254 | |||
255 | ret = pdc_chassis_warn(&warn); | ||
256 | if (ret != PDC_OK) | ||
257 | return -EIO; | ||
258 | |||
259 | warnreg = (warn & 0xFFFFFFFF); | ||
260 | |||
261 | if ((warnreg >> 24) & 0xFF) | ||
262 | out += sprintf(out, "Chassis component failure! (eg fan or PSU): 0x%.2x\n", ((warnreg >> 24) & 0xFF)); | ||
263 | |||
264 | out += sprintf(out, "Battery: %s\n", (warnreg & 0x04) ? "Low!" : "OK"); | ||
265 | out += sprintf(out, "Temp low: %s\n", (warnreg & 0x02) ? "Exceeded!" : "OK"); | ||
266 | out += sprintf(out, "Temp mid: %s\n", (warnreg & 0x01) ? "Exceeded!" : "OK"); | ||
267 | |||
268 | len = out - page - off; | ||
269 | if (len < count) { | ||
270 | *eof = 1; | ||
271 | if (len <= 0) return 0; | ||
272 | } else { | ||
273 | len = count; | ||
274 | } | ||
275 | *start = page + off; | ||
276 | return len; | ||
277 | } | ||
278 | |||
279 | static int __init pdc_chassis_create_procfs(void) | ||
280 | { | ||
281 | unsigned long test; | ||
282 | int ret; | ||
283 | |||
284 | ret = pdc_chassis_warn(&test); | ||
285 | if ((ret == PDC_BAD_PROC) || (ret == PDC_BAD_OPTION)) { | ||
286 | /* seems that some boxes (eg L1000) do not implement this */ | ||
287 | printk(KERN_INFO "Chassis warnings not supported.\n"); | ||
288 | return 0; | ||
289 | } | ||
290 | |||
291 | printk(KERN_INFO "Enabling PDC chassis warnings support v%s\n", | ||
292 | PDC_CHASSIS_VER); | ||
293 | create_proc_read_entry("chassis", 0400, NULL, pdc_chassis_warn_pread, | ||
294 | NULL); | ||
295 | return 0; | ||
296 | } | ||
297 | |||
298 | __initcall(pdc_chassis_create_procfs); | ||
299 | |||
300 | #endif /* CONFIG_PROC_FS */ | ||
301 | #endif /* CONFIG_PDC_CHASSIS_WARN */ | ||
diff --git a/arch/parisc/kernel/ptrace.c b/arch/parisc/kernel/ptrace.c index 413292f1a4a3..3f28de974556 100644 --- a/arch/parisc/kernel/ptrace.c +++ b/arch/parisc/kernel/ptrace.c | |||
@@ -91,7 +91,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
91 | int copied; | 91 | int copied; |
92 | 92 | ||
93 | #ifdef __LP64__ | 93 | #ifdef __LP64__ |
94 | if (personality(child->personality) == PER_LINUX32) { | 94 | if (__is_compat_task(child)) { |
95 | unsigned int tmp; | 95 | unsigned int tmp; |
96 | 96 | ||
97 | addr &= 0xffffffffL; | 97 | addr &= 0xffffffffL; |
@@ -123,7 +123,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
123 | case PTRACE_POKEDATA: | 123 | case PTRACE_POKEDATA: |
124 | ret = 0; | 124 | ret = 0; |
125 | #ifdef __LP64__ | 125 | #ifdef __LP64__ |
126 | if (personality(child->personality) == PER_LINUX32) { | 126 | if (__is_compat_task(child)) { |
127 | unsigned int tmp = (unsigned int)data; | 127 | unsigned int tmp = (unsigned int)data; |
128 | DBG("sys_ptrace(POKE%s, %d, %lx, %lx)\n", | 128 | DBG("sys_ptrace(POKE%s, %d, %lx, %lx)\n", |
129 | request == PTRACE_POKETEXT ? "TEXT" : "DATA", | 129 | request == PTRACE_POKETEXT ? "TEXT" : "DATA", |
@@ -146,7 +146,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
146 | case PTRACE_PEEKUSR: { | 146 | case PTRACE_PEEKUSR: { |
147 | ret = -EIO; | 147 | ret = -EIO; |
148 | #ifdef __LP64__ | 148 | #ifdef __LP64__ |
149 | if (personality(child->personality) == PER_LINUX32) { | 149 | if (__is_compat_task(child)) { |
150 | unsigned int tmp; | 150 | unsigned int tmp; |
151 | 151 | ||
152 | if (addr & (sizeof(int)-1)) | 152 | if (addr & (sizeof(int)-1)) |
@@ -205,7 +205,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
205 | goto out_tsk; | 205 | goto out_tsk; |
206 | } | 206 | } |
207 | #ifdef __LP64__ | 207 | #ifdef __LP64__ |
208 | if (personality(child->personality) == PER_LINUX32) { | 208 | if (__is_compat_task(child)) { |
209 | if (addr & (sizeof(int)-1)) | 209 | if (addr & (sizeof(int)-1)) |
210 | goto out_tsk; | 210 | goto out_tsk; |
211 | if ((addr = translate_usr_offset(addr)) < 0) | 211 | if ((addr = translate_usr_offset(addr)) < 0) |
diff --git a/arch/parisc/kernel/real2.S b/arch/parisc/kernel/real2.S index 8c2859cca77e..453d01a9f971 100644 --- a/arch/parisc/kernel/real2.S +++ b/arch/parisc/kernel/real2.S | |||
@@ -276,15 +276,6 @@ r64_ret: | |||
276 | 276 | ||
277 | #endif | 277 | #endif |
278 | 278 | ||
279 | .export pc_in_user_space | ||
280 | .text | ||
281 | /* Doesn't belong here but I couldn't find a nicer spot. */ | ||
282 | /* Should never get called, only used by profile stuff in time.c */ | ||
283 | pc_in_user_space: | ||
284 | bv,n 0(%rp) | ||
285 | nop | ||
286 | |||
287 | |||
288 | .export __canonicalize_funcptr_for_compare | 279 | .export __canonicalize_funcptr_for_compare |
289 | .text | 280 | .text |
290 | /* http://lists.parisc-linux.org/hypermail/parisc-linux/10916.html | 281 | /* http://lists.parisc-linux.org/hypermail/parisc-linux/10916.html |
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c index 4a36ec3f6ac1..278f4b9f6a38 100644 --- a/arch/parisc/kernel/setup.c +++ b/arch/parisc/kernel/setup.c | |||
@@ -303,6 +303,8 @@ extern void eisa_init(void); | |||
303 | 303 | ||
304 | static int __init parisc_init(void) | 304 | static int __init parisc_init(void) |
305 | { | 305 | { |
306 | u32 osid = (OS_ID_LINUX << 16); | ||
307 | |||
306 | parisc_proc_mkdir(); | 308 | parisc_proc_mkdir(); |
307 | parisc_init_resources(); | 309 | parisc_init_resources(); |
308 | do_device_inventory(); /* probe for hardware */ | 310 | do_device_inventory(); /* probe for hardware */ |
@@ -311,6 +313,9 @@ static int __init parisc_init(void) | |||
311 | 313 | ||
312 | /* set up a new led state on systems shipped LED State panel */ | 314 | /* set up a new led state on systems shipped LED State panel */ |
313 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BSTART); | 315 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BSTART); |
316 | |||
317 | /* tell PDC we're Linux. Nevermind failure. */ | ||
318 | pdc_stable_write(0x40, &osid, sizeof(osid)); | ||
314 | 319 | ||
315 | processor_init(); | 320 | processor_init(); |
316 | printk(KERN_INFO "CPU(s): %d x %s at %d.%06d MHz\n", | 321 | printk(KERN_INFO "CPU(s): %d x %s at %d.%06d MHz\n", |
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c index cc38edfd90c5..bb83880c5ee3 100644 --- a/arch/parisc/kernel/signal.c +++ b/arch/parisc/kernel/signal.c | |||
@@ -76,7 +76,7 @@ sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, struct pt_regs *r | |||
76 | #ifdef __LP64__ | 76 | #ifdef __LP64__ |
77 | compat_sigset_t newset32; | 77 | compat_sigset_t newset32; |
78 | 78 | ||
79 | if(personality(current->personality) == PER_LINUX32){ | 79 | if (is_compat_task()) { |
80 | /* XXX: Don't preclude handling different sized sigset_t's. */ | 80 | /* XXX: Don't preclude handling different sized sigset_t's. */ |
81 | if (sigsetsize != sizeof(compat_sigset_t)) | 81 | if (sigsetsize != sizeof(compat_sigset_t)) |
82 | return -EINVAL; | 82 | return -EINVAL; |
@@ -153,7 +153,7 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall) | |||
153 | compat_sigset_t compat_set; | 153 | compat_sigset_t compat_set; |
154 | struct compat_rt_sigframe __user * compat_frame; | 154 | struct compat_rt_sigframe __user * compat_frame; |
155 | 155 | ||
156 | if(personality(current->personality) == PER_LINUX32) | 156 | if (is_compat_task()) |
157 | sigframe_size = PARISC_RT_SIGFRAME_SIZE32; | 157 | sigframe_size = PARISC_RT_SIGFRAME_SIZE32; |
158 | #endif | 158 | #endif |
159 | 159 | ||
@@ -166,7 +166,7 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall) | |||
166 | #ifdef __LP64__ | 166 | #ifdef __LP64__ |
167 | compat_frame = (struct compat_rt_sigframe __user *)frame; | 167 | compat_frame = (struct compat_rt_sigframe __user *)frame; |
168 | 168 | ||
169 | if(personality(current->personality) == PER_LINUX32){ | 169 | if (is_compat_task()) { |
170 | DBG(2,"sys_rt_sigreturn: ELF32 process.\n"); | 170 | DBG(2,"sys_rt_sigreturn: ELF32 process.\n"); |
171 | if (__copy_from_user(&compat_set, &compat_frame->uc.uc_sigmask, sizeof(compat_set))) | 171 | if (__copy_from_user(&compat_set, &compat_frame->uc.uc_sigmask, sizeof(compat_set))) |
172 | goto give_sigsegv; | 172 | goto give_sigsegv; |
@@ -186,7 +186,7 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall) | |||
186 | 186 | ||
187 | /* Good thing we saved the old gr[30], eh? */ | 187 | /* Good thing we saved the old gr[30], eh? */ |
188 | #ifdef __LP64__ | 188 | #ifdef __LP64__ |
189 | if(personality(current->personality) == PER_LINUX32){ | 189 | if (is_compat_task()) { |
190 | DBG(1,"sys_rt_sigreturn: compat_frame->uc.uc_mcontext 0x%p\n", | 190 | DBG(1,"sys_rt_sigreturn: compat_frame->uc.uc_mcontext 0x%p\n", |
191 | &compat_frame->uc.uc_mcontext); | 191 | &compat_frame->uc.uc_mcontext); |
192 | // FIXME: Load upper half from register file | 192 | // FIXME: Load upper half from register file |
@@ -315,7 +315,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
315 | 315 | ||
316 | compat_frame = (struct compat_rt_sigframe __user *)frame; | 316 | compat_frame = (struct compat_rt_sigframe __user *)frame; |
317 | 317 | ||
318 | if(personality(current->personality) == PER_LINUX32) { | 318 | if (is_compat_task()) { |
319 | DBG(1,"setup_rt_frame: frame->info = 0x%p\n", &compat_frame->info); | 319 | DBG(1,"setup_rt_frame: frame->info = 0x%p\n", &compat_frame->info); |
320 | err |= copy_siginfo_to_user32(&compat_frame->info, info); | 320 | err |= copy_siginfo_to_user32(&compat_frame->info, info); |
321 | DBG(1,"SETUP_RT_FRAME: 1\n"); | 321 | DBG(1,"SETUP_RT_FRAME: 1\n"); |
@@ -392,7 +392,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
392 | haddr = A(ka->sa.sa_handler); | 392 | haddr = A(ka->sa.sa_handler); |
393 | /* The sa_handler may be a pointer to a function descriptor */ | 393 | /* The sa_handler may be a pointer to a function descriptor */ |
394 | #ifdef __LP64__ | 394 | #ifdef __LP64__ |
395 | if(personality(current->personality) == PER_LINUX32) { | 395 | if (is_compat_task()) { |
396 | #endif | 396 | #endif |
397 | if (haddr & PA_PLABEL_FDESC) { | 397 | if (haddr & PA_PLABEL_FDESC) { |
398 | Elf32_Fdesc fdesc; | 398 | Elf32_Fdesc fdesc; |
@@ -427,19 +427,19 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
427 | */ | 427 | */ |
428 | sigframe_size = PARISC_RT_SIGFRAME_SIZE; | 428 | sigframe_size = PARISC_RT_SIGFRAME_SIZE; |
429 | #ifdef __LP64__ | 429 | #ifdef __LP64__ |
430 | if(personality(current->personality) == PER_LINUX32) | 430 | if (is_compat_task()) |
431 | sigframe_size = PARISC_RT_SIGFRAME_SIZE32; | 431 | sigframe_size = PARISC_RT_SIGFRAME_SIZE32; |
432 | #endif | 432 | #endif |
433 | if (in_syscall) { | 433 | if (in_syscall) { |
434 | regs->gr[31] = haddr; | 434 | regs->gr[31] = haddr; |
435 | #ifdef __LP64__ | 435 | #ifdef __LP64__ |
436 | if(personality(current->personality) == PER_LINUX) | 436 | if (personality(current->personality) == PER_LINUX) |
437 | sigframe_size |= 1; | 437 | sigframe_size |= 1; |
438 | #endif | 438 | #endif |
439 | } else { | 439 | } else { |
440 | unsigned long psw = USER_PSW; | 440 | unsigned long psw = USER_PSW; |
441 | #ifdef __LP64__ | 441 | #ifdef __LP64__ |
442 | if(personality(current->personality) == PER_LINUX) | 442 | if (personality(current->personality) == PER_LINUX) |
443 | psw |= PSW_W; | 443 | psw |= PSW_W; |
444 | #endif | 444 | #endif |
445 | 445 | ||
@@ -464,7 +464,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
464 | regs->gr[26] = sig; /* signal number */ | 464 | regs->gr[26] = sig; /* signal number */ |
465 | 465 | ||
466 | #ifdef __LP64__ | 466 | #ifdef __LP64__ |
467 | if(personality(current->personality) == PER_LINUX32){ | 467 | if (is_compat_task()) { |
468 | regs->gr[25] = A(&compat_frame->info); /* siginfo pointer */ | 468 | regs->gr[25] = A(&compat_frame->info); /* siginfo pointer */ |
469 | regs->gr[24] = A(&compat_frame->uc); /* ucontext pointer */ | 469 | regs->gr[24] = A(&compat_frame->uc); /* ucontext pointer */ |
470 | } else | 470 | } else |
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S index 479d9a017cd1..9670a89c77fe 100644 --- a/arch/parisc/kernel/syscall.S +++ b/arch/parisc/kernel/syscall.S | |||
@@ -29,18 +29,6 @@ | |||
29 | .level 1.1 | 29 | .level 1.1 |
30 | #endif | 30 | #endif |
31 | 31 | ||
32 | #ifndef CONFIG_64BIT | ||
33 | .macro fixup_branch,lbl | ||
34 | b \lbl | ||
35 | .endm | ||
36 | #else | ||
37 | .macro fixup_branch,lbl | ||
38 | ldil L%\lbl, %r1 | ||
39 | ldo R%\lbl(%r1), %r1 | ||
40 | bv,n %r0(%r1) | ||
41 | .endm | ||
42 | #endif | ||
43 | |||
44 | .text | 32 | .text |
45 | 33 | ||
46 | .import syscall_exit,code | 34 | .import syscall_exit,code |
@@ -541,7 +529,7 @@ cas_nocontend: | |||
541 | # endif | 529 | # endif |
542 | /* ENABLE_LWS_DEBUG */ | 530 | /* ENABLE_LWS_DEBUG */ |
543 | 531 | ||
544 | ldcw 0(%sr2,%r20), %r28 /* Try to acquire the lock */ | 532 | LDCW 0(%sr2,%r20), %r28 /* Try to acquire the lock */ |
545 | cmpb,<>,n %r0, %r28, cas_action /* Did we get it? */ | 533 | cmpb,<>,n %r0, %r28, cas_action /* Did we get it? */ |
546 | cas_wouldblock: | 534 | cas_wouldblock: |
547 | ldo 2(%r0), %r28 /* 2nd case */ | 535 | ldo 2(%r0), %r28 /* 2nd case */ |
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c index 594930bc4bcf..eb35e1c0bb53 100644 --- a/arch/parisc/kernel/time.c +++ b/arch/parisc/kernel/time.c | |||
@@ -157,8 +157,22 @@ do_gettimeofday (struct timeval *tv) | |||
157 | usec += (xtime.tv_nsec / 1000); | 157 | usec += (xtime.tv_nsec / 1000); |
158 | } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); | 158 | } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); |
159 | 159 | ||
160 | while (usec >= 1000000) { | 160 | if (unlikely(usec > LONG_MAX)) { |
161 | usec -= 1000000; | 161 | /* This can happen if the gettimeoffset adjustment is |
162 | * negative and xtime.tv_nsec is smaller than the | ||
163 | * adjustment */ | ||
164 | printk(KERN_ERR "do_gettimeofday() spurious xtime.tv_nsec of %ld\n", usec); | ||
165 | usec += USEC_PER_SEC; | ||
166 | --sec; | ||
167 | /* This should never happen, it means the negative | ||
168 | * time adjustment was more than a second, so there's | ||
169 | * something seriously wrong */ | ||
170 | BUG_ON(usec > LONG_MAX); | ||
171 | } | ||
172 | |||
173 | |||
174 | while (usec >= USEC_PER_SEC) { | ||
175 | usec -= USEC_PER_SEC; | ||
162 | ++sec; | 176 | ++sec; |
163 | } | 177 | } |
164 | 178 | ||
diff --git a/arch/parisc/kernel/topology.c b/arch/parisc/kernel/topology.c index 3ba040050e4c..068b20d822e7 100644 --- a/arch/parisc/kernel/topology.c +++ b/arch/parisc/kernel/topology.c | |||
@@ -26,11 +26,10 @@ static struct cpu cpu_devices[NR_CPUS] __read_mostly; | |||
26 | 26 | ||
27 | static int __init topology_init(void) | 27 | static int __init topology_init(void) |
28 | { | 28 | { |
29 | struct node *parent = NULL; | ||
30 | int num; | 29 | int num; |
31 | 30 | ||
32 | for_each_present_cpu(num) { | 31 | for_each_present_cpu(num) { |
33 | register_cpu(&cpu_devices[num], num, parent); | 32 | register_cpu(&cpu_devices[num], num); |
34 | } | 33 | } |
35 | return 0; | 34 | return 0; |
36 | } | 35 | } |
diff --git a/arch/parisc/kernel/traps.c b/arch/parisc/kernel/traps.c index ff200608c851..348344a84bf7 100644 --- a/arch/parisc/kernel/traps.c +++ b/arch/parisc/kernel/traps.c | |||
@@ -66,57 +66,42 @@ int printbinary(char *buf, unsigned long x, int nbits) | |||
66 | #else | 66 | #else |
67 | #define RFMT "%08lx" | 67 | #define RFMT "%08lx" |
68 | #endif | 68 | #endif |
69 | #define FFMT "%016llx" /* fpregs are 64-bit always */ | ||
69 | 70 | ||
70 | void show_regs(struct pt_regs *regs) | 71 | #define PRINTREGS(lvl,r,f,fmt,x) \ |
72 | printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \ | ||
73 | lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \ | ||
74 | (r)[(x)+2], (r)[(x)+3]) | ||
75 | |||
76 | static void print_gr(char *level, struct pt_regs *regs) | ||
71 | { | 77 | { |
72 | int i; | 78 | int i; |
73 | char buf[128], *p; | 79 | char buf[64]; |
74 | char *level; | ||
75 | unsigned long cr30; | ||
76 | unsigned long cr31; | ||
77 | /* carlos says that gcc understands better memory in a struct, | ||
78 | * and it makes our life easier with fpregs -- T-Bone */ | ||
79 | struct { u32 sw[2]; } s; | ||
80 | |||
81 | level = user_mode(regs) ? KERN_DEBUG : KERN_CRIT; | ||
82 | |||
83 | printk("%s\n", level); /* don't want to have that pretty register dump messed up */ | ||
84 | 80 | ||
81 | printk("%s\n", level); | ||
85 | printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level); | 82 | printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level); |
86 | printbinary(buf, regs->gr[0], 32); | 83 | printbinary(buf, regs->gr[0], 32); |
87 | printk("%sPSW: %s %s\n", level, buf, print_tainted()); | 84 | printk("%sPSW: %s %s\n", level, buf, print_tainted()); |
88 | 85 | ||
89 | for (i = 0; i < 32; i += 4) { | 86 | for (i = 0; i < 32; i += 4) |
90 | int j; | 87 | PRINTREGS(level, regs->gr, "r", RFMT, i); |
91 | p = buf; | 88 | } |
92 | p += sprintf(p, "%sr%02d-%02d ", level, i, i + 3); | ||
93 | for (j = 0; j < 4; j++) { | ||
94 | p += sprintf(p, " " RFMT, (i+j) == 0 ? 0 : regs->gr[i + j]); | ||
95 | } | ||
96 | printk("%s\n", buf); | ||
97 | } | ||
98 | 89 | ||
99 | for (i = 0; i < 8; i += 4) { | 90 | static void print_fr(char *level, struct pt_regs *regs) |
100 | int j; | 91 | { |
101 | p = buf; | 92 | int i; |
102 | p += sprintf(p, "%ssr%d-%d ", level, i, i + 3); | 93 | char buf[64]; |
103 | for (j = 0; j < 4; j++) { | 94 | struct { u32 sw[2]; } s; |
104 | p += sprintf(p, " " RFMT, regs->sr[i + j]); | ||
105 | } | ||
106 | printk("%s\n", buf); | ||
107 | } | ||
108 | 95 | ||
109 | /* FR are 64bit everywhere. Need to use asm to get the content | 96 | /* FR are 64bit everywhere. Need to use asm to get the content |
110 | * of fpsr/fper1, and we assume that we won't have a FP Identify | 97 | * of fpsr/fper1, and we assume that we won't have a FP Identify |
111 | * in our way, otherwise we're screwed. | 98 | * in our way, otherwise we're screwed. |
112 | * The fldd is used to restore the T-bit if there was one, as the | 99 | * The fldd is used to restore the T-bit if there was one, as the |
113 | * store clears it anyway. | 100 | * store clears it anyway. |
114 | * BTW, PA2.0 book says "thou shall not use fstw on FPSR/FPERs". */ | 101 | * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */ |
115 | __asm__ ( | 102 | asm volatile ("fstd %%fr0,0(%1) \n\t" |
116 | "fstd %%fr0,0(%1) \n\t" | 103 | "fldd 0(%1),%%fr0 \n\t" |
117 | "fldd 0(%1),%%fr0 \n\t" | 104 | : "=m" (s) : "r" (&s) : "r0"); |
118 | : "=m" (s) : "r" (&s) : "%r0" | ||
119 | ); | ||
120 | 105 | ||
121 | printk("%s\n", level); | 106 | printk("%s\n", level); |
122 | printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level); | 107 | printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level); |
@@ -125,14 +110,25 @@ void show_regs(struct pt_regs *regs) | |||
125 | printk("%sFPER1: %08x\n", level, s.sw[1]); | 110 | printk("%sFPER1: %08x\n", level, s.sw[1]); |
126 | 111 | ||
127 | /* here we'll print fr0 again, tho it'll be meaningless */ | 112 | /* here we'll print fr0 again, tho it'll be meaningless */ |
128 | for (i = 0; i < 32; i += 4) { | 113 | for (i = 0; i < 32; i += 4) |
129 | int j; | 114 | PRINTREGS(level, regs->fr, "fr", FFMT, i); |
130 | p = buf; | 115 | } |
131 | p += sprintf(p, "%sfr%02d-%02d ", level, i, i + 3); | 116 | |
132 | for (j = 0; j < 4; j++) | 117 | void show_regs(struct pt_regs *regs) |
133 | p += sprintf(p, " %016llx", (i+j) == 0 ? 0 : regs->fr[i+j]); | 118 | { |
134 | printk("%s\n", buf); | 119 | int i; |
135 | } | 120 | char *level; |
121 | unsigned long cr30, cr31; | ||
122 | |||
123 | level = user_mode(regs) ? KERN_DEBUG : KERN_CRIT; | ||
124 | |||
125 | print_gr(level, regs); | ||
126 | |||
127 | for (i = 0; i < 8; i += 4) | ||
128 | PRINTREGS(level, regs->sr, "sr", RFMT, i); | ||
129 | |||
130 | if (user_mode(regs)) | ||
131 | print_fr(level, regs); | ||
136 | 132 | ||
137 | cr30 = mfctl(30); | 133 | cr30 = mfctl(30); |
138 | cr31 = mfctl(31); | 134 | cr31 = mfctl(31); |
diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c index de0a1b21cb40..92328fbddb3e 100644 --- a/arch/parisc/kernel/unaligned.c +++ b/arch/parisc/kernel/unaligned.c | |||
@@ -43,6 +43,8 @@ | |||
43 | "\tldil L%%" #lbl ", %%r1\n" \ | 43 | "\tldil L%%" #lbl ", %%r1\n" \ |
44 | "\tldo R%%" #lbl "(%%r1), %%r1\n" \ | 44 | "\tldo R%%" #lbl "(%%r1), %%r1\n" \ |
45 | "\tbv,n %%r0(%%r1)\n" | 45 | "\tbv,n %%r0(%%r1)\n" |
46 | /* If you use FIXUP_BRANCH, then you must list this clobber */ | ||
47 | #define FIXUP_BRANCH_CLOBBER "r1" | ||
46 | 48 | ||
47 | /* 1111 1100 0000 0000 0001 0011 1100 0000 */ | 49 | /* 1111 1100 0000 0000 0001 0011 1100 0000 */ |
48 | #define OPCODE1(a,b,c) ((a)<<26|(b)<<12|(c)<<6) | 50 | #define OPCODE1(a,b,c) ((a)<<26|(b)<<12|(c)<<6) |
@@ -157,7 +159,7 @@ static int emulate_ldh(struct pt_regs *regs, int toreg) | |||
157 | " .previous\n" | 159 | " .previous\n" |
158 | : "=r" (val), "=r" (ret) | 160 | : "=r" (val), "=r" (ret) |
159 | : "0" (val), "r" (saddr), "r" (regs->isr) | 161 | : "0" (val), "r" (saddr), "r" (regs->isr) |
160 | : "r20" ); | 162 | : "r20", FIXUP_BRANCH_CLOBBER ); |
161 | 163 | ||
162 | DPRINTF("val = 0x" RFMT "\n", val); | 164 | DPRINTF("val = 0x" RFMT "\n", val); |
163 | 165 | ||
@@ -202,7 +204,7 @@ static int emulate_ldw(struct pt_regs *regs, int toreg, int flop) | |||
202 | " .previous\n" | 204 | " .previous\n" |
203 | : "=r" (val), "=r" (ret) | 205 | : "=r" (val), "=r" (ret) |
204 | : "0" (val), "r" (saddr), "r" (regs->isr) | 206 | : "0" (val), "r" (saddr), "r" (regs->isr) |
205 | : "r19", "r20" ); | 207 | : "r19", "r20", FIXUP_BRANCH_CLOBBER ); |
206 | 208 | ||
207 | DPRINTF("val = 0x" RFMT "\n", val); | 209 | DPRINTF("val = 0x" RFMT "\n", val); |
208 | 210 | ||
@@ -253,7 +255,7 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop) | |||
253 | " .previous\n" | 255 | " .previous\n" |
254 | : "=r" (val), "=r" (ret) | 256 | : "=r" (val), "=r" (ret) |
255 | : "0" (val), "r" (saddr), "r" (regs->isr) | 257 | : "0" (val), "r" (saddr), "r" (regs->isr) |
256 | : "r19", "r20" ); | 258 | : "r19", "r20", FIXUP_BRANCH_CLOBBER ); |
257 | #else | 259 | #else |
258 | { | 260 | { |
259 | unsigned long valh=0,vall=0; | 261 | unsigned long valh=0,vall=0; |
@@ -287,7 +289,7 @@ static int emulate_ldd(struct pt_regs *regs, int toreg, int flop) | |||
287 | " .previous\n" | 289 | " .previous\n" |
288 | : "=r" (valh), "=r" (vall), "=r" (ret) | 290 | : "=r" (valh), "=r" (vall), "=r" (ret) |
289 | : "0" (valh), "1" (vall), "r" (saddr), "r" (regs->isr) | 291 | : "0" (valh), "1" (vall), "r" (saddr), "r" (regs->isr) |
290 | : "r19", "r20" ); | 292 | : "r19", "r20", FIXUP_BRANCH_CLOBBER ); |
291 | val=((__u64)valh<<32)|(__u64)vall; | 293 | val=((__u64)valh<<32)|(__u64)vall; |
292 | } | 294 | } |
293 | #endif | 295 | #endif |
@@ -335,7 +337,7 @@ static int emulate_sth(struct pt_regs *regs, int frreg) | |||
335 | " .previous\n" | 337 | " .previous\n" |
336 | : "=r" (ret) | 338 | : "=r" (ret) |
337 | : "r" (val), "r" (regs->ior), "r" (regs->isr) | 339 | : "r" (val), "r" (regs->ior), "r" (regs->isr) |
338 | : "r19" ); | 340 | : "r19", FIXUP_BRANCH_CLOBBER ); |
339 | 341 | ||
340 | return ret; | 342 | return ret; |
341 | } | 343 | } |
@@ -389,7 +391,7 @@ static int emulate_stw(struct pt_regs *regs, int frreg, int flop) | |||
389 | " .previous\n" | 391 | " .previous\n" |
390 | : "=r" (ret) | 392 | : "=r" (ret) |
391 | : "r" (val), "r" (regs->ior), "r" (regs->isr) | 393 | : "r" (val), "r" (regs->ior), "r" (regs->isr) |
392 | : "r19", "r20", "r21", "r22", "r1" ); | 394 | : "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER ); |
393 | 395 | ||
394 | return 0; | 396 | return 0; |
395 | } | 397 | } |
@@ -450,7 +452,7 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop) | |||
450 | " .previous\n" | 452 | " .previous\n" |
451 | : "=r" (ret) | 453 | : "=r" (ret) |
452 | : "r" (val), "r" (regs->ior), "r" (regs->isr) | 454 | : "r" (val), "r" (regs->ior), "r" (regs->isr) |
453 | : "r19", "r20", "r21", "r22", "r1" ); | 455 | : "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER ); |
454 | #else | 456 | #else |
455 | { | 457 | { |
456 | unsigned long valh=(val>>32),vall=(val&0xffffffffl); | 458 | unsigned long valh=(val>>32),vall=(val&0xffffffffl); |
@@ -495,7 +497,7 @@ static int emulate_std(struct pt_regs *regs, int frreg, int flop) | |||
495 | " .previous\n" | 497 | " .previous\n" |
496 | : "=r" (ret) | 498 | : "=r" (ret) |
497 | : "r" (valh), "r" (vall), "r" (regs->ior), "r" (regs->isr) | 499 | : "r" (valh), "r" (vall), "r" (regs->ior), "r" (regs->isr) |
498 | : "r19", "r20", "r21", "r1" ); | 500 | : "r19", "r20", "r21", "r1", FIXUP_BRANCH_CLOBBER ); |
499 | } | 501 | } |
500 | #endif | 502 | #endif |
501 | 503 | ||
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index e922a88b2bad..2643dbc3f289 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -30,6 +30,10 @@ config GENERIC_HARDIRQS | |||
30 | bool | 30 | bool |
31 | default y | 31 | default y |
32 | 32 | ||
33 | config IRQ_PER_CPU | ||
34 | bool | ||
35 | default y | ||
36 | |||
33 | config RWSEM_GENERIC_SPINLOCK | 37 | config RWSEM_GENERIC_SPINLOCK |
34 | bool | 38 | bool |
35 | 39 | ||
@@ -336,7 +340,7 @@ config PPC_ISERIES | |||
336 | 340 | ||
337 | config EMBEDDED6xx | 341 | config EMBEDDED6xx |
338 | bool "Embedded 6xx/7xx/7xxx-based board" | 342 | bool "Embedded 6xx/7xx/7xxx-based board" |
339 | depends on PPC32 && BROKEN | 343 | depends on PPC32 && (BROKEN||BROKEN_ON_SMP) |
340 | 344 | ||
341 | config APUS | 345 | config APUS |
342 | bool "Amiga-APUS" | 346 | bool "Amiga-APUS" |
@@ -413,12 +417,17 @@ config PPC_CELL_NATIVE | |||
413 | default n | 417 | default n |
414 | 418 | ||
415 | config PPC_IBM_CELL_BLADE | 419 | config PPC_IBM_CELL_BLADE |
416 | bool " IBM Cell Blade" | 420 | bool "IBM Cell Blade" |
417 | depends on PPC_MULTIPLATFORM && PPC64 | 421 | depends on PPC_MULTIPLATFORM && PPC64 |
418 | select PPC_CELL_NATIVE | 422 | select PPC_CELL_NATIVE |
419 | select PPC_RTAS | 423 | select PPC_RTAS |
420 | select MMIO_NVRAM | 424 | select MMIO_NVRAM |
421 | select PPC_UDBG_16550 | 425 | select PPC_UDBG_16550 |
426 | select UDBG_RTAS_CONSOLE | ||
427 | |||
428 | config UDBG_RTAS_CONSOLE | ||
429 | bool | ||
430 | default n | ||
422 | 431 | ||
423 | config XICS | 432 | config XICS |
424 | depends on PPC_PSERIES | 433 | depends on PPC_PSERIES |
@@ -431,7 +440,8 @@ config U3_DART | |||
431 | default n | 440 | default n |
432 | 441 | ||
433 | config MPIC | 442 | config MPIC |
434 | depends on PPC_PSERIES || PPC_PMAC || PPC_MAPLE || PPC_CHRP | 443 | depends on PPC_PSERIES || PPC_PMAC || PPC_MAPLE || PPC_CHRP \ |
444 | || MPC7448HPC2 | ||
435 | bool | 445 | bool |
436 | default y | 446 | default y |
437 | 447 | ||
@@ -557,6 +567,13 @@ config TAU_AVERAGE | |||
557 | /proc/cpuinfo. | 567 | /proc/cpuinfo. |
558 | 568 | ||
559 | If in doubt, say N here. | 569 | If in doubt, say N here. |
570 | |||
571 | config PPC_TODC | ||
572 | depends on EMBEDDED6xx | ||
573 | bool "Generic Time-of-day Clock (TODC) support" | ||
574 | ---help--- | ||
575 | This adds support for many TODC/RTC chips. | ||
576 | |||
560 | endmenu | 577 | endmenu |
561 | 578 | ||
562 | source arch/powerpc/platforms/embedded6xx/Kconfig | 579 | source arch/powerpc/platforms/embedded6xx/Kconfig |
@@ -618,16 +635,19 @@ config HOTPLUG_CPU | |||
618 | 635 | ||
619 | Say N if you are unsure. | 636 | Say N if you are unsure. |
620 | 637 | ||
638 | config ARCH_ENABLE_MEMORY_HOTPLUG | ||
639 | def_bool y | ||
640 | |||
621 | config KEXEC | 641 | config KEXEC |
622 | bool "kexec system call (EXPERIMENTAL)" | 642 | bool "kexec system call (EXPERIMENTAL)" |
623 | depends on PPC_MULTIPLATFORM && EXPERIMENTAL | 643 | depends on PPC_MULTIPLATFORM && EXPERIMENTAL |
624 | help | 644 | help |
625 | kexec is a system call that implements the ability to shutdown your | 645 | kexec is a system call that implements the ability to shutdown your |
626 | current kernel, and to start another kernel. It is like a reboot | 646 | current kernel, and to start another kernel. It is like a reboot |
627 | but it is indepedent of the system firmware. And like a reboot | 647 | but it is independent of the system firmware. And like a reboot |
628 | you can start any kernel with it, not just Linux. | 648 | you can start any kernel with it, not just Linux. |
629 | 649 | ||
630 | The name comes from the similiarity to the exec system call. | 650 | The name comes from the similarity to the exec system call. |
631 | 651 | ||
632 | It is an ongoing process to be certain the hardware in a machine | 652 | It is an ongoing process to be certain the hardware in a machine |
633 | is properly shutdown, so do not be surprised if this code does not | 653 | is properly shutdown, so do not be surprised if this code does not |
@@ -794,7 +814,6 @@ config GENERIC_ISA_DMA | |||
794 | 814 | ||
795 | config PPC_I8259 | 815 | config PPC_I8259 |
796 | bool | 816 | bool |
797 | default y if MPC8641_HPCN | ||
798 | default n | 817 | default n |
799 | 818 | ||
800 | config PPC_INDIRECT_PCI | 819 | config PPC_INDIRECT_PCI |
@@ -817,7 +836,8 @@ config MCA | |||
817 | bool | 836 | bool |
818 | 837 | ||
819 | config PCI | 838 | config PCI |
820 | bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) | 839 | bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) \ |
840 | || MPC7448HPC2 | ||
821 | default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx && !PPC_85xx && !PPC_86xx | 841 | default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx && !PPC_85xx && !PPC_86xx |
822 | default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS | 842 | default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS |
823 | default PCI_QSPAN if !4xx && !CPM2 && 8xx | 843 | default PCI_QSPAN if !4xx && !CPM2 && 8xx |
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index c69006ae8246..e29ef77d3b00 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug | |||
@@ -134,12 +134,19 @@ config PPC_EARLY_DEBUG_G5 | |||
134 | help | 134 | help |
135 | Select this to enable early debugging for Apple G5 machines. | 135 | Select this to enable early debugging for Apple G5 machines. |
136 | 136 | ||
137 | config PPC_EARLY_DEBUG_RTAS | 137 | config PPC_EARLY_DEBUG_RTAS_PANEL |
138 | bool "RTAS Panel" | 138 | bool "RTAS Panel" |
139 | depends on PPC_RTAS | 139 | depends on PPC_RTAS |
140 | help | 140 | help |
141 | Select this to enable early debugging via the RTAS panel. | 141 | Select this to enable early debugging via the RTAS panel. |
142 | 142 | ||
143 | config PPC_EARLY_DEBUG_RTAS_CONSOLE | ||
144 | bool "RTAS Console" | ||
145 | depends on PPC_RTAS | ||
146 | select UDBG_RTAS_CONSOLE | ||
147 | help | ||
148 | Select this to enable early debugging via the RTAS console. | ||
149 | |||
143 | config PPC_EARLY_DEBUG_MAPLE | 150 | config PPC_EARLY_DEBUG_MAPLE |
144 | bool "Maple real mode" | 151 | bool "Maple real mode" |
145 | depends on PPC_MAPLE | 152 | depends on PPC_MAPLE |
diff --git a/arch/powerpc/configs/cell_defconfig b/arch/powerpc/configs/cell_defconfig index b8b8d4675dc0..e028a2ecb8a3 100644 --- a/arch/powerpc/configs/cell_defconfig +++ b/arch/powerpc/configs/cell_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17 | 3 | # Linux kernel version: 2.6.17-rc6 |
4 | # Mon Jun 19 17:23:03 2006 | 4 | # Thu Jun 22 15:28:36 2006 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
@@ -1063,7 +1063,8 @@ CONFIG_DEBUG_FS=y | |||
1063 | # CONFIG_DEBUG_STACKOVERFLOW is not set | 1063 | # CONFIG_DEBUG_STACKOVERFLOW is not set |
1064 | # CONFIG_DEBUG_STACK_USAGE is not set | 1064 | # CONFIG_DEBUG_STACK_USAGE is not set |
1065 | CONFIG_DEBUGGER=y | 1065 | CONFIG_DEBUGGER=y |
1066 | # CONFIG_XMON is not set | 1066 | CONFIG_XMON=y |
1067 | CONFIG_XMON_DEFAULT=y | ||
1067 | CONFIG_IRQSTACKS=y | 1068 | CONFIG_IRQSTACKS=y |
1068 | # CONFIG_BOOTX_TEXT is not set | 1069 | # CONFIG_BOOTX_TEXT is not set |
1069 | # CONFIG_PPC_EARLY_DEBUG is not set | 1070 | # CONFIG_PPC_EARLY_DEBUG is not set |
diff --git a/arch/powerpc/configs/mpc7448_hpc2_defconfig b/arch/powerpc/configs/mpc7448_hpc2_defconfig new file mode 100644 index 000000000000..15a50f4ceb1f --- /dev/null +++ b/arch/powerpc/configs/mpc7448_hpc2_defconfig | |||
@@ -0,0 +1,923 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.17-rc4 | ||
4 | # Sat May 27 18:45:55 2006 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | CONFIG_PPC32=y | ||
8 | CONFIG_PPC_MERGE=y | ||
9 | CONFIG_MMU=y | ||
10 | CONFIG_GENERIC_HARDIRQS=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
12 | CONFIG_GENERIC_HWEIGHT=y | ||
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
14 | CONFIG_PPC=y | ||
15 | CONFIG_EARLY_PRINTK=y | ||
16 | CONFIG_GENERIC_NVRAM=y | ||
17 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
18 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
19 | CONFIG_PPC_OF=y | ||
20 | CONFIG_PPC_UDBG_16550=y | ||
21 | # CONFIG_GENERIC_TBSYNC is not set | ||
22 | CONFIG_DEFAULT_UIMAGE=y | ||
23 | |||
24 | # | ||
25 | # Processor support | ||
26 | # | ||
27 | CONFIG_CLASSIC32=y | ||
28 | # CONFIG_PPC_52xx is not set | ||
29 | # CONFIG_PPC_82xx is not set | ||
30 | # CONFIG_PPC_83xx is not set | ||
31 | # CONFIG_PPC_85xx is not set | ||
32 | # CONFIG_40x is not set | ||
33 | # CONFIG_44x is not set | ||
34 | # CONFIG_8xx is not set | ||
35 | # CONFIG_E200 is not set | ||
36 | CONFIG_6xx=y | ||
37 | CONFIG_PPC_FPU=y | ||
38 | # CONFIG_ALTIVEC is not set | ||
39 | CONFIG_PPC_STD_MMU=y | ||
40 | CONFIG_PPC_STD_MMU_32=y | ||
41 | # CONFIG_SMP is not set | ||
42 | |||
43 | # | ||
44 | # Code maturity level options | ||
45 | # | ||
46 | CONFIG_EXPERIMENTAL=y | ||
47 | CONFIG_BROKEN_ON_SMP=y | ||
48 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
49 | |||
50 | # | ||
51 | # General setup | ||
52 | # | ||
53 | CONFIG_LOCALVERSION="" | ||
54 | CONFIG_LOCALVERSION_AUTO=y | ||
55 | CONFIG_SWAP=y | ||
56 | CONFIG_SYSVIPC=y | ||
57 | # CONFIG_POSIX_MQUEUE is not set | ||
58 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
59 | CONFIG_SYSCTL=y | ||
60 | # CONFIG_AUDIT is not set | ||
61 | # CONFIG_IKCONFIG is not set | ||
62 | # CONFIG_RELAY is not set | ||
63 | CONFIG_INITRAMFS_SOURCE="" | ||
64 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
65 | CONFIG_EMBEDDED=y | ||
66 | CONFIG_KALLSYMS=y | ||
67 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
68 | CONFIG_HOTPLUG=y | ||
69 | CONFIG_PRINTK=y | ||
70 | CONFIG_BUG=y | ||
71 | CONFIG_ELF_CORE=y | ||
72 | CONFIG_BASE_FULL=y | ||
73 | CONFIG_FUTEX=y | ||
74 | CONFIG_EPOLL=y | ||
75 | CONFIG_SHMEM=y | ||
76 | CONFIG_SLAB=y | ||
77 | # CONFIG_TINY_SHMEM is not set | ||
78 | CONFIG_BASE_SMALL=0 | ||
79 | # CONFIG_SLOB is not set | ||
80 | |||
81 | # | ||
82 | # Loadable module support | ||
83 | # | ||
84 | # CONFIG_MODULES is not set | ||
85 | |||
86 | # | ||
87 | # Block layer | ||
88 | # | ||
89 | CONFIG_LBD=y | ||
90 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
91 | # CONFIG_LSF is not set | ||
92 | |||
93 | # | ||
94 | # IO Schedulers | ||
95 | # | ||
96 | CONFIG_IOSCHED_NOOP=y | ||
97 | CONFIG_IOSCHED_AS=y | ||
98 | CONFIG_IOSCHED_DEADLINE=y | ||
99 | CONFIG_IOSCHED_CFQ=y | ||
100 | CONFIG_DEFAULT_AS=y | ||
101 | # CONFIG_DEFAULT_DEADLINE is not set | ||
102 | # CONFIG_DEFAULT_CFQ is not set | ||
103 | # CONFIG_DEFAULT_NOOP is not set | ||
104 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
105 | |||
106 | # | ||
107 | # Platform support | ||
108 | # | ||
109 | # CONFIG_PPC_MULTIPLATFORM is not set | ||
110 | # CONFIG_PPC_ISERIES is not set | ||
111 | CONFIG_EMBEDDED6xx=y | ||
112 | # CONFIG_APUS is not set | ||
113 | CONFIG_MPIC=y | ||
114 | # CONFIG_PPC_RTAS is not set | ||
115 | # CONFIG_MMIO_NVRAM is not set | ||
116 | # CONFIG_PPC_MPC106 is not set | ||
117 | # CONFIG_PPC_970_NAP is not set | ||
118 | # CONFIG_CPU_FREQ is not set | ||
119 | # CONFIG_TAU is not set | ||
120 | # CONFIG_KATANA is not set | ||
121 | # CONFIG_WILLOW is not set | ||
122 | # CONFIG_CPCI690 is not set | ||
123 | # CONFIG_POWERPMC250 is not set | ||
124 | # CONFIG_CHESTNUT is not set | ||
125 | # CONFIG_SPRUCE is not set | ||
126 | # CONFIG_HDPU is not set | ||
127 | # CONFIG_EV64260 is not set | ||
128 | # CONFIG_LOPEC is not set | ||
129 | # CONFIG_MVME5100 is not set | ||
130 | # CONFIG_PPLUS is not set | ||
131 | # CONFIG_PRPMC750 is not set | ||
132 | # CONFIG_PRPMC800 is not set | ||
133 | # CONFIG_SANDPOINT is not set | ||
134 | CONFIG_MPC7448HPC2=y | ||
135 | # CONFIG_RADSTONE_PPC7D is not set | ||
136 | # CONFIG_PAL4 is not set | ||
137 | # CONFIG_GEMINI is not set | ||
138 | # CONFIG_EST8260 is not set | ||
139 | # CONFIG_SBC82xx is not set | ||
140 | # CONFIG_SBS8260 is not set | ||
141 | # CONFIG_RPX8260 is not set | ||
142 | # CONFIG_TQM8260 is not set | ||
143 | # CONFIG_ADS8272 is not set | ||
144 | # CONFIG_PQ2FADS is not set | ||
145 | # CONFIG_LITE5200 is not set | ||
146 | # CONFIG_EV64360 is not set | ||
147 | CONFIG_TSI108_BRIDGE=y | ||
148 | # CONFIG_WANT_EARLY_SERIAL is not set | ||
149 | |||
150 | # | ||
151 | # Kernel options | ||
152 | # | ||
153 | # CONFIG_HIGHMEM is not set | ||
154 | # CONFIG_HZ_100 is not set | ||
155 | CONFIG_HZ_250=y | ||
156 | # CONFIG_HZ_1000 is not set | ||
157 | CONFIG_HZ=250 | ||
158 | CONFIG_PREEMPT_NONE=y | ||
159 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
160 | # CONFIG_PREEMPT is not set | ||
161 | CONFIG_BINFMT_ELF=y | ||
162 | CONFIG_BINFMT_MISC=y | ||
163 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
164 | CONFIG_SELECT_MEMORY_MODEL=y | ||
165 | CONFIG_FLATMEM_MANUAL=y | ||
166 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
167 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
168 | CONFIG_FLATMEM=y | ||
169 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
170 | # CONFIG_SPARSEMEM_STATIC is not set | ||
171 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
172 | CONFIG_PROC_DEVICETREE=y | ||
173 | # CONFIG_CMDLINE_BOOL is not set | ||
174 | # CONFIG_PM is not set | ||
175 | # CONFIG_SOFTWARE_SUSPEND is not set | ||
176 | # CONFIG_SECCOMP is not set | ||
177 | CONFIG_ISA_DMA_API=y | ||
178 | |||
179 | # | ||
180 | # Bus options | ||
181 | # | ||
182 | CONFIG_GENERIC_ISA_DMA=y | ||
183 | # CONFIG_PPC_I8259 is not set | ||
184 | # CONFIG_PPC_INDIRECT_PCI is not set | ||
185 | CONFIG_PCI=y | ||
186 | CONFIG_PCI_DOMAINS=y | ||
187 | |||
188 | # | ||
189 | # PCCARD (PCMCIA/CardBus) support | ||
190 | # | ||
191 | # CONFIG_PCCARD is not set | ||
192 | |||
193 | # | ||
194 | # PCI Hotplug Support | ||
195 | # | ||
196 | # CONFIG_HOTPLUG_PCI is not set | ||
197 | |||
198 | # | ||
199 | # Advanced setup | ||
200 | # | ||
201 | # CONFIG_ADVANCED_OPTIONS is not set | ||
202 | |||
203 | # | ||
204 | # Default settings for advanced configuration options are used | ||
205 | # | ||
206 | CONFIG_HIGHMEM_START=0xfe000000 | ||
207 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
208 | CONFIG_KERNEL_START=0xc0000000 | ||
209 | CONFIG_TASK_SIZE=0x80000000 | ||
210 | CONFIG_BOOT_LOAD=0x00800000 | ||
211 | |||
212 | # | ||
213 | # Networking | ||
214 | # | ||
215 | CONFIG_NET=y | ||
216 | |||
217 | # | ||
218 | # Networking options | ||
219 | # | ||
220 | # CONFIG_NETDEBUG is not set | ||
221 | CONFIG_PACKET=y | ||
222 | # CONFIG_PACKET_MMAP is not set | ||
223 | CONFIG_UNIX=y | ||
224 | # CONFIG_NET_KEY is not set | ||
225 | CONFIG_INET=y | ||
226 | CONFIG_IP_MULTICAST=y | ||
227 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
228 | CONFIG_IP_FIB_HASH=y | ||
229 | CONFIG_IP_PNP=y | ||
230 | CONFIG_IP_PNP_DHCP=y | ||
231 | CONFIG_IP_PNP_BOOTP=y | ||
232 | # CONFIG_IP_PNP_RARP is not set | ||
233 | # CONFIG_NET_IPIP is not set | ||
234 | # CONFIG_NET_IPGRE is not set | ||
235 | # CONFIG_IP_MROUTE is not set | ||
236 | # CONFIG_ARPD is not set | ||
237 | CONFIG_SYN_COOKIES=y | ||
238 | # CONFIG_INET_AH is not set | ||
239 | # CONFIG_INET_ESP is not set | ||
240 | # CONFIG_INET_IPCOMP is not set | ||
241 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
242 | # CONFIG_INET_TUNNEL is not set | ||
243 | CONFIG_INET_DIAG=y | ||
244 | CONFIG_INET_TCP_DIAG=y | ||
245 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
246 | CONFIG_TCP_CONG_BIC=y | ||
247 | # CONFIG_IPV6 is not set | ||
248 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
249 | # CONFIG_INET6_TUNNEL is not set | ||
250 | # CONFIG_NETFILTER is not set | ||
251 | |||
252 | # | ||
253 | # DCCP Configuration (EXPERIMENTAL) | ||
254 | # | ||
255 | # CONFIG_IP_DCCP is not set | ||
256 | |||
257 | # | ||
258 | # SCTP Configuration (EXPERIMENTAL) | ||
259 | # | ||
260 | # CONFIG_IP_SCTP is not set | ||
261 | |||
262 | # | ||
263 | # TIPC Configuration (EXPERIMENTAL) | ||
264 | # | ||
265 | # CONFIG_TIPC is not set | ||
266 | # CONFIG_ATM is not set | ||
267 | # CONFIG_BRIDGE is not set | ||
268 | # CONFIG_VLAN_8021Q is not set | ||
269 | # CONFIG_DECNET is not set | ||
270 | # CONFIG_LLC2 is not set | ||
271 | # CONFIG_IPX is not set | ||
272 | # CONFIG_ATALK is not set | ||
273 | # CONFIG_X25 is not set | ||
274 | # CONFIG_LAPB is not set | ||
275 | # CONFIG_NET_DIVERT is not set | ||
276 | # CONFIG_ECONET is not set | ||
277 | # CONFIG_WAN_ROUTER is not set | ||
278 | |||
279 | # | ||
280 | # QoS and/or fair queueing | ||
281 | # | ||
282 | # CONFIG_NET_SCHED is not set | ||
283 | |||
284 | # | ||
285 | # Network testing | ||
286 | # | ||
287 | # CONFIG_NET_PKTGEN is not set | ||
288 | # CONFIG_HAMRADIO is not set | ||
289 | # CONFIG_IRDA is not set | ||
290 | # CONFIG_BT is not set | ||
291 | # CONFIG_IEEE80211 is not set | ||
292 | |||
293 | # | ||
294 | # Device Drivers | ||
295 | # | ||
296 | |||
297 | # | ||
298 | # Generic Driver Options | ||
299 | # | ||
300 | CONFIG_STANDALONE=y | ||
301 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
302 | # CONFIG_FW_LOADER is not set | ||
303 | |||
304 | # | ||
305 | # Connector - unified userspace <-> kernelspace linker | ||
306 | # | ||
307 | # CONFIG_CONNECTOR is not set | ||
308 | |||
309 | # | ||
310 | # Memory Technology Devices (MTD) | ||
311 | # | ||
312 | # CONFIG_MTD is not set | ||
313 | |||
314 | # | ||
315 | # Parallel port support | ||
316 | # | ||
317 | # CONFIG_PARPORT is not set | ||
318 | |||
319 | # | ||
320 | # Plug and Play support | ||
321 | # | ||
322 | |||
323 | # | ||
324 | # Block devices | ||
325 | # | ||
326 | # CONFIG_BLK_DEV_FD is not set | ||
327 | # CONFIG_BLK_CPQ_DA is not set | ||
328 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
329 | # CONFIG_BLK_DEV_DAC960 is not set | ||
330 | # CONFIG_BLK_DEV_UMEM is not set | ||
331 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
332 | CONFIG_BLK_DEV_LOOP=y | ||
333 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
334 | # CONFIG_BLK_DEV_NBD is not set | ||
335 | # CONFIG_BLK_DEV_SX8 is not set | ||
336 | CONFIG_BLK_DEV_RAM=y | ||
337 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
338 | CONFIG_BLK_DEV_RAM_SIZE=131072 | ||
339 | CONFIG_BLK_DEV_INITRD=y | ||
340 | # CONFIG_CDROM_PKTCDVD is not set | ||
341 | # CONFIG_ATA_OVER_ETH is not set | ||
342 | |||
343 | # | ||
344 | # ATA/ATAPI/MFM/RLL support | ||
345 | # | ||
346 | # CONFIG_IDE is not set | ||
347 | |||
348 | # | ||
349 | # SCSI device support | ||
350 | # | ||
351 | # CONFIG_RAID_ATTRS is not set | ||
352 | CONFIG_SCSI=y | ||
353 | CONFIG_SCSI_PROC_FS=y | ||
354 | |||
355 | # | ||
356 | # SCSI support type (disk, tape, CD-ROM) | ||
357 | # | ||
358 | CONFIG_BLK_DEV_SD=y | ||
359 | # CONFIG_CHR_DEV_ST is not set | ||
360 | # CONFIG_CHR_DEV_OSST is not set | ||
361 | # CONFIG_BLK_DEV_SR is not set | ||
362 | # CONFIG_CHR_DEV_SG is not set | ||
363 | # CONFIG_CHR_DEV_SCH is not set | ||
364 | |||
365 | # | ||
366 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
367 | # | ||
368 | # CONFIG_SCSI_MULTI_LUN is not set | ||
369 | # CONFIG_SCSI_CONSTANTS is not set | ||
370 | # CONFIG_SCSI_LOGGING is not set | ||
371 | |||
372 | # | ||
373 | # SCSI Transport Attributes | ||
374 | # | ||
375 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
376 | # CONFIG_SCSI_FC_ATTRS is not set | ||
377 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
378 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
379 | |||
380 | # | ||
381 | # SCSI low-level drivers | ||
382 | # | ||
383 | # CONFIG_ISCSI_TCP is not set | ||
384 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
385 | # CONFIG_SCSI_3W_9XXX is not set | ||
386 | # CONFIG_SCSI_ACARD is not set | ||
387 | # CONFIG_SCSI_AACRAID is not set | ||
388 | # CONFIG_SCSI_AIC7XXX is not set | ||
389 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
390 | # CONFIG_SCSI_AIC79XX is not set | ||
391 | # CONFIG_SCSI_DPT_I2O is not set | ||
392 | # CONFIG_MEGARAID_NEWGEN is not set | ||
393 | # CONFIG_MEGARAID_LEGACY is not set | ||
394 | # CONFIG_MEGARAID_SAS is not set | ||
395 | CONFIG_SCSI_SATA=y | ||
396 | # CONFIG_SCSI_SATA_AHCI is not set | ||
397 | # CONFIG_SCSI_SATA_SVW is not set | ||
398 | # CONFIG_SCSI_ATA_PIIX is not set | ||
399 | CONFIG_SCSI_SATA_MV=y | ||
400 | # CONFIG_SCSI_SATA_NV is not set | ||
401 | # CONFIG_SCSI_PDC_ADMA is not set | ||
402 | # CONFIG_SCSI_SATA_QSTOR is not set | ||
403 | # CONFIG_SCSI_SATA_PROMISE is not set | ||
404 | # CONFIG_SCSI_SATA_SX4 is not set | ||
405 | # CONFIG_SCSI_SATA_SIL is not set | ||
406 | # CONFIG_SCSI_SATA_SIL24 is not set | ||
407 | # CONFIG_SCSI_SATA_SIS is not set | ||
408 | # CONFIG_SCSI_SATA_ULI is not set | ||
409 | # CONFIG_SCSI_SATA_VIA is not set | ||
410 | # CONFIG_SCSI_SATA_VITESSE is not set | ||
411 | # CONFIG_SCSI_BUSLOGIC is not set | ||
412 | # CONFIG_SCSI_DMX3191D is not set | ||
413 | # CONFIG_SCSI_EATA is not set | ||
414 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
415 | # CONFIG_SCSI_GDTH is not set | ||
416 | # CONFIG_SCSI_IPS is not set | ||
417 | # CONFIG_SCSI_INITIO is not set | ||
418 | # CONFIG_SCSI_INIA100 is not set | ||
419 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
420 | # CONFIG_SCSI_IPR is not set | ||
421 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
422 | # CONFIG_SCSI_QLA_FC is not set | ||
423 | # CONFIG_SCSI_LPFC is not set | ||
424 | # CONFIG_SCSI_DC395x is not set | ||
425 | # CONFIG_SCSI_DC390T is not set | ||
426 | # CONFIG_SCSI_NSP32 is not set | ||
427 | # CONFIG_SCSI_DEBUG is not set | ||
428 | |||
429 | # | ||
430 | # Multi-device support (RAID and LVM) | ||
431 | # | ||
432 | # CONFIG_MD is not set | ||
433 | |||
434 | # | ||
435 | # Fusion MPT device support | ||
436 | # | ||
437 | # CONFIG_FUSION is not set | ||
438 | # CONFIG_FUSION_SPI is not set | ||
439 | # CONFIG_FUSION_FC is not set | ||
440 | # CONFIG_FUSION_SAS is not set | ||
441 | |||
442 | # | ||
443 | # IEEE 1394 (FireWire) support | ||
444 | # | ||
445 | # CONFIG_IEEE1394 is not set | ||
446 | |||
447 | # | ||
448 | # I2O device support | ||
449 | # | ||
450 | # CONFIG_I2O is not set | ||
451 | |||
452 | # | ||
453 | # Macintosh device drivers | ||
454 | # | ||
455 | # CONFIG_WINDFARM is not set | ||
456 | |||
457 | # | ||
458 | # Network device support | ||
459 | # | ||
460 | CONFIG_NETDEVICES=y | ||
461 | # CONFIG_DUMMY is not set | ||
462 | # CONFIG_BONDING is not set | ||
463 | # CONFIG_EQUALIZER is not set | ||
464 | # CONFIG_TUN is not set | ||
465 | |||
466 | # | ||
467 | # ARCnet devices | ||
468 | # | ||
469 | # CONFIG_ARCNET is not set | ||
470 | |||
471 | # | ||
472 | # PHY device support | ||
473 | # | ||
474 | CONFIG_PHYLIB=y | ||
475 | |||
476 | # | ||
477 | # MII PHY device drivers | ||
478 | # | ||
479 | # CONFIG_MARVELL_PHY is not set | ||
480 | # CONFIG_DAVICOM_PHY is not set | ||
481 | # CONFIG_QSEMI_PHY is not set | ||
482 | # CONFIG_LXT_PHY is not set | ||
483 | # CONFIG_CICADA_PHY is not set | ||
484 | |||
485 | # | ||
486 | # Ethernet (10 or 100Mbit) | ||
487 | # | ||
488 | CONFIG_NET_ETHERNET=y | ||
489 | CONFIG_MII=y | ||
490 | # CONFIG_HAPPYMEAL is not set | ||
491 | # CONFIG_SUNGEM is not set | ||
492 | # CONFIG_CASSINI is not set | ||
493 | # CONFIG_NET_VENDOR_3COM is not set | ||
494 | |||
495 | # | ||
496 | # Tulip family network device support | ||
497 | # | ||
498 | # CONFIG_NET_TULIP is not set | ||
499 | # CONFIG_HP100 is not set | ||
500 | CONFIG_NET_PCI=y | ||
501 | # CONFIG_PCNET32 is not set | ||
502 | # CONFIG_AMD8111_ETH is not set | ||
503 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
504 | # CONFIG_B44 is not set | ||
505 | # CONFIG_FORCEDETH is not set | ||
506 | # CONFIG_DGRS is not set | ||
507 | # CONFIG_EEPRO100 is not set | ||
508 | CONFIG_E100=y | ||
509 | # CONFIG_FEALNX is not set | ||
510 | # CONFIG_NATSEMI is not set | ||
511 | # CONFIG_NE2K_PCI is not set | ||
512 | # CONFIG_8139CP is not set | ||
513 | CONFIG_8139TOO=y | ||
514 | # CONFIG_8139TOO_PIO is not set | ||
515 | # CONFIG_8139TOO_TUNE_TWISTER is not set | ||
516 | # CONFIG_8139TOO_8129 is not set | ||
517 | # CONFIG_8139_OLD_RX_RESET is not set | ||
518 | # CONFIG_SIS900 is not set | ||
519 | # CONFIG_EPIC100 is not set | ||
520 | # CONFIG_SUNDANCE is not set | ||
521 | # CONFIG_TLAN is not set | ||
522 | # CONFIG_VIA_RHINE is not set | ||
523 | |||
524 | # | ||
525 | # Ethernet (1000 Mbit) | ||
526 | # | ||
527 | # CONFIG_ACENIC is not set | ||
528 | # CONFIG_DL2K is not set | ||
529 | # CONFIG_E1000 is not set | ||
530 | # CONFIG_NS83820 is not set | ||
531 | # CONFIG_HAMACHI is not set | ||
532 | # CONFIG_YELLOWFIN is not set | ||
533 | # CONFIG_R8169 is not set | ||
534 | # CONFIG_SIS190 is not set | ||
535 | # CONFIG_SKGE is not set | ||
536 | # CONFIG_SKY2 is not set | ||
537 | # CONFIG_SK98LIN is not set | ||
538 | # CONFIG_VIA_VELOCITY is not set | ||
539 | # CONFIG_TIGON3 is not set | ||
540 | # CONFIG_BNX2 is not set | ||
541 | CONFIG_TSI108_ETH=y | ||
542 | |||
543 | # | ||
544 | # Ethernet (10000 Mbit) | ||
545 | # | ||
546 | # CONFIG_CHELSIO_T1 is not set | ||
547 | # CONFIG_IXGB is not set | ||
548 | # CONFIG_S2IO is not set | ||
549 | |||
550 | # | ||
551 | # Token Ring devices | ||
552 | # | ||
553 | # CONFIG_TR is not set | ||
554 | |||
555 | # | ||
556 | # Wireless LAN (non-hamradio) | ||
557 | # | ||
558 | # CONFIG_NET_RADIO is not set | ||
559 | |||
560 | # | ||
561 | # Wan interfaces | ||
562 | # | ||
563 | # CONFIG_WAN is not set | ||
564 | # CONFIG_FDDI is not set | ||
565 | # CONFIG_HIPPI is not set | ||
566 | # CONFIG_PPP is not set | ||
567 | # CONFIG_SLIP is not set | ||
568 | # CONFIG_NET_FC is not set | ||
569 | # CONFIG_SHAPER is not set | ||
570 | # CONFIG_NETCONSOLE is not set | ||
571 | # CONFIG_NETPOLL is not set | ||
572 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
573 | |||
574 | # | ||
575 | # ISDN subsystem | ||
576 | # | ||
577 | # CONFIG_ISDN is not set | ||
578 | |||
579 | # | ||
580 | # Telephony Support | ||
581 | # | ||
582 | # CONFIG_PHONE is not set | ||
583 | |||
584 | # | ||
585 | # Input device support | ||
586 | # | ||
587 | CONFIG_INPUT=y | ||
588 | |||
589 | # | ||
590 | # Userland interfaces | ||
591 | # | ||
592 | # CONFIG_INPUT_MOUSEDEV is not set | ||
593 | # CONFIG_INPUT_JOYDEV is not set | ||
594 | # CONFIG_INPUT_TSDEV is not set | ||
595 | # CONFIG_INPUT_EVDEV is not set | ||
596 | # CONFIG_INPUT_EVBUG is not set | ||
597 | |||
598 | # | ||
599 | # Input Device Drivers | ||
600 | # | ||
601 | # CONFIG_INPUT_KEYBOARD is not set | ||
602 | # CONFIG_INPUT_MOUSE is not set | ||
603 | # CONFIG_INPUT_JOYSTICK is not set | ||
604 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
605 | # CONFIG_INPUT_MISC is not set | ||
606 | |||
607 | # | ||
608 | # Hardware I/O ports | ||
609 | # | ||
610 | # CONFIG_SERIO is not set | ||
611 | # CONFIG_GAMEPORT is not set | ||
612 | |||
613 | # | ||
614 | # Character devices | ||
615 | # | ||
616 | # CONFIG_VT is not set | ||
617 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
618 | |||
619 | # | ||
620 | # Serial drivers | ||
621 | # | ||
622 | CONFIG_SERIAL_8250=y | ||
623 | CONFIG_SERIAL_8250_CONSOLE=y | ||
624 | CONFIG_SERIAL_8250_PCI=y | ||
625 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
626 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
627 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
628 | |||
629 | # | ||
630 | # Non-8250 serial port support | ||
631 | # | ||
632 | CONFIG_SERIAL_CORE=y | ||
633 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
634 | # CONFIG_SERIAL_JSM is not set | ||
635 | CONFIG_UNIX98_PTYS=y | ||
636 | CONFIG_LEGACY_PTYS=y | ||
637 | CONFIG_LEGACY_PTY_COUNT=256 | ||
638 | |||
639 | # | ||
640 | # IPMI | ||
641 | # | ||
642 | # CONFIG_IPMI_HANDLER is not set | ||
643 | |||
644 | # | ||
645 | # Watchdog Cards | ||
646 | # | ||
647 | # CONFIG_WATCHDOG is not set | ||
648 | # CONFIG_NVRAM is not set | ||
649 | CONFIG_GEN_RTC=y | ||
650 | # CONFIG_GEN_RTC_X is not set | ||
651 | # CONFIG_DTLK is not set | ||
652 | # CONFIG_R3964 is not set | ||
653 | # CONFIG_APPLICOM is not set | ||
654 | |||
655 | # | ||
656 | # Ftape, the floppy tape device driver | ||
657 | # | ||
658 | # CONFIG_AGP is not set | ||
659 | # CONFIG_DRM is not set | ||
660 | # CONFIG_RAW_DRIVER is not set | ||
661 | |||
662 | # | ||
663 | # TPM devices | ||
664 | # | ||
665 | # CONFIG_TCG_TPM is not set | ||
666 | # CONFIG_TELCLOCK is not set | ||
667 | |||
668 | # | ||
669 | # I2C support | ||
670 | # | ||
671 | # CONFIG_I2C is not set | ||
672 | |||
673 | # | ||
674 | # SPI support | ||
675 | # | ||
676 | # CONFIG_SPI is not set | ||
677 | # CONFIG_SPI_MASTER is not set | ||
678 | |||
679 | # | ||
680 | # Dallas's 1-wire bus | ||
681 | # | ||
682 | # CONFIG_W1 is not set | ||
683 | |||
684 | # | ||
685 | # Hardware Monitoring support | ||
686 | # | ||
687 | CONFIG_HWMON=y | ||
688 | # CONFIG_HWMON_VID is not set | ||
689 | # CONFIG_SENSORS_F71805F is not set | ||
690 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
691 | |||
692 | # | ||
693 | # Misc devices | ||
694 | # | ||
695 | |||
696 | # | ||
697 | # Multimedia devices | ||
698 | # | ||
699 | # CONFIG_VIDEO_DEV is not set | ||
700 | |||
701 | # | ||
702 | # Digital Video Broadcasting Devices | ||
703 | # | ||
704 | # CONFIG_DVB is not set | ||
705 | |||
706 | # | ||
707 | # Graphics support | ||
708 | # | ||
709 | # CONFIG_FB is not set | ||
710 | |||
711 | # | ||
712 | # Sound | ||
713 | # | ||
714 | # CONFIG_SOUND is not set | ||
715 | |||
716 | # | ||
717 | # USB support | ||
718 | # | ||
719 | CONFIG_USB_ARCH_HAS_HCD=y | ||
720 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
721 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
722 | # CONFIG_USB is not set | ||
723 | |||
724 | # | ||
725 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
726 | # | ||
727 | |||
728 | # | ||
729 | # USB Gadget Support | ||
730 | # | ||
731 | # CONFIG_USB_GADGET is not set | ||
732 | |||
733 | # | ||
734 | # MMC/SD Card support | ||
735 | # | ||
736 | # CONFIG_MMC is not set | ||
737 | |||
738 | # | ||
739 | # LED devices | ||
740 | # | ||
741 | # CONFIG_NEW_LEDS is not set | ||
742 | |||
743 | # | ||
744 | # LED drivers | ||
745 | # | ||
746 | |||
747 | # | ||
748 | # LED Triggers | ||
749 | # | ||
750 | |||
751 | # | ||
752 | # InfiniBand support | ||
753 | # | ||
754 | # CONFIG_INFINIBAND is not set | ||
755 | |||
756 | # | ||
757 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
758 | # | ||
759 | |||
760 | # | ||
761 | # Real Time Clock | ||
762 | # | ||
763 | # CONFIG_RTC_CLASS is not set | ||
764 | |||
765 | # | ||
766 | # File systems | ||
767 | # | ||
768 | CONFIG_EXT2_FS=y | ||
769 | # CONFIG_EXT2_FS_XATTR is not set | ||
770 | # CONFIG_EXT2_FS_XIP is not set | ||
771 | CONFIG_EXT3_FS=y | ||
772 | CONFIG_EXT3_FS_XATTR=y | ||
773 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
774 | # CONFIG_EXT3_FS_SECURITY is not set | ||
775 | CONFIG_JBD=y | ||
776 | # CONFIG_JBD_DEBUG is not set | ||
777 | CONFIG_FS_MBCACHE=y | ||
778 | # CONFIG_REISERFS_FS is not set | ||
779 | # CONFIG_JFS_FS is not set | ||
780 | # CONFIG_FS_POSIX_ACL is not set | ||
781 | # CONFIG_XFS_FS is not set | ||
782 | # CONFIG_OCFS2_FS is not set | ||
783 | # CONFIG_MINIX_FS is not set | ||
784 | # CONFIG_ROMFS_FS is not set | ||
785 | CONFIG_INOTIFY=y | ||
786 | # CONFIG_QUOTA is not set | ||
787 | CONFIG_DNOTIFY=y | ||
788 | # CONFIG_AUTOFS_FS is not set | ||
789 | # CONFIG_AUTOFS4_FS is not set | ||
790 | # CONFIG_FUSE_FS is not set | ||
791 | |||
792 | # | ||
793 | # CD-ROM/DVD Filesystems | ||
794 | # | ||
795 | # CONFIG_ISO9660_FS is not set | ||
796 | # CONFIG_UDF_FS is not set | ||
797 | |||
798 | # | ||
799 | # DOS/FAT/NT Filesystems | ||
800 | # | ||
801 | # CONFIG_MSDOS_FS is not set | ||
802 | # CONFIG_VFAT_FS is not set | ||
803 | # CONFIG_NTFS_FS is not set | ||
804 | |||
805 | # | ||
806 | # Pseudo filesystems | ||
807 | # | ||
808 | CONFIG_PROC_FS=y | ||
809 | CONFIG_PROC_KCORE=y | ||
810 | CONFIG_SYSFS=y | ||
811 | CONFIG_TMPFS=y | ||
812 | # CONFIG_HUGETLB_PAGE is not set | ||
813 | CONFIG_RAMFS=y | ||
814 | # CONFIG_CONFIGFS_FS is not set | ||
815 | |||
816 | # | ||
817 | # Miscellaneous filesystems | ||
818 | # | ||
819 | # CONFIG_ADFS_FS is not set | ||
820 | # CONFIG_AFFS_FS is not set | ||
821 | # CONFIG_HFS_FS is not set | ||
822 | # CONFIG_HFSPLUS_FS is not set | ||
823 | # CONFIG_BEFS_FS is not set | ||
824 | # CONFIG_BFS_FS is not set | ||
825 | # CONFIG_EFS_FS is not set | ||
826 | # CONFIG_CRAMFS is not set | ||
827 | # CONFIG_VXFS_FS is not set | ||
828 | # CONFIG_HPFS_FS is not set | ||
829 | # CONFIG_QNX4FS_FS is not set | ||
830 | # CONFIG_SYSV_FS is not set | ||
831 | # CONFIG_UFS_FS is not set | ||
832 | |||
833 | # | ||
834 | # Network File Systems | ||
835 | # | ||
836 | CONFIG_NFS_FS=y | ||
837 | # CONFIG_NFS_V3 is not set | ||
838 | # CONFIG_NFS_V4 is not set | ||
839 | # CONFIG_NFS_DIRECTIO is not set | ||
840 | # CONFIG_NFSD is not set | ||
841 | CONFIG_ROOT_NFS=y | ||
842 | CONFIG_LOCKD=y | ||
843 | CONFIG_NFS_COMMON=y | ||
844 | CONFIG_SUNRPC=y | ||
845 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
846 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
847 | # CONFIG_SMB_FS is not set | ||
848 | # CONFIG_CIFS is not set | ||
849 | # CONFIG_NCP_FS is not set | ||
850 | # CONFIG_CODA_FS is not set | ||
851 | # CONFIG_AFS_FS is not set | ||
852 | # CONFIG_9P_FS is not set | ||
853 | |||
854 | # | ||
855 | # Partition Types | ||
856 | # | ||
857 | CONFIG_PARTITION_ADVANCED=y | ||
858 | # CONFIG_ACORN_PARTITION is not set | ||
859 | # CONFIG_OSF_PARTITION is not set | ||
860 | # CONFIG_AMIGA_PARTITION is not set | ||
861 | # CONFIG_ATARI_PARTITION is not set | ||
862 | # CONFIG_MAC_PARTITION is not set | ||
863 | CONFIG_MSDOS_PARTITION=y | ||
864 | # CONFIG_BSD_DISKLABEL is not set | ||
865 | # CONFIG_MINIX_SUBPARTITION is not set | ||
866 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
867 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
868 | # CONFIG_LDM_PARTITION is not set | ||
869 | # CONFIG_SGI_PARTITION is not set | ||
870 | # CONFIG_ULTRIX_PARTITION is not set | ||
871 | # CONFIG_SUN_PARTITION is not set | ||
872 | # CONFIG_KARMA_PARTITION is not set | ||
873 | # CONFIG_EFI_PARTITION is not set | ||
874 | |||
875 | # | ||
876 | # Native Language Support | ||
877 | # | ||
878 | # CONFIG_NLS is not set | ||
879 | |||
880 | # | ||
881 | # Library routines | ||
882 | # | ||
883 | # CONFIG_CRC_CCITT is not set | ||
884 | # CONFIG_CRC16 is not set | ||
885 | CONFIG_CRC32=y | ||
886 | # CONFIG_LIBCRC32C is not set | ||
887 | |||
888 | # | ||
889 | # Instrumentation Support | ||
890 | # | ||
891 | # CONFIG_PROFILING is not set | ||
892 | |||
893 | # | ||
894 | # Kernel hacking | ||
895 | # | ||
896 | # CONFIG_PRINTK_TIME is not set | ||
897 | # CONFIG_MAGIC_SYSRQ is not set | ||
898 | # CONFIG_DEBUG_KERNEL is not set | ||
899 | CONFIG_LOG_BUF_SHIFT=14 | ||
900 | # CONFIG_DEBUG_FS is not set | ||
901 | # CONFIG_UNWIND_INFO is not set | ||
902 | # CONFIG_BOOTX_TEXT is not set | ||
903 | # CONFIG_SERIAL_TEXT_DEBUG is not set | ||
904 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | ||
905 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
906 | # CONFIG_PPC_EARLY_DEBUG_RTAS is not set | ||
907 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
908 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
909 | |||
910 | # | ||
911 | # Security options | ||
912 | # | ||
913 | # CONFIG_KEYS is not set | ||
914 | # CONFIG_SECURITY is not set | ||
915 | |||
916 | # | ||
917 | # Cryptographic options | ||
918 | # | ||
919 | # CONFIG_CRYPTO is not set | ||
920 | |||
921 | # | ||
922 | # Hardware crypto devices | ||
923 | # | ||
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 803858e86160..814f242aeb8c 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -50,7 +50,8 @@ extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o | |||
50 | extra-$(CONFIG_8xx) := head_8xx.o | 50 | extra-$(CONFIG_8xx) := head_8xx.o |
51 | extra-y += vmlinux.lds | 51 | extra-y += vmlinux.lds |
52 | 52 | ||
53 | obj-y += time.o prom.o traps.o setup-common.o udbg.o | 53 | obj-y += time.o prom.o traps.o setup-common.o \ |
54 | udbg.o misc.o | ||
54 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o misc_32.o | 55 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o misc_32.o |
55 | obj-$(CONFIG_PPC64) += misc_64.o dma_64.o iommu.o | 56 | obj-$(CONFIG_PPC64) += misc_64.o dma_64.o iommu.o |
56 | obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o | 57 | obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o |
diff --git a/arch/powerpc/kernel/cpu_setup_power4.S b/arch/powerpc/kernel/cpu_setup_power4.S index 271418308d53..1fc863261003 100644 --- a/arch/powerpc/kernel/cpu_setup_power4.S +++ b/arch/powerpc/kernel/cpu_setup_power4.S | |||
@@ -125,7 +125,12 @@ _GLOBAL(__save_cpu_setup) | |||
125 | cmpwi r0,0x44 | 125 | cmpwi r0,0x44 |
126 | bne 2f | 126 | bne 2f |
127 | 127 | ||
128 | 1: /* Save HID0,1,4 and 5 */ | 128 | 1: /* skip if not running in HV mode */ |
129 | mfmsr r0 | ||
130 | rldicl. r0,r0,4,63 | ||
131 | beq 2f | ||
132 | |||
133 | /* Save HID0,1,4 and 5 */ | ||
129 | mfspr r3,SPRN_HID0 | 134 | mfspr r3,SPRN_HID0 |
130 | std r3,CS_HID0(r5) | 135 | std r3,CS_HID0(r5) |
131 | mfspr r3,SPRN_HID1 | 136 | mfspr r3,SPRN_HID1 |
@@ -159,7 +164,12 @@ _GLOBAL(__restore_cpu_setup) | |||
159 | cmpwi r0,0x44 | 164 | cmpwi r0,0x44 |
160 | bnelr | 165 | bnelr |
161 | 166 | ||
162 | 1: /* Before accessing memory, we make sure rm_ci is clear */ | 167 | 1: /* skip if not running in HV mode */ |
168 | mfmsr r0 | ||
169 | rldicl. r0,r0,4,63 | ||
170 | beqlr | ||
171 | |||
172 | /* Before accessing memory, we make sure rm_ci is clear */ | ||
163 | li r0,0 | 173 | li r0,0 |
164 | mfspr r3,SPRN_HID4 | 174 | mfspr r3,SPRN_HID4 |
165 | rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */ | 175 | rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */ |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 1c114880dc05..abf7d42a8b07 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -722,18 +722,6 @@ struct cpu_spec cpu_specs[] = { | |||
722 | .oprofile_type = PPC_OPROFILE_G4, | 722 | .oprofile_type = PPC_OPROFILE_G4, |
723 | .platform = "ppc7450", | 723 | .platform = "ppc7450", |
724 | }, | 724 | }, |
725 | { /* 8641 */ | ||
726 | .pvr_mask = 0xffffffff, | ||
727 | .pvr_value = 0x80040010, | ||
728 | .cpu_name = "8641", | ||
729 | .cpu_features = CPU_FTRS_7447A, | ||
730 | .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP, | ||
731 | .icache_bsize = 32, | ||
732 | .dcache_bsize = 32, | ||
733 | .num_pmcs = 6, | ||
734 | .cpu_setup = __setup_cpu_745x | ||
735 | }, | ||
736 | |||
737 | { /* 82xx (8240, 8245, 8260 are all 603e cores) */ | 725 | { /* 82xx (8240, 8245, 8260 are all 603e cores) */ |
738 | .pvr_mask = 0x7fff0000, | 726 | .pvr_mask = 0x7fff0000, |
739 | .pvr_value = 0x00810000, | 727 | .pvr_value = 0x00810000, |
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index e253a45dcf10..358cecdc6aef 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c | |||
@@ -24,9 +24,11 @@ | |||
24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
25 | #include <linux/irq.h> | 25 | #include <linux/irq.h> |
26 | #include <linux/types.h> | 26 | #include <linux/types.h> |
27 | #include <linux/irq.h> | ||
27 | 28 | ||
28 | #include <asm/processor.h> | 29 | #include <asm/processor.h> |
29 | #include <asm/machdep.h> | 30 | #include <asm/machdep.h> |
31 | #include <asm/kexec.h> | ||
30 | #include <asm/kdump.h> | 32 | #include <asm/kdump.h> |
31 | #include <asm/lmb.h> | 33 | #include <asm/lmb.h> |
32 | #include <asm/firmware.h> | 34 | #include <asm/firmware.h> |
@@ -41,6 +43,7 @@ | |||
41 | 43 | ||
42 | /* This keeps a track of which one is crashing cpu. */ | 44 | /* This keeps a track of which one is crashing cpu. */ |
43 | int crashing_cpu = -1; | 45 | int crashing_cpu = -1; |
46 | static cpumask_t cpus_in_crash = CPU_MASK_NONE; | ||
44 | 47 | ||
45 | static u32 *append_elf_note(u32 *buf, char *name, unsigned type, void *data, | 48 | static u32 *append_elf_note(u32 *buf, char *name, unsigned type, void *data, |
46 | size_t data_len) | 49 | size_t data_len) |
@@ -98,34 +101,66 @@ static void crash_save_this_cpu(struct pt_regs *regs, int cpu) | |||
98 | } | 101 | } |
99 | 102 | ||
100 | #ifdef CONFIG_SMP | 103 | #ifdef CONFIG_SMP |
101 | static atomic_t waiting_for_crash_ipi; | 104 | static atomic_t enter_on_soft_reset = ATOMIC_INIT(0); |
102 | 105 | ||
103 | void crash_ipi_callback(struct pt_regs *regs) | 106 | void crash_ipi_callback(struct pt_regs *regs) |
104 | { | 107 | { |
105 | int cpu = smp_processor_id(); | 108 | int cpu = smp_processor_id(); |
106 | 109 | ||
107 | if (cpu == crashing_cpu) | ||
108 | return; | ||
109 | |||
110 | if (!cpu_online(cpu)) | 110 | if (!cpu_online(cpu)) |
111 | return; | 111 | return; |
112 | 112 | ||
113 | if (ppc_md.kexec_cpu_down) | ||
114 | ppc_md.kexec_cpu_down(1, 1); | ||
115 | |||
116 | local_irq_disable(); | 113 | local_irq_disable(); |
114 | if (!cpu_isset(cpu, cpus_in_crash)) | ||
115 | crash_save_this_cpu(regs, cpu); | ||
116 | cpu_set(cpu, cpus_in_crash); | ||
117 | 117 | ||
118 | crash_save_this_cpu(regs, cpu); | 118 | /* |
119 | atomic_dec(&waiting_for_crash_ipi); | 119 | * Entered via soft-reset - could be the kdump |
120 | * process is invoked using soft-reset or user activated | ||
121 | * it if some CPU did not respond to an IPI. | ||
122 | * For soft-reset, the secondary CPU can enter this func | ||
123 | * twice. 1 - using IPI, and 2. soft-reset. | ||
124 | * Tell the kexec CPU that entered via soft-reset and ready | ||
125 | * to go down. | ||
126 | */ | ||
127 | if (cpu_isset(cpu, cpus_in_sr)) { | ||
128 | cpu_clear(cpu, cpus_in_sr); | ||
129 | atomic_inc(&enter_on_soft_reset); | ||
130 | } | ||
131 | |||
132 | /* | ||
133 | * Starting the kdump boot. | ||
134 | * This barrier is needed to make sure that all CPUs are stopped. | ||
135 | * If not, soft-reset will be invoked to bring other CPUs. | ||
136 | */ | ||
137 | while (!cpu_isset(crashing_cpu, cpus_in_crash)) | ||
138 | cpu_relax(); | ||
139 | |||
140 | if (ppc_md.kexec_cpu_down) | ||
141 | ppc_md.kexec_cpu_down(1, 1); | ||
120 | kexec_smp_wait(); | 142 | kexec_smp_wait(); |
121 | /* NOTREACHED */ | 143 | /* NOTREACHED */ |
122 | } | 144 | } |
123 | 145 | ||
124 | static void crash_kexec_prepare_cpus(void) | 146 | /* |
147 | * Wait until all CPUs are entered via soft-reset. | ||
148 | */ | ||
149 | static void crash_soft_reset_check(int cpu) | ||
150 | { | ||
151 | unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */ | ||
152 | |||
153 | cpu_clear(cpu, cpus_in_sr); | ||
154 | while (atomic_read(&enter_on_soft_reset) != ncpus) | ||
155 | cpu_relax(); | ||
156 | } | ||
157 | |||
158 | |||
159 | static void crash_kexec_prepare_cpus(int cpu) | ||
125 | { | 160 | { |
126 | unsigned int msecs; | 161 | unsigned int msecs; |
127 | 162 | ||
128 | atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); | 163 | unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */ |
129 | 164 | ||
130 | crash_send_ipi(crash_ipi_callback); | 165 | crash_send_ipi(crash_ipi_callback); |
131 | smp_wmb(); | 166 | smp_wmb(); |
@@ -133,14 +168,13 @@ static void crash_kexec_prepare_cpus(void) | |||
133 | /* | 168 | /* |
134 | * FIXME: Until we will have the way to stop other CPUSs reliabally, | 169 | * FIXME: Until we will have the way to stop other CPUSs reliabally, |
135 | * the crash CPU will send an IPI and wait for other CPUs to | 170 | * the crash CPU will send an IPI and wait for other CPUs to |
136 | * respond. If not, proceed the kexec boot even though we failed to | 171 | * respond. |
137 | * capture other CPU states. | ||
138 | * Delay of at least 10 seconds. | 172 | * Delay of at least 10 seconds. |
139 | */ | 173 | */ |
140 | printk(KERN_ALERT "Sending IPI to other cpus...\n"); | 174 | printk(KERN_EMERG "Sending IPI to other cpus...\n"); |
141 | msecs = 10000; | 175 | msecs = 10000; |
142 | while ((atomic_read(&waiting_for_crash_ipi) > 0) && (--msecs > 0)) { | 176 | while ((cpus_weight(cpus_in_crash) < ncpus) && (--msecs > 0)) { |
143 | barrier(); | 177 | cpu_relax(); |
144 | mdelay(1); | 178 | mdelay(1); |
145 | } | 179 | } |
146 | 180 | ||
@@ -149,18 +183,71 @@ static void crash_kexec_prepare_cpus(void) | |||
149 | /* | 183 | /* |
150 | * FIXME: In case if we do not get all CPUs, one possibility: ask the | 184 | * FIXME: In case if we do not get all CPUs, one possibility: ask the |
151 | * user to do soft reset such that we get all. | 185 | * user to do soft reset such that we get all. |
152 | * IPI handler is already set by the panic cpu initially. Therefore, | 186 | * Soft-reset will be used until better mechanism is implemented. |
153 | * all cpus could invoke this handler from die() and the panic CPU | 187 | */ |
154 | * will call machine_kexec() directly from this handler to do | 188 | if (cpus_weight(cpus_in_crash) < ncpus) { |
155 | * kexec boot. | 189 | printk(KERN_EMERG "done waiting: %d cpu(s) not responding\n", |
190 | ncpus - cpus_weight(cpus_in_crash)); | ||
191 | printk(KERN_EMERG "Activate soft-reset to stop other cpu(s)\n"); | ||
192 | cpus_in_sr = CPU_MASK_NONE; | ||
193 | atomic_set(&enter_on_soft_reset, 0); | ||
194 | while (cpus_weight(cpus_in_crash) < ncpus) | ||
195 | cpu_relax(); | ||
196 | } | ||
197 | /* | ||
198 | * Make sure all CPUs are entered via soft-reset if the kdump is | ||
199 | * invoked using soft-reset. | ||
156 | */ | 200 | */ |
157 | if (atomic_read(&waiting_for_crash_ipi)) | 201 | if (cpu_isset(cpu, cpus_in_sr)) |
158 | printk(KERN_ALERT "done waiting: %d cpus not responding\n", | 202 | crash_soft_reset_check(cpu); |
159 | atomic_read(&waiting_for_crash_ipi)); | ||
160 | /* Leave the IPI callback set */ | 203 | /* Leave the IPI callback set */ |
161 | } | 204 | } |
205 | |||
206 | /* | ||
207 | * This function will be called by secondary cpus or by kexec cpu | ||
208 | * if soft-reset is activated to stop some CPUs. | ||
209 | */ | ||
210 | void crash_kexec_secondary(struct pt_regs *regs) | ||
211 | { | ||
212 | int cpu = smp_processor_id(); | ||
213 | unsigned long flags; | ||
214 | int msecs = 5; | ||
215 | |||
216 | local_irq_save(flags); | ||
217 | /* Wait 5ms if the kexec CPU is not entered yet. */ | ||
218 | while (crashing_cpu < 0) { | ||
219 | if (--msecs < 0) { | ||
220 | /* | ||
221 | * Either kdump image is not loaded or | ||
222 | * kdump process is not started - Probably xmon | ||
223 | * exited using 'x'(exit and recover) or | ||
224 | * kexec_should_crash() failed for all running tasks. | ||
225 | */ | ||
226 | cpu_clear(cpu, cpus_in_sr); | ||
227 | local_irq_restore(flags); | ||
228 | return; | ||
229 | } | ||
230 | mdelay(1); | ||
231 | cpu_relax(); | ||
232 | } | ||
233 | if (cpu == crashing_cpu) { | ||
234 | /* | ||
235 | * Panic CPU will enter this func only via soft-reset. | ||
236 | * Wait until all secondary CPUs entered and | ||
237 | * then start kexec boot. | ||
238 | */ | ||
239 | crash_soft_reset_check(cpu); | ||
240 | cpu_set(crashing_cpu, cpus_in_crash); | ||
241 | if (ppc_md.kexec_cpu_down) | ||
242 | ppc_md.kexec_cpu_down(1, 0); | ||
243 | machine_kexec(kexec_crash_image); | ||
244 | /* NOTREACHED */ | ||
245 | } | ||
246 | crash_ipi_callback(regs); | ||
247 | } | ||
248 | |||
162 | #else | 249 | #else |
163 | static void crash_kexec_prepare_cpus(void) | 250 | static void crash_kexec_prepare_cpus(int cpu) |
164 | { | 251 | { |
165 | /* | 252 | /* |
166 | * move the secondarys to us so that we can copy | 253 | * move the secondarys to us so that we can copy |
@@ -171,6 +258,10 @@ static void crash_kexec_prepare_cpus(void) | |||
171 | smp_release_cpus(); | 258 | smp_release_cpus(); |
172 | } | 259 | } |
173 | 260 | ||
261 | void crash_kexec_secondary(struct pt_regs *regs) | ||
262 | { | ||
263 | cpus_in_sr = CPU_MASK_NONE; | ||
264 | } | ||
174 | #endif | 265 | #endif |
175 | 266 | ||
176 | void default_machine_crash_shutdown(struct pt_regs *regs) | 267 | void default_machine_crash_shutdown(struct pt_regs *regs) |
@@ -190,23 +281,23 @@ void default_machine_crash_shutdown(struct pt_regs *regs) | |||
190 | local_irq_disable(); | 281 | local_irq_disable(); |
191 | 282 | ||
192 | for_each_irq(irq) { | 283 | for_each_irq(irq) { |
193 | struct irq_desc *desc = irq_descp(irq); | 284 | struct irq_desc *desc = irq_desc + irq; |
194 | 285 | ||
195 | if (desc->status & IRQ_INPROGRESS) | 286 | if (desc->status & IRQ_INPROGRESS) |
196 | desc->handler->end(irq); | 287 | desc->chip->end(irq); |
197 | 288 | ||
198 | if (!(desc->status & IRQ_DISABLED)) | 289 | if (!(desc->status & IRQ_DISABLED)) |
199 | desc->handler->disable(irq); | 290 | desc->chip->disable(irq); |
200 | } | 291 | } |
201 | 292 | ||
202 | if (ppc_md.kexec_cpu_down) | ||
203 | ppc_md.kexec_cpu_down(1, 0); | ||
204 | |||
205 | /* | 293 | /* |
206 | * Make a note of crashing cpu. Will be used in machine_kexec | 294 | * Make a note of crashing cpu. Will be used in machine_kexec |
207 | * such that another IPI will not be sent. | 295 | * such that another IPI will not be sent. |
208 | */ | 296 | */ |
209 | crashing_cpu = smp_processor_id(); | 297 | crashing_cpu = smp_processor_id(); |
210 | crash_kexec_prepare_cpus(); | ||
211 | crash_save_this_cpu(regs, crashing_cpu); | 298 | crash_save_this_cpu(regs, crashing_cpu); |
299 | crash_kexec_prepare_cpus(crashing_cpu); | ||
300 | cpu_set(crashing_cpu, cpus_in_crash); | ||
301 | if (ppc_md.kexec_cpu_down) | ||
302 | ppc_md.kexec_cpu_down(1, 0); | ||
212 | } | 303 | } |
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 831acbdf2592..8cfd040d1f50 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
@@ -85,34 +85,6 @@ END_FTR_SECTION(0, 1) | |||
85 | /* Catch branch to 0 in real mode */ | 85 | /* Catch branch to 0 in real mode */ |
86 | trap | 86 | trap |
87 | 87 | ||
88 | #ifdef CONFIG_PPC_ISERIES | ||
89 | /* | ||
90 | * At offset 0x20, there is a pointer to iSeries LPAR data. | ||
91 | * This is required by the hypervisor | ||
92 | */ | ||
93 | . = 0x20 | ||
94 | .llong hvReleaseData-KERNELBASE | ||
95 | |||
96 | /* | ||
97 | * At offset 0x28 and 0x30 are offsets to the mschunks_map | ||
98 | * array (used by the iSeries LPAR debugger to do translation | ||
99 | * between physical addresses and absolute addresses) and | ||
100 | * to the pidhash table (also used by the debugger) | ||
101 | */ | ||
102 | .llong mschunks_map-KERNELBASE | ||
103 | .llong 0 /* pidhash-KERNELBASE SFRXXX */ | ||
104 | |||
105 | /* Offset 0x38 - Pointer to start of embedded System.map */ | ||
106 | .globl embedded_sysmap_start | ||
107 | embedded_sysmap_start: | ||
108 | .llong 0 | ||
109 | /* Offset 0x40 - Pointer to end of embedded System.map */ | ||
110 | .globl embedded_sysmap_end | ||
111 | embedded_sysmap_end: | ||
112 | .llong 0 | ||
113 | |||
114 | #endif /* CONFIG_PPC_ISERIES */ | ||
115 | |||
116 | /* Secondary processors spin on this value until it goes to 1. */ | 88 | /* Secondary processors spin on this value until it goes to 1. */ |
117 | .globl __secondary_hold_spinloop | 89 | .globl __secondary_hold_spinloop |
118 | __secondary_hold_spinloop: | 90 | __secondary_hold_spinloop: |
@@ -124,6 +96,15 @@ __secondary_hold_spinloop: | |||
124 | __secondary_hold_acknowledge: | 96 | __secondary_hold_acknowledge: |
125 | .llong 0x0 | 97 | .llong 0x0 |
126 | 98 | ||
99 | #ifdef CONFIG_PPC_ISERIES | ||
100 | /* | ||
101 | * At offset 0x20, there is a pointer to iSeries LPAR data. | ||
102 | * This is required by the hypervisor | ||
103 | */ | ||
104 | . = 0x20 | ||
105 | .llong hvReleaseData-KERNELBASE | ||
106 | #endif /* CONFIG_PPC_ISERIES */ | ||
107 | |||
127 | . = 0x60 | 108 | . = 0x60 |
128 | /* | 109 | /* |
129 | * The following code is used on pSeries to hold secondary processors | 110 | * The following code is used on pSeries to hold secondary processors |
@@ -1602,9 +1583,6 @@ _GLOBAL(__start_initialization_multiplatform) | |||
1602 | /* Setup some critical 970 SPRs before switching MMU off */ | 1583 | /* Setup some critical 970 SPRs before switching MMU off */ |
1603 | bl .__970_cpu_preinit | 1584 | bl .__970_cpu_preinit |
1604 | 1585 | ||
1605 | /* cpu # */ | ||
1606 | li r24,0 | ||
1607 | |||
1608 | /* Switch off MMU if not already */ | 1586 | /* Switch off MMU if not already */ |
1609 | LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE) | 1587 | LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE) |
1610 | add r4,r4,r30 | 1588 | add r4,r4,r30 |
@@ -1683,6 +1661,9 @@ _STATIC(__after_prom_start) | |||
1683 | /* i.e. where we are running */ | 1661 | /* i.e. where we are running */ |
1684 | /* the source addr */ | 1662 | /* the source addr */ |
1685 | 1663 | ||
1664 | cmpdi r4,0 /* In some cases the loader may */ | ||
1665 | beq .start_here_multiplatform /* have already put us at zero */ | ||
1666 | /* so we can skip the copy. */ | ||
1686 | LOAD_REG_IMMEDIATE(r5,copy_to_here) /* # bytes of memory to copy */ | 1667 | LOAD_REG_IMMEDIATE(r5,copy_to_here) /* # bytes of memory to copy */ |
1687 | sub r5,r5,r27 | 1668 | sub r5,r5,r27 |
1688 | 1669 | ||
@@ -1962,14 +1943,6 @@ _STATIC(start_here_common) | |||
1962 | li r3,0 | 1943 | li r3,0 |
1963 | bl .do_cpu_ftr_fixups | 1944 | bl .do_cpu_ftr_fixups |
1964 | 1945 | ||
1965 | LOAD_REG_IMMEDIATE(r26, boot_cpuid) | ||
1966 | lwz r26,0(r26) | ||
1967 | |||
1968 | LOAD_REG_IMMEDIATE(r24, paca) /* Get base vaddr of paca array */ | ||
1969 | mulli r13,r26,PACA_SIZE /* Calculate vaddr of right paca */ | ||
1970 | add r13,r13,r24 /* for this processor. */ | ||
1971 | mtspr SPRN_SPRG3,r13 | ||
1972 | |||
1973 | /* ptr to current */ | 1946 | /* ptr to current */ |
1974 | LOAD_REG_IMMEDIATE(r4, init_task) | 1947 | LOAD_REG_IMMEDIATE(r4, init_task) |
1975 | std r4,PACACURRENT(r13) | 1948 | std r4,PACACURRENT(r13) |
@@ -1995,17 +1968,6 @@ _STATIC(start_here_common) | |||
1995 | /* Not reached */ | 1968 | /* Not reached */ |
1996 | BUG_OPCODE | 1969 | BUG_OPCODE |
1997 | 1970 | ||
1998 | /* Put the paca pointer into r13 and SPRG3 */ | ||
1999 | _GLOBAL(setup_boot_paca) | ||
2000 | LOAD_REG_IMMEDIATE(r3, boot_cpuid) | ||
2001 | lwz r3,0(r3) | ||
2002 | LOAD_REG_IMMEDIATE(r4, paca) /* Get base vaddr of paca array */ | ||
2003 | mulli r3,r3,PACA_SIZE /* Calculate vaddr of right paca */ | ||
2004 | add r13,r3,r4 /* for this processor. */ | ||
2005 | mtspr SPRN_SPRG3,r13 | ||
2006 | |||
2007 | blr | ||
2008 | |||
2009 | /* | 1971 | /* |
2010 | * We put a few things here that have to be page-aligned. | 1972 | * We put a few things here that have to be page-aligned. |
2011 | * This stuff goes at the beginning of the bss, which is page-aligned. | 1973 | * This stuff goes at the beginning of the bss, which is page-aligned. |
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c index 7cb77c20fc5d..3d677ac99659 100644 --- a/arch/powerpc/kernel/iommu.c +++ b/arch/powerpc/kernel/iommu.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <asm/iommu.h> | 38 | #include <asm/iommu.h> |
39 | #include <asm/pci-bridge.h> | 39 | #include <asm/pci-bridge.h> |
40 | #include <asm/machdep.h> | 40 | #include <asm/machdep.h> |
41 | #include <asm/kdump.h> | ||
41 | 42 | ||
42 | #define DBG(...) | 43 | #define DBG(...) |
43 | 44 | ||
@@ -440,8 +441,37 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid) | |||
440 | tbl->it_largehint = tbl->it_halfpoint; | 441 | tbl->it_largehint = tbl->it_halfpoint; |
441 | spin_lock_init(&tbl->it_lock); | 442 | spin_lock_init(&tbl->it_lock); |
442 | 443 | ||
444 | #ifdef CONFIG_CRASH_DUMP | ||
445 | if (ppc_md.tce_get) { | ||
446 | unsigned long index, tceval; | ||
447 | unsigned long tcecount = 0; | ||
448 | |||
449 | /* | ||
450 | * Reserve the existing mappings left by the first kernel. | ||
451 | */ | ||
452 | for (index = 0; index < tbl->it_size; index++) { | ||
453 | tceval = ppc_md.tce_get(tbl, index + tbl->it_offset); | ||
454 | /* | ||
455 | * Freed TCE entry contains 0x7fffffffffffffff on JS20 | ||
456 | */ | ||
457 | if (tceval && (tceval != 0x7fffffffffffffffUL)) { | ||
458 | __set_bit(index, tbl->it_map); | ||
459 | tcecount++; | ||
460 | } | ||
461 | } | ||
462 | if ((tbl->it_size - tcecount) < KDUMP_MIN_TCE_ENTRIES) { | ||
463 | printk(KERN_WARNING "TCE table is full; "); | ||
464 | printk(KERN_WARNING "freeing %d entries for the kdump boot\n", | ||
465 | KDUMP_MIN_TCE_ENTRIES); | ||
466 | for (index = tbl->it_size - KDUMP_MIN_TCE_ENTRIES; | ||
467 | index < tbl->it_size; index++) | ||
468 | __clear_bit(index, tbl->it_map); | ||
469 | } | ||
470 | } | ||
471 | #else | ||
443 | /* Clear the hardware table in case firmware left allocations in it */ | 472 | /* Clear the hardware table in case firmware left allocations in it */ |
444 | ppc_md.tce_free(tbl, tbl->it_offset, tbl->it_size); | 473 | ppc_md.tce_free(tbl, tbl->it_offset, tbl->it_size); |
474 | #endif | ||
445 | 475 | ||
446 | if (!welcomed) { | 476 | if (!welcomed) { |
447 | printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n", | 477 | printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n", |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 40d4c14fde8f..24f6050aa4ab 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -120,8 +120,8 @@ int show_interrupts(struct seq_file *p, void *v) | |||
120 | #else | 120 | #else |
121 | seq_printf(p, "%10u ", kstat_irqs(i)); | 121 | seq_printf(p, "%10u ", kstat_irqs(i)); |
122 | #endif /* CONFIG_SMP */ | 122 | #endif /* CONFIG_SMP */ |
123 | if (desc->handler) | 123 | if (desc->chip) |
124 | seq_printf(p, " %s ", desc->handler->typename); | 124 | seq_printf(p, " %s ", desc->chip->typename); |
125 | else | 125 | else |
126 | seq_puts(p, " None "); | 126 | seq_puts(p, " None "); |
127 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); | 127 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
@@ -164,13 +164,13 @@ void fixup_irqs(cpumask_t map) | |||
164 | if (irq_desc[irq].status & IRQ_PER_CPU) | 164 | if (irq_desc[irq].status & IRQ_PER_CPU) |
165 | continue; | 165 | continue; |
166 | 166 | ||
167 | cpus_and(mask, irq_affinity[irq], map); | 167 | cpus_and(mask, irq_desc[irq].affinity, map); |
168 | if (any_online_cpu(mask) == NR_CPUS) { | 168 | if (any_online_cpu(mask) == NR_CPUS) { |
169 | printk("Breaking affinity for irq %i\n", irq); | 169 | printk("Breaking affinity for irq %i\n", irq); |
170 | mask = map; | 170 | mask = map; |
171 | } | 171 | } |
172 | if (irq_desc[irq].handler->set_affinity) | 172 | if (irq_desc[irq].chip->set_affinity) |
173 | irq_desc[irq].handler->set_affinity(irq, mask); | 173 | irq_desc[irq].chip->set_affinity(irq, mask); |
174 | else if (irq_desc[irq].action && !(warned++)) | 174 | else if (irq_desc[irq].action && !(warned++)) |
175 | printk("Cannot set affinity for irq %i\n", irq); | 175 | printk("Cannot set affinity for irq %i\n", irq); |
176 | } | 176 | } |
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c index 6e67b5b49ba1..3a9b78d03542 100644 --- a/arch/powerpc/kernel/legacy_serial.c +++ b/arch/powerpc/kernel/legacy_serial.c | |||
@@ -302,6 +302,17 @@ void __init find_legacy_serial_ports(void) | |||
302 | of_node_put(isa); | 302 | of_node_put(isa); |
303 | } | 303 | } |
304 | 304 | ||
305 | /* First fill our array with tsi-bridge ports */ | ||
306 | for (np = NULL; (np = of_find_compatible_node(np, "serial", "ns16550")) != NULL;) { | ||
307 | struct device_node *tsi = of_get_parent(np); | ||
308 | if (tsi && !strcmp(tsi->type, "tsi-bridge")) { | ||
309 | index = add_legacy_soc_port(np, np); | ||
310 | if (index >= 0 && np == stdout) | ||
311 | legacy_serial_console = index; | ||
312 | } | ||
313 | of_node_put(tsi); | ||
314 | } | ||
315 | |||
305 | #ifdef CONFIG_PCI | 316 | #ifdef CONFIG_PCI |
306 | /* Next, try to locate PCI ports */ | 317 | /* Next, try to locate PCI ports */ |
307 | for (np = NULL; (np = of_find_all_nodes(np));) { | 318 | for (np = NULL; (np = of_find_all_nodes(np));) { |
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c index c02deaab26c7..73edc3c16137 100644 --- a/arch/powerpc/kernel/lparcfg.c +++ b/arch/powerpc/kernel/lparcfg.c | |||
@@ -45,11 +45,9 @@ | |||
45 | static struct proc_dir_entry *proc_ppc64_lparcfg; | 45 | static struct proc_dir_entry *proc_ppc64_lparcfg; |
46 | #define LPARCFG_BUFF_SIZE 4096 | 46 | #define LPARCFG_BUFF_SIZE 4096 |
47 | 47 | ||
48 | #ifdef CONFIG_PPC_ISERIES | ||
49 | |||
50 | /* | 48 | /* |
51 | * For iSeries legacy systems, the PPA purr function is available from the | 49 | * Track sum of all purrs across all processors. This is used to further |
52 | * emulated_time_base field in the paca. | 50 | * calculate usage values by different applications |
53 | */ | 51 | */ |
54 | static unsigned long get_purr(void) | 52 | static unsigned long get_purr(void) |
55 | { | 53 | { |
@@ -57,48 +55,31 @@ static unsigned long get_purr(void) | |||
57 | int cpu; | 55 | int cpu; |
58 | 56 | ||
59 | for_each_possible_cpu(cpu) { | 57 | for_each_possible_cpu(cpu) { |
60 | sum_purr += lppaca[cpu].emulated_time_base; | 58 | if (firmware_has_feature(FW_FEATURE_ISERIES)) |
59 | sum_purr += lppaca[cpu].emulated_time_base; | ||
60 | else { | ||
61 | struct cpu_usage *cu; | ||
61 | 62 | ||
62 | #ifdef PURR_DEBUG | 63 | cu = &per_cpu(cpu_usage_array, cpu); |
63 | printk(KERN_INFO "get_purr for cpu (%d) has value (%ld) \n", | 64 | sum_purr += cu->current_tb; |
64 | cpu, lppaca[cpu].emulated_time_base); | 65 | } |
65 | #endif | ||
66 | } | 66 | } |
67 | return sum_purr; | 67 | return sum_purr; |
68 | } | 68 | } |
69 | 69 | ||
70 | #define lparcfg_write NULL | 70 | #ifdef CONFIG_PPC_ISERIES |
71 | 71 | ||
72 | /* | 72 | /* |
73 | * Methods used to fetch LPAR data when running on an iSeries platform. | 73 | * Methods used to fetch LPAR data when running on an iSeries platform. |
74 | */ | 74 | */ |
75 | static int lparcfg_data(struct seq_file *m, void *v) | 75 | static int iseries_lparcfg_data(struct seq_file *m, void *v) |
76 | { | 76 | { |
77 | unsigned long pool_id, lp_index; | 77 | unsigned long pool_id; |
78 | int shared, entitled_capacity, max_entitled_capacity; | 78 | int shared, entitled_capacity, max_entitled_capacity; |
79 | int processors, max_processors; | 79 | int processors, max_processors; |
80 | unsigned long purr = get_purr(); | 80 | unsigned long purr = get_purr(); |
81 | 81 | ||
82 | seq_printf(m, "%s %s \n", MODULE_NAME, MODULE_VERS); | ||
83 | |||
84 | shared = (int)(get_lppaca()->shared_proc); | 82 | shared = (int)(get_lppaca()->shared_proc); |
85 | seq_printf(m, "serial_number=%c%c%c%c%c%c%c\n", | ||
86 | e2a(xItExtVpdPanel.mfgID[2]), | ||
87 | e2a(xItExtVpdPanel.mfgID[3]), | ||
88 | e2a(xItExtVpdPanel.systemSerial[1]), | ||
89 | e2a(xItExtVpdPanel.systemSerial[2]), | ||
90 | e2a(xItExtVpdPanel.systemSerial[3]), | ||
91 | e2a(xItExtVpdPanel.systemSerial[4]), | ||
92 | e2a(xItExtVpdPanel.systemSerial[5])); | ||
93 | |||
94 | seq_printf(m, "system_type=%c%c%c%c\n", | ||
95 | e2a(xItExtVpdPanel.machineType[0]), | ||
96 | e2a(xItExtVpdPanel.machineType[1]), | ||
97 | e2a(xItExtVpdPanel.machineType[2]), | ||
98 | e2a(xItExtVpdPanel.machineType[3])); | ||
99 | |||
100 | lp_index = HvLpConfig_getLpIndex(); | ||
101 | seq_printf(m, "partition_id=%d\n", (int)lp_index); | ||
102 | 83 | ||
103 | seq_printf(m, "system_active_processors=%d\n", | 84 | seq_printf(m, "system_active_processors=%d\n", |
104 | (int)HvLpConfig_getSystemPhysicalProcessors()); | 85 | (int)HvLpConfig_getSystemPhysicalProcessors()); |
@@ -137,6 +118,14 @@ static int lparcfg_data(struct seq_file *m, void *v) | |||
137 | 118 | ||
138 | return 0; | 119 | return 0; |
139 | } | 120 | } |
121 | |||
122 | #else /* CONFIG_PPC_ISERIES */ | ||
123 | |||
124 | static int iseries_lparcfg_data(struct seq_file *m, void *v) | ||
125 | { | ||
126 | return 0; | ||
127 | } | ||
128 | |||
140 | #endif /* CONFIG_PPC_ISERIES */ | 129 | #endif /* CONFIG_PPC_ISERIES */ |
141 | 130 | ||
142 | #ifdef CONFIG_PPC_PSERIES | 131 | #ifdef CONFIG_PPC_PSERIES |
@@ -213,22 +202,6 @@ static void h_pic(unsigned long *pool_idle_time, unsigned long *num_procs) | |||
213 | log_plpar_hcall_return(rc, "H_PIC"); | 202 | log_plpar_hcall_return(rc, "H_PIC"); |
214 | } | 203 | } |
215 | 204 | ||
216 | /* Track sum of all purrs across all processors. This is used to further */ | ||
217 | /* calculate usage values by different applications */ | ||
218 | |||
219 | static unsigned long get_purr(void) | ||
220 | { | ||
221 | unsigned long sum_purr = 0; | ||
222 | int cpu; | ||
223 | struct cpu_usage *cu; | ||
224 | |||
225 | for_each_possible_cpu(cpu) { | ||
226 | cu = &per_cpu(cpu_usage_array, cpu); | ||
227 | sum_purr += cu->current_tb; | ||
228 | } | ||
229 | return sum_purr; | ||
230 | } | ||
231 | |||
232 | #define SPLPAR_CHARACTERISTICS_TOKEN 20 | 205 | #define SPLPAR_CHARACTERISTICS_TOKEN 20 |
233 | #define SPLPAR_MAXLENGTH 1026*(sizeof(char)) | 206 | #define SPLPAR_MAXLENGTH 1026*(sizeof(char)) |
234 | 207 | ||
@@ -333,35 +306,13 @@ static int lparcfg_count_active_processors(void) | |||
333 | return count; | 306 | return count; |
334 | } | 307 | } |
335 | 308 | ||
336 | static int lparcfg_data(struct seq_file *m, void *v) | 309 | static int pseries_lparcfg_data(struct seq_file *m, void *v) |
337 | { | 310 | { |
338 | int partition_potential_processors; | 311 | int partition_potential_processors; |
339 | int partition_active_processors; | 312 | int partition_active_processors; |
340 | struct device_node *rootdn; | ||
341 | const char *model = ""; | ||
342 | const char *system_id = ""; | ||
343 | unsigned int *lp_index_ptr, lp_index = 0; | ||
344 | struct device_node *rtas_node; | 313 | struct device_node *rtas_node; |
345 | int *lrdrp = NULL; | 314 | int *lrdrp = NULL; |
346 | 315 | ||
347 | rootdn = find_path_device("/"); | ||
348 | if (rootdn) { | ||
349 | model = get_property(rootdn, "model", NULL); | ||
350 | system_id = get_property(rootdn, "system-id", NULL); | ||
351 | lp_index_ptr = (unsigned int *) | ||
352 | get_property(rootdn, "ibm,partition-no", NULL); | ||
353 | if (lp_index_ptr) | ||
354 | lp_index = *lp_index_ptr; | ||
355 | } | ||
356 | |||
357 | seq_printf(m, "%s %s \n", MODULE_NAME, MODULE_VERS); | ||
358 | |||
359 | seq_printf(m, "serial_number=%s\n", system_id); | ||
360 | |||
361 | seq_printf(m, "system_type=%s\n", model); | ||
362 | |||
363 | seq_printf(m, "partition_id=%d\n", (int)lp_index); | ||
364 | |||
365 | rtas_node = find_path_device("/rtas"); | 316 | rtas_node = find_path_device("/rtas"); |
366 | if (rtas_node) | 317 | if (rtas_node) |
367 | lrdrp = (int *)get_property(rtas_node, "ibm,lrdr-capacity", | 318 | lrdrp = (int *)get_property(rtas_node, "ibm,lrdr-capacity", |
@@ -549,8 +500,61 @@ out: | |||
549 | return retval; | 500 | return retval; |
550 | } | 501 | } |
551 | 502 | ||
503 | #else /* CONFIG_PPC_PSERIES */ | ||
504 | |||
505 | static int pseries_lparcfg_data(struct seq_file *m, void *v) | ||
506 | { | ||
507 | return 0; | ||
508 | } | ||
509 | |||
510 | static ssize_t lparcfg_write(struct file *file, const char __user * buf, | ||
511 | size_t count, loff_t * off) | ||
512 | { | ||
513 | return count; | ||
514 | } | ||
515 | |||
552 | #endif /* CONFIG_PPC_PSERIES */ | 516 | #endif /* CONFIG_PPC_PSERIES */ |
553 | 517 | ||
518 | static int lparcfg_data(struct seq_file *m, void *v) | ||
519 | { | ||
520 | struct device_node *rootdn; | ||
521 | const char *model = ""; | ||
522 | const char *system_id = ""; | ||
523 | const char *tmp; | ||
524 | unsigned int *lp_index_ptr, lp_index = 0; | ||
525 | |||
526 | seq_printf(m, "%s %s \n", MODULE_NAME, MODULE_VERS); | ||
527 | |||
528 | rootdn = find_path_device("/"); | ||
529 | if (rootdn) { | ||
530 | tmp = get_property(rootdn, "model", NULL); | ||
531 | if (tmp) { | ||
532 | model = tmp; | ||
533 | /* Skip "IBM," - see platforms/iseries/dt.c */ | ||
534 | if (firmware_has_feature(FW_FEATURE_ISERIES)) | ||
535 | model += 4; | ||
536 | } | ||
537 | tmp = get_property(rootdn, "system-id", NULL); | ||
538 | if (tmp) { | ||
539 | system_id = tmp; | ||
540 | /* Skip "IBM," - see platforms/iseries/dt.c */ | ||
541 | if (firmware_has_feature(FW_FEATURE_ISERIES)) | ||
542 | system_id += 4; | ||
543 | } | ||
544 | lp_index_ptr = (unsigned int *) | ||
545 | get_property(rootdn, "ibm,partition-no", NULL); | ||
546 | if (lp_index_ptr) | ||
547 | lp_index = *lp_index_ptr; | ||
548 | } | ||
549 | seq_printf(m, "serial_number=%s\n", system_id); | ||
550 | seq_printf(m, "system_type=%s\n", model); | ||
551 | seq_printf(m, "partition_id=%d\n", (int)lp_index); | ||
552 | |||
553 | if (firmware_has_feature(FW_FEATURE_ISERIES)) | ||
554 | return iseries_lparcfg_data(m, v); | ||
555 | return pseries_lparcfg_data(m, v); | ||
556 | } | ||
557 | |||
554 | static int lparcfg_open(struct inode *inode, struct file *file) | 558 | static int lparcfg_open(struct inode *inode, struct file *file) |
555 | { | 559 | { |
556 | return single_open(file, lparcfg_data, NULL); | 560 | return single_open(file, lparcfg_data, NULL); |
@@ -569,7 +573,8 @@ int __init lparcfg_init(void) | |||
569 | mode_t mode = S_IRUSR | S_IRGRP | S_IROTH; | 573 | mode_t mode = S_IRUSR | S_IRGRP | S_IROTH; |
570 | 574 | ||
571 | /* Allow writing if we have FW_FEATURE_SPLPAR */ | 575 | /* Allow writing if we have FW_FEATURE_SPLPAR */ |
572 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) { | 576 | if (firmware_has_feature(FW_FEATURE_SPLPAR) && |
577 | !firmware_has_feature(FW_FEATURE_ISERIES)) { | ||
573 | lparcfg_fops.write = lparcfg_write; | 578 | lparcfg_fops.write = lparcfg_write; |
574 | mode |= S_IWUSR; | 579 | mode |= S_IWUSR; |
575 | } | 580 | } |
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c index a8fa04ef27cd..b438d45a068c 100644 --- a/arch/powerpc/kernel/machine_kexec_64.c +++ b/arch/powerpc/kernel/machine_kexec_64.c | |||
@@ -378,11 +378,13 @@ static void __init export_crashk_values(void) | |||
378 | of_node_put(node); | 378 | of_node_put(node); |
379 | } | 379 | } |
380 | 380 | ||
381 | void __init kexec_setup(void) | 381 | static int __init kexec_setup(void) |
382 | { | 382 | { |
383 | export_htab_values(); | 383 | export_htab_values(); |
384 | export_crashk_values(); | 384 | export_crashk_values(); |
385 | return 0; | ||
385 | } | 386 | } |
387 | __initcall(kexec_setup); | ||
386 | 388 | ||
387 | static int __init early_parse_crashk(char *p) | 389 | static int __init early_parse_crashk(char *p) |
388 | { | 390 | { |
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S new file mode 100644 index 000000000000..fc23040d5a26 --- /dev/null +++ b/arch/powerpc/kernel/misc.S | |||
@@ -0,0 +1,203 @@ | |||
1 | /* | ||
2 | * This file contains miscellaneous low-level functions. | ||
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | ||
4 | * | ||
5 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) | ||
6 | * and Paul Mackerras. | ||
7 | * | ||
8 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) | ||
9 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or | ||
12 | * modify it under the terms of the GNU General Public License | ||
13 | * as published by the Free Software Foundation; either version | ||
14 | * 2 of the License, or (at your option) any later version. | ||
15 | */ | ||
16 | #include <asm/ppc_asm.h> | ||
17 | |||
18 | .text | ||
19 | |||
20 | #ifdef CONFIG_PPC64 | ||
21 | #define IN_SYNC twi 0,r5,0; isync | ||
22 | #define EIEIO_32 | ||
23 | #define SYNC_64 sync | ||
24 | #else /* CONFIG_PPC32 */ | ||
25 | #define IN_SYNC | ||
26 | #define EIEIO_32 eieio | ||
27 | #define SYNC_64 | ||
28 | #endif | ||
29 | /* | ||
30 | * Returns (address we are running at) - (address we were linked at) | ||
31 | * for use before the text and data are mapped to KERNELBASE. | ||
32 | */ | ||
33 | |||
34 | _GLOBAL(reloc_offset) | ||
35 | mflr r0 | ||
36 | bl 1f | ||
37 | 1: mflr r3 | ||
38 | LOAD_REG_IMMEDIATE(r4,1b) | ||
39 | subf r3,r4,r3 | ||
40 | mtlr r0 | ||
41 | blr | ||
42 | |||
43 | /* | ||
44 | * add_reloc_offset(x) returns x + reloc_offset(). | ||
45 | */ | ||
46 | _GLOBAL(add_reloc_offset) | ||
47 | mflr r0 | ||
48 | bl 1f | ||
49 | 1: mflr r5 | ||
50 | LOAD_REG_IMMEDIATE(r4,1b) | ||
51 | subf r5,r4,r5 | ||
52 | add r3,r3,r5 | ||
53 | mtlr r0 | ||
54 | blr | ||
55 | |||
56 | /* | ||
57 | * I/O string operations | ||
58 | * | ||
59 | * insb(port, buf, len) | ||
60 | * outsb(port, buf, len) | ||
61 | * insw(port, buf, len) | ||
62 | * outsw(port, buf, len) | ||
63 | * insl(port, buf, len) | ||
64 | * outsl(port, buf, len) | ||
65 | * insw_ns(port, buf, len) | ||
66 | * outsw_ns(port, buf, len) | ||
67 | * insl_ns(port, buf, len) | ||
68 | * outsl_ns(port, buf, len) | ||
69 | * | ||
70 | * The *_ns versions don't do byte-swapping. | ||
71 | */ | ||
72 | _GLOBAL(_insb) | ||
73 | cmpwi 0,r5,0 | ||
74 | mtctr r5 | ||
75 | subi r4,r4,1 | ||
76 | blelr- | ||
77 | 00: lbz r5,0(r3) | ||
78 | eieio | ||
79 | stbu r5,1(r4) | ||
80 | bdnz 00b | ||
81 | IN_SYNC | ||
82 | blr | ||
83 | |||
84 | _GLOBAL(_outsb) | ||
85 | cmpwi 0,r5,0 | ||
86 | mtctr r5 | ||
87 | subi r4,r4,1 | ||
88 | blelr- | ||
89 | 00: lbzu r5,1(r4) | ||
90 | stb r5,0(r3) | ||
91 | EIEIO_32 | ||
92 | bdnz 00b | ||
93 | SYNC_64 | ||
94 | blr | ||
95 | |||
96 | _GLOBAL(_insw) | ||
97 | cmpwi 0,r5,0 | ||
98 | mtctr r5 | ||
99 | subi r4,r4,2 | ||
100 | blelr- | ||
101 | 00: lhbrx r5,0,r3 | ||
102 | eieio | ||
103 | sthu r5,2(r4) | ||
104 | bdnz 00b | ||
105 | IN_SYNC | ||
106 | blr | ||
107 | |||
108 | _GLOBAL(_outsw) | ||
109 | cmpwi 0,r5,0 | ||
110 | mtctr r5 | ||
111 | subi r4,r4,2 | ||
112 | blelr- | ||
113 | 00: lhzu r5,2(r4) | ||
114 | EIEIO_32 | ||
115 | sthbrx r5,0,r3 | ||
116 | bdnz 00b | ||
117 | SYNC_64 | ||
118 | blr | ||
119 | |||
120 | _GLOBAL(_insl) | ||
121 | cmpwi 0,r5,0 | ||
122 | mtctr r5 | ||
123 | subi r4,r4,4 | ||
124 | blelr- | ||
125 | 00: lwbrx r5,0,r3 | ||
126 | eieio | ||
127 | stwu r5,4(r4) | ||
128 | bdnz 00b | ||
129 | IN_SYNC | ||
130 | blr | ||
131 | |||
132 | _GLOBAL(_outsl) | ||
133 | cmpwi 0,r5,0 | ||
134 | mtctr r5 | ||
135 | subi r4,r4,4 | ||
136 | blelr- | ||
137 | 00: lwzu r5,4(r4) | ||
138 | stwbrx r5,0,r3 | ||
139 | EIEIO_32 | ||
140 | bdnz 00b | ||
141 | SYNC_64 | ||
142 | blr | ||
143 | |||
144 | #ifdef CONFIG_PPC32 | ||
145 | _GLOBAL(__ide_mm_insw) | ||
146 | #endif | ||
147 | _GLOBAL(_insw_ns) | ||
148 | cmpwi 0,r5,0 | ||
149 | mtctr r5 | ||
150 | subi r4,r4,2 | ||
151 | blelr- | ||
152 | 00: lhz r5,0(r3) | ||
153 | eieio | ||
154 | sthu r5,2(r4) | ||
155 | bdnz 00b | ||
156 | IN_SYNC | ||
157 | blr | ||
158 | |||
159 | #ifdef CONFIG_PPC32 | ||
160 | _GLOBAL(__ide_mm_outsw) | ||
161 | #endif | ||
162 | _GLOBAL(_outsw_ns) | ||
163 | cmpwi 0,r5,0 | ||
164 | mtctr r5 | ||
165 | subi r4,r4,2 | ||
166 | blelr- | ||
167 | 00: lhzu r5,2(r4) | ||
168 | sth r5,0(r3) | ||
169 | EIEIO_32 | ||
170 | bdnz 00b | ||
171 | SYNC_64 | ||
172 | blr | ||
173 | |||
174 | #ifdef CONFIG_PPC32 | ||
175 | _GLOBAL(__ide_mm_insl) | ||
176 | #endif | ||
177 | _GLOBAL(_insl_ns) | ||
178 | cmpwi 0,r5,0 | ||
179 | mtctr r5 | ||
180 | subi r4,r4,4 | ||
181 | blelr- | ||
182 | 00: lwz r5,0(r3) | ||
183 | eieio | ||
184 | stwu r5,4(r4) | ||
185 | bdnz 00b | ||
186 | IN_SYNC | ||
187 | blr | ||
188 | |||
189 | #ifdef CONFIG_PPC32 | ||
190 | _GLOBAL(__ide_mm_outsl) | ||
191 | #endif | ||
192 | _GLOBAL(_outsl_ns) | ||
193 | cmpwi 0,r5,0 | ||
194 | mtctr r5 | ||
195 | subi r4,r4,4 | ||
196 | blelr- | ||
197 | 00: lwzu r5,4(r4) | ||
198 | stw r5,0(r3) | ||
199 | EIEIO_32 | ||
200 | bdnz 00b | ||
201 | SYNC_64 | ||
202 | blr | ||
203 | |||
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 01d3916c4cb1..c74774e2175d 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -61,32 +61,6 @@ _GLOBAL(mulhdu) | |||
61 | blr | 61 | blr |
62 | 62 | ||
63 | /* | 63 | /* |
64 | * Returns (address we're running at) - (address we were linked at) | ||
65 | * for use before the text and data are mapped to KERNELBASE. | ||
66 | */ | ||
67 | _GLOBAL(reloc_offset) | ||
68 | mflr r0 | ||
69 | bl 1f | ||
70 | 1: mflr r3 | ||
71 | LOAD_REG_IMMEDIATE(r4,1b) | ||
72 | subf r3,r4,r3 | ||
73 | mtlr r0 | ||
74 | blr | ||
75 | |||
76 | /* | ||
77 | * add_reloc_offset(x) returns x + reloc_offset(). | ||
78 | */ | ||
79 | _GLOBAL(add_reloc_offset) | ||
80 | mflr r0 | ||
81 | bl 1f | ||
82 | 1: mflr r5 | ||
83 | LOAD_REG_IMMEDIATE(r4,1b) | ||
84 | subf r5,r4,r5 | ||
85 | add r3,r3,r5 | ||
86 | mtlr r0 | ||
87 | blr | ||
88 | |||
89 | /* | ||
90 | * sub_reloc_offset(x) returns x - reloc_offset(). | 64 | * sub_reloc_offset(x) returns x - reloc_offset(). |
91 | */ | 65 | */ |
92 | _GLOBAL(sub_reloc_offset) | 66 | _GLOBAL(sub_reloc_offset) |
@@ -781,136 +755,6 @@ _GLOBAL(atomic_set_mask) | |||
781 | blr | 755 | blr |
782 | 756 | ||
783 | /* | 757 | /* |
784 | * I/O string operations | ||
785 | * | ||
786 | * insb(port, buf, len) | ||
787 | * outsb(port, buf, len) | ||
788 | * insw(port, buf, len) | ||
789 | * outsw(port, buf, len) | ||
790 | * insl(port, buf, len) | ||
791 | * outsl(port, buf, len) | ||
792 | * insw_ns(port, buf, len) | ||
793 | * outsw_ns(port, buf, len) | ||
794 | * insl_ns(port, buf, len) | ||
795 | * outsl_ns(port, buf, len) | ||
796 | * | ||
797 | * The *_ns versions don't do byte-swapping. | ||
798 | */ | ||
799 | _GLOBAL(_insb) | ||
800 | cmpwi 0,r5,0 | ||
801 | mtctr r5 | ||
802 | subi r4,r4,1 | ||
803 | blelr- | ||
804 | 00: lbz r5,0(r3) | ||
805 | eieio | ||
806 | stbu r5,1(r4) | ||
807 | bdnz 00b | ||
808 | blr | ||
809 | |||
810 | _GLOBAL(_outsb) | ||
811 | cmpwi 0,r5,0 | ||
812 | mtctr r5 | ||
813 | subi r4,r4,1 | ||
814 | blelr- | ||
815 | 00: lbzu r5,1(r4) | ||
816 | stb r5,0(r3) | ||
817 | eieio | ||
818 | bdnz 00b | ||
819 | blr | ||
820 | |||
821 | _GLOBAL(_insw) | ||
822 | cmpwi 0,r5,0 | ||
823 | mtctr r5 | ||
824 | subi r4,r4,2 | ||
825 | blelr- | ||
826 | 00: lhbrx r5,0,r3 | ||
827 | eieio | ||
828 | sthu r5,2(r4) | ||
829 | bdnz 00b | ||
830 | blr | ||
831 | |||
832 | _GLOBAL(_outsw) | ||
833 | cmpwi 0,r5,0 | ||
834 | mtctr r5 | ||
835 | subi r4,r4,2 | ||
836 | blelr- | ||
837 | 00: lhzu r5,2(r4) | ||
838 | eieio | ||
839 | sthbrx r5,0,r3 | ||
840 | bdnz 00b | ||
841 | blr | ||
842 | |||
843 | _GLOBAL(_insl) | ||
844 | cmpwi 0,r5,0 | ||
845 | mtctr r5 | ||
846 | subi r4,r4,4 | ||
847 | blelr- | ||
848 | 00: lwbrx r5,0,r3 | ||
849 | eieio | ||
850 | stwu r5,4(r4) | ||
851 | bdnz 00b | ||
852 | blr | ||
853 | |||
854 | _GLOBAL(_outsl) | ||
855 | cmpwi 0,r5,0 | ||
856 | mtctr r5 | ||
857 | subi r4,r4,4 | ||
858 | blelr- | ||
859 | 00: lwzu r5,4(r4) | ||
860 | stwbrx r5,0,r3 | ||
861 | eieio | ||
862 | bdnz 00b | ||
863 | blr | ||
864 | |||
865 | _GLOBAL(__ide_mm_insw) | ||
866 | _GLOBAL(_insw_ns) | ||
867 | cmpwi 0,r5,0 | ||
868 | mtctr r5 | ||
869 | subi r4,r4,2 | ||
870 | blelr- | ||
871 | 00: lhz r5,0(r3) | ||
872 | eieio | ||
873 | sthu r5,2(r4) | ||
874 | bdnz 00b | ||
875 | blr | ||
876 | |||
877 | _GLOBAL(__ide_mm_outsw) | ||
878 | _GLOBAL(_outsw_ns) | ||
879 | cmpwi 0,r5,0 | ||
880 | mtctr r5 | ||
881 | subi r4,r4,2 | ||
882 | blelr- | ||
883 | 00: lhzu r5,2(r4) | ||
884 | sth r5,0(r3) | ||
885 | eieio | ||
886 | bdnz 00b | ||
887 | blr | ||
888 | |||
889 | _GLOBAL(__ide_mm_insl) | ||
890 | _GLOBAL(_insl_ns) | ||
891 | cmpwi 0,r5,0 | ||
892 | mtctr r5 | ||
893 | subi r4,r4,4 | ||
894 | blelr- | ||
895 | 00: lwz r5,0(r3) | ||
896 | eieio | ||
897 | stwu r5,4(r4) | ||
898 | bdnz 00b | ||
899 | blr | ||
900 | |||
901 | _GLOBAL(__ide_mm_outsl) | ||
902 | _GLOBAL(_outsl_ns) | ||
903 | cmpwi 0,r5,0 | ||
904 | mtctr r5 | ||
905 | subi r4,r4,4 | ||
906 | blelr- | ||
907 | 00: lwzu r5,4(r4) | ||
908 | stw r5,0(r3) | ||
909 | eieio | ||
910 | bdnz 00b | ||
911 | blr | ||
912 | |||
913 | /* | ||
914 | * Extended precision shifts. | 758 | * Extended precision shifts. |
915 | * | 759 | * |
916 | * Updated to be valid for shift counts from 0 to 63 inclusive. | 760 | * Updated to be valid for shift counts from 0 to 63 inclusive. |
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index e8883d42c43c..580891cb8ccb 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
@@ -1,14 +1,12 @@ | |||
1 | /* | 1 | /* |
2 | * arch/powerpc/kernel/misc64.S | ||
3 | * | ||
4 | * This file contains miscellaneous low-level functions. | 2 | * This file contains miscellaneous low-level functions. |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | 3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
6 | * | 4 | * |
7 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) | 5 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) |
8 | * and Paul Mackerras. | 6 | * and Paul Mackerras. |
9 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) | 7 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) |
10 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) | 8 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) |
11 | * | 9 | * |
12 | * This program is free software; you can redistribute it and/or | 10 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 11 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version | 12 | * as published by the Free Software Foundation; either version |
@@ -30,41 +28,10 @@ | |||
30 | 28 | ||
31 | .text | 29 | .text |
32 | 30 | ||
33 | /* | ||
34 | * Returns (address we are running at) - (address we were linked at) | ||
35 | * for use before the text and data are mapped to KERNELBASE. | ||
36 | */ | ||
37 | |||
38 | _GLOBAL(reloc_offset) | ||
39 | mflr r0 | ||
40 | bl 1f | ||
41 | 1: mflr r3 | ||
42 | LOAD_REG_IMMEDIATE(r4,1b) | ||
43 | subf r3,r4,r3 | ||
44 | mtlr r0 | ||
45 | blr | ||
46 | |||
47 | /* | ||
48 | * add_reloc_offset(x) returns x + reloc_offset(). | ||
49 | */ | ||
50 | _GLOBAL(add_reloc_offset) | ||
51 | mflr r0 | ||
52 | bl 1f | ||
53 | 1: mflr r5 | ||
54 | LOAD_REG_IMMEDIATE(r4,1b) | ||
55 | subf r5,r4,r5 | ||
56 | add r3,r3,r5 | ||
57 | mtlr r0 | ||
58 | blr | ||
59 | |||
60 | _GLOBAL(get_msr) | 31 | _GLOBAL(get_msr) |
61 | mfmsr r3 | 32 | mfmsr r3 |
62 | blr | 33 | blr |
63 | 34 | ||
64 | _GLOBAL(get_dar) | ||
65 | mfdar r3 | ||
66 | blr | ||
67 | |||
68 | _GLOBAL(get_srr0) | 35 | _GLOBAL(get_srr0) |
69 | mfsrr0 r3 | 36 | mfsrr0 r3 |
70 | blr | 37 | blr |
@@ -72,10 +39,6 @@ _GLOBAL(get_srr0) | |||
72 | _GLOBAL(get_srr1) | 39 | _GLOBAL(get_srr1) |
73 | mfsrr1 r3 | 40 | mfsrr1 r3 |
74 | blr | 41 | blr |
75 | |||
76 | _GLOBAL(get_sp) | ||
77 | mr r3,r1 | ||
78 | blr | ||
79 | 42 | ||
80 | #ifdef CONFIG_IRQSTACKS | 43 | #ifdef CONFIG_IRQSTACKS |
81 | _GLOBAL(call_do_softirq) | 44 | _GLOBAL(call_do_softirq) |
@@ -101,48 +64,6 @@ _GLOBAL(call___do_IRQ) | |||
101 | blr | 64 | blr |
102 | #endif /* CONFIG_IRQSTACKS */ | 65 | #endif /* CONFIG_IRQSTACKS */ |
103 | 66 | ||
104 | /* | ||
105 | * To be called by C code which needs to do some operations with MMU | ||
106 | * disabled. Note that interrupts have to be disabled by the caller | ||
107 | * prior to calling us. The code called _MUST_ be in the RMO of course | ||
108 | * and part of the linear mapping as we don't attempt to translate the | ||
109 | * stack pointer at all. The function is called with the stack switched | ||
110 | * to this CPU emergency stack | ||
111 | * | ||
112 | * prototype is void *call_with_mmu_off(void *func, void *data); | ||
113 | * | ||
114 | * the called function is expected to be of the form | ||
115 | * | ||
116 | * void *called(void *data); | ||
117 | */ | ||
118 | _GLOBAL(call_with_mmu_off) | ||
119 | mflr r0 /* get link, save it on stackframe */ | ||
120 | std r0,16(r1) | ||
121 | mr r1,r5 /* save old stack ptr */ | ||
122 | ld r1,PACAEMERGSP(r13) /* get emerg. stack */ | ||
123 | subi r1,r1,STACK_FRAME_OVERHEAD | ||
124 | std r0,16(r1) /* save link on emerg. stack */ | ||
125 | std r5,0(r1) /* save old stack ptr in backchain */ | ||
126 | ld r3,0(r3) /* get to real function ptr (assume same TOC) */ | ||
127 | bl 2f /* we need LR to return, continue at label 2 */ | ||
128 | |||
129 | ld r0,16(r1) /* we return here from the call, get LR and */ | ||
130 | ld r1,0(r1) /* .. old stack ptr */ | ||
131 | mtspr SPRN_SRR0,r0 /* and get back to virtual mode with these */ | ||
132 | mfmsr r4 | ||
133 | ori r4,r4,MSR_IR|MSR_DR | ||
134 | mtspr SPRN_SRR1,r4 | ||
135 | rfid | ||
136 | |||
137 | 2: mtspr SPRN_SRR0,r3 /* coming from above, enter real mode */ | ||
138 | mr r3,r4 /* get parameter */ | ||
139 | mfmsr r0 | ||
140 | ori r0,r0,MSR_IR|MSR_DR | ||
141 | xori r0,r0,MSR_IR|MSR_DR | ||
142 | mtspr SPRN_SRR1,r0 | ||
143 | rfid | ||
144 | |||
145 | |||
146 | .section ".toc","aw" | 67 | .section ".toc","aw" |
147 | PPC64_CACHES: | 68 | PPC64_CACHES: |
148 | .tc ppc64_caches[TC],ppc64_caches | 69 | .tc ppc64_caches[TC],ppc64_caches |
@@ -323,144 +244,6 @@ _GLOBAL(__flush_dcache_icache) | |||
323 | bdnz 1b | 244 | bdnz 1b |
324 | isync | 245 | isync |
325 | blr | 246 | blr |
326 | |||
327 | /* | ||
328 | * I/O string operations | ||
329 | * | ||
330 | * insb(port, buf, len) | ||
331 | * outsb(port, buf, len) | ||
332 | * insw(port, buf, len) | ||
333 | * outsw(port, buf, len) | ||
334 | * insl(port, buf, len) | ||
335 | * outsl(port, buf, len) | ||
336 | * insw_ns(port, buf, len) | ||
337 | * outsw_ns(port, buf, len) | ||
338 | * insl_ns(port, buf, len) | ||
339 | * outsl_ns(port, buf, len) | ||
340 | * | ||
341 | * The *_ns versions don't do byte-swapping. | ||
342 | */ | ||
343 | _GLOBAL(_insb) | ||
344 | cmpwi 0,r5,0 | ||
345 | mtctr r5 | ||
346 | subi r4,r4,1 | ||
347 | blelr- | ||
348 | 00: lbz r5,0(r3) | ||
349 | eieio | ||
350 | stbu r5,1(r4) | ||
351 | bdnz 00b | ||
352 | twi 0,r5,0 | ||
353 | isync | ||
354 | blr | ||
355 | |||
356 | _GLOBAL(_outsb) | ||
357 | cmpwi 0,r5,0 | ||
358 | mtctr r5 | ||
359 | subi r4,r4,1 | ||
360 | blelr- | ||
361 | 00: lbzu r5,1(r4) | ||
362 | stb r5,0(r3) | ||
363 | bdnz 00b | ||
364 | sync | ||
365 | blr | ||
366 | |||
367 | _GLOBAL(_insw) | ||
368 | cmpwi 0,r5,0 | ||
369 | mtctr r5 | ||
370 | subi r4,r4,2 | ||
371 | blelr- | ||
372 | 00: lhbrx r5,0,r3 | ||
373 | eieio | ||
374 | sthu r5,2(r4) | ||
375 | bdnz 00b | ||
376 | twi 0,r5,0 | ||
377 | isync | ||
378 | blr | ||
379 | |||
380 | _GLOBAL(_outsw) | ||
381 | cmpwi 0,r5,0 | ||
382 | mtctr r5 | ||
383 | subi r4,r4,2 | ||
384 | blelr- | ||
385 | 00: lhzu r5,2(r4) | ||
386 | sthbrx r5,0,r3 | ||
387 | bdnz 00b | ||
388 | sync | ||
389 | blr | ||
390 | |||
391 | _GLOBAL(_insl) | ||
392 | cmpwi 0,r5,0 | ||
393 | mtctr r5 | ||
394 | subi r4,r4,4 | ||
395 | blelr- | ||
396 | 00: lwbrx r5,0,r3 | ||
397 | eieio | ||
398 | stwu r5,4(r4) | ||
399 | bdnz 00b | ||
400 | twi 0,r5,0 | ||
401 | isync | ||
402 | blr | ||
403 | |||
404 | _GLOBAL(_outsl) | ||
405 | cmpwi 0,r5,0 | ||
406 | mtctr r5 | ||
407 | subi r4,r4,4 | ||
408 | blelr- | ||
409 | 00: lwzu r5,4(r4) | ||
410 | stwbrx r5,0,r3 | ||
411 | bdnz 00b | ||
412 | sync | ||
413 | blr | ||
414 | |||
415 | /* _GLOBAL(ide_insw) now in drivers/ide/ide-iops.c */ | ||
416 | _GLOBAL(_insw_ns) | ||
417 | cmpwi 0,r5,0 | ||
418 | mtctr r5 | ||
419 | subi r4,r4,2 | ||
420 | blelr- | ||
421 | 00: lhz r5,0(r3) | ||
422 | eieio | ||
423 | sthu r5,2(r4) | ||
424 | bdnz 00b | ||
425 | twi 0,r5,0 | ||
426 | isync | ||
427 | blr | ||
428 | |||
429 | /* _GLOBAL(ide_outsw) now in drivers/ide/ide-iops.c */ | ||
430 | _GLOBAL(_outsw_ns) | ||
431 | cmpwi 0,r5,0 | ||
432 | mtctr r5 | ||
433 | subi r4,r4,2 | ||
434 | blelr- | ||
435 | 00: lhzu r5,2(r4) | ||
436 | sth r5,0(r3) | ||
437 | bdnz 00b | ||
438 | sync | ||
439 | blr | ||
440 | |||
441 | _GLOBAL(_insl_ns) | ||
442 | cmpwi 0,r5,0 | ||
443 | mtctr r5 | ||
444 | subi r4,r4,4 | ||
445 | blelr- | ||
446 | 00: lwz r5,0(r3) | ||
447 | eieio | ||
448 | stwu r5,4(r4) | ||
449 | bdnz 00b | ||
450 | twi 0,r5,0 | ||
451 | isync | ||
452 | blr | ||
453 | |||
454 | _GLOBAL(_outsl_ns) | ||
455 | cmpwi 0,r5,0 | ||
456 | mtctr r5 | ||
457 | subi r4,r4,4 | ||
458 | blelr- | ||
459 | 00: lwzu r5,4(r4) | ||
460 | stw r5,0(r3) | ||
461 | bdnz 00b | ||
462 | sync | ||
463 | blr | ||
464 | 247 | ||
465 | /* | 248 | /* |
466 | * identify_cpu and calls setup_cpu | 249 | * identify_cpu and calls setup_cpu |
@@ -605,6 +388,7 @@ _GLOBAL(real_writeb) | |||
605 | blr | 388 | blr |
606 | #endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */ | 389 | #endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */ |
607 | 390 | ||
391 | #ifdef CONFIG_CPU_FREQ_PMAC64 | ||
608 | /* | 392 | /* |
609 | * SCOM access functions for 970 (FX only for now) | 393 | * SCOM access functions for 970 (FX only for now) |
610 | * | 394 | * |
@@ -673,6 +457,7 @@ _GLOBAL(scom970_write) | |||
673 | /* restore interrupts */ | 457 | /* restore interrupts */ |
674 | mtmsrd r5,1 | 458 | mtmsrd r5,1 |
675 | blr | 459 | blr |
460 | #endif /* CONFIG_CPU_FREQ_PMAC64 */ | ||
676 | 461 | ||
677 | 462 | ||
678 | /* | 463 | /* |
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c index f505a8827e3e..a0bb354c1c08 100644 --- a/arch/powerpc/kernel/paca.c +++ b/arch/powerpc/kernel/paca.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <asm/ptrace.h> | 16 | #include <asm/ptrace.h> |
17 | #include <asm/page.h> | 17 | #include <asm/page.h> |
18 | #include <asm/lppaca.h> | 18 | #include <asm/lppaca.h> |
19 | #include <asm/iseries/it_lp_queue.h> | ||
20 | #include <asm/iseries/it_lp_reg_save.h> | 19 | #include <asm/iseries/it_lp_reg_save.h> |
21 | #include <asm/paca.h> | 20 | #include <asm/paca.h> |
22 | 21 | ||
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c index b5431ccf1147..8474355a1a4f 100644 --- a/arch/powerpc/kernel/pci_32.c +++ b/arch/powerpc/kernel/pci_32.c | |||
@@ -99,7 +99,7 @@ pcibios_fixup_resources(struct pci_dev *dev) | |||
99 | if (!res->flags) | 99 | if (!res->flags) |
100 | continue; | 100 | continue; |
101 | if (res->end == 0xffffffff) { | 101 | if (res->end == 0xffffffff) { |
102 | DBG("PCI:%s Resource %d [%08lx-%08lx] is unassigned\n", | 102 | DBG("PCI:%s Resource %d [%016llx-%016llx] is unassigned\n", |
103 | pci_name(dev), i, res->start, res->end); | 103 | pci_name(dev), i, res->start, res->end); |
104 | res->end -= res->start; | 104 | res->end -= res->start; |
105 | res->start = 0; | 105 | res->start = 0; |
@@ -117,7 +117,7 @@ pcibios_fixup_resources(struct pci_dev *dev) | |||
117 | res->start += offset; | 117 | res->start += offset; |
118 | res->end += offset; | 118 | res->end += offset; |
119 | #ifdef DEBUG | 119 | #ifdef DEBUG |
120 | printk("Fixup res %d (%lx) of dev %s: %lx -> %lx\n", | 120 | printk("Fixup res %d (%lx) of dev %s: %llx -> %llx\n", |
121 | i, res->flags, pci_name(dev), | 121 | i, res->flags, pci_name(dev), |
122 | res->start - offset, res->start); | 122 | res->start - offset, res->start); |
123 | #endif | 123 | #endif |
@@ -173,18 +173,18 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); | |||
173 | * but we want to try to avoid allocating at 0x2900-0x2bff | 173 | * but we want to try to avoid allocating at 0x2900-0x2bff |
174 | * which might have be mirrored at 0x0100-0x03ff.. | 174 | * which might have be mirrored at 0x0100-0x03ff.. |
175 | */ | 175 | */ |
176 | void pcibios_align_resource(void *data, struct resource *res, unsigned long size, | 176 | void pcibios_align_resource(void *data, struct resource *res, |
177 | unsigned long align) | 177 | resource_size_t size, resource_size_t align) |
178 | { | 178 | { |
179 | struct pci_dev *dev = data; | 179 | struct pci_dev *dev = data; |
180 | 180 | ||
181 | if (res->flags & IORESOURCE_IO) { | 181 | if (res->flags & IORESOURCE_IO) { |
182 | unsigned long start = res->start; | 182 | resource_size_t start = res->start; |
183 | 183 | ||
184 | if (size > 0x100) { | 184 | if (size > 0x100) { |
185 | printk(KERN_ERR "PCI: I/O Region %s/%d too large" | 185 | printk(KERN_ERR "PCI: I/O Region %s/%d too large" |
186 | " (%ld bytes)\n", pci_name(dev), | 186 | " (%lld bytes)\n", pci_name(dev), |
187 | dev->resource - res, size); | 187 | dev->resource - res, (unsigned long long)size); |
188 | } | 188 | } |
189 | 189 | ||
190 | if (start & 0x300) { | 190 | if (start & 0x300) { |
@@ -255,8 +255,8 @@ pcibios_allocate_bus_resources(struct list_head *bus_list) | |||
255 | } | 255 | } |
256 | } | 256 | } |
257 | 257 | ||
258 | DBG("PCI: bridge rsrc %lx..%lx (%lx), parent %p\n", | 258 | DBG("PCI: bridge rsrc %llx..%llx (%lx), parent %p\n", |
259 | res->start, res->end, res->flags, pr); | 259 | res->start, res->end, res->flags, pr); |
260 | if (pr) { | 260 | if (pr) { |
261 | if (request_resource(pr, res) == 0) | 261 | if (request_resource(pr, res) == 0) |
262 | continue; | 262 | continue; |
@@ -306,7 +306,7 @@ reparent_resources(struct resource *parent, struct resource *res) | |||
306 | *pp = NULL; | 306 | *pp = NULL; |
307 | for (p = res->child; p != NULL; p = p->sibling) { | 307 | for (p = res->child; p != NULL; p = p->sibling) { |
308 | p->parent = res; | 308 | p->parent = res; |
309 | DBG(KERN_INFO "PCI: reparented %s [%lx..%lx] under %s\n", | 309 | DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n", |
310 | p->name, p->start, p->end, res->name); | 310 | p->name, p->start, p->end, res->name); |
311 | } | 311 | } |
312 | return 0; | 312 | return 0; |
@@ -362,13 +362,14 @@ pci_relocate_bridge_resource(struct pci_bus *bus, int i) | |||
362 | try = conflict->start - 1; | 362 | try = conflict->start - 1; |
363 | } | 363 | } |
364 | if (request_resource(pr, res)) { | 364 | if (request_resource(pr, res)) { |
365 | DBG(KERN_ERR "PCI: huh? couldn't move to %lx..%lx\n", | 365 | DBG(KERN_ERR "PCI: huh? couldn't move to %llx..%llx\n", |
366 | res->start, res->end); | 366 | res->start, res->end); |
367 | return -1; /* "can't happen" */ | 367 | return -1; /* "can't happen" */ |
368 | } | 368 | } |
369 | update_bridge_base(bus, i); | 369 | update_bridge_base(bus, i); |
370 | printk(KERN_INFO "PCI: bridge %d resource %d moved to %lx..%lx\n", | 370 | printk(KERN_INFO "PCI: bridge %d resource %d moved to %llx..%llx\n", |
371 | bus->number, i, res->start, res->end); | 371 | bus->number, i, (unsigned long long)res->start, |
372 | (unsigned long long)res->end); | ||
372 | return 0; | 373 | return 0; |
373 | } | 374 | } |
374 | 375 | ||
@@ -479,14 +480,14 @@ static inline void alloc_resource(struct pci_dev *dev, int idx) | |||
479 | { | 480 | { |
480 | struct resource *pr, *r = &dev->resource[idx]; | 481 | struct resource *pr, *r = &dev->resource[idx]; |
481 | 482 | ||
482 | DBG("PCI:%s: Resource %d: %08lx-%08lx (f=%lx)\n", | 483 | DBG("PCI:%s: Resource %d: %016llx-%016llx (f=%lx)\n", |
483 | pci_name(dev), idx, r->start, r->end, r->flags); | 484 | pci_name(dev), idx, r->start, r->end, r->flags); |
484 | pr = pci_find_parent_resource(dev, r); | 485 | pr = pci_find_parent_resource(dev, r); |
485 | if (!pr || request_resource(pr, r) < 0) { | 486 | if (!pr || request_resource(pr, r) < 0) { |
486 | printk(KERN_ERR "PCI: Cannot allocate resource region %d" | 487 | printk(KERN_ERR "PCI: Cannot allocate resource region %d" |
487 | " of device %s\n", idx, pci_name(dev)); | 488 | " of device %s\n", idx, pci_name(dev)); |
488 | if (pr) | 489 | if (pr) |
489 | DBG("PCI: parent is %p: %08lx-%08lx (f=%lx)\n", | 490 | DBG("PCI: parent is %p: %016llx-%016llx (f=%lx)\n", |
490 | pr, pr->start, pr->end, pr->flags); | 491 | pr, pr->start, pr->end, pr->flags); |
491 | /* We'll assign a new address later */ | 492 | /* We'll assign a new address later */ |
492 | r->flags |= IORESOURCE_UNSET; | 493 | r->flags |= IORESOURCE_UNSET; |
@@ -956,7 +957,7 @@ pci_process_bridge_OF_ranges(struct pci_controller *hose, | |||
956 | res = &hose->io_resource; | 957 | res = &hose->io_resource; |
957 | res->flags = IORESOURCE_IO; | 958 | res->flags = IORESOURCE_IO; |
958 | res->start = ranges[2]; | 959 | res->start = ranges[2]; |
959 | DBG("PCI: IO 0x%lx -> 0x%lx\n", | 960 | DBG("PCI: IO 0x%llx -> 0x%llx\n", |
960 | res->start, res->start + size - 1); | 961 | res->start, res->start + size - 1); |
961 | break; | 962 | break; |
962 | case 2: /* memory space */ | 963 | case 2: /* memory space */ |
@@ -978,7 +979,7 @@ pci_process_bridge_OF_ranges(struct pci_controller *hose, | |||
978 | if(ranges[0] & 0x40000000) | 979 | if(ranges[0] & 0x40000000) |
979 | res->flags |= IORESOURCE_PREFETCH; | 980 | res->flags |= IORESOURCE_PREFETCH; |
980 | res->start = ranges[na+2]; | 981 | res->start = ranges[na+2]; |
981 | DBG("PCI: MEM[%d] 0x%lx -> 0x%lx\n", memno, | 982 | DBG("PCI: MEM[%d] 0x%llx -> 0x%llx\n", memno, |
982 | res->start, res->start + size - 1); | 983 | res->start, res->start + size - 1); |
983 | } | 984 | } |
984 | break; | 985 | break; |
@@ -1074,7 +1075,7 @@ do_update_p2p_io_resource(struct pci_bus *bus, int enable_vga) | |||
1074 | DBG("Remapping Bus %d, bridge: %s\n", bus->number, pci_name(bridge)); | 1075 | DBG("Remapping Bus %d, bridge: %s\n", bus->number, pci_name(bridge)); |
1075 | res.start -= ((unsigned long) hose->io_base_virt - isa_io_base); | 1076 | res.start -= ((unsigned long) hose->io_base_virt - isa_io_base); |
1076 | res.end -= ((unsigned long) hose->io_base_virt - isa_io_base); | 1077 | res.end -= ((unsigned long) hose->io_base_virt - isa_io_base); |
1077 | DBG(" IO window: %08lx-%08lx\n", res.start, res.end); | 1078 | DBG(" IO window: %016llx-%016llx\n", res.start, res.end); |
1078 | 1079 | ||
1079 | /* Set up the top and bottom of the PCI I/O segment for this bus. */ | 1080 | /* Set up the top and bottom of the PCI I/O segment for this bus. */ |
1080 | pci_read_config_dword(bridge, PCI_IO_BASE, &l); | 1081 | pci_read_config_dword(bridge, PCI_IO_BASE, &l); |
@@ -1223,8 +1224,8 @@ do_fixup_p2p_level(struct pci_bus *bus) | |||
1223 | continue; | 1224 | continue; |
1224 | if ((r->flags & IORESOURCE_IO) == 0) | 1225 | if ((r->flags & IORESOURCE_IO) == 0) |
1225 | continue; | 1226 | continue; |
1226 | DBG("Trying to allocate from %08lx, size %08lx from parent" | 1227 | DBG("Trying to allocate from %016llx, size %016llx from parent" |
1227 | " res %d: %08lx -> %08lx\n", | 1228 | " res %d: %016llx -> %016llx\n", |
1228 | res->start, res->end, i, r->start, r->end); | 1229 | res->start, res->end, i, r->start, r->end); |
1229 | 1230 | ||
1230 | if (allocate_resource(r, res, res->end + 1, res->start, max, | 1231 | if (allocate_resource(r, res, res->end + 1, res->start, max, |
@@ -1574,8 +1575,8 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp, | |||
1574 | else | 1575 | else |
1575 | prot |= _PAGE_GUARDED; | 1576 | prot |= _PAGE_GUARDED; |
1576 | 1577 | ||
1577 | printk("PCI map for %s:%lx, prot: %lx\n", pci_name(dev), rp->start, | 1578 | printk("PCI map for %s:%llx, prot: %lx\n", pci_name(dev), |
1578 | prot); | 1579 | (unsigned long long)rp->start, prot); |
1579 | 1580 | ||
1580 | return __pgprot(prot); | 1581 | return __pgprot(prot); |
1581 | } | 1582 | } |
@@ -1755,7 +1756,7 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) | |||
1755 | 1756 | ||
1756 | void pci_resource_to_user(const struct pci_dev *dev, int bar, | 1757 | void pci_resource_to_user(const struct pci_dev *dev, int bar, |
1757 | const struct resource *rsrc, | 1758 | const struct resource *rsrc, |
1758 | u64 *start, u64 *end) | 1759 | resource_size_t *start, resource_size_t *end) |
1759 | { | 1760 | { |
1760 | struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); | 1761 | struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); |
1761 | unsigned long offset = 0; | 1762 | unsigned long offset = 0; |
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index 247937dd8b73..286aa52aae33 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c | |||
@@ -138,11 +138,11 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); | |||
138 | * which might have be mirrored at 0x0100-0x03ff.. | 138 | * which might have be mirrored at 0x0100-0x03ff.. |
139 | */ | 139 | */ |
140 | void pcibios_align_resource(void *data, struct resource *res, | 140 | void pcibios_align_resource(void *data, struct resource *res, |
141 | unsigned long size, unsigned long align) | 141 | resource_size_t size, resource_size_t align) |
142 | { | 142 | { |
143 | struct pci_dev *dev = data; | 143 | struct pci_dev *dev = data; |
144 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | 144 | struct pci_controller *hose = pci_bus_to_host(dev->bus); |
145 | unsigned long start = res->start; | 145 | resource_size_t start = res->start; |
146 | unsigned long alignto; | 146 | unsigned long alignto; |
147 | 147 | ||
148 | if (res->flags & IORESOURCE_IO) { | 148 | if (res->flags & IORESOURCE_IO) { |
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 483455c5bb02..320c913435cd 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/bitops.h> | 30 | #include <linux/bitops.h> |
31 | #include <linux/module.h> | 31 | #include <linux/module.h> |
32 | #include <linux/kexec.h> | 32 | #include <linux/kexec.h> |
33 | #include <linux/debugfs.h> | ||
33 | 34 | ||
34 | #include <asm/prom.h> | 35 | #include <asm/prom.h> |
35 | #include <asm/rtas.h> | 36 | #include <asm/rtas.h> |
@@ -952,6 +953,7 @@ static struct ibm_pa_feature { | |||
952 | /* put this back once we know how to test if firmware does 64k IO */ | 953 | /* put this back once we know how to test if firmware does 64k IO */ |
953 | {CPU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0}, | 954 | {CPU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0}, |
954 | #endif | 955 | #endif |
956 | {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0}, | ||
955 | }; | 957 | }; |
956 | 958 | ||
957 | static void __init check_cpu_pa_features(unsigned long node) | 959 | static void __init check_cpu_pa_features(unsigned long node) |
@@ -1124,24 +1126,6 @@ static int __init early_init_dt_scan_chosen(unsigned long node, | |||
1124 | tce_alloc_end = *lprop; | 1126 | tce_alloc_end = *lprop; |
1125 | #endif | 1127 | #endif |
1126 | 1128 | ||
1127 | #ifdef CONFIG_PPC_RTAS | ||
1128 | /* To help early debugging via the front panel, we retrieve a minimal | ||
1129 | * set of RTAS infos now if available | ||
1130 | */ | ||
1131 | { | ||
1132 | u64 *basep, *entryp, *sizep; | ||
1133 | |||
1134 | basep = of_get_flat_dt_prop(node, "linux,rtas-base", NULL); | ||
1135 | entryp = of_get_flat_dt_prop(node, "linux,rtas-entry", NULL); | ||
1136 | sizep = of_get_flat_dt_prop(node, "linux,rtas-size", NULL); | ||
1137 | if (basep && entryp && sizep) { | ||
1138 | rtas.base = *basep; | ||
1139 | rtas.entry = *entryp; | ||
1140 | rtas.size = *sizep; | ||
1141 | } | ||
1142 | } | ||
1143 | #endif /* CONFIG_PPC_RTAS */ | ||
1144 | |||
1145 | #ifdef CONFIG_KEXEC | 1129 | #ifdef CONFIG_KEXEC |
1146 | lprop = (u64*)of_get_flat_dt_prop(node, "linux,crashkernel-base", NULL); | 1130 | lprop = (u64*)of_get_flat_dt_prop(node, "linux,crashkernel-base", NULL); |
1147 | if (lprop) | 1131 | if (lprop) |
@@ -1326,6 +1310,11 @@ void __init early_init_devtree(void *params) | |||
1326 | /* Setup flat device-tree pointer */ | 1310 | /* Setup flat device-tree pointer */ |
1327 | initial_boot_params = params; | 1311 | initial_boot_params = params; |
1328 | 1312 | ||
1313 | #ifdef CONFIG_PPC_RTAS | ||
1314 | /* Some machines might need RTAS info for debugging, grab it now. */ | ||
1315 | of_scan_flat_dt(early_init_dt_scan_rtas, NULL); | ||
1316 | #endif | ||
1317 | |||
1329 | /* Retrieve various informations from the /chosen node of the | 1318 | /* Retrieve various informations from the /chosen node of the |
1330 | * device-tree, including the platform type, initrd location and | 1319 | * device-tree, including the platform type, initrd location and |
1331 | * size, TCE reserve, and more ... | 1320 | * size, TCE reserve, and more ... |
@@ -2148,3 +2137,27 @@ struct device_node *of_get_cpu_node(int cpu, unsigned int *thread) | |||
2148 | } | 2137 | } |
2149 | return NULL; | 2138 | return NULL; |
2150 | } | 2139 | } |
2140 | |||
2141 | #ifdef DEBUG | ||
2142 | static struct debugfs_blob_wrapper flat_dt_blob; | ||
2143 | |||
2144 | static int __init export_flat_device_tree(void) | ||
2145 | { | ||
2146 | struct dentry *d; | ||
2147 | |||
2148 | d = debugfs_create_dir("powerpc", NULL); | ||
2149 | if (!d) | ||
2150 | return 1; | ||
2151 | |||
2152 | flat_dt_blob.data = initial_boot_params; | ||
2153 | flat_dt_blob.size = initial_boot_params->totalsize; | ||
2154 | |||
2155 | d = debugfs_create_blob("flat-device-tree", S_IFREG | S_IRUSR, | ||
2156 | d, &flat_dt_blob); | ||
2157 | if (!d) | ||
2158 | return 1; | ||
2159 | |||
2160 | return 0; | ||
2161 | } | ||
2162 | __initcall(export_flat_device_tree); | ||
2163 | #endif | ||
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index 17dc79198515..4a4cb5598402 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c | |||
@@ -38,16 +38,19 @@ | |||
38 | struct rtas_t rtas = { | 38 | struct rtas_t rtas = { |
39 | .lock = SPIN_LOCK_UNLOCKED | 39 | .lock = SPIN_LOCK_UNLOCKED |
40 | }; | 40 | }; |
41 | EXPORT_SYMBOL(rtas); | ||
41 | 42 | ||
42 | struct rtas_suspend_me_data { | 43 | struct rtas_suspend_me_data { |
43 | long waiting; | 44 | long waiting; |
44 | struct rtas_args *args; | 45 | struct rtas_args *args; |
45 | }; | 46 | }; |
46 | 47 | ||
47 | EXPORT_SYMBOL(rtas); | ||
48 | |||
49 | DEFINE_SPINLOCK(rtas_data_buf_lock); | 48 | DEFINE_SPINLOCK(rtas_data_buf_lock); |
49 | EXPORT_SYMBOL(rtas_data_buf_lock); | ||
50 | |||
50 | char rtas_data_buf[RTAS_DATA_BUF_SIZE] __cacheline_aligned; | 51 | char rtas_data_buf[RTAS_DATA_BUF_SIZE] __cacheline_aligned; |
52 | EXPORT_SYMBOL(rtas_data_buf); | ||
53 | |||
51 | unsigned long rtas_rmo_buf; | 54 | unsigned long rtas_rmo_buf; |
52 | 55 | ||
53 | /* | 56 | /* |
@@ -106,11 +109,71 @@ static void call_rtas_display_status_delay(char c) | |||
106 | } | 109 | } |
107 | } | 110 | } |
108 | 111 | ||
109 | void __init udbg_init_rtas(void) | 112 | void __init udbg_init_rtas_panel(void) |
110 | { | 113 | { |
111 | udbg_putc = call_rtas_display_status_delay; | 114 | udbg_putc = call_rtas_display_status_delay; |
112 | } | 115 | } |
113 | 116 | ||
117 | #ifdef CONFIG_UDBG_RTAS_CONSOLE | ||
118 | |||
119 | /* If you think you're dying before early_init_dt_scan_rtas() does its | ||
120 | * work, you can hard code the token values for your firmware here and | ||
121 | * hardcode rtas.base/entry etc. | ||
122 | */ | ||
123 | static unsigned int rtas_putchar_token = RTAS_UNKNOWN_SERVICE; | ||
124 | static unsigned int rtas_getchar_token = RTAS_UNKNOWN_SERVICE; | ||
125 | |||
126 | static void udbg_rtascon_putc(char c) | ||
127 | { | ||
128 | int tries; | ||
129 | |||
130 | if (!rtas.base) | ||
131 | return; | ||
132 | |||
133 | /* Add CRs before LFs */ | ||
134 | if (c == '\n') | ||
135 | udbg_rtascon_putc('\r'); | ||
136 | |||
137 | /* if there is more than one character to be displayed, wait a bit */ | ||
138 | for (tries = 0; tries < 16; tries++) { | ||
139 | if (rtas_call(rtas_putchar_token, 1, 1, NULL, c) == 0) | ||
140 | break; | ||
141 | udelay(1000); | ||
142 | } | ||
143 | } | ||
144 | |||
145 | static int udbg_rtascon_getc_poll(void) | ||
146 | { | ||
147 | int c; | ||
148 | |||
149 | if (!rtas.base) | ||
150 | return -1; | ||
151 | |||
152 | if (rtas_call(rtas_getchar_token, 0, 2, &c)) | ||
153 | return -1; | ||
154 | |||
155 | return c; | ||
156 | } | ||
157 | |||
158 | static int udbg_rtascon_getc(void) | ||
159 | { | ||
160 | int c; | ||
161 | |||
162 | while ((c = udbg_rtascon_getc_poll()) == -1) | ||
163 | ; | ||
164 | |||
165 | return c; | ||
166 | } | ||
167 | |||
168 | |||
169 | void __init udbg_init_rtas_console(void) | ||
170 | { | ||
171 | udbg_putc = udbg_rtascon_putc; | ||
172 | udbg_getc = udbg_rtascon_getc; | ||
173 | udbg_getc_poll = udbg_rtascon_getc_poll; | ||
174 | } | ||
175 | #endif /* CONFIG_UDBG_RTAS_CONSOLE */ | ||
176 | |||
114 | void rtas_progress(char *s, unsigned short hex) | 177 | void rtas_progress(char *s, unsigned short hex) |
115 | { | 178 | { |
116 | struct device_node *root; | 179 | struct device_node *root; |
@@ -236,6 +299,7 @@ int rtas_token(const char *service) | |||
236 | tokp = (int *) get_property(rtas.dev, service, NULL); | 299 | tokp = (int *) get_property(rtas.dev, service, NULL); |
237 | return tokp ? *tokp : RTAS_UNKNOWN_SERVICE; | 300 | return tokp ? *tokp : RTAS_UNKNOWN_SERVICE; |
238 | } | 301 | } |
302 | EXPORT_SYMBOL(rtas_token); | ||
239 | 303 | ||
240 | #ifdef CONFIG_RTAS_ERROR_LOGGING | 304 | #ifdef CONFIG_RTAS_ERROR_LOGGING |
241 | /* | 305 | /* |
@@ -328,7 +392,7 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...) | |||
328 | char *buff_copy = NULL; | 392 | char *buff_copy = NULL; |
329 | int ret; | 393 | int ret; |
330 | 394 | ||
331 | if (token == RTAS_UNKNOWN_SERVICE) | 395 | if (!rtas.entry || token == RTAS_UNKNOWN_SERVICE) |
332 | return -1; | 396 | return -1; |
333 | 397 | ||
334 | /* Gotta do something different here, use global lock for now... */ | 398 | /* Gotta do something different here, use global lock for now... */ |
@@ -369,6 +433,7 @@ int rtas_call(int token, int nargs, int nret, int *outputs, ...) | |||
369 | } | 433 | } |
370 | return ret; | 434 | return ret; |
371 | } | 435 | } |
436 | EXPORT_SYMBOL(rtas_call); | ||
372 | 437 | ||
373 | /* For RTAS_BUSY (-2), delay for 1 millisecond. For an extended busy status | 438 | /* For RTAS_BUSY (-2), delay for 1 millisecond. For an extended busy status |
374 | * code of 990n, perform the hinted delay of 10^n (last digit) milliseconds. | 439 | * code of 990n, perform the hinted delay of 10^n (last digit) milliseconds. |
@@ -388,6 +453,7 @@ unsigned int rtas_busy_delay_time(int status) | |||
388 | 453 | ||
389 | return ms; | 454 | return ms; |
390 | } | 455 | } |
456 | EXPORT_SYMBOL(rtas_busy_delay_time); | ||
391 | 457 | ||
392 | /* For an RTAS busy status code, perform the hinted delay. */ | 458 | /* For an RTAS busy status code, perform the hinted delay. */ |
393 | unsigned int rtas_busy_delay(int status) | 459 | unsigned int rtas_busy_delay(int status) |
@@ -401,6 +467,7 @@ unsigned int rtas_busy_delay(int status) | |||
401 | 467 | ||
402 | return ms; | 468 | return ms; |
403 | } | 469 | } |
470 | EXPORT_SYMBOL(rtas_busy_delay); | ||
404 | 471 | ||
405 | int rtas_error_rc(int rtas_rc) | 472 | int rtas_error_rc(int rtas_rc) |
406 | { | 473 | { |
@@ -446,6 +513,7 @@ int rtas_get_power_level(int powerdomain, int *level) | |||
446 | return rtas_error_rc(rc); | 513 | return rtas_error_rc(rc); |
447 | return rc; | 514 | return rc; |
448 | } | 515 | } |
516 | EXPORT_SYMBOL(rtas_get_power_level); | ||
449 | 517 | ||
450 | int rtas_set_power_level(int powerdomain, int level, int *setlevel) | 518 | int rtas_set_power_level(int powerdomain, int level, int *setlevel) |
451 | { | 519 | { |
@@ -463,6 +531,7 @@ int rtas_set_power_level(int powerdomain, int level, int *setlevel) | |||
463 | return rtas_error_rc(rc); | 531 | return rtas_error_rc(rc); |
464 | return rc; | 532 | return rc; |
465 | } | 533 | } |
534 | EXPORT_SYMBOL(rtas_set_power_level); | ||
466 | 535 | ||
467 | int rtas_get_sensor(int sensor, int index, int *state) | 536 | int rtas_get_sensor(int sensor, int index, int *state) |
468 | { | 537 | { |
@@ -480,6 +549,7 @@ int rtas_get_sensor(int sensor, int index, int *state) | |||
480 | return rtas_error_rc(rc); | 549 | return rtas_error_rc(rc); |
481 | return rc; | 550 | return rc; |
482 | } | 551 | } |
552 | EXPORT_SYMBOL(rtas_get_sensor); | ||
483 | 553 | ||
484 | int rtas_set_indicator(int indicator, int index, int new_value) | 554 | int rtas_set_indicator(int indicator, int index, int new_value) |
485 | { | 555 | { |
@@ -497,6 +567,7 @@ int rtas_set_indicator(int indicator, int index, int new_value) | |||
497 | return rtas_error_rc(rc); | 567 | return rtas_error_rc(rc); |
498 | return rc; | 568 | return rc; |
499 | } | 569 | } |
570 | EXPORT_SYMBOL(rtas_set_indicator); | ||
500 | 571 | ||
501 | void rtas_restart(char *cmd) | 572 | void rtas_restart(char *cmd) |
502 | { | 573 | { |
@@ -791,14 +862,34 @@ void __init rtas_initialize(void) | |||
791 | #endif | 862 | #endif |
792 | } | 863 | } |
793 | 864 | ||
865 | int __init early_init_dt_scan_rtas(unsigned long node, | ||
866 | const char *uname, int depth, void *data) | ||
867 | { | ||
868 | u32 *basep, *entryp, *sizep; | ||
794 | 869 | ||
795 | EXPORT_SYMBOL(rtas_token); | 870 | if (depth != 1 || strcmp(uname, "rtas") != 0) |
796 | EXPORT_SYMBOL(rtas_call); | 871 | return 0; |
797 | EXPORT_SYMBOL(rtas_data_buf); | 872 | |
798 | EXPORT_SYMBOL(rtas_data_buf_lock); | 873 | basep = of_get_flat_dt_prop(node, "linux,rtas-base", NULL); |
799 | EXPORT_SYMBOL(rtas_busy_delay_time); | 874 | entryp = of_get_flat_dt_prop(node, "linux,rtas-entry", NULL); |
800 | EXPORT_SYMBOL(rtas_busy_delay); | 875 | sizep = of_get_flat_dt_prop(node, "rtas-size", NULL); |
801 | EXPORT_SYMBOL(rtas_get_sensor); | 876 | |
802 | EXPORT_SYMBOL(rtas_get_power_level); | 877 | if (basep && entryp && sizep) { |
803 | EXPORT_SYMBOL(rtas_set_power_level); | 878 | rtas.base = *basep; |
804 | EXPORT_SYMBOL(rtas_set_indicator); | 879 | rtas.entry = *entryp; |
880 | rtas.size = *sizep; | ||
881 | } | ||
882 | |||
883 | #ifdef CONFIG_UDBG_RTAS_CONSOLE | ||
884 | basep = of_get_flat_dt_prop(node, "put-term-char", NULL); | ||
885 | if (basep) | ||
886 | rtas_putchar_token = *basep; | ||
887 | |||
888 | basep = of_get_flat_dt_prop(node, "get-term-char", NULL); | ||
889 | if (basep) | ||
890 | rtas_getchar_token = *basep; | ||
891 | #endif | ||
892 | |||
893 | /* break now */ | ||
894 | return 1; | ||
895 | } | ||
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index e5a44812441a..0932a62a1c96 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c | |||
@@ -215,7 +215,7 @@ int __init ppc_init(void) | |||
215 | 215 | ||
216 | /* register CPU devices */ | 216 | /* register CPU devices */ |
217 | for_each_possible_cpu(i) | 217 | for_each_possible_cpu(i) |
218 | register_cpu(&cpu_devices[i], i, NULL); | 218 | register_cpu(&cpu_devices[i], i); |
219 | 219 | ||
220 | /* call platform init */ | 220 | /* call platform init */ |
221 | if (ppc_md.init != NULL) { | 221 | if (ppc_md.init != NULL) { |
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 78f3a5fd43f6..175539c9afa0 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c | |||
@@ -149,6 +149,13 @@ early_param("smt-enabled", early_smt_enabled); | |||
149 | #define check_smt_enabled() | 149 | #define check_smt_enabled() |
150 | #endif /* CONFIG_SMP */ | 150 | #endif /* CONFIG_SMP */ |
151 | 151 | ||
152 | /* Put the paca pointer into r13 and SPRG3 */ | ||
153 | void __init setup_paca(int cpu) | ||
154 | { | ||
155 | local_paca = &paca[cpu]; | ||
156 | mtspr(SPRN_SPRG3, local_paca); | ||
157 | } | ||
158 | |||
152 | /* | 159 | /* |
153 | * Early initialization entry point. This is called by head.S | 160 | * Early initialization entry point. This is called by head.S |
154 | * with MMU translation disabled. We rely on the "feature" of | 161 | * with MMU translation disabled. We rely on the "feature" of |
@@ -170,6 +177,9 @@ early_param("smt-enabled", early_smt_enabled); | |||
170 | 177 | ||
171 | void __init early_setup(unsigned long dt_ptr) | 178 | void __init early_setup(unsigned long dt_ptr) |
172 | { | 179 | { |
180 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ | ||
181 | setup_paca(0); | ||
182 | |||
173 | /* Enable early debugging if any specified (see udbg.h) */ | 183 | /* Enable early debugging if any specified (see udbg.h) */ |
174 | udbg_early_init(); | 184 | udbg_early_init(); |
175 | 185 | ||
@@ -183,7 +193,7 @@ void __init early_setup(unsigned long dt_ptr) | |||
183 | early_init_devtree(__va(dt_ptr)); | 193 | early_init_devtree(__va(dt_ptr)); |
184 | 194 | ||
185 | /* Now we know the logical id of our boot cpu, setup the paca. */ | 195 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
186 | setup_boot_paca(); | 196 | setup_paca(boot_cpuid); |
187 | 197 | ||
188 | /* Fix up paca fields required for the boot cpu */ | 198 | /* Fix up paca fields required for the boot cpu */ |
189 | get_paca()->cpu_start = 1; | 199 | get_paca()->cpu_start = 1; |
@@ -350,19 +360,11 @@ void __init setup_system(void) | |||
350 | */ | 360 | */ |
351 | unflatten_device_tree(); | 361 | unflatten_device_tree(); |
352 | 362 | ||
353 | #ifdef CONFIG_KEXEC | ||
354 | kexec_setup(); /* requires unflattened device tree. */ | ||
355 | #endif | ||
356 | |||
357 | /* | 363 | /* |
358 | * Fill the ppc64_caches & systemcfg structures with informations | 364 | * Fill the ppc64_caches & systemcfg structures with informations |
359 | * retrieved from the device-tree. Need to be called before | 365 | * retrieved from the device-tree. Need to be called before |
360 | * finish_device_tree() since the later requires some of the | 366 | * finish_device_tree() since the later requires some of the |
361 | * informations filled up here to properly parse the interrupt | 367 | * informations filled up here to properly parse the interrupt tree. |
362 | * tree. | ||
363 | * It also sets up the cache line sizes which allows to call | ||
364 | * routines like flush_icache_range (used by the hash init | ||
365 | * later on). | ||
366 | */ | 368 | */ |
367 | initialize_cache_info(); | 369 | initialize_cache_info(); |
368 | 370 | ||
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c index 5bc2585c8036..4662b580efa1 100644 --- a/arch/powerpc/kernel/sysfs.c +++ b/arch/powerpc/kernel/sysfs.c | |||
@@ -279,7 +279,7 @@ static void unregister_cpu_online(unsigned int cpu) | |||
279 | } | 279 | } |
280 | #endif /* CONFIG_HOTPLUG_CPU */ | 280 | #endif /* CONFIG_HOTPLUG_CPU */ |
281 | 281 | ||
282 | static int sysfs_cpu_notify(struct notifier_block *self, | 282 | static int __devinit sysfs_cpu_notify(struct notifier_block *self, |
283 | unsigned long action, void *hcpu) | 283 | unsigned long action, void *hcpu) |
284 | { | 284 | { |
285 | unsigned int cpu = (unsigned int)(long)hcpu; | 285 | unsigned int cpu = (unsigned int)(long)hcpu; |
@@ -297,30 +297,19 @@ static int sysfs_cpu_notify(struct notifier_block *self, | |||
297 | return NOTIFY_OK; | 297 | return NOTIFY_OK; |
298 | } | 298 | } |
299 | 299 | ||
300 | static struct notifier_block sysfs_cpu_nb = { | 300 | static struct notifier_block __devinitdata sysfs_cpu_nb = { |
301 | .notifier_call = sysfs_cpu_notify, | 301 | .notifier_call = sysfs_cpu_notify, |
302 | }; | 302 | }; |
303 | 303 | ||
304 | /* NUMA stuff */ | 304 | /* NUMA stuff */ |
305 | 305 | ||
306 | #ifdef CONFIG_NUMA | 306 | #ifdef CONFIG_NUMA |
307 | static struct node node_devices[MAX_NUMNODES]; | ||
308 | |||
309 | static void register_nodes(void) | 307 | static void register_nodes(void) |
310 | { | 308 | { |
311 | int i; | 309 | int i; |
312 | 310 | ||
313 | for (i = 0; i < MAX_NUMNODES; i++) { | 311 | for (i = 0; i < MAX_NUMNODES; i++) |
314 | if (node_online(i)) { | 312 | register_one_node(i); |
315 | int p_node = parent_node(i); | ||
316 | struct node *parent = NULL; | ||
317 | |||
318 | if (p_node != i) | ||
319 | parent = &node_devices[p_node]; | ||
320 | |||
321 | register_node(&node_devices[i], i, parent); | ||
322 | } | ||
323 | } | ||
324 | } | 313 | } |
325 | 314 | ||
326 | int sysfs_add_device_to_node(struct sys_device *dev, int nid) | 315 | int sysfs_add_device_to_node(struct sys_device *dev, int nid) |
@@ -359,23 +348,13 @@ static SYSDEV_ATTR(physical_id, 0444, show_physical_id, NULL); | |||
359 | static int __init topology_init(void) | 348 | static int __init topology_init(void) |
360 | { | 349 | { |
361 | int cpu; | 350 | int cpu; |
362 | struct node *parent = NULL; | ||
363 | 351 | ||
364 | register_nodes(); | 352 | register_nodes(); |
365 | |||
366 | register_cpu_notifier(&sysfs_cpu_nb); | 353 | register_cpu_notifier(&sysfs_cpu_nb); |
367 | 354 | ||
368 | for_each_possible_cpu(cpu) { | 355 | for_each_possible_cpu(cpu) { |
369 | struct cpu *c = &per_cpu(cpu_devices, cpu); | 356 | struct cpu *c = &per_cpu(cpu_devices, cpu); |
370 | 357 | ||
371 | #ifdef CONFIG_NUMA | ||
372 | /* The node to which a cpu belongs can't be known | ||
373 | * until the cpu is made present. | ||
374 | */ | ||
375 | parent = NULL; | ||
376 | if (cpu_present(cpu)) | ||
377 | parent = &node_devices[cpu_to_node(cpu)]; | ||
378 | #endif | ||
379 | /* | 358 | /* |
380 | * For now, we just see if the system supports making | 359 | * For now, we just see if the system supports making |
381 | * the RTAS calls for CPU hotplug. But, there may be a | 360 | * the RTAS calls for CPU hotplug. But, there may be a |
@@ -387,7 +366,7 @@ static int __init topology_init(void) | |||
387 | c->no_control = 1; | 366 | c->no_control = 1; |
388 | 367 | ||
389 | if (cpu_online(cpu) || (c->no_control == 0)) { | 368 | if (cpu_online(cpu) || (c->no_control == 0)) { |
390 | register_cpu(c, cpu, parent); | 369 | register_cpu(c, cpu); |
391 | 370 | ||
392 | sysdev_create_file(&c->sysdev, &attr_physical_id); | 371 | sysdev_create_file(&c->sysdev, &attr_physical_id); |
393 | } | 372 | } |
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 52f5659534f4..fa6bd97b6b9d 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -52,9 +52,13 @@ | |||
52 | #include <asm/firmware.h> | 52 | #include <asm/firmware.h> |
53 | #include <asm/processor.h> | 53 | #include <asm/processor.h> |
54 | #endif | 54 | #endif |
55 | #include <asm/kexec.h> | ||
55 | 56 | ||
56 | #ifdef CONFIG_PPC64 /* XXX */ | 57 | #ifdef CONFIG_PPC64 /* XXX */ |
57 | #define _IO_BASE pci_io_base | 58 | #define _IO_BASE pci_io_base |
59 | #ifdef CONFIG_KEXEC | ||
60 | cpumask_t cpus_in_sr = CPU_MASK_NONE; | ||
61 | #endif | ||
58 | #endif | 62 | #endif |
59 | 63 | ||
60 | #ifdef CONFIG_DEBUGGER | 64 | #ifdef CONFIG_DEBUGGER |
@@ -97,7 +101,7 @@ static DEFINE_SPINLOCK(die_lock); | |||
97 | 101 | ||
98 | int die(const char *str, struct pt_regs *regs, long err) | 102 | int die(const char *str, struct pt_regs *regs, long err) |
99 | { | 103 | { |
100 | static int die_counter, crash_dump_start = 0; | 104 | static int die_counter; |
101 | 105 | ||
102 | if (debugger(regs)) | 106 | if (debugger(regs)) |
103 | return 1; | 107 | return 1; |
@@ -137,21 +141,12 @@ int die(const char *str, struct pt_regs *regs, long err) | |||
137 | print_modules(); | 141 | print_modules(); |
138 | show_regs(regs); | 142 | show_regs(regs); |
139 | bust_spinlocks(0); | 143 | bust_spinlocks(0); |
144 | spin_unlock_irq(&die_lock); | ||
140 | 145 | ||
141 | if (!crash_dump_start && kexec_should_crash(current)) { | 146 | if (kexec_should_crash(current) || |
142 | crash_dump_start = 1; | 147 | kexec_sr_activated(smp_processor_id())) |
143 | spin_unlock_irq(&die_lock); | ||
144 | crash_kexec(regs); | 148 | crash_kexec(regs); |
145 | /* NOTREACHED */ | 149 | crash_kexec_secondary(regs); |
146 | } | ||
147 | spin_unlock_irq(&die_lock); | ||
148 | if (crash_dump_start) | ||
149 | /* | ||
150 | * Only for soft-reset: Other CPUs will be responded to an IPI | ||
151 | * sent by first kexec CPU. | ||
152 | */ | ||
153 | for(;;) | ||
154 | ; | ||
155 | 150 | ||
156 | if (in_interrupt()) | 151 | if (in_interrupt()) |
157 | panic("Fatal exception in interrupt"); | 152 | panic("Fatal exception in interrupt"); |
@@ -215,6 +210,10 @@ void system_reset_exception(struct pt_regs *regs) | |||
215 | return; | 210 | return; |
216 | } | 211 | } |
217 | 212 | ||
213 | #ifdef CONFIG_KEXEC | ||
214 | cpu_set(smp_processor_id(), cpus_in_sr); | ||
215 | #endif | ||
216 | |||
218 | die("System Reset", regs, SIGABRT); | 217 | die("System Reset", regs, SIGABRT); |
219 | 218 | ||
220 | /* Must die if the interrupt is not recoverable */ | 219 | /* Must die if the interrupt is not recoverable */ |
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c index 67d9fd9ae2b5..759afd5e0d8a 100644 --- a/arch/powerpc/kernel/udbg.c +++ b/arch/powerpc/kernel/udbg.c | |||
@@ -34,9 +34,12 @@ void __init udbg_early_init(void) | |||
34 | #elif defined(CONFIG_PPC_EARLY_DEBUG_G5) | 34 | #elif defined(CONFIG_PPC_EARLY_DEBUG_G5) |
35 | /* For use on Apple G5 machines */ | 35 | /* For use on Apple G5 machines */ |
36 | udbg_init_pmac_realmode(); | 36 | udbg_init_pmac_realmode(); |
37 | #elif defined(CONFIG_PPC_EARLY_DEBUG_RTAS) | 37 | #elif defined(CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL) |
38 | /* RTAS panel debug */ | 38 | /* RTAS panel debug */ |
39 | udbg_init_rtas(); | 39 | udbg_init_rtas_panel(); |
40 | #elif defined(CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE) | ||
41 | /* RTAS console debug */ | ||
42 | udbg_init_rtas_console(); | ||
40 | #elif defined(CONFIG_PPC_EARLY_DEBUG_MAPLE) | 43 | #elif defined(CONFIG_PPC_EARLY_DEBUG_MAPLE) |
41 | /* Maple real mode debug */ | 44 | /* Maple real mode debug */ |
42 | udbg_init_maple_realmode(); | 45 | udbg_init_maple_realmode(); |
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index a0f3cbd00d39..c90f124f3c71 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c | |||
@@ -520,7 +520,7 @@ static inline int tlb_batching_enabled(void) | |||
520 | } | 520 | } |
521 | #endif | 521 | #endif |
522 | 522 | ||
523 | void hpte_init_native(void) | 523 | void __init hpte_init_native(void) |
524 | { | 524 | { |
525 | ppc_md.hpte_invalidate = native_hpte_invalidate; | 525 | ppc_md.hpte_invalidate = native_hpte_invalidate; |
526 | ppc_md.hpte_updatepp = native_hpte_updatepp; | 526 | ppc_md.hpte_updatepp = native_hpte_updatepp; |
@@ -530,5 +530,4 @@ void hpte_init_native(void) | |||
530 | ppc_md.hpte_clear_all = native_hpte_clear; | 530 | ppc_md.hpte_clear_all = native_hpte_clear; |
531 | if (tlb_batching_enabled()) | 531 | if (tlb_batching_enabled()) |
532 | ppc_md.flush_hash_range = native_flush_hash_range; | 532 | ppc_md.flush_hash_range = native_flush_hash_range; |
533 | htab_finish_init(); | ||
534 | } | 533 | } |
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index d03fd2b4445e..3cc6d68f7117 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c | |||
@@ -167,34 +167,12 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, | |||
167 | hash = hpt_hash(va, shift); | 167 | hash = hpt_hash(va, shift); |
168 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); | 168 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); |
169 | 169 | ||
170 | /* The crap below can be cleaned once ppd_md.probe() can | 170 | DBG("htab_bolt_mapping: calling %p\n", ppc_md.hpte_insert); |
171 | * set up the hash callbacks, thus we can just used the | 171 | |
172 | * normal insert callback here. | 172 | BUG_ON(!ppc_md.hpte_insert); |
173 | */ | 173 | ret = ppc_md.hpte_insert(hpteg, va, paddr, |
174 | #ifdef CONFIG_PPC_ISERIES | 174 | tmp_mode, HPTE_V_BOLTED, psize); |
175 | if (machine_is(iseries)) | 175 | |
176 | ret = iSeries_hpte_insert(hpteg, va, | ||
177 | paddr, | ||
178 | tmp_mode, | ||
179 | HPTE_V_BOLTED, | ||
180 | psize); | ||
181 | else | ||
182 | #endif | ||
183 | #ifdef CONFIG_PPC_PSERIES | ||
184 | if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR)) | ||
185 | ret = pSeries_lpar_hpte_insert(hpteg, va, | ||
186 | paddr, | ||
187 | tmp_mode, | ||
188 | HPTE_V_BOLTED, | ||
189 | psize); | ||
190 | else | ||
191 | #endif | ||
192 | #ifdef CONFIG_PPC_MULTIPLATFORM | ||
193 | ret = native_hpte_insert(hpteg, va, | ||
194 | paddr, | ||
195 | tmp_mode, HPTE_V_BOLTED, | ||
196 | psize); | ||
197 | #endif | ||
198 | if (ret < 0) | 176 | if (ret < 0) |
199 | break; | 177 | break; |
200 | } | 178 | } |
@@ -413,6 +391,41 @@ void create_section_mapping(unsigned long start, unsigned long end) | |||
413 | } | 391 | } |
414 | #endif /* CONFIG_MEMORY_HOTPLUG */ | 392 | #endif /* CONFIG_MEMORY_HOTPLUG */ |
415 | 393 | ||
394 | static inline void make_bl(unsigned int *insn_addr, void *func) | ||
395 | { | ||
396 | unsigned long funcp = *((unsigned long *)func); | ||
397 | int offset = funcp - (unsigned long)insn_addr; | ||
398 | |||
399 | *insn_addr = (unsigned int)(0x48000001 | (offset & 0x03fffffc)); | ||
400 | flush_icache_range((unsigned long)insn_addr, 4+ | ||
401 | (unsigned long)insn_addr); | ||
402 | } | ||
403 | |||
404 | static void __init htab_finish_init(void) | ||
405 | { | ||
406 | extern unsigned int *htab_call_hpte_insert1; | ||
407 | extern unsigned int *htab_call_hpte_insert2; | ||
408 | extern unsigned int *htab_call_hpte_remove; | ||
409 | extern unsigned int *htab_call_hpte_updatepp; | ||
410 | |||
411 | #ifdef CONFIG_PPC_64K_PAGES | ||
412 | extern unsigned int *ht64_call_hpte_insert1; | ||
413 | extern unsigned int *ht64_call_hpte_insert2; | ||
414 | extern unsigned int *ht64_call_hpte_remove; | ||
415 | extern unsigned int *ht64_call_hpte_updatepp; | ||
416 | |||
417 | make_bl(ht64_call_hpte_insert1, ppc_md.hpte_insert); | ||
418 | make_bl(ht64_call_hpte_insert2, ppc_md.hpte_insert); | ||
419 | make_bl(ht64_call_hpte_remove, ppc_md.hpte_remove); | ||
420 | make_bl(ht64_call_hpte_updatepp, ppc_md.hpte_updatepp); | ||
421 | #endif /* CONFIG_PPC_64K_PAGES */ | ||
422 | |||
423 | make_bl(htab_call_hpte_insert1, ppc_md.hpte_insert); | ||
424 | make_bl(htab_call_hpte_insert2, ppc_md.hpte_insert); | ||
425 | make_bl(htab_call_hpte_remove, ppc_md.hpte_remove); | ||
426 | make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp); | ||
427 | } | ||
428 | |||
416 | void __init htab_initialize(void) | 429 | void __init htab_initialize(void) |
417 | { | 430 | { |
418 | unsigned long table; | 431 | unsigned long table; |
@@ -525,6 +538,8 @@ void __init htab_initialize(void) | |||
525 | mmu_linear_psize)); | 538 | mmu_linear_psize)); |
526 | } | 539 | } |
527 | 540 | ||
541 | htab_finish_init(); | ||
542 | |||
528 | DBG(" <- htab_initialize()\n"); | 543 | DBG(" <- htab_initialize()\n"); |
529 | } | 544 | } |
530 | #undef KB | 545 | #undef KB |
@@ -787,16 +802,6 @@ void flush_hash_range(unsigned long number, int local) | |||
787 | } | 802 | } |
788 | } | 803 | } |
789 | 804 | ||
790 | static inline void make_bl(unsigned int *insn_addr, void *func) | ||
791 | { | ||
792 | unsigned long funcp = *((unsigned long *)func); | ||
793 | int offset = funcp - (unsigned long)insn_addr; | ||
794 | |||
795 | *insn_addr = (unsigned int)(0x48000001 | (offset & 0x03fffffc)); | ||
796 | flush_icache_range((unsigned long)insn_addr, 4+ | ||
797 | (unsigned long)insn_addr); | ||
798 | } | ||
799 | |||
800 | /* | 805 | /* |
801 | * low_hash_fault is called when we the low level hash code failed | 806 | * low_hash_fault is called when we the low level hash code failed |
802 | * to instert a PTE due to an hypervisor error | 807 | * to instert a PTE due to an hypervisor error |
@@ -815,28 +820,3 @@ void low_hash_fault(struct pt_regs *regs, unsigned long address) | |||
815 | } | 820 | } |
816 | bad_page_fault(regs, address, SIGBUS); | 821 | bad_page_fault(regs, address, SIGBUS); |
817 | } | 822 | } |
818 | |||
819 | void __init htab_finish_init(void) | ||
820 | { | ||
821 | extern unsigned int *htab_call_hpte_insert1; | ||
822 | extern unsigned int *htab_call_hpte_insert2; | ||
823 | extern unsigned int *htab_call_hpte_remove; | ||
824 | extern unsigned int *htab_call_hpte_updatepp; | ||
825 | |||
826 | #ifdef CONFIG_PPC_64K_PAGES | ||
827 | extern unsigned int *ht64_call_hpte_insert1; | ||
828 | extern unsigned int *ht64_call_hpte_insert2; | ||
829 | extern unsigned int *ht64_call_hpte_remove; | ||
830 | extern unsigned int *ht64_call_hpte_updatepp; | ||
831 | |||
832 | make_bl(ht64_call_hpte_insert1, ppc_md.hpte_insert); | ||
833 | make_bl(ht64_call_hpte_insert2, ppc_md.hpte_insert); | ||
834 | make_bl(ht64_call_hpte_remove, ppc_md.hpte_remove); | ||
835 | make_bl(ht64_call_hpte_updatepp, ppc_md.hpte_updatepp); | ||
836 | #endif /* CONFIG_PPC_64K_PAGES */ | ||
837 | |||
838 | make_bl(htab_call_hpte_insert1, ppc_md.hpte_insert); | ||
839 | make_bl(htab_call_hpte_insert2, ppc_md.hpte_insert); | ||
840 | make_bl(htab_call_hpte_remove, ppc_md.hpte_remove); | ||
841 | make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp); | ||
842 | } | ||
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c index 9e30f968c184..d454caada265 100644 --- a/arch/powerpc/mm/init_64.c +++ b/arch/powerpc/mm/init_64.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <linux/idr.h> | 41 | #include <linux/idr.h> |
42 | #include <linux/nodemask.h> | 42 | #include <linux/nodemask.h> |
43 | #include <linux/module.h> | 43 | #include <linux/module.h> |
44 | #include <linux/poison.h> | ||
44 | 45 | ||
45 | #include <asm/pgalloc.h> | 46 | #include <asm/pgalloc.h> |
46 | #include <asm/page.h> | 47 | #include <asm/page.h> |
@@ -90,7 +91,7 @@ void free_initmem(void) | |||
90 | 91 | ||
91 | addr = (unsigned long)__init_begin; | 92 | addr = (unsigned long)__init_begin; |
92 | for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) { | 93 | for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) { |
93 | memset((void *)addr, 0xcc, PAGE_SIZE); | 94 | memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE); |
94 | ClearPageReserved(virt_to_page(addr)); | 95 | ClearPageReserved(virt_to_page(addr)); |
95 | init_page_count(virt_to_page(addr)); | 96 | init_page_count(virt_to_page(addr)); |
96 | free_page(addr); | 97 | free_page(addr); |
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index 69f3b9a20beb..089d939a0b3e 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c | |||
@@ -114,15 +114,20 @@ void online_page(struct page *page) | |||
114 | num_physpages++; | 114 | num_physpages++; |
115 | } | 115 | } |
116 | 116 | ||
117 | int __devinit add_memory(u64 start, u64 size) | 117 | #ifdef CONFIG_NUMA |
118 | int memory_add_physaddr_to_nid(u64 start) | ||
119 | { | ||
120 | return hot_add_scn_to_nid(start); | ||
121 | } | ||
122 | #endif | ||
123 | |||
124 | int __devinit arch_add_memory(int nid, u64 start, u64 size) | ||
118 | { | 125 | { |
119 | struct pglist_data *pgdata; | 126 | struct pglist_data *pgdata; |
120 | struct zone *zone; | 127 | struct zone *zone; |
121 | int nid; | ||
122 | unsigned long start_pfn = start >> PAGE_SHIFT; | 128 | unsigned long start_pfn = start >> PAGE_SHIFT; |
123 | unsigned long nr_pages = size >> PAGE_SHIFT; | 129 | unsigned long nr_pages = size >> PAGE_SHIFT; |
124 | 130 | ||
125 | nid = hot_add_scn_to_nid(start); | ||
126 | pgdata = NODE_DATA(nid); | 131 | pgdata = NODE_DATA(nid); |
127 | 132 | ||
128 | start = (unsigned long)__va(start); | 133 | start = (unsigned long)__va(start); |
diff --git a/arch/powerpc/mm/mmu_context_64.c b/arch/powerpc/mm/mmu_context_64.c index 65d18dca266f..e2051efa09c5 100644 --- a/arch/powerpc/mm/mmu_context_64.c +++ b/arch/powerpc/mm/mmu_context_64.c | |||
@@ -44,7 +44,9 @@ again: | |||
44 | return err; | 44 | return err; |
45 | 45 | ||
46 | if (index > MAX_CONTEXT) { | 46 | if (index > MAX_CONTEXT) { |
47 | spin_lock(&mmu_context_lock); | ||
47 | idr_remove(&mmu_context_idr, index); | 48 | idr_remove(&mmu_context_idr, index); |
49 | spin_unlock(&mmu_context_lock); | ||
48 | return -ENOMEM; | 50 | return -ENOMEM; |
49 | } | 51 | } |
50 | 52 | ||
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index aa98cb3b59d8..fbe23933f731 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c | |||
@@ -334,7 +334,7 @@ out: | |||
334 | return nid; | 334 | return nid; |
335 | } | 335 | } |
336 | 336 | ||
337 | static int cpu_numa_callback(struct notifier_block *nfb, | 337 | static int __cpuinit cpu_numa_callback(struct notifier_block *nfb, |
338 | unsigned long action, | 338 | unsigned long action, |
339 | void *hcpu) | 339 | void *hcpu) |
340 | { | 340 | { |
@@ -609,14 +609,15 @@ static void __init *careful_allocation(int nid, unsigned long size, | |||
609 | return (void *)ret; | 609 | return (void *)ret; |
610 | } | 610 | } |
611 | 611 | ||
612 | static struct notifier_block __cpuinitdata ppc64_numa_nb = { | ||
613 | .notifier_call = cpu_numa_callback, | ||
614 | .priority = 1 /* Must run before sched domains notifier. */ | ||
615 | }; | ||
616 | |||
612 | void __init do_init_bootmem(void) | 617 | void __init do_init_bootmem(void) |
613 | { | 618 | { |
614 | int nid; | 619 | int nid; |
615 | unsigned int i; | 620 | unsigned int i; |
616 | static struct notifier_block ppc64_numa_nb = { | ||
617 | .notifier_call = cpu_numa_callback, | ||
618 | .priority = 1 /* Must run before sched domains notifier. */ | ||
619 | }; | ||
620 | 621 | ||
621 | min_low_pfn = 0; | 622 | min_low_pfn = 0; |
622 | max_low_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT; | 623 | max_low_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT; |
diff --git a/arch/powerpc/platforms/83xx/pci.c b/arch/powerpc/platforms/83xx/pci.c index 16f7d3b30e1d..3baceb00fefa 100644 --- a/arch/powerpc/platforms/83xx/pci.c +++ b/arch/powerpc/platforms/83xx/pci.c | |||
@@ -91,9 +91,10 @@ int __init add_bridge(struct device_node *dev) | |||
91 | mpc83xx_pci2_busno = hose->first_busno; | 91 | mpc83xx_pci2_busno = hose->first_busno; |
92 | } | 92 | } |
93 | 93 | ||
94 | printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%08lx. " | 94 | printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " |
95 | "Firmware bus number: %d->%d\n", | 95 | "Firmware bus number: %d->%d\n", |
96 | rsrc.start, hose->first_busno, hose->last_busno); | 96 | (unsigned long long)rsrc.start, hose->first_busno, |
97 | hose->last_busno); | ||
97 | 98 | ||
98 | DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", | 99 | DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", |
99 | hose, hose->cfg_addr, hose->cfg_data); | 100 | hose, hose->cfg_addr, hose->cfg_data); |
diff --git a/arch/powerpc/platforms/85xx/pci.c b/arch/powerpc/platforms/85xx/pci.c index bad290110ed1..48c8849c07ca 100644 --- a/arch/powerpc/platforms/85xx/pci.c +++ b/arch/powerpc/platforms/85xx/pci.c | |||
@@ -79,9 +79,10 @@ int __init add_bridge(struct device_node *dev) | |||
79 | mpc85xx_pci2_busno = hose->first_busno; | 79 | mpc85xx_pci2_busno = hose->first_busno; |
80 | } | 80 | } |
81 | 81 | ||
82 | printk(KERN_INFO "Found MPC85xx PCI host bridge at 0x%08lx. " | 82 | printk(KERN_INFO "Found MPC85xx PCI host bridge at 0x%016llx. " |
83 | "Firmware bus number: %d->%d\n", | 83 | "Firmware bus number: %d->%d\n", |
84 | rsrc.start, hose->first_busno, hose->last_busno); | 84 | (unsigned long long)rsrc.start, hose->first_busno, |
85 | hose->last_busno); | ||
85 | 86 | ||
86 | DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", | 87 | DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", |
87 | hose, hose->cfg_addr, hose->cfg_data); | 88 | hose, hose->cfg_addr, hose->cfg_data); |
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig index 3a87863d2876..d1ecc0f9ab58 100644 --- a/arch/powerpc/platforms/86xx/Kconfig +++ b/arch/powerpc/platforms/86xx/Kconfig | |||
@@ -7,6 +7,7 @@ choice | |||
7 | 7 | ||
8 | config MPC8641_HPCN | 8 | config MPC8641_HPCN |
9 | bool "Freescale MPC8641 HPCN" | 9 | bool "Freescale MPC8641 HPCN" |
10 | select PPC_I8259 | ||
10 | help | 11 | help |
11 | This option enables support for the MPC8641 HPCN board. | 12 | This option enables support for the MPC8641 HPCN board. |
12 | 13 | ||
@@ -28,9 +29,4 @@ config PPC_INDIRECT_PCI_BE | |||
28 | depends on PPC_86xx | 29 | depends on PPC_86xx |
29 | default y | 30 | default y |
30 | 31 | ||
31 | config PPC_STD_MMU | ||
32 | bool | ||
33 | depends on PPC_86xx | ||
34 | default y | ||
35 | |||
36 | endmenu | 32 | endmenu |
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile index 7be796c5d5c9..476a6eeee710 100644 --- a/arch/powerpc/platforms/86xx/Makefile +++ b/arch/powerpc/platforms/86xx/Makefile | |||
@@ -2,9 +2,6 @@ | |||
2 | # Makefile for the PowerPC 86xx linux kernel. | 2 | # Makefile for the PowerPC 86xx linux kernel. |
3 | # | 3 | # |
4 | 4 | ||
5 | |||
6 | ifeq ($(CONFIG_PPC_86xx),y) | ||
7 | obj-$(CONFIG_SMP) += mpc86xx_smp.o | 5 | obj-$(CONFIG_SMP) += mpc86xx_smp.o |
8 | endif | ||
9 | obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o | 6 | obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o |
10 | obj-$(CONFIG_PCI) += pci.o mpc86xx_pcie.o | 7 | obj-$(CONFIG_PCI) += pci.o mpc86xx_pcie.o |
diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h index 5042253758b7..5d2bcf78cef7 100644 --- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h +++ b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h | |||
@@ -14,7 +14,6 @@ | |||
14 | #ifndef __MPC8641_HPCN_H__ | 14 | #ifndef __MPC8641_HPCN_H__ |
15 | #define __MPC8641_HPCN_H__ | 15 | #define __MPC8641_HPCN_H__ |
16 | 16 | ||
17 | #include <linux/config.h> | ||
18 | #include <linux/init.h> | 17 | #include <linux/init.h> |
19 | 18 | ||
20 | /* PCI interrupt controller */ | 19 | /* PCI interrupt controller */ |
diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h index e3c9e4f417d3..2834462590b8 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx.h +++ b/arch/powerpc/platforms/86xx/mpc86xx.h | |||
@@ -15,11 +15,13 @@ | |||
15 | * mpc86xx_* files. Mostly for use by mpc86xx_setup(). | 15 | * mpc86xx_* files. Mostly for use by mpc86xx_setup(). |
16 | */ | 16 | */ |
17 | 17 | ||
18 | extern int __init add_bridge(struct device_node *dev); | 18 | extern int add_bridge(struct device_node *dev); |
19 | 19 | ||
20 | extern void __init setup_indirect_pcie(struct pci_controller *hose, | 20 | extern int mpc86xx_exclude_device(u_char bus, u_char devfn); |
21 | |||
22 | extern void setup_indirect_pcie(struct pci_controller *hose, | ||
21 | u32 cfg_addr, u32 cfg_data); | 23 | u32 cfg_addr, u32 cfg_data); |
22 | extern void __init setup_indirect_pcie_nomap(struct pci_controller *hose, | 24 | extern void setup_indirect_pcie_nomap(struct pci_controller *hose, |
23 | void __iomem *cfg_addr, | 25 | void __iomem *cfg_addr, |
24 | void __iomem *cfg_data); | 26 | void __iomem *cfg_data); |
25 | 27 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index 483c21df181e..ebae73eb0063 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
@@ -12,7 +12,6 @@ | |||
12 | * option) any later version. | 12 | * option) any later version. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/config.h> | ||
16 | #include <linux/stddef.h> | 15 | #include <linux/stddef.h> |
17 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
18 | #include <linux/pci.h> | 17 | #include <linux/pci.h> |
@@ -36,6 +35,7 @@ | |||
36 | #include <sysdev/fsl_soc.h> | 35 | #include <sysdev/fsl_soc.h> |
37 | 36 | ||
38 | #include "mpc86xx.h" | 37 | #include "mpc86xx.h" |
38 | #include "mpc8641_hpcn.h" | ||
39 | 39 | ||
40 | #ifndef CONFIG_PCI | 40 | #ifndef CONFIG_PCI |
41 | unsigned long isa_io_base = 0; | 41 | unsigned long isa_io_base = 0; |
@@ -186,17 +186,130 @@ mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | |||
186 | return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; | 186 | return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; |
187 | } | 187 | } |
188 | 188 | ||
189 | static void __devinit quirk_ali1575(struct pci_dev *dev) | ||
190 | { | ||
191 | unsigned short temp; | ||
192 | |||
193 | /* | ||
194 | * ALI1575 interrupts route table setup: | ||
195 | * | ||
196 | * IRQ pin IRQ# | ||
197 | * PIRQA ---- 3 | ||
198 | * PIRQB ---- 4 | ||
199 | * PIRQC ---- 5 | ||
200 | * PIRQD ---- 6 | ||
201 | * PIRQE ---- 9 | ||
202 | * PIRQF ---- 10 | ||
203 | * PIRQG ---- 11 | ||
204 | * PIRQH ---- 12 | ||
205 | * | ||
206 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
207 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
208 | */ | ||
209 | pci_write_config_dword(dev, 0x48, 0xb9317542); | ||
210 | |||
211 | /* USB 1.1 OHCI controller 1, interrupt: PIRQE */ | ||
212 | pci_write_config_byte(dev, 0x86, 0x0c); | ||
213 | |||
214 | /* USB 1.1 OHCI controller 2, interrupt: PIRQF */ | ||
215 | pci_write_config_byte(dev, 0x87, 0x0d); | ||
216 | |||
217 | /* USB 1.1 OHCI controller 3, interrupt: PIRQH */ | ||
218 | pci_write_config_byte(dev, 0x88, 0x0f); | ||
219 | |||
220 | /* USB 2.0 controller, interrupt: PIRQ7 */ | ||
221 | pci_write_config_byte(dev, 0x74, 0x06); | ||
222 | |||
223 | /* Audio controller, interrupt: PIRQE */ | ||
224 | pci_write_config_byte(dev, 0x8a, 0x0c); | ||
225 | |||
226 | /* Modem controller, interrupt: PIRQF */ | ||
227 | pci_write_config_byte(dev, 0x8b, 0x0d); | ||
228 | |||
229 | /* HD audio controller, interrupt: PIRQG */ | ||
230 | pci_write_config_byte(dev, 0x8c, 0x0e); | ||
231 | |||
232 | /* Serial ATA interrupt: PIRQD */ | ||
233 | pci_write_config_byte(dev, 0x8d, 0x0b); | ||
234 | |||
235 | /* SMB interrupt: PIRQH */ | ||
236 | pci_write_config_byte(dev, 0x8e, 0x0f); | ||
237 | |||
238 | /* PMU ACPI SCI interrupt: PIRQH */ | ||
239 | pci_write_config_byte(dev, 0x8f, 0x0f); | ||
240 | |||
241 | /* Primary PATA IDE IRQ: 14 | ||
242 | * Secondary PATA IDE IRQ: 15 | ||
243 | */ | ||
244 | pci_write_config_byte(dev, 0x44, 0x3d); | ||
245 | pci_write_config_byte(dev, 0x75, 0x0f); | ||
246 | |||
247 | /* Set IRQ14 and IRQ15 to legacy IRQs */ | ||
248 | pci_read_config_word(dev, 0x46, &temp); | ||
249 | temp |= 0xc000; | ||
250 | pci_write_config_word(dev, 0x46, temp); | ||
251 | |||
252 | /* Set i8259 interrupt trigger | ||
253 | * IRQ 3: Level | ||
254 | * IRQ 4: Level | ||
255 | * IRQ 5: Level | ||
256 | * IRQ 6: Level | ||
257 | * IRQ 7: Level | ||
258 | * IRQ 9: Level | ||
259 | * IRQ 10: Level | ||
260 | * IRQ 11: Level | ||
261 | * IRQ 12: Level | ||
262 | * IRQ 14: Edge | ||
263 | * IRQ 15: Edge | ||
264 | */ | ||
265 | outb(0xfa, 0x4d0); | ||
266 | outb(0x1e, 0x4d1); | ||
267 | } | ||
189 | 268 | ||
190 | int | 269 | static void __devinit quirk_uli5288(struct pci_dev *dev) |
191 | mpc86xx_exclude_device(u_char bus, u_char devfn) | ||
192 | { | 270 | { |
193 | #if !defined(CONFIG_PCI) | 271 | unsigned char c; |
194 | if (bus == 0 && PCI_SLOT(devfn) == 0) | 272 | |
195 | return PCIBIOS_DEVICE_NOT_FOUND; | 273 | pci_read_config_byte(dev,0x83,&c); |
196 | #endif | 274 | c |= 0x80; |
275 | pci_write_config_byte(dev, 0x83, c); | ||
276 | |||
277 | pci_write_config_byte(dev, 0x09, 0x01); | ||
278 | pci_write_config_byte(dev, 0x0a, 0x06); | ||
279 | |||
280 | pci_read_config_byte(dev,0x83,&c); | ||
281 | c &= 0x7f; | ||
282 | pci_write_config_byte(dev, 0x83, c); | ||
197 | 283 | ||
198 | return PCIBIOS_SUCCESSFUL; | 284 | pci_read_config_byte(dev,0x84,&c); |
285 | c |= 0x01; | ||
286 | pci_write_config_byte(dev, 0x84, c); | ||
199 | } | 287 | } |
288 | |||
289 | static void __devinit quirk_uli5229(struct pci_dev *dev) | ||
290 | { | ||
291 | unsigned short temp; | ||
292 | pci_write_config_word(dev, 0x04, 0x0405); | ||
293 | pci_read_config_word(dev, 0x4a, &temp); | ||
294 | temp |= 0x1000; | ||
295 | pci_write_config_word(dev, 0x4a, temp); | ||
296 | } | ||
297 | |||
298 | static void __devinit early_uli5249(struct pci_dev *dev) | ||
299 | { | ||
300 | unsigned char temp; | ||
301 | pci_write_config_word(dev, 0x04, 0x0007); | ||
302 | pci_read_config_byte(dev, 0x7c, &temp); | ||
303 | pci_write_config_byte(dev, 0x7c, 0x80); | ||
304 | pci_write_config_byte(dev, 0x09, 0x01); | ||
305 | pci_write_config_byte(dev, 0x7c, temp); | ||
306 | dev->class |= 0x1; | ||
307 | } | ||
308 | |||
309 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575); | ||
310 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); | ||
311 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); | ||
312 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); | ||
200 | #endif /* CONFIG_PCI */ | 313 | #endif /* CONFIG_PCI */ |
201 | 314 | ||
202 | 315 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c index 944ec4b71416..bb7fb41933ad 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c | |||
@@ -10,7 +10,6 @@ | |||
10 | * option) any later version. | 10 | * option) any later version. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/config.h> | ||
14 | #include <linux/stddef.h> | 13 | #include <linux/stddef.h> |
15 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | 15 | #include <linux/init.h> |
@@ -34,8 +33,8 @@ extern unsigned long __secondary_hold_acknowledge; | |||
34 | static void __init | 33 | static void __init |
35 | smp_86xx_release_core(int nr) | 34 | smp_86xx_release_core(int nr) |
36 | { | 35 | { |
37 | void *mcm_vaddr; | 36 | __be32 __iomem *mcm_vaddr; |
38 | unsigned long vaddr, pcr; | 37 | unsigned long pcr; |
39 | 38 | ||
40 | if (nr < 0 || nr >= NR_CPUS) | 39 | if (nr < 0 || nr >= NR_CPUS) |
41 | return; | 40 | return; |
@@ -45,10 +44,9 @@ smp_86xx_release_core(int nr) | |||
45 | */ | 44 | */ |
46 | mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET, | 45 | mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET, |
47 | MPC86xx_MCM_SIZE); | 46 | MPC86xx_MCM_SIZE); |
48 | vaddr = (unsigned long)mcm_vaddr + MCM_PORT_CONFIG_OFFSET; | 47 | pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2)); |
49 | pcr = in_be32((volatile unsigned *)vaddr); | ||
50 | pcr |= 1 << (nr + 24); | 48 | pcr |= 1 << (nr + 24); |
51 | out_be32((volatile unsigned *)vaddr, pcr); | 49 | out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr); |
52 | } | 50 | } |
53 | 51 | ||
54 | 52 | ||
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c index 5180df7c75bc..bc5139043112 100644 --- a/arch/powerpc/platforms/86xx/pci.c +++ b/arch/powerpc/platforms/86xx/pci.c | |||
@@ -12,7 +12,6 @@ | |||
12 | * option) any later version. | 12 | * option) any later version. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/config.h> | ||
16 | #include <linux/types.h> | 15 | #include <linux/types.h> |
17 | #include <linux/module.h> | 16 | #include <linux/module.h> |
18 | #include <linux/init.h> | 17 | #include <linux/init.h> |
@@ -122,15 +121,12 @@ static void __init setup_pcie_atmu(struct pci_controller *hose, struct resource | |||
122 | static void __init | 121 | static void __init |
123 | mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) | 122 | mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) |
124 | { | 123 | { |
125 | volatile struct ccsr_pex *pcie; | ||
126 | u16 cmd; | 124 | u16 cmd; |
127 | unsigned int temps; | 125 | unsigned int temps; |
128 | 126 | ||
129 | DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", | 127 | DBG("PCIE host controller register offset 0x%08x, size 0x%08x.\n", |
130 | pcie_offset, pcie_size); | 128 | pcie_offset, pcie_size); |
131 | 129 | ||
132 | pcie = ioremap(pcie_offset, pcie_size); | ||
133 | |||
134 | early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); | 130 | early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd); |
135 | cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | 131 | cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY |
136 | | PCI_COMMAND_IO; | 132 | | PCI_COMMAND_IO; |
@@ -144,6 +140,14 @@ mpc86xx_setup_pcie(struct pci_controller *hose, u32 pcie_offset, u32 pcie_size) | |||
144 | early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); | 140 | early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); |
145 | } | 141 | } |
146 | 142 | ||
143 | int mpc86xx_exclude_device(u_char bus, u_char devfn) | ||
144 | { | ||
145 | if (bus == 0 && PCI_SLOT(devfn) == 0) | ||
146 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
147 | |||
148 | return PCIBIOS_SUCCESSFUL; | ||
149 | } | ||
150 | |||
147 | int __init add_bridge(struct device_node *dev) | 151 | int __init add_bridge(struct device_node *dev) |
148 | { | 152 | { |
149 | int len; | 153 | int len; |
@@ -198,128 +202,3 @@ int __init add_bridge(struct device_node *dev) | |||
198 | 202 | ||
199 | return 0; | 203 | return 0; |
200 | } | 204 | } |
201 | |||
202 | static void __devinit quirk_ali1575(struct pci_dev *dev) | ||
203 | { | ||
204 | unsigned short temp; | ||
205 | |||
206 | /* | ||
207 | * ALI1575 interrupts route table setup: | ||
208 | * | ||
209 | * IRQ pin IRQ# | ||
210 | * PIRQA ---- 3 | ||
211 | * PIRQB ---- 4 | ||
212 | * PIRQC ---- 5 | ||
213 | * PIRQD ---- 6 | ||
214 | * PIRQE ---- 9 | ||
215 | * PIRQF ---- 10 | ||
216 | * PIRQG ---- 11 | ||
217 | * PIRQH ---- 12 | ||
218 | * | ||
219 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
220 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
221 | */ | ||
222 | pci_write_config_dword(dev, 0x48, 0xb9317542); | ||
223 | |||
224 | /* USB 1.1 OHCI controller 1, interrupt: PIRQE */ | ||
225 | pci_write_config_byte(dev, 0x86, 0x0c); | ||
226 | |||
227 | /* USB 1.1 OHCI controller 2, interrupt: PIRQF */ | ||
228 | pci_write_config_byte(dev, 0x87, 0x0d); | ||
229 | |||
230 | /* USB 1.1 OHCI controller 3, interrupt: PIRQH */ | ||
231 | pci_write_config_byte(dev, 0x88, 0x0f); | ||
232 | |||
233 | /* USB 2.0 controller, interrupt: PIRQ7 */ | ||
234 | pci_write_config_byte(dev, 0x74, 0x06); | ||
235 | |||
236 | /* Audio controller, interrupt: PIRQE */ | ||
237 | pci_write_config_byte(dev, 0x8a, 0x0c); | ||
238 | |||
239 | /* Modem controller, interrupt: PIRQF */ | ||
240 | pci_write_config_byte(dev, 0x8b, 0x0d); | ||
241 | |||
242 | /* HD audio controller, interrupt: PIRQG */ | ||
243 | pci_write_config_byte(dev, 0x8c, 0x0e); | ||
244 | |||
245 | /* Serial ATA interrupt: PIRQD */ | ||
246 | pci_write_config_byte(dev, 0x8d, 0x0b); | ||
247 | |||
248 | /* SMB interrupt: PIRQH */ | ||
249 | pci_write_config_byte(dev, 0x8e, 0x0f); | ||
250 | |||
251 | /* PMU ACPI SCI interrupt: PIRQH */ | ||
252 | pci_write_config_byte(dev, 0x8f, 0x0f); | ||
253 | |||
254 | /* Primary PATA IDE IRQ: 14 | ||
255 | * Secondary PATA IDE IRQ: 15 | ||
256 | */ | ||
257 | pci_write_config_byte(dev, 0x44, 0x3d); | ||
258 | pci_write_config_byte(dev, 0x75, 0x0f); | ||
259 | |||
260 | /* Set IRQ14 and IRQ15 to legacy IRQs */ | ||
261 | pci_read_config_word(dev, 0x46, &temp); | ||
262 | temp |= 0xc000; | ||
263 | pci_write_config_word(dev, 0x46, temp); | ||
264 | |||
265 | /* Set i8259 interrupt trigger | ||
266 | * IRQ 3: Level | ||
267 | * IRQ 4: Level | ||
268 | * IRQ 5: Level | ||
269 | * IRQ 6: Level | ||
270 | * IRQ 7: Level | ||
271 | * IRQ 9: Level | ||
272 | * IRQ 10: Level | ||
273 | * IRQ 11: Level | ||
274 | * IRQ 12: Level | ||
275 | * IRQ 14: Edge | ||
276 | * IRQ 15: Edge | ||
277 | */ | ||
278 | outb(0xfa, 0x4d0); | ||
279 | outb(0x1e, 0x4d1); | ||
280 | } | ||
281 | |||
282 | static void __devinit quirk_uli5288(struct pci_dev *dev) | ||
283 | { | ||
284 | unsigned char c; | ||
285 | |||
286 | pci_read_config_byte(dev,0x83,&c); | ||
287 | c |= 0x80; | ||
288 | pci_write_config_byte(dev, 0x83, c); | ||
289 | |||
290 | pci_write_config_byte(dev, 0x09, 0x01); | ||
291 | pci_write_config_byte(dev, 0x0a, 0x06); | ||
292 | |||
293 | pci_read_config_byte(dev,0x83,&c); | ||
294 | c &= 0x7f; | ||
295 | pci_write_config_byte(dev, 0x83, c); | ||
296 | |||
297 | pci_read_config_byte(dev,0x84,&c); | ||
298 | c |= 0x01; | ||
299 | pci_write_config_byte(dev, 0x84, c); | ||
300 | } | ||
301 | |||
302 | static void __devinit quirk_uli5229(struct pci_dev *dev) | ||
303 | { | ||
304 | unsigned short temp; | ||
305 | pci_write_config_word(dev, 0x04, 0x0405); | ||
306 | pci_read_config_word(dev, 0x4a, &temp); | ||
307 | temp |= 0x1000; | ||
308 | pci_write_config_word(dev, 0x4a, temp); | ||
309 | } | ||
310 | |||
311 | static void __devinit early_uli5249(struct pci_dev *dev) | ||
312 | { | ||
313 | unsigned char temp; | ||
314 | pci_write_config_word(dev, 0x04, 0x0007); | ||
315 | pci_read_config_byte(dev, 0x7c, &temp); | ||
316 | pci_write_config_byte(dev, 0x7c, 0x80); | ||
317 | pci_write_config_byte(dev, 0x09, 0x01); | ||
318 | pci_write_config_byte(dev, 0x7c, temp); | ||
319 | dev->class |= 0x1; | ||
320 | } | ||
321 | |||
322 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575); | ||
323 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); | ||
324 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); | ||
325 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); | ||
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile index 292863694562..5cf46dc57895 100644 --- a/arch/powerpc/platforms/Makefile +++ b/arch/powerpc/platforms/Makefile | |||
@@ -14,3 +14,4 @@ obj-$(CONFIG_PPC_PSERIES) += pseries/ | |||
14 | obj-$(CONFIG_PPC_ISERIES) += iseries/ | 14 | obj-$(CONFIG_PPC_ISERIES) += iseries/ |
15 | obj-$(CONFIG_PPC_MAPLE) += maple/ | 15 | obj-$(CONFIG_PPC_MAPLE) += maple/ |
16 | obj-$(CONFIG_PPC_CELL) += cell/ | 16 | obj-$(CONFIG_PPC_CELL) += cell/ |
17 | obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/ | ||
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig index 352bbbacde9a..0c8c7b6ab897 100644 --- a/arch/powerpc/platforms/cell/Kconfig +++ b/arch/powerpc/platforms/cell/Kconfig | |||
@@ -6,6 +6,7 @@ config SPU_FS | |||
6 | default m | 6 | default m |
7 | depends on PPC_CELL | 7 | depends on PPC_CELL |
8 | select SPU_BASE | 8 | select SPU_BASE |
9 | select MEMORY_HOTPLUG | ||
9 | help | 10 | help |
10 | The SPU file system is used to access Synergistic Processing | 11 | The SPU file system is used to access Synergistic Processing |
11 | Units on machines implementing the Broadband Processor | 12 | Units on machines implementing the Broadband Processor |
@@ -18,7 +19,6 @@ config SPU_BASE | |||
18 | config SPUFS_MMAP | 19 | config SPUFS_MMAP |
19 | bool | 20 | bool |
20 | depends on SPU_FS && SPARSEMEM | 21 | depends on SPU_FS && SPARSEMEM |
21 | select MEMORY_HOTPLUG | ||
22 | default y | 22 | default y |
23 | 23 | ||
24 | config CBE_RAS | 24 | config CBE_RAS |
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 1bbf822b4efc..7bff3cbc5723 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c | |||
@@ -307,7 +307,7 @@ static void iic_request_ipi(int ipi, const char *name) | |||
307 | irq = iic_ipi_to_irq(ipi); | 307 | irq = iic_ipi_to_irq(ipi); |
308 | /* IPIs are marked SA_INTERRUPT as they must run with irqs | 308 | /* IPIs are marked SA_INTERRUPT as they must run with irqs |
309 | * disabled */ | 309 | * disabled */ |
310 | get_irq_desc(irq)->handler = &iic_pic; | 310 | get_irq_desc(irq)->chip = &iic_pic; |
311 | get_irq_desc(irq)->status |= IRQ_PER_CPU; | 311 | get_irq_desc(irq)->status |= IRQ_PER_CPU; |
312 | request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL); | 312 | request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL); |
313 | } | 313 | } |
@@ -330,7 +330,7 @@ static void iic_setup_spe_handlers(void) | |||
330 | for (be=0; be < num_present_cpus() / 2; be++) { | 330 | for (be=0; be < num_present_cpus() / 2; be++) { |
331 | for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) { | 331 | for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) { |
332 | int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc; | 332 | int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc; |
333 | get_irq_desc(irq)->handler = &iic_pic; | 333 | get_irq_desc(irq)->chip = &iic_pic; |
334 | } | 334 | } |
335 | } | 335 | } |
336 | } | 336 | } |
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c index 3d1831d331e5..00d112f92272 100644 --- a/arch/powerpc/platforms/cell/setup.c +++ b/arch/powerpc/platforms/cell/setup.c | |||
@@ -125,8 +125,6 @@ static void __init cell_init_early(void) | |||
125 | { | 125 | { |
126 | DBG(" -> cell_init_early()\n"); | 126 | DBG(" -> cell_init_early()\n"); |
127 | 127 | ||
128 | hpte_init_native(); | ||
129 | |||
130 | cell_init_iommu(); | 128 | cell_init_iommu(); |
131 | 129 | ||
132 | ppc64_interrupt_controller = IC_CELL_PIC; | 130 | ppc64_interrupt_controller = IC_CELL_PIC; |
@@ -139,11 +137,17 @@ static int __init cell_probe(void) | |||
139 | { | 137 | { |
140 | unsigned long root = of_get_flat_dt_root(); | 138 | unsigned long root = of_get_flat_dt_root(); |
141 | 139 | ||
142 | if (of_flat_dt_is_compatible(root, "IBM,CBEA") || | 140 | if (!of_flat_dt_is_compatible(root, "IBM,CBEA") && |
143 | of_flat_dt_is_compatible(root, "IBM,CPBW-1.0")) | 141 | !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0")) |
144 | return 1; | 142 | return 0; |
143 | |||
144 | #ifdef CONFIG_UDBG_RTAS_CONSOLE | ||
145 | udbg_init_rtas_console(); | ||
146 | #endif | ||
147 | |||
148 | hpte_init_native(); | ||
145 | 149 | ||
146 | return 0; | 150 | return 1; |
147 | } | 151 | } |
148 | 152 | ||
149 | /* | 153 | /* |
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index 55cbdd77a62d..7c3a0b6d34fd 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c | |||
@@ -162,7 +162,7 @@ void spider_init_IRQ_hardcoded(void) | |||
162 | spider_pics[node] = ioremap(spiderpic, 0x800); | 162 | spider_pics[node] = ioremap(spiderpic, 0x800); |
163 | for (n = 0; n < IIC_NUM_EXT; n++) { | 163 | for (n = 0; n < IIC_NUM_EXT; n++) { |
164 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; | 164 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; |
165 | get_irq_desc(irq)->handler = &spider_pic; | 165 | get_irq_desc(irq)->chip = &spider_pic; |
166 | } | 166 | } |
167 | 167 | ||
168 | /* do not mask any interrupts because of level */ | 168 | /* do not mask any interrupts because of level */ |
@@ -217,7 +217,7 @@ void spider_init_IRQ(void) | |||
217 | 217 | ||
218 | for (n = 0; n < IIC_NUM_EXT; n++) { | 218 | for (n = 0; n < IIC_NUM_EXT; n++) { |
219 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; | 219 | int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; |
220 | get_irq_desc(irq)->handler = &spider_pic; | 220 | get_irq_desc(irq)->chip = &spider_pic; |
221 | } | 221 | } |
222 | 222 | ||
223 | /* do not mask any interrupts because of level */ | 223 | /* do not mask any interrupts because of level */ |
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index db82f503ba2c..b306723abb87 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c | |||
@@ -168,12 +168,12 @@ spu_irq_class_0_bottom(struct spu *spu) | |||
168 | 168 | ||
169 | stat &= mask; | 169 | stat &= mask; |
170 | 170 | ||
171 | if (stat & 1) /* invalid MFC DMA */ | 171 | if (stat & 1) /* invalid DMA alignment */ |
172 | __spu_trap_invalid_dma(spu); | ||
173 | |||
174 | if (stat & 2) /* invalid DMA alignment */ | ||
175 | __spu_trap_dma_align(spu); | 172 | __spu_trap_dma_align(spu); |
176 | 173 | ||
174 | if (stat & 2) /* invalid MFC DMA */ | ||
175 | __spu_trap_invalid_dma(spu); | ||
176 | |||
177 | if (stat & 4) /* error on SPU */ | 177 | if (stat & 4) /* error on SPU */ |
178 | __spu_trap_error(spu); | 178 | __spu_trap_error(spu); |
179 | 179 | ||
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index 7854a380dce2..58e794f9da1b 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c | |||
@@ -204,7 +204,7 @@ static int spufs_cntl_mmap(struct file *file, struct vm_area_struct *vma) | |||
204 | 204 | ||
205 | vma->vm_flags |= VM_RESERVED; | 205 | vma->vm_flags |= VM_RESERVED; |
206 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 206 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
207 | | _PAGE_NO_CACHE); | 207 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
208 | 208 | ||
209 | vma->vm_ops = &spufs_cntl_mmap_vmops; | 209 | vma->vm_ops = &spufs_cntl_mmap_vmops; |
210 | return 0; | 210 | return 0; |
@@ -675,7 +675,7 @@ static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma) | |||
675 | 675 | ||
676 | vma->vm_flags |= VM_RESERVED; | 676 | vma->vm_flags |= VM_RESERVED; |
677 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 677 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
678 | | _PAGE_NO_CACHE); | 678 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
679 | 679 | ||
680 | vma->vm_ops = &spufs_signal1_mmap_vmops; | 680 | vma->vm_ops = &spufs_signal1_mmap_vmops; |
681 | return 0; | 681 | return 0; |
@@ -762,7 +762,7 @@ static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma) | |||
762 | /* FIXME: */ | 762 | /* FIXME: */ |
763 | vma->vm_flags |= VM_RESERVED; | 763 | vma->vm_flags |= VM_RESERVED; |
764 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 764 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
765 | | _PAGE_NO_CACHE); | 765 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
766 | 766 | ||
767 | vma->vm_ops = &spufs_signal2_mmap_vmops; | 767 | vma->vm_ops = &spufs_signal2_mmap_vmops; |
768 | return 0; | 768 | return 0; |
@@ -850,7 +850,7 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma) | |||
850 | 850 | ||
851 | vma->vm_flags |= VM_RESERVED; | 851 | vma->vm_flags |= VM_RESERVED; |
852 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 852 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
853 | | _PAGE_NO_CACHE); | 853 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
854 | 854 | ||
855 | vma->vm_ops = &spufs_mss_mmap_vmops; | 855 | vma->vm_ops = &spufs_mss_mmap_vmops; |
856 | return 0; | 856 | return 0; |
@@ -899,7 +899,7 @@ static int spufs_mfc_mmap(struct file *file, struct vm_area_struct *vma) | |||
899 | 899 | ||
900 | vma->vm_flags |= VM_RESERVED; | 900 | vma->vm_flags |= VM_RESERVED; |
901 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 901 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
902 | | _PAGE_NO_CACHE); | 902 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
903 | 903 | ||
904 | vma->vm_ops = &spufs_mfc_mmap_vmops; | 904 | vma->vm_ops = &spufs_mfc_mmap_vmops; |
905 | return 0; | 905 | return 0; |
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c index 3068b429b031..c7fea2cca534 100644 --- a/arch/powerpc/platforms/cell/spufs/switch.c +++ b/arch/powerpc/platforms/cell/spufs/switch.c | |||
@@ -464,7 +464,8 @@ static inline void wait_purge_complete(struct spu_state *csa, struct spu *spu) | |||
464 | * Poll MFC_CNTL[Ps] until value '11' is read | 464 | * Poll MFC_CNTL[Ps] until value '11' is read |
465 | * (purge complete). | 465 | * (purge complete). |
466 | */ | 466 | */ |
467 | POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) & | 467 | POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & |
468 | MFC_CNTL_PURGE_DMA_STATUS_MASK) == | ||
468 | MFC_CNTL_PURGE_DMA_COMPLETE); | 469 | MFC_CNTL_PURGE_DMA_COMPLETE); |
469 | } | 470 | } |
470 | 471 | ||
@@ -1028,7 +1029,8 @@ static inline void wait_suspend_mfc_complete(struct spu_state *csa, | |||
1028 | * Restore, Step 47. | 1029 | * Restore, Step 47. |
1029 | * Poll MFC_CNTL[Ss] until 11 is returned. | 1030 | * Poll MFC_CNTL[Ss] until 11 is returned. |
1030 | */ | 1031 | */ |
1031 | POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) & | 1032 | POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & |
1033 | MFC_CNTL_SUSPEND_DMA_STATUS_MASK) == | ||
1032 | MFC_CNTL_SUSPEND_COMPLETE); | 1034 | MFC_CNTL_SUSPEND_COMPLETE); |
1033 | } | 1035 | } |
1034 | 1036 | ||
@@ -2203,7 +2205,7 @@ void spu_init_csa(struct spu_state *csa) | |||
2203 | 2205 | ||
2204 | memset(lscsa, 0, sizeof(struct spu_lscsa)); | 2206 | memset(lscsa, 0, sizeof(struct spu_lscsa)); |
2205 | csa->lscsa = lscsa; | 2207 | csa->lscsa = lscsa; |
2206 | csa->register_lock = SPIN_LOCK_UNLOCKED; | 2208 | spin_lock_init(&csa->register_lock); |
2207 | 2209 | ||
2208 | /* Set LS pages reserved to allow for user-space mapping. */ | 2210 | /* Set LS pages reserved to allow for user-space mapping. */ |
2209 | for (p = lscsa->ls; p < lscsa->ls + LS_SIZE; p += PAGE_SIZE) | 2211 | for (p = lscsa->ls; p < lscsa->ls + LS_SIZE; p += PAGE_SIZE) |
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c index ac224876ce59..53515daf01b1 100644 --- a/arch/powerpc/platforms/chrp/pci.c +++ b/arch/powerpc/platforms/chrp/pci.c | |||
@@ -143,7 +143,7 @@ hydra_init(void) | |||
143 | if (np == NULL || of_address_to_resource(np, 0, &r)) | 143 | if (np == NULL || of_address_to_resource(np, 0, &r)) |
144 | return 0; | 144 | return 0; |
145 | Hydra = ioremap(r.start, r.end-r.start); | 145 | Hydra = ioremap(r.start, r.end-r.start); |
146 | printk("Hydra Mac I/O at %lx\n", r.start); | 146 | printk("Hydra Mac I/O at %llx\n", (unsigned long long)r.start); |
147 | printk("Hydra Feature_Control was %x", | 147 | printk("Hydra Feature_Control was %x", |
148 | in_le32(&Hydra->Feature_Control)); | 148 | in_le32(&Hydra->Feature_Control)); |
149 | out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN | | 149 | out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN | |
@@ -267,7 +267,7 @@ chrp_find_bridges(void) | |||
267 | bus_range[0], bus_range[1]); | 267 | bus_range[0], bus_range[1]); |
268 | printk(" controlled by %s", dev->type); | 268 | printk(" controlled by %s", dev->type); |
269 | if (!is_longtrail) | 269 | if (!is_longtrail) |
270 | printk(" at %lx", r.start); | 270 | printk(" at %llx", (unsigned long long)r.start); |
271 | printk("\n"); | 271 | printk("\n"); |
272 | 272 | ||
273 | hose = pcibios_alloc_controller(); | 273 | hose = pcibios_alloc_controller(); |
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig index 4fdbc9ae876b..ba07a9a7c039 100644 --- a/arch/powerpc/platforms/embedded6xx/Kconfig +++ b/arch/powerpc/platforms/embedded6xx/Kconfig | |||
@@ -74,6 +74,16 @@ config SANDPOINT | |||
74 | Select SANDPOINT if configuring for a Motorola Sandpoint X3 | 74 | Select SANDPOINT if configuring for a Motorola Sandpoint X3 |
75 | (any flavor). | 75 | (any flavor). |
76 | 76 | ||
77 | config MPC7448HPC2 | ||
78 | bool "Freescale MPC7448HPC2(Taiga)" | ||
79 | select TSI108_BRIDGE | ||
80 | select DEFAULT_UIMAGE | ||
81 | select PPC_UDBG_16550 | ||
82 | select MPIC | ||
83 | help | ||
84 | Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga) | ||
85 | platform | ||
86 | |||
77 | config RADSTONE_PPC7D | 87 | config RADSTONE_PPC7D |
78 | bool "Radstone Technology PPC7D board" | 88 | bool "Radstone Technology PPC7D board" |
79 | select PPC_I8259 | 89 | select PPC_I8259 |
@@ -221,6 +231,11 @@ config MV64X60 | |||
221 | select PPC_INDIRECT_PCI | 231 | select PPC_INDIRECT_PCI |
222 | default y | 232 | default y |
223 | 233 | ||
234 | config TSI108_BRIDGE | ||
235 | bool | ||
236 | depends on MPC7448HPC2 | ||
237 | default y | ||
238 | |||
224 | menu "Set bridge options" | 239 | menu "Set bridge options" |
225 | depends on MV64X60 | 240 | depends on MV64X60 |
226 | 241 | ||
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile new file mode 100644 index 000000000000..fa499fe59291 --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/Makefile | |||
@@ -0,0 +1,4 @@ | |||
1 | # | ||
2 | # Makefile for the 6xx/7xx/7xxxx linux kernel. | ||
3 | # | ||
4 | obj-$(CONFIG_MPC7448HPC2) += mpc7448_hpc2.o | ||
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c new file mode 100644 index 000000000000..d7a4fc7ca238 --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | |||
@@ -0,0 +1,335 @@ | |||
1 | /* | ||
2 | * mpc7448_hpc2.c | ||
3 | * | ||
4 | * Board setup routines for the Freescale Taiga platform | ||
5 | * | ||
6 | * Author: Jacob Pan | ||
7 | * jacob.pan@freescale.com | ||
8 | * Author: Xianghua Xiao | ||
9 | * x.xiao@freescale.com | ||
10 | * Maintainer: Roy Zang <tie-fei.zang@freescale.com> | ||
11 | * Add Flat Device Tree support fot mpc7448hpc2 board | ||
12 | * | ||
13 | * Copyright 2004-2006 Freescale Semiconductor, Inc. | ||
14 | * | ||
15 | * This file is licensed under | ||
16 | * the terms of the GNU General Public License version 2. This program | ||
17 | * is licensed "as is" without any warranty of any kind, whether express | ||
18 | * or implied. | ||
19 | */ | ||
20 | |||
21 | #include <linux/config.h> | ||
22 | #include <linux/stddef.h> | ||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/pci.h> | ||
25 | #include <linux/kdev_t.h> | ||
26 | #include <linux/console.h> | ||
27 | #include <linux/delay.h> | ||
28 | #include <linux/irq.h> | ||
29 | #include <linux/ide.h> | ||
30 | #include <linux/seq_file.h> | ||
31 | #include <linux/root_dev.h> | ||
32 | #include <linux/serial.h> | ||
33 | #include <linux/tty.h> | ||
34 | #include <linux/serial_core.h> | ||
35 | |||
36 | #include <asm/system.h> | ||
37 | #include <asm/time.h> | ||
38 | #include <asm/machdep.h> | ||
39 | #include <asm/prom.h> | ||
40 | #include <asm/udbg.h> | ||
41 | #include <asm/tsi108.h> | ||
42 | #include <asm/pci-bridge.h> | ||
43 | #include <asm/reg.h> | ||
44 | #include <mm/mmu_decl.h> | ||
45 | #include "mpc7448_hpc2.h" | ||
46 | #include <asm/tsi108_irq.h> | ||
47 | #include <asm/mpic.h> | ||
48 | |||
49 | #undef DEBUG | ||
50 | #ifdef DEBUG | ||
51 | #define DBG(fmt...) do { printk(fmt); } while(0) | ||
52 | #else | ||
53 | #define DBG(fmt...) do { } while(0) | ||
54 | #endif | ||
55 | |||
56 | #ifndef CONFIG_PCI | ||
57 | isa_io_base = MPC7448_HPC2_ISA_IO_BASE; | ||
58 | isa_mem_base = MPC7448_HPC2_ISA_MEM_BASE; | ||
59 | pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET; | ||
60 | #endif | ||
61 | |||
62 | extern int tsi108_setup_pci(struct device_node *dev); | ||
63 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); | ||
64 | extern void tsi108_pci_int_init(void); | ||
65 | extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused); | ||
66 | |||
67 | /* | ||
68 | * Define all of the IRQ senses and polarities. Taken from the | ||
69 | * mpc7448hpc manual. | ||
70 | * Note: Likely, this table and the following function should be | ||
71 | * obtained and derived from the OF Device Tree. | ||
72 | */ | ||
73 | |||
74 | static u_char mpc7448_hpc2_pic_initsenses[] __initdata = { | ||
75 | /* External on-board sources */ | ||
76 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */ | ||
77 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */ | ||
78 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */ | ||
79 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */ | ||
80 | /* Internal Tsi108/109 interrupt sources */ | ||
81 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
82 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
83 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
84 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
85 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */ | ||
86 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */ | ||
87 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */ | ||
88 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */ | ||
89 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */ | ||
90 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */ | ||
91 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */ | ||
92 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */ | ||
93 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */ | ||
94 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */ | ||
95 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
96 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */ | ||
97 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */ | ||
98 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */ | ||
99 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
100 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */ | ||
101 | }; | ||
102 | |||
103 | int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) | ||
104 | { | ||
105 | if (bus == 0 && PCI_SLOT(devfn) == 0) | ||
106 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
107 | else | ||
108 | return PCIBIOS_SUCCESSFUL; | ||
109 | } | ||
110 | |||
111 | /* | ||
112 | * find pci slot by devfn in interrupt map of OF tree | ||
113 | */ | ||
114 | u8 find_slot_by_devfn(unsigned int *interrupt_map, unsigned int devfn) | ||
115 | { | ||
116 | int i; | ||
117 | unsigned int tmp; | ||
118 | for (i = 0; i < 4; i++){ | ||
119 | tmp = interrupt_map[i*4*7]; | ||
120 | if ((tmp >> 11) == (devfn >> 3)) | ||
121 | return i; | ||
122 | } | ||
123 | return i; | ||
124 | } | ||
125 | |||
126 | /* | ||
127 | * Scans the interrupt map for pci device | ||
128 | */ | ||
129 | void mpc7448_hpc2_fixup_irq(struct pci_dev *dev) | ||
130 | { | ||
131 | struct pci_controller *hose; | ||
132 | struct device_node *node; | ||
133 | unsigned int *interrupt; | ||
134 | int busnr; | ||
135 | int len; | ||
136 | u8 slot; | ||
137 | u8 pin; | ||
138 | |||
139 | /* Lookup the hose */ | ||
140 | busnr = dev->bus->number; | ||
141 | hose = pci_bus_to_hose(busnr); | ||
142 | if (!hose) | ||
143 | printk(KERN_ERR "No pci hose found\n"); | ||
144 | |||
145 | /* Check it has an OF node associated */ | ||
146 | node = (struct device_node *) hose->arch_data; | ||
147 | if (!node) | ||
148 | printk(KERN_ERR "No pci node found\n"); | ||
149 | |||
150 | interrupt = (unsigned int *) get_property(node, "interrupt-map", &len); | ||
151 | slot = find_slot_by_devfn(interrupt, dev->devfn); | ||
152 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); | ||
153 | if (pin == 0 || pin > 4) | ||
154 | pin = 1; | ||
155 | pin--; | ||
156 | dev->irq = interrupt[slot*4*7 + pin*7 + 5]; | ||
157 | DBG("TSI_PCI: dev->irq = 0x%x\n", dev->irq); | ||
158 | } | ||
159 | /* temporary pci irq map fixup*/ | ||
160 | |||
161 | void __init mpc7448_hpc2_pcibios_fixup(void) | ||
162 | { | ||
163 | struct pci_dev *dev = NULL; | ||
164 | for_each_pci_dev(dev) { | ||
165 | mpc7448_hpc2_fixup_irq(dev); | ||
166 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); | ||
167 | } | ||
168 | } | ||
169 | |||
170 | static void __init mpc7448_hpc2_setup_arch(void) | ||
171 | { | ||
172 | struct device_node *cpu; | ||
173 | struct device_node *np; | ||
174 | if (ppc_md.progress) | ||
175 | ppc_md.progress("mpc7448_hpc2_setup_arch():set_bridge", 0); | ||
176 | |||
177 | cpu = of_find_node_by_type(NULL, "cpu"); | ||
178 | if (cpu != 0) { | ||
179 | unsigned int *fp; | ||
180 | |||
181 | fp = (int *)get_property(cpu, "clock-frequency", NULL); | ||
182 | if (fp != 0) | ||
183 | loops_per_jiffy = *fp / HZ; | ||
184 | else | ||
185 | loops_per_jiffy = 50000000 / HZ; | ||
186 | of_node_put(cpu); | ||
187 | } | ||
188 | tsi108_csr_vir_base = get_vir_csrbase(); | ||
189 | |||
190 | #ifdef CONFIG_ROOT_NFS | ||
191 | ROOT_DEV = Root_NFS; | ||
192 | #else | ||
193 | ROOT_DEV = Root_HDA1; | ||
194 | #endif | ||
195 | |||
196 | #ifdef CONFIG_BLK_DEV_INITRD | ||
197 | ROOT_DEV = Root_RAM0; | ||
198 | #endif | ||
199 | |||
200 | /* setup PCI host bridge */ | ||
201 | #ifdef CONFIG_PCI | ||
202 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | ||
203 | tsi108_setup_pci(np); | ||
204 | |||
205 | ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device; | ||
206 | if (ppc_md.progress) | ||
207 | ppc_md.progress("tsi108: resources set", 0x100); | ||
208 | #endif | ||
209 | |||
210 | printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n"); | ||
211 | printk(KERN_INFO | ||
212 | "Jointly ported by Freescale and Tundra Semiconductor\n"); | ||
213 | printk(KERN_INFO | ||
214 | "Enabling L2 cache then enabling the HID0 prefetch engine.\n"); | ||
215 | } | ||
216 | |||
217 | /* | ||
218 | * Interrupt setup and service. Interrrupts on the mpc7448_hpc2 come | ||
219 | * from the four external INT pins, PCI interrupts are routed via | ||
220 | * PCI interrupt control registers, it generates internal IRQ23 | ||
221 | * | ||
222 | * Interrupt routing on the Taiga Board: | ||
223 | * TSI108:PB_INT[0] -> CPU0:INT# | ||
224 | * TSI108:PB_INT[1] -> CPU0:MCP# | ||
225 | * TSI108:PB_INT[2] -> N/C | ||
226 | * TSI108:PB_INT[3] -> N/C | ||
227 | */ | ||
228 | static void __init mpc7448_hpc2_init_IRQ(void) | ||
229 | { | ||
230 | struct mpic *mpic; | ||
231 | phys_addr_t mpic_paddr = 0; | ||
232 | struct device_node *tsi_pic; | ||
233 | |||
234 | tsi_pic = of_find_node_by_type(NULL, "open-pic"); | ||
235 | if (tsi_pic) { | ||
236 | unsigned int size; | ||
237 | void *prop = get_property(tsi_pic, "reg", &size); | ||
238 | mpic_paddr = of_translate_address(tsi_pic, prop); | ||
239 | } | ||
240 | |||
241 | if (mpic_paddr == 0) { | ||
242 | printk("%s: No tsi108 PIC found !\n", __FUNCTION__); | ||
243 | return; | ||
244 | } | ||
245 | |||
246 | DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, | ||
247 | (u32) mpic_paddr); | ||
248 | |||
249 | mpic = mpic_alloc(mpic_paddr, | ||
250 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | | ||
251 | MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108), | ||
252 | 0, /* num_sources used */ | ||
253 | TSI108_IRQ_BASE, | ||
254 | 0, /* num_sources used */ | ||
255 | NR_IRQS - 4 /* XXXX */, | ||
256 | mpc7448_hpc2_pic_initsenses, | ||
257 | sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC"); | ||
258 | |||
259 | BUG_ON(mpic == NULL); /* XXXX */ | ||
260 | |||
261 | mpic_init(mpic); | ||
262 | mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic); | ||
263 | tsi108_pci_int_init(); | ||
264 | |||
265 | /* Configure MPIC outputs to CPU0 */ | ||
266 | tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); | ||
267 | } | ||
268 | |||
269 | void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) | ||
270 | { | ||
271 | seq_printf(m, "vendor\t\t: Freescale Semiconductor\n"); | ||
272 | seq_printf(m, "machine\t\t: MPC7448hpc2\n"); | ||
273 | } | ||
274 | |||
275 | void mpc7448_hpc2_restart(char *cmd) | ||
276 | { | ||
277 | local_irq_disable(); | ||
278 | |||
279 | /* Set exception prefix high - to the firmware */ | ||
280 | _nmask_and_or_msr(0, MSR_IP); | ||
281 | |||
282 | for (;;) ; /* Spin until reset happens */ | ||
283 | } | ||
284 | |||
285 | void mpc7448_hpc2_power_off(void) | ||
286 | { | ||
287 | local_irq_disable(); | ||
288 | for (;;) ; /* No way to shut power off with software */ | ||
289 | } | ||
290 | |||
291 | void mpc7448_hpc2_halt(void) | ||
292 | { | ||
293 | mpc7448_hpc2_power_off(); | ||
294 | } | ||
295 | |||
296 | /* | ||
297 | * Called very early, device-tree isn't unflattened | ||
298 | */ | ||
299 | static int __init mpc7448_hpc2_probe(void) | ||
300 | { | ||
301 | unsigned long root = of_get_flat_dt_root(); | ||
302 | |||
303 | if (!of_flat_dt_is_compatible(root, "mpc74xx")) | ||
304 | return 0; | ||
305 | return 1; | ||
306 | } | ||
307 | |||
308 | static int mpc7448_machine_check_exception(struct pt_regs *regs) | ||
309 | { | ||
310 | extern void tsi108_clear_pci_cfg_error(void); | ||
311 | const struct exception_table_entry *entry; | ||
312 | |||
313 | /* Are we prepared to handle this fault */ | ||
314 | if ((entry = search_exception_tables(regs->nip)) != NULL) { | ||
315 | tsi108_clear_pci_cfg_error(); | ||
316 | regs->msr |= MSR_RI; | ||
317 | regs->nip = entry->fixup; | ||
318 | return 1; | ||
319 | } | ||
320 | return 0; | ||
321 | |||
322 | } | ||
323 | define_machine(mpc7448_hpc2){ | ||
324 | .name = "MPC7448 HPC2", | ||
325 | .probe = mpc7448_hpc2_probe, | ||
326 | .setup_arch = mpc7448_hpc2_setup_arch, | ||
327 | .init_IRQ = mpc7448_hpc2_init_IRQ, | ||
328 | .show_cpuinfo = mpc7448_hpc2_show_cpuinfo, | ||
329 | .get_irq = mpic_get_irq, | ||
330 | .pcibios_fixup = mpc7448_hpc2_pcibios_fixup, | ||
331 | .restart = mpc7448_hpc2_restart, | ||
332 | .calibrate_decr = generic_calibrate_decr, | ||
333 | .machine_check_exception= mpc7448_machine_check_exception, | ||
334 | .progress = udbg_progress, | ||
335 | }; | ||
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h new file mode 100644 index 000000000000..a543a5242e34 --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h | |||
@@ -0,0 +1,26 @@ | |||
1 | /* | ||
2 | * mpc7448_hpc2.h | ||
3 | * | ||
4 | * Definitions for Freescale MPC7448_HPC2 platform | ||
5 | * | ||
6 | * Author: Jacob Pan | ||
7 | * jacob.pan@freescale.com | ||
8 | * Maintainer: Roy Zang <roy.zang@freescale.com> | ||
9 | * | ||
10 | * 2006 (c) Freescale Semiconductor, Inc. This file is licensed under | ||
11 | * the terms of the GNU General Public License version 2. This program | ||
12 | * is licensed "as is" without any warranty of any kind, whether express | ||
13 | * or implied. | ||
14 | */ | ||
15 | |||
16 | #ifndef __PPC_PLATFORMS_MPC7448_HPC2_H | ||
17 | #define __PPC_PLATFORMS_MPC7448_HPC2_H | ||
18 | |||
19 | #include <asm/ppcboot.h> | ||
20 | |||
21 | /* Base Addresses for the PCI bus | ||
22 | */ | ||
23 | #define MPC7448_HPC2_PCI_MEM_OFFSET (0x00000000) | ||
24 | #define MPC7448_HPC2_ISA_IO_BASE (0x00000000) | ||
25 | #define MPC7448_HPC2_ISA_MEM_BASE (0x00000000) | ||
26 | #endif /* __PPC_PLATFORMS_MPC7448_HPC2_H */ | ||
diff --git a/arch/powerpc/platforms/iseries/dt.c b/arch/powerpc/platforms/iseries/dt.c index d3444aabe76e..d194140c1ebf 100644 --- a/arch/powerpc/platforms/iseries/dt.c +++ b/arch/powerpc/platforms/iseries/dt.c | |||
@@ -252,6 +252,7 @@ static void __init dt_model(struct iseries_flat_dt *dt) | |||
252 | { | 252 | { |
253 | char buf[16] = "IBM,"; | 253 | char buf[16] = "IBM,"; |
254 | 254 | ||
255 | /* N.B. lparcfg.c knows about the "IBM," prefixes ... */ | ||
255 | /* "IBM," + mfgId[2:3] + systemSerial[1:5] */ | 256 | /* "IBM," + mfgId[2:3] + systemSerial[1:5] */ |
256 | strne2a(buf + 4, xItExtVpdPanel.mfgID + 2, 2); | 257 | strne2a(buf + 4, xItExtVpdPanel.mfgID + 2, 2); |
257 | strne2a(buf + 6, xItExtVpdPanel.systemSerial + 1, 5); | 258 | strne2a(buf + 6, xItExtVpdPanel.systemSerial + 1, 5); |
@@ -264,6 +265,7 @@ static void __init dt_model(struct iseries_flat_dt *dt) | |||
264 | dt_prop_str(dt, "model", buf); | 265 | dt_prop_str(dt, "model", buf); |
265 | 266 | ||
266 | dt_prop_str(dt, "compatible", "IBM,iSeries"); | 267 | dt_prop_str(dt, "compatible", "IBM,iSeries"); |
268 | dt_prop_u32(dt, "ibm,partition-no", HvLpConfig_getLpIndex()); | ||
267 | } | 269 | } |
268 | 270 | ||
269 | static void __init dt_do_vdevice(struct iseries_flat_dt *dt, | 271 | static void __init dt_do_vdevice(struct iseries_flat_dt *dt, |
diff --git a/arch/powerpc/platforms/iseries/htab.c b/arch/powerpc/platforms/iseries/htab.c index 30bdcf3925d9..ed44dfceaa45 100644 --- a/arch/powerpc/platforms/iseries/htab.c +++ b/arch/powerpc/platforms/iseries/htab.c | |||
@@ -242,13 +242,11 @@ static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va, | |||
242 | local_irq_restore(flags); | 242 | local_irq_restore(flags); |
243 | } | 243 | } |
244 | 244 | ||
245 | void hpte_init_iSeries(void) | 245 | void __init hpte_init_iSeries(void) |
246 | { | 246 | { |
247 | ppc_md.hpte_invalidate = iSeries_hpte_invalidate; | 247 | ppc_md.hpte_invalidate = iSeries_hpte_invalidate; |
248 | ppc_md.hpte_updatepp = iSeries_hpte_updatepp; | 248 | ppc_md.hpte_updatepp = iSeries_hpte_updatepp; |
249 | ppc_md.hpte_updateboltedpp = iSeries_hpte_updateboltedpp; | 249 | ppc_md.hpte_updateboltedpp = iSeries_hpte_updateboltedpp; |
250 | ppc_md.hpte_insert = iSeries_hpte_insert; | 250 | ppc_md.hpte_insert = iSeries_hpte_insert; |
251 | ppc_md.hpte_remove = iSeries_hpte_remove; | 251 | ppc_md.hpte_remove = iSeries_hpte_remove; |
252 | |||
253 | htab_finish_init(); | ||
254 | } | 252 | } |
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index 62bbbcf5ded3..33bb4aa0e1e8 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c | |||
@@ -242,9 +242,9 @@ void __init iSeries_activate_IRQs() | |||
242 | for_each_irq (irq) { | 242 | for_each_irq (irq) { |
243 | irq_desc_t *desc = get_irq_desc(irq); | 243 | irq_desc_t *desc = get_irq_desc(irq); |
244 | 244 | ||
245 | if (desc && desc->handler && desc->handler->startup) { | 245 | if (desc && desc->chip && desc->chip->startup) { |
246 | spin_lock_irqsave(&desc->lock, flags); | 246 | spin_lock_irqsave(&desc->lock, flags); |
247 | desc->handler->startup(irq); | 247 | desc->chip->startup(irq); |
248 | spin_unlock_irqrestore(&desc->lock, flags); | 248 | spin_unlock_irqrestore(&desc->lock, flags); |
249 | } | 249 | } |
250 | } | 250 | } |
@@ -324,7 +324,7 @@ int __init iSeries_allocate_IRQ(HvBusNumber bus, | |||
324 | + function; | 324 | + function; |
325 | virtirq = virt_irq_create_mapping(realirq); | 325 | virtirq = virt_irq_create_mapping(realirq); |
326 | 326 | ||
327 | irq_desc[virtirq].handler = &iSeries_IRQ_handler; | 327 | irq_desc[virtirq].chip = &iSeries_IRQ_handler; |
328 | return virtirq; | 328 | return virtirq; |
329 | } | 329 | } |
330 | 330 | ||
diff --git a/arch/powerpc/platforms/iseries/lpevents.c b/arch/powerpc/platforms/iseries/lpevents.c index 8ca7b9396355..2a9f81ea27d6 100644 --- a/arch/powerpc/platforms/iseries/lpevents.c +++ b/arch/powerpc/platforms/iseries/lpevents.c | |||
@@ -51,20 +51,21 @@ static unsigned lpEventHandlerPaths[HvLpEvent_Type_NumTypes]; | |||
51 | static struct HvLpEvent * get_next_hvlpevent(void) | 51 | static struct HvLpEvent * get_next_hvlpevent(void) |
52 | { | 52 | { |
53 | struct HvLpEvent * event; | 53 | struct HvLpEvent * event; |
54 | event = (struct HvLpEvent *)hvlpevent_queue.xSlicCurEventPtr; | 54 | event = (struct HvLpEvent *)hvlpevent_queue.hq_current_event; |
55 | 55 | ||
56 | if (hvlpevent_is_valid(event)) { | 56 | if (hvlpevent_is_valid(event)) { |
57 | /* rmb() needed only for weakly consistent machines (regatta) */ | 57 | /* rmb() needed only for weakly consistent machines (regatta) */ |
58 | rmb(); | 58 | rmb(); |
59 | /* Set pointer to next potential event */ | 59 | /* Set pointer to next potential event */ |
60 | hvlpevent_queue.xSlicCurEventPtr += ((event->xSizeMinus1 + | 60 | hvlpevent_queue.hq_current_event += ((event->xSizeMinus1 + |
61 | LpEventAlign) / LpEventAlign) * LpEventAlign; | 61 | IT_LP_EVENT_ALIGN) / IT_LP_EVENT_ALIGN) * |
62 | IT_LP_EVENT_ALIGN; | ||
62 | 63 | ||
63 | /* Wrap to beginning if no room at end */ | 64 | /* Wrap to beginning if no room at end */ |
64 | if (hvlpevent_queue.xSlicCurEventPtr > | 65 | if (hvlpevent_queue.hq_current_event > |
65 | hvlpevent_queue.xSlicLastValidEventPtr) { | 66 | hvlpevent_queue.hq_last_event) { |
66 | hvlpevent_queue.xSlicCurEventPtr = | 67 | hvlpevent_queue.hq_current_event = |
67 | hvlpevent_queue.xSlicEventStackPtr; | 68 | hvlpevent_queue.hq_event_stack; |
68 | } | 69 | } |
69 | } else { | 70 | } else { |
70 | event = NULL; | 71 | event = NULL; |
@@ -82,10 +83,10 @@ int hvlpevent_is_pending(void) | |||
82 | if (smp_processor_id() >= spread_lpevents) | 83 | if (smp_processor_id() >= spread_lpevents) |
83 | return 0; | 84 | return 0; |
84 | 85 | ||
85 | next_event = (struct HvLpEvent *)hvlpevent_queue.xSlicCurEventPtr; | 86 | next_event = (struct HvLpEvent *)hvlpevent_queue.hq_current_event; |
86 | 87 | ||
87 | return hvlpevent_is_valid(next_event) || | 88 | return hvlpevent_is_valid(next_event) || |
88 | hvlpevent_queue.xPlicOverflowIntPending; | 89 | hvlpevent_queue.hq_overflow_pending; |
89 | } | 90 | } |
90 | 91 | ||
91 | static void hvlpevent_clear_valid(struct HvLpEvent * event) | 92 | static void hvlpevent_clear_valid(struct HvLpEvent * event) |
@@ -95,18 +96,18 @@ static void hvlpevent_clear_valid(struct HvLpEvent * event) | |||
95 | * ie. on 64-byte boundaries. | 96 | * ie. on 64-byte boundaries. |
96 | */ | 97 | */ |
97 | struct HvLpEvent *tmp; | 98 | struct HvLpEvent *tmp; |
98 | unsigned extra = ((event->xSizeMinus1 + LpEventAlign) / | 99 | unsigned extra = ((event->xSizeMinus1 + IT_LP_EVENT_ALIGN) / |
99 | LpEventAlign) - 1; | 100 | IT_LP_EVENT_ALIGN) - 1; |
100 | 101 | ||
101 | switch (extra) { | 102 | switch (extra) { |
102 | case 3: | 103 | case 3: |
103 | tmp = (struct HvLpEvent*)((char*)event + 3 * LpEventAlign); | 104 | tmp = (struct HvLpEvent*)((char*)event + 3 * IT_LP_EVENT_ALIGN); |
104 | hvlpevent_invalidate(tmp); | 105 | hvlpevent_invalidate(tmp); |
105 | case 2: | 106 | case 2: |
106 | tmp = (struct HvLpEvent*)((char*)event + 2 * LpEventAlign); | 107 | tmp = (struct HvLpEvent*)((char*)event + 2 * IT_LP_EVENT_ALIGN); |
107 | hvlpevent_invalidate(tmp); | 108 | hvlpevent_invalidate(tmp); |
108 | case 1: | 109 | case 1: |
109 | tmp = (struct HvLpEvent*)((char*)event + 1 * LpEventAlign); | 110 | tmp = (struct HvLpEvent*)((char*)event + 1 * IT_LP_EVENT_ALIGN); |
110 | hvlpevent_invalidate(tmp); | 111 | hvlpevent_invalidate(tmp); |
111 | } | 112 | } |
112 | 113 | ||
@@ -120,7 +121,7 @@ void process_hvlpevents(struct pt_regs *regs) | |||
120 | struct HvLpEvent * event; | 121 | struct HvLpEvent * event; |
121 | 122 | ||
122 | /* If we have recursed, just return */ | 123 | /* If we have recursed, just return */ |
123 | if (!spin_trylock(&hvlpevent_queue.lock)) | 124 | if (!spin_trylock(&hvlpevent_queue.hq_lock)) |
124 | return; | 125 | return; |
125 | 126 | ||
126 | for (;;) { | 127 | for (;;) { |
@@ -148,17 +149,17 @@ void process_hvlpevents(struct pt_regs *regs) | |||
148 | printk(KERN_INFO "Unexpected Lp Event type=%d\n", event->xType ); | 149 | printk(KERN_INFO "Unexpected Lp Event type=%d\n", event->xType ); |
149 | 150 | ||
150 | hvlpevent_clear_valid(event); | 151 | hvlpevent_clear_valid(event); |
151 | } else if (hvlpevent_queue.xPlicOverflowIntPending) | 152 | } else if (hvlpevent_queue.hq_overflow_pending) |
152 | /* | 153 | /* |
153 | * No more valid events. If overflow events are | 154 | * No more valid events. If overflow events are |
154 | * pending process them | 155 | * pending process them |
155 | */ | 156 | */ |
156 | HvCallEvent_getOverflowLpEvents(hvlpevent_queue.xIndex); | 157 | HvCallEvent_getOverflowLpEvents(hvlpevent_queue.hq_index); |
157 | else | 158 | else |
158 | break; | 159 | break; |
159 | } | 160 | } |
160 | 161 | ||
161 | spin_unlock(&hvlpevent_queue.lock); | 162 | spin_unlock(&hvlpevent_queue.hq_lock); |
162 | } | 163 | } |
163 | 164 | ||
164 | static int set_spread_lpevents(char *str) | 165 | static int set_spread_lpevents(char *str) |
@@ -184,20 +185,20 @@ void setup_hvlpevent_queue(void) | |||
184 | { | 185 | { |
185 | void *eventStack; | 186 | void *eventStack; |
186 | 187 | ||
187 | spin_lock_init(&hvlpevent_queue.lock); | 188 | spin_lock_init(&hvlpevent_queue.hq_lock); |
188 | 189 | ||
189 | /* Allocate a page for the Event Stack. */ | 190 | /* Allocate a page for the Event Stack. */ |
190 | eventStack = alloc_bootmem_pages(LpEventStackSize); | 191 | eventStack = alloc_bootmem_pages(IT_LP_EVENT_STACK_SIZE); |
191 | memset(eventStack, 0, LpEventStackSize); | 192 | memset(eventStack, 0, IT_LP_EVENT_STACK_SIZE); |
192 | 193 | ||
193 | /* Invoke the hypervisor to initialize the event stack */ | 194 | /* Invoke the hypervisor to initialize the event stack */ |
194 | HvCallEvent_setLpEventStack(0, eventStack, LpEventStackSize); | 195 | HvCallEvent_setLpEventStack(0, eventStack, IT_LP_EVENT_STACK_SIZE); |
195 | 196 | ||
196 | hvlpevent_queue.xSlicEventStackPtr = (char *)eventStack; | 197 | hvlpevent_queue.hq_event_stack = eventStack; |
197 | hvlpevent_queue.xSlicCurEventPtr = (char *)eventStack; | 198 | hvlpevent_queue.hq_current_event = eventStack; |
198 | hvlpevent_queue.xSlicLastValidEventPtr = (char *)eventStack + | 199 | hvlpevent_queue.hq_last_event = (char *)eventStack + |
199 | (LpEventStackSize - LpEventMaxSize); | 200 | (IT_LP_EVENT_STACK_SIZE - IT_LP_EVENT_MAX_SIZE); |
200 | hvlpevent_queue.xIndex = 0; | 201 | hvlpevent_queue.hq_index = 0; |
201 | } | 202 | } |
202 | 203 | ||
203 | /* Register a handler for an LpEvent type */ | 204 | /* Register a handler for an LpEvent type */ |
diff --git a/arch/powerpc/platforms/iseries/proc.c b/arch/powerpc/platforms/iseries/proc.c index e68b6b5fa89f..c241413629ac 100644 --- a/arch/powerpc/platforms/iseries/proc.c +++ b/arch/powerpc/platforms/iseries/proc.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <asm/processor.h> | 24 | #include <asm/processor.h> |
25 | #include <asm/time.h> | 25 | #include <asm/time.h> |
26 | #include <asm/lppaca.h> | 26 | #include <asm/lppaca.h> |
27 | #include <asm/iseries/it_lp_queue.h> | ||
28 | #include <asm/iseries/hv_call_xm.h> | 27 | #include <asm/iseries/hv_call_xm.h> |
29 | 28 | ||
30 | #include "processor_vpd.h" | 29 | #include "processor_vpd.h" |
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c index 617c724c4590..66c77e4f8ec2 100644 --- a/arch/powerpc/platforms/iseries/setup.c +++ b/arch/powerpc/platforms/iseries/setup.c | |||
@@ -81,8 +81,6 @@ static void iSeries_pci_final_fixup(void) { } | |||
81 | #endif | 81 | #endif |
82 | 82 | ||
83 | extern int rd_size; /* Defined in drivers/block/rd.c */ | 83 | extern int rd_size; /* Defined in drivers/block/rd.c */ |
84 | extern unsigned long embedded_sysmap_start; | ||
85 | extern unsigned long embedded_sysmap_end; | ||
86 | 84 | ||
87 | extern unsigned long iSeries_recal_tb; | 85 | extern unsigned long iSeries_recal_tb; |
88 | extern unsigned long iSeries_recal_titan; | 86 | extern unsigned long iSeries_recal_titan; |
@@ -321,11 +319,6 @@ static void __init iSeries_init_early(void) | |||
321 | iSeries_recal_titan = HvCallXm_loadTod(); | 319 | iSeries_recal_titan = HvCallXm_loadTod(); |
322 | 320 | ||
323 | /* | 321 | /* |
324 | * Initialize the hash table management pointers | ||
325 | */ | ||
326 | hpte_init_iSeries(); | ||
327 | |||
328 | /* | ||
329 | * Initialize the DMA/TCE management | 322 | * Initialize the DMA/TCE management |
330 | */ | 323 | */ |
331 | iommu_init_early_iSeries(); | 324 | iommu_init_early_iSeries(); |
@@ -563,16 +556,6 @@ static void __init iSeries_fixup_klimit(void) | |||
563 | if (naca.xRamDisk) | 556 | if (naca.xRamDisk) |
564 | klimit = KERNELBASE + (u64)naca.xRamDisk + | 557 | klimit = KERNELBASE + (u64)naca.xRamDisk + |
565 | (naca.xRamDiskSize * HW_PAGE_SIZE); | 558 | (naca.xRamDiskSize * HW_PAGE_SIZE); |
566 | else { | ||
567 | /* | ||
568 | * No ram disk was included - check and see if there | ||
569 | * was an embedded system map. Change klimit to take | ||
570 | * into account any embedded system map | ||
571 | */ | ||
572 | if (embedded_sysmap_end) | ||
573 | klimit = KERNELBASE + ((embedded_sysmap_end + 4095) & | ||
574 | 0xfffffffffffff000); | ||
575 | } | ||
576 | } | 559 | } |
577 | 560 | ||
578 | static int __init iSeries_src_init(void) | 561 | static int __init iSeries_src_init(void) |
@@ -683,6 +666,8 @@ static int __init iseries_probe(void) | |||
683 | */ | 666 | */ |
684 | virt_irq_max = 255; | 667 | virt_irq_max = 255; |
685 | 668 | ||
669 | hpte_init_iSeries(); | ||
670 | |||
686 | return 1; | 671 | return 1; |
687 | } | 672 | } |
688 | 673 | ||
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c index 9a4efc0c3b29..f7170ff86dab 100644 --- a/arch/powerpc/platforms/maple/pci.c +++ b/arch/powerpc/platforms/maple/pci.c | |||
@@ -376,9 +376,10 @@ static void __init maple_fixup_phb_resources(void) | |||
376 | unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base; | 376 | unsigned long offset = (unsigned long)hose->io_base_virt - pci_io_base; |
377 | hose->io_resource.start += offset; | 377 | hose->io_resource.start += offset; |
378 | hose->io_resource.end += offset; | 378 | hose->io_resource.end += offset; |
379 | printk(KERN_INFO "PCI Host %d, io start: %lx; io end: %lx\n", | 379 | printk(KERN_INFO "PCI Host %d, io start: %llx; io end: %llx\n", |
380 | hose->global_number, | 380 | hose->global_number, |
381 | hose->io_resource.start, hose->io_resource.end); | 381 | (unsigned long long)hose->io_resource.start, |
382 | (unsigned long long)hose->io_resource.end); | ||
382 | } | 383 | } |
383 | } | 384 | } |
384 | 385 | ||
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c index a0505ea48a86..4e32a5417fd1 100644 --- a/arch/powerpc/platforms/maple/setup.c +++ b/arch/powerpc/platforms/maple/setup.c | |||
@@ -199,11 +199,6 @@ static void __init maple_init_early(void) | |||
199 | { | 199 | { |
200 | DBG(" -> maple_init_early\n"); | 200 | DBG(" -> maple_init_early\n"); |
201 | 201 | ||
202 | /* Initialize hash table, from now on, we can take hash faults | ||
203 | * and call ioremap | ||
204 | */ | ||
205 | hpte_init_native(); | ||
206 | |||
207 | /* Setup interrupt mapping options */ | 202 | /* Setup interrupt mapping options */ |
208 | ppc64_interrupt_controller = IC_OPEN_PIC; | 203 | ppc64_interrupt_controller = IC_OPEN_PIC; |
209 | 204 | ||
@@ -272,6 +267,8 @@ static int __init maple_probe(void) | |||
272 | */ | 267 | */ |
273 | alloc_dart_table(); | 268 | alloc_dart_table(); |
274 | 269 | ||
270 | hpte_init_native(); | ||
271 | |||
275 | return 1; | 272 | return 1; |
276 | } | 273 | } |
277 | 274 | ||
diff --git a/arch/powerpc/platforms/powermac/backlight.c b/arch/powerpc/platforms/powermac/backlight.c index 498b042e1837..c7a27eddca6d 100644 --- a/arch/powerpc/platforms/powermac/backlight.c +++ b/arch/powerpc/platforms/powermac/backlight.c | |||
@@ -119,7 +119,14 @@ int pmac_backlight_set_legacy_brightness(int brightness) | |||
119 | down(&pmac_backlight->sem); | 119 | down(&pmac_backlight->sem); |
120 | props = pmac_backlight->props; | 120 | props = pmac_backlight->props; |
121 | props->brightness = brightness * | 121 | props->brightness = brightness * |
122 | props->max_brightness / OLD_BACKLIGHT_MAX; | 122 | (props->max_brightness + 1) / |
123 | (OLD_BACKLIGHT_MAX + 1); | ||
124 | |||
125 | if (props->brightness > props->max_brightness) | ||
126 | props->brightness = props->max_brightness; | ||
127 | else if (props->brightness < 0) | ||
128 | props->brightness = 0; | ||
129 | |||
123 | props->update_status(pmac_backlight); | 130 | props->update_status(pmac_backlight); |
124 | up(&pmac_backlight->sem); | 131 | up(&pmac_backlight->sem); |
125 | 132 | ||
@@ -140,8 +147,11 @@ int pmac_backlight_get_legacy_brightness() | |||
140 | 147 | ||
141 | down(&pmac_backlight->sem); | 148 | down(&pmac_backlight->sem); |
142 | props = pmac_backlight->props; | 149 | props = pmac_backlight->props; |
150 | |||
143 | result = props->brightness * | 151 | result = props->brightness * |
144 | OLD_BACKLIGHT_MAX / props->max_brightness; | 152 | (OLD_BACKLIGHT_MAX + 1) / |
153 | (props->max_brightness + 1); | ||
154 | |||
145 | up(&pmac_backlight->sem); | 155 | up(&pmac_backlight->sem); |
146 | } | 156 | } |
147 | mutex_unlock(&pmac_backlight_mutex); | 157 | mutex_unlock(&pmac_backlight_mutex); |
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index 80035853467b..d524a915aa86 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c | |||
@@ -939,9 +939,10 @@ static int __init add_bridge(struct device_node *dev) | |||
939 | disp_name = "Chaos"; | 939 | disp_name = "Chaos"; |
940 | primary = 0; | 940 | primary = 0; |
941 | } | 941 | } |
942 | printk(KERN_INFO "Found %s PCI host bridge at 0x%08lx. " | 942 | printk(KERN_INFO "Found %s PCI host bridge at 0x%016llx. " |
943 | "Firmware bus number: %d->%d\n", | 943 | "Firmware bus number: %d->%d\n", |
944 | disp_name, rsrc.start, hose->first_busno, hose->last_busno); | 944 | disp_name, (unsigned long long)rsrc.start, hose->first_busno, |
945 | hose->last_busno); | ||
945 | #endif /* CONFIG_PPC32 */ | 946 | #endif /* CONFIG_PPC32 */ |
946 | 947 | ||
947 | DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", | 948 | DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", |
diff --git a/arch/powerpc/platforms/powermac/pfunc_core.c b/arch/powerpc/platforms/powermac/pfunc_core.c index 047f954a89eb..93e7505debc5 100644 --- a/arch/powerpc/platforms/powermac/pfunc_core.c +++ b/arch/powerpc/platforms/powermac/pfunc_core.c | |||
@@ -546,7 +546,7 @@ struct pmf_device { | |||
546 | }; | 546 | }; |
547 | 547 | ||
548 | static LIST_HEAD(pmf_devices); | 548 | static LIST_HEAD(pmf_devices); |
549 | static spinlock_t pmf_lock = SPIN_LOCK_UNLOCKED; | 549 | static DEFINE_SPINLOCK(pmf_lock); |
550 | static DEFINE_MUTEX(pmf_irq_mutex); | 550 | static DEFINE_MUTEX(pmf_irq_mutex); |
551 | 551 | ||
552 | static void pmf_release_device(struct kref *kref) | 552 | static void pmf_release_device(struct kref *kref) |
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 18bf3011d1e3..9f6189af6dd6 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -446,7 +446,7 @@ static void __init pmac_pic_probe_oldstyle(void) | |||
446 | 446 | ||
447 | /* Set the handler for the main PIC */ | 447 | /* Set the handler for the main PIC */ |
448 | for ( i = 0; i < max_real_irqs ; i++ ) | 448 | for ( i = 0; i < max_real_irqs ; i++ ) |
449 | irq_desc[i].handler = &pmac_pic; | 449 | irq_desc[i].chip = &pmac_pic; |
450 | 450 | ||
451 | /* Get addresses of first controller if we have a node for it */ | 451 | /* Get addresses of first controller if we have a node for it */ |
452 | BUG_ON(of_address_to_resource(master, 0, &r)); | 452 | BUG_ON(of_address_to_resource(master, 0, &r)); |
@@ -493,7 +493,7 @@ static void __init pmac_pic_probe_oldstyle(void) | |||
493 | /* Setup handlers for secondary controller and hook cascade irq*/ | 493 | /* Setup handlers for secondary controller and hook cascade irq*/ |
494 | if (slave) { | 494 | if (slave) { |
495 | for ( i = max_real_irqs ; i < max_irqs ; i++ ) | 495 | for ( i = max_real_irqs ; i < max_irqs ; i++ ) |
496 | irq_desc[i].handler = &gatwick_pic; | 496 | irq_desc[i].chip = &gatwick_pic; |
497 | setup_irq(irq_cascade, &gatwick_cascade_action); | 497 | setup_irq(irq_cascade, &gatwick_cascade_action); |
498 | } | 498 | } |
499 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); | 499 | printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); |
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c index 9cc7db7a8bdc..89c5775f83be 100644 --- a/arch/powerpc/platforms/powermac/setup.c +++ b/arch/powerpc/platforms/powermac/setup.c | |||
@@ -600,13 +600,6 @@ pmac_halt(void) | |||
600 | */ | 600 | */ |
601 | static void __init pmac_init_early(void) | 601 | static void __init pmac_init_early(void) |
602 | { | 602 | { |
603 | #ifdef CONFIG_PPC64 | ||
604 | /* Initialize hash table, from now on, we can take hash faults | ||
605 | * and call ioremap | ||
606 | */ | ||
607 | hpte_init_native(); | ||
608 | #endif | ||
609 | |||
610 | /* Enable early btext debug if requested */ | 603 | /* Enable early btext debug if requested */ |
611 | if (strstr(cmd_line, "btextdbg")) { | 604 | if (strstr(cmd_line, "btextdbg")) { |
612 | udbg_adb_init_early(); | 605 | udbg_adb_init_early(); |
@@ -683,6 +676,8 @@ static int __init pmac_probe(void) | |||
683 | * part of the cacheable linar mapping | 676 | * part of the cacheable linar mapping |
684 | */ | 677 | */ |
685 | alloc_dart_table(); | 678 | alloc_dart_table(); |
679 | |||
680 | hpte_init_native(); | ||
686 | #endif | 681 | #endif |
687 | 682 | ||
688 | #ifdef CONFIG_PPC32 | 683 | #ifdef CONFIG_PPC32 |
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c index 8f2d12935b99..45ccc687e57c 100644 --- a/arch/powerpc/platforms/pseries/eeh_event.c +++ b/arch/powerpc/platforms/pseries/eeh_event.c | |||
@@ -35,7 +35,7 @@ | |||
35 | */ | 35 | */ |
36 | 36 | ||
37 | /* EEH event workqueue setup. */ | 37 | /* EEH event workqueue setup. */ |
38 | static spinlock_t eeh_eventlist_lock = SPIN_LOCK_UNLOCKED; | 38 | static DEFINE_SPINLOCK(eeh_eventlist_lock); |
39 | LIST_HEAD(eeh_eventlist); | 39 | LIST_HEAD(eeh_eventlist); |
40 | static void eeh_thread_launcher(void *); | 40 | static void eeh_thread_launcher(void *); |
41 | DECLARE_WORK(eeh_event_wq, eeh_thread_launcher, NULL); | 41 | DECLARE_WORK(eeh_event_wq, eeh_thread_launcher, NULL); |
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index d03a8b078f9d..8cfb5706790e 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c | |||
@@ -92,6 +92,15 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages) | |||
92 | *(tcep++) = 0; | 92 | *(tcep++) = 0; |
93 | } | 93 | } |
94 | 94 | ||
95 | static unsigned long tce_get_pseries(struct iommu_table *tbl, long index) | ||
96 | { | ||
97 | u64 *tcep; | ||
98 | |||
99 | index <<= TCE_PAGE_FACTOR; | ||
100 | tcep = ((u64 *)tbl->it_base) + index; | ||
101 | |||
102 | return *tcep; | ||
103 | } | ||
95 | 104 | ||
96 | static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, | 105 | static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, |
97 | long npages, unsigned long uaddr, | 106 | long npages, unsigned long uaddr, |
@@ -235,6 +244,25 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n | |||
235 | } | 244 | } |
236 | } | 245 | } |
237 | 246 | ||
247 | static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum) | ||
248 | { | ||
249 | u64 rc; | ||
250 | unsigned long tce_ret; | ||
251 | |||
252 | tcenum <<= TCE_PAGE_FACTOR; | ||
253 | rc = plpar_tce_get((u64)tbl->it_index, (u64)tcenum << 12, &tce_ret); | ||
254 | |||
255 | if (rc && printk_ratelimit()) { | ||
256 | printk("tce_get_pSeriesLP: plpar_tce_get failed. rc=%ld\n", | ||
257 | rc); | ||
258 | printk("\tindex = 0x%lx\n", (u64)tbl->it_index); | ||
259 | printk("\ttcenum = 0x%lx\n", (u64)tcenum); | ||
260 | show_stack(current, (unsigned long *)__get_SP()); | ||
261 | } | ||
262 | |||
263 | return tce_ret; | ||
264 | } | ||
265 | |||
238 | static void iommu_table_setparms(struct pci_controller *phb, | 266 | static void iommu_table_setparms(struct pci_controller *phb, |
239 | struct device_node *dn, | 267 | struct device_node *dn, |
240 | struct iommu_table *tbl) | 268 | struct iommu_table *tbl) |
@@ -254,7 +282,10 @@ static void iommu_table_setparms(struct pci_controller *phb, | |||
254 | } | 282 | } |
255 | 283 | ||
256 | tbl->it_base = (unsigned long)__va(*basep); | 284 | tbl->it_base = (unsigned long)__va(*basep); |
285 | |||
286 | #ifndef CONFIG_CRASH_DUMP | ||
257 | memset((void *)tbl->it_base, 0, *sizep); | 287 | memset((void *)tbl->it_base, 0, *sizep); |
288 | #endif | ||
258 | 289 | ||
259 | tbl->it_busno = phb->bus->number; | 290 | tbl->it_busno = phb->bus->number; |
260 | 291 | ||
@@ -560,11 +591,13 @@ void iommu_init_early_pSeries(void) | |||
560 | ppc_md.tce_build = tce_build_pSeriesLP; | 591 | ppc_md.tce_build = tce_build_pSeriesLP; |
561 | ppc_md.tce_free = tce_free_pSeriesLP; | 592 | ppc_md.tce_free = tce_free_pSeriesLP; |
562 | } | 593 | } |
594 | ppc_md.tce_get = tce_get_pSeriesLP; | ||
563 | ppc_md.iommu_bus_setup = iommu_bus_setup_pSeriesLP; | 595 | ppc_md.iommu_bus_setup = iommu_bus_setup_pSeriesLP; |
564 | ppc_md.iommu_dev_setup = iommu_dev_setup_pSeriesLP; | 596 | ppc_md.iommu_dev_setup = iommu_dev_setup_pSeriesLP; |
565 | } else { | 597 | } else { |
566 | ppc_md.tce_build = tce_build_pSeries; | 598 | ppc_md.tce_build = tce_build_pSeries; |
567 | ppc_md.tce_free = tce_free_pSeries; | 599 | ppc_md.tce_free = tce_free_pSeries; |
600 | ppc_md.tce_get = tce_get_pseries; | ||
568 | ppc_md.iommu_bus_setup = iommu_bus_setup_pSeries; | 601 | ppc_md.iommu_bus_setup = iommu_bus_setup_pSeries; |
569 | ppc_md.iommu_dev_setup = iommu_dev_setup_pSeries; | 602 | ppc_md.iommu_dev_setup = iommu_dev_setup_pSeries; |
570 | } | 603 | } |
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 634b7d06d3cc..27480705996f 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c | |||
@@ -513,7 +513,7 @@ void pSeries_lpar_flush_hash_range(unsigned long number, int local) | |||
513 | spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags); | 513 | spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags); |
514 | } | 514 | } |
515 | 515 | ||
516 | void hpte_init_lpar(void) | 516 | void __init hpte_init_lpar(void) |
517 | { | 517 | { |
518 | ppc_md.hpte_invalidate = pSeries_lpar_hpte_invalidate; | 518 | ppc_md.hpte_invalidate = pSeries_lpar_hpte_invalidate; |
519 | ppc_md.hpte_updatepp = pSeries_lpar_hpte_updatepp; | 519 | ppc_md.hpte_updatepp = pSeries_lpar_hpte_updatepp; |
@@ -522,6 +522,4 @@ void hpte_init_lpar(void) | |||
522 | ppc_md.hpte_remove = pSeries_lpar_hpte_remove; | 522 | ppc_md.hpte_remove = pSeries_lpar_hpte_remove; |
523 | ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range; | 523 | ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range; |
524 | ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear; | 524 | ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear; |
525 | |||
526 | htab_finish_init(); | ||
527 | } | 525 | } |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 1e28518c6121..b3197ff156c6 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -322,11 +322,6 @@ static void __init pSeries_init_early(void) | |||
322 | DBG(" -> pSeries_init_early()\n"); | 322 | DBG(" -> pSeries_init_early()\n"); |
323 | 323 | ||
324 | fw_feature_init(); | 324 | fw_feature_init(); |
325 | |||
326 | if (firmware_has_feature(FW_FEATURE_LPAR)) | ||
327 | hpte_init_lpar(); | ||
328 | else | ||
329 | hpte_init_native(); | ||
330 | 325 | ||
331 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 326 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
332 | find_udbg_vterm(); | 327 | find_udbg_vterm(); |
@@ -384,6 +379,11 @@ static int __init pSeries_probe_hypertas(unsigned long node, | |||
384 | if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL) | 379 | if (of_get_flat_dt_prop(node, "ibm,hypertas-functions", NULL) != NULL) |
385 | powerpc_firmware_features |= FW_FEATURE_LPAR; | 380 | powerpc_firmware_features |= FW_FEATURE_LPAR; |
386 | 381 | ||
382 | if (firmware_has_feature(FW_FEATURE_LPAR)) | ||
383 | hpte_init_lpar(); | ||
384 | else | ||
385 | hpte_init_native(); | ||
386 | |||
387 | return 1; | 387 | return 1; |
388 | } | 388 | } |
389 | 389 | ||
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index b14f9b5c114e..19c03dd43000 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -238,7 +238,7 @@ static int get_irq_server(unsigned int irq) | |||
238 | { | 238 | { |
239 | unsigned int server; | 239 | unsigned int server; |
240 | /* For the moment only implement delivery to all cpus or one cpu */ | 240 | /* For the moment only implement delivery to all cpus or one cpu */ |
241 | cpumask_t cpumask = irq_affinity[irq]; | 241 | cpumask_t cpumask = irq_desc[irq].affinity; |
242 | cpumask_t tmp = CPU_MASK_NONE; | 242 | cpumask_t tmp = CPU_MASK_NONE; |
243 | 243 | ||
244 | if (!distribute_irqs) | 244 | if (!distribute_irqs) |
@@ -558,7 +558,7 @@ nextnode: | |||
558 | } | 558 | } |
559 | 559 | ||
560 | for (i = irq_offset_value(); i < NR_IRQS; ++i) | 560 | for (i = irq_offset_value(); i < NR_IRQS; ++i) |
561 | get_irq_desc(i)->handler = &xics_pic; | 561 | get_irq_desc(i)->chip = &xics_pic; |
562 | 562 | ||
563 | xics_setup_cpu(); | 563 | xics_setup_cpu(); |
564 | 564 | ||
@@ -701,9 +701,9 @@ void xics_migrate_irqs_away(void) | |||
701 | continue; | 701 | continue; |
702 | 702 | ||
703 | /* We only need to migrate enabled IRQS */ | 703 | /* We only need to migrate enabled IRQS */ |
704 | if (desc == NULL || desc->handler == NULL | 704 | if (desc == NULL || desc->chip == NULL |
705 | || desc->action == NULL | 705 | || desc->action == NULL |
706 | || desc->handler->set_affinity == NULL) | 706 | || desc->chip->set_affinity == NULL) |
707 | continue; | 707 | continue; |
708 | 708 | ||
709 | spin_lock_irqsave(&desc->lock, flags); | 709 | spin_lock_irqsave(&desc->lock, flags); |
@@ -728,8 +728,8 @@ void xics_migrate_irqs_away(void) | |||
728 | virq, cpu); | 728 | virq, cpu); |
729 | 729 | ||
730 | /* Reset affinity to all cpus */ | 730 | /* Reset affinity to all cpus */ |
731 | desc->handler->set_affinity(virq, CPU_MASK_ALL); | 731 | desc->chip->set_affinity(virq, CPU_MASK_ALL); |
732 | irq_affinity[virq] = CPU_MASK_ALL; | 732 | irq_desc[irq].affinity = CPU_MASK_ALL; |
733 | unlock: | 733 | unlock: |
734 | spin_unlock_irqrestore(&desc->lock, flags); | 734 | spin_unlock_irqrestore(&desc->lock, flags); |
735 | } | 735 | } |
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index cef95b023730..054bd8b41ef5 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -12,3 +12,5 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o | |||
12 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o | 12 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o |
13 | obj-$(CONFIG_PPC_83xx) += ipic.o | 13 | obj-$(CONFIG_PPC_83xx) += ipic.o |
14 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o | 14 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o |
15 | obj-$(CONFIG_PPC_TODC) += todc.o | ||
16 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o | ||
diff --git a/arch/powerpc/sysdev/dart.h b/arch/powerpc/sysdev/dart.h index c2d05763ccbe..1c8817c4835e 100644 --- a/arch/powerpc/sysdev/dart.h +++ b/arch/powerpc/sysdev/dart.h | |||
@@ -47,8 +47,12 @@ | |||
47 | /* U4 registers */ | 47 | /* U4 registers */ |
48 | #define DART_BASE_U4_BASE_MASK 0xffffff | 48 | #define DART_BASE_U4_BASE_MASK 0xffffff |
49 | #define DART_BASE_U4_BASE_SHIFT 0 | 49 | #define DART_BASE_U4_BASE_SHIFT 0 |
50 | #define DART_CNTL_U4_FLUSHTLB 0x20000000 | ||
51 | #define DART_CNTL_U4_ENABLE 0x80000000 | 50 | #define DART_CNTL_U4_ENABLE 0x80000000 |
51 | #define DART_CNTL_U4_IONE 0x40000000 | ||
52 | #define DART_CNTL_U4_FLUSHTLB 0x20000000 | ||
53 | #define DART_CNTL_U4_IDLE 0x10000000 | ||
54 | #define DART_CNTL_U4_PAR_EN 0x08000000 | ||
55 | #define DART_CNTL_U4_IONE_MASK 0x07ffffff | ||
52 | #define DART_SIZE_U4_SIZE_MASK 0x1fff | 56 | #define DART_SIZE_U4_SIZE_MASK 0x1fff |
53 | #define DART_SIZE_U4_SIZE_SHIFT 0 | 57 | #define DART_SIZE_U4_SIZE_SHIFT 0 |
54 | 58 | ||
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c index 6232091cc72b..7c7f34ce4986 100644 --- a/arch/powerpc/sysdev/dart_iommu.c +++ b/arch/powerpc/sysdev/dart_iommu.c | |||
@@ -101,8 +101,8 @@ retry: | |||
101 | if (l == (1L << limit)) { | 101 | if (l == (1L << limit)) { |
102 | if (limit < 4) { | 102 | if (limit < 4) { |
103 | limit++; | 103 | limit++; |
104 | reg = DART_IN(DART_CNTL); | 104 | reg = DART_IN(DART_CNTL); |
105 | reg &= ~inv_bit; | 105 | reg &= ~inv_bit; |
106 | DART_OUT(DART_CNTL, reg); | 106 | DART_OUT(DART_CNTL, reg); |
107 | goto retry; | 107 | goto retry; |
108 | } else | 108 | } else |
@@ -111,11 +111,39 @@ retry: | |||
111 | } | 111 | } |
112 | } | 112 | } |
113 | 113 | ||
114 | static inline void dart_tlb_invalidate_one(unsigned long bus_rpn) | ||
115 | { | ||
116 | unsigned int reg; | ||
117 | unsigned int l, limit; | ||
118 | |||
119 | reg = DART_CNTL_U4_ENABLE | DART_CNTL_U4_IONE | | ||
120 | (bus_rpn & DART_CNTL_U4_IONE_MASK); | ||
121 | DART_OUT(DART_CNTL, reg); | ||
122 | |||
123 | limit = 0; | ||
124 | wait_more: | ||
125 | l = 0; | ||
126 | while ((DART_IN(DART_CNTL) & DART_CNTL_U4_IONE) && l < (1L << limit)) { | ||
127 | rmb(); | ||
128 | l++; | ||
129 | } | ||
130 | |||
131 | if (l == (1L << limit)) { | ||
132 | if (limit < 4) { | ||
133 | limit++; | ||
134 | goto wait_more; | ||
135 | } else | ||
136 | panic("DART: TLB did not flush after waiting a long " | ||
137 | "time. Buggy U4 ?"); | ||
138 | } | ||
139 | } | ||
140 | |||
114 | static void dart_flush(struct iommu_table *tbl) | 141 | static void dart_flush(struct iommu_table *tbl) |
115 | { | 142 | { |
116 | if (dart_dirty) | 143 | if (dart_dirty) { |
117 | dart_tlb_invalidate_all(); | 144 | dart_tlb_invalidate_all(); |
118 | dart_dirty = 0; | 145 | dart_dirty = 0; |
146 | } | ||
119 | } | 147 | } |
120 | 148 | ||
121 | static void dart_build(struct iommu_table *tbl, long index, | 149 | static void dart_build(struct iommu_table *tbl, long index, |
@@ -124,6 +152,7 @@ static void dart_build(struct iommu_table *tbl, long index, | |||
124 | { | 152 | { |
125 | unsigned int *dp; | 153 | unsigned int *dp; |
126 | unsigned int rpn; | 154 | unsigned int rpn; |
155 | long l; | ||
127 | 156 | ||
128 | DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr); | 157 | DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr); |
129 | 158 | ||
@@ -135,7 +164,8 @@ static void dart_build(struct iommu_table *tbl, long index, | |||
135 | /* On U3, all memory is contigous, so we can move this | 164 | /* On U3, all memory is contigous, so we can move this |
136 | * out of the loop. | 165 | * out of the loop. |
137 | */ | 166 | */ |
138 | while (npages--) { | 167 | l = npages; |
168 | while (l--) { | ||
139 | rpn = virt_to_abs(uaddr) >> DART_PAGE_SHIFT; | 169 | rpn = virt_to_abs(uaddr) >> DART_PAGE_SHIFT; |
140 | 170 | ||
141 | *(dp++) = DARTMAP_VALID | (rpn & DARTMAP_RPNMASK); | 171 | *(dp++) = DARTMAP_VALID | (rpn & DARTMAP_RPNMASK); |
@@ -143,7 +173,14 @@ static void dart_build(struct iommu_table *tbl, long index, | |||
143 | uaddr += DART_PAGE_SIZE; | 173 | uaddr += DART_PAGE_SIZE; |
144 | } | 174 | } |
145 | 175 | ||
146 | dart_dirty = 1; | 176 | if (dart_is_u4) { |
177 | rpn = index; | ||
178 | mb(); /* make sure all updates have reached memory */ | ||
179 | while (npages--) | ||
180 | dart_tlb_invalidate_one(rpn++); | ||
181 | } else { | ||
182 | dart_dirty = 1; | ||
183 | } | ||
147 | } | 184 | } |
148 | 185 | ||
149 | 186 | ||
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index b7ac32fdd776..2bff30f6d635 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c | |||
@@ -208,7 +208,7 @@ void __init i8259_init(unsigned long intack_addr, int offset) | |||
208 | spin_unlock_irqrestore(&i8259_lock, flags); | 208 | spin_unlock_irqrestore(&i8259_lock, flags); |
209 | 209 | ||
210 | for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) | 210 | for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) |
211 | irq_desc[offset + i].handler = &i8259_pic; | 211 | irq_desc[offset + i].chip = &i8259_pic; |
212 | 212 | ||
213 | /* reserve our resources */ | 213 | /* reserve our resources */ |
214 | setup_irq(offset + 2, &i8259_irqaction); | 214 | setup_irq(offset + 2, &i8259_irqaction); |
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 8f01e0f1d847..46801f5ec03f 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -472,7 +472,7 @@ void __init ipic_init(phys_addr_t phys_addr, | |||
472 | ipic_write(primary_ipic->regs, IPIC_SEMSR, temp); | 472 | ipic_write(primary_ipic->regs, IPIC_SEMSR, temp); |
473 | 473 | ||
474 | for (i = 0 ; i < NR_IPIC_INTS ; i++) { | 474 | for (i = 0 ; i < NR_IPIC_INTS ; i++) { |
475 | irq_desc[i+irq_offset].handler = &ipic; | 475 | irq_desc[i+irq_offset].chip = &ipic; |
476 | irq_desc[i+irq_offset].status = IRQ_LEVEL; | 476 | irq_desc[i+irq_offset].status = IRQ_LEVEL; |
477 | } | 477 | } |
478 | 478 | ||
diff --git a/arch/powerpc/sysdev/mmio_nvram.c b/arch/powerpc/sysdev/mmio_nvram.c index 74e0d31a3559..615350d46b52 100644 --- a/arch/powerpc/sysdev/mmio_nvram.c +++ b/arch/powerpc/sysdev/mmio_nvram.c | |||
@@ -32,7 +32,7 @@ | |||
32 | 32 | ||
33 | static void __iomem *mmio_nvram_start; | 33 | static void __iomem *mmio_nvram_start; |
34 | static long mmio_nvram_len; | 34 | static long mmio_nvram_len; |
35 | static spinlock_t mmio_nvram_lock = SPIN_LOCK_UNLOCKED; | 35 | static DEFINE_SPINLOCK(mmio_nvram_lock); |
36 | 36 | ||
37 | static ssize_t mmio_nvram_read(char *buf, size_t count, loff_t *index) | 37 | static ssize_t mmio_nvram_read(char *buf, size_t count, loff_t *index) |
38 | { | 38 | { |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index bffe50d02c99..28df9c827ca6 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -379,14 +379,14 @@ static inline u32 mpic_physmask(u32 cpumask) | |||
379 | /* Get the mpic structure from the IPI number */ | 379 | /* Get the mpic structure from the IPI number */ |
380 | static inline struct mpic * mpic_from_ipi(unsigned int ipi) | 380 | static inline struct mpic * mpic_from_ipi(unsigned int ipi) |
381 | { | 381 | { |
382 | return container_of(irq_desc[ipi].handler, struct mpic, hc_ipi); | 382 | return container_of(irq_desc[ipi].chip, struct mpic, hc_ipi); |
383 | } | 383 | } |
384 | #endif | 384 | #endif |
385 | 385 | ||
386 | /* Get the mpic structure from the irq number */ | 386 | /* Get the mpic structure from the irq number */ |
387 | static inline struct mpic * mpic_from_irq(unsigned int irq) | 387 | static inline struct mpic * mpic_from_irq(unsigned int irq) |
388 | { | 388 | { |
389 | return container_of(irq_desc[irq].handler, struct mpic, hc_irq); | 389 | return container_of(irq_desc[irq].chip, struct mpic, hc_irq); |
390 | } | 390 | } |
391 | 391 | ||
392 | /* Send an EOI */ | 392 | /* Send an EOI */ |
@@ -752,7 +752,7 @@ void __init mpic_init(struct mpic *mpic) | |||
752 | if (!(mpic->flags & MPIC_PRIMARY)) | 752 | if (!(mpic->flags & MPIC_PRIMARY)) |
753 | continue; | 753 | continue; |
754 | irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; | 754 | irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; |
755 | irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi; | 755 | irq_desc[mpic->ipi_offset+i].chip = &mpic->hc_ipi; |
756 | #endif /* CONFIG_SMP */ | 756 | #endif /* CONFIG_SMP */ |
757 | } | 757 | } |
758 | 758 | ||
@@ -813,7 +813,7 @@ void __init mpic_init(struct mpic *mpic) | |||
813 | /* init linux descriptors */ | 813 | /* init linux descriptors */ |
814 | if (i < mpic->irq_count) { | 814 | if (i < mpic->irq_count) { |
815 | irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0; | 815 | irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0; |
816 | irq_desc[mpic->irq_offset+i].handler = &mpic->hc_irq; | 816 | irq_desc[mpic->irq_offset+i].chip = &mpic->hc_irq; |
817 | } | 817 | } |
818 | } | 818 | } |
819 | 819 | ||
@@ -906,7 +906,7 @@ void mpic_setup_this_cpu(void) | |||
906 | /* let the mpic know we want intrs. default affinity is 0xffffffff | 906 | /* let the mpic know we want intrs. default affinity is 0xffffffff |
907 | * until changed via /proc. That's how it's done on x86. If we want | 907 | * until changed via /proc. That's how it's done on x86. If we want |
908 | * it differently, then we should make sure we also change the default | 908 | * it differently, then we should make sure we also change the default |
909 | * values of irq_affinity in irq.c. | 909 | * values of irq_desc[].affinity in irq.c. |
910 | */ | 910 | */ |
911 | if (distribute_irqs) { | 911 | if (distribute_irqs) { |
912 | for (i = 0; i < mpic->num_sources ; i++) | 912 | for (i = 0; i < mpic->num_sources ; i++) |
diff --git a/arch/powerpc/sysdev/todc.c b/arch/powerpc/sysdev/todc.c new file mode 100644 index 000000000000..0a65980efb50 --- /dev/null +++ b/arch/powerpc/sysdev/todc.c | |||
@@ -0,0 +1,392 @@ | |||
1 | /* | ||
2 | * Time of Day Clock support for the M48T35, M48T37, M48T59, and MC146818 | ||
3 | * Real Time Clocks/Timekeepers. | ||
4 | * | ||
5 | * Author: Mark A. Greer <mgreer@mvista.com> | ||
6 | * | ||
7 | * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under | ||
8 | * the terms of the GNU General Public License version 2. This program | ||
9 | * is licensed "as is" without any warranty of any kind, whether express | ||
10 | * or implied. | ||
11 | */ | ||
12 | #include <linux/errno.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/time.h> | ||
16 | #include <linux/timex.h> | ||
17 | #include <linux/bcd.h> | ||
18 | #include <linux/mc146818rtc.h> | ||
19 | |||
20 | #include <asm/machdep.h> | ||
21 | #include <asm/io.h> | ||
22 | #include <asm/time.h> | ||
23 | #include <asm/todc.h> | ||
24 | |||
25 | /* | ||
26 | * Depending on the hardware on your board and your board design, the | ||
27 | * RTC/NVRAM may be accessed either directly (like normal memory) or via | ||
28 | * address/data registers. If your board uses the direct method, set | ||
29 | * 'nvram_data' to the base address of your nvram and leave 'nvram_as0' and | ||
30 | * 'nvram_as1' NULL. If your board uses address/data regs to access nvram, | ||
31 | * set 'nvram_as0' to the address of the lower byte, set 'nvram_as1' to the | ||
32 | * address of the upper byte (leave NULL if using mc146818), and set | ||
33 | * 'nvram_data' to the address of the 8-bit data register. | ||
34 | * | ||
35 | * Note: Even though the documentation for the various RTC chips say that it | ||
36 | * take up to a second before it starts updating once the 'R' bit is | ||
37 | * cleared, they always seem to update even though we bang on it many | ||
38 | * times a second. This is true, except for the Dallas Semi 1746/1747 | ||
39 | * (possibly others). Those chips seem to have a real problem whenever | ||
40 | * we set the 'R' bit before reading them, they basically stop counting. | ||
41 | * --MAG | ||
42 | */ | ||
43 | |||
44 | /* | ||
45 | * 'todc_info' should be initialized in your *_setup.c file to | ||
46 | * point to a fully initialized 'todc_info_t' structure. | ||
47 | * This structure holds all the register offsets for your particular | ||
48 | * TODC/RTC chip. | ||
49 | * TODC_ALLOC()/TODC_INIT() will allocate and initialize this table for you. | ||
50 | */ | ||
51 | |||
52 | #ifdef RTC_FREQ_SELECT | ||
53 | #undef RTC_FREQ_SELECT | ||
54 | #define RTC_FREQ_SELECT control_b /* Register A */ | ||
55 | #endif | ||
56 | |||
57 | #ifdef RTC_CONTROL | ||
58 | #undef RTC_CONTROL | ||
59 | #define RTC_CONTROL control_a /* Register B */ | ||
60 | #endif | ||
61 | |||
62 | #ifdef RTC_INTR_FLAGS | ||
63 | #undef RTC_INTR_FLAGS | ||
64 | #define RTC_INTR_FLAGS watchdog /* Register C */ | ||
65 | #endif | ||
66 | |||
67 | #ifdef RTC_VALID | ||
68 | #undef RTC_VALID | ||
69 | #define RTC_VALID interrupts /* Register D */ | ||
70 | #endif | ||
71 | |||
72 | /* Access routines when RTC accessed directly (like normal memory) */ | ||
73 | u_char | ||
74 | todc_direct_read_val(int addr) | ||
75 | { | ||
76 | return readb((void __iomem *)(todc_info->nvram_data + addr)); | ||
77 | } | ||
78 | |||
79 | void | ||
80 | todc_direct_write_val(int addr, unsigned char val) | ||
81 | { | ||
82 | writeb(val, (void __iomem *)(todc_info->nvram_data + addr)); | ||
83 | return; | ||
84 | } | ||
85 | |||
86 | /* Access routines for accessing m48txx type chips via addr/data regs */ | ||
87 | u_char | ||
88 | todc_m48txx_read_val(int addr) | ||
89 | { | ||
90 | outb(addr, todc_info->nvram_as0); | ||
91 | outb(addr>>todc_info->as0_bits, todc_info->nvram_as1); | ||
92 | return inb(todc_info->nvram_data); | ||
93 | } | ||
94 | |||
95 | void | ||
96 | todc_m48txx_write_val(int addr, unsigned char val) | ||
97 | { | ||
98 | outb(addr, todc_info->nvram_as0); | ||
99 | outb(addr>>todc_info->as0_bits, todc_info->nvram_as1); | ||
100 | outb(val, todc_info->nvram_data); | ||
101 | return; | ||
102 | } | ||
103 | |||
104 | /* Access routines for accessing mc146818 type chips via addr/data regs */ | ||
105 | u_char | ||
106 | todc_mc146818_read_val(int addr) | ||
107 | { | ||
108 | outb_p(addr, todc_info->nvram_as0); | ||
109 | return inb_p(todc_info->nvram_data); | ||
110 | } | ||
111 | |||
112 | void | ||
113 | todc_mc146818_write_val(int addr, unsigned char val) | ||
114 | { | ||
115 | outb_p(addr, todc_info->nvram_as0); | ||
116 | outb_p(val, todc_info->nvram_data); | ||
117 | } | ||
118 | |||
119 | |||
120 | /* | ||
121 | * Routines to make RTC chips with NVRAM buried behind an addr/data pair | ||
122 | * have the NVRAM and clock regs appear at the same level. | ||
123 | * The NVRAM will appear to start at addr 0 and the clock regs will appear | ||
124 | * to start immediately after the NVRAM (actually, start at offset | ||
125 | * todc_info->nvram_size). | ||
126 | */ | ||
127 | static inline u_char | ||
128 | todc_read_val(int addr) | ||
129 | { | ||
130 | u_char val; | ||
131 | |||
132 | if (todc_info->sw_flags & TODC_FLAG_2_LEVEL_NVRAM) { | ||
133 | if (addr < todc_info->nvram_size) { /* NVRAM */ | ||
134 | ppc_md.rtc_write_val(todc_info->nvram_addr_reg, addr); | ||
135 | val = ppc_md.rtc_read_val(todc_info->nvram_data_reg); | ||
136 | } else { /* Clock Reg */ | ||
137 | addr -= todc_info->nvram_size; | ||
138 | val = ppc_md.rtc_read_val(addr); | ||
139 | } | ||
140 | } else | ||
141 | val = ppc_md.rtc_read_val(addr); | ||
142 | |||
143 | return val; | ||
144 | } | ||
145 | |||
146 | static inline void | ||
147 | todc_write_val(int addr, u_char val) | ||
148 | { | ||
149 | if (todc_info->sw_flags & TODC_FLAG_2_LEVEL_NVRAM) { | ||
150 | if (addr < todc_info->nvram_size) { /* NVRAM */ | ||
151 | ppc_md.rtc_write_val(todc_info->nvram_addr_reg, addr); | ||
152 | ppc_md.rtc_write_val(todc_info->nvram_data_reg, val); | ||
153 | } else { /* Clock Reg */ | ||
154 | addr -= todc_info->nvram_size; | ||
155 | ppc_md.rtc_write_val(addr, val); | ||
156 | } | ||
157 | } else | ||
158 | ppc_md.rtc_write_val(addr, val); | ||
159 | } | ||
160 | |||
161 | /* | ||
162 | * TODC routines | ||
163 | * | ||
164 | * There is some ugly stuff in that there are assumptions for the mc146818. | ||
165 | * | ||
166 | * Assumptions: | ||
167 | * - todc_info->control_a has the offset as mc146818 Register B reg | ||
168 | * - todc_info->control_b has the offset as mc146818 Register A reg | ||
169 | * - m48txx control reg's write enable or 'W' bit is same as | ||
170 | * mc146818 Register B 'SET' bit (i.e., 0x80) | ||
171 | * | ||
172 | * These assumptions were made to make the code simpler. | ||
173 | */ | ||
174 | long __init | ||
175 | todc_time_init(void) | ||
176 | { | ||
177 | u_char cntl_b; | ||
178 | |||
179 | if (!ppc_md.rtc_read_val) | ||
180 | ppc_md.rtc_read_val = ppc_md.nvram_read_val; | ||
181 | if (!ppc_md.rtc_write_val) | ||
182 | ppc_md.rtc_write_val = ppc_md.nvram_write_val; | ||
183 | |||
184 | cntl_b = todc_read_val(todc_info->control_b); | ||
185 | |||
186 | if (todc_info->rtc_type == TODC_TYPE_MC146818) { | ||
187 | if ((cntl_b & 0x70) != 0x20) { | ||
188 | printk(KERN_INFO "TODC real-time-clock was stopped." | ||
189 | " Now starting..."); | ||
190 | cntl_b &= ~0x70; | ||
191 | cntl_b |= 0x20; | ||
192 | } | ||
193 | |||
194 | todc_write_val(todc_info->control_b, cntl_b); | ||
195 | } else if (todc_info->rtc_type == TODC_TYPE_DS17285) { | ||
196 | u_char mode; | ||
197 | |||
198 | mode = todc_read_val(TODC_TYPE_DS17285_CNTL_A); | ||
199 | /* Make sure countdown clear is not set */ | ||
200 | mode &= ~0x40; | ||
201 | /* Enable oscillator, extended register set */ | ||
202 | mode |= 0x30; | ||
203 | todc_write_val(TODC_TYPE_DS17285_CNTL_A, mode); | ||
204 | |||
205 | } else if (todc_info->rtc_type == TODC_TYPE_DS1501) { | ||
206 | u_char month; | ||
207 | |||
208 | todc_info->enable_read = TODC_DS1501_CNTL_B_TE; | ||
209 | todc_info->enable_write = TODC_DS1501_CNTL_B_TE; | ||
210 | |||
211 | month = todc_read_val(todc_info->month); | ||
212 | |||
213 | if ((month & 0x80) == 0x80) { | ||
214 | printk(KERN_INFO "TODC %s %s\n", | ||
215 | "real-time-clock was stopped.", | ||
216 | "Now starting..."); | ||
217 | month &= ~0x80; | ||
218 | todc_write_val(todc_info->month, month); | ||
219 | } | ||
220 | |||
221 | cntl_b &= ~TODC_DS1501_CNTL_B_TE; | ||
222 | todc_write_val(todc_info->control_b, cntl_b); | ||
223 | } else { /* must be a m48txx type */ | ||
224 | u_char cntl_a; | ||
225 | |||
226 | todc_info->enable_read = TODC_MK48TXX_CNTL_A_R; | ||
227 | todc_info->enable_write = TODC_MK48TXX_CNTL_A_W; | ||
228 | |||
229 | cntl_a = todc_read_val(todc_info->control_a); | ||
230 | |||
231 | /* Check & clear STOP bit in control B register */ | ||
232 | if (cntl_b & TODC_MK48TXX_DAY_CB) { | ||
233 | printk(KERN_INFO "TODC %s %s\n", | ||
234 | "real-time-clock was stopped.", | ||
235 | "Now starting..."); | ||
236 | |||
237 | cntl_a |= todc_info->enable_write; | ||
238 | cntl_b &= ~TODC_MK48TXX_DAY_CB;/* Start Oscil */ | ||
239 | |||
240 | todc_write_val(todc_info->control_a, cntl_a); | ||
241 | todc_write_val(todc_info->control_b, cntl_b); | ||
242 | } | ||
243 | |||
244 | /* Make sure READ & WRITE bits are cleared. */ | ||
245 | cntl_a &= ~(todc_info->enable_write | todc_info->enable_read); | ||
246 | todc_write_val(todc_info->control_a, cntl_a); | ||
247 | } | ||
248 | |||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | /* | ||
253 | * There is some ugly stuff in that there are assumptions that for a mc146818, | ||
254 | * the todc_info->control_a has the offset of the mc146818 Register B reg and | ||
255 | * that the register'ss 'SET' bit is the same as the m48txx's write enable | ||
256 | * bit in the control register of the m48txx (i.e., 0x80). | ||
257 | * | ||
258 | * It was done to make the code look simpler. | ||
259 | */ | ||
260 | void | ||
261 | todc_get_rtc_time(struct rtc_time *tm) | ||
262 | { | ||
263 | uint year = 0, mon = 0, mday = 0, hour = 0, min = 0, sec = 0; | ||
264 | uint limit, i; | ||
265 | u_char save_control, uip = 0; | ||
266 | extern void GregorianDay(struct rtc_time *); | ||
267 | |||
268 | spin_lock(&rtc_lock); | ||
269 | save_control = todc_read_val(todc_info->control_a); | ||
270 | |||
271 | if (todc_info->rtc_type != TODC_TYPE_MC146818) { | ||
272 | limit = 1; | ||
273 | |||
274 | switch (todc_info->rtc_type) { | ||
275 | case TODC_TYPE_DS1553: | ||
276 | case TODC_TYPE_DS1557: | ||
277 | case TODC_TYPE_DS1743: | ||
278 | case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */ | ||
279 | case TODC_TYPE_DS1747: | ||
280 | case TODC_TYPE_DS17285: | ||
281 | break; | ||
282 | default: | ||
283 | todc_write_val(todc_info->control_a, | ||
284 | (save_control | todc_info->enable_read)); | ||
285 | } | ||
286 | } else | ||
287 | limit = 100000000; | ||
288 | |||
289 | for (i=0; i<limit; i++) { | ||
290 | if (todc_info->rtc_type == TODC_TYPE_MC146818) | ||
291 | uip = todc_read_val(todc_info->RTC_FREQ_SELECT); | ||
292 | |||
293 | sec = todc_read_val(todc_info->seconds) & 0x7f; | ||
294 | min = todc_read_val(todc_info->minutes) & 0x7f; | ||
295 | hour = todc_read_val(todc_info->hours) & 0x3f; | ||
296 | mday = todc_read_val(todc_info->day_of_month) & 0x3f; | ||
297 | mon = todc_read_val(todc_info->month) & 0x1f; | ||
298 | year = todc_read_val(todc_info->year) & 0xff; | ||
299 | |||
300 | if (todc_info->rtc_type == TODC_TYPE_MC146818) { | ||
301 | uip |= todc_read_val(todc_info->RTC_FREQ_SELECT); | ||
302 | if ((uip & RTC_UIP) == 0) | ||
303 | break; | ||
304 | } | ||
305 | } | ||
306 | |||
307 | if (todc_info->rtc_type != TODC_TYPE_MC146818) { | ||
308 | switch (todc_info->rtc_type) { | ||
309 | case TODC_TYPE_DS1553: | ||
310 | case TODC_TYPE_DS1557: | ||
311 | case TODC_TYPE_DS1743: | ||
312 | case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */ | ||
313 | case TODC_TYPE_DS1747: | ||
314 | case TODC_TYPE_DS17285: | ||
315 | break; | ||
316 | default: | ||
317 | save_control &= ~(todc_info->enable_read); | ||
318 | todc_write_val(todc_info->control_a, save_control); | ||
319 | } | ||
320 | } | ||
321 | spin_unlock(&rtc_lock); | ||
322 | |||
323 | if ((todc_info->rtc_type != TODC_TYPE_MC146818) | ||
324 | || ((save_control & RTC_DM_BINARY) == 0) | ||
325 | || RTC_ALWAYS_BCD) { | ||
326 | BCD_TO_BIN(sec); | ||
327 | BCD_TO_BIN(min); | ||
328 | BCD_TO_BIN(hour); | ||
329 | BCD_TO_BIN(mday); | ||
330 | BCD_TO_BIN(mon); | ||
331 | BCD_TO_BIN(year); | ||
332 | } | ||
333 | |||
334 | if ((year + 1900) < 1970) { | ||
335 | year += 100; | ||
336 | } | ||
337 | |||
338 | tm->tm_sec = sec; | ||
339 | tm->tm_min = min; | ||
340 | tm->tm_hour = hour; | ||
341 | tm->tm_mday = mday; | ||
342 | tm->tm_mon = mon; | ||
343 | tm->tm_year = year; | ||
344 | |||
345 | GregorianDay(tm); | ||
346 | } | ||
347 | |||
348 | int | ||
349 | todc_set_rtc_time(struct rtc_time *tm) | ||
350 | { | ||
351 | u_char save_control, save_freq_select = 0; | ||
352 | |||
353 | spin_lock(&rtc_lock); | ||
354 | save_control = todc_read_val(todc_info->control_a); | ||
355 | |||
356 | /* Assuming MK48T59_RTC_CA_WRITE & RTC_SET are equal */ | ||
357 | todc_write_val(todc_info->control_a, | ||
358 | (save_control | todc_info->enable_write)); | ||
359 | save_control &= ~(todc_info->enable_write); /* in case it was set */ | ||
360 | |||
361 | if (todc_info->rtc_type == TODC_TYPE_MC146818) { | ||
362 | save_freq_select = todc_read_val(todc_info->RTC_FREQ_SELECT); | ||
363 | todc_write_val(todc_info->RTC_FREQ_SELECT, | ||
364 | save_freq_select | RTC_DIV_RESET2); | ||
365 | } | ||
366 | |||
367 | if ((todc_info->rtc_type != TODC_TYPE_MC146818) | ||
368 | || ((save_control & RTC_DM_BINARY) == 0) | ||
369 | || RTC_ALWAYS_BCD) { | ||
370 | BIN_TO_BCD(tm->tm_sec); | ||
371 | BIN_TO_BCD(tm->tm_min); | ||
372 | BIN_TO_BCD(tm->tm_hour); | ||
373 | BIN_TO_BCD(tm->tm_mon); | ||
374 | BIN_TO_BCD(tm->tm_mday); | ||
375 | BIN_TO_BCD(tm->tm_year); | ||
376 | } | ||
377 | |||
378 | todc_write_val(todc_info->seconds, tm->tm_sec); | ||
379 | todc_write_val(todc_info->minutes, tm->tm_min); | ||
380 | todc_write_val(todc_info->hours, tm->tm_hour); | ||
381 | todc_write_val(todc_info->month, tm->tm_mon); | ||
382 | todc_write_val(todc_info->day_of_month, tm->tm_mday); | ||
383 | todc_write_val(todc_info->year, tm->tm_year); | ||
384 | |||
385 | todc_write_val(todc_info->control_a, save_control); | ||
386 | |||
387 | if (todc_info->rtc_type == TODC_TYPE_MC146818) | ||
388 | todc_write_val(todc_info->RTC_FREQ_SELECT, save_freq_select); | ||
389 | |||
390 | spin_unlock(&rtc_lock); | ||
391 | return 0; | ||
392 | } | ||
diff --git a/arch/powerpc/sysdev/tsi108_dev.c b/arch/powerpc/sysdev/tsi108_dev.c new file mode 100644 index 000000000000..26a0cc820cde --- /dev/null +++ b/arch/powerpc/sysdev/tsi108_dev.c | |||
@@ -0,0 +1,145 @@ | |||
1 | /* | ||
2 | * tsi108/109 device setup code | ||
3 | * | ||
4 | * Maintained by Roy Zang < tie-fei.zang@freescale.com > | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/config.h> | ||
13 | #include <linux/stddef.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/errno.h> | ||
17 | #include <linux/major.h> | ||
18 | #include <linux/delay.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/module.h> | ||
21 | #include <linux/device.h> | ||
22 | #include <linux/platform_device.h> | ||
23 | #include <asm/tsi108.h> | ||
24 | |||
25 | #include <asm/system.h> | ||
26 | #include <asm/atomic.h> | ||
27 | #include <asm/io.h> | ||
28 | #include <asm/irq.h> | ||
29 | #include <asm/prom.h> | ||
30 | #include <mm/mmu_decl.h> | ||
31 | |||
32 | #undef DEBUG | ||
33 | |||
34 | #ifdef DEBUG | ||
35 | #define DBG(fmt...) do { printk(fmt); } while(0) | ||
36 | #else | ||
37 | #define DBG(fmt...) do { } while(0) | ||
38 | #endif | ||
39 | |||
40 | static phys_addr_t tsi108_csr_base = -1; | ||
41 | |||
42 | phys_addr_t get_csrbase(void) | ||
43 | { | ||
44 | struct device_node *tsi; | ||
45 | |||
46 | if (tsi108_csr_base != -1) | ||
47 | return tsi108_csr_base; | ||
48 | |||
49 | tsi = of_find_node_by_type(NULL, "tsi-bridge"); | ||
50 | if (tsi) { | ||
51 | unsigned int size; | ||
52 | void *prop = get_property(tsi, "reg", &size); | ||
53 | tsi108_csr_base = of_translate_address(tsi, prop); | ||
54 | of_node_put(tsi); | ||
55 | }; | ||
56 | return tsi108_csr_base; | ||
57 | } | ||
58 | |||
59 | u32 get_vir_csrbase(void) | ||
60 | { | ||
61 | return (u32) (ioremap(get_csrbase(), 0x10000)); | ||
62 | } | ||
63 | |||
64 | EXPORT_SYMBOL(get_csrbase); | ||
65 | EXPORT_SYMBOL(get_vir_csrbase); | ||
66 | |||
67 | static int __init tsi108_eth_of_init(void) | ||
68 | { | ||
69 | struct device_node *np; | ||
70 | unsigned int i; | ||
71 | struct platform_device *tsi_eth_dev; | ||
72 | struct resource res; | ||
73 | int ret; | ||
74 | |||
75 | for (np = NULL, i = 0; | ||
76 | (np = of_find_compatible_node(np, "network", "tsi-ethernet")) != NULL; | ||
77 | i++) { | ||
78 | struct resource r[2]; | ||
79 | struct device_node *phy; | ||
80 | hw_info tsi_eth_data; | ||
81 | unsigned int *id; | ||
82 | unsigned int *phy_id; | ||
83 | void *mac_addr; | ||
84 | phandle *ph; | ||
85 | |||
86 | memset(r, 0, sizeof(r)); | ||
87 | memset(&tsi_eth_data, 0, sizeof(tsi_eth_data)); | ||
88 | |||
89 | ret = of_address_to_resource(np, 0, &r[0]); | ||
90 | DBG("%s: name:start->end = %s:0x%lx-> 0x%lx\n", | ||
91 | __FUNCTION__,r[0].name, r[0].start, r[0].end); | ||
92 | if (ret) | ||
93 | goto err; | ||
94 | |||
95 | r[1].name = "tx"; | ||
96 | r[1].start = np->intrs[0].line; | ||
97 | r[1].end = np->intrs[0].line; | ||
98 | r[1].flags = IORESOURCE_IRQ; | ||
99 | |||
100 | tsi_eth_dev = | ||
101 | platform_device_register_simple("tsi-ethernet", i, &r[0], | ||
102 | np->n_intrs + 1); | ||
103 | |||
104 | if (IS_ERR(tsi_eth_dev)) { | ||
105 | ret = PTR_ERR(tsi_eth_dev); | ||
106 | goto err; | ||
107 | } | ||
108 | |||
109 | mac_addr = get_property(np, "address", NULL); | ||
110 | memcpy(tsi_eth_data.mac_addr, mac_addr, 6); | ||
111 | |||
112 | ph = (phandle *) get_property(np, "phy-handle", NULL); | ||
113 | phy = of_find_node_by_phandle(*ph); | ||
114 | |||
115 | if (phy == NULL) { | ||
116 | ret = -ENODEV; | ||
117 | goto unreg; | ||
118 | } | ||
119 | |||
120 | id = (u32 *) get_property(phy, "reg", NULL); | ||
121 | phy_id = (u32 *) get_property(phy, "phy-id", NULL); | ||
122 | ret = of_address_to_resource(phy, 0, &res); | ||
123 | if (ret) { | ||
124 | of_node_put(phy); | ||
125 | goto unreg; | ||
126 | } | ||
127 | tsi_eth_data.regs = r[0].start; | ||
128 | tsi_eth_data.phyregs = res.start; | ||
129 | tsi_eth_data.phy = *phy_id; | ||
130 | tsi_eth_data.irq_num = np->intrs[0].line; | ||
131 | of_node_put(phy); | ||
132 | ret = | ||
133 | platform_device_add_data(tsi_eth_dev, &tsi_eth_data, | ||
134 | sizeof(hw_info)); | ||
135 | if (ret) | ||
136 | goto unreg; | ||
137 | } | ||
138 | return 0; | ||
139 | unreg: | ||
140 | platform_device_unregister(tsi_eth_dev); | ||
141 | err: | ||
142 | return ret; | ||
143 | } | ||
144 | |||
145 | arch_initcall(tsi108_eth_of_init); | ||
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c new file mode 100644 index 000000000000..3265d54c82ed --- /dev/null +++ b/arch/powerpc/sysdev/tsi108_pci.c | |||
@@ -0,0 +1,412 @@ | |||
1 | /* | ||
2 | * Common routines for Tundra Semiconductor TSI108 host bridge. | ||
3 | * | ||
4 | * 2004-2005 (c) Tundra Semiconductor Corp. | ||
5 | * Author: Alex Bounine (alexandreb@tundra.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the Free | ||
9 | * Software Foundation; either version 2 of the License, or (at your option) | ||
10 | * any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
15 | * more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along with | ||
18 | * this program; if not, write to the Free Software Foundation, Inc., 59 | ||
19 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
20 | */ | ||
21 | |||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/pci.h> | ||
25 | #include <linux/slab.h> | ||
26 | #include <linux/irq.h> | ||
27 | #include <linux/interrupt.h> | ||
28 | |||
29 | |||
30 | #include <asm/byteorder.h> | ||
31 | #include <asm/io.h> | ||
32 | #include <asm/irq.h> | ||
33 | #include <asm/uaccess.h> | ||
34 | #include <asm/machdep.h> | ||
35 | #include <asm/pci-bridge.h> | ||
36 | #include <asm/tsi108.h> | ||
37 | #include <asm/tsi108_irq.h> | ||
38 | #include <asm/prom.h> | ||
39 | |||
40 | #undef DEBUG | ||
41 | #ifdef DEBUG | ||
42 | #define DBG(x...) printk(x) | ||
43 | #else | ||
44 | #define DBG(x...) | ||
45 | #endif | ||
46 | |||
47 | #define tsi_mk_config_addr(bus, devfunc, offset) \ | ||
48 | ((((bus)<<16) | ((devfunc)<<8) | (offset & 0xfc)) + tsi108_pci_cfg_base) | ||
49 | |||
50 | u32 tsi108_pci_cfg_base; | ||
51 | u32 tsi108_csr_vir_base; | ||
52 | |||
53 | extern u32 get_vir_csrbase(void); | ||
54 | extern u32 tsi108_read_reg(u32 reg_offset); | ||
55 | extern void tsi108_write_reg(u32 reg_offset, u32 val); | ||
56 | |||
57 | int | ||
58 | tsi108_direct_write_config(struct pci_bus *bus, unsigned int devfunc, | ||
59 | int offset, int len, u32 val) | ||
60 | { | ||
61 | volatile unsigned char *cfg_addr; | ||
62 | |||
63 | if (ppc_md.pci_exclude_device) | ||
64 | if (ppc_md.pci_exclude_device(bus->number, devfunc)) | ||
65 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
66 | |||
67 | cfg_addr = (unsigned char *)(tsi_mk_config_addr(bus->number, | ||
68 | devfunc, offset) | | ||
69 | (offset & 0x03)); | ||
70 | |||
71 | #ifdef DEBUG | ||
72 | printk("PCI CFG write : "); | ||
73 | printk("%d:0x%x:0x%x ", bus->number, devfunc, offset); | ||
74 | printk("%d ADDR=0x%08x ", len, (uint) cfg_addr); | ||
75 | printk("data = 0x%08x\n", val); | ||
76 | #endif | ||
77 | |||
78 | switch (len) { | ||
79 | case 1: | ||
80 | out_8((u8 *) cfg_addr, val); | ||
81 | break; | ||
82 | case 2: | ||
83 | out_le16((u16 *) cfg_addr, val); | ||
84 | break; | ||
85 | default: | ||
86 | out_le32((u32 *) cfg_addr, val); | ||
87 | break; | ||
88 | } | ||
89 | |||
90 | return PCIBIOS_SUCCESSFUL; | ||
91 | } | ||
92 | |||
93 | void tsi108_clear_pci_error(u32 pci_cfg_base) | ||
94 | { | ||
95 | u32 err_stat, err_addr, pci_stat; | ||
96 | |||
97 | /* | ||
98 | * Quietly clear PB and PCI error flags set as result | ||
99 | * of PCI/X configuration read requests. | ||
100 | */ | ||
101 | |||
102 | /* Read PB Error Log Registers */ | ||
103 | |||
104 | err_stat = tsi108_read_reg(TSI108_PB_OFFSET + TSI108_PB_ERRCS); | ||
105 | err_addr = tsi108_read_reg(TSI108_PB_OFFSET + TSI108_PB_AERR); | ||
106 | |||
107 | if (err_stat & TSI108_PB_ERRCS_ES) { | ||
108 | /* Clear error flag */ | ||
109 | tsi108_write_reg(TSI108_PB_OFFSET + TSI108_PB_ERRCS, | ||
110 | TSI108_PB_ERRCS_ES); | ||
111 | |||
112 | /* Clear read error reported in PB_ISR */ | ||
113 | tsi108_write_reg(TSI108_PB_OFFSET + TSI108_PB_ISR, | ||
114 | TSI108_PB_ISR_PBS_RD_ERR); | ||
115 | |||
116 | /* Clear PCI/X bus cfg errors if applicable */ | ||
117 | if ((err_addr & 0xFF000000) == pci_cfg_base) { | ||
118 | pci_stat = | ||
119 | tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_CSR); | ||
120 | tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_CSR, | ||
121 | pci_stat); | ||
122 | } | ||
123 | } | ||
124 | |||
125 | return; | ||
126 | } | ||
127 | |||
128 | #define __tsi108_read_pci_config(x, addr, op) \ | ||
129 | __asm__ __volatile__( \ | ||
130 | " "op" %0,0,%1\n" \ | ||
131 | "1: eieio\n" \ | ||
132 | "2:\n" \ | ||
133 | ".section .fixup,\"ax\"\n" \ | ||
134 | "3: li %0,-1\n" \ | ||
135 | " b 2b\n" \ | ||
136 | ".section __ex_table,\"a\"\n" \ | ||
137 | " .align 2\n" \ | ||
138 | " .long 1b,3b\n" \ | ||
139 | ".text" \ | ||
140 | : "=r"(x) : "r"(addr)) | ||
141 | |||
142 | int | ||
143 | tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | ||
144 | int len, u32 * val) | ||
145 | { | ||
146 | volatile unsigned char *cfg_addr; | ||
147 | u32 temp; | ||
148 | |||
149 | if (ppc_md.pci_exclude_device) | ||
150 | if (ppc_md.pci_exclude_device(bus->number, devfn)) | ||
151 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
152 | |||
153 | cfg_addr = (unsigned char *)(tsi_mk_config_addr(bus->number, | ||
154 | devfn, | ||
155 | offset) | (offset & | ||
156 | 0x03)); | ||
157 | |||
158 | switch (len) { | ||
159 | case 1: | ||
160 | __tsi108_read_pci_config(temp, cfg_addr, "lbzx"); | ||
161 | break; | ||
162 | case 2: | ||
163 | __tsi108_read_pci_config(temp, cfg_addr, "lhbrx"); | ||
164 | break; | ||
165 | default: | ||
166 | __tsi108_read_pci_config(temp, cfg_addr, "lwbrx"); | ||
167 | break; | ||
168 | } | ||
169 | |||
170 | *val = temp; | ||
171 | |||
172 | #ifdef DEBUG | ||
173 | if ((0xFFFFFFFF != temp) && (0xFFFF != temp) && (0xFF != temp)) { | ||
174 | printk("PCI CFG read : "); | ||
175 | printk("%d:0x%x:0x%x ", bus->number, devfn, offset); | ||
176 | printk("%d ADDR=0x%08x ", len, (uint) cfg_addr); | ||
177 | printk("data = 0x%x\n", *val); | ||
178 | } | ||
179 | #endif | ||
180 | return PCIBIOS_SUCCESSFUL; | ||
181 | } | ||
182 | |||
183 | void tsi108_clear_pci_cfg_error(void) | ||
184 | { | ||
185 | tsi108_clear_pci_error(TSI108_PCI_CFG_BASE_PHYS); | ||
186 | } | ||
187 | |||
188 | static struct pci_ops tsi108_direct_pci_ops = { | ||
189 | tsi108_direct_read_config, | ||
190 | tsi108_direct_write_config | ||
191 | }; | ||
192 | |||
193 | int __init tsi108_setup_pci(struct device_node *dev) | ||
194 | { | ||
195 | int len; | ||
196 | struct pci_controller *hose; | ||
197 | struct resource rsrc; | ||
198 | int *bus_range; | ||
199 | int primary = 0, has_address = 0; | ||
200 | |||
201 | /* PCI Config mapping */ | ||
202 | tsi108_pci_cfg_base = (u32)ioremap(TSI108_PCI_CFG_BASE_PHYS, | ||
203 | TSI108_PCI_CFG_SIZE); | ||
204 | DBG("TSI_PCI: %s tsi108_pci_cfg_base=0x%x\n", __FUNCTION__, | ||
205 | tsi108_pci_cfg_base); | ||
206 | |||
207 | /* Fetch host bridge registers address */ | ||
208 | has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); | ||
209 | |||
210 | /* Get bus range if any */ | ||
211 | bus_range = (int *)get_property(dev, "bus-range", &len); | ||
212 | if (bus_range == NULL || len < 2 * sizeof(int)) { | ||
213 | printk(KERN_WARNING "Can't get bus-range for %s, assume" | ||
214 | " bus 0\n", dev->full_name); | ||
215 | } | ||
216 | |||
217 | hose = pcibios_alloc_controller(); | ||
218 | |||
219 | if (!hose) { | ||
220 | printk("PCI Host bridge init failed\n"); | ||
221 | return -ENOMEM; | ||
222 | } | ||
223 | hose->arch_data = dev; | ||
224 | hose->set_cfg_type = 1; | ||
225 | |||
226 | hose->first_busno = bus_range ? bus_range[0] : 0; | ||
227 | hose->last_busno = bus_range ? bus_range[1] : 0xff; | ||
228 | |||
229 | (hose)->ops = &tsi108_direct_pci_ops; | ||
230 | |||
231 | printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08lx. " | ||
232 | "Firmware bus number: %d->%d\n", | ||
233 | rsrc.start, hose->first_busno, hose->last_busno); | ||
234 | |||
235 | /* Interpret the "ranges" property */ | ||
236 | /* This also maps the I/O region and sets isa_io/mem_base */ | ||
237 | pci_process_bridge_OF_ranges(hose, dev, primary); | ||
238 | return 0; | ||
239 | } | ||
240 | |||
241 | /* | ||
242 | * Low level utility functions | ||
243 | */ | ||
244 | |||
245 | static void tsi108_pci_int_mask(u_int irq) | ||
246 | { | ||
247 | u_int irp_cfg; | ||
248 | int int_line = (irq - IRQ_PCI_INTAD_BASE); | ||
249 | |||
250 | irp_cfg = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL); | ||
251 | mb(); | ||
252 | irp_cfg |= (1 << int_line); /* INTx_DIR = output */ | ||
253 | irp_cfg &= ~(3 << (8 + (int_line * 2))); /* INTx_TYPE = unused */ | ||
254 | tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL, irp_cfg); | ||
255 | mb(); | ||
256 | irp_cfg = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL); | ||
257 | } | ||
258 | |||
259 | static void tsi108_pci_int_unmask(u_int irq) | ||
260 | { | ||
261 | u_int irp_cfg; | ||
262 | int int_line = (irq - IRQ_PCI_INTAD_BASE); | ||
263 | |||
264 | irp_cfg = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL); | ||
265 | mb(); | ||
266 | irp_cfg &= ~(1 << int_line); | ||
267 | irp_cfg |= (3 << (8 + (int_line * 2))); | ||
268 | tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL, irp_cfg); | ||
269 | mb(); | ||
270 | } | ||
271 | |||
272 | static void init_pci_source(void) | ||
273 | { | ||
274 | tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL, | ||
275 | 0x0000ff00); | ||
276 | tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE, | ||
277 | TSI108_PCI_IRP_ENABLE_P_INT); | ||
278 | mb(); | ||
279 | } | ||
280 | |||
281 | static inline int get_pci_source(void) | ||
282 | { | ||
283 | u_int temp = 0; | ||
284 | int irq = -1; | ||
285 | int i; | ||
286 | u_int pci_irp_stat; | ||
287 | static int mask = 0; | ||
288 | |||
289 | /* Read PCI/X block interrupt status register */ | ||
290 | pci_irp_stat = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_STAT); | ||
291 | mb(); | ||
292 | |||
293 | if (pci_irp_stat & TSI108_PCI_IRP_STAT_P_INT) { | ||
294 | /* Process Interrupt from PCI bus INTA# - INTD# lines */ | ||
295 | temp = | ||
296 | tsi108_read_reg(TSI108_PCI_OFFSET + | ||
297 | TSI108_PCI_IRP_INTAD) & 0xf; | ||
298 | mb(); | ||
299 | for (i = 0; i < 4; i++, mask++) { | ||
300 | if (temp & (1 << mask % 4)) { | ||
301 | irq = IRQ_PCI_INTA + mask % 4; | ||
302 | mask++; | ||
303 | break; | ||
304 | } | ||
305 | } | ||
306 | |||
307 | /* Disable interrupts from PCI block */ | ||
308 | temp = tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE); | ||
309 | tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE, | ||
310 | temp & ~TSI108_PCI_IRP_ENABLE_P_INT); | ||
311 | mb(); | ||
312 | (void)tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE); | ||
313 | mb(); | ||
314 | } | ||
315 | #ifdef DEBUG | ||
316 | else { | ||
317 | printk("TSI108_PIC: error in TSI108_PCI_IRP_STAT\n"); | ||
318 | pci_irp_stat = | ||
319 | tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_STAT); | ||
320 | temp = | ||
321 | tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_INTAD); | ||
322 | mb(); | ||
323 | printk(">> stat=0x%08x intad=0x%08x ", pci_irp_stat, temp); | ||
324 | temp = | ||
325 | tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_CFG_CTL); | ||
326 | mb(); | ||
327 | printk("cfg_ctl=0x%08x ", temp); | ||
328 | temp = | ||
329 | tsi108_read_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE); | ||
330 | mb(); | ||
331 | printk("irp_enable=0x%08x\n", temp); | ||
332 | } | ||
333 | #endif /* end of DEBUG */ | ||
334 | |||
335 | return irq; | ||
336 | } | ||
337 | |||
338 | |||
339 | /* | ||
340 | * Linux descriptor level callbacks | ||
341 | */ | ||
342 | |||
343 | static void tsi108_pci_irq_enable(u_int irq) | ||
344 | { | ||
345 | tsi108_pci_int_unmask(irq); | ||
346 | } | ||
347 | |||
348 | static void tsi108_pci_irq_disable(u_int irq) | ||
349 | { | ||
350 | tsi108_pci_int_mask(irq); | ||
351 | } | ||
352 | |||
353 | static void tsi108_pci_irq_ack(u_int irq) | ||
354 | { | ||
355 | tsi108_pci_int_mask(irq); | ||
356 | } | ||
357 | |||
358 | static void tsi108_pci_irq_end(u_int irq) | ||
359 | { | ||
360 | tsi108_pci_int_unmask(irq); | ||
361 | |||
362 | /* Enable interrupts from PCI block */ | ||
363 | tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE, | ||
364 | tsi108_read_reg(TSI108_PCI_OFFSET + | ||
365 | TSI108_PCI_IRP_ENABLE) | | ||
366 | TSI108_PCI_IRP_ENABLE_P_INT); | ||
367 | mb(); | ||
368 | } | ||
369 | |||
370 | /* | ||
371 | * Interrupt controller descriptor for cascaded PCI interrupt controller. | ||
372 | */ | ||
373 | |||
374 | struct hw_interrupt_type tsi108_pci_irq = { | ||
375 | .typename = "tsi108_PCI_int", | ||
376 | .enable = tsi108_pci_irq_enable, | ||
377 | .disable = tsi108_pci_irq_disable, | ||
378 | .ack = tsi108_pci_irq_ack, | ||
379 | .end = tsi108_pci_irq_end, | ||
380 | }; | ||
381 | |||
382 | /* | ||
383 | * Exported functions | ||
384 | */ | ||
385 | |||
386 | /* | ||
387 | * The Tsi108 PCI interrupts initialization routine. | ||
388 | * | ||
389 | * The INTA# - INTD# interrupts on the PCI bus are reported by the PCI block | ||
390 | * to the MPIC using single interrupt source (IRQ_TSI108_PCI). Therefore the | ||
391 | * PCI block has to be treated as a cascaded interrupt controller connected | ||
392 | * to the MPIC. | ||
393 | */ | ||
394 | |||
395 | void __init tsi108_pci_int_init(void) | ||
396 | { | ||
397 | u_int i; | ||
398 | |||
399 | DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); | ||
400 | |||
401 | for (i = 0; i < NUM_PCI_IRQS; i++) { | ||
402 | irq_desc[i + IRQ_PCI_INTAD_BASE].handler = &tsi108_pci_irq; | ||
403 | irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL; | ||
404 | } | ||
405 | |||
406 | init_pci_source(); | ||
407 | } | ||
408 | |||
409 | int tsi108_irq_cascade(struct pt_regs *regs, void *unused) | ||
410 | { | ||
411 | return get_pci_source(); | ||
412 | } | ||
diff --git a/arch/ppc/4xx_io/serial_sicc.c b/arch/ppc/4xx_io/serial_sicc.c index 98b25fa0049a..1e113d0f59b8 100644 --- a/arch/ppc/4xx_io/serial_sicc.c +++ b/arch/ppc/4xx_io/serial_sicc.c | |||
@@ -1758,7 +1758,7 @@ int __init siccuart_init(void) | |||
1758 | siccnormal_driver->subtype = SERIAL_TYPE_NORMAL; | 1758 | siccnormal_driver->subtype = SERIAL_TYPE_NORMAL; |
1759 | siccnormal_driver->init_termios = tty_std_termios; | 1759 | siccnormal_driver->init_termios = tty_std_termios; |
1760 | siccnormal_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL; | 1760 | siccnormal_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL; |
1761 | siccnormal_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS; | 1761 | siccnormal_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; |
1762 | tty_set_operations(siccnormal_driver, &sicc_ops); | 1762 | tty_set_operations(siccnormal_driver, &sicc_ops); |
1763 | 1763 | ||
1764 | if (tty_register_driver(siccnormal_driver)) | 1764 | if (tty_register_driver(siccnormal_driver)) |
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c index 12b84ca51327..9b3ace26280c 100644 --- a/arch/ppc/8xx_io/commproc.c +++ b/arch/ppc/8xx_io/commproc.c | |||
@@ -187,7 +187,7 @@ cpm_interrupt_init(void) | |||
187 | * interrupt vectors | 187 | * interrupt vectors |
188 | */ | 188 | */ |
189 | for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ ) | 189 | for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ ) |
190 | irq_desc[i].handler = &cpm_pic; | 190 | irq_desc[i].chip = &cpm_pic; |
191 | 191 | ||
192 | /* Set our interrupt handler with the core CPU. */ | 192 | /* Set our interrupt handler with the core CPU. */ |
193 | if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction)) | 193 | if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction)) |
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig index b55de4f42aec..a04cdf01596b 100644 --- a/arch/ppc/Kconfig +++ b/arch/ppc/Kconfig | |||
@@ -219,10 +219,10 @@ config KEXEC | |||
219 | help | 219 | help |
220 | kexec is a system call that implements the ability to shutdown your | 220 | kexec is a system call that implements the ability to shutdown your |
221 | current kernel, and to start another kernel. It is like a reboot | 221 | current kernel, and to start another kernel. It is like a reboot |
222 | but it is indepedent of the system firmware. And like a reboot | 222 | but it is independent of the system firmware. And like a reboot |
223 | you can start any kernel with it, not just Linux. | 223 | you can start any kernel with it, not just Linux. |
224 | 224 | ||
225 | The name comes from the similiarity to the exec system call. | 225 | The name comes from the similarity to the exec system call. |
226 | 226 | ||
227 | It is an ongoing process to be certain the hardware in a machine | 227 | It is an ongoing process to be certain the hardware in a machine |
228 | is properly shutdown, so do not be surprised if this code does not | 228 | is properly shutdown, so do not be surprised if this code does not |
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c index d20accf9650d..242bb052be67 100644 --- a/arch/ppc/kernel/pci.c +++ b/arch/ppc/kernel/pci.c | |||
@@ -95,8 +95,10 @@ pcibios_fixup_resources(struct pci_dev *dev) | |||
95 | if (!res->flags) | 95 | if (!res->flags) |
96 | continue; | 96 | continue; |
97 | if (res->end == 0xffffffff) { | 97 | if (res->end == 0xffffffff) { |
98 | DBG("PCI:%s Resource %d [%08lx-%08lx] is unassigned\n", | 98 | DBG("PCI:%s Resource %d [%016llx-%016llx] is unassigned\n", |
99 | pci_name(dev), i, res->start, res->end); | 99 | pci_name(dev), i, |
100 | (unsigned long long)res->start, | ||
101 | (unsigned long long)res->end); | ||
100 | res->end -= res->start; | 102 | res->end -= res->start; |
101 | res->start = 0; | 103 | res->start = 0; |
102 | res->flags |= IORESOURCE_UNSET; | 104 | res->flags |= IORESOURCE_UNSET; |
@@ -169,18 +171,18 @@ EXPORT_SYMBOL(pcibios_bus_to_resource); | |||
169 | * but we want to try to avoid allocating at 0x2900-0x2bff | 171 | * but we want to try to avoid allocating at 0x2900-0x2bff |
170 | * which might have be mirrored at 0x0100-0x03ff.. | 172 | * which might have be mirrored at 0x0100-0x03ff.. |
171 | */ | 173 | */ |
172 | void pcibios_align_resource(void *data, struct resource *res, unsigned long size, | 174 | void pcibios_align_resource(void *data, struct resource *res, |
173 | unsigned long align) | 175 | resource_size_t size, resource_size_t align) |
174 | { | 176 | { |
175 | struct pci_dev *dev = data; | 177 | struct pci_dev *dev = data; |
176 | 178 | ||
177 | if (res->flags & IORESOURCE_IO) { | 179 | if (res->flags & IORESOURCE_IO) { |
178 | unsigned long start = res->start; | 180 | resource_size_t start = res->start; |
179 | 181 | ||
180 | if (size > 0x100) { | 182 | if (size > 0x100) { |
181 | printk(KERN_ERR "PCI: I/O Region %s/%d too large" | 183 | printk(KERN_ERR "PCI: I/O Region %s/%d too large" |
182 | " (%ld bytes)\n", pci_name(dev), | 184 | " (%lld bytes)\n", pci_name(dev), |
183 | dev->resource - res, size); | 185 | dev->resource - res, (unsigned long long)size); |
184 | } | 186 | } |
185 | 187 | ||
186 | if (start & 0x300) { | 188 | if (start & 0x300) { |
@@ -251,8 +253,9 @@ pcibios_allocate_bus_resources(struct list_head *bus_list) | |||
251 | } | 253 | } |
252 | } | 254 | } |
253 | 255 | ||
254 | DBG("PCI: bridge rsrc %lx..%lx (%lx), parent %p\n", | 256 | DBG("PCI: bridge rsrc %llx..%llx (%lx), parent %p\n", |
255 | res->start, res->end, res->flags, pr); | 257 | (unsigned long long)res->start, |
258 | (unsigned long long)res->end, res->flags, pr); | ||
256 | if (pr) { | 259 | if (pr) { |
257 | if (request_resource(pr, res) == 0) | 260 | if (request_resource(pr, res) == 0) |
258 | continue; | 261 | continue; |
@@ -302,8 +305,9 @@ reparent_resources(struct resource *parent, struct resource *res) | |||
302 | *pp = NULL; | 305 | *pp = NULL; |
303 | for (p = res->child; p != NULL; p = p->sibling) { | 306 | for (p = res->child; p != NULL; p = p->sibling) { |
304 | p->parent = res; | 307 | p->parent = res; |
305 | DBG(KERN_INFO "PCI: reparented %s [%lx..%lx] under %s\n", | 308 | DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n", |
306 | p->name, p->start, p->end, res->name); | 309 | p->name, (unsigned long long)p->start, |
310 | (unsigned long long)p->end, res->name); | ||
307 | } | 311 | } |
308 | return 0; | 312 | return 0; |
309 | } | 313 | } |
@@ -358,13 +362,15 @@ pci_relocate_bridge_resource(struct pci_bus *bus, int i) | |||
358 | try = conflict->start - 1; | 362 | try = conflict->start - 1; |
359 | } | 363 | } |
360 | if (request_resource(pr, res)) { | 364 | if (request_resource(pr, res)) { |
361 | DBG(KERN_ERR "PCI: huh? couldn't move to %lx..%lx\n", | 365 | DBG(KERN_ERR "PCI: huh? couldn't move to %llx..%llx\n", |
362 | res->start, res->end); | 366 | (unsigned long long)res->start, |
367 | (unsigned long long)res->end); | ||
363 | return -1; /* "can't happen" */ | 368 | return -1; /* "can't happen" */ |
364 | } | 369 | } |
365 | update_bridge_base(bus, i); | 370 | update_bridge_base(bus, i); |
366 | printk(KERN_INFO "PCI: bridge %d resource %d moved to %lx..%lx\n", | 371 | printk(KERN_INFO "PCI: bridge %d resource %d moved to %llx..%llx\n", |
367 | bus->number, i, res->start, res->end); | 372 | bus->number, i, (unsigned long long)res->start, |
373 | (unsigned long long)res->end); | ||
368 | return 0; | 374 | return 0; |
369 | } | 375 | } |
370 | 376 | ||
@@ -475,15 +481,17 @@ static inline void alloc_resource(struct pci_dev *dev, int idx) | |||
475 | { | 481 | { |
476 | struct resource *pr, *r = &dev->resource[idx]; | 482 | struct resource *pr, *r = &dev->resource[idx]; |
477 | 483 | ||
478 | DBG("PCI:%s: Resource %d: %08lx-%08lx (f=%lx)\n", | 484 | DBG("PCI:%s: Resource %d: %016llx-%016llx (f=%lx)\n", |
479 | pci_name(dev), idx, r->start, r->end, r->flags); | 485 | pci_name(dev), idx, (unsigned long long)r->start, |
486 | (unsigned long long)r->end, r->flags); | ||
480 | pr = pci_find_parent_resource(dev, r); | 487 | pr = pci_find_parent_resource(dev, r); |
481 | if (!pr || request_resource(pr, r) < 0) { | 488 | if (!pr || request_resource(pr, r) < 0) { |
482 | printk(KERN_ERR "PCI: Cannot allocate resource region %d" | 489 | printk(KERN_ERR "PCI: Cannot allocate resource region %d" |
483 | " of device %s\n", idx, pci_name(dev)); | 490 | " of device %s\n", idx, pci_name(dev)); |
484 | if (pr) | 491 | if (pr) |
485 | DBG("PCI: parent is %p: %08lx-%08lx (f=%lx)\n", | 492 | DBG("PCI: parent is %p: %016llx-%016llx (f=%lx)\n", |
486 | pr, pr->start, pr->end, pr->flags); | 493 | pr, (unsigned long long)pr->start, |
494 | (unsigned long long)pr->end, pr->flags); | ||
487 | /* We'll assign a new address later */ | 495 | /* We'll assign a new address later */ |
488 | r->flags |= IORESOURCE_UNSET; | 496 | r->flags |= IORESOURCE_UNSET; |
489 | r->end -= r->start; | 497 | r->end -= r->start; |
@@ -952,8 +960,8 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp, | |||
952 | else | 960 | else |
953 | prot |= _PAGE_GUARDED; | 961 | prot |= _PAGE_GUARDED; |
954 | 962 | ||
955 | printk("PCI map for %s:%lx, prot: %lx\n", pci_name(dev), rp->start, | 963 | printk("PCI map for %s:%llx, prot: %lx\n", pci_name(dev), |
956 | prot); | 964 | (unsigned long long)rp->start, prot); |
957 | 965 | ||
958 | return __pgprot(prot); | 966 | return __pgprot(prot); |
959 | } | 967 | } |
@@ -1122,7 +1130,7 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) | |||
1122 | 1130 | ||
1123 | void pci_resource_to_user(const struct pci_dev *dev, int bar, | 1131 | void pci_resource_to_user(const struct pci_dev *dev, int bar, |
1124 | const struct resource *rsrc, | 1132 | const struct resource *rsrc, |
1125 | u64 *start, u64 *end) | 1133 | resource_size_t *start, resource_size_t *end) |
1126 | { | 1134 | { |
1127 | struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); | 1135 | struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); |
1128 | unsigned long offset = 0; | 1136 | unsigned long offset = 0; |
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c index 1f79e84ab464..4b4607d89bfa 100644 --- a/arch/ppc/kernel/setup.c +++ b/arch/ppc/kernel/setup.c | |||
@@ -475,7 +475,7 @@ int __init ppc_init(void) | |||
475 | 475 | ||
476 | /* register CPU devices */ | 476 | /* register CPU devices */ |
477 | for_each_possible_cpu(i) | 477 | for_each_possible_cpu(i) |
478 | register_cpu(&cpu_devices[i], i, NULL); | 478 | register_cpu(&cpu_devices[i], i); |
479 | 479 | ||
480 | /* call platform init */ | 480 | /* call platform init */ |
481 | if (ppc_md.init != NULL) { | 481 | if (ppc_md.init != NULL) { |
diff --git a/arch/ppc/platforms/apus_setup.c b/arch/ppc/platforms/apus_setup.c index fe0cdc04d436..5c4118a459f3 100644 --- a/arch/ppc/platforms/apus_setup.c +++ b/arch/ppc/platforms/apus_setup.c | |||
@@ -734,9 +734,9 @@ void apus_init_IRQ(void) | |||
734 | for ( i = 0 ; i < AMI_IRQS; i++ ) { | 734 | for ( i = 0 ; i < AMI_IRQS; i++ ) { |
735 | irq_desc[i].status = IRQ_LEVEL; | 735 | irq_desc[i].status = IRQ_LEVEL; |
736 | if (i < IRQ_AMIGA_AUTO) { | 736 | if (i < IRQ_AMIGA_AUTO) { |
737 | irq_desc[i].handler = &amiga_irqctrl; | 737 | irq_desc[i].chip = &amiga_irqctrl; |
738 | } else { | 738 | } else { |
739 | irq_desc[i].handler = &amiga_sys_irqctrl; | 739 | irq_desc[i].chip = &amiga_sys_irqctrl; |
740 | action = &amiga_sys_irqaction[i-IRQ_AMIGA_AUTO]; | 740 | action = &amiga_sys_irqaction[i-IRQ_AMIGA_AUTO]; |
741 | if (action->name) | 741 | if (action->name) |
742 | setup_irq(i, action); | 742 | setup_irq(i, action); |
diff --git a/arch/ppc/platforms/sbc82xx.c b/arch/ppc/platforms/sbc82xx.c index 866807b4ad0b..41006d2b4b38 100644 --- a/arch/ppc/platforms/sbc82xx.c +++ b/arch/ppc/platforms/sbc82xx.c | |||
@@ -172,7 +172,7 @@ void __init sbc82xx_init_IRQ(void) | |||
172 | 172 | ||
173 | /* Set up the interrupt handlers for the i8259 IRQs */ | 173 | /* Set up the interrupt handlers for the i8259 IRQs */ |
174 | for (i = NR_SIU_INTS; i < NR_SIU_INTS + 8; i++) { | 174 | for (i = NR_SIU_INTS; i < NR_SIU_INTS + 8; i++) { |
175 | irq_desc[i].handler = &sbc82xx_i8259_ic; | 175 | irq_desc[i].chip = &sbc82xx_i8259_ic; |
176 | irq_desc[i].status |= IRQ_LEVEL; | 176 | irq_desc[i].status |= IRQ_LEVEL; |
177 | } | 177 | } |
178 | 178 | ||
diff --git a/arch/ppc/syslib/cpc700_pic.c b/arch/ppc/syslib/cpc700_pic.c index 5add0a919ef6..172aa215fdb0 100644 --- a/arch/ppc/syslib/cpc700_pic.c +++ b/arch/ppc/syslib/cpc700_pic.c | |||
@@ -140,12 +140,12 @@ cpc700_init_IRQ(void) | |||
140 | /* IRQ 0 is highest */ | 140 | /* IRQ 0 is highest */ |
141 | 141 | ||
142 | for (i = 0; i < 17; i++) { | 142 | for (i = 0; i < 17; i++) { |
143 | irq_desc[i].handler = &cpc700_pic; | 143 | irq_desc[i].chip = &cpc700_pic; |
144 | cpc700_pic_init_irq(i); | 144 | cpc700_pic_init_irq(i); |
145 | } | 145 | } |
146 | 146 | ||
147 | for (i = 20; i < 32; i++) { | 147 | for (i = 20; i < 32; i++) { |
148 | irq_desc[i].handler = &cpc700_pic; | 148 | irq_desc[i].chip = &cpc700_pic; |
149 | cpc700_pic_init_irq(i); | 149 | cpc700_pic_init_irq(i); |
150 | } | 150 | } |
151 | 151 | ||
diff --git a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c index 29d95d415ceb..c0fee0beb815 100644 --- a/arch/ppc/syslib/cpm2_pic.c +++ b/arch/ppc/syslib/cpm2_pic.c | |||
@@ -171,7 +171,7 @@ void cpm2_init_IRQ(void) | |||
171 | /* Enable chaining to OpenPIC, and make everything level | 171 | /* Enable chaining to OpenPIC, and make everything level |
172 | */ | 172 | */ |
173 | for (i = 0; i < NR_CPM_INTS; i++) { | 173 | for (i = 0; i < NR_CPM_INTS; i++) { |
174 | irq_desc[i+CPM_IRQ_OFFSET].handler = &cpm2_pic; | 174 | irq_desc[i+CPM_IRQ_OFFSET].chip = &cpm2_pic; |
175 | irq_desc[i+CPM_IRQ_OFFSET].status |= IRQ_LEVEL; | 175 | irq_desc[i+CPM_IRQ_OFFSET].status |= IRQ_LEVEL; |
176 | } | 176 | } |
177 | } | 177 | } |
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c index dc3bd9ecbbf6..91096b38ae70 100644 --- a/arch/ppc/syslib/gt64260_pic.c +++ b/arch/ppc/syslib/gt64260_pic.c | |||
@@ -98,7 +98,7 @@ gt64260_init_irq(void) | |||
98 | 98 | ||
99 | /* use the gt64260 for all (possible) interrupt sources */ | 99 | /* use the gt64260 for all (possible) interrupt sources */ |
100 | for (i = gt64260_irq_base; i < (gt64260_irq_base + 96); i++) | 100 | for (i = gt64260_irq_base; i < (gt64260_irq_base + 96); i++) |
101 | irq_desc[i].handler = >64260_pic; | 101 | irq_desc[i].chip = >64260_pic; |
102 | 102 | ||
103 | if (ppc_md.progress) | 103 | if (ppc_md.progress) |
104 | ppc_md.progress("gt64260_init_irq: exit", 0x0); | 104 | ppc_md.progress("gt64260_init_irq: exit", 0x0); |
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c index 1941a8c7ca9a..63fa5b313396 100644 --- a/arch/ppc/syslib/m82xx_pci.c +++ b/arch/ppc/syslib/m82xx_pci.c | |||
@@ -159,7 +159,7 @@ pq2pci_init_irq(void) | |||
159 | immap->im_memctl.memc_or8 = 0xffff8010; | 159 | immap->im_memctl.memc_or8 = 0xffff8010; |
160 | #endif | 160 | #endif |
161 | for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++) | 161 | for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++) |
162 | irq_desc[irq].handler = &pq2pci_ic; | 162 | irq_desc[irq].chip = &pq2pci_ic; |
163 | 163 | ||
164 | /* make PCI IRQ level sensitive */ | 164 | /* make PCI IRQ level sensitive */ |
165 | immap->im_intctl.ic_siexr &= | 165 | immap->im_intctl.ic_siexr &= |
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c index dae9af78bde1..0c4c0de7c59f 100644 --- a/arch/ppc/syslib/m8xx_setup.c +++ b/arch/ppc/syslib/m8xx_setup.c | |||
@@ -347,13 +347,13 @@ m8xx_init_IRQ(void) | |||
347 | int i; | 347 | int i; |
348 | 348 | ||
349 | for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++) | 349 | for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++) |
350 | irq_desc[i].handler = &ppc8xx_pic; | 350 | irq_desc[i].chip = &ppc8xx_pic; |
351 | 351 | ||
352 | cpm_interrupt_init(); | 352 | cpm_interrupt_init(); |
353 | 353 | ||
354 | #if defined(CONFIG_PCI) | 354 | #if defined(CONFIG_PCI) |
355 | for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++) | 355 | for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++) |
356 | irq_desc[i].handler = &i8259_pic; | 356 | irq_desc[i].chip = &i8259_pic; |
357 | 357 | ||
358 | i8259_pic_irq_offset = I8259_IRQ_OFFSET; | 358 | i8259_pic_irq_offset = I8259_IRQ_OFFSET; |
359 | i8259_init(0); | 359 | i8259_init(0); |
diff --git a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c index c4406f9dc6a3..6425b5cee7db 100644 --- a/arch/ppc/syslib/mpc52xx_pic.c +++ b/arch/ppc/syslib/mpc52xx_pic.c | |||
@@ -204,9 +204,9 @@ mpc52xx_init_irq(void) | |||
204 | out_be32(&intr->main_pri1, 0); | 204 | out_be32(&intr->main_pri1, 0); |
205 | out_be32(&intr->main_pri2, 0); | 205 | out_be32(&intr->main_pri2, 0); |
206 | 206 | ||
207 | /* Initialize irq_desc[i].handler's with mpc52xx_ic. */ | 207 | /* Initialize irq_desc[i].chip's with mpc52xx_ic. */ |
208 | for (i = 0; i < NR_IRQS; i++) { | 208 | for (i = 0; i < NR_IRQS; i++) { |
209 | irq_desc[i].handler = &mpc52xx_ic; | 209 | irq_desc[i].chip = &mpc52xx_ic; |
210 | irq_desc[i].status = IRQ_LEVEL; | 210 | irq_desc[i].status = IRQ_LEVEL; |
211 | } | 211 | } |
212 | 212 | ||
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c index 5a19697060f0..a4244d468381 100644 --- a/arch/ppc/syslib/mv64360_pic.c +++ b/arch/ppc/syslib/mv64360_pic.c | |||
@@ -119,7 +119,7 @@ mv64360_init_irq(void) | |||
119 | /* All interrupts are level interrupts */ | 119 | /* All interrupts are level interrupts */ |
120 | for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) { | 120 | for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) { |
121 | irq_desc[i].status |= IRQ_LEVEL; | 121 | irq_desc[i].status |= IRQ_LEVEL; |
122 | irq_desc[i].handler = &mv64360_pic; | 122 | irq_desc[i].chip = &mv64360_pic; |
123 | } | 123 | } |
124 | 124 | ||
125 | if (ppc_md.progress) | 125 | if (ppc_md.progress) |
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c index 70456c8f998c..767a0bc95817 100644 --- a/arch/ppc/syslib/open_pic.c +++ b/arch/ppc/syslib/open_pic.c | |||
@@ -373,7 +373,7 @@ void __init openpic_init(int offset) | |||
373 | OPENPIC_VEC_IPI+i+offset); | 373 | OPENPIC_VEC_IPI+i+offset); |
374 | /* IPIs are per-CPU */ | 374 | /* IPIs are per-CPU */ |
375 | irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU; | 375 | irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU; |
376 | irq_desc[OPENPIC_VEC_IPI+i+offset].handler = &open_pic_ipi; | 376 | irq_desc[OPENPIC_VEC_IPI+i+offset].chip = &open_pic_ipi; |
377 | } | 377 | } |
378 | #endif | 378 | #endif |
379 | 379 | ||
@@ -408,7 +408,7 @@ void __init openpic_init(int offset) | |||
408 | 408 | ||
409 | /* Init descriptors */ | 409 | /* Init descriptors */ |
410 | for (i = offset; i < NumSources + offset; i++) | 410 | for (i = offset; i < NumSources + offset; i++) |
411 | irq_desc[i].handler = &open_pic; | 411 | irq_desc[i].chip = &open_pic; |
412 | 412 | ||
413 | /* Initialize the spurious interrupt */ | 413 | /* Initialize the spurious interrupt */ |
414 | if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd); | 414 | if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd); |
@@ -615,8 +615,8 @@ void __devinit do_openpic_setup_cpu(void) | |||
615 | /* let the openpic know we want intrs. default affinity | 615 | /* let the openpic know we want intrs. default affinity |
616 | * is 0xffffffff until changed via /proc | 616 | * is 0xffffffff until changed via /proc |
617 | * That's how it's done on x86. If we want it differently, then | 617 | * That's how it's done on x86. If we want it differently, then |
618 | * we should make sure we also change the default values of irq_affinity | 618 | * we should make sure we also change the default values of |
619 | * in irq.c. | 619 | * irq_desc[].affinity in irq.c. |
620 | */ | 620 | */ |
621 | for (i = 0; i < NumSources; i++) | 621 | for (i = 0; i < NumSources; i++) |
622 | openpic_mapirq(i, msk, CPU_MASK_ALL); | 622 | openpic_mapirq(i, msk, CPU_MASK_ALL); |
diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c index bcbe40de26fe..b8154efff6ed 100644 --- a/arch/ppc/syslib/open_pic2.c +++ b/arch/ppc/syslib/open_pic2.c | |||
@@ -290,7 +290,7 @@ void __init openpic2_init(int offset) | |||
290 | 290 | ||
291 | /* Init descriptors */ | 291 | /* Init descriptors */ |
292 | for (i = offset; i < NumSources + offset; i++) | 292 | for (i = offset; i < NumSources + offset; i++) |
293 | irq_desc[i].handler = &open_pic2; | 293 | irq_desc[i].chip = &open_pic2; |
294 | 294 | ||
295 | /* Initialize the spurious interrupt */ | 295 | /* Initialize the spurious interrupt */ |
296 | if (ppc_md.progress) ppc_md.progress("openpic2: spurious",0x3bd); | 296 | if (ppc_md.progress) ppc_md.progress("openpic2: spurious",0x3bd); |
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c index c46043c47225..1584c8b1229f 100644 --- a/arch/ppc/syslib/ppc403_pic.c +++ b/arch/ppc/syslib/ppc403_pic.c | |||
@@ -121,5 +121,5 @@ ppc4xx_pic_init(void) | |||
121 | ppc_md.get_irq = ppc403_pic_get_irq; | 121 | ppc_md.get_irq = ppc403_pic_get_irq; |
122 | 122 | ||
123 | for (i = 0; i < NR_IRQS; i++) | 123 | for (i = 0; i < NR_IRQS; i++) |
124 | irq_desc[i].handler = &ppc403_aic; | 124 | irq_desc[i].chip = &ppc403_aic; |
125 | } | 125 | } |
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c index fd9af0fc0e9f..e669c1335d47 100644 --- a/arch/ppc/syslib/ppc4xx_pic.c +++ b/arch/ppc/syslib/ppc4xx_pic.c | |||
@@ -276,7 +276,7 @@ void __init ppc4xx_pic_init(void) | |||
276 | 276 | ||
277 | /* Attach low-level handlers */ | 277 | /* Attach low-level handlers */ |
278 | for (i = 0; i < (NR_UICS << 5); ++i) { | 278 | for (i = 0; i < (NR_UICS << 5); ++i) { |
279 | irq_desc[i].handler = &__uic[i >> 5].decl; | 279 | irq_desc[i].chip = &__uic[i >> 5].decl; |
280 | if (is_level_sensitive(i)) | 280 | if (is_level_sensitive(i)) |
281 | irq_desc[i].status |= IRQ_LEVEL; | 281 | irq_desc[i].status |= IRQ_LEVEL; |
282 | } | 282 | } |
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c index e672b600f315..39a93dc6375b 100644 --- a/arch/ppc/syslib/xilinx_pic.c +++ b/arch/ppc/syslib/xilinx_pic.c | |||
@@ -143,7 +143,7 @@ ppc4xx_pic_init(void) | |||
143 | ppc_md.get_irq = xilinx_pic_get_irq; | 143 | ppc_md.get_irq = xilinx_pic_get_irq; |
144 | 144 | ||
145 | for (i = 0; i < NR_IRQS; ++i) { | 145 | for (i = 0; i < NR_IRQS; ++i) { |
146 | irq_desc[i].handler = &xilinx_intc; | 146 | irq_desc[i].chip = &xilinx_intc; |
147 | 147 | ||
148 | if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i)) | 148 | if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i)) |
149 | irq_desc[i].status &= ~IRQ_LEVEL; | 149 | irq_desc[i].status &= ~IRQ_LEVEL; |
diff --git a/arch/s390/appldata/appldata.h b/arch/s390/appldata/appldata.h index e806a8922bbb..71d65eb30650 100644 --- a/arch/s390/appldata/appldata.h +++ b/arch/s390/appldata/appldata.h | |||
@@ -3,9 +3,9 @@ | |||
3 | * | 3 | * |
4 | * Definitions and interface for Linux - z/VM Monitor Stream. | 4 | * Definitions and interface for Linux - z/VM Monitor Stream. |
5 | * | 5 | * |
6 | * Copyright (C) 2003 IBM Corporation, IBM Deutschland Entwicklung GmbH. | 6 | * Copyright (C) 2003,2006 IBM Corporation, IBM Deutschland Entwicklung GmbH. |
7 | * | 7 | * |
8 | * Author: Gerald Schaefer <geraldsc@de.ibm.com> | 8 | * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com> |
9 | */ | 9 | */ |
10 | 10 | ||
11 | //#define APPLDATA_DEBUG /* Debug messages on/off */ | 11 | //#define APPLDATA_DEBUG /* Debug messages on/off */ |
@@ -29,6 +29,22 @@ | |||
29 | #define CTL_APPLDATA_NET_SUM 2125 | 29 | #define CTL_APPLDATA_NET_SUM 2125 |
30 | #define CTL_APPLDATA_PROC 2126 | 30 | #define CTL_APPLDATA_PROC 2126 |
31 | 31 | ||
32 | #ifndef CONFIG_64BIT | ||
33 | |||
34 | #define APPLDATA_START_INTERVAL_REC 0x00 /* Function codes for */ | ||
35 | #define APPLDATA_STOP_REC 0x01 /* DIAG 0xDC */ | ||
36 | #define APPLDATA_GEN_EVENT_RECORD 0x02 | ||
37 | #define APPLDATA_START_CONFIG_REC 0x03 | ||
38 | |||
39 | #else | ||
40 | |||
41 | #define APPLDATA_START_INTERVAL_REC 0x80 | ||
42 | #define APPLDATA_STOP_REC 0x81 | ||
43 | #define APPLDATA_GEN_EVENT_RECORD 0x82 | ||
44 | #define APPLDATA_START_CONFIG_REC 0x83 | ||
45 | |||
46 | #endif /* CONFIG_64BIT */ | ||
47 | |||
32 | #define P_INFO(x...) printk(KERN_INFO MY_PRINT_NAME " info: " x) | 48 | #define P_INFO(x...) printk(KERN_INFO MY_PRINT_NAME " info: " x) |
33 | #define P_ERROR(x...) printk(KERN_ERR MY_PRINT_NAME " error: " x) | 49 | #define P_ERROR(x...) printk(KERN_ERR MY_PRINT_NAME " error: " x) |
34 | #define P_WARNING(x...) printk(KERN_WARNING MY_PRINT_NAME " status: " x) | 50 | #define P_WARNING(x...) printk(KERN_WARNING MY_PRINT_NAME " status: " x) |
@@ -53,7 +69,11 @@ struct appldata_ops { | |||
53 | void *data; /* record data */ | 69 | void *data; /* record data */ |
54 | unsigned int size; /* size of record */ | 70 | unsigned int size; /* size of record */ |
55 | struct module *owner; /* THIS_MODULE */ | 71 | struct module *owner; /* THIS_MODULE */ |
72 | char mod_lvl[2]; /* modification level, EBCDIC */ | ||
56 | }; | 73 | }; |
57 | 74 | ||
58 | extern int appldata_register_ops(struct appldata_ops *ops); | 75 | extern int appldata_register_ops(struct appldata_ops *ops); |
59 | extern void appldata_unregister_ops(struct appldata_ops *ops); | 76 | extern void appldata_unregister_ops(struct appldata_ops *ops); |
77 | extern int appldata_diag(char record_nr, u16 function, unsigned long buffer, | ||
78 | u16 length, char *mod_lvl); | ||
79 | |||
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c index 9a22434a580c..61bc44626c04 100644 --- a/arch/s390/appldata/appldata_base.c +++ b/arch/s390/appldata/appldata_base.c | |||
@@ -5,9 +5,9 @@ | |||
5 | * Exports appldata_register_ops() and appldata_unregister_ops() for the | 5 | * Exports appldata_register_ops() and appldata_unregister_ops() for the |
6 | * data gathering modules. | 6 | * data gathering modules. |
7 | * | 7 | * |
8 | * Copyright (C) 2003 IBM Corporation, IBM Deutschland Entwicklung GmbH. | 8 | * Copyright (C) 2003,2006 IBM Corporation, IBM Deutschland Entwicklung GmbH. |
9 | * | 9 | * |
10 | * Author: Gerald Schaefer <geraldsc@de.ibm.com> | 10 | * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com> |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/config.h> | 13 | #include <linux/config.h> |
@@ -40,22 +40,6 @@ | |||
40 | 40 | ||
41 | #define TOD_MICRO 0x01000 /* nr. of TOD clock units | 41 | #define TOD_MICRO 0x01000 /* nr. of TOD clock units |
42 | for 1 microsecond */ | 42 | for 1 microsecond */ |
43 | #ifndef CONFIG_64BIT | ||
44 | |||
45 | #define APPLDATA_START_INTERVAL_REC 0x00 /* Function codes for */ | ||
46 | #define APPLDATA_STOP_REC 0x01 /* DIAG 0xDC */ | ||
47 | #define APPLDATA_GEN_EVENT_RECORD 0x02 | ||
48 | #define APPLDATA_START_CONFIG_REC 0x03 | ||
49 | |||
50 | #else | ||
51 | |||
52 | #define APPLDATA_START_INTERVAL_REC 0x80 | ||
53 | #define APPLDATA_STOP_REC 0x81 | ||
54 | #define APPLDATA_GEN_EVENT_RECORD 0x82 | ||
55 | #define APPLDATA_START_CONFIG_REC 0x83 | ||
56 | |||
57 | #endif /* CONFIG_64BIT */ | ||
58 | |||
59 | 43 | ||
60 | /* | 44 | /* |
61 | * Parameter list for DIAGNOSE X'DC' | 45 | * Parameter list for DIAGNOSE X'DC' |
@@ -195,8 +179,8 @@ static void appldata_work_fn(void *data) | |||
195 | * | 179 | * |
196 | * prepare parameter list, issue DIAG 0xDC | 180 | * prepare parameter list, issue DIAG 0xDC |
197 | */ | 181 | */ |
198 | static int appldata_diag(char record_nr, u16 function, unsigned long buffer, | 182 | int appldata_diag(char record_nr, u16 function, unsigned long buffer, |
199 | u16 length) | 183 | u16 length, char *mod_lvl) |
200 | { | 184 | { |
201 | unsigned long ry; | 185 | unsigned long ry; |
202 | struct appldata_product_id { | 186 | struct appldata_product_id { |
@@ -214,7 +198,7 @@ static int appldata_diag(char record_nr, u16 function, unsigned long buffer, | |||
214 | .record_nr = record_nr, | 198 | .record_nr = record_nr, |
215 | .version_nr = {0xF2, 0xF6}, /* "26" */ | 199 | .version_nr = {0xF2, 0xF6}, /* "26" */ |
216 | .release_nr = {0xF0, 0xF1}, /* "01" */ | 200 | .release_nr = {0xF0, 0xF1}, /* "01" */ |
217 | .mod_lvl = {0xF0, 0xF0}, /* "00" */ | 201 | .mod_lvl = {mod_lvl[0], mod_lvl[1]}, |
218 | }; | 202 | }; |
219 | struct appldata_parameter_list appldata_parameter_list = { | 203 | struct appldata_parameter_list appldata_parameter_list = { |
220 | .diag = 0xDC, | 204 | .diag = 0xDC, |
@@ -467,24 +451,25 @@ appldata_generic_handler(ctl_table *ctl, int write, struct file *filp, | |||
467 | module_put(ops->owner); | 451 | module_put(ops->owner); |
468 | return -ENODEV; | 452 | return -ENODEV; |
469 | } | 453 | } |
470 | ops->active = 1; | ||
471 | ops->callback(ops->data); // init record | 454 | ops->callback(ops->data); // init record |
472 | rc = appldata_diag(ops->record_nr, | 455 | rc = appldata_diag(ops->record_nr, |
473 | APPLDATA_START_INTERVAL_REC, | 456 | APPLDATA_START_INTERVAL_REC, |
474 | (unsigned long) ops->data, ops->size); | 457 | (unsigned long) ops->data, ops->size, |
458 | ops->mod_lvl); | ||
475 | if (rc != 0) { | 459 | if (rc != 0) { |
476 | P_ERROR("START DIAG 0xDC for %s failed, " | 460 | P_ERROR("START DIAG 0xDC for %s failed, " |
477 | "return code: %d\n", ops->name, rc); | 461 | "return code: %d\n", ops->name, rc); |
478 | module_put(ops->owner); | 462 | module_put(ops->owner); |
479 | ops->active = 0; | ||
480 | } else { | 463 | } else { |
481 | P_INFO("Monitoring %s data enabled, " | 464 | P_INFO("Monitoring %s data enabled, " |
482 | "DIAG 0xDC started.\n", ops->name); | 465 | "DIAG 0xDC started.\n", ops->name); |
466 | ops->active = 1; | ||
483 | } | 467 | } |
484 | } else if ((buf[0] == '0') && (ops->active == 1)) { | 468 | } else if ((buf[0] == '0') && (ops->active == 1)) { |
485 | ops->active = 0; | 469 | ops->active = 0; |
486 | rc = appldata_diag(ops->record_nr, APPLDATA_STOP_REC, | 470 | rc = appldata_diag(ops->record_nr, APPLDATA_STOP_REC, |
487 | (unsigned long) ops->data, ops->size); | 471 | (unsigned long) ops->data, ops->size, |
472 | ops->mod_lvl); | ||
488 | if (rc != 0) { | 473 | if (rc != 0) { |
489 | P_ERROR("STOP DIAG 0xDC for %s failed, " | 474 | P_ERROR("STOP DIAG 0xDC for %s failed, " |
490 | "return code: %d\n", ops->name, rc); | 475 | "return code: %d\n", ops->name, rc); |
@@ -633,7 +618,7 @@ appldata_offline_cpu(int cpu) | |||
633 | spin_unlock(&appldata_timer_lock); | 618 | spin_unlock(&appldata_timer_lock); |
634 | } | 619 | } |
635 | 620 | ||
636 | static int | 621 | static int __cpuinit |
637 | appldata_cpu_notify(struct notifier_block *self, | 622 | appldata_cpu_notify(struct notifier_block *self, |
638 | unsigned long action, void *hcpu) | 623 | unsigned long action, void *hcpu) |
639 | { | 624 | { |
@@ -652,7 +637,7 @@ appldata_cpu_notify(struct notifier_block *self, | |||
652 | return NOTIFY_OK; | 637 | return NOTIFY_OK; |
653 | } | 638 | } |
654 | 639 | ||
655 | static struct notifier_block appldata_nb = { | 640 | static struct notifier_block __devinitdata appldata_nb = { |
656 | .notifier_call = appldata_cpu_notify, | 641 | .notifier_call = appldata_cpu_notify, |
657 | }; | 642 | }; |
658 | 643 | ||
@@ -710,7 +695,8 @@ static void __exit appldata_exit(void) | |||
710 | list_for_each(lh, &appldata_ops_list) { | 695 | list_for_each(lh, &appldata_ops_list) { |
711 | ops = list_entry(lh, struct appldata_ops, list); | 696 | ops = list_entry(lh, struct appldata_ops, list); |
712 | rc = appldata_diag(ops->record_nr, APPLDATA_STOP_REC, | 697 | rc = appldata_diag(ops->record_nr, APPLDATA_STOP_REC, |
713 | (unsigned long) ops->data, ops->size); | 698 | (unsigned long) ops->data, ops->size, |
699 | ops->mod_lvl); | ||
714 | if (rc != 0) { | 700 | if (rc != 0) { |
715 | P_ERROR("STOP DIAG 0xDC for %s failed, " | 701 | P_ERROR("STOP DIAG 0xDC for %s failed, " |
716 | "return code: %d\n", ops->name, rc); | 702 | "return code: %d\n", ops->name, rc); |
@@ -739,6 +725,7 @@ MODULE_DESCRIPTION("Linux-VM Monitor Stream, base infrastructure"); | |||
739 | 725 | ||
740 | EXPORT_SYMBOL_GPL(appldata_register_ops); | 726 | EXPORT_SYMBOL_GPL(appldata_register_ops); |
741 | EXPORT_SYMBOL_GPL(appldata_unregister_ops); | 727 | EXPORT_SYMBOL_GPL(appldata_unregister_ops); |
728 | EXPORT_SYMBOL_GPL(appldata_diag); | ||
742 | 729 | ||
743 | #ifdef MODULE | 730 | #ifdef MODULE |
744 | /* | 731 | /* |
@@ -779,7 +766,6 @@ unsigned long nr_iowait(void) | |||
779 | #endif /* MODULE */ | 766 | #endif /* MODULE */ |
780 | EXPORT_SYMBOL_GPL(si_swapinfo); | 767 | EXPORT_SYMBOL_GPL(si_swapinfo); |
781 | EXPORT_SYMBOL_GPL(nr_threads); | 768 | EXPORT_SYMBOL_GPL(nr_threads); |
782 | EXPORT_SYMBOL_GPL(avenrun); | ||
783 | EXPORT_SYMBOL_GPL(get_full_page_state); | 769 | EXPORT_SYMBOL_GPL(get_full_page_state); |
784 | EXPORT_SYMBOL_GPL(nr_running); | 770 | EXPORT_SYMBOL_GPL(nr_running); |
785 | EXPORT_SYMBOL_GPL(nr_iowait); | 771 | EXPORT_SYMBOL_GPL(nr_iowait); |
diff --git a/arch/s390/appldata/appldata_mem.c b/arch/s390/appldata/appldata_mem.c index f0e2fbed3d4c..7915a197d96d 100644 --- a/arch/s390/appldata/appldata_mem.c +++ b/arch/s390/appldata/appldata_mem.c | |||
@@ -4,9 +4,9 @@ | |||
4 | * Data gathering module for Linux-VM Monitor Stream, Stage 1. | 4 | * Data gathering module for Linux-VM Monitor Stream, Stage 1. |
5 | * Collects data related to memory management. | 5 | * Collects data related to memory management. |
6 | * | 6 | * |
7 | * Copyright (C) 2003 IBM Corporation, IBM Deutschland Entwicklung GmbH. | 7 | * Copyright (C) 2003,2006 IBM Corporation, IBM Deutschland Entwicklung GmbH. |
8 | * | 8 | * |
9 | * Author: Gerald Schaefer <geraldsc@de.ibm.com> | 9 | * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com> |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/config.h> | 12 | #include <linux/config.h> |
@@ -152,6 +152,7 @@ static struct appldata_ops ops = { | |||
152 | .callback = &appldata_get_mem_data, | 152 | .callback = &appldata_get_mem_data, |
153 | .data = &appldata_mem_data, | 153 | .data = &appldata_mem_data, |
154 | .owner = THIS_MODULE, | 154 | .owner = THIS_MODULE, |
155 | .mod_lvl = {0xF0, 0xF0}, /* EBCDIC "00" */ | ||
155 | }; | 156 | }; |
156 | 157 | ||
157 | 158 | ||
diff --git a/arch/s390/appldata/appldata_net_sum.c b/arch/s390/appldata/appldata_net_sum.c index 2a4c7432db4a..39b7bdecbf05 100644 --- a/arch/s390/appldata/appldata_net_sum.c +++ b/arch/s390/appldata/appldata_net_sum.c | |||
@@ -5,9 +5,9 @@ | |||
5 | * Collects accumulated network statistics (Packets received/transmitted, | 5 | * Collects accumulated network statistics (Packets received/transmitted, |
6 | * dropped, errors, ...). | 6 | * dropped, errors, ...). |
7 | * | 7 | * |
8 | * Copyright (C) 2003 IBM Corporation, IBM Deutschland Entwicklung GmbH. | 8 | * Copyright (C) 2003,2006 IBM Corporation, IBM Deutschland Entwicklung GmbH. |
9 | * | 9 | * |
10 | * Author: Gerald Schaefer <geraldsc@de.ibm.com> | 10 | * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com> |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/config.h> | 13 | #include <linux/config.h> |
@@ -152,6 +152,7 @@ static struct appldata_ops ops = { | |||
152 | .callback = &appldata_get_net_sum_data, | 152 | .callback = &appldata_get_net_sum_data, |
153 | .data = &appldata_net_sum_data, | 153 | .data = &appldata_net_sum_data, |
154 | .owner = THIS_MODULE, | 154 | .owner = THIS_MODULE, |
155 | .mod_lvl = {0xF0, 0xF0}, /* EBCDIC "00" */ | ||
155 | }; | 156 | }; |
156 | 157 | ||
157 | 158 | ||
diff --git a/arch/s390/appldata/appldata_os.c b/arch/s390/appldata/appldata_os.c index 99ddd3bf2fba..f2b44a2f1dec 100644 --- a/arch/s390/appldata/appldata_os.c +++ b/arch/s390/appldata/appldata_os.c | |||
@@ -4,9 +4,9 @@ | |||
4 | * Data gathering module for Linux-VM Monitor Stream, Stage 1. | 4 | * Data gathering module for Linux-VM Monitor Stream, Stage 1. |
5 | * Collects misc. OS related data (CPU utilization, running processes). | 5 | * Collects misc. OS related data (CPU utilization, running processes). |
6 | * | 6 | * |
7 | * Copyright (C) 2003 IBM Corporation, IBM Deutschland Entwicklung GmbH. | 7 | * Copyright (C) 2003,2006 IBM Corporation, IBM Deutschland Entwicklung GmbH. |
8 | * | 8 | * |
9 | * Author: Gerald Schaefer <geraldsc@de.ibm.com> | 9 | * Author: Gerald Schaefer <gerald.schaefer@de.ibm.com> |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/config.h> | 12 | #include <linux/config.h> |
@@ -44,11 +44,14 @@ struct appldata_os_per_cpu { | |||
44 | u32 per_cpu_system; /* ... spent in kernel mode */ | 44 | u32 per_cpu_system; /* ... spent in kernel mode */ |
45 | u32 per_cpu_idle; /* ... spent in idle mode */ | 45 | u32 per_cpu_idle; /* ... spent in idle mode */ |
46 | 46 | ||
47 | // New in 2.6 --> | 47 | /* New in 2.6 */ |
48 | u32 per_cpu_irq; /* ... spent in interrupts */ | 48 | u32 per_cpu_irq; /* ... spent in interrupts */ |
49 | u32 per_cpu_softirq; /* ... spent in softirqs */ | 49 | u32 per_cpu_softirq; /* ... spent in softirqs */ |
50 | u32 per_cpu_iowait; /* ... spent while waiting for I/O */ | 50 | u32 per_cpu_iowait; /* ... spent while waiting for I/O */ |
51 | // <-- New in 2.6 | 51 | |
52 | /* New in modification level 01 */ | ||
53 | u32 per_cpu_steal; /* ... stolen by hypervisor */ | ||
54 | u32 cpu_id; /* number of this CPU */ | ||
52 | } __attribute__((packed)); | 55 | } __attribute__((packed)); |
53 | 56 | ||
54 | struct appldata_os_data { | 57 | struct appldata_os_data { |
@@ -68,10 +71,9 @@ struct appldata_os_data { | |||
68 | u32 avenrun[3]; /* average nr. of running processes during */ | 71 | u32 avenrun[3]; /* average nr. of running processes during */ |
69 | /* the last 1, 5 and 15 minutes */ | 72 | /* the last 1, 5 and 15 minutes */ |
70 | 73 | ||
71 | // New in 2.6 --> | 74 | /* New in 2.6 */ |
72 | u32 nr_iowait; /* number of blocked threads | 75 | u32 nr_iowait; /* number of blocked threads |
73 | (waiting for I/O) */ | 76 | (waiting for I/O) */ |
74 | // <-- New in 2.6 | ||
75 | 77 | ||
76 | /* per cpu data */ | 78 | /* per cpu data */ |
77 | struct appldata_os_per_cpu os_cpu[0]; | 79 | struct appldata_os_per_cpu os_cpu[0]; |
@@ -79,6 +81,14 @@ struct appldata_os_data { | |||
79 | 81 | ||
80 | static struct appldata_os_data *appldata_os_data; | 82 | static struct appldata_os_data *appldata_os_data; |
81 | 83 | ||
84 | static struct appldata_ops ops = { | ||
85 | .ctl_nr = CTL_APPLDATA_OS, | ||
86 | .name = "os", | ||
87 | .record_nr = APPLDATA_RECORD_OS_ID, | ||
88 | .owner = THIS_MODULE, | ||
89 | .mod_lvl = {0xF0, 0xF1}, /* EBCDIC "01" */ | ||
90 | }; | ||
91 | |||
82 | 92 | ||
83 | static inline void appldata_print_debug(struct appldata_os_data *os_data) | 93 | static inline void appldata_print_debug(struct appldata_os_data *os_data) |
84 | { | 94 | { |
@@ -100,15 +110,17 @@ static inline void appldata_print_debug(struct appldata_os_data *os_data) | |||
100 | P_DEBUG("nr_cpus = %u\n", os_data->nr_cpus); | 110 | P_DEBUG("nr_cpus = %u\n", os_data->nr_cpus); |
101 | for (i = 0; i < os_data->nr_cpus; i++) { | 111 | for (i = 0; i < os_data->nr_cpus; i++) { |
102 | P_DEBUG("cpu%u : user = %u, nice = %u, system = %u, " | 112 | P_DEBUG("cpu%u : user = %u, nice = %u, system = %u, " |
103 | "idle = %u, irq = %u, softirq = %u, iowait = %u\n", | 113 | "idle = %u, irq = %u, softirq = %u, iowait = %u, " |
104 | i, | 114 | "steal = %u\n", |
115 | os_data->os_cpu[i].cpu_id, | ||
105 | os_data->os_cpu[i].per_cpu_user, | 116 | os_data->os_cpu[i].per_cpu_user, |
106 | os_data->os_cpu[i].per_cpu_nice, | 117 | os_data->os_cpu[i].per_cpu_nice, |
107 | os_data->os_cpu[i].per_cpu_system, | 118 | os_data->os_cpu[i].per_cpu_system, |
108 | os_data->os_cpu[i].per_cpu_idle, | 119 | os_data->os_cpu[i].per_cpu_idle, |
109 | os_data->os_cpu[i].per_cpu_irq, | 120 | os_data->os_cpu[i].per_cpu_irq, |
110 | os_data->os_cpu[i].per_cpu_softirq, | 121 | os_data->os_cpu[i].per_cpu_softirq, |
111 | os_data->os_cpu[i].per_cpu_iowait); | 122 | os_data->os_cpu[i].per_cpu_iowait, |
123 | os_data->os_cpu[i].per_cpu_steal); | ||
112 | } | 124 | } |
113 | 125 | ||
114 | P_DEBUG("sync_count_1 = %u\n", os_data->sync_count_1); | 126 | P_DEBUG("sync_count_1 = %u\n", os_data->sync_count_1); |
@@ -123,14 +135,13 @@ static inline void appldata_print_debug(struct appldata_os_data *os_data) | |||
123 | */ | 135 | */ |
124 | static void appldata_get_os_data(void *data) | 136 | static void appldata_get_os_data(void *data) |
125 | { | 137 | { |
126 | int i, j; | 138 | int i, j, rc; |
127 | struct appldata_os_data *os_data; | 139 | struct appldata_os_data *os_data; |
140 | unsigned int new_size; | ||
128 | 141 | ||
129 | os_data = data; | 142 | os_data = data; |
130 | os_data->sync_count_1++; | 143 | os_data->sync_count_1++; |
131 | 144 | ||
132 | os_data->nr_cpus = num_online_cpus(); | ||
133 | |||
134 | os_data->nr_threads = nr_threads; | 145 | os_data->nr_threads = nr_threads; |
135 | os_data->nr_running = nr_running(); | 146 | os_data->nr_running = nr_running(); |
136 | os_data->nr_iowait = nr_iowait(); | 147 | os_data->nr_iowait = nr_iowait(); |
@@ -154,9 +165,44 @@ static void appldata_get_os_data(void *data) | |||
154 | cputime_to_jiffies(kstat_cpu(i).cpustat.softirq); | 165 | cputime_to_jiffies(kstat_cpu(i).cpustat.softirq); |
155 | os_data->os_cpu[j].per_cpu_iowait = | 166 | os_data->os_cpu[j].per_cpu_iowait = |
156 | cputime_to_jiffies(kstat_cpu(i).cpustat.iowait); | 167 | cputime_to_jiffies(kstat_cpu(i).cpustat.iowait); |
168 | os_data->os_cpu[j].per_cpu_steal = | ||
169 | cputime_to_jiffies(kstat_cpu(i).cpustat.steal); | ||
170 | os_data->os_cpu[j].cpu_id = i; | ||
157 | j++; | 171 | j++; |
158 | } | 172 | } |
159 | 173 | ||
174 | os_data->nr_cpus = j; | ||
175 | |||
176 | new_size = sizeof(struct appldata_os_data) + | ||
177 | (os_data->nr_cpus * sizeof(struct appldata_os_per_cpu)); | ||
178 | if (ops.size != new_size) { | ||
179 | if (ops.active) { | ||
180 | rc = appldata_diag(APPLDATA_RECORD_OS_ID, | ||
181 | APPLDATA_START_INTERVAL_REC, | ||
182 | (unsigned long) ops.data, new_size, | ||
183 | ops.mod_lvl); | ||
184 | if (rc != 0) { | ||
185 | P_ERROR("os: START NEW DIAG 0xDC failed, " | ||
186 | "return code: %d, new size = %i\n", rc, | ||
187 | new_size); | ||
188 | P_INFO("os: stopping old record now\n"); | ||
189 | } else | ||
190 | P_INFO("os: new record size = %i\n", new_size); | ||
191 | |||
192 | rc = appldata_diag(APPLDATA_RECORD_OS_ID, | ||
193 | APPLDATA_STOP_REC, | ||
194 | (unsigned long) ops.data, ops.size, | ||
195 | ops.mod_lvl); | ||
196 | if (rc != 0) | ||
197 | P_ERROR("os: STOP OLD DIAG 0xDC failed, " | ||
198 | "return code: %d, old size = %i\n", rc, | ||
199 | ops.size); | ||
200 | else | ||
201 | P_INFO("os: old record size = %i stopped\n", | ||
202 | ops.size); | ||
203 | } | ||
204 | ops.size = new_size; | ||
205 | } | ||
160 | os_data->timestamp = get_clock(); | 206 | os_data->timestamp = get_clock(); |
161 | os_data->sync_count_2++; | 207 | os_data->sync_count_2++; |
162 | #ifdef APPLDATA_DEBUG | 208 | #ifdef APPLDATA_DEBUG |
@@ -165,15 +211,6 @@ static void appldata_get_os_data(void *data) | |||
165 | } | 211 | } |
166 | 212 | ||
167 | 213 | ||
168 | static struct appldata_ops ops = { | ||
169 | .ctl_nr = CTL_APPLDATA_OS, | ||
170 | .name = "os", | ||
171 | .record_nr = APPLDATA_RECORD_OS_ID, | ||
172 | .callback = &appldata_get_os_data, | ||
173 | .owner = THIS_MODULE, | ||
174 | }; | ||
175 | |||
176 | |||
177 | /* | 214 | /* |
178 | * appldata_os_init() | 215 | * appldata_os_init() |
179 | * | 216 | * |
@@ -181,26 +218,25 @@ static struct appldata_ops ops = { | |||
181 | */ | 218 | */ |
182 | static int __init appldata_os_init(void) | 219 | static int __init appldata_os_init(void) |
183 | { | 220 | { |
184 | int rc, size; | 221 | int rc, max_size; |
185 | 222 | ||
186 | size = sizeof(struct appldata_os_data) + | 223 | max_size = sizeof(struct appldata_os_data) + |
187 | (NR_CPUS * sizeof(struct appldata_os_per_cpu)); | 224 | (NR_CPUS * sizeof(struct appldata_os_per_cpu)); |
188 | if (size > APPLDATA_MAX_REC_SIZE) { | 225 | if (max_size > APPLDATA_MAX_REC_SIZE) { |
189 | P_ERROR("Size of record = %i, bigger than maximum (%i)!\n", | 226 | P_ERROR("Max. size of OS record = %i, bigger than maximum " |
190 | size, APPLDATA_MAX_REC_SIZE); | 227 | "record size (%i)\n", max_size, APPLDATA_MAX_REC_SIZE); |
191 | rc = -ENOMEM; | 228 | rc = -ENOMEM; |
192 | goto out; | 229 | goto out; |
193 | } | 230 | } |
194 | P_DEBUG("sizeof(os) = %i, sizeof(os_cpu) = %lu\n", size, | 231 | P_DEBUG("max. sizeof(os) = %i, sizeof(os_cpu) = %lu\n", max_size, |
195 | sizeof(struct appldata_os_per_cpu)); | 232 | sizeof(struct appldata_os_per_cpu)); |
196 | 233 | ||
197 | appldata_os_data = kmalloc(size, GFP_DMA); | 234 | appldata_os_data = kzalloc(max_size, GFP_DMA); |
198 | if (appldata_os_data == NULL) { | 235 | if (appldata_os_data == NULL) { |
199 | P_ERROR("No memory for %s!\n", ops.name); | 236 | P_ERROR("No memory for %s!\n", ops.name); |
200 | rc = -ENOMEM; | 237 | rc = -ENOMEM; |
201 | goto out; | 238 | goto out; |
202 | } | 239 | } |
203 | memset(appldata_os_data, 0, size); | ||
204 | 240 | ||
205 | appldata_os_data->per_cpu_size = sizeof(struct appldata_os_per_cpu); | 241 | appldata_os_data->per_cpu_size = sizeof(struct appldata_os_per_cpu); |
206 | appldata_os_data->cpu_offset = offsetof(struct appldata_os_data, | 242 | appldata_os_data->cpu_offset = offsetof(struct appldata_os_data, |
@@ -208,7 +244,7 @@ static int __init appldata_os_init(void) | |||
208 | P_DEBUG("cpu offset = %u\n", appldata_os_data->cpu_offset); | 244 | P_DEBUG("cpu offset = %u\n", appldata_os_data->cpu_offset); |
209 | 245 | ||
210 | ops.data = appldata_os_data; | 246 | ops.data = appldata_os_data; |
211 | ops.size = size; | 247 | ops.callback = &appldata_get_os_data; |
212 | rc = appldata_register_ops(&ops); | 248 | rc = appldata_register_ops(&ops); |
213 | if (rc != 0) { | 249 | if (rc != 0) { |
214 | P_ERROR("Error registering ops, rc = %i\n", rc); | 250 | P_ERROR("Error registering ops, rc = %i\n", rc); |
diff --git a/arch/s390/kernel/binfmt_elf32.c b/arch/s390/kernel/binfmt_elf32.c index 1f451c2cb071..12a6311e9838 100644 --- a/arch/s390/kernel/binfmt_elf32.c +++ b/arch/s390/kernel/binfmt_elf32.c | |||
@@ -177,11 +177,6 @@ struct elf_prpsinfo32 | |||
177 | 177 | ||
178 | #include <linux/highuid.h> | 178 | #include <linux/highuid.h> |
179 | 179 | ||
180 | #undef NEW_TO_OLD_UID | ||
181 | #undef NEW_TO_OLD_GID | ||
182 | #define NEW_TO_OLD_UID(uid) ((uid) > 65535) ? (u16)overflowuid : (u16)(uid) | ||
183 | #define NEW_TO_OLD_GID(gid) ((gid) > 65535) ? (u16)overflowgid : (u16)(gid) | ||
184 | |||
185 | #define elf_addr_t u32 | 180 | #define elf_addr_t u32 |
186 | /* | 181 | /* |
187 | #define init_elf_binfmt init_elf32_binfmt | 182 | #define init_elf_binfmt init_elf32_binfmt |
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S index b2448487854c..aa8b52c2140f 100644 --- a/arch/s390/kernel/entry.S +++ b/arch/s390/kernel/entry.S | |||
@@ -93,13 +93,22 @@ STACK_SIZE = 1 << STACK_SHIFT | |||
93 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 | 93 | l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 |
94 | .endm | 94 | .endm |
95 | 95 | ||
96 | .macro SAVE_ALL psworg,savearea,sync | 96 | .macro SAVE_ALL_SYNC psworg,savearea |
97 | la %r12,\psworg | 97 | la %r12,\psworg |
98 | .if \sync | ||
99 | tm \psworg+1,0x01 # test problem state bit | 98 | tm \psworg+1,0x01 # test problem state bit |
100 | bz BASED(2f) # skip stack setup save | 99 | bz BASED(2f) # skip stack setup save |
101 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp | 100 | l %r15,__LC_KERNEL_STACK # problem state -> load ksp |
102 | .else | 101 | #ifdef CONFIG_CHECK_STACK |
102 | b BASED(3f) | ||
103 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | ||
104 | bz BASED(stack_overflow) | ||
105 | 3: | ||
106 | #endif | ||
107 | 2: | ||
108 | .endm | ||
109 | |||
110 | .macro SAVE_ALL_ASYNC psworg,savearea | ||
111 | la %r12,\psworg | ||
103 | tm \psworg+1,0x01 # test problem state bit | 112 | tm \psworg+1,0x01 # test problem state bit |
104 | bnz BASED(1f) # from user -> load async stack | 113 | bnz BASED(1f) # from user -> load async stack |
105 | clc \psworg+4(4),BASED(.Lcritical_end) | 114 | clc \psworg+4(4),BASED(.Lcritical_end) |
@@ -115,7 +124,6 @@ STACK_SIZE = 1 << STACK_SHIFT | |||
115 | sra %r14,STACK_SHIFT | 124 | sra %r14,STACK_SHIFT |
116 | be BASED(2f) | 125 | be BASED(2f) |
117 | 1: l %r15,__LC_ASYNC_STACK | 126 | 1: l %r15,__LC_ASYNC_STACK |
118 | .endif | ||
119 | #ifdef CONFIG_CHECK_STACK | 127 | #ifdef CONFIG_CHECK_STACK |
120 | b BASED(3f) | 128 | b BASED(3f) |
121 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | 129 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD |
@@ -196,7 +204,7 @@ system_call: | |||
196 | STORE_TIMER __LC_SYNC_ENTER_TIMER | 204 | STORE_TIMER __LC_SYNC_ENTER_TIMER |
197 | sysc_saveall: | 205 | sysc_saveall: |
198 | SAVE_ALL_BASE __LC_SAVE_AREA | 206 | SAVE_ALL_BASE __LC_SAVE_AREA |
199 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 | 207 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
200 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA | 208 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
201 | lh %r7,0x8a # get svc number from lowcore | 209 | lh %r7,0x8a # get svc number from lowcore |
202 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 210 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
@@ -425,7 +433,7 @@ pgm_check_handler: | |||
425 | SAVE_ALL_BASE __LC_SAVE_AREA | 433 | SAVE_ALL_BASE __LC_SAVE_AREA |
426 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception | 434 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
427 | bnz BASED(pgm_per) # got per exception -> special case | 435 | bnz BASED(pgm_per) # got per exception -> special case |
428 | SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1 | 436 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
429 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA | 437 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
430 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 438 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
431 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 439 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -464,7 +472,7 @@ pgm_per: | |||
464 | # Normal per exception | 472 | # Normal per exception |
465 | # | 473 | # |
466 | pgm_per_std: | 474 | pgm_per_std: |
467 | SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1 | 475 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
468 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA | 476 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
469 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 477 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
470 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 478 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -490,7 +498,7 @@ pgm_no_vtime2: | |||
490 | # it was a single stepped SVC that is causing all the trouble | 498 | # it was a single stepped SVC that is causing all the trouble |
491 | # | 499 | # |
492 | pgm_svcper: | 500 | pgm_svcper: |
493 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 | 501 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
494 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA | 502 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
495 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 503 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
496 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 504 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -519,7 +527,7 @@ io_int_handler: | |||
519 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | 527 | STORE_TIMER __LC_ASYNC_ENTER_TIMER |
520 | stck __LC_INT_CLOCK | 528 | stck __LC_INT_CLOCK |
521 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | 529 | SAVE_ALL_BASE __LC_SAVE_AREA+16 |
522 | SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+16,0 | 530 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
523 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 | 531 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 |
524 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 532 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
525 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 533 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -631,7 +639,7 @@ ext_int_handler: | |||
631 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | 639 | STORE_TIMER __LC_ASYNC_ENTER_TIMER |
632 | stck __LC_INT_CLOCK | 640 | stck __LC_INT_CLOCK |
633 | SAVE_ALL_BASE __LC_SAVE_AREA+16 | 641 | SAVE_ALL_BASE __LC_SAVE_AREA+16 |
634 | SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16,0 | 642 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
635 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 | 643 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 |
636 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 644 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
637 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 645 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -657,21 +665,31 @@ __critical_end: | |||
657 | .globl mcck_int_handler | 665 | .globl mcck_int_handler |
658 | mcck_int_handler: | 666 | mcck_int_handler: |
659 | spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer | 667 | spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer |
660 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA | ||
661 | lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs | 668 | lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs |
662 | SAVE_ALL_BASE __LC_SAVE_AREA+32 | 669 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
663 | la %r12,__LC_MCK_OLD_PSW | 670 | la %r12,__LC_MCK_OLD_PSW |
664 | tm __LC_MCCK_CODE,0x80 # system damage? | 671 | tm __LC_MCCK_CODE,0x80 # system damage? |
665 | bo BASED(mcck_int_main) # yes -> rest of mcck code invalid | 672 | bo BASED(mcck_int_main) # yes -> rest of mcck code invalid |
666 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | ||
667 | bo BASED(0f) | ||
668 | spt __LC_LAST_UPDATE_TIMER # revalidate cpu timer | ||
669 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 673 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
670 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER | 674 | mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER |
671 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER | 675 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA |
672 | mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER | 676 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? |
677 | bo BASED(1f) | ||
678 | la %r14,__LC_SYNC_ENTER_TIMER | ||
679 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | ||
680 | bl BASED(0f) | ||
681 | la %r14,__LC_ASYNC_ENTER_TIMER | ||
682 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | ||
683 | bl BASED(0f) | ||
684 | la %r14,__LC_EXIT_TIMER | ||
685 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | ||
686 | bl BASED(0f) | ||
687 | la %r14,__LC_LAST_UPDATE_TIMER | ||
688 | 0: spt 0(%r14) | ||
689 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | ||
690 | 1: | ||
673 | #endif | 691 | #endif |
674 | 0: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? | 692 | tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
675 | bno BASED(mcck_int_main) # no -> skip cleanup critical | 693 | bno BASED(mcck_int_main) # no -> skip cleanup critical |
676 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | 694 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit |
677 | bnz BASED(mcck_int_main) # from user -> load async stack | 695 | bnz BASED(mcck_int_main) # from user -> load async stack |
@@ -691,7 +709,7 @@ mcck_int_main: | |||
691 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 709 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
692 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? | 710 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
693 | bno BASED(mcck_no_vtime) # no -> skip cleanup critical | 711 | bno BASED(mcck_no_vtime) # no -> skip cleanup critical |
694 | tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ? | 712 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
695 | bz BASED(mcck_no_vtime) | 713 | bz BASED(mcck_no_vtime) |
696 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | 714 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER |
697 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | 715 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER |
@@ -715,6 +733,20 @@ mcck_no_vtime: | |||
715 | l %r1,BASED(.Ls390_handle_mcck) | 733 | l %r1,BASED(.Ls390_handle_mcck) |
716 | basr %r14,%r1 # call machine check handler | 734 | basr %r14,%r1 # call machine check handler |
717 | mcck_return: | 735 | mcck_return: |
736 | mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW | ||
737 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | ||
738 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | ||
739 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52 | ||
740 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | ||
741 | bno BASED(0f) | ||
742 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | ||
743 | stpt __LC_EXIT_TIMER | ||
744 | lpsw __LC_RETURN_MCCK_PSW # back to caller | ||
745 | 0: | ||
746 | #endif | ||
747 | lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 | ||
748 | lpsw __LC_RETURN_MCCK_PSW # back to caller | ||
749 | |||
718 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 | 750 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 |
719 | 751 | ||
720 | #ifdef CONFIG_SMP | 752 | #ifdef CONFIG_SMP |
@@ -781,6 +813,8 @@ cleanup_table_sysc_leave: | |||
781 | .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000 | 813 | .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000 |
782 | cleanup_table_sysc_work_loop: | 814 | cleanup_table_sysc_work_loop: |
783 | .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000 | 815 | .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000 |
816 | cleanup_table_io_return: | ||
817 | .long io_return + 0x80000000, io_leave + 0x80000000 | ||
784 | cleanup_table_io_leave: | 818 | cleanup_table_io_leave: |
785 | .long io_leave + 0x80000000, io_done + 0x80000000 | 819 | .long io_leave + 0x80000000, io_done + 0x80000000 |
786 | cleanup_table_io_work_loop: | 820 | cleanup_table_io_work_loop: |
@@ -807,6 +841,11 @@ cleanup_critical: | |||
807 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) | 841 | clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) |
808 | bl BASED(cleanup_sysc_return) | 842 | bl BASED(cleanup_sysc_return) |
809 | 0: | 843 | 0: |
844 | clc 4(4,%r12),BASED(cleanup_table_io_return) | ||
845 | bl BASED(0f) | ||
846 | clc 4(4,%r12),BASED(cleanup_table_io_return+4) | ||
847 | bl BASED(cleanup_io_return) | ||
848 | 0: | ||
810 | clc 4(4,%r12),BASED(cleanup_table_io_leave) | 849 | clc 4(4,%r12),BASED(cleanup_table_io_leave) |
811 | bl BASED(0f) | 850 | bl BASED(0f) |
812 | clc 4(4,%r12),BASED(cleanup_table_io_leave+4) | 851 | clc 4(4,%r12),BASED(cleanup_table_io_leave+4) |
@@ -839,7 +878,7 @@ cleanup_system_call: | |||
839 | mvc __LC_SAVE_AREA(16),0(%r12) | 878 | mvc __LC_SAVE_AREA(16),0(%r12) |
840 | 0: st %r13,4(%r12) | 879 | 0: st %r13,4(%r12) |
841 | st %r12,__LC_SAVE_AREA+48 # argh | 880 | st %r12,__LC_SAVE_AREA+48 # argh |
842 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 | 881 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
843 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA | 882 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
844 | l %r12,__LC_SAVE_AREA+48 # argh | 883 | l %r12,__LC_SAVE_AREA+48 # argh |
845 | st %r15,12(%r12) | 884 | st %r15,12(%r12) |
@@ -980,7 +1019,6 @@ cleanup_io_leave_insn: | |||
980 | .long cleanup_critical | 1019 | .long cleanup_critical |
981 | 1020 | ||
982 | #define SYSCALL(esa,esame,emu) .long esa | 1021 | #define SYSCALL(esa,esame,emu) .long esa |
983 | .globl sys_call_table | ||
984 | sys_call_table: | 1022 | sys_call_table: |
985 | #include "syscalls.S" | 1023 | #include "syscalls.S" |
986 | #undef SYSCALL | 1024 | #undef SYSCALL |
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S index 2ac095bc0e25..f3222a1b2861 100644 --- a/arch/s390/kernel/entry64.S +++ b/arch/s390/kernel/entry64.S | |||
@@ -87,13 +87,22 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ | |||
87 | larl %r13,system_call | 87 | larl %r13,system_call |
88 | .endm | 88 | .endm |
89 | 89 | ||
90 | .macro SAVE_ALL psworg,savearea,sync | 90 | .macro SAVE_ALL_SYNC psworg,savearea |
91 | la %r12,\psworg | 91 | la %r12,\psworg |
92 | .if \sync | ||
93 | tm \psworg+1,0x01 # test problem state bit | 92 | tm \psworg+1,0x01 # test problem state bit |
94 | jz 2f # skip stack setup save | 93 | jz 2f # skip stack setup save |
95 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp | 94 | lg %r15,__LC_KERNEL_STACK # problem state -> load ksp |
96 | .else | 95 | #ifdef CONFIG_CHECK_STACK |
96 | j 3f | ||
97 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | ||
98 | jz stack_overflow | ||
99 | 3: | ||
100 | #endif | ||
101 | 2: | ||
102 | .endm | ||
103 | |||
104 | .macro SAVE_ALL_ASYNC psworg,savearea | ||
105 | la %r12,\psworg | ||
97 | tm \psworg+1,0x01 # test problem state bit | 106 | tm \psworg+1,0x01 # test problem state bit |
98 | jnz 1f # from user -> load kernel stack | 107 | jnz 1f # from user -> load kernel stack |
99 | clc \psworg+8(8),BASED(.Lcritical_end) | 108 | clc \psworg+8(8),BASED(.Lcritical_end) |
@@ -108,7 +117,6 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ | |||
108 | srag %r14,%r14,STACK_SHIFT | 117 | srag %r14,%r14,STACK_SHIFT |
109 | jz 2f | 118 | jz 2f |
110 | 1: lg %r15,__LC_ASYNC_STACK # load async stack | 119 | 1: lg %r15,__LC_ASYNC_STACK # load async stack |
111 | .endif | ||
112 | #ifdef CONFIG_CHECK_STACK | 120 | #ifdef CONFIG_CHECK_STACK |
113 | j 3f | 121 | j 3f |
114 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD | 122 | 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD |
@@ -187,7 +195,7 @@ system_call: | |||
187 | STORE_TIMER __LC_SYNC_ENTER_TIMER | 195 | STORE_TIMER __LC_SYNC_ENTER_TIMER |
188 | sysc_saveall: | 196 | sysc_saveall: |
189 | SAVE_ALL_BASE __LC_SAVE_AREA | 197 | SAVE_ALL_BASE __LC_SAVE_AREA |
190 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 | 198 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
191 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA | 199 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
192 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore | 200 | llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore |
193 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 201 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
@@ -446,7 +454,7 @@ pgm_check_handler: | |||
446 | SAVE_ALL_BASE __LC_SAVE_AREA | 454 | SAVE_ALL_BASE __LC_SAVE_AREA |
447 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception | 455 | tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception |
448 | jnz pgm_per # got per exception -> special case | 456 | jnz pgm_per # got per exception -> special case |
449 | SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1 | 457 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
450 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA | 458 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
451 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 459 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
452 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 460 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -485,7 +493,7 @@ pgm_per: | |||
485 | # Normal per exception | 493 | # Normal per exception |
486 | # | 494 | # |
487 | pgm_per_std: | 495 | pgm_per_std: |
488 | SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1 | 496 | SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
489 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA | 497 | CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA |
490 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 498 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
491 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 499 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -511,7 +519,7 @@ pgm_no_vtime2: | |||
511 | # it was a single stepped SVC that is causing all the trouble | 519 | # it was a single stepped SVC that is causing all the trouble |
512 | # | 520 | # |
513 | pgm_svcper: | 521 | pgm_svcper: |
514 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 | 522 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
515 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA | 523 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
516 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 524 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
517 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 525 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -539,7 +547,7 @@ io_int_handler: | |||
539 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | 547 | STORE_TIMER __LC_ASYNC_ENTER_TIMER |
540 | stck __LC_INT_CLOCK | 548 | stck __LC_INT_CLOCK |
541 | SAVE_ALL_BASE __LC_SAVE_AREA+32 | 549 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
542 | SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+32,0 | 550 | SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
543 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 | 551 | CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32 |
544 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 552 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
545 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 553 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -647,7 +655,7 @@ ext_int_handler: | |||
647 | STORE_TIMER __LC_ASYNC_ENTER_TIMER | 655 | STORE_TIMER __LC_ASYNC_ENTER_TIMER |
648 | stck __LC_INT_CLOCK | 656 | stck __LC_INT_CLOCK |
649 | SAVE_ALL_BASE __LC_SAVE_AREA+32 | 657 | SAVE_ALL_BASE __LC_SAVE_AREA+32 |
650 | SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32,0 | 658 | SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
651 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 | 659 | CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32 |
652 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 660 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
653 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? | 661 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
@@ -672,21 +680,32 @@ __critical_end: | |||
672 | mcck_int_handler: | 680 | mcck_int_handler: |
673 | la %r1,4095 # revalidate r1 | 681 | la %r1,4095 # revalidate r1 |
674 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer | 682 | spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer |
675 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r1) | ||
676 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs | 683 | lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs |
677 | SAVE_ALL_BASE __LC_SAVE_AREA+64 | 684 | SAVE_ALL_BASE __LC_SAVE_AREA+64 |
678 | la %r12,__LC_MCK_OLD_PSW | 685 | la %r12,__LC_MCK_OLD_PSW |
679 | tm __LC_MCCK_CODE,0x80 # system damage? | 686 | tm __LC_MCCK_CODE,0x80 # system damage? |
680 | jo mcck_int_main # yes -> rest of mcck code invalid | 687 | jo mcck_int_main # yes -> rest of mcck code invalid |
681 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | ||
682 | jo 0f | ||
683 | spt __LC_LAST_UPDATE_TIMER | ||
684 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 688 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
685 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER | 689 | la %r14,4095 |
686 | mvc __LC_SYNC_ENTER_TIMER(8),__LC_LAST_UPDATE_TIMER | 690 | mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER |
687 | mvc __LC_EXIT_TIMER(8),__LC_LAST_UPDATE_TIMER | 691 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14) |
692 | tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? | ||
693 | jo 1f | ||
694 | la %r14,__LC_SYNC_ENTER_TIMER | ||
695 | clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER | ||
696 | jl 0f | ||
697 | la %r14,__LC_ASYNC_ENTER_TIMER | ||
698 | 0: clc 0(8,%r14),__LC_EXIT_TIMER | ||
699 | jl 0f | ||
700 | la %r14,__LC_EXIT_TIMER | ||
701 | 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER | ||
702 | jl 0f | ||
703 | la %r14,__LC_LAST_UPDATE_TIMER | ||
704 | 0: spt 0(%r14) | ||
705 | mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) | ||
706 | 1: | ||
688 | #endif | 707 | #endif |
689 | 0: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? | 708 | tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? |
690 | jno mcck_int_main # no -> skip cleanup critical | 709 | jno mcck_int_main # no -> skip cleanup critical |
691 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit | 710 | tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit |
692 | jnz mcck_int_main # from user -> load kernel stack | 711 | jnz mcck_int_main # from user -> load kernel stack |
@@ -705,7 +724,7 @@ mcck_int_main: | |||
705 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 724 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
706 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? | 725 | tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? |
707 | jno mcck_no_vtime # no -> no timer update | 726 | jno mcck_no_vtime # no -> no timer update |
708 | tm __LC_MCK_OLD_PSW+1,0x01 # interrupting from user ? | 727 | tm SP_PSW+1(%r15),0x01 # interrupting from user ? |
709 | jz mcck_no_vtime | 728 | jz mcck_no_vtime |
710 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER | 729 | UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER |
711 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER | 730 | UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER |
@@ -727,7 +746,17 @@ mcck_no_vtime: | |||
727 | jno mcck_return | 746 | jno mcck_return |
728 | brasl %r14,s390_handle_mcck | 747 | brasl %r14,s390_handle_mcck |
729 | mcck_return: | 748 | mcck_return: |
730 | RESTORE_ALL __LC_RETURN_MCCK_PSW,0 | 749 | mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW |
750 | ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit | ||
751 | lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 | ||
752 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | ||
753 | mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104 | ||
754 | tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? | ||
755 | jno 0f | ||
756 | stpt __LC_EXIT_TIMER | ||
757 | 0: | ||
758 | #endif | ||
759 | lpswe __LC_RETURN_MCCK_PSW # back to caller | ||
731 | 760 | ||
732 | #ifdef CONFIG_SMP | 761 | #ifdef CONFIG_SMP |
733 | /* | 762 | /* |
@@ -789,6 +818,8 @@ cleanup_table_sysc_leave: | |||
789 | .quad sysc_leave, sysc_work_loop | 818 | .quad sysc_leave, sysc_work_loop |
790 | cleanup_table_sysc_work_loop: | 819 | cleanup_table_sysc_work_loop: |
791 | .quad sysc_work_loop, sysc_reschedule | 820 | .quad sysc_work_loop, sysc_reschedule |
821 | cleanup_table_io_return: | ||
822 | .quad io_return, io_leave | ||
792 | cleanup_table_io_leave: | 823 | cleanup_table_io_leave: |
793 | .quad io_leave, io_done | 824 | .quad io_leave, io_done |
794 | cleanup_table_io_work_loop: | 825 | cleanup_table_io_work_loop: |
@@ -815,6 +846,11 @@ cleanup_critical: | |||
815 | clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8) | 846 | clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8) |
816 | jl cleanup_sysc_return | 847 | jl cleanup_sysc_return |
817 | 0: | 848 | 0: |
849 | clc 8(8,%r12),BASED(cleanup_table_io_return) | ||
850 | jl 0f | ||
851 | clc 8(8,%r12),BASED(cleanup_table_io_return+8) | ||
852 | jl cleanup_io_return | ||
853 | 0: | ||
818 | clc 8(8,%r12),BASED(cleanup_table_io_leave) | 854 | clc 8(8,%r12),BASED(cleanup_table_io_leave) |
819 | jl 0f | 855 | jl 0f |
820 | clc 8(8,%r12),BASED(cleanup_table_io_leave+8) | 856 | clc 8(8,%r12),BASED(cleanup_table_io_leave+8) |
@@ -847,7 +883,7 @@ cleanup_system_call: | |||
847 | mvc __LC_SAVE_AREA(32),0(%r12) | 883 | mvc __LC_SAVE_AREA(32),0(%r12) |
848 | 0: stg %r13,8(%r12) | 884 | 0: stg %r13,8(%r12) |
849 | stg %r12,__LC_SAVE_AREA+96 # argh | 885 | stg %r12,__LC_SAVE_AREA+96 # argh |
850 | SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1 | 886 | SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
851 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA | 887 | CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA |
852 | lg %r12,__LC_SAVE_AREA+96 # argh | 888 | lg %r12,__LC_SAVE_AREA+96 # argh |
853 | stg %r15,24(%r12) | 889 | stg %r15,24(%r12) |
@@ -957,7 +993,6 @@ cleanup_io_leave_insn: | |||
957 | .quad __critical_end | 993 | .quad __critical_end |
958 | 994 | ||
959 | #define SYSCALL(esa,esame,emu) .long esame | 995 | #define SYSCALL(esa,esame,emu) .long esame |
960 | .globl sys_call_table | ||
961 | sys_call_table: | 996 | sys_call_table: |
962 | #include "syscalls.S" | 997 | #include "syscalls.S" |
963 | #undef SYSCALL | 998 | #undef SYSCALL |
@@ -965,7 +1000,6 @@ sys_call_table: | |||
965 | #ifdef CONFIG_COMPAT | 1000 | #ifdef CONFIG_COMPAT |
966 | 1001 | ||
967 | #define SYSCALL(esa,esame,emu) .long emu | 1002 | #define SYSCALL(esa,esame,emu) .long emu |
968 | .globl sys_call_table_emu | ||
969 | sys_call_table_emu: | 1003 | sys_call_table_emu: |
970 | #include "syscalls.S" | 1004 | #include "syscalls.S" |
971 | #undef SYSCALL | 1005 | #undef SYSCALL |
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S index ea88d066bf04..538c82da49b1 100644 --- a/arch/s390/kernel/head.S +++ b/arch/s390/kernel/head.S | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * arch/s390/kernel/head.S | 2 | * arch/s390/kernel/head.S |
3 | * | 3 | * |
4 | * (C) Copyright IBM Corp. 1999, 2005 | 4 | * Copyright (C) IBM Corp. 1999,2006 |
5 | * | 5 | * |
6 | * Author(s): Hartmut Penner <hp@de.ibm.com> | 6 | * Author(s): Hartmut Penner <hp@de.ibm.com> |
7 | * Martin Schwidefsky <schwidefsky@de.ibm.com> | 7 | * Martin Schwidefsky <schwidefsky@de.ibm.com> |
@@ -482,24 +482,23 @@ start: | |||
482 | 482 | ||
483 | .macro GET_IPL_DEVICE | 483 | .macro GET_IPL_DEVICE |
484 | .Lget_ipl_device: | 484 | .Lget_ipl_device: |
485 | basr %r12,0 | 485 | l %r1,0xb8 # get sid |
486 | .LGID: l %r1,0xb8 # get sid | ||
487 | sll %r1,15 # test if subchannel is enabled | 486 | sll %r1,15 # test if subchannel is enabled |
488 | srl %r1,31 | 487 | srl %r1,31 |
489 | ltr %r1,%r1 | 488 | ltr %r1,%r1 |
490 | bz 0(%r14) # subchannel disabled | 489 | bz 2f-.LPG1(%r13) # subchannel disabled |
491 | l %r1,0xb8 | 490 | l %r1,0xb8 |
492 | la %r5,.Lipl_schib-.LGID(%r12) | 491 | la %r5,.Lipl_schib-.LPG1(%r13) |
493 | stsch 0(%r5) # get schib of subchannel | 492 | stsch 0(%r5) # get schib of subchannel |
494 | bnz 0(%r14) # schib not available | 493 | bnz 2f-.LPG1(%r13) # schib not available |
495 | tm 5(%r5),0x01 # devno valid? | 494 | tm 5(%r5),0x01 # devno valid? |
496 | bno 0(%r14) | 495 | bno 2f-.LPG1(%r13) |
497 | la %r6,ipl_parameter_flags-.LGID(%r12) | 496 | la %r6,ipl_parameter_flags-.LPG1(%r13) |
498 | oi 3(%r6),0x01 # set flag | 497 | oi 3(%r6),0x01 # set flag |
499 | la %r2,ipl_devno-.LGID(%r12) | 498 | la %r2,ipl_devno-.LPG1(%r13) |
500 | mvc 0(2,%r2),6(%r5) # store devno | 499 | mvc 0(2,%r2),6(%r5) # store devno |
501 | tm 4(%r5),0x80 # qdio capable device? | 500 | tm 4(%r5),0x80 # qdio capable device? |
502 | bno 0(%r14) | 501 | bno 2f-.LPG1(%r13) |
503 | oi 3(%r6),0x02 # set flag | 502 | oi 3(%r6),0x02 # set flag |
504 | 503 | ||
505 | # copy ipl parameters | 504 | # copy ipl parameters |
@@ -523,7 +522,7 @@ start: | |||
523 | ar %r2,%r1 | 522 | ar %r2,%r1 |
524 | sr %r0,%r4 | 523 | sr %r0,%r4 |
525 | jne 1b | 524 | jne 1b |
526 | b 0(%r14) | 525 | b 2f-.LPG1(%r13) |
527 | 526 | ||
528 | .align 4 | 527 | .align 4 |
529 | .Lipl_schib: | 528 | .Lipl_schib: |
@@ -537,6 +536,7 @@ ipl_parameter_flags: | |||
537 | .globl ipl_devno | 536 | .globl ipl_devno |
538 | ipl_devno: | 537 | ipl_devno: |
539 | .word 0 | 538 | .word 0 |
539 | 2: | ||
540 | .endm | 540 | .endm |
541 | 541 | ||
542 | #ifdef CONFIG_64BIT | 542 | #ifdef CONFIG_64BIT |
diff --git a/arch/s390/kernel/head31.S b/arch/s390/kernel/head31.S index 2d3b089bfb83..d00de17b3778 100644 --- a/arch/s390/kernel/head31.S +++ b/arch/s390/kernel/head31.S | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * arch/s390/kernel/head31.S | 2 | * arch/s390/kernel/head31.S |
3 | * | 3 | * |
4 | * (C) Copyright IBM Corp. 2005 | 4 | * Copyright (C) IBM Corp. 2005,2006 |
5 | * | 5 | * |
6 | * Author(s): Hartmut Penner <hp@de.ibm.com> | 6 | * Author(s): Hartmut Penner <hp@de.ibm.com> |
7 | * Martin Schwidefsky <schwidefsky@de.ibm.com> | 7 | * Martin Schwidefsky <schwidefsky@de.ibm.com> |
@@ -16,12 +16,31 @@ | |||
16 | # or linload or SALIPL | 16 | # or linload or SALIPL |
17 | # | 17 | # |
18 | .org 0x10000 | 18 | .org 0x10000 |
19 | startup:basr %r13,0 # get base | 19 | startup:basr %r13,0 # get base |
20 | .LPG1: l %r1, .Lget_ipl_device_addr-.LPG1(%r13) | 20 | .LPG0: l %r13,0f-.LPG0(%r13) |
21 | basr %r14, %r1 | 21 | b 0(%r13) |
22 | 0: .long startup_continue | ||
23 | |||
24 | # | ||
25 | # params at 10400 (setup.h) | ||
26 | # | ||
27 | .org PARMAREA | ||
28 | .long 0,0 # IPL_DEVICE | ||
29 | .long 0,RAMDISK_ORIGIN # INITRD_START | ||
30 | .long 0,RAMDISK_SIZE # INITRD_SIZE | ||
31 | |||
32 | .org COMMAND_LINE | ||
33 | .byte "root=/dev/ram0 ro" | ||
34 | .byte 0 | ||
35 | |||
36 | .org 0x11000 | ||
37 | |||
38 | startup_continue: | ||
39 | basr %r13,0 # get base | ||
40 | .LPG1: GET_IPL_DEVICE | ||
22 | lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers | 41 | lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers |
23 | la %r12,_pstart-.LPG1(%r13) # pointer to parameter area | 42 | l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area |
24 | # move IPL device to lowcore | 43 | # move IPL device to lowcore |
25 | mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12) | 44 | mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12) |
26 | 45 | ||
27 | # | 46 | # |
@@ -51,8 +70,8 @@ startup:basr %r13,0 # get base | |||
51 | a %r1,__LC_EXT_NEW_PSW+4 # set handler | 70 | a %r1,__LC_EXT_NEW_PSW+4 # set handler |
52 | st %r1,__LC_EXT_NEW_PSW+4 | 71 | st %r1,__LC_EXT_NEW_PSW+4 |
53 | 72 | ||
54 | la %r4,_pstart-.LPG1(%r13) # %r4 is our index for sccb stuff | 73 | l %r4,.Lsccbaddr-.LPG1(%r13) # %r4 is our index for sccb stuff |
55 | la %r1, .Lsccb-PARMAREA(%r4) # our sccb | 74 | lr %r1,%r4 # our sccb |
56 | .insn rre,0xb2200000,%r2,%r1 # service call | 75 | .insn rre,0xb2200000,%r2,%r1 # service call |
57 | ipm %r1 | 76 | ipm %r1 |
58 | srl %r1,28 # get cc code | 77 | srl %r1,28 # get cc code |
@@ -63,7 +82,7 @@ startup:basr %r13,0 # get base | |||
63 | be .Lservicecall-.LPG1(%r13) | 82 | be .Lservicecall-.LPG1(%r13) |
64 | lpsw .Lwaitsclp-.LPG1(%r13) | 83 | lpsw .Lwaitsclp-.LPG1(%r13) |
65 | .Lsclph: | 84 | .Lsclph: |
66 | lh %r1,.Lsccbr-PARMAREA(%r4) | 85 | lh %r1,.Lsccbr-.Lsccb(%r4) |
67 | chi %r1,0x10 # 0x0010 is the sucess code | 86 | chi %r1,0x10 # 0x0010 is the sucess code |
68 | je .Lprocsccb # let's process the sccb | 87 | je .Lprocsccb # let's process the sccb |
69 | chi %r1,0x1f0 | 88 | chi %r1,0x1f0 |
@@ -74,7 +93,7 @@ startup:basr %r13,0 # get base | |||
74 | b .Lservicecall-.LPG1(%r13) | 93 | b .Lservicecall-.LPG1(%r13) |
75 | .Lprocsccb: | 94 | .Lprocsccb: |
76 | lhi %r1,0 | 95 | lhi %r1,0 |
77 | icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0 | 96 | icm %r1,3,.Lscpincr1-.Lsccb(%r4) # use this one if != 0 |
78 | jnz .Lscnd | 97 | jnz .Lscnd |
79 | lhi %r1,0x800 # otherwise report 2GB | 98 | lhi %r1,0x800 # otherwise report 2GB |
80 | .Lscnd: | 99 | .Lscnd: |
@@ -84,10 +103,10 @@ startup:basr %r13,0 # get base | |||
84 | lr %r1,%r3 | 103 | lr %r1,%r3 |
85 | .Lno2gb: | 104 | .Lno2gb: |
86 | xr %r3,%r3 # same logic | 105 | xr %r3,%r3 # same logic |
87 | ic %r3,.Lscpa1-PARMAREA(%r4) | 106 | ic %r3,.Lscpa1-.Lsccb(%r4) |
88 | chi %r3,0x00 | 107 | chi %r3,0x00 |
89 | jne .Lcompmem | 108 | jne .Lcompmem |
90 | l %r3,.Lscpa2-PARMAREA(%r13) | 109 | l %r3,.Lscpa2-.Lsccb(%r4) |
91 | .Lcompmem: | 110 | .Lcompmem: |
92 | mr %r2,%r1 # mem in MB on 128-bit | 111 | mr %r2,%r1 # mem in MB on 128-bit |
93 | l %r1,.Lonemb-.LPG1(%r13) | 112 | l %r1,.Lonemb-.LPG1(%r13) |
@@ -95,8 +114,6 @@ startup:basr %r13,0 # get base | |||
95 | b .Lfchunk-.LPG1(%r13) | 114 | b .Lfchunk-.LPG1(%r13) |
96 | 115 | ||
97 | .align 4 | 116 | .align 4 |
98 | .Lget_ipl_device_addr: | ||
99 | .long .Lget_ipl_device | ||
100 | .Lpmask: | 117 | .Lpmask: |
101 | .byte 0 | 118 | .byte 0 |
102 | .align 8 | 119 | .align 8 |
@@ -242,6 +259,8 @@ startup:basr %r13,0 # get base | |||
242 | .long 0 # cr13: home space segment table | 259 | .long 0 # cr13: home space segment table |
243 | .long 0xc0000000 # cr14: machine check handling off | 260 | .long 0xc0000000 # cr14: machine check handling off |
244 | .long 0 # cr15: linkage stack operations | 261 | .long 0 # cr15: linkage stack operations |
262 | .Lduct: .long 0,0,0,0,0,0,0,0 | ||
263 | .long 0,0,0,0,0,0,0,0 | ||
245 | .Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem | 264 | .Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem |
246 | .Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu | 265 | .Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu |
247 | .Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp | 266 | .Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp |
@@ -252,25 +271,9 @@ startup:basr %r13,0 # get base | |||
252 | .Lmflags:.long machine_flags | 271 | .Lmflags:.long machine_flags |
253 | .Lbss_bgn: .long __bss_start | 272 | .Lbss_bgn: .long __bss_start |
254 | .Lbss_end: .long _end | 273 | .Lbss_end: .long _end |
255 | 274 | .Lparmaddr: .long PARMAREA | |
256 | .org PARMAREA-64 | 275 | .Lsccbaddr: .long .Lsccb |
257 | .Lduct: .long 0,0,0,0,0,0,0,0 | 276 | .align 4096 |
258 | .long 0,0,0,0,0,0,0,0 | ||
259 | |||
260 | # | ||
261 | # params at 10400 (setup.h) | ||
262 | # | ||
263 | .org PARMAREA | ||
264 | .global _pstart | ||
265 | _pstart: | ||
266 | .long 0,0 # IPL_DEVICE | ||
267 | .long 0,RAMDISK_ORIGIN # INITRD_START | ||
268 | .long 0,RAMDISK_SIZE # INITRD_SIZE | ||
269 | |||
270 | .org COMMAND_LINE | ||
271 | .byte "root=/dev/ram0 ro" | ||
272 | .byte 0 | ||
273 | .org 0x11000 | ||
274 | .Lsccb: | 277 | .Lsccb: |
275 | .hword 0x1000 # length, one page | 278 | .hword 0x1000 # length, one page |
276 | .byte 0x00,0x00,0x00 | 279 | .byte 0x00,0x00,0x00 |
@@ -287,18 +290,14 @@ _pstart: | |||
287 | .Lscpincr2: | 290 | .Lscpincr2: |
288 | .quad 0x00 | 291 | .quad 0x00 |
289 | .fill 3984,1,0 | 292 | .fill 3984,1,0 |
290 | .org 0x12000 | 293 | .align 4096 |
291 | .global _pend | ||
292 | _pend: | ||
293 | |||
294 | GET_IPL_DEVICE | ||
295 | 294 | ||
296 | #ifdef CONFIG_SHARED_KERNEL | 295 | #ifdef CONFIG_SHARED_KERNEL |
297 | .org 0x100000 | 296 | .org 0x100000 |
298 | #endif | 297 | #endif |
299 | 298 | ||
300 | # | 299 | # |
301 | # startup-code, running in virtual mode | 300 | # startup-code, running in absolute addressing mode |
302 | # | 301 | # |
303 | .globl _stext | 302 | .globl _stext |
304 | _stext: basr %r13,0 # get base | 303 | _stext: basr %r13,0 # get base |
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S index f08c06f45d5c..47744fcca930 100644 --- a/arch/s390/kernel/head64.S +++ b/arch/s390/kernel/head64.S | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * arch/s390/kernel/head64.S | 2 | * arch/s390/kernel/head64.S |
3 | * | 3 | * |
4 | * (C) Copyright IBM Corp. 1999,2005 | 4 | * Copyright (C) IBM Corp. 1999,2006 |
5 | * | 5 | * |
6 | * Author(s): Hartmut Penner <hp@de.ibm.com> | 6 | * Author(s): Hartmut Penner <hp@de.ibm.com> |
7 | * Martin Schwidefsky <schwidefsky@de.ibm.com> | 7 | * Martin Schwidefsky <schwidefsky@de.ibm.com> |
@@ -15,18 +15,37 @@ | |||
15 | # this is called either by the ipl loader or directly by PSW restart | 15 | # this is called either by the ipl loader or directly by PSW restart |
16 | # or linload or SALIPL | 16 | # or linload or SALIPL |
17 | # | 17 | # |
18 | .org 0x10000 | 18 | .org 0x10000 |
19 | startup:basr %r13,0 # get base | 19 | startup:basr %r13,0 # get base |
20 | .LPG0: l %r13,0f-.LPG0(%r13) | ||
21 | b 0(%r13) | ||
22 | 0: .long startup_continue | ||
23 | |||
24 | # | ||
25 | # params at 10400 (setup.h) | ||
26 | # | ||
27 | .org PARMAREA | ||
28 | .quad 0 # IPL_DEVICE | ||
29 | .quad RAMDISK_ORIGIN # INITRD_START | ||
30 | .quad RAMDISK_SIZE # INITRD_SIZE | ||
31 | |||
32 | .org COMMAND_LINE | ||
33 | .byte "root=/dev/ram0 ro" | ||
34 | .byte 0 | ||
35 | |||
36 | .org 0x11000 | ||
37 | |||
38 | startup_continue: | ||
39 | basr %r13,0 # get base | ||
20 | .LPG1: sll %r13,1 # remove high order bit | 40 | .LPG1: sll %r13,1 # remove high order bit |
21 | srl %r13,1 | 41 | srl %r13,1 |
22 | l %r1,.Lget_ipl_device_addr-.LPG1(%r13) | 42 | GET_IPL_DEVICE |
23 | basr %r14,%r1 | ||
24 | lhi %r1,1 # mode 1 = esame | 43 | lhi %r1,1 # mode 1 = esame |
25 | slr %r0,%r0 # set cpuid to zero | 44 | slr %r0,%r0 # set cpuid to zero |
26 | sigp %r1,%r0,0x12 # switch to esame mode | 45 | sigp %r1,%r0,0x12 # switch to esame mode |
27 | sam64 # switch to 64 bit mode | 46 | sam64 # switch to 64 bit mode |
28 | lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers | 47 | lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers |
29 | larl %r12,_pstart # pointer to parameter area | 48 | lg %r12,.Lparmaddr-.LPG1(%r13)# pointer to parameter area |
30 | # move IPL device to lowcore | 49 | # move IPL device to lowcore |
31 | mvc __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12) | 50 | mvc __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12) |
32 | 51 | ||
@@ -55,8 +74,8 @@ startup:basr %r13,0 # get base | |||
55 | larl %r1,.Lsclph | 74 | larl %r1,.Lsclph |
56 | stg %r1,__LC_EXT_NEW_PSW+8 # set handler | 75 | stg %r1,__LC_EXT_NEW_PSW+8 # set handler |
57 | 76 | ||
58 | larl %r4,_pstart # %r4 is our index for sccb stuff | 77 | larl %r4,.Lsccb # %r4 is our index for sccb stuff |
59 | la %r1,.Lsccb-PARMAREA(%r4) # our sccb | 78 | lgr %r1,%r4 # our sccb |
60 | .insn rre,0xb2200000,%r2,%r1 # service call | 79 | .insn rre,0xb2200000,%r2,%r1 # service call |
61 | ipm %r1 | 80 | ipm %r1 |
62 | srl %r1,28 # get cc code | 81 | srl %r1,28 # get cc code |
@@ -67,7 +86,7 @@ startup:basr %r13,0 # get base | |||
67 | be .Lservicecall-.LPG1(%r13) | 86 | be .Lservicecall-.LPG1(%r13) |
68 | lpswe .Lwaitsclp-.LPG1(%r13) | 87 | lpswe .Lwaitsclp-.LPG1(%r13) |
69 | .Lsclph: | 88 | .Lsclph: |
70 | lh %r1,.Lsccbr-PARMAREA(%r4) | 89 | lh %r1,.Lsccbr-.Lsccb(%r4) |
71 | chi %r1,0x10 # 0x0010 is the sucess code | 90 | chi %r1,0x10 # 0x0010 is the sucess code |
72 | je .Lprocsccb # let's process the sccb | 91 | je .Lprocsccb # let's process the sccb |
73 | chi %r1,0x1f0 | 92 | chi %r1,0x1f0 |
@@ -78,15 +97,15 @@ startup:basr %r13,0 # get base | |||
78 | b .Lservicecall-.LPG1(%r13) | 97 | b .Lservicecall-.LPG1(%r13) |
79 | .Lprocsccb: | 98 | .Lprocsccb: |
80 | lghi %r1,0 | 99 | lghi %r1,0 |
81 | icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0 | 100 | icm %r1,3,.Lscpincr1-.Lsccb(%r4) # use this one if != 0 |
82 | jnz .Lscnd | 101 | jnz .Lscnd |
83 | lg %r1,.Lscpincr2-PARMAREA(%r4) # otherwise use this one | 102 | lg %r1,.Lscpincr2-.Lsccb(%r4) # otherwise use this one |
84 | .Lscnd: | 103 | .Lscnd: |
85 | xr %r3,%r3 # same logic | 104 | xr %r3,%r3 # same logic |
86 | ic %r3,.Lscpa1-PARMAREA(%r4) | 105 | ic %r3,.Lscpa1-.Lsccb(%r4) |
87 | chi %r3,0x00 | 106 | chi %r3,0x00 |
88 | jne .Lcompmem | 107 | jne .Lcompmem |
89 | l %r3,.Lscpa2-PARMAREA(%r13) | 108 | l %r3,.Lscpa2-.Lsccb(%r4) |
90 | .Lcompmem: | 109 | .Lcompmem: |
91 | mlgr %r2,%r1 # mem in MB on 128-bit | 110 | mlgr %r2,%r1 # mem in MB on 128-bit |
92 | l %r1,.Lonemb-.LPG1(%r13) | 111 | l %r1,.Lonemb-.LPG1(%r13) |
@@ -94,8 +113,6 @@ startup:basr %r13,0 # get base | |||
94 | b .Lfchunk-.LPG1(%r13) | 113 | b .Lfchunk-.LPG1(%r13) |
95 | 114 | ||
96 | .align 4 | 115 | .align 4 |
97 | .Lget_ipl_device_addr: | ||
98 | .long .Lget_ipl_device | ||
99 | .Lpmask: | 116 | .Lpmask: |
100 | .byte 0 | 117 | .byte 0 |
101 | .align 8 | 118 | .align 8 |
@@ -242,29 +259,16 @@ startup:basr %r13,0 # get base | |||
242 | .quad 0 # cr13: home space segment table | 259 | .quad 0 # cr13: home space segment table |
243 | .quad 0xc0000000 # cr14: machine check handling off | 260 | .quad 0xc0000000 # cr14: machine check handling off |
244 | .quad 0 # cr15: linkage stack operations | 261 | .quad 0 # cr15: linkage stack operations |
262 | .Lduct: .long 0,0,0,0,0,0,0,0 | ||
263 | .long 0,0,0,0,0,0,0,0 | ||
245 | .Lpcmsk:.quad 0x0000000180000000 | 264 | .Lpcmsk:.quad 0x0000000180000000 |
246 | .L4malign:.quad 0xffffffffffc00000 | 265 | .L4malign:.quad 0xffffffffffc00000 |
247 | .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 | 266 | .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 |
248 | .Lnop: .long 0x07000700 | 267 | .Lnop: .long 0x07000700 |
268 | .Lparmaddr: | ||
269 | .quad PARMAREA | ||
249 | 270 | ||
250 | .org PARMAREA-64 | 271 | .align 4096 |
251 | .Lduct: .long 0,0,0,0,0,0,0,0 | ||
252 | .long 0,0,0,0,0,0,0,0 | ||
253 | |||
254 | # | ||
255 | # params at 10400 (setup.h) | ||
256 | # | ||
257 | .org PARMAREA | ||
258 | .global _pstart | ||
259 | _pstart: | ||
260 | .quad 0 # IPL_DEVICE | ||
261 | .quad RAMDISK_ORIGIN # INITRD_START | ||
262 | .quad RAMDISK_SIZE # INITRD_SIZE | ||
263 | |||
264 | .org COMMAND_LINE | ||
265 | .byte "root=/dev/ram0 ro" | ||
266 | .byte 0 | ||
267 | .org 0x11000 | ||
268 | .Lsccb: | 272 | .Lsccb: |
269 | .hword 0x1000 # length, one page | 273 | .hword 0x1000 # length, one page |
270 | .byte 0x00,0x00,0x00 | 274 | .byte 0x00,0x00,0x00 |
@@ -281,18 +285,14 @@ _pstart: | |||
281 | .Lscpincr2: | 285 | .Lscpincr2: |
282 | .quad 0x00 | 286 | .quad 0x00 |
283 | .fill 3984,1,0 | 287 | .fill 3984,1,0 |
284 | .org 0x12000 | 288 | .align 4096 |
285 | .global _pend | ||
286 | _pend: | ||
287 | |||
288 | GET_IPL_DEVICE | ||
289 | 289 | ||
290 | #ifdef CONFIG_SHARED_KERNEL | 290 | #ifdef CONFIG_SHARED_KERNEL |
291 | .org 0x100000 | 291 | .org 0x100000 |
292 | #endif | 292 | #endif |
293 | 293 | ||
294 | # | 294 | # |
295 | # startup-code, running in virtual mode | 295 | # startup-code, running in absolute addressing mode |
296 | # | 296 | # |
297 | .globl _stext | 297 | .globl _stext |
298 | _stext: basr %r13,0 # get base | 298 | _stext: basr %r13,0 # get base |
@@ -326,4 +326,3 @@ _stext: basr %r13,0 # get base | |||
326 | .align 8 | 326 | .align 8 |
327 | .Ldw: .quad 0x0002000180000000,0x0000000000000000 | 327 | .Ldw: .quad 0x0002000180000000,0x0000000000000000 |
328 | .Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 | 328 | .Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 |
329 | |||
diff --git a/arch/s390/kernel/s390_ksyms.c b/arch/s390/kernel/s390_ksyms.c index 4176c77670c4..0886e739d122 100644 --- a/arch/s390/kernel/s390_ksyms.c +++ b/arch/s390/kernel/s390_ksyms.c | |||
@@ -46,8 +46,6 @@ EXPORT_SYMBOL(__down_interruptible); | |||
46 | */ | 46 | */ |
47 | extern int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs); | 47 | extern int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs); |
48 | EXPORT_SYMBOL(dump_fpu); | 48 | EXPORT_SYMBOL(dump_fpu); |
49 | EXPORT_SYMBOL(overflowuid); | ||
50 | EXPORT_SYMBOL(overflowgid); | ||
51 | EXPORT_SYMBOL(empty_zero_page); | 49 | EXPORT_SYMBOL(empty_zero_page); |
52 | 50 | ||
53 | /* | 51 | /* |
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index b282034452a4..2b2551e3510b 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include <linux/seq_file.h> | 37 | #include <linux/seq_file.h> |
38 | #include <linux/kernel_stat.h> | 38 | #include <linux/kernel_stat.h> |
39 | #include <linux/device.h> | 39 | #include <linux/device.h> |
40 | #include <linux/notifier.h> | ||
40 | 41 | ||
41 | #include <asm/uaccess.h> | 42 | #include <asm/uaccess.h> |
42 | #include <asm/system.h> | 43 | #include <asm/system.h> |
@@ -115,6 +116,7 @@ void __devinit cpu_init (void) | |||
115 | */ | 116 | */ |
116 | char vmhalt_cmd[128] = ""; | 117 | char vmhalt_cmd[128] = ""; |
117 | char vmpoff_cmd[128] = ""; | 118 | char vmpoff_cmd[128] = ""; |
119 | char vmpanic_cmd[128] = ""; | ||
118 | 120 | ||
119 | static inline void strncpy_skip_quote(char *dst, char *src, int n) | 121 | static inline void strncpy_skip_quote(char *dst, char *src, int n) |
120 | { | 122 | { |
@@ -146,6 +148,38 @@ static int __init vmpoff_setup(char *str) | |||
146 | 148 | ||
147 | __setup("vmpoff=", vmpoff_setup); | 149 | __setup("vmpoff=", vmpoff_setup); |
148 | 150 | ||
151 | static int vmpanic_notify(struct notifier_block *self, unsigned long event, | ||
152 | void *data) | ||
153 | { | ||
154 | if (MACHINE_IS_VM && strlen(vmpanic_cmd) > 0) | ||
155 | cpcmd(vmpanic_cmd, NULL, 0, NULL); | ||
156 | |||
157 | return NOTIFY_OK; | ||
158 | } | ||
159 | |||
160 | #define PANIC_PRI_VMPANIC 0 | ||
161 | |||
162 | static struct notifier_block vmpanic_nb = { | ||
163 | .notifier_call = vmpanic_notify, | ||
164 | .priority = PANIC_PRI_VMPANIC | ||
165 | }; | ||
166 | |||
167 | static int __init vmpanic_setup(char *str) | ||
168 | { | ||
169 | static int register_done __initdata = 0; | ||
170 | |||
171 | strncpy_skip_quote(vmpanic_cmd, str, 127); | ||
172 | vmpanic_cmd[127] = 0; | ||
173 | if (!register_done) { | ||
174 | register_done = 1; | ||
175 | atomic_notifier_chain_register(&panic_notifier_list, | ||
176 | &vmpanic_nb); | ||
177 | } | ||
178 | return 1; | ||
179 | } | ||
180 | |||
181 | __setup("vmpanic=", vmpanic_setup); | ||
182 | |||
149 | /* | 183 | /* |
150 | * condev= and conmode= setup parameter. | 184 | * condev= and conmode= setup parameter. |
151 | */ | 185 | */ |
@@ -289,19 +323,34 @@ void (*_machine_power_off)(void) = do_machine_power_off_nonsmp; | |||
289 | 323 | ||
290 | void machine_restart(char *command) | 324 | void machine_restart(char *command) |
291 | { | 325 | { |
292 | console_unblank(); | 326 | if (!in_interrupt() || oops_in_progress) |
327 | /* | ||
328 | * Only unblank the console if we are called in enabled | ||
329 | * context or a bust_spinlocks cleared the way for us. | ||
330 | */ | ||
331 | console_unblank(); | ||
293 | _machine_restart(command); | 332 | _machine_restart(command); |
294 | } | 333 | } |
295 | 334 | ||
296 | void machine_halt(void) | 335 | void machine_halt(void) |
297 | { | 336 | { |
298 | console_unblank(); | 337 | if (!in_interrupt() || oops_in_progress) |
338 | /* | ||
339 | * Only unblank the console if we are called in enabled | ||
340 | * context or a bust_spinlocks cleared the way for us. | ||
341 | */ | ||
342 | console_unblank(); | ||
299 | _machine_halt(); | 343 | _machine_halt(); |
300 | } | 344 | } |
301 | 345 | ||
302 | void machine_power_off(void) | 346 | void machine_power_off(void) |
303 | { | 347 | { |
304 | console_unblank(); | 348 | if (!in_interrupt() || oops_in_progress) |
349 | /* | ||
350 | * Only unblank the console if we are called in enabled | ||
351 | * context or a bust_spinlocks cleared the way for us. | ||
352 | */ | ||
353 | console_unblank(); | ||
305 | _machine_power_off(); | 354 | _machine_power_off(); |
306 | } | 355 | } |
307 | 356 | ||
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c index 343120c9223d..8e03219eea76 100644 --- a/arch/s390/kernel/smp.c +++ b/arch/s390/kernel/smp.c | |||
@@ -869,7 +869,7 @@ static int __init topology_init(void) | |||
869 | int ret; | 869 | int ret; |
870 | 870 | ||
871 | for_each_possible_cpu(cpu) { | 871 | for_each_possible_cpu(cpu) { |
872 | ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL); | 872 | ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu); |
873 | if (ret) | 873 | if (ret) |
874 | printk(KERN_WARNING "topology_init: register_cpu %d " | 874 | printk(KERN_WARNING "topology_init: register_cpu %d " |
875 | "failed (%d)\n", cpu, ret); | 875 | "failed (%d)\n", cpu, ret); |
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c index a46793beeddd..b7630436f693 100644 --- a/arch/s390/kernel/traps.c +++ b/arch/s390/kernel/traps.c | |||
@@ -150,13 +150,11 @@ void show_stack(struct task_struct *task, unsigned long *sp) | |||
150 | unsigned long *stack; | 150 | unsigned long *stack; |
151 | int i; | 151 | int i; |
152 | 152 | ||
153 | // debugging aid: "show_stack(NULL);" prints the | ||
154 | // back trace for this cpu. | ||
155 | |||
156 | if (!sp) | 153 | if (!sp) |
157 | sp = task ? (unsigned long *) task->thread.ksp : __r15; | 154 | stack = task ? (unsigned long *) task->thread.ksp : __r15; |
155 | else | ||
156 | stack = sp; | ||
158 | 157 | ||
159 | stack = sp; | ||
160 | for (i = 0; i < kstack_depth_to_print; i++) { | 158 | for (i = 0; i < kstack_depth_to_print; i++) { |
161 | if (((addr_t) stack & (THREAD_SIZE-1)) == 0) | 159 | if (((addr_t) stack & (THREAD_SIZE-1)) == 0) |
162 | break; | 160 | break; |
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 2bcecf422573..1a0db1d4c952 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
@@ -465,10 +465,10 @@ config KEXEC | |||
465 | help | 465 | help |
466 | kexec is a system call that implements the ability to shutdown your | 466 | kexec is a system call that implements the ability to shutdown your |
467 | current kernel, and to start another kernel. It is like a reboot | 467 | current kernel, and to start another kernel. It is like a reboot |
468 | but it is indepedent of the system firmware. And like a reboot | 468 | but it is independent of the system firmware. And like a reboot |
469 | you can start any kernel with it, not just Linux. | 469 | you can start any kernel with it, not just Linux. |
470 | 470 | ||
471 | The name comes from the similiarity to the exec system call. | 471 | The name comes from the similarity to the exec system call. |
472 | 472 | ||
473 | It is an ongoing process to be certain the hardware in a machine | 473 | It is an ongoing process to be certain the hardware in a machine |
474 | is properly shutdown, so do not be surprised if this code does not | 474 | is properly shutdown, so do not be surprised if this code does not |
diff --git a/arch/sh/boards/adx/irq_maskreg.c b/arch/sh/boards/adx/irq_maskreg.c index c0973f8d57ba..357fab1bac2b 100644 --- a/arch/sh/boards/adx/irq_maskreg.c +++ b/arch/sh/boards/adx/irq_maskreg.c | |||
@@ -102,6 +102,6 @@ static void end_maskreg_irq(unsigned int irq) | |||
102 | void make_maskreg_irq(unsigned int irq) | 102 | void make_maskreg_irq(unsigned int irq) |
103 | { | 103 | { |
104 | disable_irq_nosync(irq); | 104 | disable_irq_nosync(irq); |
105 | irq_desc[irq].handler = &maskreg_irq_type; | 105 | irq_desc[irq].chip = &maskreg_irq_type; |
106 | disable_maskreg_irq(irq); | 106 | disable_maskreg_irq(irq); |
107 | } | 107 | } |
diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c index 6ddbcc77244d..1d32425782c0 100644 --- a/arch/sh/boards/bigsur/irq.c +++ b/arch/sh/boards/bigsur/irq.c | |||
@@ -253,7 +253,7 @@ static void make_bigsur_l1isr(unsigned int irq) { | |||
253 | /* sanity check first */ | 253 | /* sanity check first */ |
254 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { | 254 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { |
255 | /* save the handler in the main description table */ | 255 | /* save the handler in the main description table */ |
256 | irq_desc[irq].handler = &bigsur_l1irq_type; | 256 | irq_desc[irq].chip = &bigsur_l1irq_type; |
257 | irq_desc[irq].status = IRQ_DISABLED; | 257 | irq_desc[irq].status = IRQ_DISABLED; |
258 | irq_desc[irq].action = 0; | 258 | irq_desc[irq].action = 0; |
259 | irq_desc[irq].depth = 1; | 259 | irq_desc[irq].depth = 1; |
@@ -270,7 +270,7 @@ static void make_bigsur_l2isr(unsigned int irq) { | |||
270 | /* sanity check first */ | 270 | /* sanity check first */ |
271 | if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { | 271 | if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { |
272 | /* save the handler in the main description table */ | 272 | /* save the handler in the main description table */ |
273 | irq_desc[irq].handler = &bigsur_l2irq_type; | 273 | irq_desc[irq].chip = &bigsur_l2irq_type; |
274 | irq_desc[irq].status = IRQ_DISABLED; | 274 | irq_desc[irq].status = IRQ_DISABLED; |
275 | irq_desc[irq].action = 0; | 275 | irq_desc[irq].action = 0; |
276 | irq_desc[irq].depth = 1; | 276 | irq_desc[irq].depth = 1; |
diff --git a/arch/sh/boards/cqreek/irq.c b/arch/sh/boards/cqreek/irq.c index d1da0d844567..2955adc52310 100644 --- a/arch/sh/boards/cqreek/irq.c +++ b/arch/sh/boards/cqreek/irq.c | |||
@@ -103,7 +103,7 @@ void __init init_cqreek_IRQ(void) | |||
103 | cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT; | 103 | cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT; |
104 | cqreek_irq_data[14].bit = 1; | 104 | cqreek_irq_data[14].bit = 1; |
105 | 105 | ||
106 | irq_desc[14].handler = &cqreek_irq_type; | 106 | irq_desc[14].chip = &cqreek_irq_type; |
107 | irq_desc[14].status = IRQ_DISABLED; | 107 | irq_desc[14].status = IRQ_DISABLED; |
108 | irq_desc[14].action = 0; | 108 | irq_desc[14].action = 0; |
109 | irq_desc[14].depth = 1; | 109 | irq_desc[14].depth = 1; |
@@ -117,7 +117,7 @@ void __init init_cqreek_IRQ(void) | |||
117 | cqreek_irq_data[10].bit = (1 << 10); | 117 | cqreek_irq_data[10].bit = (1 << 10); |
118 | 118 | ||
119 | /* XXX: Err... we may need demultiplexer for ISA irq... */ | 119 | /* XXX: Err... we may need demultiplexer for ISA irq... */ |
120 | irq_desc[10].handler = &cqreek_irq_type; | 120 | irq_desc[10].chip = &cqreek_irq_type; |
121 | irq_desc[10].status = IRQ_DISABLED; | 121 | irq_desc[10].status = IRQ_DISABLED; |
122 | irq_desc[10].action = 0; | 122 | irq_desc[10].action = 0; |
123 | irq_desc[10].depth = 1; | 123 | irq_desc[10].depth = 1; |
diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c index 55dece35cde5..0027b80a2343 100644 --- a/arch/sh/boards/dreamcast/setup.c +++ b/arch/sh/boards/dreamcast/setup.c | |||
@@ -70,7 +70,7 @@ int __init platform_setup(void) | |||
70 | 70 | ||
71 | /* Assign all virtual IRQs to the System ASIC int. handler */ | 71 | /* Assign all virtual IRQs to the System ASIC int. handler */ |
72 | for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) | 72 | for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) |
73 | irq_desc[i].handler = &systemasic_int; | 73 | irq_desc[i].chip = &systemasic_int; |
74 | 74 | ||
75 | board_time_init = aica_time_init; | 75 | board_time_init = aica_time_init; |
76 | 76 | ||
diff --git a/arch/sh/boards/ec3104/setup.c b/arch/sh/boards/ec3104/setup.c index 5130ba2b6ff1..4b3ef16a0e96 100644 --- a/arch/sh/boards/ec3104/setup.c +++ b/arch/sh/boards/ec3104/setup.c | |||
@@ -63,7 +63,7 @@ int __init platform_setup(void) | |||
63 | str[i] = ctrl_readb(EC3104_BASE + i); | 63 | str[i] = ctrl_readb(EC3104_BASE + i); |
64 | 64 | ||
65 | for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++) | 65 | for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++) |
66 | irq_desc[i].handler = &ec3104_int; | 66 | irq_desc[i].chip = &ec3104_int; |
67 | 67 | ||
68 | printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n", | 68 | printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n", |
69 | str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE); | 69 | str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE); |
diff --git a/arch/sh/boards/harp/irq.c b/arch/sh/boards/harp/irq.c index 52d0ba39031b..701fa55d5297 100644 --- a/arch/sh/boards/harp/irq.c +++ b/arch/sh/boards/harp/irq.c | |||
@@ -114,7 +114,7 @@ static void enable_harp_irq(unsigned int irq) | |||
114 | static void __init make_harp_irq(unsigned int irq) | 114 | static void __init make_harp_irq(unsigned int irq) |
115 | { | 115 | { |
116 | disable_irq_nosync(irq); | 116 | disable_irq_nosync(irq); |
117 | irq_desc[irq].handler = &harp_irq_type; | 117 | irq_desc[irq].chip = &harp_irq_type; |
118 | disable_harp_irq(irq); | 118 | disable_harp_irq(irq); |
119 | } | 119 | } |
120 | 120 | ||
diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c index ba3a65439752..9f7ccd33ffb6 100644 --- a/arch/sh/boards/mpc1211/pci.c +++ b/arch/sh/boards/mpc1211/pci.c | |||
@@ -273,9 +273,9 @@ void __init pcibios_fixup_irqs(void) | |||
273 | } | 273 | } |
274 | 274 | ||
275 | void pcibios_align_resource(void *data, struct resource *res, | 275 | void pcibios_align_resource(void *data, struct resource *res, |
276 | unsigned long size, unsigned long align) | 276 | resource_size_t size, resource_size_t align) |
277 | { | 277 | { |
278 | unsigned long start = res->start; | 278 | resource_size_t start = res->start; |
279 | 279 | ||
280 | if (res->flags & IORESOURCE_IO) { | 280 | if (res->flags & IORESOURCE_IO) { |
281 | if (start >= 0x10000UL) { | 281 | if (start >= 0x10000UL) { |
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c index 2bb581b91683..b72f009c52c2 100644 --- a/arch/sh/boards/mpc1211/setup.c +++ b/arch/sh/boards/mpc1211/setup.c | |||
@@ -194,7 +194,7 @@ static struct hw_interrupt_type mpc1211_irq_type = { | |||
194 | 194 | ||
195 | static void make_mpc1211_irq(unsigned int irq) | 195 | static void make_mpc1211_irq(unsigned int irq) |
196 | { | 196 | { |
197 | irq_desc[irq].handler = &mpc1211_irq_type; | 197 | irq_desc[irq].chip = &mpc1211_irq_type; |
198 | irq_desc[irq].status = IRQ_DISABLED; | 198 | irq_desc[irq].status = IRQ_DISABLED; |
199 | irq_desc[irq].action = 0; | 199 | irq_desc[irq].action = 0; |
200 | irq_desc[irq].depth = 1; | 200 | irq_desc[irq].depth = 1; |
diff --git a/arch/sh/boards/overdrive/galileo.c b/arch/sh/boards/overdrive/galileo.c index 276fa11ee4ce..b055809d2ac1 100644 --- a/arch/sh/boards/overdrive/galileo.c +++ b/arch/sh/boards/overdrive/galileo.c | |||
@@ -536,7 +536,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus) | |||
536 | } | 536 | } |
537 | 537 | ||
538 | void pcibios_align_resource(void *data, struct resource *res, | 538 | void pcibios_align_resource(void *data, struct resource *res, |
539 | unsigned long size) | 539 | resource_size_t size) |
540 | { | 540 | { |
541 | } | 541 | } |
542 | 542 | ||
diff --git a/arch/sh/boards/overdrive/irq.c b/arch/sh/boards/overdrive/irq.c index 715e8feb3a68..2c13a7de6b22 100644 --- a/arch/sh/boards/overdrive/irq.c +++ b/arch/sh/boards/overdrive/irq.c | |||
@@ -150,7 +150,7 @@ static void enable_od_irq(unsigned int irq) | |||
150 | static void __init make_od_irq(unsigned int irq) | 150 | static void __init make_od_irq(unsigned int irq) |
151 | { | 151 | { |
152 | disable_irq_nosync(irq); | 152 | disable_irq_nosync(irq); |
153 | irq_desc[irq].handler = &od_irq_type; | 153 | irq_desc[irq].chip = &od_irq_type; |
154 | disable_od_irq(irq); | 154 | disable_od_irq(irq); |
155 | } | 155 | } |
156 | 156 | ||
diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c index ed4c5b50ea45..52a98b524e1f 100644 --- a/arch/sh/boards/renesas/hs7751rvoip/irq.c +++ b/arch/sh/boards/renesas/hs7751rvoip/irq.c | |||
@@ -86,7 +86,7 @@ static struct hw_interrupt_type hs7751rvoip_irq_type = { | |||
86 | static void make_hs7751rvoip_irq(unsigned int irq) | 86 | static void make_hs7751rvoip_irq(unsigned int irq) |
87 | { | 87 | { |
88 | disable_irq_nosync(irq); | 88 | disable_irq_nosync(irq); |
89 | irq_desc[irq].handler = &hs7751rvoip_irq_type; | 89 | irq_desc[irq].chip = &hs7751rvoip_irq_type; |
90 | disable_hs7751rvoip_irq(irq); | 90 | disable_hs7751rvoip_irq(irq); |
91 | } | 91 | } |
92 | 92 | ||
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c index d36c9374aed1..e16915d9cda4 100644 --- a/arch/sh/boards/renesas/rts7751r2d/irq.c +++ b/arch/sh/boards/renesas/rts7751r2d/irq.c | |||
@@ -100,7 +100,7 @@ static struct hw_interrupt_type rts7751r2d_irq_type = { | |||
100 | static void make_rts7751r2d_irq(unsigned int irq) | 100 | static void make_rts7751r2d_irq(unsigned int irq) |
101 | { | 101 | { |
102 | disable_irq_nosync(irq); | 102 | disable_irq_nosync(irq); |
103 | irq_desc[irq].handler = &rts7751r2d_irq_type; | 103 | irq_desc[irq].chip = &rts7751r2d_irq_type; |
104 | disable_rts7751r2d_irq(irq); | 104 | disable_rts7751r2d_irq(irq); |
105 | } | 105 | } |
106 | 106 | ||
diff --git a/arch/sh/boards/renesas/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c index 7a2eb10edb56..845979181059 100644 --- a/arch/sh/boards/renesas/systemh/irq.c +++ b/arch/sh/boards/renesas/systemh/irq.c | |||
@@ -105,7 +105,7 @@ static void end_systemh_irq(unsigned int irq) | |||
105 | void make_systemh_irq(unsigned int irq) | 105 | void make_systemh_irq(unsigned int irq) |
106 | { | 106 | { |
107 | disable_irq_nosync(irq); | 107 | disable_irq_nosync(irq); |
108 | irq_desc[irq].handler = &systemh_irq_type; | 108 | irq_desc[irq].chip = &systemh_irq_type; |
109 | disable_systemh_irq(irq); | 109 | disable_systemh_irq(irq); |
110 | } | 110 | } |
111 | 111 | ||
diff --git a/arch/sh/boards/se/73180/irq.c b/arch/sh/boards/se/73180/irq.c index 70f04caad9a4..402735c7c898 100644 --- a/arch/sh/boards/se/73180/irq.c +++ b/arch/sh/boards/se/73180/irq.c | |||
@@ -85,7 +85,7 @@ void | |||
85 | make_intreq_irq(unsigned int irq) | 85 | make_intreq_irq(unsigned int irq) |
86 | { | 86 | { |
87 | disable_irq_nosync(irq); | 87 | disable_irq_nosync(irq); |
88 | irq_desc[irq].handler = &intreq_irq_type; | 88 | irq_desc[irq].chip = &intreq_irq_type; |
89 | disable_intreq_irq(irq); | 89 | disable_intreq_irq(irq); |
90 | } | 90 | } |
91 | 91 | ||
diff --git a/arch/sh/boards/superh/microdev/irq.c b/arch/sh/boards/superh/microdev/irq.c index efcbd86b7cd2..cb5999425d16 100644 --- a/arch/sh/boards/superh/microdev/irq.c +++ b/arch/sh/boards/superh/microdev/irq.c | |||
@@ -147,7 +147,7 @@ static void enable_microdev_irq(unsigned int irq) | |||
147 | static void __init make_microdev_irq(unsigned int irq) | 147 | static void __init make_microdev_irq(unsigned int irq) |
148 | { | 148 | { |
149 | disable_irq_nosync(irq); | 149 | disable_irq_nosync(irq); |
150 | irq_desc[irq].handler = µdev_irq_type; | 150 | irq_desc[irq].chip = µdev_irq_type; |
151 | disable_microdev_irq(irq); | 151 | disable_microdev_irq(irq); |
152 | } | 152 | } |
153 | 153 | ||
diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c index f014b9bf6922..724db04cb392 100644 --- a/arch/sh/cchips/hd6446x/hd64461/setup.c +++ b/arch/sh/cchips/hd6446x/hd64461/setup.c | |||
@@ -154,7 +154,7 @@ int __init setup_hd64461(void) | |||
154 | outw(0xffff, HD64461_NIMR); | 154 | outw(0xffff, HD64461_NIMR); |
155 | 155 | ||
156 | for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { | 156 | for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { |
157 | irq_desc[i].handler = &hd64461_irq_type; | 157 | irq_desc[i].chip = &hd64461_irq_type; |
158 | } | 158 | } |
159 | 159 | ||
160 | setup_irq(CONFIG_HD64461_IRQ, &irq0); | 160 | setup_irq(CONFIG_HD64461_IRQ, &irq0); |
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c index 68e4c4e4283d..cf9142c620b7 100644 --- a/arch/sh/cchips/hd6446x/hd64465/setup.c +++ b/arch/sh/cchips/hd6446x/hd64465/setup.c | |||
@@ -182,7 +182,7 @@ static int __init setup_hd64465(void) | |||
182 | outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */ | 182 | outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */ |
183 | 183 | ||
184 | for (i = 0; i < HD64465_IRQ_NUM ; i++) { | 184 | for (i = 0; i < HD64465_IRQ_NUM ; i++) { |
185 | irq_desc[HD64465_IRQ_BASE + i].handler = &hd64465_irq_type; | 185 | irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type; |
186 | } | 186 | } |
187 | 187 | ||
188 | setup_irq(CONFIG_HD64465_IRQ, &irq0); | 188 | setup_irq(CONFIG_HD64465_IRQ, &irq0); |
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c index 2ee330b3c38f..892214bade19 100644 --- a/arch/sh/cchips/voyagergx/irq.c +++ b/arch/sh/cchips/voyagergx/irq.c | |||
@@ -191,7 +191,7 @@ void __init setup_voyagergx_irq(void) | |||
191 | flag = 1; | 191 | flag = 1; |
192 | } | 192 | } |
193 | if (flag == 1) | 193 | if (flag == 1) |
194 | irq_desc[VOYAGER_IRQ_BASE + i].handler = &voyagergx_irq_type; | 194 | irq_desc[VOYAGER_IRQ_BASE + i].chip = &voyagergx_irq_type; |
195 | } | 195 | } |
196 | 196 | ||
197 | setup_irq(IRQ_VOYAGER, &irq0); | 197 | setup_irq(IRQ_VOYAGER, &irq0); |
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index c1669905abe4..3d546ba329cf 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c | |||
@@ -75,7 +75,7 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root, | |||
75 | } | 75 | } |
76 | 76 | ||
77 | void pcibios_align_resource(void *data, struct resource *res, | 77 | void pcibios_align_resource(void *data, struct resource *res, |
78 | unsigned long size, unsigned long align) | 78 | resource_size_t size, resource_size_t align) |
79 | __attribute__ ((weak)); | 79 | __attribute__ ((weak)); |
80 | 80 | ||
81 | /* | 81 | /* |
@@ -85,10 +85,10 @@ void pcibios_align_resource(void *data, struct resource *res, | |||
85 | * modulo 0x400. | 85 | * modulo 0x400. |
86 | */ | 86 | */ |
87 | void pcibios_align_resource(void *data, struct resource *res, | 87 | void pcibios_align_resource(void *data, struct resource *res, |
88 | unsigned long size, unsigned long align) | 88 | resource_size_t size, resource_size_t align) |
89 | { | 89 | { |
90 | if (res->flags & IORESOURCE_IO) { | 90 | if (res->flags & IORESOURCE_IO) { |
91 | unsigned long start = res->start; | 91 | resource_size_t start = res->start; |
92 | 92 | ||
93 | if (start & 0x300) { | 93 | if (start & 0x300) { |
94 | start = (start + 0x3ff) & ~0x3ff; | 94 | start = (start + 0x3ff) & ~0x3ff; |
diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c index baed9a550d39..a33ae3e0a5a5 100644 --- a/arch/sh/kernel/cpu/irq/imask.c +++ b/arch/sh/kernel/cpu/irq/imask.c | |||
@@ -105,6 +105,6 @@ static void shutdown_imask_irq(unsigned int irq) | |||
105 | void make_imask_irq(unsigned int irq) | 105 | void make_imask_irq(unsigned int irq) |
106 | { | 106 | { |
107 | disable_irq_nosync(irq); | 107 | disable_irq_nosync(irq); |
108 | irq_desc[irq].handler = &imask_irq_type; | 108 | irq_desc[irq].chip = &imask_irq_type; |
109 | enable_irq(irq); | 109 | enable_irq(irq); |
110 | } | 110 | } |
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c index 06e8afab32e4..30064bf6e154 100644 --- a/arch/sh/kernel/cpu/irq/intc2.c +++ b/arch/sh/kernel/cpu/irq/intc2.c | |||
@@ -137,7 +137,7 @@ void make_intc2_irq(unsigned int irq, | |||
137 | 137 | ||
138 | local_irq_restore(flags); | 138 | local_irq_restore(flags); |
139 | 139 | ||
140 | irq_desc[irq].handler = &intc2_irq_type; | 140 | irq_desc[irq].chip = &intc2_irq_type; |
141 | 141 | ||
142 | disable_intc2_irq(irq); | 142 | disable_intc2_irq(irq); |
143 | } | 143 | } |
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c index e55150ed0856..0373b65c77f9 100644 --- a/arch/sh/kernel/cpu/irq/ipr.c +++ b/arch/sh/kernel/cpu/irq/ipr.c | |||
@@ -115,7 +115,7 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority) | |||
115 | ipr_data[irq].shift = pos*4; /* POSition (0-3) x 4 means shift */ | 115 | ipr_data[irq].shift = pos*4; /* POSition (0-3) x 4 means shift */ |
116 | ipr_data[irq].priority = priority; | 116 | ipr_data[irq].priority = priority; |
117 | 117 | ||
118 | irq_desc[irq].handler = &ipr_irq_type; | 118 | irq_desc[irq].chip = &ipr_irq_type; |
119 | disable_ipr_irq(irq); | 119 | disable_ipr_irq(irq); |
120 | } | 120 | } |
121 | 121 | ||
diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c index 95d6024fe1ae..714963a25bba 100644 --- a/arch/sh/kernel/cpu/irq/pint.c +++ b/arch/sh/kernel/cpu/irq/pint.c | |||
@@ -85,7 +85,7 @@ static void end_pint_irq(unsigned int irq) | |||
85 | void make_pint_irq(unsigned int irq) | 85 | void make_pint_irq(unsigned int irq) |
86 | { | 86 | { |
87 | disable_irq_nosync(irq); | 87 | disable_irq_nosync(irq); |
88 | irq_desc[irq].handler = &pint_irq_type; | 88 | irq_desc[irq].chip = &pint_irq_type; |
89 | disable_pint_irq(irq); | 89 | disable_pint_irq(irq); |
90 | } | 90 | } |
91 | 91 | ||
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c index 8437ea7430fe..83a4f91bce5a 100644 --- a/arch/sh/kernel/cpu/sh4/sq.c +++ b/arch/sh/kernel/cpu/sh4/sq.c | |||
@@ -417,7 +417,6 @@ static struct file_operations sq_fops = { | |||
417 | static struct miscdevice sq_dev = { | 417 | static struct miscdevice sq_dev = { |
418 | .minor = STORE_QUEUE_MINOR, | 418 | .minor = STORE_QUEUE_MINOR, |
419 | .name = "sq", | 419 | .name = "sq", |
420 | .devfs_name = "cpu/sq", | ||
421 | .fops = &sq_fops, | 420 | .fops = &sq_fops, |
422 | }; | 421 | }; |
423 | 422 | ||
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index b56e79632f24..c2e07f7f3496 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c | |||
@@ -47,7 +47,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
47 | goto unlock; | 47 | goto unlock; |
48 | seq_printf(p, "%3d: ",i); | 48 | seq_printf(p, "%3d: ",i); |
49 | seq_printf(p, "%10u ", kstat_irqs(i)); | 49 | seq_printf(p, "%10u ", kstat_irqs(i)); |
50 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 50 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
51 | seq_printf(p, " %s", action->name); | 51 | seq_printf(p, " %s", action->name); |
52 | 52 | ||
53 | for (action=action->next; action; action = action->next) | 53 | for (action=action->next; action; action = action->next) |
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index bb229ef030f3..9af22116c9a2 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c | |||
@@ -402,7 +402,7 @@ static int __init topology_init(void) | |||
402 | int cpu_id; | 402 | int cpu_id; |
403 | 403 | ||
404 | for_each_possible_cpu(cpu_id) | 404 | for_each_possible_cpu(cpu_id) |
405 | register_cpu(&cpu[cpu_id], cpu_id, NULL); | 405 | register_cpu(&cpu[cpu_id], cpu_id); |
406 | 406 | ||
407 | return 0; | 407 | return 0; |
408 | } | 408 | } |
diff --git a/arch/sh64/kernel/irq.c b/arch/sh64/kernel/irq.c index d69879c0e063..675776a5477e 100644 --- a/arch/sh64/kernel/irq.c +++ b/arch/sh64/kernel/irq.c | |||
@@ -65,7 +65,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
65 | goto unlock; | 65 | goto unlock; |
66 | seq_printf(p, "%3d: ",i); | 66 | seq_printf(p, "%3d: ",i); |
67 | seq_printf(p, "%10u ", kstat_irqs(i)); | 67 | seq_printf(p, "%10u ", kstat_irqs(i)); |
68 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 68 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
69 | seq_printf(p, " %s", action->name); | 69 | seq_printf(p, " %s", action->name); |
70 | 70 | ||
71 | for (action=action->next; action; action = action->next) | 71 | for (action=action->next; action; action = action->next) |
diff --git a/arch/sh64/kernel/irq_intc.c b/arch/sh64/kernel/irq_intc.c index fc99bf4e362c..fa730f5fe2e6 100644 --- a/arch/sh64/kernel/irq_intc.c +++ b/arch/sh64/kernel/irq_intc.c | |||
@@ -178,7 +178,7 @@ static void end_intc_irq(unsigned int irq) | |||
178 | void make_intc_irq(unsigned int irq) | 178 | void make_intc_irq(unsigned int irq) |
179 | { | 179 | { |
180 | disable_irq_nosync(irq); | 180 | disable_irq_nosync(irq); |
181 | irq_desc[irq].handler = &intc_irq_type; | 181 | irq_desc[irq].chip = &intc_irq_type; |
182 | disable_intc_irq(irq); | 182 | disable_intc_irq(irq); |
183 | } | 183 | } |
184 | 184 | ||
@@ -208,7 +208,7 @@ void __init init_IRQ(void) | |||
208 | /* Set default: per-line enable/disable, priority driven ack/eoi */ | 208 | /* Set default: per-line enable/disable, priority driven ack/eoi */ |
209 | for (i = 0; i < NR_INTC_IRQS; i++) { | 209 | for (i = 0; i < NR_INTC_IRQS; i++) { |
210 | if (platform_int_priority[i] != NO_PRIORITY) { | 210 | if (platform_int_priority[i] != NO_PRIORITY) { |
211 | irq_desc[i].handler = &intc_irq_type; | 211 | irq_desc[i].chip = &intc_irq_type; |
212 | } | 212 | } |
213 | } | 213 | } |
214 | 214 | ||
diff --git a/arch/sh64/kernel/pcibios.c b/arch/sh64/kernel/pcibios.c index 50c61dcb9fae..945920bc24db 100644 --- a/arch/sh64/kernel/pcibios.c +++ b/arch/sh64/kernel/pcibios.c | |||
@@ -69,10 +69,10 @@ pcibios_update_resource(struct pci_dev *dev, struct resource *root, | |||
69 | * modulo 0x400. | 69 | * modulo 0x400. |
70 | */ | 70 | */ |
71 | void pcibios_align_resource(void *data, struct resource *res, | 71 | void pcibios_align_resource(void *data, struct resource *res, |
72 | unsigned long size, unsigned long align) | 72 | resource_size_t size, resource_size_t align) |
73 | { | 73 | { |
74 | if (res->flags & IORESOURCE_IO) { | 74 | if (res->flags & IORESOURCE_IO) { |
75 | unsigned long start = res->start; | 75 | resource_size_t start = res->start; |
76 | 76 | ||
77 | if (start & 0x300) { | 77 | if (start & 0x300) { |
78 | start = (start + 0x3ff) & ~0x3ff; | 78 | start = (start + 0x3ff) & ~0x3ff; |
diff --git a/arch/sh64/kernel/setup.c b/arch/sh64/kernel/setup.c index d2711c9c9d13..da98d8dbcf95 100644 --- a/arch/sh64/kernel/setup.c +++ b/arch/sh64/kernel/setup.c | |||
@@ -309,7 +309,7 @@ static struct cpu cpu[1]; | |||
309 | 309 | ||
310 | static int __init topology_init(void) | 310 | static int __init topology_init(void) |
311 | { | 311 | { |
312 | return register_cpu(cpu, 0, NULL); | 312 | return register_cpu(cpu, 0); |
313 | } | 313 | } |
314 | 314 | ||
315 | subsys_initcall(topology_init); | 315 | subsys_initcall(topology_init); |
diff --git a/arch/sh64/mach-cayman/irq.c b/arch/sh64/mach-cayman/irq.c index f797c84bfdd1..05eb7cdc26f0 100644 --- a/arch/sh64/mach-cayman/irq.c +++ b/arch/sh64/mach-cayman/irq.c | |||
@@ -187,7 +187,7 @@ void init_cayman_irq(void) | |||
187 | } | 187 | } |
188 | 188 | ||
189 | for (i=0; i<NR_EXT_IRQS; i++) { | 189 | for (i=0; i<NR_EXT_IRQS; i++) { |
190 | irq_desc[START_EXT_IRQS + i].handler = &cayman_irq_type; | 190 | irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type; |
191 | } | 191 | } |
192 | 192 | ||
193 | /* Setup the SMSC interrupt */ | 193 | /* Setup the SMSC interrupt */ |
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c index ae4c667c906f..79d177149fdb 100644 --- a/arch/sparc/kernel/ioport.c +++ b/arch/sparc/kernel/ioport.c | |||
@@ -208,7 +208,7 @@ _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz) | |||
208 | pa &= PAGE_MASK; | 208 | pa &= PAGE_MASK; |
209 | sparc_mapiorange(bus, pa, res->start, res->end - res->start + 1); | 209 | sparc_mapiorange(bus, pa, res->start, res->end - res->start + 1); |
210 | 210 | ||
211 | return (void __iomem *) (res->start + offset); | 211 | return (void __iomem *)(unsigned long)(res->start + offset); |
212 | } | 212 | } |
213 | 213 | ||
214 | /* | 214 | /* |
@@ -325,7 +325,7 @@ void *sbus_alloc_consistent(struct sbus_dev *sdev, long len, u32 *dma_addrp) | |||
325 | res->name = sdev->prom_name; | 325 | res->name = sdev->prom_name; |
326 | } | 326 | } |
327 | 327 | ||
328 | return (void *)res->start; | 328 | return (void *)(unsigned long)res->start; |
329 | 329 | ||
330 | err_noiommu: | 330 | err_noiommu: |
331 | release_resource(res); | 331 | release_resource(res); |
@@ -819,7 +819,9 @@ _sparc_io_get_info(char *buf, char **start, off_t fpos, int length, int *eof, | |||
819 | if (p + 32 >= e) /* Better than nothing */ | 819 | if (p + 32 >= e) /* Better than nothing */ |
820 | break; | 820 | break; |
821 | if ((nm = r->name) == 0) nm = "???"; | 821 | if ((nm = r->name) == 0) nm = "???"; |
822 | p += sprintf(p, "%08lx-%08lx: %s\n", r->start, r->end, nm); | 822 | p += sprintf(p, "%016llx-%016llx: %s\n", |
823 | (unsigned long long)r->start, | ||
824 | (unsigned long long)r->end, nm); | ||
823 | } | 825 | } |
824 | 826 | ||
825 | return p-buf; | 827 | return p-buf; |
diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index bcfdddd0418a..5df3ebdc0ab1 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c | |||
@@ -860,7 +860,7 @@ char * __init pcibios_setup(char *str) | |||
860 | } | 860 | } |
861 | 861 | ||
862 | void pcibios_align_resource(void *data, struct resource *res, | 862 | void pcibios_align_resource(void *data, struct resource *res, |
863 | unsigned long size, unsigned long align) | 863 | resource_size_t size, resource_size_t align) |
864 | { | 864 | { |
865 | } | 865 | } |
866 | 866 | ||
diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c index a893a9cc9534..2e5d08ce217b 100644 --- a/arch/sparc/kernel/setup.c +++ b/arch/sparc/kernel/setup.c | |||
@@ -496,7 +496,7 @@ static int __init topology_init(void) | |||
496 | if (!p) | 496 | if (!p) |
497 | err = -ENOMEM; | 497 | err = -ENOMEM; |
498 | else | 498 | else |
499 | register_cpu(p, i, NULL); | 499 | register_cpu(p, i); |
500 | } | 500 | } |
501 | 501 | ||
502 | return err; | 502 | return err; |
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c index cc89b06d0178..ab9e640df228 100644 --- a/arch/sparc64/kernel/irq.c +++ b/arch/sparc64/kernel/irq.c | |||
@@ -151,7 +151,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
151 | for_each_online_cpu(j) | 151 | for_each_online_cpu(j) |
152 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 152 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
153 | #endif | 153 | #endif |
154 | seq_printf(p, " %9s", irq_desc[i].handler->typename); | 154 | seq_printf(p, " %9s", irq_desc[i].chip->typename); |
155 | seq_printf(p, " %s", action->name); | 155 | seq_printf(p, " %s", action->name); |
156 | 156 | ||
157 | for (action=action->next; action; action = action->next) | 157 | for (action=action->next; action; action = action->next) |
@@ -224,7 +224,7 @@ static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq) | |||
224 | #ifdef CONFIG_SMP | 224 | #ifdef CONFIG_SMP |
225 | static int irq_choose_cpu(unsigned int virt_irq) | 225 | static int irq_choose_cpu(unsigned int virt_irq) |
226 | { | 226 | { |
227 | cpumask_t mask = irq_affinity[virt_irq]; | 227 | cpumask_t mask = irq_desc[virt_irq].affinity; |
228 | int cpuid; | 228 | int cpuid; |
229 | 229 | ||
230 | if (cpus_equal(mask, CPU_MASK_ALL)) { | 230 | if (cpus_equal(mask, CPU_MASK_ALL)) { |
@@ -414,8 +414,8 @@ void irq_install_pre_handler(int virt_irq, | |||
414 | data->pre_handler_arg1 = arg1; | 414 | data->pre_handler_arg1 = arg1; |
415 | data->pre_handler_arg2 = arg2; | 415 | data->pre_handler_arg2 = arg2; |
416 | 416 | ||
417 | desc->handler = (desc->handler == &sun4u_irq ? | 417 | desc->chip = (desc->chip == &sun4u_irq ? |
418 | &sun4u_irq_ack : &sun4v_irq_ack); | 418 | &sun4u_irq_ack : &sun4v_irq_ack); |
419 | } | 419 | } |
420 | 420 | ||
421 | unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) | 421 | unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) |
@@ -431,7 +431,7 @@ unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) | |||
431 | bucket = &ivector_table[ino]; | 431 | bucket = &ivector_table[ino]; |
432 | if (!bucket->virt_irq) { | 432 | if (!bucket->virt_irq) { |
433 | bucket->virt_irq = virt_irq_alloc(__irq(bucket)); | 433 | bucket->virt_irq = virt_irq_alloc(__irq(bucket)); |
434 | irq_desc[bucket->virt_irq].handler = &sun4u_irq; | 434 | irq_desc[bucket->virt_irq].chip = &sun4u_irq; |
435 | } | 435 | } |
436 | 436 | ||
437 | desc = irq_desc + bucket->virt_irq; | 437 | desc = irq_desc + bucket->virt_irq; |
@@ -465,7 +465,7 @@ unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino) | |||
465 | bucket = &ivector_table[sysino]; | 465 | bucket = &ivector_table[sysino]; |
466 | if (!bucket->virt_irq) { | 466 | if (!bucket->virt_irq) { |
467 | bucket->virt_irq = virt_irq_alloc(__irq(bucket)); | 467 | bucket->virt_irq = virt_irq_alloc(__irq(bucket)); |
468 | irq_desc[bucket->virt_irq].handler = &sun4v_irq; | 468 | irq_desc[bucket->virt_irq].chip = &sun4v_irq; |
469 | } | 469 | } |
470 | 470 | ||
471 | desc = irq_desc + bucket->virt_irq; | 471 | desc = irq_desc + bucket->virt_irq; |
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index 6c9e3e94abaa..20ca9ec8fd3b 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c | |||
@@ -357,7 +357,7 @@ void pcibios_update_irq(struct pci_dev *pdev, int irq) | |||
357 | } | 357 | } |
358 | 358 | ||
359 | void pcibios_align_resource(void *data, struct resource *res, | 359 | void pcibios_align_resource(void *data, struct resource *res, |
360 | unsigned long size, unsigned long align) | 360 | resource_size_t size, resource_size_t align) |
361 | { | 361 | { |
362 | } | 362 | } |
363 | 363 | ||
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c index a6a7d8168346..116d9632002d 100644 --- a/arch/sparc64/kernel/setup.c +++ b/arch/sparc64/kernel/setup.c | |||
@@ -537,7 +537,7 @@ static int __init topology_init(void) | |||
537 | for_each_possible_cpu(i) { | 537 | for_each_possible_cpu(i) { |
538 | struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); | 538 | struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); |
539 | if (p) { | 539 | if (p) { |
540 | register_cpu(p, i, NULL); | 540 | register_cpu(p, i); |
541 | err = 0; | 541 | err = 0; |
542 | } | 542 | } |
543 | } | 543 | } |
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c index 5c2bcf354ce6..cb75a27adb51 100644 --- a/arch/sparc64/mm/init.c +++ b/arch/sparc64/mm/init.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/initrd.h> | 18 | #include <linux/initrd.h> |
19 | #include <linux/swap.h> | 19 | #include <linux/swap.h> |
20 | #include <linux/pagemap.h> | 20 | #include <linux/pagemap.h> |
21 | #include <linux/poison.h> | ||
21 | #include <linux/fs.h> | 22 | #include <linux/fs.h> |
22 | #include <linux/seq_file.h> | 23 | #include <linux/seq_file.h> |
23 | #include <linux/kprobes.h> | 24 | #include <linux/kprobes.h> |
@@ -1520,7 +1521,7 @@ void free_initmem(void) | |||
1520 | page = (addr + | 1521 | page = (addr + |
1521 | ((unsigned long) __va(kern_base)) - | 1522 | ((unsigned long) __va(kern_base)) - |
1522 | ((unsigned long) KERNBASE)); | 1523 | ((unsigned long) KERNBASE)); |
1523 | memset((void *)addr, 0xcc, PAGE_SIZE); | 1524 | memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE); |
1524 | p = virt_to_page(page); | 1525 | p = virt_to_page(page); |
1525 | 1526 | ||
1526 | ClearPageReserved(p); | 1527 | ClearPageReserved(p); |
diff --git a/arch/sparc64/solaris/socksys.c b/arch/sparc64/solaris/socksys.c index fc6669e8dde1..bc3df95bc057 100644 --- a/arch/sparc64/solaris/socksys.c +++ b/arch/sparc64/solaris/socksys.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/slab.h> | 26 | #include <linux/slab.h> |
27 | #include <linux/syscalls.h> | 27 | #include <linux/syscalls.h> |
28 | #include <linux/in.h> | 28 | #include <linux/in.h> |
29 | #include <linux/devfs_fs_kernel.h> | ||
30 | 29 | ||
31 | #include <net/sock.h> | 30 | #include <net/sock.h> |
32 | 31 | ||
@@ -190,8 +189,6 @@ init_socksys(void) | |||
190 | return ret; | 189 | return ret; |
191 | } | 190 | } |
192 | 191 | ||
193 | devfs_mk_cdev(MKDEV(30, 0), S_IFCHR|S_IRUSR|S_IWUSR, "socksys"); | ||
194 | |||
195 | file = fcheck(ret); | 192 | file = fcheck(ret); |
196 | /* N.B. Is this valid? Suppose the f_ops are in a module ... */ | 193 | /* N.B. Is this valid? Suppose the f_ops are in a module ... */ |
197 | socksys_file_ops = *file->f_op; | 194 | socksys_file_ops = *file->f_op; |
@@ -207,5 +204,4 @@ cleanup_socksys(void) | |||
207 | { | 204 | { |
208 | if (unregister_chrdev(30, "socksys")) | 205 | if (unregister_chrdev(30, "socksys")) |
209 | printk ("Couldn't unregister socksys character device\n"); | 206 | printk ("Couldn't unregister socksys character device\n"); |
210 | devfs_remove ("socksys"); | ||
211 | } | 207 | } |
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c index 6c2d4ccaf20f..5ca57ca33713 100644 --- a/arch/um/drivers/line.c +++ b/arch/um/drivers/line.c | |||
@@ -8,7 +8,6 @@ | |||
8 | #include "linux/list.h" | 8 | #include "linux/list.h" |
9 | #include "linux/kd.h" | 9 | #include "linux/kd.h" |
10 | #include "linux/interrupt.h" | 10 | #include "linux/interrupt.h" |
11 | #include "linux/devfs_fs_kernel.h" | ||
12 | #include "asm/uaccess.h" | 11 | #include "asm/uaccess.h" |
13 | #include "chan_kern.h" | 12 | #include "chan_kern.h" |
14 | #include "irq_user.h" | 13 | #include "irq_user.h" |
@@ -655,7 +654,6 @@ struct tty_driver *line_register_devfs(struct lines *set, | |||
655 | 654 | ||
656 | driver->driver_name = line_driver->name; | 655 | driver->driver_name = line_driver->name; |
657 | driver->name = line_driver->device_name; | 656 | driver->name = line_driver->device_name; |
658 | driver->devfs_name = line_driver->devfs_name; | ||
659 | driver->major = line_driver->major; | 657 | driver->major = line_driver->major; |
660 | driver->minor_start = line_driver->minor_start; | 658 | driver->minor_start = line_driver->minor_start; |
661 | driver->type = line_driver->type; | 659 | driver->type = line_driver->type; |
diff --git a/arch/um/drivers/ssl.c b/arch/um/drivers/ssl.c index a4d6415bc8c4..6dafd6fbfdae 100644 --- a/arch/um/drivers/ssl.c +++ b/arch/um/drivers/ssl.c | |||
@@ -54,7 +54,6 @@ static int ssl_remove(int n); | |||
54 | static struct line_driver driver = { | 54 | static struct line_driver driver = { |
55 | .name = "UML serial line", | 55 | .name = "UML serial line", |
56 | .device_name = "ttyS", | 56 | .device_name = "ttyS", |
57 | .devfs_name = "tts/", | ||
58 | .major = TTY_MAJOR, | 57 | .major = TTY_MAJOR, |
59 | .minor_start = 64, | 58 | .minor_start = 64, |
60 | .type = TTY_DRIVER_TYPE_SERIAL, | 59 | .type = TTY_DRIVER_TYPE_SERIAL, |
diff --git a/arch/um/drivers/stdio_console.c b/arch/um/drivers/stdio_console.c index 61db8b2fc83f..856f568c2687 100644 --- a/arch/um/drivers/stdio_console.c +++ b/arch/um/drivers/stdio_console.c | |||
@@ -60,7 +60,6 @@ static int con_remove(int n); | |||
60 | static struct line_driver driver = { | 60 | static struct line_driver driver = { |
61 | .name = "UML console", | 61 | .name = "UML console", |
62 | .device_name = "tty", | 62 | .device_name = "tty", |
63 | .devfs_name = "vc/", | ||
64 | .major = TTY_MAJOR, | 63 | .major = TTY_MAJOR, |
65 | .minor_start = 0, | 64 | .minor_start = 0, |
66 | .type = TTY_DRIVER_TYPE_CONSOLE, | 65 | .type = TTY_DRIVER_TYPE_CONSOLE, |
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c index 290cec6d69e2..0345e2551247 100644 --- a/arch/um/drivers/ubd_kern.c +++ b/arch/um/drivers/ubd_kern.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include "linux/blkdev.h" | 25 | #include "linux/blkdev.h" |
26 | #include "linux/hdreg.h" | 26 | #include "linux/hdreg.h" |
27 | #include "linux/init.h" | 27 | #include "linux/init.h" |
28 | #include "linux/devfs_fs_kernel.h" | ||
29 | #include "linux/cdrom.h" | 28 | #include "linux/cdrom.h" |
30 | #include "linux/proc_fs.h" | 29 | #include "linux/proc_fs.h" |
31 | #include "linux/ctype.h" | 30 | #include "linux/ctype.h" |
@@ -628,7 +627,6 @@ static int ubd_new_disk(int major, u64 size, int unit, | |||
628 | 627 | ||
629 | { | 628 | { |
630 | struct gendisk *disk; | 629 | struct gendisk *disk; |
631 | char from[sizeof("ubd/nnnnn\0")], to[sizeof("discnnnnn/disc\0")]; | ||
632 | int err; | 630 | int err; |
633 | 631 | ||
634 | disk = alloc_disk(1 << UBD_SHIFT); | 632 | disk = alloc_disk(1 << UBD_SHIFT); |
@@ -639,20 +637,10 @@ static int ubd_new_disk(int major, u64 size, int unit, | |||
639 | disk->first_minor = unit << UBD_SHIFT; | 637 | disk->first_minor = unit << UBD_SHIFT; |
640 | disk->fops = &ubd_blops; | 638 | disk->fops = &ubd_blops; |
641 | set_capacity(disk, size / 512); | 639 | set_capacity(disk, size / 512); |
642 | if(major == MAJOR_NR){ | 640 | if(major == MAJOR_NR) |
643 | sprintf(disk->disk_name, "ubd%c", 'a' + unit); | 641 | sprintf(disk->disk_name, "ubd%c", 'a' + unit); |
644 | sprintf(disk->devfs_name, "ubd/disc%d", unit); | 642 | else |
645 | sprintf(from, "ubd/%d", unit); | ||
646 | sprintf(to, "disc%d/disc", unit); | ||
647 | err = devfs_mk_symlink(from, to); | ||
648 | if(err) | ||
649 | printk("ubd_new_disk failed to make link from %s to " | ||
650 | "%s, error = %d\n", from, to, err); | ||
651 | } | ||
652 | else { | ||
653 | sprintf(disk->disk_name, "ubd_fake%d", unit); | 643 | sprintf(disk->disk_name, "ubd_fake%d", unit); |
654 | sprintf(disk->devfs_name, "ubd_fake/disc%d", unit); | ||
655 | } | ||
656 | 644 | ||
657 | /* sysfs register (not for ide fake devices) */ | 645 | /* sysfs register (not for ide fake devices) */ |
658 | if (major == MAJOR_NR) { | 646 | if (major == MAJOR_NR) { |
@@ -841,7 +829,6 @@ int ubd_init(void) | |||
841 | { | 829 | { |
842 | int i; | 830 | int i; |
843 | 831 | ||
844 | devfs_mk_dir("ubd"); | ||
845 | if (register_blkdev(MAJOR_NR, "ubd")) | 832 | if (register_blkdev(MAJOR_NR, "ubd")) |
846 | return -1; | 833 | return -1; |
847 | 834 | ||
@@ -855,7 +842,6 @@ int ubd_init(void) | |||
855 | char name[sizeof("ubd_nnn\0")]; | 842 | char name[sizeof("ubd_nnn\0")]; |
856 | 843 | ||
857 | snprintf(name, sizeof(name), "ubd_%d", fake_major); | 844 | snprintf(name, sizeof(name), "ubd_%d", fake_major); |
858 | devfs_mk_dir(name); | ||
859 | if (register_blkdev(fake_major, "ubd")) | 845 | if (register_blkdev(fake_major, "ubd")) |
860 | return -1; | 846 | return -1; |
861 | } | 847 | } |
diff --git a/arch/um/include/line.h b/arch/um/include/line.h index 6ac0f8252e21..27bf2f6fbc05 100644 --- a/arch/um/include/line.h +++ b/arch/um/include/line.h | |||
@@ -17,7 +17,6 @@ | |||
17 | struct line_driver { | 17 | struct line_driver { |
18 | char *name; | 18 | char *name; |
19 | char *device_name; | 19 | char *device_name; |
20 | char *devfs_name; | ||
21 | short major; | 20 | short major; |
22 | short minor_start; | 21 | short minor_start; |
23 | short type; | 22 | short type; |
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c index 2ffda012385e..fae43a3054a0 100644 --- a/arch/um/kernel/irq.c +++ b/arch/um/kernel/irq.c | |||
@@ -63,7 +63,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
63 | for_each_online_cpu(j) | 63 | for_each_online_cpu(j) |
64 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 64 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
65 | #endif | 65 | #endif |
66 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 66 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
67 | seq_printf(p, " %s", action->name); | 67 | seq_printf(p, " %s", action->name); |
68 | 68 | ||
69 | for (action=action->next; action; action = action->next) | 69 | for (action=action->next; action; action = action->next) |
@@ -451,13 +451,13 @@ void __init init_IRQ(void) | |||
451 | irq_desc[TIMER_IRQ].status = IRQ_DISABLED; | 451 | irq_desc[TIMER_IRQ].status = IRQ_DISABLED; |
452 | irq_desc[TIMER_IRQ].action = NULL; | 452 | irq_desc[TIMER_IRQ].action = NULL; |
453 | irq_desc[TIMER_IRQ].depth = 1; | 453 | irq_desc[TIMER_IRQ].depth = 1; |
454 | irq_desc[TIMER_IRQ].handler = &SIGVTALRM_irq_type; | 454 | irq_desc[TIMER_IRQ].chip = &SIGVTALRM_irq_type; |
455 | enable_irq(TIMER_IRQ); | 455 | enable_irq(TIMER_IRQ); |
456 | for (i = 1; i < NR_IRQS; i++) { | 456 | for (i = 1; i < NR_IRQS; i++) { |
457 | irq_desc[i].status = IRQ_DISABLED; | 457 | irq_desc[i].status = IRQ_DISABLED; |
458 | irq_desc[i].action = NULL; | 458 | irq_desc[i].action = NULL; |
459 | irq_desc[i].depth = 1; | 459 | irq_desc[i].depth = 1; |
460 | irq_desc[i].handler = &normal_irq_type; | 460 | irq_desc[i].chip = &normal_irq_type; |
461 | enable_irq(i); | 461 | enable_irq(i); |
462 | } | 462 | } |
463 | } | 463 | } |
diff --git a/arch/v850/kernel/irq.c b/arch/v850/kernel/irq.c index 7a151c26f82e..858c45819aab 100644 --- a/arch/v850/kernel/irq.c +++ b/arch/v850/kernel/irq.c | |||
@@ -65,10 +65,10 @@ int show_interrupts(struct seq_file *p, void *v) | |||
65 | int j; | 65 | int j; |
66 | int count = 0; | 66 | int count = 0; |
67 | int num = -1; | 67 | int num = -1; |
68 | const char *type_name = irq_desc[irq].handler->typename; | 68 | const char *type_name = irq_desc[irq].chip->typename; |
69 | 69 | ||
70 | for (j = 0; j < NR_IRQS; j++) | 70 | for (j = 0; j < NR_IRQS; j++) |
71 | if (irq_desc[j].handler->typename == type_name){ | 71 | if (irq_desc[j].chip->typename == type_name){ |
72 | if (irq == j) | 72 | if (irq == j) |
73 | num = count; | 73 | num = count; |
74 | count++; | 74 | count++; |
@@ -117,7 +117,7 @@ init_irq_handlers (int base_irq, int num, int interval, | |||
117 | irq_desc[base_irq].status = IRQ_DISABLED; | 117 | irq_desc[base_irq].status = IRQ_DISABLED; |
118 | irq_desc[base_irq].action = NULL; | 118 | irq_desc[base_irq].action = NULL; |
119 | irq_desc[base_irq].depth = 1; | 119 | irq_desc[base_irq].depth = 1; |
120 | irq_desc[base_irq].handler = irq_type; | 120 | irq_desc[base_irq].chip = irq_type; |
121 | base_irq += interval; | 121 | base_irq += interval; |
122 | } | 122 | } |
123 | } | 123 | } |
diff --git a/arch/v850/kernel/rte_mb_a_pci.c b/arch/v850/kernel/rte_mb_a_pci.c index ffbb6d073bf2..3a7c5c9c3ac6 100644 --- a/arch/v850/kernel/rte_mb_a_pci.c +++ b/arch/v850/kernel/rte_mb_a_pci.c | |||
@@ -329,7 +329,7 @@ void pcibios_fixup_bus(struct pci_bus *b) | |||
329 | 329 | ||
330 | void | 330 | void |
331 | pcibios_align_resource (void *data, struct resource *res, | 331 | pcibios_align_resource (void *data, struct resource *res, |
332 | unsigned long size, unsigned long align) | 332 | resource_size_t size, resource_size_t align) |
333 | { | 333 | { |
334 | } | 334 | } |
335 | 335 | ||
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig index ccc4a7fb97a3..e856804c447f 100644 --- a/arch/x86_64/Kconfig +++ b/arch/x86_64/Kconfig | |||
@@ -370,6 +370,8 @@ config HOTPLUG_CPU | |||
370 | can be controlled through /sys/devices/system/cpu/cpu#. | 370 | can be controlled through /sys/devices/system/cpu/cpu#. |
371 | Say N if you want to disable CPU hotplug. | 371 | Say N if you want to disable CPU hotplug. |
372 | 372 | ||
373 | config ARCH_ENABLE_MEMORY_HOTPLUG | ||
374 | def_bool y | ||
373 | 375 | ||
374 | config HPET_TIMER | 376 | config HPET_TIMER |
375 | bool | 377 | bool |
@@ -459,10 +461,10 @@ config KEXEC | |||
459 | help | 461 | help |
460 | kexec is a system call that implements the ability to shutdown your | 462 | kexec is a system call that implements the ability to shutdown your |
461 | current kernel, and to start another kernel. It is like a reboot | 463 | current kernel, and to start another kernel. It is like a reboot |
462 | but it is indepedent of the system firmware. And like a reboot | 464 | but it is independent of the system firmware. And like a reboot |
463 | you can start any kernel with it, not just Linux. | 465 | you can start any kernel with it, not just Linux. |
464 | 466 | ||
465 | The name comes from the similiarity to the exec system call. | 467 | The name comes from the similarity to the exec system call. |
466 | 468 | ||
467 | It is an ongoing process to be certain the hardware in a machine | 469 | It is an ongoing process to be certain the hardware in a machine |
468 | is properly shutdown, so do not be surprised if this code does not | 470 | is properly shutdown, so do not be surprised if this code does not |
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S index 7290e72b9a34..22cac4487b57 100644 --- a/arch/x86_64/kernel/entry.S +++ b/arch/x86_64/kernel/entry.S | |||
@@ -588,7 +588,7 @@ END(common_interrupt) | |||
588 | */ | 588 | */ |
589 | .macro apicinterrupt num,func | 589 | .macro apicinterrupt num,func |
590 | INTR_FRAME | 590 | INTR_FRAME |
591 | pushq $\num-256 | 591 | pushq $~(\num) |
592 | CFI_ADJUST_CFA_OFFSET 8 | 592 | CFI_ADJUST_CFA_OFFSET 8 |
593 | interrupt \func | 593 | interrupt \func |
594 | jmp ret_from_intr | 594 | jmp ret_from_intr |
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c index 86b2c1e197aa..3dd1659427dc 100644 --- a/arch/x86_64/kernel/i8259.c +++ b/arch/x86_64/kernel/i8259.c | |||
@@ -235,7 +235,7 @@ void make_8259A_irq(unsigned int irq) | |||
235 | { | 235 | { |
236 | disable_irq_nosync(irq); | 236 | disable_irq_nosync(irq); |
237 | io_apic_irqs &= ~(1<<irq); | 237 | io_apic_irqs &= ~(1<<irq); |
238 | irq_desc[irq].handler = &i8259A_irq_type; | 238 | irq_desc[irq].chip = &i8259A_irq_type; |
239 | enable_irq(irq); | 239 | enable_irq(irq); |
240 | } | 240 | } |
241 | 241 | ||
@@ -468,12 +468,12 @@ void __init init_ISA_irqs (void) | |||
468 | /* | 468 | /* |
469 | * 16 old-style INTA-cycle interrupts: | 469 | * 16 old-style INTA-cycle interrupts: |
470 | */ | 470 | */ |
471 | irq_desc[i].handler = &i8259A_irq_type; | 471 | irq_desc[i].chip = &i8259A_irq_type; |
472 | } else { | 472 | } else { |
473 | /* | 473 | /* |
474 | * 'high' PCI IRQs filled in on demand | 474 | * 'high' PCI IRQs filled in on demand |
475 | */ | 475 | */ |
476 | irq_desc[i].handler = &no_irq_type; | 476 | irq_desc[i].chip = &no_irq_type; |
477 | } | 477 | } |
478 | } | 478 | } |
479 | } | 479 | } |
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index c768d8a036d0..401b687fef21 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c | |||
@@ -876,15 +876,17 @@ static struct hw_interrupt_type ioapic_edge_type; | |||
876 | #define IOAPIC_EDGE 0 | 876 | #define IOAPIC_EDGE 0 |
877 | #define IOAPIC_LEVEL 1 | 877 | #define IOAPIC_LEVEL 1 |
878 | 878 | ||
879 | static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) | 879 | static void ioapic_register_intr(int irq, int vector, unsigned long trigger) |
880 | { | 880 | { |
881 | unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; | 881 | unsigned idx; |
882 | |||
883 | idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; | ||
882 | 884 | ||
883 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || | 885 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
884 | trigger == IOAPIC_LEVEL) | 886 | trigger == IOAPIC_LEVEL) |
885 | irq_desc[idx].handler = &ioapic_level_type; | 887 | irq_desc[idx].chip = &ioapic_level_type; |
886 | else | 888 | else |
887 | irq_desc[idx].handler = &ioapic_edge_type; | 889 | irq_desc[idx].chip = &ioapic_edge_type; |
888 | set_intr_gate(vector, interrupt[idx]); | 890 | set_intr_gate(vector, interrupt[idx]); |
889 | } | 891 | } |
890 | 892 | ||
@@ -986,7 +988,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in | |||
986 | * The timer IRQ doesn't have to know that behind the | 988 | * The timer IRQ doesn't have to know that behind the |
987 | * scene we have a 8259A-master in AEOI mode ... | 989 | * scene we have a 8259A-master in AEOI mode ... |
988 | */ | 990 | */ |
989 | irq_desc[0].handler = &ioapic_edge_type; | 991 | irq_desc[0].chip = &ioapic_edge_type; |
990 | 992 | ||
991 | /* | 993 | /* |
992 | * Add it to the IO-APIC irq-routing table: | 994 | * Add it to the IO-APIC irq-routing table: |
@@ -1616,6 +1618,13 @@ static void set_ioapic_affinity_vector (unsigned int vector, | |||
1616 | #endif // CONFIG_SMP | 1618 | #endif // CONFIG_SMP |
1617 | #endif // CONFIG_PCI_MSI | 1619 | #endif // CONFIG_PCI_MSI |
1618 | 1620 | ||
1621 | static int ioapic_retrigger(unsigned int irq) | ||
1622 | { | ||
1623 | send_IPI_self(IO_APIC_VECTOR(irq)); | ||
1624 | |||
1625 | return 1; | ||
1626 | } | ||
1627 | |||
1619 | /* | 1628 | /* |
1620 | * Level and edge triggered IO-APIC interrupts need different handling, | 1629 | * Level and edge triggered IO-APIC interrupts need different handling, |
1621 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be | 1630 | * so we use two separate IRQ descriptors. Edge triggered IRQs can be |
@@ -1636,6 +1645,7 @@ static struct hw_interrupt_type ioapic_edge_type __read_mostly = { | |||
1636 | #ifdef CONFIG_SMP | 1645 | #ifdef CONFIG_SMP |
1637 | .set_affinity = set_ioapic_affinity, | 1646 | .set_affinity = set_ioapic_affinity, |
1638 | #endif | 1647 | #endif |
1648 | .retrigger = ioapic_retrigger, | ||
1639 | }; | 1649 | }; |
1640 | 1650 | ||
1641 | static struct hw_interrupt_type ioapic_level_type __read_mostly = { | 1651 | static struct hw_interrupt_type ioapic_level_type __read_mostly = { |
@@ -1649,6 +1659,7 @@ static struct hw_interrupt_type ioapic_level_type __read_mostly = { | |||
1649 | #ifdef CONFIG_SMP | 1659 | #ifdef CONFIG_SMP |
1650 | .set_affinity = set_ioapic_affinity, | 1660 | .set_affinity = set_ioapic_affinity, |
1651 | #endif | 1661 | #endif |
1662 | .retrigger = ioapic_retrigger, | ||
1652 | }; | 1663 | }; |
1653 | 1664 | ||
1654 | static inline void init_IO_APIC_traps(void) | 1665 | static inline void init_IO_APIC_traps(void) |
@@ -1683,7 +1694,7 @@ static inline void init_IO_APIC_traps(void) | |||
1683 | make_8259A_irq(irq); | 1694 | make_8259A_irq(irq); |
1684 | else | 1695 | else |
1685 | /* Strange. Oh, well.. */ | 1696 | /* Strange. Oh, well.. */ |
1686 | irq_desc[irq].handler = &no_irq_type; | 1697 | irq_desc[irq].chip = &no_irq_type; |
1687 | } | 1698 | } |
1688 | } | 1699 | } |
1689 | } | 1700 | } |
@@ -1900,7 +1911,7 @@ static inline void check_timer(void) | |||
1900 | apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); | 1911 | apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); |
1901 | 1912 | ||
1902 | disable_8259A_irq(0); | 1913 | disable_8259A_irq(0); |
1903 | irq_desc[0].handler = &lapic_irq_type; | 1914 | irq_desc[0].chip = &lapic_irq_type; |
1904 | apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ | 1915 | apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ |
1905 | enable_8259A_irq(0); | 1916 | enable_8259A_irq(0); |
1906 | 1917 | ||
diff --git a/arch/x86_64/kernel/irq.c b/arch/x86_64/kernel/irq.c index 59518d4d4358..a1f1df5f7bfc 100644 --- a/arch/x86_64/kernel/irq.c +++ b/arch/x86_64/kernel/irq.c | |||
@@ -79,7 +79,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
79 | for_each_online_cpu(j) | 79 | for_each_online_cpu(j) |
80 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 80 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
81 | #endif | 81 | #endif |
82 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 82 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
83 | 83 | ||
84 | seq_printf(p, " %s", action->name); | 84 | seq_printf(p, " %s", action->name); |
85 | for (action=action->next; action; action = action->next) | 85 | for (action=action->next; action; action = action->next) |
@@ -115,8 +115,14 @@ skip: | |||
115 | */ | 115 | */ |
116 | asmlinkage unsigned int do_IRQ(struct pt_regs *regs) | 116 | asmlinkage unsigned int do_IRQ(struct pt_regs *regs) |
117 | { | 117 | { |
118 | /* high bits used in ret_from_ code */ | 118 | /* high bit used in ret_from_ code */ |
119 | unsigned irq = regs->orig_rax & 0xff; | 119 | unsigned irq = ~regs->orig_rax; |
120 | |||
121 | if (unlikely(irq >= NR_IRQS)) { | ||
122 | printk(KERN_EMERG "%s: cannot handle IRQ %d\n", | ||
123 | __FUNCTION__, irq); | ||
124 | BUG(); | ||
125 | } | ||
120 | 126 | ||
121 | exit_idle(); | 127 | exit_idle(); |
122 | irq_enter(); | 128 | irq_enter(); |
@@ -140,13 +146,13 @@ void fixup_irqs(cpumask_t map) | |||
140 | if (irq == 2) | 146 | if (irq == 2) |
141 | continue; | 147 | continue; |
142 | 148 | ||
143 | cpus_and(mask, irq_affinity[irq], map); | 149 | cpus_and(mask, irq_desc[irq].affinity, map); |
144 | if (any_online_cpu(mask) == NR_CPUS) { | 150 | if (any_online_cpu(mask) == NR_CPUS) { |
145 | printk("Breaking affinity for irq %i\n", irq); | 151 | printk("Breaking affinity for irq %i\n", irq); |
146 | mask = map; | 152 | mask = map; |
147 | } | 153 | } |
148 | if (irq_desc[irq].handler->set_affinity) | 154 | if (irq_desc[irq].chip->set_affinity) |
149 | irq_desc[irq].handler->set_affinity(irq, mask); | 155 | irq_desc[irq].chip->set_affinity(irq, mask); |
150 | else if (irq_desc[irq].action && !(warned++)) | 156 | else if (irq_desc[irq].action && !(warned++)) |
151 | printk("Cannot set affinity for irq %i\n", irq); | 157 | printk("Cannot set affinity for irq %i\n", irq); |
152 | } | 158 | } |
diff --git a/arch/x86_64/kernel/mce.c b/arch/x86_64/kernel/mce.c index acd5816b1a6f..88845674c661 100644 --- a/arch/x86_64/kernel/mce.c +++ b/arch/x86_64/kernel/mce.c | |||
@@ -629,7 +629,7 @@ static __cpuinit void mce_remove_device(unsigned int cpu) | |||
629 | #endif | 629 | #endif |
630 | 630 | ||
631 | /* Get notified when a cpu comes on/off. Be hotplug friendly. */ | 631 | /* Get notified when a cpu comes on/off. Be hotplug friendly. */ |
632 | static int | 632 | static __cpuinit int |
633 | mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) | 633 | mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) |
634 | { | 634 | { |
635 | unsigned int cpu = (unsigned long)hcpu; | 635 | unsigned int cpu = (unsigned long)hcpu; |
@@ -647,7 +647,7 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) | |||
647 | return NOTIFY_OK; | 647 | return NOTIFY_OK; |
648 | } | 648 | } |
649 | 649 | ||
650 | static struct notifier_block mce_cpu_notifier = { | 650 | static struct notifier_block __cpuinitdata mce_cpu_notifier = { |
651 | .notifier_call = mce_cpu_callback, | 651 | .notifier_call = mce_cpu_callback, |
652 | }; | 652 | }; |
653 | 653 | ||
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c index 399489c93132..0ef9cf2bc45e 100644 --- a/arch/x86_64/kernel/nmi.c +++ b/arch/x86_64/kernel/nmi.c | |||
@@ -607,11 +607,13 @@ void set_nmi_callback(nmi_callback_t callback) | |||
607 | vmalloc_sync_all(); | 607 | vmalloc_sync_all(); |
608 | rcu_assign_pointer(nmi_callback, callback); | 608 | rcu_assign_pointer(nmi_callback, callback); |
609 | } | 609 | } |
610 | EXPORT_SYMBOL_GPL(set_nmi_callback); | ||
610 | 611 | ||
611 | void unset_nmi_callback(void) | 612 | void unset_nmi_callback(void) |
612 | { | 613 | { |
613 | nmi_callback = dummy_nmi_callback; | 614 | nmi_callback = dummy_nmi_callback; |
614 | } | 615 | } |
616 | EXPORT_SYMBOL_GPL(unset_nmi_callback); | ||
615 | 617 | ||
616 | #ifdef CONFIG_SYSCTL | 618 | #ifdef CONFIG_SYSCTL |
617 | 619 | ||
diff --git a/arch/x86_64/kernel/smp.c b/arch/x86_64/kernel/smp.c index acee4bc3f6fa..5a1c0a3bf872 100644 --- a/arch/x86_64/kernel/smp.c +++ b/arch/x86_64/kernel/smp.c | |||
@@ -135,10 +135,10 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs) | |||
135 | 135 | ||
136 | cpu = smp_processor_id(); | 136 | cpu = smp_processor_id(); |
137 | /* | 137 | /* |
138 | * orig_rax contains the interrupt vector - 256. | 138 | * orig_rax contains the negated interrupt vector. |
139 | * Use that to determine where the sender put the data. | 139 | * Use that to determine where the sender put the data. |
140 | */ | 140 | */ |
141 | sender = regs->orig_rax + 256 - INVALIDATE_TLB_VECTOR_START; | 141 | sender = ~regs->orig_rax - INVALIDATE_TLB_VECTOR_START; |
142 | f = &per_cpu(flush_state, sender); | 142 | f = &per_cpu(flush_state, sender); |
143 | 143 | ||
144 | if (!cpu_isset(cpu, f->flush_cpumask)) | 144 | if (!cpu_isset(cpu, f->flush_cpumask)) |
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c index 4e9755179ecf..540c0ccbcccc 100644 --- a/arch/x86_64/kernel/smpboot.c +++ b/arch/x86_64/kernel/smpboot.c | |||
@@ -455,10 +455,12 @@ cpumask_t cpu_coregroup_map(int cpu) | |||
455 | struct cpuinfo_x86 *c = cpu_data + cpu; | 455 | struct cpuinfo_x86 *c = cpu_data + cpu; |
456 | /* | 456 | /* |
457 | * For perf, we return last level cache shared map. | 457 | * For perf, we return last level cache shared map. |
458 | * TBD: when power saving sched policy is added, we will return | 458 | * And for power savings, we return cpu_core_map |
459 | * cpu_core_map when power saving policy is enabled | ||
460 | */ | 459 | */ |
461 | return c->llc_shared_map; | 460 | if (sched_mc_power_savings || sched_smt_power_savings) |
461 | return cpu_core_map[cpu]; | ||
462 | else | ||
463 | return c->llc_shared_map; | ||
462 | } | 464 | } |
463 | 465 | ||
464 | /* representing cpus for which sibling maps can be computed */ | 466 | /* representing cpus for which sibling maps can be computed */ |
diff --git a/arch/x86_64/mm/init.c b/arch/x86_64/mm/init.c index 02add1d1dfa8..95bd232ff0cf 100644 --- a/arch/x86_64/mm/init.c +++ b/arch/x86_64/mm/init.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/bootmem.h> | 23 | #include <linux/bootmem.h> |
24 | #include <linux/proc_fs.h> | 24 | #include <linux/proc_fs.h> |
25 | #include <linux/pci.h> | 25 | #include <linux/pci.h> |
26 | #include <linux/poison.h> | ||
26 | #include <linux/dma-mapping.h> | 27 | #include <linux/dma-mapping.h> |
27 | #include <linux/module.h> | 28 | #include <linux/module.h> |
28 | #include <linux/memory_hotplug.h> | 29 | #include <linux/memory_hotplug.h> |
@@ -506,8 +507,6 @@ void __init clear_kernel_mapping(unsigned long address, unsigned long size) | |||
506 | /* | 507 | /* |
507 | * Memory hotplug specific functions | 508 | * Memory hotplug specific functions |
508 | */ | 509 | */ |
509 | #if defined(CONFIG_ACPI_HOTPLUG_MEMORY) || defined(CONFIG_ACPI_HOTPLUG_MEMORY_MODULE) | ||
510 | |||
511 | void online_page(struct page *page) | 510 | void online_page(struct page *page) |
512 | { | 511 | { |
513 | ClearPageReserved(page); | 512 | ClearPageReserved(page); |
@@ -517,31 +516,17 @@ void online_page(struct page *page) | |||
517 | num_physpages++; | 516 | num_physpages++; |
518 | } | 517 | } |
519 | 518 | ||
520 | #ifndef CONFIG_MEMORY_HOTPLUG | 519 | #ifdef CONFIG_MEMORY_HOTPLUG |
521 | /* | 520 | /* |
522 | * Memory Hotadd without sparsemem. The mem_maps have been allocated in advance, | 521 | * XXX: memory_add_physaddr_to_nid() is to find node id from physical address |
523 | * just online the pages. | 522 | * via probe interface of sysfs. If acpi notifies hot-add event, then it |
523 | * can tell node id by searching dsdt. But, probe interface doesn't have | ||
524 | * node id. So, return 0 as node id at this time. | ||
524 | */ | 525 | */ |
525 | int __add_pages(struct zone *z, unsigned long start_pfn, unsigned long nr_pages) | 526 | #ifdef CONFIG_NUMA |
527 | int memory_add_physaddr_to_nid(u64 start) | ||
526 | { | 528 | { |
527 | int err = -EIO; | 529 | return 0; |
528 | unsigned long pfn; | ||
529 | unsigned long total = 0, mem = 0; | ||
530 | for (pfn = start_pfn; pfn < start_pfn + nr_pages; pfn++) { | ||
531 | if (pfn_valid(pfn)) { | ||
532 | online_page(pfn_to_page(pfn)); | ||
533 | err = 0; | ||
534 | mem++; | ||
535 | } | ||
536 | total++; | ||
537 | } | ||
538 | if (!err) { | ||
539 | z->spanned_pages += total; | ||
540 | z->present_pages += mem; | ||
541 | z->zone_pgdat->node_spanned_pages += total; | ||
542 | z->zone_pgdat->node_present_pages += mem; | ||
543 | } | ||
544 | return err; | ||
545 | } | 530 | } |
546 | #endif | 531 | #endif |
547 | 532 | ||
@@ -549,9 +534,9 @@ int __add_pages(struct zone *z, unsigned long start_pfn, unsigned long nr_pages) | |||
549 | * Memory is added always to NORMAL zone. This means you will never get | 534 | * Memory is added always to NORMAL zone. This means you will never get |
550 | * additional DMA/DMA32 memory. | 535 | * additional DMA/DMA32 memory. |
551 | */ | 536 | */ |
552 | int add_memory(u64 start, u64 size) | 537 | int arch_add_memory(int nid, u64 start, u64 size) |
553 | { | 538 | { |
554 | struct pglist_data *pgdat = NODE_DATA(0); | 539 | struct pglist_data *pgdat = NODE_DATA(nid); |
555 | struct zone *zone = pgdat->node_zones + MAX_NR_ZONES-2; | 540 | struct zone *zone = pgdat->node_zones + MAX_NR_ZONES-2; |
556 | unsigned long start_pfn = start >> PAGE_SHIFT; | 541 | unsigned long start_pfn = start >> PAGE_SHIFT; |
557 | unsigned long nr_pages = size >> PAGE_SHIFT; | 542 | unsigned long nr_pages = size >> PAGE_SHIFT; |
@@ -568,7 +553,7 @@ error: | |||
568 | printk("%s: Problem encountered in __add_pages!\n", __func__); | 553 | printk("%s: Problem encountered in __add_pages!\n", __func__); |
569 | return ret; | 554 | return ret; |
570 | } | 555 | } |
571 | EXPORT_SYMBOL_GPL(add_memory); | 556 | EXPORT_SYMBOL_GPL(arch_add_memory); |
572 | 557 | ||
573 | int remove_memory(u64 start, u64 size) | 558 | int remove_memory(u64 start, u64 size) |
574 | { | 559 | { |
@@ -576,7 +561,33 @@ int remove_memory(u64 start, u64 size) | |||
576 | } | 561 | } |
577 | EXPORT_SYMBOL_GPL(remove_memory); | 562 | EXPORT_SYMBOL_GPL(remove_memory); |
578 | 563 | ||
579 | #endif | 564 | #else /* CONFIG_MEMORY_HOTPLUG */ |
565 | /* | ||
566 | * Memory Hotadd without sparsemem. The mem_maps have been allocated in advance, | ||
567 | * just online the pages. | ||
568 | */ | ||
569 | int __add_pages(struct zone *z, unsigned long start_pfn, unsigned long nr_pages) | ||
570 | { | ||
571 | int err = -EIO; | ||
572 | unsigned long pfn; | ||
573 | unsigned long total = 0, mem = 0; | ||
574 | for (pfn = start_pfn; pfn < start_pfn + nr_pages; pfn++) { | ||
575 | if (pfn_valid(pfn)) { | ||
576 | online_page(pfn_to_page(pfn)); | ||
577 | err = 0; | ||
578 | mem++; | ||
579 | } | ||
580 | total++; | ||
581 | } | ||
582 | if (!err) { | ||
583 | z->spanned_pages += total; | ||
584 | z->present_pages += mem; | ||
585 | z->zone_pgdat->node_spanned_pages += total; | ||
586 | z->zone_pgdat->node_present_pages += mem; | ||
587 | } | ||
588 | return err; | ||
589 | } | ||
590 | #endif /* CONFIG_MEMORY_HOTPLUG */ | ||
580 | 591 | ||
581 | static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel, kcore_modules, | 592 | static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel, kcore_modules, |
582 | kcore_vsyscall; | 593 | kcore_vsyscall; |
@@ -650,7 +661,8 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end) | |||
650 | for (addr = begin; addr < end; addr += PAGE_SIZE) { | 661 | for (addr = begin; addr < end; addr += PAGE_SIZE) { |
651 | ClearPageReserved(virt_to_page(addr)); | 662 | ClearPageReserved(virt_to_page(addr)); |
652 | init_page_count(virt_to_page(addr)); | 663 | init_page_count(virt_to_page(addr)); |
653 | memset((void *)(addr & ~(PAGE_SIZE-1)), 0xcc, PAGE_SIZE); | 664 | memset((void *)(addr & ~(PAGE_SIZE-1)), |
665 | POISON_FREE_INITMEM, PAGE_SIZE); | ||
654 | free_page(addr); | 666 | free_page(addr); |
655 | totalram_pages++; | 667 | totalram_pages++; |
656 | } | 668 | } |
@@ -658,7 +670,8 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end) | |||
658 | 670 | ||
659 | void free_initmem(void) | 671 | void free_initmem(void) |
660 | { | 672 | { |
661 | memset(__initdata_begin, 0xba, __initdata_end - __initdata_begin); | 673 | memset(__initdata_begin, POISON_FREE_INITDATA, |
674 | __initdata_end - __initdata_begin); | ||
662 | free_init_pages("unused kernel memory", | 675 | free_init_pages("unused kernel memory", |
663 | (unsigned long)(&__init_begin), | 676 | (unsigned long)(&__init_begin), |
664 | (unsigned long)(&__init_end)); | 677 | (unsigned long)(&__init_end)); |
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c index 51f9bed455fa..1cf744ee0959 100644 --- a/arch/xtensa/kernel/irq.c +++ b/arch/xtensa/kernel/irq.c | |||
@@ -100,7 +100,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
100 | for_each_online_cpu(j) | 100 | for_each_online_cpu(j) |
101 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 101 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); |
102 | #endif | 102 | #endif |
103 | seq_printf(p, " %14s", irq_desc[i].handler->typename); | 103 | seq_printf(p, " %14s", irq_desc[i].chip->typename); |
104 | seq_printf(p, " %s", action->name); | 104 | seq_printf(p, " %s", action->name); |
105 | 105 | ||
106 | for (action=action->next; action; action = action->next) | 106 | for (action=action->next; action; action = action->next) |
@@ -181,7 +181,7 @@ void __init init_IRQ(void) | |||
181 | int i; | 181 | int i; |
182 | 182 | ||
183 | for (i=0; i < XTENSA_NR_IRQS; i++) | 183 | for (i=0; i < XTENSA_NR_IRQS; i++) |
184 | irq_desc[i].handler = &xtensa_irq_type; | 184 | irq_desc[i].chip = &xtensa_irq_type; |
185 | 185 | ||
186 | cached_irq_mask = 0; | 186 | cached_irq_mask = 0; |
187 | 187 | ||
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c index c6f471b9eaa0..eda029fc8972 100644 --- a/arch/xtensa/kernel/pci.c +++ b/arch/xtensa/kernel/pci.c | |||
@@ -71,13 +71,13 @@ static int pci_bus_count; | |||
71 | * which might have be mirrored at 0x0100-0x03ff.. | 71 | * which might have be mirrored at 0x0100-0x03ff.. |
72 | */ | 72 | */ |
73 | void | 73 | void |
74 | pcibios_align_resource(void *data, struct resource *res, unsigned long size, | 74 | pcibios_align_resource(void *data, struct resource *res, resource_size_t size, |
75 | unsigned long align) | 75 | resource_size_t align) |
76 | { | 76 | { |
77 | struct pci_dev *dev = data; | 77 | struct pci_dev *dev = data; |
78 | 78 | ||
79 | if (res->flags & IORESOURCE_IO) { | 79 | if (res->flags & IORESOURCE_IO) { |
80 | unsigned long start = res->start; | 80 | resource_size_t start = res->start; |
81 | 81 | ||
82 | if (size > 0x100) { | 82 | if (size > 0x100) { |
83 | printk(KERN_ERR "PCI: I/O Region %s/%d too large" | 83 | printk(KERN_ERR "PCI: I/O Region %s/%d too large" |
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c index 937d81f62f43..fe14909f45e0 100644 --- a/arch/xtensa/kernel/time.c +++ b/arch/xtensa/kernel/time.c | |||
@@ -29,7 +29,7 @@ | |||
29 | 29 | ||
30 | extern volatile unsigned long wall_jiffies; | 30 | extern volatile unsigned long wall_jiffies; |
31 | 31 | ||
32 | spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED; | 32 | DEFINE_SPINLOCK(rtc_lock); |
33 | EXPORT_SYMBOL(rtc_lock); | 33 | EXPORT_SYMBOL(rtc_lock); |
34 | 34 | ||
35 | 35 | ||
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c index 225d64d73f04..27e409089a7b 100644 --- a/arch/xtensa/kernel/traps.c +++ b/arch/xtensa/kernel/traps.c | |||
@@ -461,7 +461,7 @@ void show_code(unsigned int *pc) | |||
461 | } | 461 | } |
462 | } | 462 | } |
463 | 463 | ||
464 | spinlock_t die_lock = SPIN_LOCK_UNLOCKED; | 464 | DEFINE_SPINLOCK(die_lock); |
465 | 465 | ||
466 | void die(const char * str, struct pt_regs * regs, long err) | 466 | void die(const char * str, struct pt_regs * regs, long err) |
467 | { | 467 | { |