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-rw-r--r--arch/mips/au1000/db1x00/Makefile8
-rw-r--r--arch/mips/au1000/db1x00/board_setup.c61
-rw-r--r--arch/mips/au1000/db1x00/init.c11
-rw-r--r--arch/mips/au1000/db1x00/irqmap.c22
4 files changed, 50 insertions, 52 deletions
diff --git a/arch/mips/au1000/db1x00/Makefile b/arch/mips/au1000/db1x00/Makefile
index 51d62bd5d900..274db3b55d82 100644
--- a/arch/mips/au1000/db1x00/Makefile
+++ b/arch/mips/au1000/db1x00/Makefile
@@ -1,8 +1,8 @@
1# 1#
2# Copyright 2000 MontaVista Software Inc. 2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com 4#
5# Makefile for the Alchemy Semiconductor DBAu1xx0 boards.
5# 6#
6# Makefile for the Alchemy Semiconductor Db1x00 board.
7 7
8lib-y := init.o board_setup.o irqmap.o 8lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c
index b7dcbad5c586..9e5ccbbfcedd 100644
--- a/arch/mips/au1000/db1x00/board_setup.c
+++ b/arch/mips/au1000/db1x00/board_setup.c
@@ -3,9 +3,8 @@
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Db1x00 board setup. 4 * Alchemy Db1x00 board setup.
5 * 5 *
6 * Copyright 2000 MontaVista Software Inc. 6 * Copyright 2000, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -37,49 +36,49 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
37 36
38void board_reset(void) 37void board_reset(void)
39{ 38{
40 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 39 /* Hit BCSR.SW_RESET[RESET] */
41 bcsr->swreset = 0x0000; 40 bcsr->swreset = 0x0000;
42} 41}
43 42
44void __init board_setup(void) 43void __init board_setup(void)
45{ 44{
46 u32 pin_func; 45 u32 pin_func = 0;
47 46
48 pin_func = 0; 47 /* Not valid for Au1550 */
49 /* not valid for 1550 */ 48#if defined(CONFIG_IRDA) && \
50 49 (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
51#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) 50 /* Set IRFIRSEL instead of GPIO15 */
52 /* set IRFIRSEL instead of GPIO15 */ 51 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
53 pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8));
54 au_writel(pin_func, SYS_PINFUNC); 52 au_writel(pin_func, SYS_PINFUNC);
55 /* power off until the driver is in use */ 53 /* Power off until the driver is in use */
56 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK; 54 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
57 bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF; 55 bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF;
58 au_sync(); 56 au_sync();
59#endif 57#endif
60 bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */ 58 bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */
61 59
62#ifdef CONFIG_MIPS_MIRAGE 60#ifdef CONFIG_MIPS_MIRAGE
63 /* enable GPIO[31:0] inputs */ 61 /* Enable GPIO[31:0] inputs */
64 au_writel(0, SYS_PININPUTEN); 62 au_writel(0, SYS_PININPUTEN);
65 63
66 /* GPIO[20] is output, tristate the other input primary GPIO's */ 64 /* GPIO[20] is output, tristate the other input primary GPIOs */
67 au_writel((u32)(~(1<<20)), SYS_TRIOUTCLR); 65 au_writel(~(1 << 20), SYS_TRIOUTCLR);
68 66
69 /* set GPIO[210:208] instead of SSI_0 */ 67 /* Set GPIO[210:208] instead of SSI_0 */
70 pin_func = au_readl(SYS_PINFUNC) | (u32)(1); 68 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
71 69
72 /* set GPIO[215:211] for LED's */ 70 /* Set GPIO[215:211] for LEDs */
73 pin_func |= (u32)((5<<2)); 71 pin_func |= 5 << 2;
74 72
75 /* set GPIO[214:213] for more LED's */ 73 /* Set GPIO[214:213] for more LEDs */
76 pin_func |= (u32)((5<<12)); 74 pin_func |= 5 << 12;
77 75
78 /* set GPIO[207:200] instead of PCMCIA/LCD */ 76 /* Set GPIO[207:200] instead of PCMCIA/LCD */
79 pin_func |= (u32)((3<<17)); 77 pin_func |= SYS_PF_LCD | SYS_PF_PC;
80 au_writel(pin_func, SYS_PINFUNC); 78 au_writel(pin_func, SYS_PINFUNC);
81 79
82 /* Enable speaker amplifier. This should 80 /*
81 * Enable speaker amplifier. This should
83 * be part of the audio driver. 82 * be part of the audio driver.
84 */ 83 */
85 au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR); 84 au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR);
@@ -89,21 +88,21 @@ void __init board_setup(void)
89 au_sync(); 88 au_sync();
90 89
91#ifdef CONFIG_MIPS_DB1000 90#ifdef CONFIG_MIPS_DB1000
92 printk("AMD Alchemy Au1000/Db1000 Board\n"); 91 printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
93#endif 92#endif
94#ifdef CONFIG_MIPS_DB1500 93#ifdef CONFIG_MIPS_DB1500
95 printk("AMD Alchemy Au1500/Db1500 Board\n"); 94 printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
96#endif 95#endif
97#ifdef CONFIG_MIPS_DB1100 96#ifdef CONFIG_MIPS_DB1100
98 printk("AMD Alchemy Au1100/Db1100 Board\n"); 97 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
99#endif 98#endif
100#ifdef CONFIG_MIPS_BOSPORUS 99#ifdef CONFIG_MIPS_BOSPORUS
101 printk("AMD Alchemy Bosporus Board\n"); 100 printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
102#endif 101#endif
103#ifdef CONFIG_MIPS_MIRAGE 102#ifdef CONFIG_MIPS_MIRAGE
104 printk("AMD Alchemy Mirage Board\n"); 103 printk(KERN_INFO "AMD Alchemy Mirage Board\n");
105#endif 104#endif
106#ifdef CONFIG_MIPS_DB1550 105#ifdef CONFIG_MIPS_DB1550
107 printk("AMD Alchemy Au1550/Db1550 Board\n"); 106 printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
108#endif 107#endif
109} 108}
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index d3b967caf70c..5ebe0de5e459 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -2,9 +2,8 @@
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * PB1000 board setup 3 * PB1000 board setup
4 * 4 *
5 * Copyright 2001 MontaVista Software Inc. 5 * Copyright 2001, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -49,8 +48,8 @@ void __init prom_init(void)
49 unsigned long memsize; 48 unsigned long memsize;
50 49
51 prom_argc = fw_arg0; 50 prom_argc = fw_arg0;
52 prom_argv = (char **) fw_arg1; 51 prom_argv = (char **)fw_arg1;
53 prom_envp = (char **) fw_arg2; 52 prom_envp = (char **)fw_arg2;
54 53
55 prom_init_cmdline(); 54 prom_init_cmdline();
56 55
@@ -58,6 +57,6 @@ void __init prom_init(void)
58 if (!memsize_str) 57 if (!memsize_str)
59 memsize = 0x04000000; 58 memsize = 0x04000000;
60 else 59 else
61 memsize = simple_strtol(memsize_str, NULL, 0); 60 memsize = strict_strtol(memsize_str, 0, NULL);
62 add_memory_region(0, memsize, BOOT_MEM_RAM); 61 add_memory_region(0, memsize, BOOT_MEM_RAM);
63} 62}
diff --git a/arch/mips/au1000/db1x00/irqmap.c b/arch/mips/au1000/db1x00/irqmap.c
index eaa50c7b6341..94c090e8bf7a 100644
--- a/arch/mips/au1000/db1x00/irqmap.c
+++ b/arch/mips/au1000/db1x00/irqmap.c
@@ -32,32 +32,32 @@
32 32
33#ifdef CONFIG_MIPS_DB1500 33#ifdef CONFIG_MIPS_DB1500
34char irq_tab_alchemy[][5] __initdata = { 34char irq_tab_alchemy[][5] __initdata = {
35 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT371 */ 35 [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT371 */
36 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ 36 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
37}; 37};
38#endif 38#endif
39 39
40#ifdef CONFIG_MIPS_BOSPORUS 40#ifdef CONFIG_MIPS_BOSPORUS
41char irq_tab_alchemy[][5] __initdata = { 41char irq_tab_alchemy[][5] __initdata = {
42 [11] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 11 - miniPCI */ 42 [11] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 11 - miniPCI */
43 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - SN1741 */ 43 [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - SN1741 */
44 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ 44 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
45}; 45};
46#endif 46#endif
47 47
48#ifdef CONFIG_MIPS_MIRAGE 48#ifdef CONFIG_MIPS_MIRAGE
49char irq_tab_alchemy[][5] __initdata = { 49char irq_tab_alchemy[][5] __initdata = {
50 [11] = { -1, INTD, INTX, INTX, INTX}, /* IDSEL 11 - SMI VGX */ 50 [11] = { -1, INTD, INTX, INTX, INTX }, /* IDSEL 11 - SMI VGX */
51 [12] = { -1, INTX, INTX, INTC, INTX}, /* IDSEL 12 - PNX1300 */ 51 [12] = { -1, INTX, INTX, INTC, INTX }, /* IDSEL 12 - PNX1300 */
52 [13] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 13 - miniPCI */ 52 [13] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 13 - miniPCI */
53}; 53};
54#endif 54#endif
55 55
56#ifdef CONFIG_MIPS_DB1550 56#ifdef CONFIG_MIPS_DB1550
57char irq_tab_alchemy[][5] __initdata = { 57char irq_tab_alchemy[][5] __initdata = {
58 [11] = { -1, INTC, INTX, INTX, INTX}, /* IDSEL 11 - on-board HPT371 */ 58 [11] = { -1, INTC, INTX, INTX, INTX }, /* IDSEL 11 - on-board HPT371 */
59 [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */ 59 [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */
60 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */ 60 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */
61}; 61};
62#endif 62#endif
63 63