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-rw-r--r--arch/sh/Kconfig6
-rw-r--r--arch/sh/Kconfig.debug1
-rw-r--r--arch/sh/boards/board-urquell.c7
-rw-r--r--arch/sh/boards/mach-highlander/setup.c52
-rw-r--r--arch/sh/boards/mach-rsk/devices-rsk7203.c8
-rw-r--r--arch/sh/boards/mach-se/7780/irq.c1
-rw-r--r--arch/sh/configs/r7780mp_defconfig143
-rw-r--r--arch/sh/drivers/pci/Makefile1
-rw-r--r--arch/sh/drivers/pci/ops-dreamcast.c1
-rw-r--r--arch/sh/drivers/pci/ops-sh7786.c134
-rw-r--r--arch/sh/drivers/pci/pci.c14
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.h589
-rw-r--r--arch/sh/include/asm/atomic-irq.h24
-rw-r--r--arch/sh/include/asm/atomic.h2
-rw-r--r--arch/sh/include/asm/checksum.h2
-rw-r--r--arch/sh/include/asm/checksum_64.h78
-rw-r--r--arch/sh/include/asm/current.h21
-rw-r--r--arch/sh/include/asm/dma.h10
-rw-r--r--arch/sh/include/asm/ipcbuf.h30
-rw-r--r--arch/sh/include/asm/irq.h2
-rw-r--r--arch/sh/include/asm/mman.h18
-rw-r--r--arch/sh/include/asm/mmu_context.h22
-rw-r--r--arch/sh/include/asm/module.h12
-rw-r--r--arch/sh/include/asm/msgbuf.h32
-rw-r--r--arch/sh/include/asm/param.h23
-rw-r--r--arch/sh/include/asm/parport.h17
-rw-r--r--arch/sh/include/asm/perf_counter.h7
-rw-r--r--arch/sh/include/asm/posix_types_32.h119
-rw-r--r--arch/sh/include/asm/posix_types_64.h127
-rw-r--r--arch/sh/include/asm/scatterlist.h24
-rw-r--r--arch/sh/include/asm/sembuf.h26
-rw-r--r--arch/sh/include/asm/serial.h20
-rw-r--r--arch/sh/include/asm/setup.h2
-rw-r--r--arch/sh/include/asm/shmbuf.h43
-rw-r--r--arch/sh/include/asm/signal.h147
-rw-r--r--arch/sh/include/asm/smp.h3
-rw-r--r--arch/sh/include/asm/socket.h61
-rw-r--r--arch/sh/include/asm/swab.h3
-rw-r--r--arch/sh/include/asm/termbits.h199
-rw-r--r--arch/sh/include/asm/termios.h91
-rw-r--r--arch/sh/include/asm/timex.h7
-rw-r--r--arch/sh/include/asm/topology.h3
-rw-r--r--arch/sh/include/asm/types.h16
-rw-r--r--arch/sh/include/asm/ucontext.h13
-rw-r--r--arch/sh/include/asm/unaligned.h14
-rw-r--r--arch/sh/include/asm/unistd_32.h3
-rw-r--r--arch/sh/include/asm/unistd_64.h3
-rw-r--r--arch/sh/include/mach-common/mach/highlander.h3
-rw-r--r--arch/sh/kernel/cpu/clock-cpg.c16
-rw-r--r--arch/sh/kernel/cpu/sh4a/smp-shx3.c5
-rw-r--r--arch/sh/kernel/ftrace.c60
-rw-r--r--arch/sh/kernel/sh_ksyms_64.c7
-rw-r--r--arch/sh/kernel/smp.c10
-rw-r--r--arch/sh/kernel/syscalls_32.S1
-rw-r--r--arch/sh/kernel/syscalls_64.S1
-rw-r--r--arch/sh/kernel/time.c27
-rw-r--r--arch/sh/kernel/traps.c1
-rw-r--r--arch/sh/lib64/Makefile2
-rw-r--r--arch/sh/lib64/c-checksum.c214
59 files changed, 1074 insertions, 1454 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 586cd045e2db..ac1c620d1c7d 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -15,7 +15,9 @@ config SUPERH
15 select HAVE_IOREMAP_PROT if MMU 15 select HAVE_IOREMAP_PROT if MMU
16 select HAVE_ARCH_TRACEHOOK 16 select HAVE_ARCH_TRACEHOOK
17 select HAVE_DMA_API_DEBUG 17 select HAVE_DMA_API_DEBUG
18 select HAVE_PERF_COUNTER
18 select RTC_LIB 19 select RTC_LIB
20 select GENERIC_ATOMIC64
19 help 21 help
20 The SuperH is a RISC processor targeted for use in embedded systems 22 The SuperH is a RISC processor targeted for use in embedded systems
21 and consumer electronics; it was also used in the Sega Dreamcast 23 and consumer electronics; it was also used in the Sega Dreamcast
@@ -50,6 +52,10 @@ config GENERIC_BUG
50 def_bool y 52 def_bool y
51 depends on BUG && SUPERH32 53 depends on BUG && SUPERH32
52 54
55config GENERIC_CSUM
56 def_bool y
57 depends on SUPERH64
58
53config GENERIC_FIND_NEXT_BIT 59config GENERIC_FIND_NEXT_BIT
54 def_bool y 60 def_bool y
55 61
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 8179cc9be9a4..8ece0b5bd028 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -39,6 +39,7 @@ config EARLY_SCIF_CONSOLE_PORT
39 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ 39 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
40 CPU_SUBTYPE_SH7343 40 CPU_SUBTYPE_SH7343
41 default "0xffea0000" if CPU_SUBTYPE_SH7785 41 default "0xffea0000" if CPU_SUBTYPE_SH7785
42 default "0xffeb0000" if CPU_SUBTYPE_SH7786
42 default "0xfffe8000" if CPU_SUBTYPE_SH7203 43 default "0xfffe8000" if CPU_SUBTYPE_SH7203
43 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 44 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
44 default "0xffe80000" if CPU_SH4 45 default "0xffe80000" if CPU_SH4
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index beb88c4da2c1..36b8bac9b124 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -2,6 +2,7 @@
2 * Renesas Technology Corp. SH7786 Urquell Support. 2 * Renesas Technology Corp. SH7786 Urquell Support.
3 * 3 *
4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> 4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 * Copyright (C) 2009 Paul Mundt
5 * 6 *
6 * Based on board-sh7785lcr.c 7 * Based on board-sh7785lcr.c
7 * Copyright (C) 2008 Yoshihiro Shimoda 8 * Copyright (C) 2008 Yoshihiro Shimoda
@@ -178,6 +179,11 @@ static void __init urquell_init_irq(void)
178 plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK); 179 plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
179} 180}
180 181
182static int urquell_mode_pins(void)
183{
184 return __raw_readw(UBOARDREG(MDSWMR));
185}
186
181/* Initialize the board */ 187/* Initialize the board */
182static void __init urquell_setup(char **cmdline_p) 188static void __init urquell_setup(char **cmdline_p)
183{ 189{
@@ -193,4 +199,5 @@ static struct sh_machine_vector mv_urquell __initmv = {
193 .mv_name = "Urquell", 199 .mv_name = "Urquell",
194 .mv_setup = urquell_setup, 200 .mv_setup = urquell_setup,
195 .mv_init_irq = urquell_init_irq, 201 .mv_init_irq = urquell_init_irq,
202 .mv_mode_pins = urquell_mode_pins,
196}; 203};
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 920ea76abac8..1639f8915000 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -17,6 +17,7 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/ata_platform.h> 18#include <linux/ata_platform.h>
19#include <linux/types.h> 19#include <linux/types.h>
20#include <linux/mtd/physmap.h>
20#include <linux/i2c.h> 21#include <linux/i2c.h>
21#include <linux/irq.h> 22#include <linux/irq.h>
22#include <linux/interrupt.h> 23#include <linux/interrupt.h>
@@ -184,6 +185,53 @@ static struct platform_device ax88796_device = {
184 .resource = ax88796_resources, 185 .resource = ax88796_resources,
185}; 186};
186 187
188static struct mtd_partition nor_flash_partitions[] = {
189 {
190 .name = "loader",
191 .offset = 0x00000000,
192 .size = 512 * 1024,
193 },
194 {
195 .name = "bootenv",
196 .offset = MTDPART_OFS_APPEND,
197 .size = 512 * 1024,
198 },
199 {
200 .name = "kernel",
201 .offset = MTDPART_OFS_APPEND,
202 .size = 4 * 1024 * 1024,
203 },
204 {
205 .name = "data",
206 .offset = MTDPART_OFS_APPEND,
207 .size = MTDPART_SIZ_FULL,
208 },
209};
210
211static struct physmap_flash_data nor_flash_data = {
212 .width = 4,
213 .parts = nor_flash_partitions,
214 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
215};
216
217/* This config is flash board for mass production. */
218static struct resource nor_flash_resources[] = {
219 [0] = {
220 .start = PA_NORFLASH_ADDR,
221 .end = PA_NORFLASH_ADDR + PA_NORFLASH_SIZE - 1,
222 .flags = IORESOURCE_MEM,
223 }
224};
225
226static struct platform_device nor_flash_device = {
227 .name = "physmap-flash",
228 .dev = {
229 .platform_data = &nor_flash_data,
230 },
231 .num_resources = ARRAY_SIZE(nor_flash_resources),
232 .resource = nor_flash_resources,
233};
234
187static struct resource smbus_resources[] = { 235static struct resource smbus_resources[] = {
188 [0] = { 236 [0] = {
189 .start = PA_SMCR, 237 .start = PA_SMCR,
@@ -215,6 +263,7 @@ static struct platform_device *r7780rp_devices[] __initdata = {
215 &m66592_usb_peripheral_device, 263 &m66592_usb_peripheral_device,
216 &heartbeat_device, 264 &heartbeat_device,
217 &smbus_device, 265 &smbus_device,
266 &nor_flash_device,
218#ifndef CONFIG_SH_R7780RP 267#ifndef CONFIG_SH_R7780RP
219 &ax88796_device, 268 &ax88796_device,
220#endif 269#endif
@@ -253,9 +302,10 @@ device_initcall(r7780rp_devices_setup);
253/* 302/*
254 * Platform specific clocks 303 * Platform specific clocks
255 */ 304 */
256static void ivdr_clk_enable(struct clk *clk) 305static int ivdr_clk_enable(struct clk *clk)
257{ 306{
258 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); 307 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
308 return 0;
259} 309}
260 310
261static void ivdr_clk_disable(struct clk *clk) 311static void ivdr_clk_disable(struct clk *clk)
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index d8a65ea91665..4af3a771c058 100644
--- a/arch/sh/boards/mach-rsk/devices-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -26,13 +26,13 @@ static struct smsc911x_platform_config smsc911x_config = {
26 .phy_interface = PHY_INTERFACE_MODE_MII, 26 .phy_interface = PHY_INTERFACE_MODE_MII,
27 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 27 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
28 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, 28 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
29 .flags = SMSC911X_USE_16BIT, 29 .flags = SMSC911X_USE_32BIT | SMSC911X_SWAP_FIFO,
30}; 30};
31 31
32static struct resource smsc911x_resources[] = { 32static struct resource smsc911x_resources[] = {
33 [0] = { 33 [0] = {
34 .start = 0x24000000, 34 .start = 0x24000000,
35 .end = 0x24000000 + 0x100, 35 .end = 0x240000ff,
36 .flags = IORESOURCE_MEM, 36 .flags = IORESOURCE_MEM,
37 }, 37 },
38 [1] = { 38 [1] = {
@@ -99,6 +99,10 @@ static int __init rsk7203_devices_setup(void)
99 gpio_request(GPIO_FN_TXD0, NULL); 99 gpio_request(GPIO_FN_TXD0, NULL);
100 gpio_request(GPIO_FN_RXD0, NULL); 100 gpio_request(GPIO_FN_RXD0, NULL);
101 101
102 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */
103 ctrl_outl(0x36db0400, 0xfffc0008); /* CS1BCR */
104 gpio_request(GPIO_FN_IRQ0_PB, NULL);
105
102 return platform_add_devices(rsk7203_devices, 106 return platform_add_devices(rsk7203_devices,
103 ARRAY_SIZE(rsk7203_devices)); 107 ARRAY_SIZE(rsk7203_devices));
104} 108}
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
index b8d43b638fcf..121744c08714 100644
--- a/arch/sh/boards/mach-se/7780/irq.c
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -12,7 +12,6 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/io.h> 15#include <linux/io.h>
17#include <mach-se/mach/se7780.h> 16#include <mach-se/mach/se7780.h>
18 17
diff --git a/arch/sh/configs/r7780mp_defconfig b/arch/sh/configs/r7780mp_defconfig
index 943da63a3852..d393d9e5bddd 100644
--- a/arch/sh/configs/r7780mp_defconfig
+++ b/arch/sh/configs/r7780mp_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.30-rc3 3# Linux kernel version: 2.6.30
4# Mon Apr 27 12:53:28 2009 4# Tue Jun 16 16:08:44 2009
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -20,6 +20,7 @@ CONFIG_GENERIC_CLOCKEVENTS=y
20# CONFIG_ARCH_SUSPEND_POSSIBLE is not set 20# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
21CONFIG_ARCH_HIBERNATION_POSSIBLE=y 21CONFIG_ARCH_HIBERNATION_POSSIBLE=y
22CONFIG_SYS_SUPPORTS_PCI=y 22CONFIG_SYS_SUPPORTS_PCI=y
23CONFIG_SYS_SUPPORTS_TMU=y
23CONFIG_STACKTRACE_SUPPORT=y 24CONFIG_STACKTRACE_SUPPORT=y
24CONFIG_LOCKDEP_SUPPORT=y 25CONFIG_LOCKDEP_SUPPORT=y
25CONFIG_HAVE_LATENCYTOP_SUPPORT=y 26CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@@ -92,6 +93,10 @@ CONFIG_TIMERFD=y
92CONFIG_EVENTFD=y 93CONFIG_EVENTFD=y
93CONFIG_SHMEM=y 94CONFIG_SHMEM=y
94CONFIG_AIO=y 95CONFIG_AIO=y
96
97#
98# Performance Counters
99#
95CONFIG_VM_EVENT_COUNTERS=y 100CONFIG_VM_EVENT_COUNTERS=y
96CONFIG_PCI_QUIRKS=y 101CONFIG_PCI_QUIRKS=y
97CONFIG_COMPAT_BRK=y 102CONFIG_COMPAT_BRK=y
@@ -100,7 +105,7 @@ CONFIG_SLAB=y
100# CONFIG_SLOB is not set 105# CONFIG_SLOB is not set
101CONFIG_PROFILING=y 106CONFIG_PROFILING=y
102CONFIG_TRACEPOINTS=y 107CONFIG_TRACEPOINTS=y
103# CONFIG_MARKERS is not set 108CONFIG_MARKERS=y
104CONFIG_OPROFILE=m 109CONFIG_OPROFILE=m
105CONFIG_HAVE_OPROFILE=y 110CONFIG_HAVE_OPROFILE=y
106# CONFIG_KPROBES is not set 111# CONFIG_KPROBES is not set
@@ -185,6 +190,7 @@ CONFIG_CPU_SUBTYPE_SH7780=y
185CONFIG_QUICKLIST=y 190CONFIG_QUICKLIST=y
186CONFIG_MMU=y 191CONFIG_MMU=y
187CONFIG_PAGE_OFFSET=0x80000000 192CONFIG_PAGE_OFFSET=0x80000000
193CONFIG_FORCE_MAX_ZONEORDER=11
188CONFIG_MEMORY_START=0x08000000 194CONFIG_MEMORY_START=0x08000000
189CONFIG_MEMORY_SIZE=0x08000000 195CONFIG_MEMORY_SIZE=0x08000000
190# CONFIG_29BIT is not set 196# CONFIG_29BIT is not set
@@ -203,7 +209,6 @@ CONFIG_PAGE_SIZE_4KB=y
203# CONFIG_PAGE_SIZE_8KB is not set 209# CONFIG_PAGE_SIZE_8KB is not set
204# CONFIG_PAGE_SIZE_16KB is not set 210# CONFIG_PAGE_SIZE_16KB is not set
205# CONFIG_PAGE_SIZE_64KB is not set 211# CONFIG_PAGE_SIZE_64KB is not set
206CONFIG_ENTRY_OFFSET=0x00001000
207CONFIG_HUGETLB_PAGE_SIZE_64K=y 212CONFIG_HUGETLB_PAGE_SIZE_64K=y
208# CONFIG_HUGETLB_PAGE_SIZE_256K is not set 213# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
209# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set 214# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
@@ -225,6 +230,7 @@ CONFIG_NR_QUICK=2
225CONFIG_UNEVICTABLE_LRU=y 230CONFIG_UNEVICTABLE_LRU=y
226CONFIG_HAVE_MLOCK=y 231CONFIG_HAVE_MLOCK=y
227CONFIG_HAVE_MLOCKED_PAGE_BIT=y 232CONFIG_HAVE_MLOCKED_PAGE_BIT=y
233CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
228 234
229# 235#
230# Cache configuration 236# Cache configuration
@@ -258,9 +264,10 @@ CONFIG_SH_R7780MP=y
258# 264#
259# Timer and clock configuration 265# Timer and clock configuration
260# 266#
261CONFIG_SH_TMU=y 267CONFIG_SH_TIMER_TMU=y
262CONFIG_SH_TIMER_IRQ=28
263CONFIG_SH_PCLK_FREQ=33333333 268CONFIG_SH_PCLK_FREQ=33333333
269CONFIG_SH_CLK_CPG=y
270CONFIG_SH_CLK_CPG_LEGACY=y
264# CONFIG_NO_HZ is not set 271# CONFIG_NO_HZ is not set
265# CONFIG_HIGH_RES_TIMERS is not set 272# CONFIG_HIGH_RES_TIMERS is not set
266CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 273CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -301,12 +308,14 @@ CONFIG_KEXEC=y
301# CONFIG_PREEMPT_VOLUNTARY is not set 308# CONFIG_PREEMPT_VOLUNTARY is not set
302CONFIG_PREEMPT=y 309CONFIG_PREEMPT=y
303CONFIG_GUSA=y 310CONFIG_GUSA=y
311# CONFIG_SPARSE_IRQ is not set
304 312
305# 313#
306# Boot options 314# Boot options
307# 315#
308CONFIG_ZERO_PAGE_OFFSET=0x00001000 316CONFIG_ZERO_PAGE_OFFSET=0x00001000
309CONFIG_BOOT_LINK_OFFSET=0x00800000 317CONFIG_BOOT_LINK_OFFSET=0x00800000
318CONFIG_ENTRY_OFFSET=0x00001000
310CONFIG_CMDLINE_BOOL=y 319CONFIG_CMDLINE_BOOL=y
311CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1" 320CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
312 321
@@ -445,7 +454,91 @@ CONFIG_EXTRA_FIRMWARE=""
445# CONFIG_DEBUG_DEVRES is not set 454# CONFIG_DEBUG_DEVRES is not set
446# CONFIG_SYS_HYPERVISOR is not set 455# CONFIG_SYS_HYPERVISOR is not set
447# CONFIG_CONNECTOR is not set 456# CONFIG_CONNECTOR is not set
448# CONFIG_MTD is not set 457CONFIG_MTD=y
458# CONFIG_MTD_DEBUG is not set
459# CONFIG_MTD_CONCAT is not set
460CONFIG_MTD_PARTITIONS=y
461# CONFIG_MTD_TESTS is not set
462# CONFIG_MTD_REDBOOT_PARTS is not set
463# CONFIG_MTD_CMDLINE_PARTS is not set
464# CONFIG_MTD_AR7_PARTS is not set
465
466#
467# User Modules And Translation Layers
468#
469# CONFIG_MTD_CHAR is not set
470# CONFIG_MTD_BLKDEVS is not set
471# CONFIG_MTD_BLOCK is not set
472# CONFIG_MTD_BLOCK_RO is not set
473# CONFIG_FTL is not set
474# CONFIG_NFTL is not set
475# CONFIG_INFTL is not set
476# CONFIG_RFD_FTL is not set
477# CONFIG_SSFDC is not set
478# CONFIG_MTD_OOPS is not set
479
480#
481# RAM/ROM/Flash chip drivers
482#
483CONFIG_MTD_CFI=y
484# CONFIG_MTD_JEDECPROBE is not set
485CONFIG_MTD_GEN_PROBE=y
486# CONFIG_MTD_CFI_ADV_OPTIONS is not set
487CONFIG_MTD_MAP_BANK_WIDTH_1=y
488CONFIG_MTD_MAP_BANK_WIDTH_2=y
489CONFIG_MTD_MAP_BANK_WIDTH_4=y
490# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
491# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
492# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
493CONFIG_MTD_CFI_I1=y
494CONFIG_MTD_CFI_I2=y
495# CONFIG_MTD_CFI_I4 is not set
496# CONFIG_MTD_CFI_I8 is not set
497# CONFIG_MTD_CFI_INTELEXT is not set
498CONFIG_MTD_CFI_AMDSTD=y
499# CONFIG_MTD_CFI_STAA is not set
500CONFIG_MTD_CFI_UTIL=y
501# CONFIG_MTD_RAM is not set
502# CONFIG_MTD_ROM is not set
503# CONFIG_MTD_ABSENT is not set
504
505#
506# Mapping drivers for chip access
507#
508CONFIG_MTD_COMPLEX_MAPPINGS=y
509CONFIG_MTD_PHYSMAP=y
510# CONFIG_MTD_PHYSMAP_COMPAT is not set
511# CONFIG_MTD_PCI is not set
512# CONFIG_MTD_INTEL_VR_NOR is not set
513# CONFIG_MTD_PLATRAM is not set
514
515#
516# Self-contained MTD device drivers
517#
518# CONFIG_MTD_PMC551 is not set
519# CONFIG_MTD_SLRAM is not set
520# CONFIG_MTD_PHRAM is not set
521# CONFIG_MTD_MTDRAM is not set
522# CONFIG_MTD_BLOCK2MTD is not set
523
524#
525# Disk-On-Chip Device Drivers
526#
527# CONFIG_MTD_DOC2000 is not set
528# CONFIG_MTD_DOC2001 is not set
529# CONFIG_MTD_DOC2001PLUS is not set
530# CONFIG_MTD_NAND is not set
531# CONFIG_MTD_ONENAND is not set
532
533#
534# LPDDR flash memory drivers
535#
536# CONFIG_MTD_LPDDR is not set
537
538#
539# UBI - Unsorted block images
540#
541# CONFIG_MTD_UBI is not set
449# CONFIG_PARPORT is not set 542# CONFIG_PARPORT is not set
450CONFIG_BLK_DEV=y 543CONFIG_BLK_DEV=y
451# CONFIG_BLK_CPQ_CISS_DA is not set 544# CONFIG_BLK_CPQ_CISS_DA is not set
@@ -500,10 +593,6 @@ CONFIG_BLK_DEV_SD=y
500# CONFIG_BLK_DEV_SR is not set 593# CONFIG_BLK_DEV_SR is not set
501CONFIG_CHR_DEV_SG=m 594CONFIG_CHR_DEV_SG=m
502# CONFIG_CHR_DEV_SCH is not set 595# CONFIG_CHR_DEV_SCH is not set
503
504#
505# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
506#
507# CONFIG_SCSI_MULTI_LUN is not set 596# CONFIG_SCSI_MULTI_LUN is not set
508# CONFIG_SCSI_CONSTANTS is not set 597# CONFIG_SCSI_CONSTANTS is not set
509# CONFIG_SCSI_LOGGING is not set 598# CONFIG_SCSI_LOGGING is not set
@@ -521,6 +610,7 @@ CONFIG_SCSI_WAIT_SCAN=m
521CONFIG_SCSI_LOWLEVEL=y 610CONFIG_SCSI_LOWLEVEL=y
522# CONFIG_ISCSI_TCP is not set 611# CONFIG_ISCSI_TCP is not set
523# CONFIG_SCSI_CXGB3_ISCSI is not set 612# CONFIG_SCSI_CXGB3_ISCSI is not set
613# CONFIG_SCSI_BNX2_ISCSI is not set
524# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 614# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
525# CONFIG_SCSI_3W_9XXX is not set 615# CONFIG_SCSI_3W_9XXX is not set
526# CONFIG_SCSI_ACARD is not set 616# CONFIG_SCSI_ACARD is not set
@@ -529,6 +619,7 @@ CONFIG_SCSI_LOWLEVEL=y
529# CONFIG_SCSI_AIC7XXX_OLD is not set 619# CONFIG_SCSI_AIC7XXX_OLD is not set
530# CONFIG_SCSI_AIC79XX is not set 620# CONFIG_SCSI_AIC79XX is not set
531# CONFIG_SCSI_AIC94XX is not set 621# CONFIG_SCSI_AIC94XX is not set
622# CONFIG_SCSI_MVSAS is not set
532# CONFIG_SCSI_ARCMSR is not set 623# CONFIG_SCSI_ARCMSR is not set
533# CONFIG_MEGARAID_NEWGEN is not set 624# CONFIG_MEGARAID_NEWGEN is not set
534# CONFIG_MEGARAID_LEGACY is not set 625# CONFIG_MEGARAID_LEGACY is not set
@@ -543,7 +634,6 @@ CONFIG_SCSI_LOWLEVEL=y
543# CONFIG_SCSI_IPS is not set 634# CONFIG_SCSI_IPS is not set
544# CONFIG_SCSI_INITIO is not set 635# CONFIG_SCSI_INITIO is not set
545# CONFIG_SCSI_INIA100 is not set 636# CONFIG_SCSI_INIA100 is not set
546# CONFIG_SCSI_MVSAS is not set
547# CONFIG_SCSI_STEX is not set 637# CONFIG_SCSI_STEX is not set
548# CONFIG_SCSI_SYM53C8XX_2 is not set 638# CONFIG_SCSI_SYM53C8XX_2 is not set
549# CONFIG_SCSI_IPR is not set 639# CONFIG_SCSI_IPR is not set
@@ -1111,6 +1201,7 @@ CONFIG_RTC_DRV_RS5C372=y
1111# on-CPU RTC drivers 1201# on-CPU RTC drivers
1112# 1202#
1113CONFIG_RTC_DRV_SH=y 1203CONFIG_RTC_DRV_SH=y
1204# CONFIG_RTC_DRV_GENERIC is not set
1114# CONFIG_DMADEVICES is not set 1205# CONFIG_DMADEVICES is not set
1115# CONFIG_AUXDISPLAY is not set 1206# CONFIG_AUXDISPLAY is not set
1116# CONFIG_UIO is not set 1207# CONFIG_UIO is not set
@@ -1138,6 +1229,7 @@ CONFIG_FILE_LOCKING=y
1138# CONFIG_XFS_FS is not set 1229# CONFIG_XFS_FS is not set
1139# CONFIG_OCFS2_FS is not set 1230# CONFIG_OCFS2_FS is not set
1140# CONFIG_BTRFS_FS is not set 1231# CONFIG_BTRFS_FS is not set
1232CONFIG_FSNOTIFY=y
1141CONFIG_DNOTIFY=y 1233CONFIG_DNOTIFY=y
1142CONFIG_INOTIFY=y 1234CONFIG_INOTIFY=y
1143CONFIG_INOTIFY_USER=y 1235CONFIG_INOTIFY_USER=y
@@ -1145,6 +1237,7 @@ CONFIG_INOTIFY_USER=y
1145# CONFIG_AUTOFS_FS is not set 1237# CONFIG_AUTOFS_FS is not set
1146# CONFIG_AUTOFS4_FS is not set 1238# CONFIG_AUTOFS4_FS is not set
1147CONFIG_FUSE_FS=m 1239CONFIG_FUSE_FS=m
1240# CONFIG_CUSE is not set
1148 1241
1149# 1242#
1150# Caches 1243# Caches
@@ -1190,6 +1283,7 @@ CONFIG_MISC_FILESYSTEMS=y
1190# CONFIG_BEFS_FS is not set 1283# CONFIG_BEFS_FS is not set
1191# CONFIG_BFS_FS is not set 1284# CONFIG_BFS_FS is not set
1192# CONFIG_EFS_FS is not set 1285# CONFIG_EFS_FS is not set
1286# CONFIG_JFFS2_FS is not set
1193# CONFIG_CRAMFS is not set 1287# CONFIG_CRAMFS is not set
1194# CONFIG_SQUASHFS is not set 1288# CONFIG_SQUASHFS is not set
1195# CONFIG_VXFS_FS is not set 1289# CONFIG_VXFS_FS is not set
@@ -1328,41 +1422,40 @@ CONFIG_HAVE_FUNCTION_TRACER=y
1328CONFIG_HAVE_DYNAMIC_FTRACE=y 1422CONFIG_HAVE_DYNAMIC_FTRACE=y
1329CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 1423CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1330CONFIG_RING_BUFFER=y 1424CONFIG_RING_BUFFER=y
1425CONFIG_EVENT_TRACING=y
1426CONFIG_CONTEXT_SWITCH_TRACER=y
1331CONFIG_TRACING=y 1427CONFIG_TRACING=y
1332CONFIG_TRACING_SUPPORT=y 1428CONFIG_TRACING_SUPPORT=y
1333 1429CONFIG_FTRACE=y
1334#
1335# Tracers
1336#
1337# CONFIG_FUNCTION_TRACER is not set 1430# CONFIG_FUNCTION_TRACER is not set
1338# CONFIG_IRQSOFF_TRACER is not set 1431# CONFIG_IRQSOFF_TRACER is not set
1339# CONFIG_PREEMPT_TRACER is not set 1432# CONFIG_PREEMPT_TRACER is not set
1340# CONFIG_SCHED_TRACER is not set 1433# CONFIG_SCHED_TRACER is not set
1341# CONFIG_CONTEXT_SWITCH_TRACER is not set 1434# CONFIG_ENABLE_DEFAULT_TRACERS is not set
1342# CONFIG_EVENT_TRACER is not set
1343# CONFIG_BOOT_TRACER is not set 1435# CONFIG_BOOT_TRACER is not set
1344# CONFIG_TRACE_BRANCH_PROFILING is not set 1436CONFIG_BRANCH_PROFILE_NONE=y
1437# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
1438# CONFIG_PROFILE_ALL_BRANCHES is not set
1345# CONFIG_STACK_TRACER is not set 1439# CONFIG_STACK_TRACER is not set
1346# CONFIG_KMEMTRACE is not set 1440# CONFIG_KMEMTRACE is not set
1347# CONFIG_WORKQUEUE_TRACER is not set 1441# CONFIG_WORKQUEUE_TRACER is not set
1348# CONFIG_BLK_DEV_IO_TRACE is not set 1442# CONFIG_BLK_DEV_IO_TRACE is not set
1349# CONFIG_FTRACE_STARTUP_TEST is not set 1443# CONFIG_RING_BUFFER_BENCHMARK is not set
1350# CONFIG_DYNAMIC_DEBUG is not set 1444# CONFIG_DYNAMIC_DEBUG is not set
1351# CONFIG_DMA_API_DEBUG is not set 1445# CONFIG_DMA_API_DEBUG is not set
1352# CONFIG_SAMPLES is not set 1446# CONFIG_SAMPLES is not set
1353CONFIG_HAVE_ARCH_KGDB=y 1447CONFIG_HAVE_ARCH_KGDB=y
1354# CONFIG_KGDB is not set 1448# CONFIG_KGDB is not set
1355CONFIG_SH_STANDARD_BIOS=y 1449# CONFIG_SH_STANDARD_BIOS is not set
1356# CONFIG_EARLY_SCIF_CONSOLE is not set 1450CONFIG_EARLY_SCIF_CONSOLE=y
1357CONFIG_EARLY_PRINTK=y 1451CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000
1452# CONFIG_EARLY_PRINTK is not set
1358# CONFIG_DEBUG_BOOTMEM is not set 1453# CONFIG_DEBUG_BOOTMEM is not set
1359CONFIG_DEBUG_STACKOVERFLOW=y 1454CONFIG_DEBUG_STACKOVERFLOW=y
1360# CONFIG_DEBUG_STACK_USAGE is not set 1455# CONFIG_DEBUG_STACK_USAGE is not set
1361# CONFIG_4KSTACKS is not set 1456# CONFIG_4KSTACKS is not set
1362# CONFIG_IRQSTACKS is not set
1363CONFIG_DUMP_CODE=y 1457CONFIG_DUMP_CODE=y
1364# CONFIG_SH_NO_BSS_INIT is not set 1458# CONFIG_SH_NO_BSS_INIT is not set
1365# CONFIG_MORE_COMPILE_OPTIONS is not set
1366 1459
1367# 1460#
1368# Security options 1461# Security options
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index d2ffc477549a..d6303d0e494e 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
8obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o 10obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7786) += ops-sh7786.o
11obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o 12obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o
12 13
13obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 14obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c
index e83d0d3aabe2..16e0a1baad88 100644
--- a/arch/sh/drivers/pci/ops-dreamcast.c
+++ b/arch/sh/drivers/pci/ops-dreamcast.c
@@ -18,7 +18,6 @@
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/irq.h>
22#include <mach/pci.h> 21#include <mach/pci.h>
23 22
24/* 23/*
diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c
new file mode 100644
index 000000000000..48f594b9582b
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-sh7786.c
@@ -0,0 +1,134 @@
1/*
2 * Generic SH7786 PCI-Express operations.
3 *
4 * Copyright (C) 2009 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License v2. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/pci.h>
13#include <linux/io.h>
14#include <linux/spinlock.h>
15#include "pcie-sh7786.h"
16
17enum {
18 PCI_ACCESS_READ,
19 PCI_ACCESS_WRITE,
20};
21
22static DEFINE_SPINLOCK(sh7786_pcie_lock);
23
24static int sh7786_pcie_config_access(unsigned char access_type,
25 struct pci_bus *bus, unsigned int devfn, int where, u32 *data)
26{
27 struct pci_channel *chan = bus->sysdata;
28 int dev, func;
29
30 dev = PCI_SLOT(devfn);
31 func = PCI_FUNC(devfn);
32
33 if (bus->number > 255 || dev > 31 || func > 7)
34 return PCIBIOS_FUNC_NOT_SUPPORTED;
35 if (devfn)
36 return PCIBIOS_DEVICE_NOT_FOUND;
37
38 /* Set the PIO address */
39 pci_write_reg(chan, (bus->number << 24) | (dev << 19) |
40 (func << 16) | (where & ~3), SH4A_PCIEPAR);
41
42 /* Enable the configuration access */
43 pci_write_reg(chan, (1 << 31), SH4A_PCIEPCTLR);
44
45 if (access_type == PCI_ACCESS_READ)
46 *data = pci_read_reg(chan, SH4A_PCIEPDR);
47 else
48 pci_write_reg(chan, *data, SH4A_PCIEPDR);
49
50 /* Check for master and target aborts */
51 if (pci_read_reg(chan, SH4A_PCIEPCICONF1) & ((1 << 29) | (1 << 28)))
52 return PCIBIOS_DEVICE_NOT_FOUND;
53
54 return PCIBIOS_SUCCESSFUL;
55}
56
57static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn,
58 int where, int size, u32 *val)
59{
60 unsigned long flags;
61 int ret;
62 u32 data;
63
64 if ((size == 2) && (where & 1))
65 return PCIBIOS_BAD_REGISTER_NUMBER;
66 else if ((size == 4) && (where & 3))
67 return PCIBIOS_BAD_REGISTER_NUMBER;
68
69 spin_lock_irqsave(&sh7786_pcie_lock, flags);
70 ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
71 devfn, where, &data);
72 if (ret != PCIBIOS_SUCCESSFUL)
73 goto out;
74
75 if (size == 1)
76 *val = (data >> ((where & 3) << 3)) & 0xff;
77 else if (size == 2)
78 *val = (data >> ((where & 2) << 3)) & 0xffff;
79 else
80 *val = data;
81
82 dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x "
83 "where=0x%04x size=%d val=0x%08lx\n", bus->number,
84 devfn, where, size, (unsigned long)*val);
85
86out:
87 spin_unlock_irqrestore(&sh7786_pcie_lock, flags);
88 return ret;
89}
90
91static int sh7786_pcie_write(struct pci_bus *bus, unsigned int devfn,
92 int where, int size, u32 val)
93{
94 unsigned long flags;
95 int shift, ret;
96 u32 data;
97
98 if ((size == 2) && (where & 1))
99 return PCIBIOS_BAD_REGISTER_NUMBER;
100 else if ((size == 4) && (where & 3))
101 return PCIBIOS_BAD_REGISTER_NUMBER;
102
103 spin_lock_irqsave(&sh7786_pcie_lock, flags);
104 ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
105 devfn, where, &data);
106 if (ret != PCIBIOS_SUCCESSFUL)
107 goto out;
108
109 dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x "
110 "where=0x%04x size=%d val=%08lx\n", bus->number,
111 devfn, where, size, (unsigned long)val);
112
113 if (size == 1) {
114 shift = (where & 3) << 3;
115 data &= ~(0xff << shift);
116 data |= ((val & 0xff) << shift);
117 } else if (size == 2) {
118 shift = (where & 2) << 3;
119 data &= ~(0xffff << shift);
120 data |= ((val & 0xffff) << shift);
121 } else
122 data = val;
123
124 ret = sh7786_pcie_config_access(PCI_ACCESS_WRITE, bus,
125 devfn, where, &data);
126out:
127 spin_unlock_irqrestore(&sh7786_pcie_lock, flags);
128 return ret;
129}
130
131struct pci_ops sh7786_pci_ops = {
132 .read = sh7786_pcie_read,
133 .write = sh7786_pcie_write,
134};
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 54d77cbb8b39..9a1c423ad167 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -53,12 +53,8 @@ static DEFINE_MUTEX(pci_scan_mutex);
53 53
54void __devinit register_pci_controller(struct pci_channel *hose) 54void __devinit register_pci_controller(struct pci_channel *hose)
55{ 55{
56 if (request_resource(&iomem_resource, hose->mem_resource) < 0) 56 request_resource(&iomem_resource, hose->mem_resource);
57 goto out; 57 request_resource(&ioport_resource, hose->io_resource);
58 if (request_resource(&ioport_resource, hose->io_resource) < 0) {
59 release_resource(hose->mem_resource);
60 goto out;
61 }
62 58
63 *hose_tail = hose; 59 *hose_tail = hose;
64 hose_tail = &hose->next; 60 hose_tail = &hose->next;
@@ -80,12 +76,6 @@ void __devinit register_pci_controller(struct pci_channel *hose)
80 pcibios_scanbus(hose); 76 pcibios_scanbus(hose);
81 mutex_unlock(&pci_scan_mutex); 77 mutex_unlock(&pci_scan_mutex);
82 } 78 }
83
84 return;
85
86out:
87 printk(KERN_WARNING
88 "Skipping PCI bus scan due to resource conflict\n");
89} 79}
90 80
91static int __init pcibios_init(void) 81static int __init pcibios_init(void)
diff --git a/arch/sh/drivers/pci/pcie-sh7786.h b/arch/sh/drivers/pci/pcie-sh7786.h
new file mode 100644
index 000000000000..c655290a7750
--- /dev/null
+++ b/arch/sh/drivers/pci/pcie-sh7786.h
@@ -0,0 +1,589 @@
1/*
2 * SH7786 PCI-Express controller definitions.
3 *
4 * Copyright (C) 2008, 2009 Renesas Technology Corp.
5 * All rights reserved.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#ifndef __PCI_SH7786_H
12#define __PCI_SH7786_H
13
14/* PCIe bus-0(x4) on SH7786 */ // Rev1.171
15#define SH4A_PCIE_SPW_BASE 0xFE000000 /* spw config address for controller 0 */
16#define SH4A_PCIE_SPW_BASE1 0xFE200000 /* spw config address for controller 1 (Rev1.14)*/
17#define SH4A_PCIE_SPW_BASE2 0xFCC00000 /* spw config address for controller 2 (Rev1.171)*/
18#define SH4A_PCIE_SPW_BASE_LEN 0x00080000
19
20#define SH4A_PCI_CNFG_BASE 0xFE040000 /* pci config address for controller 0 */
21#define SH4A_PCI_CNFG_BASE1 0xFE240000 /* pci config address for controller 1 (Rev1.14)*/
22#define SH4A_PCI_CNFG_BASE2 0xFCC40000 /* pci config address for controller 2 (Rev1.171)*/
23#define SH4A_PCI_CNFG_BASE_LEN 0x00040000
24
25#define SH4A_PCIPIO_ADDR_OFFSET 0x000001c0 /* offset to pci config_address */
26#define SH4A_PCIPIO_DATA_OFFSET 0x00000220 /* offset to pci config_data */
27
28/*
29 * for PEX8111(Max Payload Size=128B,PCIIO_SIZE=64K),
30 * for other(Max Payload Size=4096B,PCIIO_SIZE=8M)
31 */
32
33/* PCI0-0: PCI I/O space */
34#define SH4A_PCIIO_BASE 0xFD000000 /* PCI I/O for controller 0 */
35#define SH4A_PCIIO_BASE1 0xFD800000 /* PCI I/O for controller 1 (Rev1.14)*/
36#define SH4A_PCIIO_BASE2 0xFC800000 /* PCI I/O for controller 2 (Rev1.171)*/
37
38#define SH4A_PCIIO_SIZE64 0x00010000 /* PLX allows only 64K */
39#define SH4A_PCIIO_SIZE 0x00800000 /* 8M */
40#define SH4A_PCIIO_SIZE2 0x00400000 /* 4M (Rev1.171)*/
41
42/* PCI0-1: PCI memory space 29-bit address */
43#define SH4A_PCIMEM_BASE 0x10000000
44#define SH4A_PCIMEM_SIZE 0x04000000 /* 64M */
45
46/* PCI0-2: PCI memory space 32-bit address */
47#define SH4A_PCIMEM_BASEA 0xC0000000 /* for controller 0 */
48#define SH4A_PCIMEM_BASEA1 0xA0000000 /* for controller 1 (Rev1.14)*/
49#define SH4A_PCIMEM_BASEA2 0x80000000 /* for controller 2 (Rev1.171)*/
50#define SH4A_PCIMEM_SIZEA 0x20000000 /* 512M */
51
52/* PCI0: PCI memory target transfer 32-bit address translation value(Rev1.11T)*/
53#define SH4A_PCIBMSTR_TRANSLATION 0x20000000
54
55#define SH4A_PCI_DEVICE_ID 0x0002
56#define SH4A_PCI_VENDOR_ID 0x1912
57
58// PCI compatible 000-03f
59#define PCI_CMD 0x004
60#define PCI_RID 0x008
61#define PCI_IBAR 0x010
62#define PCI_MBAR0 0x014
63#define PCI_MBAR1 0x018
64
65/* PCI power management/MSI/capablity 040-0ff */
66/* PCIE extended 100-fff */
67
68/* SH7786 device identification */ // Rev1.171
69#define SH4A_PVR (0xFF000030)
70#define SH4A_PVR_SHX3 (0x10400000)
71#define SH4A_PRR (0xFF000044)
72#define SH4A_PRR_SH7786 (0x00000400) // Rev1.171
73
74/* SPVCR0 */
75#define SH4A_PCIEVCR0 (0x000000) /* R - 0x0000 0000 32 */
76#define BITS_TOP_MB (24)
77#define MASK_TOP_MB (0xff<<BITS_TOP_MB)
78#define BITS_BOT_MB (16)
79#define MASK_BOT_MB (0xff<<BITS_BOT_MB)
80#define BITS_VC_ID (0)
81#define MASK_VC_ID (0xffff<<BITS_VC_ID)
82
83/* SPVCR1 */
84#define SH4A_PCIEVCR1 (0x000004) /* R - 0x0000 0000 32*/
85#define BITS_BADOPC (5) /* 5 BADOPC 0 R/W */
86#define MASK_BADOPC (1<<BITS_BADOPC)
87#define BITS_BADDEST (4) /*4 BADDEST 0 R/W */
88#define MASK_BADDEST (1<<BITS_BADDEST)
89#define BITS_UNSOLRESP (3) /* 3 UNSOLRESP 0 R/W */
90#define MASK_UNSOLRESP (1<<BITS_UNSOLRESP)
91#define BITS_ERRSNT (1) /* 1 ERRSNT 0 */
92#define MASK_ERRSNT (1<<BITS_ERRSNT)
93#define BITS_ERRRCV (0) /* 0 ERRRCV 0 */
94#define MASK_ERRRCV (1<<BITS_ERRRCV)
95
96/* PCIEECR */
97#define SH4A_PCIEECR (0x000008) /* R/W - 0x0000 0000 32 */
98#define BITS_ENBL (0) /* 0 ENBL 0 R/W */
99#define MASK_ENBL (1<<BITS_ENBL)
100
101/* PCIEPAR */
102#define SH4A_PCIEPAR (0x000010) /* R/W - 0x0000 0000 32 */
103#define BITS_BN (24)
104#define MASK_BN (0xff<<BITS_BN)
105#define BITS_DN (19)
106#define MASK_DN (0x1f<<BITS_DN)
107#define BITS_FN (16)
108#define MASK_FN (0x7<<BITS_FN)
109#define BITS_EREGNO (8)
110#define MASK_EREGNO (0xff<<BITS_EREGNO)
111#define BITS_REGNO (2)
112#define MASK_REGNO (0x3f<<BITS_REGNO)
113
114/* PCIEPCTLR */
115#define SH4A_PCIEPCTLR (0x000018) /* R/W - 0x0000 0000 32 */
116#define BITS_CCIE (31) /* 31 CCIE */
117#define MASK_CCIE (1<<BITS_CCIE)
118#define BITS_TYPE (8)
119#define MASK_TYPE (1<<BITS_TYPE)
120#define BITS_C_VC (0)
121#define MASK_C_VC (1<<BITS_C_VC)
122
123/* PCIEPDR */
124#define SH4A_PCIEPDR (0x000020) /* R/W - 0x0000 0000 32 */
125#define BITS_PDR (0)
126#define MASK_PDR (0xffffffff<<BITS_PDR)
127
128/* PCIEMSGALR */
129#define SH4A_PCIEMSGALR (0x000030) /* R/W - 0x0000 0000 32 */
130#define BITS_MSGADRL (0)
131#define MASK_MSGADRL (0xffffffff<<BITS_MSGADRL)
132
133/* PCIEMSGAHR */
134#define SH4A_PCIEMSGAHR (0x000034) /* R/W - 0x0000 0000 32 */
135#define BITS_MSGADRH (0)
136#define MASK_MSGADRH (0xffffffff<<BITS_MSGADRH)
137
138/* PCIEMSGCTLR */
139#define SH4A_PCIEMSGCTLR (0x000038) /* R/W - 0x0000 0000 32 */
140#define BITS_MSGIE (31)
141#define MASK_MSGIE (1<<BITS_MSGIE)
142#define BITS_MROUTE (16)
143#define MASK_MROUTE (0x7<<BITS_MROUTE)
144#define BITS_MCODE (8)
145#define MASK_MCODE (0xff<<BITS_MCODE)
146#define BITS_M_VC (0)
147#define MASK_M_VC (1<<BITS_M_VC)
148
149/* PCIEMSG */
150#define SH4A_PCIEMSG (0x000040) /* W - - 32 */
151#define BITS_MDATA (0)
152#define MASK_MDATA (0xffffffff<<BITS_MDATA)
153
154/* PCIEPHYCTLR */
155#define SH4A_PCIEPHYCTLR (0x010000) /* R/W - 0x0000 0000 32 */
156#define BITS_CKE (0)
157#define MASK_CKE (1<<BITS_CKE)
158
159/* PCIERMSGIER */
160#define SH4A_PCIERMSGIER (0x004040) /* R/W - 0x0000 0000 32 */
161
162/* PCIEPHYADRR */
163#define SH4A_PCIEPHYADRR (0x010004) /* R/W - 0x0000 0000 32 */
164#define BITS_ACK (24) // Rev1.171
165#define MASK_ACK (1<<BITS_ACK) // Rev1.171
166#define BITS_CMD (16) // Rev1.171
167#define MASK_CMD (0x03<<BITS_CMD) // Rev1.171
168#define BITS_LANE (8)
169#define MASK_LANE (0x0f<<BITS_LANE)
170#define BITS_ADR (0)
171#define MASK_ADR (0xff<<BITS_ADR)
172
173/* PCIEPHYDINR */ // Rev1.171 start.
174#define SH4A_PCIEPHYDINR (0x010008) /* R/W - 0x0000 0000 32 */
175
176/* PCIEPHYDOUTR */
177#define SH4A_PCIEPHYDOUTR (0x01000C) /* R/W - 0x0000 0000 32 */
178
179/* PCIEPHYSR */
180#define SH4A_PCIEPHYSR (0x010010) /* R/W - 0x0000 0000 32 */ // Rev1.171 end.
181
182/* PCIEPHYDATAR */
183#define SH4A_PCIEPHYDATAR (0x00008) /* R/W - 0xxxxx xxxx 32 */
184#define BITS_DATA (0)
185#define MASK_DATA (0xffffffff<<BITS_DATA)
186
187/* PCIETCTLR */
188#define SH4A_PCIETCTLR (0x020000) /* R/W R/W 0x0000 0000 32 */
189#define BITS_CFINT (0)
190#define MASK_CFINT (1<<BITS_CFINT)
191
192/* PCIETSTR */
193#define SH4A_PCIETSTR (0x020004) /* R/W R/W 0x0000 0000 32 */
194
195/* PCIEINTR */
196#define SH4A_PCIEINTR (0x020008) /* R/W R/W 0x0000 0000 32 */
197#define BITS_INT_RX_ERP (31)
198#define MASK_INT_RX_ERP (1<<BITS_INT_RX_ERP)
199#define BITS_INT_RX_VCX_Posted (30)
200#define MASK_INT_RX_VCX_Posted (1<<BITS_INT_RX_VCX_Posted)
201#define BITS_INT_RX_VCX_NonPosted (29)
202#define MASK_INT_RX_VCX_NonPosted (1<<BITS_INT_RX_VCX_NonPosted)
203#define BITS_INT_RX_VCX_CPL (28)
204#define MASK_INT_RX_VCX_CPL (1<<BITS_INT_RX_VCX_CPL)
205#define BITS_INT_TX_VCX_Posted (26)
206#define MASK_INT_TX_VCX_Posted (1<<BITS_INT_TX_VCX_Posted)
207#define BITS_INT_TX_VCX_NonPosted (25)
208#define MASK_INT_TX_VCX_NonPosted (1<<BITS_INT_TX_VCX_NonPosted)
209#define BITS_INT_TX_VCX_CPL (24)
210#define MASK_INT_TX_VCX_CPL (1<<BITS_INT_TX_VCX_CPL)
211#define BITS_INT_RX_VC0_Posted (22)
212#define MASK_INT_RX_VC0_Posted (1<<BITS_INT_RX_VC0_Posted)
213#define BITS_INT_RX_VC0_NonPosted (21)
214#define MASK_INT_RX_VC0_NonPosted (1<<BITS_INT_RX_VC0_NonPosted)
215#define BITS_INT_RX_VC0_CPL (20)
216#define MASK_INT_RX_VC0_CPL (1<<BITS_INT_RX_VC0_CPL)
217#define BITS_INT_TX_VC0_Posted (18)
218#define MASK_INT_TX_VC0_Posted (1<<BITS_INT_TX_VC0_Posted)
219#define BITS_INT_TX_VC0_NonPosted (17)
220#define MASK_INT_TX_VC0_NonPosted (1<<BITS_INT_TX_VC0_NonPosted)
221#define BITS_INT_TX_VC0_CPL (16)
222#define MASK_INT_TX_VC0_CPL (1<<BITS_INT_TX_VC0_CPL)
223#define BITS_INT_RX_CTRL (15)
224#define MASK_INT_RX_CTRL (1<<BITS_INT_RX_CTRL)
225#define BITS_INT_TX_CTRL (14)
226#define MASK_INT_TX_CTRL (1<<BITS_INT_TX_CTRL)
227#define BITS_INTTL (11)
228#define MASK_INTTL (1<<BITS_INTTL)
229#define BITS_INTDL (10)
230#define MASK_INTDL (1<<BITS_INTDL)
231#define BITS_INTMAC (9)
232#define MASK_INTMAC (1<<BITS_INTMAC)
233#define BITS_INTPM (8)
234#define MASK_INTPM (1<<BITS_INTPM)
235
236/* PCIEINTER */
237#define SH4A_PCIEINTER (0x02000C) /* R/W R/W 0x0000 0000 32 */
238#define BITS_INT_RX_ERP (31)
239#define MASK_INT_RX_ERP (1<<BITS_INT_RX_ERP)
240#define BITS_INT_RX_VCX_Posted (30)
241#define MASK_INT_RX_VCX_Posted (1<<BITS_INT_RX_VCX_Posted)
242#define BITS_INT_RX_VCX_NonPosted (29)
243#define MASK_INT_RX_VCX_NonPosted (1<<BITS_INT_RX_VCX_NonPosted)
244#define BITS_INT_RX_VCX_CPL (28)
245#define MASK_INT_RX_VCX_CPL (1<<BITS_INT_RX_VCX_CPL)
246#define BITS_INT_TX_VCX_Posted (26)
247#define MASK_INT_TX_VCX_Posted (1<<BITS_INT_TX_VCX_Posted)
248#define BITS_INT_TX_VCX_NonPosted (25)
249#define MASK_INT_TX_VCX_NonPosted (1<<BITS_INT_TX_VCX_NonPosted)
250#define BITS_INT_TX_VCX_CPL (24)
251#define MASK_INT_TX_VCX_CPL (1<<BITS_INT_TX_VCX_CPL)
252#define BITS_INT_RX_VC0_Posted (22)
253#define MASK_INT_RX_VC0_Posted (1<<BITS_INT_RX_VC0_Posted)
254#define BITS_INT_RX_VC0_NonPosted (21)
255#define MASK_INT_RX_VC0_NonPosted (1<<BITS_INT_RX_VC0_NonPosted)
256#define BITS_INT_RX_VC0_CPL (20)
257#define MASK_INT_RX_VC0_CPL (1<<BITS_INT_RX_VC0_CPL)
258#define BITS_INT_TX_VC0_Posted (18)
259#define MASK_INT_TX_VC0_Posted (1<<BITS_INT_TX_VC0_Posted)
260#define BITS_INT_TX_VC0_NonPosted (17)
261#define MASK_INT_TX_VC0_NonPosted (1<<BITS_INT_TX_VC0_NonPosted)
262#define BITS_INT_TX_VC0_CPL (16)
263#define MASK_INT_TX_VC0_CPL (1<<BITS_INT_TX_VC0_CPL)
264#define BITS_INT_RX_CTRL (15)
265#define MASK_INT_RX_CTRL (1<<BITS_INT_RX_CTRL)
266#define BITS_INT_TX_CTRL (14)
267#define MASK_INT_TX_CTRL (1<<BITS_INT_TX_CTRL)
268#define BITS_INTTL (11)
269#define MASK_INTTL (1<<BITS_INTTL)
270#define BITS_INTDL (10)
271#define MASK_INTDL (1<<BITS_INTDL)
272#define BITS_INTMAC (9)
273#define MASK_INTMAC (1<<BITS_INTMAC)
274#define BITS_INTPM (8)
275#define MASK_INTPM (1<<BITS_INTPM)
276
277/* PCIEAIR */
278#define SH4A_PCIEAIR (SH4A_PCIE_BASE + 0x020010) /* R/W R/W 0xxxxx xxxx 32 */
279
280/* PCIECIR */
281#define SH4A_PCIECIR (SH4A_PCIE_BASE) /* R/W R/W 0xxxxx xxxx 32 */
282
283/* PCIEERRFR */ // Rev1.18
284#define SH4A_PCIEERRFR (0x020020) /* R/W R/W 0xxxxx xxxx 32 */ // Rev1.18
285 // Rev1.18
286/* PCIELAR0 */
287#define SH4A_PCIELAR0 (0x020200) /* R/W R/W 0x0000 0000 32 */
288#define BITS_LARn (20)
289#define MASK_LARn (0xfff<<BITS_LARn)
290
291#define SH4A_PCIE_020204 (0x020204) /* R/W R/W 0x0000 0000 32 */
292
293/* PCIELAMR0 */
294#define SH4A_PCIELAMR0 (0x020208) /* R/W R/W 0x0000 0000 32 */
295#define BITS_LAMRn (20)
296#define MASK_LAMRn (0x1ff<<BITS_LAMRn)
297#define BITS_LAREn (0)
298#define MASK_LAREn (0x1<<BITS_LAREn)
299
300/* PCIECSCR0 */
301#define SH4A_PCIECSCR0 (0x020210) /* R/W R/W 0x0000 0000 32 */
302#define BITS_RANGE (2)
303#define MASK_RANGE (0x7<<BITS_RANGE)
304#define BITS_SNPMD (0)
305#define MASK_SNPMD (0x3<<BITS_SNPMD)
306
307/* PCIECSAR0 */
308#define SH4A_PCIECSAR0 (0x020214) /* R/W R/W 0x0000 0000 32 */
309#define BITS_CSADR (0)
310#define MASK_CSADR (0xffffffff<<BITS_CSADR)
311
312/* PCIESTCTLR0 */
313#define SH4A_PCIESTCTLR0 (0x020218) /* R/W R/W 0x0000 0000 32 */
314#define BITS_SHPRI (8)
315#define MASK_SHPRI (0x0f<<BITS_SHPRI)
316
317#define SH4A_PCIE_020224 (0x020224) /* R/W R/W 0x0000 0000 32 */
318
319#define SH4A_PCIELAR1 (0x020220) /* R/W R/W 0x0000 0000 32 */
320#define SH4A_PCIELAMR1 (0x020228) /* R/W R/W 0x0000 0000 32 */
321#define SH4A_PCIECSCR1 (0x020230) /* R/W R/W 0x0000 0000 32 */
322#define SH4A_PCIECSAR1 (0x020234) /* R/W R/W 0x0000 0000 32 */
323#define SH4A_PCIESTCTLR1 (0x020238) /* R/W R/W 0x0000 0000 32 */
324
325#define SH4A_PCIELAR2 (0x020240) /* R/W R/W 0x0000 0000 32 */
326#define SH4A_PCIE_020244 (0x020244) /* R/W R/W 0x0000 0000 32 */
327#define SH4A_PCIELAMR2 (0x020248) /* R/W R/W 0x0000 0000 32 */
328#define SH4A_PCIECSCR2 (0x020250) /* R/W R/W 0x0000 0000 32 */
329#define SH4A_PCIECSAR2 (0x020254) /* R/W R/W 0x0000 0000 32 */
330#define SH4A_PCIESTCTLR2 (0x020258) /* R/W R/W 0x0000 0000 32 */
331
332#define SH4A_PCIELAR3 (0x020260) /* R/W R/W 0x0000 0000 32 */
333#define SH4A_PCIE_020264 (0x020264) /* R/W R/W 0x0000 0000 32 */
334#define SH4A_PCIELAMR3 (0x020268) /* R/W R/W 0x0000 0000 32 */
335#define SH4A_PCIECSCR3 (0x020270) /* R/W R/W 0x0000 0000 32 */
336#define SH4A_PCIECSAR3 (0x020274) /* R/W R/W 0x0000 0000 32 */
337#define SH4A_PCIESTCTLR3 (0x020278) /* R/W R/W 0x0000 0000 32 */
338
339#define SH4A_PCIELAR4 (0x020280) /* R/W R/W 0x0000 0000 32 */
340#define SH4A_PCIE_020284 (0x020284) /* R/W R/W 0x0000 0000 32 */
341#define SH4A_PCIELAMR4 (0x020288) /* R/W R/W 0x0000 0000 32 */
342#define SH4A_PCIECSCR4 (0x020290) /* R/W R/W 0x0000 0000 32 */
343#define SH4A_PCIECSAR4 (0x020294) /* R/W R/W 0x0000 0000 32 */
344#define SH4A_PCIESTCTLR4 (0x020298) /* R/W R/W 0x0000 0000 32 */
345
346#define SH4A_PCIELAR5 (0x0202A0) /* R/W R/W 0x0000 0000 32 */
347#define SH4A_PCIE_0202A4 (0x0202A4) /* R/W R/W 0x0000 0000 32 */
348#define SH4A_PCIELAMR5 (0x0202A8) /* R/W R/W 0x0000 0000 32 */
349#define SH4A_PCIECSCR5 (0x0202B0) /* R/W R/W 0x0000 0000 32 */
350#define SH4A_PCIECSAR5 (0x0202B4) /* R/W R/W 0x0000 0000 32 */
351#define SH4A_PCIESTCTLR5 (0x0202B8) /* R/W R/W 0x0000 0000 32 */
352
353/* PCIEPARL0 */
354#define SH4A_PCIEPARL0 (0x020400) /* R/W R/W 0x0000 0000 32 */
355#define BITS_PAL (18)
356#define MASK_PAL (0x3fff<<BITS_PAL)
357
358/* PCIEPARH0 */
359#define SH4A_PCIEPARH0 (0x020404) /* R/W R/W 0x0000 0000 32 */
360#define BITS_PAH (0)
361#define MASK_PAH (0xffffffff<<BITS_PAH)
362
363/* PCIEPAMR0 */
364#define SH4A_PCIEPAMR0 (0x020408) /* R/W R/W 0x0000 0000 32 */
365#define BITS_PAM (18)
366#define MASK_PAM (0x3fff<<BITS_PAM)
367
368/* PCIEPTCTLR0 */
369#define SH4A_PCIEPTCTLR0 (0x02040C) /* R/W R/W 0x0000 0000 32 */
370#define BITS_PARE (31)
371#define MASK_PARE (0x1<<BITS_PARE)
372#define BITS_TC (20)
373#define MASK_TC (0x7<<BITS_TC)
374#define BITS_T_VC (16)
375#define MASK_T_VC (0x1<<BITS_T_VC)
376#define BITS_LOCK (12)
377#define MASK_LOCK (0x1<<BITS_LOCK)
378#define BITS_SPC (8)
379#define MASK_SPC (0x1<<BITS_SPC)
380
381#define SH4A_PCIEPARL1 (0x020420) /* R/W R/W 0x0000 0000 32 */
382#define SH4A_PCIEPARH1 (0x020424) /* R/W R/W 0x0000 0000 32 */
383#define SH4A_PCIEPAMR1 (0x020428) /* R/W R/W 0x0000 0000 32 */
384#define SH4A_PCIEPTCTLR1 (0x02042C) /* R/W R/W 0x0000 0000 32 */
385#define SH4A_PCIEPARL2 (0x020440) /* R/W R/W 0x0000 0000 32 */
386#define SH4A_PCIEPARH2 (0x020444) /* R/W R/W 0x0000 0000 32 */
387#define SH4A_PCIEPAMR2 (0x020448) /* R/W R/W 0x0000 0000 32 */
388#define SH4A_PCIEPTCTLR2 (0x02044C) /* R/W R/W 0x0000 0000 32 */
389#define SH4A_PCIEPARL3 (0x020460) /* R/W R/W 0x0000 0000 32 */
390#define SH4A_PCIEPARH3 (0x020464) /* R/W R/W 0x0000 0000 32 */
391#define SH4A_PCIEPAMR3 (0x020468) /* R/W R/W 0x0000 0000 32 */
392#define SH4A_PCIEPTCTLR3 (0x02046C) /* R/W R/W 0x0000 0000 32 */
393#define SH4A_PCIEPARL4 (0x020480) /* R/W R/W 0x0000 0000 32 */
394#define SH4A_PCIEPARH4 (0x020484) /* R/W R/W 0x0000 0000 32 */
395#define SH4A_PCIEPAMR4 (0x020488) /* R/W R/W 0x0000 0000 32 */
396#define SH4A_PCIEPTCTLR4 (0x02048C) /* R/W R/W 0x0000 0000 32 */
397#define SH4A_PCIEPARL5 (0x0204A0) /* R/W R/W 0x0000 0000 32 */
398#define SH4A_PCIEPARH5 (0x0204A4) /* R/W R/W 0x0000 0000 32 */
399#define SH4A_PCIEPAMR5 (0x0204A8) /* R/W R/W 0x0000 0000 32 */
400#define SH4A_PCIEPTCTLR5 (0x0204AC) /* R/W R/W 0x0000 0000 32 */
401#define SH4A_PCIEDMAOR (0x021000) /* R/W R/W 0x0000 0000 32 */
402#define SH4A_PCIEDMSAR0 (0x021100) /* R/W R/W 0x0000 0000 32 */
403#define SH4A_PCIEDMSAHR0 (0x021104) /* R/W R/W 0x0000 0000 32 */
404#define SH4A_PCIEDMDAR0 (0x021108) /* R/W R/W 0x0000 0000 32 */
405#define SH4A_PCIEDMDAHR0 (0x02110C) /* R/W R/W 0x0000 0000 32 */
406#define SH4A_PCIEDMBCNTR0 (0x021110) /* R/W R/W 0x0000 0000 32 */
407#define SH4A_PCIEDMSBCNTR0 (0x021114) /* R/W R/W 0x0000 0000 32 */
408#define SH4A_PCIEDMSTRR0 (0x021118) /* R/W R/W 0x0000 0000 32 */
409#define SH4A_PCIEDMCCAR0 (0x02111C) /* R/W R/W 0x0000 0000 32 */
410#define SH4A_PCIEDMCCR0 (0x021120) /* R/W R/W 0x0000 0000 32 */
411#define SH4A_PCIEDMCC2R0 (0x021124) /* R/W R/W 0x0000 0000 - */
412#define SH4A_PCIEDMCCCR0 (0x021128) /* R/W R/W 0x0000 0000 32 */
413#define SH4A_PCIEDMSAR1 (0x021140) /* R/W R/W 0x0000 0000 32 */
414#define SH4A_PCIEDMSAHR1 (0x021144) /* R/W R/W 0x0000 0000 32 */
415#define SH4A_PCIEDMDAR1 (0x021148) /* R/W R/W 0x0000 0000 32 */
416#define SH4A_PCIEDMDAHR1 (0x02114C) /* R/W R/W 0x0000 0000 32 */
417#define SH4A_PCIEDMBCNTR1 (0x021150) /* R/W R/W 0x0000 0000 32 */
418#define SH4A_PCIEDMSBCNTR1 (0x021154) /* R/W R/W 0x0000 0000 32 */
419#define SH4A_PCIEDMSTRR1 (0x021158) /* R/W R/W 0x0000 0000 32 */
420#define SH4A_PCIEDMCCAR1 (0x02115C) /* R/W R/W 0x0000 0000 32 */
421#define SH4A_PCIEDMCCR1 (0x021160) /* R/W R/W 0x0000 0000 32 */
422#define SH4A_PCIEDMCC2R1 (0x021164) /* R/W R/W 0x0000 0000 - */
423#define SH4A_PCIEDMCCCR1 (0x021168) /* R/W R/W 0x0000 0000 32 */
424#define SH4A_PCIEDMSAR2 (0x021180) /* R/W R/W 0x0000 0000 32 */
425#define SH4A_PCIEDMSAHR2 (0x021184) /* R/W R/W 0x0000 0000 32 */
426#define SH4A_PCIEDMDAR2 (0x021188) /* R/W R/W 0x0000 0000 32 */
427#define SH4A_PCIEDMDAHR2 (0x02118C) /* R/W R/W 0x0000 0000 32 */
428#define SH4A_PCIEDMBCNTR2 (0x021190) /* R/W R/W 0x0000 0000 32 */
429#define SH4A_PCIEDMSBCNTR2 (0x021194) /* R/W R/W 0x0000 0000 32 */
430#define SH4A_PCIEDMSTRR2 (0x021198) /* R/W R/W 0x0000 0000 32 */
431#define SH4A_PCIEDMCCAR2 (0x02119C) /* R/W R/W 0x0000 0000 32 */
432#define SH4A_PCIEDMCCR2 (0x0211A0) /* R/W R/W 0x0000 0000 32 */
433#define SH4A_PCIEDMCC2R2 (0x0211A4) /* R/W R/W 0x0000 0000 - */
434#define SH4A_PCIEDMCCCR2 (0x0211A8) /* R/W R/W 0x0000 0000 32 */
435#define SH4A_PCIEDMSAR3 (0x0211C0) /* R/W R/W 0x0000 0000 32 */
436#define SH4A_PCIEDMSAHR3 (0x0211C4) /* R/W R/W 0x0000 0000 32 */
437#define SH4A_PCIEDMDAR3 (0x0211C8) /* R/W R/W 0x0000 0000 32 */
438#define SH4A_PCIEDMDAHR3 (0x0211CC) /* R/W R/W 0x0000 0000 32 */
439#define SH4A_PCIEDMBCNTR3 (0x0211D0) /* R/W R/W 0x0000 0000 32 */
440#define SH4A_PCIEDMSBCNTR3 (0x0211D4) /* R/W R/W 0x0000 0000 32 */
441#define SH4A_PCIEDMSTRR3 (0x0211D8) /* R/W R/W 0x0000 0000 32 */
442#define SH4A_PCIEDMCCAR3 (0x0211DC) /* R/W R/W 0x0000 0000 32 */
443#define SH4A_PCIEDMCCR3 (0x0211E0) /* R/W R/W 0x0000 0000 32 */
444#define SH4A_PCIEDMCC2R3 (0x0211E4) /* R/W R/W 0x0000 0000 - */
445#define SH4A_PCIEDMCCCR3 (0x0211E8) /* R/W R/W 0x0000 0000 32 */
446#define SH4A_PCIEPCICONF0 (0x040000) /* R R - 8/16/32 */
447#define SH4A_PCIEPCICONF1 (0x040004) /* R/W R/W 0x0008 0000 8/16/32 */
448#define SH4A_PCIEPCICONF2 (0x040008) /* R/W R/W 0xFF00 0000 8/16/32 */
449#define SH4A_PCIEPCICONF3 (0x04000C) /* R/W R/W 0x0000 0000 8/16/32 */
450#define SH4A_PCIEPCICONF4 (0x040010) /* - R/W - 8/16/32 */
451#define SH4A_PCIEPCICONF5 (0x040014) /* - R/W - 8/16/32 */
452#define SH4A_PCIEPCICONF6 (0x040018) /* - R/W - 8/16/32 */
453#define SH4A_PCIEPCICONF7 (0x04001C) /* - R/W - 8/16/32 */
454#define SH4A_PCIEPCICONF8 (0x040020) /* - R/W - 8/16/32 */
455#define SH4A_PCIEPCICONF9 (0x040024) /* - R/W - 8/16/32 */
456#define SH4A_PCIEPCICONF10 (0x040028) /* R/W R/W 0x0000 0000 8/16/32 */
457#define SH4A_PCIEPCICONF11 (0x04002C) /* R/W R/W 0x0000 0000 8/16/32 */
458#define SH4A_PCIEPCICONF12 (0x040030) /* R/W R/W 0x0000 0000 8/16/32 */
459#define SH4A_PCIEPCICONF13 (0x040034) /* R/W R/W 0x0000 0040 8/16/32 */
460#define SH4A_PCIEPCICONF14 (0x040038) /* R/W R/W 0x0000 0000 8/16/32 */
461#define SH4A_PCIEPCICONF15 (0x04003C) /* R/W R/W 0x0000 00FF 8/16/32 */
462#define SH4A_PCIEPMCAP0 (0x040040) /* R/W R 0x0003 5001 8/16/32 */
463#define SH4A_PCIEPMCAP1 (0x040044) /* R/W R/W 0x0000 0000 8/16/32 */
464#define SH4A_PCIEMSICAP0 (0x040050) /* R/W R/W 0x0180 7005 8/16/32 */
465#define SH4A_PCIEMSICAP1 (0x040054) /* R/W R/W 0x0000 0000 8/16/32 */
466#define SH4A_PCIEMSICAP2 (0x040058) /* R/W R/W 0x0000 0000 8/16/32 */
467#define SH4A_PCIEMSICAP3 (0x04005C) /* R/W R/W 0x0000 0000 8/16/32 */
468#define SH4A_PCIEMSICAP4 (0x040060) /* R/W R/W 0x0000 0000 8/16/32 */
469#define SH4A_PCIEMSICAP5 (0x040064) /* R/W R/W 0x0000 0000 8/16/32 */
470#define SH4A_PCIEEXPCAP0 (0x040070) /* R/W R/W 0x0001 0010 8/16/32 */
471#define SH4A_PCIEEXPCAP1 (0x040074) /* R/W R 0x0000 0005 8/16/32 */
472#define SH4A_PCIEEXPCAP2 (0x040078) /* R/W R/W 0x0000 0801 8/16/32 */
473#define SH4A_PCIEEXPCAP3 (0x04007C) /* R/W R 0x0003 F421 8/16/32 */
474#define SH4A_PCIEEXPCAP4 (0x040080) /* R/W R/W 0x0041 0000 8/16/32 */
475#define SH4A_PCIEEXPCAP5 (0x040084) /* R/W R/W 0x0000 0000 8/16/32 */
476#define SH4A_PCIEEXPCAP6 (0x040088) /* R/W R/W 0x0000 03C0 8/16/32 */
477#define SH4A_PCIEEXPCAP7 (0x04008C) /* R/W R/W 0x0000 0000 8/16/32 */
478#define SH4A_PCIEEXPCAP8 (0x040090) /* R/W R/W 0x0000 0000 8/16/32 */
479#define SH4A_PCIEVCCAP0 (0x040100) /* R/W R 0x1B01 0002 8/16/32 */
480#define SH4A_PCIEVCCAP1 (0x040104) /* R R 0x0000 0001 8/16/32 */
481#define SH4A_PCIEVCCAP2 (0x040108) /* R R 0x0000 0000 8/16/32 */
482#define SH4A_PCIEVCCAP3 (0x04010C) /* R R/W 0x0000 0000 8/16/32 */
483#define SH4A_PCIEVCCAP4 (0x040110) /* R/W R/W 0x0000 0000 8/16/32 */
484#define SH4A_PCIEVCCAP5 (0x040114) /* R/W R/W 0x8000 00FF 8/16/32 */
485#define SH4A_PCIEVCCAP6 (0x040118) /* R/W R 0x0002 0000 8/16/32 */
486#define SH4A_PCIEVCCAP7 (0x04011C) /* R/W R/W 0x0000 0000 8/16/32 */
487#define SH4A_PCIEVCCAP8 (0x040120) /* R/W R/W 0x0000 0000 8/16/32 */
488#define SH4A_PCIEVCCAP9 (0x040124) /* R/W R 0x0002 0000 8/16/32 */
489#define SH4A_PCIENUMCAP0 (0x0001B0) /* RW R 0x0001 0003 8/16/32 */
490#define SH4A_PCIENUMCAP1 (0x0001B4) /* R R 0x0000 0000 8/16/32 */
491#define SH4A_PCIENUMCAP2 (0x0001B8) /* R R 0x0000 0000 8/16/32 */
492#define SH4A_PCIEIDSETR0 (0x041000) /* R/W R 0x0000 FFFF 16/32 */
493#define SH4A_PCIEIDSETR1 (0x041004) /* R/W R 0xFF00 0000 16/32 */
494#define SH4A_PCIEBAR0SETR (0x041008) /* R/W R 0x0000 0000 16/32 */
495#define SH4A_PCIEBAR1SETR (0x04100C) /* R/W R 0x0000 0000 16/32 */
496#define SH4A_PCIEBAR2SETR (0x041010) /* R/W R 0x0000 0000 16/32 */
497#define SH4A_PCIEBAR3SETR (0x041014) /* R/W R 0x0000 0000 16/32 */
498#define SH4A_PCIEBAR4SETR (0x041018) /* R/W R 0x0000 0000 16/32 */
499#define SH4A_PCIEBAR5SETR (0x04101C) /* R/W R 0x0000 0000 16/32 */
500#define SH4A_PCIECISSETR (0x041020) /* R/W R 0x0000 0000 16/32 */
501#define SH4A_PCIEIDSETR2 (0x041024) /* R/W R 0x0000 0000 16/32 */
502#define SH4A_PCIEEROMSETR (0x041028) /* R/W R 0x0000 0000 16/32 */
503#define SH4A_PCIEDSERSETR0 (0x04102C) /* R/W R 0x0000 0000 16/32 */
504#define SH4A_PCIEDSERSETR1 (0x041030) /* R/W R 0x0000 0000 16/32 */
505#define SH4A_PCIECTLR (0x041040) /* R/W R 0x0000 0000 16/32 */
506#define SH4A_PCIETLSR (0x041044) /* R/W1C R 0x0000 0000 16/32 */
507#define SH4A_PCIETLCTLR (0x041048) /* R/W R 0x0000 0000 16/32 */
508#define SH4A_PCIEDLSR (0x04104C) /* R/W1C R 0x4003 0000 16/32 */
509#define SH4A_PCIEDLCTLR (0x041050) /* R R 0x0000 0000 16/32 */
510#define SH4A_PCIEMACSR (0x041054) /* R/W1C R 0x0041 0000 16/32 */
511#define SH4A_PCIEMACCTLR (0x041058) /* R/W R 0x0000 0000 16/32 */
512#define PCIEMACCTLR_SCR_DIS (1 << 27) /* scramble disable */
513#define SH4A_PCIEPMSTR (0x04105C) /* R/W1C R 0x0000 0000 16/32 */
514#define SH4A_PCIEPMCTLR (0x041060) /* R/W R 0x0000 0000 16/32 */
515#define SH4A_PCIETLINTENR (0x041064) /* R/W R 0x0000 0000 16/32 */
516#define SH4A_PCIEDLINTENR (0x041068) /* R/W R 0x0000 0000 16/32 */
517#define PCIEDLINTENR_DLL_ACT_ENABLE (1 << 31) /* DL active irq */
518#define SH4A_PCIEMACINTENR (0x04106C) /* R/W R 0x0000 0000 16/32 */
519#define SH4A_PCIEPMINTENR (0x041070) /* R/W R 0x0000 0000 16/32 */
520#define SH4A_PCIETXDCTLR (0x044000) /* R/W - H'00000000_00000000 32/64 */
521#define SH4A_PCIETXCTLR (0x044020) /* R/W - H'00000000_00000000 32/64 */
522#define SH4A_PCIETXSR (0x044028) /* R - H'00000000_00000000 32/64 */
523#define SH4A_PCIETXVC0DCTLR (0x044100) /* R/W - H'00000000_00000000 32/64 */
524#define SH4A_PCIETXVC0SR (0x044108) /* R/W - H'00888000_00000000 32/64 */
525#define SH4A_PCIEVC0PDTXR (0x044110) /* W - H'00000000_00000000 32/64 */
526#define SH4A_PCIEVC0PHTXR (0x044118) /* W - H'00000000_00000000 32/64 */
527#define SH4A_PCIEVC0NPDTXR (0x044120) /* W - H'00000000_00000000 32/64 */
528#define SH4A_PCIEVC0NPHTXR (0x044128) /* W - H'00000000_00000000 32/64 */
529#define SH4A_PCIEVC0CDTXR (0x044130) /* W - H'00000000_00000000 32/64 */
530#define SH4A_PCIEVC0CHTXR (0x044138) /* W - H'00000000_00000000 32/64 */
531#define SH4A_PCIETXVCXDCTLR (0x044200) /* R/W - H'00000000_00000000 32/64 */
532#define SH4A_PCIETXVCXSR (0x044208) /* R/W - H'00000000_00000000 32/64 */
533#define SH4A_PCIEVCXPDTXR (0x044210) /* W - H'00000000_00000000 32/64 */
534#define SH4A_PCIEVCXPHTXR (0x044218) /* W - H'00000000_00000000 32/64 */
535#define SH4A_PCIEVCXNPDTXR (0x044220) /* W - H'00000000_00000000 32/64 */
536#define SH4A_PCIEVCXNPHTXR (0x044228) /* W - H'00000000_00000000 32/64 */
537#define SH4A_PCIEVCXCDTXR (0x044230) /* W - H'00000000_00000000 32/64 */
538#define SH4A_PCIEVCXCHTXR (0x044238) /* W - H'00000000_00000000 32/64 */
539#define SH4A_PCIERDCTLR (0x046000) /* RW - H'00000000_00000000 32/64 */
540#define SH4A_PCIEERPCTLR (0x046008) /* RW - H'00000000_00000000 32/64 */
541#define SH4A_PCIEERPHR (0x046010) /* R - H'00000000_00000000 32/64 */
542#define SH4A_PCIEERPERR (0x046018) /* R - H'00000000_00000000 32/64 */
543#define SH4A_PCIERXVC0DCTLR (0x046100) /* RW - H'00000000_00000000 32/64 */
544#define SH4A_PCIERXVC0SR (0x046108) /* RW - H'00000000_00000000 32/64 */
545#define SH4A_PCIEVC0PDRXR (0x046140) /* R - H'00000000_00000000 32/64 */
546#define SH4A_PCIEVC0PHRXR (0x046148) /* R - H'00000000_00000000 32/64 */
547#define SH4A_PCIEVC0PERR (0x046150) /* R - H'00000000_00000000 32/64 */
548#define SH4A_PCIEVC0NPDRXR (0x046158) /* R - H'00000000_00000000 32/64 */
549#define SH4A_PCIEVC0NPHRXR (0x046160) /* R - H'00000000_00000000 32/64 */
550#define SH4A_PCIEVC0NPERR (0x046168) /* R - H'00000000_00000000 32/64 */
551#define SH4A_PCIEVC0CDRXR (0x046170) /* R - H'00000000_00000000 32/64 */
552#define SH4A_PCIEVC0CHRXR (0x046178) /* R - H'00000000_00000000 32/64 */
553#define SH4A_PCIEVC0CERR (0x046180) /* R - H'00000000_00000000 32/64 */
554#define SH4A_PCIERXVCXDCTLR (0x046200) /* RW - H'00000000_00000000 32/64 */
555#define SH4A_PCIERXVCXSR (0x046208) /* RW - H'00000000_00000000 32/64 */
556#define SH4A_PCIEVCXPDRXR (0x046240) /* R - H'00000000_00000000 32/64 */
557#define SH4A_PCIEVCXPHRXR (0x046248) /* R H'00000000_00000000 32/64 */
558#define SH4A_PCIEVCXPERR (0x046250) /* R H'00000000_00000000 32/64 */
559#define SH4A_PCIEVCXNPDRXR (0x046258) /* R H'00000000_00000000 32/64 */
560#define SH4A_PCIEVCXNPHRXR (0x046260) /* R H'00000000_00000000 32/64 */
561#define SH4A_PCIEVCXNPERR (0x046268) /* R H'00000000_00000000 32/64 */
562#define SH4A_PCIEVCXCDRXR (0x046270) /* R H'00000000_00000000 32/64 */
563#define SH4A_PCIEVCXCHRXR (0x046278) /* R H'00000000_00000000 32/64 */
564#define SH4A_PCIEVCXCERR (0x046280) /* R H'00000000_00000000 32/64 */
565
566/* SSI Register Definition for MSI WORK AROUND --hamada */
567#define SH4A_PCI_SSI_BASE 0xFFE00000 /* spw config address */
568#define SH4A_PCI_SSI_BASE_LEN 0x00100000 /* 1MB */
569
570#define SH4A_SSICR0 (0x000000)
571#define SH4A_SSICR1 (0x010000)
572#define SH4A_SSICR2 (0x020000)
573#define SH4A_SSICR3 (0x030000)
574
575#define PCI_REG(x) ((x) + 0x40000)
576
577static inline void
578pci_write_reg(struct pci_channel *chan, unsigned long val, unsigned long reg)
579{
580 __raw_writel(val, chan->reg_base + reg);
581}
582
583static inline unsigned long
584pci_read_reg(struct pci_channel *chan, unsigned long reg)
585{
586 return __raw_readl(chan->reg_base + reg);
587}
588
589#endif /* __PCI_SH7786_H */
diff --git a/arch/sh/include/asm/atomic-irq.h b/arch/sh/include/asm/atomic-irq.h
index a0b348068cae..467d9415a32e 100644
--- a/arch/sh/include/asm/atomic-irq.h
+++ b/arch/sh/include/asm/atomic-irq.h
@@ -10,29 +10,29 @@ static inline void atomic_add(int i, atomic_t *v)
10{ 10{
11 unsigned long flags; 11 unsigned long flags;
12 12
13 local_irq_save(flags); 13 raw_local_irq_save(flags);
14 v->counter += i; 14 v->counter += i;
15 local_irq_restore(flags); 15 raw_local_irq_restore(flags);
16} 16}
17 17
18static inline void atomic_sub(int i, atomic_t *v) 18static inline void atomic_sub(int i, atomic_t *v)
19{ 19{
20 unsigned long flags; 20 unsigned long flags;
21 21
22 local_irq_save(flags); 22 raw_local_irq_save(flags);
23 v->counter -= i; 23 v->counter -= i;
24 local_irq_restore(flags); 24 raw_local_irq_restore(flags);
25} 25}
26 26
27static inline int atomic_add_return(int i, atomic_t *v) 27static inline int atomic_add_return(int i, atomic_t *v)
28{ 28{
29 unsigned long temp, flags; 29 unsigned long temp, flags;
30 30
31 local_irq_save(flags); 31 raw_local_irq_save(flags);
32 temp = v->counter; 32 temp = v->counter;
33 temp += i; 33 temp += i;
34 v->counter = temp; 34 v->counter = temp;
35 local_irq_restore(flags); 35 raw_local_irq_restore(flags);
36 36
37 return temp; 37 return temp;
38} 38}
@@ -41,11 +41,11 @@ static inline int atomic_sub_return(int i, atomic_t *v)
41{ 41{
42 unsigned long temp, flags; 42 unsigned long temp, flags;
43 43
44 local_irq_save(flags); 44 raw_local_irq_save(flags);
45 temp = v->counter; 45 temp = v->counter;
46 temp -= i; 46 temp -= i;
47 v->counter = temp; 47 v->counter = temp;
48 local_irq_restore(flags); 48 raw_local_irq_restore(flags);
49 49
50 return temp; 50 return temp;
51} 51}
@@ -54,18 +54,18 @@ static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
54{ 54{
55 unsigned long flags; 55 unsigned long flags;
56 56
57 local_irq_save(flags); 57 raw_local_irq_save(flags);
58 v->counter &= ~mask; 58 v->counter &= ~mask;
59 local_irq_restore(flags); 59 raw_local_irq_restore(flags);
60} 60}
61 61
62static inline void atomic_set_mask(unsigned int mask, atomic_t *v) 62static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
63{ 63{
64 unsigned long flags; 64 unsigned long flags;
65 65
66 local_irq_save(flags); 66 raw_local_irq_save(flags);
67 v->counter |= mask; 67 v->counter |= mask;
68 local_irq_restore(flags); 68 raw_local_irq_restore(flags);
69} 69}
70 70
71#endif /* __ASM_SH_ATOMIC_IRQ_H */ 71#endif /* __ASM_SH_ATOMIC_IRQ_H */
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index 157c320272cb..e8e78137c6f5 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -85,4 +85,6 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
85#define smp_mb__after_atomic_inc() barrier() 85#define smp_mb__after_atomic_inc() barrier()
86 86
87#include <asm-generic/atomic-long.h> 87#include <asm-generic/atomic-long.h>
88#include <asm-generic/atomic64.h>
89
88#endif /* __ASM_SH_ATOMIC_H */ 90#endif /* __ASM_SH_ATOMIC_H */
diff --git a/arch/sh/include/asm/checksum.h b/arch/sh/include/asm/checksum.h
index 67496ab0ef04..fc26d1f4b590 100644
--- a/arch/sh/include/asm/checksum.h
+++ b/arch/sh/include/asm/checksum.h
@@ -1,5 +1,5 @@
1#ifdef CONFIG_SUPERH32 1#ifdef CONFIG_SUPERH32
2# include "checksum_32.h" 2# include "checksum_32.h"
3#else 3#else
4# include "checksum_64.h" 4# include <asm-generic/checksum.h>
5#endif 5#endif
diff --git a/arch/sh/include/asm/checksum_64.h b/arch/sh/include/asm/checksum_64.h
deleted file mode 100644
index 9c62a031a8f5..000000000000
--- a/arch/sh/include/asm/checksum_64.h
+++ /dev/null
@@ -1,78 +0,0 @@
1#ifndef __ASM_SH_CHECKSUM_64_H
2#define __ASM_SH_CHECKSUM_64_H
3
4/*
5 * include/asm-sh/checksum_64.h
6 *
7 * Copyright (C) 2000, 2001 Paolo Alberelli
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13
14/*
15 * computes the checksum of a memory block at buff, length len,
16 * and adds in "sum" (32-bit)
17 *
18 * returns a 32-bit number suitable for feeding into itself
19 * or csum_tcpudp_magic
20 *
21 * this function must be called with even lengths, except
22 * for the last fragment, which may be odd
23 *
24 * it's best to have buff aligned on a 32-bit boundary
25 */
26asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
27
28/*
29 * Note: when you get a NULL pointer exception here this means someone
30 * passed in an incorrect kernel address to one of these functions.
31 *
32 * If you use these functions directly please don't forget the
33 * access_ok().
34 */
35
36
37__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len,
38 __wsum sum);
39
40__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
41 int len, __wsum sum, int *err_ptr);
42
43static inline __sum16 csum_fold(__wsum csum)
44{
45 u32 sum = (__force u32)csum;
46 sum = (sum & 0xffff) + (sum >> 16);
47 sum = (sum & 0xffff) + (sum >> 16);
48 return (__force __sum16)~sum;
49}
50
51__sum16 ip_fast_csum(const void *iph, unsigned int ihl);
52
53__wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
54 unsigned short len, unsigned short proto,
55 __wsum sum);
56
57/*
58 * computes the checksum of the TCP/UDP pseudo-header
59 * returns a 16-bit checksum, already complemented
60 */
61static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
62 unsigned short len,
63 unsigned short proto,
64 __wsum sum)
65{
66 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
67}
68
69/*
70 * this routine is used for miscellaneous IP-like checksums, mainly
71 * in icmp.c
72 */
73static inline __sum16 ip_compute_csum(const void *buff, int len)
74{
75 return csum_fold(csum_partial(buff, len, 0));
76}
77
78#endif /* __ASM_SH_CHECKSUM_64_H */
diff --git a/arch/sh/include/asm/current.h b/arch/sh/include/asm/current.h
index 62b63880b333..4c51401b5537 100644
--- a/arch/sh/include/asm/current.h
+++ b/arch/sh/include/asm/current.h
@@ -1,20 +1 @@
1#ifndef __ASM_SH_CURRENT_H #include <asm-generic/current.h>
2#define __ASM_SH_CURRENT_H
3
4/*
5 * Copyright (C) 1999 Niibe Yutaka
6 *
7 */
8
9#include <linux/thread_info.h>
10
11struct task_struct;
12
13static __inline__ struct task_struct * get_current(void)
14{
15 return current_thread_info()->task;
16}
17
18#define current get_current()
19
20#endif /* __ASM_SH_CURRENT_H */
diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h
index 6bd178473878..04ad0e1e637e 100644
--- a/arch/sh/include/asm/dma.h
+++ b/arch/sh/include/asm/dma.h
@@ -16,13 +16,7 @@
16#include <linux/sched.h> 16#include <linux/sched.h>
17#include <linux/sysdev.h> 17#include <linux/sysdev.h>
18#include <cpu/dma.h> 18#include <cpu/dma.h>
19 19#include <asm-generic/dma.h>
20/* The maximum address that we can perform a DMA transfer to on this platform */
21/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any
22 occurrence should be flagged as an error. */
23/* But... */
24/* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */
25#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000)
26 20
27#ifdef CONFIG_NR_DMA_CHANNELS 21#ifdef CONFIG_NR_DMA_CHANNELS
28# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) 22# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
@@ -137,8 +131,6 @@ extern int dma_xfer(unsigned int chan, unsigned long from,
137 131
138extern int request_dma_bycap(const char **dmac, const char **caps, 132extern int request_dma_bycap(const char **dmac, const char **caps,
139 const char *dev_id); 133 const char *dev_id);
140extern int request_dma(unsigned int chan, const char *dev_id);
141extern void free_dma(unsigned int chan);
142extern int get_dma_residue(unsigned int chan); 134extern int get_dma_residue(unsigned int chan);
143extern struct dma_info *get_dma_info(unsigned int chan); 135extern struct dma_info *get_dma_info(unsigned int chan);
144extern struct dma_channel *get_dma_channel(unsigned int chan); 136extern struct dma_channel *get_dma_channel(unsigned int chan);
diff --git a/arch/sh/include/asm/ipcbuf.h b/arch/sh/include/asm/ipcbuf.h
index 5ffc9972a7ea..84c7e51cb6d0 100644
--- a/arch/sh/include/asm/ipcbuf.h
+++ b/arch/sh/include/asm/ipcbuf.h
@@ -1,29 +1 @@
1#ifndef __ASM_SH_IPCBUF_H__ #include <asm-generic/ipcbuf.h>
2#define __ASM_SH_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for i386 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __ASM_SH_IPCBUF_H__ */
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index a2b8c99cc06f..df8e1500527c 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -39,7 +39,6 @@ static inline int generic_irq_demux(int irq)
39 return irq; 39 return irq;
40} 40}
41 41
42#define irq_canonicalize(irq) (irq)
43#define irq_demux(irq) sh_mv.mv_irq_demux(irq) 42#define irq_demux(irq) sh_mv.mv_irq_demux(irq)
44 43
45void init_IRQ(void); 44void init_IRQ(void);
@@ -54,6 +53,7 @@ extern void irq_ctx_exit(int cpu);
54# define irq_ctx_exit(cpu) do { } while (0) 53# define irq_ctx_exit(cpu) do { } while (0)
55#endif 54#endif
56 55
56#include <asm-generic/irq.h>
57#ifdef CONFIG_CPU_SH5 57#ifdef CONFIG_CPU_SH5
58#include <cpu/irq.h> 58#include <cpu/irq.h>
59#endif 59#endif
diff --git a/arch/sh/include/asm/mman.h b/arch/sh/include/asm/mman.h
index 7d8b72c91a5f..8eebf89f5ab1 100644
--- a/arch/sh/include/asm/mman.h
+++ b/arch/sh/include/asm/mman.h
@@ -1,17 +1 @@
1#ifndef __ASM_SH_MMAN_H #include <asm-generic/mman.h>
2#define __ASM_SH_MMAN_H
3
4#include <asm-generic/mman-common.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) page tables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __ASM_SH_MMAN_H */
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 2a9c55f1a83f..67d8946db193 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -122,30 +122,30 @@ static inline void switch_mm(struct mm_struct *prev,
122 unsigned int cpu = smp_processor_id(); 122 unsigned int cpu = smp_processor_id();
123 123
124 if (likely(prev != next)) { 124 if (likely(prev != next)) {
125 cpu_set(cpu, next->cpu_vm_mask); 125 cpumask_set_cpu(cpu, mm_cpumask(next));
126 set_TTB(next->pgd); 126 set_TTB(next->pgd);
127 activate_context(next, cpu); 127 activate_context(next, cpu);
128 } else 128 } else
129 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) 129 if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)))
130 activate_context(next, cpu); 130 activate_context(next, cpu);
131} 131}
132
133#define activate_mm(prev, next) switch_mm((prev),(next),NULL)
134#define deactivate_mm(tsk,mm) do { } while (0)
135#define enter_lazy_tlb(mm,tsk) do { } while (0)
136
132#else 137#else
133#define get_mmu_context(mm) do { } while (0) 138
134#define init_new_context(tsk,mm) (0)
135#define destroy_context(mm) do { } while (0)
136#define set_asid(asid) do { } while (0) 139#define set_asid(asid) do { } while (0)
137#define get_asid() (0) 140#define get_asid() (0)
138#define cpu_asid(cpu, mm) ({ (void)cpu; NO_CONTEXT; }) 141#define cpu_asid(cpu, mm) ({ (void)cpu; NO_CONTEXT; })
139#define switch_and_save_asid(asid) (0) 142#define switch_and_save_asid(asid) (0)
140#define set_TTB(pgd) do { } while (0) 143#define set_TTB(pgd) do { } while (0)
141#define get_TTB() (0) 144#define get_TTB() (0)
142#define activate_context(mm,cpu) do { } while (0)
143#define switch_mm(prev,next,tsk) do { } while (0)
144#endif /* CONFIG_MMU */
145 145
146#define activate_mm(prev, next) switch_mm((prev),(next),NULL) 146#include <asm-generic/mmu_context.h>
147#define deactivate_mm(tsk,mm) do { } while (0) 147
148#define enter_lazy_tlb(mm,tsk) do { } while (0) 148#endif /* CONFIG_MMU */
149 149
150#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4) 150#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4)
151/* 151/*
diff --git a/arch/sh/include/asm/module.h b/arch/sh/include/asm/module.h
index 46eccd331660..068bf1659750 100644
--- a/arch/sh/include/asm/module.h
+++ b/arch/sh/include/asm/module.h
@@ -1,17 +1,7 @@
1#ifndef _ASM_SH_MODULE_H 1#ifndef _ASM_SH_MODULE_H
2#define _ASM_SH_MODULE_H 2#define _ASM_SH_MODULE_H
3 3
4/* 4#include <asm-generic/module.h>
5 * This file contains the SH architecture specific module code.
6 */
7
8struct mod_arch_specific {
9 /* Nothing to see here .. */
10};
11
12#define Elf_Shdr Elf32_Shdr
13#define Elf_Sym Elf32_Sym
14#define Elf_Ehdr Elf32_Ehdr
15 5
16#ifdef CONFIG_CPU_LITTLE_ENDIAN 6#ifdef CONFIG_CPU_LITTLE_ENDIAN
17# ifdef CONFIG_CPU_SH2 7# ifdef CONFIG_CPU_SH2
diff --git a/arch/sh/include/asm/msgbuf.h b/arch/sh/include/asm/msgbuf.h
index 517432343fb5..809134c644a6 100644
--- a/arch/sh/include/asm/msgbuf.h
+++ b/arch/sh/include/asm/msgbuf.h
@@ -1,31 +1 @@
1#ifndef __ASM_SH_MSGBUF_H #include <asm-generic/msgbuf.h>
2#define __ASM_SH_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for i386 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* __ASM_SH_MSGBUF_H */
diff --git a/arch/sh/include/asm/param.h b/arch/sh/include/asm/param.h
index ae245afdfd6a..965d45427975 100644
--- a/arch/sh/include/asm/param.h
+++ b/arch/sh/include/asm/param.h
@@ -1,22 +1 @@
1#ifndef __ASM_SH_PARAM_H #include <asm-generic/param.h>
2#define __ASM_SH_PARAM_H
3
4#ifdef __KERNEL__
5# define HZ CONFIG_HZ
6# define USER_HZ 100 /* User interfaces are in "ticks" */
7# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* __ASM_SH_PARAM_H */
diff --git a/arch/sh/include/asm/parport.h b/arch/sh/include/asm/parport.h
index f67ba60a2acd..cf252af64590 100644
--- a/arch/sh/include/asm/parport.h
+++ b/arch/sh/include/asm/parport.h
@@ -1,16 +1 @@
1/* #include <asm-generic/parport.h>
2 * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk>
3 *
4 * This file should only be included by drivers/parport/parport_pc.c.
5 */
6#ifndef __ASM_SH_PARPORT_H
7#define __ASM_SH_PARPORT_H
8
9static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma);
10
11static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma)
12{
13 return parport_pc_find_isa_ports(autoirq, autodma);
14}
15
16#endif /* __ASM_SH_PARPORT_H */
diff --git a/arch/sh/include/asm/perf_counter.h b/arch/sh/include/asm/perf_counter.h
new file mode 100644
index 000000000000..a8153c2aa6fa
--- /dev/null
+++ b/arch/sh/include/asm/perf_counter.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_SH_PERF_COUNTER_H
2#define __ASM_SH_PERF_COUNTER_H
3
4/* SH only supports software counters through this interface. */
5#define set_perf_counter_pending() do { } while (0)
6
7#endif /* __ASM_SH_PERF_COUNTER_H */
diff --git a/arch/sh/include/asm/posix_types_32.h b/arch/sh/include/asm/posix_types_32.h
index 2172732c55c8..6a9ceaaf1aea 100644
--- a/arch/sh/include/asm/posix_types_32.h
+++ b/arch/sh/include/asm/posix_types_32.h
@@ -1,118 +1,29 @@
1#ifndef __ASM_SH_POSIX_TYPES_H 1#ifndef __ASM_SH_POSIX_TYPES_32_H
2#define __ASM_SH_POSIX_TYPES_H 2#define __ASM_SH_POSIX_TYPES_32_H
3 3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t; 4typedef unsigned short __kernel_mode_t;
5#define __kernel_mode_t __kernel_mode_t
12typedef unsigned short __kernel_nlink_t; 6typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t; 7#define __kernel_nlink_t __kernel_nlink_t
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t; 8typedef unsigned short __kernel_ipc_pid_t;
9#define __kernel_ipc_pid_t __kernel_ipc_pid_t
16typedef unsigned short __kernel_uid_t; 10typedef unsigned short __kernel_uid_t;
11#define __kernel_uid_t __kernel_uid_t
17typedef unsigned short __kernel_gid_t; 12typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t; 13#define __kernel_gid_t __kernel_gid_t
19typedef int __kernel_ssize_t; 14
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t; 15typedef unsigned int __kernel_uid32_t;
16#define __kernel_uid32_t __kernel_uid32_t
31typedef unsigned int __kernel_gid32_t; 17typedef unsigned int __kernel_gid32_t;
18#define __kernel_gid32_t __kernel_gid32_t
32 19
33typedef unsigned short __kernel_old_uid_t; 20typedef unsigned short __kernel_old_uid_t;
21#define __kernel_old_uid_t __kernel_old_uid_t
34typedef unsigned short __kernel_old_gid_t; 22typedef unsigned short __kernel_old_gid_t;
23#define __kernel_old_gid_t __kernel_old_gid_t
35typedef unsigned short __kernel_old_dev_t; 24typedef unsigned short __kernel_old_dev_t;
25#define __kernel_old_dev_t __kernel_old_dev_t
36 26
37#ifdef __GNUC__ 27#include <asm-generic/posix_types.h>
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42 int val[2];
43} __kernel_fsid_t;
44
45#if defined(__KERNEL__)
46
47#undef __FD_SET
48static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
49{
50 unsigned long __tmp = __fd / __NFDBITS;
51 unsigned long __rem = __fd % __NFDBITS;
52 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
53}
54
55#undef __FD_CLR
56static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
57{
58 unsigned long __tmp = __fd / __NFDBITS;
59 unsigned long __rem = __fd % __NFDBITS;
60 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
61}
62
63
64#undef __FD_ISSET
65static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
66{
67 unsigned long __tmp = __fd / __NFDBITS;
68 unsigned long __rem = __fd % __NFDBITS;
69 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
70}
71
72/*
73 * This will unroll the loop for the normal constant case (8 ints,
74 * for a 256-bit fd_set)
75 */
76#undef __FD_ZERO
77static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
78{
79 unsigned long *__tmp = __p->fds_bits;
80 int __i;
81
82 if (__builtin_constant_p(__FDSET_LONGS)) {
83 switch (__FDSET_LONGS) {
84 case 16:
85 __tmp[ 0] = 0; __tmp[ 1] = 0;
86 __tmp[ 2] = 0; __tmp[ 3] = 0;
87 __tmp[ 4] = 0; __tmp[ 5] = 0;
88 __tmp[ 6] = 0; __tmp[ 7] = 0;
89 __tmp[ 8] = 0; __tmp[ 9] = 0;
90 __tmp[10] = 0; __tmp[11] = 0;
91 __tmp[12] = 0; __tmp[13] = 0;
92 __tmp[14] = 0; __tmp[15] = 0;
93 return;
94
95 case 8:
96 __tmp[ 0] = 0; __tmp[ 1] = 0;
97 __tmp[ 2] = 0; __tmp[ 3] = 0;
98 __tmp[ 4] = 0; __tmp[ 5] = 0;
99 __tmp[ 6] = 0; __tmp[ 7] = 0;
100 return;
101
102 case 4:
103 __tmp[ 0] = 0; __tmp[ 1] = 0;
104 __tmp[ 2] = 0; __tmp[ 3] = 0;
105 return;
106 }
107 }
108 __i = __FDSET_LONGS;
109 while (__i) {
110 __i--;
111 *__tmp = 0;
112 __tmp++;
113 }
114}
115
116#endif /* defined(__KERNEL__) */
117 28
118#endif /* __ASM_SH_POSIX_TYPES_H */ 29#endif /* __ASM_SH_POSIX_TYPES_32_H */
diff --git a/arch/sh/include/asm/posix_types_64.h b/arch/sh/include/asm/posix_types_64.h
index f83e9bd463d8..8cd11485c06b 100644
--- a/arch/sh/include/asm/posix_types_64.h
+++ b/arch/sh/include/asm/posix_types_64.h
@@ -1,127 +1,34 @@
1#ifndef __ASM_SH64_POSIX_TYPES_H 1#ifndef __ASM_SH_POSIX_TYPES_64_H
2#define __ASM_SH64_POSIX_TYPES_H 2#define __ASM_SH_POSIX_TYPES_64_H
3 3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/posix_types.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 *
14 * This file is generally used by user-level software, so you need to
15 * be a little careful about namespace pollution etc. Also, we cannot
16 * assume GCC is being used.
17 */
18
19typedef unsigned long __kernel_ino_t;
20typedef unsigned short __kernel_mode_t; 4typedef unsigned short __kernel_mode_t;
5#define __kernel_mode_t __kernel_mode_t
21typedef unsigned short __kernel_nlink_t; 6typedef unsigned short __kernel_nlink_t;
22typedef long __kernel_off_t; 7#define __kernel_nlink_t __kernel_nlink_t
23typedef int __kernel_pid_t;
24typedef unsigned short __kernel_ipc_pid_t; 8typedef unsigned short __kernel_ipc_pid_t;
9#define __kernel_ipc_pid_t __kernel_ipc_pid_t
25typedef unsigned short __kernel_uid_t; 10typedef unsigned short __kernel_uid_t;
11#define __kernel_uid_t __kernel_uid_t
26typedef unsigned short __kernel_gid_t; 12typedef unsigned short __kernel_gid_t;
13#define __kernel_gid_t __kernel_gid_t
27typedef long unsigned int __kernel_size_t; 14typedef long unsigned int __kernel_size_t;
15#define __kernel_size_t __kernel_size_t
28typedef int __kernel_ssize_t; 16typedef int __kernel_ssize_t;
17#define __kernel_ssize_t __kernel_ssize_t
29typedef int __kernel_ptrdiff_t; 18typedef int __kernel_ptrdiff_t;
30typedef long __kernel_time_t; 19#define __kernel_ptrdiff_t __kernel_ptrdiff_t
31typedef long __kernel_suseconds_t;
32typedef long __kernel_clock_t;
33typedef int __kernel_timer_t;
34typedef int __kernel_clockid_t;
35typedef int __kernel_daddr_t;
36typedef char * __kernel_caddr_t;
37typedef unsigned short __kernel_uid16_t;
38typedef unsigned short __kernel_gid16_t;
39typedef unsigned int __kernel_uid32_t; 20typedef unsigned int __kernel_uid32_t;
21#define __kernel_uid32_t __kernel_uid32_t
40typedef unsigned int __kernel_gid32_t; 22typedef unsigned int __kernel_gid32_t;
23#define __kernel_gid32_t __kernel_gid32_t
41 24
42typedef unsigned short __kernel_old_uid_t; 25typedef unsigned short __kernel_old_uid_t;
26#define __kernel_old_uid_t __kernel_old_uid_t
43typedef unsigned short __kernel_old_gid_t; 27typedef unsigned short __kernel_old_gid_t;
28#define __kernel_old_gid_t __kernel_old_gid_t
44typedef unsigned short __kernel_old_dev_t; 29typedef unsigned short __kernel_old_dev_t;
30#define __kernel_old_dev_t __kernel_old_dev_t
45 31
46#ifdef __GNUC__ 32#include <asm-generic/posix_types.h>
47typedef long long __kernel_loff_t;
48#endif
49
50typedef struct {
51 int val[2];
52} __kernel_fsid_t;
53
54#if defined(__KERNEL__)
55
56#undef __FD_SET
57static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
58{
59 unsigned long __tmp = __fd / __NFDBITS;
60 unsigned long __rem = __fd % __NFDBITS;
61 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
62}
63
64#undef __FD_CLR
65static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
66{
67 unsigned long __tmp = __fd / __NFDBITS;
68 unsigned long __rem = __fd % __NFDBITS;
69 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
70}
71
72
73#undef __FD_ISSET
74static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
75{
76 unsigned long __tmp = __fd / __NFDBITS;
77 unsigned long __rem = __fd % __NFDBITS;
78 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
79}
80
81/*
82 * This will unroll the loop for the normal constant case (8 ints,
83 * for a 256-bit fd_set)
84 */
85#undef __FD_ZERO
86static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
87{
88 unsigned long *__tmp = __p->fds_bits;
89 int __i;
90
91 if (__builtin_constant_p(__FDSET_LONGS)) {
92 switch (__FDSET_LONGS) {
93 case 16:
94 __tmp[ 0] = 0; __tmp[ 1] = 0;
95 __tmp[ 2] = 0; __tmp[ 3] = 0;
96 __tmp[ 4] = 0; __tmp[ 5] = 0;
97 __tmp[ 6] = 0; __tmp[ 7] = 0;
98 __tmp[ 8] = 0; __tmp[ 9] = 0;
99 __tmp[10] = 0; __tmp[11] = 0;
100 __tmp[12] = 0; __tmp[13] = 0;
101 __tmp[14] = 0; __tmp[15] = 0;
102 return;
103
104 case 8:
105 __tmp[ 0] = 0; __tmp[ 1] = 0;
106 __tmp[ 2] = 0; __tmp[ 3] = 0;
107 __tmp[ 4] = 0; __tmp[ 5] = 0;
108 __tmp[ 6] = 0; __tmp[ 7] = 0;
109 return;
110
111 case 4:
112 __tmp[ 0] = 0; __tmp[ 1] = 0;
113 __tmp[ 2] = 0; __tmp[ 3] = 0;
114 return;
115 }
116 }
117 __i = __FDSET_LONGS;
118 while (__i) {
119 __i--;
120 *__tmp = 0;
121 __tmp++;
122 }
123}
124
125#endif /* defined(__KERNEL__) */
126 33
127#endif /* __ASM_SH64_POSIX_TYPES_H */ 34#endif /* __ASM_SH_POSIX_TYPES_64_H */
diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h
index c693d268a413..327cc2e4c97b 100644
--- a/arch/sh/include/asm/scatterlist.h
+++ b/arch/sh/include/asm/scatterlist.h
@@ -1,28 +1,8 @@
1#ifndef __ASM_SH_SCATTERLIST_H 1#ifndef __ASM_SH_SCATTERLIST_H
2#define __ASM_SH_SCATTERLIST_H 2#define __ASM_SH_SCATTERLIST_H
3 3
4#include <asm/types.h>
5
6struct scatterlist {
7#ifdef CONFIG_DEBUG_SG
8 unsigned long sg_magic;
9#endif
10 unsigned long page_link;
11 unsigned int offset; /* for highmem, page offset */
12 unsigned int length;
13 dma_addr_t dma_address;
14 unsigned int dma_length;
15};
16
17#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK 4#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK
18 5
19/* These macros should be used after a pci_map_sg call has been done 6#include <asm-generic/scatterlist.h>
20 * to get bus addresses of each of the SG entries and their lengths.
21 * You should only work with the number of sg entries pci_map_sg
22 * returns, or alternatively stop on the first sg_dma_len(sg) which
23 * is 0.
24 */
25#define sg_dma_address(sg) ((sg)->dma_address)
26#define sg_dma_len(sg) ((sg)->length)
27 7
28#endif /* !(__ASM_SH_SCATTERLIST_H) */ 8#endif /* __ASM_SH_SCATTERLIST_H */
diff --git a/arch/sh/include/asm/sembuf.h b/arch/sh/include/asm/sembuf.h
index d79f3bd570b2..7673b83cfef7 100644
--- a/arch/sh/include/asm/sembuf.h
+++ b/arch/sh/include/asm/sembuf.h
@@ -1,25 +1 @@
1#ifndef __ASM_SH_SEMBUF_H #include <asm-generic/sembuf.h>
2#define __ASM_SH_SEMBUF_H
3
4/*
5 * The semid64_ds structure for i386 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* __ASM_SH_SEMBUF_H */
diff --git a/arch/sh/include/asm/serial.h b/arch/sh/include/asm/serial.h
index 11f854dd1363..a0cb0caff152 100644
--- a/arch/sh/include/asm/serial.h
+++ b/arch/sh/include/asm/serial.h
@@ -1,19 +1 @@
1/* #include <asm-generic/serial.h>
2 * include/asm-sh/serial.h
3 *
4 * Configuration details for 8250, 16450, 16550, etc. serial ports
5 */
6
7#ifndef _ASM_SERIAL_H
8#define _ASM_SERIAL_H
9
10/*
11 * This assumes you have a 1.8432 MHz clock for your UART.
12 *
13 * It'd be nice if someone built a serial card with a 24.576 MHz
14 * clock, since the 16550A is capable of handling a top speed of 1.5
15 * megabits/second; but this requires the faster clock.
16 */
17#define BASE_BAUD ( 1843200 / 16 )
18
19#endif /* _ASM_SERIAL_H */
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index d450bcf59ee2..ce3743599b27 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -1,7 +1,7 @@
1#ifndef _SH_SETUP_H 1#ifndef _SH_SETUP_H
2#define _SH_SETUP_H 2#define _SH_SETUP_H
3 3
4#define COMMAND_LINE_SIZE 256 4#include <asm-generic/setup.h>
5 5
6#ifdef __KERNEL__ 6#ifdef __KERNEL__
7/* 7/*
diff --git a/arch/sh/include/asm/shmbuf.h b/arch/sh/include/asm/shmbuf.h
index b2101f490521..83c05fc2de38 100644
--- a/arch/sh/include/asm/shmbuf.h
+++ b/arch/sh/include/asm/shmbuf.h
@@ -1,42 +1 @@
1#ifndef __ASM_SH_SHMBUF_H #include <asm-generic/shmbuf.h>
2#define __ASM_SH_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for i386 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* __ASM_SH_SHMBUF_H */
diff --git a/arch/sh/include/asm/signal.h b/arch/sh/include/asm/signal.h
index 9cc5f0144689..9ac530a90bce 100644
--- a/arch/sh/include/asm/signal.h
+++ b/arch/sh/include/asm/signal.h
@@ -1,114 +1,10 @@
1#ifndef __ASM_SH_SIGNAL_H 1#ifndef __ASM_SH_SIGNAL_H
2#define __ASM_SH_SIGNAL_H 2#define __ASM_SH_SIGNAL_H
3 3
4#include <linux/types.h>
5
6/* Avoid too many header ordering problems. */
7struct pt_regs;
8struct siginfo;
9
10#ifdef __KERNEL__
11/* Most things should be clean enough to redefine this at will, if care
12 is taken to make libc match. */
13
14#define _NSIG 64
15#define _NSIG_BPW 32
16#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
17
18typedef unsigned long old_sigset_t; /* at least 32 bits */
19
20typedef struct {
21 unsigned long sig[_NSIG_WORDS];
22} sigset_t;
23
24#else
25/* Here we must cater to libcs that poke about in kernel headers. */
26
27#define NSIG 32
28typedef unsigned long sigset_t;
29
30#endif /* __KERNEL__ */
31
32#define SIGHUP 1
33#define SIGINT 2
34#define SIGQUIT 3
35#define SIGILL 4
36#define SIGTRAP 5
37#define SIGABRT 6
38#define SIGIOT 6
39#define SIGBUS 7
40#define SIGFPE 8
41#define SIGKILL 9
42#define SIGUSR1 10
43#define SIGSEGV 11
44#define SIGUSR2 12
45#define SIGPIPE 13
46#define SIGALRM 14
47#define SIGTERM 15
48#define SIGSTKFLT 16
49#define SIGCHLD 17
50#define SIGCONT 18
51#define SIGSTOP 19
52#define SIGTSTP 20
53#define SIGTTIN 21
54#define SIGTTOU 22
55#define SIGURG 23
56#define SIGXCPU 24
57#define SIGXFSZ 25
58#define SIGVTALRM 26
59#define SIGPROF 27
60#define SIGWINCH 28
61#define SIGIO 29
62#define SIGPOLL SIGIO
63/*
64#define SIGLOST 29
65*/
66#define SIGPWR 30
67#define SIGSYS 31
68#define SIGUNUSED 31
69
70/* These should not be considered constants from userland. */
71#define SIGRTMIN 32
72#define SIGRTMAX _NSIG
73
74/*
75 * SA_FLAGS values:
76 *
77 * SA_ONSTACK indicates that a registered stack_t will be used.
78 * SA_RESTART flag to get restarting signals (which were the default long ago)
79 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
80 * SA_RESETHAND clears the handler when the signal is delivered.
81 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
82 * SA_NODEFER prevents the current signal from being masked in the handler.
83 *
84 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
85 * Unix names RESETHAND and NODEFER respectively.
86 */
87#define SA_NOCLDSTOP 0x00000001
88#define SA_NOCLDWAIT 0x00000002
89#define SA_SIGINFO 0x00000004
90#define SA_ONSTACK 0x08000000
91#define SA_RESTART 0x10000000
92#define SA_NODEFER 0x40000000
93#define SA_RESETHAND 0x80000000
94
95#define SA_NOMASK SA_NODEFER
96#define SA_ONESHOT SA_RESETHAND
97
98#define SA_RESTORER 0x04000000 4#define SA_RESTORER 0x04000000
99 5
100/* 6#include <asm-generic/signal.h>
101 * sigaltstack controls
102 */
103#define SS_ONSTACK 1
104#define SS_DISABLE 2
105
106#define MINSIGSTKSZ 2048
107#define SIGSTKSZ 8192
108 7
109#include <asm-generic/signal-defs.h>
110
111#ifdef __KERNEL__
112struct old_sigaction { 8struct old_sigaction {
113 __sighandler_t sa_handler; 9 __sighandler_t sa_handler;
114 old_sigset_t sa_mask; 10 old_sigset_t sa_mask;
@@ -116,45 +12,4 @@ struct old_sigaction {
116 void (*sa_restorer)(void); 12 void (*sa_restorer)(void);
117}; 13};
118 14
119struct sigaction {
120 __sighandler_t sa_handler;
121 unsigned long sa_flags;
122 void (*sa_restorer)(void);
123 sigset_t sa_mask; /* mask last for extensibility */
124};
125
126struct k_sigaction {
127 struct sigaction sa;
128};
129#else
130/* Here we must cater to libcs that poke about in kernel headers. */
131
132struct sigaction {
133 union {
134 __sighandler_t _sa_handler;
135 void (*_sa_sigaction)(int, struct siginfo *, void *);
136 } _u;
137 sigset_t sa_mask;
138 unsigned long sa_flags;
139 void (*sa_restorer)(void);
140};
141
142#define sa_handler _u._sa_handler
143#define sa_sigaction _u._sa_sigaction
144
145#endif /* __KERNEL__ */
146
147typedef struct sigaltstack {
148 void *ss_sp;
149 int ss_flags;
150 size_t ss_size;
151} stack_t;
152
153#ifdef __KERNEL__
154#include <asm/sigcontext.h>
155
156#define ptrace_signal_deliver(regs, cookie) do { } while (0)
157
158#endif /* __KERNEL__ */
159
160#endif /* __ASM_SH_SIGNAL_H */ 15#endif /* __ASM_SH_SIGNAL_H */
diff --git a/arch/sh/include/asm/smp.h b/arch/sh/include/asm/smp.h
index c24e9c6a1736..ca64f43abe67 100644
--- a/arch/sh/include/asm/smp.h
+++ b/arch/sh/include/asm/smp.h
@@ -43,7 +43,8 @@ void plat_start_cpu(unsigned int cpu, unsigned long entry_point);
43void plat_send_ipi(unsigned int cpu, unsigned int message); 43void plat_send_ipi(unsigned int cpu, unsigned int message);
44 44
45void arch_send_call_function_single_ipi(int cpu); 45void arch_send_call_function_single_ipi(int cpu);
46void arch_send_call_function_ipi(cpumask_t mask); 46extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
47#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
47 48
48#else 49#else
49 50
diff --git a/arch/sh/include/asm/socket.h b/arch/sh/include/asm/socket.h
index 345653b96826..6b71384b9d8b 100644
--- a/arch/sh/include/asm/socket.h
+++ b/arch/sh/include/asm/socket.h
@@ -1,60 +1 @@
1#ifndef __ASM_SH_SOCKET_H #include <asm-generic/socket.h>
2#define __ASM_SH_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_RCVBUFFORCE 32
18#define SO_SNDBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#endif /* __ASM_SH_SOCKET_H */
diff --git a/arch/sh/include/asm/swab.h b/arch/sh/include/asm/swab.h
index 0e08fe54ad71..1cd09767a7a3 100644
--- a/arch/sh/include/asm/swab.h
+++ b/arch/sh/include/asm/swab.h
@@ -7,8 +7,7 @@
7 */ 7 */
8#include <linux/compiler.h> 8#include <linux/compiler.h>
9#include <linux/types.h> 9#include <linux/types.h>
10 10#include <asm-generic/swab.h>
11#define __SWAB_64_THRU_32__
12 11
13static inline __attribute_const__ __u32 __arch_swab32(__u32 x) 12static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
14{ 13{
diff --git a/arch/sh/include/asm/termbits.h b/arch/sh/include/asm/termbits.h
index 77db116948cf..3935b106de79 100644
--- a/arch/sh/include/asm/termbits.h
+++ b/arch/sh/include/asm/termbits.h
@@ -1,198 +1 @@
1#ifndef __ASM_SH_TERMBITS_H #include <asm-generic/termbits.h>
2#define __ASM_SH_TERMBITS_H
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61/* c_iflag bits */
62#define IGNBRK 0000001
63#define BRKINT 0000002
64#define IGNPAR 0000004
65#define PARMRK 0000010
66#define INPCK 0000020
67#define ISTRIP 0000040
68#define INLCR 0000100
69#define IGNCR 0000200
70#define ICRNL 0000400
71#define IUCLC 0001000
72#define IXON 0002000
73#define IXANY 0004000
74#define IXOFF 0010000
75#define IMAXBEL 0020000
76#define IUTF8 0040000
77
78/* c_oflag bits */
79#define OPOST 0000001
80#define OLCUC 0000002
81#define ONLCR 0000004
82#define OCRNL 0000010
83#define ONOCR 0000020
84#define ONLRET 0000040
85#define OFILL 0000100
86#define OFDEL 0000200
87#define NLDLY 0000400
88#define NL0 0000000
89#define NL1 0000400
90#define CRDLY 0003000
91#define CR0 0000000
92#define CR1 0001000
93#define CR2 0002000
94#define CR3 0003000
95#define TABDLY 0014000
96#define TAB0 0000000
97#define TAB1 0004000
98#define TAB2 0010000
99#define TAB3 0014000
100#define XTABS 0014000
101#define BSDLY 0020000
102#define BS0 0000000
103#define BS1 0020000
104#define VTDLY 0040000
105#define VT0 0000000
106#define VT1 0040000
107#define FFDLY 0100000
108#define FF0 0000000
109#define FF1 0100000
110
111/* c_cflag bit meaning */
112#define CBAUD 0010017
113#define B0 0000000 /* hang up */
114#define B50 0000001
115#define B75 0000002
116#define B110 0000003
117#define B134 0000004
118#define B150 0000005
119#define B200 0000006
120#define B300 0000007
121#define B600 0000010
122#define B1200 0000011
123#define B1800 0000012
124#define B2400 0000013
125#define B4800 0000014
126#define B9600 0000015
127#define B19200 0000016
128#define B38400 0000017
129#define EXTA B19200
130#define EXTB B38400
131#define CSIZE 0000060
132#define CS5 0000000
133#define CS6 0000020
134#define CS7 0000040
135#define CS8 0000060
136#define CSTOPB 0000100
137#define CREAD 0000200
138#define PARENB 0000400
139#define PARODD 0001000
140#define HUPCL 0002000
141#define CLOCAL 0004000
142#define CBAUDEX 0010000
143#define BOTHER 0010000
144#define B57600 0010001
145#define B115200 0010002
146#define B230400 0010003
147#define B460800 0010004
148#define B500000 0010005
149#define B576000 0010006
150#define B921600 0010007
151#define B1000000 0010010
152#define B1152000 0010011
153#define B1500000 0010012
154#define B2000000 0010013
155#define B2500000 0010014
156#define B3000000 0010015
157#define B3500000 0010016
158#define B4000000 0010017
159#define CIBAUD 002003600000 /* input baud rate */
160#define CMSPAR 010000000000 /* mark or space (stick) parity */
161#define CRTSCTS 020000000000 /* flow control */
162
163#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
164
165/* c_lflag bits */
166#define ISIG 0000001
167#define ICANON 0000002
168#define XCASE 0000004
169#define ECHO 0000010
170#define ECHOE 0000020
171#define ECHOK 0000040
172#define ECHONL 0000100
173#define NOFLSH 0000200
174#define TOSTOP 0000400
175#define ECHOCTL 0001000
176#define ECHOPRT 0002000
177#define ECHOKE 0004000
178#define FLUSHO 0010000
179#define PENDIN 0040000
180#define IEXTEN 0100000
181
182/* tcflow() and TCXONC use these */
183#define TCOOFF 0
184#define TCOON 1
185#define TCIOFF 2
186#define TCION 3
187
188/* tcflush() and TCFLSH use these */
189#define TCIFLUSH 0
190#define TCOFLUSH 1
191#define TCIOFLUSH 2
192
193/* tcsetattr uses these */
194#define TCSANOW 0
195#define TCSADRAIN 1
196#define TCSAFLUSH 2
197
198#endif /* __ASM_SH_TERMBITS_H */
diff --git a/arch/sh/include/asm/termios.h b/arch/sh/include/asm/termios.h
index 0a8c793c76f2..280d78a9d966 100644
--- a/arch/sh/include/asm/termios.h
+++ b/arch/sh/include/asm/termios.h
@@ -1,90 +1 @@
1#ifndef __ASM_SH_TERMIOS_H #include <asm-generic/termios.h>
2#define __ASM_SH_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43
44/* intr=^C quit=^\ erase=del kill=^U
45 eof=^D vtime=\0 vmin=\1 sxtc=\0
46 start=^Q stop=^S susp=^Z eol=\0
47 reprint=^R discard=^U werase=^W lnext=^V
48 eol2=\0
49*/
50#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp,&(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
84#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
85#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
86#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
87
88#endif /* __KERNEL__ */
89
90#endif /* __ASM_SH_TERMIOS_H */
diff --git a/arch/sh/include/asm/timex.h b/arch/sh/include/asm/timex.h
index a873e24113cf..b556d49e5f2b 100644
--- a/arch/sh/include/asm/timex.h
+++ b/arch/sh/include/asm/timex.h
@@ -8,11 +8,6 @@
8 8
9#define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */ 9#define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */
10 10
11typedef unsigned long long cycles_t; 11#include <asm-generic/timex.h>
12
13static __inline__ cycles_t get_cycles (void)
14{
15 return 0;
16}
17 12
18#endif /* __ASM_SH_TIMEX_H */ 13#endif /* __ASM_SH_TIMEX_H */
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index 8489a0905a87..b69ee850906d 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -35,9 +35,6 @@
35#define cpumask_of_node(node) ((void)node, cpu_online_mask) 35#define cpumask_of_node(node) ((void)node, cpu_online_mask)
36 36
37#define pcibus_to_node(bus) ((void)(bus), -1) 37#define pcibus_to_node(bus) ((void)(bus), -1)
38#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \
39 CPU_MASK_ALL : \
40 node_to_cpumask(pcibus_to_node(bus)))
41#define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \ 38#define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \
42 CPU_MASK_ALL_PTR : \ 39 CPU_MASK_ALL_PTR : \
43 cpumask_of_node(pcibus_to_node(bus))) 40 cpumask_of_node(pcibus_to_node(bus)))
diff --git a/arch/sh/include/asm/types.h b/arch/sh/include/asm/types.h
index b13caca62a76..c7f3c94837dd 100644
--- a/arch/sh/include/asm/types.h
+++ b/arch/sh/include/asm/types.h
@@ -1,27 +1,14 @@
1#ifndef __ASM_SH_TYPES_H 1#ifndef __ASM_SH_TYPES_H
2#define __ASM_SH_TYPES_H 2#define __ASM_SH_TYPES_H
3 3
4#include <asm-generic/int-ll64.h> 4#include <asm-generic/types.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11 5
12/* 6/*
13 * These aren't exported outside the kernel to avoid name space clashes 7 * These aren't exported outside the kernel to avoid name space clashes
14 */ 8 */
15#ifdef __KERNEL__ 9#ifdef __KERNEL__
16
17#define BITS_PER_LONG 32
18
19#ifndef __ASSEMBLY__ 10#ifndef __ASSEMBLY__
20 11
21/* Dma addresses are 32-bits wide. */
22
23typedef u32 dma_addr_t;
24
25#ifdef CONFIG_SUPERH32 12#ifdef CONFIG_SUPERH32
26typedef u16 insn_size_t; 13typedef u16 insn_size_t;
27#else 14#else
@@ -29,7 +16,6 @@ typedef u32 insn_size_t;
29#endif 16#endif
30 17
31#endif /* __ASSEMBLY__ */ 18#endif /* __ASSEMBLY__ */
32
33#endif /* __KERNEL__ */ 19#endif /* __KERNEL__ */
34 20
35#endif /* __ASM_SH_TYPES_H */ 21#endif /* __ASM_SH_TYPES_H */
diff --git a/arch/sh/include/asm/ucontext.h b/arch/sh/include/asm/ucontext.h
index 202ef1d5a3c4..9bc07b9f30fb 100644
--- a/arch/sh/include/asm/ucontext.h
+++ b/arch/sh/include/asm/ucontext.h
@@ -1,12 +1 @@
1#ifndef __ASM_SH_UCONTEXT_H #include <asm-generic/ucontext.h>
2#define __ASM_SH_UCONTEXT_H
3
4struct ucontext {
5 unsigned long uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif /* __ASM_SH_UCONTEXT_H */
diff --git a/arch/sh/include/asm/unaligned.h b/arch/sh/include/asm/unaligned.h
index 8c0ad5e4487a..7d14e0669961 100644
--- a/arch/sh/include/asm/unaligned.h
+++ b/arch/sh/include/asm/unaligned.h
@@ -6,19 +6,7 @@
6#include <asm/unaligned-sh4a.h> 6#include <asm/unaligned-sh4a.h>
7#else 7#else
8/* Otherwise, SH can't handle unaligned accesses. */ 8/* Otherwise, SH can't handle unaligned accesses. */
9#ifdef __LITTLE_ENDIAN__ 9#include <asm-generic/unaligned.h>
10# include <linux/unaligned/le_struct.h>
11# include <linux/unaligned/be_byteshift.h>
12# include <linux/unaligned/generic.h>
13# define get_unaligned __get_unaligned_le
14# define put_unaligned __put_unaligned_le
15#else
16# include <linux/unaligned/be_struct.h>
17# include <linux/unaligned/le_byteshift.h>
18# include <linux/unaligned/generic.h>
19# define get_unaligned __get_unaligned_be
20# define put_unaligned __put_unaligned_be
21#endif
22#endif 10#endif
23 11
24#endif /* _ASM_SH_UNALIGNED_H */ 12#endif /* _ASM_SH_UNALIGNED_H */
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 65197086a1c5..61d6ad93d786 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -344,8 +344,9 @@
344#define __NR_preadv 333 344#define __NR_preadv 333
345#define __NR_pwritev 334 345#define __NR_pwritev 334
346#define __NR_rt_tgsigqueueinfo 335 346#define __NR_rt_tgsigqueueinfo 335
347#define __NR_perf_counter_open 336
347 348
348#define NR_syscalls 336 349#define NR_syscalls 337
349 350
350#ifdef __KERNEL__ 351#ifdef __KERNEL__
351 352
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 8014aea88ec3..a751699afda3 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -384,10 +384,11 @@
384#define __NR_preadv 361 384#define __NR_preadv 361
385#define __NR_pwritev 362 385#define __NR_pwritev 362
386#define __NR_rt_tgsigqueueinfo 363 386#define __NR_rt_tgsigqueueinfo 363
387#define __NR_perf_counter_open 364
387 388
388#ifdef __KERNEL__ 389#ifdef __KERNEL__
389 390
390#define NR_syscalls 364 391#define NR_syscalls 365
391 392
392#define __ARCH_WANT_IPC_PARSE_VERSION 393#define __ARCH_WANT_IPC_PARSE_VERSION
393#define __ARCH_WANT_OLD_READDIR 394#define __ARCH_WANT_OLD_READDIR
diff --git a/arch/sh/include/mach-common/mach/highlander.h b/arch/sh/include/mach-common/mach/highlander.h
index bd26a848cb0b..5d9d4d5154be 100644
--- a/arch/sh/include/mach-common/mach/highlander.h
+++ b/arch/sh/include/mach-common/mach/highlander.h
@@ -2,6 +2,9 @@
2#define __ASM_SH_RENESAS_R7780RP_H 2#define __ASM_SH_RENESAS_R7780RP_H
3 3
4/* Box specific addresses. */ 4/* Box specific addresses. */
5#define PA_NORFLASH_ADDR 0x00000000
6#define PA_NORFLASH_SIZE 0x04000000
7
5#if defined(CONFIG_SH_R7780MP) 8#if defined(CONFIG_SH_R7780MP)
6#define PA_BCR 0xa4000000 /* FPGA */ 9#define PA_BCR 0xa4000000 /* FPGA */
7#define PA_SDPOW (-1) 10#define PA_SDPOW (-1)
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index 275942e58e4f..6dfe2cced3fc 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -1,6 +1,6 @@
1#include <linux/clk.h> 1#include <linux/clk.h>
2#include <linux/compiler.h> 2#include <linux/compiler.h>
3#include <linux/bootmem.h> 3#include <linux/slab.h>
4#include <linux/io.h> 4#include <linux/io.h>
5#include <asm/clock.h> 5#include <asm/clock.h>
6 6
@@ -127,10 +127,11 @@ int __init sh_clk_div6_register(struct clk *clks, int nr)
127 int k; 127 int k;
128 128
129 freq_table_size *= (nr_divs + 1); 129 freq_table_size *= (nr_divs + 1);
130 130 freq_table = kzalloc(freq_table_size * nr, GFP_KERNEL);
131 freq_table = alloc_bootmem(freq_table_size * nr); 131 if (!freq_table) {
132 if (!freq_table) 132 pr_err("sh_clk_div6_register: unable to alloc memory\n");
133 return -ENOMEM; 133 return -ENOMEM;
134 }
134 135
135 for (k = 0; !ret && (k < nr); k++) { 136 for (k = 0; !ret && (k < nr); k++) {
136 clkp = clks + k; 137 clkp = clks + k;
@@ -175,10 +176,11 @@ int __init sh_clk_div4_register(struct clk *clks, int nr,
175 int k; 176 int k;
176 177
177 freq_table_size *= (nr_divs + 1); 178 freq_table_size *= (nr_divs + 1);
178 179 freq_table = kzalloc(freq_table_size * nr, GFP_KERNEL);
179 freq_table = alloc_bootmem(freq_table_size * nr); 180 if (!freq_table) {
180 if (!freq_table) 181 pr_err("sh_clk_div4_register: unable to alloc memory\n");
181 return -ENOMEM; 182 return -ENOMEM;
183 }
182 184
183 for (k = 0; !ret && (k < nr); k++) { 185 for (k = 0; !ret && (k < nr); k++) {
184 clkp = clks + k; 186 clkp = clks + k;
diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
index b8869aa20dec..2b6b0d50c576 100644
--- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c
@@ -35,8 +35,7 @@ void __init plat_smp_setup(void)
35 unsigned int cpu = 0; 35 unsigned int cpu = 0;
36 int i, num; 36 int i, num;
37 37
38 cpus_clear(cpu_possible_map); 38 init_cpu_possible(cpumask_of(cpu));
39 cpu_set(cpu, cpu_possible_map);
40 39
41 __cpu_number_map[0] = 0; 40 __cpu_number_map[0] = 0;
42 __cpu_logical_map[0] = 0; 41 __cpu_logical_map[0] = 0;
@@ -46,7 +45,7 @@ void __init plat_smp_setup(void)
46 * for the total number of cores. 45 * for the total number of cores.
47 */ 46 */
48 for (i = 1, num = 0; i < NR_CPUS; i++) { 47 for (i = 1, num = 0; i < NR_CPUS; i++) {
49 cpu_set(i, cpu_possible_map); 48 set_cpu_possible(i, true);
50 __cpu_number_map[i] = ++num; 49 __cpu_number_map[i] = ++num;
51 __cpu_logical_map[num] = i; 50 __cpu_logical_map[num] = i;
52 } 51 }
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
index 4c3247477aa3..066f37dc32a9 100644
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2008 Matt Fleming <mjf@gentoo.org> 2 * Copyright (C) 2008 Matt Fleming <matt@console-pimps.org>
3 * Copyright (C) 2008 Paul Mundt <lethal@linux-sh.org> 3 * Copyright (C) 2008 Paul Mundt <lethal@linux-sh.org>
4 * 4 *
5 * Code for replacing ftrace calls with jumps. 5 * Code for replacing ftrace calls with jumps.
@@ -19,30 +19,37 @@
19#include <asm/ftrace.h> 19#include <asm/ftrace.h>
20#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
21 21
22static unsigned char ftrace_nop[] = {
23 0x09, 0x00, /* nop */
24 0x09, 0x00, /* nop */
25};
26
27static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE]; 22static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE];
28 23
29unsigned char *ftrace_nop_replace(void) 24static unsigned char ftrace_nop[4];
25/*
26 * If we're trying to nop out a call to a function, we instead
27 * place a call to the address after the memory table.
28 *
29 * 8c011060 <a>:
30 * 8c011060: 02 d1 mov.l 8c01106c <a+0xc>,r1
31 * 8c011062: 22 4f sts.l pr,@-r15
32 * 8c011064: 02 c7 mova 8c011070 <a+0x10>,r0
33 * 8c011066: 2b 41 jmp @r1
34 * 8c011068: 2a 40 lds r0,pr
35 * 8c01106a: 09 00 nop
36 * 8c01106c: 68 24 .word 0x2468 <--- ip
37 * 8c01106e: 1d 8c .word 0x8c1d
38 * 8c011070: 26 4f lds.l @r15+,pr <--- ip + MCOUNT_INSN_SIZE
39 *
40 * We write 0x8c011070 to 0x8c01106c so that on entry to a() we branch
41 * past the _mcount call and continue executing code like normal.
42 */
43static unsigned char *ftrace_nop_replace(unsigned long ip)
30{ 44{
45 __raw_writel(ip + MCOUNT_INSN_SIZE, ftrace_nop);
31 return ftrace_nop; 46 return ftrace_nop;
32} 47}
33 48
34static int is_sh_nop(unsigned char *ip) 49static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
35{
36 return strncmp(ip, ftrace_nop, sizeof(ftrace_nop));
37}
38
39unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
40{ 50{
41 /* Place the address in the memory table. */ 51 /* Place the address in the memory table. */
42 if (addr == CALLER_ADDR) 52 __raw_writel(addr, ftrace_replaced_code);
43 __raw_writel(addr + MCOUNT_INSN_OFFSET, ftrace_replaced_code);
44 else
45 __raw_writel(addr, ftrace_replaced_code);
46 53
47 /* 54 /*
48 * No locking needed, this must be called via kstop_machine 55 * No locking needed, this must be called via kstop_machine
@@ -51,7 +58,7 @@ unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
51 return ftrace_replaced_code; 58 return ftrace_replaced_code;
52} 59}
53 60
54int ftrace_modify_code(unsigned long ip, unsigned char *old_code, 61static int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
55 unsigned char *new_code) 62 unsigned char *new_code)
56{ 63{
57 unsigned char replaced[MCOUNT_INSN_SIZE]; 64 unsigned char replaced[MCOUNT_INSN_SIZE];
@@ -66,13 +73,6 @@ int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
66 * kstop_machine, or before SMP starts. 73 * kstop_machine, or before SMP starts.
67 */ 74 */
68 75
69 /*
70 * If we're trying to nop out a call to a function, we instead
71 * place a call to the address after the memory table.
72 */
73 if (is_sh_nop(new_code) == 0)
74 __raw_writel(ip + MCOUNT_INSN_SIZE, (unsigned long)new_code);
75
76 /* read the text we want to modify */ 76 /* read the text we want to modify */
77 if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE)) 77 if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE))
78 return -EFAULT; 78 return -EFAULT;
@@ -92,13 +92,13 @@ int ftrace_modify_code(unsigned long ip, unsigned char *old_code,
92 92
93int ftrace_update_ftrace_func(ftrace_func_t func) 93int ftrace_update_ftrace_func(ftrace_func_t func)
94{ 94{
95 unsigned long ip = (unsigned long)(&ftrace_call); 95 unsigned long ip = (unsigned long)(&ftrace_call) + MCOUNT_INSN_OFFSET;
96 unsigned char old[MCOUNT_INSN_SIZE], *new; 96 unsigned char old[MCOUNT_INSN_SIZE], *new;
97 97
98 memcpy(old, (unsigned char *)(ip + MCOUNT_INSN_OFFSET), MCOUNT_INSN_SIZE); 98 memcpy(old, (unsigned char *)ip, MCOUNT_INSN_SIZE);
99 new = ftrace_call_replace(ip, (unsigned long)func); 99 new = ftrace_call_replace(ip, (unsigned long)func);
100 100
101 return ftrace_modify_code(ip + MCOUNT_INSN_OFFSET, old, new); 101 return ftrace_modify_code(ip, old, new);
102} 102}
103 103
104int ftrace_make_nop(struct module *mod, 104int ftrace_make_nop(struct module *mod,
@@ -108,7 +108,7 @@ int ftrace_make_nop(struct module *mod,
108 unsigned long ip = rec->ip; 108 unsigned long ip = rec->ip;
109 109
110 old = ftrace_call_replace(ip, addr); 110 old = ftrace_call_replace(ip, addr);
111 new = ftrace_nop_replace(); 111 new = ftrace_nop_replace(ip);
112 112
113 return ftrace_modify_code(rec->ip, old, new); 113 return ftrace_modify_code(rec->ip, old, new);
114} 114}
@@ -118,7 +118,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
118 unsigned char *new, *old; 118 unsigned char *new, *old;
119 unsigned long ip = rec->ip; 119 unsigned long ip = rec->ip;
120 120
121 old = ftrace_nop_replace(); 121 old = ftrace_nop_replace(ip);
122 new = ftrace_call_replace(ip, addr); 122 new = ftrace_call_replace(ip, addr);
123 123
124 return ftrace_modify_code(rec->ip, old, new); 124 return ftrace_modify_code(rec->ip, old, new);
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index 8f54ef0cfbca..f5bd156ea504 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -38,13 +38,6 @@ EXPORT_SYMBOL(clear_user_page);
38EXPORT_SYMBOL(flush_dcache_page); 38EXPORT_SYMBOL(flush_dcache_page);
39#endif 39#endif
40 40
41/* Networking helper routines. */
42EXPORT_SYMBOL(csum_partial);
43EXPORT_SYMBOL(csum_partial_copy_nocheck);
44#ifdef CONFIG_IPV6
45EXPORT_SYMBOL(csum_ipv6_magic);
46#endif
47
48#ifdef CONFIG_VT 41#ifdef CONFIG_VT
49EXPORT_SYMBOL(screen_info); 42EXPORT_SYMBOL(screen_info);
50#endif 43#endif
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index 8f4027412614..442d8d47a41e 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -47,7 +47,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
47 plat_prepare_cpus(max_cpus); 47 plat_prepare_cpus(max_cpus);
48 48
49#ifndef CONFIG_HOTPLUG_CPU 49#ifndef CONFIG_HOTPLUG_CPU
50 cpu_present_map = cpu_possible_map; 50 init_cpu_present(&cpu_possible_map);
51#endif 51#endif
52} 52}
53 53
@@ -58,8 +58,8 @@ void __devinit smp_prepare_boot_cpu(void)
58 __cpu_number_map[0] = cpu; 58 __cpu_number_map[0] = cpu;
59 __cpu_logical_map[0] = cpu; 59 __cpu_logical_map[0] = cpu;
60 60
61 cpu_set(cpu, cpu_online_map); 61 set_cpu_online(cpu, true);
62 cpu_set(cpu, cpu_possible_map); 62 set_cpu_possible(cpu, true);
63} 63}
64 64
65asmlinkage void __cpuinit start_secondary(void) 65asmlinkage void __cpuinit start_secondary(void)
@@ -171,11 +171,11 @@ void smp_send_stop(void)
171 smp_call_function(stop_this_cpu, 0, 0); 171 smp_call_function(stop_this_cpu, 0, 0);
172} 172}
173 173
174void arch_send_call_function_ipi(cpumask_t mask) 174void arch_send_call_function_ipi_mask(const struct cpumask *mask)
175{ 175{
176 int cpu; 176 int cpu;
177 177
178 for_each_cpu_mask(cpu, mask) 178 for_each_cpu(cpu, mask)
179 plat_send_ipi(cpu, SMP_MSG_FUNCTION); 179 plat_send_ipi(cpu, SMP_MSG_FUNCTION);
180} 180}
181 181
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index a9fff9f731ec..f9e21fa2f592 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -352,3 +352,4 @@ ENTRY(sys_call_table)
352 .long sys_preadv 352 .long sys_preadv
353 .long sys_pwritev 353 .long sys_pwritev
354 .long sys_rt_tgsigqueueinfo /* 335 */ 354 .long sys_rt_tgsigqueueinfo /* 335 */
355 .long sys_perf_counter_open
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index 75c1889af1ed..bf420b616ae0 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -390,3 +390,4 @@ sys_call_table:
390 .long sys_preadv 390 .long sys_preadv
391 .long sys_pwritev 391 .long sys_pwritev
392 .long sys_rt_tgsigqueueinfo 392 .long sys_rt_tgsigqueueinfo
393 .long sys_perf_counter_open
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 2edde32c764b..9b352a1e3fb4 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -91,21 +91,6 @@ module_init(rtc_generic_init);
91 91
92void (*board_time_init)(void); 92void (*board_time_init)(void);
93 93
94unsigned long long sched_clock(void)
95{
96 return (jiffies_64 - INITIAL_JIFFIES) * (NSEC_PER_SEC / HZ);
97}
98
99static void __init sh_late_time_init(void)
100{
101 /*
102 * Make sure all compiled-in early timers register themselves.
103 * Run probe() for one "earlytimer" device.
104 */
105 early_platform_driver_register_all("earlytimer");
106 early_platform_driver_probe("earlytimer", 1, 0);
107}
108
109void __init time_init(void) 94void __init time_init(void)
110{ 95{
111 if (board_time_init) 96 if (board_time_init)
@@ -121,5 +106,15 @@ void __init time_init(void)
121 local_timer_setup(smp_processor_id()); 106 local_timer_setup(smp_processor_id());
122#endif 107#endif
123 108
124 late_time_init = sh_late_time_init; 109 /*
110 * Make sure all compiled-in early timers register themselves.
111 *
112 * Run probe() for two "earlytimer" devices, these will be the
113 * clockevents and clocksource devices respectively. In the event
114 * that only a clockevents device is available, we -ENODEV on the
115 * clocksource and the jiffies clocksource is used transparently
116 * instead. No error handling is necessary here.
117 */
118 early_platform_driver_register_all("earlytimer");
119 early_platform_driver_probe("earlytimer", 2, 0);
125} 120}
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 46348ed07cc3..b3e0067db358 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -69,6 +69,7 @@ BUILD_TRAP_HANDLER(bug)
69 insn_size_t insn = *(insn_size_t *)instruction_pointer(regs); 69 insn_size_t insn = *(insn_size_t *)instruction_pointer(regs);
70 if (insn == TRAPA_BUG_OPCODE) 70 if (insn == TRAPA_BUG_OPCODE)
71 handle_BUG(regs); 71 handle_BUG(regs);
72 return;
72 } 73 }
73#endif 74#endif
74 75
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile
index 4bacb9e83478..334bb2da36ea 100644
--- a/arch/sh/lib64/Makefile
+++ b/arch/sh/lib64/Makefile
@@ -10,7 +10,7 @@
10# 10#
11 11
12# Panic should really be compiled as PIC 12# Panic should really be compiled as PIC
13lib-y := udelay.o c-checksum.o dbg.o panic.o memcpy.o memset.o \ 13lib-y := udelay.o dbg.o panic.o memcpy.o memset.o \
14 copy_user_memcpy.o copy_page.o clear_page.o strcpy.o strlen.o 14 copy_user_memcpy.o copy_page.o clear_page.o strcpy.o strlen.o
15 15
16# Extracted from libgcc 16# Extracted from libgcc
diff --git a/arch/sh/lib64/c-checksum.c b/arch/sh/lib64/c-checksum.c
deleted file mode 100644
index 73c0877e3a29..000000000000
--- a/arch/sh/lib64/c-checksum.c
+++ /dev/null
@@ -1,214 +0,0 @@
1/*
2 * arch/sh/lib64/c-checksum.c
3 *
4 * This file contains network checksum routines that are better done
5 * in an architecture-specific manner due to speed..
6 */
7#include <linux/string.h>
8#include <linux/errno.h>
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <asm/byteorder.h>
12#include <asm/uaccess.h>
13
14static inline unsigned short from64to16(unsigned long long x)
15{
16 /* add up 32-bit words for 33 bits */
17 x = (x & 0xffffffff) + (x >> 32);
18 /* add up 16-bit and 17-bit words for 17+c bits */
19 x = (x & 0xffff) + (x >> 16);
20 /* add up 16-bit and 2-bit for 16+c bit */
21 x = (x & 0xffff) + (x >> 16);
22 /* add up carry.. */
23 x = (x & 0xffff) + (x >> 16);
24 return x;
25}
26
27static inline unsigned short foldto16(unsigned long x)
28{
29 /* add up 16-bit for 17 bits */
30 x = (x & 0xffff) + (x >> 16);
31 /* add up carry.. */
32 x = (x & 0xffff) + (x >> 16);
33 return x;
34}
35
36static inline unsigned short myfoldto16(unsigned long long x)
37{
38 /* Fold down to 32-bits so we don't lose in the typedef-less
39 network stack. */
40 /* 64 to 33 */
41 x = (x & 0xffffffff) + (x >> 32);
42 /* 33 to 32 */
43 x = (x & 0xffffffff) + (x >> 32);
44
45 /* add up 16-bit for 17 bits */
46 x = (x & 0xffff) + (x >> 16);
47 /* add up carry.. */
48 x = (x & 0xffff) + (x >> 16);
49 return x;
50}
51
52#define odd(x) ((x)&1)
53#define U16(x) ntohs(x)
54
55static unsigned long do_csum(const unsigned char *buff, int len)
56{
57 int odd, count;
58 unsigned long result = 0;
59
60 pr_debug("do_csum buff %p, len %d (0x%x)\n", buff, len, len);
61#ifdef DEBUG
62 for (i = 0; i < len; i++) {
63 if ((i % 26) == 0)
64 printk("\n");
65 printk("%02X ", buff[i]);
66 }
67#endif
68
69 if (len <= 0)
70 goto out;
71
72 odd = 1 & (unsigned long) buff;
73 if (odd) {
74 result = *buff << 8;
75 len--;
76 buff++;
77 }
78 count = len >> 1; /* nr of 16-bit words.. */
79 if (count) {
80 if (2 & (unsigned long) buff) {
81 result += *(unsigned short *) buff;
82 count--;
83 len -= 2;
84 buff += 2;
85 }
86 count >>= 1; /* nr of 32-bit words.. */
87 if (count) {
88 unsigned long carry = 0;
89 do {
90 unsigned long w = *(unsigned long *) buff;
91 buff += 4;
92 count--;
93 result += carry;
94 result += w;
95 carry = (w > result);
96 } while (count);
97 result += carry;
98 result = (result & 0xffff) + (result >> 16);
99 }
100 if (len & 2) {
101 result += *(unsigned short *) buff;
102 buff += 2;
103 }
104 }
105 if (len & 1)
106 result += *buff;
107 result = foldto16(result);
108 if (odd)
109 result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
110
111 pr_debug("\nCHECKSUM is 0x%lx\n", result);
112
113 out:
114 return result;
115}
116
117/* computes the checksum of a memory block at buff, length len,
118 and adds in "sum" (32-bit) */
119__wsum csum_partial(const void *buff, int len, __wsum sum)
120{
121 unsigned long long result = do_csum(buff, len);
122
123 /* add in old sum, and carry.. */
124 result += (__force u32)sum;
125 /* 32+c bits -> 32 bits */
126 result = (result & 0xffffffff) + (result >> 32);
127
128 pr_debug("csum_partial, buff %p len %d sum 0x%x result=0x%016Lx\n",
129 buff, len, sum, result);
130
131 return (__force __wsum)result;
132}
133
134/* Copy while checksumming, otherwise like csum_partial. */
135__wsum
136csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)
137{
138 sum = csum_partial(src, len, sum);
139 memcpy(dst, src, len);
140
141 return sum;
142}
143
144/* Copy from userspace and compute checksum. If we catch an exception
145 then zero the rest of the buffer. */
146__wsum
147csum_partial_copy_from_user(const void __user *src, void *dst, int len,
148 __wsum sum, int *err_ptr)
149{
150 int missing;
151
152 pr_debug
153 ("csum_partial_copy_from_user src %p, dest %p, len %d, sum %08x, err_ptr %p\n",
154 src, dst, len, sum, err_ptr);
155 missing = copy_from_user(dst, src, len);
156 pr_debug(" access_ok %d\n", __access_ok((unsigned long) src, len));
157 pr_debug(" missing %d\n", missing);
158 if (missing) {
159 memset(dst + len - missing, 0, missing);
160 *err_ptr = -EFAULT;
161 }
162
163 return csum_partial(dst, len, sum);
164}
165
166/* Copy to userspace and compute checksum. */
167__wsum
168csum_partial_copy_to_user(const unsigned char *src, unsigned char *dst, int len,
169 __wsum sum, int *err_ptr)
170{
171 sum = csum_partial(src, len, sum);
172
173 if (copy_to_user(dst, src, len))
174 *err_ptr = -EFAULT;
175
176 return sum;
177}
178
179/*
180 * This is a version of ip_compute_csum() optimized for IP headers,
181 * which always checksum on 4 octet boundaries.
182 */
183__sum16 ip_fast_csum(const void *iph, unsigned int ihl)
184{
185 pr_debug("ip_fast_csum %p,%d\n", iph, ihl);
186
187 return (__force __sum16)~do_csum(iph, ihl * 4);
188}
189
190__wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
191 unsigned short len,
192 unsigned short proto, __wsum sum)
193{
194 unsigned long long result;
195
196 pr_debug("ntohs(0x%x)=0x%x\n", 0xdead, ntohs(0xdead));
197 pr_debug("htons(0x%x)=0x%x\n", 0xdead, htons(0xdead));
198
199 result = (__force u64) saddr + (__force u64) daddr +
200 (__force u64) sum + ((len + proto) << 8);
201
202 /* Fold down to 32-bits so we don't lose in the typedef-less
203 network stack. */
204 /* 64 to 33 */
205 result = (result & 0xffffffff) + (result >> 32);
206 /* 33 to 32 */
207 result = (result & 0xffffffff) + (result >> 32);
208
209 pr_debug("%s saddr %x daddr %x len %x proto %x sum %x result %08Lx\n",
210 __func__, saddr, daddr, len, proto, sum, result);
211
212 return (__wsum)result;
213}
214EXPORT_SYMBOL(csum_tcpudp_nofold);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 22:12:58 -0500