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-rw-r--r--arch/arm/include/asm/byteorder.h25
-rw-r--r--arch/arm/include/asm/io.h5
-rw-r--r--arch/arm/include/asm/mach/map.h14
-rw-r--r--arch/arm/mach-omap1/mcbsp.c8
-rw-r--r--arch/arm/mach-omap2/mcbsp.c4
-rw-r--r--arch/arm/mm/mmu.c20
-rw-r--r--arch/arm/plat-mxc/clock.c1
-rw-r--r--arch/arm/plat-omap/gpio.c2
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h2
-rw-r--r--arch/arm/plat-omap/mcbsp.c5
-rw-r--r--arch/avr32/kernel/asm-offsets.c6
-rw-r--r--arch/avr32/kernel/entry-avr32b.S59
-rw-r--r--arch/avr32/mach-at32ap/pm-at32ap700x.S2
-rw-r--r--arch/m68k/atari/atakeyb.c9
-rw-r--r--arch/mips/Kconfig9
-rw-r--r--arch/mips/kernel/setup.c33
-rw-r--r--arch/mips/kernel/traps.c18
-rw-r--r--arch/mips/mm/c-r3k.c1
-rw-r--r--arch/mips/mm/c-r4k.c18
-rw-r--r--arch/mips/mm/c-tx39.c2
-rw-r--r--arch/mips/mm/cache.c1
-rw-r--r--arch/mips/mm/tlbex.c6
-rw-r--r--arch/mips/txx9/generic/setup.c1
-rw-r--r--arch/parisc/hpux/fs.c2
-rw-r--r--arch/powerpc/Makefile5
-rw-r--r--arch/powerpc/boot/Makefile2
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc64.h6
-rw-r--r--arch/powerpc/kernel/Makefile7
-rw-r--r--arch/powerpc/kernel/align.c2
-rw-r--r--arch/powerpc/kernel/idle_6xx.S2
-rw-r--r--arch/powerpc/kernel/idle_e500.S3
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S7
-rw-r--r--arch/powerpc/mm/hash_utils_64.c18
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c29
-rw-r--r--arch/powerpc/platforms/powermac/Makefile2
-rw-r--r--arch/sh/configs/ap325rxa_defconfig22
-rw-r--r--arch/sh/configs/migor_defconfig21
-rw-r--r--arch/sh/include/asm/uaccess_64.h2
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S14
-rw-r--r--arch/sh/kernel/entry-common.S27
-rw-r--r--arch/sh/kernel/machine_kexec.c2
-rw-r--r--arch/sh/kernel/ptrace_64.c2
-rw-r--r--arch/sh/kernel/setup.c6
-rw-r--r--arch/sh/kernel/sys_sh.c2
-rw-r--r--arch/sh/mm/consistent.c6
-rw-r--r--arch/sparc/include/asm/smp_32.h25
-rw-r--r--arch/sparc/kernel/of_device.c19
-rw-r--r--arch/sparc/kernel/sun4d_smp.c16
-rw-r--r--arch/sparc/kernel/sun4m_smp.c12
-rw-r--r--arch/sparc64/kernel/of_device.c20
-rw-r--r--arch/sparc64/kernel/smp.c14
-rw-r--r--arch/sparc64/mm/init.c2
-rw-r--r--arch/x86/boot/cpucheck.c8
-rw-r--r--arch/x86/kernel/alternative.c36
-rw-r--r--arch/x86/kernel/cpu/amd.c9
-rw-r--r--arch/x86/kernel/cpu/centaur.c11
-rw-r--r--arch/x86/kernel/cpu/common.c34
-rw-r--r--arch/x86/kernel/cpu/common_64.c74
-rw-r--r--arch/x86/kernel/cpu/cyrix.c32
-rw-r--r--arch/x86/kernel/cpu/feature_names.c3
-rw-r--r--arch/x86/kernel/hpet.c19
-rw-r--r--arch/x86/kernel/io_delay.c8
-rw-r--r--arch/x86/kernel/tsc.c234
-rw-r--r--arch/x86/pci/i386.c87
-rw-r--r--arch/x86/xen/enlighten.c2
65 files changed, 720 insertions, 385 deletions
diff --git a/arch/arm/include/asm/byteorder.h b/arch/arm/include/asm/byteorder.h
index d04a7a2bc2e9..4fbfb22f65a0 100644
--- a/arch/arm/include/asm/byteorder.h
+++ b/arch/arm/include/asm/byteorder.h
@@ -18,15 +18,7 @@
18#include <linux/compiler.h> 18#include <linux/compiler.h>
19#include <asm/types.h> 19#include <asm/types.h>
20 20
21#ifdef __ARMEB__ 21static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
22# define __BIG_ENDIAN
23#else
24# define __LITTLE_ENDIAN
25#endif
26
27#define __SWAB_64_THRU_32__
28
29static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
30{ 22{
31 __u32 t; 23 __u32 t;
32 24
@@ -48,8 +40,19 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
48 40
49 return x; 41 return x;
50} 42}
51#define __arch_swab32 __arch_swab32
52 43
53#include <linux/byteorder.h> 44#define __arch__swab32(x) ___arch__swab32(x)
45
46#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
47# define __BYTEORDER_HAS_U64__
48# define __SWAB_64_THRU_32__
49#endif
50
51#ifdef __ARMEB__
52#include <linux/byteorder/big_endian.h>
53#else
54#include <linux/byteorder/little_endian.h>
55#endif
54 56
55#endif 57#endif
58
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 94a95d7fafd6..71934856fc22 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -61,8 +61,9 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
61#define MT_DEVICE_NONSHARED 1 61#define MT_DEVICE_NONSHARED 1
62#define MT_DEVICE_CACHED 2 62#define MT_DEVICE_CACHED 2
63#define MT_DEVICE_IXP2000 3 63#define MT_DEVICE_IXP2000 3
64#define MT_DEVICE_WC 4
64/* 65/*
65 * types 4 onwards can be found in asm/mach/map.h and are undefined 66 * types 5 onwards can be found in asm/mach/map.h and are undefined
66 * for ioremap 67 * for ioremap
67 */ 68 */
68 69
@@ -215,11 +216,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
215#define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) 216#define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE)
216#define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) 217#define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE)
217#define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED) 218#define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED)
219#define ioremap_wc(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_WC)
218#define iounmap(cookie) __iounmap(cookie) 220#define iounmap(cookie) __iounmap(cookie)
219#else 221#else
220#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) 222#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
221#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) 223#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
222#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) 224#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
225#define ioremap_wc(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_WC)
223#define iounmap(cookie) __arch_iounmap(cookie) 226#define iounmap(cookie) __arch_iounmap(cookie)
224#endif 227#endif
225 228
diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
index 06f583b13999..9eb936e49cc3 100644
--- a/arch/arm/include/asm/mach/map.h
+++ b/arch/arm/include/asm/mach/map.h
@@ -18,13 +18,13 @@ struct map_desc {
18 unsigned int type; 18 unsigned int type;
19}; 19};
20 20
21/* types 0-3 are defined in asm/io.h */ 21/* types 0-4 are defined in asm/io.h */
22#define MT_CACHECLEAN 4 22#define MT_CACHECLEAN 5
23#define MT_MINICLEAN 5 23#define MT_MINICLEAN 6
24#define MT_LOW_VECTORS 6 24#define MT_LOW_VECTORS 7
25#define MT_HIGH_VECTORS 7 25#define MT_HIGH_VECTORS 8
26#define MT_MEMORY 8 26#define MT_MEMORY 9
27#define MT_ROM 9 27#define MT_ROM 10
28 28
29#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED 29#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED
30#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000 30#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 826010d5d014..2baeaeb0c900 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -159,6 +159,7 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = {
159#ifdef CONFIG_ARCH_OMAP730 159#ifdef CONFIG_ARCH_OMAP730
160static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { 160static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
161 { 161 {
162 .phys_base = OMAP730_MCBSP1_BASE,
162 .virt_base = io_p2v(OMAP730_MCBSP1_BASE), 163 .virt_base = io_p2v(OMAP730_MCBSP1_BASE),
163 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 164 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
164 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 165 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
@@ -167,6 +168,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
167 .ops = &omap1_mcbsp_ops, 168 .ops = &omap1_mcbsp_ops,
168 }, 169 },
169 { 170 {
171 .phys_base = OMAP730_MCBSP2_BASE,
170 .virt_base = io_p2v(OMAP730_MCBSP2_BASE), 172 .virt_base = io_p2v(OMAP730_MCBSP2_BASE),
171 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 173 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
172 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 174 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
@@ -184,6 +186,7 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
184#ifdef CONFIG_ARCH_OMAP15XX 186#ifdef CONFIG_ARCH_OMAP15XX
185static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { 187static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
186 { 188 {
189 .phys_base = OMAP1510_MCBSP1_BASE,
187 .virt_base = OMAP1510_MCBSP1_BASE, 190 .virt_base = OMAP1510_MCBSP1_BASE,
188 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 191 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
189 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 192 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
@@ -193,6 +196,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
193 .clk_name = "mcbsp_clk", 196 .clk_name = "mcbsp_clk",
194 }, 197 },
195 { 198 {
199 .phys_base = OMAP1510_MCBSP2_BASE,
196 .virt_base = io_p2v(OMAP1510_MCBSP2_BASE), 200 .virt_base = io_p2v(OMAP1510_MCBSP2_BASE),
197 .dma_rx_sync = OMAP_DMA_MCBSP2_RX, 201 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
198 .dma_tx_sync = OMAP_DMA_MCBSP2_TX, 202 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
@@ -201,6 +205,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
201 .ops = &omap1_mcbsp_ops, 205 .ops = &omap1_mcbsp_ops,
202 }, 206 },
203 { 207 {
208 .phys_base = OMAP1510_MCBSP3_BASE,
204 .virt_base = OMAP1510_MCBSP3_BASE, 209 .virt_base = OMAP1510_MCBSP3_BASE,
205 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 210 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
206 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 211 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
@@ -219,6 +224,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
219#ifdef CONFIG_ARCH_OMAP16XX 224#ifdef CONFIG_ARCH_OMAP16XX
220static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { 225static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
221 { 226 {
227 .phys_base = OMAP1610_MCBSP1_BASE,
222 .virt_base = OMAP1610_MCBSP1_BASE, 228 .virt_base = OMAP1610_MCBSP1_BASE,
223 .dma_rx_sync = OMAP_DMA_MCBSP1_RX, 229 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
224 .dma_tx_sync = OMAP_DMA_MCBSP1_TX, 230 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
@@ -228,6 +234,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
228 .clk_name = "mcbsp_clk", 234 .clk_name = "mcbsp_clk",
229 }, 235 },
230 { 236 {
237 .phys_base = OMAP1610_MCBSP2_BASE,
231 .virt_base = io_p2v(OMAP1610_MCBSP2_BASE), 238 .virt_base = io_p2v(OMAP1610_MCBSP2_BASE),
232 .dma_rx_sync = OMAP_DMA_MCBSP2_RX, 239 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
233 .dma_tx_sync = OMAP_DMA_MCBSP2_TX, 240 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
@@ -236,6 +243,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
236 .ops = &omap1_mcbsp_ops, 243 .ops = &omap1_mcbsp_ops,
237 }, 244 },
238 { 245 {
246 .phys_base = OMAP1610_MCBSP3_BASE,
239 .virt_base = OMAP1610_MCBSP3_BASE, 247 .virt_base = OMAP1610_MCBSP3_BASE,
240 .dma_rx_sync = OMAP_DMA_MCBSP3_RX, 248 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
241 .dma_tx_sync = OMAP_DMA_MCBSP3_TX, 249 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 27eb6e3ca926..b261f1f80b5e 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -134,6 +134,7 @@ static struct omap_mcbsp_ops omap2_mcbsp_ops = {
134#ifdef CONFIG_ARCH_OMAP24XX 134#ifdef CONFIG_ARCH_OMAP24XX
135static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { 135static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
136 { 136 {
137 .phys_base = OMAP24XX_MCBSP1_BASE,
137 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), 138 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
138 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 139 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
139 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 140 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
@@ -143,6 +144,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
143 .clk_name = "mcbsp_clk", 144 .clk_name = "mcbsp_clk",
144 }, 145 },
145 { 146 {
147 .phys_base = OMAP24XX_MCBSP2_BASE,
146 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), 148 .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
147 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 149 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
148 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 150 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
@@ -161,6 +163,7 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = {
161#ifdef CONFIG_ARCH_OMAP34XX 163#ifdef CONFIG_ARCH_OMAP34XX
162static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 164static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
163 { 165 {
166 .phys_base = OMAP34XX_MCBSP1_BASE,
164 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE), 167 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE),
165 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 168 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
166 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 169 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
@@ -170,6 +173,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
170 .clk_name = "mcbsp_clk", 173 .clk_name = "mcbsp_clk",
171 }, 174 },
172 { 175 {
176 .phys_base = OMAP34XX_MCBSP2_BASE,
173 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE), 177 .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE),
174 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 178 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
175 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 179 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 25d9a11eb617..a713e40e1f1a 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -211,6 +211,12 @@ static struct mem_type mem_types[] = {
211 PMD_SECT_TEX(1), 211 PMD_SECT_TEX(1),
212 .domain = DOMAIN_IO, 212 .domain = DOMAIN_IO,
213 }, 213 },
214 [MT_DEVICE_WC] = { /* ioremap_wc */
215 .prot_pte = PROT_PTE_DEVICE,
216 .prot_l1 = PMD_TYPE_TABLE,
217 .prot_sect = PROT_SECT_DEVICE,
218 .domain = DOMAIN_IO,
219 },
214 [MT_CACHECLEAN] = { 220 [MT_CACHECLEAN] = {
215 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, 221 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN,
216 .domain = DOMAIN_KERNEL, 222 .domain = DOMAIN_KERNEL,
@@ -273,6 +279,20 @@ static void __init build_mem_type_table(void)
273 } 279 }
274 280
275 /* 281 /*
282 * On non-Xscale3 ARMv5-and-older systems, use CB=01
283 * (Uncached/Buffered) for ioremap_wc() mappings. On XScale3
284 * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable
285 * in xsc3 parlance, Uncached Normal in ARMv6 parlance).
286 */
287 if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) {
288 mem_types[MT_DEVICE_WC].prot_pte_ext |= PTE_EXT_TEX(1);
289 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1);
290 } else {
291 mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_BUFFERABLE;
292 mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE;
293 }
294
295 /*
276 * ARMv5 and lower, bit 4 must be set for page tables. 296 * ARMv5 and lower, bit 4 must be set for page tables.
277 * (was: cache "update-able on write" bit on ARM610) 297 * (was: cache "update-able on write" bit on ARM610)
278 * However, Xscale cores require this bit to be cleared. 298 * However, Xscale cores require this bit to be cleared.
diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c
index 2f8627218839..0a38f0b396eb 100644
--- a/arch/arm/plat-mxc/clock.c
+++ b/arch/arm/plat-mxc/clock.c
@@ -37,7 +37,6 @@
37#include <linux/proc_fs.h> 37#include <linux/proc_fs.h>
38#include <linux/semaphore.h> 38#include <linux/semaphore.h>
39#include <linux/string.h> 39#include <linux/string.h>
40#include <linux/version.h>
41 40
42#include <mach/clock.h> 41#include <mach/clock.h>
43 42
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 3e76ee2bc731..9e1341ebc14e 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1488,7 +1488,7 @@ static int __init _omap_gpio_init(void)
1488 bank->chip.set = gpio_set; 1488 bank->chip.set = gpio_set;
1489 if (bank_is_mpuio(bank)) { 1489 if (bank_is_mpuio(bank)) {
1490 bank->chip.label = "mpuio"; 1490 bank->chip.label = "mpuio";
1491#ifdef CONFIG_ARCH_OMAP1 1491#ifdef CONFIG_ARCH_OMAP16XX
1492 bank->chip.dev = &omap_mpuio_device.dev; 1492 bank->chip.dev = &omap_mpuio_device.dev;
1493#endif 1493#endif
1494 bank->chip.base = OMAP_MPUIO(0); 1494 bank->chip.base = OMAP_MPUIO(0);
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 6eb44a92871d..8fdb95e26fcd 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -315,6 +315,7 @@ struct omap_mcbsp_ops {
315}; 315};
316 316
317struct omap_mcbsp_platform_data { 317struct omap_mcbsp_platform_data {
318 unsigned long phys_base;
318 u32 virt_base; 319 u32 virt_base;
319 u8 dma_rx_sync, dma_tx_sync; 320 u8 dma_rx_sync, dma_tx_sync;
320 u16 rx_irq, tx_irq; 321 u16 rx_irq, tx_irq;
@@ -324,6 +325,7 @@ struct omap_mcbsp_platform_data {
324 325
325struct omap_mcbsp { 326struct omap_mcbsp {
326 struct device *dev; 327 struct device *dev;
328 unsigned long phys_base;
327 u32 io_base; 329 u32 io_base;
328 u8 id; 330 u8 id;
329 u8 free; 331 u8 free;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index d0844050f2d2..014d26574bb6 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -651,7 +651,7 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
651 omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, 651 omap_set_dma_dest_params(mcbsp[id].dma_tx_lch,
652 src_port, 652 src_port,
653 OMAP_DMA_AMODE_CONSTANT, 653 OMAP_DMA_AMODE_CONSTANT,
654 mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1, 654 mcbsp[id].phys_base + OMAP_MCBSP_REG_DXR1,
655 0, 0); 655 0, 0);
656 656
657 omap_set_dma_src_params(mcbsp[id].dma_tx_lch, 657 omap_set_dma_src_params(mcbsp[id].dma_tx_lch,
@@ -712,7 +712,7 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
712 omap_set_dma_src_params(mcbsp[id].dma_rx_lch, 712 omap_set_dma_src_params(mcbsp[id].dma_rx_lch,
713 src_port, 713 src_port,
714 OMAP_DMA_AMODE_CONSTANT, 714 OMAP_DMA_AMODE_CONSTANT,
715 mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1, 715 mcbsp[id].phys_base + OMAP_MCBSP_REG_DRR1,
716 0, 0); 716 0, 0);
717 717
718 omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, 718 omap_set_dma_dest_params(mcbsp[id].dma_rx_lch,
@@ -830,6 +830,7 @@ static int __init omap_mcbsp_probe(struct platform_device *pdev)
830 mcbsp[id].dma_tx_lch = -1; 830 mcbsp[id].dma_tx_lch = -1;
831 mcbsp[id].dma_rx_lch = -1; 831 mcbsp[id].dma_rx_lch = -1;
832 832
833 mcbsp[id].phys_base = pdata->phys_base;
833 mcbsp[id].io_base = pdata->virt_base; 834 mcbsp[id].io_base = pdata->virt_base;
834 /* Default I/O is IRQ based */ 835 /* Default I/O is IRQ based */
835 mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO; 836 mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO;
diff --git a/arch/avr32/kernel/asm-offsets.c b/arch/avr32/kernel/asm-offsets.c
index e4796c67a831..d6a8193a1d2f 100644
--- a/arch/avr32/kernel/asm-offsets.c
+++ b/arch/avr32/kernel/asm-offsets.c
@@ -4,6 +4,8 @@
4 * to extract and format the required data. 4 * to extract and format the required data.
5 */ 5 */
6 6
7#include <linux/mm.h>
8#include <linux/sched.h>
7#include <linux/thread_info.h> 9#include <linux/thread_info.h>
8#include <linux/kbuild.h> 10#include <linux/kbuild.h>
9 11
@@ -17,4 +19,8 @@ void foo(void)
17 OFFSET(TI_rar_saved, thread_info, rar_saved); 19 OFFSET(TI_rar_saved, thread_info, rar_saved);
18 OFFSET(TI_rsr_saved, thread_info, rsr_saved); 20 OFFSET(TI_rsr_saved, thread_info, rsr_saved);
19 OFFSET(TI_restart_block, thread_info, restart_block); 21 OFFSET(TI_restart_block, thread_info, restart_block);
22 BLANK();
23 OFFSET(TSK_active_mm, task_struct, active_mm);
24 BLANK();
25 OFFSET(MM_pgd, mm_struct, pgd);
20} 26}
diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
index 2b398cae110c..33d49377b8be 100644
--- a/arch/avr32/kernel/entry-avr32b.S
+++ b/arch/avr32/kernel/entry-avr32b.S
@@ -334,9 +334,64 @@ save_full_context_ex:
334 334
335 /* Low-level exception handlers */ 335 /* Low-level exception handlers */
336handle_critical: 336handle_critical:
337 /*
338 * AT32AP700x errata:
339 *
340 * After a Java stack overflow or underflow trap, any CPU
341 * memory access may cause erratic behavior. This will happen
342 * when the four least significant bits of the JOSP system
343 * register contains any value between 9 and 15 (inclusive).
344 *
345 * Possible workarounds:
346 * - Don't use the Java Extension Module
347 * - Ensure that the stack overflow and underflow trap
348 * handlers do not do any memory access or trigger any
349 * exceptions before the overflow/underflow condition is
350 * cleared (by incrementing or decrementing the JOSP)
351 * - Make sure that JOSP does not contain any problematic
352 * value before doing any exception or interrupt
353 * processing.
354 * - Set up a critical exception handler which writes a
355 * known-to-be-safe value, e.g. 4, to JOSP before doing
356 * any further processing.
357 *
358 * We'll use the last workaround for now since we cannot
359 * guarantee that user space processes don't use Java mode.
360 * Non-well-behaving userland will be terminated with extreme
361 * prejudice.
362 */
363#ifdef CONFIG_CPU_AT32AP700X
364 /*
365 * There's a chance we can't touch memory, so temporarily
366 * borrow PTBR to save the stack pointer while we fix things
367 * up...
368 */
369 mtsr SYSREG_PTBR, sp
370 mov sp, 4
371 mtsr SYSREG_JOSP, sp
372 mfsr sp, SYSREG_PTBR
373 sub pc, -2
374
375 /* Push most of pt_regs on stack. We'll do the rest later */
337 sub sp, 4 376 sub sp, 4
338 stmts --sp, r0-lr 377 pushm r0-r12
339 rcall save_full_context_ex 378
379 /* PTBR mirrors current_thread_info()->task->active_mm->pgd */
380 get_thread_info r0
381 ld.w r1, r0[TI_task]
382 ld.w r2, r1[TSK_active_mm]
383 ld.w r3, r2[MM_pgd]
384 mtsr SYSREG_PTBR, r3
385#else
386 sub sp, 4
387 pushm r0-r12
388#endif
389 sub r0, sp, -(14 * 4)
390 mov r1, lr
391 mfsr r2, SYSREG_RAR_EX
392 mfsr r3, SYSREG_RSR_EX
393 pushm r0-r3
394
340 mfsr r12, SYSREG_ECR 395 mfsr r12, SYSREG_ECR
341 mov r11, sp 396 mov r11, sp
342 rcall do_critical_exception 397 rcall do_critical_exception
diff --git a/arch/avr32/mach-at32ap/pm-at32ap700x.S b/arch/avr32/mach-at32ap/pm-at32ap700x.S
index 5be4de65b209..17503b0ed6c9 100644
--- a/arch/avr32/mach-at32ap/pm-at32ap700x.S
+++ b/arch/avr32/mach-at32ap/pm-at32ap700x.S
@@ -134,7 +134,7 @@ pm_standby:
134 mov r11, SDRAMC_LPR_LPCB_SELF_RFR 134 mov r11, SDRAMC_LPR_LPCB_SELF_RFR
135 bfins r10, r11, 0, 2 /* LPCB <- self Refresh */ 135 bfins r10, r11, 0, 2 /* LPCB <- self Refresh */
136 sync 0 /* flush write buffer */ 136 sync 0 /* flush write buffer */
137 st.w r12[SDRAMC_LPR], r11 /* put SDRAM in self-refresh mode */ 137 st.w r12[SDRAMC_LPR], r10 /* put SDRAM in self-refresh mode */
138 ld.w r11, r12[SDRAMC_LPR] 138 ld.w r11, r12[SDRAMC_LPR]
139 unmask_interrupts 139 unmask_interrupts
140 sleep CPU_SLEEP_FROZEN 140 sleep CPU_SLEEP_FROZEN
diff --git a/arch/m68k/atari/atakeyb.c b/arch/m68k/atari/atakeyb.c
index 8a2a53b33616..bb959fbab2dc 100644
--- a/arch/m68k/atari/atakeyb.c
+++ b/arch/m68k/atari/atakeyb.c
@@ -580,13 +580,15 @@ int atari_keyb_init(void)
580 do { 580 do {
581 /* reset IKBD ACIA */ 581 /* reset IKBD ACIA */
582 acia.key_ctrl = ACIA_RESET | 582 acia.key_ctrl = ACIA_RESET |
583 (atari_switches & ATARI_SWITCH_IKBD) ? ACIA_RHTID : 0; 583 ((atari_switches & ATARI_SWITCH_IKBD) ?
584 ACIA_RHTID : 0);
584 (void)acia.key_ctrl; 585 (void)acia.key_ctrl;
585 (void)acia.key_data; 586 (void)acia.key_data;
586 587
587 /* reset MIDI ACIA */ 588 /* reset MIDI ACIA */
588 acia.mid_ctrl = ACIA_RESET | 589 acia.mid_ctrl = ACIA_RESET |
589 (atari_switches & ATARI_SWITCH_MIDI) ? ACIA_RHTID : 0; 590 ((atari_switches & ATARI_SWITCH_MIDI) ?
591 ACIA_RHTID : 0);
590 (void)acia.mid_ctrl; 592 (void)acia.mid_ctrl;
591 (void)acia.mid_data; 593 (void)acia.mid_data;
592 594
@@ -599,7 +601,8 @@ int atari_keyb_init(void)
599 ACIA_RHTID : ACIA_RLTID); 601 ACIA_RHTID : ACIA_RLTID);
600 602
601 acia.mid_ctrl = ACIA_DIV16 | ACIA_D8N1S | 603 acia.mid_ctrl = ACIA_DIV16 | ACIA_D8N1S |
602 (atari_switches & ATARI_SWITCH_MIDI) ? ACIA_RHTID : 0; 604 ((atari_switches & ATARI_SWITCH_MIDI) ?
605 ACIA_RHTID : 0);
603 606
604 /* make sure the interrupt line is up */ 607 /* make sure the interrupt line is up */
605 } while ((mfp.par_dt_reg & 0x10) == 0); 608 } while ((mfp.par_dt_reg & 0x10) == 0);
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 4da736e25333..49896a2a1d72 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1886,6 +1886,15 @@ config STACKTRACE_SUPPORT
1886 1886
1887source "init/Kconfig" 1887source "init/Kconfig"
1888 1888
1889config PROBE_INITRD_HEADER
1890 bool "Probe initrd header created by addinitrd"
1891 depends on BLK_DEV_INITRD
1892 help
1893 Probe initrd header at the last page of kernel image.
1894 Say Y here if you are using arch/mips/boot/addinitrd.c to
1895 add initrd or initramfs image to the kernel image.
1896 Otherwise, say N.
1897
1889menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 1898menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
1890 1899
1891config HW_HAS_EISA 1900config HW_HAS_EISA
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 2aae76bce293..16f8edfe5cdc 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -160,30 +160,33 @@ early_param("rd_size", rd_size_early);
160static unsigned long __init init_initrd(void) 160static unsigned long __init init_initrd(void)
161{ 161{
162 unsigned long end; 162 unsigned long end;
163 u32 *initrd_header;
164 163
165 /* 164 /*
166 * Board specific code or command line parser should have 165 * Board specific code or command line parser should have
167 * already set up initrd_start and initrd_end. In these cases 166 * already set up initrd_start and initrd_end. In these cases
168 * perfom sanity checks and use them if all looks good. 167 * perfom sanity checks and use them if all looks good.
169 */ 168 */
170 if (initrd_start && initrd_end > initrd_start) 169 if (!initrd_start || initrd_end <= initrd_start) {
171 goto sanitize; 170#ifdef CONFIG_PROBE_INITRD_HEADER
171 u32 *initrd_header;
172 172
173 /* 173 /*
174 * See if initrd has been added to the kernel image by 174 * See if initrd has been added to the kernel image by
175 * arch/mips/boot/addinitrd.c. In that case a header is 175 * arch/mips/boot/addinitrd.c. In that case a header is
176 * prepended to initrd and is made up by 8 bytes. The fisrt 176 * prepended to initrd and is made up by 8 bytes. The first
177 * word is a magic number and the second one is the size of 177 * word is a magic number and the second one is the size of
178 * initrd. Initrd start must be page aligned in any cases. 178 * initrd. Initrd start must be page aligned in any cases.
179 */ 179 */
180 initrd_header = __va(PAGE_ALIGN(__pa_symbol(&_end) + 8)) - 8; 180 initrd_header = __va(PAGE_ALIGN(__pa_symbol(&_end) + 8)) - 8;
181 if (initrd_header[0] != 0x494E5244) 181 if (initrd_header[0] != 0x494E5244)
182 goto disable;
183 initrd_start = (unsigned long)(initrd_header + 2);
184 initrd_end = initrd_start + initrd_header[1];
185#else
182 goto disable; 186 goto disable;
183 initrd_start = (unsigned long)(initrd_header + 2); 187#endif
184 initrd_end = initrd_start + initrd_header[1]; 188 }
185 189
186sanitize:
187 if (initrd_start & ~PAGE_MASK) { 190 if (initrd_start & ~PAGE_MASK) {
188 pr_err("initrd start must be page aligned\n"); 191 pr_err("initrd start must be page aligned\n");
189 goto disable; 192 goto disable;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 426cced1e9dc..6bee29097a56 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -373,8 +373,8 @@ void __noreturn die(const char * str, const struct pt_regs * regs)
373 do_exit(SIGSEGV); 373 do_exit(SIGSEGV);
374} 374}
375 375
376extern const struct exception_table_entry __start___dbe_table[]; 376extern struct exception_table_entry __start___dbe_table[];
377extern const struct exception_table_entry __stop___dbe_table[]; 377extern struct exception_table_entry __stop___dbe_table[];
378 378
379__asm__( 379__asm__(
380" .section __dbe_table, \"a\"\n" 380" .section __dbe_table, \"a\"\n"
@@ -1200,7 +1200,7 @@ void *set_except_vector(int n, void *addr)
1200 if (n == 0 && cpu_has_divec) { 1200 if (n == 0 && cpu_has_divec) {
1201 *(u32 *)(ebase + 0x200) = 0x08000000 | 1201 *(u32 *)(ebase + 0x200) = 0x08000000 |
1202 (0x03ffffff & (handler >> 2)); 1202 (0x03ffffff & (handler >> 2));
1203 flush_icache_range(ebase + 0x200, ebase + 0x204); 1203 local_flush_icache_range(ebase + 0x200, ebase + 0x204);
1204 } 1204 }
1205 return (void *)old_handler; 1205 return (void *)old_handler;
1206} 1206}
@@ -1283,7 +1283,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1283 *w = (*w & 0xffff0000) | (((u32)handler >> 16) & 0xffff); 1283 *w = (*w & 0xffff0000) | (((u32)handler >> 16) & 0xffff);
1284 w = (u32 *)(b + ori_offset); 1284 w = (u32 *)(b + ori_offset);
1285 *w = (*w & 0xffff0000) | ((u32)handler & 0xffff); 1285 *w = (*w & 0xffff0000) | ((u32)handler & 0xffff);
1286 flush_icache_range((unsigned long)b, (unsigned long)(b+handler_len)); 1286 local_flush_icache_range((unsigned long)b,
1287 (unsigned long)(b+handler_len));
1287 } 1288 }
1288 else { 1289 else {
1289 /* 1290 /*
@@ -1295,7 +1296,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
1295 w = (u32 *)b; 1296 w = (u32 *)b;
1296 *w++ = 0x08000000 | (((u32)handler >> 2) & 0x03fffff); /* j handler */ 1297 *w++ = 0x08000000 | (((u32)handler >> 2) & 0x03fffff); /* j handler */
1297 *w = 0; 1298 *w = 0;
1298 flush_icache_range((unsigned long)b, (unsigned long)(b+8)); 1299 local_flush_icache_range((unsigned long)b,
1300 (unsigned long)(b+8));
1299 } 1301 }
1300 1302
1301 return (void *)old_handler; 1303 return (void *)old_handler;
@@ -1515,7 +1517,7 @@ void __cpuinit per_cpu_trap_init(void)
1515void __init set_handler(unsigned long offset, void *addr, unsigned long size) 1517void __init set_handler(unsigned long offset, void *addr, unsigned long size)
1516{ 1518{
1517 memcpy((void *)(ebase + offset), addr, size); 1519 memcpy((void *)(ebase + offset), addr, size);
1518 flush_icache_range(ebase + offset, ebase + offset + size); 1520 local_flush_icache_range(ebase + offset, ebase + offset + size);
1519} 1521}
1520 1522
1521static char panic_null_cerr[] __cpuinitdata = 1523static char panic_null_cerr[] __cpuinitdata =
@@ -1680,6 +1682,8 @@ void __init trap_init(void)
1680 signal32_init(); 1682 signal32_init();
1681#endif 1683#endif
1682 1684
1683 flush_icache_range(ebase, ebase + 0x400); 1685 local_flush_icache_range(ebase, ebase + 0x400);
1684 flush_tlb_handlers(); 1686 flush_tlb_handlers();
1687
1688 sort_extable(__start___dbe_table, __stop___dbe_table);
1685} 1689}
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index 27a5b466c85c..5500c20c79ae 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -320,6 +320,7 @@ void __cpuinit r3k_cache_init(void)
320 flush_cache_range = r3k_flush_cache_range; 320 flush_cache_range = r3k_flush_cache_range;
321 flush_cache_page = r3k_flush_cache_page; 321 flush_cache_page = r3k_flush_cache_page;
322 flush_icache_range = r3k_flush_icache_range; 322 flush_icache_range = r3k_flush_icache_range;
323 local_flush_icache_range = r3k_flush_icache_range;
323 324
324 flush_cache_sigtramp = r3k_flush_cache_sigtramp; 325 flush_cache_sigtramp = r3k_flush_cache_sigtramp;
325 local_flush_data_cache_page = local_r3k_flush_data_cache_page; 326 local_flush_data_cache_page = local_r3k_flush_data_cache_page;
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 71df3390c07b..6e99665ae860 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -543,12 +543,8 @@ struct flush_icache_range_args {
543 unsigned long end; 543 unsigned long end;
544}; 544};
545 545
546static inline void local_r4k_flush_icache_range(void *args) 546static inline void local_r4k_flush_icache_range(unsigned long start, unsigned long end)
547{ 547{
548 struct flush_icache_range_args *fir_args = args;
549 unsigned long start = fir_args->start;
550 unsigned long end = fir_args->end;
551
552 if (!cpu_has_ic_fills_f_dc) { 548 if (!cpu_has_ic_fills_f_dc) {
553 if (end - start >= dcache_size) { 549 if (end - start >= dcache_size) {
554 r4k_blast_dcache(); 550 r4k_blast_dcache();
@@ -564,6 +560,15 @@ static inline void local_r4k_flush_icache_range(void *args)
564 protected_blast_icache_range(start, end); 560 protected_blast_icache_range(start, end);
565} 561}
566 562
563static inline void local_r4k_flush_icache_range_ipi(void *args)
564{
565 struct flush_icache_range_args *fir_args = args;
566 unsigned long start = fir_args->start;
567 unsigned long end = fir_args->end;
568
569 local_r4k_flush_icache_range(start, end);
570}
571
567static void r4k_flush_icache_range(unsigned long start, unsigned long end) 572static void r4k_flush_icache_range(unsigned long start, unsigned long end)
568{ 573{
569 struct flush_icache_range_args args; 574 struct flush_icache_range_args args;
@@ -571,7 +576,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
571 args.start = start; 576 args.start = start;
572 args.end = end; 577 args.end = end;
573 578
574 r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1); 579 r4k_on_each_cpu(local_r4k_flush_icache_range_ipi, &args, 1);
575 instruction_hazard(); 580 instruction_hazard();
576} 581}
577 582
@@ -1375,6 +1380,7 @@ void __cpuinit r4k_cache_init(void)
1375 local_flush_data_cache_page = local_r4k_flush_data_cache_page; 1380 local_flush_data_cache_page = local_r4k_flush_data_cache_page;
1376 flush_data_cache_page = r4k_flush_data_cache_page; 1381 flush_data_cache_page = r4k_flush_data_cache_page;
1377 flush_icache_range = r4k_flush_icache_range; 1382 flush_icache_range = r4k_flush_icache_range;
1383 local_flush_icache_range = local_r4k_flush_icache_range;
1378 1384
1379#if defined(CONFIG_DMA_NONCOHERENT) 1385#if defined(CONFIG_DMA_NONCOHERENT)
1380 if (coherentio) { 1386 if (coherentio) {
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index a9f7f1f5e9b4..f7c8f9ce39c1 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -362,6 +362,7 @@ void __cpuinit tx39_cache_init(void)
362 flush_cache_range = (void *) tx39h_flush_icache_all; 362 flush_cache_range = (void *) tx39h_flush_icache_all;
363 flush_cache_page = (void *) tx39h_flush_icache_all; 363 flush_cache_page = (void *) tx39h_flush_icache_all;
364 flush_icache_range = (void *) tx39h_flush_icache_all; 364 flush_icache_range = (void *) tx39h_flush_icache_all;
365 local_flush_icache_range = (void *) tx39h_flush_icache_all;
365 366
366 flush_cache_sigtramp = (void *) tx39h_flush_icache_all; 367 flush_cache_sigtramp = (void *) tx39h_flush_icache_all;
367 local_flush_data_cache_page = (void *) tx39h_flush_icache_all; 368 local_flush_data_cache_page = (void *) tx39h_flush_icache_all;
@@ -390,6 +391,7 @@ void __cpuinit tx39_cache_init(void)
390 flush_cache_range = tx39_flush_cache_range; 391 flush_cache_range = tx39_flush_cache_range;
391 flush_cache_page = tx39_flush_cache_page; 392 flush_cache_page = tx39_flush_cache_page;
392 flush_icache_range = tx39_flush_icache_range; 393 flush_icache_range = tx39_flush_icache_range;
394 local_flush_icache_range = tx39_flush_icache_range;
393 395
394 flush_cache_sigtramp = tx39_flush_cache_sigtramp; 396 flush_cache_sigtramp = tx39_flush_cache_sigtramp;
395 local_flush_data_cache_page = local_tx39_flush_data_cache_page; 397 local_flush_data_cache_page = local_tx39_flush_data_cache_page;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 034e8506f6ea..1eb7c71e3d6a 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -29,6 +29,7 @@ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
29void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, 29void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
30 unsigned long pfn); 30 unsigned long pfn);
31void (*flush_icache_range)(unsigned long start, unsigned long end); 31void (*flush_icache_range)(unsigned long start, unsigned long end);
32void (*local_flush_icache_range)(unsigned long start, unsigned long end);
32 33
33void (*__flush_cache_vmap)(void); 34void (*__flush_cache_vmap)(void);
34void (*__flush_cache_vunmap)(void); 35void (*__flush_cache_vunmap)(void);
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 76da73a5ab3c..979cf9197282 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -1273,10 +1273,10 @@ void __cpuinit build_tlb_refill_handler(void)
1273 1273
1274void __cpuinit flush_tlb_handlers(void) 1274void __cpuinit flush_tlb_handlers(void)
1275{ 1275{
1276 flush_icache_range((unsigned long)handle_tlbl, 1276 local_flush_icache_range((unsigned long)handle_tlbl,
1277 (unsigned long)handle_tlbl + sizeof(handle_tlbl)); 1277 (unsigned long)handle_tlbl + sizeof(handle_tlbl));
1278 flush_icache_range((unsigned long)handle_tlbs, 1278 local_flush_icache_range((unsigned long)handle_tlbs,
1279 (unsigned long)handle_tlbs + sizeof(handle_tlbs)); 1279 (unsigned long)handle_tlbs + sizeof(handle_tlbs));
1280 flush_icache_range((unsigned long)handle_tlbm, 1280 local_flush_icache_range((unsigned long)handle_tlbm,
1281 (unsigned long)handle_tlbm + sizeof(handle_tlbm)); 1281 (unsigned long)handle_tlbm + sizeof(handle_tlbm));
1282} 1282}
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
index 0afe94c48fb6..fe6bee09cece 100644
--- a/arch/mips/txx9/generic/setup.c
+++ b/arch/mips/txx9/generic/setup.c
@@ -53,6 +53,7 @@ txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
53 txx9_ce_res[i].name = txx9_ce_res_name[i]; 53 txx9_ce_res[i].name = txx9_ce_res_name[i];
54 } 54 }
55 55
56 txx9_pcode = pcode;
56 sprintf(txx9_pcode_str, "TX%x", pcode); 57 sprintf(txx9_pcode_str, "TX%x", pcode);
57 if (base) { 58 if (base) {
58 txx9_reg_res.start = base & 0xfffffffffULL; 59 txx9_reg_res.start = base & 0xfffffffffULL;
diff --git a/arch/parisc/hpux/fs.c b/arch/parisc/hpux/fs.c
index 69ff671498e5..12c04c5e558b 100644
--- a/arch/parisc/hpux/fs.c
+++ b/arch/parisc/hpux/fs.c
@@ -104,7 +104,7 @@ static int filldir(void * __buf, const char * name, int namlen, loff_t offset,
104 buf->count -= reclen; 104 buf->count -= reclen;
105 return 0; 105 return 0;
106Efault: 106Efault:
107 buffer->error = -EFAULT; 107 buf->error = -EFAULT;
108 return -EFAULT; 108 return -EFAULT;
109} 109}
110 110
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 9155c9312c1e..c6be19e9ceae 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -116,6 +116,11 @@ ifeq ($(CONFIG_6xx),y)
116KBUILD_CFLAGS += -mcpu=powerpc 116KBUILD_CFLAGS += -mcpu=powerpc
117endif 117endif
118 118
119# Work around a gcc code-gen bug with -fno-omit-frame-pointer.
120ifeq ($(CONFIG_FTRACE),y)
121KBUILD_CFLAGS += -mno-sched-epilog
122endif
123
119cpu-as-$(CONFIG_4xx) += -Wa,-m405 124cpu-as-$(CONFIG_4xx) += -Wa,-m405
120cpu-as-$(CONFIG_6xx) += -Wa,-maltivec 125cpu-as-$(CONFIG_6xx) += -Wa,-maltivec
121cpu-as-$(CONFIG_POWER4) += -Wa,-maltivec 126cpu-as-$(CONFIG_POWER4) += -Wa,-maltivec
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 14174aa24074..717a3bc1352e 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -49,7 +49,7 @@ zlib := inffast.c inflate.c inftrees.c
49zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h 49zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
50zliblinuxheader := zlib.h zconf.h zutil.h 50zliblinuxheader := zlib.h zconf.h zutil.h
51 51
52$(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \ 52$(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o prpmc2800.o): \
53 $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader)) 53 $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader))
54 54
55src-libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c 55src-libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index db0b8f3b8807..4597c491e9b5 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -153,12 +153,10 @@
153#define __S110 PAGE_SHARED_X 153#define __S110 PAGE_SHARED_X
154#define __S111 PAGE_SHARED_X 154#define __S111 PAGE_SHARED_X
155 155
156#ifdef CONFIG_HUGETLB_PAGE 156#ifdef CONFIG_PPC_MM_SLICES
157
158#define HAVE_ARCH_UNMAPPED_AREA 157#define HAVE_ARCH_UNMAPPED_AREA
159#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 158#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
160 159#endif /* CONFIG_PPC_MM_SLICES */
161#endif
162 160
163#ifndef __ASSEMBLY__ 161#ifndef __ASSEMBLY__
164 162
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 64f5948ebc9d..946daea780f1 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -14,12 +14,13 @@ endif
14 14
15ifdef CONFIG_FTRACE 15ifdef CONFIG_FTRACE
16# Do not trace early boot code 16# Do not trace early boot code
17CFLAGS_REMOVE_cputable.o = -pg 17CFLAGS_REMOVE_cputable.o = -pg -mno-sched-epilog
18CFLAGS_REMOVE_prom_init.o = -pg 18CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog
19CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog
19 20
20ifdef CONFIG_DYNAMIC_FTRACE 21ifdef CONFIG_DYNAMIC_FTRACE
21# dynamic ftrace setup. 22# dynamic ftrace setup.
22CFLAGS_REMOVE_ftrace.o = -pg 23CFLAGS_REMOVE_ftrace.o = -pg -mno-sched-epilog
23endif 24endif
24 25
25endif 26endif
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 367129789cc0..5af4e9b2dbe2 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -647,7 +647,7 @@ static int emulate_vsx(unsigned char __user *addr, unsigned int reg,
647 unsigned int flags, unsigned int length) 647 unsigned int flags, unsigned int length)
648{ 648{
649 char *ptr = (char *) &current->thread.TS_FPR(reg); 649 char *ptr = (char *) &current->thread.TS_FPR(reg);
650 int ret; 650 int ret = 0;
651 651
652 flush_vsx_to_thread(current); 652 flush_vsx_to_thread(current);
653 653
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S
index 019b02d8844f..15c611de1ee2 100644
--- a/arch/powerpc/kernel/idle_6xx.S
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -158,7 +158,7 @@ _GLOBAL(power_save_ppc32_restore)
158 stw r9,_NIP(r11) /* make it do a blr */ 158 stw r9,_NIP(r11) /* make it do a blr */
159 159
160#ifdef CONFIG_SMP 160#ifdef CONFIG_SMP
161 mfspr r12,SPRN_SPRG3 161 rlwinm r12,r11,0,0,31-THREAD_SHIFT
162 lwz r11,TI_CPU(r12) /* get cpu number * 4 */ 162 lwz r11,TI_CPU(r12) /* get cpu number * 4 */
163 slwi r11,r11,2 163 slwi r11,r11,2
164#else 164#else
diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S
index 06304034b393..47a1a983ff88 100644
--- a/arch/powerpc/kernel/idle_e500.S
+++ b/arch/powerpc/kernel/idle_e500.S
@@ -84,10 +84,11 @@ _GLOBAL(power_save_ppc32_restore)
84 stw r9,_NIP(r11) /* make it do a blr */ 84 stw r9,_NIP(r11) /* make it do a blr */
85 85
86#ifdef CONFIG_SMP 86#ifdef CONFIG_SMP
87 mfspr r12,SPRN_SPRG3 87 rlwinm r12,r1,0,0,31-THREAD_SHIFT
88 lwz r11,TI_CPU(r12) /* get cpu number * 4 */ 88 lwz r11,TI_CPU(r12) /* get cpu number * 4 */
89 slwi r11,r11,2 89 slwi r11,r11,2
90#else 90#else
91 li r11,0 91 li r11,0
92#endif 92#endif
93
93 b transfer_to_handler_cont 94 b transfer_to_handler_cont
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 4a8ce62fe112..9f6c1ca1739e 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -66,11 +66,12 @@ SECTIONS
66 __got2_end = .; 66 __got2_end = .;
67#endif /* CONFIG_PPC32 */ 67#endif /* CONFIG_PPC32 */
68 68
69 . = ALIGN(PAGE_SIZE);
70 _etext = .;
71 PROVIDE32 (etext = .);
72 } :kernel 69 } :kernel
73 70
71 . = ALIGN(PAGE_SIZE);
72 _etext = .;
73 PROVIDE32 (etext = .);
74
74 /* Read-only data */ 75 /* Read-only data */
75 RODATA 76 RODATA
76 77
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 14be408dfc9b..8920eea34528 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -191,12 +191,17 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
191 unsigned long hash, hpteg; 191 unsigned long hash, hpteg;
192 unsigned long vsid = get_kernel_vsid(vaddr, ssize); 192 unsigned long vsid = get_kernel_vsid(vaddr, ssize);
193 unsigned long va = hpt_va(vaddr, vsid, ssize); 193 unsigned long va = hpt_va(vaddr, vsid, ssize);
194 unsigned long tprot = prot;
195
196 /* Make kernel text executable */
197 if (in_kernel_text(vaddr))
198 tprot &= ~HPTE_R_N;
194 199
195 hash = hpt_hash(va, shift, ssize); 200 hash = hpt_hash(va, shift, ssize);
196 hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); 201 hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
197 202
198 BUG_ON(!ppc_md.hpte_insert); 203 BUG_ON(!ppc_md.hpte_insert);
199 ret = ppc_md.hpte_insert(hpteg, va, paddr, prot, 204 ret = ppc_md.hpte_insert(hpteg, va, paddr, tprot,
200 HPTE_V_BOLTED, psize, ssize); 205 HPTE_V_BOLTED, psize, ssize);
201 206
202 if (ret < 0) 207 if (ret < 0)
@@ -584,7 +589,7 @@ void __init htab_initialize(void)
584{ 589{
585 unsigned long table; 590 unsigned long table;
586 unsigned long pteg_count; 591 unsigned long pteg_count;
587 unsigned long prot, tprot; 592 unsigned long prot;
588 unsigned long base = 0, size = 0, limit; 593 unsigned long base = 0, size = 0, limit;
589 int i; 594 int i;
590 595
@@ -660,10 +665,9 @@ void __init htab_initialize(void)
660 for (i=0; i < lmb.memory.cnt; i++) { 665 for (i=0; i < lmb.memory.cnt; i++) {
661 base = (unsigned long)__va(lmb.memory.region[i].base); 666 base = (unsigned long)__va(lmb.memory.region[i].base);
662 size = lmb.memory.region[i].size; 667 size = lmb.memory.region[i].size;
663 tprot = prot | (in_kernel_text(base) ? _PAGE_EXEC : 0);
664 668
665 DBG("creating mapping for region: %lx..%lx (prot: %x)\n", 669 DBG("creating mapping for region: %lx..%lx (prot: %x)\n",
666 base, size, tprot); 670 base, size, prot);
667 671
668#ifdef CONFIG_U3_DART 672#ifdef CONFIG_U3_DART
669 /* Do not map the DART space. Fortunately, it will be aligned 673 /* Do not map the DART space. Fortunately, it will be aligned
@@ -680,21 +684,21 @@ void __init htab_initialize(void)
680 unsigned long dart_table_end = dart_tablebase + 16 * MB; 684 unsigned long dart_table_end = dart_tablebase + 16 * MB;
681 if (base != dart_tablebase) 685 if (base != dart_tablebase)
682 BUG_ON(htab_bolt_mapping(base, dart_tablebase, 686 BUG_ON(htab_bolt_mapping(base, dart_tablebase,
683 __pa(base), tprot, 687 __pa(base), prot,
684 mmu_linear_psize, 688 mmu_linear_psize,
685 mmu_kernel_ssize)); 689 mmu_kernel_ssize));
686 if ((base + size) > dart_table_end) 690 if ((base + size) > dart_table_end)
687 BUG_ON(htab_bolt_mapping(dart_tablebase+16*MB, 691 BUG_ON(htab_bolt_mapping(dart_tablebase+16*MB,
688 base + size, 692 base + size,
689 __pa(dart_table_end), 693 __pa(dart_table_end),
690 tprot, 694 prot,
691 mmu_linear_psize, 695 mmu_linear_psize,
692 mmu_kernel_ssize)); 696 mmu_kernel_ssize));
693 continue; 697 continue;
694 } 698 }
695#endif /* CONFIG_U3_DART */ 699#endif /* CONFIG_U3_DART */
696 BUG_ON(htab_bolt_mapping(base, base + size, __pa(base), 700 BUG_ON(htab_bolt_mapping(base, base + size, __pa(base),
697 tprot, mmu_linear_psize, mmu_kernel_ssize)); 701 prot, mmu_linear_psize, mmu_kernel_ssize));
698 } 702 }
699 703
700 /* 704 /*
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 1c1b627ee843..67595bc380dc 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -643,9 +643,10 @@ static struct spu *find_victim(struct spu_context *ctx)
643 !(tmp->flags & SPU_CREATE_NOSCHED) && 643 !(tmp->flags & SPU_CREATE_NOSCHED) &&
644 (!victim || tmp->prio > victim->prio)) { 644 (!victim || tmp->prio > victim->prio)) {
645 victim = spu->ctx; 645 victim = spu->ctx;
646 get_spu_context(victim);
647 } 646 }
648 } 647 }
648 if (victim)
649 get_spu_context(victim);
649 mutex_unlock(&cbe_spu_info[node].list_mutex); 650 mutex_unlock(&cbe_spu_info[node].list_mutex);
650 651
651 if (victim) { 652 if (victim) {
@@ -727,17 +728,33 @@ static void spu_schedule(struct spu *spu, struct spu_context *ctx)
727 /* not a candidate for interruptible because it's called either 728 /* not a candidate for interruptible because it's called either
728 from the scheduler thread or from spu_deactivate */ 729 from the scheduler thread or from spu_deactivate */
729 mutex_lock(&ctx->state_mutex); 730 mutex_lock(&ctx->state_mutex);
730 __spu_schedule(spu, ctx); 731 if (ctx->state == SPU_STATE_SAVED)
732 __spu_schedule(spu, ctx);
731 spu_release(ctx); 733 spu_release(ctx);
732} 734}
733 735
734static void spu_unschedule(struct spu *spu, struct spu_context *ctx) 736/**
737 * spu_unschedule - remove a context from a spu, and possibly release it.
738 * @spu: The SPU to unschedule from
739 * @ctx: The context currently scheduled on the SPU
740 * @free_spu Whether to free the SPU for other contexts
741 *
742 * Unbinds the context @ctx from the SPU @spu. If @free_spu is non-zero, the
743 * SPU is made available for other contexts (ie, may be returned by
744 * spu_get_idle). If this is zero, the caller is expected to schedule another
745 * context to this spu.
746 *
747 * Should be called with ctx->state_mutex held.
748 */
749static void spu_unschedule(struct spu *spu, struct spu_context *ctx,
750 int free_spu)
735{ 751{
736 int node = spu->node; 752 int node = spu->node;
737 753
738 mutex_lock(&cbe_spu_info[node].list_mutex); 754 mutex_lock(&cbe_spu_info[node].list_mutex);
739 cbe_spu_info[node].nr_active--; 755 cbe_spu_info[node].nr_active--;
740 spu->alloc_state = SPU_FREE; 756 if (free_spu)
757 spu->alloc_state = SPU_FREE;
741 spu_unbind_context(spu, ctx); 758 spu_unbind_context(spu, ctx);
742 ctx->stats.invol_ctx_switch++; 759 ctx->stats.invol_ctx_switch++;
743 spu->stats.invol_ctx_switch++; 760 spu->stats.invol_ctx_switch++;
@@ -837,7 +854,7 @@ static int __spu_deactivate(struct spu_context *ctx, int force, int max_prio)
837 if (spu) { 854 if (spu) {
838 new = grab_runnable_context(max_prio, spu->node); 855 new = grab_runnable_context(max_prio, spu->node);
839 if (new || force) { 856 if (new || force) {
840 spu_unschedule(spu, ctx); 857 spu_unschedule(spu, ctx, new == NULL);
841 if (new) { 858 if (new) {
842 if (new->flags & SPU_CREATE_NOSCHED) 859 if (new->flags & SPU_CREATE_NOSCHED)
843 wake_up(&new->stop_wq); 860 wake_up(&new->stop_wq);
@@ -910,7 +927,7 @@ static noinline void spusched_tick(struct spu_context *ctx)
910 927
911 new = grab_runnable_context(ctx->prio + 1, spu->node); 928 new = grab_runnable_context(ctx->prio + 1, spu->node);
912 if (new) { 929 if (new) {
913 spu_unschedule(spu, ctx); 930 spu_unschedule(spu, ctx, 0);
914 if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags)) 931 if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
915 spu_add_to_rq(ctx); 932 spu_add_to_rq(ctx);
916 } else { 933 } else {
diff --git a/arch/powerpc/platforms/powermac/Makefile b/arch/powerpc/platforms/powermac/Makefile
index 58ecdd72630f..be60d64be7ad 100644
--- a/arch/powerpc/platforms/powermac/Makefile
+++ b/arch/powerpc/platforms/powermac/Makefile
@@ -2,7 +2,7 @@ CFLAGS_bootx_init.o += -fPIC
2 2
3ifdef CONFIG_FTRACE 3ifdef CONFIG_FTRACE
4# Do not trace early boot code 4# Do not trace early boot code
5CFLAGS_REMOVE_bootx_init.o = -pg 5CFLAGS_REMOVE_bootx_init.o = -pg -mno-sched-epilog
6endif 6endif
7 7
8obj-y += pic.o setup.o time.o feature.o pci.o \ 8obj-y += pic.o setup.o time.o feature.o pci.o \
diff --git a/arch/sh/configs/ap325rxa_defconfig b/arch/sh/configs/ap325rxa_defconfig
index 29926a9b9ce2..851c870adf3b 100644
--- a/arch/sh/configs/ap325rxa_defconfig
+++ b/arch/sh/configs/ap325rxa_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26 3# Linux kernel version: 2.6.27-rc4
4# Wed Jul 30 01:18:59 2008 4# Tue Aug 26 14:21:17 2008
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -11,6 +11,7 @@ CONFIG_GENERIC_BUG=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y 11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y 12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
14CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
15CONFIG_GENERIC_CALIBRATE_DELAY=y 16CONFIG_GENERIC_CALIBRATE_DELAY=y
16CONFIG_GENERIC_TIME=y 17CONFIG_GENERIC_TIME=y
@@ -20,7 +21,6 @@ CONFIG_LOCKDEP_SUPPORT=y
20# CONFIG_ARCH_HAS_ILOG2_U32 is not set 21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_ARCH_NO_VIRT_TO_BUS=y 23CONFIG_ARCH_NO_VIRT_TO_BUS=y
23CONFIG_ARCH_SUPPORTS_AOUT=y
24CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 24CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
25 25
26# 26#
@@ -58,7 +58,6 @@ CONFIG_SYSCTL=y
58CONFIG_EMBEDDED=y 58CONFIG_EMBEDDED=y
59CONFIG_UID16=y 59CONFIG_UID16=y
60CONFIG_SYSCTL_SYSCALL=y 60CONFIG_SYSCTL_SYSCALL=y
61CONFIG_SYSCTL_SYSCALL_CHECK=y
62# CONFIG_KALLSYMS is not set 61# CONFIG_KALLSYMS is not set
63CONFIG_HOTPLUG=y 62CONFIG_HOTPLUG=y
64CONFIG_PRINTK=y 63CONFIG_PRINTK=y
@@ -89,6 +88,7 @@ CONFIG_HAVE_OPROFILE=y
89# CONFIG_USE_GENERIC_SMP_HELPERS is not set 88# CONFIG_USE_GENERIC_SMP_HELPERS is not set
90CONFIG_HAVE_CLK=y 89CONFIG_HAVE_CLK=y
91CONFIG_PROC_PAGE_MONITOR=y 90CONFIG_PROC_PAGE_MONITOR=y
91CONFIG_HAVE_GENERIC_DMA_COHERENT=y
92CONFIG_SLABINFO=y 92CONFIG_SLABINFO=y
93CONFIG_RT_MUTEXES=y 93CONFIG_RT_MUTEXES=y
94# CONFIG_TINY_SHMEM is not set 94# CONFIG_TINY_SHMEM is not set
@@ -261,9 +261,10 @@ CONFIG_HZ_250=y
261# CONFIG_HZ_300 is not set 261# CONFIG_HZ_300 is not set
262# CONFIG_HZ_1000 is not set 262# CONFIG_HZ_1000 is not set
263CONFIG_HZ=250 263CONFIG_HZ=250
264# CONFIG_SCHED_HRTICK is not set 264CONFIG_SCHED_HRTICK=y
265# CONFIG_KEXEC is not set 265# CONFIG_KEXEC is not set
266# CONFIG_CRASH_DUMP is not set 266# CONFIG_CRASH_DUMP is not set
267CONFIG_SECCOMP=y
267# CONFIG_PREEMPT_NONE is not set 268# CONFIG_PREEMPT_NONE is not set
268# CONFIG_PREEMPT_VOLUNTARY is not set 269# CONFIG_PREEMPT_VOLUNTARY is not set
269CONFIG_PREEMPT=y 270CONFIG_PREEMPT=y
@@ -289,10 +290,6 @@ CONFIG_CMDLINE="console=tty1 console=ttySC5,38400 root=/dev/nfs ip=dhcp"
289# 290#
290CONFIG_BINFMT_ELF=y 291CONFIG_BINFMT_ELF=y
291# CONFIG_BINFMT_MISC is not set 292# CONFIG_BINFMT_MISC is not set
292
293#
294# Networking
295#
296CONFIG_NET=y 293CONFIG_NET=y
297 294
298# 295#
@@ -647,6 +644,7 @@ CONFIG_SSB_POSSIBLE=y
647# CONFIG_MFD_CORE is not set 644# CONFIG_MFD_CORE is not set
648# CONFIG_MFD_SM501 is not set 645# CONFIG_MFD_SM501 is not set
649# CONFIG_HTC_PASIC3 is not set 646# CONFIG_HTC_PASIC3 is not set
647# CONFIG_MFD_TMIO is not set
650 648
651# 649#
652# Multimedia devices 650# Multimedia devices
@@ -690,7 +688,10 @@ CONFIG_DUMMY_CONSOLE=y
690# CONFIG_ACCESSIBILITY is not set 688# CONFIG_ACCESSIBILITY is not set
691# CONFIG_RTC_CLASS is not set 689# CONFIG_RTC_CLASS is not set
692# CONFIG_DMADEVICES is not set 690# CONFIG_DMADEVICES is not set
693# CONFIG_UIO is not set 691CONFIG_UIO=y
692# CONFIG_UIO_PDRV is not set
693CONFIG_UIO_PDRV_GENIRQ=y
694# CONFIG_UIO_SMX is not set
694 695
695# 696#
696# File systems 697# File systems
@@ -854,6 +855,7 @@ CONFIG_FRAME_WARN=1024
854# CONFIG_DEBUG_KERNEL is not set 855# CONFIG_DEBUG_KERNEL is not set
855# CONFIG_DEBUG_BUGVERBOSE is not set 856# CONFIG_DEBUG_BUGVERBOSE is not set
856# CONFIG_DEBUG_MEMORY_INIT is not set 857# CONFIG_DEBUG_MEMORY_INIT is not set
858CONFIG_SYSCTL_SYSCALL_CHECK=y
857# CONFIG_SAMPLES is not set 859# CONFIG_SAMPLES is not set
858# CONFIG_SH_STANDARD_BIOS is not set 860# CONFIG_SH_STANDARD_BIOS is not set
859# CONFIG_EARLY_SCIF_CONSOLE is not set 861# CONFIG_EARLY_SCIF_CONSOLE is not set
diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig
index c4b3e1d8950d..4f8b1974f2c7 100644
--- a/arch/sh/configs/migor_defconfig
+++ b/arch/sh/configs/migor_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26 3# Linux kernel version: 2.6.27-rc4
4# Wed Jul 30 01:44:41 2008 4# Tue Aug 26 14:18:17 2008
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -11,6 +11,7 @@ CONFIG_GENERIC_BUG=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y 11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y 12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
14CONFIG_GENERIC_IRQ_PROBE=y 15CONFIG_GENERIC_IRQ_PROBE=y
15CONFIG_GENERIC_CALIBRATE_DELAY=y 16CONFIG_GENERIC_CALIBRATE_DELAY=y
16CONFIG_GENERIC_TIME=y 17CONFIG_GENERIC_TIME=y
@@ -21,7 +22,6 @@ CONFIG_LOCKDEP_SUPPORT=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set 22# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set 23# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_ARCH_NO_VIRT_TO_BUS=y 24CONFIG_ARCH_NO_VIRT_TO_BUS=y
24CONFIG_ARCH_SUPPORTS_AOUT=y
25CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 25CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
26 26
27# 27#
@@ -87,6 +87,7 @@ CONFIG_HAVE_OPROFILE=y
87# CONFIG_USE_GENERIC_SMP_HELPERS is not set 87# CONFIG_USE_GENERIC_SMP_HELPERS is not set
88CONFIG_HAVE_CLK=y 88CONFIG_HAVE_CLK=y
89CONFIG_PROC_PAGE_MONITOR=y 89CONFIG_PROC_PAGE_MONITOR=y
90CONFIG_HAVE_GENERIC_DMA_COHERENT=y
90CONFIG_SLABINFO=y 91CONFIG_SLABINFO=y
91CONFIG_RT_MUTEXES=y 92CONFIG_RT_MUTEXES=y
92# CONFIG_TINY_SHMEM is not set 93# CONFIG_TINY_SHMEM is not set
@@ -270,6 +271,7 @@ CONFIG_HZ=250
270# CONFIG_SCHED_HRTICK is not set 271# CONFIG_SCHED_HRTICK is not set
271# CONFIG_KEXEC is not set 272# CONFIG_KEXEC is not set
272# CONFIG_CRASH_DUMP is not set 273# CONFIG_CRASH_DUMP is not set
274CONFIG_SECCOMP=y
273CONFIG_PREEMPT_NONE=y 275CONFIG_PREEMPT_NONE=y
274# CONFIG_PREEMPT_VOLUNTARY is not set 276# CONFIG_PREEMPT_VOLUNTARY is not set
275# CONFIG_PREEMPT is not set 277# CONFIG_PREEMPT is not set
@@ -294,10 +296,6 @@ CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=serial ip=on"
294# 296#
295CONFIG_BINFMT_ELF=y 297CONFIG_BINFMT_ELF=y
296# CONFIG_BINFMT_MISC is not set 298# CONFIG_BINFMT_MISC is not set
297
298#
299# Networking
300#
301CONFIG_NET=y 299CONFIG_NET=y
302 300
303# 301#
@@ -649,6 +647,7 @@ CONFIG_HW_RANDOM=y
649CONFIG_I2C=y 647CONFIG_I2C=y
650CONFIG_I2C_BOARDINFO=y 648CONFIG_I2C_BOARDINFO=y
651# CONFIG_I2C_CHARDEV is not set 649# CONFIG_I2C_CHARDEV is not set
650CONFIG_I2C_HELPER_AUTO=y
652 651
653# 652#
654# I2C Hardware Bus support 653# I2C Hardware Bus support
@@ -709,6 +708,7 @@ CONFIG_SSB_POSSIBLE=y
709# CONFIG_MFD_CORE is not set 708# CONFIG_MFD_CORE is not set
710# CONFIG_MFD_SM501 is not set 709# CONFIG_MFD_SM501 is not set
711# CONFIG_HTC_PASIC3 is not set 710# CONFIG_HTC_PASIC3 is not set
711# CONFIG_MFD_TMIO is not set
712 712
713# 713#
714# Multimedia devices 714# Multimedia devices
@@ -755,6 +755,8 @@ CONFIG_USB_ARCH_HAS_HCD=y
755# CONFIG_USB is not set 755# CONFIG_USB is not set
756# CONFIG_USB_OTG_WHITELIST is not set 756# CONFIG_USB_OTG_WHITELIST is not set
757# CONFIG_USB_OTG_BLACKLIST_HUB is not set 757# CONFIG_USB_OTG_BLACKLIST_HUB is not set
758# CONFIG_USB_MUSB_HDRC is not set
759# CONFIG_USB_GADGET_MUSB_HDRC is not set
758 760
759# 761#
760# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 762# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -842,7 +844,10 @@ CONFIG_RTC_DRV_RS5C372=y
842# 844#
843CONFIG_RTC_DRV_SH=y 845CONFIG_RTC_DRV_SH=y
844# CONFIG_DMADEVICES is not set 846# CONFIG_DMADEVICES is not set
845# CONFIG_UIO is not set 847CONFIG_UIO=y
848# CONFIG_UIO_PDRV is not set
849CONFIG_UIO_PDRV_GENIRQ=y
850# CONFIG_UIO_SMX is not set
846 851
847# 852#
848# File systems 853# File systems
diff --git a/arch/sh/include/asm/uaccess_64.h b/arch/sh/include/asm/uaccess_64.h
index 81b3d515fcb3..5580fd471003 100644
--- a/arch/sh/include/asm/uaccess_64.h
+++ b/arch/sh/include/asm/uaccess_64.h
@@ -76,4 +76,6 @@ extern long __put_user_asm_l(void *, long);
76extern long __put_user_asm_q(void *, long); 76extern long __put_user_asm_q(void *, long);
77extern void __put_user_unknown(void); 77extern void __put_user_unknown(void);
78 78
79extern long __strnlen_user(const char *__s, long __n);
80
79#endif /* __ASM_SH_UACCESS_64_H */ 81#endif /* __ASM_SH_UACCESS_64_H */
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index 04c7da968146..e640c63d5811 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -2,7 +2,7 @@
2 * arch/sh/kernel/cpu/sh5/entry.S 2 * arch/sh/kernel/cpu/sh5/entry.S
3 * 3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 * Copyright (C) 2004 - 2007 Paul Mundt 5 * Copyright (C) 2004 - 2008 Paul Mundt
6 * Copyright (C) 2003, 2004 Richard Curnow 6 * Copyright (C) 2003, 2004 Richard Curnow
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
@@ -923,6 +923,8 @@ ret_from_exception:
923 blink tr0, ZERO 923 blink tr0, ZERO
924 924
925resume_kernel: 925resume_kernel:
926 CLI()
927
926 pta restore_all, tr0 928 pta restore_all, tr0
927 929
928 getcon KCR0, r6 930 getcon KCR0, r6
@@ -939,19 +941,11 @@ need_resched:
939 andi r7, 0xf0, r7 941 andi r7, 0xf0, r7
940 bne r7, ZERO, tr0 942 bne r7, ZERO, tr0
941 943
942 movi ((PREEMPT_ACTIVE >> 16) & 65535), r8 944 movi preempt_schedule_irq, r7
943 shori (PREEMPT_ACTIVE & 65535), r8
944 st.l r6, TI_PRE_COUNT, r8
945
946 STI()
947 movi schedule, r7
948 ori r7, 1, r7 945 ori r7, 1, r7
949 ptabs r7, tr1 946 ptabs r7, tr1
950 blink tr1, LINK 947 blink tr1, LINK
951 948
952 st.l r6, TI_PRE_COUNT, ZERO
953 CLI()
954
955 pta need_resched, tr1 949 pta need_resched, tr1
956 blink tr1, ZERO 950 blink tr1, ZERO
957#endif 951#endif
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 0bc17def55a7..efbb4268875e 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -92,6 +92,7 @@ ENTRY(ret_from_irq)
92 bra resume_userspace 92 bra resume_userspace
93 nop 93 nop
94ENTRY(resume_kernel) 94ENTRY(resume_kernel)
95 cli
95 mov.l @(TI_PRE_COUNT,r8), r0 ! current_thread_info->preempt_count 96 mov.l @(TI_PRE_COUNT,r8), r0 ! current_thread_info->preempt_count
96 tst r0, r0 97 tst r0, r0
97 bf noresched 98 bf noresched
@@ -105,28 +106,9 @@ need_resched:
105 and #0xf0, r0 ! interrupts off (exception path)? 106 and #0xf0, r0 ! interrupts off (exception path)?
106 cmp/eq #0xf0, r0 107 cmp/eq #0xf0, r0
107 bt noresched 108 bt noresched
108
109 mov.l 1f, r0
110 mov.l r0, @(TI_PRE_COUNT,r8)
111
112#ifdef CONFIG_TRACE_IRQFLAGS
113 mov.l 3f, r0 109 mov.l 3f, r0
114 jsr @r0 110 jsr @r0 ! call preempt_schedule_irq
115 nop
116#endif
117 sti
118 mov.l 2f, r0
119 jsr @r0
120 nop
121 mov #0, r0
122 mov.l r0, @(TI_PRE_COUNT,r8)
123 cli
124#ifdef CONFIG_TRACE_IRQFLAGS
125 mov.l 4f, r0
126 jsr @r0
127 nop 111 nop
128#endif
129
130 bra need_resched 112 bra need_resched
131 nop 113 nop
132 114
@@ -137,10 +119,7 @@ noresched:
137 .align 2 119 .align 2
1381: .long PREEMPT_ACTIVE 1201: .long PREEMPT_ACTIVE
1392: .long schedule 1212: .long schedule
140#ifdef CONFIG_TRACE_IRQFLAGS 1223: .long preempt_schedule_irq
1413: .long trace_hardirqs_on
1424: .long trace_hardirqs_off
143#endif
144#endif 123#endif
145 124
146ENTRY(resume_userspace) 125ENTRY(resume_userspace)
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 4703dff174d5..94df56b0d1f6 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -102,7 +102,7 @@ void machine_kexec(struct kimage *image)
102 102
103 /* now call it */ 103 /* now call it */
104 rnk = (relocate_new_kernel_t) reboot_code_buffer; 104 rnk = (relocate_new_kernel_t) reboot_code_buffer;
105 (*rnk)(page_list, reboot_code_buffer, image->start, vbr_reg); 105 (*rnk)(page_list, reboot_code_buffer, P2SEGADDR(image->start), vbr_reg);
106} 106}
107 107
108void arch_crash_save_vmcoreinfo(void) 108void arch_crash_save_vmcoreinfo(void)
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c
index 5922edd416db..9c6424892bd3 100644
--- a/arch/sh/kernel/ptrace_64.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -131,6 +131,8 @@ void user_enable_single_step(struct task_struct *child)
131 131
132void user_disable_single_step(struct task_struct *child) 132void user_disable_single_step(struct task_struct *child)
133{ 133{
134 struct pt_regs *regs = child->thread.uregs;
135
134 regs->sr &= ~SR_SSTEP; 136 regs->sr &= ~SR_SSTEP;
135} 137}
136 138
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index a35207655e7b..de832056bf1b 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -171,6 +171,7 @@ static void __init reserve_crashkernel(void)
171 (unsigned long)(free_mem >> 20)); 171 (unsigned long)(free_mem >> 20));
172 crashk_res.start = crash_base; 172 crashk_res.start = crash_base;
173 crashk_res.end = crash_base + crash_size - 1; 173 crashk_res.end = crash_base + crash_size - 1;
174 insert_resource(&iomem_resource, &crashk_res);
174 } 175 }
175} 176}
176#else 177#else
@@ -204,11 +205,6 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
204 request_resource(res, &data_resource); 205 request_resource(res, &data_resource);
205 request_resource(res, &bss_resource); 206 request_resource(res, &bss_resource);
206 207
207#ifdef CONFIG_KEXEC
208 if (crashk_res.start != crashk_res.end)
209 request_resource(res, &crashk_res);
210#endif
211
212 add_active_range(nid, start_pfn, end_pfn); 208 add_active_range(nid, start_pfn, end_pfn);
213} 209}
214 210
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 59cd2859ce9b..9061b86d73fa 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -170,7 +170,7 @@ asmlinkage int sys_ipc(uint call, int first, int second,
170 version = call >> 16; /* hack for backward compatibility */ 170 version = call >> 16; /* hack for backward compatibility */
171 call &= 0xffff; 171 call &= 0xffff;
172 172
173 if (call <= SEMCTL) 173 if (call <= SEMTIMEDOP)
174 switch (call) { 174 switch (call) {
175 case SEMOP: 175 case SEMOP:
176 return sys_semtimedop(first, 176 return sys_semtimedop(first,
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index 895bb3f335c7..64b8f7f96f9a 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -101,7 +101,7 @@ static int __init memchunk_setup(char *str)
101} 101}
102__setup("memchunk.", memchunk_setup); 102__setup("memchunk.", memchunk_setup);
103 103
104static void memchunk_cmdline_override(char *name, unsigned long *sizep) 104static void __init memchunk_cmdline_override(char *name, unsigned long *sizep)
105{ 105{
106 char *p = boot_command_line; 106 char *p = boot_command_line;
107 int k = strlen(name); 107 int k = strlen(name);
@@ -118,8 +118,8 @@ static void memchunk_cmdline_override(char *name, unsigned long *sizep)
118 } 118 }
119} 119}
120 120
121int platform_resource_setup_memory(struct platform_device *pdev, 121int __init platform_resource_setup_memory(struct platform_device *pdev,
122 char *name, unsigned long memsize) 122 char *name, unsigned long memsize)
123{ 123{
124 struct resource *r; 124 struct resource *r;
125 dma_addr_t dma_handle; 125 dma_addr_t dma_handle;
diff --git a/arch/sparc/include/asm/smp_32.h b/arch/sparc/include/asm/smp_32.h
index 7201752cf934..a8180e546a48 100644
--- a/arch/sparc/include/asm/smp_32.h
+++ b/arch/sparc/include/asm/smp_32.h
@@ -50,27 +50,24 @@ struct seq_file;
50void smp_bogo(struct seq_file *); 50void smp_bogo(struct seq_file *);
51void smp_info(struct seq_file *); 51void smp_info(struct seq_file *);
52 52
53BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long) 53BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
54BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void) 54BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
55BTFIXUPDEF_BLACKBOX(hard_smp_processor_id) 55BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
56BTFIXUPDEF_BLACKBOX(load_current) 56BTFIXUPDEF_BLACKBOX(load_current)
57 57
58#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5) 58#define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
59 59
60static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } 60static inline void xc0(smpfunc_t func) { smp_cross_call(func, cpu_online_map, 0, 0, 0, 0); }
61static inline void xc1(smpfunc_t func, unsigned long arg1) 61static inline void xc1(smpfunc_t func, unsigned long arg1)
62{ smp_cross_call(func, arg1, 0, 0, 0, 0); } 62{ smp_cross_call(func, cpu_online_map, arg1, 0, 0, 0); }
63static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) 63static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
64{ smp_cross_call(func, arg1, arg2, 0, 0, 0); } 64{ smp_cross_call(func, cpu_online_map, arg1, arg2, 0, 0); }
65static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, 65static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
66 unsigned long arg3) 66 unsigned long arg3)
67{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); } 67{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, 0); }
68static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, 68static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
69 unsigned long arg3, unsigned long arg4) 69 unsigned long arg3, unsigned long arg4)
70{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); } 70{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, arg4); }
71static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2,
72 unsigned long arg3, unsigned long arg4, unsigned long arg5)
73{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); }
74 71
75static inline int smp_call_function(void (*func)(void *info), void *info, int wait) 72static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
76{ 73{
@@ -78,6 +75,14 @@ static inline int smp_call_function(void (*func)(void *info), void *info, int wa
78 return 0; 75 return 0;
79} 76}
80 77
78static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
79 void *info, int wait)
80{
81 smp_cross_call((smpfunc_t)func, cpumask_of_cpu(cpuid),
82 (unsigned long) info, 0, 0, 0);
83 return 0;
84}
85
81static inline int cpu_logical_map(int cpu) 86static inline int cpu_logical_map(int cpu)
82{ 87{
83 return cpu; 88 return cpu;
diff --git a/arch/sparc/kernel/of_device.c b/arch/sparc/kernel/of_device.c
index cc4c235c4f59..c481d45f97b7 100644
--- a/arch/sparc/kernel/of_device.c
+++ b/arch/sparc/kernel/of_device.c
@@ -70,7 +70,7 @@ struct of_bus {
70 int *addrc, int *sizec); 70 int *addrc, int *sizec);
71 int (*map)(u32 *addr, const u32 *range, 71 int (*map)(u32 *addr, const u32 *range,
72 int na, int ns, int pna); 72 int na, int ns, int pna);
73 unsigned int (*get_flags)(const u32 *addr); 73 unsigned long (*get_flags)(const u32 *addr, unsigned long);
74}; 74};
75 75
76/* 76/*
@@ -130,8 +130,10 @@ static int of_bus_default_map(u32 *addr, const u32 *range,
130 return 0; 130 return 0;
131} 131}
132 132
133static unsigned int of_bus_default_get_flags(const u32 *addr) 133static unsigned long of_bus_default_get_flags(const u32 *addr, unsigned long flags)
134{ 134{
135 if (flags)
136 return flags;
135 return IORESOURCE_MEM; 137 return IORESOURCE_MEM;
136} 138}
137 139
@@ -194,17 +196,21 @@ static int of_bus_pci_map(u32 *addr, const u32 *range,
194 return 0; 196 return 0;
195} 197}
196 198
197static unsigned int of_bus_pci_get_flags(const u32 *addr) 199static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags)
198{ 200{
199 unsigned int flags = 0;
200 u32 w = addr[0]; 201 u32 w = addr[0];
201 202
203 /* For PCI, we override whatever child busses may have used. */
204 flags = 0;
202 switch((w >> 24) & 0x03) { 205 switch((w >> 24) & 0x03) {
203 case 0x01: 206 case 0x01:
204 flags |= IORESOURCE_IO; 207 flags |= IORESOURCE_IO;
208 break;
209
205 case 0x02: /* 32 bits */ 210 case 0x02: /* 32 bits */
206 case 0x03: /* 64 bits */ 211 case 0x03: /* 64 bits */
207 flags |= IORESOURCE_MEM; 212 flags |= IORESOURCE_MEM;
213 break;
208 } 214 }
209 if (w & 0x40000000) 215 if (w & 0x40000000)
210 flags |= IORESOURCE_PREFETCH; 216 flags |= IORESOURCE_PREFETCH;
@@ -362,10 +368,11 @@ static void __init build_device_resources(struct of_device *op,
362 int pna, pns; 368 int pna, pns;
363 369
364 size = of_read_addr(reg + na, ns); 370 size = of_read_addr(reg + na, ns);
365 flags = bus->get_flags(reg);
366 371
367 memcpy(addr, reg, na * 4); 372 memcpy(addr, reg, na * 4);
368 373
374 flags = bus->get_flags(reg, 0);
375
369 /* If the immediate parent has no ranges property to apply, 376 /* If the immediate parent has no ranges property to apply,
370 * just use a 1<->1 mapping. 377 * just use a 1<->1 mapping.
371 */ 378 */
@@ -393,6 +400,8 @@ static void __init build_device_resources(struct of_device *op,
393 dna, dns, pna)) 400 dna, dns, pna))
394 break; 401 break;
395 402
403 flags = pbus->get_flags(addr, flags);
404
396 dna = pna; 405 dna = pna;
397 dns = pns; 406 dns = pns;
398 dbus = pbus; 407 dbus = pbus;
diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c
index dfde77ff0848..69596402a500 100644
--- a/arch/sparc/kernel/sun4d_smp.c
+++ b/arch/sparc/kernel/sun4d_smp.c
@@ -262,8 +262,9 @@ static struct smp_funcall {
262static DEFINE_SPINLOCK(cross_call_lock); 262static DEFINE_SPINLOCK(cross_call_lock);
263 263
264/* Cross calls must be serialized, at least currently. */ 264/* Cross calls must be serialized, at least currently. */
265void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2, 265static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
266 unsigned long arg3, unsigned long arg4, unsigned long arg5) 266 unsigned long arg2, unsigned long arg3,
267 unsigned long arg4)
267{ 268{
268 if(smp_processors_ready) { 269 if(smp_processors_ready) {
269 register int high = smp_highest_cpu; 270 register int high = smp_highest_cpu;
@@ -278,7 +279,7 @@ void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
278 register unsigned long a2 asm("i2") = arg2; 279 register unsigned long a2 asm("i2") = arg2;
279 register unsigned long a3 asm("i3") = arg3; 280 register unsigned long a3 asm("i3") = arg3;
280 register unsigned long a4 asm("i4") = arg4; 281 register unsigned long a4 asm("i4") = arg4;
281 register unsigned long a5 asm("i5") = arg5; 282 register unsigned long a5 asm("i5") = 0;
282 283
283 __asm__ __volatile__( 284 __asm__ __volatile__(
284 "std %0, [%6]\n\t" 285 "std %0, [%6]\n\t"
@@ -290,11 +291,10 @@ void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
290 291
291 /* Init receive/complete mapping, plus fire the IPI's off. */ 292 /* Init receive/complete mapping, plus fire the IPI's off. */
292 { 293 {
293 cpumask_t mask;
294 register int i; 294 register int i;
295 295
296 mask = cpumask_of_cpu(hard_smp4d_processor_id()); 296 cpu_clear(smp_processor_id(), mask);
297 cpus_andnot(mask, cpu_online_map, mask); 297 cpus_and(mask, cpu_online_map, mask);
298 for(i = 0; i <= high; i++) { 298 for(i = 0; i <= high; i++) {
299 if (cpu_isset(i, mask)) { 299 if (cpu_isset(i, mask)) {
300 ccall_info.processors_in[i] = 0; 300 ccall_info.processors_in[i] = 0;
@@ -309,12 +309,16 @@ void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
309 309
310 i = 0; 310 i = 0;
311 do { 311 do {
312 if (!cpu_isset(i, mask))
313 continue;
312 while(!ccall_info.processors_in[i]) 314 while(!ccall_info.processors_in[i])
313 barrier(); 315 barrier();
314 } while(++i <= high); 316 } while(++i <= high);
315 317
316 i = 0; 318 i = 0;
317 do { 319 do {
320 if (!cpu_isset(i, mask))
321 continue;
318 while(!ccall_info.processors_out[i]) 322 while(!ccall_info.processors_out[i])
319 barrier(); 323 barrier();
320 } while(++i <= high); 324 } while(++i <= high);
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c
index 406ac1abc83a..a14a76ac7f36 100644
--- a/arch/sparc/kernel/sun4m_smp.c
+++ b/arch/sparc/kernel/sun4m_smp.c
@@ -244,9 +244,9 @@ static struct smp_funcall {
244static DEFINE_SPINLOCK(cross_call_lock); 244static DEFINE_SPINLOCK(cross_call_lock);
245 245
246/* Cross calls must be serialized, at least currently. */ 246/* Cross calls must be serialized, at least currently. */
247static void smp4m_cross_call(smpfunc_t func, unsigned long arg1, 247static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
248 unsigned long arg2, unsigned long arg3, 248 unsigned long arg2, unsigned long arg3,
249 unsigned long arg4, unsigned long arg5) 249 unsigned long arg4)
250{ 250{
251 register int ncpus = SUN4M_NCPUS; 251 register int ncpus = SUN4M_NCPUS;
252 unsigned long flags; 252 unsigned long flags;
@@ -259,14 +259,14 @@ static void smp4m_cross_call(smpfunc_t func, unsigned long arg1,
259 ccall_info.arg2 = arg2; 259 ccall_info.arg2 = arg2;
260 ccall_info.arg3 = arg3; 260 ccall_info.arg3 = arg3;
261 ccall_info.arg4 = arg4; 261 ccall_info.arg4 = arg4;
262 ccall_info.arg5 = arg5; 262 ccall_info.arg5 = 0;
263 263
264 /* Init receive/complete mapping, plus fire the IPI's off. */ 264 /* Init receive/complete mapping, plus fire the IPI's off. */
265 { 265 {
266 cpumask_t mask = cpu_online_map;
267 register int i; 266 register int i;
268 267
269 cpu_clear(smp_processor_id(), mask); 268 cpu_clear(smp_processor_id(), mask);
269 cpus_and(mask, cpu_online_map, mask);
270 for(i = 0; i < ncpus; i++) { 270 for(i = 0; i < ncpus; i++) {
271 if (cpu_isset(i, mask)) { 271 if (cpu_isset(i, mask)) {
272 ccall_info.processors_in[i] = 0; 272 ccall_info.processors_in[i] = 0;
@@ -284,12 +284,16 @@ static void smp4m_cross_call(smpfunc_t func, unsigned long arg1,
284 284
285 i = 0; 285 i = 0;
286 do { 286 do {
287 if (!cpu_isset(i, mask))
288 continue;
287 while(!ccall_info.processors_in[i]) 289 while(!ccall_info.processors_in[i])
288 barrier(); 290 barrier();
289 } while(++i < ncpus); 291 } while(++i < ncpus);
290 292
291 i = 0; 293 i = 0;
292 do { 294 do {
295 if (!cpu_isset(i, mask))
296 continue;
293 while(!ccall_info.processors_out[i]) 297 while(!ccall_info.processors_out[i])
294 barrier(); 298 barrier();
295 } while(++i < ncpus); 299 } while(++i < ncpus);
diff --git a/arch/sparc64/kernel/of_device.c b/arch/sparc64/kernel/of_device.c
index f8b50cbf4bf7..f845f150f565 100644
--- a/arch/sparc64/kernel/of_device.c
+++ b/arch/sparc64/kernel/of_device.c
@@ -96,7 +96,7 @@ struct of_bus {
96 int *addrc, int *sizec); 96 int *addrc, int *sizec);
97 int (*map)(u32 *addr, const u32 *range, 97 int (*map)(u32 *addr, const u32 *range,
98 int na, int ns, int pna); 98 int na, int ns, int pna);
99 unsigned int (*get_flags)(const u32 *addr); 99 unsigned long (*get_flags)(const u32 *addr, unsigned long);
100}; 100};
101 101
102/* 102/*
@@ -156,8 +156,10 @@ static int of_bus_default_map(u32 *addr, const u32 *range,
156 return 0; 156 return 0;
157} 157}
158 158
159static unsigned int of_bus_default_get_flags(const u32 *addr) 159static unsigned long of_bus_default_get_flags(const u32 *addr, unsigned long flags)
160{ 160{
161 if (flags)
162 return flags;
161 return IORESOURCE_MEM; 163 return IORESOURCE_MEM;
162} 164}
163 165
@@ -249,17 +251,21 @@ static int of_bus_pci_map(u32 *addr, const u32 *range,
249 return 0; 251 return 0;
250} 252}
251 253
252static unsigned int of_bus_pci_get_flags(const u32 *addr) 254static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags)
253{ 255{
254 unsigned int flags = 0;
255 u32 w = addr[0]; 256 u32 w = addr[0];
256 257
258 /* For PCI, we override whatever child busses may have used. */
259 flags = 0;
257 switch((w >> 24) & 0x03) { 260 switch((w >> 24) & 0x03) {
258 case 0x01: 261 case 0x01:
259 flags |= IORESOURCE_IO; 262 flags |= IORESOURCE_IO;
263 break;
264
260 case 0x02: /* 32 bits */ 265 case 0x02: /* 32 bits */
261 case 0x03: /* 64 bits */ 266 case 0x03: /* 64 bits */
262 flags |= IORESOURCE_MEM; 267 flags |= IORESOURCE_MEM;
268 break;
263 } 269 }
264 if (w & 0x40000000) 270 if (w & 0x40000000)
265 flags |= IORESOURCE_PREFETCH; 271 flags |= IORESOURCE_PREFETCH;
@@ -478,10 +484,10 @@ static void __init build_device_resources(struct of_device *op,
478 int pna, pns; 484 int pna, pns;
479 485
480 size = of_read_addr(reg + na, ns); 486 size = of_read_addr(reg + na, ns);
481 flags = bus->get_flags(reg);
482
483 memcpy(addr, reg, na * 4); 487 memcpy(addr, reg, na * 4);
484 488
489 flags = bus->get_flags(addr, 0);
490
485 if (use_1to1_mapping(pp)) { 491 if (use_1to1_mapping(pp)) {
486 result = of_read_addr(addr, na); 492 result = of_read_addr(addr, na);
487 goto build_res; 493 goto build_res;
@@ -506,6 +512,8 @@ static void __init build_device_resources(struct of_device *op,
506 dna, dns, pna)) 512 dna, dns, pna))
507 break; 513 break;
508 514
515 flags = pbus->get_flags(addr, flags);
516
509 dna = pna; 517 dna = pna;
510 dns = pns; 518 dns = pns;
511 dbus = pbus; 519 dbus = pbus;
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 743ccad61c60..2be166c544ca 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -80,8 +80,6 @@ void smp_bogo(struct seq_file *m)
80 i, cpu_data(i).clock_tick); 80 i, cpu_data(i).clock_tick);
81} 81}
82 82
83static __cacheline_aligned_in_smp DEFINE_SPINLOCK(call_lock);
84
85extern void setup_sparc64_timer(void); 83extern void setup_sparc64_timer(void);
86 84
87static volatile unsigned long callin_flag = 0; 85static volatile unsigned long callin_flag = 0;
@@ -120,9 +118,9 @@ void __cpuinit smp_callin(void)
120 while (!cpu_isset(cpuid, smp_commenced_mask)) 118 while (!cpu_isset(cpuid, smp_commenced_mask))
121 rmb(); 119 rmb();
122 120
123 spin_lock(&call_lock); 121 ipi_call_lock();
124 cpu_set(cpuid, cpu_online_map); 122 cpu_set(cpuid, cpu_online_map);
125 spin_unlock(&call_lock); 123 ipi_call_unlock();
126 124
127 /* idle thread is expected to have preempt disabled */ 125 /* idle thread is expected to have preempt disabled */
128 preempt_disable(); 126 preempt_disable();
@@ -1305,10 +1303,6 @@ int __cpu_disable(void)
1305 c->core_id = 0; 1303 c->core_id = 0;
1306 c->proc_id = -1; 1304 c->proc_id = -1;
1307 1305
1308 spin_lock(&call_lock);
1309 cpu_clear(cpu, cpu_online_map);
1310 spin_unlock(&call_lock);
1311
1312 smp_wmb(); 1306 smp_wmb();
1313 1307
1314 /* Make sure no interrupts point to this cpu. */ 1308 /* Make sure no interrupts point to this cpu. */
@@ -1318,6 +1312,10 @@ int __cpu_disable(void)
1318 mdelay(1); 1312 mdelay(1);
1319 local_irq_disable(); 1313 local_irq_disable();
1320 1314
1315 ipi_call_lock();
1316 cpu_clear(cpu, cpu_online_map);
1317 ipi_call_unlock();
1318
1321 return 0; 1319 return 0;
1322} 1320}
1323 1321
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index b4aeb0f696dc..a41df7bef035 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -1843,7 +1843,7 @@ static int pavail_rescan_ents __initdata;
1843 * memory list again, and make sure it provides at least as much 1843 * memory list again, and make sure it provides at least as much
1844 * memory as 'pavail' does. 1844 * memory as 'pavail' does.
1845 */ 1845 */
1846static void setup_valid_addr_bitmap_from_pavail(void) 1846static void __init setup_valid_addr_bitmap_from_pavail(void)
1847{ 1847{
1848 int i; 1848 int i;
1849 1849
diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c
index 4b9ae7c56748..4d3ff037201f 100644
--- a/arch/x86/boot/cpucheck.c
+++ b/arch/x86/boot/cpucheck.c
@@ -38,12 +38,12 @@ static const u32 req_flags[NCAPINTS] =
38{ 38{
39 REQUIRED_MASK0, 39 REQUIRED_MASK0,
40 REQUIRED_MASK1, 40 REQUIRED_MASK1,
41 REQUIRED_MASK2, 41 0, /* REQUIRED_MASK2 not implemented in this file */
42 REQUIRED_MASK3, 42 0, /* REQUIRED_MASK3 not implemented in this file */
43 REQUIRED_MASK4, 43 REQUIRED_MASK4,
44 REQUIRED_MASK5, 44 0, /* REQUIRED_MASK5 not implemented in this file */
45 REQUIRED_MASK6, 45 REQUIRED_MASK6,
46 REQUIRED_MASK7, 46 0, /* REQUIRED_MASK7 not implemented in this file */
47}; 47};
48 48
49#define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a)) 49#define A32(a, b, c, d) (((d) << 24)+((c) << 16)+((b) << 8)+(a))
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 2763cb37b553..65a0c1b48696 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -145,35 +145,25 @@ static const unsigned char *const p6_nops[ASM_NOP_MAX+1] = {
145extern char __vsyscall_0; 145extern char __vsyscall_0;
146const unsigned char *const *find_nop_table(void) 146const unsigned char *const *find_nop_table(void)
147{ 147{
148 return boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || 148 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
149 boot_cpu_data.x86 < 6 ? k8_nops : p6_nops; 149 boot_cpu_has(X86_FEATURE_NOPL))
150 return p6_nops;
151 else
152 return k8_nops;
150} 153}
151 154
152#else /* CONFIG_X86_64 */ 155#else /* CONFIG_X86_64 */
153 156
154static const struct nop {
155 int cpuid;
156 const unsigned char *const *noptable;
157} noptypes[] = {
158 { X86_FEATURE_K8, k8_nops },
159 { X86_FEATURE_K7, k7_nops },
160 { X86_FEATURE_P4, p6_nops },
161 { X86_FEATURE_P3, p6_nops },
162 { -1, NULL }
163};
164
165const unsigned char *const *find_nop_table(void) 157const unsigned char *const *find_nop_table(void)
166{ 158{
167 const unsigned char *const *noptable = intel_nops; 159 if (boot_cpu_has(X86_FEATURE_K8))
168 int i; 160 return k8_nops;
169 161 else if (boot_cpu_has(X86_FEATURE_K7))
170 for (i = 0; noptypes[i].cpuid >= 0; i++) { 162 return k7_nops;
171 if (boot_cpu_has(noptypes[i].cpuid)) { 163 else if (boot_cpu_has(X86_FEATURE_NOPL))
172 noptable = noptypes[i].noptable; 164 return p6_nops;
173 break; 165 else
174 } 166 return intel_nops;
175 }
176 return noptable;
177} 167}
178 168
179#endif /* CONFIG_X86_64 */ 169#endif /* CONFIG_X86_64 */
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index cae9cabc3031..18514ed26104 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -31,6 +31,11 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
31 if (c->x86_power & (1<<8)) 31 if (c->x86_power & (1<<8))
32 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 32 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
33 } 33 }
34
35 /* Set MTRR capability flag if appropriate */
36 if (c->x86_model == 13 || c->x86_model == 9 ||
37 (c->x86_model == 8 && c->x86_mask >= 8))
38 set_cpu_cap(c, X86_FEATURE_K6_MTRR);
34} 39}
35 40
36static void __cpuinit init_amd(struct cpuinfo_x86 *c) 41static void __cpuinit init_amd(struct cpuinfo_x86 *c)
@@ -166,10 +171,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
166 mbytes); 171 mbytes);
167 } 172 }
168 173
169 /* Set MTRR capability flag if appropriate */
170 if (c->x86_model == 13 || c->x86_model == 9 ||
171 (c->x86_model == 8 && c->x86_mask >= 8))
172 set_cpu_cap(c, X86_FEATURE_K6_MTRR);
173 break; 174 break;
174 } 175 }
175 176
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index e0f45edd6a55..a0534c04d38a 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -314,6 +314,16 @@ enum {
314 EAMD3D = 1<<20, 314 EAMD3D = 1<<20,
315}; 315};
316 316
317static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
318{
319 switch (c->x86) {
320 case 5:
321 /* Emulate MTRRs using Centaur's MCR. */
322 set_cpu_cap(c, X86_FEATURE_CENTAUR_MCR);
323 break;
324 }
325}
326
317static void __cpuinit init_centaur(struct cpuinfo_x86 *c) 327static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
318{ 328{
319 329
@@ -462,6 +472,7 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
462static struct cpu_dev centaur_cpu_dev __cpuinitdata = { 472static struct cpu_dev centaur_cpu_dev __cpuinitdata = {
463 .c_vendor = "Centaur", 473 .c_vendor = "Centaur",
464 .c_ident = { "CentaurHauls" }, 474 .c_ident = { "CentaurHauls" },
475 .c_early_init = early_init_centaur,
465 .c_init = init_centaur, 476 .c_init = init_centaur,
466 .c_size_cache = centaur_size_cache, 477 .c_size_cache = centaur_size_cache,
467}; 478};
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 80ab20d4fa39..8aab8517642e 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -13,6 +13,7 @@
13#include <asm/mtrr.h> 13#include <asm/mtrr.h>
14#include <asm/mce.h> 14#include <asm/mce.h>
15#include <asm/pat.h> 15#include <asm/pat.h>
16#include <asm/asm.h>
16#ifdef CONFIG_X86_LOCAL_APIC 17#ifdef CONFIG_X86_LOCAL_APIC
17#include <asm/mpspec.h> 18#include <asm/mpspec.h>
18#include <asm/apic.h> 19#include <asm/apic.h>
@@ -334,11 +335,40 @@ static void __init early_cpu_detect(void)
334 335
335 get_cpu_vendor(c, 1); 336 get_cpu_vendor(c, 1);
336 337
338 early_get_cap(c);
339
337 if (c->x86_vendor != X86_VENDOR_UNKNOWN && 340 if (c->x86_vendor != X86_VENDOR_UNKNOWN &&
338 cpu_devs[c->x86_vendor]->c_early_init) 341 cpu_devs[c->x86_vendor]->c_early_init)
339 cpu_devs[c->x86_vendor]->c_early_init(c); 342 cpu_devs[c->x86_vendor]->c_early_init(c);
343}
340 344
341 early_get_cap(c); 345/*
346 * The NOPL instruction is supposed to exist on all CPUs with
347 * family >= 6, unfortunately, that's not true in practice because
348 * of early VIA chips and (more importantly) broken virtualizers that
349 * are not easy to detect. Hence, probe for it based on first
350 * principles.
351 */
352static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
353{
354 const u32 nopl_signature = 0x888c53b1; /* Random number */
355 u32 has_nopl = nopl_signature;
356
357 clear_cpu_cap(c, X86_FEATURE_NOPL);
358 if (c->x86 >= 6) {
359 asm volatile("\n"
360 "1: .byte 0x0f,0x1f,0xc0\n" /* nopl %eax */
361 "2:\n"
362 " .section .fixup,\"ax\"\n"
363 "3: xor %0,%0\n"
364 " jmp 2b\n"
365 " .previous\n"
366 _ASM_EXTABLE(1b,3b)
367 : "+a" (has_nopl));
368
369 if (has_nopl == nopl_signature)
370 set_cpu_cap(c, X86_FEATURE_NOPL);
371 }
342} 372}
343 373
344static void __cpuinit generic_identify(struct cpuinfo_x86 *c) 374static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
@@ -395,8 +425,8 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
395 } 425 }
396 426
397 init_scattered_cpuid_features(c); 427 init_scattered_cpuid_features(c);
428 detect_nopl(c);
398 } 429 }
399
400} 430}
401 431
402static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c) 432static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/common_64.c b/arch/x86/kernel/cpu/common_64.c
index dd6e3f15017e..a11f5d4477cd 100644
--- a/arch/x86/kernel/cpu/common_64.c
+++ b/arch/x86/kernel/cpu/common_64.c
@@ -18,6 +18,7 @@
18#include <asm/mtrr.h> 18#include <asm/mtrr.h>
19#include <asm/mce.h> 19#include <asm/mce.h>
20#include <asm/pat.h> 20#include <asm/pat.h>
21#include <asm/asm.h>
21#include <asm/numa.h> 22#include <asm/numa.h>
22#ifdef CONFIG_X86_LOCAL_APIC 23#ifdef CONFIG_X86_LOCAL_APIC
23#include <asm/mpspec.h> 24#include <asm/mpspec.h>
@@ -215,6 +216,39 @@ static void __init early_cpu_support_print(void)
215 } 216 }
216} 217}
217 218
219/*
220 * The NOPL instruction is supposed to exist on all CPUs with
221 * family >= 6, unfortunately, that's not true in practice because
222 * of early VIA chips and (more importantly) broken virtualizers that
223 * are not easy to detect. Hence, probe for it based on first
224 * principles.
225 *
226 * Note: no 64-bit chip is known to lack these, but put the code here
227 * for consistency with 32 bits, and to make it utterly trivial to
228 * diagnose the problem should it ever surface.
229 */
230static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
231{
232 const u32 nopl_signature = 0x888c53b1; /* Random number */
233 u32 has_nopl = nopl_signature;
234
235 clear_cpu_cap(c, X86_FEATURE_NOPL);
236 if (c->x86 >= 6) {
237 asm volatile("\n"
238 "1: .byte 0x0f,0x1f,0xc0\n" /* nopl %eax */
239 "2:\n"
240 " .section .fixup,\"ax\"\n"
241 "3: xor %0,%0\n"
242 " jmp 2b\n"
243 " .previous\n"
244 _ASM_EXTABLE(1b,3b)
245 : "+a" (has_nopl));
246
247 if (has_nopl == nopl_signature)
248 set_cpu_cap(c, X86_FEATURE_NOPL);
249 }
250}
251
218static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c); 252static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c);
219 253
220void __init early_cpu_init(void) 254void __init early_cpu_init(void)
@@ -313,6 +347,8 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
313 c->x86_phys_bits = eax & 0xff; 347 c->x86_phys_bits = eax & 0xff;
314 } 348 }
315 349
350 detect_nopl(c);
351
316 if (c->x86_vendor != X86_VENDOR_UNKNOWN && 352 if (c->x86_vendor != X86_VENDOR_UNKNOWN &&
317 cpu_devs[c->x86_vendor]->c_early_init) 353 cpu_devs[c->x86_vendor]->c_early_init)
318 cpu_devs[c->x86_vendor]->c_early_init(c); 354 cpu_devs[c->x86_vendor]->c_early_init(c);
@@ -493,17 +529,20 @@ void pda_init(int cpu)
493 /* others are initialized in smpboot.c */ 529 /* others are initialized in smpboot.c */
494 pda->pcurrent = &init_task; 530 pda->pcurrent = &init_task;
495 pda->irqstackptr = boot_cpu_stack; 531 pda->irqstackptr = boot_cpu_stack;
532 pda->irqstackptr += IRQSTACKSIZE - 64;
496 } else { 533 } else {
497 pda->irqstackptr = (char *) 534 if (!pda->irqstackptr) {
498 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER); 535 pda->irqstackptr = (char *)
499 if (!pda->irqstackptr) 536 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
500 panic("cannot allocate irqstack for cpu %d", cpu); 537 if (!pda->irqstackptr)
538 panic("cannot allocate irqstack for cpu %d",
539 cpu);
540 pda->irqstackptr += IRQSTACKSIZE - 64;
541 }
501 542
502 if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE) 543 if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE)
503 pda->nodenumber = cpu_to_node(cpu); 544 pda->nodenumber = cpu_to_node(cpu);
504 } 545 }
505
506 pda->irqstackptr += IRQSTACKSIZE-64;
507} 546}
508 547
509char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + 548char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
@@ -601,19 +640,22 @@ void __cpuinit cpu_init(void)
601 /* 640 /*
602 * set up and load the per-CPU TSS 641 * set up and load the per-CPU TSS
603 */ 642 */
604 for (v = 0; v < N_EXCEPTION_STACKS; v++) { 643 if (!orig_ist->ist[0]) {
605 static const unsigned int order[N_EXCEPTION_STACKS] = { 644 static const unsigned int order[N_EXCEPTION_STACKS] = {
606 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER, 645 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
607 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER 646 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
608 }; 647 };
609 if (cpu) { 648 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
610 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]); 649 if (cpu) {
611 if (!estacks) 650 estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
612 panic("Cannot allocate exception stack %ld %d\n", 651 if (!estacks)
613 v, cpu); 652 panic("Cannot allocate exception "
653 "stack %ld %d\n", v, cpu);
654 }
655 estacks += PAGE_SIZE << order[v];
656 orig_ist->ist[v] = t->x86_tss.ist[v] =
657 (unsigned long)estacks;
614 } 658 }
615 estacks += PAGE_SIZE << order[v];
616 orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
617 } 659 }
618 660
619 t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); 661 t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index e710a21bb6e8..898a5a2002ed 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -15,13 +15,11 @@
15/* 15/*
16 * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU 16 * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU
17 */ 17 */
18static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) 18static void __cpuinit __do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
19{ 19{
20 unsigned char ccr2, ccr3; 20 unsigned char ccr2, ccr3;
21 unsigned long flags;
22 21
23 /* we test for DEVID by checking whether CCR3 is writable */ 22 /* we test for DEVID by checking whether CCR3 is writable */
24 local_irq_save(flags);
25 ccr3 = getCx86(CX86_CCR3); 23 ccr3 = getCx86(CX86_CCR3);
26 setCx86(CX86_CCR3, ccr3 ^ 0x80); 24 setCx86(CX86_CCR3, ccr3 ^ 0x80);
27 getCx86(0xc0); /* dummy to change bus */ 25 getCx86(0xc0); /* dummy to change bus */
@@ -44,9 +42,16 @@ static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
44 *dir0 = getCx86(CX86_DIR0); 42 *dir0 = getCx86(CX86_DIR0);
45 *dir1 = getCx86(CX86_DIR1); 43 *dir1 = getCx86(CX86_DIR1);
46 } 44 }
47 local_irq_restore(flags);
48} 45}
49 46
47static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
48{
49 unsigned long flags;
50
51 local_irq_save(flags);
52 __do_cyrix_devid(dir0, dir1);
53 local_irq_restore(flags);
54}
50/* 55/*
51 * Cx86_dir0_msb is a HACK needed by check_cx686_cpuid/slop in bugs.h in 56 * Cx86_dir0_msb is a HACK needed by check_cx686_cpuid/slop in bugs.h in
52 * order to identify the Cyrix CPU model after we're out of setup.c 57 * order to identify the Cyrix CPU model after we're out of setup.c
@@ -161,6 +166,24 @@ static void __cpuinit geode_configure(void)
161 local_irq_restore(flags); 166 local_irq_restore(flags);
162} 167}
163 168
169static void __cpuinit early_init_cyrix(struct cpuinfo_x86 *c)
170{
171 unsigned char dir0, dir0_msn, dir1 = 0;
172
173 __do_cyrix_devid(&dir0, &dir1);
174 dir0_msn = dir0 >> 4; /* identifies CPU "family" */
175
176 switch (dir0_msn) {
177 case 3: /* 6x86/6x86L */
178 /* Emulate MTRRs using Cyrix's ARRs. */
179 set_cpu_cap(c, X86_FEATURE_CYRIX_ARR);
180 break;
181 case 5: /* 6x86MX/M II */
182 /* Emulate MTRRs using Cyrix's ARRs. */
183 set_cpu_cap(c, X86_FEATURE_CYRIX_ARR);
184 break;
185 }
186}
164 187
165static void __cpuinit init_cyrix(struct cpuinfo_x86 *c) 188static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
166{ 189{
@@ -416,6 +439,7 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c)
416static struct cpu_dev cyrix_cpu_dev __cpuinitdata = { 439static struct cpu_dev cyrix_cpu_dev __cpuinitdata = {
417 .c_vendor = "Cyrix", 440 .c_vendor = "Cyrix",
418 .c_ident = { "CyrixInstead" }, 441 .c_ident = { "CyrixInstead" },
442 .c_early_init = early_init_cyrix,
419 .c_init = init_cyrix, 443 .c_init = init_cyrix,
420 .c_identify = cyrix_identify, 444 .c_identify = cyrix_identify,
421}; 445};
diff --git a/arch/x86/kernel/cpu/feature_names.c b/arch/x86/kernel/cpu/feature_names.c
index e43ad4ad4cba..c9017799497c 100644
--- a/arch/x86/kernel/cpu/feature_names.c
+++ b/arch/x86/kernel/cpu/feature_names.c
@@ -39,7 +39,8 @@ const char * const x86_cap_flags[NCAPINTS*32] = {
39 NULL, NULL, NULL, NULL, 39 NULL, NULL, NULL, NULL,
40 "constant_tsc", "up", NULL, "arch_perfmon", 40 "constant_tsc", "up", NULL, "arch_perfmon",
41 "pebs", "bts", NULL, NULL, 41 "pebs", "bts", NULL, NULL,
42 "rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL, 42 "rep_good", NULL, NULL, NULL,
43 "nopl", NULL, NULL, NULL,
43 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 44 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
44 45
45 /* Intel-defined (#2) */ 46 /* Intel-defined (#2) */
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index 59fd3b6b1303..73deaffadd03 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -210,8 +210,8 @@ static void hpet_legacy_clockevent_register(void)
210 /* Calculate the min / max delta */ 210 /* Calculate the min / max delta */
211 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, 211 hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
212 &hpet_clockevent); 212 &hpet_clockevent);
213 hpet_clockevent.min_delta_ns = clockevent_delta2ns(0x30, 213 /* 5 usec minimum reprogramming delta. */
214 &hpet_clockevent); 214 hpet_clockevent.min_delta_ns = 5000;
215 215
216 /* 216 /*
217 * Start hpet with the boot cpu mask and make it 217 * Start hpet with the boot cpu mask and make it
@@ -270,15 +270,22 @@ static void hpet_legacy_set_mode(enum clock_event_mode mode,
270} 270}
271 271
272static int hpet_legacy_next_event(unsigned long delta, 272static int hpet_legacy_next_event(unsigned long delta,
273 struct clock_event_device *evt) 273 struct clock_event_device *evt)
274{ 274{
275 unsigned long cnt; 275 u32 cnt;
276 276
277 cnt = hpet_readl(HPET_COUNTER); 277 cnt = hpet_readl(HPET_COUNTER);
278 cnt += delta; 278 cnt += (u32) delta;
279 hpet_writel(cnt, HPET_T0_CMP); 279 hpet_writel(cnt, HPET_T0_CMP);
280 280
281 return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0) ? -ETIME : 0; 281 /*
282 * We need to read back the CMP register to make sure that
283 * what we wrote hit the chip before we compare it to the
284 * counter.
285 */
286 WARN_ON((u32)hpet_readl(HPET_T0_CMP) != cnt);
287
288 return (s32)((u32)hpet_readl(HPET_COUNTER) - cnt) >= 0 ? -ETIME : 0;
282} 289}
283 290
284/* 291/*
diff --git a/arch/x86/kernel/io_delay.c b/arch/x86/kernel/io_delay.c
index 1c3a66a67f83..720d2607aacb 100644
--- a/arch/x86/kernel/io_delay.c
+++ b/arch/x86/kernel/io_delay.c
@@ -92,6 +92,14 @@ static struct dmi_system_id __initdata io_delay_0xed_port_dmi_table[] = {
92 DMI_MATCH(DMI_BOARD_NAME, "30BF") 92 DMI_MATCH(DMI_BOARD_NAME, "30BF")
93 } 93 }
94 }, 94 },
95 {
96 .callback = dmi_io_delay_0xed_port,
97 .ident = "Presario F700",
98 .matches = {
99 DMI_MATCH(DMI_BOARD_VENDOR, "Quanta"),
100 DMI_MATCH(DMI_BOARD_NAME, "30D3")
101 }
102 },
95 { } 103 { }
96}; 104};
97 105
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 8e786b0d665a..8f98e9de1b82 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -122,80 +122,216 @@ static u64 tsc_read_refs(u64 *pm, u64 *hpet)
122 return ULLONG_MAX; 122 return ULLONG_MAX;
123} 123}
124 124
125/** 125/*
126 * native_calibrate_tsc - calibrate the tsc on boot 126 * Try to calibrate the TSC against the Programmable
127 * Interrupt Timer and return the frequency of the TSC
128 * in kHz.
129 *
130 * Return ULONG_MAX on failure to calibrate.
127 */ 131 */
128unsigned long native_calibrate_tsc(void) 132static unsigned long pit_calibrate_tsc(void)
129{ 133{
130 unsigned long flags; 134 u64 tsc, t1, t2, delta;
131 u64 tsc1, tsc2, tr1, tr2, delta, pm1, pm2, hpet1, hpet2; 135 unsigned long tscmin, tscmax;
132 int hpet = is_hpet_enabled(); 136 int pitcnt;
133 unsigned int tsc_khz_val = 0;
134
135 local_irq_save(flags);
136
137 tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
138 137
138 /* Set the Gate high, disable speaker */
139 outb((inb(0x61) & ~0x02) | 0x01, 0x61); 139 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
140 140
141 /*
142 * Setup CTC channel 2* for mode 0, (interrupt on terminal
143 * count mode), binary count. Set the latch register to 50ms
144 * (LSB then MSB) to begin countdown.
145 */
141 outb(0xb0, 0x43); 146 outb(0xb0, 0x43);
142 outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42); 147 outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
143 outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42); 148 outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
144 tr1 = get_cycles();
145 while ((inb(0x61) & 0x20) == 0);
146 tr2 = get_cycles();
147 149
148 tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL); 150 tsc = t1 = t2 = get_cycles();
149 151
150 local_irq_restore(flags); 152 pitcnt = 0;
153 tscmax = 0;
154 tscmin = ULONG_MAX;
155 while ((inb(0x61) & 0x20) == 0) {
156 t2 = get_cycles();
157 delta = t2 - tsc;
158 tsc = t2;
159 if ((unsigned long) delta < tscmin)
160 tscmin = (unsigned int) delta;
161 if ((unsigned long) delta > tscmax)
162 tscmax = (unsigned int) delta;
163 pitcnt++;
164 }
151 165
152 /* 166 /*
153 * Preset the result with the raw and inaccurate PIT 167 * Sanity checks:
154 * calibration value 168 *
169 * If we were not able to read the PIT more than 5000
170 * times, then we have been hit by a massive SMI
171 *
172 * If the maximum is 10 times larger than the minimum,
173 * then we got hit by an SMI as well.
155 */ 174 */
156 delta = (tr2 - tr1); 175 if (pitcnt < 5000 || tscmax > 10 * tscmin)
176 return ULONG_MAX;
177
178 /* Calculate the PIT value */
179 delta = t2 - t1;
157 do_div(delta, 50); 180 do_div(delta, 50);
158 tsc_khz_val = delta; 181 return delta;
182}
183
184
185/**
186 * native_calibrate_tsc - calibrate the tsc on boot
187 */
188unsigned long native_calibrate_tsc(void)
189{
190 u64 tsc1, tsc2, delta, pm1, pm2, hpet1, hpet2;
191 unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
192 unsigned long flags;
193 int hpet = is_hpet_enabled(), i;
159 194
160 /* hpet or pmtimer available ? */ 195 /*
196 * Run 5 calibration loops to get the lowest frequency value
197 * (the best estimate). We use two different calibration modes
198 * here:
199 *
200 * 1) PIT loop. We set the PIT Channel 2 to oneshot mode and
201 * load a timeout of 50ms. We read the time right after we
202 * started the timer and wait until the PIT count down reaches
203 * zero. In each wait loop iteration we read the TSC and check
204 * the delta to the previous read. We keep track of the min
205 * and max values of that delta. The delta is mostly defined
206 * by the IO time of the PIT access, so we can detect when a
207 * SMI/SMM disturbance happend between the two reads. If the
208 * maximum time is significantly larger than the minimum time,
209 * then we discard the result and have another try.
210 *
211 * 2) Reference counter. If available we use the HPET or the
212 * PMTIMER as a reference to check the sanity of that value.
213 * We use separate TSC readouts and check inside of the
214 * reference read for a SMI/SMM disturbance. We dicard
215 * disturbed values here as well. We do that around the PIT
216 * calibration delay loop as we have to wait for a certain
217 * amount of time anyway.
218 */
219 for (i = 0; i < 5; i++) {
220 unsigned long tsc_pit_khz;
221
222 /*
223 * Read the start value and the reference count of
224 * hpet/pmtimer when available. Then do the PIT
225 * calibration, which will take at least 50ms, and
226 * read the end value.
227 */
228 local_irq_save(flags);
229 tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
230 tsc_pit_khz = pit_calibrate_tsc();
231 tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL);
232 local_irq_restore(flags);
233
234 /* Pick the lowest PIT TSC calibration so far */
235 tsc_pit_min = min(tsc_pit_min, tsc_pit_khz);
236
237 /* hpet or pmtimer available ? */
238 if (!hpet && !pm1 && !pm2)
239 continue;
240
241 /* Check, whether the sampling was disturbed by an SMI */
242 if (tsc1 == ULLONG_MAX || tsc2 == ULLONG_MAX)
243 continue;
244
245 tsc2 = (tsc2 - tsc1) * 1000000LL;
246
247 if (hpet) {
248 if (hpet2 < hpet1)
249 hpet2 += 0x100000000ULL;
250 hpet2 -= hpet1;
251 tsc1 = ((u64)hpet2 * hpet_readl(HPET_PERIOD));
252 do_div(tsc1, 1000000);
253 } else {
254 if (pm2 < pm1)
255 pm2 += (u64)ACPI_PM_OVRRUN;
256 pm2 -= pm1;
257 tsc1 = pm2 * 1000000000LL;
258 do_div(tsc1, PMTMR_TICKS_PER_SEC);
259 }
260
261 do_div(tsc2, tsc1);
262 tsc_ref_min = min(tsc_ref_min, (unsigned long) tsc2);
263 }
264
265 /*
266 * Now check the results.
267 */
268 if (tsc_pit_min == ULONG_MAX) {
269 /* PIT gave no useful value */
270 printk(KERN_WARNING "TSC: Unable to calibrate against PIT\n");
271
272 /* We don't have an alternative source, disable TSC */
273 if (!hpet && !pm1 && !pm2) {
274 printk("TSC: No reference (HPET/PMTIMER) available\n");
275 return 0;
276 }
277
278 /* The alternative source failed as well, disable TSC */
279 if (tsc_ref_min == ULONG_MAX) {
280 printk(KERN_WARNING "TSC: HPET/PMTIMER calibration "
281 "failed due to SMI disturbance.\n");
282 return 0;
283 }
284
285 /* Use the alternative source */
286 printk(KERN_INFO "TSC: using %s reference calibration\n",
287 hpet ? "HPET" : "PMTIMER");
288
289 return tsc_ref_min;
290 }
291
292 /* We don't have an alternative source, use the PIT calibration value */
161 if (!hpet && !pm1 && !pm2) { 293 if (!hpet && !pm1 && !pm2) {
162 printk(KERN_INFO "TSC calibrated against PIT\n"); 294 printk(KERN_INFO "TSC: Using PIT calibration value\n");
163 goto out; 295 return tsc_pit_min;
164 } 296 }
165 297
166 /* Check, whether the sampling was disturbed by an SMI */ 298 /* The alternative source failed, use the PIT calibration value */
167 if (tsc1 == ULLONG_MAX || tsc2 == ULLONG_MAX) { 299 if (tsc_ref_min == ULONG_MAX) {
168 printk(KERN_WARNING "TSC calibration disturbed by SMI, " 300 printk(KERN_WARNING "TSC: HPET/PMTIMER calibration failed due "
169 "using PIT calibration result\n"); 301 "to SMI disturbance. Using PIT calibration\n");
170 goto out; 302 return tsc_pit_min;
171 } 303 }
172 304
173 tsc2 = (tsc2 - tsc1) * 1000000LL; 305 /* Check the reference deviation */
174 306 delta = ((u64) tsc_pit_min) * 100;
175 if (hpet) { 307 do_div(delta, tsc_ref_min);
176 printk(KERN_INFO "TSC calibrated against HPET\n"); 308
177 if (hpet2 < hpet1) 309 /*
178 hpet2 += 0x100000000ULL; 310 * If both calibration results are inside a 5% window, the we
179 hpet2 -= hpet1; 311 * use the lower frequency of those as it is probably the
180 tsc1 = ((u64)hpet2 * hpet_readl(HPET_PERIOD)); 312 * closest estimate.
181 do_div(tsc1, 1000000); 313 */
182 } else { 314 if (delta >= 95 && delta <= 105) {
183 printk(KERN_INFO "TSC calibrated against PM_TIMER\n"); 315 printk(KERN_INFO "TSC: PIT calibration confirmed by %s.\n",
184 if (pm2 < pm1) 316 hpet ? "HPET" : "PMTIMER");
185 pm2 += (u64)ACPI_PM_OVRRUN; 317 printk(KERN_INFO "TSC: using %s calibration value\n",
186 pm2 -= pm1; 318 tsc_pit_min <= tsc_ref_min ? "PIT" :
187 tsc1 = pm2 * 1000000000LL; 319 hpet ? "HPET" : "PMTIMER");
188 do_div(tsc1, PMTMR_TICKS_PER_SEC); 320 return tsc_pit_min <= tsc_ref_min ? tsc_pit_min : tsc_ref_min;
189 } 321 }
190 322
191 do_div(tsc2, tsc1); 323 printk(KERN_WARNING "TSC: PIT calibration deviates from %s: %lu %lu.\n",
192 tsc_khz_val = tsc2; 324 hpet ? "HPET" : "PMTIMER", tsc_pit_min, tsc_ref_min);
193 325
194out: 326 /*
195 return tsc_khz_val; 327 * The calibration values differ too much. In doubt, we use
328 * the PIT value as we know that there are PMTIMERs around
329 * running at double speed.
330 */
331 printk(KERN_INFO "TSC: Using PIT calibration value\n");
332 return tsc_pit_min;
196} 333}
197 334
198
199#ifdef CONFIG_X86_32 335#ifdef CONFIG_X86_32
200/* Only called from the Powernow K7 cpu freq driver */ 336/* Only called from the Powernow K7 cpu freq driver */
201int recalibrate_cpu_khz(void) 337int recalibrate_cpu_khz(void)
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index d765da913842..8791fc55e715 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -31,11 +31,8 @@
31#include <linux/ioport.h> 31#include <linux/ioport.h>
32#include <linux/errno.h> 32#include <linux/errno.h>
33#include <linux/bootmem.h> 33#include <linux/bootmem.h>
34#include <linux/acpi.h>
35 34
36#include <asm/pat.h> 35#include <asm/pat.h>
37#include <asm/hpet.h>
38#include <asm/io_apic.h>
39 36
40#include "pci.h" 37#include "pci.h"
41 38
@@ -80,77 +77,6 @@ pcibios_align_resource(void *data, struct resource *res,
80} 77}
81EXPORT_SYMBOL(pcibios_align_resource); 78EXPORT_SYMBOL(pcibios_align_resource);
82 79
83static int check_res_with_valid(struct pci_dev *dev, struct resource *res)
84{
85 unsigned long base;
86 unsigned long size;
87 int i;
88
89 base = res->start;
90 size = (res->start == 0 && res->end == res->start) ? 0 :
91 (res->end - res->start + 1);
92
93 if (!base || !size)
94 return 0;
95
96#ifdef CONFIG_HPET_TIMER
97 /* for hpet */
98 if (base == hpet_address && (res->flags & IORESOURCE_MEM)) {
99 dev_info(&dev->dev, "BAR has HPET at %08lx-%08lx\n",
100 base, base + size - 1);
101 return 1;
102 }
103#endif
104
105#ifdef CONFIG_X86_IO_APIC
106 for (i = 0; i < nr_ioapics; i++) {
107 unsigned long ioapic_phys = mp_ioapics[i].mp_apicaddr;
108
109 if (base == ioapic_phys && (res->flags & IORESOURCE_MEM)) {
110 dev_info(&dev->dev, "BAR has ioapic at %08lx-%08lx\n",
111 base, base + size - 1);
112 return 1;
113 }
114 }
115#endif
116
117#ifdef CONFIG_PCI_MMCONFIG
118 for (i = 0; i < pci_mmcfg_config_num; i++) {
119 unsigned long addr;
120
121 addr = pci_mmcfg_config[i].address;
122 if (base == addr && (res->flags & IORESOURCE_MEM)) {
123 dev_info(&dev->dev, "BAR has MMCONFIG at %08lx-%08lx\n",
124 base, base + size - 1);
125 return 1;
126 }
127 }
128#endif
129
130 return 0;
131}
132
133static int check_platform(struct pci_dev *dev, struct resource *res)
134{
135 struct resource *root = NULL;
136
137 /*
138 * forcibly insert it into the
139 * resource tree
140 */
141 if (res->flags & IORESOURCE_MEM)
142 root = &iomem_resource;
143 else if (res->flags & IORESOURCE_IO)
144 root = &ioport_resource;
145
146 if (root && check_res_with_valid(dev, res)) {
147 insert_resource(root, res);
148
149 return 1;
150 }
151
152 return 0;
153}
154/* 80/*
155 * Handle resources of PCI devices. If the world were perfect, we could 81 * Handle resources of PCI devices. If the world were perfect, we could
156 * just allocate all the resource regions and do nothing more. It isn't. 82 * just allocate all the resource regions and do nothing more. It isn't.
@@ -202,10 +128,7 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
202 pr = pci_find_parent_resource(dev, r); 128 pr = pci_find_parent_resource(dev, r);
203 if (!r->start || !pr || 129 if (!r->start || !pr ||
204 request_resource(pr, r) < 0) { 130 request_resource(pr, r) < 0) {
205 if (check_platform(dev, r)) 131 dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx);
206 continue;
207 dev_err(&dev->dev, "BAR %d: can't "
208 "allocate resource\n", idx);
209 /* 132 /*
210 * Something is wrong with the region. 133 * Something is wrong with the region.
211 * Invalidate the resource to prevent 134 * Invalidate the resource to prevent
@@ -240,17 +163,13 @@ static void __init pcibios_allocate_resources(int pass)
240 else 163 else
241 disabled = !(command & PCI_COMMAND_MEMORY); 164 disabled = !(command & PCI_COMMAND_MEMORY);
242 if (pass == disabled) { 165 if (pass == disabled) {
243 dev_dbg(&dev->dev, "resource %#08llx-%#08llx " 166 dev_dbg(&dev->dev, "resource %#08llx-%#08llx (f=%lx, d=%d, p=%d)\n",
244 "(f=%lx, d=%d, p=%d)\n",
245 (unsigned long long) r->start, 167 (unsigned long long) r->start,
246 (unsigned long long) r->end, 168 (unsigned long long) r->end,
247 r->flags, disabled, pass); 169 r->flags, disabled, pass);
248 pr = pci_find_parent_resource(dev, r); 170 pr = pci_find_parent_resource(dev, r);
249 if (!pr || request_resource(pr, r) < 0) { 171 if (!pr || request_resource(pr, r) < 0) {
250 if (check_platform(dev, r)) 172 dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx);
251 continue;
252 dev_err(&dev->dev, "BAR %d: can't "
253 "allocate resource\n", idx);
254 /* We'll assign a new address later */ 173 /* We'll assign a new address later */
255 r->end -= r->start; 174 r->end -= r->start;
256 r->start = 0; 175 r->start = 0;
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 9ff6e3cbf08f..a4e201b47f64 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1324,7 +1324,7 @@ static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1324 .ptep_modify_prot_commit = __ptep_modify_prot_commit, 1324 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1325 1325
1326 .pte_val = xen_pte_val, 1326 .pte_val = xen_pte_val,
1327 .pte_flags = native_pte_val, 1327 .pte_flags = native_pte_flags,
1328 .pgd_val = xen_pgd_val, 1328 .pgd_val = xen_pgd_val,
1329 1329
1330 .make_pte = xen_make_pte, 1330 .make_pte = xen_make_pte,
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-07 22:00:36 -0500