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-rw-r--r--arch/sh/Makefile1
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/irq.c4
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c73
-rw-r--r--arch/sh/cchips/voyagergx/Makefile9
-rw-r--r--arch/sh/cchips/voyagergx/consistent.c121
-rw-r--r--arch/sh/cchips/voyagergx/irq.c101
-rw-r--r--arch/sh/cchips/voyagergx/setup.c37
7 files changed, 39 insertions, 307 deletions
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 292d8618248d..e04b19293652 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -138,7 +138,6 @@ endif
138 138
139# Companion chips 139# Companion chips
140core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/ 140core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
141core-$(CONFIG_MFD_SM501) += arch/sh/cchips/voyagergx/
142 141
143cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2 142cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2
144cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a 143cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index 3fecd49e0d2a..8e49f6e51247 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -13,7 +13,6 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/voyagergx.h>
17#include <asm/rts7751r2d.h> 16#include <asm/rts7751r2d.h>
18 17
19#define R2D_NR_IRL 13 18#define R2D_NR_IRL 13
@@ -153,7 +152,4 @@ void __init init_rts7751r2d_IRQ(void)
153 } 152 }
154 153
155 register_intc_controller(d); 154 register_intc_controller(d);
156#ifdef CONFIG_MFD_SM501
157 setup_voyagergx_irq();
158#endif
159} 155}
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index dc143c10cd18..8cb496617073 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -13,36 +13,13 @@
13#include <linux/pata_platform.h> 13#include <linux/pata_platform.h>
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/sm501.h> 15#include <linux/sm501.h>
16#include <linux/sm501-regs.h>
16#include <linux/pm.h> 17#include <linux/pm.h>
17#include <linux/fb.h> 18#include <linux/fb.h>
18#include <asm/machvec.h> 19#include <asm/machvec.h>
19#include <asm/rts7751r2d.h> 20#include <asm/rts7751r2d.h>
20#include <asm/voyagergx.h>
21#include <asm/io.h> 21#include <asm/io.h>
22 22
23static void __init voyagergx_serial_init(void)
24{
25 unsigned long val;
26
27 /*
28 * GPIO Control
29 */
30 val = readl((void __iomem *)GPIO_MUX_HIGH);
31 val |= 0x00001fe0;
32 writel(val, (void __iomem *)GPIO_MUX_HIGH);
33
34 /*
35 * Power Mode Gate
36 */
37 val = readl((void __iomem *)POWER_MODE0_GATE);
38 val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
39 writel(val, (void __iomem *)POWER_MODE0_GATE);
40
41 val = readl((void __iomem *)POWER_MODE1_GATE);
42 val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
43 writel(val, (void __iomem *)POWER_MODE1_GATE);
44}
45
46static struct resource cf_ide_resources[] = { 23static struct resource cf_ide_resources[] = {
47 [0] = { 24 [0] = {
48 .start = PA_AREA5_IO + 0x1000, 25 .start = PA_AREA5_IO + 0x1000,
@@ -94,11 +71,11 @@ static struct platform_device heartbeat_device = {
94#ifdef CONFIG_MFD_SM501 71#ifdef CONFIG_MFD_SM501
95static struct plat_serial8250_port uart_platform_data[] = { 72static struct plat_serial8250_port uart_platform_data[] = {
96 { 73 {
97 .membase = (void __iomem *)VOYAGER_UART_BASE, 74 .membase = (void __iomem *)0xb3e30000,
98 .mapbase = VOYAGER_UART_BASE, 75 .mapbase = 0xb3e30000,
99 .iotype = UPIO_MEM, 76 .iotype = UPIO_MEM,
100 .irq = IRQ_SM501_U0, 77 .irq = IRQ_VOYAGER,
101 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 78 .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
102 .regshift = 2, 79 .regshift = 2,
103 .uartclk = (9600 * 16), 80 .uartclk = (9600 * 16),
104 }, 81 },
@@ -125,7 +102,7 @@ static struct resource sm501_resources[] = {
125 .flags = IORESOURCE_MEM, 102 .flags = IORESOURCE_MEM,
126 }, 103 },
127 [2] = { 104 [2] = {
128 .start = IRQ_SM501_CV, 105 .start = IRQ_VOYAGER,
129 .flags = IORESOURCE_IRQ, 106 .flags = IORESOURCE_IRQ,
130 }, 107 },
131}; 108};
@@ -167,7 +144,15 @@ static struct sm501_platdata_fb sm501_fb_pdata = {
167 .flags = SM501_FBPD_SWAP_FB_ENDIAN, 144 .flags = SM501_FBPD_SWAP_FB_ENDIAN,
168}; 145};
169 146
147static struct sm501_initdata sm501_initdata = {
148 .gpio_high = {
149 .set = 0x00001fe0,
150 .mask = 0x0,
151 },
152};
153
170static struct sm501_platdata sm501_platform_data = { 154static struct sm501_platdata sm501_platform_data = {
155 .init = &sm501_initdata,
171 .fb = &sm501_fb_pdata, 156 .fb = &sm501_fb_pdata,
172}; 157};
173 158
@@ -237,6 +222,7 @@ u8 rts7751r2d_readb(void __iomem *addr)
237 */ 222 */
238static void __init rts7751r2d_setup(char **cmdline_p) 223static void __init rts7751r2d_setup(char **cmdline_p)
239{ 224{
225 void __iomem *sm501_reg;
240 u16 ver = ctrl_inw(PA_VERREG); 226 u16 ver = ctrl_inw(PA_VERREG);
241 227
242 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 228 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
@@ -247,7 +233,30 @@ static void __init rts7751r2d_setup(char **cmdline_p)
247 ctrl_outw(0x0000, PA_OUTPORT); 233 ctrl_outw(0x0000, PA_OUTPORT);
248 pm_power_off = rts7751r2d_power_off; 234 pm_power_off = rts7751r2d_power_off;
249 235
250 voyagergx_serial_init(); 236 /* sm501 dram configuration:
237 * ColSizeX = 11 - External Memory Column Size: 256 words.
238 * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
239 * RstX = 1 - External Memory Reset: Normal.
240 * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
241 * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
242 * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
243 * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
244 * Rst = 1 - Internal Memory Reset: Normal.
245 * RA = 1 - Internal Memory Remain in Active State: Do not remain.
246 */
247
248 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
249 writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
250
251 /*
252 * Power Mode Gate - Enable UART0
253 */
254
255 sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_0_GATE;
256 writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
257
258 sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_1_GATE;
259 writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
251} 260}
252 261
253/* 262/*
@@ -260,8 +269,4 @@ static struct sh_machine_vector mv_rts7751r2d __initmv = {
260 .mv_irq_demux = rts7751r2d_irq_demux, 269 .mv_irq_demux = rts7751r2d_irq_demux,
261 .mv_writeb = rts7751r2d_writeb, 270 .mv_writeb = rts7751r2d_writeb,
262 .mv_readb = rts7751r2d_readb, 271 .mv_readb = rts7751r2d_readb,
263#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD)
264 .mv_consistent_alloc = voyagergx_consistent_alloc,
265 .mv_consistent_free = voyagergx_consistent_free,
266#endif
267}; 272};
diff --git a/arch/sh/cchips/voyagergx/Makefile b/arch/sh/cchips/voyagergx/Makefile
deleted file mode 100644
index f73963cb3744..000000000000
--- a/arch/sh/cchips/voyagergx/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# Makefile for VoyagerGX
3#
4
5obj-y := irq.o setup.o
6
7obj-$(CONFIG_USB_OHCI_HCD) += consistent.o
8
9EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/cchips/voyagergx/consistent.c b/arch/sh/cchips/voyagergx/consistent.c
deleted file mode 100644
index 07e8b9c5a531..000000000000
--- a/arch/sh/cchips/voyagergx/consistent.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * arch/sh/cchips/voyagergx/consistent.c
3 *
4 * Copyright (C) 2004 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/mm.h>
11#include <linux/dma-mapping.h>
12#include <linux/slab.h>
13#include <linux/list.h>
14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <asm/io.h>
18
19
20struct voya_alloc_entry {
21 struct list_head list;
22 unsigned long ofs;
23 unsigned long len;
24};
25
26static DEFINE_SPINLOCK(voya_list_lock);
27static LIST_HEAD(voya_alloc_list);
28
29#define OHCI_SRAM_START 0xb0000000
30#define OHCI_HCCA_SIZE 0x100
31#define OHCI_SRAM_SIZE 0x10000
32
33#define VOYAGER_OHCI_NAME "voyager-ohci"
34
35void *voyagergx_consistent_alloc(struct device *dev, size_t size,
36 dma_addr_t *handle, gfp_t flag)
37{
38 struct list_head *list = &voya_alloc_list;
39 struct voya_alloc_entry *entry;
40 unsigned long start, end;
41 unsigned long flags;
42
43 /*
44 * The SM501 contains an integrated 8051 with its own SRAM.
45 * Devices within the cchip can all hook into the 8051 SRAM.
46 * We presently use this for the OHCI.
47 *
48 * Everything else goes through consistent_alloc().
49 */
50 if (!dev || strcmp(dev->driver->name, VOYAGER_OHCI_NAME))
51 return NULL;
52
53 start = OHCI_SRAM_START + OHCI_HCCA_SIZE;
54
55 entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC);
56 if (!entry)
57 return ERR_PTR(-ENOMEM);
58
59 entry->len = (size + 15) & ~15;
60
61 /*
62 * The basis for this allocator is dwmw2's malloc.. the
63 * Matrox allocator :-)
64 */
65 spin_lock_irqsave(&voya_list_lock, flags);
66 list_for_each(list, &voya_alloc_list) {
67 struct voya_alloc_entry *p;
68
69 p = list_entry(list, struct voya_alloc_entry, list);
70
71 if (p->ofs - start >= size)
72 goto out;
73
74 start = p->ofs + p->len;
75 }
76
77 end = start + (OHCI_SRAM_SIZE - OHCI_HCCA_SIZE);
78 list = &voya_alloc_list;
79
80 if (end - start >= size) {
81out:
82 entry->ofs = start;
83 list_add_tail(&entry->list, list);
84 spin_unlock_irqrestore(&voya_list_lock, flags);
85
86 *handle = start;
87 return (void *)start;
88 }
89
90 kfree(entry);
91 spin_unlock_irqrestore(&voya_list_lock, flags);
92
93 return ERR_PTR(-EINVAL);
94}
95
96int voyagergx_consistent_free(struct device *dev, size_t size,
97 void *vaddr, dma_addr_t handle)
98{
99 struct voya_alloc_entry *entry;
100 unsigned long flags;
101
102 if (!dev || strcmp(dev->driver->name, VOYAGER_OHCI_NAME))
103 return -EINVAL;
104
105 spin_lock_irqsave(&voya_list_lock, flags);
106 list_for_each_entry(entry, &voya_alloc_list, list) {
107 if (entry->ofs != handle)
108 continue;
109
110 list_del(&entry->list);
111 kfree(entry);
112
113 break;
114 }
115 spin_unlock_irqrestore(&voya_list_lock, flags);
116
117 return 0;
118}
119
120EXPORT_SYMBOL(voyagergx_consistent_alloc);
121EXPORT_SYMBOL(voyagergx_consistent_free);
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
deleted file mode 100644
index e7e78c612fad..000000000000
--- a/arch/sh/cchips/voyagergx/irq.c
+++ /dev/null
@@ -1,101 +0,0 @@
1/* -------------------------------------------------------------------- */
2/* setup_voyagergx.c: */
3/* -------------------------------------------------------------------- */
4/* This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17
18 Copyright 2003 (c) Lineo uSolutions,Inc.
19*/
20#include <linux/interrupt.h>
21#include <linux/init.h>
22#include <linux/io.h>
23#include <asm/voyagergx.h>
24#include <asm/rts7751r2d.h>
25
26enum {
27 UNUSED = 0,
28
29 /* voyager specific interrupt sources */
30 UP, G54, G53, G52, G51, G50, G49, G48,
31 I2C, PW, DMA, PCI, I2S, AC, US,
32 U1, U0, CV, MC, S1, S0,
33 UH, TWOD, ZD, PV, CI,
34};
35
36static struct intc_vect vectors[] __initdata = {
37 INTC_IRQ(UP, IRQ_SM501_UP), INTC_IRQ(G54, IRQ_SM501_G54),
38 INTC_IRQ(G53, IRQ_SM501_G53), INTC_IRQ(G52, IRQ_SM501_G52),
39 INTC_IRQ(G51, IRQ_SM501_G51), INTC_IRQ(G50, IRQ_SM501_G50),
40 INTC_IRQ(G49, IRQ_SM501_G49), INTC_IRQ(G48, IRQ_SM501_G48),
41 INTC_IRQ(I2C, IRQ_SM501_I2C), INTC_IRQ(PW, IRQ_SM501_PW),
42 INTC_IRQ(DMA, IRQ_SM501_DMA), INTC_IRQ(PCI, IRQ_SM501_PCI),
43 INTC_IRQ(I2S, IRQ_SM501_I2S), INTC_IRQ(AC, IRQ_SM501_AC),
44 INTC_IRQ(US, IRQ_SM501_US), INTC_IRQ(U1, IRQ_SM501_U1),
45 INTC_IRQ(U0, IRQ_SM501_U0), INTC_IRQ(CV, IRQ_SM501_CV),
46 INTC_IRQ(MC, IRQ_SM501_MC), INTC_IRQ(S1, IRQ_SM501_S1),
47 INTC_IRQ(S0, IRQ_SM501_S0), INTC_IRQ(UH, IRQ_SM501_UH),
48 INTC_IRQ(TWOD, IRQ_SM501_2D), INTC_IRQ(ZD, IRQ_SM501_ZD),
49 INTC_IRQ(PV, IRQ_SM501_PV), INTC_IRQ(CI, IRQ_SM501_CI),
50};
51
52static struct intc_mask_reg mask_registers[] __initdata = {
53 { VOYAGER_INT_MASK, 0, 32, /* "Interrupt Mask", MMIO_base + 0x30 */
54 { UP, G54, G53, G52, G51, G50, G49, G48,
55 I2C, PW, 0, DMA, PCI, I2S, AC, US,
56 0, 0, U1, U0, CV, MC, S1, S0,
57 0, UH, 0, 0, TWOD, ZD, PV, CI } },
58};
59
60static DECLARE_INTC_DESC(intc_desc, "voyagergx", vectors,
61 NULL, mask_registers, NULL, NULL);
62
63static unsigned int voyagergx_stat2irq[32] = {
64 IRQ_SM501_CI, IRQ_SM501_PV, IRQ_SM501_ZD, IRQ_SM501_2D,
65 0, 0, IRQ_SM501_UH, 0,
66 IRQ_SM501_S0, IRQ_SM501_S1, IRQ_SM501_MC, IRQ_SM501_CV,
67 IRQ_SM501_U0, IRQ_SM501_U1, 0, 0,
68 IRQ_SM501_US, IRQ_SM501_AC, IRQ_SM501_I2S, IRQ_SM501_PCI,
69 IRQ_SM501_DMA, 0, IRQ_SM501_PW, IRQ_SM501_I2C,
70 IRQ_SM501_G48, IRQ_SM501_G49, IRQ_SM501_G50, IRQ_SM501_G51,
71 IRQ_SM501_G52, IRQ_SM501_G53, IRQ_SM501_G54, IRQ_SM501_UP
72};
73
74static void voyagergx_irq_demux(unsigned int irq, struct irq_desc *desc)
75{
76 unsigned long intv = ctrl_inl(INT_STATUS);
77 struct irq_desc *ext_desc;
78 unsigned int ext_irq;
79 unsigned int k = 0;
80
81 while (intv) {
82 ext_irq = voyagergx_stat2irq[k];
83 if (ext_irq && (intv & 1)) {
84 ext_desc = irq_desc + ext_irq;
85 handle_level_irq(ext_irq, ext_desc);
86 }
87 intv >>= 1;
88 k++;
89 }
90}
91
92void __init setup_voyagergx_irq(void)
93{
94 printk(KERN_INFO "VoyagerGX on irq %d (mapped into %d to %d)\n",
95 IRQ_VOYAGER,
96 VOYAGER_IRQ_BASE,
97 VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1);
98
99 register_intc_controller(&intc_desc);
100 set_irq_chained_handler(IRQ_VOYAGER, voyagergx_irq_demux);
101}
diff --git a/arch/sh/cchips/voyagergx/setup.c b/arch/sh/cchips/voyagergx/setup.c
deleted file mode 100644
index 33f03027c193..000000000000
--- a/arch/sh/cchips/voyagergx/setup.c
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * arch/sh/cchips/voyagergx/setup.c
3 *
4 * Setup routines for VoyagerGX cchip.
5 *
6 * Copyright (C) 2003 Lineo uSolutions, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/init.h>
14#include <linux/module.h>
15#include <asm/io.h>
16#include <asm/voyagergx.h>
17
18static int __init setup_voyagergx(void)
19{
20 unsigned long val;
21
22 val = readl((void __iomem *)DRAM_CTRL);
23 val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 |
24 DRAM_CTRL_CPU_ACTIVE_PRECHARGE |
25 DRAM_CTRL_CPU_RESET |
26 DRAM_CTRL_REFRESH_COMMAND |
27 DRAM_CTRL_BLOCK_WRITE_TIME |
28 DRAM_CTRL_BLOCK_WRITE_PRECHARGE |
29 DRAM_CTRL_ACTIVE_PRECHARGE |
30 DRAM_CTRL_RESET |
31 DRAM_CTRL_REMAIN_ACTIVE);
32 writel(val, (void __iomem *)DRAM_CTRL);
33
34 return 0;
35}
36
37module_init(setup_voyagergx);