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-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c4
-rw-r--r--arch/arm/mach-at91/at91sam9rl_devices.c21
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-ns9xxx/irq.c22
-rw-r--r--arch/arm/mach-orion5x/addr-map.c66
-rw-r--r--arch/arm/mach-orion5x/common.c11
-rw-r--r--arch/arm/mach-orion5x/common.h1
-rw-r--r--arch/arm/mach-pxa/Makefile12
-rw-r--r--arch/arm/mach-pxa/corgi.c4
-rw-r--r--arch/arm/mach-pxa/cpu-pxa.c310
-rw-r--r--arch/arm/mach-pxa/lubbock.c2
-rw-r--r--arch/arm/mach-pxa/pm.c10
-rw-r--r--arch/arm/mach-pxa/poodle.c2
-rw-r--r--arch/arm/mach-pxa/pxa25x.c11
-rw-r--r--arch/arm/mach-pxa/pxa27x.c11
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c7
-rw-r--r--arch/arm/mach-pxa/spitz.c2
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c3
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mach-sa1100/pm.c8
-rw-r--r--arch/arm/plat-s3c24xx/clock.c4
-rw-r--r--arch/blackfin/Kconfig18
-rw-r--r--arch/blackfin/kernel/asm-offsets.c3
-rw-r--r--arch/blackfin/kernel/fixed_code.S2
-rw-r--r--arch/blackfin/kernel/module.c37
-rw-r--r--arch/blackfin/kernel/process.c2
-rw-r--r--arch/blackfin/kernel/ptrace.c4
-rw-r--r--arch/blackfin/kernel/signal.c13
-rw-r--r--arch/blackfin/kernel/time-ts.c10
-rw-r--r--arch/blackfin/mach-bf527/boards/ezkit.c104
-rw-r--r--arch/blackfin/mach-bf533/boards/cm_bf533.c33
-rw-r--r--arch/blackfin/mach-bf533/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-bf533/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c33
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c31
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c34
-rw-r--r--arch/blackfin/mach-bf548/boards/ezkit.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/cm_bf561.c32
-rw-r--r--arch/blackfin/mach-bf561/boards/ezkit.c31
-rw-r--r--arch/blackfin/mach-common/Makefile5
-rw-r--r--arch/blackfin/mach-common/cpufreq.c26
-rw-r--r--arch/blackfin/mach-common/dpmc.c137
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S (renamed from arch/blackfin/mach-common/dpmc.S)27
-rw-r--r--arch/blackfin/mach-common/entry.S113
-rw-r--r--arch/cris/kernel/sys_cris.c19
-rw-r--r--arch/m32r/kernel/sys_m32r.c20
-rw-r--r--arch/m68k/kernel/traps.c17
-rw-r--r--arch/m68k/mac/config.c24
-rw-r--r--arch/m68knommu/Kconfig3
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S10
-rw-r--r--arch/mips/au1000/common/Makefile7
-rw-r--r--arch/mips/au1000/common/au1xxx_irqmap.c145
-rw-r--r--arch/mips/au1000/common/clocks.c24
-rw-r--r--arch/mips/au1000/common/cputable.c5
-rw-r--r--arch/mips/au1000/common/dbdma.c389
-rw-r--r--arch/mips/au1000/common/dbg_io.c32
-rw-r--r--arch/mips/au1000/common/dma.c56
-rw-r--r--arch/mips/au1000/common/gpio.c6
-rw-r--r--arch/mips/au1000/common/irq.c6
-rw-r--r--arch/mips/au1000/common/pci.c11
-rw-r--r--arch/mips/au1000/common/platform.c11
-rw-r--r--arch/mips/au1000/common/power.c157
-rw-r--r--arch/mips/au1000/common/prom.c21
-rw-r--r--arch/mips/au1000/common/puts.c35
-rw-r--r--arch/mips/au1000/common/reset.c33
-rw-r--r--arch/mips/au1000/common/setup.c60
-rw-r--r--arch/mips/au1000/common/time.c78
-rw-r--r--arch/mips/au1000/db1x00/Makefile8
-rw-r--r--arch/mips/au1000/db1x00/board_setup.c61
-rw-r--r--arch/mips/au1000/db1x00/init.c11
-rw-r--r--arch/mips/au1000/db1x00/irqmap.c22
-rw-r--r--arch/mips/au1000/mtx-1/Makefile3
-rw-r--r--arch/mips/au1000/mtx-1/board_setup.c63
-rw-r--r--arch/mips/au1000/mtx-1/init.c11
-rw-r--r--arch/mips/au1000/mtx-1/irqmap.c18
-rw-r--r--arch/mips/au1000/mtx-1/platform.c3
-rw-r--r--arch/mips/au1000/pb1000/Makefile8
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c117
-rw-r--r--arch/mips/au1000/pb1000/init.c20
-rw-r--r--arch/mips/au1000/pb1100/Makefile6
-rw-r--r--arch/mips/au1000/pb1100/board_setup.c50
-rw-r--r--arch/mips/au1000/pb1100/init.c11
-rw-r--r--arch/mips/au1000/pb1100/irqmap.c10
-rw-r--r--arch/mips/au1000/pb1200/Makefile2
-rw-r--r--arch/mips/au1000/pb1200/board_setup.c139
-rw-r--r--arch/mips/au1000/pb1200/init.c18
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c66
-rw-r--r--arch/mips/au1000/pb1500/Makefile6
-rw-r--r--arch/mips/au1000/pb1500/board_setup.c46
-rw-r--r--arch/mips/au1000/pb1500/init.c20
-rw-r--r--arch/mips/au1000/pb1500/irqmap.c6
-rw-r--r--arch/mips/au1000/pb1550/Makefile7
-rw-r--r--arch/mips/au1000/pb1550/board_setup.c16
-rw-r--r--arch/mips/au1000/pb1550/init.c20
-rw-r--r--arch/mips/au1000/pb1550/irqmap.c6
-rw-r--r--arch/mips/au1000/xxs1500/Makefile3
-rw-r--r--arch/mips/au1000/xxs1500/board_setup.c39
-rw-r--r--arch/mips/au1000/xxs1500/init.c11
-rw-r--r--arch/mips/au1000/xxs1500/irqmap.c2
-rw-r--r--arch/mips/emma2rh/markeins/setup.c7
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/kernel/cpu-bugs64.c2
-rw-r--r--arch/mips/kernel/irixelf.c11
-rw-r--r--arch/mips/kernel/kspd.c5
-rw-r--r--arch/mips/kernel/rtlx.c65
-rw-r--r--arch/mips/kernel/setup.c1
-rw-r--r--arch/mips/kernel/smp.c4
-rw-r--r--arch/mips/kernel/vpe.c29
-rw-r--r--arch/mips/mm/highmem.c1
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c6
-rw-r--r--arch/mips/pci/fixup-au1000.c7
-rw-r--r--arch/mips/pci/ops-au1000.c115
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c5
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c4
-rw-r--r--arch/mn10300/Kconfig11
-rw-r--r--arch/mn10300/boot/install.sh16
-rw-r--r--arch/parisc/mm/init.c2
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts9
-rw-r--r--arch/powerpc/kernel/Makefile6
-rw-r--r--arch/powerpc/kernel/btext.c1
-rw-r--r--arch/powerpc/kernel/cputable.c53
-rw-r--r--arch/powerpc/kernel/head_44x.S9
-rw-r--r--arch/powerpc/kernel/head_64.S4
-rw-r--r--arch/powerpc/kernel/isa-bridge.c3
-rw-r--r--arch/powerpc/kernel/setup_64.c10
-rw-r--r--arch/powerpc/lib/Makefile1
-rw-r--r--arch/powerpc/lib/devres.c42
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c53
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c31
-rw-r--r--arch/powerpc/platforms/cell/spu_priv1_mmio.c16
-rw-r--r--arch/powerpc/platforms/cell/spufs/fault.c17
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c10
-rw-r--r--arch/powerpc/platforms/cell/spufs/run.c38
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c7
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h3
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c71
-rw-r--r--arch/powerpc/platforms/chrp/pegasos_eth.c4
-rw-r--r--arch/powerpc/platforms/pseries/scanlog.c19
-rw-r--r--arch/powerpc/sysdev/mv64x60_dev.c2
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c180
-rw-r--r--arch/powerpc/xmon/xmon.c6
-rw-r--r--arch/ppc/Makefile2
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c1
-rw-r--r--arch/ppc/kernel/setup.c1
-rw-r--r--arch/ppc/platforms/residual.c1
-rw-r--r--arch/ppc/syslib/mv64x60.c3
-rw-r--r--arch/s390/Kconfig7
-rw-r--r--arch/s390/kernel/compat_wrapper.S2
-rw-r--r--arch/s390/kernel/entry.S29
-rw-r--r--arch/s390/kernel/entry64.S57
-rw-r--r--arch/s390/kernel/ptrace.c100
-rw-r--r--arch/s390/kvm/Kconfig1
-rw-r--r--arch/s390/kvm/intercept.c3
-rw-r--r--arch/s390/kvm/kvm-s390.c5
-rw-r--r--arch/s390/mm/Makefile1
-rw-r--r--arch/s390/mm/init.c3
-rw-r--r--arch/s390/mm/page-states.c79
-rw-r--r--arch/sh/Kconfig17
-rw-r--r--arch/sh/Kconfig.debug1
-rw-r--r--arch/sh/Makefile1
-rw-r--r--arch/sh/boards/mpc1211/Makefile8
-rw-r--r--arch/sh/boards/mpc1211/pci.c295
-rw-r--r--arch/sh/boards/mpc1211/rtc.c136
-rw-r--r--arch/sh/boards/mpc1211/setup.c347
-rw-r--r--arch/sh/boards/renesas/migor/setup.c11
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780rp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7785rp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c24
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c7
-rw-r--r--arch/sh/boards/se/7206/setup.c17
-rw-r--r--arch/sh/boards/se/7722/setup.c6
-rw-r--r--arch/sh/boot/compressed/Makefile_321
-rw-r--r--arch/sh/boot/compressed/Makefile_641
-rw-r--r--arch/sh/kernel/cpu/irq/intc-sh5.c73
-rw-r--r--arch/sh/kernel/cpu/irq/intc.c93
-rw-r--r--arch/sh/kernel/cpu/sh2a/fpu.c4
-rw-r--r--arch/sh/kernel/cpu/sh3/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh3.c71
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c22
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c32
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c25
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c35
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S28
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c4
-rw-r--r--arch/sh/kernel/early_printk.c30
-rw-r--r--arch/sh/kernel/kgdb_stub.c8
-rw-r--r--arch/sh/kernel/setup.c46
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c2
-rw-r--r--arch/sh/kernel/sh_ksyms_64.c26
-rw-r--r--arch/sh/kernel/time_64.c5
-rw-r--r--arch/sh/lib64/dbg.c2
-rw-r--r--arch/sh/mm/Makefile_647
-rw-r--r--arch/sh/mm/cache-sh5.c2
-rw-r--r--arch/sh/mm/ioremap_64.c2
-rw-r--r--arch/sh/mm/numa.c2
-rw-r--r--arch/sh/tools/mach-types1
-rw-r--r--arch/sparc/kernel/entry.S2
-rw-r--r--arch/sparc/kernel/process.c25
-rw-r--r--arch/sparc/kernel/ptrace.c6
-rw-r--r--arch/sparc/kernel/rtrap.S11
-rw-r--r--arch/sparc/kernel/signal.c84
-rw-r--r--arch/sparc/kernel/sys_sparc.c51
-rw-r--r--arch/sparc64/kernel/etrap.S7
-rw-r--r--arch/sparc64/kernel/process.c18
-rw-r--r--arch/sparc64/kernel/ptrace.c16
-rw-r--r--arch/sparc64/kernel/rtrap.S7
-rw-r--r--arch/sparc64/kernel/signal.c102
-rw-r--r--arch/sparc64/kernel/signal32.c57
-rw-r--r--arch/sparc64/kernel/smp.c27
-rw-r--r--arch/sparc64/kernel/sys_sparc.c40
-rw-r--r--arch/sparc64/kernel/sys_sparc32.c64
-rw-r--r--arch/sparc64/kernel/systbls.S2
-rw-r--r--arch/sparc64/mm/init.c32
-rw-r--r--arch/um/Kconfig.char6
-rw-r--r--arch/um/Makefile5
-rw-r--r--arch/um/drivers/chan_user.c1
-rw-r--r--arch/um/drivers/cow_sys.h2
-rw-r--r--arch/um/drivers/daemon_user.c4
-rw-r--r--arch/um/drivers/fd.c2
-rw-r--r--arch/um/drivers/hostaudio_kern.c2
-rw-r--r--arch/um/drivers/line.c4
-rw-r--r--arch/um/drivers/mcast_user.c3
-rw-r--r--arch/um/drivers/net_user.c2
-rw-r--r--arch/um/drivers/port_user.c2
-rw-r--r--arch/um/drivers/pty.c2
-rw-r--r--arch/um/drivers/random.c122
-rw-r--r--arch/um/drivers/slip_user.c2
-rw-r--r--arch/um/drivers/tty.c2
-rw-r--r--arch/um/drivers/ubd_kern.c4
-rw-r--r--arch/um/drivers/xterm.c2
-rw-r--r--arch/um/include/as-layout.h14
-rw-r--r--arch/um/include/line.h6
-rw-r--r--arch/um/include/os.h1
-rw-r--r--arch/um/include/process.h20
-rw-r--r--arch/um/include/skas_ptrace.h13
-rw-r--r--arch/um/include/sysdep-i386/ptrace_user.h30
-rw-r--r--arch/um/include/sysdep-i386/sigcontext.h2
-rw-r--r--arch/um/include/sysdep-x86_64/ptrace_user.h17
-rw-r--r--arch/um/include/um_malloc.h9
-rw-r--r--arch/um/kernel/dyn.lds.S7
-rw-r--r--arch/um/kernel/mem.c5
-rw-r--r--arch/um/kernel/time.c4
-rw-r--r--arch/um/kernel/um_arch.c7
-rw-r--r--arch/um/kernel/uml.lds.S7
-rw-r--r--arch/um/os-Linux/drivers/ethertap_user.c4
-rw-r--r--arch/um/os-Linux/helper.c4
-rw-r--r--arch/um/os-Linux/main.c2
-rw-r--r--arch/um/os-Linux/sigio.c39
-rw-r--r--arch/um/os-Linux/signal.c1
-rw-r--r--arch/um/os-Linux/skas/process.c2
-rw-r--r--arch/um/os-Linux/start_up.c81
-rw-r--r--arch/um/os-Linux/sys-i386/registers.c5
-rw-r--r--arch/um/os-Linux/time.c54
-rw-r--r--arch/um/sys-i386/ptrace.c30
-rw-r--r--arch/um/sys-i386/user-offsets.c2
-rw-r--r--arch/um/sys-x86_64/user-offsets.c1
-rw-r--r--arch/x86/Kconfig3
-rw-r--r--arch/x86/kernel/Makefile4
-rw-r--r--arch/x86/kernel/acpi/realmode/wakeup.lds.S10
-rw-r--r--arch/x86/kernel/cpu/addon_cpuid_features.c21
-rw-r--r--arch/x86/kernel/cpu/common.c27
-rw-r--r--arch/x86/kernel/geode_32.c19
-rw-r--r--arch/x86/kernel/i387.c12
-rw-r--r--arch/x86/kernel/pci-dma.c8
-rw-r--r--arch/x86/kernel/ptrace.c7
-rw-r--r--arch/x86/kernel/setup.c6
-rw-r--r--arch/x86/kernel/setup_32.c7
-rw-r--r--arch/x86/kernel/setup_64.c15
-rw-r--r--arch/x86/kernel/smp.c3
-rw-r--r--arch/x86/kernel/smpboot.c24
-rw-r--r--arch/x86/kernel/x8664_ksyms_64.c3
-rw-r--r--arch/x86/lib/csum-partial_64.c2
-rw-r--r--arch/x86/mm/init_32.c12
-rw-r--r--arch/x86/mm/pat.c54
-rw-r--r--arch/x86/mm/pgtable_32.c7
-rw-r--r--arch/x86/pci/acpi.c41
-rw-r--r--arch/x86/pci/common.c69
-rw-r--r--arch/x86/pci/fixup.c2
-rw-r--r--arch/x86/pci/i386.c4
-rw-r--r--arch/x86/pci/init.c4
-rw-r--r--arch/x86/pci/k8-bus_64.c8
-rw-r--r--arch/x86/pci/pci.h3
283 files changed, 3744 insertions, 3601 deletions
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 728bb8f39441..0babb645b83c 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -544,10 +544,10 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
544 struct resource *fb_res = &lcdc_resources[2]; 544 struct resource *fb_res = &lcdc_resources[2];
545 size_t fb_len = fb_res->end - fb_res->start + 1; 545 size_t fb_len = fb_res->end - fb_res->start + 1;
546 546
547 fb = ioremap_writecombine(fb_res->start, fb_len); 547 fb = ioremap(fb_res->start, fb_len);
548 if (fb) { 548 if (fb) {
549 memset(fb, 0, fb_len); 549 memset(fb, 0, fb_len);
550 iounmap(fb, fb_len); 550 iounmap(fb);
551 } 551 }
552 } 552 }
553 lcdc_data = *data; 553 lcdc_data = *data;
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 054689804e77..450db304936f 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -332,13 +332,6 @@ static struct resource lcdc_resources[] = {
332 .end = AT91SAM9RL_ID_LCDC, 332 .end = AT91SAM9RL_ID_LCDC,
333 .flags = IORESOURCE_IRQ, 333 .flags = IORESOURCE_IRQ,
334 }, 334 },
335#if defined(CONFIG_FB_INTSRAM)
336 [2] = {
337 .start = AT91SAM9RL_SRAM_BASE,
338 .end = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
339 .flags = IORESOURCE_MEM,
340 },
341#endif
342}; 335};
343 336
344static struct platform_device at91_lcdc_device = { 337static struct platform_device at91_lcdc_device = {
@@ -381,20 +374,6 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
381 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ 374 at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */
382 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ 375 at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */
383 376
384#ifdef CONFIG_FB_INTSRAM
385 {
386 void __iomem *fb;
387 struct resource *fb_res = &lcdc_resources[2];
388 size_t fb_len = fb_res->end - fb_res->start + 1;
389
390 fb = ioremap_writecombine(fb_res->start, fb_len);
391 if (fb) {
392 memset(fb, 0, fb_len);
393 iounmap(fb, fb_len);
394 }
395 }
396#endif
397
398 lcdc_data = *data; 377 lcdc_data = *data;
399 platform_device_register(&at91_lcdc_device); 378 platform_device_register(&at91_lcdc_device);
400} 379}
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 8bc187240542..1d7bca6aa441 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -280,7 +280,7 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
280 const int port = gpio >> 3; 280 const int port = gpio >> 3;
281 const int port_mask = 1 << (gpio & 7); 281 const int port_mask = 1 << (gpio & 7);
282 282
283 gpio_direction_output(gpio, gpio_get_value(gpio)); 283 gpio_direction_input(gpio);
284 284
285 switch (type) { 285 switch (type) {
286 case IRQT_RISING: 286 case IRQT_RISING:
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 36e5835e6097..ca85d24cf39f 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -62,7 +62,7 @@ static struct irq_chip ns9xxx_chip = {
62#if 0 62#if 0
63#define handle_irq handle_level_irq 63#define handle_irq handle_level_irq
64#else 64#else
65void handle_prio_irq(unsigned int irq, struct irq_desc *desc) 65static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
66{ 66{
67 unsigned int cpu = smp_processor_id(); 67 unsigned int cpu = smp_processor_id();
68 struct irqaction *action; 68 struct irqaction *action;
@@ -70,27 +70,35 @@ void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
70 70
71 spin_lock(&desc->lock); 71 spin_lock(&desc->lock);
72 72
73 if (unlikely(desc->status & IRQ_INPROGRESS)) 73 BUG_ON(desc->status & IRQ_INPROGRESS);
74 goto out_unlock;
75 74
76 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); 75 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
77 kstat_cpu(cpu).irqs[irq]++; 76 kstat_cpu(cpu).irqs[irq]++;
78 77
79 action = desc->action; 78 action = desc->action;
80 if (unlikely(!action || (desc->status & IRQ_DISABLED))) 79 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
81 goto out_unlock; 80 goto out_mask;
82 81
83 desc->status |= IRQ_INPROGRESS; 82 desc->status |= IRQ_INPROGRESS;
84 spin_unlock(&desc->lock); 83 spin_unlock(&desc->lock);
85 84
86 action_ret = handle_IRQ_event(irq, action); 85 action_ret = handle_IRQ_event(irq, action);
87 86
87 /* XXX: There is no direct way to access noirqdebug, so check
88 * unconditionally for spurious irqs...
89 * Maybe this function should go to kernel/irq/chip.c? */
90 note_interrupt(irq, desc, action_ret);
91
88 spin_lock(&desc->lock); 92 spin_lock(&desc->lock);
89 desc->status &= ~IRQ_INPROGRESS; 93 desc->status &= ~IRQ_INPROGRESS;
90 if (!(desc->status & IRQ_DISABLED) && desc->chip->ack)
91 desc->chip->ack(irq);
92 94
93out_unlock: 95 if (desc->status & IRQ_DISABLED)
96out_mask:
97 desc->chip->mask(irq);
98
99 /* ack unconditionally to unmask lower prio irqs */
100 desc->chip->ack(irq);
101
94 spin_unlock(&desc->lock); 102 spin_unlock(&desc->lock);
95} 103}
96#define handle_irq handle_prio_irq 104#define handle_irq handle_prio_irq
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 9608503d67f5..e63fb05dc893 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -34,11 +34,7 @@
34 * Non-CPU Masters address decoding -- 34 * Non-CPU Masters address decoding --
35 * Unlike the CPU, we setup the access from Orion's master interfaces to DDR 35 * Unlike the CPU, we setup the access from Orion's master interfaces to DDR
36 * banks only (the typical use case). 36 * banks only (the typical use case).
37 * Setup access for each master to DDR is issued by common.c. 37 * Setup access for each master to DDR is issued by platform device setup.
38 *
39 * Note: although orion_setbits() and orion_clrbits() are not atomic
40 * no locking is necessary here since code in this file is only called
41 * at boot time when there is no concurrency issues.
42 */ 38 */
43 39
44/* 40/*
@@ -48,10 +44,6 @@
48#define TARGET_DEV_BUS 1 44#define TARGET_DEV_BUS 1
49#define TARGET_PCI 3 45#define TARGET_PCI 3
50#define TARGET_PCIE 4 46#define TARGET_PCIE 4
51#define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \
52 ((n) == 1) ? 0xd : \
53 ((n) == 2) ? 0xb : \
54 ((n) == 3) ? 0x7 : 0xf)
55#define ATTR_PCIE_MEM 0x59 47#define ATTR_PCIE_MEM 0x59
56#define ATTR_PCIE_IO 0x51 48#define ATTR_PCIE_IO 0x51
57#define ATTR_PCIE_WA 0x79 49#define ATTR_PCIE_WA 0x79
@@ -61,17 +53,12 @@
61#define ATTR_DEV_CS1 0x1d 53#define ATTR_DEV_CS1 0x1d
62#define ATTR_DEV_CS2 0x1b 54#define ATTR_DEV_CS2 0x1b
63#define ATTR_DEV_BOOT 0xf 55#define ATTR_DEV_BOOT 0xf
64#define WIN_EN 1
65 56
66/* 57/*
67 * Helpers to get DDR bank info 58 * Helpers to get DDR bank info
68 */ 59 */
69#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) * 8)) 60#define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3))
70#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) * 8)) 61#define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3))
71#define DDR_MAX_CS 4
72#define DDR_REG_TO_SIZE(reg) (((reg) | 0xffffff) + 1)
73#define DDR_REG_TO_BASE(reg) ((reg) & 0xff000000)
74#define DDR_BANK_EN 1
75 62
76/* 63/*
77 * CPU Address Decode Windows registers 64 * CPU Address Decode Windows registers
@@ -81,17 +68,6 @@
81#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4)) 68#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
82#define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4)) 69#define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
83 70
84/*
85 * Gigabit Ethernet Address Decode Windows registers
86 */
87#define ETH_WIN_BASE(win) ORION5X_ETH_REG(0x200 + ((win) * 8))
88#define ETH_WIN_SIZE(win) ORION5X_ETH_REG(0x204 + ((win) * 8))
89#define ETH_WIN_REMAP(win) ORION5X_ETH_REG(0x280 + ((win) * 4))
90#define ETH_WIN_EN ORION5X_ETH_REG(0x290)
91#define ETH_WIN_PROT ORION5X_ETH_REG(0x294)
92#define ETH_MAX_WIN 6
93#define ETH_MAX_REMAP_WIN 4
94
95 71
96struct mbus_dram_target_info orion5x_mbus_dram_info; 72struct mbus_dram_target_info orion5x_mbus_dram_info;
97 73
@@ -202,39 +178,3 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
202{ 178{
203 setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1); 179 setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1);
204} 180}
205
206void __init orion5x_setup_eth_wins(void)
207{
208 int i;
209
210 /*
211 * First, disable and clear windows
212 */
213 for (i = 0; i < ETH_MAX_WIN; i++) {
214 orion5x_write(ETH_WIN_BASE(i), 0);
215 orion5x_write(ETH_WIN_SIZE(i), 0);
216 orion5x_setbits(ETH_WIN_EN, 1 << i);
217 orion5x_clrbits(ETH_WIN_PROT, 0x3 << (i * 2));
218 if (i < ETH_MAX_REMAP_WIN)
219 orion5x_write(ETH_WIN_REMAP(i), 0);
220 }
221
222 /*
223 * Setup windows for DDR banks.
224 */
225 for (i = 0; i < DDR_MAX_CS; i++) {
226 u32 base, size;
227 size = orion5x_read(DDR_SIZE_CS(i));
228 base = orion5x_read(DDR_BASE_CS(i));
229 if (size & DDR_BANK_EN) {
230 base = DDR_REG_TO_BASE(base);
231 size = DDR_REG_TO_SIZE(size);
232 orion5x_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000);
233 orion5x_write(ETH_WIN_BASE(i), (base & 0xffff0000) |
234 (ATTR_DDR_CS(i) << 8) |
235 TARGET_DDR);
236 orion5x_clrbits(ETH_WIN_EN, 1 << i);
237 orion5x_setbits(ETH_WIN_PROT, 0x3 << (i * 2));
238 }
239 }
240}
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 968deb58be01..4f13fd037f04 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -190,6 +190,11 @@ static struct platform_device orion5x_ehci1 = {
190 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver) 190 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
191 ****************************************************************************/ 191 ****************************************************************************/
192 192
193struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
194 .dram = &orion5x_mbus_dram_info,
195 .t_clk = ORION5X_TCLK,
196};
197
193static struct resource orion5x_eth_shared_resources[] = { 198static struct resource orion5x_eth_shared_resources[] = {
194 { 199 {
195 .start = ORION5X_ETH_PHYS_BASE + 0x2000, 200 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
@@ -201,6 +206,9 @@ static struct resource orion5x_eth_shared_resources[] = {
201static struct platform_device orion5x_eth_shared = { 206static struct platform_device orion5x_eth_shared = {
202 .name = MV643XX_ETH_SHARED_NAME, 207 .name = MV643XX_ETH_SHARED_NAME,
203 .id = 0, 208 .id = 0,
209 .dev = {
210 .platform_data = &orion5x_eth_shared_data,
211 },
204 .num_resources = 1, 212 .num_resources = 1,
205 .resource = orion5x_eth_shared_resources, 213 .resource = orion5x_eth_shared_resources,
206}; 214};
@@ -223,7 +231,9 @@ static struct platform_device orion5x_eth = {
223 231
224void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) 232void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
225{ 233{
234 eth_data->shared = &orion5x_eth_shared;
226 orion5x_eth.dev.platform_data = eth_data; 235 orion5x_eth.dev.platform_data = eth_data;
236
227 platform_device_register(&orion5x_eth_shared); 237 platform_device_register(&orion5x_eth_shared);
228 platform_device_register(&orion5x_eth); 238 platform_device_register(&orion5x_eth);
229} 239}
@@ -360,7 +370,6 @@ void __init orion5x_init(void)
360 * Setup Orion address map 370 * Setup Orion address map
361 */ 371 */
362 orion5x_setup_cpu_mbus_bridge(); 372 orion5x_setup_cpu_mbus_bridge();
363 orion5x_setup_eth_wins();
364 373
365 /* 374 /*
366 * Register devices. 375 * Register devices.
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 14adf8d1a54a..bd0f05de6e18 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -22,7 +22,6 @@ void orion5x_setup_dev0_win(u32 base, u32 size);
22void orion5x_setup_dev1_win(u32 base, u32 size); 22void orion5x_setup_dev1_win(u32 base, u32 size);
23void orion5x_setup_dev2_win(u32 base, u32 size); 23void orion5x_setup_dev2_win(u32 base, u32 size);
24void orion5x_setup_pcie_wa_win(u32 base, u32 size); 24void orion5x_setup_pcie_wa_win(u32 base, u32 size);
25void orion5x_setup_eth_wins(void);
26 25
27/* 26/*
28 * Shared code used internally by other Orion core functions. 27 * Shared code used internally by other Orion core functions.
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 6a830853aa6a..0e6d05bb81aa 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -5,6 +5,13 @@
5# Common support (must be linked before board specific support) 5# Common support (must be linked before board specific support)
6obj-y += clock.o devices.o generic.o irq.o dma.o \ 6obj-y += clock.o devices.o generic.o irq.o dma.o \
7 time.o gpio.o 7 time.o gpio.o
8obj-$(CONFIG_PM) += pm.o sleep.o standby.o
9obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
10
11# Generic drivers that other drivers may depend upon
12obj-$(CONFIG_PXA_SSP) += ssp.o
13
14# SoC-specific code
8obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa25x.o 15obj-$(CONFIG_PXA25x) += mfp-pxa2xx.o pxa25x.o
9obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa27x.o 16obj-$(CONFIG_PXA27x) += mfp-pxa2xx.o pxa27x.o
10obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o 17obj-$(CONFIG_PXA3xx) += mfp-pxa3xx.o pxa3xx.o smemc.o
@@ -48,11 +55,6 @@ led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
48 55
49obj-$(CONFIG_LEDS) += $(led-y) 56obj-$(CONFIG_LEDS) += $(led-y)
50 57
51# Misc features
52obj-$(CONFIG_PM) += pm.o sleep.o standby.o
53obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
54obj-$(CONFIG_PXA_SSP) += ssp.o
55
56ifeq ($(CONFIG_PCI),y) 58ifeq ($(CONFIG_PCI),y)
57obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o 59obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o
58endif 60endif
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 259ca821e464..b757dd756655 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -493,8 +493,6 @@ static struct platform_device *devices[] __initdata = {
493 493
494static void corgi_poweroff(void) 494static void corgi_poweroff(void)
495{ 495{
496 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
497
498 if (!machine_is_corgi()) 496 if (!machine_is_corgi())
499 /* Green LED off tells the bootloader to halt */ 497 /* Green LED off tells the bootloader to halt */
500 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); 498 reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
@@ -503,8 +501,6 @@ static void corgi_poweroff(void)
503 501
504static void corgi_restart(char mode) 502static void corgi_restart(char mode)
505{ 503{
506 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
507
508 if (!machine_is_corgi()) 504 if (!machine_is_corgi())
509 /* Green LED on tells the bootloader to reboot */ 505 /* Green LED on tells the bootloader to reboot */
510 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN); 506 set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpu-pxa.c
index 4b21479332ae..fb9ba1ab2826 100644
--- a/arch/arm/mach-pxa/cpu-pxa.c
+++ b/arch/arm/mach-pxa/cpu-pxa.c
@@ -49,125 +49,216 @@ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
49#define freq_debug 0 49#define freq_debug 0
50#endif 50#endif
51 51
52static unsigned int pxa27x_maxfreq;
53module_param(pxa27x_maxfreq, uint, 0);
54MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz"
55 "(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)");
56
52typedef struct { 57typedef struct {
53 unsigned int khz; 58 unsigned int khz;
54 unsigned int membus; 59 unsigned int membus;
55 unsigned int cccr; 60 unsigned int cccr;
56 unsigned int div2; 61 unsigned int div2;
62 unsigned int cclkcfg;
57} pxa_freqs_t; 63} pxa_freqs_t;
58 64
59/* Define the refresh period in mSec for the SDRAM and the number of rows */ 65/* Define the refresh period in mSec for the SDRAM and the number of rows */
60#define SDRAM_TREF 64 /* standard 64ms SDRAM */ 66#define SDRAM_TREF 64 /* standard 64ms SDRAM */
61#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */ 67#define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */
62#define MDREFR_DRI(x) (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32))
63
64#define CCLKCFG_TURBO 0x1
65#define CCLKCFG_FCS 0x2
66#define PXA25x_MIN_FREQ 99500
67#define PXA25x_MAX_FREQ 398100
68#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
69#define MDREFR_DRI_MASK 0xFFF
70 68
69#define CCLKCFG_TURBO 0x1
70#define CCLKCFG_FCS 0x2
71#define CCLKCFG_HALFTURBO 0x4
72#define CCLKCFG_FASTBUS 0x8
73#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
74#define MDREFR_DRI_MASK 0xFFF
71 75
76/*
77 * PXA255 definitions
78 */
72/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */ 79/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
80#define CCLKCFG CCLKCFG_TURBO | CCLKCFG_FCS
81
73static pxa_freqs_t pxa255_run_freqs[] = 82static pxa_freqs_t pxa255_run_freqs[] =
74{ 83{
75 /* CPU MEMBUS CCCR DIV2*/ 84 /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */
76 { 99500, 99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */ 85 { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */
77 {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */ 86 {132700, 132700, 0x123, 1, CCLKCFG}, /* 133, 133, 66, 66 */
78 {199100, 99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */ 87 {199100, 99500, 0x141, 0, CCLKCFG}, /* 199, 199, 99, 99 */
79 {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */ 88 {265400, 132700, 0x143, 1, CCLKCFG}, /* 265, 265, 133, 66 */
80 {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */ 89 {331800, 165900, 0x145, 1, CCLKCFG}, /* 331, 331, 166, 83 */
81 {398100, 99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */ 90 {398100, 99500, 0x161, 0, CCLKCFG}, /* 398, 398, 196, 99 */
82 {0,}
83}; 91};
84#define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
85
86static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
87 92
88/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ 93/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
89static pxa_freqs_t pxa255_turbo_freqs[] = 94static pxa_freqs_t pxa255_turbo_freqs[] =
90{ 95{
91 /* CPU MEMBUS CCCR DIV2*/ 96 /* CPU MEMBUS CCCR DIV2 CCLKCFG run turbo PXbus SDRAM */
92 { 99500, 99500, 0x121, 1}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */ 97 { 99500, 99500, 0x121, 1, CCLKCFG}, /* 99, 99, 50, 50 */
93 {199100, 99500, 0x221, 0}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */ 98 {199100, 99500, 0x221, 0, CCLKCFG}, /* 99, 199, 50, 99 */
94 {298500, 99500, 0x321, 0}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */ 99 {298500, 99500, 0x321, 0, CCLKCFG}, /* 99, 287, 50, 99 */
95 {298600, 99500, 0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */ 100 {298600, 99500, 0x1c1, 0, CCLKCFG}, /* 199, 287, 99, 99 */
96 {398100, 99500, 0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */ 101 {398100, 99500, 0x241, 0, CCLKCFG}, /* 199, 398, 99, 99 */
97 {0,} 102};
103
104#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
105#define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
106
107static struct cpufreq_frequency_table
108 pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1];
109static struct cpufreq_frequency_table
110 pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
111
112/*
113 * PXA270 definitions
114 *
115 * For the PXA27x:
116 * Control variables are A, L, 2N for CCCR; B, HT, T for CLKCFG.
117 *
118 * A = 0 => memory controller clock from table 3-7,
119 * A = 1 => memory controller clock = system bus clock
120 * Run mode frequency = 13 MHz * L
121 * Turbo mode frequency = 13 MHz * L * N
122 * System bus frequency = 13 MHz * L / (B + 1)
123 *
124 * In CCCR:
125 * A = 1
126 * L = 16 oscillator to run mode ratio
127 * 2N = 6 2 * (turbo mode to run mode ratio)
128 *
129 * In CCLKCFG:
130 * B = 1 Fast bus mode
131 * HT = 0 Half-Turbo mode
132 * T = 1 Turbo mode
133 *
134 * For now, just support some of the combinations in table 3-7 of
135 * PXA27x Processor Family Developer's Manual to simplify frequency
136 * change sequences.
137 */
138#define PXA27x_CCCR(A, L, N2) (A << 25 | N2 << 7 | L)
139#define CCLKCFG2(B, HT, T) \
140 (CCLKCFG_FCS | \
141 ((B) ? CCLKCFG_FASTBUS : 0) | \
142 ((HT) ? CCLKCFG_HALFTURBO : 0) | \
143 ((T) ? CCLKCFG_TURBO : 0))
144
145static pxa_freqs_t pxa27x_freqs[] = {
146 {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1)},
147 {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1)},
148 {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1)},
149 {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1)},
150 {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1)},
151 {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1)},
152 {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1)}
98}; 153};
99#define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
100 154
101static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1]; 155#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs)
156static struct cpufreq_frequency_table
157 pxa27x_freq_table[NUM_PXA27x_FREQS+1];
102 158
103extern unsigned get_clk_frequency_khz(int info); 159extern unsigned get_clk_frequency_khz(int info);
104 160
161static void find_freq_tables(struct cpufreq_policy *policy,
162 struct cpufreq_frequency_table **freq_table,
163 pxa_freqs_t **pxa_freqs)
164{
165 if (cpu_is_pxa25x()) {
166 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
167 *pxa_freqs = pxa255_run_freqs;
168 *freq_table = pxa255_run_freq_table;
169 } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
170 *pxa_freqs = pxa255_turbo_freqs;
171 *freq_table = pxa255_turbo_freq_table;
172 } else {
173 printk("CPU PXA: Unknown policy found. "
174 "Using CPUFREQ_POLICY_PERFORMANCE\n");
175 *pxa_freqs = pxa255_run_freqs;
176 *freq_table = pxa255_run_freq_table;
177 }
178 }
179 if (cpu_is_pxa27x()) {
180 *pxa_freqs = pxa27x_freqs;
181 *freq_table = pxa27x_freq_table;
182 }
183}
184
185static void pxa27x_guess_max_freq(void)
186{
187 if (!pxa27x_maxfreq) {
188 pxa27x_maxfreq = 416000;
189 printk(KERN_INFO "PXA CPU 27x max frequency not defined "
190 "(pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n",
191 pxa27x_maxfreq);
192 } else {
193 pxa27x_maxfreq *= 1000;
194 }
195}
196
197static u32 mdrefr_dri(unsigned int freq)
198{
199 u32 dri = 0;
200
201 if (cpu_is_pxa25x())
202 dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS * 32));
203 if (cpu_is_pxa27x())
204 dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS - 31)) / 32;
205 return dri;
206}
207
105/* find a valid frequency point */ 208/* find a valid frequency point */
106static int pxa_verify_policy(struct cpufreq_policy *policy) 209static int pxa_verify_policy(struct cpufreq_policy *policy)
107{ 210{
108 struct cpufreq_frequency_table *pxa_freqs_table; 211 struct cpufreq_frequency_table *pxa_freqs_table;
212 pxa_freqs_t *pxa_freqs;
109 int ret; 213 int ret;
110 214
111 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 215 find_freq_tables(policy, &pxa_freqs_table, &pxa_freqs);
112 pxa_freqs_table = pxa255_run_freq_table;
113 } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
114 pxa_freqs_table = pxa255_turbo_freq_table;
115 } else {
116 printk("CPU PXA: Unknown policy found. "
117 "Using CPUFREQ_POLICY_PERFORMANCE\n");
118 pxa_freqs_table = pxa255_run_freq_table;
119 }
120
121 ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table); 216 ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
122 217
123 if (freq_debug) 218 if (freq_debug)
124 pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n", 219 pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n",
125 policy->min, policy->max); 220 policy->min, policy->max);
126 221
127 return ret; 222 return ret;
128} 223}
129 224
225static unsigned int pxa_cpufreq_get(unsigned int cpu)
226{
227 return get_clk_frequency_khz(0);
228}
229
130static int pxa_set_target(struct cpufreq_policy *policy, 230static int pxa_set_target(struct cpufreq_policy *policy,
131 unsigned int target_freq, 231 unsigned int target_freq,
132 unsigned int relation) 232 unsigned int relation)
133{ 233{
134 struct cpufreq_frequency_table *pxa_freqs_table; 234 struct cpufreq_frequency_table *pxa_freqs_table;
135 pxa_freqs_t *pxa_freq_settings; 235 pxa_freqs_t *pxa_freq_settings;
136 struct cpufreq_freqs freqs; 236 struct cpufreq_freqs freqs;
137 unsigned int idx; 237 unsigned int idx;
138 unsigned long flags; 238 unsigned long flags;
139 unsigned int unused, preset_mdrefr, postset_mdrefr; 239 unsigned int new_freq_cpu, new_freq_mem;
140 void *ramstart = phys_to_virt(0xa0000000); 240 unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
141 241
142 /* Get the current policy */ 242 /* Get the current policy */
143 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { 243 find_freq_tables(policy, &pxa_freqs_table, &pxa_freq_settings);
144 pxa_freq_settings = pxa255_run_freqs;
145 pxa_freqs_table = pxa255_run_freq_table;
146 } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
147 pxa_freq_settings = pxa255_turbo_freqs;
148 pxa_freqs_table = pxa255_turbo_freq_table;
149 } else {
150 printk("CPU PXA: Unknown policy found. "
151 "Using CPUFREQ_POLICY_PERFORMANCE\n");
152 pxa_freq_settings = pxa255_run_freqs;
153 pxa_freqs_table = pxa255_run_freq_table;
154 }
155 244
156 /* Lookup the next frequency */ 245 /* Lookup the next frequency */
157 if (cpufreq_frequency_table_target(policy, pxa_freqs_table, 246 if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
158 target_freq, relation, &idx)) { 247 target_freq, relation, &idx)) {
159 return -EINVAL; 248 return -EINVAL;
160 } 249 }
161 250
251 new_freq_cpu = pxa_freq_settings[idx].khz;
252 new_freq_mem = pxa_freq_settings[idx].membus;
162 freqs.old = policy->cur; 253 freqs.old = policy->cur;
163 freqs.new = pxa_freq_settings[idx].khz; 254 freqs.new = new_freq_cpu;
164 freqs.cpu = policy->cpu; 255 freqs.cpu = policy->cpu;
165 256
166 if (freq_debug) 257 if (freq_debug)
167 pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n", 258 pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, "
168 freqs.new / 1000, (pxa_freq_settings[idx].div2) ? 259 "(SDRAM %d Mhz)\n",
169 (pxa_freq_settings[idx].membus / 2000) : 260 freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
170 (pxa_freq_settings[idx].membus / 1000)); 261 (new_freq_mem / 2000) : (new_freq_mem / 1000));
171 262
172 /* 263 /*
173 * Tell everyone what we're about to do... 264 * Tell everyone what we're about to do...
@@ -177,16 +268,16 @@ static int pxa_set_target(struct cpufreq_policy *policy,
177 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 268 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
178 269
179 /* Calculate the next MDREFR. If we're slowing down the SDRAM clock 270 /* Calculate the next MDREFR. If we're slowing down the SDRAM clock
180 * we need to preset the smaller DRI before the change. If we're speeding 271 * we need to preset the smaller DRI before the change. If we're
181 * up we need to set the larger DRI value after the change. 272 * speeding up we need to set the larger DRI value after the change.
182 */ 273 */
183 preset_mdrefr = postset_mdrefr = MDREFR; 274 preset_mdrefr = postset_mdrefr = MDREFR;
184 if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) { 275 if ((MDREFR & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
185 preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) | 276 preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK);
186 MDREFR_DRI(pxa_freq_settings[idx].membus); 277 preset_mdrefr |= mdrefr_dri(new_freq_mem);
187 } 278 }
188 postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) | 279 postset_mdrefr =
189 MDREFR_DRI(pxa_freq_settings[idx].membus); 280 (postset_mdrefr & ~MDREFR_DRI_MASK) | mdrefr_dri(new_freq_mem);
190 281
191 /* If we're dividing the memory clock by two for the SDRAM clock, this 282 /* If we're dividing the memory clock by two for the SDRAM clock, this
192 * must be set prior to the change. Clearing the divide must be done 283 * must be set prior to the change. Clearing the divide must be done
@@ -201,26 +292,27 @@ static int pxa_set_target(struct cpufreq_policy *policy,
201 292
202 local_irq_save(flags); 293 local_irq_save(flags);
203 294
204 /* Set new the CCCR */ 295 /* Set new the CCCR and prepare CCLKCFG */
205 CCCR = pxa_freq_settings[idx].cccr; 296 CCCR = pxa_freq_settings[idx].cccr;
297 cclkcfg = pxa_freq_settings[idx].cclkcfg;
206 298
207 asm volatile(" \n\ 299 asm volatile(" \n\
208 ldr r4, [%1] /* load MDREFR */ \n\ 300 ldr r4, [%1] /* load MDREFR */ \n\
209 b 2f \n\ 301 b 2f \n\
210 .align 5 \n\ 302 .align 5 \n\
2111: \n\ 3031: \n\
212 str %4, [%1] /* preset the MDREFR */ \n\ 304 str %3, [%1] /* preset the MDREFR */ \n\
213 mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\ 305 mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\
214 str %5, [%1] /* postset the MDREFR */ \n\ 306 str %4, [%1] /* postset the MDREFR */ \n\
215 \n\ 307 \n\
216 b 3f \n\ 308 b 3f \n\
2172: b 1b \n\ 3092: b 1b \n\
2183: nop \n\ 3103: nop \n\
219 " 311 "
220 : "=&r" (unused) 312 : "=&r" (unused)
221 : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), 313 : "r" (&MDREFR), "r" (cclkcfg),
222 "r" (preset_mdrefr), "r" (postset_mdrefr) 314 "r" (preset_mdrefr), "r" (postset_mdrefr)
223 : "r4", "r5"); 315 : "r4", "r5");
224 local_irq_restore(flags); 316 local_irq_restore(flags);
225 317
226 /* 318 /*
@@ -233,38 +325,57 @@ static int pxa_set_target(struct cpufreq_policy *policy,
233 return 0; 325 return 0;
234} 326}
235 327
236static unsigned int pxa_cpufreq_get(unsigned int cpu) 328static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
237{
238 return get_clk_frequency_khz(0);
239}
240
241static int pxa_cpufreq_init(struct cpufreq_policy *policy)
242{ 329{
243 int i; 330 int i;
331 unsigned int freq;
332
333 /* try to guess pxa27x cpu */
334 if (cpu_is_pxa27x())
335 pxa27x_guess_max_freq();
244 336
245 /* set default policy and cpuinfo */ 337 /* set default policy and cpuinfo */
246 policy->governor = CPUFREQ_DEFAULT_GOVERNOR; 338 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
247 policy->policy = CPUFREQ_POLICY_PERFORMANCE; 339 if (cpu_is_pxa25x())
248 policy->cpuinfo.max_freq = PXA25x_MAX_FREQ; 340 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
249 policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
250 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ 341 policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
251 policy->cur = get_clk_frequency_khz(0); /* current freq */ 342 policy->cur = get_clk_frequency_khz(0); /* current freq */
252 policy->min = policy->max = policy->cur; 343 policy->min = policy->max = policy->cur;
253 344
254 /* Generate the run cpufreq_frequency_table struct */ 345 /* Generate pxa25x the run cpufreq_frequency_table struct */
255 for (i = 0; i < NUM_RUN_FREQS; i++) { 346 for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) {
256 pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; 347 pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
257 pxa255_run_freq_table[i].index = i; 348 pxa255_run_freq_table[i].index = i;
258 } 349 }
259
260 pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; 350 pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
261 /* Generate the turbo cpufreq_frequency_table struct */ 351
262 for (i = 0; i < NUM_TURBO_FREQS; i++) { 352 /* Generate pxa25x the turbo cpufreq_frequency_table struct */
263 pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz; 353 for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) {
354 pxa255_turbo_freq_table[i].frequency =
355 pxa255_turbo_freqs[i].khz;
264 pxa255_turbo_freq_table[i].index = i; 356 pxa255_turbo_freq_table[i].index = i;
265 } 357 }
266 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; 358 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
267 359
360 /* Generate the pxa27x cpufreq_frequency_table struct */
361 for (i = 0; i < NUM_PXA27x_FREQS; i++) {
362 freq = pxa27x_freqs[i].khz;
363 if (freq > pxa27x_maxfreq)
364 break;
365 pxa27x_freq_table[i].frequency = freq;
366 pxa27x_freq_table[i].index = i;
367 }
368 pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END;
369
370 /*
371 * Set the policy's minimum and maximum frequencies from the tables
372 * just constructed. This sets cpuinfo.mxx_freq, min and max.
373 */
374 if (cpu_is_pxa25x())
375 cpufreq_frequency_table_cpuinfo(policy, pxa255_run_freq_table);
376 else if (cpu_is_pxa27x())
377 cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table);
378
268 printk(KERN_INFO "PXA CPU frequency change support initialized\n"); 379 printk(KERN_INFO "PXA CPU frequency change support initialized\n");
269 380
270 return 0; 381 return 0;
@@ -275,26 +386,25 @@ static struct cpufreq_driver pxa_cpufreq_driver = {
275 .target = pxa_set_target, 386 .target = pxa_set_target,
276 .init = pxa_cpufreq_init, 387 .init = pxa_cpufreq_init,
277 .get = pxa_cpufreq_get, 388 .get = pxa_cpufreq_get,
278 .name = "PXA25x", 389 .name = "PXA2xx",
279}; 390};
280 391
281static int __init pxa_cpu_init(void) 392static int __init pxa_cpu_init(void)
282{ 393{
283 int ret = -ENODEV; 394 int ret = -ENODEV;
284 if (cpu_is_pxa25x()) 395 if (cpu_is_pxa25x() || cpu_is_pxa27x())
285 ret = cpufreq_register_driver(&pxa_cpufreq_driver); 396 ret = cpufreq_register_driver(&pxa_cpufreq_driver);
286 return ret; 397 return ret;
287} 398}
288 399
289static void __exit pxa_cpu_exit(void) 400static void __exit pxa_cpu_exit(void)
290{ 401{
291 if (cpu_is_pxa25x()) 402 cpufreq_unregister_driver(&pxa_cpufreq_driver);
292 cpufreq_unregister_driver(&pxa_cpufreq_driver);
293} 403}
294 404
295 405
296MODULE_AUTHOR ("Intrinsyc Software Inc."); 406MODULE_AUTHOR("Intrinsyc Software Inc.");
297MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture"); 407MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
298MODULE_LICENSE("GPL"); 408MODULE_LICENSE("GPL");
299module_init(pxa_cpu_init); 409module_init(pxa_cpu_init);
300module_exit(pxa_cpu_exit); 410module_exit(pxa_cpu_exit);
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 0993f4d1a0bc..7b9bdd0c6665 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -396,7 +396,7 @@ static struct pxafb_mach_info sharp_lm8v31 = {
396 .cmap_inverse = 0, 396 .cmap_inverse = 0,
397 .cmap_static = 0, 397 .cmap_static = 0,
398 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL | 398 .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
399 LCD_AC_BIAS_FREQ(255); 399 LCD_AC_BIAS_FREQ(255),
400}; 400};
401 401
402#define MMC_POLL_RATE msecs_to_jiffies(1000) 402#define MMC_POLL_RATE msecs_to_jiffies(1000)
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index ec1bbf333a3a..7d4debbdcca3 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -42,20 +42,17 @@ int pxa_pm_enter(suspend_state_t state)
42 if (state != PM_SUSPEND_STANDBY) { 42 if (state != PM_SUSPEND_STANDBY) {
43 pxa_cpu_pm_fns->save(sleep_save); 43 pxa_cpu_pm_fns->save(sleep_save);
44 /* before sleeping, calculate and save a checksum */ 44 /* before sleeping, calculate and save a checksum */
45 for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) 45 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
46 sleep_save_checksum += sleep_save[i]; 46 sleep_save_checksum += sleep_save[i];
47 } 47 }
48 48
49 /* Clear reset status */
50 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
51
52 /* *** go zzz *** */ 49 /* *** go zzz *** */
53 pxa_cpu_pm_fns->enter(state); 50 pxa_cpu_pm_fns->enter(state);
54 cpu_init(); 51 cpu_init();
55 52
56 if (state != PM_SUSPEND_STANDBY) { 53 if (state != PM_SUSPEND_STANDBY) {
57 /* after sleeping, validate the checksum */ 54 /* after sleeping, validate the checksum */
58 for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) 55 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
59 checksum += sleep_save[i]; 56 checksum += sleep_save[i];
60 57
61 /* if invalid, display message and wait for a hardware reset */ 58 /* if invalid, display message and wait for a hardware reset */
@@ -101,7 +98,8 @@ static int __init pxa_pm_init(void)
101 return -EINVAL; 98 return -EINVAL;
102 } 99 }
103 100
104 sleep_save = kmalloc(pxa_cpu_pm_fns->save_size, GFP_KERNEL); 101 sleep_save = kmalloc(pxa_cpu_pm_fns->save_count * sizeof(unsigned long),
102 GFP_KERNEL);
105 if (!sleep_save) { 103 if (!sleep_save) {
106 printk(KERN_ERR "failed to alloc memory for pm save\n"); 104 printk(KERN_ERR "failed to alloc memory for pm save\n");
107 return -ENOMEM; 105 return -ENOMEM;
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index ca5ac196b47b..0b30f25cff3c 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -326,13 +326,11 @@ static struct platform_device *devices[] __initdata = {
326 326
327static void poodle_poweroff(void) 327static void poodle_poweroff(void)
328{ 328{
329 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
330 arm_machine_restart('h'); 329 arm_machine_restart('h');
331} 330}
332 331
333static void poodle_restart(char mode) 332static void poodle_restart(char mode)
334{ 333{
335 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
336 arm_machine_restart('h'); 334 arm_machine_restart('h');
337} 335}
338 336
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index d9b5450aee5b..e5b417d14bb0 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -150,9 +150,7 @@ static struct clk pxa25x_clks[] = {
150 * More ones like CP and general purpose register values are preserved 150 * More ones like CP and general purpose register values are preserved
151 * with the stack pointer in sleep.S. 151 * with the stack pointer in sleep.S.
152 */ 152 */
153enum { SLEEP_SAVE_START = 0, 153enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
154
155 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
156 154
157 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, 155 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
158 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, 156 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
@@ -162,7 +160,7 @@ enum { SLEEP_SAVE_START = 0,
162 160
163 SLEEP_SAVE_CKEN, 161 SLEEP_SAVE_CKEN,
164 162
165 SLEEP_SAVE_SIZE 163 SLEEP_SAVE_COUNT
166}; 164};
167 165
168 166
@@ -200,6 +198,9 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
200 198
201static void pxa25x_cpu_pm_enter(suspend_state_t state) 199static void pxa25x_cpu_pm_enter(suspend_state_t state)
202{ 200{
201 /* Clear reset status */
202 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
203
203 switch (state) { 204 switch (state) {
204 case PM_SUSPEND_MEM: 205 case PM_SUSPEND_MEM:
205 /* set resume return address */ 206 /* set resume return address */
@@ -210,7 +211,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
210} 211}
211 212
212static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = { 213static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
213 .save_size = SLEEP_SAVE_SIZE, 214 .save_count = SLEEP_SAVE_COUNT,
214 .valid = suspend_valid_only_mem, 215 .valid = suspend_valid_only_mem,
215 .save = pxa25x_cpu_pm_save, 216 .save = pxa25x_cpu_pm_save,
216 .restore = pxa25x_cpu_pm_restore, 217 .restore = pxa25x_cpu_pm_restore,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 7a2449dd0fd4..7e945836e129 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -181,9 +181,7 @@ static struct clk pxa27x_clks[] = {
181 * More ones like CP and general purpose register values are preserved 181 * More ones like CP and general purpose register values are preserved
182 * with the stack pointer in sleep.S. 182 * with the stack pointer in sleep.S.
183 */ 183 */
184enum { SLEEP_SAVE_START = 0, 184enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
185
186 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
187 185
188 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, 186 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
189 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, 187 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
@@ -198,7 +196,7 @@ enum { SLEEP_SAVE_START = 0,
198 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, 196 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
199 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR, 197 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
200 198
201 SLEEP_SAVE_SIZE 199 SLEEP_SAVE_COUNT
202}; 200};
203 201
204void pxa27x_cpu_pm_save(unsigned long *sleep_save) 202void pxa27x_cpu_pm_save(unsigned long *sleep_save)
@@ -251,6 +249,9 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
251 /* Clear edge-detect status register. */ 249 /* Clear edge-detect status register. */
252 PEDR = 0xDF12FE1B; 250 PEDR = 0xDF12FE1B;
253 251
252 /* Clear reset status */
253 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
254
254 switch (state) { 255 switch (state) {
255 case PM_SUSPEND_STANDBY: 256 case PM_SUSPEND_STANDBY:
256 pxa_cpu_standby(); 257 pxa_cpu_standby();
@@ -269,7 +270,7 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
269} 270}
270 271
271static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { 272static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
272 .save_size = SLEEP_SAVE_SIZE, 273 .save_count = SLEEP_SAVE_COUNT,
273 .save = pxa27x_cpu_pm_save, 274 .save = pxa27x_cpu_pm_save,
274 .restore = pxa27x_cpu_pm_restore, 275 .restore = pxa27x_cpu_pm_restore,
275 .valid = pxa27x_cpu_pm_valid, 276 .valid = pxa27x_cpu_pm_valid,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index b6a6f5fcc77a..644550bfa330 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -256,12 +256,11 @@ static unsigned long wakeup_src;
256#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x 256#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
257#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] 257#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
258 258
259enum { SLEEP_SAVE_START = 0, 259enum { SLEEP_SAVE_CKENA,
260 SLEEP_SAVE_CKENA,
261 SLEEP_SAVE_CKENB, 260 SLEEP_SAVE_CKENB,
262 SLEEP_SAVE_ACCR, 261 SLEEP_SAVE_ACCR,
263 262
264 SLEEP_SAVE_SIZE, 263 SLEEP_SAVE_COUNT,
265}; 264};
266 265
267static void pxa3xx_cpu_pm_save(unsigned long *sleep_save) 266static void pxa3xx_cpu_pm_save(unsigned long *sleep_save)
@@ -376,7 +375,7 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state)
376} 375}
377 376
378static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { 377static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {
379 .save_size = SLEEP_SAVE_SIZE, 378 .save_count = SLEEP_SAVE_COUNT,
380 .save = pxa3xx_cpu_pm_save, 379 .save = pxa3xx_cpu_pm_save,
381 .restore = pxa3xx_cpu_pm_restore, 380 .restore = pxa3xx_cpu_pm_restore,
382 .valid = pxa3xx_cpu_pm_valid, 381 .valid = pxa3xx_cpu_pm_valid,
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 62a02c3927c5..e7d0fcd9b43f 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -529,8 +529,6 @@ static struct platform_device *devices[] __initdata = {
529 529
530static void spitz_poweroff(void) 530static void spitz_poweroff(void)
531{ 531{
532 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
533
534 pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT); 532 pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT);
535 GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET); 533 GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET);
536 534
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 7a7f5f947cc5..23f050feb208 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -119,9 +119,6 @@ static void spitz_presuspend(void)
119 /* nRESET_OUT Disable */ 119 /* nRESET_OUT Disable */
120 PSLR |= PSLR_SL_ROD; 120 PSLR |= PSLR_SL_ROD;
121 121
122 /* Clear reset status */
123 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
124
125 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ 122 /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
126 PCFR = PCFR_GPR_EN | PCFR_OPDE; 123 PCFR = PCFR_GPR_EN | PCFR_OPDE;
127} 124}
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 6458f6d371d9..c2cbd66db814 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -467,8 +467,6 @@ static struct platform_device *devices[] __initdata = {
467 467
468static void tosa_poweroff(void) 468static void tosa_poweroff(void)
469{ 469{
470 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
471
472 pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT); 470 pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT);
473 GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET); 471 GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET);
474 472
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index 246c573e7252..1693d447a224 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -43,20 +43,18 @@ extern void sa1100_cpu_resume(void);
43 * More ones like CP and general purpose register values are preserved 43 * More ones like CP and general purpose register values are preserved
44 * on the stack and then the stack pointer is stored last in sleep.S. 44 * on the stack and then the stack pointer is stored last in sleep.S.
45 */ 45 */
46enum { SLEEP_SAVE_SP = 0, 46enum { SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
47
48 SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
49 SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR, 47 SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR,
50 48
51 SLEEP_SAVE_Ser1SDCR0, 49 SLEEP_SAVE_Ser1SDCR0,
52 50
53 SLEEP_SAVE_SIZE 51 SLEEP_SAVE_COUNT
54}; 52};
55 53
56 54
57static int sa11x0_pm_enter(suspend_state_t state) 55static int sa11x0_pm_enter(suspend_state_t state)
58{ 56{
59 unsigned long gpio, sleep_save[SLEEP_SAVE_SIZE]; 57 unsigned long gpio, sleep_save[SLEEP_SAVE_COUNT];
60 58
61 gpio = GPLR; 59 gpio = GPLR;
62 60
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index d84167fb33b1..3ac8d8d781b3 100644
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -411,7 +411,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
411 411
412 clk->parent = parent; 412 clk->parent = parent;
413 413
414 if (clk == &s3c24xx_dclk0) 414 if (clk == &s3c24xx_clkout0)
415 mask = S3C2410_MISCCR_CLK0_MASK; 415 mask = S3C2410_MISCCR_CLK0_MASK;
416 else { 416 else {
417 source <<= 4; 417 source <<= 4;
@@ -437,7 +437,7 @@ struct clk s3c24xx_dclk0 = {
437struct clk s3c24xx_dclk1 = { 437struct clk s3c24xx_dclk1 = {
438 .name = "dclk1", 438 .name = "dclk1",
439 .id = -1, 439 .id = -1,
440 .ctrlbit = S3C2410_DCLKCON_DCLK0EN, 440 .ctrlbit = S3C2410_DCLKCON_DCLK1EN,
441 .enable = s3c24xx_dclk_enable, 441 .enable = s3c24xx_dclk_enable,
442 .set_parent = s3c24xx_dclk_setparent, 442 .set_parent = s3c24xx_dclk_setparent,
443 .set_rate = s3c24xx_set_dclk_rate, 443 .set_rate = s3c24xx_set_dclk_rate,
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 795d0ac67c21..fd5708523f2e 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -832,6 +832,7 @@ config BANK_0
832config BANK_1 832config BANK_1
833 hex "Bank 1" 833 hex "Bank 1"
834 default 0x7BB0 834 default 0x7BB0
835 default 0x5558 if BF54x
835 836
836config BANK_2 837config BANK_2
837 hex "Bank 2" 838 hex "Bank 2"
@@ -963,21 +964,22 @@ endchoice
963 964
964endmenu 965endmenu
965 966
966if (BF537 || BF533 || BF54x)
967
968menu "CPU Frequency scaling" 967menu "CPU Frequency scaling"
969 968
970source "drivers/cpufreq/Kconfig" 969source "drivers/cpufreq/Kconfig"
971 970
972config CPU_FREQ 971config CPU_VOLTAGE
973 bool 972 bool "CPU Voltage scaling"
973 depends on EXPERIMENTAL
974 depends on CPU_FREQ
974 default n 975 default n
975 help 976 help
976 If you want to enable this option, you should select the 977 Say Y here if you want CPU voltage scaling according to the CPU frequency.
977 DPMC driver from Character Devices. 978 This option violates the PLL BYPASS recommendation in the Blackfin Processor
978endmenu 979 manuals. There is a theoretical risk that during VDDINT transitions
980 the PLL may unlock.
979 981
980endif 982endmenu
981 983
982source "net/Kconfig" 984source "net/Kconfig"
983 985
diff --git a/arch/blackfin/kernel/asm-offsets.c b/arch/blackfin/kernel/asm-offsets.c
index 721f15f3cebf..881afe9082c7 100644
--- a/arch/blackfin/kernel/asm-offsets.c
+++ b/arch/blackfin/kernel/asm-offsets.c
@@ -56,9 +56,6 @@ int main(void)
56 /* offsets into the thread struct */ 56 /* offsets into the thread struct */
57 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp)); 57 DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
58 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp)); 58 DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
59 DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
60 DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
61 DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
62 DEFINE(THREAD_PC, offsetof(struct thread_struct, pc)); 59 DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
63 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE); 60 DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
64 61
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
index 5ed47228a390..4b03ba025488 100644
--- a/arch/blackfin/kernel/fixed_code.S
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -1,6 +1,6 @@
1/* 1/*
2 * This file contains sequences of code that will be copied to a 2 * This file contains sequences of code that will be copied to a
3 * fixed location, defined in <asm/atomic_seq.h>. The interrupt 3 * fixed location, defined in <asm/fixed_code.h>. The interrupt
4 * handlers ensure that these sequences appear to be atomic when 4 * handlers ensure that these sequences appear to be atomic when
5 * executed from userspace. 5 * executed from userspace.
6 * These are aligned to 16 bytes, so that we have some space to replace 6 * These are aligned to 16 bytes, so that we have some space to replace
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index 8b9fe29d03f4..14a42848f37f 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -160,6 +160,13 @@ int
160module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs, 160module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
161 char *secstrings, struct module *mod) 161 char *secstrings, struct module *mod)
162{ 162{
163 /*
164 * XXX: sechdrs are vmalloced in kernel/module.c
165 * and would be vfreed just after module is loaded,
166 * so we hack to keep the only information we needed
167 * in mod->arch to correctly free L1 I/D sram later.
168 * NOTE: this breaks the semantic of mod->arch structure.
169 */
163 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; 170 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
164 void *dest = NULL; 171 void *dest = NULL;
165 172
@@ -167,8 +174,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
167 if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) || 174 if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
168 ((strcmp(".text", secstrings + s->sh_name) == 0) && 175 ((strcmp(".text", secstrings + s->sh_name) == 0) &&
169 (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) { 176 (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
170 mod->arch.text_l1 = s;
171 dest = l1_inst_sram_alloc(s->sh_size); 177 dest = l1_inst_sram_alloc(s->sh_size);
178 mod->arch.text_l1 = dest;
172 if (dest == NULL) { 179 if (dest == NULL) {
173 printk(KERN_ERR 180 printk(KERN_ERR
174 "module %s: L1 instruction memory allocation failed\n", 181 "module %s: L1 instruction memory allocation failed\n",
@@ -182,8 +189,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
182 if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) || 189 if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
183 ((strcmp(".data", secstrings + s->sh_name) == 0) && 190 ((strcmp(".data", secstrings + s->sh_name) == 0) &&
184 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { 191 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
185 mod->arch.data_a_l1 = s;
186 dest = l1_data_sram_alloc(s->sh_size); 192 dest = l1_data_sram_alloc(s->sh_size);
193 mod->arch.data_a_l1 = dest;
187 if (dest == NULL) { 194 if (dest == NULL) {
188 printk(KERN_ERR 195 printk(KERN_ERR
189 "module %s: L1 data memory allocation failed\n", 196 "module %s: L1 data memory allocation failed\n",
@@ -197,8 +204,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
197 if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 || 204 if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
198 ((strcmp(".bss", secstrings + s->sh_name) == 0) && 205 ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
199 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) { 206 (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
200 mod->arch.bss_a_l1 = s;
201 dest = l1_data_sram_alloc(s->sh_size); 207 dest = l1_data_sram_alloc(s->sh_size);
208 mod->arch.bss_a_l1 = dest;
202 if (dest == NULL) { 209 if (dest == NULL) {
203 printk(KERN_ERR 210 printk(KERN_ERR
204 "module %s: L1 data memory allocation failed\n", 211 "module %s: L1 data memory allocation failed\n",
@@ -210,8 +217,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
210 s->sh_addr = (unsigned long)dest; 217 s->sh_addr = (unsigned long)dest;
211 } 218 }
212 if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) { 219 if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
213 mod->arch.data_b_l1 = s;
214 dest = l1_data_B_sram_alloc(s->sh_size); 220 dest = l1_data_B_sram_alloc(s->sh_size);
221 mod->arch.data_b_l1 = dest;
215 if (dest == NULL) { 222 if (dest == NULL) {
216 printk(KERN_ERR 223 printk(KERN_ERR
217 "module %s: L1 data memory allocation failed\n", 224 "module %s: L1 data memory allocation failed\n",
@@ -223,8 +230,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
223 s->sh_addr = (unsigned long)dest; 230 s->sh_addr = (unsigned long)dest;
224 } 231 }
225 if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) { 232 if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
226 mod->arch.bss_b_l1 = s;
227 dest = l1_data_B_sram_alloc(s->sh_size); 233 dest = l1_data_B_sram_alloc(s->sh_size);
234 mod->arch.bss_b_l1 = dest;
228 if (dest == NULL) { 235 if (dest == NULL) {
229 printk(KERN_ERR 236 printk(KERN_ERR
230 "module %s: L1 data memory allocation failed\n", 237 "module %s: L1 data memory allocation failed\n",
@@ -416,14 +423,14 @@ module_finalize(const Elf_Ehdr * hdr,
416 423
417void module_arch_cleanup(struct module *mod) 424void module_arch_cleanup(struct module *mod)
418{ 425{
419 if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr)) 426 if (mod->arch.text_l1)
420 l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr); 427 l1_inst_sram_free((void *)mod->arch.text_l1);
421 if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr)) 428 if (mod->arch.data_a_l1)
422 l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr); 429 l1_data_sram_free((void *)mod->arch.data_a_l1);
423 if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr)) 430 if (mod->arch.bss_a_l1)
424 l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr); 431 l1_data_sram_free((void *)mod->arch.bss_a_l1);
425 if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr)) 432 if (mod->arch.data_b_l1)
426 l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr); 433 l1_data_B_sram_free((void *)mod->arch.data_b_l1);
427 if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr)) 434 if (mod->arch.bss_b_l1)
428 l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr); 435 l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
429} 436}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index be9fdd00d7cb..53c2cd255441 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -245,7 +245,7 @@ unsigned long get_wchan(struct task_struct *p)
245 245
246void finish_atomic_sections (struct pt_regs *regs) 246void finish_atomic_sections (struct pt_regs *regs)
247{ 247{
248 int __user *up0 = (int __user *)&regs->p0; 248 int __user *up0 = (int __user *)regs->p0;
249 249
250 if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END) 250 if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
251 return; 251 return;
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c
index b4f062c172c6..f51ab088098e 100644
--- a/arch/blackfin/kernel/ptrace.c
+++ b/arch/blackfin/kernel/ptrace.c
@@ -185,8 +185,8 @@ void ptrace_disable(struct task_struct *child)
185{ 185{
186 unsigned long tmp; 186 unsigned long tmp;
187 /* make sure the single step bit is not set. */ 187 /* make sure the single step bit is not set. */
188 tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16); 188 tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
189 put_reg(child, PT_SR, tmp); 189 put_reg(child, PT_SYSCFG, tmp);
190} 190}
191 191
192long arch_ptrace(struct task_struct *child, long request, long addr, long data) 192long arch_ptrace(struct task_struct *child, long request, long addr, long data)
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index cb9d883d493c..dbc3bbf846be 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -42,6 +42,9 @@
42 42
43#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 43#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
44 44
45/* Location of the trace bit in SYSCFG. */
46#define TRACE_BITS 0x0001
47
45struct fdpic_func_descriptor { 48struct fdpic_func_descriptor {
46 unsigned long text; 49 unsigned long text;
47 unsigned long GOT; 50 unsigned long GOT;
@@ -225,6 +228,16 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
225 regs->r1 = (unsigned long)(&frame->info); 228 regs->r1 = (unsigned long)(&frame->info);
226 regs->r2 = (unsigned long)(&frame->uc); 229 regs->r2 = (unsigned long)(&frame->uc);
227 230
231 /*
232 * Clear the trace flag when entering the signal handler, but
233 * notify any tracer that was single-stepping it. The tracer
234 * may want to single-step inside the handler too.
235 */
236 if (regs->syscfg & TRACE_BITS) {
237 regs->syscfg &= ~TRACE_BITS;
238 ptrace_notify(SIGTRAP);
239 }
240
228 return 0; 241 return 0;
229 242
230 give_sigsegv: 243 give_sigsegv:
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 4482c47c09e5..e887efc86c29 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -60,7 +60,7 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc)
60 60
61static cycle_t read_cycles(void) 61static cycle_t read_cycles(void)
62{ 62{
63 return get_cycles(); 63 return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
64} 64}
65 65
66unsigned long long sched_clock(void) 66unsigned long long sched_clock(void)
@@ -117,7 +117,7 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
117 break; 117 break;
118 } 118 }
119 case CLOCK_EVT_MODE_ONESHOT: 119 case CLOCK_EVT_MODE_ONESHOT:
120 bfin_write_TSCALE(0); 120 bfin_write_TSCALE(TIME_SCALE - 1);
121 bfin_write_TCOUNT(0); 121 bfin_write_TCOUNT(0);
122 bfin_write_TCNTL(TMPWR | TMREN); 122 bfin_write_TCNTL(TMPWR | TMREN);
123 CSYNC(); 123 CSYNC();
@@ -183,10 +183,14 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
183 183
184static int __init bfin_clockevent_init(void) 184static int __init bfin_clockevent_init(void)
185{ 185{
186 unsigned long timer_clk;
187
188 timer_clk = get_cclk() / TIME_SCALE;
189
186 setup_irq(IRQ_CORETMR, &bfin_timer_irq); 190 setup_irq(IRQ_CORETMR, &bfin_timer_irq);
187 bfin_timer_init(); 191 bfin_timer_init();
188 192
189 clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift); 193 clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
190 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin); 194 clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
191 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin); 195 clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
192 clockevents_register_device(&clockevent_bfin); 196 clockevents_register_device(&clockevent_bfin);
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 583d53811f03..8aa49f804228 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -32,12 +32,14 @@
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h> 33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h> 34#include <linux/mtd/partitions.h>
35#include <linux/mtd/physmap.h>
35#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
39#endif 40#endif
40#include <linux/ata_platform.h> 41#include <linux/ata_platform.h>
42#include <linux/i2c.h>
41#include <linux/irq.h> 43#include <linux/irq.h>
42#include <linux/interrupt.h> 44#include <linux/interrupt.h>
43#include <linux/usb/sl811.h> 45#include <linux/usb/sl811.h>
@@ -50,6 +52,7 @@
50#include <asm/reboot.h> 52#include <asm/reboot.h>
51#include <asm/nand.h> 53#include <asm/nand.h>
52#include <asm/portmux.h> 54#include <asm/portmux.h>
55#include <asm/dpmc.h>
53#include <linux/spi/ad7877.h> 56#include <linux/spi/ad7877.h>
54 57
55/* 58/*
@@ -171,6 +174,46 @@ static struct platform_device bf52x_t350mcqb_device = {
171}; 174};
172#endif 175#endif
173 176
177#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
178static struct mtd_partition ezkit_partitions[] = {
179 {
180 .name = "Bootloader",
181 .size = 0x40000,
182 .offset = 0,
183 }, {
184 .name = "Kernel",
185 .size = 0x1C0000,
186 .offset = MTDPART_OFS_APPEND,
187 }, {
188 .name = "RootFS",
189 .size = MTDPART_SIZ_FULL,
190 .offset = MTDPART_OFS_APPEND,
191 }
192};
193
194static struct physmap_flash_data ezkit_flash_data = {
195 .width = 2,
196 .parts = ezkit_partitions,
197 .nr_parts = ARRAY_SIZE(ezkit_partitions),
198};
199
200static struct resource ezkit_flash_resource = {
201 .start = 0x20000000,
202 .end = 0x203fffff,
203 .flags = IORESOURCE_MEM,
204};
205
206static struct platform_device ezkit_flash_device = {
207 .name = "physmap-flash",
208 .id = 0,
209 .dev = {
210 .platform_data = &ezkit_flash_data,
211 },
212 .num_resources = 1,
213 .resource = &ezkit_flash_resource,
214};
215#endif
216
174#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 217#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
175static struct mtd_partition partition_info[] = { 218static struct mtd_partition partition_info[] = {
176 { 219 {
@@ -420,11 +463,7 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
420 .offset = 0, 463 .offset = 0,
421 .mask_flags = MTD_CAP_ROM 464 .mask_flags = MTD_CAP_ROM
422 }, { 465 }, {
423 .name = "kernel", 466 .name = "linux kernel",
424 .size = 0xe0000,
425 .offset = MTDPART_OFS_APPEND,
426 }, {
427 .name = "file system",
428 .size = MTDPART_SIZ_FULL, 467 .size = MTDPART_SIZ_FULL,
429 .offset = MTDPART_OFS_APPEND, 468 .offset = MTDPART_OFS_APPEND,
430 } 469 }
@@ -434,7 +473,7 @@ static struct flash_platform_data bfin_spi_flash_data = {
434 .name = "m25p80", 473 .name = "m25p80",
435 .parts = bfin_spi_flash_partitions, 474 .parts = bfin_spi_flash_partitions,
436 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 475 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
437 .type = "m25p64", 476 .type = "m25p16",
438}; 477};
439 478
440/* SPI flash chip (m25p64) */ 479/* SPI flash chip (m25p64) */
@@ -755,6 +794,24 @@ static struct platform_device i2c_bfin_twi_device = {
755}; 794};
756#endif 795#endif
757 796
797#ifdef CONFIG_I2C_BOARDINFO
798static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
799#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
800 {
801 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
802 .type = "pcf8574_lcd",
803 },
804#endif
805#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
806 {
807 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
808 .type = "pcf8574_keypad",
809 .irq = IRQ_PF8,
810 },
811#endif
812};
813#endif
814
758#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 815#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
759static struct platform_device bfin_sport0_uart_device = { 816static struct platform_device bfin_sport0_uart_device = {
760 .name = "bfin-sport-uart", 817 .name = "bfin-sport-uart",
@@ -839,7 +896,32 @@ static struct platform_device bfin_gpios_device = {
839 .resource = &bfin_gpios_resources, 896 .resource = &bfin_gpios_resources,
840}; 897};
841 898
899static const unsigned int cclk_vlev_datasheet[] =
900{
901 VRPAIR(VLEV_100, 400000000),
902 VRPAIR(VLEV_105, 426000000),
903 VRPAIR(VLEV_110, 500000000),
904 VRPAIR(VLEV_115, 533000000),
905 VRPAIR(VLEV_120, 600000000),
906};
907
908static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
909 .tuple_tab = cclk_vlev_datasheet,
910 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
911 .vr_settling_time = 25 /* us */,
912};
913
914static struct platform_device bfin_dpmc = {
915 .name = "bfin dpmc",
916 .dev = {
917 .platform_data = &bfin_dmpc_vreg_data,
918 },
919};
920
842static struct platform_device *stamp_devices[] __initdata = { 921static struct platform_device *stamp_devices[] __initdata = {
922
923 &bfin_dpmc,
924
843#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) 925#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
844 &bf5xx_nand_device, 926 &bf5xx_nand_device,
845#endif 927#endif
@@ -921,12 +1003,22 @@ static struct platform_device *stamp_devices[] __initdata = {
921 &bfin_device_gpiokeys, 1003 &bfin_device_gpiokeys,
922#endif 1004#endif
923 1005
1006#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1007 &ezkit_flash_device,
1008#endif
1009
924 &bfin_gpios_device, 1010 &bfin_gpios_device,
925}; 1011};
926 1012
927static int __init stamp_init(void) 1013static int __init stamp_init(void)
928{ 1014{
929 printk(KERN_INFO "%s(): registering device resources\n", __func__); 1015 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1016
1017#ifdef CONFIG_I2C_BOARDINFO
1018 i2c_register_board_info(0, bfin_i2c_board_info,
1019 ARRAY_SIZE(bfin_i2c_board_info));
1020#endif
1021
930 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 1022 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
931#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 1023#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
932 spi_register_board_info(bfin_spi_board_info, 1024 spi_register_board_info(bfin_spi_board_info,
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index a03149c72681..ed2b0b8f5dc9 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -33,12 +33,15 @@
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
36#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif
37#include <linux/ata_platform.h> 39#include <linux/ata_platform.h>
38#include <linux/irq.h> 40#include <linux/irq.h>
39#include <asm/dma.h> 41#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 43#include <asm/portmux.h>
44#include <asm/dpmc.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -341,7 +344,37 @@ static struct platform_device bfin_pata_device = {
341}; 344};
342#endif 345#endif
343 346
347static const unsigned int cclk_vlev_datasheet[] =
348{
349 VRPAIR(VLEV_085, 250000000),
350 VRPAIR(VLEV_090, 376000000),
351 VRPAIR(VLEV_095, 426000000),
352 VRPAIR(VLEV_100, 426000000),
353 VRPAIR(VLEV_105, 476000000),
354 VRPAIR(VLEV_110, 476000000),
355 VRPAIR(VLEV_115, 476000000),
356 VRPAIR(VLEV_120, 600000000),
357 VRPAIR(VLEV_125, 600000000),
358 VRPAIR(VLEV_130, 600000000),
359};
360
361static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
362 .tuple_tab = cclk_vlev_datasheet,
363 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
364 .vr_settling_time = 25 /* us */,
365};
366
367static struct platform_device bfin_dpmc = {
368 .name = "bfin dpmc",
369 .dev = {
370 .platform_data = &bfin_dmpc_vreg_data,
371 },
372};
373
344static struct platform_device *cm_bf533_devices[] __initdata = { 374static struct platform_device *cm_bf533_devices[] __initdata = {
375
376 &bfin_dpmc,
377
345#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 378#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
346 &bfin_uart_device, 379 &bfin_uart_device,
347#endif 380#endif
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 08a7943949ae..9d28415163ea 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -42,6 +42,7 @@
42#include <asm/dma.h> 42#include <asm/dma.h>
43#include <asm/bfin5xx_spi.h> 43#include <asm/bfin5xx_spi.h>
44#include <asm/portmux.h> 44#include <asm/portmux.h>
45#include <asm/dpmc.h>
45 46
46/* 47/*
47 * Name the Board for the /proc/cpuinfo 48 * Name the Board for the /proc/cpuinfo
@@ -350,7 +351,37 @@ static struct platform_device i2c_gpio_device = {
350}; 351};
351#endif 352#endif
352 353
354static const unsigned int cclk_vlev_datasheet[] =
355{
356 VRPAIR(VLEV_085, 250000000),
357 VRPAIR(VLEV_090, 376000000),
358 VRPAIR(VLEV_095, 426000000),
359 VRPAIR(VLEV_100, 426000000),
360 VRPAIR(VLEV_105, 476000000),
361 VRPAIR(VLEV_110, 476000000),
362 VRPAIR(VLEV_115, 476000000),
363 VRPAIR(VLEV_120, 600000000),
364 VRPAIR(VLEV_125, 600000000),
365 VRPAIR(VLEV_130, 600000000),
366};
367
368static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
369 .tuple_tab = cclk_vlev_datasheet,
370 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
371 .vr_settling_time = 25 /* us */,
372};
373
374static struct platform_device bfin_dpmc = {
375 .name = "bfin dpmc",
376 .dev = {
377 .platform_data = &bfin_dmpc_vreg_data,
378 },
379};
380
353static struct platform_device *ezkit_devices[] __initdata = { 381static struct platform_device *ezkit_devices[] __initdata = {
382
383 &bfin_dpmc,
384
354#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 385#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
355 &smc91x_device, 386 &smc91x_device,
356#endif 387#endif
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 024f418ae543..7fd35fb32fd5 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -45,6 +45,7 @@
45#include <asm/bfin5xx_spi.h> 45#include <asm/bfin5xx_spi.h>
46#include <asm/reboot.h> 46#include <asm/reboot.h>
47#include <asm/portmux.h> 47#include <asm/portmux.h>
48#include <asm/dpmc.h>
48 49
49/* 50/*
50 * Name the Board for the /proc/cpuinfo 51 * Name the Board for the /proc/cpuinfo
@@ -516,7 +517,37 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
516}; 517};
517#endif 518#endif
518 519
520static const unsigned int cclk_vlev_datasheet[] =
521{
522 VRPAIR(VLEV_085, 250000000),
523 VRPAIR(VLEV_090, 376000000),
524 VRPAIR(VLEV_095, 426000000),
525 VRPAIR(VLEV_100, 426000000),
526 VRPAIR(VLEV_105, 476000000),
527 VRPAIR(VLEV_110, 476000000),
528 VRPAIR(VLEV_115, 476000000),
529 VRPAIR(VLEV_120, 600000000),
530 VRPAIR(VLEV_125, 600000000),
531 VRPAIR(VLEV_130, 600000000),
532};
533
534static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
535 .tuple_tab = cclk_vlev_datasheet,
536 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
537 .vr_settling_time = 25 /* us */,
538};
539
540static struct platform_device bfin_dpmc = {
541 .name = "bfin dpmc",
542 .dev = {
543 .platform_data = &bfin_dmpc_vreg_data,
544 },
545};
546
519static struct platform_device *stamp_devices[] __initdata = { 547static struct platform_device *stamp_devices[] __initdata = {
548
549 &bfin_dpmc,
550
520#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 551#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
521 &rtc_device, 552 &rtc_device,
522#endif 553#endif
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index d8a23cd9b9ed..73f2142875e2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -35,12 +35,15 @@
35#include <linux/mtd/partitions.h> 35#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h> 36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h> 37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif
39#include <linux/ata_platform.h> 41#include <linux/ata_platform.h>
40#include <linux/irq.h> 42#include <linux/irq.h>
41#include <asm/dma.h> 43#include <asm/dma.h>
42#include <asm/bfin5xx_spi.h> 44#include <asm/bfin5xx_spi.h>
43#include <asm/portmux.h> 45#include <asm/portmux.h>
46#include <asm/dpmc.h>
44 47
45/* 48/*
46 * Name the Board for the /proc/cpuinfo 49 * Name the Board for the /proc/cpuinfo
@@ -428,7 +431,37 @@ static struct platform_device bfin_pata_device = {
428}; 431};
429#endif 432#endif
430 433
434static const unsigned int cclk_vlev_datasheet[] =
435{
436 VRPAIR(VLEV_085, 250000000),
437 VRPAIR(VLEV_090, 376000000),
438 VRPAIR(VLEV_095, 426000000),
439 VRPAIR(VLEV_100, 426000000),
440 VRPAIR(VLEV_105, 476000000),
441 VRPAIR(VLEV_110, 476000000),
442 VRPAIR(VLEV_115, 476000000),
443 VRPAIR(VLEV_120, 500000000),
444 VRPAIR(VLEV_125, 533000000),
445 VRPAIR(VLEV_130, 600000000),
446};
447
448static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
449 .tuple_tab = cclk_vlev_datasheet,
450 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
451 .vr_settling_time = 25 /* us */,
452};
453
454static struct platform_device bfin_dpmc = {
455 .name = "bfin dpmc",
456 .dev = {
457 .platform_data = &bfin_dmpc_vreg_data,
458 },
459};
460
431static struct platform_device *cm_bf537_devices[] __initdata = { 461static struct platform_device *cm_bf537_devices[] __initdata = {
462
463 &bfin_dpmc,
464
432#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) 465#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
433 &hitachi_fb_device, 466 &hitachi_fb_device,
434#endif 467#endif
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index d3727b7c2d7d..9a756d1f3d73 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -47,6 +47,7 @@
47#include <asm/bfin5xx_spi.h> 47#include <asm/bfin5xx_spi.h>
48#include <asm/reboot.h> 48#include <asm/reboot.h>
49#include <asm/portmux.h> 49#include <asm/portmux.h>
50#include <asm/dpmc.h>
50#include <linux/spi/ad7877.h> 51#include <linux/spi/ad7877.h>
51 52
52/* 53/*
@@ -817,7 +818,37 @@ static struct platform_device bfin_pata_device = {
817}; 818};
818#endif 819#endif
819 820
821static const unsigned int cclk_vlev_datasheet[] =
822{
823 VRPAIR(VLEV_085, 250000000),
824 VRPAIR(VLEV_090, 376000000),
825 VRPAIR(VLEV_095, 426000000),
826 VRPAIR(VLEV_100, 426000000),
827 VRPAIR(VLEV_105, 476000000),
828 VRPAIR(VLEV_110, 476000000),
829 VRPAIR(VLEV_115, 476000000),
830 VRPAIR(VLEV_120, 500000000),
831 VRPAIR(VLEV_125, 533000000),
832 VRPAIR(VLEV_130, 600000000),
833};
834
835static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
836 .tuple_tab = cclk_vlev_datasheet,
837 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
838 .vr_settling_time = 25 /* us */,
839};
840
841static struct platform_device bfin_dpmc = {
842 .name = "bfin dpmc",
843 .dev = {
844 .platform_data = &bfin_dmpc_vreg_data,
845 },
846};
847
820static struct platform_device *stamp_devices[] __initdata = { 848static struct platform_device *stamp_devices[] __initdata = {
849
850 &bfin_dpmc,
851
821#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 852#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
822 &bfin_pcmcia_cf_device, 853 &bfin_pcmcia_cf_device,
823#endif 854#endif
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index e3e8479fffb5..3b74f96d3590 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -36,7 +36,9 @@
36#include <linux/spi/flash.h> 36#include <linux/spi/flash.h>
37#include <linux/irq.h> 37#include <linux/irq.h>
38#include <linux/interrupt.h> 38#include <linux/interrupt.h>
39#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
39#include <linux/usb/musb.h> 40#include <linux/usb/musb.h>
41#endif
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/cplb.h> 43#include <asm/cplb.h>
42#include <asm/dma.h> 44#include <asm/dma.h>
@@ -44,6 +46,7 @@
44#include <asm/nand.h> 46#include <asm/nand.h>
45#include <asm/portmux.h> 47#include <asm/portmux.h>
46#include <asm/mach/bf54x_keys.h> 48#include <asm/mach/bf54x_keys.h>
49#include <asm/dpmc.h>
47#include <linux/input.h> 50#include <linux/input.h>
48#include <linux/spi/ad7877.h> 51#include <linux/spi/ad7877.h>
49 52
@@ -590,7 +593,38 @@ static struct platform_device bfin_device_gpiokeys = {
590}; 593};
591#endif 594#endif
592 595
596static const unsigned int cclk_vlev_datasheet[] =
597{
598/*
599 * Internal VLEV BF54XSBBC1533
600 ****temporarily using these values until data sheet is updated
601 */
602 VRPAIR(VLEV_085, 150000000),
603 VRPAIR(VLEV_090, 250000000),
604 VRPAIR(VLEV_110, 276000000),
605 VRPAIR(VLEV_115, 301000000),
606 VRPAIR(VLEV_120, 525000000),
607 VRPAIR(VLEV_125, 550000000),
608 VRPAIR(VLEV_130, 600000000),
609};
610
611static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
612 .tuple_tab = cclk_vlev_datasheet,
613 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
614 .vr_settling_time = 25 /* us */,
615};
616
617static struct platform_device bfin_dpmc = {
618 .name = "bfin dpmc",
619 .dev = {
620 .platform_data = &bfin_dmpc_vreg_data,
621 },
622};
623
593static struct platform_device *cm_bf548_devices[] __initdata = { 624static struct platform_device *cm_bf548_devices[] __initdata = {
625
626 &bfin_dpmc,
627
594#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 628#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
595 &rtc_device, 629 &rtc_device,
596#endif 630#endif
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index b00f68ac6bc9..d1682bb37509 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -46,6 +46,7 @@
46#include <asm/dma.h> 46#include <asm/dma.h>
47#include <asm/gpio.h> 47#include <asm/gpio.h>
48#include <asm/nand.h> 48#include <asm/nand.h>
49#include <asm/dpmc.h>
49#include <asm/portmux.h> 50#include <asm/portmux.h>
50#include <asm/mach/bf54x_keys.h> 51#include <asm/mach/bf54x_keys.h>
51#include <linux/input.h> 52#include <linux/input.h>
@@ -689,7 +690,38 @@ static struct platform_device bfin_gpios_device = {
689 .resource = &bfin_gpios_resources, 690 .resource = &bfin_gpios_resources,
690}; 691};
691 692
693static const unsigned int cclk_vlev_datasheet[] =
694{
695/*
696 * Internal VLEV BF54XSBBC1533
697 ****temporarily using these values until data sheet is updated
698 */
699 VRPAIR(VLEV_085, 150000000),
700 VRPAIR(VLEV_090, 250000000),
701 VRPAIR(VLEV_110, 276000000),
702 VRPAIR(VLEV_115, 301000000),
703 VRPAIR(VLEV_120, 525000000),
704 VRPAIR(VLEV_125, 550000000),
705 VRPAIR(VLEV_130, 600000000),
706};
707
708static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
709 .tuple_tab = cclk_vlev_datasheet,
710 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
711 .vr_settling_time = 25 /* us */,
712};
713
714static struct platform_device bfin_dpmc = {
715 .name = "bfin dpmc",
716 .dev = {
717 .platform_data = &bfin_dmpc_vreg_data,
718 },
719};
720
692static struct platform_device *ezkit_devices[] __initdata = { 721static struct platform_device *ezkit_devices[] __initdata = {
722
723 &bfin_dpmc,
724
693#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 725#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
694 &rtc_device, 726 &rtc_device,
695#endif 727#endif
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index 9fd580952fd8..466ef5929a25 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -33,12 +33,15 @@
33#include <linux/mtd/partitions.h> 33#include <linux/mtd/partitions.h>
34#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
36#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
36#include <linux/usb/isp1362.h> 37#include <linux/usb/isp1362.h>
38#endif
37#include <linux/ata_platform.h> 39#include <linux/ata_platform.h>
38#include <linux/irq.h> 40#include <linux/irq.h>
39#include <asm/dma.h> 41#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 42#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 43#include <asm/portmux.h>
44#include <asm/dpmc.h>
42 45
43/* 46/*
44 * Name the Board for the /proc/cpuinfo 47 * Name the Board for the /proc/cpuinfo
@@ -339,8 +342,37 @@ static struct platform_device bfin_pata_device = {
339}; 342};
340#endif 343#endif
341 344
345static const unsigned int cclk_vlev_datasheet[] =
346{
347 VRPAIR(VLEV_085, 250000000),
348 VRPAIR(VLEV_090, 300000000),
349 VRPAIR(VLEV_095, 313000000),
350 VRPAIR(VLEV_100, 350000000),
351 VRPAIR(VLEV_105, 400000000),
352 VRPAIR(VLEV_110, 444000000),
353 VRPAIR(VLEV_115, 450000000),
354 VRPAIR(VLEV_120, 475000000),
355 VRPAIR(VLEV_125, 500000000),
356 VRPAIR(VLEV_130, 600000000),
357};
358
359static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
360 .tuple_tab = cclk_vlev_datasheet,
361 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
362 .vr_settling_time = 25 /* us */,
363};
364
365static struct platform_device bfin_dpmc = {
366 .name = "bfin dpmc",
367 .dev = {
368 .platform_data = &bfin_dmpc_vreg_data,
369 },
370};
371
342static struct platform_device *cm_bf561_devices[] __initdata = { 372static struct platform_device *cm_bf561_devices[] __initdata = {
343 373
374 &bfin_dpmc,
375
344#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) 376#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
345 &hitachi_fb_device, 377 &hitachi_fb_device,
346#endif 378#endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 0d74b7d99209..61d8f7648b24 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -39,6 +39,7 @@
39#include <asm/dma.h> 39#include <asm/dma.h>
40#include <asm/bfin5xx_spi.h> 40#include <asm/bfin5xx_spi.h>
41#include <asm/portmux.h> 41#include <asm/portmux.h>
42#include <asm/dpmc.h>
42 43
43/* 44/*
44 * Name the Board for the /proc/cpuinfo 45 * Name the Board for the /proc/cpuinfo
@@ -443,7 +444,37 @@ static struct platform_device i2c_gpio_device = {
443}; 444};
444#endif 445#endif
445 446
447static const unsigned int cclk_vlev_datasheet[] =
448{
449 VRPAIR(VLEV_085, 250000000),
450 VRPAIR(VLEV_090, 300000000),
451 VRPAIR(VLEV_095, 313000000),
452 VRPAIR(VLEV_100, 350000000),
453 VRPAIR(VLEV_105, 400000000),
454 VRPAIR(VLEV_110, 444000000),
455 VRPAIR(VLEV_115, 450000000),
456 VRPAIR(VLEV_120, 475000000),
457 VRPAIR(VLEV_125, 500000000),
458 VRPAIR(VLEV_130, 600000000),
459};
460
461static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
462 .tuple_tab = cclk_vlev_datasheet,
463 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
464 .vr_settling_time = 25 /* us */,
465};
466
467static struct platform_device bfin_dpmc = {
468 .name = "bfin dpmc",
469 .dev = {
470 .platform_data = &bfin_dmpc_vreg_data,
471 },
472};
473
446static struct platform_device *ezkit_devices[] __initdata = { 474static struct platform_device *ezkit_devices[] __initdata = {
475
476 &bfin_dpmc,
477
447#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 478#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
448 &smc91x_device, 479 &smc91x_device,
449#endif 480#endif
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 393081e9b680..422bfee34adc 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -6,5 +6,6 @@ obj-y := \
6 cache.o cacheinit.o entry.o \ 6 cache.o cacheinit.o entry.o \
7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o 7 interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
8 8
9obj-$(CONFIG_PM) += pm.o dpmc.o 9obj-$(CONFIG_PM) += pm.o dpmc_modes.o
10obj-$(CONFIG_CPU_FREQ) += cpufreq.o 10obj-$(CONFIG_CPU_FREQ) += cpufreq.o
11obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index ed81e00d20e1..75cdad291e88 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -62,6 +62,14 @@ static struct bfin_dpm_state {
62 unsigned int tscale; /* change the divider on the core timer interrupt */ 62 unsigned int tscale; /* change the divider on the core timer interrupt */
63} dpm_state_table[3]; 63} dpm_state_table[3];
64 64
65/*
66 normalized to maximum frequncy offset for CYCLES,
67 used in time-ts cycles clock source, but could be used
68 somewhere also.
69 */
70unsigned long long __bfin_cycles_off;
71unsigned int __bfin_cycles_mod;
72
65/**************************************************************************/ 73/**************************************************************************/
66 74
67static unsigned int bfin_getfreq(unsigned int cpu) 75static unsigned int bfin_getfreq(unsigned int cpu)
@@ -80,6 +88,7 @@ static int bfin_target(struct cpufreq_policy *policy,
80 unsigned int index, plldiv, tscale; 88 unsigned int index, plldiv, tscale;
81 unsigned long flags, cclk_hz; 89 unsigned long flags, cclk_hz;
82 struct cpufreq_freqs freqs; 90 struct cpufreq_freqs freqs;
91 cycles_t cycles;
83 92
84 if (cpufreq_frequency_table_target(policy, bfin_freq_table, 93 if (cpufreq_frequency_table_target(policy, bfin_freq_table,
85 target_freq, relation, &index)) 94 target_freq, relation, &index))
@@ -101,8 +110,14 @@ static int bfin_target(struct cpufreq_policy *policy,
101 bfin_write_PLL_DIV(plldiv); 110 bfin_write_PLL_DIV(plldiv);
102 /* we have to adjust the core timer, because it is using cclk */ 111 /* we have to adjust the core timer, because it is using cclk */
103 bfin_write_TSCALE(tscale); 112 bfin_write_TSCALE(tscale);
113 cycles = get_cycles();
104 SSYNC(); 114 SSYNC();
115 cycles += 10; /* ~10 cycles we loose after get_cycles() */
116 __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
117 __bfin_cycles_mod = index;
105 local_irq_restore(flags); 118 local_irq_restore(flags);
119 /* TODO: just test case for cycles clock source, remove later */
120 pr_debug("cpufreq: done\n");
106 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 121 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
107 122
108 return 0; 123 return 0;
@@ -119,22 +134,13 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
119 unsigned long cclk, sclk, csel, min_cclk; 134 unsigned long cclk, sclk, csel, min_cclk;
120 int index; 135 int index;
121 136
122#ifdef CONFIG_CYCLES_CLOCKSOURCE
123/*
124 * Clocksource CYCLES is still CONTINUOUS but not longer MONOTONIC in case we enable
125 * CPU frequency scaling, since CYCLES runs off Core Clock.
126 */
127 printk(KERN_WARNING "CPU frequency scaling not supported: Clocksource not suitable\n"
128 return -ENODEV;
129#endif
130
131 if (policy->cpu != 0) 137 if (policy->cpu != 0)
132 return -EINVAL; 138 return -EINVAL;
133 139
134 cclk = get_cclk(); 140 cclk = get_cclk();
135 sclk = get_sclk(); 141 sclk = get_sclk();
136 142
137#if ANOMALY_05000273 143#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
138 min_cclk = sclk * 2; 144 min_cclk = sclk * 2;
139#else 145#else
140 min_cclk = sclk; 146 min_cclk = sclk;
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
new file mode 100644
index 000000000000..02c7efd1bcf4
--- /dev/null
+++ b/arch/blackfin/mach-common/dpmc.c
@@ -0,0 +1,137 @@
1/*
2 * Copyright 2008 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
6
7#include <linux/cdev.h>
8#include <linux/device.h>
9#include <linux/errno.h>
10#include <linux/fs.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/platform_device.h>
14#include <linux/types.h>
15#include <linux/cpufreq.h>
16
17#include <asm/delay.h>
18#include <asm/dpmc.h>
19
20#define DRIVER_NAME "bfin dpmc"
21
22#define dprintk(msg...) \
23 cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, DRIVER_NAME, msg)
24
25struct bfin_dpmc_platform_data *pdata;
26
27/**
28 * bfin_set_vlev - Update VLEV field in VR_CTL Reg.
29 * Avoid BYPASS sequence
30 */
31static void bfin_set_vlev(unsigned int vlev)
32{
33 unsigned pll_lcnt;
34
35 pll_lcnt = bfin_read_PLL_LOCKCNT();
36
37 bfin_write_PLL_LOCKCNT(1);
38 bfin_write_VR_CTL((bfin_read_VR_CTL() & ~VLEV) | vlev);
39 bfin_write_PLL_LOCKCNT(pll_lcnt);
40}
41
42/**
43 * bfin_get_vlev - Get CPU specific VLEV from platform device data
44 */
45static unsigned int bfin_get_vlev(unsigned int freq)
46{
47 int i;
48
49 if (!pdata)
50 goto err_out;
51
52 freq >>= 16;
53
54 for (i = 0; i < pdata->tabsize; i++)
55 if (freq <= (pdata->tuple_tab[i] & 0xFFFF))
56 return pdata->tuple_tab[i] >> 16;
57
58err_out:
59 printk(KERN_WARNING "DPMC: No suitable CCLK VDDINT voltage pair found\n");
60 return VLEV_120;
61}
62
63#ifdef CONFIG_CPU_FREQ
64static int
65vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
66{
67 struct cpufreq_freqs *freq = data;
68
69 if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) {
70 bfin_set_vlev(bfin_get_vlev(freq->new));
71 udelay(pdata->vr_settling_time); /* Wait until Volatge settled */
72
73 } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)
74 bfin_set_vlev(bfin_get_vlev(freq->new));
75
76 return 0;
77}
78
79static struct notifier_block vreg_cpufreq_notifier_block = {
80 .notifier_call = vreg_cpufreq_notifier
81};
82#endif /* CONFIG_CPU_FREQ */
83
84/**
85 * bfin_dpmc_probe -
86 *
87 */
88static int __devinit bfin_dpmc_probe(struct platform_device *pdev)
89{
90 if (pdev->dev.platform_data)
91 pdata = pdev->dev.platform_data;
92 else
93 return -EINVAL;
94
95 return cpufreq_register_notifier(&vreg_cpufreq_notifier_block,
96 CPUFREQ_TRANSITION_NOTIFIER);
97}
98
99/**
100 * bfin_dpmc_remove -
101 */
102static int __devexit bfin_dpmc_remove(struct platform_device *pdev)
103{
104 pdata = NULL;
105 return cpufreq_unregister_notifier(&vreg_cpufreq_notifier_block,
106 CPUFREQ_TRANSITION_NOTIFIER);
107}
108
109struct platform_driver bfin_dpmc_device_driver = {
110 .probe = bfin_dpmc_probe,
111 .remove = __devexit_p(bfin_dpmc_remove),
112 .driver = {
113 .name = DRIVER_NAME,
114 }
115};
116
117/**
118 * bfin_dpmc_init - Init driver
119 */
120static int __init bfin_dpmc_init(void)
121{
122 return platform_driver_register(&bfin_dpmc_device_driver);
123}
124module_init(bfin_dpmc_init);
125
126/**
127 * bfin_dpmc_exit - break down driver
128 */
129static void __exit bfin_dpmc_exit(void)
130{
131 platform_driver_unregister(&bfin_dpmc_device_driver);
132}
133module_exit(bfin_dpmc_exit);
134
135MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
136MODULE_DESCRIPTION("cpu power management driver for Blackfin");
137MODULE_LICENSE("GPL");
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc_modes.S
index 9d45aa3265b1..b7981d31c392 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -1,30 +1,7 @@
1/* 1/*
2 * File: arch/blackfin/mach-common/dpmc.S 2 * Copyright 2004-2008 Analog Devices Inc.
3 * Based on:
4 * Author: LG Soft India
5 * 3 *
6 * Created: ? 4 * Licensed under the GPL-2 or later.
7 * Description: Watchdog Timer APIs
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */ 5 */
29 6
30#include <linux/linkage.h> 7#include <linux/linkage.h>
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index f2fb87e9a46e..038f70e0be65 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -151,26 +151,62 @@ ENTRY(_ex_soft_bp)
151ENDPROC(_ex_soft_bp) 151ENDPROC(_ex_soft_bp)
152 152
153ENTRY(_ex_single_step) 153ENTRY(_ex_single_step)
154 /* If we just returned from an interrupt, the single step event is
155 for the RTI instruction. */
154 r7 = retx; 156 r7 = retx;
155 r6 = reti; 157 r6 = reti;
156 cc = r7 == r6; 158 cc = r7 == r6;
157 if cc jump _bfin_return_from_exception 159 if cc jump _bfin_return_from_exception;
158 r7 = syscfg;
159 bitclr (r7, 0);
160 syscfg = R7;
161 160
161 /* If we were in user mode, do the single step normally. */
162 p5.l = lo(IPEND); 162 p5.l = lo(IPEND);
163 p5.h = hi(IPEND); 163 p5.h = hi(IPEND);
164 r6 = [p5]; 164 r6 = [p5];
165 cc = bittst(r6, 5); 165 r7 = 0xffe0 (z);
166 if !cc jump _ex_trap_c; 166 r7 = r7 & r6;
167 p4.l = lo(EVT5); 167 cc = r7 == 0;
168 p4.h = hi(EVT5); 168 if !cc jump 1f;
169 r6.h = _exception_to_level5; 169
170 r6.l = _exception_to_level5; 170 /* Single stepping only a single instruction, so clear the trace
171 r7 = [p4]; 171 * bit here. */
172 cc = r6 == r7; 172 r7 = syscfg;
173 if !cc jump _ex_trap_c; 173 bitclr (r7, 0);
174 syscfg = R7;
175 jump _ex_trap_c;
176
1771:
178 /*
179 * We were in an interrupt handler. By convention, all of them save
180 * SYSCFG with their first instruction, so by checking whether our
181 * RETX points at the entry point, we can determine whether to allow
182 * a single step, or whether to clear SYSCFG.
183 *
184 * First, find out the interrupt level and the event vector for it.
185 */
186 p5.l = lo(EVT0);
187 p5.h = hi(EVT0);
188 p5 += -4;
1892:
190 r7 = rot r7 by -1;
191 p5 += 4;
192 if !cc jump 2b;
193
194 /* What we actually do is test for the _second_ instruction in the
195 * IRQ handler. That way, if there are insns following the restore
196 * of SYSCFG after leaving the handler, we will not turn off SYSCFG
197 * for them. */
198
199 r7 = [p5];
200 r7 += 2;
201 r6 = RETX;
202 cc = R7 == R6;
203 if !cc jump _bfin_return_from_exception;
204
205 r7 = syscfg;
206 bitclr (r7, 0);
207 syscfg = R7;
208
209 /* Fall through to _bfin_return_from_exception. */
174ENDPROC(_ex_single_step) 210ENDPROC(_ex_single_step)
175 211
176ENTRY(_bfin_return_from_exception) 212ENTRY(_bfin_return_from_exception)
@@ -234,20 +270,26 @@ ENTRY(_ex_trap_c)
234 p5.l = _saved_icplb_fault_addr; 270 p5.l = _saved_icplb_fault_addr;
235 [p5] = r7; 271 [p5] = r7;
236 272
237 p4.l = __retx; 273 p4.l = _excpt_saved_stuff;
238 p4.h = __retx; 274 p4.h = _excpt_saved_stuff;
275
239 r6 = retx; 276 r6 = retx;
240 [p4] = r6; 277 [p4] = r6;
241 p4.l = lo(SAFE_USER_INSTRUCTION); 278
242 p4.h = hi(SAFE_USER_INSTRUCTION); 279 r6 = SYSCFG;
243 retx = p4; 280 [p4 + 4] = r6;
281 BITCLR(r6, 0);
282 SYSCFG = r6;
244 283
245 /* Disable all interrupts, but make sure level 5 is enabled so 284 /* Disable all interrupts, but make sure level 5 is enabled so
246 * we can switch to that level. Save the old mask. */ 285 * we can switch to that level. Save the old mask. */
247 cli r6; 286 cli r6;
248 p4.l = _excpt_saved_imask; 287 [p4 + 8] = r6;
249 p4.h = _excpt_saved_imask; 288
250 [p4] = r6; 289 p4.l = lo(SAFE_USER_INSTRUCTION);
290 p4.h = hi(SAFE_USER_INSTRUCTION);
291 retx = p4;
292
251 r6 = 0x3f; 293 r6 = 0x3f;
252 sti r6; 294 sti r6;
253 295
@@ -295,6 +337,11 @@ ENTRY(_double_fault)
295 */ 337 */
296 SAVE_ALL_SYS 338 SAVE_ALL_SYS
297 339
340 /* The dumping functions expect the return address in the RETI
341 * slot. */
342 r6 = retx;
343 [sp + PT_PC] = r6;
344
298 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ 345 r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */
299 SP += -12; 346 SP += -12;
300 call _double_fault_c; 347 call _double_fault_c;
@@ -307,16 +354,17 @@ ENDPROC(_double_fault)
307ENTRY(_exception_to_level5) 354ENTRY(_exception_to_level5)
308 SAVE_ALL_SYS 355 SAVE_ALL_SYS
309 356
310 p4.l = __retx; 357 p4.l = _excpt_saved_stuff;
311 p4.h = __retx; 358 p4.h = _excpt_saved_stuff;
312 r6 = [p4]; 359 r6 = [p4];
313 [sp + PT_PC] = r6; 360 [sp + PT_PC] = r6;
314 361
362 r6 = [p4 + 4];
363 [sp + PT_SYSCFG] = r6;
364
315 /* Restore interrupt mask. We haven't pushed RETI, so this 365 /* Restore interrupt mask. We haven't pushed RETI, so this
316 * doesn't enable interrupts until we return from this handler. */ 366 * doesn't enable interrupts until we return from this handler. */
317 p4.l = _excpt_saved_imask; 367 r6 = [p4 + 8];
318 p4.h = _excpt_saved_imask;
319 r6 = [p4];
320 sti r6; 368 sti r6;
321 369
322 /* Restore the hardware error vector. */ 370 /* Restore the hardware error vector. */
@@ -1344,7 +1392,14 @@ ENTRY(_sys_call_table)
1344 .rept NR_syscalls-(.-_sys_call_table)/4 1392 .rept NR_syscalls-(.-_sys_call_table)/4
1345 .long _sys_ni_syscall 1393 .long _sys_ni_syscall
1346 .endr 1394 .endr
1347_excpt_saved_imask: 1395
1396 /*
1397 * Used to save the real RETX, IMASK and SYSCFG when temporarily
1398 * storing safe values across the transition from exception to IRQ5.
1399 */
1400_excpt_saved_stuff:
1401 .long 0;
1402 .long 0;
1348 .long 0; 1403 .long 0;
1349 1404
1350_exception_stack: 1405_exception_stack:
@@ -1358,7 +1413,3 @@ _exception_stack_top:
1358_last_cplb_fault_retx: 1413_last_cplb_fault_retx:
1359 .long 0; 1414 .long 0;
1360#endif 1415#endif
1361 /* Used to save the real RETX when temporarily storing a safe
1362 * return address. */
1363__retx:
1364 .long 0;
diff --git a/arch/cris/kernel/sys_cris.c b/arch/cris/kernel/sys_cris.c
index 8b9984197edc..a79fbd87021b 100644
--- a/arch/cris/kernel/sys_cris.c
+++ b/arch/cris/kernel/sys_cris.c
@@ -27,25 +27,6 @@
27#include <asm/uaccess.h> 27#include <asm/uaccess.h>
28#include <asm/segment.h> 28#include <asm/segment.h>
29 29
30/*
31 * sys_pipe() is the normal C calling standard for creating
32 * a pipe. It's not the way Unix traditionally does this, though.
33 */
34asmlinkage int sys_pipe(unsigned long __user * fildes)
35{
36 int fd[2];
37 int error;
38
39 lock_kernel();
40 error = do_pipe(fd);
41 unlock_kernel();
42 if (!error) {
43 if (copy_to_user(fildes, fd, 2*sizeof(int)))
44 error = -EFAULT;
45 }
46 return error;
47}
48
49/* common code for old and new mmaps */ 30/* common code for old and new mmaps */
50static inline long 31static inline long
51do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 32do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
diff --git a/arch/m32r/kernel/sys_m32r.c b/arch/m32r/kernel/sys_m32r.c
index 6d7a80fdad48..305ac852bbed 100644
--- a/arch/m32r/kernel/sys_m32r.c
+++ b/arch/m32r/kernel/sys_m32r.c
@@ -76,26 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
76 return oldval; 76 return oldval;
77} 77}
78 78
79/*
80 * sys_pipe() is the normal C calling standard for creating
81 * a pipe. It's not the way Unix traditionally does this, though.
82 */
83asmlinkage int
84sys_pipe(unsigned long r0, unsigned long r1, unsigned long r2,
85 unsigned long r3, unsigned long r4, unsigned long r5,
86 unsigned long r6, struct pt_regs regs)
87{
88 int fd[2];
89 int error;
90
91 error = do_pipe(fd);
92 if (!error) {
93 if (copy_to_user((void __user *)r0, fd, 2*sizeof(int)))
94 error = -EFAULT;
95 }
96 return error;
97}
98
99asmlinkage long sys_mmap2(unsigned long addr, unsigned long len, 79asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
100 unsigned long prot, unsigned long flags, 80 unsigned long prot, unsigned long flags,
101 unsigned long fd, unsigned long pgoff) 81 unsigned long fd, unsigned long pgoff)
diff --git a/arch/m68k/kernel/traps.c b/arch/m68k/kernel/traps.c
index fd4858e2dd63..75b8340b254b 100644
--- a/arch/m68k/kernel/traps.c
+++ b/arch/m68k/kernel/traps.c
@@ -468,15 +468,26 @@ static inline void access_error040(struct frame *fp)
468 * (if do_page_fault didn't fix the mapping, 468 * (if do_page_fault didn't fix the mapping,
469 * the writeback won't do good) 469 * the writeback won't do good)
470 */ 470 */
471disable_wb:
471#ifdef DEBUG 472#ifdef DEBUG
472 printk(".. disabling wb2\n"); 473 printk(".. disabling wb2\n");
473#endif 474#endif
474 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr) 475 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
475 fp->un.fmt7.wb2s &= ~WBV_040; 476 fp->un.fmt7.wb2s &= ~WBV_040;
477 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr)
478 fp->un.fmt7.wb3s &= ~WBV_040;
476 } 479 }
477 } else if (send_fault_sig(&fp->ptregs) > 0) { 480 } else {
478 printk("68040 access error, ssw=%x\n", ssw); 481 /* In case of a bus error we either kill the process or expect
479 trap_c(fp); 482 * the kernel to catch the fault, which then is also responsible
483 * for cleaning up the mess.
484 */
485 current->thread.signo = SIGBUS;
486 current->thread.faddr = fp->un.fmt7.faddr;
487 if (send_fault_sig(&fp->ptregs) >= 0)
488 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw,
489 fp->un.fmt7.faddr);
490 goto disable_wb;
480 } 491 }
481 492
482 do_040writebacks(fp); 493 do_040writebacks(fp);
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index 735a49b4b936..ad3e3bacae39 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -48,9 +48,6 @@
48struct mac_booter_data mac_bi_data; 48struct mac_booter_data mac_bi_data;
49int mac_bisize = sizeof mac_bi_data; 49int mac_bisize = sizeof mac_bi_data;
50 50
51struct mac_hw_present mac_hw_present;
52EXPORT_SYMBOL(mac_hw_present);
53
54/* New m68k bootinfo stuff and videobase */ 51/* New m68k bootinfo stuff and videobase */
55 52
56extern int m68k_num_memory; 53extern int m68k_num_memory;
@@ -817,27 +814,6 @@ void __init mac_identify(void)
817 m68k_ramdisk.addr, m68k_ramdisk.size); 814 m68k_ramdisk.addr, m68k_ramdisk.size);
818#endif 815#endif
819 816
820 /*
821 * TODO: set the various fields in macintosh_config->hw_present here!
822 */
823 switch (macintosh_config->scsi_type) {
824 case MAC_SCSI_OLD:
825 MACHW_SET(MAC_SCSI_80);
826 break;
827 case MAC_SCSI_QUADRA:
828 case MAC_SCSI_QUADRA2:
829 case MAC_SCSI_QUADRA3:
830 MACHW_SET(MAC_SCSI_96);
831 if ((macintosh_config->ident == MAC_MODEL_Q900) ||
832 (macintosh_config->ident == MAC_MODEL_Q950))
833 MACHW_SET(MAC_SCSI_96_2);
834 break;
835 default:
836 printk(KERN_WARNING "config.c: wtf: unknown scsi, using 53c80\n");
837 MACHW_SET(MAC_SCSI_80);
838 break;
839 }
840
841 iop_init(); 817 iop_init();
842 via_init(); 818 via_init();
843 oss_init(); 819 oss_init();
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index 07eb4c4bab82..8e8441587c22 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -671,6 +671,9 @@ config ROMKERNEL
671 671
672endchoice 672endchoice
673 673
674if COLDFIRE
675source "kernel/Kconfig.preempt"
676endif
674source "mm/Kconfig" 677source "mm/Kconfig"
675 678
676endmenu 679endmenu
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index 5592e0bf951f..93e69236ed6f 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -114,6 +114,16 @@ SECTIONS {
114 *(__kcrctab_gpl) 114 *(__kcrctab_gpl)
115 __stop___kcrctab_gpl = .; 115 __stop___kcrctab_gpl = .;
116 116
117 /* Kernel symbol table: Normal unused symbols */
118 __start___kcrctab_unused = .;
119 *(__kcrctab_unused)
120 __stop___kcrctab_unused = .;
121
122 /* Kernel symbol table: GPL-only unused symbols */
123 __start___kcrctab_unused_gpl = .;
124 *(__kcrctab_unused_gpl)
125 __stop___kcrctab_unused_gpl = .;
126
117 /* Kernel symbol table: GPL-future symbols */ 127 /* Kernel symbol table: GPL-future symbols */
118 __start___kcrctab_gpl_future = .; 128 __start___kcrctab_gpl_future = .;
119 *(__kcrctab_gpl_future) 129 *(__kcrctab_gpl_future)
diff --git a/arch/mips/au1000/common/Makefile b/arch/mips/au1000/common/Makefile
index 90e2d7a46e8e..dd0e19dacfcf 100644
--- a/arch/mips/au1000/common/Makefile
+++ b/arch/mips/au1000/common/Makefile
@@ -1,9 +1,8 @@
1# 1#
2# Copyright 2000 MontaVista Software Inc. 2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com
5# 4#
6# Makefile for the Alchemy Au1000 CPU, generic files. 5# Makefile for the Alchemy Au1xx0 CPUs, generic files.
7# 6#
8 7
9obj-y += prom.o irq.o puts.o time.o reset.o \ 8obj-y += prom.o irq.o puts.o time.o reset.o \
diff --git a/arch/mips/au1000/common/au1xxx_irqmap.c b/arch/mips/au1000/common/au1xxx_irqmap.c
index 37a10a01de9d..c7ca1596394c 100644
--- a/arch/mips/au1000/common/au1xxx_irqmap.c
+++ b/arch/mips/au1000/common/au1xxx_irqmap.c
@@ -40,20 +40,20 @@
40struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = { 40struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
41 41
42#if defined(CONFIG_SOC_AU1000) 42#if defined(CONFIG_SOC_AU1000)
43 { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, 43 { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
44 { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, 44 { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0 },
45 { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0}, 45 { AU1000_UART2_INT, INTC_INT_HIGH_LEVEL, 0 },
46 { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, 46 { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0 },
47 { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0}, 47 { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0 },
48 { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0}, 48 { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0 },
49 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, 49 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 },
50 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, 50 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 },
51 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, 51 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 },
52 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, 52 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 },
53 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, 53 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 },
54 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, 54 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 },
55 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, 55 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 },
56 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, 56 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 },
57 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, 57 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
58 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 58 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
59 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 59 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -62,32 +62,32 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
62 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 62 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
63 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 63 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
64 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, 64 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
65 { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, 65 { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0 },
66 { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, 66 { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0 },
67 { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, 67 { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
68 { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, 68 { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
69 { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, 69 { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
70 { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, 70 { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
71 { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, 71 { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
72 { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, 72 { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
73 { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, 73 { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
74 74
75#elif defined(CONFIG_SOC_AU1500) 75#elif defined(CONFIG_SOC_AU1500)
76 76
77 { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, 77 { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
78 { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, 78 { AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
79 { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, 79 { AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
80 { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, 80 { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0 },
81 { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, 81 { AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
82 { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, 82 { AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
83 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, 83 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 },
84 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, 84 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 },
85 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, 85 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 },
86 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, 86 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 },
87 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, 87 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 },
88 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, 88 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 },
89 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, 89 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 },
90 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, 90 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 },
91 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, 91 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
92 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 92 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
93 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 93 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -100,26 +100,26 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
100 { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, 100 { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
101 { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, 101 { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
102 { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, 102 { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
103 { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, 103 { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
104 { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, 104 { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
105 { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, 105 { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
106 106
107#elif defined(CONFIG_SOC_AU1100) 107#elif defined(CONFIG_SOC_AU1100)
108 108
109 { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, 109 { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
110 { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, 110 { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0 },
111 { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0}, 111 { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0 },
112 { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, 112 { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0 },
113 { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0}, 113 { AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0 },
114 { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0}, 114 { AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0 },
115 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0}, 115 { AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0 },
116 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0}, 116 { AU1000_DMA_INT_BASE+1, INTC_INT_HIGH_LEVEL, 0 },
117 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0}, 117 { AU1000_DMA_INT_BASE+2, INTC_INT_HIGH_LEVEL, 0 },
118 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0}, 118 { AU1000_DMA_INT_BASE+3, INTC_INT_HIGH_LEVEL, 0 },
119 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0}, 119 { AU1000_DMA_INT_BASE+4, INTC_INT_HIGH_LEVEL, 0 },
120 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0}, 120 { AU1000_DMA_INT_BASE+5, INTC_INT_HIGH_LEVEL, 0 },
121 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0}, 121 { AU1000_DMA_INT_BASE+6, INTC_INT_HIGH_LEVEL, 0 },
122 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0}, 122 { AU1000_DMA_INT_BASE+7, INTC_INT_HIGH_LEVEL, 0 },
123 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, 123 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
124 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 124 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
125 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 125 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -128,33 +128,33 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
128 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 128 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
129 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 129 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
130 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, 130 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
131 { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0}, 131 { AU1000_IRDA_TX_INT, INTC_INT_HIGH_LEVEL, 0 },
132 { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0}, 132 { AU1000_IRDA_RX_INT, INTC_INT_HIGH_LEVEL, 0 },
133 { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, 133 { AU1000_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
134 { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, 134 { AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
135 { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, 135 { AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
136 { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 }, 136 { AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
137 { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, 137 { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
138 /*{ AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0},*/ 138 /* { AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0 }, */
139 { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0}, 139 { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0 },
140 { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 }, 140 { AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
141 141
142#elif defined(CONFIG_SOC_AU1550) 142#elif defined(CONFIG_SOC_AU1550)
143 143
144 { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, 144 { AU1550_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
145 { AU1550_PCI_INTA, INTC_INT_LOW_LEVEL, 0 }, 145 { AU1550_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
146 { AU1550_PCI_INTB, INTC_INT_LOW_LEVEL, 0 }, 146 { AU1550_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
147 { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0}, 147 { AU1550_DDMA_INT, INTC_INT_HIGH_LEVEL, 0 },
148 { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0}, 148 { AU1550_CRYPTO_INT, INTC_INT_HIGH_LEVEL, 0 },
149 { AU1550_PCI_INTC, INTC_INT_LOW_LEVEL, 0 }, 149 { AU1550_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
150 { AU1550_PCI_INTD, INTC_INT_LOW_LEVEL, 0 }, 150 { AU1550_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
151 { AU1550_PCI_RST_INT, INTC_INT_LOW_LEVEL, 0 }, 151 { AU1550_PCI_RST_INT, INTC_INT_LOW_LEVEL, 0 },
152 { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, 152 { AU1550_UART1_INT, INTC_INT_HIGH_LEVEL, 0 },
153 { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0}, 153 { AU1550_UART3_INT, INTC_INT_HIGH_LEVEL, 0 },
154 { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0}, 154 { AU1550_PSC0_INT, INTC_INT_HIGH_LEVEL, 0 },
155 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, 155 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0 },
156 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0}, 156 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0 },
157 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0}, 157 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0 },
158 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, 158 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
159 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 159 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
160 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 160 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -163,26 +163,26 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
163 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 163 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
164 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 164 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
165 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, 165 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
166 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0}, 166 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0 },
167 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 }, 167 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
168 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 }, 168 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
169 { AU1550_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 }, 169 { AU1550_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
170 { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, 170 { AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
171 { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0}, 171 { AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0 },
172 172
173#elif defined(CONFIG_SOC_AU1200) 173#elif defined(CONFIG_SOC_AU1200)
174 174
175 { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0}, 175 { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0 },
176 { AU1200_SWT_INT, INTC_INT_RISE_EDGE, 0 }, 176 { AU1200_SWT_INT, INTC_INT_RISE_EDGE, 0 },
177 { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0}, 177 { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0 },
178 { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0}, 178 { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0 },
179 { AU1200_MAE_BE_INT, INTC_INT_HIGH_LEVEL, 0 }, 179 { AU1200_MAE_BE_INT, INTC_INT_HIGH_LEVEL, 0 },
180 { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0}, 180 { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0 },
181 { AU1200_MAE_FE_INT, INTC_INT_HIGH_LEVEL, 0 }, 181 { AU1200_MAE_FE_INT, INTC_INT_HIGH_LEVEL, 0 },
182 { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0}, 182 { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0 },
183 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0}, 183 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0 },
184 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0}, 184 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0 },
185 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0}, 185 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0 },
186 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 }, 186 { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
187 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 187 { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
188 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 188 { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
@@ -191,10 +191,10 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
191 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 }, 191 { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
192 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 }, 192 { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
193 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 }, 193 { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
194 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0}, 194 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0 },
195 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 }, 195 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
196 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0}, 196 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0 },
197 { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0}, 197 { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0 },
198 198
199#else 199#else
200#error "Error: Unknown Alchemy SOC" 200#error "Error: Unknown Alchemy SOC"
@@ -203,4 +203,3 @@ struct au1xxx_irqmap __initdata au1xxx_ic0_map[] = {
203}; 203};
204 204
205int __initdata au1xxx_ic0_nr_irqs = ARRAY_SIZE(au1xxx_ic0_map); 205int __initdata au1xxx_ic0_nr_irqs = ARRAY_SIZE(au1xxx_ic0_map);
206
diff --git a/arch/mips/au1000/common/clocks.c b/arch/mips/au1000/common/clocks.c
index 3ce6cace0eb0..46f8ee0e2657 100644
--- a/arch/mips/au1000/common/clocks.c
+++ b/arch/mips/au1000/common/clocks.c
@@ -1,10 +1,9 @@
1/* 1/*
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Simple Au1000 clocks routines. 3 * Simple Au1xx0 clocks routines.
4 * 4 *
5 * Copyright 2001 MontaVista Software Inc. 5 * Copyright 2001, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -30,8 +29,8 @@
30#include <linux/module.h> 29#include <linux/module.h>
31#include <asm/mach-au1x00/au1000.h> 30#include <asm/mach-au1x00/au1000.h>
32 31
33static unsigned int au1x00_clock; // Hz 32static unsigned int au1x00_clock; /* Hz */
34static unsigned int lcd_clock; // KHz 33static unsigned int lcd_clock; /* KHz */
35static unsigned long uart_baud_base; 34static unsigned long uart_baud_base;
36 35
37/* 36/*
@@ -47,8 +46,6 @@ unsigned int get_au1x00_speed(void)
47 return au1x00_clock; 46 return au1x00_clock;
48} 47}
49 48
50
51
52/* 49/*
53 * The UART baud base is not known at compile time ... if 50 * The UART baud base is not known at compile time ... if
54 * we want to be able to use the same code on different 51 * we want to be able to use the same code on different
@@ -73,24 +70,23 @@ void set_au1x00_uart_baud_base(unsigned long new_baud_base)
73void set_au1x00_lcd_clock(void) 70void set_au1x00_lcd_clock(void)
74{ 71{
75 unsigned int static_cfg0; 72 unsigned int static_cfg0;
76 unsigned int sys_busclk = 73 unsigned int sys_busclk = (get_au1x00_speed() / 1000) /
77 (get_au1x00_speed()/1000) / 74 ((int)(au_readl(SYS_POWERCTRL) & 0x03) + 2);
78 ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2);
79 75
80 static_cfg0 = au_readl(MEM_STCFG0); 76 static_cfg0 = au_readl(MEM_STCFG0);
81 77
82 if (static_cfg0 & (1<<11)) 78 if (static_cfg0 & (1 << 11))
83 lcd_clock = sys_busclk / 5; /* note: BCLK switching fails with D5 */ 79 lcd_clock = sys_busclk / 5; /* note: BCLK switching fails with D5 */
84 else 80 else
85 lcd_clock = sys_busclk / 4; 81 lcd_clock = sys_busclk / 4;
86 82
87 if (lcd_clock > 50000) /* Epson MAX */ 83 if (lcd_clock > 50000) /* Epson MAX */
88 printk("warning: LCD clock too high (%d KHz)\n", lcd_clock); 84 printk(KERN_WARNING "warning: LCD clock too high (%u KHz)\n",
85 lcd_clock);
89} 86}
90 87
91unsigned int get_au1x00_lcd_clock(void) 88unsigned int get_au1x00_lcd_clock(void)
92{ 89{
93 return lcd_clock; 90 return lcd_clock;
94} 91}
95
96EXPORT_SYMBOL(get_au1x00_lcd_clock); 92EXPORT_SYMBOL(get_au1x00_lcd_clock);
diff --git a/arch/mips/au1000/common/cputable.c b/arch/mips/au1000/common/cputable.c
index 8c93a05d7382..ba6430bc2d03 100644
--- a/arch/mips/au1000/common/cputable.c
+++ b/arch/mips/au1000/common/cputable.c
@@ -14,7 +14,7 @@
14 14
15#include <asm/mach-au1x00/au1000.h> 15#include <asm/mach-au1x00/au1000.h>
16 16
17struct cpu_spec* cur_cpu_spec[NR_CPUS]; 17struct cpu_spec *cur_cpu_spec[NR_CPUS];
18 18
19/* With some thought, we can probably use the mask to reduce the 19/* With some thought, we can probably use the mask to reduce the
20 * size of the table. 20 * size of the table.
@@ -39,8 +39,7 @@ struct cpu_spec cpu_specs[] = {
39 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0, 0 } 39 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0, 0 }
40}; 40};
41 41
42void 42void set_cpuspec(void)
43set_cpuspec(void)
44{ 43{
45 struct cpu_spec *sp; 44 struct cpu_spec *sp;
46 u32 prid; 45 u32 prid;
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 53377dfc0640..42d555236de1 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -53,12 +53,11 @@
53 */ 53 */
54static DEFINE_SPINLOCK(au1xxx_dbdma_spin_lock); 54static DEFINE_SPINLOCK(au1xxx_dbdma_spin_lock);
55 55
56/* I couldn't find a macro that did this...... 56/* I couldn't find a macro that did this... */
57*/
58#define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1)) 57#define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1))
59 58
60static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE; 59static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
61static int dbdma_initialized=0; 60static int dbdma_initialized;
62static void au1xxx_dbdma_init(void); 61static void au1xxx_dbdma_init(void);
63 62
64static dbdev_tab_t dbdev_tab[] = { 63static dbdev_tab_t dbdev_tab[] = {
@@ -149,7 +148,7 @@ static dbdev_tab_t dbdev_tab[] = {
149 148
150 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, 149 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
151 150
152#endif // CONFIG_SOC_AU1200 151#endif /* CONFIG_SOC_AU1200 */
153 152
154 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 153 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
155 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, 154 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
@@ -177,8 +176,7 @@ static dbdev_tab_t dbdev_tab[] = {
177 176
178static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS]; 177static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS];
179 178
180static dbdev_tab_t * 179static dbdev_tab_t *find_dbdev_id(u32 id)
181find_dbdev_id(u32 id)
182{ 180{
183 int i; 181 int i;
184 dbdev_tab_t *p; 182 dbdev_tab_t *p;
@@ -190,29 +188,27 @@ find_dbdev_id(u32 id)
190 return NULL; 188 return NULL;
191} 189}
192 190
193void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp) 191void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp)
194{ 192{
195 return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 193 return phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
196} 194}
197EXPORT_SYMBOL(au1xxx_ddma_get_nextptr_virt); 195EXPORT_SYMBOL(au1xxx_ddma_get_nextptr_virt);
198 196
199u32 197u32 au1xxx_ddma_add_device(dbdev_tab_t *dev)
200au1xxx_ddma_add_device(dbdev_tab_t *dev)
201{ 198{
202 u32 ret = 0; 199 u32 ret = 0;
203 dbdev_tab_t *p=NULL; 200 dbdev_tab_t *p;
204 static u16 new_id=0x1000; 201 static u16 new_id = 0x1000;
205 202
206 p = find_dbdev_id(~0); 203 p = find_dbdev_id(~0);
207 if ( NULL != p ) 204 if (NULL != p) {
208 {
209 memcpy(p, dev, sizeof(dbdev_tab_t)); 205 memcpy(p, dev, sizeof(dbdev_tab_t));
210 p->dev_id = DSCR_DEV2CUSTOM_ID(new_id, dev->dev_id); 206 p->dev_id = DSCR_DEV2CUSTOM_ID(new_id, dev->dev_id);
211 ret = p->dev_id; 207 ret = p->dev_id;
212 new_id++; 208 new_id++;
213#if 0 209#if 0
214 printk("add_device: id:%x flags:%x padd:%x\n", 210 printk(KERN_DEBUG "add_device: id:%x flags:%x padd:%x\n",
215 p->dev_id, p->dev_flags, p->dev_physaddr ); 211 p->dev_id, p->dev_flags, p->dev_physaddr);
216#endif 212#endif
217 } 213 }
218 214
@@ -220,10 +216,8 @@ au1xxx_ddma_add_device(dbdev_tab_t *dev)
220} 216}
221EXPORT_SYMBOL(au1xxx_ddma_add_device); 217EXPORT_SYMBOL(au1xxx_ddma_add_device);
222 218
223/* Allocate a channel and return a non-zero descriptor if successful. 219/* Allocate a channel and return a non-zero descriptor if successful. */
224*/ 220u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
225u32
226au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
227 void (*callback)(int, void *), void *callparam) 221 void (*callback)(int, void *), void *callparam)
228{ 222{
229 unsigned long flags; 223 unsigned long flags;
@@ -234,7 +228,8 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
234 chan_tab_t *ctp; 228 chan_tab_t *ctp;
235 au1x_dma_chan_t *cp; 229 au1x_dma_chan_t *cp;
236 230
237 /* We do the intialization on the first channel allocation. 231 /*
232 * We do the intialization on the first channel allocation.
238 * We have to wait because of the interrupt handler initialization 233 * We have to wait because of the interrupt handler initialization
239 * which can't be done successfully during board set up. 234 * which can't be done successfully during board set up.
240 */ 235 */
@@ -242,16 +237,17 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
242 au1xxx_dbdma_init(); 237 au1xxx_dbdma_init();
243 dbdma_initialized = 1; 238 dbdma_initialized = 1;
244 239
245 if ((stp = find_dbdev_id(srcid)) == NULL) 240 stp = find_dbdev_id(srcid);
241 if (stp == NULL)
246 return 0; 242 return 0;
247 if ((dtp = find_dbdev_id(destid)) == NULL) 243 dtp = find_dbdev_id(destid);
244 if (dtp == NULL)
248 return 0; 245 return 0;
249 246
250 used = 0; 247 used = 0;
251 rv = 0; 248 rv = 0;
252 249
253 /* Check to see if we can get both channels. 250 /* Check to see if we can get both channels. */
254 */
255 spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); 251 spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags);
256 if (!(stp->dev_flags & DEV_FLAGS_INUSE) || 252 if (!(stp->dev_flags & DEV_FLAGS_INUSE) ||
257 (stp->dev_flags & DEV_FLAGS_ANYUSE)) { 253 (stp->dev_flags & DEV_FLAGS_ANYUSE)) {
@@ -261,35 +257,30 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
261 (dtp->dev_flags & DEV_FLAGS_ANYUSE)) { 257 (dtp->dev_flags & DEV_FLAGS_ANYUSE)) {
262 /* Got destination */ 258 /* Got destination */
263 dtp->dev_flags |= DEV_FLAGS_INUSE; 259 dtp->dev_flags |= DEV_FLAGS_INUSE;
264 } 260 } else {
265 else { 261 /* Can't get dest. Release src. */
266 /* Can't get dest. Release src.
267 */
268 stp->dev_flags &= ~DEV_FLAGS_INUSE; 262 stp->dev_flags &= ~DEV_FLAGS_INUSE;
269 used++; 263 used++;
270 } 264 }
271 } 265 } else
272 else {
273 used++; 266 used++;
274 }
275 spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags); 267 spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags);
276 268
277 if (!used) { 269 if (!used) {
278 /* Let's see if we can allocate a channel for it. 270 /* Let's see if we can allocate a channel for it. */
279 */
280 ctp = NULL; 271 ctp = NULL;
281 chan = 0; 272 chan = 0;
282 spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); 273 spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags);
283 for (i=0; i<NUM_DBDMA_CHANS; i++) { 274 for (i = 0; i < NUM_DBDMA_CHANS; i++)
284 if (chan_tab_ptr[i] == NULL) { 275 if (chan_tab_ptr[i] == NULL) {
285 /* If kmalloc fails, it is caught below same 276 /*
277 * If kmalloc fails, it is caught below same
286 * as a channel not available. 278 * as a channel not available.
287 */ 279 */
288 ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC); 280 ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC);
289 chan_tab_ptr[i] = ctp; 281 chan_tab_ptr[i] = ctp;
290 break; 282 break;
291 } 283 }
292 }
293 spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags); 284 spin_unlock_irqrestore(&au1xxx_dbdma_spin_lock, flags);
294 285
295 if (ctp != NULL) { 286 if (ctp != NULL) {
@@ -304,8 +295,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
304 ctp->chan_callback = callback; 295 ctp->chan_callback = callback;
305 ctp->chan_callparam = callparam; 296 ctp->chan_callparam = callparam;
306 297
307 /* Initialize channel configuration. 298 /* Initialize channel configuration. */
308 */
309 i = 0; 299 i = 0;
310 if (stp->dev_intlevel) 300 if (stp->dev_intlevel)
311 i |= DDMA_CFG_SED; 301 i |= DDMA_CFG_SED;
@@ -326,8 +316,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
326 * operations. 316 * operations.
327 */ 317 */
328 rv = (u32)(&chan_tab_ptr[chan]); 318 rv = (u32)(&chan_tab_ptr[chan]);
329 } 319 } else {
330 else {
331 /* Release devices */ 320 /* Release devices */
332 stp->dev_flags &= ~DEV_FLAGS_INUSE; 321 stp->dev_flags &= ~DEV_FLAGS_INUSE;
333 dtp->dev_flags &= ~DEV_FLAGS_INUSE; 322 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
@@ -337,11 +326,11 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
337} 326}
338EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc); 327EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
339 328
340/* Set the device width if source or destination is a FIFO. 329/*
330 * Set the device width if source or destination is a FIFO.
341 * Should be 8, 16, or 32 bits. 331 * Should be 8, 16, or 32 bits.
342 */ 332 */
343u32 333u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits)
344au1xxx_dbdma_set_devwidth(u32 chanid, int bits)
345{ 334{
346 u32 rv; 335 u32 rv;
347 chan_tab_t *ctp; 336 chan_tab_t *ctp;
@@ -365,10 +354,8 @@ au1xxx_dbdma_set_devwidth(u32 chanid, int bits)
365} 354}
366EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth); 355EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
367 356
368/* Allocate a descriptor ring, initializing as much as possible. 357/* Allocate a descriptor ring, initializing as much as possible. */
369*/ 358u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
370u32
371au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
372{ 359{
373 int i; 360 int i;
374 u32 desc_base, srcid, destid; 361 u32 desc_base, srcid, destid;
@@ -378,43 +365,45 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
378 dbdev_tab_t *stp, *dtp; 365 dbdev_tab_t *stp, *dtp;
379 au1x_ddma_desc_t *dp; 366 au1x_ddma_desc_t *dp;
380 367
381 /* I guess we could check this to be within the 368 /*
369 * I guess we could check this to be within the
382 * range of the table...... 370 * range of the table......
383 */ 371 */
384 ctp = *((chan_tab_t **)chanid); 372 ctp = *((chan_tab_t **)chanid);
385 stp = ctp->chan_src; 373 stp = ctp->chan_src;
386 dtp = ctp->chan_dest; 374 dtp = ctp->chan_dest;
387 375
388 /* The descriptors must be 32-byte aligned. There is a 376 /*
377 * The descriptors must be 32-byte aligned. There is a
389 * possibility the allocation will give us such an address, 378 * possibility the allocation will give us such an address,
390 * and if we try that first we are likely to not waste larger 379 * and if we try that first we are likely to not waste larger
391 * slabs of memory. 380 * slabs of memory.
392 */ 381 */
393 desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), 382 desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t),
394 GFP_KERNEL|GFP_DMA); 383 GFP_KERNEL|GFP_DMA);
395 if (desc_base == 0) 384 if (desc_base == 0)
396 return 0; 385 return 0;
397 386
398 if (desc_base & 0x1f) { 387 if (desc_base & 0x1f) {
399 /* Lost....do it again, allocate extra, and round 388 /*
389 * Lost....do it again, allocate extra, and round
400 * the address base. 390 * the address base.
401 */ 391 */
402 kfree((const void *)desc_base); 392 kfree((const void *)desc_base);
403 i = entries * sizeof(au1x_ddma_desc_t); 393 i = entries * sizeof(au1x_ddma_desc_t);
404 i += (sizeof(au1x_ddma_desc_t) - 1); 394 i += (sizeof(au1x_ddma_desc_t) - 1);
405 if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0) 395 desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA);
396 if (desc_base == 0)
406 return 0; 397 return 0;
407 398
408 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t)); 399 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
409 } 400 }
410 dp = (au1x_ddma_desc_t *)desc_base; 401 dp = (au1x_ddma_desc_t *)desc_base;
411 402
412 /* Keep track of the base descriptor. 403 /* Keep track of the base descriptor. */
413 */
414 ctp->chan_desc_base = dp; 404 ctp->chan_desc_base = dp;
415 405
416 /* Initialize the rings with as much information as we know. 406 /* Initialize the rings with as much information as we know. */
417 */
418 srcid = stp->dev_id; 407 srcid = stp->dev_id;
419 destid = dtp->dev_id; 408 destid = dtp->dev_id;
420 409
@@ -426,11 +415,12 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
426 cmd0 |= DSCR_CMD0_IE | DSCR_CMD0_CV; 415 cmd0 |= DSCR_CMD0_IE | DSCR_CMD0_CV;
427 cmd0 |= DSCR_CMD0_ST(DSCR_CMD0_ST_NOCHANGE); 416 cmd0 |= DSCR_CMD0_ST(DSCR_CMD0_ST_NOCHANGE);
428 417
429 /* is it mem to mem transfer? */ 418 /* Is it mem to mem transfer? */
430 if(((DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_THROTTLE) || (DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_ALWAYS)) && 419 if (((DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_THROTTLE) ||
431 ((DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_THROTTLE) || (DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_ALWAYS))) { 420 (DSCR_CUSTOM2DEV_ID(srcid) == DSCR_CMD0_ALWAYS)) &&
432 cmd0 |= DSCR_CMD0_MEM; 421 ((DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_THROTTLE) ||
433 } 422 (DSCR_CUSTOM2DEV_ID(destid) == DSCR_CMD0_ALWAYS)))
423 cmd0 |= DSCR_CMD0_MEM;
434 424
435 switch (stp->dev_devwidth) { 425 switch (stp->dev_devwidth) {
436 case 8: 426 case 8:
@@ -458,15 +448,17 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
458 break; 448 break;
459 } 449 }
460 450
461 /* If the device is marked as an in/out FIFO, ensure it is 451 /*
452 * If the device is marked as an in/out FIFO, ensure it is
462 * set non-coherent. 453 * set non-coherent.
463 */ 454 */
464 if (stp->dev_flags & DEV_FLAGS_IN) 455 if (stp->dev_flags & DEV_FLAGS_IN)
465 cmd0 |= DSCR_CMD0_SN; /* Source in fifo */ 456 cmd0 |= DSCR_CMD0_SN; /* Source in FIFO */
466 if (dtp->dev_flags & DEV_FLAGS_OUT) 457 if (dtp->dev_flags & DEV_FLAGS_OUT)
467 cmd0 |= DSCR_CMD0_DN; /* Destination out fifo */ 458 cmd0 |= DSCR_CMD0_DN; /* Destination out FIFO */
468 459
469 /* Set up source1. For now, assume no stride and increment. 460 /*
461 * Set up source1. For now, assume no stride and increment.
470 * A channel attribute update can change this later. 462 * A channel attribute update can change this later.
471 */ 463 */
472 switch (stp->dev_tsize) { 464 switch (stp->dev_tsize) {
@@ -485,19 +477,19 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
485 break; 477 break;
486 } 478 }
487 479
488 /* If source input is fifo, set static address. 480 /* If source input is FIFO, set static address. */
489 */
490 if (stp->dev_flags & DEV_FLAGS_IN) { 481 if (stp->dev_flags & DEV_FLAGS_IN) {
491 if ( stp->dev_flags & DEV_FLAGS_BURSTABLE ) 482 if (stp->dev_flags & DEV_FLAGS_BURSTABLE)
492 src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST); 483 src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
493 else 484 else
494 src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC); 485 src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
495
496 } 486 }
487
497 if (stp->dev_physaddr) 488 if (stp->dev_physaddr)
498 src0 = stp->dev_physaddr; 489 src0 = stp->dev_physaddr;
499 490
500 /* Set up dest1. For now, assume no stride and increment. 491 /*
492 * Set up dest1. For now, assume no stride and increment.
501 * A channel attribute update can change this later. 493 * A channel attribute update can change this later.
502 */ 494 */
503 switch (dtp->dev_tsize) { 495 switch (dtp->dev_tsize) {
@@ -516,22 +508,24 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
516 break; 508 break;
517 } 509 }
518 510
519 /* If destination output is fifo, set static address. 511 /* If destination output is FIFO, set static address. */
520 */
521 if (dtp->dev_flags & DEV_FLAGS_OUT) { 512 if (dtp->dev_flags & DEV_FLAGS_OUT) {
522 if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE ) 513 if (dtp->dev_flags & DEV_FLAGS_BURSTABLE)
523 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST); 514 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
524 else 515 else
525 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC); 516 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
526 } 517 }
518
527 if (dtp->dev_physaddr) 519 if (dtp->dev_physaddr)
528 dest0 = dtp->dev_physaddr; 520 dest0 = dtp->dev_physaddr;
529 521
530#if 0 522#if 0
531 printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n", 523 printk(KERN_DEBUG "did:%x sid:%x cmd0:%x cmd1:%x source0:%x "
532 dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 ); 524 "source1:%x dest0:%x dest1:%x\n",
525 dtp->dev_id, stp->dev_id, cmd0, cmd1, src0,
526 src1, dest0, dest1);
533#endif 527#endif
534 for (i=0; i<entries; i++) { 528 for (i = 0; i < entries; i++) {
535 dp->dscr_cmd0 = cmd0; 529 dp->dscr_cmd0 = cmd0;
536 dp->dscr_cmd1 = cmd1; 530 dp->dscr_cmd1 = cmd1;
537 dp->dscr_source0 = src0; 531 dp->dscr_source0 = src0;
@@ -545,49 +539,49 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int entries)
545 dp++; 539 dp++;
546 } 540 }
547 541
548 /* Make last descrptor point to the first. 542 /* Make last descrptor point to the first. */
549 */
550 dp--; 543 dp--;
551 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(ctp->chan_desc_base)); 544 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(ctp->chan_desc_base));
552 ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base; 545 ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base;
553 546
554 return (u32)(ctp->chan_desc_base); 547 return (u32)ctp->chan_desc_base;
555} 548}
556EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc); 549EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
557 550
558/* Put a source buffer into the DMA ring. 551/*
552 * Put a source buffer into the DMA ring.
559 * This updates the source pointer and byte count. Normally used 553 * This updates the source pointer and byte count. Normally used
560 * for memory to fifo transfers. 554 * for memory to fifo transfers.
561 */ 555 */
562u32 556u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
563_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
564{ 557{
565 chan_tab_t *ctp; 558 chan_tab_t *ctp;
566 au1x_ddma_desc_t *dp; 559 au1x_ddma_desc_t *dp;
567 560
568 /* I guess we could check this to be within the 561 /*
562 * I guess we could check this to be within the
569 * range of the table...... 563 * range of the table......
570 */ 564 */
571 ctp = *((chan_tab_t **)chanid); 565 ctp = *(chan_tab_t **)chanid;
572 566
573 /* We should have multiple callers for a particular channel, 567 /*
568 * We should have multiple callers for a particular channel,
574 * an interrupt doesn't affect this pointer nor the descriptor, 569 * an interrupt doesn't affect this pointer nor the descriptor,
575 * so no locking should be needed. 570 * so no locking should be needed.
576 */ 571 */
577 dp = ctp->put_ptr; 572 dp = ctp->put_ptr;
578 573
579 /* If the descriptor is valid, we are way ahead of the DMA 574 /*
575 * If the descriptor is valid, we are way ahead of the DMA
580 * engine, so just return an error condition. 576 * engine, so just return an error condition.
581 */ 577 */
582 if (dp->dscr_cmd0 & DSCR_CMD0_V) { 578 if (dp->dscr_cmd0 & DSCR_CMD0_V)
583 return 0; 579 return 0;
584 }
585 580
586 /* Load up buffer address and byte count. 581 /* Load up buffer address and byte count. */
587 */
588 dp->dscr_source0 = virt_to_phys(buf); 582 dp->dscr_source0 = virt_to_phys(buf);
589 dp->dscr_cmd1 = nbytes; 583 dp->dscr_cmd1 = nbytes;
590 /* Check flags */ 584 /* Check flags */
591 if (flags & DDMA_FLAGS_IE) 585 if (flags & DDMA_FLAGS_IE)
592 dp->dscr_cmd0 |= DSCR_CMD0_IE; 586 dp->dscr_cmd0 |= DSCR_CMD0_IE;
593 if (flags & DDMA_FLAGS_NOIE) 587 if (flags & DDMA_FLAGS_NOIE)
@@ -595,23 +589,21 @@ _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
595 589
596 /* 590 /*
597 * There is an errata on the Au1200/Au1550 parts that could result 591 * There is an errata on the Au1200/Au1550 parts that could result
598 * in "stale" data being DMA'd. It has to do with the snoop logic on 592 * in "stale" data being DMA'ed. It has to do with the snoop logic on
599 * the dache eviction buffer. NONCOHERENT_IO is on by default for 593 * the cache eviction buffer. DMA_NONCOHERENT is on by default for
600 * these parts. If it is fixedin the future, these dma_cache_inv will 594 * these parts. If it is fixed in the future, these dma_cache_inv will
601 * just be nothing more than empty macros. See io.h. 595 * just be nothing more than empty macros. See io.h.
602 * */ 596 */
603 dma_cache_wback_inv((unsigned long)buf, nbytes); 597 dma_cache_wback_inv((unsigned long)buf, nbytes);
604 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ 598 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
605 au_sync(); 599 au_sync();
606 dma_cache_wback_inv((unsigned long)dp, sizeof(dp)); 600 dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
607 ctp->chan_ptr->ddma_dbell = 0; 601 ctp->chan_ptr->ddma_dbell = 0;
608 602
609 /* Get next descriptor pointer. 603 /* Get next descriptor pointer. */
610 */
611 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 604 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
612 605
613 /* return something not zero. 606 /* Return something non-zero. */
614 */
615 return nbytes; 607 return nbytes;
616} 608}
617EXPORT_SYMBOL(_au1xxx_dbdma_put_source); 609EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
@@ -654,81 +646,77 @@ _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
654 dp->dscr_dest0 = virt_to_phys(buf); 646 dp->dscr_dest0 = virt_to_phys(buf);
655 dp->dscr_cmd1 = nbytes; 647 dp->dscr_cmd1 = nbytes;
656#if 0 648#if 0
657 printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n", 649 printk(KERN_DEBUG "cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
658 dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0, 650 dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
659 dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 ); 651 dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
660#endif 652#endif
661 /* 653 /*
662 * There is an errata on the Au1200/Au1550 parts that could result in 654 * There is an errata on the Au1200/Au1550 parts that could result in
663 * "stale" data being DMA'd. It has to do with the snoop logic on the 655 * "stale" data being DMA'ed. It has to do with the snoop logic on the
664 * dache eviction buffer. NONCOHERENT_IO is on by default for these 656 * cache eviction buffer. DMA_NONCOHERENT is on by default for these
665 * parts. If it is fixedin the future, these dma_cache_inv will just 657 * parts. If it is fixed in the future, these dma_cache_inv will just
666 * be nothing more than empty macros. See io.h. 658 * be nothing more than empty macros. See io.h.
667 * */ 659 */
668 dma_cache_inv((unsigned long)buf, nbytes); 660 dma_cache_inv((unsigned long)buf, nbytes);
669 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */ 661 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
670 au_sync(); 662 au_sync();
671 dma_cache_wback_inv((unsigned long)dp, sizeof(dp)); 663 dma_cache_wback_inv((unsigned long)dp, sizeof(dp));
672 ctp->chan_ptr->ddma_dbell = 0; 664 ctp->chan_ptr->ddma_dbell = 0;
673 665
674 /* Get next descriptor pointer. 666 /* Get next descriptor pointer. */
675 */
676 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 667 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
677 668
678 /* return something not zero. 669 /* Return something non-zero. */
679 */
680 return nbytes; 670 return nbytes;
681} 671}
682EXPORT_SYMBOL(_au1xxx_dbdma_put_dest); 672EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
683 673
684/* Get a destination buffer into the DMA ring. 674/*
675 * Get a destination buffer into the DMA ring.
685 * Normally used to get a full buffer from the ring during fifo 676 * Normally used to get a full buffer from the ring during fifo
686 * to memory transfers. This does not set the valid bit, you will 677 * to memory transfers. This does not set the valid bit, you will
687 * have to put another destination buffer to keep the DMA going. 678 * have to put another destination buffer to keep the DMA going.
688 */ 679 */
689u32 680u32 au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes)
690au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes)
691{ 681{
692 chan_tab_t *ctp; 682 chan_tab_t *ctp;
693 au1x_ddma_desc_t *dp; 683 au1x_ddma_desc_t *dp;
694 u32 rv; 684 u32 rv;
695 685
696 /* I guess we could check this to be within the 686 /*
687 * I guess we could check this to be within the
697 * range of the table...... 688 * range of the table......
698 */ 689 */
699 ctp = *((chan_tab_t **)chanid); 690 ctp = *((chan_tab_t **)chanid);
700 691
701 /* We should have multiple callers for a particular channel, 692 /*
693 * We should have multiple callers for a particular channel,
702 * an interrupt doesn't affect this pointer nor the descriptor, 694 * an interrupt doesn't affect this pointer nor the descriptor,
703 * so no locking should be needed. 695 * so no locking should be needed.
704 */ 696 */
705 dp = ctp->get_ptr; 697 dp = ctp->get_ptr;
706 698
707 /* If the descriptor is valid, we are way ahead of the DMA 699 /*
700 * If the descriptor is valid, we are way ahead of the DMA
708 * engine, so just return an error condition. 701 * engine, so just return an error condition.
709 */ 702 */
710 if (dp->dscr_cmd0 & DSCR_CMD0_V) 703 if (dp->dscr_cmd0 & DSCR_CMD0_V)
711 return 0; 704 return 0;
712 705
713 /* Return buffer address and byte count. 706 /* Return buffer address and byte count. */
714 */
715 *buf = (void *)(phys_to_virt(dp->dscr_dest0)); 707 *buf = (void *)(phys_to_virt(dp->dscr_dest0));
716 *nbytes = dp->dscr_cmd1; 708 *nbytes = dp->dscr_cmd1;
717 rv = dp->dscr_stat; 709 rv = dp->dscr_stat;
718 710
719 /* Get next descriptor pointer. 711 /* Get next descriptor pointer. */
720 */
721 ctp->get_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 712 ctp->get_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
722 713
723 /* return something not zero. 714 /* Return something non-zero. */
724 */
725 return rv; 715 return rv;
726} 716}
727
728EXPORT_SYMBOL_GPL(au1xxx_dbdma_get_dest); 717EXPORT_SYMBOL_GPL(au1xxx_dbdma_get_dest);
729 718
730void 719void au1xxx_dbdma_stop(u32 chanid)
731au1xxx_dbdma_stop(u32 chanid)
732{ 720{
733 chan_tab_t *ctp; 721 chan_tab_t *ctp;
734 au1x_dma_chan_t *cp; 722 au1x_dma_chan_t *cp;
@@ -743,7 +731,7 @@ au1xxx_dbdma_stop(u32 chanid)
743 udelay(1); 731 udelay(1);
744 halt_timeout++; 732 halt_timeout++;
745 if (halt_timeout > 100) { 733 if (halt_timeout > 100) {
746 printk("warning: DMA channel won't halt\n"); 734 printk(KERN_WARNING "warning: DMA channel won't halt\n");
747 break; 735 break;
748 } 736 }
749 } 737 }
@@ -753,12 +741,12 @@ au1xxx_dbdma_stop(u32 chanid)
753} 741}
754EXPORT_SYMBOL(au1xxx_dbdma_stop); 742EXPORT_SYMBOL(au1xxx_dbdma_stop);
755 743
756/* Start using the current descriptor pointer. If the dbdma encounters 744/*
757 * a not valid descriptor, it will stop. In this case, we can just 745 * Start using the current descriptor pointer. If the DBDMA encounters
746 * a non-valid descriptor, it will stop. In this case, we can just
758 * continue by adding a buffer to the list and starting again. 747 * continue by adding a buffer to the list and starting again.
759 */ 748 */
760void 749void au1xxx_dbdma_start(u32 chanid)
761au1xxx_dbdma_start(u32 chanid)
762{ 750{
763 chan_tab_t *ctp; 751 chan_tab_t *ctp;
764 au1x_dma_chan_t *cp; 752 au1x_dma_chan_t *cp;
@@ -773,8 +761,7 @@ au1xxx_dbdma_start(u32 chanid)
773} 761}
774EXPORT_SYMBOL(au1xxx_dbdma_start); 762EXPORT_SYMBOL(au1xxx_dbdma_start);
775 763
776void 764void au1xxx_dbdma_reset(u32 chanid)
777au1xxx_dbdma_reset(u32 chanid)
778{ 765{
779 chan_tab_t *ctp; 766 chan_tab_t *ctp;
780 au1x_ddma_desc_t *dp; 767 au1x_ddma_desc_t *dp;
@@ -784,14 +771,14 @@ au1xxx_dbdma_reset(u32 chanid)
784 ctp = *((chan_tab_t **)chanid); 771 ctp = *((chan_tab_t **)chanid);
785 ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base; 772 ctp->get_ptr = ctp->put_ptr = ctp->cur_ptr = ctp->chan_desc_base;
786 773
787 /* Run through the descriptors and reset the valid indicator. 774 /* Run through the descriptors and reset the valid indicator. */
788 */
789 dp = ctp->chan_desc_base; 775 dp = ctp->chan_desc_base;
790 776
791 do { 777 do {
792 dp->dscr_cmd0 &= ~DSCR_CMD0_V; 778 dp->dscr_cmd0 &= ~DSCR_CMD0_V;
793 /* reset our SW status -- this is used to determine 779 /*
794 * if a descriptor is in use by upper level SW. Since 780 * Reset our software status -- this is used to determine
781 * if a descriptor is in use by upper level software. Since
795 * posting can reset 'V' bit. 782 * posting can reset 'V' bit.
796 */ 783 */
797 dp->sw_status = 0; 784 dp->sw_status = 0;
@@ -800,8 +787,7 @@ au1xxx_dbdma_reset(u32 chanid)
800} 787}
801EXPORT_SYMBOL(au1xxx_dbdma_reset); 788EXPORT_SYMBOL(au1xxx_dbdma_reset);
802 789
803u32 790u32 au1xxx_get_dma_residue(u32 chanid)
804au1xxx_get_dma_residue(u32 chanid)
805{ 791{
806 chan_tab_t *ctp; 792 chan_tab_t *ctp;
807 au1x_dma_chan_t *cp; 793 au1x_dma_chan_t *cp;
@@ -810,18 +796,15 @@ au1xxx_get_dma_residue(u32 chanid)
810 ctp = *((chan_tab_t **)chanid); 796 ctp = *((chan_tab_t **)chanid);
811 cp = ctp->chan_ptr; 797 cp = ctp->chan_ptr;
812 798
813 /* This is only valid if the channel is stopped. 799 /* This is only valid if the channel is stopped. */
814 */
815 rv = cp->ddma_bytecnt; 800 rv = cp->ddma_bytecnt;
816 au_sync(); 801 au_sync();
817 802
818 return rv; 803 return rv;
819} 804}
820
821EXPORT_SYMBOL_GPL(au1xxx_get_dma_residue); 805EXPORT_SYMBOL_GPL(au1xxx_get_dma_residue);
822 806
823void 807void au1xxx_dbdma_chan_free(u32 chanid)
824au1xxx_dbdma_chan_free(u32 chanid)
825{ 808{
826 chan_tab_t *ctp; 809 chan_tab_t *ctp;
827 dbdev_tab_t *stp, *dtp; 810 dbdev_tab_t *stp, *dtp;
@@ -842,8 +825,7 @@ au1xxx_dbdma_chan_free(u32 chanid)
842} 825}
843EXPORT_SYMBOL(au1xxx_dbdma_chan_free); 826EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
844 827
845static irqreturn_t 828static irqreturn_t dbdma_interrupt(int irq, void *dev_id)
846dbdma_interrupt(int irq, void *dev_id)
847{ 829{
848 u32 intstat; 830 u32 intstat;
849 u32 chan_index; 831 u32 chan_index;
@@ -859,13 +841,12 @@ dbdma_interrupt(int irq, void *dev_id)
859 cp = ctp->chan_ptr; 841 cp = ctp->chan_ptr;
860 dp = ctp->cur_ptr; 842 dp = ctp->cur_ptr;
861 843
862 /* Reset interrupt. 844 /* Reset interrupt. */
863 */
864 cp->ddma_irq = 0; 845 cp->ddma_irq = 0;
865 au_sync(); 846 au_sync();
866 847
867 if (ctp->chan_callback) 848 if (ctp->chan_callback)
868 (ctp->chan_callback)(irq, ctp->chan_callparam); 849 ctp->chan_callback(irq, ctp->chan_callparam);
869 850
870 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 851 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
871 return IRQ_RETVAL(1); 852 return IRQ_RETVAL(1);
@@ -890,47 +871,47 @@ static void au1xxx_dbdma_init(void)
890 871
891 if (request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED, 872 if (request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED,
892 "Au1xxx dbdma", (void *)dbdma_gptr)) 873 "Au1xxx dbdma", (void *)dbdma_gptr))
893 printk("Can't get 1550 dbdma irq"); 874 printk(KERN_ERR "Can't get 1550 dbdma irq");
894} 875}
895 876
896void 877void au1xxx_dbdma_dump(u32 chanid)
897au1xxx_dbdma_dump(u32 chanid)
898{ 878{
899 chan_tab_t *ctp; 879 chan_tab_t *ctp;
900 au1x_ddma_desc_t *dp; 880 au1x_ddma_desc_t *dp;
901 dbdev_tab_t *stp, *dtp; 881 dbdev_tab_t *stp, *dtp;
902 au1x_dma_chan_t *cp; 882 au1x_dma_chan_t *cp;
903 u32 i = 0; 883 u32 i = 0;
904 884
905 ctp = *((chan_tab_t **)chanid); 885 ctp = *((chan_tab_t **)chanid);
906 stp = ctp->chan_src; 886 stp = ctp->chan_src;
907 dtp = ctp->chan_dest; 887 dtp = ctp->chan_dest;
908 cp = ctp->chan_ptr; 888 cp = ctp->chan_ptr;
909 889
910 printk("Chan %x, stp %x (dev %d) dtp %x (dev %d) \n", 890 printk(KERN_DEBUG "Chan %x, stp %x (dev %d) dtp %x (dev %d) \n",
911 (u32)ctp, (u32)stp, stp - dbdev_tab, (u32)dtp, dtp - dbdev_tab); 891 (u32)ctp, (u32)stp, stp - dbdev_tab, (u32)dtp,
912 printk("desc base %x, get %x, put %x, cur %x\n", 892 dtp - dbdev_tab);
913 (u32)(ctp->chan_desc_base), (u32)(ctp->get_ptr), 893 printk(KERN_DEBUG "desc base %x, get %x, put %x, cur %x\n",
914 (u32)(ctp->put_ptr), (u32)(ctp->cur_ptr)); 894 (u32)(ctp->chan_desc_base), (u32)(ctp->get_ptr),
915 895 (u32)(ctp->put_ptr), (u32)(ctp->cur_ptr));
916 printk("dbdma chan %x\n", (u32)cp); 896
917 printk("cfg %08x, desptr %08x, statptr %08x\n", 897 printk(KERN_DEBUG "dbdma chan %x\n", (u32)cp);
918 cp->ddma_cfg, cp->ddma_desptr, cp->ddma_statptr); 898 printk(KERN_DEBUG "cfg %08x, desptr %08x, statptr %08x\n",
919 printk("dbell %08x, irq %08x, stat %08x, bytecnt %08x\n", 899 cp->ddma_cfg, cp->ddma_desptr, cp->ddma_statptr);
920 cp->ddma_dbell, cp->ddma_irq, cp->ddma_stat, cp->ddma_bytecnt); 900 printk(KERN_DEBUG "dbell %08x, irq %08x, stat %08x, bytecnt %08x\n",
921 901 cp->ddma_dbell, cp->ddma_irq, cp->ddma_stat,
922 902 cp->ddma_bytecnt);
923 /* Run through the descriptors 903
924 */ 904 /* Run through the descriptors */
925 dp = ctp->chan_desc_base; 905 dp = ctp->chan_desc_base;
926 906
927 do { 907 do {
928 printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n", 908 printk(KERN_DEBUG "Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
929 i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1); 909 i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
930 printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n", 910 printk(KERN_DEBUG "src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
931 dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1); 911 dp->dscr_source0, dp->dscr_source1,
932 printk("stat %08x, nxtptr %08x\n", 912 dp->dscr_dest0, dp->dscr_dest1);
933 dp->dscr_stat, dp->dscr_nxtptr); 913 printk(KERN_DEBUG "stat %08x, nxtptr %08x\n",
914 dp->dscr_stat, dp->dscr_nxtptr);
934 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 915 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
935 } while (dp != ctp->chan_desc_base); 916 } while (dp != ctp->chan_desc_base);
936} 917}
@@ -938,32 +919,33 @@ au1xxx_dbdma_dump(u32 chanid)
938/* Put a descriptor into the DMA ring. 919/* Put a descriptor into the DMA ring.
939 * This updates the source/destination pointers and byte count. 920 * This updates the source/destination pointers and byte count.
940 */ 921 */
941u32 922u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr)
942au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
943{ 923{
944 chan_tab_t *ctp; 924 chan_tab_t *ctp;
945 au1x_ddma_desc_t *dp; 925 au1x_ddma_desc_t *dp;
946 u32 nbytes=0; 926 u32 nbytes = 0;
947 927
948 /* I guess we could check this to be within the 928 /*
949 * range of the table...... 929 * I guess we could check this to be within the
950 */ 930 * range of the table......
931 */
951 ctp = *((chan_tab_t **)chanid); 932 ctp = *((chan_tab_t **)chanid);
952 933
953 /* We should have multiple callers for a particular channel, 934 /*
954 * an interrupt doesn't affect this pointer nor the descriptor, 935 * We should have multiple callers for a particular channel,
955 * so no locking should be needed. 936 * an interrupt doesn't affect this pointer nor the descriptor,
956 */ 937 * so no locking should be needed.
938 */
957 dp = ctp->put_ptr; 939 dp = ctp->put_ptr;
958 940
959 /* If the descriptor is valid, we are way ahead of the DMA 941 /*
960 * engine, so just return an error condition. 942 * If the descriptor is valid, we are way ahead of the DMA
961 */ 943 * engine, so just return an error condition.
944 */
962 if (dp->dscr_cmd0 & DSCR_CMD0_V) 945 if (dp->dscr_cmd0 & DSCR_CMD0_V)
963 return 0; 946 return 0;
964 947
965 /* Load up buffer addresses and byte count. 948 /* Load up buffer addresses and byte count. */
966 */
967 dp->dscr_dest0 = dscr->dscr_dest0; 949 dp->dscr_dest0 = dscr->dscr_dest0;
968 dp->dscr_source0 = dscr->dscr_source0; 950 dp->dscr_source0 = dscr->dscr_source0;
969 dp->dscr_dest1 = dscr->dscr_dest1; 951 dp->dscr_dest1 = dscr->dscr_dest1;
@@ -975,14 +957,11 @@ au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
975 dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V; 957 dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
976 ctp->chan_ptr->ddma_dbell = 0; 958 ctp->chan_ptr->ddma_dbell = 0;
977 959
978 /* Get next descriptor pointer. 960 /* Get next descriptor pointer. */
979 */
980 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); 961 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
981 962
982 /* return something not zero. 963 /* Return something non-zero. */
983 */
984 return nbytes; 964 return nbytes;
985} 965}
986 966
987#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */ 967#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
988
diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index eae1bb2ca26e..af5be7df2f2a 100644
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -1,3 +1,4 @@
1#include <linux/types.h>
1 2
2#include <asm/mach-au1x00/au1000.h> 3#include <asm/mach-au1x00/au1000.h>
3 4
@@ -8,12 +9,6 @@
8 * uart to be used for debugging. 9 * uart to be used for debugging.
9 */ 10 */
10#define DEBUG_BASE UART_DEBUG_BASE 11#define DEBUG_BASE UART_DEBUG_BASE
11/**/
12
13/* we need uint32 uint8 */
14/* #include "types.h" */
15typedef unsigned char uint8;
16typedef unsigned int uint32;
17 12
18#define UART16550_BAUD_2400 2400 13#define UART16550_BAUD_2400 2400
19#define UART16550_BAUD_4800 4800 14#define UART16550_BAUD_4800 4800
@@ -51,17 +46,15 @@ typedef unsigned int uint32;
51#define UART_MOD_CNTRL 0x100 /* Module Control */ 46#define UART_MOD_CNTRL 0x100 /* Module Control */
52 47
53/* memory-mapped read/write of the port */ 48/* memory-mapped read/write of the port */
54#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff) 49#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff)
55#define UART16550_WRITE(y, z) (au_writel(z&0xff, DEBUG_BASE + y)) 50#define UART16550_WRITE(y, z) (au_writel(z & 0xff, DEBUG_BASE + y))
56 51
57extern unsigned long calc_clock(void); 52extern unsigned long calc_clock(void);
58 53
59void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) 54void debugInit(u32 baud, u8 data, u8 parity, u8 stop)
60{ 55{
61 56 if (UART16550_READ(UART_MOD_CNTRL) != 0x3)
62 if (UART16550_READ(UART_MOD_CNTRL) != 0x3) {
63 UART16550_WRITE(UART_MOD_CNTRL, 3); 57 UART16550_WRITE(UART_MOD_CNTRL, 3);
64 }
65 calc_clock(); 58 calc_clock();
66 59
67 /* disable interrupts */ 60 /* disable interrupts */
@@ -69,7 +62,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
69 62
70 /* set up baud rate */ 63 /* set up baud rate */
71 { 64 {
72 uint32 divisor; 65 u32 divisor;
73 66
74 /* set divisor */ 67 /* set divisor */
75 divisor = get_au1x00_uart_baud_base() / baud; 68 divisor = get_au1x00_uart_baud_base() / baud;
@@ -80,9 +73,9 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
80 UART16550_WRITE(UART_LCR, (data | parity | stop)); 73 UART16550_WRITE(UART_LCR, (data | parity | stop));
81} 74}
82 75
83static int remoteDebugInitialized = 0; 76static int remoteDebugInitialized;
84 77
85uint8 getDebugChar(void) 78u8 getDebugChar(void)
86{ 79{
87 if (!remoteDebugInitialized) { 80 if (!remoteDebugInitialized) {
88 remoteDebugInitialized = 1; 81 remoteDebugInitialized = 1;
@@ -92,15 +85,13 @@ uint8 getDebugChar(void)
92 UART16550_STOP_1BIT); 85 UART16550_STOP_1BIT);
93 } 86 }
94 87
95 while((UART16550_READ(UART_LSR) & 0x1) == 0); 88 while ((UART16550_READ(UART_LSR) & 0x1) == 0);
96 return UART16550_READ(UART_RX); 89 return UART16550_READ(UART_RX);
97} 90}
98 91
99 92
100int putDebugChar(uint8 byte) 93int putDebugChar(u8 byte)
101{ 94{
102// int i;
103
104 if (!remoteDebugInitialized) { 95 if (!remoteDebugInitialized) {
105 remoteDebugInitialized = 1; 96 remoteDebugInitialized = 1;
106 debugInit(UART16550_BAUD_115200, 97 debugInit(UART16550_BAUD_115200,
@@ -109,9 +100,8 @@ int putDebugChar(uint8 byte)
109 UART16550_STOP_1BIT); 100 UART16550_STOP_1BIT);
110 } 101 }
111 102
112 while ((UART16550_READ(UART_LSR)&0x40) == 0); 103 while ((UART16550_READ(UART_LSR) & 0x40) == 0);
113 UART16550_WRITE(UART_TX, byte); 104 UART16550_WRITE(UART_TX, byte);
114 //for (i=0;i<0xfff;i++);
115 105
116 return 1; 106 return 1;
117} 107}
diff --git a/arch/mips/au1000/common/dma.c b/arch/mips/au1000/common/dma.c
index 95f69ea146e9..d6fbda232e6a 100644
--- a/arch/mips/au1000/common/dma.c
+++ b/arch/mips/au1000/common/dma.c
@@ -1,12 +1,11 @@
1/* 1/*
2 * 2 *
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * A DMA channel allocator for Au1000. API is modeled loosely off of 4 * A DMA channel allocator for Au1x00. API is modeled loosely off of
5 * linux/kernel/dma.c. 5 * linux/kernel/dma.c.
6 * 6 *
7 * Copyright 2000 MontaVista Software Inc. 7 * Copyright 2000, 2008 MontaVista Software Inc.
8 * Author: MontaVista Software, Inc. 8 * Author: MontaVista Software, Inc. <source@mvista.com>
9 * stevel@mvista.com or source@mvista.com
10 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) 9 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
11 * 10 *
12 * This program is free software; you can redistribute it and/or modify it 11 * This program is free software; you can redistribute it and/or modify it
@@ -39,7 +38,8 @@
39#include <asm/mach-au1x00/au1000.h> 38#include <asm/mach-au1x00/au1000.h>
40#include <asm/mach-au1x00/au1000_dma.h> 39#include <asm/mach-au1x00/au1000_dma.h>
41 40
42#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100) 41#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \
42 defined(CONFIG_SOC_AU1100)
43/* 43/*
44 * A note on resource allocation: 44 * A note on resource allocation:
45 * 45 *
@@ -56,7 +56,6 @@
56 * returned from request_dma. 56 * returned from request_dma.
57 */ 57 */
58 58
59
60DEFINE_SPINLOCK(au1000_dma_spin_lock); 59DEFINE_SPINLOCK(au1000_dma_spin_lock);
61 60
62struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = { 61struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = {
@@ -71,7 +70,7 @@ struct dma_chan au1000_dma_table[NUM_AU1000_DMA_CHANNELS] = {
71}; 70};
72EXPORT_SYMBOL(au1000_dma_table); 71EXPORT_SYMBOL(au1000_dma_table);
73 72
74// Device FIFO addresses and default DMA modes 73/* Device FIFO addresses and default DMA modes */
75static const struct dma_dev { 74static const struct dma_dev {
76 unsigned int fifo_addr; 75 unsigned int fifo_addr;
77 unsigned int dma_mode; 76 unsigned int dma_mode;
@@ -80,8 +79,8 @@ static const struct dma_dev {
80 {UART0_ADDR + UART_RX, 0}, 79 {UART0_ADDR + UART_RX, 0},
81 {0, 0}, 80 {0, 0},
82 {0, 0}, 81 {0, 0},
83 {AC97C_DATA, DMA_DW16 }, // coherent 82 {AC97C_DATA, DMA_DW16 }, /* coherent */
84 {AC97C_DATA, DMA_DR | DMA_DW16 }, // coherent 83 {AC97C_DATA, DMA_DR | DMA_DW16 }, /* coherent */
85 {UART3_ADDR + UART_TX, DMA_DW8 | DMA_NC}, 84 {UART3_ADDR + UART_TX, DMA_DW8 | DMA_NC},
86 {UART3_ADDR + UART_RX, DMA_DR | DMA_DW8 | DMA_NC}, 85 {UART3_ADDR + UART_RX, DMA_DR | DMA_DW8 | DMA_NC},
87 {USBD_EP0RD, DMA_DR | DMA_DW8 | DMA_NC}, 86 {USBD_EP0RD, DMA_DR | DMA_DW8 | DMA_NC},
@@ -101,10 +100,10 @@ int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
101 struct dma_chan *chan; 100 struct dma_chan *chan;
102 101
103 for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) { 102 for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) {
104 if ((chan = get_dma_chan(i)) != NULL) { 103 chan = get_dma_chan(i);
104 if (chan != NULL)
105 len += sprintf(buf + len, "%2d: %s\n", 105 len += sprintf(buf + len, "%2d: %s\n",
106 i, chan->dev_str); 106 i, chan->dev_str);
107 }
108 } 107 }
109 108
110 if (fpos >= len) { 109 if (fpos >= len) {
@@ -113,18 +112,19 @@ int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
113 return 0; 112 return 0;
114 } 113 }
115 *start = buf + fpos; 114 *start = buf + fpos;
116 if ((len -= fpos) > length) 115 len -= fpos;
116 if (len > length)
117 return length; 117 return length;
118 *eof = 1; 118 *eof = 1;
119 return len; 119 return len;
120} 120}
121 121
122// Device FIFO addresses and default DMA modes - 2nd bank 122/* Device FIFO addresses and default DMA modes - 2nd bank */
123static const struct dma_dev dma_dev_table_bank2[DMA_NUM_DEV_BANK2] = { 123static const struct dma_dev dma_dev_table_bank2[DMA_NUM_DEV_BANK2] = {
124 {SD0_XMIT_FIFO, DMA_DS | DMA_DW8}, // coherent 124 { SD0_XMIT_FIFO, DMA_DS | DMA_DW8 }, /* coherent */
125 {SD0_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8}, // coherent 125 { SD0_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8 }, /* coherent */
126 {SD1_XMIT_FIFO, DMA_DS | DMA_DW8}, // coherent 126 { SD1_XMIT_FIFO, DMA_DS | DMA_DW8 }, /* coherent */
127 {SD1_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8} // coherent 127 { SD1_RECV_FIFO, DMA_DS | DMA_DR | DMA_DW8 } /* coherent */
128}; 128};
129 129
130void dump_au1000_dma_channel(unsigned int dmanr) 130void dump_au1000_dma_channel(unsigned int dmanr)
@@ -150,7 +150,6 @@ void dump_au1000_dma_channel(unsigned int dmanr)
150 au_readl(chan->io + DMA_BUFFER1_COUNT)); 150 au_readl(chan->io + DMA_BUFFER1_COUNT));
151} 151}
152 152
153
154/* 153/*
155 * Finds a free channel, and binds the requested device to it. 154 * Finds a free channel, and binds the requested device to it.
156 * Returns the allocated channel number, or negative on error. 155 * Returns the allocated channel number, or negative on error.
@@ -169,14 +168,14 @@ int request_au1000_dma(int dev_id, const char *dev_str,
169 if (dev_id < 0 || dev_id >= (DMA_NUM_DEV + DMA_NUM_DEV_BANK2)) 168 if (dev_id < 0 || dev_id >= (DMA_NUM_DEV + DMA_NUM_DEV_BANK2))
170 return -EINVAL; 169 return -EINVAL;
171#else 170#else
172 if (dev_id < 0 || dev_id >= DMA_NUM_DEV) 171 if (dev_id < 0 || dev_id >= DMA_NUM_DEV)
173 return -EINVAL; 172 return -EINVAL;
174#endif 173#endif
175 174
176 for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) { 175 for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++)
177 if (au1000_dma_table[i].dev_id < 0) 176 if (au1000_dma_table[i].dev_id < 0)
178 break; 177 break;
179 } 178
180 if (i == NUM_AU1000_DMA_CHANNELS) 179 if (i == NUM_AU1000_DMA_CHANNELS)
181 return -ENODEV; 180 return -ENODEV;
182 181
@@ -185,15 +184,15 @@ int request_au1000_dma(int dev_id, const char *dev_str,
185 if (dev_id >= DMA_NUM_DEV) { 184 if (dev_id >= DMA_NUM_DEV) {
186 dev_id -= DMA_NUM_DEV; 185 dev_id -= DMA_NUM_DEV;
187 dev = &dma_dev_table_bank2[dev_id]; 186 dev = &dma_dev_table_bank2[dev_id];
188 } else { 187 } else
189 dev = &dma_dev_table[dev_id]; 188 dev = &dma_dev_table[dev_id];
190 }
191 189
192 if (irqhandler) { 190 if (irqhandler) {
193 chan->irq = AU1000_DMA_INT_BASE + i; 191 chan->irq = AU1000_DMA_INT_BASE + i;
194 chan->irq_dev = irq_dev_id; 192 chan->irq_dev = irq_dev_id;
195 if ((ret = request_irq(chan->irq, irqhandler, irqflags, 193 ret = request_irq(chan->irq, irqhandler, irqflags, dev_str,
196 dev_str, chan->irq_dev))) { 194 chan->irq_dev);
195 if (ret) {
197 chan->irq = 0; 196 chan->irq = 0;
198 chan->irq_dev = NULL; 197 chan->irq_dev = NULL;
199 return ret; 198 return ret;
@@ -203,7 +202,7 @@ int request_au1000_dma(int dev_id, const char *dev_str,
203 chan->irq_dev = NULL; 202 chan->irq_dev = NULL;
204 } 203 }
205 204
206 // fill it in 205 /* fill it in */
207 chan->io = DMA_CHANNEL_BASE + i * DMA_CHANNEL_LEN; 206 chan->io = DMA_CHANNEL_BASE + i * DMA_CHANNEL_LEN;
208 chan->dev_id = dev_id; 207 chan->dev_id = dev_id;
209 chan->dev_str = dev_str; 208 chan->dev_str = dev_str;
@@ -220,8 +219,9 @@ EXPORT_SYMBOL(request_au1000_dma);
220void free_au1000_dma(unsigned int dmanr) 219void free_au1000_dma(unsigned int dmanr)
221{ 220{
222 struct dma_chan *chan = get_dma_chan(dmanr); 221 struct dma_chan *chan = get_dma_chan(dmanr);
222
223 if (!chan) { 223 if (!chan) {
224 printk("Trying to free DMA%d\n", dmanr); 224 printk(KERN_ERR "Error trying to free DMA%d\n", dmanr);
225 return; 225 return;
226 } 226 }
227 227
@@ -235,4 +235,4 @@ void free_au1000_dma(unsigned int dmanr)
235} 235}
236EXPORT_SYMBOL(free_au1000_dma); 236EXPORT_SYMBOL(free_au1000_dma);
237 237
238#endif // AU1000 AU1500 AU1100 238#endif /* AU1000 AU1500 AU1100 */
diff --git a/arch/mips/au1000/common/gpio.c b/arch/mips/au1000/common/gpio.c
index 525452589971..b485d94ce8a5 100644
--- a/arch/mips/au1000/common/gpio.c
+++ b/arch/mips/au1000/common/gpio.c
@@ -69,7 +69,7 @@ static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
69 69
70static int au1xxx_gpio1_read(unsigned gpio) 70static int au1xxx_gpio1_read(unsigned gpio)
71{ 71{
72 return ((gpio1->pinstaterd >> gpio) & 0x01); 72 return (gpio1->pinstaterd >> gpio) & 0x01;
73} 73}
74 74
75static void au1xxx_gpio1_write(unsigned gpio, int value) 75static void au1xxx_gpio1_write(unsigned gpio, int value)
@@ -104,7 +104,6 @@ int au1xxx_gpio_get_value(unsigned gpio)
104 else 104 else
105 return au1xxx_gpio1_read(gpio); 105 return au1xxx_gpio1_read(gpio);
106} 106}
107
108EXPORT_SYMBOL(au1xxx_gpio_get_value); 107EXPORT_SYMBOL(au1xxx_gpio_get_value);
109 108
110void au1xxx_gpio_set_value(unsigned gpio, int value) 109void au1xxx_gpio_set_value(unsigned gpio, int value)
@@ -118,7 +117,6 @@ void au1xxx_gpio_set_value(unsigned gpio, int value)
118 else 117 else
119 au1xxx_gpio1_write(gpio, value); 118 au1xxx_gpio1_write(gpio, value);
120} 119}
121
122EXPORT_SYMBOL(au1xxx_gpio_set_value); 120EXPORT_SYMBOL(au1xxx_gpio_set_value);
123 121
124int au1xxx_gpio_direction_input(unsigned gpio) 122int au1xxx_gpio_direction_input(unsigned gpio)
@@ -132,7 +130,6 @@ int au1xxx_gpio_direction_input(unsigned gpio)
132 130
133 return au1xxx_gpio1_direction_input(gpio); 131 return au1xxx_gpio1_direction_input(gpio);
134} 132}
135
136EXPORT_SYMBOL(au1xxx_gpio_direction_input); 133EXPORT_SYMBOL(au1xxx_gpio_direction_input);
137 134
138int au1xxx_gpio_direction_output(unsigned gpio, int value) 135int au1xxx_gpio_direction_output(unsigned gpio, int value)
@@ -146,5 +143,4 @@ int au1xxx_gpio_direction_output(unsigned gpio, int value)
146 143
147 return au1xxx_gpio1_direction_output(gpio, value); 144 return au1xxx_gpio1_direction_output(gpio, value);
148} 145}
149
150EXPORT_SYMBOL(au1xxx_gpio_direction_output); 146EXPORT_SYMBOL(au1xxx_gpio_direction_output);
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index f0626992fd75..40c6ceceb5f9 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -210,10 +210,8 @@ static inline void mask_and_ack_either_edge_irq(unsigned int irq_nr)
210 au_sync(); 210 au_sync();
211} 211}
212 212
213
214static inline void mask_and_ack_level_irq(unsigned int irq_nr) 213static inline void mask_and_ack_level_irq(unsigned int irq_nr)
215{ 214{
216
217 local_disable_irq(irq_nr); 215 local_disable_irq(irq_nr);
218 au_sync(); 216 au_sync();
219#if defined(CONFIG_MIPS_PB1000) 217#if defined(CONFIG_MIPS_PB1000)
@@ -263,14 +261,14 @@ void restore_local_and_enable(int controller, unsigned long mask)
263 unsigned long flags, new_mask; 261 unsigned long flags, new_mask;
264 262
265 spin_lock_irqsave(&irq_lock, flags); 263 spin_lock_irqsave(&irq_lock, flags);
266 for (i = 0; i < 32; i++) { 264 for (i = 0; i < 32; i++)
267 if (mask & (1 << i)) { 265 if (mask & (1 << i)) {
268 if (controller) 266 if (controller)
269 local_enable_irq(i + 32); 267 local_enable_irq(i + 32);
270 else 268 else
271 local_enable_irq(i); 269 local_enable_irq(i);
272 } 270 }
273 } 271
274 if (controller) 272 if (controller)
275 new_mask = au_readl(IC1_MASKSET); 273 new_mask = au_readl(IC1_MASKSET);
276 else 274 else
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c
index 7e966b31e3e1..7866cf50cf99 100644
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -2,9 +2,8 @@
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Alchemy/AMD Au1x00 PCI support. 3 * Alchemy/AMD Au1x00 PCI support.
4 * 4 *
5 * Copyright 2001-2003, 2007 MontaVista Software Inc. 5 * Copyright 2001-2003, 2007-2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 8 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
10 * 9 *
@@ -86,9 +85,9 @@ static int __init au1x_pci_setup(void)
86 u32 prid = read_c0_prid(); 85 u32 prid = read_c0_prid();
87 86
88 if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { 87 if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
89 au_writel((1 << 16) | au_readl(Au1500_PCI_CFG), 88 au_writel((1 << 16) | au_readl(Au1500_PCI_CFG),
90 Au1500_PCI_CFG); 89 Au1500_PCI_CFG);
91 printk("Non-coherent PCI accesses enabled\n"); 90 printk(KERN_INFO "Non-coherent PCI accesses enabled\n");
92 } 91 }
93 } 92 }
94#endif 93#endif
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index 31d2a2270878..8cae7753ef79 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -269,8 +269,8 @@ static struct platform_device au1x00_pcmcia_device = {
269#ifdef SMBUS_PSC_BASE 269#ifdef SMBUS_PSC_BASE
270static struct resource pbdb_smbus_resources[] = { 270static struct resource pbdb_smbus_resources[] = {
271 { 271 {
272 .start = SMBUS_PSC_BASE, 272 .start = CPHYSADDR(SMBUS_PSC_BASE),
273 .end = SMBUS_PSC_BASE + 0x24 - 1, 273 .end = CPHYSADDR(SMBUS_PSC_BASE + 0xfffff),
274 .flags = IORESOURCE_MEM, 274 .flags = IORESOURCE_MEM,
275 }, 275 },
276}; 276};
@@ -302,16 +302,17 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
302#endif 302#endif
303}; 303};
304 304
305int __init au1xxx_platform_init(void) 305static int __init au1xxx_platform_init(void)
306{ 306{
307 unsigned int uartclk = get_au1x00_uart_baud_base() * 16; 307 unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
308 int i; 308 int i;
309 309
310 /* Fill up uartclk. */ 310 /* Fill up uartclk. */
311 for (i = 0; au1x00_uart_data[i].flags ; i++) 311 for (i = 0; au1x00_uart_data[i].flags; i++)
312 au1x00_uart_data[i].uartclk = uartclk; 312 au1x00_uart_data[i].uartclk = uartclk;
313 313
314 return platform_add_devices(au1xxx_platform_devices, ARRAY_SIZE(au1xxx_platform_devices)); 314 return platform_add_devices(au1xxx_platform_devices,
315 ARRAY_SIZE(au1xxx_platform_devices));
315} 316}
316 317
317arch_initcall(au1xxx_platform_init); 318arch_initcall(au1xxx_platform_init);
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index a8cd2c1b9e1b..2166b9e1e80c 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -1,10 +1,9 @@
1/* 1/*
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Au1000 Power Management routines. 3 * Au1xx0 Power Management routines.
4 * 4 *
5 * Copyright 2001 MontaVista Software Inc. 5 * Copyright 2001, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * Some of the routines are right out of init/main.c, whose 8 * Some of the routines are right out of init/main.c, whose
10 * copyrights apply here. 9 * copyrights apply here.
@@ -43,10 +42,10 @@
43#ifdef CONFIG_PM 42#ifdef CONFIG_PM
44 43
45#define DEBUG 1 44#define DEBUG 1
46#ifdef DEBUG 45#ifdef DEBUG
47# define DPRINTK(fmt, args...) printk("%s: " fmt, __func__, ## args) 46#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __func__, ## args)
48#else 47#else
49# define DPRINTK(fmt, args...) 48#define DPRINTK(fmt, args...)
50#endif 49#endif
51 50
52static void au1000_calibrate_delay(void); 51static void au1000_calibrate_delay(void);
@@ -57,7 +56,8 @@ extern void local_enable_irq(unsigned int irq_nr);
57 56
58static DEFINE_SPINLOCK(pm_lock); 57static DEFINE_SPINLOCK(pm_lock);
59 58
60/* We need to save/restore a bunch of core registers that are 59/*
60 * We need to save/restore a bunch of core registers that are
61 * either volatile or reset to some state across a processor sleep. 61 * either volatile or reset to some state across a processor sleep.
62 * If reading a register doesn't provide a proper result for a 62 * If reading a register doesn't provide a proper result for a
63 * later restore, we have to provide a function for loading that 63 * later restore, we have to provide a function for loading that
@@ -78,24 +78,25 @@ static unsigned int sleep_usbhost_enable;
78static unsigned int sleep_usbdev_enable; 78static unsigned int sleep_usbdev_enable;
79static unsigned int sleep_static_memctlr[4][3]; 79static unsigned int sleep_static_memctlr[4][3];
80 80
81/* Define this to cause the value you write to /proc/sys/pm/sleep to 81/*
82 * Define this to cause the value you write to /proc/sys/pm/sleep to
82 * set the TOY timer for the amount of time you want to sleep. 83 * set the TOY timer for the amount of time you want to sleep.
83 * This is done mainly for testing, but may be useful in other cases. 84 * This is done mainly for testing, but may be useful in other cases.
84 * The value is number of 32KHz ticks to sleep. 85 * The value is number of 32KHz ticks to sleep.
85 */ 86 */
86#define SLEEP_TEST_TIMEOUT 1 87#define SLEEP_TEST_TIMEOUT 1
87#ifdef SLEEP_TEST_TIMEOUT 88#ifdef SLEEP_TEST_TIMEOUT
88static int sleep_ticks; 89static int sleep_ticks;
89void wakeup_counter0_set(int ticks); 90void wakeup_counter0_set(int ticks);
90#endif 91#endif
91 92
92static void 93static void save_core_regs(void)
93save_core_regs(void)
94{ 94{
95 extern void save_au1xxx_intctl(void); 95 extern void save_au1xxx_intctl(void);
96 extern void pm_eth0_shutdown(void); 96 extern void pm_eth0_shutdown(void);
97 97
98 /* Do the serial ports.....these really should be a pm_* 98 /*
99 * Do the serial ports.....these really should be a pm_*
99 * registered function by the driver......but of course the 100 * registered function by the driver......but of course the
100 * standard serial driver doesn't understand our Au1xxx 101 * standard serial driver doesn't understand our Au1xxx
101 * unique registers. 102 * unique registers.
@@ -106,27 +107,24 @@ save_core_regs(void)
106 sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK); 107 sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
107 sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL); 108 sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
108 109
109 /* Shutdown USB host/device. 110 /* Shutdown USB host/device. */
110 */
111 sleep_usbhost_enable = au_readl(USB_HOST_CONFIG); 111 sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
112 112
113 /* There appears to be some undocumented reset register.... 113 /* There appears to be some undocumented reset register.... */
114 */
115 au_writel(0, 0xb0100004); au_sync(); 114 au_writel(0, 0xb0100004); au_sync();
116 au_writel(0, USB_HOST_CONFIG); au_sync(); 115 au_writel(0, USB_HOST_CONFIG); au_sync();
117 116
118 sleep_usbdev_enable = au_readl(USBD_ENABLE); 117 sleep_usbdev_enable = au_readl(USBD_ENABLE);
119 au_writel(0, USBD_ENABLE); au_sync(); 118 au_writel(0, USBD_ENABLE); au_sync();
120 119
121 /* Save interrupt controller state. 120 /* Save interrupt controller state. */
122 */
123 save_au1xxx_intctl(); 121 save_au1xxx_intctl();
124 122
125 /* Clocks and PLLs. 123 /* Clocks and PLLs. */
126 */
127 sleep_aux_pll_cntrl = au_readl(SYS_AUXPLL); 124 sleep_aux_pll_cntrl = au_readl(SYS_AUXPLL);
128 125
129 /* We don't really need to do this one, but unless we 126 /*
127 * We don't really need to do this one, but unless we
130 * write it again it won't have a valid value if we 128 * write it again it won't have a valid value if we
131 * happen to read it. 129 * happen to read it.
132 */ 130 */
@@ -134,8 +132,7 @@ save_core_regs(void)
134 132
135 sleep_pin_function = au_readl(SYS_PINFUNC); 133 sleep_pin_function = au_readl(SYS_PINFUNC);
136 134
137 /* Save the static memory controller configuration. 135 /* Save the static memory controller configuration. */
138 */
139 sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0); 136 sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0);
140 sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0); 137 sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0);
141 sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0); 138 sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0);
@@ -150,8 +147,7 @@ save_core_regs(void)
150 sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3); 147 sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3);
151} 148}
152 149
153static void 150static void restore_core_regs(void)
154restore_core_regs(void)
155{ 151{
156 extern void restore_au1xxx_intctl(void); 152 extern void restore_au1xxx_intctl(void);
157 extern void wakeup_counter0_adjust(void); 153 extern void wakeup_counter0_adjust(void);
@@ -160,8 +156,7 @@ restore_core_regs(void)
160 au_writel(sleep_cpu_pll_cntrl, SYS_CPUPLL); au_sync(); 156 au_writel(sleep_cpu_pll_cntrl, SYS_CPUPLL); au_sync();
161 au_writel(sleep_pin_function, SYS_PINFUNC); au_sync(); 157 au_writel(sleep_pin_function, SYS_PINFUNC); au_sync();
162 158
163 /* Restore the static memory controller configuration. 159 /* Restore the static memory controller configuration. */
164 */
165 au_writel(sleep_static_memctlr[0][0], MEM_STCFG0); 160 au_writel(sleep_static_memctlr[0][0], MEM_STCFG0);
166 au_writel(sleep_static_memctlr[0][1], MEM_STTIME0); 161 au_writel(sleep_static_memctlr[0][1], MEM_STTIME0);
167 au_writel(sleep_static_memctlr[0][2], MEM_STADDR0); 162 au_writel(sleep_static_memctlr[0][2], MEM_STADDR0);
@@ -175,7 +170,8 @@ restore_core_regs(void)
175 au_writel(sleep_static_memctlr[3][1], MEM_STTIME3); 170 au_writel(sleep_static_memctlr[3][1], MEM_STTIME3);
176 au_writel(sleep_static_memctlr[3][2], MEM_STADDR3); 171 au_writel(sleep_static_memctlr[3][2], MEM_STADDR3);
177 172
178 /* Enable the UART if it was enabled before sleep. 173 /*
174 * Enable the UART if it was enabled before sleep.
179 * I guess I should define module control bits........ 175 * I guess I should define module control bits........
180 */ 176 */
181 if (sleep_uart0_enable & 0x02) { 177 if (sleep_uart0_enable & 0x02) {
@@ -202,7 +198,7 @@ void wakeup_from_suspend(void)
202int au_sleep(void) 198int au_sleep(void)
203{ 199{
204 unsigned long wakeup, flags; 200 unsigned long wakeup, flags;
205 extern void save_and_sleep(void); 201 extern void save_and_sleep(void);
206 202
207 spin_lock_irqsave(&pm_lock, flags); 203 spin_lock_irqsave(&pm_lock, flags);
208 204
@@ -210,23 +206,22 @@ int au_sleep(void)
210 206
211 flush_cache_all(); 207 flush_cache_all();
212 208
213 /** The code below is all system dependent and we should probably 209 /**
210 ** The code below is all system dependent and we should probably
214 ** have a function call out of here to set this up. You need 211 ** have a function call out of here to set this up. You need
215 ** to configure the GPIO or timer interrupts that will bring 212 ** to configure the GPIO or timer interrupts that will bring
216 ** you out of sleep. 213 ** you out of sleep.
217 ** For testing, the TOY counter wakeup is useful. 214 ** For testing, the TOY counter wakeup is useful.
218 **/ 215 **/
219
220#if 0 216#if 0
221 au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD); 217 au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
222 218
223 /* gpio 6 can cause a wake up event */ 219 /* GPIO 6 can cause a wake up event */
224 wakeup = au_readl(SYS_WAKEMSK); 220 wakeup = au_readl(SYS_WAKEMSK);
225 wakeup &= ~(1 << 8); /* turn off match20 wakeup */ 221 wakeup &= ~(1 << 8); /* turn off match20 wakeup */
226 wakeup |= 1 << 6; /* turn on gpio 6 wakeup */ 222 wakeup |= 1 << 6; /* turn on GPIO 6 wakeup */
227#else 223#else
228 /* For testing, allow match20 to wake us up. 224 /* For testing, allow match20 to wake us up. */
229 */
230#ifdef SLEEP_TEST_TIMEOUT 225#ifdef SLEEP_TEST_TIMEOUT
231 wakeup_counter0_set(sleep_ticks); 226 wakeup_counter0_set(sleep_ticks);
232#endif 227#endif
@@ -240,7 +235,8 @@ int au_sleep(void)
240 235
241 save_and_sleep(); 236 save_and_sleep();
242 237
243 /* after a wakeup, the cpu vectors back to 0x1fc00000 so 238 /*
239 * After a wakeup, the cpu vectors back to 0x1fc00000, so
244 * it's up to the boot code to get us back here. 240 * it's up to the boot code to get us back here.
245 */ 241 */
246 restore_core_regs(); 242 restore_core_regs();
@@ -248,24 +244,22 @@ int au_sleep(void)
248 return 0; 244 return 0;
249} 245}
250 246
251static int pm_do_sleep(ctl_table * ctl, int write, struct file *file, 247static int pm_do_sleep(ctl_table *ctl, int write, struct file *file,
252 void __user *buffer, size_t * len, loff_t *ppos) 248 void __user *buffer, size_t *len, loff_t *ppos)
253{ 249{
254#ifdef SLEEP_TEST_TIMEOUT 250#ifdef SLEEP_TEST_TIMEOUT
255#define TMPBUFLEN2 16 251#define TMPBUFLEN2 16
256 char buf[TMPBUFLEN2], *p; 252 char buf[TMPBUFLEN2], *p;
257#endif 253#endif
258 254
259 if (!write) { 255 if (!write)
260 *len = 0; 256 *len = 0;
261 } else { 257 else {
262#ifdef SLEEP_TEST_TIMEOUT 258#ifdef SLEEP_TEST_TIMEOUT
263 if (*len > TMPBUFLEN2 - 1) { 259 if (*len > TMPBUFLEN2 - 1)
264 return -EFAULT; 260 return -EFAULT;
265 } 261 if (copy_from_user(buf, buffer, *len))
266 if (copy_from_user(buf, buffer, *len)) {
267 return -EFAULT; 262 return -EFAULT;
268 }
269 buf[*len] = 0; 263 buf[*len] = 0;
270 p = buf; 264 p = buf;
271 sleep_ticks = simple_strtoul(p, &p, 0); 265 sleep_ticks = simple_strtoul(p, &p, 0);
@@ -276,8 +270,8 @@ static int pm_do_sleep(ctl_table * ctl, int write, struct file *file,
276 return 0; 270 return 0;
277} 271}
278 272
279static int pm_do_freq(ctl_table * ctl, int write, struct file *file, 273static int pm_do_freq(ctl_table *ctl, int write, struct file *file,
280 void __user *buffer, size_t * len, loff_t *ppos) 274 void __user *buffer, size_t *len, loff_t *ppos)
281{ 275{
282 int retval = 0, i; 276 int retval = 0, i;
283 unsigned long val, pll; 277 unsigned long val, pll;
@@ -285,14 +279,14 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
285#define MAX_CPU_FREQ 396 279#define MAX_CPU_FREQ 396
286 char buf[TMPBUFLEN], *p; 280 char buf[TMPBUFLEN], *p;
287 unsigned long flags, intc0_mask, intc1_mask; 281 unsigned long flags, intc0_mask, intc1_mask;
288 unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk, 282 unsigned long old_baud_base, old_cpu_freq, old_clk, old_refresh;
289 old_refresh;
290 unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh; 283 unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh;
284 unsigned long baud_rate;
291 285
292 spin_lock_irqsave(&pm_lock, flags); 286 spin_lock_irqsave(&pm_lock, flags);
293 if (!write) { 287 if (!write)
294 *len = 0; 288 *len = 0;
295 } else { 289 else {
296 /* Parse the new frequency */ 290 /* Parse the new frequency */
297 if (*len > TMPBUFLEN - 1) { 291 if (*len > TMPBUFLEN - 1) {
298 spin_unlock_irqrestore(&pm_lock, flags); 292 spin_unlock_irqrestore(&pm_lock, flags);
@@ -312,7 +306,7 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
312 306
313 pll = val / 12; 307 pll = val / 12;
314 if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */ 308 if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */
315 /* revisit this for higher speed cpus */ 309 /* Revisit this for higher speed CPUs */
316 spin_unlock_irqrestore(&pm_lock, flags); 310 spin_unlock_irqrestore(&pm_lock, flags);
317 return -EFAULT; 311 return -EFAULT;
318 } 312 }
@@ -321,30 +315,28 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
321 old_cpu_freq = get_au1x00_speed(); 315 old_cpu_freq = get_au1x00_speed();
322 316
323 new_cpu_freq = pll * 12 * 1000000; 317 new_cpu_freq = pll * 12 * 1000000;
324 new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); 318 new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)
319 & 0x03) + 2) * 16));
325 set_au1x00_speed(new_cpu_freq); 320 set_au1x00_speed(new_cpu_freq);
326 set_au1x00_uart_baud_base(new_baud_base); 321 set_au1x00_uart_baud_base(new_baud_base);
327 322
328 old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff; 323 old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
329 new_refresh = 324 new_refresh = ((old_refresh * new_cpu_freq) / old_cpu_freq) |
330 ((old_refresh * new_cpu_freq) / 325 (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
331 old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
332 326
333 au_writel(pll, SYS_CPUPLL); 327 au_writel(pll, SYS_CPUPLL);
334 au_sync_delay(1); 328 au_sync_delay(1);
335 au_writel(new_refresh, MEM_SDREFCFG); 329 au_writel(new_refresh, MEM_SDREFCFG);
336 au_sync_delay(1); 330 au_sync_delay(1);
337 331
338 for (i = 0; i < 4; i++) { 332 for (i = 0; i < 4; i++)
339 if (au_readl 333 if (au_readl(UART_BASE + UART_MOD_CNTRL +
340 (UART_BASE + UART_MOD_CNTRL + 334 i * 0x00100000) == 3) {
341 i * 0x00100000) == 3) { 335 old_clk = au_readl(UART_BASE + UART_CLK +
342 old_clk = 336 i * 0x00100000);
343 au_readl(UART_BASE + UART_CLK +
344 i * 0x00100000);
345 // baud_rate = baud_base/clk
346 baud_rate = old_baud_base / old_clk; 337 baud_rate = old_baud_base / old_clk;
347 /* we won't get an exact baud rate and the error 338 /*
339 * We won't get an exact baud rate and the error
348 * could be significant enough that our new 340 * could be significant enough that our new
349 * calculation will result in a clock that will 341 * calculation will result in a clock that will
350 * give us a baud rate that's too far off from 342 * give us a baud rate that's too far off from
@@ -359,18 +351,14 @@ static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
359 else if (baud_rate > 17000) 351 else if (baud_rate > 17000)
360 baud_rate = 19200; 352 baud_rate = 19200;
361 else 353 else
362 (baud_rate = 9600); 354 baud_rate = 9600;
363 // new_clk = new_baud_base/baud_rate
364 new_clk = new_baud_base / baud_rate; 355 new_clk = new_baud_base / baud_rate;
365 au_writel(new_clk, 356 au_writel(new_clk, UART_BASE + UART_CLK +
366 UART_BASE + UART_CLK + 357 i * 0x00100000);
367 i * 0x00100000);
368 au_sync_delay(10); 358 au_sync_delay(10);
369 } 359 }
370 }
371 } 360 }
372 361
373
374 /* 362 /*
375 * We don't want _any_ interrupts other than match20. Otherwise our 363 * We don't want _any_ interrupts other than match20. Otherwise our
376 * au1000_calibrate_delay() calculation will be off, potentially a lot. 364 * au1000_calibrate_delay() calculation will be off, potentially a lot.
@@ -428,14 +416,15 @@ static int __init pm_init(void)
428 416
429__initcall(pm_init); 417__initcall(pm_init);
430 418
431
432/* 419/*
433 * This is right out of init/main.c 420 * This is right out of init/main.c
434 */ 421 */
435 422
436/* This is the number of bits of precision for the loops_per_jiffy. Each 423/*
437 bit takes on average 1.5/HZ seconds. This (like the original) is a little 424 * This is the number of bits of precision for the loops_per_jiffy.
438 better than 1% */ 425 * Each bit takes on average 1.5/HZ seconds. This (like the original)
426 * is a little better than 1%.
427 */
439#define LPS_PREC 8 428#define LPS_PREC 8
440 429
441static void au1000_calibrate_delay(void) 430static void au1000_calibrate_delay(void)
@@ -443,14 +432,14 @@ static void au1000_calibrate_delay(void)
443 unsigned long ticks, loopbit; 432 unsigned long ticks, loopbit;
444 int lps_precision = LPS_PREC; 433 int lps_precision = LPS_PREC;
445 434
446 loops_per_jiffy = (1 << 12); 435 loops_per_jiffy = 1 << 12;
447 436
448 while (loops_per_jiffy <<= 1) { 437 while (loops_per_jiffy <<= 1) {
449 /* wait for "start of" clock tick */ 438 /* Wait for "start of" clock tick */
450 ticks = jiffies; 439 ticks = jiffies;
451 while (ticks == jiffies) 440 while (ticks == jiffies)
452 /* nothing */ ; 441 /* nothing */ ;
453 /* Go .. */ 442 /* Go ... */
454 ticks = jiffies; 443 ticks = jiffies;
455 __delay(loops_per_jiffy); 444 __delay(loops_per_jiffy);
456 ticks = jiffies - ticks; 445 ticks = jiffies - ticks;
@@ -458,8 +447,10 @@ static void au1000_calibrate_delay(void)
458 break; 447 break;
459 } 448 }
460 449
461/* Do a binary approximation to get loops_per_jiffy set to equal one clock 450 /*
462 (up to lps_precision bits) */ 451 * Do a binary approximation to get loops_per_jiffy set to be equal
452 * one clock (up to lps_precision bits)
453 */
463 loops_per_jiffy >>= 1; 454 loops_per_jiffy >>= 1;
464 loopbit = loops_per_jiffy; 455 loopbit = loops_per_jiffy;
465 while (lps_precision-- && (loopbit >>= 1)) { 456 while (lps_precision-- && (loopbit >>= 1)) {
@@ -472,4 +463,4 @@ static void au1000_calibrate_delay(void)
472 loops_per_jiffy &= ~loopbit; 463 loops_per_jiffy &= ~loopbit;
473 } 464 }
474} 465}
475#endif /* CONFIG_PM */ 466#endif /* CONFIG_PM */
diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/au1000/common/prom.c
index f10af829e4ec..18b310b475ca 100644
--- a/arch/mips/au1000/common/prom.c
+++ b/arch/mips/au1000/common/prom.c
@@ -3,9 +3,8 @@
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * PROM library initialisation code, supports YAMON and U-Boot. 4 * PROM library initialisation code, supports YAMON and U-Boot.
5 * 5 *
6 * Copyright 2000, 2001, 2006 MontaVista Software Inc. 6 * Copyright 2000-2001, 2006, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This file was derived from Carsten Langgaard's 9 * This file was derived from Carsten Langgaard's
11 * arch/mips/mips-boards/xx files. 10 * arch/mips/mips-boards/xx files.
@@ -57,7 +56,7 @@ void prom_init_cmdline(void)
57 actr = 1; /* Always ignore argv[0] */ 56 actr = 1; /* Always ignore argv[0] */
58 57
59 cp = &(arcs_cmdline[0]); 58 cp = &(arcs_cmdline[0]);
60 while(actr < prom_argc) { 59 while (actr < prom_argc) {
61 strcpy(cp, prom_argv[actr]); 60 strcpy(cp, prom_argv[actr]);
62 cp += strlen(prom_argv[actr]); 61 cp += strlen(prom_argv[actr]);
63 *cp++ = ' '; 62 *cp++ = ' ';
@@ -84,10 +83,8 @@ char *prom_getenv(char *envname)
84 if (yamon) { 83 if (yamon) {
85 if (strcmp(envname, *env++) == 0) 84 if (strcmp(envname, *env++) == 0)
86 return *env; 85 return *env;
87 } else { 86 } else if (strncmp(envname, *env, i) == 0 && (*env)[i] == '=')
88 if (strncmp(envname, *env, i) == 0 && (*env)[i] == '=') 87 return *env + i + 1;
89 return *env + i + 1;
90 }
91 env++; 88 env++;
92 } 89 }
93 90
@@ -110,13 +107,13 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
110{ 107{
111 int i; 108 int i;
112 109
113 for(i = 0; i < 6; i++) { 110 for (i = 0; i < 6; i++) {
114 unsigned char num; 111 unsigned char num;
115 112
116 if((*str == '.') || (*str == ':')) 113 if ((*str == '.') || (*str == ':'))
117 str++; 114 str++;
118 num = str2hexnum(*str++) << 4; 115 num = str2hexnum(*str++) << 4;
119 num |= (str2hexnum(*str++)); 116 num |= str2hexnum(*str++);
120 ea[i] = num; 117 ea[i] = num;
121 } 118 }
122} 119}
diff --git a/arch/mips/au1000/common/puts.c b/arch/mips/au1000/common/puts.c
index e34c67e89293..55bbe24d45b6 100644
--- a/arch/mips/au1000/common/puts.c
+++ b/arch/mips/au1000/common/puts.c
@@ -1,11 +1,10 @@
1/* 1/*
2 * 2 *
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * Low level uart routines to directly access a 16550 uart. 4 * Low level UART routines to directly access Alchemy UART.
5 * 5 *
6 * Copyright 2001 MontaVista Software Inc. 6 * Copyright 2001, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -40,12 +39,12 @@
40 39
41static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE; 40static volatile unsigned long * const com1 = (unsigned long *)SERIAL_BASE;
42 41
43
44#ifdef SLOW_DOWN 42#ifdef SLOW_DOWN
45static inline void slow_down(void) 43static inline void slow_down(void)
46{ 44{
47 int k; 45 int k;
48 for (k=0; k<10000; k++); 46
47 for (k = 0; k < 10000; k++);
49} 48}
50#else 49#else
51#define slow_down() 50#define slow_down()
@@ -54,16 +53,16 @@ static inline void slow_down(void)
54void 53void
55prom_putchar(const unsigned char c) 54prom_putchar(const unsigned char c)
56{ 55{
57 unsigned char ch; 56 unsigned char ch;
58 int i = 0; 57 int i = 0;
58
59 do {
60 ch = com1[SER_CMD];
61 slow_down();
62 i++;
63 if (i > TIMEOUT)
64 break;
65 } while (0 == (ch & TX_BUSY));
59 66
60 do { 67 com1[SER_DATA] = c;
61 ch = com1[SER_CMD];
62 slow_down();
63 i++;
64 if (i>TIMEOUT) {
65 break;
66 }
67 } while (0 == (ch & TX_BUSY));
68 com1[SER_DATA] = c;
69} 68}
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index 60cec537c745..d555429c8d6f 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -1,11 +1,10 @@
1/* 1/*
2 * 2 *
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * Au1000 reset routines. 4 * Au1xx0 reset routines.
5 * 5 *
6 * Copyright 2001 MontaVista Software Inc. 6 * Copyright 2001, 2006, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -28,10 +27,11 @@
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 28 */
30 29
30#include <asm/cacheflush.h>
31
31#include <asm/mach-au1x00/au1000.h> 32#include <asm/mach-au1x00/au1000.h>
32 33
33extern int au_sleep(void); 34extern int au_sleep(void);
34extern void (*flush_cache_all)(void);
35 35
36void au1000_restart(char *command) 36void au1000_restart(char *command)
37{ 37{
@@ -40,8 +40,8 @@ void au1000_restart(char *command)
40 u32 prid = read_c0_prid(); 40 u32 prid = read_c0_prid();
41 41
42 printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n"); 42 printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
43 switch (prid & 0xFF000000) 43
44 { 44 switch (prid & 0xFF000000) {
45 case 0x00000000: /* Au1000 */ 45 case 0x00000000: /* Au1000 */
46 au_writel(0x02, 0xb0000010); /* ac97_enable */ 46 au_writel(0x02, 0xb0000010); /* ac97_enable */
47 au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */ 47 au_writel(0x08, 0xb017fffc); /* usbh_enable - early errata */
@@ -138,9 +138,6 @@ void au1000_restart(char *command)
138 au_writel(0x00, 0xb1900064); /* sys_auxpll */ 138 au_writel(0x00, 0xb1900064); /* sys_auxpll */
139 au_writel(0x00, 0xb1900100); /* sys_pininputen */ 139 au_writel(0x00, 0xb1900100); /* sys_pininputen */
140 break; 140 break;
141
142 default:
143 break;
144 } 141 }
145 142
146 set_c0_status(ST0_BEV | ST0_ERL); 143 set_c0_status(ST0_BEV | ST0_ERL);
@@ -158,25 +155,25 @@ void au1000_restart(char *command)
158void au1000_halt(void) 155void au1000_halt(void)
159{ 156{
160#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) 157#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
161 /* power off system */ 158 /* Power off system */
162 printk("\n** Powering off...\n"); 159 printk(KERN_NOTICE "\n** Powering off...\n");
163 au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C); 160 au_writew(au_readw(0xAF00001C) | (3 << 14), 0xAF00001C);
164 au_sync(); 161 au_sync();
165 while(1); /* should not get here */ 162 while (1); /* should not get here */
166#else 163#else
167 printk(KERN_NOTICE "\n** You can safely turn off the power\n"); 164 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
168#ifdef CONFIG_MIPS_MIRAGE 165#ifdef CONFIG_MIPS_MIRAGE
169 au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT); 166 au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
170#endif 167#endif
171#ifdef CONFIG_MIPS_DB1200 168#ifdef CONFIG_MIPS_DB1200
172 au_writew(au_readw(0xB980001C) | (1<<14), 0xB980001C); 169 au_writew(au_readw(0xB980001C) | (1 << 14), 0xB980001C);
173#endif 170#endif
174#ifdef CONFIG_PM 171#ifdef CONFIG_PM
175 au_sleep(); 172 au_sleep();
176 173
177 /* should not get here */ 174 /* Should not get here */
178 printk(KERN_ERR "Unable to put cpu in sleep mode\n"); 175 printk(KERN_ERR "Unable to put CPU in sleep mode\n");
179 while(1); 176 while (1);
180#else 177#else
181 while (1) 178 while (1)
182 __asm__(".set\tmips3\n\t" 179 __asm__(".set\tmips3\n\t"
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 0e86f7a6b4a7..1ac6b06f42a3 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -1,7 +1,6 @@
1/* 1/*
2 * Copyright 2000 MontaVista Software Inc. 2 * Copyright 2000, 2007-2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. 3 * Author: MontaVista Software, Inc. <source@mvista.com
4 * ppopov@mvista.com or source@mvista.com
5 * 4 *
6 * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc. 5 * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc.
7 * 6 *
@@ -48,7 +47,7 @@ void __init plat_mem_setup(void)
48{ 47{
49 struct cpu_spec *sp; 48 struct cpu_spec *sp;
50 char *argptr; 49 char *argptr;
51 unsigned long prid, cpufreq, bclk = 1; 50 unsigned long prid, cpufreq, bclk;
52 51
53 set_cpuspec(); 52 set_cpuspec();
54 sp = cur_cpu_spec[0]; 53 sp = cur_cpu_spec[0];
@@ -66,42 +65,39 @@ void __init plat_mem_setup(void)
66 cpufreq = (au_readl(SYS_CPUPLL) & 0x3F) * 12; 65 cpufreq = (au_readl(SYS_CPUPLL) & 0x3F) * 12;
67 printk(KERN_INFO "(PRID %08lx) @ %ld MHz\n", prid, cpufreq); 66 printk(KERN_INFO "(PRID %08lx) @ %ld MHz\n", prid, cpufreq);
68 67
69 bclk = sp->cpu_bclk; 68 if (sp->cpu_bclk) {
70 if (bclk)
71 {
72 /* Enable BCLK switching */ 69 /* Enable BCLK switching */
73 bclk = au_readl(0xB190003C); 70 bclk = au_readl(SYS_POWERCTRL);
74 au_writel(bclk | 0x60, 0xB190003C); 71 au_writel(bclk | 0x60, SYS_POWERCTRL);
75 printk("BCLK switching enabled!\n"); 72 printk(KERN_INFO "BCLK switching enabled!\n");
76 } 73 }
77 74
78 if (sp->cpu_od) { 75 if (sp->cpu_od)
79 /* Various early Au1000 Errata corrected by this */ 76 /* Various early Au1xx0 errata corrected by this */
80 set_c0_config(1<<19); /* Set Config[OD] */ 77 set_c0_config(1 << 19); /* Set Config[OD] */
81 } 78 else
82 else {
83 /* Clear to obtain best system bus performance */ 79 /* Clear to obtain best system bus performance */
84 clear_c0_config(1<<19); /* Clear Config[OD] */ 80 clear_c0_config(1 << 19); /* Clear Config[OD] */
85 }
86 81
87 argptr = prom_getcmdline(); 82 argptr = prom_getcmdline();
88 83
89#ifdef CONFIG_SERIAL_8250_CONSOLE 84#ifdef CONFIG_SERIAL_8250_CONSOLE
90 if ((argptr = strstr(argptr, "console=")) == NULL) { 85 argptr = strstr(argptr, "console=");
86 if (argptr == NULL) {
91 argptr = prom_getcmdline(); 87 argptr = prom_getcmdline();
92 strcat(argptr, " console=ttyS0,115200"); 88 strcat(argptr, " console=ttyS0,115200");
93 } 89 }
94#endif 90#endif
95 91
96#ifdef CONFIG_FB_AU1100 92#ifdef CONFIG_FB_AU1100
97 if ((argptr = strstr(argptr, "video=")) == NULL) { 93 argptr = strstr(argptr, "video=");
98 argptr = prom_getcmdline(); 94 if (argptr == NULL) {
99 /* default panel */ 95 argptr = prom_getcmdline();
100 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ 96 /* default panel */
101 } 97 /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
98 }
102#endif 99#endif
103 100
104
105#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000) 101#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
106 /* au1000 does not support vra, au1500 and au1100 do */ 102 /* au1000 does not support vra, au1500 and au1100 do */
107 strcat(argptr, " au1000_audio=vra"); 103 strcat(argptr, " au1000_audio=vra");
@@ -129,7 +125,7 @@ void __init plat_mem_setup(void)
129/* This routine should be valid for all Au1x based boards */ 125/* This routine should be valid for all Au1x based boards */
130phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) 126phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
131{ 127{
132 /* Don't fixup 36 bit addresses */ 128 /* Don't fixup 36-bit addresses */
133 if ((phys_addr >> 32) != 0) 129 if ((phys_addr >> 32) != 0)
134 return phys_addr; 130 return phys_addr;
135 131
@@ -145,17 +141,17 @@ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
145 } 141 }
146#endif 142#endif
147 143
148 /* All Au1x SOCs have a pcmcia controller */ 144 /*
149 /* We setup our 32 bit pseudo addresses to be equal to the 145 * All Au1xx0 SOCs have a PCMCIA controller.
150 * 36 bit addr >> 4, to make it easier to check the address 146 * We setup our 32-bit pseudo addresses to be equal to the
147 * 36-bit addr >> 4, to make it easier to check the address
151 * and fix it. 148 * and fix it.
152 * The Au1x socket 0 phys attribute address is 0xF 4000 0000. 149 * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000.
153 * The pseudo address we use is 0xF400 0000. Any address over 150 * The pseudo address we use is 0xF400 0000. Any address over
154 * 0xF400 0000 is a pcmcia pseudo address. 151 * 0xF400 0000 is a PCMCIA pseudo address.
155 */ 152 */
156 if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) { 153 if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF))
157 return (phys_t)(phys_addr << 4); 154 return (phys_t)(phys_addr << 4);
158 }
159 155
160 /* default nop */ 156 /* default nop */
161 return phys_addr; 157 return phys_addr;
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index bdb6d73b26fb..563d9390a872 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -25,11 +25,9 @@
25 * 25 *
26 * Setting up the clock on the MIPS boards. 26 * Setting up the clock on the MIPS boards.
27 * 27 *
28 * Update. Always configure the kernel with CONFIG_NEW_TIME_C. This 28 * We provide the clock interrupt processing and the timer offset compute
29 * will use the user interface gettimeofday() functions from the 29 * functions. If CONFIG_PM is selected, we also ensure the 32KHz timer is
30 * arch/mips/kernel/time.c, and we provide the clock interrupt processing 30 * available. -- Dan
31 * and the timer offset compute functions. If CONFIG_PM is selected,
32 * we also ensure the 32KHz timer is available. -- Dan
33 */ 31 */
34 32
35#include <linux/types.h> 33#include <linux/types.h>
@@ -47,8 +45,7 @@ extern int allow_au1k_wait; /* default off for CP0 Counter */
47#if HZ < 100 || HZ > 1000 45#if HZ < 100 || HZ > 1000
48#error "unsupported HZ value! Must be in [100,1000]" 46#error "unsupported HZ value! Must be in [100,1000]"
49#endif 47#endif
50#define MATCH20_INC (328*100/HZ) /* magic number 328 is for HZ=100... */ 48#define MATCH20_INC (328 * 100 / HZ) /* magic number 328 is for HZ=100... */
51extern void startup_match20_interrupt(irq_handler_t handler);
52static unsigned long last_pc0, last_match20; 49static unsigned long last_pc0, last_match20;
53#endif 50#endif
54 51
@@ -61,7 +58,7 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
61{ 58{
62 unsigned long pc0; 59 unsigned long pc0;
63 int time_elapsed; 60 int time_elapsed;
64 static int jiffie_drift = 0; 61 static int jiffie_drift;
65 62
66 if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) { 63 if (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20) {
67 /* should never happen! */ 64 /* should never happen! */
@@ -70,13 +67,11 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
70 } 67 }
71 68
72 pc0 = au_readl(SYS_TOYREAD); 69 pc0 = au_readl(SYS_TOYREAD);
73 if (pc0 < last_match20) { 70 if (pc0 < last_match20)
74 /* counter overflowed */ 71 /* counter overflowed */
75 time_elapsed = (0xffffffff - last_match20) + pc0; 72 time_elapsed = (0xffffffff - last_match20) + pc0;
76 } 73 else
77 else {
78 time_elapsed = pc0 - last_match20; 74 time_elapsed = pc0 - last_match20;
79 }
80 75
81 while (time_elapsed > 0) { 76 while (time_elapsed > 0) {
82 do_timer(1); 77 do_timer(1);
@@ -92,8 +87,9 @@ static irqreturn_t counter0_irq(int irq, void *dev_id)
92 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2); 87 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
93 au_sync(); 88 au_sync();
94 89
95 /* our counter ticks at 10.009765625 ms/tick, we we're running 90 /*
96 * almost 10uS too slow per tick. 91 * Our counter ticks at 10.009765625 ms/tick, we we're running
92 * almost 10 uS too slow per tick.
97 */ 93 */
98 94
99 if (jiffie_drift >= 999) { 95 if (jiffie_drift >= 999) {
@@ -117,20 +113,17 @@ struct irqaction counter0_action = {
117/* When we wakeup from sleep, we have to "catch up" on all of the 113/* When we wakeup from sleep, we have to "catch up" on all of the
118 * timer ticks we have missed. 114 * timer ticks we have missed.
119 */ 115 */
120void 116void wakeup_counter0_adjust(void)
121wakeup_counter0_adjust(void)
122{ 117{
123 unsigned long pc0; 118 unsigned long pc0;
124 int time_elapsed; 119 int time_elapsed;
125 120
126 pc0 = au_readl(SYS_TOYREAD); 121 pc0 = au_readl(SYS_TOYREAD);
127 if (pc0 < last_match20) { 122 if (pc0 < last_match20)
128 /* counter overflowed */ 123 /* counter overflowed */
129 time_elapsed = (0xffffffff - last_match20) + pc0; 124 time_elapsed = (0xffffffff - last_match20) + pc0;
130 } 125 else
131 else {
132 time_elapsed = pc0 - last_match20; 126 time_elapsed = pc0 - last_match20;
133 }
134 127
135 while (time_elapsed > 0) { 128 while (time_elapsed > 0) {
136 time_elapsed -= MATCH20_INC; 129 time_elapsed -= MATCH20_INC;
@@ -143,10 +136,8 @@ wakeup_counter0_adjust(void)
143 136
144} 137}
145 138
146/* This is just for debugging to set the timer for a sleep delay. 139/* This is just for debugging to set the timer for a sleep delay. */
147*/ 140void wakeup_counter0_set(int ticks)
148void
149wakeup_counter0_set(int ticks)
150{ 141{
151 unsigned long pc0; 142 unsigned long pc0;
152 143
@@ -157,21 +148,22 @@ wakeup_counter0_set(int ticks)
157} 148}
158#endif 149#endif
159 150
160/* I haven't found anyone that doesn't use a 12 MHz source clock, 151/*
152 * I haven't found anyone that doesn't use a 12 MHz source clock,
161 * but just in case..... 153 * but just in case.....
162 */ 154 */
163#define AU1000_SRC_CLK 12000000 155#define AU1000_SRC_CLK 12000000
164 156
165/* 157/*
166 * We read the real processor speed from the PLL. This is important 158 * We read the real processor speed from the PLL. This is important
167 * because it is more accurate than computing it from the 32KHz 159 * because it is more accurate than computing it from the 32 KHz
168 * counter, if it exists. If we don't have an accurate processor 160 * counter, if it exists. If we don't have an accurate processor
169 * speed, all of the peripherals that derive their clocks based on 161 * speed, all of the peripherals that derive their clocks based on
170 * this advertised speed will introduce error and sometimes not work 162 * this advertised speed will introduce error and sometimes not work
171 * properly. This function is futher convoluted to still allow configurations 163 * properly. This function is futher convoluted to still allow configurations
172 * to do that in case they have really, really old silicon with a 164 * to do that in case they have really, really old silicon with a
173 * write-only PLL register, that we need the 32KHz when power management 165 * write-only PLL register, that we need the 32 KHz when power management
174 * "wait" is enabled, and we need to detect if the 32KHz isn't present 166 * "wait" is enabled, and we need to detect if the 32 KHz isn't present
175 * but requested......got it? :-) -- Dan 167 * but requested......got it? :-) -- Dan
176 */ 168 */
177unsigned long calc_clock(void) 169unsigned long calc_clock(void)
@@ -182,8 +174,7 @@ unsigned long calc_clock(void)
182 174
183 spin_lock_irqsave(&time_lock, flags); 175 spin_lock_irqsave(&time_lock, flags);
184 176
185 /* Power management cares if we don't have a 32KHz counter. 177 /* Power management cares if we don't have a 32 KHz counter. */
186 */
187 no_au1xxx_32khz = 0; 178 no_au1xxx_32khz = 0;
188 counter = au_readl(SYS_COUNTER_CNTRL); 179 counter = au_readl(SYS_COUNTER_CNTRL);
189 if (counter & SYS_CNTRL_E0) { 180 if (counter & SYS_CNTRL_E0) {
@@ -193,7 +184,7 @@ unsigned long calc_clock(void)
193 184
194 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S); 185 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
195 /* RTC now ticks at 32.768/16 kHz */ 186 /* RTC now ticks at 32.768/16 kHz */
196 au_writel(trim_divide-1, SYS_RTCTRIM); 187 au_writel(trim_divide - 1, SYS_RTCTRIM);
197 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S); 188 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T1S);
198 189
199 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S); 190 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C1S);
@@ -215,9 +206,11 @@ unsigned long calc_clock(void)
215#endif 206#endif
216 else 207 else
217 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK; 208 cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK;
209 /* On Alchemy CPU:counter ratio is 1:1 */
218 mips_hpt_frequency = cpu_speed; 210 mips_hpt_frequency = cpu_speed;
219 // Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) 211 /* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */
220 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16)); 212 set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL)
213 & 0x03) + 2) * 16));
221 spin_unlock_irqrestore(&time_lock, flags); 214 spin_unlock_irqrestore(&time_lock, flags);
222 return cpu_speed; 215 return cpu_speed;
223} 216}
@@ -228,10 +221,10 @@ void __init plat_time_init(void)
228 221
229 est_freq += 5000; /* round */ 222 est_freq += 5000; /* round */
230 est_freq -= est_freq%10000; 223 est_freq -= est_freq%10000;
231 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, 224 printk(KERN_INFO "CPU frequency %u.%02u MHz\n",
232 (est_freq%1000000)*100/1000000); 225 est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000);
233 set_au1x00_speed(est_freq); 226 set_au1x00_speed(est_freq);
234 set_au1x00_lcd_clock(); // program the LCD clock 227 set_au1x00_lcd_clock(); /* program the LCD clock */
235 228
236#ifdef CONFIG_PM 229#ifdef CONFIG_PM
237 /* 230 /*
@@ -243,30 +236,29 @@ void __init plat_time_init(void)
243 * counter 0 interrupt as a special irq and it doesn't show 236 * counter 0 interrupt as a special irq and it doesn't show
244 * up under /proc/interrupts. 237 * up under /proc/interrupts.
245 * 238 *
246 * Check to ensure we really have a 32KHz oscillator before 239 * Check to ensure we really have a 32 KHz oscillator before
247 * we do this. 240 * we do this.
248 */ 241 */
249 if (no_au1xxx_32khz) 242 if (no_au1xxx_32khz)
250 printk("WARNING: no 32KHz clock found.\n"); 243 printk(KERN_WARNING "WARNING: no 32KHz clock found.\n");
251 else { 244 else {
252 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S); 245 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
253 au_writel(0, SYS_TOYWRITE); 246 au_writel(0, SYS_TOYWRITE);
254 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S); 247 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
255 248
256 au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK); 249 au_writel(au_readl(SYS_WAKEMSK) | (1 << 8), SYS_WAKEMSK);
257 au_writel(~0, SYS_WAKESRC); 250 au_writel(~0, SYS_WAKESRC);
258 au_sync(); 251 au_sync();
259 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20); 252 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
260 253
261 /* setup match20 to interrupt once every HZ */ 254 /* Setup match20 to interrupt once every HZ */
262 last_pc0 = last_match20 = au_readl(SYS_TOYREAD); 255 last_pc0 = last_match20 = au_readl(SYS_TOYREAD);
263 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2); 256 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
264 au_sync(); 257 au_sync();
265 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20); 258 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
266 setup_irq(AU1000_TOY_MATCH2_INT, &counter0_action); 259 setup_irq(AU1000_TOY_MATCH2_INT, &counter0_action);
267 260
268 /* We can use the real 'wait' instruction. 261 /* We can use the real 'wait' instruction. */
269 */
270 allow_au1k_wait = 1; 262 allow_au1k_wait = 1;
271 } 263 }
272 264
diff --git a/arch/mips/au1000/db1x00/Makefile b/arch/mips/au1000/db1x00/Makefile
index 51d62bd5d900..274db3b55d82 100644
--- a/arch/mips/au1000/db1x00/Makefile
+++ b/arch/mips/au1000/db1x00/Makefile
@@ -1,8 +1,8 @@
1# 1#
2# Copyright 2000 MontaVista Software Inc. 2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com 4#
5# Makefile for the Alchemy Semiconductor DBAu1xx0 boards.
5# 6#
6# Makefile for the Alchemy Semiconductor Db1x00 board.
7 7
8lib-y := init.o board_setup.o irqmap.o 8lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c
index b7dcbad5c586..9e5ccbbfcedd 100644
--- a/arch/mips/au1000/db1x00/board_setup.c
+++ b/arch/mips/au1000/db1x00/board_setup.c
@@ -3,9 +3,8 @@
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Db1x00 board setup. 4 * Alchemy Db1x00 board setup.
5 * 5 *
6 * Copyright 2000 MontaVista Software Inc. 6 * Copyright 2000, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -37,49 +36,49 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
37 36
38void board_reset(void) 37void board_reset(void)
39{ 38{
40 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 39 /* Hit BCSR.SW_RESET[RESET] */
41 bcsr->swreset = 0x0000; 40 bcsr->swreset = 0x0000;
42} 41}
43 42
44void __init board_setup(void) 43void __init board_setup(void)
45{ 44{
46 u32 pin_func; 45 u32 pin_func = 0;
47 46
48 pin_func = 0; 47 /* Not valid for Au1550 */
49 /* not valid for 1550 */ 48#if defined(CONFIG_IRDA) && \
50 49 (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
51#if defined(CONFIG_IRDA) && (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) 50 /* Set IRFIRSEL instead of GPIO15 */
52 /* set IRFIRSEL instead of GPIO15 */ 51 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
53 pin_func = au_readl(SYS_PINFUNC) | (u32)((1<<8));
54 au_writel(pin_func, SYS_PINFUNC); 52 au_writel(pin_func, SYS_PINFUNC);
55 /* power off until the driver is in use */ 53 /* Power off until the driver is in use */
56 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK; 54 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
57 bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF; 55 bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF;
58 au_sync(); 56 au_sync();
59#endif 57#endif
60 bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */ 58 bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */
61 59
62#ifdef CONFIG_MIPS_MIRAGE 60#ifdef CONFIG_MIPS_MIRAGE
63 /* enable GPIO[31:0] inputs */ 61 /* Enable GPIO[31:0] inputs */
64 au_writel(0, SYS_PININPUTEN); 62 au_writel(0, SYS_PININPUTEN);
65 63
66 /* GPIO[20] is output, tristate the other input primary GPIO's */ 64 /* GPIO[20] is output, tristate the other input primary GPIOs */
67 au_writel((u32)(~(1<<20)), SYS_TRIOUTCLR); 65 au_writel(~(1 << 20), SYS_TRIOUTCLR);
68 66
69 /* set GPIO[210:208] instead of SSI_0 */ 67 /* Set GPIO[210:208] instead of SSI_0 */
70 pin_func = au_readl(SYS_PINFUNC) | (u32)(1); 68 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
71 69
72 /* set GPIO[215:211] for LED's */ 70 /* Set GPIO[215:211] for LEDs */
73 pin_func |= (u32)((5<<2)); 71 pin_func |= 5 << 2;
74 72
75 /* set GPIO[214:213] for more LED's */ 73 /* Set GPIO[214:213] for more LEDs */
76 pin_func |= (u32)((5<<12)); 74 pin_func |= 5 << 12;
77 75
78 /* set GPIO[207:200] instead of PCMCIA/LCD */ 76 /* Set GPIO[207:200] instead of PCMCIA/LCD */
79 pin_func |= (u32)((3<<17)); 77 pin_func |= SYS_PF_LCD | SYS_PF_PC;
80 au_writel(pin_func, SYS_PINFUNC); 78 au_writel(pin_func, SYS_PINFUNC);
81 79
82 /* Enable speaker amplifier. This should 80 /*
81 * Enable speaker amplifier. This should
83 * be part of the audio driver. 82 * be part of the audio driver.
84 */ 83 */
85 au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR); 84 au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR);
@@ -89,21 +88,21 @@ void __init board_setup(void)
89 au_sync(); 88 au_sync();
90 89
91#ifdef CONFIG_MIPS_DB1000 90#ifdef CONFIG_MIPS_DB1000
92 printk("AMD Alchemy Au1000/Db1000 Board\n"); 91 printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
93#endif 92#endif
94#ifdef CONFIG_MIPS_DB1500 93#ifdef CONFIG_MIPS_DB1500
95 printk("AMD Alchemy Au1500/Db1500 Board\n"); 94 printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
96#endif 95#endif
97#ifdef CONFIG_MIPS_DB1100 96#ifdef CONFIG_MIPS_DB1100
98 printk("AMD Alchemy Au1100/Db1100 Board\n"); 97 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
99#endif 98#endif
100#ifdef CONFIG_MIPS_BOSPORUS 99#ifdef CONFIG_MIPS_BOSPORUS
101 printk("AMD Alchemy Bosporus Board\n"); 100 printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
102#endif 101#endif
103#ifdef CONFIG_MIPS_MIRAGE 102#ifdef CONFIG_MIPS_MIRAGE
104 printk("AMD Alchemy Mirage Board\n"); 103 printk(KERN_INFO "AMD Alchemy Mirage Board\n");
105#endif 104#endif
106#ifdef CONFIG_MIPS_DB1550 105#ifdef CONFIG_MIPS_DB1550
107 printk("AMD Alchemy Au1550/Db1550 Board\n"); 106 printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
108#endif 107#endif
109} 108}
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index d3b967caf70c..5ebe0de5e459 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -2,9 +2,8 @@
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * PB1000 board setup 3 * PB1000 board setup
4 * 4 *
5 * Copyright 2001 MontaVista Software Inc. 5 * Copyright 2001, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -49,8 +48,8 @@ void __init prom_init(void)
49 unsigned long memsize; 48 unsigned long memsize;
50 49
51 prom_argc = fw_arg0; 50 prom_argc = fw_arg0;
52 prom_argv = (char **) fw_arg1; 51 prom_argv = (char **)fw_arg1;
53 prom_envp = (char **) fw_arg2; 52 prom_envp = (char **)fw_arg2;
54 53
55 prom_init_cmdline(); 54 prom_init_cmdline();
56 55
@@ -58,6 +57,6 @@ void __init prom_init(void)
58 if (!memsize_str) 57 if (!memsize_str)
59 memsize = 0x04000000; 58 memsize = 0x04000000;
60 else 59 else
61 memsize = simple_strtol(memsize_str, NULL, 0); 60 memsize = strict_strtol(memsize_str, 0, NULL);
62 add_memory_region(0, memsize, BOOT_MEM_RAM); 61 add_memory_region(0, memsize, BOOT_MEM_RAM);
63} 62}
diff --git a/arch/mips/au1000/db1x00/irqmap.c b/arch/mips/au1000/db1x00/irqmap.c
index eaa50c7b6341..94c090e8bf7a 100644
--- a/arch/mips/au1000/db1x00/irqmap.c
+++ b/arch/mips/au1000/db1x00/irqmap.c
@@ -32,32 +32,32 @@
32 32
33#ifdef CONFIG_MIPS_DB1500 33#ifdef CONFIG_MIPS_DB1500
34char irq_tab_alchemy[][5] __initdata = { 34char irq_tab_alchemy[][5] __initdata = {
35 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT371 */ 35 [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT371 */
36 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ 36 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
37}; 37};
38#endif 38#endif
39 39
40#ifdef CONFIG_MIPS_BOSPORUS 40#ifdef CONFIG_MIPS_BOSPORUS
41char irq_tab_alchemy[][5] __initdata = { 41char irq_tab_alchemy[][5] __initdata = {
42 [11] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 11 - miniPCI */ 42 [11] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 11 - miniPCI */
43 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - SN1741 */ 43 [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - SN1741 */
44 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ 44 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
45}; 45};
46#endif 46#endif
47 47
48#ifdef CONFIG_MIPS_MIRAGE 48#ifdef CONFIG_MIPS_MIRAGE
49char irq_tab_alchemy[][5] __initdata = { 49char irq_tab_alchemy[][5] __initdata = {
50 [11] = { -1, INTD, INTX, INTX, INTX}, /* IDSEL 11 - SMI VGX */ 50 [11] = { -1, INTD, INTX, INTX, INTX }, /* IDSEL 11 - SMI VGX */
51 [12] = { -1, INTX, INTX, INTC, INTX}, /* IDSEL 12 - PNX1300 */ 51 [12] = { -1, INTX, INTX, INTC, INTX }, /* IDSEL 12 - PNX1300 */
52 [13] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 13 - miniPCI */ 52 [13] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 13 - miniPCI */
53}; 53};
54#endif 54#endif
55 55
56#ifdef CONFIG_MIPS_DB1550 56#ifdef CONFIG_MIPS_DB1550
57char irq_tab_alchemy[][5] __initdata = { 57char irq_tab_alchemy[][5] __initdata = {
58 [11] = { -1, INTC, INTX, INTX, INTX}, /* IDSEL 11 - on-board HPT371 */ 58 [11] = { -1, INTC, INTX, INTX, INTX }, /* IDSEL 11 - on-board HPT371 */
59 [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */ 59 [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */
60 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */ 60 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */
61}; 61};
62#endif 62#endif
63 63
diff --git a/arch/mips/au1000/mtx-1/Makefile b/arch/mips/au1000/mtx-1/Makefile
index 85a90941de4f..7c67b3d33bec 100644
--- a/arch/mips/au1000/mtx-1/Makefile
+++ b/arch/mips/au1000/mtx-1/Makefile
@@ -1,7 +1,6 @@
1# 1#
2# Copyright 2003 MontaVista Software Inc. 2# Copyright 2003 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com
5# Bruno Randolf <bruno.randolf@4g-systems.biz> 4# Bruno Randolf <bruno.randolf@4g-systems.biz>
6# 5#
7# Makefile for 4G Systems MTX-1 board. 6# Makefile for 4G Systems MTX-1 board.
diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/au1000/mtx-1/board_setup.c
index 5736354829c6..3f8079186cf2 100644
--- a/arch/mips/au1000/mtx-1/board_setup.c
+++ b/arch/mips/au1000/mtx-1/board_setup.c
@@ -3,9 +3,8 @@
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * 4G Systems MTX-1 board setup. 4 * 4G Systems MTX-1 board setup.
5 * 5 *
6 * Copyright 2003 MontaVista Software Inc. 6 * Copyright 2003, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * Bruno Randolf <bruno.randolf@4g-systems.biz> 8 * Bruno Randolf <bruno.randolf@4g-systems.biz>
10 * 9 *
11 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
@@ -34,7 +33,7 @@
34#include <asm/mach-au1x00/au1000.h> 33#include <asm/mach-au1x00/au1000.h>
35 34
36extern int (*board_pci_idsel)(unsigned int devsel, int assert); 35extern int (*board_pci_idsel)(unsigned int devsel, int assert);
37int mtx1_pci_idsel(unsigned int devsel, int assert); 36int mtx1_pci_idsel(unsigned int devsel, int assert);
38 37
39void board_reset(void) 38void board_reset(void)
40{ 39{
@@ -45,36 +44,36 @@ void board_reset(void)
45void __init board_setup(void) 44void __init board_setup(void)
46{ 45{
47#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 46#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
48 // enable USB power switch 47 /* Enable USB power switch */
49 au_writel( au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR ); 48 au_writel(au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR);
50 au_writel( 0x100000, GPIO2_OUTPUT ); 49 au_writel(0x100000, GPIO2_OUTPUT);
51#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ 50#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
52 51
53#ifdef CONFIG_PCI 52#ifdef CONFIG_PCI
54#if defined(__MIPSEB__) 53#if defined(__MIPSEB__)
55 au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); 54 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
56#else 55#else
57 au_writel(0xf, Au1500_PCI_CFG); 56 au_writel(0xf, Au1500_PCI_CFG);
58#endif 57#endif
59#endif 58#endif
60 59
61 // initialize sys_pinfunc: 60 /* Initialize sys_pinfunc */
62 au_writel( SYS_PF_NI2, SYS_PINFUNC ); 61 au_writel(SYS_PF_NI2, SYS_PINFUNC);
63 62
64 // initialize GPIO 63 /* Initialize GPIO */
65 au_writel( 0xFFFFFFFF, SYS_TRIOUTCLR ); 64 au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
66 au_writel( 0x00000001, SYS_OUTPUTCLR ); // set M66EN (PCI 66MHz) to OFF 65 au_writel(0x00000001, SYS_OUTPUTCLR); /* set M66EN (PCI 66MHz) to OFF */
67 au_writel( 0x00000008, SYS_OUTPUTSET ); // set PCI CLKRUN# to OFF 66 au_writel(0x00000008, SYS_OUTPUTSET); /* set PCI CLKRUN# to OFF */
68 au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON 67 au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */
69 au_writel( 0x00000020, SYS_OUTPUTCLR ); // set eth PHY TX_ER to OFF 68 au_writel(0x00000020, SYS_OUTPUTCLR); /* set eth PHY TX_ER to OFF */
70 69
71 // enable LED and set it to green 70 /* Enable LED and set it to green */
72 au_writel( au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR ); 71 au_writel(au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR);
73 au_writel( 0x18000800, GPIO2_OUTPUT ); 72 au_writel(0x18000800, GPIO2_OUTPUT);
74 73
75 board_pci_idsel = mtx1_pci_idsel; 74 board_pci_idsel = mtx1_pci_idsel;
76 75
77 printk("4G Systems MTX-1 Board\n"); 76 printk(KERN_INFO "4G Systems MTX-1 Board\n");
78} 77}
79 78
80int 79int
@@ -82,20 +81,18 @@ mtx1_pci_idsel(unsigned int devsel, int assert)
82{ 81{
83#define MTX_IDSEL_ONLY_0_AND_3 0 82#define MTX_IDSEL_ONLY_0_AND_3 0
84#if MTX_IDSEL_ONLY_0_AND_3 83#if MTX_IDSEL_ONLY_0_AND_3
85 if (devsel != 0 && devsel != 3) { 84 if (devsel != 0 && devsel != 3) {
86 printk("*** not 0 or 3\n"); 85 printk(KERN_ERR "*** not 0 or 3\n");
87 return 0; 86 return 0;
88 } 87 }
89#endif 88#endif
90 89
91 if (assert && devsel != 0) { 90 if (assert && devsel != 0)
92 // suppress signal to cardbus 91 /* Suppress signal to Cardbus */
93 au_writel( 0x00000002, SYS_OUTPUTCLR ); // set EXT_IO3 OFF 92 au_writel(0x00000002, SYS_OUTPUTCLR); /* set EXT_IO3 OFF */
94 } 93 else
95 else { 94 au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */
96 au_writel( 0x00000002, SYS_OUTPUTSET ); // set EXT_IO3 ON 95 au_sync_udelay(1);
97 } 96 return 1;
98 au_sync_udelay(1);
99 return 1;
100} 97}
101 98
diff --git a/arch/mips/au1000/mtx-1/init.c b/arch/mips/au1000/mtx-1/init.c
index c015cbce1cca..33a4aebe0cba 100644
--- a/arch/mips/au1000/mtx-1/init.c
+++ b/arch/mips/au1000/mtx-1/init.c
@@ -3,9 +3,8 @@
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * 4G Systems MTX-1 board setup 4 * 4G Systems MTX-1 board setup
5 * 5 *
6 * Copyright 2003 MontaVista Software Inc. 6 * Copyright 2003, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * Bruno Randolf <bruno.randolf@4g-systems.biz> 8 * Bruno Randolf <bruno.randolf@4g-systems.biz>
10 * 9 *
11 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
@@ -47,8 +46,8 @@ void __init prom_init(void)
47 unsigned long memsize; 46 unsigned long memsize;
48 47
49 prom_argc = fw_arg0; 48 prom_argc = fw_arg0;
50 prom_argv = (char **) fw_arg1; 49 prom_argv = (char **)fw_arg1;
51 prom_envp = (char **) fw_arg2; 50 prom_envp = (char **)fw_arg2;
52 51
53 prom_init_cmdline(); 52 prom_init_cmdline();
54 53
@@ -56,6 +55,6 @@ void __init prom_init(void)
56 if (!memsize_str) 55 if (!memsize_str)
57 memsize = 0x04000000; 56 memsize = 0x04000000;
58 else 57 else
59 memsize = simple_strtol(memsize_str, NULL, 0); 58 memsize = strict_strtol(memsize_str, 0, NULL);
60 add_memory_region(0, memsize, BOOT_MEM_RAM); 59 add_memory_region(0, memsize, BOOT_MEM_RAM);
61} 60}
diff --git a/arch/mips/au1000/mtx-1/irqmap.c b/arch/mips/au1000/mtx-1/irqmap.c
index 78d70c42c9db..f2bf02951e9c 100644
--- a/arch/mips/au1000/mtx-1/irqmap.c
+++ b/arch/mips/au1000/mtx-1/irqmap.c
@@ -31,18 +31,18 @@
31#include <asm/mach-au1x00/au1000.h> 31#include <asm/mach-au1x00/au1000.h>
32 32
33char irq_tab_alchemy[][5] __initdata = { 33char irq_tab_alchemy[][5] __initdata = {
34 [0] = { -1, INTA, INTA, INTX, INTX}, /* IDSEL 00 - AdapterA-Slot0 (top) */ 34 [0] = { -1, INTA, INTA, INTX, INTX }, /* IDSEL 00 - AdapterA-Slot0 (top) */
35 [1] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 01 - AdapterA-Slot1 (bottom) */ 35 [1] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
36 [2] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 02 - AdapterB-Slot0 (top) */ 36 [2] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 02 - AdapterB-Slot0 (top) */
37 [3] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 03 - AdapterB-Slot1 (bottom) */ 37 [3] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
38 [4] = { -1, INTA, INTB, INTX, INTX}, /* IDSEL 04 - AdapterC-Slot0 (top) */ 38 [4] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 04 - AdapterC-Slot0 (top) */
39 [5] = { -1, INTB, INTA, INTX, INTX}, /* IDSEL 05 - AdapterC-Slot1 (bottom) */ 39 [5] = { -1, INTB, INTA, INTX, INTX }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
40 [6] = { -1, INTC, INTD, INTX, INTX}, /* IDSEL 06 - AdapterD-Slot0 (top) */ 40 [6] = { -1, INTC, INTD, INTX, INTX }, /* IDSEL 06 - AdapterD-Slot0 (top) */
41 [7] = { -1, INTD, INTC, INTX, INTX}, /* IDSEL 07 - AdapterD-Slot1 (bottom) */ 41 [7] = { -1, INTD, INTC, INTX, INTX }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
42}; 42};
43 43
44struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { 44struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
45 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, 45 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 },
46 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, 46 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
47 { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, 47 { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
48 { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, 48 { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/au1000/mtx-1/platform.c b/arch/mips/au1000/mtx-1/platform.c
index a7edbf0829ac..9807be37c32f 100644
--- a/arch/mips/au1000/mtx-1/platform.c
+++ b/arch/mips/au1000/mtx-1/platform.c
@@ -21,11 +21,10 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/leds.h> 23#include <linux/leds.h>
24#include <linux/gpio.h>
24#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
25#include <linux/input.h> 26#include <linux/input.h>
26 27
27#include <asm/gpio.h>
28
29static struct gpio_keys_button mtx1_gpio_button[] = { 28static struct gpio_keys_button mtx1_gpio_button[] = {
30 { 29 {
31 .gpio = 207, 30 .gpio = 207,
diff --git a/arch/mips/au1000/pb1000/Makefile b/arch/mips/au1000/pb1000/Makefile
index daa1a507e72f..99bbec0ca41b 100644
--- a/arch/mips/au1000/pb1000/Makefile
+++ b/arch/mips/au1000/pb1000/Makefile
@@ -1,8 +1,8 @@
1# 1#
2# Copyright 2000 MontaVista Software Inc. 2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com 4#
5# Makefile for the Alchemy Semiconductor Pb1000 board.
5# 6#
6# Makefile for the Alchemy Semiconductor PB1000 board.
7 7
8lib-y := init.o board_setup.o irqmap.o 8lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index 33f15acc1b17..25df167a95b3 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -1,7 +1,6 @@
1/* 1/*
2 * Copyright 2000 MontaVista Software Inc. 2 * Copyright 2000, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. 3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 * ppopov@mvista.com or source@mvista.com
5 * 4 *
6 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 6 * under the terms of the GNU General Public License as published by the
@@ -40,128 +39,126 @@ void __init board_setup(void)
40 u32 sys_freqctrl, sys_clksrc; 39 u32 sys_freqctrl, sys_clksrc;
41 u32 prid = read_c0_prid(); 40 u32 prid = read_c0_prid();
42 41
43 // set AUX clock to 12MHz * 8 = 96 MHz 42 /* Set AUX clock to 12 MHz * 8 = 96 MHz */
44 au_writel(8, SYS_AUXPLL); 43 au_writel(8, SYS_AUXPLL);
45 au_writel(0, SYS_PINSTATERD); 44 au_writel(0, SYS_PINSTATERD);
46 udelay(100); 45 udelay(100);
47 46
48#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 47#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
49 /* zero and disable FREQ2 */ 48 /* Zero and disable FREQ2 */
50 sys_freqctrl = au_readl(SYS_FREQCTRL0); 49 sys_freqctrl = au_readl(SYS_FREQCTRL0);
51 sys_freqctrl &= ~0xFFF00000; 50 sys_freqctrl &= ~0xFFF00000;
52 au_writel(sys_freqctrl, SYS_FREQCTRL0); 51 au_writel(sys_freqctrl, SYS_FREQCTRL0);
53 52
54 /* zero and disable USBH/USBD clocks */ 53 /* Zero and disable USBH/USBD clocks */
55 sys_clksrc = au_readl(SYS_CLKSRC); 54 sys_clksrc = au_readl(SYS_CLKSRC);
56 sys_clksrc &= ~0x00007FE0; 55 sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
56 SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
57 au_writel(sys_clksrc, SYS_CLKSRC); 57 au_writel(sys_clksrc, SYS_CLKSRC);
58 58
59 sys_freqctrl = au_readl(SYS_FREQCTRL0); 59 sys_freqctrl = au_readl(SYS_FREQCTRL0);
60 sys_freqctrl &= ~0xFFF00000; 60 sys_freqctrl &= ~0xFFF00000;
61 61
62 sys_clksrc = au_readl(SYS_CLKSRC); 62 sys_clksrc = au_readl(SYS_CLKSRC);
63 sys_clksrc &= ~0x00007FE0; 63 sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
64 SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
64 65
65 switch (prid & 0x000000FF) 66 switch (prid & 0x000000FF) {
66 {
67 case 0x00: /* DA */ 67 case 0x00: /* DA */
68 case 0x01: /* HA */ 68 case 0x01: /* HA */
69 case 0x02: /* HB */ 69 case 0x02: /* HB */
70 /* CPU core freq to 48MHz to slow it way down... */ 70 /* CPU core freq to 48 MHz to slow it way down... */
71 au_writel(4, SYS_CPUPLL); 71 au_writel(4, SYS_CPUPLL);
72 72
73 /* 73 /*
74 * Setup 48MHz FREQ2 from CPUPLL for USB Host 74 * Setup 48 MHz FREQ2 from CPUPLL for USB Host
75 */ 75 * FRDIV2 = 3 -> div by 8 of 384 MHz -> 48 MHz
76 /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */ 76 */
77 sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20)); 77 sys_freqctrl |= (3 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2;
78 au_writel(sys_freqctrl, SYS_FREQCTRL0); 78 au_writel(sys_freqctrl, SYS_FREQCTRL0);
79 79
80 /* CPU core freq to 384MHz */ 80 /* CPU core freq to 384 MHz */
81 au_writel(0x20, SYS_CPUPLL); 81 au_writel(0x20, SYS_CPUPLL);
82 82
83 printk("Au1000: 48MHz OHCI workaround enabled\n"); 83 printk(KERN_INFO "Au1000: 48 MHz OHCI workaround enabled\n");
84 break; 84 break;
85 85
86 default: /* HC and newer */ 86 default: /* HC and newer */
87 // FREQ2 = aux/2 = 48 MHz 87 /* FREQ2 = aux / 2 = 48 MHz */
88 sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); 88 sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
89 au_writel(sys_freqctrl, SYS_FREQCTRL0); 89 SYS_FC_FE2 | SYS_FC_FS2;
90 au_writel(sys_freqctrl, SYS_FREQCTRL0);
90 break; 91 break;
91 } 92 }
92 93
93 /* 94 /*
94 * Route 48MHz FREQ2 into USB Host and/or Device 95 * Route 48 MHz FREQ2 into USB Host and/or Device
95 */ 96 */
96#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 97 sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
97 sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
98#endif
99 au_writel(sys_clksrc, SYS_CLKSRC); 98 au_writel(sys_clksrc, SYS_CLKSRC);
100 99
101 // configure pins GPIO[14:9] as GPIO 100 /* Configure pins GPIO[14:9] as GPIO */
102 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8080); 101 pin_func = au_readl(SYS_PINFUNC) & ~(SYS_PF_UR3 | SYS_PF_USB);
103 102
104 // 2nd USB port is USB host 103 /* 2nd USB port is USB host */
105 pin_func |= 0x8000; 104 pin_func |= SYS_PF_USB;
106 105
107 au_writel(pin_func, SYS_PINFUNC); 106 au_writel(pin_func, SYS_PINFUNC);
108 au_writel(0x2800, SYS_TRIOUTCLR); 107 au_writel(0x2800, SYS_TRIOUTCLR);
109 au_writel(0x0030, SYS_OUTPUTCLR); 108 au_writel(0x0030, SYS_OUTPUTCLR);
110#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ 109#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
111 110
112 // make gpio 15 an input (for interrupt line) 111 /* Make GPIO 15 an input (for interrupt line) */
113 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x100); 112 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_IRF;
114 // we don't need I2S, so make it available for GPIO[31:29] 113 /* We don't need I2S, so make it available for GPIO[31:29] */
115 pin_func |= (1<<5); 114 pin_func |= SYS_PF_I2S;
116 au_writel(pin_func, SYS_PINFUNC); 115 au_writel(pin_func, SYS_PINFUNC);
117 116
118 au_writel(0x8000, SYS_TRIOUTCLR); 117 au_writel(0x8000, SYS_TRIOUTCLR);
119 118
120 static_cfg0 = au_readl(MEM_STCFG0) & (u32)(~0xc00); 119 static_cfg0 = au_readl(MEM_STCFG0) & ~0xc00;
121 au_writel(static_cfg0, MEM_STCFG0); 120 au_writel(static_cfg0, MEM_STCFG0);
122 121
123 // configure RCE2* for LCD 122 /* configure RCE2* for LCD */
124 au_writel(0x00000004, MEM_STCFG2); 123 au_writel(0x00000004, MEM_STCFG2);
125 124
126 // MEM_STTIME2 125 /* MEM_STTIME2 */
127 au_writel(0x09000000, MEM_STTIME2); 126 au_writel(0x09000000, MEM_STTIME2);
128 127
129 // Set 32-bit base address decoding for RCE2* 128 /* Set 32-bit base address decoding for RCE2* */
130 au_writel(0x10003ff0, MEM_STADDR2); 129 au_writel(0x10003ff0, MEM_STADDR2);
131 130
132 // PCI CPLD setup 131 /*
133 // expand CE0 to cover PCI 132 * PCI CPLD setup
133 * Expand CE0 to cover PCI
134 */
134 au_writel(0x11803e40, MEM_STADDR1); 135 au_writel(0x11803e40, MEM_STADDR1);
135 136
136 // burst visibility on 137 /* Burst visibility on */
137 au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0); 138 au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0);
138 139
139 au_writel(0x83, MEM_STCFG1); // ewait enabled, flash timing 140 au_writel(0x83, MEM_STCFG1); /* ewait enabled, flash timing */
140 au_writel(0x33030a10, MEM_STTIME1); // slower timing for FPGA 141 au_writel(0x33030a10, MEM_STTIME1); /* slower timing for FPGA */
141 142
142 /* setup the static bus controller */ 143 /* Setup the static bus controller */
143 au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ 144 au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
144 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ 145 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
145 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ 146 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
146 147
147#ifdef CONFIG_PCI 148 /*
148 au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0 149 * Enable Au1000 BCLK switching - note: sed1356 must not use
149 au_writel(0, SDRAM_MBAR); // set mbar to 0 150 * its BCLK (Au1000 LCLK) for any timings
150 au_writel(0x2, SDRAM_CMD); // enable memory accesses 151 */
151 au_sync_delay(1); 152 switch (prid & 0x000000FF) {
152#endif
153
154 /* Enable Au1000 BCLK switching - note: sed1356 must not use
155 * its BCLK (Au1000 LCLK) for any timings */
156 switch (prid & 0x000000FF)
157 {
158 case 0x00: /* DA */ 153 case 0x00: /* DA */
159 case 0x01: /* HA */ 154 case 0x01: /* HA */
160 case 0x02: /* HB */ 155 case 0x02: /* HB */
161 break; 156 break;
162 default: /* HC and newer */ 157 default: /* HC and newer */
163 /* Enable sys bus clock divider when IDLE state or no bus 158 /*
164 activity. */ 159 * Enable sys bus clock divider when IDLE state or no bus
160 * activity.
161 */
165 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); 162 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
166 break; 163 break;
167 } 164 }
diff --git a/arch/mips/au1000/pb1000/init.c b/arch/mips/au1000/pb1000/init.c
index 549447df71d6..3837365d613d 100644
--- a/arch/mips/au1000/pb1000/init.c
+++ b/arch/mips/au1000/pb1000/init.c
@@ -1,10 +1,9 @@
1/* 1/*
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * PB1000 board setup 3 * Pb1000 board setup
4 * 4 *
5 * Copyright 2001 MontaVista Software Inc. 5 * Copyright 2001, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -44,16 +43,15 @@ void __init prom_init(void)
44 unsigned char *memsize_str; 43 unsigned char *memsize_str;
45 unsigned long memsize; 44 unsigned long memsize;
46 45
47 prom_argc = (int) fw_arg0; 46 prom_argc = (int)fw_arg0;
48 prom_argv = (char **) fw_arg1; 47 prom_argv = (char **)fw_arg1;
49 prom_envp = (char **) fw_arg2; 48 prom_envp = (char **)fw_arg2;
50 49
51 prom_init_cmdline(); 50 prom_init_cmdline();
52 memsize_str = prom_getenv("memsize"); 51 memsize_str = prom_getenv("memsize");
53 if (!memsize_str) { 52 if (!memsize_str)
54 memsize = 0x04000000; 53 memsize = 0x04000000;
55 } else { 54 else
56 memsize = simple_strtol(memsize_str, NULL, 0); 55 memsize = strict_strtol(memsize_str, 0, NULL);
57 }
58 add_memory_region(0, memsize, BOOT_MEM_RAM); 56 add_memory_region(0, memsize, BOOT_MEM_RAM);
59} 57}
diff --git a/arch/mips/au1000/pb1100/Makefile b/arch/mips/au1000/pb1100/Makefile
index 996236df6375..793e97c49e46 100644
--- a/arch/mips/au1000/pb1100/Makefile
+++ b/arch/mips/au1000/pb1100/Makefile
@@ -1,8 +1,8 @@
1# 1#
2# Copyright 2000,2001 MontaVista Software Inc. 2# Copyright 2000, 2001, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com
5# 4#
6# Makefile for the Alchemy Semiconductor Pb1100 board. 5# Makefile for the Alchemy Semiconductor Pb1100 board.
6#
7 7
8lib-y := init.o board_setup.o irqmap.o 8lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c
index 656164c8e9ca..c0bfd59a7a36 100644
--- a/arch/mips/au1000/pb1100/board_setup.c
+++ b/arch/mips/au1000/pb1100/board_setup.c
@@ -1,7 +1,6 @@
1/* 1/*
2 * Copyright 2002 MontaVista Software Inc. 2 * Copyright 2002, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. 3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 * ppopov@mvista.com or source@mvista.com
5 * 4 *
6 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 6 * under the terms of the GNU General Public License as published by the
@@ -32,15 +31,15 @@
32 31
33void board_reset(void) 32void board_reset(void)
34{ 33{
35 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 34 /* Hit BCSR.RST_VDDI[SOFT_RESET] */
36 au_writel(0x00000000, 0xAE00001C); 35 au_writel(0x00000000, PB1100_RST_VDDI);
37} 36}
38 37
39void __init board_setup(void) 38void __init board_setup(void)
40{ 39{
41 volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL; 40 volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
42 41
43 // set AUX clock to 12MHz * 8 = 96 MHz 42 /* Set AUX clock to 12 MHz * 8 = 96 MHz */
44 au_writel(8, SYS_AUXPLL); 43 au_writel(8, SYS_AUXPLL);
45 au_writel(0, SYS_PININPUTEN); 44 au_writel(0, SYS_PININPUTEN);
46 udelay(100); 45 udelay(100);
@@ -49,44 +48,47 @@ void __init board_setup(void)
49 { 48 {
50 u32 pin_func, sys_freqctrl, sys_clksrc; 49 u32 pin_func, sys_freqctrl, sys_clksrc;
51 50
52 // configure pins GPIO[14:9] as GPIO 51 /* Configure pins GPIO[14:9] as GPIO */
53 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); 52 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
54 53
55 /* zero and disable FREQ2 */ 54 /* Zero and disable FREQ2 */
56 sys_freqctrl = au_readl(SYS_FREQCTRL0); 55 sys_freqctrl = au_readl(SYS_FREQCTRL0);
57 sys_freqctrl &= ~0xFFF00000; 56 sys_freqctrl &= ~0xFFF00000;
58 au_writel(sys_freqctrl, SYS_FREQCTRL0); 57 au_writel(sys_freqctrl, SYS_FREQCTRL0);
59 58
60 /* zero and disable USBH/USBD/IrDA clock */ 59 /* Zero and disable USBH/USBD/IrDA clock */
61 sys_clksrc = au_readl(SYS_CLKSRC); 60 sys_clksrc = au_readl(SYS_CLKSRC);
62 sys_clksrc &= ~0x0000001F; 61 sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
63 au_writel(sys_clksrc, SYS_CLKSRC); 62 au_writel(sys_clksrc, SYS_CLKSRC);
64 63
65 sys_freqctrl = au_readl(SYS_FREQCTRL0); 64 sys_freqctrl = au_readl(SYS_FREQCTRL0);
66 sys_freqctrl &= ~0xFFF00000; 65 sys_freqctrl &= ~0xFFF00000;
67 66
68 sys_clksrc = au_readl(SYS_CLKSRC); 67 sys_clksrc = au_readl(SYS_CLKSRC);
69 sys_clksrc &= ~0x0000001F; 68 sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
70 69
71 // FREQ2 = aux/2 = 48 MHz 70 /* FREQ2 = aux / 2 = 48 MHz */
72 sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); 71 sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
72 SYS_FC_FE2 | SYS_FC_FS2;
73 au_writel(sys_freqctrl, SYS_FREQCTRL0); 73 au_writel(sys_freqctrl, SYS_FREQCTRL0);
74 74
75 /* 75 /*
76 * Route 48MHz FREQ2 into USBH/USBD/IrDA 76 * Route 48 MHz FREQ2 into USBH/USBD/IrDA
77 */ 77 */
78 sys_clksrc |= ((4<<2) | (0<<1) | 0 ); 78 sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;
79 au_writel(sys_clksrc, SYS_CLKSRC); 79 au_writel(sys_clksrc, SYS_CLKSRC);
80 80
81 /* setup the static bus controller */ 81 /* Setup the static bus controller */
82 au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ 82 au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
83 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ 83 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
84 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ 84 au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
85 85
86 // get USB Functionality pin state (device vs host drive pins) 86 /*
87 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); 87 * Get USB Functionality pin state (device vs host drive pins).
88 // 2nd USB port is USB host 88 */
89 pin_func |= 0x8000; 89 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
90 /* 2nd USB port is USB host. */
91 pin_func |= SYS_PF_USB;
90 au_writel(pin_func, SYS_PINFUNC); 92 au_writel(pin_func, SYS_PINFUNC);
91 } 93 }
92#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ 94#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
@@ -94,12 +96,12 @@ void __init board_setup(void)
94 /* Enable sys bus clock divider when IDLE state or no bus activity. */ 96 /* Enable sys bus clock divider when IDLE state or no bus activity. */
95 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); 97 au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
96 98
97 // Enable the RTC if not already enabled 99 /* Enable the RTC if not already enabled. */
98 if (!(readb(base + 0x28) & 0x20)) { 100 if (!(readb(base + 0x28) & 0x20)) {
99 writeb(readb(base + 0x28) | 0x20, base + 0x28); 101 writeb(readb(base + 0x28) | 0x20, base + 0x28);
100 au_sync(); 102 au_sync();
101 } 103 }
102 // Put the clock in BCD mode 104 /* Put the clock in BCD mode. */
103 if (readb(base + 0x2C) & 0x4) { /* reg B */ 105 if (readb(base + 0x2C) & 0x4) { /* reg B */
104 writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); 106 writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
105 au_sync(); 107 au_sync();
diff --git a/arch/mips/au1000/pb1100/init.c b/arch/mips/au1000/pb1100/init.c
index c91344648ed3..8355483f3de2 100644
--- a/arch/mips/au1000/pb1100/init.c
+++ b/arch/mips/au1000/pb1100/init.c
@@ -3,9 +3,8 @@
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * Pb1100 board setup 4 * Pb1100 board setup
5 * 5 *
6 * Copyright 2002 MontaVista Software Inc. 6 * Copyright 2002, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -46,8 +45,8 @@ void __init prom_init(void)
46 unsigned long memsize; 45 unsigned long memsize;
47 46
48 prom_argc = fw_arg0; 47 prom_argc = fw_arg0;
49 prom_argv = (char **) fw_arg1; 48 prom_argv = (char **)fw_arg1;
50 prom_envp = (char **) fw_arg3; 49 prom_envp = (char **)fw_arg3;
51 50
52 prom_init_cmdline(); 51 prom_init_cmdline();
53 52
@@ -55,7 +54,7 @@ void __init prom_init(void)
55 if (!memsize_str) 54 if (!memsize_str)
56 memsize = 0x04000000; 55 memsize = 0x04000000;
57 else 56 else
58 memsize = simple_strtol(memsize_str, NULL, 0); 57 memsize = strict_strtol(memsize_str, 0, NULL);
59 58
60 add_memory_region(0, memsize, BOOT_MEM_RAM); 59 add_memory_region(0, memsize, BOOT_MEM_RAM);
61} 60}
diff --git a/arch/mips/au1000/pb1100/irqmap.c b/arch/mips/au1000/pb1100/irqmap.c
index b5021e3d477f..9b7dd8b41283 100644
--- a/arch/mips/au1000/pb1100/irqmap.c
+++ b/arch/mips/au1000/pb1100/irqmap.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table 3 * Au1xx0 IRQ map table
4 * 4 *
5 * Copyright 2003 Embedded Edge, LLC 5 * Copyright 2003 Embedded Edge, LLC
6 * dan@embeddededge.com 6 * dan@embeddededge.com
@@ -31,10 +31,10 @@
31#include <asm/mach-au1x00/au1000.h> 31#include <asm/mach-au1x00/au1000.h>
32 32
33struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { 33struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
34 { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted# 34 { AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card Fully_Inserted# */
35 { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card STSCHG# 35 { AU1000_GPIO_10, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card STSCHG# */
36 { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card IRQ# 36 { AU1000_GPIO_11, INTC_INT_LOW_LEVEL, 0 }, /* PCMCIA Card IRQ# */
37 { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, // DC_IRQ# 37 { AU1000_GPIO_13, INTC_INT_LOW_LEVEL, 0 }, /* DC_IRQ# */
38}; 38};
39 39
40int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); 40int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
diff --git a/arch/mips/au1000/pb1200/Makefile b/arch/mips/au1000/pb1200/Makefile
index 4fe02ea65a60..d678adf7ce85 100644
--- a/arch/mips/au1000/pb1200/Makefile
+++ b/arch/mips/au1000/pb1200/Makefile
@@ -1,5 +1,5 @@
1# 1#
2# Makefile for the Alchemy Semiconductor PB1200 board. 2# Makefile for the Alchemy Semiconductor Pb1200/DBAu1200 boards.
3# 3#
4 4
5lib-y := init.o board_setup.o irqmap.o 5lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
index 4493a792cc4c..6cb2115059ad 100644
--- a/arch/mips/au1000/pb1200/board_setup.c
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -27,16 +27,8 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/sched.h> 28#include <linux/sched.h>
29 29
30#include <au1000.h>
31#include <prom.h> 30#include <prom.h>
32 31#include <au1xxx.h>
33#ifdef CONFIG_MIPS_PB1200
34#include <asm/mach-pb1x00/pb1200.h>
35#endif
36
37#ifdef CONFIG_MIPS_DB1200
38#include <asm/mach-db1x00/db1200.h>
39#endif
40 32
41extern void _board_init_irq(void); 33extern void _board_init_irq(void);
42extern void (*board_init_irq)(void); 34extern void (*board_init_irq)(void);
@@ -53,56 +45,57 @@ void __init board_setup(void)
53 45
54#if 0 46#if 0
55 { 47 {
56 u32 pin_func; 48 u32 pin_func;
57 49
58 /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, 50 /*
59 * but it is board specific code, so put it here. 51 * Enable PSC1 SYNC for AC97. Normaly done in audio driver,
60 */ 52 * but it is board specific code, so put it here.
61 pin_func = au_readl(SYS_PINFUNC); 53 */
62 au_sync(); 54 pin_func = au_readl(SYS_PINFUNC);
63 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; 55 au_sync();
64 au_writel(pin_func, SYS_PINFUNC); 56 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
65 57 au_writel(pin_func, SYS_PINFUNC);
66 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */ 58
67 au_sync(); 59 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
60 au_sync();
68 } 61 }
69#endif 62#endif
70 63
71#if defined(CONFIG_I2C_AU1550) 64#if defined(CONFIG_I2C_AU1550)
72 { 65 {
73 u32 freq0, clksrc; 66 u32 freq0, clksrc;
74 u32 pin_func; 67 u32 pin_func;
75 68
76 /* Select SMBUS in CPLD */ 69 /* Select SMBus in CPLD */
77 bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); 70 bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
78 71
79 pin_func = au_readl(SYS_PINFUNC); 72 pin_func = au_readl(SYS_PINFUNC);
80 au_sync(); 73 au_sync();
81 pin_func &= ~(3<<17 | 1<<4); 74 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
82 /* Set GPIOs correctly */ 75 /* Set GPIOs correctly */
83 pin_func |= 2<<17; 76 pin_func |= 2 << 17;
84 au_writel(pin_func, SYS_PINFUNC); 77 au_writel(pin_func, SYS_PINFUNC);
85 au_sync(); 78 au_sync();
86 79
87 /* The i2c driver depends on 50Mhz clock */ 80 /* The I2C driver depends on 50 MHz clock */
88 freq0 = au_readl(SYS_FREQCTRL0); 81 freq0 = au_readl(SYS_FREQCTRL0);
89 au_sync(); 82 au_sync();
90 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); 83 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
91 freq0 |= (3<<SYS_FC_FRDIV1_BIT); 84 freq0 |= 3 << SYS_FC_FRDIV1_BIT;
92 /* 396Mhz / (3+1)*2 == 49.5Mhz */ 85 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
93 au_writel(freq0, SYS_FREQCTRL0); 86 au_writel(freq0, SYS_FREQCTRL0);
94 au_sync(); 87 au_sync();
95 freq0 |= SYS_FC_FE1; 88 freq0 |= SYS_FC_FE1;
96 au_writel(freq0, SYS_FREQCTRL0); 89 au_writel(freq0, SYS_FREQCTRL0);
97 au_sync(); 90 au_sync();
98 91
99 clksrc = au_readl(SYS_CLKSRC); 92 clksrc = au_readl(SYS_CLKSRC);
100 au_sync(); 93 au_sync();
101 clksrc &= ~0x01f00000; 94 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
102 /* bit 22 is EXTCLK0 for PSC0 */ 95 /* Bit 22 is EXTCLK0 for PSC0 */
103 clksrc |= (0x3 << 22); 96 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
104 au_writel(clksrc, SYS_CLKSRC); 97 au_writel(clksrc, SYS_CLKSRC);
105 au_sync(); 98 au_sync();
106 } 99 }
107#endif 100#endif
108 101
@@ -116,27 +109,27 @@ void __init board_setup(void)
116#endif 109#endif
117#endif 110#endif
118 111
119 /* The Pb1200 development board uses external MUX for PSC0 to 112 /*
120 support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI 113 * The Pb1200 development board uses external MUX for PSC0 to
121 */ 114 * support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
115 */
122#ifdef CONFIG_I2C_AU1550 116#ifdef CONFIG_I2C_AU1550
123 bcsr->resets &= (~BCSR_RESETS_PCS0MUX); 117 bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
124#endif 118#endif
125 au_sync(); 119 au_sync();
126 120
127#ifdef CONFIG_MIPS_PB1200 121#ifdef CONFIG_MIPS_PB1200
128 printk("AMD Alchemy Pb1200 Board\n"); 122 printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
129#endif 123#endif
130#ifdef CONFIG_MIPS_DB1200 124#ifdef CONFIG_MIPS_DB1200
131 printk("AMD Alchemy Db1200 Board\n"); 125 printk(KERN_INFO "AMD Alchemy Db1200 Board\n");
132#endif 126#endif
133 127
134 /* Setup Pb1200 External Interrupt Controller */ 128 /* Setup Pb1200 External Interrupt Controller */
135 board_init_irq = _board_init_irq; 129 board_init_irq = _board_init_irq;
136} 130}
137 131
138int 132int board_au1200fb_panel(void)
139board_au1200fb_panel(void)
140{ 133{
141 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 134 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
142 int p; 135 int p;
@@ -147,23 +140,23 @@ board_au1200fb_panel(void)
147 return p; 140 return p;
148} 141}
149 142
150int 143int board_au1200fb_panel_init(void)
151board_au1200fb_panel_init(void)
152{ 144{
153 /* Apply power */ 145 /* Apply power */
154 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 146 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
155 bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); 147
156 /*printk("board_au1200fb_panel_init()\n"); */ 148 bcsr->board |= BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL;
149 /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
157 return 0; 150 return 0;
158} 151}
159 152
160int 153int board_au1200fb_panel_shutdown(void)
161board_au1200fb_panel_shutdown(void)
162{ 154{
163 /* Remove power */ 155 /* Remove power */
164 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; 156 BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
165 bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); 157
166 /*printk("board_au1200fb_panel_shutdown()\n"); */ 158 bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
159 BCSR_BOARD_LCDBL);
160 /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
167 return 0; 161 return 0;
168} 162}
169
diff --git a/arch/mips/au1000/pb1200/init.c b/arch/mips/au1000/pb1200/init.c
index 72af5500660b..09fd63b86062 100644
--- a/arch/mips/au1000/pb1200/init.c
+++ b/arch/mips/au1000/pb1200/init.c
@@ -3,9 +3,8 @@
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * PB1200 board setup 4 * PB1200 board setup
5 * 5 *
6 * Copyright 2001 MontaVista Software Inc. 6 * Copyright 2001, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -45,16 +44,15 @@ void __init prom_init(void)
45 unsigned char *memsize_str; 44 unsigned char *memsize_str;
46 unsigned long memsize; 45 unsigned long memsize;
47 46
48 prom_argc = (int) fw_arg0; 47 prom_argc = (int)fw_arg0;
49 prom_argv = (char **) fw_arg1; 48 prom_argv = (char **)fw_arg1;
50 prom_envp = (char **) fw_arg2; 49 prom_envp = (char **)fw_arg2;
51 50
52 prom_init_cmdline(); 51 prom_init_cmdline();
53 memsize_str = prom_getenv("memsize"); 52 memsize_str = prom_getenv("memsize");
54 if (!memsize_str) { 53 if (!memsize_str)
55 memsize = 0x08000000; 54 memsize = 0x08000000;
56 } else { 55 else
57 memsize = simple_strtol(memsize_str, NULL, 0); 56 memsize = strict_strtol(memsize_str, 0, NULL);
58 }
59 add_memory_region(0, memsize, BOOT_MEM_RAM); 57 add_memory_region(0, memsize, BOOT_MEM_RAM);
60} 58}
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index e61eb8e0b76b..2a505ad8715b 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -39,25 +39,25 @@
39#endif 39#endif
40 40
41struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { 41struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
42 { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade 42 /* This is external interrupt cascade */
43 { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 },
43}; 44};
44 45
45int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map); 46int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
46 47
47/* 48/*
48 * Support for External interrupts on the PbAu1200 Development platform. 49 * Support for External interrupts on the Pb1200 Development platform.
49 */ 50 */
50static volatile int pb1200_cascade_en=0; 51static volatile int pb1200_cascade_en;
51 52
52irqreturn_t pb1200_cascade_handler( int irq, void *dev_id) 53irqreturn_t pb1200_cascade_handler(int irq, void *dev_id)
53{ 54{
54 unsigned short bisr = bcsr->int_status; 55 unsigned short bisr = bcsr->int_status;
55 int extirq_nr = 0; 56 int extirq_nr = 0;
56 57
57 /* Clear all the edge interrupts. This has no effect on level */ 58 /* Clear all the edge interrupts. This has no effect on level. */
58 bcsr->int_status = bisr; 59 bcsr->int_status = bisr;
59 for( ; bisr; bisr &= (bisr-1) ) 60 for ( ; bisr; bisr &= bisr - 1) {
60 {
61 extirq_nr = PB1200_INT_BEGIN + __ffs(bisr); 61 extirq_nr = PB1200_INT_BEGIN + __ffs(bisr);
62 /* Ack and dispatch IRQ */ 62 /* Ack and dispatch IRQ */
63 do_IRQ(extirq_nr); 63 do_IRQ(extirq_nr);
@@ -68,26 +68,20 @@ irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
68 68
69inline void pb1200_enable_irq(unsigned int irq_nr) 69inline void pb1200_enable_irq(unsigned int irq_nr)
70{ 70{
71 bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN); 71 bcsr->intset_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
72 bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN); 72 bcsr->intset = 1 << (irq_nr - PB1200_INT_BEGIN);
73} 73}
74 74
75inline void pb1200_disable_irq(unsigned int irq_nr) 75inline void pb1200_disable_irq(unsigned int irq_nr)
76{ 76{
77 bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN); 77 bcsr->intclr_mask = 1 << (irq_nr - PB1200_INT_BEGIN);
78 bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN); 78 bcsr->intclr = 1 << (irq_nr - PB1200_INT_BEGIN);
79} 79}
80 80
81static unsigned int pb1200_setup_cascade(void) 81static unsigned int pb1200_setup_cascade(void)
82{ 82{
83 int err; 83 return request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
84 84 0, "Pb1200 Cascade", &pb1200_cascade_handler);
85 err = request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
86 0, "Pb1200 Cascade", &pb1200_cascade_handler);
87 if (err)
88 return err;
89
90 return 0;
91} 85}
92 86
93static unsigned int pb1200_startup_irq(unsigned int irq) 87static unsigned int pb1200_startup_irq(unsigned int irq)
@@ -132,23 +126,23 @@ void _board_init_irq(void)
132 unsigned int irq; 126 unsigned int irq;
133 127
134#ifdef CONFIG_MIPS_PB1200 128#ifdef CONFIG_MIPS_PB1200
135 /* We have a problem with CPLD rev3. Enable a workaround */ 129 /* We have a problem with CPLD rev 3. */
136 if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) { 130 if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
137 printk("\nWARNING!!!\n"); 131 printk(KERN_ERR "WARNING!!!\n");
138 printk("\nWARNING!!!\n"); 132 printk(KERN_ERR "WARNING!!!\n");
139 printk("\nWARNING!!!\n"); 133 printk(KERN_ERR "WARNING!!!\n");
140 printk("\nWARNING!!!\n"); 134 printk(KERN_ERR "WARNING!!!\n");
141 printk("\nWARNING!!!\n"); 135 printk(KERN_ERR "WARNING!!!\n");
142 printk("\nWARNING!!!\n"); 136 printk(KERN_ERR "WARNING!!!\n");
143 printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n"); 137 printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
144 printk("updated to latest revision. This software will not\n"); 138 printk(KERN_ERR "updated to latest revision. This software will\n");
145 printk("work on anything less than CPLD rev4\n"); 139 printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
146 printk("\nWARNING!!!\n"); 140 printk(KERN_ERR "WARNING!!!\n");
147 printk("\nWARNING!!!\n"); 141 printk(KERN_ERR "WARNING!!!\n");
148 printk("\nWARNING!!!\n"); 142 printk(KERN_ERR "WARNING!!!\n");
149 printk("\nWARNING!!!\n"); 143 printk(KERN_ERR "WARNING!!!\n");
150 printk("\nWARNING!!!\n"); 144 printk(KERN_ERR "WARNING!!!\n");
151 printk("\nWARNING!!!\n"); 145 printk(KERN_ERR "WARNING!!!\n");
152 panic("Game over. Your score is 0."); 146 panic("Game over. Your score is 0.");
153 } 147 }
154#endif 148#endif
@@ -161,6 +155,6 @@ void _board_init_irq(void)
161 155
162 /* 156 /*
163 * GPIO_7 can not be hooked here, so it is hooked upon first 157 * GPIO_7 can not be hooked here, so it is hooked upon first
164 * request of any source attached to the cascade 158 * request of any source attached to the cascade.
165 */ 159 */
166} 160}
diff --git a/arch/mips/au1000/pb1500/Makefile b/arch/mips/au1000/pb1500/Makefile
index 97a730813cd3..602f38df20bb 100644
--- a/arch/mips/au1000/pb1500/Makefile
+++ b/arch/mips/au1000/pb1500/Makefile
@@ -1,8 +1,8 @@
1# 1#
2# Copyright 2000,2001 MontaVista Software Inc. 2# Copyright 2000, 2001, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com
5# 4#
6# Makefile for the Alchemy Semiconductor Pb1500 board. 5# Makefile for the Alchemy Semiconductor Pb1500 board.
6#
7 7
8lib-y := init.o board_setup.o irqmap.o 8lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c
index 24c652e8ec4b..035771c6e5b8 100644
--- a/arch/mips/au1000/pb1500/board_setup.c
+++ b/arch/mips/au1000/pb1500/board_setup.c
@@ -1,7 +1,6 @@
1/* 1/*
2 * Copyright 2000 MontaVista Software Inc. 2 * Copyright 2000, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. 3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 * ppopov@mvista.com or source@mvista.com
5 * 4 *
6 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 6 * under the terms of the GNU General Public License as published by the
@@ -32,8 +31,8 @@
32 31
33void board_reset(void) 32void board_reset(void)
34{ 33{
35 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 34 /* Hit BCSR.RST_VDDI[SOFT_RESET] */
36 au_writel(0x00000000, 0xAE00001C); 35 au_writel(0x00000000, PB1500_RST_VDDI);
37} 36}
38 37
39void __init board_setup(void) 38void __init board_setup(void)
@@ -42,7 +41,7 @@ void __init board_setup(void)
42 u32 sys_freqctrl, sys_clksrc; 41 u32 sys_freqctrl, sys_clksrc;
43 42
44 sys_clksrc = sys_freqctrl = pin_func = 0; 43 sys_clksrc = sys_freqctrl = pin_func = 0;
45 // set AUX clock to 12MHz * 8 = 96 MHz 44 /* Set AUX clock to 12 MHz * 8 = 96 MHz */
46 au_writel(8, SYS_AUXPLL); 45 au_writel(8, SYS_AUXPLL);
47 au_writel(0, SYS_PINSTATERD); 46 au_writel(0, SYS_PINSTATERD);
48 udelay(100); 47 udelay(100);
@@ -51,51 +50,48 @@ void __init board_setup(void)
51 50
52 /* GPIO201 is input for PCMCIA card detect */ 51 /* GPIO201 is input for PCMCIA card detect */
53 /* GPIO203 is input for PCMCIA interrupt request */ 52 /* GPIO203 is input for PCMCIA interrupt request */
54 au_writel(au_readl(GPIO2_DIR) & (u32)(~((1<<1)|(1<<3))), GPIO2_DIR); 53 au_writel(au_readl(GPIO2_DIR) & ~((1 << 1) | (1 << 3)), GPIO2_DIR);
55 54
56 /* zero and disable FREQ2 */ 55 /* Zero and disable FREQ2 */
57 sys_freqctrl = au_readl(SYS_FREQCTRL0); 56 sys_freqctrl = au_readl(SYS_FREQCTRL0);
58 sys_freqctrl &= ~0xFFF00000; 57 sys_freqctrl &= ~0xFFF00000;
59 au_writel(sys_freqctrl, SYS_FREQCTRL0); 58 au_writel(sys_freqctrl, SYS_FREQCTRL0);
60 59
61 /* zero and disable USBH/USBD clocks */ 60 /* zero and disable USBH/USBD clocks */
62 sys_clksrc = au_readl(SYS_CLKSRC); 61 sys_clksrc = au_readl(SYS_CLKSRC);
63 sys_clksrc &= ~0x00007FE0; 62 sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
63 SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
64 au_writel(sys_clksrc, SYS_CLKSRC); 64 au_writel(sys_clksrc, SYS_CLKSRC);
65 65
66 sys_freqctrl = au_readl(SYS_FREQCTRL0); 66 sys_freqctrl = au_readl(SYS_FREQCTRL0);
67 sys_freqctrl &= ~0xFFF00000; 67 sys_freqctrl &= ~0xFFF00000;
68 68
69 sys_clksrc = au_readl(SYS_CLKSRC); 69 sys_clksrc = au_readl(SYS_CLKSRC);
70 sys_clksrc &= ~0x00007FE0; 70 sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
71 SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
71 72
72 // FREQ2 = aux/2 = 48 MHz 73 /* FREQ2 = aux/2 = 48 MHz */
73 sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); 74 sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2;
74 au_writel(sys_freqctrl, SYS_FREQCTRL0); 75 au_writel(sys_freqctrl, SYS_FREQCTRL0);
75 76
76 /* 77 /*
77 * Route 48MHz FREQ2 into USB Host and/or Device 78 * Route 48MHz FREQ2 into USB Host and/or Device
78 */ 79 */
79#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) 80 sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
80 sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
81#endif
82 au_writel(sys_clksrc, SYS_CLKSRC); 81 au_writel(sys_clksrc, SYS_CLKSRC);
83 82
84 83 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
85 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); 84 /* 2nd USB port is USB host */
86 // 2nd USB port is USB host 85 pin_func |= SYS_PF_USB;
87 pin_func |= 0x8000;
88 au_writel(pin_func, SYS_PINFUNC); 86 au_writel(pin_func, SYS_PINFUNC);
89#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */ 87#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
90 88
91
92
93#ifdef CONFIG_PCI 89#ifdef CONFIG_PCI
94 // Setup PCI bus controller 90 /* Setup PCI bus controller */
95 au_writel(0, Au1500_PCI_CMEM); 91 au_writel(0, Au1500_PCI_CMEM);
96 au_writel(0x00003fff, Au1500_CFG_BASE); 92 au_writel(0x00003fff, Au1500_CFG_BASE);
97#if defined(__MIPSEB__) 93#if defined(__MIPSEB__)
98 au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); 94 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
99#else 95#else
100 au_writel(0xf, Au1500_PCI_CFG); 96 au_writel(0xf, Au1500_PCI_CFG);
101#endif 97#endif
@@ -112,11 +108,11 @@ void __init board_setup(void)
112 108
113 /* Enable the RTC if not already enabled */ 109 /* Enable the RTC if not already enabled */
114 if (!(au_readl(0xac000028) & 0x20)) { 110 if (!(au_readl(0xac000028) & 0x20)) {
115 printk("enabling clock ...\n"); 111 printk(KERN_INFO "enabling clock ...\n");
116 au_writel((au_readl(0xac000028) | 0x20), 0xac000028); 112 au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
117 } 113 }
118 /* Put the clock in BCD mode */ 114 /* Put the clock in BCD mode */
119 if (au_readl(0xac00002C) & 0x4) { /* reg B */ 115 if (au_readl(0xac00002c) & 0x4) { /* reg B */
120 au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); 116 au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
121 au_sync(); 117 au_sync();
122 } 118 }
diff --git a/arch/mips/au1000/pb1500/init.c b/arch/mips/au1000/pb1500/init.c
index 488507c07db9..49f51e165863 100644
--- a/arch/mips/au1000/pb1500/init.c
+++ b/arch/mips/au1000/pb1500/init.c
@@ -1,11 +1,10 @@
1/* 1/*
2 * 2 *
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * PB1500 board setup 4 * Pb1500 board setup
5 * 5 *
6 * Copyright 2001 MontaVista Software Inc. 6 * Copyright 2001, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -45,16 +44,15 @@ void __init prom_init(void)
45 unsigned char *memsize_str; 44 unsigned char *memsize_str;
46 unsigned long memsize; 45 unsigned long memsize;
47 46
48 prom_argc = (int) fw_arg0; 47 prom_argc = (int)fw_arg0;
49 prom_argv = (char **) fw_arg1; 48 prom_argv = (char **)fw_arg1;
50 prom_envp = (char **) fw_arg2; 49 prom_envp = (char **)fw_arg2;
51 50
52 prom_init_cmdline(); 51 prom_init_cmdline();
53 memsize_str = prom_getenv("memsize"); 52 memsize_str = prom_getenv("memsize");
54 if (!memsize_str) { 53 if (!memsize_str)
55 memsize = 0x04000000; 54 memsize = 0x04000000;
56 } else { 55 else
57 memsize = simple_strtol(memsize_str, NULL, 0); 56 memsize = strict_strtol(memsize_str, 0, NULL);
58 }
59 add_memory_region(0, memsize, BOOT_MEM_RAM); 57 add_memory_region(0, memsize, BOOT_MEM_RAM);
60} 58}
diff --git a/arch/mips/au1000/pb1500/irqmap.c b/arch/mips/au1000/pb1500/irqmap.c
index 4817ab44d07f..39c4682766a8 100644
--- a/arch/mips/au1000/pb1500/irqmap.c
+++ b/arch/mips/au1000/pb1500/irqmap.c
@@ -31,12 +31,12 @@
31#include <asm/mach-au1x00/au1000.h> 31#include <asm/mach-au1x00/au1000.h>
32 32
33char irq_tab_alchemy[][5] __initdata = { 33char irq_tab_alchemy[][5] __initdata = {
34 [12] = { -1, INTA, INTX, INTX, INTX}, /* IDSEL 12 - HPT370 */ 34 [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT370 */
35 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot */ 35 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */
36}; 36};
37 37
38struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { 38struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
39 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, 39 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 },
40 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, 40 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
41 { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, 41 { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
42 { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, 42 { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/au1000/pb1550/Makefile b/arch/mips/au1000/pb1550/Makefile
index aa35bc6cb8cf..7d8beca87fa5 100644
--- a/arch/mips/au1000/pb1550/Makefile
+++ b/arch/mips/au1000/pb1550/Makefile
@@ -1,9 +1,8 @@
1# 1#
2# Copyright 2000 MontaVista Software Inc. 2# Copyright 2000, 2008 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com
5# 4#
6# Makefile for the Alchemy Semiconductor PB1000 board. 5# Makefile for the Alchemy Semiconductor Pb1550 board.
7# 6#
8 7
9lib-y := init.o board_setup.o irqmap.o 8lib-y := init.o board_setup.o irqmap.o
diff --git a/arch/mips/au1000/pb1550/board_setup.c b/arch/mips/au1000/pb1550/board_setup.c
index 45d60872b565..0ed76b64b6ab 100644
--- a/arch/mips/au1000/pb1550/board_setup.c
+++ b/arch/mips/au1000/pb1550/board_setup.c
@@ -3,9 +3,8 @@
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * Alchemy Pb1550 board setup. 4 * Alchemy Pb1550 board setup.
5 * 5 *
6 * Copyright 2000 MontaVista Software Inc. 6 * Copyright 2000, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -35,15 +34,16 @@
35 34
36void board_reset(void) 35void board_reset(void)
37{ 36{
38 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ 37 /* Hit BCSR.SYSTEM[RESET] */
39 au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C); 38 au_writew(au_readw(0xAF00001C) & ~BCSR_SYSTEM_RESET, 0xAF00001C);
40} 39}
41 40
42void __init board_setup(void) 41void __init board_setup(void)
43{ 42{
44 u32 pin_func; 43 u32 pin_func;
45 44
46 /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, 45 /*
46 * Enable PSC1 SYNC for AC'97. Normaly done in audio driver,
47 * but it is board specific code, so put it here. 47 * but it is board specific code, so put it here.
48 */ 48 */
49 pin_func = au_readl(SYS_PINFUNC); 49 pin_func = au_readl(SYS_PINFUNC);
@@ -51,8 +51,8 @@ void __init board_setup(void)
51 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; 51 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
52 au_writel(pin_func, SYS_PINFUNC); 52 au_writel(pin_func, SYS_PINFUNC);
53 53
54 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */ 54 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
55 au_sync(); 55 au_sync();
56 56
57 printk("AMD Alchemy Pb1550 Board\n"); 57 printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
58} 58}
diff --git a/arch/mips/au1000/pb1550/init.c b/arch/mips/au1000/pb1550/init.c
index f6b2fc587980..1b5f58434bb7 100644
--- a/arch/mips/au1000/pb1550/init.c
+++ b/arch/mips/au1000/pb1550/init.c
@@ -1,11 +1,10 @@
1/* 1/*
2 * 2 *
3 * BRIEF MODULE DESCRIPTION 3 * BRIEF MODULE DESCRIPTION
4 * PB1550 board setup 4 * Pb1550 board setup
5 * 5 *
6 * Copyright 2001 MontaVista Software Inc. 6 * Copyright 2001, 2008 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc. 7 * Author: MontaVista Software, Inc. <source@mvista.com>
8 * ppopov@mvista.com or source@mvista.com
9 * 8 *
10 * This program is free software; you can redistribute it and/or modify it 9 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 10 * under the terms of the GNU General Public License as published by the
@@ -45,16 +44,15 @@ void __init prom_init(void)
45 unsigned char *memsize_str; 44 unsigned char *memsize_str;
46 unsigned long memsize; 45 unsigned long memsize;
47 46
48 prom_argc = (int) fw_arg0; 47 prom_argc = (int)fw_arg0;
49 prom_argv = (char **) fw_arg1; 48 prom_argv = (char **)fw_arg1;
50 prom_envp = (char **) fw_arg2; 49 prom_envp = (char **)fw_arg2;
51 50
52 prom_init_cmdline(); 51 prom_init_cmdline();
53 memsize_str = prom_getenv("memsize"); 52 memsize_str = prom_getenv("memsize");
54 if (!memsize_str) { 53 if (!memsize_str)
55 memsize = 0x08000000; 54 memsize = 0x08000000;
56 } else { 55 else
57 memsize = simple_strtol(memsize_str, NULL, 0); 56 memsize = strict_strtol(memsize_str, 0, NULL);
58 }
59 add_memory_region(0, memsize, BOOT_MEM_RAM); 57 add_memory_region(0, memsize, BOOT_MEM_RAM);
60} 58}
diff --git a/arch/mips/au1000/pb1550/irqmap.c b/arch/mips/au1000/pb1550/irqmap.c
index e1dac37af08a..a02a4d1fa899 100644
--- a/arch/mips/au1000/pb1550/irqmap.c
+++ b/arch/mips/au1000/pb1550/irqmap.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table 3 * Au1xx0 IRQ map table
4 * 4 *
5 * Copyright 2003 Embedded Edge, LLC 5 * Copyright 2003 Embedded Edge, LLC
6 * dan@embeddededge.com 6 * dan@embeddededge.com
@@ -31,8 +31,8 @@
31#include <asm/mach-au1x00/au1000.h> 31#include <asm/mach-au1x00/au1000.h>
32 32
33char irq_tab_alchemy[][5] __initdata = { 33char irq_tab_alchemy[][5] __initdata = {
34 [12] = { -1, INTB, INTC, INTD, INTA}, /* IDSEL 12 - PCI slot 2 (left) */ 34 [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */
35 [13] = { -1, INTA, INTB, INTC, INTD}, /* IDSEL 13 - PCI slot 1 (right) */ 35 [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */
36}; 36};
37 37
38struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { 38struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
diff --git a/arch/mips/au1000/xxs1500/Makefile b/arch/mips/au1000/xxs1500/Makefile
index 44d7f7056ae7..db3c526f64d8 100644
--- a/arch/mips/au1000/xxs1500/Makefile
+++ b/arch/mips/au1000/xxs1500/Makefile
@@ -1,7 +1,6 @@
1# 1#
2# Copyright 2003 MontaVista Software Inc. 2# Copyright 2003 MontaVista Software Inc.
3# Author: MontaVista Software, Inc. 3# Author: MontaVista Software, Inc. <source@mvista.com>
4# ppopov@mvista.com or source@mvista.com
5# 4#
6# Makefile for MyCable XXS1500 board. 5# Makefile for MyCable XXS1500 board.
7# 6#
diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/au1000/xxs1500/board_setup.c
index 79d1798621bf..4c587acac5c3 100644
--- a/arch/mips/au1000/xxs1500/board_setup.c
+++ b/arch/mips/au1000/xxs1500/board_setup.c
@@ -1,7 +1,6 @@
1/* 1/*
2 * Copyright 2000-2003 MontaVista Software Inc. 2 * Copyright 2000-2003, 2008 MontaVista Software Inc.
3 * Author: MontaVista Software, Inc. 3 * Author: MontaVista Software, Inc. <source@mvista.com>
4 * ppopov@mvista.com or source@mvista.com
5 * 4 *
6 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 6 * under the terms of the GNU General Public License as published by the
@@ -39,40 +38,40 @@ void __init board_setup(void)
39{ 38{
40 u32 pin_func; 39 u32 pin_func;
41 40
42 // set multiple use pins (UART3/GPIO) to UART (it's used as UART too) 41 /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
43 pin_func = au_readl(SYS_PINFUNC) & (u32)(~SYS_PF_UR3); 42 pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
44 pin_func |= SYS_PF_UR3; 43 pin_func |= SYS_PF_UR3;
45 au_writel(pin_func, SYS_PINFUNC); 44 au_writel(pin_func, SYS_PINFUNC);
46 45
47 // enable UART 46 /* Enable UART */
48 au_writel(0x01, UART3_ADDR+UART_MOD_CNTRL); // clock enable (CE) 47 au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
49 mdelay(10); 48 mdelay(10);
50 au_writel(0x03, UART3_ADDR+UART_MOD_CNTRL); // CE and "enable" 49 au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
51 mdelay(10); 50 mdelay(10);
52 51
53 // enable DTR = USB power up 52 /* Enable DTR = USB power up */
54 au_writel(0x01, UART3_ADDR+UART_MCR); //? UART_MCR_DTR is 0x01??? 53 au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
55 54
56#ifdef CONFIG_PCMCIA_XXS1500 55#ifdef CONFIG_PCMCIA_XXS1500
57 /* setup pcmcia signals */ 56 /* Setup PCMCIA signals */
58 au_writel(0, SYS_PININPUTEN); 57 au_writel(0, SYS_PININPUTEN);
59 58
60 /* gpio 0, 1, and 4 are inputs */ 59 /* GPIO 0, 1, and 4 are inputs */
61 au_writel(1 | (1<<1) | (1<<4), SYS_TRIOUTCLR); 60 au_writel(1 | (1 << 1) | (1 << 4), SYS_TRIOUTCLR);
62 61
63 /* enable GPIO2 if not already enabled */ 62 /* Enable GPIO2 if not already enabled */
64 au_writel(1, GPIO2_ENABLE); 63 au_writel(1, GPIO2_ENABLE);
65 /* gpio2 208/9/10/11 are inputs */ 64 /* GPIO2 208/9/10/11 are inputs */
66 au_writel((1<<8) | (1<<9) | (1<<10) | (1<<11), GPIO2_DIR); 65 au_writel((1 << 8) | (1 << 9) | (1 << 10) | (1 << 11), GPIO2_DIR);
67 66
68 /* turn off power */ 67 /* Turn off power */
69 au_writel((au_readl(GPIO2_PINSTATE) & ~(1<<14))|(1<<30), GPIO2_OUTPUT); 68 au_writel((au_readl(GPIO2_PINSTATE) & ~(1 << 14)) | (1 << 30),
69 GPIO2_OUTPUT);
70#endif 70#endif
71 71
72
73#ifdef CONFIG_PCI 72#ifdef CONFIG_PCI
74#if defined(__MIPSEB__) 73#if defined(__MIPSEB__)
75 au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); 74 au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
76#else 75#else
77 au_writel(0xf, Au1500_PCI_CFG); 76 au_writel(0xf, Au1500_PCI_CFG);
78#endif 77#endif
diff --git a/arch/mips/au1000/xxs1500/init.c b/arch/mips/au1000/xxs1500/init.c
index 24fc6e132dc0..b849bf501c04 100644
--- a/arch/mips/au1000/xxs1500/init.c
+++ b/arch/mips/au1000/xxs1500/init.c
@@ -2,9 +2,8 @@
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * XXS1500 board setup 3 * XXS1500 board setup
4 * 4 *
5 * Copyright 2003 MontaVista Software Inc. 5 * Copyright 2003, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
@@ -45,8 +44,8 @@ void __init prom_init(void)
45 unsigned long memsize; 44 unsigned long memsize;
46 45
47 prom_argc = fw_arg0; 46 prom_argc = fw_arg0;
48 prom_argv = (char **) fw_arg1; 47 prom_argv = (char **)fw_arg1;
49 prom_envp = (char **) fw_arg2; 48 prom_envp = (char **)fw_arg2;
50 49
51 prom_init_cmdline(); 50 prom_init_cmdline();
52 51
@@ -54,6 +53,6 @@ void __init prom_init(void)
54 if (!memsize_str) 53 if (!memsize_str)
55 memsize = 0x04000000; 54 memsize = 0x04000000;
56 else 55 else
57 memsize = simple_strtol(memsize_str, NULL, 0); 56 memsize = strict_strtol(memsize_str, 0, NULL);
58 add_memory_region(0, memsize, BOOT_MEM_RAM); 57 add_memory_region(0, memsize, BOOT_MEM_RAM);
59} 58}
diff --git a/arch/mips/au1000/xxs1500/irqmap.c b/arch/mips/au1000/xxs1500/irqmap.c
index dd6e3d1eb4d4..edf06ed11870 100644
--- a/arch/mips/au1000/xxs1500/irqmap.c
+++ b/arch/mips/au1000/xxs1500/irqmap.c
@@ -31,7 +31,7 @@
31#include <asm/mach-au1x00/au1000.h> 31#include <asm/mach-au1x00/au1000.h>
32 32
33struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { 33struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
34 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, 34 { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0 },
35 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, 35 { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 },
36 { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, 36 { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 },
37 { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, 37 { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 },
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c
index 82f9e9013e70..62bfb455d1b1 100644
--- a/arch/mips/emma2rh/markeins/setup.c
+++ b/arch/mips/emma2rh/markeins/setup.c
@@ -76,7 +76,9 @@ static void markeins_machine_power_off(void)
76 while (1) ; 76 while (1) ;
77} 77}
78 78
79static unsigned long clock[4] = { 166500000, 187312500, 199800000, 210600000 }; 79static unsigned long __initdata emma2rh_clock[4] = {
80 166500000, 187312500, 199800000, 210600000
81};
80 82
81static unsigned int __init detect_bus_frequency(unsigned long rtc_base) 83static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
82{ 84{
@@ -85,7 +87,8 @@ static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
85 /* detect from boot strap */ 87 /* detect from boot strap */
86 reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0); 88 reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
87 reg = (reg >> 4) & 0x3; 89 reg = (reg >> 4) & 0x3;
88 return clock[reg]; 90
91 return emma2rh_clock[reg];
89} 92}
90 93
91void __init plat_time_init(void) 94void __init plat_time_init(void)
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 45545be3eb86..cc0244036aec 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -56,9 +56,9 @@ obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o
56obj-$(CONFIG_MIPS_CMP) += smp-cmp.o 56obj-$(CONFIG_MIPS_CMP) += smp-cmp.o
57obj-$(CONFIG_CPU_MIPSR2) += spram.o 57obj-$(CONFIG_CPU_MIPSR2) += spram.o
58 58
59obj-$(CONFIG_MIPS_APSP_KSPD) += kspd.o
60obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o 59obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o
61obj-$(CONFIG_MIPS_VPE_APSP_API) += rtlx.o 60obj-$(CONFIG_MIPS_VPE_APSP_API) += rtlx.o
61obj-$(CONFIG_MIPS_APSP_KSPD) += kspd.o
62 62
63obj-$(CONFIG_I8259) += i8259.o 63obj-$(CONFIG_I8259) += i8259.o
64obj-$(CONFIG_IRQ_CPU) += irq_cpu.o 64obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index a1b48af0992f..02b7713cf71c 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -38,7 +38,7 @@ static inline void align_mod(const int align, const int mod)
38 ".endr\n\t" 38 ".endr\n\t"
39 ".set pop" 39 ".set pop"
40 : 40 :
41 : GCC_IMM_ASM(align), GCC_IMM_ASM(mod)); 41 : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod));
42} 42}
43 43
44static inline void mult_sh_align_mod(long *v1, long *v2, long *w, 44static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 290d8e3a664d..469c7237e5ba 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -578,7 +578,7 @@ static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp,
578 * process and the system, here we map the page and fill the 578 * process and the system, here we map the page and fill the
579 * structure 579 * structure
580 */ 580 */
581static void irix_map_prda_page(void) 581static int irix_map_prda_page(void)
582{ 582{
583 unsigned long v; 583 unsigned long v;
584 struct prda *pp; 584 struct prda *pp;
@@ -587,8 +587,8 @@ static void irix_map_prda_page(void)
587 v = do_brk(PRDA_ADDRESS, PAGE_SIZE); 587 v = do_brk(PRDA_ADDRESS, PAGE_SIZE);
588 up_write(&current->mm->mmap_sem); 588 up_write(&current->mm->mmap_sem);
589 589
590 if (v < 0) 590 if (v != PRDA_ADDRESS)
591 return; 591 return v; /* v must be an error code */
592 592
593 pp = (struct prda *) v; 593 pp = (struct prda *) v;
594 pp->prda_sys.t_pid = task_pid_vnr(current); 594 pp->prda_sys.t_pid = task_pid_vnr(current);
@@ -596,6 +596,8 @@ static void irix_map_prda_page(void)
596 pp->prda_sys.t_rpid = task_pid_vnr(current); 596 pp->prda_sys.t_rpid = task_pid_vnr(current);
597 597
598 /* We leave the rest set to zero */ 598 /* We leave the rest set to zero */
599
600 return 0;
599} 601}
600 602
601 603
@@ -781,7 +783,8 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
781 * IRIX maps a page at 0x200000 which holds some system 783 * IRIX maps a page at 0x200000 which holds some system
782 * information. Programs depend on this. 784 * information. Programs depend on this.
783 */ 785 */
784 irix_map_prda_page(); 786 if (irix_map_prda_page())
787 goto out_free_dentry;
785 788
786 padzero(elf_bss); 789 padzero(elf_bss);
787 790
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index ceb62dce1c9c..b0591ae0ce56 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -257,7 +257,7 @@ void sp_work_handle_request(void)
257 257
258 vcwd = vpe_getcwd(tclimit); 258 vcwd = vpe_getcwd(tclimit);
259 259
260 /* change to the cwd of the process that loaded the SP program */ 260 /* change to cwd of the process that loaded the SP program */
261 old_fs = get_fs(); 261 old_fs = get_fs();
262 set_fs(KERNEL_DS); 262 set_fs(KERNEL_DS);
263 sys_chdir(vcwd); 263 sys_chdir(vcwd);
@@ -323,6 +323,9 @@ static void sp_cleanup(void)
323 set >>= 1; 323 set >>= 1;
324 } 324 }
325 } 325 }
326
327 /* Put daemon cwd back to root to avoid umount problems */
328 sys_chdir("/");
326} 329}
327 330
328static int channel_open = 0; 331static int channel_open = 0;
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index 0233798f7155..b88f1c18ff4d 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -72,6 +72,15 @@ static void rtlx_dispatch(void)
72static irqreturn_t rtlx_interrupt(int irq, void *dev_id) 72static irqreturn_t rtlx_interrupt(int irq, void *dev_id)
73{ 73{
74 int i; 74 int i;
75 unsigned int flags, vpeflags;
76
77 /* Ought not to be strictly necessary for SMTC builds */
78 local_irq_save(flags);
79 vpeflags = dvpe();
80 set_c0_status(0x100 << MIPS_CPU_RTLX_IRQ);
81 irq_enable_hazard();
82 evpe(vpeflags);
83 local_irq_restore(flags);
75 84
76 for (i = 0; i < RTLX_CHANNELS; i++) { 85 for (i = 0; i < RTLX_CHANNELS; i++) {
77 wake_up(&channel_wqs[i].lx_queue); 86 wake_up(&channel_wqs[i].lx_queue);
@@ -108,7 +117,8 @@ static void __used dump_rtlx(void)
108static int rtlx_init(struct rtlx_info *rtlxi) 117static int rtlx_init(struct rtlx_info *rtlxi)
109{ 118{
110 if (rtlxi->id != RTLX_ID) { 119 if (rtlxi->id != RTLX_ID) {
111 printk(KERN_ERR "no valid RTLX id at 0x%p 0x%lx\n", rtlxi, rtlxi->id); 120 printk(KERN_ERR "no valid RTLX id at 0x%p 0x%lx\n",
121 rtlxi, rtlxi->id);
112 return -ENOEXEC; 122 return -ENOEXEC;
113 } 123 }
114 124
@@ -162,18 +172,17 @@ int rtlx_open(int index, int can_sleep)
162 172
163 if (rtlx == NULL) { 173 if (rtlx == NULL) {
164 if( (p = vpe_get_shared(tclimit)) == NULL) { 174 if( (p = vpe_get_shared(tclimit)) == NULL) {
165 if (can_sleep) { 175 if (can_sleep) {
166 __wait_event_interruptible(channel_wqs[index].lx_queue, 176 __wait_event_interruptible(channel_wqs[index].lx_queue,
167 (p = vpe_get_shared(tclimit)), 177 (p = vpe_get_shared(tclimit)), ret);
168 ret); 178 if (ret)
169 if (ret)
170 goto out_fail;
171 } else {
172 printk(KERN_DEBUG "No SP program loaded, and device "
173 "opened with O_NONBLOCK\n");
174 ret = -ENOSYS;
175 goto out_fail; 179 goto out_fail;
176 } 180 } else {
181 printk(KERN_DEBUG "No SP program loaded, and device "
182 "opened with O_NONBLOCK\n");
183 ret = -ENOSYS;
184 goto out_fail;
185 }
177 } 186 }
178 187
179 smp_rmb(); 188 smp_rmb();
@@ -182,7 +191,9 @@ int rtlx_open(int index, int can_sleep)
182 DEFINE_WAIT(wait); 191 DEFINE_WAIT(wait);
183 192
184 for (;;) { 193 for (;;) {
185 prepare_to_wait(&channel_wqs[index].lx_queue, &wait, TASK_INTERRUPTIBLE); 194 prepare_to_wait(
195 &channel_wqs[index].lx_queue,
196 &wait, TASK_INTERRUPTIBLE);
186 smp_rmb(); 197 smp_rmb();
187 if (*p != NULL) 198 if (*p != NULL)
188 break; 199 break;
@@ -195,7 +206,7 @@ int rtlx_open(int index, int can_sleep)
195 } 206 }
196 finish_wait(&channel_wqs[index].lx_queue, &wait); 207 finish_wait(&channel_wqs[index].lx_queue, &wait);
197 } else { 208 } else {
198 printk(" *vpe_get_shared is NULL. " 209 pr_err(" *vpe_get_shared is NULL. "
199 "Has an SP program been loaded?\n"); 210 "Has an SP program been loaded?\n");
200 ret = -ENOSYS; 211 ret = -ENOSYS;
201 goto out_fail; 212 goto out_fail;
@@ -203,8 +214,9 @@ int rtlx_open(int index, int can_sleep)
203 } 214 }
204 215
205 if ((unsigned int)*p < KSEG0) { 216 if ((unsigned int)*p < KSEG0) {
206 printk(KERN_WARNING "vpe_get_shared returned an invalid pointer " 217 printk(KERN_WARNING "vpe_get_shared returned an "
207 "maybe an error code %d\n", (int)*p); 218 "invalid pointer maybe an error code %d\n",
219 (int)*p);
208 ret = -ENOSYS; 220 ret = -ENOSYS;
209 goto out_fail; 221 goto out_fail;
210 } 222 }
@@ -232,6 +244,10 @@ out_ret:
232 244
233int rtlx_release(int index) 245int rtlx_release(int index)
234{ 246{
247 if (rtlx == NULL) {
248 pr_err("rtlx_release() with null rtlx\n");
249 return 0;
250 }
235 rtlx->channel[index].lx_state = RTLX_STATE_UNUSED; 251 rtlx->channel[index].lx_state = RTLX_STATE_UNUSED;
236 return 0; 252 return 0;
237} 253}
@@ -251,8 +267,8 @@ unsigned int rtlx_read_poll(int index, int can_sleep)
251 int ret = 0; 267 int ret = 0;
252 268
253 __wait_event_interruptible(channel_wqs[index].lx_queue, 269 __wait_event_interruptible(channel_wqs[index].lx_queue,
254 chan->lx_read != chan->lx_write || sp_stopping, 270 (chan->lx_read != chan->lx_write) ||
255 ret); 271 sp_stopping, ret);
256 if (ret) 272 if (ret)
257 return ret; 273 return ret;
258 274
@@ -282,7 +298,9 @@ static inline int write_spacefree(int read, int write, int size)
282unsigned int rtlx_write_poll(int index) 298unsigned int rtlx_write_poll(int index)
283{ 299{
284 struct rtlx_channel *chan = &rtlx->channel[index]; 300 struct rtlx_channel *chan = &rtlx->channel[index];
285 return write_spacefree(chan->rt_read, chan->rt_write, chan->buffer_size); 301
302 return write_spacefree(chan->rt_read, chan->rt_write,
303 chan->buffer_size);
286} 304}
287 305
288ssize_t rtlx_read(int index, void __user *buff, size_t count) 306ssize_t rtlx_read(int index, void __user *buff, size_t count)
@@ -344,8 +362,8 @@ ssize_t rtlx_write(int index, const void __user *buffer, size_t count)
344 rt_read = rt->rt_read; 362 rt_read = rt->rt_read;
345 363
346 /* total number of bytes to copy */ 364 /* total number of bytes to copy */
347 count = min(count, 365 count = min(count, (size_t)write_spacefree(rt_read, rt->rt_write,
348 (size_t)write_spacefree(rt_read, rt->rt_write, rt->buffer_size)); 366 rt->buffer_size));
349 367
350 /* first bit from write pointer to the end of the buffer, or count */ 368 /* first bit from write pointer to the end of the buffer, or count */
351 fl = min(count, (size_t) rt->buffer_size - rt->rt_write); 369 fl = min(count, (size_t) rt->buffer_size - rt->rt_write);
@@ -514,6 +532,11 @@ static int __init rtlx_module_init(void)
514 532
515 if (cpu_has_vint) 533 if (cpu_has_vint)
516 set_vi_handler(MIPS_CPU_RTLX_IRQ, rtlx_dispatch); 534 set_vi_handler(MIPS_CPU_RTLX_IRQ, rtlx_dispatch);
535 else {
536 pr_err("APRP RTLX init on non-vectored-interrupt processor\n");
537 err = -ENODEV;
538 goto out_chrdev;
539 }
517 540
518 rtlx_irq.dev_id = rtlx; 541 rtlx_irq.dev_id = rtlx;
519 setup_irq(rtlx_irq_num, &rtlx_irq); 542 setup_irq(rtlx_irq_num, &rtlx_irq);
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 39f3dfe134fb..c6a063b2a0d9 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -331,6 +331,7 @@ static void __init bootmem_init(void)
331 /* 331 /*
332 * Determine low and high memory ranges 332 * Determine low and high memory ranges
333 */ 333 */
334 max_pfn = max_low_pfn;
334 if (max_low_pfn > PFN_DOWN(HIGHMEM_START)) { 335 if (max_low_pfn > PFN_DOWN(HIGHMEM_START)) {
335#ifdef CONFIG_HIGHMEM 336#ifdef CONFIG_HIGHMEM
336 highstart_pfn = PFN_DOWN(HIGHMEM_START); 337 highstart_pfn = PFN_DOWN(HIGHMEM_START);
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 33780cc61ce9..63370cdd3c90 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -87,8 +87,8 @@ struct plat_smp_ops *mp_ops;
87 87
88__cpuinit void register_smp_ops(struct plat_smp_ops *ops) 88__cpuinit void register_smp_ops(struct plat_smp_ops *ops)
89{ 89{
90 if (ops) 90 if (mp_ops)
91 printk(KERN_WARNING "Overriding previous set SMP ops\n"); 91 printk(KERN_WARNING "Overriding previously set SMP ops\n");
92 92
93 mp_ops = ops; 93 mp_ops = ops;
94} 94}
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 39804c584edd..2794501ff302 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -269,7 +269,7 @@ static void *alloc_progmem(unsigned long len)
269 * This means you must tell Linux to use less memory than you 269 * This means you must tell Linux to use less memory than you
270 * physically have, for example by passing a mem= boot argument. 270 * physically have, for example by passing a mem= boot argument.
271 */ 271 */
272 addr = pfn_to_kaddr(max_pfn); 272 addr = pfn_to_kaddr(max_low_pfn);
273 memset(addr, 0, len); 273 memset(addr, 0, len);
274#else 274#else
275 /* simple grab some mem for now */ 275 /* simple grab some mem for now */
@@ -781,10 +781,15 @@ static int vpe_run(struct vpe * v)
781 /* take system out of configuration state */ 781 /* take system out of configuration state */
782 clear_c0_mvpcontrol(MVPCONTROL_VPC); 782 clear_c0_mvpcontrol(MVPCONTROL_VPC);
783 783
784 /*
785 * SMTC/SMVP kernels manage VPE enable independently,
786 * but uniprocessor kernels need to turn it on, even
787 * if that wasn't the pre-dvpe() state.
788 */
784#ifdef CONFIG_SMP 789#ifdef CONFIG_SMP
785 evpe(EVPE_ENABLE);
786#else
787 evpe(vpeflags); 790 evpe(vpeflags);
791#else
792 evpe(EVPE_ENABLE);
788#endif 793#endif
789 emt(dmt_flag); 794 emt(dmt_flag);
790 local_irq_restore(flags); 795 local_irq_restore(flags);
@@ -840,7 +845,7 @@ static int vpe_elfload(struct vpe * v)
840 845
841 /* Sanity checks against insmoding binaries or wrong arch, 846 /* Sanity checks against insmoding binaries or wrong arch,
842 weird elf version */ 847 weird elf version */
843 if (memcmp(hdr->e_ident, ELFMAG, 4) != 0 848 if (memcmp(hdr->e_ident, ELFMAG, SELFMAG) != 0
844 || (hdr->e_type != ET_REL && hdr->e_type != ET_EXEC) 849 || (hdr->e_type != ET_REL && hdr->e_type != ET_EXEC)
845 || !elf_check_arch(hdr) 850 || !elf_check_arch(hdr)
846 || hdr->e_shentsize != sizeof(*sechdrs)) { 851 || hdr->e_shentsize != sizeof(*sechdrs)) {
@@ -947,12 +952,14 @@ static int vpe_elfload(struct vpe * v)
947 struct elf_phdr *phdr = (struct elf_phdr *) ((char *)hdr + hdr->e_phoff); 952 struct elf_phdr *phdr = (struct elf_phdr *) ((char *)hdr + hdr->e_phoff);
948 953
949 for (i = 0; i < hdr->e_phnum; i++) { 954 for (i = 0; i < hdr->e_phnum; i++) {
950 if (phdr->p_type != PT_LOAD) 955 if (phdr->p_type == PT_LOAD) {
951 continue; 956 memcpy((void *)phdr->p_paddr,
952 957 (char *)hdr + phdr->p_offset,
953 memcpy((void *)phdr->p_paddr, (char *)hdr + phdr->p_offset, phdr->p_filesz); 958 phdr->p_filesz);
954 memset((void *)phdr->p_paddr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz); 959 memset((void *)phdr->p_paddr + phdr->p_filesz,
955 phdr++; 960 0, phdr->p_memsz - phdr->p_filesz);
961 }
962 phdr++;
956 } 963 }
957 964
958 for (i = 0; i < hdr->e_shnum; i++) { 965 for (i = 0; i < hdr->e_shnum; i++) {
@@ -1107,7 +1114,7 @@ static int vpe_release(struct inode *inode, struct file *filp)
1107 return -ENODEV; 1114 return -ENODEV;
1108 1115
1109 hdr = (Elf_Ehdr *) v->pbuffer; 1116 hdr = (Elf_Ehdr *) v->pbuffer;
1110 if (memcmp(hdr->e_ident, ELFMAG, 4) == 0) { 1117 if (memcmp(hdr->e_ident, ELFMAG, SELFMAG) == 0) {
1111 if (vpe_elfload(v) >= 0) { 1118 if (vpe_elfload(v) >= 0) {
1112 vpe_run(v); 1119 vpe_run(v);
1113 } else { 1120 } else {
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index 10dd2af2343b..8f2cd8eda741 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -116,4 +116,3 @@ EXPORT_SYMBOL(__kmap);
116EXPORT_SYMBOL(__kunmap); 116EXPORT_SYMBOL(__kunmap);
117EXPORT_SYMBOL(__kmap_atomic); 117EXPORT_SYMBOL(__kmap_atomic);
118EXPORT_SYMBOL(__kunmap_atomic); 118EXPORT_SYMBOL(__kunmap_atomic);
119EXPORT_SYMBOL(__kmap_atomic_to_page);
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index da8cbb6899dc..b40df7d2cf44 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -281,7 +281,7 @@ static inline int n_counters(void)
281 281
282static void reset_counters(void *arg) 282static void reset_counters(void *arg)
283{ 283{
284 int counters = (int)arg; 284 int counters = (int)(long)arg;
285 switch (counters) { 285 switch (counters) {
286 case 4: 286 case 4:
287 w_c0_perfctrl3(0); 287 w_c0_perfctrl3(0);
@@ -313,7 +313,7 @@ static int __init mipsxx_init(void)
313 if (!cpu_has_mipsmt_pertccounters) 313 if (!cpu_has_mipsmt_pertccounters)
314 counters = counters_total_to_per_cpu(counters); 314 counters = counters_total_to_per_cpu(counters);
315#endif 315#endif
316 on_each_cpu(reset_counters, (void *)counters, 0, 1); 316 on_each_cpu(reset_counters, (void *)(long)counters, 0, 1);
317 317
318 op_model_mipsxx_ops.num_counters = counters; 318 op_model_mipsxx_ops.num_counters = counters;
319 switch (current_cpu_type()) { 319 switch (current_cpu_type()) {
@@ -382,7 +382,7 @@ static void mipsxx_exit(void)
382 int counters = op_model_mipsxx_ops.num_counters; 382 int counters = op_model_mipsxx_ops.num_counters;
383 383
384 counters = counters_per_cpu_to_total(counters); 384 counters = counters_per_cpu_to_total(counters);
385 on_each_cpu(reset_counters, (void *)counters, 0, 1); 385 on_each_cpu(reset_counters, (void *)(long)counters, 0, 1);
386 386
387 perf_irq = save_perf_irq; 387 perf_irq = save_perf_irq;
388} 388}
diff --git a/arch/mips/pci/fixup-au1000.c b/arch/mips/pci/fixup-au1000.c
index 00c36c9dbe0e..e2ddfc49237c 100644
--- a/arch/mips/pci/fixup-au1000.c
+++ b/arch/mips/pci/fixup-au1000.c
@@ -1,10 +1,9 @@
1/* 1/*
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Board specific pci fixups. 3 * Board specific PCI fixups.
4 * 4 *
5 * Copyright 2001-2003 MontaVista Software Inc. 5 * Copyright 2001-2003, 2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * This program is free software; you can redistribute it and/or modify it 8 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the 9 * under the terms of the GNU General Public License as published by the
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index 1314bd58f036..9a57c5ab91dd 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -1,10 +1,9 @@
1/* 1/*
2 * BRIEF MODULE DESCRIPTION 2 * BRIEF MODULE DESCRIPTION
3 * Alchemy/AMD Au1x00 PCI support. 3 * Alchemy/AMD Au1xx0 PCI support.
4 * 4 *
5 * Copyright 2001-2003, 2007 MontaVista Software Inc. 5 * Copyright 2001-2003, 2007-2008 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc. 6 * Author: MontaVista Software, Inc. <source@mvista.com>
7 * ppopov@mvista.com or source@mvista.com
8 * 7 *
9 * Support for all devices (greater than 16) added by David Gathright. 8 * Support for all devices (greater than 16) added by David Gathright.
10 * 9 *
@@ -28,6 +27,7 @@
28 * with this program; if not, write to the Free Software Foundation, Inc., 27 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
30 */ 29 */
30
31#include <linux/types.h> 31#include <linux/types.h>
32#include <linux/pci.h> 32#include <linux/pci.h>
33#include <linux/kernel.h> 33#include <linux/kernel.h>
@@ -36,9 +36,9 @@
36 36
37#include <asm/mach-au1x00/au1000.h> 37#include <asm/mach-au1x00/au1000.h>
38 38
39#undef DEBUG 39#undef DEBUG
40#ifdef DEBUG 40#ifdef DEBUG
41#define DBG(x...) printk(x) 41#define DBG(x...) printk(KERN_DEBUG x)
42#else 42#else
43#define DBG(x...) 43#define DBG(x...)
44#endif 44#endif
@@ -46,7 +46,6 @@
46#define PCI_ACCESS_READ 0 46#define PCI_ACCESS_READ 0
47#define PCI_ACCESS_WRITE 1 47#define PCI_ACCESS_WRITE 1
48 48
49
50int (*board_pci_idsel)(unsigned int devsel, int assert); 49int (*board_pci_idsel)(unsigned int devsel, int assert);
51 50
52void mod_wired_entry(int entry, unsigned long entrylo0, 51void mod_wired_entry(int entry, unsigned long entrylo0,
@@ -92,10 +91,9 @@ void __init au1x_pci_cfg_init(void)
92} 91}
93 92
94static int config_access(unsigned char access_type, struct pci_bus *bus, 93static int config_access(unsigned char access_type, struct pci_bus *bus,
95 unsigned int dev_fn, unsigned char where, 94 unsigned int dev_fn, unsigned char where, u32 *data)
96 u32 * data)
97{ 95{
98#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) 96#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
99 unsigned int device = PCI_SLOT(dev_fn); 97 unsigned int device = PCI_SLOT(dev_fn);
100 unsigned int function = PCI_FUNC(dev_fn); 98 unsigned int function = PCI_FUNC(dev_fn);
101 unsigned long offset, status; 99 unsigned long offset, status;
@@ -114,38 +112,36 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
114 Au1500_PCI_STATCMD); 112 Au1500_PCI_STATCMD);
115 au_sync_udelay(1); 113 au_sync_udelay(1);
116 114
117 /* Allow board vendors to implement their own off-chip idsel. 115 /*
116 * Allow board vendors to implement their own off-chip IDSEL.
118 * If it doesn't succeed, may as well bail out at this point. 117 * If it doesn't succeed, may as well bail out at this point.
119 */ 118 */
120 if (board_pci_idsel) { 119 if (board_pci_idsel && board_pci_idsel(device, 1) == 0) {
121 if (board_pci_idsel(device, 1) == 0) { 120 *data = 0xffffffff;
122 *data = 0xffffffff; 121 local_irq_restore(flags);
123 local_irq_restore(flags); 122 return -1;
124 return -1;
125 }
126 } 123 }
127 124
128 /* setup the config window */ 125 /* Setup the config window */
129 if (bus->number == 0) { 126 if (bus->number == 0)
130 cfg_base = ((1<<device)<<11); 127 cfg_base = (1 << device) << 11;
131 } else { 128 else
132 cfg_base = 0x80000000 | (bus->number<<16) | (device<<11); 129 cfg_base = 0x80000000 | (bus->number << 16) | (device << 11);
133 }
134 130
135 /* setup the lower bits of the 36 bit address */ 131 /* Setup the lower bits of the 36-bit address */
136 offset = (function << 8) | (where & ~0x3); 132 offset = (function << 8) | (where & ~0x3);
137 /* pick up any address that falls below the page mask */ 133 /* Pick up any address that falls below the page mask */
138 offset |= cfg_base & ~PAGE_MASK; 134 offset |= cfg_base & ~PAGE_MASK;
139 135
140 /* page boundary */ 136 /* Page boundary */
141 cfg_base = cfg_base & PAGE_MASK; 137 cfg_base = cfg_base & PAGE_MASK;
142 138
143 /* 139 /*
144 * To improve performance, if the current device is the same as 140 * To improve performance, if the current device is the same as
145 * the last device accessed, we don't touch the TLB. 141 * the last device accessed, we don't touch the TLB.
146 */ 142 */
147 entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; 143 entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7;
148 entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; 144 entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
149 if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) { 145 if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) {
150 mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1, 146 mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1,
151 (unsigned long)pci_cfg_vm->addr, PM_4K); 147 (unsigned long)pci_cfg_vm->addr, PM_4K);
@@ -153,38 +149,37 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
153 last_entryLo1 = entryLo1; 149 last_entryLo1 = entryLo1;
154 } 150 }
155 151
156 if (access_type == PCI_ACCESS_WRITE) { 152 if (access_type == PCI_ACCESS_WRITE)
157 au_writel(*data, (int)(pci_cfg_vm->addr + offset)); 153 au_writel(*data, (int)(pci_cfg_vm->addr + offset));
158 } else { 154 else
159 *data = au_readl((int)(pci_cfg_vm->addr + offset)); 155 *data = au_readl((int)(pci_cfg_vm->addr + offset));
160 } 156
161 au_sync_udelay(2); 157 au_sync_udelay(2);
162 158
163 DBG("cfg_access %d bus->number %d dev %d at %x *data %x conf %x\n", 159 DBG("cfg_access %d bus->number %u dev %u at %x *data %x conf %lx\n",
164 access_type, bus->number, device, where, *data, offset); 160 access_type, bus->number, device, where, *data, offset);
165 161
166 /* check master abort */ 162 /* Check master abort */
167 status = au_readl(Au1500_PCI_STATCMD); 163 status = au_readl(Au1500_PCI_STATCMD);
168 164
169 if (status & (1<<29)) { 165 if (status & (1 << 29)) {
170 *data = 0xffffffff; 166 *data = 0xffffffff;
171 error = -1; 167 error = -1;
172 DBG("Au1x Master Abort\n"); 168 DBG("Au1x Master Abort\n");
173 } else if ((status >> 28) & 0xf) { 169 } else if ((status >> 28) & 0xf) {
174 DBG("PCI ERR detected: device %d, status %x\n", device, ((status >> 28) & 0xf)); 170 DBG("PCI ERR detected: device %u, status %lx\n",
171 device, (status >> 28) & 0xf);
175 172
176 /* clear errors */ 173 /* Clear errors */
177 au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD); 174 au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD);
178 175
179 *data = 0xffffffff; 176 *data = 0xffffffff;
180 error = -1; 177 error = -1;
181 } 178 }
182 179
183 /* Take away the idsel. 180 /* Take away the IDSEL. */
184 */ 181 if (board_pci_idsel)
185 if (board_pci_idsel) {
186 (void)board_pci_idsel(device, 0); 182 (void)board_pci_idsel(device, 0);
187 }
188 183
189 local_irq_restore(flags); 184 local_irq_restore(flags);
190 return error; 185 return error;
@@ -192,7 +187,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
192} 187}
193 188
194static int read_config_byte(struct pci_bus *bus, unsigned int devfn, 189static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
195 int where, u8 * val) 190 int where, u8 *val)
196{ 191{
197 u32 data; 192 u32 data;
198 int ret; 193 int ret;
@@ -206,9 +201,8 @@ static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
206 return ret; 201 return ret;
207} 202}
208 203
209
210static int read_config_word(struct pci_bus *bus, unsigned int devfn, 204static int read_config_word(struct pci_bus *bus, unsigned int devfn,
211 int where, u16 * val) 205 int where, u16 *val)
212{ 206{
213 u32 data; 207 u32 data;
214 int ret; 208 int ret;
@@ -221,7 +215,7 @@ static int read_config_word(struct pci_bus *bus, unsigned int devfn,
221} 215}
222 216
223static int read_config_dword(struct pci_bus *bus, unsigned int devfn, 217static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
224 int where, u32 * val) 218 int where, u32 *val)
225{ 219{
226 int ret; 220 int ret;
227 221
@@ -229,9 +223,8 @@ static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
229 return ret; 223 return ret;
230} 224}
231 225
232static int 226static int write_config_byte(struct pci_bus *bus, unsigned int devfn,
233write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, 227 int where, u8 val)
234 u8 val)
235{ 228{
236 u32 data = 0; 229 u32 data = 0;
237 230
@@ -239,7 +232,7 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
239 return -1; 232 return -1;
240 233
241 data = (data & ~(0xff << ((where & 3) << 3))) | 234 data = (data & ~(0xff << ((where & 3) << 3))) |
242 (val << ((where & 3) << 3)); 235 (val << ((where & 3) << 3));
243 236
244 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) 237 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
245 return -1; 238 return -1;
@@ -247,9 +240,8 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
247 return PCIBIOS_SUCCESSFUL; 240 return PCIBIOS_SUCCESSFUL;
248} 241}
249 242
250static int 243static int write_config_word(struct pci_bus *bus, unsigned int devfn,
251write_config_word(struct pci_bus *bus, unsigned int devfn, int where, 244 int where, u16 val)
252 u16 val)
253{ 245{
254 u32 data = 0; 246 u32 data = 0;
255 247
@@ -257,18 +249,16 @@ write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
257 return -1; 249 return -1;
258 250
259 data = (data & ~(0xffff << ((where & 3) << 3))) | 251 data = (data & ~(0xffff << ((where & 3) << 3))) |
260 (val << ((where & 3) << 3)); 252 (val << ((where & 3) << 3));
261 253
262 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) 254 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
263 return -1; 255 return -1;
264 256
265
266 return PCIBIOS_SUCCESSFUL; 257 return PCIBIOS_SUCCESSFUL;
267} 258}
268 259
269static int 260static int write_config_dword(struct pci_bus *bus, unsigned int devfn,
270write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, 261 int where, u32 val)
271 u32 val)
272{ 262{
273 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) 263 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
274 return -1; 264 return -1;
@@ -277,18 +267,20 @@ write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
277} 267}
278 268
279static int config_read(struct pci_bus *bus, unsigned int devfn, 269static int config_read(struct pci_bus *bus, unsigned int devfn,
280 int where, int size, u32 * val) 270 int where, int size, u32 *val)
281{ 271{
282 switch (size) { 272 switch (size) {
283 case 1: { 273 case 1: {
284 u8 _val; 274 u8 _val;
285 int rc = read_config_byte(bus, devfn, where, &_val); 275 int rc = read_config_byte(bus, devfn, where, &_val);
276
286 *val = _val; 277 *val = _val;
287 return rc; 278 return rc;
288 } 279 }
289 case 2: { 280 case 2: {
290 u16 _val; 281 u16 _val;
291 int rc = read_config_word(bus, devfn, where, &_val); 282 int rc = read_config_word(bus, devfn, where, &_val);
283
292 *val = _val; 284 *val = _val;
293 return rc; 285 return rc;
294 } 286 }
@@ -310,7 +302,6 @@ static int config_write(struct pci_bus *bus, unsigned int devfn,
310 } 302 }
311} 303}
312 304
313
314struct pci_ops au1x_pci_ops = { 305struct pci_ops au1x_pci_ops = {
315 config_read, 306 config_read,
316 config_write 307 config_write
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c b/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
index ab96a2d7f4c4..11769b55438c 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_hwbutton.c
@@ -126,9 +126,6 @@ static irqreturn_t hwbutton_handler(int irq, void *data)
126 struct hwbutton_interrupt *hirq = data; 126 struct hwbutton_interrupt *hirq = data;
127 unsigned long cic_ext = *CIC_EXT_CFG_REG; 127 unsigned long cic_ext = *CIC_EXT_CFG_REG;
128 128
129 if (irq != hirq->irq)
130 return IRQ_NONE;
131
132 if (CIC_EXT_IS_ACTIVE_HI(cic_ext, hirq->eirq)) { 129 if (CIC_EXT_IS_ACTIVE_HI(cic_ext, hirq->eirq)) {
133 /* Interrupt: pin is now HI */ 130 /* Interrupt: pin is now HI */
134 CIC_EXT_SET_ACTIVE_LO(cic_ext, hirq->eirq); 131 CIC_EXT_SET_ACTIVE_LO(cic_ext, hirq->eirq);
@@ -164,7 +161,7 @@ static int msp_hwbutton_register(struct hwbutton_interrupt *hirq)
164 *CIC_EXT_CFG_REG = cic_ext; 161 *CIC_EXT_CFG_REG = cic_ext;
165 162
166 return request_irq(hirq->irq, hwbutton_handler, IRQF_DISABLED, 163 return request_irq(hirq->irq, hwbutton_handler, IRQF_DISABLED,
167 hirq->name, (void *)hirq); 164 hirq->name, hirq);
168} 165}
169 166
170static int __init msp_hwbutton_setup(void) 167static int __init msp_hwbutton_setup(void)
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 25d3baf0ebc4..9cebc9e7da63 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -158,7 +158,7 @@ static void rt_set_mode(enum clock_event_mode mode,
158 } 158 }
159} 159}
160 160
161unsigned int rt_timer_irq; 161int rt_timer_irq;
162 162
163static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id) 163static irqreturn_t hub_rt_counter_handler(int irq, void *dev_id)
164{ 164{
@@ -219,7 +219,7 @@ static void __cpuinit hub_rt_clock_event_init(void)
219 219
220static void __init hub_rt_clock_event_global_init(void) 220static void __init hub_rt_clock_event_global_init(void)
221{ 221{
222 unsigned int irq; 222 int irq;
223 223
224 do { 224 do {
225 smp_wmb(); 225 smp_wmb();
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 6a6409adc564..e856218da90d 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -186,17 +186,6 @@ config PREEMPT
186 Say Y here if you are building a kernel for a desktop, embedded 186 Say Y here if you are building a kernel for a desktop, embedded
187 or real-time system. Say N if you are unsure. 187 or real-time system. Say N if you are unsure.
188 188
189config PREEMPT_BKL
190 bool "Preempt The Big Kernel Lock"
191 depends on PREEMPT
192 default y
193 help
194 This option reduces the latency of the kernel by making the
195 big kernel lock preemptible.
196
197 Say Y here if you are building a kernel for a desktop system.
198 Say N if you are unsure.
199
200config MN10300_CURRENT_IN_E2 189config MN10300_CURRENT_IN_E2
201 bool "Hold current task address in E2 register" 190 bool "Hold current task address in E2 register"
202 default y 191 default y
diff --git a/arch/mn10300/boot/install.sh b/arch/mn10300/boot/install.sh
index 072951c83976..abba30971191 100644
--- a/arch/mn10300/boot/install.sh
+++ b/arch/mn10300/boot/install.sh
@@ -26,42 +26,42 @@ rm -fr $4/../usr/include/linux $4/../usr/include/asm
26install -c -m 0755 $2 $4/vmlinuz 26install -c -m 0755 $2 $4/vmlinuz
27install -c -m 0755 $5 $4/boot.rom 27install -c -m 0755 $5 $4/boot.rom
28install -c -m 0755 -d $4/../usr/include/linux 28install -c -m 0755 -d $4/../usr/include/linux
29cd $TOPDIR/include/linux 29cd ${srctree}/include/linux
30for i in `find . -maxdepth 1 -name '*.h' -print`; do 30for i in `find . -maxdepth 1 -name '*.h' -print`; do
31 install -c -m 0644 $i $4/../usr/include/linux 31 install -c -m 0644 $i $4/../usr/include/linux
32done 32done
33install -c -m 0755 -d $4/../usr/include/linux/byteorder 33install -c -m 0755 -d $4/../usr/include/linux/byteorder
34cd $TOPDIR/include/linux/byteorder 34cd ${srctree}/include/linux/byteorder
35for i in `find . -name '*.h' -print`; do 35for i in `find . -name '*.h' -print`; do
36 install -c -m 0644 $i $4/../usr/include/linux/byteorder 36 install -c -m 0644 $i $4/../usr/include/linux/byteorder
37done 37done
38install -c -m 0755 -d $4/../usr/include/linux/lockd 38install -c -m 0755 -d $4/../usr/include/linux/lockd
39cd $TOPDIR/include/linux/lockd 39cd ${srctree}/include/linux/lockd
40for i in `find . -name '*.h' -print`; do 40for i in `find . -name '*.h' -print`; do
41 install -c -m 0644 $i $4/../usr/include/linux/lockd 41 install -c -m 0644 $i $4/../usr/include/linux/lockd
42done 42done
43install -c -m 0755 -d $4/../usr/include/linux/netfilter_ipv4 43install -c -m 0755 -d $4/../usr/include/linux/netfilter_ipv4
44cd $TOPDIR/include/linux/netfilter_ipv4 44cd ${srctree}/include/linux/netfilter_ipv4
45for i in `find . -name '*.h' -print`; do 45for i in `find . -name '*.h' -print`; do
46 install -c -m 0644 $i $4/../usr/include/linux/netfilter_ipv4 46 install -c -m 0644 $i $4/../usr/include/linux/netfilter_ipv4
47done 47done
48install -c -m 0755 -d $4/../usr/include/linux/nfsd 48install -c -m 0755 -d $4/../usr/include/linux/nfsd
49cd $TOPDIR/include/linux/nfsd 49cd ${srctree}/include/linux/nfsd
50for i in `find . -name '*.h' -print`; do 50for i in `find . -name '*.h' -print`; do
51 install -c -m 0644 $i $4/../usr/include/linux/nfsd/$i 51 install -c -m 0644 $i $4/../usr/include/linux/nfsd/$i
52done 52done
53install -c -m 0755 -d $4/../usr/include/linux/raid 53install -c -m 0755 -d $4/../usr/include/linux/raid
54cd $TOPDIR/include/linux/raid 54cd ${srctree}/include/linux/raid
55for i in `find . -name '*.h' -print`; do 55for i in `find . -name '*.h' -print`; do
56 install -c -m 0644 $i $4/../usr/include/linux/raid 56 install -c -m 0644 $i $4/../usr/include/linux/raid
57done 57done
58install -c -m 0755 -d $4/../usr/include/linux/sunrpc 58install -c -m 0755 -d $4/../usr/include/linux/sunrpc
59cd $TOPDIR/include/linux/sunrpc 59cd ${srctree}/include/linux/sunrpc
60for i in `find . -name '*.h' -print`; do 60for i in `find . -name '*.h' -print`; do
61 install -c -m 0644 $i $4/../usr/include/linux/sunrpc 61 install -c -m 0644 $i $4/../usr/include/linux/sunrpc
62done 62done
63install -c -m 0755 -d $4/../usr/include/asm 63install -c -m 0755 -d $4/../usr/include/asm
64cd $TOPDIR/include/asm 64cd ${srctree}/include/asm
65for i in `find . -name '*.h' -print`; do 65for i in `find . -name '*.h' -print`; do
66 install -c -m 0644 $i $4/../usr/include/asm 66 install -c -m 0644 $i $4/../usr/include/asm
67done 67done
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c
index 1f012843150f..b0ed709d5743 100644
--- a/arch/parisc/mm/init.c
+++ b/arch/parisc/mm/init.c
@@ -606,7 +606,7 @@ void show_mem(void)
606 int i, j; 606 int i, j;
607 607
608 for (i = 0; i < npmem_ranges; i++) { 608 for (i = 0; i < npmem_ranges; i++) {
609 zl = node_zonelist(i); 609 zl = node_zonelist(i, 0);
610 for (j = 0; j < MAX_NR_ZONES; j++) { 610 for (j = 0; j < MAX_NR_ZONES; j++) {
611 struct zoneref *z; 611 struct zoneref *z;
612 struct zone *zone; 612 struct zone *zone;
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index a1ae4d6ec990..72d67564bdfc 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -342,9 +342,14 @@
342 /* Outbound ranges, one memory and one IO, 342 /* Outbound ranges, one memory and one IO,
343 * later cannot be changed. Chip supports a second 343 * later cannot be changed. Chip supports a second
344 * IO range but we don't use it for now 344 * IO range but we don't use it for now
345 * From the 440EPx user manual:
346 * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
347 * I/O 1 E800 0000 1 E800 FFFF 64KB
348 * I/O 1 E880 0000 1 EBFF FFFF 56MB
345 */ 349 */
346 ranges = <02000000 0 80000000 1 80000000 0 10000000 350 ranges = <02000000 0 80000000 1 80000000 0 40000000
347 01000000 0 00000000 1 e8000000 0 00100000>; 351 01000000 0 00000000 1 e8000000 0 00010000
352 01000000 0 00000000 1 e8800000 0 03800000>;
348 353
349 /* Inbound 2GB range starting at 0 */ 354 /* Inbound 2GB range starting at 0 */
350 dma-ranges = <42000000 0 0 0 0 0 80000000>; 355 dma-ranges = <42000000 0 0 0 0 0 80000000>;
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index d14cebf62bb0..2346d271fbfd 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -105,6 +105,9 @@ PHONY += systbl_chk
105systbl_chk: $(src)/systbl_chk.sh $(obj)/systbl_chk.i 105systbl_chk: $(src)/systbl_chk.sh $(obj)/systbl_chk.i
106 $(call cmd,systbl_chk) 106 $(call cmd,systbl_chk)
107 107
108
109ifeq ($(CONFIG_PPC_MERGE),y)
110
108$(obj)/built-in.o: prom_init_check 111$(obj)/built-in.o: prom_init_check
109 112
110quiet_cmd_prom_init_check = CALL $< 113quiet_cmd_prom_init_check = CALL $<
@@ -114,4 +117,7 @@ PHONY += prom_init_check
114prom_init_check: $(src)/prom_init_check.sh $(obj)/prom_init.o 117prom_init_check: $(src)/prom_init_check.sh $(obj)/prom_init.o
115 $(call cmd,prom_init_check) 118 $(call cmd,prom_init_check)
116 119
120endif
121
122
117clean-files := vmlinux.lds 123clean-files := vmlinux.lds
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index 9f9377745490..d8f0329b1344 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -16,7 +16,6 @@
16#include <asm/mmu.h> 16#include <asm/mmu.h>
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/prom.h>
20#include <asm/processor.h> 19#include <asm/processor.h>
21#include <asm/udbg.h> 20#include <asm/udbg.h>
22 21
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 36080d4d1922..e44d5530f0a6 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1208,6 +1208,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
1208 .machine_check = machine_check_4xx, 1208 .machine_check = machine_check_4xx,
1209 .platform = "ppc405", 1209 .platform = "ppc405",
1210 }, 1210 },
1211 { /* default match */
1212 .pvr_mask = 0x00000000,
1213 .pvr_value = 0x00000000,
1214 .cpu_name = "(generic 40x PPC)",
1215 .cpu_features = CPU_FTRS_40X,
1216 .cpu_user_features = PPC_FEATURE_32 |
1217 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1218 .icache_bsize = 32,
1219 .dcache_bsize = 32,
1220 .machine_check = machine_check_4xx,
1221 .platform = "ppc405",
1222 }
1211 1223
1212#endif /* CONFIG_40x */ 1224#endif /* CONFIG_40x */
1213#ifdef CONFIG_44x 1225#ifdef CONFIG_44x
@@ -1421,8 +1433,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
1421 .machine_check = machine_check_440A, 1433 .machine_check = machine_check_440A,
1422 .platform = "ppc440", 1434 .platform = "ppc440",
1423 }, 1435 },
1436 { /* default match */
1437 .pvr_mask = 0x00000000,
1438 .pvr_value = 0x00000000,
1439 .cpu_name = "(generic 44x PPC)",
1440 .cpu_features = CPU_FTRS_44X,
1441 .cpu_user_features = COMMON_USER_BOOKE,
1442 .icache_bsize = 32,
1443 .dcache_bsize = 32,
1444 .machine_check = machine_check_4xx,
1445 .platform = "ppc440",
1446 }
1424#endif /* CONFIG_44x */ 1447#endif /* CONFIG_44x */
1425#ifdef CONFIG_FSL_BOOKE
1426#ifdef CONFIG_E200 1448#ifdef CONFIG_E200
1427 { /* e200z5 */ 1449 { /* e200z5 */
1428 .pvr_mask = 0xfff00000, 1450 .pvr_mask = 0xfff00000,
@@ -1451,7 +1473,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
1451 .machine_check = machine_check_e200, 1473 .machine_check = machine_check_e200,
1452 .platform = "ppc5554", 1474 .platform = "ppc5554",
1453 }, 1475 },
1454#elif defined(CONFIG_E500) 1476 { /* default match */
1477 .pvr_mask = 0x00000000,
1478 .pvr_value = 0x00000000,
1479 .cpu_name = "(generic E200 PPC)",
1480 .cpu_features = CPU_FTRS_E200,
1481 .cpu_user_features = COMMON_USER_BOOKE |
1482 PPC_FEATURE_HAS_EFP_SINGLE |
1483 PPC_FEATURE_UNIFIED_CACHE,
1484 .dcache_bsize = 32,
1485 .machine_check = machine_check_e200,
1486 .platform = "ppc5554",
1487 }
1488#endif /* CONFIG_E200 */
1489#ifdef CONFIG_E500
1455 { /* e500 */ 1490 { /* e500 */
1456 .pvr_mask = 0xffff0000, 1491 .pvr_mask = 0xffff0000,
1457 .pvr_value = 0x80200000, 1492 .pvr_value = 0x80200000,
@@ -1487,20 +1522,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
1487 .machine_check = machine_check_e500, 1522 .machine_check = machine_check_e500,
1488 .platform = "ppc8548", 1523 .platform = "ppc8548",
1489 }, 1524 },
1490#endif
1491#endif
1492#if !CLASSIC_PPC
1493 { /* default match */ 1525 { /* default match */
1494 .pvr_mask = 0x00000000, 1526 .pvr_mask = 0x00000000,
1495 .pvr_value = 0x00000000, 1527 .pvr_value = 0x00000000,
1496 .cpu_name = "(generic PPC)", 1528 .cpu_name = "(generic E500 PPC)",
1497 .cpu_features = CPU_FTRS_GENERIC_32, 1529 .cpu_features = CPU_FTRS_E500,
1498 .cpu_user_features = PPC_FEATURE_32, 1530 .cpu_user_features = COMMON_USER_BOOKE |
1531 PPC_FEATURE_HAS_SPE_COMP |
1532 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1499 .icache_bsize = 32, 1533 .icache_bsize = 32,
1500 .dcache_bsize = 32, 1534 .dcache_bsize = 32,
1535 .machine_check = machine_check_e500,
1501 .platform = "powerpc", 1536 .platform = "powerpc",
1502 } 1537 }
1503#endif /* !CLASSIC_PPC */ 1538#endif /* CONFIG_E500 */
1504#endif /* CONFIG_PPC32 */ 1539#endif /* CONFIG_PPC32 */
1505}; 1540};
1506 1541
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index b84ec6a2fc94..c2b9dc4fce5d 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -653,7 +653,14 @@ finish_tlb_load:
653 rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */ 653 rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */
654 654
655 rlwimi r12, r10, 0, 26, 31 /* Insert static perms */ 655 rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
656 rlwinm r12, r12, 0, 20, 15 /* Clear U0-U3 */ 656
657 /*
658 * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
659 * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
660 * include/asm-powerpc/pgtable-ppc32.h for details).
661 */
662 rlwinm r12, r12, 0, 20, 10
663
657 tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */ 664 tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
658 665
659 /* Done...restore registers and get out of here. 666 /* Done...restore registers and get out of here.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 024805e1747d..25e84c0e1166 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1517,10 +1517,6 @@ _INIT_STATIC(start_here_multiplatform)
1517 addi r2,r2,0x4000 1517 addi r2,r2,0x4000
1518 add r2,r2,r26 1518 add r2,r2,r26
1519 1519
1520 /* Set initial ptr to current */
1521 LOAD_REG_IMMEDIATE(r4, init_task)
1522 std r4,PACACURRENT(r13)
1523
1524 /* Do very early kernel initializations, including initial hash table, 1520 /* Do very early kernel initializations, including initial hash table,
1525 * stab and slb setup before we turn on relocation. */ 1521 * stab and slb setup before we turn on relocation. */
1526 1522
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index 289af348978d..4d5731b2429a 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -108,9 +108,6 @@ static void __devinit pci_process_ISA_OF_ranges(struct device_node *isa_node,
108 if (size > 0x10000) 108 if (size > 0x10000)
109 size = 0x10000; 109 size = 0x10000;
110 110
111 printk(KERN_ERR "no ISA IO ranges or unexpected isa range, "
112 "mapping 64k\n");
113
114 __ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE, 111 __ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
115 size, _PAGE_NO_CACHE|_PAGE_GUARDED); 112 size, _PAGE_NO_CACHE|_PAGE_GUARDED);
116 return; 113 return;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 25e3fd8606ab..098fd96a394a 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -170,6 +170,8 @@ void __init setup_paca(int cpu)
170 170
171void __init early_setup(unsigned long dt_ptr) 171void __init early_setup(unsigned long dt_ptr)
172{ 172{
173 /* -------- printk is _NOT_ safe to use here ! ------- */
174
173 /* Fill in any unititialised pacas */ 175 /* Fill in any unititialised pacas */
174 initialise_pacas(); 176 initialise_pacas();
175 177
@@ -179,12 +181,14 @@ void __init early_setup(unsigned long dt_ptr)
179 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 181 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
180 setup_paca(0); 182 setup_paca(0);
181 183
182 /* Enable early debugging if any specified (see udbg.h) */
183 udbg_early_init();
184
185 /* Initialize lockdep early or else spinlocks will blow */ 184 /* Initialize lockdep early or else spinlocks will blow */
186 lockdep_init(); 185 lockdep_init();
187 186
187 /* -------- printk is now safe to use ------- */
188
189 /* Enable early debugging if any specified (see udbg.h) */
190 udbg_early_init();
191
188 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 192 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
189 193
190 /* 194 /*
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 4bb023f4c869..c71d37dc6a88 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -10,6 +10,7 @@ ifeq ($(CONFIG_PPC_MERGE),y)
10obj-y := string.o alloc.o \ 10obj-y := string.o alloc.o \
11 checksum_$(CONFIG_WORD_SIZE).o 11 checksum_$(CONFIG_WORD_SIZE).o
12obj-$(CONFIG_PPC32) += div64.o copy_32.o 12obj-$(CONFIG_PPC32) += div64.o copy_32.o
13obj-$(CONFIG_HAS_IOMEM) += devres.o
13endif 14endif
14 15
15obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \ 16obj-$(CONFIG_PPC64) += copypage_64.o copyuser_64.o \
diff --git a/arch/powerpc/lib/devres.c b/arch/powerpc/lib/devres.c
new file mode 100644
index 000000000000..292115d98ea9
--- /dev/null
+++ b/arch/powerpc/lib/devres.c
@@ -0,0 +1,42 @@
1/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#include <linux/device.h> /* devres_*(), devm_ioremap_release() */
11#include <linux/io.h> /* ioremap_flags() */
12#include <linux/module.h> /* EXPORT_SYMBOL() */
13
14/**
15 * devm_ioremap_prot - Managed ioremap_flags()
16 * @dev: Generic device to remap IO address for
17 * @offset: BUS offset to map
18 * @size: Size of map
19 * @flags: Page flags
20 *
21 * Managed ioremap_prot(). Map is automatically unmapped on driver
22 * detach.
23 */
24void __iomem *devm_ioremap_prot(struct device *dev, resource_size_t offset,
25 size_t size, unsigned long flags)
26{
27 void __iomem **ptr, *addr;
28
29 ptr = devres_alloc(devm_ioremap_release, sizeof(*ptr), GFP_KERNEL);
30 if (!ptr)
31 return NULL;
32
33 addr = ioremap_flags(offset, size, flags);
34 if (addr) {
35 *ptr = addr;
36 devres_add(dev, ptr);
37 } else
38 devres_free(ptr);
39
40 return addr;
41}
42EXPORT_SYMBOL(devm_ioremap_prot);
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 04f74f9f9ab6..5bf7df146022 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -35,6 +35,7 @@
35#include <linux/percpu.h> 35#include <linux/percpu.h>
36#include <linux/types.h> 36#include <linux/types.h>
37#include <linux/ioport.h> 37#include <linux/ioport.h>
38#include <linux/kernel_stat.h>
38 39
39#include <asm/io.h> 40#include <asm/io.h>
40#include <asm/pgtable.h> 41#include <asm/pgtable.h>
@@ -231,6 +232,54 @@ static int iic_host_match(struct irq_host *h, struct device_node *node)
231 "IBM,CBEA-Internal-Interrupt-Controller"); 232 "IBM,CBEA-Internal-Interrupt-Controller");
232} 233}
233 234
235extern int noirqdebug;
236
237static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
238{
239 const unsigned int cpu = smp_processor_id();
240
241 spin_lock(&desc->lock);
242
243 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
244
245 /*
246 * If we're currently running this IRQ, or its disabled,
247 * we shouldn't process the IRQ. Mark it pending, handle
248 * the necessary masking and go out
249 */
250 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
251 !desc->action)) {
252 desc->status |= IRQ_PENDING;
253 goto out_eoi;
254 }
255
256 kstat_cpu(cpu).irqs[irq]++;
257
258 /* Mark the IRQ currently in progress.*/
259 desc->status |= IRQ_INPROGRESS;
260
261 do {
262 struct irqaction *action = desc->action;
263 irqreturn_t action_ret;
264
265 if (unlikely(!action))
266 goto out_eoi;
267
268 desc->status &= ~IRQ_PENDING;
269 spin_unlock(&desc->lock);
270 action_ret = handle_IRQ_event(irq, action);
271 if (!noirqdebug)
272 note_interrupt(irq, desc, action_ret);
273 spin_lock(&desc->lock);
274
275 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
276
277 desc->status &= ~IRQ_INPROGRESS;
278out_eoi:
279 desc->chip->eoi(irq);
280 spin_unlock(&desc->lock);
281}
282
234static int iic_host_map(struct irq_host *h, unsigned int virq, 283static int iic_host_map(struct irq_host *h, unsigned int virq,
235 irq_hw_number_t hw) 284 irq_hw_number_t hw)
236{ 285{
@@ -240,10 +289,10 @@ static int iic_host_map(struct irq_host *h, unsigned int virq,
240 break; 289 break;
241 case IIC_IRQ_TYPE_IOEXC: 290 case IIC_IRQ_TYPE_IOEXC:
242 set_irq_chip_and_handler(virq, &iic_ioexc_chip, 291 set_irq_chip_and_handler(virq, &iic_ioexc_chip,
243 handle_fasteoi_irq); 292 handle_iic_irq);
244 break; 293 break;
245 default: 294 default:
246 set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq); 295 set_irq_chip_and_handler(virq, &iic_chip, handle_iic_irq);
247 } 296 }
248 return 0; 297 return 0;
249} 298}
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 6bab44b7716b..70c660121ec4 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -141,6 +141,10 @@ static void spu_restart_dma(struct spu *spu)
141 141
142 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags)) 142 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
143 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); 143 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
144 else {
145 set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
146 mb();
147 }
144} 148}
145 149
146static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb) 150static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
@@ -226,11 +230,13 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
226 return 0; 230 return 0;
227 } 231 }
228 232
229 spu->class_0_pending = 0; 233 spu->class_1_dar = ea;
230 spu->dar = ea; 234 spu->class_1_dsisr = dsisr;
231 spu->dsisr = dsisr; 235
236 spu->stop_callback(spu, 1);
232 237
233 spu->stop_callback(spu); 238 spu->class_1_dar = 0;
239 spu->class_1_dsisr = 0;
234 240
235 return 0; 241 return 0;
236} 242}
@@ -318,11 +324,15 @@ spu_irq_class_0(int irq, void *data)
318 stat = spu_int_stat_get(spu, 0) & mask; 324 stat = spu_int_stat_get(spu, 0) & mask;
319 325
320 spu->class_0_pending |= stat; 326 spu->class_0_pending |= stat;
321 spu->dsisr = spu_mfc_dsisr_get(spu); 327 spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
322 spu->dar = spu_mfc_dar_get(spu); 328 spu->class_0_dar = spu_mfc_dar_get(spu);
323 spin_unlock(&spu->register_lock); 329 spin_unlock(&spu->register_lock);
324 330
325 spu->stop_callback(spu); 331 spu->stop_callback(spu, 0);
332
333 spu->class_0_pending = 0;
334 spu->class_0_dsisr = 0;
335 spu->class_0_dar = 0;
326 336
327 spu_int_stat_clear(spu, 0, stat); 337 spu_int_stat_clear(spu, 0, stat);
328 338
@@ -363,6 +373,9 @@ spu_irq_class_1(int irq, void *data)
363 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR) 373 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
364 ; 374 ;
365 375
376 spu->class_1_dsisr = 0;
377 spu->class_1_dar = 0;
378
366 return stat ? IRQ_HANDLED : IRQ_NONE; 379 return stat ? IRQ_HANDLED : IRQ_NONE;
367} 380}
368 381
@@ -396,10 +409,10 @@ spu_irq_class_2(int irq, void *data)
396 spu->ibox_callback(spu); 409 spu->ibox_callback(spu);
397 410
398 if (stat & CLASS2_SPU_STOP_INTR) 411 if (stat & CLASS2_SPU_STOP_INTR)
399 spu->stop_callback(spu); 412 spu->stop_callback(spu, 2);
400 413
401 if (stat & CLASS2_SPU_HALT_INTR) 414 if (stat & CLASS2_SPU_HALT_INTR)
402 spu->stop_callback(spu); 415 spu->stop_callback(spu, 2);
403 416
404 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR) 417 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
405 spu->mfc_callback(spu); 418 spu->mfc_callback(spu);
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
index 67fa7247b80a..906a0a2a9fe1 100644
--- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -28,6 +28,7 @@
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/mutex.h> 29#include <linux/mutex.h>
30#include <linux/device.h> 30#include <linux/device.h>
31#include <linux/sched.h>
31 32
32#include <asm/spu.h> 33#include <asm/spu.h>
33#include <asm/spu_priv1.h> 34#include <asm/spu_priv1.h>
@@ -75,8 +76,19 @@ static u64 int_stat_get(struct spu *spu, int class)
75 76
76static void cpu_affinity_set(struct spu *spu, int cpu) 77static void cpu_affinity_set(struct spu *spu, int cpu)
77{ 78{
78 u64 target = iic_get_target_id(cpu); 79 u64 target;
79 u64 route = target << 48 | target << 32 | target << 16; 80 u64 route;
81
82 if (nr_cpus_node(spu->node)) {
83 cpumask_t spumask = node_to_cpumask(spu->node);
84 cpumask_t cpumask = node_to_cpumask(cpu_to_node(cpu));
85
86 if (!cpus_intersects(spumask, cpumask))
87 return;
88 }
89
90 target = iic_get_target_id(cpu);
91 route = target << 48 | target << 32 | target << 16;
80 out_be64(&spu->priv1->int_route_RW, route); 92 out_be64(&spu->priv1->int_route_RW, route);
81} 93}
82 94
diff --git a/arch/powerpc/platforms/cell/spufs/fault.c b/arch/powerpc/platforms/cell/spufs/fault.c
index e46d300e21a5..f093a581ac74 100644
--- a/arch/powerpc/platforms/cell/spufs/fault.c
+++ b/arch/powerpc/platforms/cell/spufs/fault.c
@@ -83,13 +83,18 @@ int spufs_handle_class0(struct spu_context *ctx)
83 return 0; 83 return 0;
84 84
85 if (stat & CLASS0_DMA_ALIGNMENT_INTR) 85 if (stat & CLASS0_DMA_ALIGNMENT_INTR)
86 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_DMA_ALIGNMENT); 86 spufs_handle_event(ctx, ctx->csa.class_0_dar,
87 SPE_EVENT_DMA_ALIGNMENT);
87 88
88 if (stat & CLASS0_INVALID_DMA_COMMAND_INTR) 89 if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
89 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_INVALID_DMA); 90 spufs_handle_event(ctx, ctx->csa.class_0_dar,
91 SPE_EVENT_INVALID_DMA);
90 92
91 if (stat & CLASS0_SPU_ERROR_INTR) 93 if (stat & CLASS0_SPU_ERROR_INTR)
92 spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_SPE_ERROR); 94 spufs_handle_event(ctx, ctx->csa.class_0_dar,
95 SPE_EVENT_SPE_ERROR);
96
97 ctx->csa.class_0_pending = 0;
93 98
94 return -EIO; 99 return -EIO;
95} 100}
@@ -119,8 +124,8 @@ int spufs_handle_class1(struct spu_context *ctx)
119 * in time, we can still expect to get the same fault 124 * in time, we can still expect to get the same fault
120 * the immediately after the context restore. 125 * the immediately after the context restore.
121 */ 126 */
122 ea = ctx->csa.dar; 127 ea = ctx->csa.class_1_dar;
123 dsisr = ctx->csa.dsisr; 128 dsisr = ctx->csa.class_1_dsisr;
124 129
125 if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))) 130 if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
126 return 0; 131 return 0;
@@ -158,7 +163,7 @@ int spufs_handle_class1(struct spu_context *ctx)
158 * time slicing will not preempt the context while the page fault 163 * time slicing will not preempt the context while the page fault
159 * handler is running. Context switch code removes mappings. 164 * handler is running. Context switch code removes mappings.
160 */ 165 */
161 ctx->csa.dar = ctx->csa.dsisr = 0; 166 ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
162 167
163 /* 168 /*
164 * If we handled the fault successfully and are in runnable 169 * If we handled the fault successfully and are in runnable
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 0c32a05ab068..f407b2471855 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -23,6 +23,7 @@
23 23
24#include <linux/file.h> 24#include <linux/file.h>
25#include <linux/fs.h> 25#include <linux/fs.h>
26#include <linux/fsnotify.h>
26#include <linux/backing-dev.h> 27#include <linux/backing-dev.h>
27#include <linux/init.h> 28#include <linux/init.h>
28#include <linux/ioctl.h> 29#include <linux/ioctl.h>
@@ -223,7 +224,7 @@ static int spufs_dir_close(struct inode *inode, struct file *file)
223 parent = dir->d_parent->d_inode; 224 parent = dir->d_parent->d_inode;
224 ctx = SPUFS_I(dir->d_inode)->i_ctx; 225 ctx = SPUFS_I(dir->d_inode)->i_ctx;
225 226
226 mutex_lock(&parent->i_mutex); 227 mutex_lock_nested(&parent->i_mutex, I_MUTEX_PARENT);
227 ret = spufs_rmdir(parent, dir); 228 ret = spufs_rmdir(parent, dir);
228 mutex_unlock(&parent->i_mutex); 229 mutex_unlock(&parent->i_mutex);
229 WARN_ON(ret); 230 WARN_ON(ret);
@@ -618,12 +619,15 @@ long spufs_create(struct nameidata *nd, unsigned int flags, mode_t mode,
618 mode &= ~current->fs->umask; 619 mode &= ~current->fs->umask;
619 620
620 if (flags & SPU_CREATE_GANG) 621 if (flags & SPU_CREATE_GANG)
621 return spufs_create_gang(nd->path.dentry->d_inode, 622 ret = spufs_create_gang(nd->path.dentry->d_inode,
622 dentry, nd->path.mnt, mode); 623 dentry, nd->path.mnt, mode);
623 else 624 else
624 return spufs_create_context(nd->path.dentry->d_inode, 625 ret = spufs_create_context(nd->path.dentry->d_inode,
625 dentry, nd->path.mnt, flags, mode, 626 dentry, nd->path.mnt, flags, mode,
626 filp); 627 filp);
628 if (ret >= 0)
629 fsnotify_mkdir(nd->path.dentry->d_inode, dentry);
630 return ret;
627 631
628out_dput: 632out_dput:
629 dput(dentry); 633 dput(dentry);
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index a9c35b7b719f..b7493b865812 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -11,7 +11,7 @@
11#include "spufs.h" 11#include "spufs.h"
12 12
13/* interrupt-level stop callback function. */ 13/* interrupt-level stop callback function. */
14void spufs_stop_callback(struct spu *spu) 14void spufs_stop_callback(struct spu *spu, int irq)
15{ 15{
16 struct spu_context *ctx = spu->ctx; 16 struct spu_context *ctx = spu->ctx;
17 17
@@ -24,9 +24,19 @@ void spufs_stop_callback(struct spu *spu)
24 */ 24 */
25 if (ctx) { 25 if (ctx) {
26 /* Copy exception arguments into module specific structure */ 26 /* Copy exception arguments into module specific structure */
27 ctx->csa.class_0_pending = spu->class_0_pending; 27 switch(irq) {
28 ctx->csa.dsisr = spu->dsisr; 28 case 0 :
29 ctx->csa.dar = spu->dar; 29 ctx->csa.class_0_pending = spu->class_0_pending;
30 ctx->csa.class_0_dsisr = spu->class_0_dsisr;
31 ctx->csa.class_0_dar = spu->class_0_dar;
32 break;
33 case 1 :
34 ctx->csa.class_1_dsisr = spu->class_1_dsisr;
35 ctx->csa.class_1_dar = spu->class_1_dar;
36 break;
37 case 2 :
38 break;
39 }
30 40
31 /* ensure that the exception status has hit memory before a 41 /* ensure that the exception status has hit memory before a
32 * thread waiting on the context's stop queue is woken */ 42 * thread waiting on the context's stop queue is woken */
@@ -34,11 +44,6 @@ void spufs_stop_callback(struct spu *spu)
34 44
35 wake_up_all(&ctx->stop_wq); 45 wake_up_all(&ctx->stop_wq);
36 } 46 }
37
38 /* Clear callback arguments from spu structure */
39 spu->class_0_pending = 0;
40 spu->dsisr = 0;
41 spu->dar = 0;
42} 47}
43 48
44int spu_stopped(struct spu_context *ctx, u32 *stat) 49int spu_stopped(struct spu_context *ctx, u32 *stat)
@@ -56,7 +61,11 @@ int spu_stopped(struct spu_context *ctx, u32 *stat)
56 if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped)) 61 if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped))
57 return 1; 62 return 1;
58 63
59 dsisr = ctx->csa.dsisr; 64 dsisr = ctx->csa.class_0_dsisr;
65 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
66 return 1;
67
68 dsisr = ctx->csa.class_1_dsisr;
60 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) 69 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
61 return 1; 70 return 1;
62 71
@@ -294,7 +303,7 @@ static int spu_process_callback(struct spu_context *ctx)
294 u32 ls_pointer, npc; 303 u32 ls_pointer, npc;
295 void __iomem *ls; 304 void __iomem *ls;
296 long spu_ret; 305 long spu_ret;
297 int ret, ret2; 306 int ret;
298 307
299 /* get syscall block from local store */ 308 /* get syscall block from local store */
300 npc = ctx->ops->npc_read(ctx) & ~3; 309 npc = ctx->ops->npc_read(ctx) & ~3;
@@ -316,11 +325,9 @@ static int spu_process_callback(struct spu_context *ctx)
316 if (spu_ret <= -ERESTARTSYS) { 325 if (spu_ret <= -ERESTARTSYS) {
317 ret = spu_handle_restartsys(ctx, &spu_ret, &npc); 326 ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
318 } 327 }
319 ret2 = spu_acquire(ctx); 328 mutex_lock(&ctx->state_mutex);
320 if (ret == -ERESTARTSYS) 329 if (ret == -ERESTARTSYS)
321 return ret; 330 return ret;
322 if (ret2)
323 return -EINTR;
324 } 331 }
325 332
326 /* need to re-get the ls, as it may have changed when we released the 333 /* need to re-get the ls, as it may have changed when we released the
@@ -343,13 +350,14 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
343 if (mutex_lock_interruptible(&ctx->run_mutex)) 350 if (mutex_lock_interruptible(&ctx->run_mutex))
344 return -ERESTARTSYS; 351 return -ERESTARTSYS;
345 352
346 spu_enable_spu(ctx);
347 ctx->event_return = 0; 353 ctx->event_return = 0;
348 354
349 ret = spu_acquire(ctx); 355 ret = spu_acquire(ctx);
350 if (ret) 356 if (ret)
351 goto out_unlock; 357 goto out_unlock;
352 358
359 spu_enable_spu(ctx);
360
353 spu_update_sched_info(ctx); 361 spu_update_sched_info(ctx);
354 362
355 ret = spu_run_init(ctx, npc); 363 ret = spu_run_init(ctx, npc);
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 7298e7db2c83..2e411f23462b 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -140,6 +140,9 @@ void __spu_update_sched_info(struct spu_context *ctx)
140 * if it is timesliced or preempted. 140 * if it is timesliced or preempted.
141 */ 141 */
142 ctx->cpus_allowed = current->cpus_allowed; 142 ctx->cpus_allowed = current->cpus_allowed;
143
144 /* Save the current cpu id for spu interrupt routing. */
145 ctx->last_ran = raw_smp_processor_id();
143} 146}
144 147
145void spu_update_sched_info(struct spu_context *ctx) 148void spu_update_sched_info(struct spu_context *ctx)
@@ -243,7 +246,6 @@ static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
243 spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0); 246 spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0);
244 spu_restore(&ctx->csa, spu); 247 spu_restore(&ctx->csa, spu);
245 spu->timestamp = jiffies; 248 spu->timestamp = jiffies;
246 spu_cpu_affinity_set(spu, raw_smp_processor_id());
247 spu_switch_notify(spu, ctx); 249 spu_switch_notify(spu, ctx);
248 ctx->state = SPU_STATE_RUNNABLE; 250 ctx->state = SPU_STATE_RUNNABLE;
249 251
@@ -657,7 +659,8 @@ static struct spu *find_victim(struct spu_context *ctx)
657 659
658 victim->stats.invol_ctx_switch++; 660 victim->stats.invol_ctx_switch++;
659 spu->stats.invol_ctx_switch++; 661 spu->stats.invol_ctx_switch++;
660 spu_add_to_rq(victim); 662 if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
663 spu_add_to_rq(victim);
661 664
662 mutex_unlock(&victim->state_mutex); 665 mutex_unlock(&victim->state_mutex);
663 666
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 7312745b7540..454c277c1457 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -121,6 +121,7 @@ struct spu_context {
121 cpumask_t cpus_allowed; 121 cpumask_t cpus_allowed;
122 int policy; 122 int policy;
123 int prio; 123 int prio;
124 int last_ran;
124 125
125 /* statistics */ 126 /* statistics */
126 struct { 127 struct {
@@ -331,7 +332,7 @@ size_t spu_ibox_read(struct spu_context *ctx, u32 *data);
331/* irq callback funcs. */ 332/* irq callback funcs. */
332void spufs_ibox_callback(struct spu *spu); 333void spufs_ibox_callback(struct spu *spu);
333void spufs_wbox_callback(struct spu *spu); 334void spufs_wbox_callback(struct spu *spu);
334void spufs_stop_callback(struct spu *spu); 335void spufs_stop_callback(struct spu *spu, int irq);
335void spufs_mfc_callback(struct spu *spu); 336void spufs_mfc_callback(struct spu *spu);
336void spufs_dma_callback(struct spu *spu, int type); 337void spufs_dma_callback(struct spu *spu, int type);
337 338
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index d2a1249d36dd..3df9a36eb2f5 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -132,6 +132,14 @@ static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
132 spu_int_mask_set(spu, 2, 0ul); 132 spu_int_mask_set(spu, 2, 0ul);
133 eieio(); 133 eieio();
134 spin_unlock_irq(&spu->register_lock); 134 spin_unlock_irq(&spu->register_lock);
135
136 /*
137 * This flag needs to be set before calling synchronize_irq so
138 * that the update will be visible to the relevant handlers
139 * via a simple load.
140 */
141 set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
142 clear_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
135 synchronize_irq(spu->irqs[0]); 143 synchronize_irq(spu->irqs[0]);
136 synchronize_irq(spu->irqs[1]); 144 synchronize_irq(spu->irqs[1]);
137 synchronize_irq(spu->irqs[2]); 145 synchronize_irq(spu->irqs[2]);
@@ -166,9 +174,8 @@ static inline void set_switch_pending(struct spu_state *csa, struct spu *spu)
166 /* Save, Step 7: 174 /* Save, Step 7:
167 * Restore, Step 5: 175 * Restore, Step 5:
168 * Set a software context switch pending flag. 176 * Set a software context switch pending flag.
177 * Done above in Step 3 - disable_interrupts().
169 */ 178 */
170 set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
171 mb();
172} 179}
173 180
174static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu) 181static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
@@ -186,20 +193,21 @@ static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
186 MFC_CNTL_SUSPEND_COMPLETE); 193 MFC_CNTL_SUSPEND_COMPLETE);
187 /* fall through */ 194 /* fall through */
188 case MFC_CNTL_SUSPEND_COMPLETE: 195 case MFC_CNTL_SUSPEND_COMPLETE:
189 if (csa) { 196 if (csa)
190 csa->priv2.mfc_control_RW = 197 csa->priv2.mfc_control_RW =
191 MFC_CNTL_SUSPEND_MASK | 198 in_be64(&priv2->mfc_control_RW) |
192 MFC_CNTL_SUSPEND_DMA_QUEUE; 199 MFC_CNTL_SUSPEND_DMA_QUEUE;
193 }
194 break; 200 break;
195 case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION: 201 case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION:
196 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE); 202 out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE);
197 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & 203 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
198 MFC_CNTL_SUSPEND_DMA_STATUS_MASK) == 204 MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
199 MFC_CNTL_SUSPEND_COMPLETE); 205 MFC_CNTL_SUSPEND_COMPLETE);
200 if (csa) { 206 if (csa)
201 csa->priv2.mfc_control_RW = 0; 207 csa->priv2.mfc_control_RW =
202 } 208 in_be64(&priv2->mfc_control_RW) &
209 ~MFC_CNTL_SUSPEND_DMA_QUEUE &
210 ~MFC_CNTL_SUSPEND_MASK;
203 break; 211 break;
204 } 212 }
205} 213}
@@ -249,16 +257,21 @@ static inline void save_spu_status(struct spu_state *csa, struct spu *spu)
249 } 257 }
250} 258}
251 259
252static inline void save_mfc_decr(struct spu_state *csa, struct spu *spu) 260static inline void save_mfc_stopped_status(struct spu_state *csa,
261 struct spu *spu)
253{ 262{
254 struct spu_priv2 __iomem *priv2 = spu->priv2; 263 struct spu_priv2 __iomem *priv2 = spu->priv2;
264 const u64 mask = MFC_CNTL_DECREMENTER_RUNNING |
265 MFC_CNTL_DMA_QUEUES_EMPTY;
255 266
256 /* Save, Step 12: 267 /* Save, Step 12:
257 * Read MFC_CNTL[Ds]. Update saved copy of 268 * Read MFC_CNTL[Ds]. Update saved copy of
258 * CSA.MFC_CNTL[Ds]. 269 * CSA.MFC_CNTL[Ds].
270 *
271 * update: do the same with MFC_CNTL[Q].
259 */ 272 */
260 csa->priv2.mfc_control_RW |= 273 csa->priv2.mfc_control_RW &= ~mask;
261 in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING; 274 csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask;
262} 275}
263 276
264static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu) 277static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)
@@ -462,7 +475,9 @@ static inline void purge_mfc_queue(struct spu_state *csa, struct spu *spu)
462 * Restore, Step 14. 475 * Restore, Step 14.
463 * Write MFC_CNTL[Pc]=1 (purge queue). 476 * Write MFC_CNTL[Pc]=1 (purge queue).
464 */ 477 */
465 out_be64(&priv2->mfc_control_RW, MFC_CNTL_PURGE_DMA_REQUEST); 478 out_be64(&priv2->mfc_control_RW,
479 MFC_CNTL_PURGE_DMA_REQUEST |
480 MFC_CNTL_SUSPEND_MASK);
466 eieio(); 481 eieio();
467} 482}
468 483
@@ -725,10 +740,14 @@ static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
725 /* Save, Step 48: 740 /* Save, Step 48:
726 * Restore, Step 23. 741 * Restore, Step 23.
727 * Change the software context switch pending flag 742 * Change the software context switch pending flag
728 * to context switch active. 743 * to context switch active. This implementation does
744 * not uses a switch active flag.
729 * 745 *
730 * This implementation does not uses a switch active flag. 746 * Now that we have saved the mfc in the csa, we can add in the
747 * restart command if an exception occurred.
731 */ 748 */
749 if (test_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags))
750 csa->priv2.mfc_control_RW |= MFC_CNTL_RESTART_DMA_COMMAND;
732 clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags); 751 clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
733 mb(); 752 mb();
734} 753}
@@ -1690,6 +1709,13 @@ static inline void restore_mfc_sr1(struct spu_state *csa, struct spu *spu)
1690 eieio(); 1709 eieio();
1691} 1710}
1692 1711
1712static inline void set_int_route(struct spu_state *csa, struct spu *spu)
1713{
1714 struct spu_context *ctx = spu->ctx;
1715
1716 spu_cpu_affinity_set(spu, ctx->last_ran);
1717}
1718
1693static inline void restore_other_spu_access(struct spu_state *csa, 1719static inline void restore_other_spu_access(struct spu_state *csa,
1694 struct spu *spu) 1720 struct spu *spu)
1695{ 1721{
@@ -1721,15 +1747,15 @@ static inline void restore_mfc_cntl(struct spu_state *csa, struct spu *spu)
1721 */ 1747 */
1722 out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW); 1748 out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW);
1723 eieio(); 1749 eieio();
1750
1724 /* 1751 /*
1725 * FIXME: this is to restart a DMA that we were processing 1752 * The queue is put back into the same state that was evident prior to
1726 * before the save. better remember the fault information 1753 * the context switch. The suspend flag is added to the saved state in
1727 * in the csa instead. 1754 * the csa, if the operational state was suspending or suspended. In
1755 * this case, the code that suspended the mfc is responsible for
1756 * continuing it. Note that SPE faults do not change the operational
1757 * state of the spu.
1728 */ 1758 */
1729 if ((csa->priv2.mfc_control_RW & MFC_CNTL_SUSPEND_DMA_QUEUE_MASK)) {
1730 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
1731 eieio();
1732 }
1733} 1759}
1734 1760
1735static inline void enable_user_access(struct spu_state *csa, struct spu *spu) 1761static inline void enable_user_access(struct spu_state *csa, struct spu *spu)
@@ -1788,7 +1814,7 @@ static int quiece_spu(struct spu_state *prev, struct spu *spu)
1788 save_spu_runcntl(prev, spu); /* Step 9. */ 1814 save_spu_runcntl(prev, spu); /* Step 9. */
1789 save_mfc_sr1(prev, spu); /* Step 10. */ 1815 save_mfc_sr1(prev, spu); /* Step 10. */
1790 save_spu_status(prev, spu); /* Step 11. */ 1816 save_spu_status(prev, spu); /* Step 11. */
1791 save_mfc_decr(prev, spu); /* Step 12. */ 1817 save_mfc_stopped_status(prev, spu); /* Step 12. */
1792 halt_mfc_decr(prev, spu); /* Step 13. */ 1818 halt_mfc_decr(prev, spu); /* Step 13. */
1793 save_timebase(prev, spu); /* Step 14. */ 1819 save_timebase(prev, spu); /* Step 14. */
1794 remove_other_spu_access(prev, spu); /* Step 15. */ 1820 remove_other_spu_access(prev, spu); /* Step 15. */
@@ -2000,6 +2026,7 @@ static void restore_csa(struct spu_state *next, struct spu *spu)
2000 check_ppuint_mb_stat(next, spu); /* Step 67. */ 2026 check_ppuint_mb_stat(next, spu); /* Step 67. */
2001 spu_invalidate_slbs(spu); /* Modified Step 68. */ 2027 spu_invalidate_slbs(spu); /* Modified Step 68. */
2002 restore_mfc_sr1(next, spu); /* Step 69. */ 2028 restore_mfc_sr1(next, spu); /* Step 69. */
2029 set_int_route(next, spu); /* NEW */
2003 restore_other_spu_access(next, spu); /* Step 70. */ 2030 restore_other_spu_access(next, spu); /* Step 70. */
2004 restore_spu_runcntl(next, spu); /* Step 71. */ 2031 restore_spu_runcntl(next, spu); /* Step 71. */
2005 restore_mfc_cntl(next, spu); /* Step 72. */ 2032 restore_mfc_cntl(next, spu); /* Step 72. */
diff --git a/arch/powerpc/platforms/chrp/pegasos_eth.c b/arch/powerpc/platforms/chrp/pegasos_eth.c
index 5bcc58d9a4dd..130ff72d99dd 100644
--- a/arch/powerpc/platforms/chrp/pegasos_eth.c
+++ b/arch/powerpc/platforms/chrp/pegasos_eth.c
@@ -58,7 +58,9 @@ static struct resource mv643xx_eth0_resources[] = {
58 58
59 59
60static struct mv643xx_eth_platform_data eth0_pd = { 60static struct mv643xx_eth_platform_data eth0_pd = {
61 .shared = &mv643xx_eth_shared_device,
61 .port_number = 0, 62 .port_number = 0,
63
62 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0, 64 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
63 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE, 65 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
64 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16, 66 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
@@ -88,7 +90,9 @@ static struct resource mv643xx_eth1_resources[] = {
88}; 90};
89 91
90static struct mv643xx_eth_platform_data eth1_pd = { 92static struct mv643xx_eth_platform_data eth1_pd = {
93 .shared = &mv643xx_eth_shared_device,
91 .port_number = 1, 94 .port_number = 1,
95
92 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1, 96 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
93 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE, 97 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
94 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16, 98 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
diff --git a/arch/powerpc/platforms/pseries/scanlog.c b/arch/powerpc/platforms/pseries/scanlog.c
index bec3803f0618..417eca79df69 100644
--- a/arch/powerpc/platforms/pseries/scanlog.c
+++ b/arch/powerpc/platforms/pseries/scanlog.c
@@ -55,11 +55,6 @@ static ssize_t scanlog_read(struct file *file, char __user *buf,
55 dp = PDE(inode); 55 dp = PDE(inode);
56 data = (unsigned int *)dp->data; 56 data = (unsigned int *)dp->data;
57 57
58 if (!data) {
59 printk(KERN_ERR "scanlog: read failed no data\n");
60 return -EIO;
61 }
62
63 if (count > RTAS_DATA_BUF_SIZE) 58 if (count > RTAS_DATA_BUF_SIZE)
64 count = RTAS_DATA_BUF_SIZE; 59 count = RTAS_DATA_BUF_SIZE;
65 60
@@ -146,11 +141,6 @@ static int scanlog_open(struct inode * inode, struct file * file)
146 struct proc_dir_entry *dp = PDE(inode); 141 struct proc_dir_entry *dp = PDE(inode);
147 unsigned int *data = (unsigned int *)dp->data; 142 unsigned int *data = (unsigned int *)dp->data;
148 143
149 if (!data) {
150 printk(KERN_ERR "scanlog: open failed no data\n");
151 return -EIO;
152 }
153
154 if (data[0] != 0) { 144 if (data[0] != 0) {
155 /* This imperfect test stops a second copy of the 145 /* This imperfect test stops a second copy of the
156 * data (or a reset while data is being copied) 146 * data (or a reset while data is being copied)
@@ -168,10 +158,6 @@ static int scanlog_release(struct inode * inode, struct file * file)
168 struct proc_dir_entry *dp = PDE(inode); 158 struct proc_dir_entry *dp = PDE(inode);
169 unsigned int *data = (unsigned int *)dp->data; 159 unsigned int *data = (unsigned int *)dp->data;
170 160
171 if (!data) {
172 printk(KERN_ERR "scanlog: release failed no data\n");
173 return -EIO;
174 }
175 data[0] = 0; 161 data[0] = 0;
176 162
177 return 0; 163 return 0;
@@ -200,12 +186,11 @@ static int __init scanlog_init(void)
200 if (!data) 186 if (!data)
201 goto err; 187 goto err;
202 188
203 ent = proc_create("ppc64/rtas/scan-log-dump", S_IRUSR, NULL, 189 ent = proc_create_data("ppc64/rtas/scan-log-dump", S_IRUSR, NULL,
204 &scanlog_fops); 190 &scanlog_fops, data);
205 if (!ent) 191 if (!ent)
206 goto err; 192 goto err;
207 193
208 ent->data = data;
209 proc_ppc64_scan_log_dump = ent; 194 proc_ppc64_scan_log_dump = ent;
210 195
211 return 0; 196 return 0;
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index 41af1223e2a0..a132e0de8ca5 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -239,6 +239,8 @@ static int __init mv64x60_eth_device_setup(struct device_node *np, int id,
239 239
240 memset(&pdata, 0, sizeof(pdata)); 240 memset(&pdata, 0, sizeof(pdata));
241 241
242 pdata.shared = shared_pdev;
243
242 prop = of_get_property(np, "reg", NULL); 244 prop = of_get_property(np, "reg", NULL);
243 if (!prop) 245 if (!prop)
244 return -ENODEV; 246 return -ENODEV;
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 1814adbd2236..b4a54c52e880 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1387,28 +1387,59 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
1387 resource_size_t size = res->end - res->start + 1; 1387 resource_size_t size = res->end - res->start + 1;
1388 u64 sa; 1388 u64 sa;
1389 1389
1390 /* Calculate window size */ 1390 if (port->endpoint) {
1391 sa = (0xffffffffffffffffull << ilog2(size));; 1391 resource_size_t ep_addr = 0;
1392 if (res->flags & IORESOURCE_PREFETCH) 1392 resource_size_t ep_size = 32 << 20;
1393 sa |= 0x8; 1393
1394 /* Currently we map a fixed 64MByte window to PLB address
1395 * 0 (SDRAM). This should probably be configurable via a dts
1396 * property.
1397 */
1398
1399 /* Calculate window size */
1400 sa = (0xffffffffffffffffull << ilog2(ep_size));;
1401
1402 /* Setup BAR0 */
1403 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1404 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |
1405 PCI_BASE_ADDRESS_MEM_TYPE_64);
1394 1406
1395 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa)); 1407 /* Disable BAR1 & BAR2 */
1396 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa)); 1408 out_le32(mbase + PECFG_BAR1MPA, 0);
1409 out_le32(mbase + PECFG_BAR2HMPA, 0);
1410 out_le32(mbase + PECFG_BAR2LMPA, 0);
1397 1411
1398 /* The setup of the split looks weird to me ... let's see if it works */ 1412 out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));
1399 out_le32(mbase + PECFG_PIM0LAL, 0x00000000); 1413 out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));
1400 out_le32(mbase + PECFG_PIM0LAH, 0x00000000); 1414
1401 out_le32(mbase + PECFG_PIM1LAL, 0x00000000); 1415 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));
1402 out_le32(mbase + PECFG_PIM1LAH, 0x00000000); 1416 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
1403 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); 1417 } else {
1404 out_le32(mbase + PECFG_PIM01SAL, 0x00000000); 1418 /* Calculate window size */
1419 sa = (0xffffffffffffffffull << ilog2(size));;
1420 if (res->flags & IORESOURCE_PREFETCH)
1421 sa |= 0x8;
1422
1423 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1424 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
1425
1426 /* The setup of the split looks weird to me ... let's see
1427 * if it works
1428 */
1429 out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
1430 out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
1431 out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
1432 out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
1433 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
1434 out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
1435
1436 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1437 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1438 }
1405 1439
1406 /* Enable inbound mapping */ 1440 /* Enable inbound mapping */
1407 out_le32(mbase + PECFG_PIMEN, 0x1); 1441 out_le32(mbase + PECFG_PIMEN, 0x1);
1408 1442
1409 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1410 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1411
1412 /* Enable I/O, Mem, and Busmaster cycles */ 1443 /* Enable I/O, Mem, and Busmaster cycles */
1413 out_le16(mbase + PCI_COMMAND, 1444 out_le16(mbase + PCI_COMMAND,
1414 in_le16(mbase + PCI_COMMAND) | 1445 in_le16(mbase + PCI_COMMAND) |
@@ -1422,13 +1453,8 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1422 const int *bus_range; 1453 const int *bus_range;
1423 int primary = 0, busses; 1454 int primary = 0, busses;
1424 void __iomem *mbase = NULL, *cfg_data = NULL; 1455 void __iomem *mbase = NULL, *cfg_data = NULL;
1425 1456 const u32 *pval;
1426 /* XXX FIXME: Handle endpoint mode properly */ 1457 u32 val;
1427 if (port->endpoint) {
1428 printk(KERN_WARNING "PCIE%d: Port in endpoint mode !\n",
1429 port->index);
1430 return;
1431 }
1432 1458
1433 /* Check if primary bridge */ 1459 /* Check if primary bridge */
1434 if (of_get_property(port->node, "primary", NULL)) 1460 if (of_get_property(port->node, "primary", NULL))
@@ -1462,21 +1488,30 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1462 hose->last_busno = hose->first_busno + busses; 1488 hose->last_busno = hose->first_busno + busses;
1463 } 1489 }
1464 1490
1465 /* We map the external config space in cfg_data and the host config 1491 if (!port->endpoint) {
1466 * space in cfg_addr. External space is 1M per bus, internal space 1492 /* Only map the external config space in cfg_data for
1467 * is 4K 1493 * PCIe root-complexes. External space is 1M per bus
1494 */
1495 cfg_data = ioremap(port->cfg_space.start +
1496 (hose->first_busno + 1) * 0x100000,
1497 busses * 0x100000);
1498 if (cfg_data == NULL) {
1499 printk(KERN_ERR "%s: Can't map external config space !",
1500 port->node->full_name);
1501 goto fail;
1502 }
1503 hose->cfg_data = cfg_data;
1504 }
1505
1506 /* Always map the host config space in cfg_addr.
1507 * Internal space is 4K
1468 */ 1508 */
1469 cfg_data = ioremap(port->cfg_space.start +
1470 (hose->first_busno + 1) * 0x100000,
1471 busses * 0x100000);
1472 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000); 1509 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1473 if (cfg_data == NULL || mbase == NULL) { 1510 if (mbase == NULL) {
1474 printk(KERN_ERR "%s: Can't map config space !", 1511 printk(KERN_ERR "%s: Can't map internal config space !",
1475 port->node->full_name); 1512 port->node->full_name);
1476 goto fail; 1513 goto fail;
1477 } 1514 }
1478
1479 hose->cfg_data = cfg_data;
1480 hose->cfg_addr = mbase; 1515 hose->cfg_addr = mbase;
1481 1516
1482 pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name, 1517 pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name,
@@ -1489,12 +1524,14 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1489 port->hose = hose; 1524 port->hose = hose;
1490 mbase = (void __iomem *)hose->cfg_addr; 1525 mbase = (void __iomem *)hose->cfg_addr;
1491 1526
1492 /* 1527 if (!port->endpoint) {
1493 * Set bus numbers on our root port 1528 /*
1494 */ 1529 * Set bus numbers on our root port
1495 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno); 1530 */
1496 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1); 1531 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
1497 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno); 1532 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
1533 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
1534 }
1498 1535
1499 /* 1536 /*
1500 * OMRs are already reset, also disable PIMs 1537 * OMRs are already reset, also disable PIMs
@@ -1515,17 +1552,49 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
1515 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window); 1552 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
1516 1553
1517 /* The root complex doesn't show up if we don't set some vendor 1554 /* The root complex doesn't show up if we don't set some vendor
1518 * and device IDs into it. Those are the same bogus one that the 1555 * and device IDs into it. The defaults below are the same bogus
1519 * initial code in arch/ppc add. We might want to change that. 1556 * one that the initial code in arch/ppc had. This can be
1557 * overwritten by setting the "vendor-id/device-id" properties
1558 * in the pciex node.
1520 */ 1559 */
1521 out_le16(mbase + 0x200, 0xaaa0 + port->index);
1522 out_le16(mbase + 0x202, 0xbed0 + port->index);
1523 1560
1524 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */ 1561 /* Get the (optional) vendor-/device-id from the device-tree */
1525 out_le32(mbase + 0x208, 0x06040001); 1562 pval = of_get_property(port->node, "vendor-id", NULL);
1563 if (pval) {
1564 val = *pval;
1565 } else {
1566 if (!port->endpoint)
1567 val = 0xaaa0 + port->index;
1568 else
1569 val = 0xeee0 + port->index;
1570 }
1571 out_le16(mbase + 0x200, val);
1572
1573 pval = of_get_property(port->node, "device-id", NULL);
1574 if (pval) {
1575 val = *pval;
1576 } else {
1577 if (!port->endpoint)
1578 val = 0xbed0 + port->index;
1579 else
1580 val = 0xfed0 + port->index;
1581 }
1582 out_le16(mbase + 0x202, val);
1583
1584 if (!port->endpoint) {
1585 /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
1586 out_le32(mbase + 0x208, 0x06040001);
1587
1588 printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
1589 port->index);
1590 } else {
1591 /* Set Class Code to Processor/PPC */
1592 out_le32(mbase + 0x208, 0x0b200001);
1593
1594 printk(KERN_INFO "PCIE%d: successfully set as endpoint\n",
1595 port->index);
1596 }
1526 1597
1527 printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
1528 port->index);
1529 return; 1598 return;
1530 fail: 1599 fail:
1531 if (hose) 1600 if (hose)
@@ -1542,6 +1611,7 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1542 const u32 *pval; 1611 const u32 *pval;
1543 int portno; 1612 int portno;
1544 unsigned int dcrs; 1613 unsigned int dcrs;
1614 const char *val;
1545 1615
1546 /* First, proceed to core initialization as we assume there's 1616 /* First, proceed to core initialization as we assume there's
1547 * only one PCIe core in the system 1617 * only one PCIe core in the system
@@ -1573,8 +1643,20 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1573 } 1643 }
1574 port->sdr_base = *pval; 1644 port->sdr_base = *pval;
1575 1645
1576 /* XXX Currently, we only support root complex mode */ 1646 /* Check if device_type property is set to "pci" or "pci-endpoint".
1577 port->endpoint = 0; 1647 * Resulting from this setup this PCIe port will be configured
1648 * as root-complex or as endpoint.
1649 */
1650 val = of_get_property(port->node, "device_type", NULL);
1651 if (!strcmp(val, "pci-endpoint")) {
1652 port->endpoint = 1;
1653 } else if (!strcmp(val, "pci")) {
1654 port->endpoint = 0;
1655 } else {
1656 printk(KERN_ERR "PCIE: missing or incorrect device_type for %s\n",
1657 np->full_name);
1658 return;
1659 }
1578 1660
1579 /* Fetch config space registers address */ 1661 /* Fetch config space registers address */
1580 if (of_address_to_resource(np, 0, &port->cfg_space)) { 1662 if (of_address_to_resource(np, 0, &port->cfg_space)) {
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 52c74780f403..1702de9395ee 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -2842,9 +2842,11 @@ static void dump_spu_fields(struct spu *spu)
2842 DUMP_FIELD(spu, "0x%lx", ls_size); 2842 DUMP_FIELD(spu, "0x%lx", ls_size);
2843 DUMP_FIELD(spu, "0x%x", node); 2843 DUMP_FIELD(spu, "0x%x", node);
2844 DUMP_FIELD(spu, "0x%lx", flags); 2844 DUMP_FIELD(spu, "0x%lx", flags);
2845 DUMP_FIELD(spu, "0x%lx", dar);
2846 DUMP_FIELD(spu, "0x%lx", dsisr);
2847 DUMP_FIELD(spu, "%d", class_0_pending); 2845 DUMP_FIELD(spu, "%d", class_0_pending);
2846 DUMP_FIELD(spu, "0x%lx", class_0_dar);
2847 DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
2848 DUMP_FIELD(spu, "0x%lx", class_1_dar);
2849 DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
2848 DUMP_FIELD(spu, "0x%lx", irqs[0]); 2850 DUMP_FIELD(spu, "0x%lx", irqs[0]);
2849 DUMP_FIELD(spu, "0x%lx", irqs[1]); 2851 DUMP_FIELD(spu, "0x%lx", irqs[1]);
2850 DUMP_FIELD(spu, "0x%lx", irqs[2]); 2852 DUMP_FIELD(spu, "0x%lx", irqs[2]);
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 8df7f0e4c3a6..2352d139b262 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -43,7 +43,7 @@ KBUILD_AFLAGS += $(cpu-as-y)
43KBUILD_CFLAGS += $(cpu-as-y) 43KBUILD_CFLAGS += $(cpu-as-y)
44 44
45# Default to the common case. 45# Default to the common case.
46KBUILD_DEFCONFIG := common_defconfig 46KBUILD_DEFCONFIG := ebony_defconfig
47 47
48head-y := arch/ppc/kernel/head.o 48head-y := arch/ppc/kernel/head.o
49head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o 49head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 16ac11ca7ba0..602c268fc8a2 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -24,6 +24,7 @@
24#include <asm/checksum.h> 24#include <asm/checksum.h>
25#include <asm/pgtable.h> 25#include <asm/pgtable.h>
26#include <asm/tlbflush.h> 26#include <asm/tlbflush.h>
27#include <asm/cacheflush.h>
27#include <linux/adb.h> 28#include <linux/adb.h>
28#include <linux/cuda.h> 29#include <linux/cuda.h>
29#include <linux/pmu.h> 30#include <linux/pmu.h>
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index bfddfdee0b65..51e8094f52d6 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -36,6 +36,7 @@
36#include <asm/nvram.h> 36#include <asm/nvram.h>
37#include <asm/xmon.h> 37#include <asm/xmon.h>
38#include <asm/ocp.h> 38#include <asm/ocp.h>
39#include <asm/irq.h>
39 40
40#define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \ 41#define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
41 defined(CONFIG_PPC_MPC52xx)) 42 defined(CONFIG_PPC_MPC52xx))
diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c
index 18495e754e30..d687b0f8763b 100644
--- a/arch/ppc/platforms/residual.c
+++ b/arch/ppc/platforms/residual.c
@@ -38,6 +38,7 @@
38#include <linux/init.h> 38#include <linux/init.h>
39#include <linux/ioport.h> 39#include <linux/ioport.h>
40#include <linux/pci.h> 40#include <linux/pci.h>
41#include <linux/proc_fs.h>
41 42
42#include <asm/sections.h> 43#include <asm/sections.h>
43#include <asm/mmu.h> 44#include <asm/mmu.h>
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index 90fe904d3614..418f3053de52 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -341,6 +341,7 @@ static struct resource mv64x60_eth0_resources[] = {
341}; 341};
342 342
343static struct mv643xx_eth_platform_data eth0_pd = { 343static struct mv643xx_eth_platform_data eth0_pd = {
344 .shared = &mv64x60_eth_shared_device;
344 .port_number = 0, 345 .port_number = 0,
345}; 346};
346 347
@@ -366,6 +367,7 @@ static struct resource mv64x60_eth1_resources[] = {
366}; 367};
367 368
368static struct mv643xx_eth_platform_data eth1_pd = { 369static struct mv643xx_eth_platform_data eth1_pd = {
370 .shared = &mv64x60_eth_shared_device;
369 .port_number = 1, 371 .port_number = 1,
370}; 372};
371 373
@@ -391,6 +393,7 @@ static struct resource mv64x60_eth2_resources[] = {
391}; 393};
392 394
393static struct mv643xx_eth_platform_data eth2_pd = { 395static struct mv643xx_eth_platform_data eth2_pd = {
396 .shared = &mv64x60_eth_shared_device;
394 .port_number = 2, 397 .port_number = 2,
395}; 398};
396 399
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 29a7940f284f..1d035082e78e 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -430,6 +430,13 @@ config CMM_IUCV
430 Select this option to enable the special message interface to 430 Select this option to enable the special message interface to
431 the cooperative memory management. 431 the cooperative memory management.
432 432
433config PAGE_STATES
434 bool "Unused page notification"
435 help
436 This enables the notification of unused pages to the
437 hypervisor. The ESSA instruction is used to do the states
438 changes between a page that has content and the unused state.
439
433config VIRT_TIMER 440config VIRT_TIMER
434 bool "Virtual CPU timer support" 441 bool "Virtual CPU timer support"
435 help 442 help
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 743d54f0b8db..d003a6e16afb 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -121,7 +121,7 @@ sys32_ptrace_wrapper:
121 lgfr %r3,%r3 # long 121 lgfr %r3,%r3 # long
122 llgtr %r4,%r4 # long 122 llgtr %r4,%r4 # long
123 llgfr %r5,%r5 # long 123 llgfr %r5,%r5 # long
124 jg sys_ptrace # branch to system call 124 jg compat_sys_ptrace # branch to system call
125 125
126 .globl sys32_alarm_wrapper 126 .globl sys32_alarm_wrapper
127sys32_alarm_wrapper: 127sys32_alarm_wrapper:
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index bdbb3bcd78a5..708cf9cf9a35 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -279,8 +279,6 @@ sysc_do_restart:
279 st %r2,SP_R2(%r15) # store return value (change R2 on stack) 279 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
280 280
281sysc_return: 281sysc_return:
282 tm SP_PSW+1(%r15),0x01 # returning to user ?
283 bno BASED(sysc_restore)
284 tm __TI_flags+3(%r9),_TIF_WORK_SVC 282 tm __TI_flags+3(%r9),_TIF_WORK_SVC
285 bnz BASED(sysc_work) # there is work to do (signals etc.) 283 bnz BASED(sysc_work) # there is work to do (signals etc.)
286sysc_restore: 284sysc_restore:
@@ -312,6 +310,8 @@ sysc_work_loop:
312# One of the work bits is on. Find out which one. 310# One of the work bits is on. Find out which one.
313# 311#
314sysc_work: 312sysc_work:
313 tm SP_PSW+1(%r15),0x01 # returning to user ?
314 bno BASED(sysc_restore)
315 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 315 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
316 bo BASED(sysc_mcck_pending) 316 bo BASED(sysc_mcck_pending)
317 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 317 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
@@ -602,12 +602,6 @@ io_no_vtime:
602 la %r2,SP_PTREGS(%r15) # address of register-save area 602 la %r2,SP_PTREGS(%r15) # address of register-save area
603 basr %r14,%r1 # branch to standard irq handler 603 basr %r14,%r1 # branch to standard irq handler
604io_return: 604io_return:
605 tm SP_PSW+1(%r15),0x01 # returning to user ?
606#ifdef CONFIG_PREEMPT
607 bno BASED(io_preempt) # no -> check for preemptive scheduling
608#else
609 bno BASED(io_restore) # no-> skip resched & signal
610#endif
611 tm __TI_flags+3(%r9),_TIF_WORK_INT 605 tm __TI_flags+3(%r9),_TIF_WORK_INT
612 bnz BASED(io_work) # there is work to do (signals etc.) 606 bnz BASED(io_work) # there is work to do (signals etc.)
613io_restore: 607io_restore:
@@ -629,10 +623,18 @@ io_restore_trace_psw:
629 .long 0, io_restore_trace + 0x80000000 623 .long 0, io_restore_trace + 0x80000000
630#endif 624#endif
631 625
632#ifdef CONFIG_PREEMPT 626#
633io_preempt: 627# switch to kernel stack, then check the TIF bits
628#
629io_work:
630 tm SP_PSW+1(%r15),0x01 # returning to user ?
631#ifndef CONFIG_PREEMPT
632 bno BASED(io_restore) # no-> skip resched & signal
633#else
634 bnz BASED(io_work_user) # no -> check for preemptive scheduling
635 # check for preemptive scheduling
634 icm %r0,15,__TI_precount(%r9) 636 icm %r0,15,__TI_precount(%r9)
635 bnz BASED(io_restore) 637 bnz BASED(io_restore) # preemption disabled
636 l %r1,SP_R15(%r15) 638 l %r1,SP_R15(%r15)
637 s %r1,BASED(.Lc_spsize) 639 s %r1,BASED(.Lc_spsize)
638 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 640 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
@@ -646,10 +648,7 @@ io_resume_loop:
646 br %r1 # call schedule 648 br %r1 # call schedule
647#endif 649#endif
648 650
649# 651io_work_user:
650# switch to kernel stack, then check the TIF bits
651#
652io_work:
653 l %r1,__LC_KERNEL_STACK 652 l %r1,__LC_KERNEL_STACK
654 s %r1,BASED(.Lc_spsize) 653 s %r1,BASED(.Lc_spsize)
655 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 654 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 5a4a7bcd2bba..fee10177dbfc 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -271,8 +271,6 @@ sysc_noemu:
271 stg %r2,SP_R2(%r15) # store return value (change R2 on stack) 271 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
272 272
273sysc_return: 273sysc_return:
274 tm SP_PSW+1(%r15),0x01 # returning to user ?
275 jno sysc_restore
276 tm __TI_flags+7(%r9),_TIF_WORK_SVC 274 tm __TI_flags+7(%r9),_TIF_WORK_SVC
277 jnz sysc_work # there is work to do (signals etc.) 275 jnz sysc_work # there is work to do (signals etc.)
278sysc_restore: 276sysc_restore:
@@ -304,6 +302,8 @@ sysc_work_loop:
304# One of the work bits is on. Find out which one. 302# One of the work bits is on. Find out which one.
305# 303#
306sysc_work: 304sysc_work:
305 tm SP_PSW+1(%r15),0x01 # returning to user ?
306 jno sysc_restore
307 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING 307 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
308 jo sysc_mcck_pending 308 jo sysc_mcck_pending
309 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED 309 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
@@ -585,12 +585,6 @@ io_no_vtime:
585 la %r2,SP_PTREGS(%r15) # address of register-save area 585 la %r2,SP_PTREGS(%r15) # address of register-save area
586 brasl %r14,do_IRQ # call standard irq handler 586 brasl %r14,do_IRQ # call standard irq handler
587io_return: 587io_return:
588 tm SP_PSW+1(%r15),0x01 # returning to user ?
589#ifdef CONFIG_PREEMPT
590 jno io_preempt # no -> check for preemptive scheduling
591#else
592 jno io_restore # no-> skip resched & signal
593#endif
594 tm __TI_flags+7(%r9),_TIF_WORK_INT 588 tm __TI_flags+7(%r9),_TIF_WORK_INT
595 jnz io_work # there is work to do (signals etc.) 589 jnz io_work # there is work to do (signals etc.)
596io_restore: 590io_restore:
@@ -612,10 +606,41 @@ io_restore_trace_psw:
612 .quad 0, io_restore_trace 606 .quad 0, io_restore_trace
613#endif 607#endif
614 608
615#ifdef CONFIG_PREEMPT 609#
616io_preempt: 610# There is work todo, we need to check if we return to userspace, then
611# check, if we are in SIE, if yes leave it
612#
613io_work:
614 tm SP_PSW+1(%r15),0x01 # returning to user ?
615#ifndef CONFIG_PREEMPT
616#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
617 jnz io_work_user # yes -> no need to check for SIE
618 la %r1, BASED(sie_opcode) # we return to kernel here
619 lg %r2, SP_PSW+8(%r15)
620 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
621 jne io_restore # no-> return to kernel
622 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
623 aghi %r1, 4
624 stg %r1, SP_PSW+8(%r15)
625 j io_restore # return to kernel
626#else
627 jno io_restore # no-> skip resched & signal
628#endif
629#else
630 jnz io_work_user # yes -> do resched & signal
631#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
632 la %r1, BASED(sie_opcode)
633 lg %r2, SP_PSW+8(%r15)
634 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
635 jne 0f # no -> leave PSW alone
636 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
637 aghi %r1, 4
638 stg %r1, SP_PSW+8(%r15)
6390:
640#endif
641 # check for preemptive scheduling
617 icm %r0,15,__TI_precount(%r9) 642 icm %r0,15,__TI_precount(%r9)
618 jnz io_restore 643 jnz io_restore # preemption is disabled
619 # switch to kernel stack 644 # switch to kernel stack
620 lg %r1,SP_R15(%r15) 645 lg %r1,SP_R15(%r15)
621 aghi %r1,-SP_SIZE 646 aghi %r1,-SP_SIZE
@@ -629,10 +654,7 @@ io_resume_loop:
629 jg preempt_schedule_irq 654 jg preempt_schedule_irq
630#endif 655#endif
631 656
632# 657io_work_user:
633# switch to kernel stack, then check TIF bits
634#
635io_work:
636 lg %r1,__LC_KERNEL_STACK 658 lg %r1,__LC_KERNEL_STACK
637 aghi %r1,-SP_SIZE 659 aghi %r1,-SP_SIZE
638 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 660 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
@@ -653,6 +675,11 @@ io_work_loop:
653 j io_restore 675 j io_restore
654io_work_done: 676io_work_done:
655 677
678#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
679sie_opcode:
680 .long 0xb2140000
681#endif
682
656# 683#
657# _TIF_MCCK_PENDING is set, call handler 684# _TIF_MCCK_PENDING is set, call handler
658# 685#
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 7f4270163744..35827b9bd4d1 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -292,8 +292,7 @@ poke_user(struct task_struct *child, addr_t addr, addr_t data)
292 return 0; 292 return 0;
293} 293}
294 294
295static int 295long arch_ptrace(struct task_struct *child, long request, long addr, long data)
296do_ptrace_normal(struct task_struct *child, long request, long addr, long data)
297{ 296{
298 ptrace_area parea; 297 ptrace_area parea;
299 int copied, ret; 298 int copied, ret;
@@ -529,35 +528,19 @@ poke_user_emu31(struct task_struct *child, addr_t addr, addr_t data)
529 return 0; 528 return 0;
530} 529}
531 530
532static int 531long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
533do_ptrace_emu31(struct task_struct *child, long request, long addr, long data) 532 compat_ulong_t caddr, compat_ulong_t cdata)
534{ 533{
535 unsigned int tmp; /* 4 bytes !! */ 534 unsigned long addr = caddr;
535 unsigned long data = cdata;
536 ptrace_area_emu31 parea; 536 ptrace_area_emu31 parea;
537 int copied, ret; 537 int copied, ret;
538 538
539 switch (request) { 539 switch (request) {
540 case PTRACE_PEEKTEXT:
541 case PTRACE_PEEKDATA:
542 /* read word at location addr. */
543 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
544 if (copied != sizeof(tmp))
545 return -EIO;
546 return put_user(tmp, (unsigned int __force __user *) data);
547
548 case PTRACE_PEEKUSR: 540 case PTRACE_PEEKUSR:
549 /* read the word at location addr in the USER area. */ 541 /* read the word at location addr in the USER area. */
550 return peek_user_emu31(child, addr, data); 542 return peek_user_emu31(child, addr, data);
551 543
552 case PTRACE_POKETEXT:
553 case PTRACE_POKEDATA:
554 /* write the word at location addr. */
555 tmp = data;
556 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 1);
557 if (copied != sizeof(tmp))
558 return -EIO;
559 return 0;
560
561 case PTRACE_POKEUSR: 544 case PTRACE_POKEUSR:
562 /* write the word at location addr in the USER area */ 545 /* write the word at location addr in the USER area */
563 return poke_user_emu31(child, addr, data); 546 return poke_user_emu31(child, addr, data);
@@ -587,82 +570,11 @@ do_ptrace_emu31(struct task_struct *child, long request, long addr, long data)
587 copied += sizeof(unsigned int); 570 copied += sizeof(unsigned int);
588 } 571 }
589 return 0; 572 return 0;
590 case PTRACE_GETEVENTMSG:
591 return put_user((__u32) child->ptrace_message,
592 (unsigned int __force __user *) data);
593 case PTRACE_GETSIGINFO:
594 if (child->last_siginfo == NULL)
595 return -EINVAL;
596 return copy_siginfo_to_user32((compat_siginfo_t
597 __force __user *) data,
598 child->last_siginfo);
599 case PTRACE_SETSIGINFO:
600 if (child->last_siginfo == NULL)
601 return -EINVAL;
602 return copy_siginfo_from_user32(child->last_siginfo,
603 (compat_siginfo_t
604 __force __user *) data);
605 } 573 }
606 return ptrace_request(child, request, addr, data); 574 return compat_ptrace_request(child, request, addr, data);
607} 575}
608#endif 576#endif
609 577
610long arch_ptrace(struct task_struct *child, long request, long addr, long data)
611{
612 switch (request) {
613 case PTRACE_SYSCALL:
614 /* continue and stop at next (return from) syscall */
615 case PTRACE_CONT:
616 /* restart after signal. */
617 if (!valid_signal(data))
618 return -EIO;
619 if (request == PTRACE_SYSCALL)
620 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
621 else
622 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
623 child->exit_code = data;
624 /* make sure the single step bit is not set. */
625 user_disable_single_step(child);
626 wake_up_process(child);
627 return 0;
628
629 case PTRACE_KILL:
630 /*
631 * make the child exit. Best I can do is send it a sigkill.
632 * perhaps it should be put in the status that it wants to
633 * exit.
634 */
635 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
636 return 0;
637 child->exit_code = SIGKILL;
638 /* make sure the single step bit is not set. */
639 user_disable_single_step(child);
640 wake_up_process(child);
641 return 0;
642
643 case PTRACE_SINGLESTEP:
644 /* set the trap flag. */
645 if (!valid_signal(data))
646 return -EIO;
647 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
648 child->exit_code = data;
649 user_enable_single_step(child);
650 /* give it a chance to run. */
651 wake_up_process(child);
652 return 0;
653
654 /* Do requests that differ for 31/64 bit */
655 default:
656#ifdef CONFIG_COMPAT
657 if (test_thread_flag(TIF_31BIT))
658 return do_ptrace_emu31(child, request, addr, data);
659#endif
660 return do_ptrace_normal(child, request, addr, data);
661 }
662 /* Not reached. */
663 return -EIO;
664}
665
666asmlinkage void 578asmlinkage void
667syscall_trace(struct pt_regs *regs, int entryexit) 579syscall_trace(struct pt_regs *regs, int entryexit)
668{ 580{
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig
index 1761b74d639b..e051cad1f1e0 100644
--- a/arch/s390/kvm/Kconfig
+++ b/arch/s390/kvm/Kconfig
@@ -22,7 +22,6 @@ config KVM
22 select PREEMPT_NOTIFIERS 22 select PREEMPT_NOTIFIERS
23 select ANON_INODES 23 select ANON_INODES
24 select S390_SWITCH_AMODE 24 select S390_SWITCH_AMODE
25 select PREEMPT
26 ---help--- 25 ---help---
27 Support hosting paravirtualized guest machines using the SIE 26 Support hosting paravirtualized guest machines using the SIE
28 virtualization capability on the mainframe. This should work 27 virtualization capability on the mainframe. This should work
diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c
index 349581a26103..47a0b642174c 100644
--- a/arch/s390/kvm/intercept.c
+++ b/arch/s390/kvm/intercept.c
@@ -105,6 +105,9 @@ static intercept_handler_t instruction_handlers[256] = {
105static int handle_noop(struct kvm_vcpu *vcpu) 105static int handle_noop(struct kvm_vcpu *vcpu)
106{ 106{
107 switch (vcpu->arch.sie_block->icptcode) { 107 switch (vcpu->arch.sie_block->icptcode) {
108 case 0x0:
109 vcpu->stat.exit_null++;
110 break;
108 case 0x10: 111 case 0x10:
109 vcpu->stat.exit_external_request++; 112 vcpu->stat.exit_external_request++;
110 break; 113 break;
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 98d1e73e01f1..0ac36a649eba 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -31,6 +31,7 @@
31 31
32struct kvm_stats_debugfs_item debugfs_entries[] = { 32struct kvm_stats_debugfs_item debugfs_entries[] = {
33 { "userspace_handled", VCPU_STAT(exit_userspace) }, 33 { "userspace_handled", VCPU_STAT(exit_userspace) },
34 { "exit_null", VCPU_STAT(exit_null) },
34 { "exit_validity", VCPU_STAT(exit_validity) }, 35 { "exit_validity", VCPU_STAT(exit_validity) },
35 { "exit_stop_request", VCPU_STAT(exit_stop_request) }, 36 { "exit_stop_request", VCPU_STAT(exit_stop_request) },
36 { "exit_external_request", VCPU_STAT(exit_external_request) }, 37 { "exit_external_request", VCPU_STAT(exit_external_request) },
@@ -221,10 +222,6 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
221 vcpu->arch.guest_fpregs.fpc &= FPC_VALID_MASK; 222 vcpu->arch.guest_fpregs.fpc &= FPC_VALID_MASK;
222 restore_fp_regs(&vcpu->arch.guest_fpregs); 223 restore_fp_regs(&vcpu->arch.guest_fpregs);
223 restore_access_regs(vcpu->arch.guest_acrs); 224 restore_access_regs(vcpu->arch.guest_acrs);
224
225 if (signal_pending(current))
226 atomic_set_mask(CPUSTAT_STOP_INT,
227 &vcpu->arch.sie_block->cpuflags);
228} 225}
229 226
230void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 227void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
diff --git a/arch/s390/mm/Makefile b/arch/s390/mm/Makefile
index fb988a48a754..2a7458134544 100644
--- a/arch/s390/mm/Makefile
+++ b/arch/s390/mm/Makefile
@@ -5,3 +5,4 @@
5obj-y := init.o fault.o extmem.o mmap.o vmem.o pgtable.o 5obj-y := init.o fault.o extmem.o mmap.o vmem.o pgtable.o
6obj-$(CONFIG_CMM) += cmm.o 6obj-$(CONFIG_CMM) += cmm.o
7obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 7obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
8obj-$(CONFIG_PAGE_STATES) += page-states.o
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index fa31de6ae97a..29f3a63806b9 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -126,6 +126,9 @@ void __init mem_init(void)
126 /* clear the zero-page */ 126 /* clear the zero-page */
127 memset(empty_zero_page, 0, PAGE_SIZE); 127 memset(empty_zero_page, 0, PAGE_SIZE);
128 128
129 /* Setup guest page hinting */
130 cmma_init();
131
129 /* this will put all low memory onto the freelists */ 132 /* this will put all low memory onto the freelists */
130 totalram_pages += free_all_bootmem(); 133 totalram_pages += free_all_bootmem();
131 134
diff --git a/arch/s390/mm/page-states.c b/arch/s390/mm/page-states.c
new file mode 100644
index 000000000000..fc0ad73ffd90
--- /dev/null
+++ b/arch/s390/mm/page-states.c
@@ -0,0 +1,79 @@
1/*
2 * arch/s390/mm/page-states.c
3 *
4 * Copyright IBM Corp. 2008
5 *
6 * Guest page hinting for unused pages.
7 *
8 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
9 */
10
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/types.h>
14#include <linux/mm.h>
15#include <linux/init.h>
16
17#define ESSA_SET_STABLE 1
18#define ESSA_SET_UNUSED 2
19
20static int cmma_flag;
21
22static int __init cmma(char *str)
23{
24 char *parm;
25 parm = strstrip(str);
26 if (strcmp(parm, "yes") == 0 || strcmp(parm, "on") == 0) {
27 cmma_flag = 1;
28 return 1;
29 }
30 cmma_flag = 0;
31 if (strcmp(parm, "no") == 0 || strcmp(parm, "off") == 0)
32 return 1;
33 return 0;
34}
35
36__setup("cmma=", cmma);
37
38void __init cmma_init(void)
39{
40 register unsigned long tmp asm("0") = 0;
41 register int rc asm("1") = -EOPNOTSUPP;
42
43 if (!cmma_flag)
44 return;
45 asm volatile(
46 " .insn rrf,0xb9ab0000,%1,%1,0,0\n"
47 "0: la %0,0\n"
48 "1:\n"
49 EX_TABLE(0b,1b)
50 : "+&d" (rc), "+&d" (tmp));
51 if (rc)
52 cmma_flag = 0;
53}
54
55void arch_free_page(struct page *page, int order)
56{
57 int i, rc;
58
59 if (!cmma_flag)
60 return;
61 for (i = 0; i < (1 << order); i++)
62 asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0"
63 : "=&d" (rc)
64 : "a" ((page_to_pfn(page) + i) << PAGE_SHIFT),
65 "i" (ESSA_SET_UNUSED));
66}
67
68void arch_alloc_page(struct page *page, int order)
69{
70 int i, rc;
71
72 if (!cmma_flag)
73 return;
74 for (i = 0; i < (1 << order); i++)
75 asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0"
76 : "=&d" (rc)
77 : "a" ((page_to_pfn(page) + i) << PAGE_SHIFT),
78 "i" (ESSA_SET_STABLE));
79}
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 6a679c3e15e8..8a68160079a9 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -448,14 +448,6 @@ config SH_DREAMCAST
448 Select Dreamcast if configuring for a SEGA Dreamcast. 448 Select Dreamcast if configuring for a SEGA Dreamcast.
449 More information at <http://www.linux-sh.org> 449 More information at <http://www.linux-sh.org>
450 450
451config SH_MPC1211
452 bool "Interface MPC1211"
453 depends on CPU_SUBTYPE_SH7751 && BROKEN
454 help
455 CTP/PCI-SH02 is a CPU module computer that is produced
456 by Interface Corporation.
457 More information at <http://www.interface.co.jp>
458
459config SH_SH03 451config SH_SH03
460 bool "Interface CTP/PCI-SH03" 452 bool "Interface CTP/PCI-SH03"
461 depends on CPU_SUBTYPE_SH7751 453 depends on CPU_SUBTYPE_SH7751
@@ -657,8 +649,7 @@ source "arch/sh/drivers/Kconfig"
657endmenu 649endmenu
658 650
659config ISA_DMA_API 651config ISA_DMA_API
660 def_bool y 652 bool
661 depends on SH_MPC1211
662 653
663menu "Kernel features" 654menu "Kernel features"
664 655
@@ -666,7 +657,7 @@ source kernel/Kconfig.hz
666 657
667config KEXEC 658config KEXEC
668 bool "kexec system call (EXPERIMENTAL)" 659 bool "kexec system call (EXPERIMENTAL)"
669 depends on EXPERIMENTAL 660 depends on SUPERH32 && EXPERIMENTAL
670 help 661 help
671 kexec is a system call that implements the ability to shutdown your 662 kexec is a system call that implements the ability to shutdown your
672 current kernel, and to start another kernel. It is like a reboot 663 current kernel, and to start another kernel. It is like a reboot
@@ -683,7 +674,7 @@ config KEXEC
683 674
684config CRASH_DUMP 675config CRASH_DUMP
685 bool "kernel crash dumps (EXPERIMENTAL)" 676 bool "kernel crash dumps (EXPERIMENTAL)"
686 depends on EXPERIMENTAL 677 depends on SUPERH32 && EXPERIMENTAL
687 help 678 help
688 Generate crash dump after being started by kexec. 679 Generate crash dump after being started by kexec.
689 This should be normally only set in special crash dump kernels 680 This should be normally only set in special crash dump kernels
@@ -763,7 +754,7 @@ menu "Boot options"
763 754
764config ZERO_PAGE_OFFSET 755config ZERO_PAGE_OFFSET
765 hex "Zero page offset" 756 hex "Zero page offset"
766 default "0x00004000" if SH_MPC1211 || SH_SH03 757 default "0x00004000" if SH_SH03
767 default "0x00010000" if PAGE_SIZE_64KB 758 default "0x00010000" if PAGE_SIZE_64KB
768 default "0x00002000" if PAGE_SIZE_8KB 759 default "0x00002000" if PAGE_SIZE_8KB
769 default "0x00001000" 760 default "0x00001000"
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index d9d28f9dd0db..0d2ef1e9a6fd 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -7,6 +7,7 @@ source "lib/Kconfig.debug"
7 7
8config SH_STANDARD_BIOS 8config SH_STANDARD_BIOS
9 bool "Use LinuxSH standard BIOS" 9 bool "Use LinuxSH standard BIOS"
10 depends on SUPERH32
10 help 11 help
11 Say Y here if your target has the gdb-sh-stub 12 Say Y here if your target has the gdb-sh-stub
12 package from www.m17n.org (or any conforming standard LinuxSH BIOS) 13 package from www.m17n.org (or any conforming standard LinuxSH BIOS)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index bb06f83e6239..8050b03d51fc 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -110,7 +110,6 @@ machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
110machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721 110machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE) += se/7721
111machdir-$(CONFIG_SH_HP6XX) += hp6xx 111machdir-$(CONFIG_SH_HP6XX) += hp6xx
112machdir-$(CONFIG_SH_DREAMCAST) += dreamcast 112machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
113machdir-$(CONFIG_SH_MPC1211) += mpc1211
114machdir-$(CONFIG_SH_SH03) += sh03 113machdir-$(CONFIG_SH_SH03) += sh03
115machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear 114machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear
116machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d 115machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
diff --git a/arch/sh/boards/mpc1211/Makefile b/arch/sh/boards/mpc1211/Makefile
deleted file mode 100644
index 8cd31b5d200b..000000000000
--- a/arch/sh/boards/mpc1211/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel
3#
4
5obj-y := setup.o rtc.o
6
7obj-$(CONFIG_PCI) += pci.o
8
diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c
deleted file mode 100644
index 23849f70f133..000000000000
--- a/arch/sh/boards/mpc1211/pci.c
+++ /dev/null
@@ -1,295 +0,0 @@
1/*
2 * Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02)
3 *
4 * (c) 2002-2003 Saito.K & Jeanne
5 *
6 * Dustin McIntire (dustin@sensoria.com)
7 * Derived from arch/i386/kernel/pci-*.c which bore the message:
8 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
9 *
10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information.
12 *
13 */
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19#include <linux/sched.h>
20#include <linux/ioport.h>
21#include <linux/errno.h>
22#include <linux/irq.h>
23#include <linux/interrupt.h>
24
25#include <asm/machvec.h>
26#include <asm/io.h>
27#include <asm/mpc1211/pci.h>
28
29static struct resource mpcpci_io_resource = {
30 "MPCPCI IO",
31 0x00000000,
32 0xffffffff,
33 IORESOURCE_IO
34};
35
36static struct resource mpcpci_mem_resource = {
37 "MPCPCI mem",
38 0x00000000,
39 0xffffffff,
40 IORESOURCE_MEM
41};
42
43static struct pci_ops pci_direct_conf1;
44struct pci_channel board_pci_channels[] = {
45 {&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256},
46 {NULL, NULL, NULL, 0, 0},
47};
48
49/*
50 * Direct access to PCI hardware...
51 */
52
53
54#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
55
56/*
57 * Functions for accessing PCI configuration space with type 1 accesses
58 */
59static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
60{
61 u32 word;
62 unsigned long flags;
63
64 /*
65 * PCIPDR may only be accessed as 32 bit words,
66 * so we must do byte alignment by hand
67 */
68 local_irq_save(flags);
69 writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
70 word = readl(PCIPDR);
71 local_irq_restore(flags);
72
73 switch (size) {
74 case 1:
75 switch (where & 0x3) {
76 case 3:
77 *value = (u8)(word >> 24);
78 break;
79 case 2:
80 *value = (u8)(word >> 16);
81 break;
82 case 1:
83 *value = (u8)(word >> 8);
84 break;
85 default:
86 *value = (u8)word;
87 break;
88 }
89 break;
90 case 2:
91 switch (where & 0x3) {
92 case 3:
93 *value = (u16)(word >> 24);
94 local_irq_save(flags);
95 writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR);
96 word = readl(PCIPDR);
97 local_irq_restore(flags);
98 *value |= ((word & 0xff) << 8);
99 break;
100 case 2:
101 *value = (u16)(word >> 16);
102 break;
103 case 1:
104 *value = (u16)(word >> 8);
105 break;
106 default:
107 *value = (u16)word;
108 break;
109 }
110 break;
111 case 4:
112 *value = word;
113 break;
114 }
115 PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value);
116 return PCIBIOS_SUCCESSFUL;
117}
118
119/*
120 * Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation.
121 * We'll allow an odd byte offset, though it should be illegal.
122 */
123static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
124{
125 u32 word,mask = 0;
126 unsigned long flags;
127 u32 shift = (where & 3) * 8;
128
129 if(size == 1) {
130 mask = ((1 << 8) - 1) << shift; // create the byte mask
131 } else if(size == 2){
132 if(shift == 24)
133 return PCIBIOS_BAD_REGISTER_NUMBER;
134 mask = ((1 << 16) - 1) << shift; // create the word mask
135 }
136 local_irq_save(flags);
137 writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
138 if(size == 4){
139 writel(value, PCIPDR);
140 local_irq_restore(flags);
141 PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
142 return PCIBIOS_SUCCESSFUL;
143 }
144 word = readl(PCIPDR);
145 word &= ~mask;
146 word |= ((value << shift) & mask);
147 writel(word, PCIPDR);
148 local_irq_restore(flags);
149 PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
150 return PCIBIOS_SUCCESSFUL;
151}
152
153#undef CONFIG_CMD
154
155static struct pci_ops pci_direct_conf1 = {
156 .read = pci_conf1_read,
157 .write = pci_conf1_write,
158};
159
160static void __devinit quirk_ali_ide_ports(struct pci_dev *dev)
161{
162 dev->resource[0].start = 0x1f0;
163 dev->resource[0].end = 0x1f7;
164 dev->resource[0].flags = IORESOURCE_IO;
165 dev->resource[1].start = 0x3f6;
166 dev->resource[1].end = 0x3f6;
167 dev->resource[1].flags = IORESOURCE_IO;
168 dev->resource[2].start = 0x170;
169 dev->resource[2].end = 0x177;
170 dev->resource[2].flags = IORESOURCE_IO;
171 dev->resource[3].start = 0x376;
172 dev->resource[3].end = 0x376;
173 dev->resource[3].flags = IORESOURCE_IO;
174 dev->resource[4].start = 0xf000;
175 dev->resource[4].end = 0xf00f;
176 dev->resource[4].flags = IORESOURCE_IO;
177}
178DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports);
179
180char * __devinit pcibios_setup(char *str)
181{
182 return str;
183}
184
185/*
186 * Called after each bus is probed, but before its children
187 * are examined.
188 */
189
190void __devinit pcibios_fixup_bus(struct pci_bus *b)
191{
192 pci_read_bridge_bases(b);
193}
194
195/*
196 * IRQ functions
197 */
198static inline u8 bridge_swizzle(u8 pin, u8 slot)
199{
200 return (((pin-1) + slot) % 4) + 1;
201}
202
203static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot)
204{
205 return (((pin-1) - slot) & 3) + 1;
206}
207
208static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp)
209{
210 unsigned long flags;
211 u8 pin = *pinp;
212 u32 word;
213
214 for ( ; dev->bus->self; dev = dev->bus->self) {
215 if (!pin)
216 continue;
217
218 if (dev->bus->number == 1) {
219 local_irq_save(flags);
220 writel(0x80000000 | 0x2c, PCIPAR);
221 word = readl(PCIPDR);
222 local_irq_restore(flags);
223 word >>= 16;
224
225 if (word == 0x0001)
226 pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn));
227 else
228 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
229 } else
230 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
231 }
232
233 *pinp = pin;
234
235 return PCI_SLOT(dev->devfn);
236}
237
238static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin)
239{
240 int irq = -1;
241
242 /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
243 if (dev->bus->number == 0) {
244 switch (slot) {
245 case 13: irq = 9; break; /* USB */
246 case 22: irq = 10; break; /* LAN */
247 default: irq = 0; break;
248 }
249 } else {
250 switch (pin) {
251 case 0: irq = 0; break;
252 case 1: irq = 7; break;
253 case 2: irq = 9; break;
254 case 3: irq = 10; break;
255 case 4: irq = 11; break;
256 }
257 }
258
259 if( irq < 0 ) {
260 PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
261 return irq;
262 }
263
264 PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
265
266 return irq;
267}
268
269void __init pcibios_fixup_irqs(void)
270{
271 pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq);
272}
273
274void pcibios_align_resource(void *data, struct resource *res,
275 resource_size_t size, resource_size_t align)
276{
277 resource_size_t start = res->start;
278
279 if (res->flags & IORESOURCE_IO) {
280 if (start >= 0x10000UL) {
281 if ((start & 0xffffUL) < 0x4000UL) {
282 start = (start & 0xffff0000UL) + 0x4000UL;
283 } else if ((start & 0xffffUL) >= 0xf000UL) {
284 start = (start & 0xffff0000UL) + 0x10000UL;
285 }
286 res->start = start;
287 } else {
288 if (start & 0x300) {
289 start = (start + 0x3ff) & ~0x3ff;
290 res->start = start;
291 }
292 }
293 }
294}
295
diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c
deleted file mode 100644
index 03b123a4bba4..000000000000
--- a/arch/sh/boards/mpc1211/rtc.c
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * linux/arch/sh/kernel/rtc-mpc1211.c -- MPC-1211 on-chip RTC support
3 *
4 * Copyright (C) 2002 Saito.K & Jeanne
5 *
6 */
7
8#include <linux/init.h>
9#include <linux/kernel.h>
10#include <linux/sched.h>
11#include <linux/time.h>
12#include <linux/bcd.h>
13#include <linux/mc146818rtc.h>
14
15unsigned long get_cmos_time(void)
16{
17 unsigned int year, mon, day, hour, min, sec;
18
19 spin_lock(&rtc_lock);
20
21 do {
22 sec = CMOS_READ(RTC_SECONDS);
23 min = CMOS_READ(RTC_MINUTES);
24 hour = CMOS_READ(RTC_HOURS);
25 day = CMOS_READ(RTC_DAY_OF_MONTH);
26 mon = CMOS_READ(RTC_MONTH);
27 year = CMOS_READ(RTC_YEAR);
28 } while (sec != CMOS_READ(RTC_SECONDS));
29
30 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
31 BCD_TO_BIN(sec);
32 BCD_TO_BIN(min);
33 BCD_TO_BIN(hour);
34 BCD_TO_BIN(day);
35 BCD_TO_BIN(mon);
36 BCD_TO_BIN(year);
37 }
38
39 spin_unlock(&rtc_lock);
40
41 year += 1900;
42 if (year < 1970)
43 year += 100;
44
45 return mktime(year, mon, day, hour, min, sec);
46}
47
48void mpc1211_rtc_gettimeofday(struct timeval *tv)
49{
50
51 tv->tv_sec = get_cmos_time();
52 tv->tv_usec = 0;
53}
54
55/* arc/i386/kernel/time.c */
56/*
57 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
58 * called 500 ms after the second nowtime has started, because when
59 * nowtime is written into the registers of the CMOS clock, it will
60 * jump to the next second precisely 500 ms later. Check the Motorola
61 * MC146818A or Dallas DS12887 data sheet for details.
62 *
63 * BUG: This routine does not handle hour overflow properly; it just
64 * sets the minutes. Usually you'll only notice that after reboot!
65 */
66static int set_rtc_mmss(unsigned long nowtime)
67{
68 int retval = 0;
69 int real_seconds, real_minutes, cmos_minutes;
70 unsigned char save_control, save_freq_select;
71
72 /* gets recalled with irq locally disabled */
73 spin_lock(&rtc_lock);
74 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
75 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
76
77 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
78 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
79
80 cmos_minutes = CMOS_READ(RTC_MINUTES);
81 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
82 BCD_TO_BIN(cmos_minutes);
83
84 /*
85 * since we're only adjusting minutes and seconds,
86 * don't interfere with hour overflow. This avoids
87 * messing with unknown time zones but requires your
88 * RTC not to be off by more than 15 minutes
89 */
90 real_seconds = nowtime % 60;
91 real_minutes = nowtime / 60;
92 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
93 real_minutes += 30; /* correct for half hour time zone */
94 real_minutes %= 60;
95
96 if (abs(real_minutes - cmos_minutes) < 30) {
97 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
98 BIN_TO_BCD(real_seconds);
99 BIN_TO_BCD(real_minutes);
100 }
101 CMOS_WRITE(real_seconds,RTC_SECONDS);
102 CMOS_WRITE(real_minutes,RTC_MINUTES);
103 } else {
104 printk(KERN_WARNING
105 "set_rtc_mmss: can't update from %d to %d\n",
106 cmos_minutes, real_minutes);
107 retval = -1;
108 }
109
110 /* The following flags have to be released exactly in this order,
111 * otherwise the DS12887 (popular MC146818A clone with integrated
112 * battery and quartz) will not reset the oscillator and will not
113 * update precisely 500 ms later. You won't find this mentioned in
114 * the Dallas Semiconductor data sheets, but who believes data
115 * sheets anyway ... -- Markus Kuhn
116 */
117 CMOS_WRITE(save_control, RTC_CONTROL);
118 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
119 spin_unlock(&rtc_lock);
120
121 return retval;
122}
123
124int mpc1211_rtc_settimeofday(const struct timeval *tv)
125{
126 unsigned long nowtime = tv->tv_sec;
127
128 return set_rtc_mmss(nowtime);
129}
130
131void mpc1211_time_init(void)
132{
133 rtc_sh_get_time = mpc1211_rtc_gettimeofday;
134 rtc_sh_set_time = mpc1211_rtc_settimeofday;
135}
136
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
deleted file mode 100644
index fede36361dc7..000000000000
--- a/arch/sh/boards/mpc1211/setup.c
+++ /dev/null
@@ -1,347 +0,0 @@
1/*
2 * linux/arch/sh/boards/mpc1211/setup.c
3 *
4 * Copyright (C) 2002 Saito.K & Jeanne, Fujii.Y
5 *
6 */
7
8#include <linux/init.h>
9#include <linux/irq.h>
10#include <linux/hdreg.h>
11#include <linux/ide.h>
12#include <linux/interrupt.h>
13#include <linux/platform_device.h>
14#include <asm/io.h>
15#include <asm/machvec.h>
16#include <asm/mpc1211/mpc1211.h>
17#include <asm/mpc1211/pci.h>
18#include <asm/mpc1211/m1543c.h>
19
20/* ALI15X3 SMBus address offsets */
21#define SMBHSTSTS (0 + 0x3100)
22#define SMBHSTCNT (1 + 0x3100)
23#define SMBHSTSTART (2 + 0x3100)
24#define SMBHSTCMD (7 + 0x3100)
25#define SMBHSTADD (3 + 0x3100)
26#define SMBHSTDAT0 (4 + 0x3100)
27#define SMBHSTDAT1 (5 + 0x3100)
28#define SMBBLKDAT (6 + 0x3100)
29
30/* Other settings */
31#define MAX_TIMEOUT 500 /* times 1/100 sec */
32
33/* ALI15X3 command constants */
34#define ALI15X3_ABORT 0x04
35#define ALI15X3_T_OUT 0x08
36#define ALI15X3_QUICK 0x00
37#define ALI15X3_BYTE 0x10
38#define ALI15X3_BYTE_DATA 0x20
39#define ALI15X3_WORD_DATA 0x30
40#define ALI15X3_BLOCK_DATA 0x40
41#define ALI15X3_BLOCK_CLR 0x80
42
43/* ALI15X3 status register bits */
44#define ALI15X3_STS_IDLE 0x04
45#define ALI15X3_STS_BUSY 0x08
46#define ALI15X3_STS_DONE 0x10
47#define ALI15X3_STS_DEV 0x20 /* device error */
48#define ALI15X3_STS_COLL 0x40 /* collision or no response */
49#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
50#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
51
52static void __init pci_write_config(unsigned long busNo,
53 unsigned long devNo,
54 unsigned long fncNo,
55 unsigned long cnfAdd,
56 unsigned long cnfData)
57{
58 ctrl_outl((0x80000000
59 + ((busNo & 0xff) << 16)
60 + ((devNo & 0x1f) << 11)
61 + ((fncNo & 0x07) << 8)
62 + (cnfAdd & 0xfc)), PCIPAR);
63
64 ctrl_outl(cnfData, PCIPDR);
65}
66
67/*
68 Initialize IRQ setting
69*/
70
71static unsigned char m_irq_mask = 0xfb;
72static unsigned char s_irq_mask = 0xff;
73
74static void disable_mpc1211_irq(unsigned int irq)
75{
76 if( irq < 8) {
77 m_irq_mask |= (1 << irq);
78 outb(m_irq_mask,I8259_M_MR);
79 } else {
80 s_irq_mask |= (1 << (irq - 8));
81 outb(s_irq_mask,I8259_S_MR);
82 }
83
84}
85
86static void enable_mpc1211_irq(unsigned int irq)
87{
88 if( irq < 8) {
89 m_irq_mask &= ~(1 << irq);
90 outb(m_irq_mask,I8259_M_MR);
91 } else {
92 s_irq_mask &= ~(1 << (irq - 8));
93 outb(s_irq_mask,I8259_S_MR);
94 }
95}
96
97static inline int mpc1211_irq_real(unsigned int irq)
98{
99 int value;
100 int irqmask;
101
102 if ( irq < 8) {
103 irqmask = 1<<irq;
104 outb(0x0b,I8259_M_CR); /* ISR register */
105 value = inb(I8259_M_CR) & irqmask;
106 outb(0x0a,I8259_M_CR); /* back ro the IPR reg */
107 return value;
108 }
109 irqmask = 1<<(irq - 8);
110 outb(0x0b,I8259_S_CR); /* ISR register */
111 value = inb(I8259_S_CR) & irqmask;
112 outb(0x0a,I8259_S_CR); /* back ro the IPR reg */
113 return value;
114}
115
116static void mask_and_ack_mpc1211(unsigned int irq)
117{
118 if(irq < 8) {
119 if(m_irq_mask & (1<<irq)){
120 if(!mpc1211_irq_real(irq)){
121 atomic_inc(&irq_err_count)
122 printk("spurious 8259A interrupt: IRQ %x\n",irq);
123 }
124 } else {
125 m_irq_mask |= (1<<irq);
126 }
127 inb(I8259_M_MR); /* DUMMY */
128 outb(m_irq_mask,I8259_M_MR); /* disable */
129 outb(0x60+irq,I8259_M_CR); /* EOI */
130
131 } else {
132 if(s_irq_mask & (1<<(irq - 8))){
133 if(!mpc1211_irq_real(irq)){
134 atomic_inc(&irq_err_count);
135 printk("spurious 8259A interrupt: IRQ %x\n",irq);
136 }
137 } else {
138 s_irq_mask |= (1<<(irq - 8));
139 }
140 inb(I8259_S_MR); /* DUMMY */
141 outb(s_irq_mask,I8259_S_MR); /* disable */
142 outb(0x60+(irq-8),I8259_S_CR); /* EOI */
143 outb(0x60+2,I8259_M_CR);
144 }
145}
146
147static void end_mpc1211_irq(unsigned int irq)
148{
149 enable_mpc1211_irq(irq);
150}
151
152static unsigned int startup_mpc1211_irq(unsigned int irq)
153{
154 enable_mpc1211_irq(irq);
155 return 0;
156}
157
158static void shutdown_mpc1211_irq(unsigned int irq)
159{
160 disable_mpc1211_irq(irq);
161}
162
163static struct hw_interrupt_type mpc1211_irq_type = {
164 .typename = "MPC1211-IRQ",
165 .startup = startup_mpc1211_irq,
166 .shutdown = shutdown_mpc1211_irq,
167 .enable = enable_mpc1211_irq,
168 .disable = disable_mpc1211_irq,
169 .ack = mask_and_ack_mpc1211,
170 .end = end_mpc1211_irq
171};
172
173static void make_mpc1211_irq(unsigned int irq)
174{
175 irq_desc[irq].chip = &mpc1211_irq_type;
176 irq_desc[irq].status = IRQ_DISABLED;
177 irq_desc[irq].action = 0;
178 irq_desc[irq].depth = 1;
179 disable_mpc1211_irq(irq);
180}
181
182int mpc1211_irq_demux(int irq)
183{
184 unsigned int poll;
185
186 if( irq == 2 ) {
187 outb(0x0c,I8259_M_CR);
188 poll = inb(I8259_M_CR);
189 if(poll & 0x80) {
190 irq = (poll & 0x07);
191 }
192 if( irq == 2) {
193 outb(0x0c,I8259_S_CR);
194 poll = inb(I8259_S_CR);
195 irq = (poll & 0x07) + 8;
196 }
197 }
198 return irq;
199}
200
201static void __init init_mpc1211_IRQ(void)
202{
203 int i;
204 /*
205 * Super I/O (Just mimic PC):
206 * 1: keyboard
207 * 3: serial 1
208 * 4: serial 0
209 * 5: printer
210 * 6: floppy
211 * 8: rtc
212 * 10: lan
213 * 12: mouse
214 * 14: ide0
215 * 15: ide1
216 */
217
218 pci_write_config(0,0,0,0x54, 0xb0b0002d);
219 outb(0x11, I8259_M_CR); /* mater icw1 edge trigger */
220 outb(0x11, I8259_S_CR); /* slave icw1 edge trigger */
221 outb(0x20, I8259_M_MR); /* m icw2 base vec 0x08 */
222 outb(0x28, I8259_S_MR); /* s icw2 base vec 0x70 */
223 outb(0x04, I8259_M_MR); /* m icw3 slave irq2 */
224 outb(0x02, I8259_S_MR); /* s icw3 slave id */
225 outb(0x01, I8259_M_MR); /* m icw4 non buf normal eoi*/
226 outb(0x01, I8259_S_MR); /* s icw4 non buf normal eo1*/
227 outb(0xfb, I8259_M_MR); /* disable irq0--irq7 */
228 outb(0xff, I8259_S_MR); /* disable irq8--irq15 */
229
230 for ( i=0; i < 16; i++) {
231 if(i != 2) {
232 make_mpc1211_irq(i);
233 }
234 }
235}
236
237static void delay1000(void)
238{
239 int i;
240
241 for (i=0; i<1000; i++)
242 ctrl_delay();
243}
244
245static int put_smb_blk(unsigned char *p, int address, int command, int no)
246{
247 int temp;
248 int timeout;
249 int i;
250
251 outb(0xff, SMBHSTSTS);
252 temp = inb(SMBHSTSTS);
253 for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) {
254 delay1000();
255 temp = inb(SMBHSTSTS);
256 }
257 if (timeout >= MAX_TIMEOUT){
258 return -1;
259 }
260
261 outb(((address & 0x7f) << 1), SMBHSTADD);
262 outb(0xc0, SMBHSTCNT);
263 outb(command & 0xff, SMBHSTCMD);
264 outb(no & 0x1f, SMBHSTDAT0);
265
266 for(i = 1; i <= no; i++) {
267 outb(*p++, SMBBLKDAT);
268 }
269 outb(0xff, SMBHSTSTART);
270
271 temp = inb(SMBHSTSTS);
272 for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) {
273 delay1000();
274 temp = inb(SMBHSTSTS);
275 }
276 if (timeout >= MAX_TIMEOUT) {
277 return -2;
278 }
279 if ( temp & ALI15X3_STS_ERR ){
280 return -3;
281 }
282 return 0;
283}
284
285static struct resource heartbeat_resources[] = {
286 [0] = {
287 .start = 0xa2000000,
288 .end = 0xa2000000,
289 .flags = IORESOURCE_MEM,
290 },
291};
292
293static struct platform_device heartbeat_device = {
294 .name = "heartbeat",
295 .id = -1,
296 .num_resources = ARRAY_SIZE(heartbeat_resources),
297 .resource = heartbeat_resources,
298};
299
300static struct platform_device *mpc1211_devices[] __initdata = {
301 &heartbeat_device,
302};
303
304static int __init mpc1211_devices_setup(void)
305{
306 return platform_add_devices(mpc1211_devices,
307 ARRAY_SIZE(mpc1211_devices));
308}
309__initcall(mpc1211_devices_setup);
310
311/* arch/sh/boards/mpc1211/rtc.c */
312void mpc1211_time_init(void);
313
314static void __init mpc1211_setup(char **cmdline_p)
315{
316 unsigned char spd_buf[128];
317
318 __set_io_port_base(PA_PCI_IO);
319
320 pci_write_config(0,0,0,0x54, 0xb0b00000);
321
322 do {
323 outb(ALI15X3_ABORT, SMBHSTCNT);
324 spd_buf[0] = 0x0c;
325 spd_buf[1] = 0x43;
326 spd_buf[2] = 0x7f;
327 spd_buf[3] = 0x03;
328 spd_buf[4] = 0x00;
329 spd_buf[5] = 0x03;
330 spd_buf[6] = 0x00;
331 } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0);
332
333 board_time_init = mpc1211_time_init;
334
335 return 0;
336}
337
338/*
339 * The Machine Vector
340 */
341static struct sh_machine_vector mv_mpc1211 __initmv = {
342 .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
343 .mv_setup = mpc1211_setup,
344 .mv_nr_irqs = 48,
345 .mv_irq_demux = mpc1211_irq_demux,
346 .mv_init_irq = init_mpc1211_IRQ,
347};
diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c
index e7c150d49702..01af44245b57 100644
--- a/arch/sh/boards/renesas/migor/setup.c
+++ b/arch/sh/boards/renesas/migor/setup.c
@@ -14,6 +14,7 @@
14#include <linux/mtd/physmap.h> 14#include <linux/mtd/physmap.h>
15#include <linux/mtd/nand.h> 15#include <linux/mtd/nand.h>
16#include <linux/i2c.h> 16#include <linux/i2c.h>
17#include <linux/smc91x.h>
17#include <asm/machvec.h> 18#include <asm/machvec.h>
18#include <asm/io.h> 19#include <asm/io.h>
19#include <asm/sh_keysc.h> 20#include <asm/sh_keysc.h>
@@ -27,6 +28,11 @@
27 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A) 28 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
28 */ 29 */
29 30
31static struct smc91x_platdata smc91x_info = {
32 .flags = SMC91X_USE_16BIT,
33 .irq_flags = IRQF_TRIGGER_HIGH,
34};
35
30static struct resource smc91x_eth_resources[] = { 36static struct resource smc91x_eth_resources[] = {
31 [0] = { 37 [0] = {
32 .name = "SMC91C111" , 38 .name = "SMC91C111" ,
@@ -36,7 +42,7 @@ static struct resource smc91x_eth_resources[] = {
36 }, 42 },
37 [1] = { 43 [1] = {
38 .start = 32, /* IRQ0 */ 44 .start = 32, /* IRQ0 */
39 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH, 45 .flags = IORESOURCE_IRQ,
40 }, 46 },
41}; 47};
42 48
@@ -44,6 +50,9 @@ static struct platform_device smc91x_eth_device = {
44 .name = "smc91x", 50 .name = "smc91x",
45 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 51 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
46 .resource = smc91x_eth_resources, 52 .resource = smc91x_eth_resources,
53 .dev = {
54 .platform_data = &smc91x_info,
55 },
47}; 56};
48 57
49static struct sh_keysc_info sh_keysc_info = { 58static struct sh_keysc_info sh_keysc_info = {
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 68f0ad1b637d..ae1cfcb29700 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -62,7 +62,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
62static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors, 62static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
63 NULL, mask_registers, NULL, NULL); 63 NULL, mask_registers, NULL, NULL);
64 64
65unsigned char * __init highlander_init_irq_r7780mp(void) 65unsigned char * __init highlander_plat_irq_setup(void)
66{ 66{
67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { 67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
68 printk(KERN_INFO "Using r7780mp interrupt controller.\n"); 68 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
index bd34048ed0e1..9d3921fe27c0 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
@@ -55,7 +55,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
55static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors, 55static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
56 NULL, mask_registers, NULL, NULL); 56 NULL, mask_registers, NULL, NULL);
57 57
58unsigned char * __init highlander_init_irq_r7780rp(void) 58unsigned char * __init highlander_plat_irq_setup(void)
59{ 59{
60 if (ctrl_inw(0xa5000600)) { 60 if (ctrl_inw(0xa5000600)) {
61 printk(KERN_INFO "Using r7780rp interrupt controller.\n"); 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
index bf7ec107fbc6..896c045aa39d 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
@@ -64,7 +64,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
64static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, 64static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
65 NULL, mask_registers, NULL, NULL); 65 NULL, mask_registers, NULL, NULL);
66 66
67unsigned char * __init highlander_init_irq_r7785rp(void) 67unsigned char * __init highlander_plat_irq_setup(void)
68{ 68{
69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) 69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
70 return NULL; 70 return NULL;
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index ac0a96522e45..bc79afb6fc4c 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -316,7 +316,7 @@ static void __init highlander_setup(char **cmdline_p)
316 316
317static unsigned char irl2irq[HL_NR_IRL]; 317static unsigned char irl2irq[HL_NR_IRL];
318 318
319int highlander_irq_demux(int irq) 319static int highlander_irq_demux(int irq)
320{ 320{
321 if (irq >= HL_NR_IRL || !irl2irq[irq]) 321 if (irq >= HL_NR_IRL || !irl2irq[irq])
322 return irq; 322 return irq;
@@ -324,27 +324,9 @@ int highlander_irq_demux(int irq)
324 return irl2irq[irq]; 324 return irl2irq[irq];
325} 325}
326 326
327void __init highlander_init_irq(void) 327static void __init highlander_init_irq(void)
328{ 328{
329 unsigned char *ucp = NULL; 329 unsigned char *ucp = highlander_plat_irq_setup();
330
331 do {
332#ifdef CONFIG_SH_R7780MP
333 ucp = highlander_init_irq_r7780mp();
334 if (ucp)
335 break;
336#endif
337#ifdef CONFIG_SH_R7785RP
338 ucp = highlander_init_irq_r7785rp();
339 if (ucp)
340 break;
341#endif
342#ifdef CONFIG_SH_R7780RP
343 ucp = highlander_init_irq_r7780rp();
344 if (ucp)
345 break;
346#endif
347 } while (0);
348 330
349 if (ucp) { 331 if (ucp) {
350 plat_irq_setup_pins(IRQ_MODE_IRL3210); 332 plat_irq_setup_pins(IRQ_MODE_IRL3210);
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index f21ee49ef3a5..452d0d6459a4 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -109,7 +109,6 @@ static struct platform_device heartbeat_device = {
109 .resource = heartbeat_resources, 109 .resource = heartbeat_resources,
110}; 110};
111 111
112#ifdef CONFIG_MFD_SM501
113static struct plat_serial8250_port uart_platform_data[] = { 112static struct plat_serial8250_port uart_platform_data[] = {
114 { 113 {
115 .membase = (void __iomem *)0xb3e30000, 114 .membase = (void __iomem *)0xb3e30000,
@@ -208,13 +207,9 @@ static struct platform_device sm501_device = {
208 .resource = sm501_resources, 207 .resource = sm501_resources,
209}; 208};
210 209
211#endif /* CONFIG_MFD_SM501 */
212
213static struct platform_device *rts7751r2d_devices[] __initdata = { 210static struct platform_device *rts7751r2d_devices[] __initdata = {
214#ifdef CONFIG_MFD_SM501
215 &uart_device, 211 &uart_device,
216 &sm501_device, 212 &sm501_device,
217#endif
218 &heartbeat_device, 213 &heartbeat_device,
219 &spi_sh_sci_device, 214 &spi_sh_sci_device,
220}; 215};
@@ -234,7 +229,9 @@ static int __init rts7751r2d_devices_setup(void)
234{ 229{
235 if (register_trapped_io(&cf_trapped_io) == 0) 230 if (register_trapped_io(&cf_trapped_io) == 0)
236 platform_device_register(&cf_ide_device); 231 platform_device_register(&cf_ide_device);
232
237 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); 233 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
234
238 return platform_add_devices(rts7751r2d_devices, 235 return platform_add_devices(rts7751r2d_devices,
239 ARRAY_SIZE(rts7751r2d_devices)); 236 ARRAY_SIZE(rts7751r2d_devices));
240} 237}
diff --git a/arch/sh/boards/se/7206/setup.c b/arch/sh/boards/se/7206/setup.c
index 5b3ee089d91d..4fe84cc08406 100644
--- a/arch/sh/boards/se/7206/setup.c
+++ b/arch/sh/boards/se/7206/setup.c
@@ -3,12 +3,13 @@
3 * linux/arch/sh/boards/se/7206/setup.c 3 * linux/arch/sh/boards/se/7206/setup.c
4 * 4 *
5 * Copyright (C) 2006 Yoshinori Sato 5 * Copyright (C) 2006 Yoshinori Sato
6 * Copyright (C) 2007 Paul Mundt 6 * Copyright (C) 2007 - 2008 Paul Mundt
7 * 7 *
8 * Hitachi 7206 SolutionEngine Support. 8 * Hitachi 7206 SolutionEngine Support.
9 */ 9 */
10#include <linux/init.h> 10#include <linux/init.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/smc91x.h>
12#include <asm/se7206.h> 13#include <asm/se7206.h>
13#include <asm/io.h> 14#include <asm/io.h>
14#include <asm/machvec.h> 15#include <asm/machvec.h>
@@ -16,8 +17,9 @@
16 17
17static struct resource smc91x_resources[] = { 18static struct resource smc91x_resources[] = {
18 [0] = { 19 [0] = {
19 .start = 0x300, 20 .name = "smc91x-regs",
20 .end = 0x300 + 0x020 - 1, 21 .start = PA_SMSC + 0x300,
22 .end = PA_SMSC + 0x300 + 0x020 - 1,
21 .flags = IORESOURCE_MEM, 23 .flags = IORESOURCE_MEM,
22 }, 24 },
23 [1] = { 25 [1] = {
@@ -27,9 +29,18 @@ static struct resource smc91x_resources[] = {
27 }, 29 },
28}; 30};
29 31
32static struct smc91x_platdata smc91x_info = {
33 .flags = SMC91X_USE_16BIT,
34};
35
30static struct platform_device smc91x_device = { 36static struct platform_device smc91x_device = {
31 .name = "smc91x", 37 .name = "smc91x",
32 .id = -1, 38 .id = -1,
39 .dev = {
40 .dma_mask = NULL,
41 .coherent_dma_mask = 0xffffffff,
42 .platform_data = &smc91x_info,
43 },
33 .num_resources = ARRAY_SIZE(smc91x_resources), 44 .num_resources = ARRAY_SIZE(smc91x_resources),
34 .resource = smc91x_resources, 45 .resource = smc91x_resources,
35}; 46};
diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c
index 33f6ee71f848..ede3957fc14a 100644
--- a/arch/sh/boards/se/7722/setup.c
+++ b/arch/sh/boards/se/7722/setup.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h> 16#include <linux/input.h>
17#include <linux/smc91x.h>
17#include <asm/machvec.h> 18#include <asm/machvec.h>
18#include <asm/se7722.h> 19#include <asm/se7722.h>
19#include <asm/io.h> 20#include <asm/io.h>
@@ -44,6 +45,10 @@ static struct platform_device heartbeat_device = {
44}; 45};
45 46
46/* SMC91x */ 47/* SMC91x */
48static struct smc91x_platdata smc91x_info = {
49 .flags = SMC91X_USE_16BIT,
50};
51
47static struct resource smc91x_eth_resources[] = { 52static struct resource smc91x_eth_resources[] = {
48 [0] = { 53 [0] = {
49 .name = "smc91x-regs" , 54 .name = "smc91x-regs" ,
@@ -64,6 +69,7 @@ static struct platform_device smc91x_eth_device = {
64 .dev = { 69 .dev = {
65 .dma_mask = NULL, /* don't use dma */ 70 .dma_mask = NULL, /* don't use dma */
66 .coherent_dma_mask = 0xffffffff, 71 .coherent_dma_mask = 0xffffffff,
72 .platform_data = &smc91x_info,
67 }, 73 },
68 .num_resources = ARRAY_SIZE(smc91x_eth_resources), 74 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
69 .resource = smc91x_eth_resources, 75 .resource = smc91x_eth_resources,
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32
index 6ac8d4a4ed1d..c0d25fb1aa60 100644
--- a/arch/sh/boot/compressed/Makefile_32
+++ b/arch/sh/boot/compressed/Makefile_32
@@ -6,7 +6,6 @@
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 7targets := vmlinux vmlinux.bin vmlinux.bin.gz \
8 head_32.o misc_32.o piggy.o 8 head_32.o misc_32.o piggy.o
9EXTRA_AFLAGS := -traditional
10 9
11OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o 10OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o
12 11
diff --git a/arch/sh/boot/compressed/Makefile_64 b/arch/sh/boot/compressed/Makefile_64
index 4334f2b86d8f..912f3e205a0d 100644
--- a/arch/sh/boot/compressed/Makefile_64
+++ b/arch/sh/boot/compressed/Makefile_64
@@ -13,7 +13,6 @@
13 13
14targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 14targets := vmlinux vmlinux.bin vmlinux.bin.gz \
15 head_64.o misc_64.o cache.o piggy.o 15 head_64.o misc_64.o cache.o piggy.o
16EXTRA_AFLAGS := -traditional
17 16
18OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \ 17OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \
19 $(obj)/cache.o 18 $(obj)/cache.o
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index d6e0e2bdaad5..de45c6a3e33b 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -184,9 +184,8 @@ int intc_irq_describe(char* p, int irq)
184 184
185void __init plat_irq_setup(void) 185void __init plat_irq_setup(void)
186{ 186{
187 unsigned long long __dummy0, __dummy1=~0x00000000100000f0; 187 unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
188 unsigned long reg; 188 unsigned long reg;
189 unsigned long data;
190 int i; 189 int i;
191 190
192 intc_virt = onchip_remap(INTC_BASE, 1024, "INTC"); 191 intc_virt = onchip_remap(INTC_BASE, 1024, "INTC");
@@ -196,11 +195,8 @@ void __init plat_irq_setup(void)
196 195
197 196
198 /* Set default: per-line enable/disable, priority driven ack/eoi */ 197 /* Set default: per-line enable/disable, priority driven ack/eoi */
199 for (i = 0; i < NR_INTC_IRQS; i++) { 198 for (i = 0; i < NR_INTC_IRQS; i++)
200 if (platform_int_priority[i] != NO_PRIORITY) { 199 irq_desc[i].chip = &intc_irq_type;
201 irq_desc[i].chip = &intc_irq_type;
202 }
203 }
204 200
205 201
206 /* Disable all interrupts and set all priorities to 0 to avoid trouble */ 202 /* Disable all interrupts and set all priorities to 0 to avoid trouble */
@@ -211,35 +207,42 @@ void __init plat_irq_setup(void)
211 ctrl_outl( NO_PRIORITY, reg); 207 ctrl_outl( NO_PRIORITY, reg);
212 208
213 209
214 /* Set IRLM */ 210#ifdef CONFIG_SH_CAYMAN
215 /* If all the priorities are set to 'no priority', then 211 {
216 * assume we are using encoded mode. 212 unsigned long data;
217 */ 213
218 irlm = platform_int_priority[IRQ_IRL0] + platform_int_priority[IRQ_IRL1] + \ 214 /* Set IRLM */
219 platform_int_priority[IRQ_IRL2] + platform_int_priority[IRQ_IRL3]; 215 /* If all the priorities are set to 'no priority', then
220 216 * assume we are using encoded mode.
221 if (irlm == NO_PRIORITY) { 217 */
222 /* IRLM = 0 */ 218 irlm = platform_int_priority[IRQ_IRL0] +
223 reg = INTC_ICR_CLEAR; 219 platform_int_priority[IRQ_IRL1] +
224 i = IRQ_INTA; 220 platform_int_priority[IRQ_IRL2] +
225 printk("Trying to use encoded IRL0-3. IRLs unsupported.\n"); 221 platform_int_priority[IRQ_IRL3];
226 } else { 222 if (irlm == NO_PRIORITY) {
227 /* IRLM = 1 */ 223 /* IRLM = 0 */
228 reg = INTC_ICR_SET; 224 reg = INTC_ICR_CLEAR;
229 i = IRQ_IRL0; 225 i = IRQ_INTA;
230 } 226 printk("Trying to use encoded IRL0-3. IRLs unsupported.\n");
231 ctrl_outl(INTC_ICR_IRLM, reg); 227 } else {
232 228 /* IRLM = 1 */
233 /* Set interrupt priorities according to platform description */ 229 reg = INTC_ICR_SET;
234 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) { 230 i = IRQ_IRL0;
235 data |= platform_int_priority[i] << ((i % INTC_INTPRI_PPREG) * 4);
236 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
237 /* Upon the 7th, set Priority Register */
238 ctrl_outl(data, reg);
239 data = 0;
240 reg += 8;
241 } 231 }
242 } 232 ctrl_outl(INTC_ICR_IRLM, reg);
233
234 /* Set interrupt priorities according to platform description */
235 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
236 data |= platform_int_priority[i] <<
237 ((i % INTC_INTPRI_PPREG) * 4);
238 if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
239 /* Upon the 7th, set Priority Register */
240 ctrl_outl(data, reg);
241 data = 0;
242 reg += 8;
243 }
244 }
245#endif
243 246
244 /* 247 /*
245 * And now let interrupts come in. 248 * And now let interrupts come in.
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
index 84806b2027f8..da5dae787888 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/arch/sh/kernel/cpu/irq/intc.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Shared interrupt handling code for IPR and INTC2 types of IRQs. 2 * Shared interrupt handling code for IPR and INTC2 types of IRQs.
3 * 3 *
4 * Copyright (C) 2007 Magnus Damm 4 * Copyright (C) 2007, 2008 Magnus Damm
5 * 5 *
6 * Based on intc2.c and ipr.c 6 * Based on intc2.c and ipr.c
7 * 7 *
@@ -62,6 +62,9 @@ struct intc_desc_int {
62#endif 62#endif
63 63
64static unsigned int intc_prio_level[NR_IRQS]; /* for now */ 64static unsigned int intc_prio_level[NR_IRQS]; /* for now */
65#ifdef CONFIG_CPU_SH3
66static unsigned long ack_handle[NR_IRQS];
67#endif
65 68
66static inline struct intc_desc_int *get_intc_desc(unsigned int irq) 69static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
67{ 70{
@@ -98,17 +101,26 @@ static void write_32(unsigned long addr, unsigned long h, unsigned long data)
98 101
99static void modify_8(unsigned long addr, unsigned long h, unsigned long data) 102static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
100{ 103{
104 unsigned long flags;
105 local_irq_save(flags);
101 ctrl_outb(set_field(ctrl_inb(addr), data, h), addr); 106 ctrl_outb(set_field(ctrl_inb(addr), data, h), addr);
107 local_irq_restore(flags);
102} 108}
103 109
104static void modify_16(unsigned long addr, unsigned long h, unsigned long data) 110static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
105{ 111{
112 unsigned long flags;
113 local_irq_save(flags);
106 ctrl_outw(set_field(ctrl_inw(addr), data, h), addr); 114 ctrl_outw(set_field(ctrl_inw(addr), data, h), addr);
115 local_irq_restore(flags);
107} 116}
108 117
109static void modify_32(unsigned long addr, unsigned long h, unsigned long data) 118static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
110{ 119{
120 unsigned long flags;
121 local_irq_save(flags);
111 ctrl_outl(set_field(ctrl_inl(addr), data, h), addr); 122 ctrl_outl(set_field(ctrl_inl(addr), data, h), addr);
123 local_irq_restore(flags);
112} 124}
113 125
114enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 }; 126enum { REG_FN_ERR = 0, REG_FN_WRITE_BASE = 1, REG_FN_MODIFY_BASE = 5 };
@@ -219,6 +231,25 @@ static void intc_disable(unsigned int irq)
219 } 231 }
220} 232}
221 233
234#ifdef CONFIG_CPU_SH3
235static void intc_mask_ack(unsigned int irq)
236{
237 struct intc_desc_int *d = get_intc_desc(irq);
238 unsigned long handle = ack_handle[irq];
239 unsigned long addr;
240
241 intc_disable(irq);
242
243 /* read register and write zero only to the assocaited bit */
244
245 if (handle) {
246 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
247 ctrl_inb(addr);
248 ctrl_outb(0x3f ^ set_field(0, 1, handle), addr);
249 }
250}
251#endif
252
222static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp, 253static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
223 unsigned int nr_hp, 254 unsigned int nr_hp,
224 unsigned int irq) 255 unsigned int irq)
@@ -280,7 +311,12 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
280 [IRQ_TYPE_EDGE_FALLING] = VALID(0), 311 [IRQ_TYPE_EDGE_FALLING] = VALID(0),
281 [IRQ_TYPE_EDGE_RISING] = VALID(1), 312 [IRQ_TYPE_EDGE_RISING] = VALID(1),
282 [IRQ_TYPE_LEVEL_LOW] = VALID(2), 313 [IRQ_TYPE_LEVEL_LOW] = VALID(2),
314 /* SH7706, SH7707 and SH7709 do not support high level triggered */
315#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \
316 !defined(CONFIG_CPU_SUBTYPE_SH7707) && \
317 !defined(CONFIG_CPU_SUBTYPE_SH7709)
283 [IRQ_TYPE_LEVEL_HIGH] = VALID(3), 318 [IRQ_TYPE_LEVEL_HIGH] = VALID(3),
319#endif
284}; 320};
285 321
286static int intc_set_sense(unsigned int irq, unsigned int type) 322static int intc_set_sense(unsigned int irq, unsigned int type)
@@ -430,6 +466,40 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
430 return 0; 466 return 0;
431} 467}
432 468
469#ifdef CONFIG_CPU_SH3
470static unsigned int __init intc_ack_data(struct intc_desc *desc,
471 struct intc_desc_int *d,
472 intc_enum enum_id)
473{
474 struct intc_mask_reg *mr = desc->ack_regs;
475 unsigned int i, j, fn, mode;
476 unsigned long reg_e, reg_d;
477
478 for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) {
479 mr = desc->ack_regs + i;
480
481 for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
482 if (mr->enum_ids[j] != enum_id)
483 continue;
484
485 fn = REG_FN_MODIFY_BASE;
486 mode = MODE_ENABLE_REG;
487 reg_e = mr->set_reg;
488 reg_d = mr->set_reg;
489
490 fn += (mr->reg_width >> 3) - 1;
491 return _INTC_MK(fn, mode,
492 intc_get_reg(d, reg_e),
493 intc_get_reg(d, reg_d),
494 1,
495 (mr->reg_width - 1) - j);
496 }
497 }
498
499 return 0;
500}
501#endif
502
433static unsigned int __init intc_sense_data(struct intc_desc *desc, 503static unsigned int __init intc_sense_data(struct intc_desc *desc,
434 struct intc_desc_int *d, 504 struct intc_desc_int *d,
435 intc_enum enum_id) 505 intc_enum enum_id)
@@ -530,6 +600,11 @@ static void __init intc_register_irq(struct intc_desc *desc,
530 600
531 /* irq should be disabled by default */ 601 /* irq should be disabled by default */
532 d->chip.mask(irq); 602 d->chip.mask(irq);
603
604#ifdef CONFIG_CPU_SH3
605 if (desc->ack_regs)
606 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
607#endif
533} 608}
534 609
535static unsigned int __init save_reg(struct intc_desc_int *d, 610static unsigned int __init save_reg(struct intc_desc_int *d,
@@ -560,6 +635,9 @@ void __init register_intc_controller(struct intc_desc *desc)
560 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; 635 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
561 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; 636 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
562 637
638#ifdef CONFIG_CPU_SH3
639 d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
640#endif
563 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg)); 641 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg));
564#ifdef CONFIG_SMP 642#ifdef CONFIG_SMP
565 d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp)); 643 d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp));
@@ -592,14 +670,23 @@ void __init register_intc_controller(struct intc_desc *desc)
592 } 670 }
593 } 671 }
594 672
595 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
596
597 d->chip.name = desc->name; 673 d->chip.name = desc->name;
598 d->chip.mask = intc_disable; 674 d->chip.mask = intc_disable;
599 d->chip.unmask = intc_enable; 675 d->chip.unmask = intc_enable;
600 d->chip.mask_ack = intc_disable; 676 d->chip.mask_ack = intc_disable;
601 d->chip.set_type = intc_set_sense; 677 d->chip.set_type = intc_set_sense;
602 678
679#ifdef CONFIG_CPU_SH3
680 if (desc->ack_regs) {
681 for (i = 0; i < desc->nr_ack_regs; i++)
682 k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
683
684 d->chip.mask_ack = intc_mask_ack;
685 }
686#endif
687
688 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
689
603 for (i = 0; i < desc->nr_vectors; i++) { 690 for (i = 0; i < desc->nr_vectors; i++) {
604 struct intc_vect *vect = desc->vectors + i; 691 struct intc_vect *vect = desc->vectors + i;
605 692
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
index 5627c0b3ffa8..6df2fb98eb30 100644
--- a/arch/sh/kernel/cpu/sh2a/fpu.c
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -300,7 +300,7 @@ static int denormal_addf(int hx, int hy)
300 iy = hy & 0x7fffffff; 300 iy = hy & 0x7fffffff;
301 if (iy < 0x00800000) { 301 if (iy < 0x00800000) {
302 ix = denormal_subf1(ix, iy); 302 ix = denormal_subf1(ix, iy);
303 if (ix < 0) { 303 if ((int) ix < 0) {
304 ix = -ix; 304 ix = -ix;
305 sign ^= 0x80000000; 305 sign ^= 0x80000000;
306 } 306 }
@@ -385,7 +385,7 @@ static long long denormal_addd(long long hx, long long hy)
385 iy = hy & 0x7fffffffffffffffLL; 385 iy = hy & 0x7fffffffffffffffLL;
386 if (iy < 0x0010000000000000LL) { 386 if (iy < 0x0010000000000000LL) {
387 ix = denormal_subd1(ix, iy); 387 ix = denormal_subd1(ix, iy);
388 if (ix < 0) { 388 if ((int) ix < 0) {
389 ix = -ix; 389 ix = -ix;
390 sign ^= 0x8000000000000000LL; 390 sign ^= 0x8000000000000000LL;
391 } 391 }
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 3ae4d9111f19..511de55af832 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Linux/SuperH SH-3 backends. 2# Makefile for the Linux/SuperH SH-3 backends.
3# 3#
4 4
5obj-y := ex.o probe.o entry.o 5obj-y := ex.o probe.o entry.o setup-sh3.o
6 6
7# CPU subtype setup 7# CPU subtype setup
8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
new file mode 100644
index 000000000000..c98846857855
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -0,0 +1,71 @@
1/*
2 * Shared SH3 Setup code
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <linux/io.h>
14
15/* All SH3 devices are equipped with IRQ0->5 (except sh7708) */
16
17enum {
18 UNUSED = 0,
19
20 /* interrupt sources */
21 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
22};
23
24static struct intc_vect vectors_irq0123[] __initdata = {
25 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
26 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
27};
28
29static struct intc_vect vectors_irq45[] __initdata = {
30 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
31};
32
33static struct intc_prio_reg prio_registers[] __initdata = {
34 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
35 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
36};
37
38static struct intc_mask_reg ack_registers[] __initdata = {
39 { 0xa4000004, 0, 8, /* IRR0 */
40 { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
41};
42
43static struct intc_sense_reg sense_registers[] __initdata = {
44 { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
45};
46
47static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh3-irq0123",
48 vectors_irq0123, NULL, NULL,
49 prio_registers, sense_registers, ack_registers);
50
51static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
52 vectors_irq45, NULL, NULL,
53 prio_registers, sense_registers, ack_registers);
54
55#define INTC_ICR1 0xa4000010UL
56#define INTC_ICR1_IRQLVL (1<<14)
57
58void __init plat_irq_setup_pins(int mode)
59{
60 if (mode == IRQ_MODE_IRQ) {
61 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
62 register_intc_controller(&intc_desc_irq0123);
63 return;
64 }
65 BUG();
66}
67
68void __init plat_irq_setup_sh3(void)
69{
70 register_intc_controller(&intc_desc_irq45);
71}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index f581534cb732..6468ae86b944 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -37,7 +37,7 @@ enum {
37}; 37};
38 38
39static struct intc_vect vectors[] __initdata = { 39static struct intc_vect vectors[] __initdata = {
40 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 40 /* IRQ0->5 are handled in setup-sh3.c */
41 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), 41 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
@@ -48,7 +48,7 @@ static struct intc_vect vectors[] __initdata = {
48 INTC_VECT(ADC_ADI, 0x980), 48 INTC_VECT(ADC_ADI, 0x980),
49 INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40), 49 INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40),
50 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20), 50 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
51 INTC_VECT(TPU3, 0xc80), INTC_VECT(TPU1, 0xca0), 51 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
52 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 52 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
53 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460), 53 INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
54 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), 54 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
@@ -81,14 +81,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
81static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, 81static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
82 NULL, prio_registers, NULL); 82 NULL, prio_registers, NULL);
83 83
84static struct intc_vect vectors_irq[] __initdata = {
85 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
86 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
87};
88
89static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
90 NULL, prio_registers, NULL);
91
92static struct plat_sci_port sci_platform_data[] = { 84static struct plat_sci_port sci_platform_data[] = {
93 { 85 {
94 .mapbase = 0xa4410000, 86 .mapbase = 0xa4410000,
@@ -159,16 +151,8 @@ static int __init sh7705_devices_setup(void)
159} 151}
160__initcall(sh7705_devices_setup); 152__initcall(sh7705_devices_setup);
161 153
162void __init plat_irq_setup_pins(int mode)
163{
164 if (mode == IRQ_MODE_IRQ) {
165 register_intc_controller(&intc_desc_irq);
166 return;
167 }
168 BUG();
169}
170
171void __init plat_irq_setup(void) 154void __init plat_irq_setup(void)
172{ 155{
173 register_intc_controller(&intc_desc); 156 register_intc_controller(&intc_desc);
157 plat_irq_setup_sh3();
174} 158}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index d3733b13ea52..93c55e2ed952 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -52,7 +52,7 @@ static struct intc_vect vectors[] __initdata = {
52#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 52#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
53 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 53 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
54 defined(CONFIG_CPU_SUBTYPE_SH7709) 54 defined(CONFIG_CPU_SUBTYPE_SH7709)
55 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 55 /* IRQ0->5 are handled in setup-sh3.c */
56 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 56 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
57 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 57 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
58 INTC_VECT(ADC_ADI, 0x980), 58 INTC_VECT(ADC_ADI, 0x980),
@@ -104,18 +104,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
104static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, 104static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
105 NULL, prio_registers, NULL); 105 NULL, prio_registers, NULL);
106 106
107#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
108 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
109 defined(CONFIG_CPU_SUBTYPE_SH7709)
110static struct intc_vect vectors_irq[] __initdata = {
111 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
112 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
113};
114
115static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
116 NULL, prio_registers, NULL);
117#endif
118
119static struct resource rtc_resources[] = { 107static struct resource rtc_resources[] = {
120 [0] = { 108 [0] = {
121 .start = 0xfffffec0, 109 .start = 0xfffffec0,
@@ -194,24 +182,12 @@ static int __init sh770x_devices_setup(void)
194} 182}
195__initcall(sh770x_devices_setup); 183__initcall(sh770x_devices_setup);
196 184
197#define INTC_ICR1 0xa4000010UL 185void __init plat_irq_setup(void)
198#define INTC_ICR1_IRQLVL (1<<14)
199
200void __init plat_irq_setup_pins(int mode)
201{ 186{
202 if (mode == IRQ_MODE_IRQ) { 187 register_intc_controller(&intc_desc);
203#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 188#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
204 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 189 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
205 defined(CONFIG_CPU_SUBTYPE_SH7709) 190 defined(CONFIG_CPU_SUBTYPE_SH7709)
206 ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); 191 plat_irq_setup_sh3();
207 register_intc_controller(&intc_desc_irq);
208 return;
209#endif 192#endif
210 }
211 BUG();
212}
213
214void __init plat_irq_setup(void)
215{
216 register_intc_controller(&intc_desc);
217} 193}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 7406c9ad9259..77eee481de47 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -38,7 +38,7 @@ enum {
38}; 38};
39 39
40static struct intc_vect vectors[] __initdata = { 40static struct intc_vect vectors[] __initdata = {
41 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 41 /* IRQ0->5 are handled in setup-sh3.c */
42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 42 INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 43 INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
44 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), 44 INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
@@ -79,10 +79,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
79 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 79 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
80 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } }, 80 { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
81 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } }, 81 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } },
82 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, DMAC2 } }, 82 { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC, DMAC2 } },
83#ifdef CONFIG_CPU_SUBTYPE_SH7710
84 { 0xa4080000, 0, 16, 4, /* IPRF */ { IPSEC } },
85#endif
86 { 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } }, 83 { 0xa4080002, 0, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } },
87 { 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } }, 84 { 0xa4080004, 0, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } },
88 { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } }, 85 { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
@@ -91,14 +88,6 @@ static struct intc_prio_reg prio_registers[] __initdata = {
91static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, 88static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
92 NULL, prio_registers, NULL); 89 NULL, prio_registers, NULL);
93 90
94static struct intc_vect vectors_irq[] __initdata = {
95 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
96 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
97};
98
99static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
100 NULL, prio_registers, NULL);
101
102static struct resource rtc_resources[] = { 91static struct resource rtc_resources[] = {
103 [0] = { 92 [0] = {
104 .start = 0xa413fec0, 93 .start = 0xa413fec0,
@@ -170,16 +159,8 @@ static int __init sh7710_devices_setup(void)
170} 159}
171__initcall(sh7710_devices_setup); 160__initcall(sh7710_devices_setup);
172 161
173void __init plat_irq_setup_pins(int mode)
174{
175 if (mode == IRQ_MODE_IRQ) {
176 register_intc_controller(&intc_desc_irq);
177 return;
178 }
179 BUG();
180}
181
182void __init plat_irq_setup(void) 162void __init plat_irq_setup(void)
183{ 163{
184 register_intc_controller(&intc_desc); 164 register_intc_controller(&intc_desc);
165 plat_irq_setup_sh3();
185} 166}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 8028082527c5..f807a21b066c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -19,10 +19,6 @@
19#include <linux/serial_sci.h> 19#include <linux/serial_sci.h>
20#include <asm/rtc.h> 20#include <asm/rtc.h>
21 21
22#define INTC_ICR1 0xA4140010UL
23#define INTC_ICR_IRLM 0x4000
24#define INTC_ICR_IRQ (~INTC_ICR_IRLM)
25
26static struct resource rtc_resources[] = { 22static struct resource rtc_resources[] = {
27 [0] = { 23 [0] = {
28 .start = 0xa413fec0, 24 .start = 0xa413fec0,
@@ -170,6 +166,7 @@ enum {
170}; 166};
171 167
172static struct intc_vect vectors[] __initdata = { 168static struct intc_vect vectors[] __initdata = {
169 /* IRQ0->5 are handled in setup-sh3.c */
173 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 170 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
174 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480), 171 INTC_VECT(TMU2, 0x440), INTC_VECT(RTC_ATI, 0x480),
175 INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0), 172 INTC_VECT(RTC_PRI, 0x4a0), INTC_VECT(RTC_CUI, 0x4c0),
@@ -214,11 +211,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
214 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, 211 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
215 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 212 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
216 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } }, 213 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
217#if defined(CONFIG_CPU_SUBTYPE_SH7720)
218 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } }, 214 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
219#else
220 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, 0 } },
221#endif
222 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } }, 215 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
223 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } }, 216 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
224 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } }, 217 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
@@ -229,32 +222,8 @@ static struct intc_prio_reg prio_registers[] __initdata = {
229static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, 222static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
230 NULL, prio_registers, NULL); 223 NULL, prio_registers, NULL);
231 224
232static struct intc_sense_reg sense_registers[] __initdata = {
233 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
234};
235
236static struct intc_vect vectors_irq[] __initdata = {
237 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
238 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
239 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
240};
241
242static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
243 NULL, NULL, prio_registers, sense_registers);
244
245void __init plat_irq_setup_pins(int mode)
246{
247 switch (mode) {
248 case IRQ_MODE_IRQ:
249 ctrl_outw(ctrl_inw(INTC_ICR1) & INTC_ICR_IRQ, INTC_ICR1);
250 register_intc_controller(&intc_irq_desc);
251 break;
252 default:
253 BUG();
254 }
255}
256
257void __init plat_irq_setup(void) 225void __init plat_irq_setup(void)
258{ 226{
259 register_intc_controller(&intc_desc); 227 register_intc_controller(&intc_desc);
228 plat_irq_setup_sh3();
260} 229}
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index ba8750176d91..05372ed6c568 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -143,12 +143,22 @@ resvec_save_area:
143trap_jtable: 143trap_jtable:
144 .long do_exception_error /* 0x000 */ 144 .long do_exception_error /* 0x000 */
145 .long do_exception_error /* 0x020 */ 145 .long do_exception_error /* 0x020 */
146#ifdef CONFIG_MMU
146 .long tlb_miss_load /* 0x040 */ 147 .long tlb_miss_load /* 0x040 */
147 .long tlb_miss_store /* 0x060 */ 148 .long tlb_miss_store /* 0x060 */
149#else
150 .long do_exception_error
151 .long do_exception_error
152#endif
148 ! ARTIFICIAL pseudo-EXPEVT setting 153 ! ARTIFICIAL pseudo-EXPEVT setting
149 .long do_debug_interrupt /* 0x080 */ 154 .long do_debug_interrupt /* 0x080 */
155#ifdef CONFIG_MMU
150 .long tlb_miss_load /* 0x0A0 */ 156 .long tlb_miss_load /* 0x0A0 */
151 .long tlb_miss_store /* 0x0C0 */ 157 .long tlb_miss_store /* 0x0C0 */
158#else
159 .long do_exception_error
160 .long do_exception_error
161#endif
152 .long do_address_error_load /* 0x0E0 */ 162 .long do_address_error_load /* 0x0E0 */
153 .long do_address_error_store /* 0x100 */ 163 .long do_address_error_store /* 0x100 */
154#ifdef CONFIG_SH_FPU 164#ifdef CONFIG_SH_FPU
@@ -185,10 +195,18 @@ trap_jtable:
185 .endr 195 .endr
186 .long do_IRQ /* 0xA00 */ 196 .long do_IRQ /* 0xA00 */
187 .long do_IRQ /* 0xA20 */ 197 .long do_IRQ /* 0xA20 */
198#ifdef CONFIG_MMU
188 .long itlb_miss_or_IRQ /* 0xA40 */ 199 .long itlb_miss_or_IRQ /* 0xA40 */
200#else
201 .long do_IRQ
202#endif
189 .long do_IRQ /* 0xA60 */ 203 .long do_IRQ /* 0xA60 */
190 .long do_IRQ /* 0xA80 */ 204 .long do_IRQ /* 0xA80 */
205#ifdef CONFIG_MMU
191 .long itlb_miss_or_IRQ /* 0xAA0 */ 206 .long itlb_miss_or_IRQ /* 0xAA0 */
207#else
208 .long do_IRQ
209#endif
192 .long do_exception_error /* 0xAC0 */ 210 .long do_exception_error /* 0xAC0 */
193 .long do_address_error_exec /* 0xAE0 */ 211 .long do_address_error_exec /* 0xAE0 */
194 .rept 8 212 .rept 8
@@ -274,6 +292,7 @@ not_a_tlb_miss:
274 * Instead of '.space 1024-TEXT_SIZE' place the RESVEC 292 * Instead of '.space 1024-TEXT_SIZE' place the RESVEC
275 * block making sure the final alignment is correct. 293 * block making sure the final alignment is correct.
276 */ 294 */
295#ifdef CONFIG_MMU
277tlb_miss: 296tlb_miss:
278 synco /* TAKum03020 (but probably a good idea anyway.) */ 297 synco /* TAKum03020 (but probably a good idea anyway.) */
279 putcon SP, KCR1 298 putcon SP, KCR1
@@ -377,6 +396,9 @@ fixup_to_invoke_general_handler:
377 getcon KCR1, SP 396 getcon KCR1, SP
378 pta handle_exception, tr0 397 pta handle_exception, tr0
379 blink tr0, ZERO 398 blink tr0, ZERO
399#else /* CONFIG_MMU */
400 .balign 256
401#endif
380 402
381/* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE 403/* NB TAKE GREAT CARE HERE TO ENSURE THAT THE INTERRUPT CODE
382 DOES END UP AT VBR+0x600 */ 404 DOES END UP AT VBR+0x600 */
@@ -1103,6 +1125,7 @@ restore_all:
1103 * fpu_error_or_IRQ? is a helper to deflect to the right cause. 1125 * fpu_error_or_IRQ? is a helper to deflect to the right cause.
1104 * 1126 *
1105 */ 1127 */
1128#ifdef CONFIG_MMU
1106tlb_miss_load: 1129tlb_miss_load:
1107 or SP, ZERO, r2 1130 or SP, ZERO, r2
1108 or ZERO, ZERO, r3 /* Read */ 1131 or ZERO, ZERO, r3 /* Read */
@@ -1132,6 +1155,7 @@ call_do_page_fault:
1132 movi do_page_fault, r6 1155 movi do_page_fault, r6
1133 ptabs r6, tr0 1156 ptabs r6, tr0
1134 blink tr0, ZERO 1157 blink tr0, ZERO
1158#endif /* CONFIG_MMU */
1135 1159
1136fpu_error_or_IRQA: 1160fpu_error_or_IRQA:
1137 pta its_IRQ, tr0 1161 pta its_IRQ, tr0
@@ -1481,6 +1505,7 @@ poke_real_address_q:
1481 ptabs LINK, tr0 1505 ptabs LINK, tr0
1482 blink tr0, r63 1506 blink tr0, r63
1483 1507
1508#ifdef CONFIG_MMU
1484/* 1509/*
1485 * --- User Access Handling Section 1510 * --- User Access Handling Section
1486 */ 1511 */
@@ -1604,6 +1629,7 @@ ___clear_user_exit:
1604 ptabs LINK, tr0 1629 ptabs LINK, tr0
1605 blink tr0, ZERO 1630 blink tr0, ZERO
1606 1631
1632#endif /* CONFIG_MMU */
1607 1633
1608/* 1634/*
1609 * int __strncpy_from_user(unsigned long __dest, unsigned long __src, 1635 * int __strncpy_from_user(unsigned long __dest, unsigned long __src,
@@ -2014,9 +2040,11 @@ sa_default_restorer:
2014 .global asm_uaccess_start /* Just a marker */ 2040 .global asm_uaccess_start /* Just a marker */
2015asm_uaccess_start: 2041asm_uaccess_start:
2016 2042
2043#ifdef CONFIG_MMU
2017 .long ___copy_user1, ___copy_user_exit 2044 .long ___copy_user1, ___copy_user_exit
2018 .long ___copy_user2, ___copy_user_exit 2045 .long ___copy_user2, ___copy_user_exit
2019 .long ___clear_user1, ___clear_user_exit 2046 .long ___clear_user1, ___clear_user_exit
2047#endif
2020 .long ___strncpy_from_user1, ___strncpy_from_user_exit 2048 .long ___strncpy_from_user1, ___strncpy_from_user_exit
2021 .long ___strnlen_user1, ___strnlen_user_exit 2049 .long ___strnlen_user1, ___strnlen_user_exit
2022 .long ___get_user_asm_b1, ___get_user_asm_b_exit 2050 .long ___get_user_asm_b1, ___get_user_asm_b_exit
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 31f8cb0f6374..92ad844b5c12 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -15,6 +15,7 @@
15#include <linux/string.h> 15#include <linux/string.h>
16#include <asm/processor.h> 16#include <asm/processor.h>
17#include <asm/cache.h> 17#include <asm/cache.h>
18#include <asm/tlb.h>
18 19
19int __init detect_cpu_and_cache_system(void) 20int __init detect_cpu_and_cache_system(void)
20{ 21{
@@ -67,5 +68,8 @@ int __init detect_cpu_and_cache_system(void)
67 set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags)); 68 set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags));
68#endif 69#endif
69 70
71 /* Setup some I/D TLB defaults */
72 sh64_tlb_init();
73
70 return 0; 74 return 0;
71} 75}
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 957f25611543..6b7d166694e2 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -141,7 +141,9 @@ static void scif_sercon_init(char *s)
141 */ 141 */
142static void scif_sercon_init(char *s) 142static void scif_sercon_init(char *s)
143{ 143{
144 struct uart_port *port = &scif_port;
144 unsigned baud = DEFAULT_BAUD; 145 unsigned baud = DEFAULT_BAUD;
146 unsigned int status;
145 char *e; 147 char *e;
146 148
147 if (*s == ',') 149 if (*s == ',')
@@ -160,19 +162,25 @@ static void scif_sercon_init(char *s)
160 baud = DEFAULT_BAUD; 162 baud = DEFAULT_BAUD;
161 } 163 }
162 164
163 ctrl_outw(0, scif_port.mapbase + 8); 165 do {
164 ctrl_outw(0, scif_port.mapbase); 166 status = sci_in(port, SCxSR);
167 } while (!(status & SCxSR_TEND(port)));
168
169 sci_out(port, SCSCR, 0); /* TE=0, RE=0 */
170 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
171 sci_out(port, SCSMR, 0);
165 172
166 /* Set baud rate */ 173 /* Set baud rate */
167 ctrl_outb((CONFIG_SH_PCLK_FREQ + 16 * baud) / 174 sci_out(port, SCBRR, (CONFIG_SH_PCLK_FREQ + 16 * baud) /
168 (32 * baud) - 1, scif_port.mapbase + 4); 175 (32 * baud) - 1);
169 176 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
170 ctrl_outw(12, scif_port.mapbase + 24); 177
171 ctrl_outw(8, scif_port.mapbase + 24); 178 sci_out(port, SCSPTR, 0);
172 ctrl_outw(0, scif_port.mapbase + 32); 179 sci_out(port, SCxSR, 0x60);
173 ctrl_outw(0x60, scif_port.mapbase + 16); 180 sci_out(port, SCLSR, 0);
174 ctrl_outw(0, scif_port.mapbase + 36); 181
175 ctrl_outw(0x30, scif_port.mapbase + 8); 182 sci_out(port, SCFCR, 0);
183 sci_out(port, SCSCR, 0x30); /* TE=1, RE=1 */
176} 184}
177#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */ 185#endif /* defined(CONFIG_CPU_SUBTYPE_SH7720) */
178#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */ 186#endif /* !defined(CONFIG_SH_STANDARD_BIOS) */
diff --git a/arch/sh/kernel/kgdb_stub.c b/arch/sh/kernel/kgdb_stub.c
index d453c3a1c79f..832641bbd47d 100644
--- a/arch/sh/kernel/kgdb_stub.c
+++ b/arch/sh/kernel/kgdb_stub.c
@@ -330,14 +330,6 @@ static char *ebin_to_mem(const char *buf, char *mem, int count)
330 return mem; 330 return mem;
331} 331}
332 332
333/* Pack a hex byte */
334static char *pack_hex_byte(char *pkt, int byte)
335{
336 *pkt++ = hexchars[(byte >> 4) & 0xf];
337 *pkt++ = hexchars[(byte & 0xf)];
338 return pkt;
339}
340
341/* Scan for the start char '$', read the packet and check the checksum */ 333/* Scan for the start char '$', read the packet and check the checksum */
342static void get_packet(char *buffer, int buflen) 334static void get_packet(char *buffer, int buflen)
343{ 335{
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 284f66f1ebbe..516bde9c50fa 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -53,6 +53,7 @@ EXPORT_SYMBOL(cpu_data);
53 * sh_mv= on the command line, prior to .machvec.init teardown. 53 * sh_mv= on the command line, prior to .machvec.init teardown.
54 */ 54 */
55struct sh_machine_vector sh_mv = { .mv_name = "generic", }; 55struct sh_machine_vector sh_mv = { .mv_name = "generic", };
56EXPORT_SYMBOL(sh_mv);
56 57
57#ifdef CONFIG_VT 58#ifdef CONFIG_VT
58struct screen_info screen_info; 59struct screen_info screen_info;
@@ -76,11 +77,18 @@ static struct resource data_resource = {
76 .flags = IORESOURCE_BUSY | IORESOURCE_MEM, 77 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
77}; 78};
78 79
80static struct resource bss_resource = {
81 .name = "Kernel bss",
82 .flags = IORESOURCE_BUSY | IORESOURCE_MEM,
83};
84
79unsigned long memory_start; 85unsigned long memory_start;
80EXPORT_SYMBOL(memory_start); 86EXPORT_SYMBOL(memory_start);
81unsigned long memory_end = 0; 87unsigned long memory_end = 0;
82EXPORT_SYMBOL(memory_end); 88EXPORT_SYMBOL(memory_end);
83 89
90static struct resource mem_resources[MAX_NUMNODES];
91
84int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; 92int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
85 93
86static int __init early_parse_mem(char *p) 94static int __init early_parse_mem(char *p)
@@ -169,6 +177,40 @@ static inline void __init reserve_crashkernel(void)
169{} 177{}
170#endif 178#endif
171 179
180void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
181 unsigned long end_pfn)
182{
183 struct resource *res = &mem_resources[nid];
184
185 WARN_ON(res->name); /* max one active range per node for now */
186
187 res->name = "System RAM";
188 res->start = start_pfn << PAGE_SHIFT;
189 res->end = (end_pfn << PAGE_SHIFT) - 1;
190 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
191 if (request_resource(&iomem_resource, res)) {
192 pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
193 start_pfn, end_pfn);
194 return;
195 }
196
197 /*
198 * We don't know which RAM region contains kernel data,
199 * so we try it repeatedly and let the resource manager
200 * test it.
201 */
202 request_resource(res, &code_resource);
203 request_resource(res, &data_resource);
204 request_resource(res, &bss_resource);
205
206#ifdef CONFIG_KEXEC
207 if (crashk_res.start != crashk_res.end)
208 request_resource(res, &crashk_res);
209#endif
210
211 add_active_range(nid, start_pfn, end_pfn);
212}
213
172void __init setup_bootmem_allocator(unsigned long free_pfn) 214void __init setup_bootmem_allocator(unsigned long free_pfn)
173{ 215{
174 unsigned long bootmap_size; 216 unsigned long bootmap_size;
@@ -181,7 +223,7 @@ void __init setup_bootmem_allocator(unsigned long free_pfn)
181 bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn, 223 bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn,
182 min_low_pfn, max_low_pfn); 224 min_low_pfn, max_low_pfn);
183 225
184 add_active_range(0, min_low_pfn, max_low_pfn); 226 __add_active_range(0, min_low_pfn, max_low_pfn);
185 register_bootmem_low_pages(); 227 register_bootmem_low_pages();
186 228
187 node_set_online(0); 229 node_set_online(0);
@@ -267,6 +309,8 @@ void __init setup_arch(char **cmdline_p)
267 code_resource.end = virt_to_phys(_etext)-1; 309 code_resource.end = virt_to_phys(_etext)-1;
268 data_resource.start = virt_to_phys(_etext); 310 data_resource.start = virt_to_phys(_etext);
269 data_resource.end = virt_to_phys(_edata)-1; 311 data_resource.end = virt_to_phys(_edata)-1;
312 bss_resource.start = virt_to_phys(__bss_start);
313 bss_resource.end = virt_to_phys(_ebss)-1;
270 314
271 memory_start = (unsigned long)__va(__MEMORY_START); 315 memory_start = (unsigned long)__va(__MEMORY_START);
272 if (!memory_end) 316 if (!memory_end)
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 6d405462cee8..8f916536719c 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -20,8 +20,6 @@
20extern int dump_fpu(struct pt_regs *, elf_fpregset_t *); 20extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
21extern struct hw_interrupt_type no_irq_type; 21extern struct hw_interrupt_type no_irq_type;
22 22
23EXPORT_SYMBOL(sh_mv);
24
25/* platform dependent support */ 23/* platform dependent support */
26EXPORT_SYMBOL(dump_fpu); 24EXPORT_SYMBOL(dump_fpu);
27EXPORT_SYMBOL(kernel_thread); 25EXPORT_SYMBOL(kernel_thread);
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index a310c9707f03..9324d32adacc 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -16,6 +16,7 @@
16#include <linux/in6.h> 16#include <linux/in6.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/screen_info.h> 18#include <linux/screen_info.h>
19#include <asm/cacheflush.h>
19#include <asm/processor.h> 20#include <asm/processor.h>
20#include <asm/uaccess.h> 21#include <asm/uaccess.h>
21#include <asm/checksum.h> 22#include <asm/checksum.h>
@@ -29,25 +30,50 @@ extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
29EXPORT_SYMBOL(dump_fpu); 30EXPORT_SYMBOL(dump_fpu);
30EXPORT_SYMBOL(kernel_thread); 31EXPORT_SYMBOL(kernel_thread);
31 32
33#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU)
34EXPORT_SYMBOL(clear_user_page);
35#endif
36
37#ifndef CONFIG_CACHE_OFF
38EXPORT_SYMBOL(flush_dcache_page);
39#endif
40
32/* Networking helper routines. */ 41/* Networking helper routines. */
42EXPORT_SYMBOL(csum_partial);
33EXPORT_SYMBOL(csum_partial_copy_nocheck); 43EXPORT_SYMBOL(csum_partial_copy_nocheck);
44#ifdef CONFIG_IPV6
45EXPORT_SYMBOL(csum_ipv6_magic);
46#endif
34 47
35#ifdef CONFIG_VT 48#ifdef CONFIG_VT
36EXPORT_SYMBOL(screen_info); 49EXPORT_SYMBOL(screen_info);
37#endif 50#endif
38 51
52EXPORT_SYMBOL(__put_user_asm_b);
53EXPORT_SYMBOL(__put_user_asm_w);
39EXPORT_SYMBOL(__put_user_asm_l); 54EXPORT_SYMBOL(__put_user_asm_l);
55EXPORT_SYMBOL(__put_user_asm_q);
56EXPORT_SYMBOL(__get_user_asm_b);
57EXPORT_SYMBOL(__get_user_asm_w);
40EXPORT_SYMBOL(__get_user_asm_l); 58EXPORT_SYMBOL(__get_user_asm_l);
59EXPORT_SYMBOL(__get_user_asm_q);
60EXPORT_SYMBOL(__strnlen_user);
61EXPORT_SYMBOL(__strncpy_from_user);
62EXPORT_SYMBOL(clear_page);
63EXPORT_SYMBOL(__clear_user);
41EXPORT_SYMBOL(copy_page); 64EXPORT_SYMBOL(copy_page);
42EXPORT_SYMBOL(__copy_user); 65EXPORT_SYMBOL(__copy_user);
43EXPORT_SYMBOL(empty_zero_page); 66EXPORT_SYMBOL(empty_zero_page);
44EXPORT_SYMBOL(memcpy); 67EXPORT_SYMBOL(memcpy);
45EXPORT_SYMBOL(__udelay); 68EXPORT_SYMBOL(__udelay);
46EXPORT_SYMBOL(__ndelay); 69EXPORT_SYMBOL(__ndelay);
70EXPORT_SYMBOL(__const_udelay);
47 71
48/* Ugh. These come in from libgcc.a at link time. */ 72/* Ugh. These come in from libgcc.a at link time. */
49#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) 73#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
50 74
51DECLARE_EXPORT(__sdivsi3); 75DECLARE_EXPORT(__sdivsi3);
76DECLARE_EXPORT(__sdivsi3_2);
52DECLARE_EXPORT(__muldi3); 77DECLARE_EXPORT(__muldi3);
53DECLARE_EXPORT(__udivsi3); 78DECLARE_EXPORT(__udivsi3);
79DECLARE_EXPORT(__div_table);
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
index 898977ee2030..022a55f1c1d4 100644
--- a/arch/sh/kernel/time_64.c
+++ b/arch/sh/kernel/time_64.c
@@ -172,6 +172,7 @@ void do_gettimeofday(struct timeval *tv)
172 tv->tv_sec = sec; 172 tv->tv_sec = sec;
173 tv->tv_usec = usec; 173 tv->tv_usec = usec;
174} 174}
175EXPORT_SYMBOL(do_gettimeofday);
175 176
176int do_settimeofday(struct timespec *tv) 177int do_settimeofday(struct timespec *tv)
177{ 178{
@@ -240,7 +241,7 @@ static inline void do_timer_interrupt(void)
240 * the irq version of write_lock because as just said we have irq 241 * the irq version of write_lock because as just said we have irq
241 * locally disabled. -arca 242 * locally disabled. -arca
242 */ 243 */
243 write_lock(&xtime_lock); 244 write_seqlock(&xtime_lock);
244 asm ("getcon cr62, %0" : "=r" (current_ctc)); 245 asm ("getcon cr62, %0" : "=r" (current_ctc));
245 ctc_last_interrupt = (unsigned long) current_ctc; 246 ctc_last_interrupt = (unsigned long) current_ctc;
246 247
@@ -266,7 +267,7 @@ static inline void do_timer_interrupt(void)
266 /* do it again in 60 s */ 267 /* do it again in 60 s */
267 last_rtc_update = xtime.tv_sec - 600; 268 last_rtc_update = xtime.tv_sec - 600;
268 } 269 }
269 write_unlock(&xtime_lock); 270 write_sequnlock(&xtime_lock);
270 271
271#ifndef CONFIG_SMP 272#ifndef CONFIG_SMP
272 update_process_times(user_mode(get_irq_regs())); 273 update_process_times(user_mode(get_irq_regs()));
diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c
index 75825ef6e084..2fb8eaf6de60 100644
--- a/arch/sh/lib64/dbg.c
+++ b/arch/sh/lib64/dbg.c
@@ -186,8 +186,8 @@ void evt_debug(int evt, int ret_addr, int event, int tra, struct pt_regs *regs)
186 rr->pc = regs->pc; 186 rr->pc = regs->pc;
187 187
188 if (sp < stack_bottom + 3092) { 188 if (sp < stack_bottom + 3092) {
189 printk("evt_debug : stack underflow report\n");
190 int i, j; 189 int i, j;
190 printk("evt_debug : stack underflow report\n");
191 for (j=0, i = event_ptr; j<16; j++) { 191 for (j=0, i = event_ptr; j<16; j++) {
192 rr = event_ring + i; 192 rr = event_ring + i;
193 printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n", 193 printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n",
diff --git a/arch/sh/mm/Makefile_64 b/arch/sh/mm/Makefile_64
index cbd6aa33c5ac..0d92a8a3ac9a 100644
--- a/arch/sh/mm/Makefile_64
+++ b/arch/sh/mm/Makefile_64
@@ -2,10 +2,11 @@
2# Makefile for the Linux SuperH-specific parts of the memory manager. 2# Makefile for the Linux SuperH-specific parts of the memory manager.
3# 3#
4 4
5obj-y := init.o extable_64.o consistent.o 5obj-y := init.o consistent.o
6 6
7mmu-y := tlb-nommu.o pg-nommu.o 7mmu-y := tlb-nommu.o pg-nommu.o extable_32.o
8mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o 8mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o \
9 extable_64.o
9 10
10ifndef CONFIG_CACHE_OFF 11ifndef CONFIG_CACHE_OFF
11obj-y += cache-sh5.o 12obj-y += cache-sh5.o
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 3877321fcede..9e277ec7d536 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -714,6 +714,7 @@ void flush_cache_sigtramp(unsigned long vaddr)
714 sh64_icache_inv_current_user_range(vaddr, end); 714 sh64_icache_inv_current_user_range(vaddr, end);
715} 715}
716 716
717#ifdef CONFIG_MMU
717/* 718/*
718 * These *MUST* lie in an area of virtual address space that's otherwise 719 * These *MUST* lie in an area of virtual address space that's otherwise
719 * unused. 720 * unused.
@@ -830,3 +831,4 @@ void clear_user_page(void *to, unsigned long address, struct page *page)
830 else 831 else
831 sh64_clear_user_page_coloured(to, address); 832 sh64_clear_user_page_coloured(to, address);
832} 833}
834#endif
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index cea224c3e49b..6e0be24d26e2 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -343,6 +343,7 @@ unsigned long onchip_remap(unsigned long phys, unsigned long size, const char *n
343 343
344 return shmedia_alloc_io(phys, size, name); 344 return shmedia_alloc_io(phys, size, name);
345} 345}
346EXPORT_SYMBOL(onchip_remap);
346 347
347void onchip_unmap(unsigned long vaddr) 348void onchip_unmap(unsigned long vaddr)
348{ 349{
@@ -370,6 +371,7 @@ void onchip_unmap(unsigned long vaddr)
370 kfree(res); 371 kfree(res);
371 } 372 }
372} 373}
374EXPORT_SYMBOL(onchip_unmap);
373 375
374#ifdef CONFIG_PROC_FS 376#ifdef CONFIG_PROC_FS
375static int 377static int
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 2de7302724fc..1663199ce888 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -59,7 +59,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
59 free_pfn = start_pfn = start >> PAGE_SHIFT; 59 free_pfn = start_pfn = start >> PAGE_SHIFT;
60 end_pfn = end >> PAGE_SHIFT; 60 end_pfn = end >> PAGE_SHIFT;
61 61
62 add_active_range(nid, start_pfn, end_pfn); 62 __add_active_range(nid, start_pfn, end_pfn);
63 63
64 /* Node-local pgdat */ 64 /* Node-local pgdat */
65 NODE_DATA(nid) = pfn_to_kaddr(free_pfn); 65 NODE_DATA(nid) = pfn_to_kaddr(free_pfn);
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 987c6682bf99..1bba7d36be90 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -28,7 +28,6 @@ HD64465 HD64465
287751SYSTEMH SH_7751_SYSTEMH 287751SYSTEMH SH_7751_SYSTEMH
29HP6XX SH_HP6XX 29HP6XX SH_HP6XX
30DREAMCAST SH_DREAMCAST 30DREAMCAST SH_DREAMCAST
31MPC1211 SH_MPC1211
32SNAPGEAR SH_SECUREEDGE5410 31SNAPGEAR SH_SECUREEDGE5410
33EDOSK7705 SH_EDOSK7705 32EDOSK7705 SH_EDOSK7705
34SH4202_MICRODEV SH_SH4202_MICRODEV 33SH4202_MICRODEV SH_SH4202_MICRODEV
diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S
index 57d1bbdd0bd2..4bcfe54f878d 100644
--- a/arch/sparc/kernel/entry.S
+++ b/arch/sparc/kernel/entry.S
@@ -1306,6 +1306,8 @@ ret_from_fork:
1306 .align 4 1306 .align 4
1307 .globl linux_sparc_syscall 1307 .globl linux_sparc_syscall
1308linux_sparc_syscall: 1308linux_sparc_syscall:
1309 sethi %hi(PSR_SYSCALL), %l4
1310 or %l0, %l4, %l0
1309 /* Direct access to user regs, must faster. */ 1311 /* Direct access to user regs, must faster. */
1310 cmp %g1, NR_SYSCALLS 1312 cmp %g1, NR_SYSCALLS
1311 bgeu linux_sparc_ni_syscall 1313 bgeu linux_sparc_ni_syscall
diff --git a/arch/sparc/kernel/process.c b/arch/sparc/kernel/process.c
index e7f35198ae34..da48d248cc17 100644
--- a/arch/sparc/kernel/process.c
+++ b/arch/sparc/kernel/process.c
@@ -419,14 +419,26 @@ asmlinkage int sparc_do_fork(unsigned long clone_flags,
419 unsigned long stack_size) 419 unsigned long stack_size)
420{ 420{
421 unsigned long parent_tid_ptr, child_tid_ptr; 421 unsigned long parent_tid_ptr, child_tid_ptr;
422 unsigned long orig_i1 = regs->u_regs[UREG_I1];
423 long ret;
422 424
423 parent_tid_ptr = regs->u_regs[UREG_I2]; 425 parent_tid_ptr = regs->u_regs[UREG_I2];
424 child_tid_ptr = regs->u_regs[UREG_I4]; 426 child_tid_ptr = regs->u_regs[UREG_I4];
425 427
426 return do_fork(clone_flags, stack_start, 428 ret = do_fork(clone_flags, stack_start,
427 regs, stack_size, 429 regs, stack_size,
428 (int __user *) parent_tid_ptr, 430 (int __user *) parent_tid_ptr,
429 (int __user *) child_tid_ptr); 431 (int __user *) child_tid_ptr);
432
433 /* If we get an error and potentially restart the system
434 * call, we're screwed because copy_thread() clobbered
435 * the parent's %o1. So detect that case and restore it
436 * here.
437 */
438 if ((unsigned long)ret >= -ERESTART_RESTARTBLOCK)
439 regs->u_regs[UREG_I1] = orig_i1;
440
441 return ret;
430} 442}
431 443
432/* Copy a Sparc thread. The fork() return value conventions 444/* Copy a Sparc thread. The fork() return value conventions
@@ -626,11 +638,6 @@ asmlinkage int sparc_execve(struct pt_regs *regs)
626 (char __user * __user *)regs->u_regs[base + UREG_I2], 638 (char __user * __user *)regs->u_regs[base + UREG_I2],
627 regs); 639 regs);
628 putname(filename); 640 putname(filename);
629 if (error == 0) {
630 task_lock(current);
631 current->ptrace &= ~PT_DTRACE;
632 task_unlock(current);
633 }
634out: 641out:
635 return error; 642 return error;
636} 643}
diff --git a/arch/sparc/kernel/ptrace.c b/arch/sparc/kernel/ptrace.c
index 7f44ae69b29e..81f3b929743f 100644
--- a/arch/sparc/kernel/ptrace.c
+++ b/arch/sparc/kernel/ptrace.c
@@ -170,8 +170,8 @@ static int genregs32_set(struct task_struct *target,
170 switch (pos) { 170 switch (pos) {
171 case 32: /* PSR */ 171 case 32: /* PSR */
172 psr = regs->psr; 172 psr = regs->psr;
173 psr &= ~PSR_ICC; 173 psr &= ~(PSR_ICC | PSR_SYSCALL);
174 psr |= (reg & PSR_ICC); 174 psr |= (reg & (PSR_ICC | PSR_SYSCALL));
175 regs->psr = psr; 175 regs->psr = psr;
176 break; 176 break;
177 case 33: /* PC */ 177 case 33: /* PC */
@@ -441,6 +441,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
441 break; 441 break;
442 442
443 default: 443 default:
444 if (request == PTRACE_SPARC_DETACH)
445 request = PTRACE_DETACH;
444 ret = ptrace_request(child, request, addr, data); 446 ret = ptrace_request(child, request, addr, data);
445 break; 447 break;
446 } 448 }
diff --git a/arch/sparc/kernel/rtrap.S b/arch/sparc/kernel/rtrap.S
index 77ca6fd81253..ab818cdc4cc0 100644
--- a/arch/sparc/kernel/rtrap.S
+++ b/arch/sparc/kernel/rtrap.S
@@ -50,8 +50,9 @@ rtrap_7win_patch5: and %g1, 0x7f, %g1
50ret_trap_entry: 50ret_trap_entry:
51ret_trap_lockless_ipi: 51ret_trap_lockless_ipi:
52 andcc %t_psr, PSR_PS, %g0 52 andcc %t_psr, PSR_PS, %g0
53 sethi %hi(PSR_SYSCALL), %g1
53 be 1f 54 be 1f
54 nop 55 andn %t_psr, %g1, %t_psr
55 56
56 wr %t_psr, 0x0, %psr 57 wr %t_psr, 0x0, %psr
57 b ret_trap_kernel 58 b ret_trap_kernel
@@ -73,7 +74,6 @@ signal_p:
73 ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr 74 ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
74 75
75 mov %l5, %o1 76 mov %l5, %o1
76 mov %l6, %o2
77 call do_signal 77 call do_signal
78 add %sp, STACKFRAME_SZ, %o0 ! pt_regs ptr 78 add %sp, STACKFRAME_SZ, %o0 ! pt_regs ptr
79 79
@@ -81,6 +81,8 @@ signal_p:
81 ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr 81 ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr
82 clr %l6 82 clr %l6
83ret_trap_continue: 83ret_trap_continue:
84 sethi %hi(PSR_SYSCALL), %g1
85 andn %t_psr, %g1, %t_psr
84 wr %t_psr, 0x0, %psr 86 wr %t_psr, 0x0, %psr
85 WRITE_PAUSE 87 WRITE_PAUSE
86 88
@@ -137,8 +139,9 @@ ret_trap_userwins_ok:
137 LOAD_PT_PRIV(sp, t_psr, t_pc, t_npc) 139 LOAD_PT_PRIV(sp, t_psr, t_pc, t_npc)
138 or %t_pc, %t_npc, %g2 140 or %t_pc, %t_npc, %g2
139 andcc %g2, 0x3, %g0 141 andcc %g2, 0x3, %g0
142 sethi %hi(PSR_SYSCALL), %g2
140 be 1f 143 be 1f
141 nop 144 andn %t_psr, %g2, %t_psr
142 145
143 b ret_trap_unaligned_pc 146 b ret_trap_unaligned_pc
144 add %sp, STACKFRAME_SZ, %o0 147 add %sp, STACKFRAME_SZ, %o0
@@ -201,6 +204,8 @@ rtrap_patch5: and %g1, 0xff, %g1
2011: 2041:
202 LOAD_PT_ALL(sp, t_psr, t_pc, t_npc, g1) 205 LOAD_PT_ALL(sp, t_psr, t_pc, t_npc, g1)
2032: 2062:
207 sethi %hi(PSR_SYSCALL), %twin_tmp1
208 andn %t_psr, %twin_tmp1, %t_psr
204 wr %t_psr, 0x0, %psr 209 wr %t_psr, 0x0, %psr
205 WRITE_PAUSE 210 WRITE_PAUSE
206 211
diff --git a/arch/sparc/kernel/signal.c b/arch/sparc/kernel/signal.c
index 3c312290c3c2..3fd1df9f9ba7 100644
--- a/arch/sparc/kernel/signal.c
+++ b/arch/sparc/kernel/signal.c
@@ -145,6 +145,9 @@ asmlinkage void do_sigreturn(struct pt_regs *regs)
145 regs->psr = (up_psr & ~(PSR_ICC | PSR_EF)) 145 regs->psr = (up_psr & ~(PSR_ICC | PSR_EF))
146 | (regs->psr & (PSR_ICC | PSR_EF)); 146 | (regs->psr & (PSR_ICC | PSR_EF));
147 147
148 /* Prevent syscall restart. */
149 pt_regs_clear_syscall(regs);
150
148 err |= __get_user(fpu_save, &sf->fpu_save); 151 err |= __get_user(fpu_save, &sf->fpu_save);
149 152
150 if (fpu_save) 153 if (fpu_save)
@@ -199,6 +202,9 @@ asmlinkage void do_rt_sigreturn(struct pt_regs *regs)
199 202
200 regs->psr = (regs->psr & ~PSR_ICC) | (psr & PSR_ICC); 203 regs->psr = (regs->psr & ~PSR_ICC) | (psr & PSR_ICC);
201 204
205 /* Prevent syscall restart. */
206 pt_regs_clear_syscall(regs);
207
202 err |= __get_user(fpu_save, &sf->fpu_save); 208 err |= __get_user(fpu_save, &sf->fpu_save);
203 209
204 if (fpu_save) 210 if (fpu_save)
@@ -245,15 +251,29 @@ static inline int invalid_frame_pointer(void __user *fp, int fplen)
245 251
246static inline void __user *get_sigframe(struct sigaction *sa, struct pt_regs *regs, unsigned long framesize) 252static inline void __user *get_sigframe(struct sigaction *sa, struct pt_regs *regs, unsigned long framesize)
247{ 253{
248 unsigned long sp; 254 unsigned long sp = regs->u_regs[UREG_FP];
249 255
250 sp = regs->u_regs[UREG_FP]; 256 /*
257 * If we are on the alternate signal stack and would overflow it, don't.
258 * Return an always-bogus address instead so we will die with SIGSEGV.
259 */
260 if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize)))
261 return (void __user *) -1L;
251 262
252 /* This is the X/Open sanctioned signal stack switching. */ 263 /* This is the X/Open sanctioned signal stack switching. */
253 if (sa->sa_flags & SA_ONSTACK) { 264 if (sa->sa_flags & SA_ONSTACK) {
254 if (!on_sig_stack(sp) && !((current->sas_ss_sp + current->sas_ss_size) & 7)) 265 if (sas_ss_flags(sp) == 0)
255 sp = current->sas_ss_sp + current->sas_ss_size; 266 sp = current->sas_ss_sp + current->sas_ss_size;
256 } 267 }
268
269 /* Always align the stack frame. This handles two cases. First,
270 * sigaltstack need not be mindful of platform specific stack
271 * alignment. Second, if we took this signal because the stack
272 * is not aligned properly, we'd like to take the signal cleanly
273 * and report that.
274 */
275 sp &= ~7UL;
276
257 return (void __user *)(sp - framesize); 277 return (void __user *)(sp - framesize);
258} 278}
259 279
@@ -493,26 +513,36 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
493 * want to handle. Thus you cannot kill init even with a SIGKILL even by 513 * want to handle. Thus you cannot kill init even with a SIGKILL even by
494 * mistake. 514 * mistake.
495 */ 515 */
496asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0, int restart_syscall) 516asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0)
497{ 517{
498 siginfo_t info;
499 struct sparc_deliver_cookie cookie;
500 struct k_sigaction ka; 518 struct k_sigaction ka;
501 int signr; 519 int restart_syscall;
502 sigset_t *oldset; 520 sigset_t *oldset;
521 siginfo_t info;
522 int signr;
503 523
504 cookie.restart_syscall = restart_syscall; 524 if (pt_regs_is_syscall(regs) && (regs->psr & PSR_C))
505 cookie.orig_i0 = orig_i0; 525 restart_syscall = 1;
526 else
527 restart_syscall = 0;
506 528
507 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 529 if (test_thread_flag(TIF_RESTORE_SIGMASK))
508 oldset = &current->saved_sigmask; 530 oldset = &current->saved_sigmask;
509 else 531 else
510 oldset = &current->blocked; 532 oldset = &current->blocked;
511 533
512 signr = get_signal_to_deliver(&info, &ka, regs, &cookie); 534 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
535
536 /* If the debugger messes with the program counter, it clears
537 * the software "in syscall" bit, directing us to not perform
538 * a syscall restart.
539 */
540 if (restart_syscall && !pt_regs_is_syscall(regs))
541 restart_syscall = 0;
542
513 if (signr > 0) { 543 if (signr > 0) {
514 if (cookie.restart_syscall) 544 if (restart_syscall)
515 syscall_restart(cookie.orig_i0, regs, &ka.sa); 545 syscall_restart(orig_i0, regs, &ka.sa);
516 handle_signal(signr, &ka, &info, oldset, regs); 546 handle_signal(signr, &ka, &info, oldset, regs);
517 547
518 /* a signal was successfully delivered; the saved 548 /* a signal was successfully delivered; the saved
@@ -524,16 +554,16 @@ asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0, int rest
524 clear_thread_flag(TIF_RESTORE_SIGMASK); 554 clear_thread_flag(TIF_RESTORE_SIGMASK);
525 return; 555 return;
526 } 556 }
527 if (cookie.restart_syscall && 557 if (restart_syscall &&
528 (regs->u_regs[UREG_I0] == ERESTARTNOHAND || 558 (regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
529 regs->u_regs[UREG_I0] == ERESTARTSYS || 559 regs->u_regs[UREG_I0] == ERESTARTSYS ||
530 regs->u_regs[UREG_I0] == ERESTARTNOINTR)) { 560 regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
531 /* replay the system call when we are done */ 561 /* replay the system call when we are done */
532 regs->u_regs[UREG_I0] = cookie.orig_i0; 562 regs->u_regs[UREG_I0] = orig_i0;
533 regs->pc -= 4; 563 regs->pc -= 4;
534 regs->npc -= 4; 564 regs->npc -= 4;
535 } 565 }
536 if (cookie.restart_syscall && 566 if (restart_syscall &&
537 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { 567 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
538 regs->u_regs[UREG_G1] = __NR_restart_syscall; 568 regs->u_regs[UREG_G1] = __NR_restart_syscall;
539 regs->pc -= 4; 569 regs->pc -= 4;
@@ -585,27 +615,3 @@ do_sys_sigstack(struct sigstack __user *ssptr, struct sigstack __user *ossptr,
585out: 615out:
586 return ret; 616 return ret;
587} 617}
588
589void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
590{
591 struct sparc_deliver_cookie *cp = cookie;
592
593 if (cp->restart_syscall &&
594 (regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
595 regs->u_regs[UREG_I0] == ERESTARTSYS ||
596 regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
597 /* replay the system call when we are done */
598 regs->u_regs[UREG_I0] = cp->orig_i0;
599 regs->pc -= 4;
600 regs->npc -= 4;
601 cp->restart_syscall = 0;
602 }
603
604 if (cp->restart_syscall &&
605 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
606 regs->u_regs[UREG_G1] = __NR_restart_syscall;
607 regs->pc -= 4;
608 regs->npc -= 4;
609 cp->restart_syscall = 0;
610 }
611}
diff --git a/arch/sparc/kernel/sys_sparc.c b/arch/sparc/kernel/sys_sparc.c
index f188b5dc9fd0..3c6b49a53ae8 100644
--- a/arch/sparc/kernel/sys_sparc.c
+++ b/arch/sparc/kernel/sys_sparc.c
@@ -219,12 +219,11 @@ out:
219 return err; 219 return err;
220} 220}
221 221
222int sparc_mmap_check(unsigned long addr, unsigned long len, unsigned long flags) 222int sparc_mmap_check(unsigned long addr, unsigned long len)
223{ 223{
224 if (ARCH_SUN4C_SUN4 && 224 if (ARCH_SUN4C_SUN4 &&
225 (len > 0x20000000 || 225 (len > 0x20000000 ||
226 ((flags & MAP_FIXED) && 226 (addr < 0xe0000000 && addr + len > 0x20000000)))
227 addr < 0xe0000000 && addr + len > 0x20000000)))
228 return -EINVAL; 227 return -EINVAL;
229 228
230 /* See asm-sparc/uaccess.h */ 229 /* See asm-sparc/uaccess.h */
@@ -296,52 +295,14 @@ asmlinkage unsigned long sparc_mremap(unsigned long addr,
296 unsigned long old_len, unsigned long new_len, 295 unsigned long old_len, unsigned long new_len,
297 unsigned long flags, unsigned long new_addr) 296 unsigned long flags, unsigned long new_addr)
298{ 297{
299 struct vm_area_struct *vma;
300 unsigned long ret = -EINVAL; 298 unsigned long ret = -EINVAL;
301 if (ARCH_SUN4C_SUN4) { 299
302 if (old_len > 0x20000000 || new_len > 0x20000000) 300 if (unlikely(sparc_mmap_check(addr, old_len)))
303 goto out; 301 goto out;
304 if (addr < 0xe0000000 && addr + old_len > 0x20000000) 302 if (unlikely(sparc_mmap_check(new_addr, new_len)))
305 goto out;
306 }
307 if (old_len > TASK_SIZE - PAGE_SIZE ||
308 new_len > TASK_SIZE - PAGE_SIZE)
309 goto out; 303 goto out;
310 down_write(&current->mm->mmap_sem); 304 down_write(&current->mm->mmap_sem);
311 if (flags & MREMAP_FIXED) {
312 if (ARCH_SUN4C_SUN4 &&
313 new_addr < 0xe0000000 &&
314 new_addr + new_len > 0x20000000)
315 goto out_sem;
316 if (new_addr + new_len > TASK_SIZE - PAGE_SIZE)
317 goto out_sem;
318 } else if ((ARCH_SUN4C_SUN4 && addr < 0xe0000000 &&
319 addr + new_len > 0x20000000) ||
320 addr + new_len > TASK_SIZE - PAGE_SIZE) {
321 unsigned long map_flags = 0;
322 struct file *file = NULL;
323
324 ret = -ENOMEM;
325 if (!(flags & MREMAP_MAYMOVE))
326 goto out_sem;
327
328 vma = find_vma(current->mm, addr);
329 if (vma) {
330 if (vma->vm_flags & VM_SHARED)
331 map_flags |= MAP_SHARED;
332 file = vma->vm_file;
333 }
334
335 new_addr = get_unmapped_area(file, addr, new_len,
336 vma ? vma->vm_pgoff : 0,
337 map_flags);
338 ret = new_addr;
339 if (new_addr & ~PAGE_MASK)
340 goto out_sem;
341 flags |= MREMAP_FIXED;
342 }
343 ret = do_mremap(addr, old_len, new_len, flags, new_addr); 305 ret = do_mremap(addr, old_len, new_len, flags, new_addr);
344out_sem:
345 up_write(&current->mm->mmap_sem); 306 up_write(&current->mm->mmap_sem);
346out: 307out:
347 return ret; 308 return ret;
diff --git a/arch/sparc64/kernel/etrap.S b/arch/sparc64/kernel/etrap.S
index b49d3b60bc0c..f25e1da3fd03 100644
--- a/arch/sparc64/kernel/etrap.S
+++ b/arch/sparc64/kernel/etrap.S
@@ -27,11 +27,12 @@
27 27
28 .text 28 .text
29 .align 64 29 .align 64
30 .globl etrap, etrap_irq, etraptl1 30 .globl etrap_syscall, etrap, etrap_irq, etraptl1
31etrap: rdpr %pil, %g2 31etrap: rdpr %pil, %g2
32etrap_irq: 32etrap_irq: clr %g3
33 TRAP_LOAD_THREAD_REG(%g6, %g1) 33etrap_syscall: TRAP_LOAD_THREAD_REG(%g6, %g1)
34 rdpr %tstate, %g1 34 rdpr %tstate, %g1
35 or %g1, %g3, %g1
35 sllx %g2, 20, %g3 36 sllx %g2, 20, %g3
36 andcc %g1, TSTATE_PRIV, %g0 37 andcc %g1, TSTATE_PRIV, %g0
37 or %g1, %g3, %g1 38 or %g1, %g3, %g1
diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c
index 500ac6d483a0..4129c0449856 100644
--- a/arch/sparc64/kernel/process.c
+++ b/arch/sparc64/kernel/process.c
@@ -503,6 +503,8 @@ asmlinkage long sparc_do_fork(unsigned long clone_flags,
503 unsigned long stack_size) 503 unsigned long stack_size)
504{ 504{
505 int __user *parent_tid_ptr, *child_tid_ptr; 505 int __user *parent_tid_ptr, *child_tid_ptr;
506 unsigned long orig_i1 = regs->u_regs[UREG_I1];
507 long ret;
506 508
507#ifdef CONFIG_COMPAT 509#ifdef CONFIG_COMPAT
508 if (test_thread_flag(TIF_32BIT)) { 510 if (test_thread_flag(TIF_32BIT)) {
@@ -515,9 +517,19 @@ asmlinkage long sparc_do_fork(unsigned long clone_flags,
515 child_tid_ptr = (int __user *) regs->u_regs[UREG_I4]; 517 child_tid_ptr = (int __user *) regs->u_regs[UREG_I4];
516 } 518 }
517 519
518 return do_fork(clone_flags, stack_start, 520 ret = do_fork(clone_flags, stack_start,
519 regs, stack_size, 521 regs, stack_size,
520 parent_tid_ptr, child_tid_ptr); 522 parent_tid_ptr, child_tid_ptr);
523
524 /* If we get an error and potentially restart the system
525 * call, we're screwed because copy_thread() clobbered
526 * the parent's %o1. So detect that case and restore it
527 * here.
528 */
529 if ((unsigned long)ret >= -ERESTART_RESTARTBLOCK)
530 regs->u_regs[UREG_I1] = orig_i1;
531
532 return ret;
521} 533}
522 534
523/* Copy a Sparc thread. The fork() return value conventions 535/* Copy a Sparc thread. The fork() return value conventions
diff --git a/arch/sparc64/kernel/ptrace.c b/arch/sparc64/kernel/ptrace.c
index e9fc0aa2da38..f6c9fc92921d 100644
--- a/arch/sparc64/kernel/ptrace.c
+++ b/arch/sparc64/kernel/ptrace.c
@@ -287,11 +287,11 @@ static int genregs64_set(struct task_struct *target,
287 32 * sizeof(u64), 287 32 * sizeof(u64),
288 33 * sizeof(u64)); 288 33 * sizeof(u64));
289 if (!ret) { 289 if (!ret) {
290 /* Only the condition codes can be modified 290 /* Only the condition codes and the "in syscall"
291 * in the %tstate register. 291 * state can be modified in the %tstate register.
292 */ 292 */
293 tstate &= (TSTATE_ICC | TSTATE_XCC); 293 tstate &= (TSTATE_ICC | TSTATE_XCC | TSTATE_SYSCALL);
294 regs->tstate &= ~(TSTATE_ICC | TSTATE_XCC); 294 regs->tstate &= ~(TSTATE_ICC | TSTATE_XCC | TSTATE_SYSCALL);
295 regs->tstate |= tstate; 295 regs->tstate |= tstate;
296 } 296 }
297 } 297 }
@@ -657,8 +657,10 @@ static int genregs32_set(struct task_struct *target,
657 switch (pos) { 657 switch (pos) {
658 case 32: /* PSR */ 658 case 32: /* PSR */
659 tstate = regs->tstate; 659 tstate = regs->tstate;
660 tstate &= ~(TSTATE_ICC | TSTATE_XCC); 660 tstate &= ~(TSTATE_ICC | TSTATE_XCC | TSTATE_SYSCALL);
661 tstate |= psr_to_tstate_icc(reg); 661 tstate |= psr_to_tstate_icc(reg);
662 if (reg & PSR_SYSCALL)
663 tstate |= TSTATE_SYSCALL;
662 regs->tstate = tstate; 664 regs->tstate = tstate;
663 break; 665 break;
664 case 33: /* PC */ 666 case 33: /* PC */
@@ -944,6 +946,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
944 break; 946 break;
945 947
946 default: 948 default:
949 if (request == PTRACE_SPARC_DETACH)
950 request = PTRACE_DETACH;
947 ret = compat_ptrace_request(child, request, addr, data); 951 ret = compat_ptrace_request(child, request, addr, data);
948 break; 952 break;
949 } 953 }
@@ -1036,6 +1040,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1036 break; 1040 break;
1037 1041
1038 default: 1042 default:
1043 if (request == PTRACE_SPARC_DETACH)
1044 request = PTRACE_DETACH;
1039 ret = ptrace_request(child, request, addr, data); 1045 ret = ptrace_request(child, request, addr, data);
1040 break; 1046 break;
1041 } 1047 }
diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc64/kernel/rtrap.S
index ecf6753b204a..16689b2930db 100644
--- a/arch/sparc64/kernel/rtrap.S
+++ b/arch/sparc64/kernel/rtrap.S
@@ -46,7 +46,7 @@ __handle_user_windows:
46 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate 46 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
47 ldx [%g6 + TI_FLAGS], %l0 47 ldx [%g6 + TI_FLAGS], %l0
48 48
491: andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0 491: andcc %l0, _TIF_SIGPENDING, %g0
50 be,pt %xcc, __handle_user_windows_continue 50 be,pt %xcc, __handle_user_windows_continue
51 nop 51 nop
52 mov %l5, %o1 52 mov %l5, %o1
@@ -86,7 +86,7 @@ __handle_perfctrs:
86 wrpr %g0, RTRAP_PSTATE, %pstate 86 wrpr %g0, RTRAP_PSTATE, %pstate
87 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate 87 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
88 ldx [%g6 + TI_FLAGS], %l0 88 ldx [%g6 + TI_FLAGS], %l0
891: andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0 891: andcc %l0, _TIF_SIGPENDING, %g0
90 90
91 be,pt %xcc, __handle_perfctrs_continue 91 be,pt %xcc, __handle_perfctrs_continue
92 sethi %hi(TSTATE_PEF), %o0 92 sethi %hi(TSTATE_PEF), %o0
@@ -195,7 +195,7 @@ __handle_preemption_continue:
195 andcc %l1, %o0, %g0 195 andcc %l1, %o0, %g0
196 andcc %l0, _TIF_NEED_RESCHED, %g0 196 andcc %l0, _TIF_NEED_RESCHED, %g0
197 bne,pn %xcc, __handle_preemption 197 bne,pn %xcc, __handle_preemption
198 andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0 198 andcc %l0, _TIF_SIGPENDING, %g0
199 bne,pn %xcc, __handle_signal 199 bne,pn %xcc, __handle_signal
200__handle_signal_continue: 200__handle_signal_continue:
201 ldub [%g6 + TI_WSAVED], %o2 201 ldub [%g6 + TI_WSAVED], %o2
@@ -257,6 +257,7 @@ rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
257 wr %o3, %g0, %y 257 wr %o3, %g0, %y
258 wrpr %l4, 0x0, %pil 258 wrpr %l4, 0x0, %pil
259 wrpr %g0, 0x1, %tl 259 wrpr %g0, 0x1, %tl
260 andn %l1, TSTATE_SYSCALL, %l1
260 wrpr %l1, %g0, %tstate 261 wrpr %l1, %g0, %tstate
261 wrpr %l2, %g0, %tpc 262 wrpr %l2, %g0, %tpc
262 wrpr %o2, %g0, %tnpc 263 wrpr %o2, %g0, %tnpc
diff --git a/arch/sparc64/kernel/signal.c b/arch/sparc64/kernel/signal.c
index 45d6bf632daa..6e4dc67d16af 100644
--- a/arch/sparc64/kernel/signal.c
+++ b/arch/sparc64/kernel/signal.c
@@ -247,7 +247,9 @@ static long _sigpause_common(old_sigset_t set)
247 247
248 current->state = TASK_INTERRUPTIBLE; 248 current->state = TASK_INTERRUPTIBLE;
249 schedule(); 249 schedule();
250 set_thread_flag(TIF_RESTORE_SIGMASK); 250
251 set_restore_sigmask();
252
251 return -ERESTARTNOHAND; 253 return -ERESTARTNOHAND;
252} 254}
253 255
@@ -333,7 +335,7 @@ void do_rt_sigreturn(struct pt_regs *regs)
333 regs->tnpc = tnpc; 335 regs->tnpc = tnpc;
334 336
335 /* Prevent syscall restart. */ 337 /* Prevent syscall restart. */
336 pt_regs_clear_trap_type(regs); 338 pt_regs_clear_syscall(regs);
337 339
338 sigdelsetmask(&set, ~_BLOCKABLE); 340 sigdelsetmask(&set, ~_BLOCKABLE);
339 spin_lock_irq(&current->sighand->siglock); 341 spin_lock_irq(&current->sighand->siglock);
@@ -376,16 +378,29 @@ save_fpu_state(struct pt_regs *regs, __siginfo_fpu_t __user *fpu)
376 378
377static inline void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, unsigned long framesize) 379static inline void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, unsigned long framesize)
378{ 380{
379 unsigned long sp; 381 unsigned long sp = regs->u_regs[UREG_FP] + STACK_BIAS;
380 382
381 sp = regs->u_regs[UREG_FP] + STACK_BIAS; 383 /*
384 * If we are on the alternate signal stack and would overflow it, don't.
385 * Return an always-bogus address instead so we will die with SIGSEGV.
386 */
387 if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize)))
388 return (void __user *) -1L;
382 389
383 /* This is the X/Open sanctioned signal stack switching. */ 390 /* This is the X/Open sanctioned signal stack switching. */
384 if (ka->sa.sa_flags & SA_ONSTACK) { 391 if (ka->sa.sa_flags & SA_ONSTACK) {
385 if (!on_sig_stack(sp) && 392 if (sas_ss_flags(sp) == 0)
386 !((current->sas_ss_sp + current->sas_ss_size) & 7))
387 sp = current->sas_ss_sp + current->sas_ss_size; 393 sp = current->sas_ss_sp + current->sas_ss_size;
388 } 394 }
395
396 /* Always align the stack frame. This handles two cases. First,
397 * sigaltstack need not be mindful of platform specific stack
398 * alignment. Second, if we took this signal because the stack
399 * is not aligned properly, we'd like to take the signal cleanly
400 * and report that.
401 */
402 sp &= ~7UL;
403
389 return (void __user *)(sp - framesize); 404 return (void __user *)(sp - framesize);
390} 405}
391 406
@@ -486,7 +501,7 @@ static inline void handle_signal(unsigned long signr, struct k_sigaction *ka,
486} 501}
487 502
488static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, 503static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
489 struct sigaction *sa) 504 struct sigaction *sa)
490{ 505{
491 switch (regs->u_regs[UREG_I0]) { 506 switch (regs->u_regs[UREG_I0]) {
492 case ERESTART_RESTARTBLOCK: 507 case ERESTART_RESTARTBLOCK:
@@ -512,21 +527,19 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs,
512 */ 527 */
513static void do_signal(struct pt_regs *regs, unsigned long orig_i0) 528static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
514{ 529{
515 struct signal_deliver_cookie cookie;
516 struct k_sigaction ka; 530 struct k_sigaction ka;
531 int restart_syscall;
517 sigset_t *oldset; 532 sigset_t *oldset;
518 siginfo_t info; 533 siginfo_t info;
519 int signr; 534 int signr;
520 535
521 if (pt_regs_is_syscall(regs) && 536 if (pt_regs_is_syscall(regs) &&
522 (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) { 537 (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY))) {
523 pt_regs_clear_trap_type(regs); 538 restart_syscall = 1;
524 cookie.restart_syscall = 1;
525 } else 539 } else
526 cookie.restart_syscall = 0; 540 restart_syscall = 0;
527 cookie.orig_i0 = orig_i0;
528 541
529 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 542 if (current_thread_info()->status & TS_RESTORE_SIGMASK)
530 oldset = &current->saved_sigmask; 543 oldset = &current->saved_sigmask;
531 else 544 else
532 oldset = &current->blocked; 545 oldset = &current->blocked;
@@ -534,77 +547,62 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0)
534#ifdef CONFIG_COMPAT 547#ifdef CONFIG_COMPAT
535 if (test_thread_flag(TIF_32BIT)) { 548 if (test_thread_flag(TIF_32BIT)) {
536 extern void do_signal32(sigset_t *, struct pt_regs *, 549 extern void do_signal32(sigset_t *, struct pt_regs *,
537 struct signal_deliver_cookie *); 550 int restart_syscall,
538 do_signal32(oldset, regs, &cookie); 551 unsigned long orig_i0);
552 do_signal32(oldset, regs, restart_syscall, orig_i0);
539 return; 553 return;
540 } 554 }
541#endif 555#endif
542 556
543 signr = get_signal_to_deliver(&info, &ka, regs, &cookie); 557 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
558
559 /* If the debugger messes with the program counter, it clears
560 * the software "in syscall" bit, directing us to not perform
561 * a syscall restart.
562 */
563 if (restart_syscall && !pt_regs_is_syscall(regs))
564 restart_syscall = 0;
565
544 if (signr > 0) { 566 if (signr > 0) {
545 if (cookie.restart_syscall) 567 if (restart_syscall)
546 syscall_restart(cookie.orig_i0, regs, &ka.sa); 568 syscall_restart(orig_i0, regs, &ka.sa);
547 handle_signal(signr, &ka, &info, oldset, regs); 569 handle_signal(signr, &ka, &info, oldset, regs);
548 570
549 /* a signal was successfully delivered; the saved 571 /* A signal was successfully delivered; the saved
550 * sigmask will have been stored in the signal frame, 572 * sigmask will have been stored in the signal frame,
551 * and will be restored by sigreturn, so we can simply 573 * and will be restored by sigreturn, so we can simply
552 * clear the TIF_RESTORE_SIGMASK flag. 574 * clear the TS_RESTORE_SIGMASK flag.
553 */ 575 */
554 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 576 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
555 clear_thread_flag(TIF_RESTORE_SIGMASK);
556 return; 577 return;
557 } 578 }
558 if (cookie.restart_syscall && 579 if (restart_syscall &&
559 (regs->u_regs[UREG_I0] == ERESTARTNOHAND || 580 (regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
560 regs->u_regs[UREG_I0] == ERESTARTSYS || 581 regs->u_regs[UREG_I0] == ERESTARTSYS ||
561 regs->u_regs[UREG_I0] == ERESTARTNOINTR)) { 582 regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
562 /* replay the system call when we are done */ 583 /* replay the system call when we are done */
563 regs->u_regs[UREG_I0] = cookie.orig_i0; 584 regs->u_regs[UREG_I0] = orig_i0;
564 regs->tpc -= 4; 585 regs->tpc -= 4;
565 regs->tnpc -= 4; 586 regs->tnpc -= 4;
566 } 587 }
567 if (cookie.restart_syscall && 588 if (restart_syscall &&
568 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { 589 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
569 regs->u_regs[UREG_G1] = __NR_restart_syscall; 590 regs->u_regs[UREG_G1] = __NR_restart_syscall;
570 regs->tpc -= 4; 591 regs->tpc -= 4;
571 regs->tnpc -= 4; 592 regs->tnpc -= 4;
572 } 593 }
573 594
574 /* if there's no signal to deliver, we just put the saved sigmask 595 /* If there's no signal to deliver, we just put the saved sigmask
575 * back 596 * back
576 */ 597 */
577 if (test_thread_flag(TIF_RESTORE_SIGMASK)) { 598 if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
578 clear_thread_flag(TIF_RESTORE_SIGMASK); 599 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
579 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 600 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
580 } 601 }
581} 602}
582 603
583void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long thread_info_flags) 604void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long thread_info_flags)
584{ 605{
585 if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)) 606 if (thread_info_flags & _TIF_SIGPENDING)
586 do_signal(regs, orig_i0); 607 do_signal(regs, orig_i0);
587} 608}
588
589void ptrace_signal_deliver(struct pt_regs *regs, void *cookie)
590{
591 struct signal_deliver_cookie *cp = cookie;
592
593 if (cp->restart_syscall &&
594 (regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
595 regs->u_regs[UREG_I0] == ERESTARTSYS ||
596 regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
597 /* replay the system call when we are done */
598 regs->u_regs[UREG_I0] = cp->orig_i0;
599 regs->tpc -= 4;
600 regs->tnpc -= 4;
601 cp->restart_syscall = 0;
602 }
603 if (cp->restart_syscall &&
604 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
605 regs->u_regs[UREG_G1] = __NR_restart_syscall;
606 regs->tpc -= 4;
607 regs->tnpc -= 4;
608 cp->restart_syscall = 0;
609 }
610}
diff --git a/arch/sparc64/kernel/signal32.c b/arch/sparc64/kernel/signal32.c
index 9415d2c918c5..97cdd1bf4a10 100644
--- a/arch/sparc64/kernel/signal32.c
+++ b/arch/sparc64/kernel/signal32.c
@@ -269,7 +269,7 @@ void do_sigreturn32(struct pt_regs *regs)
269 regs->tstate |= psr_to_tstate_icc(psr); 269 regs->tstate |= psr_to_tstate_icc(psr);
270 270
271 /* Prevent syscall restart. */ 271 /* Prevent syscall restart. */
272 pt_regs_clear_trap_type(regs); 272 pt_regs_clear_syscall(regs);
273 273
274 err |= __get_user(fpu_save, &sf->fpu_save); 274 err |= __get_user(fpu_save, &sf->fpu_save);
275 if (fpu_save) 275 if (fpu_save)
@@ -355,7 +355,7 @@ asmlinkage void do_rt_sigreturn32(struct pt_regs *regs)
355 regs->tstate |= psr_to_tstate_icc(psr); 355 regs->tstate |= psr_to_tstate_icc(psr);
356 356
357 /* Prevent syscall restart. */ 357 /* Prevent syscall restart. */
358 pt_regs_clear_trap_type(regs); 358 pt_regs_clear_syscall(regs);
359 359
360 err |= __get_user(fpu_save, &sf->fpu_save); 360 err |= __get_user(fpu_save, &sf->fpu_save);
361 if (fpu_save) 361 if (fpu_save)
@@ -406,11 +406,27 @@ static void __user *get_sigframe(struct sigaction *sa, struct pt_regs *regs, uns
406 regs->u_regs[UREG_FP] &= 0x00000000ffffffffUL; 406 regs->u_regs[UREG_FP] &= 0x00000000ffffffffUL;
407 sp = regs->u_regs[UREG_FP]; 407 sp = regs->u_regs[UREG_FP];
408 408
409 /*
410 * If we are on the alternate signal stack and would overflow it, don't.
411 * Return an always-bogus address instead so we will die with SIGSEGV.
412 */
413 if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize)))
414 return (void __user *) -1L;
415
409 /* This is the X/Open sanctioned signal stack switching. */ 416 /* This is the X/Open sanctioned signal stack switching. */
410 if (sa->sa_flags & SA_ONSTACK) { 417 if (sa->sa_flags & SA_ONSTACK) {
411 if (!on_sig_stack(sp) && !((current->sas_ss_sp + current->sas_ss_size) & 7)) 418 if (sas_ss_flags(sp) == 0)
412 sp = current->sas_ss_sp + current->sas_ss_size; 419 sp = current->sas_ss_sp + current->sas_ss_size;
413 } 420 }
421
422 /* Always align the stack frame. This handles two cases. First,
423 * sigaltstack need not be mindful of platform specific stack
424 * alignment. Second, if we took this signal because the stack
425 * is not aligned properly, we'd like to take the signal cleanly
426 * and report that.
427 */
428 sp &= ~7UL;
429
414 return (void __user *)(sp - framesize); 430 return (void __user *)(sp - framesize);
415} 431}
416 432
@@ -752,48 +768,55 @@ static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs
752 * mistake. 768 * mistake.
753 */ 769 */
754void do_signal32(sigset_t *oldset, struct pt_regs * regs, 770void do_signal32(sigset_t *oldset, struct pt_regs * regs,
755 struct signal_deliver_cookie *cookie) 771 int restart_syscall, unsigned long orig_i0)
756{ 772{
757 struct k_sigaction ka; 773 struct k_sigaction ka;
758 siginfo_t info; 774 siginfo_t info;
759 int signr; 775 int signr;
760 776
761 signr = get_signal_to_deliver(&info, &ka, regs, cookie); 777 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
778
779 /* If the debugger messes with the program counter, it clears
780 * the "in syscall" bit, directing us to not perform a syscall
781 * restart.
782 */
783 if (restart_syscall && !pt_regs_is_syscall(regs))
784 restart_syscall = 0;
785
762 if (signr > 0) { 786 if (signr > 0) {
763 if (cookie->restart_syscall) 787 if (restart_syscall)
764 syscall_restart32(cookie->orig_i0, regs, &ka.sa); 788 syscall_restart32(orig_i0, regs, &ka.sa);
765 handle_signal32(signr, &ka, &info, oldset, regs); 789 handle_signal32(signr, &ka, &info, oldset, regs);
766 790
767 /* a signal was successfully delivered; the saved 791 /* A signal was successfully delivered; the saved
768 * sigmask will have been stored in the signal frame, 792 * sigmask will have been stored in the signal frame,
769 * and will be restored by sigreturn, so we can simply 793 * and will be restored by sigreturn, so we can simply
770 * clear the TIF_RESTORE_SIGMASK flag. 794 * clear the TS_RESTORE_SIGMASK flag.
771 */ 795 */
772 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 796 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
773 clear_thread_flag(TIF_RESTORE_SIGMASK);
774 return; 797 return;
775 } 798 }
776 if (cookie->restart_syscall && 799 if (restart_syscall &&
777 (regs->u_regs[UREG_I0] == ERESTARTNOHAND || 800 (regs->u_regs[UREG_I0] == ERESTARTNOHAND ||
778 regs->u_regs[UREG_I0] == ERESTARTSYS || 801 regs->u_regs[UREG_I0] == ERESTARTSYS ||
779 regs->u_regs[UREG_I0] == ERESTARTNOINTR)) { 802 regs->u_regs[UREG_I0] == ERESTARTNOINTR)) {
780 /* replay the system call when we are done */ 803 /* replay the system call when we are done */
781 regs->u_regs[UREG_I0] = cookie->orig_i0; 804 regs->u_regs[UREG_I0] = orig_i0;
782 regs->tpc -= 4; 805 regs->tpc -= 4;
783 regs->tnpc -= 4; 806 regs->tnpc -= 4;
784 } 807 }
785 if (cookie->restart_syscall && 808 if (restart_syscall &&
786 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { 809 regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) {
787 regs->u_regs[UREG_G1] = __NR_restart_syscall; 810 regs->u_regs[UREG_G1] = __NR_restart_syscall;
788 regs->tpc -= 4; 811 regs->tpc -= 4;
789 regs->tnpc -= 4; 812 regs->tnpc -= 4;
790 } 813 }
791 814
792 /* if there's no signal to deliver, we just put the saved sigmask 815 /* If there's no signal to deliver, we just put the saved sigmask
793 * back 816 * back
794 */ 817 */
795 if (test_thread_flag(TIF_RESTORE_SIGMASK)) { 818 if (current_thread_info()->status & TS_RESTORE_SIGMASK) {
796 clear_thread_flag(TIF_RESTORE_SIGMASK); 819 current_thread_info()->status &= ~TS_RESTORE_SIGMASK;
797 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 820 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
798 } 821 }
799} 822}
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c
index 3aba47624df4..0d6403a630ac 100644
--- a/arch/sparc64/kernel/smp.c
+++ b/arch/sparc64/kernel/smp.c
@@ -865,21 +865,14 @@ void smp_call_function_client(int irq, struct pt_regs *regs)
865 void *info = call_data->info; 865 void *info = call_data->info;
866 866
867 clear_softint(1 << irq); 867 clear_softint(1 << irq);
868
869 irq_enter();
870
871 if (!call_data->wait) {
872 /* let initiator proceed after getting data */
873 atomic_inc(&call_data->finished);
874 }
875
876 func(info);
877
878 irq_exit();
879
880 if (call_data->wait) { 868 if (call_data->wait) {
881 /* let initiator proceed only after completion */ 869 /* let initiator proceed only after completion */
870 func(info);
882 atomic_inc(&call_data->finished); 871 atomic_inc(&call_data->finished);
872 } else {
873 /* let initiator proceed after getting data */
874 atomic_inc(&call_data->finished);
875 func(info);
883 } 876 }
884} 877}
885 878
@@ -1041,9 +1034,7 @@ void smp_receive_signal(int cpu)
1041 1034
1042void smp_receive_signal_client(int irq, struct pt_regs *regs) 1035void smp_receive_signal_client(int irq, struct pt_regs *regs)
1043{ 1036{
1044 irq_enter();
1045 clear_softint(1 << irq); 1037 clear_softint(1 << irq);
1046 irq_exit();
1047} 1038}
1048 1039
1049void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs) 1040void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)
@@ -1051,8 +1042,6 @@ void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)
1051 struct mm_struct *mm; 1042 struct mm_struct *mm;
1052 unsigned long flags; 1043 unsigned long flags;
1053 1044
1054 irq_enter();
1055
1056 clear_softint(1 << irq); 1045 clear_softint(1 << irq);
1057 1046
1058 /* See if we need to allocate a new TLB context because 1047 /* See if we need to allocate a new TLB context because
@@ -1072,8 +1061,6 @@ void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs)
1072 load_secondary_context(mm); 1061 load_secondary_context(mm);
1073 __flush_tlb_mm(CTX_HWBITS(mm->context), 1062 __flush_tlb_mm(CTX_HWBITS(mm->context),
1074 SECONDARY_CONTEXT); 1063 SECONDARY_CONTEXT);
1075
1076 irq_exit();
1077} 1064}
1078 1065
1079void smp_new_mmu_context_version(void) 1066void smp_new_mmu_context_version(void)
@@ -1239,8 +1226,6 @@ void smp_penguin_jailcell(int irq, struct pt_regs *regs)
1239{ 1226{
1240 clear_softint(1 << irq); 1227 clear_softint(1 << irq);
1241 1228
1242 irq_enter();
1243
1244 preempt_disable(); 1229 preempt_disable();
1245 1230
1246 __asm__ __volatile__("flushw"); 1231 __asm__ __volatile__("flushw");
@@ -1253,8 +1238,6 @@ void smp_penguin_jailcell(int irq, struct pt_regs *regs)
1253 prom_world(0); 1238 prom_world(0);
1254 1239
1255 preempt_enable(); 1240 preempt_enable();
1256
1257 irq_exit();
1258} 1241}
1259 1242
1260/* /proc/profile writes can call this, don't __init it please. */ 1243/* /proc/profile writes can call this, don't __init it please. */
diff --git a/arch/sparc64/kernel/sys_sparc.c b/arch/sparc64/kernel/sys_sparc.c
index 8d4761f15fa9..ac1bff58c1ac 100644
--- a/arch/sparc64/kernel/sys_sparc.c
+++ b/arch/sparc64/kernel/sys_sparc.c
@@ -542,20 +542,19 @@ asmlinkage long sparc64_personality(unsigned long personality)
542 return ret; 542 return ret;
543} 543}
544 544
545int sparc64_mmap_check(unsigned long addr, unsigned long len, 545int sparc64_mmap_check(unsigned long addr, unsigned long len)
546 unsigned long flags)
547{ 546{
548 if (test_thread_flag(TIF_32BIT)) { 547 if (test_thread_flag(TIF_32BIT)) {
549 if (len >= STACK_TOP32) 548 if (len >= STACK_TOP32)
550 return -EINVAL; 549 return -EINVAL;
551 550
552 if ((flags & MAP_FIXED) && addr > STACK_TOP32 - len) 551 if (addr > STACK_TOP32 - len)
553 return -EINVAL; 552 return -EINVAL;
554 } else { 553 } else {
555 if (len >= VA_EXCLUDE_START) 554 if (len >= VA_EXCLUDE_START)
556 return -EINVAL; 555 return -EINVAL;
557 556
558 if ((flags & MAP_FIXED) && invalid_64bit_range(addr, len)) 557 if (invalid_64bit_range(addr, len))
559 return -EINVAL; 558 return -EINVAL;
560 } 559 }
561 560
@@ -609,46 +608,19 @@ asmlinkage unsigned long sys64_mremap(unsigned long addr,
609 unsigned long old_len, unsigned long new_len, 608 unsigned long old_len, unsigned long new_len,
610 unsigned long flags, unsigned long new_addr) 609 unsigned long flags, unsigned long new_addr)
611{ 610{
612 struct vm_area_struct *vma;
613 unsigned long ret = -EINVAL; 611 unsigned long ret = -EINVAL;
614 612
615 if (test_thread_flag(TIF_32BIT)) 613 if (test_thread_flag(TIF_32BIT))
616 goto out; 614 goto out;
617 if (unlikely(new_len >= VA_EXCLUDE_START)) 615 if (unlikely(new_len >= VA_EXCLUDE_START))
618 goto out; 616 goto out;
619 if (unlikely(invalid_64bit_range(addr, old_len))) 617 if (unlikely(sparc64_mmap_check(addr, old_len)))
618 goto out;
619 if (unlikely(sparc64_mmap_check(new_addr, new_len)))
620 goto out; 620 goto out;
621 621
622 down_write(&current->mm->mmap_sem); 622 down_write(&current->mm->mmap_sem);
623 if (flags & MREMAP_FIXED) {
624 if (invalid_64bit_range(new_addr, new_len))
625 goto out_sem;
626 } else if (invalid_64bit_range(addr, new_len)) {
627 unsigned long map_flags = 0;
628 struct file *file = NULL;
629
630 ret = -ENOMEM;
631 if (!(flags & MREMAP_MAYMOVE))
632 goto out_sem;
633
634 vma = find_vma(current->mm, addr);
635 if (vma) {
636 if (vma->vm_flags & VM_SHARED)
637 map_flags |= MAP_SHARED;
638 file = vma->vm_file;
639 }
640
641 /* MREMAP_FIXED checked above. */
642 new_addr = get_unmapped_area(file, addr, new_len,
643 vma ? vma->vm_pgoff : 0,
644 map_flags);
645 ret = new_addr;
646 if (new_addr & ~PAGE_MASK)
647 goto out_sem;
648 flags |= MREMAP_FIXED;
649 }
650 ret = do_mremap(addr, old_len, new_len, flags, new_addr); 623 ret = do_mremap(addr, old_len, new_len, flags, new_addr);
651out_sem:
652 up_write(&current->mm->mmap_sem); 624 up_write(&current->mm->mmap_sem);
653out: 625out:
654 return ret; 626 return ret;
diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c
index 161ce4710fe7..ba5bd626b39e 100644
--- a/arch/sparc64/kernel/sys_sparc32.c
+++ b/arch/sparc64/kernel/sys_sparc32.c
@@ -236,13 +236,6 @@ asmlinkage long sys32_getegid16(void)
236 236
237/* 32-bit timeval and related flotsam. */ 237/* 32-bit timeval and related flotsam. */
238 238
239static long get_tv32(struct timeval *o, struct compat_timeval __user *i)
240{
241 return (!access_ok(VERIFY_READ, i, sizeof(*i)) ||
242 (__get_user(o->tv_sec, &i->tv_sec) |
243 __get_user(o->tv_usec, &i->tv_usec)));
244}
245
246static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i) 239static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i)
247{ 240{
248 return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) || 241 return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) ||
@@ -757,30 +750,6 @@ asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv,
757 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); 750 return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
758} 751}
759 752
760asmlinkage long sys32_utimes(char __user *filename,
761 struct compat_timeval __user *tvs)
762{
763 struct timespec tv[2];
764
765 if (tvs) {
766 struct timeval ktvs[2];
767 if (get_tv32(&ktvs[0], tvs) ||
768 get_tv32(&ktvs[1], 1+tvs))
769 return -EFAULT;
770
771 if (ktvs[0].tv_usec < 0 || ktvs[0].tv_usec >= 1000000 ||
772 ktvs[1].tv_usec < 0 || ktvs[1].tv_usec >= 1000000)
773 return -EINVAL;
774
775 tv[0].tv_sec = ktvs[0].tv_sec;
776 tv[0].tv_nsec = 1000 * ktvs[0].tv_usec;
777 tv[1].tv_sec = ktvs[1].tv_sec;
778 tv[1].tv_nsec = 1000 * ktvs[1].tv_usec;
779 }
780
781 return do_utimes(AT_FDCWD, filename, tvs ? tv : NULL, 0);
782}
783
784/* These are here just in case some old sparc32 binary calls it. */ 753/* These are here just in case some old sparc32 binary calls it. */
785asmlinkage long sys32_pause(void) 754asmlinkage long sys32_pause(void)
786{ 755{
@@ -898,44 +867,15 @@ asmlinkage unsigned long sys32_mremap(unsigned long addr,
898 unsigned long old_len, unsigned long new_len, 867 unsigned long old_len, unsigned long new_len,
899 unsigned long flags, u32 __new_addr) 868 unsigned long flags, u32 __new_addr)
900{ 869{
901 struct vm_area_struct *vma;
902 unsigned long ret = -EINVAL; 870 unsigned long ret = -EINVAL;
903 unsigned long new_addr = __new_addr; 871 unsigned long new_addr = __new_addr;
904 872
905 if (old_len > STACK_TOP32 || new_len > STACK_TOP32) 873 if (unlikely(sparc64_mmap_check(addr, old_len)))
906 goto out; 874 goto out;
907 if (addr > STACK_TOP32 - old_len) 875 if (unlikely(sparc64_mmap_check(new_addr, new_len)))
908 goto out; 876 goto out;
909 down_write(&current->mm->mmap_sem); 877 down_write(&current->mm->mmap_sem);
910 if (flags & MREMAP_FIXED) {
911 if (new_addr > STACK_TOP32 - new_len)
912 goto out_sem;
913 } else if (addr > STACK_TOP32 - new_len) {
914 unsigned long map_flags = 0;
915 struct file *file = NULL;
916
917 ret = -ENOMEM;
918 if (!(flags & MREMAP_MAYMOVE))
919 goto out_sem;
920
921 vma = find_vma(current->mm, addr);
922 if (vma) {
923 if (vma->vm_flags & VM_SHARED)
924 map_flags |= MAP_SHARED;
925 file = vma->vm_file;
926 }
927
928 /* MREMAP_FIXED checked above. */
929 new_addr = get_unmapped_area(file, addr, new_len,
930 vma ? vma->vm_pgoff : 0,
931 map_flags);
932 ret = new_addr;
933 if (new_addr & ~PAGE_MASK)
934 goto out_sem;
935 flags |= MREMAP_FIXED;
936 }
937 ret = do_mremap(addr, old_len, new_len, flags, new_addr); 878 ret = do_mremap(addr, old_len, new_len, flags, new_addr);
938out_sem:
939 up_write(&current->mm->mmap_sem); 879 up_write(&current->mm->mmap_sem);
940out: 880out:
941 return ret; 881 return ret;
diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S
index a4fef2ba1ae1..8b5282d433c4 100644
--- a/arch/sparc64/kernel/systbls.S
+++ b/arch/sparc64/kernel/systbls.S
@@ -45,7 +45,7 @@ sys_call_table32:
45/*120*/ .word compat_sys_readv, compat_sys_writev, sys32_settimeofday, sys32_fchown16, sys_fchmod 45/*120*/ .word compat_sys_readv, compat_sys_writev, sys32_settimeofday, sys32_fchown16, sys_fchmod
46 .word sys_nis_syscall, sys32_setreuid16, sys32_setregid16, sys_rename, sys_truncate 46 .word sys_nis_syscall, sys32_setreuid16, sys32_setregid16, sys_rename, sys_truncate
47/*130*/ .word sys_ftruncate, sys_flock, compat_sys_lstat64, sys_nis_syscall, sys_nis_syscall 47/*130*/ .word sys_ftruncate, sys_flock, compat_sys_lstat64, sys_nis_syscall, sys_nis_syscall
48 .word sys_nis_syscall, sys32_mkdir, sys_rmdir, sys32_utimes, compat_sys_stat64 48 .word sys_nis_syscall, sys32_mkdir, sys_rmdir, compat_sys_utimes, compat_sys_stat64
49/*140*/ .word sys32_sendfile64, sys_nis_syscall, sys32_futex, sys_gettid, compat_sys_getrlimit 49/*140*/ .word sys32_sendfile64, sys_nis_syscall, sys32_futex, sys_gettid, compat_sys_getrlimit
50 .word compat_sys_setrlimit, sys_pivot_root, sys32_prctl, sys_pciconfig_read, sys_pciconfig_write 50 .word compat_sys_setrlimit, sys_pivot_root, sys32_prctl, sys_pciconfig_read, sys_pciconfig_write
51/*150*/ .word sys_nis_syscall, sys_inotify_init, sys_inotify_add_watch, sys_poll, sys_getdents64 51/*150*/ .word sys_nis_syscall, sys_inotify_init, sys_inotify_add_watch, sys_poll, sys_getdents64
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 4cad0b32b0af..a9828d748e2c 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -610,8 +610,6 @@ static void __init remap_kernel(void)
610 610
611static void __init inherit_prom_mappings(void) 611static void __init inherit_prom_mappings(void)
612{ 612{
613 read_obp_translations();
614
615 /* Now fixup OBP's idea about where we really are mapped. */ 613 /* Now fixup OBP's idea about where we really are mapped. */
616 printk("Remapping the kernel... "); 614 printk("Remapping the kernel... ");
617 remap_kernel(); 615 remap_kernel();
@@ -771,6 +769,9 @@ static void __init find_ramdisk(unsigned long phys_base)
771 initrd_end = ramdisk_image + sparc_ramdisk_size; 769 initrd_end = ramdisk_image + sparc_ramdisk_size;
772 770
773 lmb_reserve(initrd_start, initrd_end); 771 lmb_reserve(initrd_start, initrd_end);
772
773 initrd_start += PAGE_OFFSET;
774 initrd_end += PAGE_OFFSET;
774 } 775 }
775#endif 776#endif
776} 777}
@@ -1744,7 +1745,17 @@ void __init paging_init(void)
1744 1745
1745 lmb_init(); 1746 lmb_init();
1746 1747
1747 /* Find available physical memory... */ 1748 /* Find available physical memory...
1749 *
1750 * Read it twice in order to work around a bug in openfirmware.
1751 * The call to grab this table itself can cause openfirmware to
1752 * allocate memory, which in turn can take away some space from
1753 * the list of available memory. Reading it twice makes sure
1754 * we really do get the final value.
1755 */
1756 read_obp_translations();
1757 read_obp_memory("reg", &pall[0], &pall_ents);
1758 read_obp_memory("available", &pavail[0], &pavail_ents);
1748 read_obp_memory("available", &pavail[0], &pavail_ents); 1759 read_obp_memory("available", &pavail[0], &pavail_ents);
1749 1760
1750 phys_base = 0xffffffffffffffffUL; 1761 phys_base = 0xffffffffffffffffUL;
@@ -1785,8 +1796,6 @@ void __init paging_init(void)
1785 1796
1786 inherit_prom_mappings(); 1797 inherit_prom_mappings();
1787 1798
1788 read_obp_memory("reg", &pall[0], &pall_ents);
1789
1790 init_kpte_bitmap(); 1799 init_kpte_bitmap();
1791 1800
1792 /* Ok, we can use our TLB miss and window trap handlers safely. */ 1801 /* Ok, we can use our TLB miss and window trap handlers safely. */
@@ -2362,16 +2371,3 @@ void __flush_tlb_all(void)
2362 __asm__ __volatile__("wrpr %0, 0, %%pstate" 2371 __asm__ __volatile__("wrpr %0, 0, %%pstate"
2363 : : "r" (pstate)); 2372 : : "r" (pstate));
2364} 2373}
2365
2366#ifdef CONFIG_MEMORY_HOTPLUG
2367
2368void online_page(struct page *page)
2369{
2370 ClearPageReserved(page);
2371 init_page_count(page);
2372 __free_page(page);
2373 totalram_pages++;
2374 num_physpages++;
2375}
2376
2377#endif /* CONFIG_MEMORY_HOTPLUG */
diff --git a/arch/um/Kconfig.char b/arch/um/Kconfig.char
index 3a4b396d7979..1b238ebae6b3 100644
--- a/arch/um/Kconfig.char
+++ b/arch/um/Kconfig.char
@@ -145,14 +145,14 @@ config LEGACY_PTYS
145 systems, it is safe to say N. 145 systems, it is safe to say N.
146 146
147config RAW_DRIVER 147config RAW_DRIVER
148 tristate "RAW driver (/dev/raw/rawN) (OBSOLETE)" 148 tristate "RAW driver (/dev/raw/rawN)"
149 depends on BLOCK
149 help 150 help
150 The raw driver permits block devices to be bound to /dev/raw/rawN. 151 The raw driver permits block devices to be bound to /dev/raw/rawN.
151 Once bound, I/O against /dev/raw/rawN uses efficient zero-copy I/O. 152 Once bound, I/O against /dev/raw/rawN uses efficient zero-copy I/O.
152 See the raw(8) manpage for more details. 153 See the raw(8) manpage for more details.
153 154
154 The raw driver is deprecated and will be removed soon. 155 Applications should preferably open the device (eg /dev/hda1)
155 Applications should simply open the device (eg /dev/hda1)
156 with the O_DIRECT flag. 156 with the O_DIRECT flag.
157 157
158config MAX_RAW_DEVS 158config MAX_RAW_DEVS
diff --git a/arch/um/Makefile b/arch/um/Makefile
index 01b97c19a8ba..dbeab15e7bb7 100644
--- a/arch/um/Makefile
+++ b/arch/um/Makefile
@@ -77,10 +77,7 @@ include $(srctree)/$(ARCH_DIR)/Makefile-os-$(OS)
77KERNEL_DEFINES = $(strip -Derrno=kernel_errno -Dsigprocmask=kernel_sigprocmask \ 77KERNEL_DEFINES = $(strip -Derrno=kernel_errno -Dsigprocmask=kernel_sigprocmask \
78 -Dmktime=kernel_mktime $(ARCH_KERNEL_DEFINES)) 78 -Dmktime=kernel_mktime $(ARCH_KERNEL_DEFINES))
79KBUILD_CFLAGS += $(KERNEL_DEFINES) 79KBUILD_CFLAGS += $(KERNEL_DEFINES)
80# Disable unit-at-a-time mode on pre-gcc-4.0 compilers, it makes gcc use 80KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time,)
81# a lot more stack due to the lack of sharing of stacklots:
82KBUILD_CFLAGS += $(shell if [ $(call cc-version) -lt 0400 ] ; then \
83 echo $(call cc-option,-fno-unit-at-a-time); fi ;)
84 81
85PHONY += linux 82PHONY += linux
86 83
diff --git a/arch/um/drivers/chan_user.c b/arch/um/drivers/chan_user.c
index 025764089ac8..cfeb3f4a44af 100644
--- a/arch/um/drivers/chan_user.c
+++ b/arch/um/drivers/chan_user.c
@@ -11,6 +11,7 @@
11#include <termios.h> 11#include <termios.h>
12#include <sys/ioctl.h> 12#include <sys/ioctl.h>
13#include "chan_user.h" 13#include "chan_user.h"
14#include "kern_constants.h"
14#include "os.h" 15#include "os.h"
15#include "um_malloc.h" 16#include "um_malloc.h"
16#include "user.h" 17#include "user.h"
diff --git a/arch/um/drivers/cow_sys.h b/arch/um/drivers/cow_sys.h
index ca8c9e11a39b..f5701fd2ef90 100644
--- a/arch/um/drivers/cow_sys.h
+++ b/arch/um/drivers/cow_sys.h
@@ -8,7 +8,7 @@
8 8
9static inline void *cow_malloc(int size) 9static inline void *cow_malloc(int size)
10{ 10{
11 return kmalloc(size, UM_GFP_KERNEL); 11 return uml_kmalloc(size, UM_GFP_KERNEL);
12} 12}
13 13
14static inline void cow_free(void *ptr) 14static inline void cow_free(void *ptr)
diff --git a/arch/um/drivers/daemon_user.c b/arch/um/drivers/daemon_user.c
index f23c109a055c..f8e85e0bdace 100644
--- a/arch/um/drivers/daemon_user.c
+++ b/arch/um/drivers/daemon_user.c
@@ -34,7 +34,7 @@ static struct sockaddr_un *new_addr(void *name, int len)
34{ 34{
35 struct sockaddr_un *sun; 35 struct sockaddr_un *sun;
36 36
37 sun = kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL); 37 sun = uml_kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL);
38 if (sun == NULL) { 38 if (sun == NULL) {
39 printk(UM_KERN_ERR "new_addr: allocation of sockaddr_un " 39 printk(UM_KERN_ERR "new_addr: allocation of sockaddr_un "
40 "failed\n"); 40 "failed\n");
@@ -83,7 +83,7 @@ static int connect_to_switch(struct daemon_data *pri)
83 goto out_close; 83 goto out_close;
84 } 84 }
85 85
86 sun = kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL); 86 sun = uml_kmalloc(sizeof(struct sockaddr_un), UM_GFP_KERNEL);
87 if (sun == NULL) { 87 if (sun == NULL) {
88 printk(UM_KERN_ERR "new_addr: allocation of sockaddr_un " 88 printk(UM_KERN_ERR "new_addr: allocation of sockaddr_un "
89 "failed\n"); 89 "failed\n");
diff --git a/arch/um/drivers/fd.c b/arch/um/drivers/fd.c
index 0a2bb5b64b82..f5a981a16240 100644
--- a/arch/um/drivers/fd.c
+++ b/arch/um/drivers/fd.c
@@ -40,7 +40,7 @@ static void *fd_init(char *str, int device, const struct chan_opts *opts)
40 return NULL; 40 return NULL;
41 } 41 }
42 42
43 data = kmalloc(sizeof(*data), UM_GFP_KERNEL); 43 data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
44 if (data == NULL) 44 if (data == NULL)
45 return NULL; 45 return NULL;
46 46
diff --git a/arch/um/drivers/hostaudio_kern.c b/arch/um/drivers/hostaudio_kern.c
index ff1b22b69e9c..368219cc2366 100644
--- a/arch/um/drivers/hostaudio_kern.c
+++ b/arch/um/drivers/hostaudio_kern.c
@@ -154,7 +154,7 @@ static int hostaudio_ioctl(struct inode *inode, struct file *file,
154 case SNDCTL_DSP_SUBDIVIDE: 154 case SNDCTL_DSP_SUBDIVIDE:
155 case SNDCTL_DSP_SETFRAGMENT: 155 case SNDCTL_DSP_SETFRAGMENT:
156 if (get_user(data, (int __user *) arg)) 156 if (get_user(data, (int __user *) arg))
157 return EFAULT; 157 return -EFAULT;
158 break; 158 break;
159 default: 159 default:
160 break; 160 break;
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index 10b86e1cc659..5047490fc299 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -191,9 +191,9 @@ void line_flush_chars(struct tty_struct *tty)
191 line_flush_buffer(tty); 191 line_flush_buffer(tty);
192} 192}
193 193
194void line_put_char(struct tty_struct *tty, unsigned char ch) 194int line_put_char(struct tty_struct *tty, unsigned char ch)
195{ 195{
196 line_write(tty, &ch, sizeof(ch)); 196 return line_write(tty, &ch, sizeof(ch));
197} 197}
198 198
199int line_write(struct tty_struct *tty, const unsigned char *buf, int len) 199int line_write(struct tty_struct *tty, const unsigned char *buf, int len)
diff --git a/arch/um/drivers/mcast_user.c b/arch/um/drivers/mcast_user.c
index 5f647d7a7292..ee19e91568a2 100644
--- a/arch/um/drivers/mcast_user.c
+++ b/arch/um/drivers/mcast_user.c
@@ -15,6 +15,7 @@
15#include <unistd.h> 15#include <unistd.h>
16#include <errno.h> 16#include <errno.h>
17#include <netinet/in.h> 17#include <netinet/in.h>
18#include "kern_constants.h"
18#include "mcast.h" 19#include "mcast.h"
19#include "net_user.h" 20#include "net_user.h"
20#include "um_malloc.h" 21#include "um_malloc.h"
@@ -24,7 +25,7 @@ static struct sockaddr_in *new_addr(char *addr, unsigned short port)
24{ 25{
25 struct sockaddr_in *sin; 26 struct sockaddr_in *sin;
26 27
27 sin = kmalloc(sizeof(struct sockaddr_in), UM_GFP_KERNEL); 28 sin = uml_kmalloc(sizeof(struct sockaddr_in), UM_GFP_KERNEL);
28 if (sin == NULL) { 29 if (sin == NULL) {
29 printk(UM_KERN_ERR "new_addr: allocation of sockaddr_in " 30 printk(UM_KERN_ERR "new_addr: allocation of sockaddr_in "
30 "failed\n"); 31 "failed\n");
diff --git a/arch/um/drivers/net_user.c b/arch/um/drivers/net_user.c
index abf2653f5517..9415dd9e63ef 100644
--- a/arch/um/drivers/net_user.c
+++ b/arch/um/drivers/net_user.c
@@ -222,7 +222,7 @@ static void change(char *dev, char *what, unsigned char *addr,
222 netmask[2], netmask[3]); 222 netmask[2], netmask[3]);
223 223
224 output_len = UM_KERN_PAGE_SIZE; 224 output_len = UM_KERN_PAGE_SIZE;
225 output = kmalloc(output_len, UM_GFP_KERNEL); 225 output = uml_kmalloc(output_len, UM_GFP_KERNEL);
226 if (output == NULL) 226 if (output == NULL)
227 printk(UM_KERN_ERR "change : failed to allocate output " 227 printk(UM_KERN_ERR "change : failed to allocate output "
228 "buffer\n"); 228 "buffer\n");
diff --git a/arch/um/drivers/port_user.c b/arch/um/drivers/port_user.c
index d269ca387f10..b49bf56a56aa 100644
--- a/arch/um/drivers/port_user.c
+++ b/arch/um/drivers/port_user.c
@@ -47,7 +47,7 @@ static void *port_init(char *str, int device, const struct chan_opts *opts)
47 if (kern_data == NULL) 47 if (kern_data == NULL)
48 return NULL; 48 return NULL;
49 49
50 data = kmalloc(sizeof(*data), UM_GFP_KERNEL); 50 data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
51 if (data == NULL) 51 if (data == NULL)
52 goto err; 52 goto err;
53 53
diff --git a/arch/um/drivers/pty.c b/arch/um/drivers/pty.c
index 49c79dda6046..1113911dcb2b 100644
--- a/arch/um/drivers/pty.c
+++ b/arch/um/drivers/pty.c
@@ -29,7 +29,7 @@ static void *pty_chan_init(char *str, int device, const struct chan_opts *opts)
29{ 29{
30 struct pty_chan *data; 30 struct pty_chan *data;
31 31
32 data = kmalloc(sizeof(*data), UM_GFP_KERNEL); 32 data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
33 if (data == NULL) 33 if (data == NULL)
34 return NULL; 34 return NULL;
35 35
diff --git a/arch/um/drivers/random.c b/arch/um/drivers/random.c
index 71f0959c1535..4949044773ba 100644
--- a/arch/um/drivers/random.c
+++ b/arch/um/drivers/random.c
@@ -1,4 +1,5 @@
1/* Copyright (C) 2005 Jeff Dike <jdike@addtoit.com> */ 1/* Copyright (C) 2005 - 2008 Jeff Dike <jdike@{linux.intel,addtoit}.com> */
2
2/* Much of this ripped from drivers/char/hw_random.c, see there for other 3/* Much of this ripped from drivers/char/hw_random.c, see there for other
3 * copyright. 4 * copyright.
4 * 5 *
@@ -8,16 +9,18 @@
8#include <linux/sched.h> 9#include <linux/sched.h>
9#include <linux/module.h> 10#include <linux/module.h>
10#include <linux/fs.h> 11#include <linux/fs.h>
12#include <linux/interrupt.h>
11#include <linux/miscdevice.h> 13#include <linux/miscdevice.h>
12#include <linux/delay.h> 14#include <linux/delay.h>
13#include <asm/uaccess.h> 15#include <asm/uaccess.h>
16#include "irq_kern.h"
14#include "os.h" 17#include "os.h"
15 18
16/* 19/*
17 * core module and version information 20 * core module and version information
18 */ 21 */
19#define RNG_VERSION "1.0.0" 22#define RNG_VERSION "1.0.0"
20#define RNG_MODULE_NAME "random" 23#define RNG_MODULE_NAME "hw_random"
21 24
22#define RNG_MISCDEV_MINOR 183 /* official */ 25#define RNG_MISCDEV_MINOR 183 /* official */
23 26
@@ -26,47 +29,67 @@
26 * protects against a module being loaded twice at the same time. 29 * protects against a module being loaded twice at the same time.
27 */ 30 */
28static int random_fd = -1; 31static int random_fd = -1;
32static DECLARE_WAIT_QUEUE_HEAD(host_read_wait);
29 33
30static int rng_dev_open (struct inode *inode, struct file *filp) 34static int rng_dev_open (struct inode *inode, struct file *filp)
31{ 35{
32 /* enforce read-only access to this chrdev */ 36 /* enforce read-only access to this chrdev */
33 if ((filp->f_mode & FMODE_READ) == 0) 37 if ((filp->f_mode & FMODE_READ) == 0)
34 return -EINVAL; 38 return -EINVAL;
35 if (filp->f_mode & FMODE_WRITE) 39 if ((filp->f_mode & FMODE_WRITE) != 0)
36 return -EINVAL; 40 return -EINVAL;
37 41
38 return 0; 42 return 0;
39} 43}
40 44
45static atomic_t host_sleep_count = ATOMIC_INIT(0);
46
41static ssize_t rng_dev_read (struct file *filp, char __user *buf, size_t size, 47static ssize_t rng_dev_read (struct file *filp, char __user *buf, size_t size,
42 loff_t * offp) 48 loff_t *offp)
43{ 49{
44 u32 data; 50 u32 data;
45 int n, ret = 0, have_data; 51 int n, ret = 0, have_data;
46 52
47 while(size){ 53 while (size) {
48 n = os_read_file(random_fd, &data, sizeof(data)); 54 n = os_read_file(random_fd, &data, sizeof(data));
49 if(n > 0){ 55 if (n > 0) {
50 have_data = n; 56 have_data = n;
51 while (have_data && size) { 57 while (have_data && size) {
52 if (put_user((u8)data, buf++)) { 58 if (put_user((u8) data, buf++)) {
53 ret = ret ? : -EFAULT; 59 ret = ret ? : -EFAULT;
54 break; 60 break;
55 } 61 }
56 size--; 62 size--;
57 ret++; 63 ret++;
58 have_data--; 64 have_data--;
59 data>>=8; 65 data >>= 8;
60 } 66 }
61 } 67 }
62 else if(n == -EAGAIN){ 68 else if (n == -EAGAIN) {
63 if (filp->f_flags & O_NONBLOCK) 69 DECLARE_WAITQUEUE(wait, current);
64 return ret ? : -EAGAIN; 70
65 71 if (filp->f_flags & O_NONBLOCK)
66 if(need_resched()) 72 return ret ? : -EAGAIN;
67 schedule_timeout_interruptible(1); 73
68 } 74 atomic_inc(&host_sleep_count);
69 else return n; 75 reactivate_fd(random_fd, RANDOM_IRQ);
76 add_sigio_fd(random_fd);
77
78 add_wait_queue(&host_read_wait, &wait);
79 set_task_state(current, TASK_INTERRUPTIBLE);
80
81 schedule();
82 set_task_state(current, TASK_RUNNING);
83 remove_wait_queue(&host_read_wait, &wait);
84
85 if (atomic_dec_and_test(&host_sleep_count)) {
86 ignore_sigio_fd(random_fd);
87 deactivate_fd(random_fd, RANDOM_IRQ);
88 }
89 }
90 else
91 return n;
92
70 if (signal_pending (current)) 93 if (signal_pending (current))
71 return ret ? : -ERESTARTSYS; 94 return ret ? : -ERESTARTSYS;
72 } 95 }
@@ -86,6 +109,13 @@ static struct miscdevice rng_miscdev = {
86 &rng_chrdev_ops, 109 &rng_chrdev_ops,
87}; 110};
88 111
112static irqreturn_t random_interrupt(int irq, void *data)
113{
114 wake_up(&host_read_wait);
115
116 return IRQ_HANDLED;
117}
118
89/* 119/*
90 * rng_init - initialize RNG module 120 * rng_init - initialize RNG module
91 */ 121 */
@@ -93,28 +123,33 @@ static int __init rng_init (void)
93{ 123{
94 int err; 124 int err;
95 125
96 err = os_open_file("/dev/random", of_read(OPENFLAGS()), 0); 126 err = os_open_file("/dev/random", of_read(OPENFLAGS()), 0);
97 if(err < 0) 127 if (err < 0)
98 goto out; 128 goto out;
99 129
100 random_fd = err; 130 random_fd = err;
101 131
102 err = os_set_fd_block(random_fd, 0); 132 err = um_request_irq(RANDOM_IRQ, random_fd, IRQ_READ, random_interrupt,
103 if(err) 133 IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "random",
134 NULL);
135 if (err)
104 goto err_out_cleanup_hw; 136 goto err_out_cleanup_hw;
105 137
138 sigio_broken(random_fd, 1);
139
106 err = misc_register (&rng_miscdev); 140 err = misc_register (&rng_miscdev);
107 if (err) { 141 if (err) {
108 printk (KERN_ERR RNG_MODULE_NAME ": misc device register failed\n"); 142 printk (KERN_ERR RNG_MODULE_NAME ": misc device register "
143 "failed\n");
109 goto err_out_cleanup_hw; 144 goto err_out_cleanup_hw;
110 } 145 }
146out:
147 return err;
111 148
112 out: 149err_out_cleanup_hw:
113 return err; 150 os_close_file(random_fd);
114 151 random_fd = -1;
115 err_out_cleanup_hw: 152 goto out;
116 random_fd = -1;
117 goto out;
118} 153}
119 154
120/* 155/*
@@ -122,6 +157,7 @@ static int __init rng_init (void)
122 */ 157 */
123static void __exit rng_cleanup (void) 158static void __exit rng_cleanup (void)
124{ 159{
160 os_close_file(random_fd);
125 misc_deregister (&rng_miscdev); 161 misc_deregister (&rng_miscdev);
126} 162}
127 163
diff --git a/arch/um/drivers/slip_user.c b/arch/um/drivers/slip_user.c
index 8b80505a3fb0..a1c2d2c98a94 100644
--- a/arch/um/drivers/slip_user.c
+++ b/arch/um/drivers/slip_user.c
@@ -96,7 +96,7 @@ static int slip_tramp(char **argv, int fd)
96 pid = err; 96 pid = err;
97 97
98 output_len = UM_KERN_PAGE_SIZE; 98 output_len = UM_KERN_PAGE_SIZE;
99 output = kmalloc(output_len, UM_GFP_KERNEL); 99 output = uml_kmalloc(output_len, UM_GFP_KERNEL);
100 if (output == NULL) { 100 if (output == NULL) {
101 printk(UM_KERN_ERR "slip_tramp : failed to allocate output " 101 printk(UM_KERN_ERR "slip_tramp : failed to allocate output "
102 "buffer\n"); 102 "buffer\n");
diff --git a/arch/um/drivers/tty.c b/arch/um/drivers/tty.c
index c930fedc5172..495858a090e4 100644
--- a/arch/um/drivers/tty.c
+++ b/arch/um/drivers/tty.c
@@ -29,7 +29,7 @@ static void *tty_chan_init(char *str, int device, const struct chan_opts *opts)
29 } 29 }
30 str++; 30 str++;
31 31
32 data = kmalloc(sizeof(*data), UM_GFP_KERNEL); 32 data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
33 if (data == NULL) 33 if (data == NULL)
34 return NULL; 34 return NULL;
35 *data = ((struct tty_chan) { .dev = str, 35 *data = ((struct tty_chan) { .dev = str,
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 5e45e39a8a8d..44ad1607be2d 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -1178,8 +1178,8 @@ static void cowify_bitmap(__u64 io_offset, int length, unsigned long *cow_mask,
1178 * by one word. Thanks to Lynn Kerby for the fix and James McMechan 1178 * by one word. Thanks to Lynn Kerby for the fix and James McMechan
1179 * for the original diagnosis. 1179 * for the original diagnosis.
1180 */ 1180 */
1181 if(*cow_offset == ((bitmap_len + sizeof(unsigned long) - 1) / 1181 if (*cow_offset == (DIV_ROUND_UP(bitmap_len,
1182 sizeof(unsigned long) - 1)) 1182 sizeof(unsigned long)) - 1))
1183 (*cow_offset)--; 1183 (*cow_offset)--;
1184 1184
1185 bitmap_words[0] = bitmap[*cow_offset]; 1185 bitmap_words[0] = bitmap[*cow_offset];
diff --git a/arch/um/drivers/xterm.c b/arch/um/drivers/xterm.c
index 8a1c18a9b240..da2caa5a21ef 100644
--- a/arch/um/drivers/xterm.c
+++ b/arch/um/drivers/xterm.c
@@ -30,7 +30,7 @@ static void *xterm_init(char *str, int device, const struct chan_opts *opts)
30{ 30{
31 struct xterm_chan *data; 31 struct xterm_chan *data;
32 32
33 data = kmalloc(sizeof(*data), UM_GFP_KERNEL); 33 data = uml_kmalloc(sizeof(*data), UM_GFP_KERNEL);
34 if (data == NULL) 34 if (data == NULL)
35 return NULL; 35 return NULL;
36 *data = ((struct xterm_chan) { .pid = -1, 36 *data = ((struct xterm_chan) { .pid = -1,
diff --git a/arch/um/include/as-layout.h b/arch/um/include/as-layout.h
index cac542d8ff70..58e852dfb0ce 100644
--- a/arch/um/include/as-layout.h
+++ b/arch/um/include/as-layout.h
@@ -23,16 +23,16 @@
23 */ 23 */
24 24
25#ifdef __ASSEMBLY__ 25#ifdef __ASSEMBLY__
26#define _AC(X, Y) (Y) 26#define _UML_AC(X, Y) (Y)
27#else 27#else
28#define __AC(X, Y) (X (Y)) 28#define __UML_AC(X, Y) (X(Y))
29#define _AC(X, Y) __AC(X, Y) 29#define _UML_AC(X, Y) __UML_AC(X, Y)
30#endif 30#endif
31 31
32#define STUB_START _AC(, 0x100000) 32#define STUB_START _UML_AC(, 0x100000)
33#define STUB_CODE _AC((unsigned long), STUB_START) 33#define STUB_CODE _UML_AC((unsigned long), STUB_START)
34#define STUB_DATA _AC((unsigned long), STUB_CODE + UM_KERN_PAGE_SIZE) 34#define STUB_DATA _UML_AC((unsigned long), STUB_CODE + UM_KERN_PAGE_SIZE)
35#define STUB_END _AC((unsigned long), STUB_DATA + UM_KERN_PAGE_SIZE) 35#define STUB_END _UML_AC((unsigned long), STUB_DATA + UM_KERN_PAGE_SIZE)
36 36
37#ifndef __ASSEMBLY__ 37#ifndef __ASSEMBLY__
38 38
diff --git a/arch/um/include/line.h b/arch/um/include/line.h
index 1223f2c844b4..311a0d3d93af 100644
--- a/arch/um/include/line.h
+++ b/arch/um/include/line.h
@@ -58,11 +58,11 @@ struct line {
58}; 58};
59 59
60#define LINE_INIT(str, d) \ 60#define LINE_INIT(str, d) \
61 { .count_lock = SPIN_LOCK_UNLOCKED, \ 61 { .count_lock = __SPIN_LOCK_UNLOCKED((str).count_lock), \
62 .init_str = str, \ 62 .init_str = str, \
63 .init_pri = INIT_STATIC, \ 63 .init_pri = INIT_STATIC, \
64 .valid = 1, \ 64 .valid = 1, \
65 .lock = SPIN_LOCK_UNLOCKED, \ 65 .lock = __SPIN_LOCK_UNLOCKED((str).lock), \
66 .driver = d } 66 .driver = d }
67 67
68extern void line_close(struct tty_struct *tty, struct file * filp); 68extern void line_close(struct tty_struct *tty, struct file * filp);
@@ -71,7 +71,7 @@ extern int line_setup(struct line *lines, unsigned int sizeof_lines,
71 char *init, char **error_out); 71 char *init, char **error_out);
72extern int line_write(struct tty_struct *tty, const unsigned char *buf, 72extern int line_write(struct tty_struct *tty, const unsigned char *buf,
73 int len); 73 int len);
74extern void line_put_char(struct tty_struct *tty, unsigned char ch); 74extern int line_put_char(struct tty_struct *tty, unsigned char ch);
75extern void line_set_termios(struct tty_struct *tty, struct ktermios * old); 75extern void line_set_termios(struct tty_struct *tty, struct ktermios * old);
76extern int line_chars_in_buffer(struct tty_struct *tty); 76extern int line_chars_in_buffer(struct tty_struct *tty);
77extern void line_flush_buffer(struct tty_struct *tty); 77extern void line_flush_buffer(struct tty_struct *tty);
diff --git a/arch/um/include/os.h b/arch/um/include/os.h
index 32c799e3a495..e2716ac8889a 100644
--- a/arch/um/include/os.h
+++ b/arch/um/include/os.h
@@ -290,6 +290,7 @@ extern void os_set_ioignore(void);
290extern int add_sigio_fd(int fd); 290extern int add_sigio_fd(int fd);
291extern int ignore_sigio_fd(int fd); 291extern int ignore_sigio_fd(int fd);
292extern void maybe_sigio_broken(int fd, int read); 292extern void maybe_sigio_broken(int fd, int read);
293extern void sigio_broken(int fd, int read);
293 294
294/* sys-x86_64/prctl.c */ 295/* sys-x86_64/prctl.c */
295extern int os_arch_prctl(int pid, int code, unsigned long *addr); 296extern int os_arch_prctl(int pid, int code, unsigned long *addr);
diff --git a/arch/um/include/process.h b/arch/um/include/process.h
index 5af9157ff54f..bb873a51262e 100644
--- a/arch/um/include/process.h
+++ b/arch/um/include/process.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com) 2 * Copyright (C) 2000 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
@@ -8,18 +8,10 @@
8 8
9#include <signal.h> 9#include <signal.h>
10 10
11extern void sig_handler(int sig, struct sigcontext sc); 11/* Copied from linux/compiler-gcc.h since we can't include it directly */
12extern void alarm_handler(int sig, struct sigcontext sc); 12#define barrier() __asm__ __volatile__("": : :"memory")
13 13
14#endif 14extern void sig_handler(int sig, struct sigcontext *sc);
15extern void alarm_handler(int sig, struct sigcontext *sc);
15 16
16/* 17#endif
17 * Overrides for Emacs so that we follow Linus's tabbing style.
18 * Emacs will notice this stuff at the end of the file and automatically
19 * adjust the settings for this buffer only. This must remain at the end
20 * of the file.
21 * ---------------------------------------------------------------------------
22 * Local variables:
23 * c-file-style: "linux"
24 * End:
25 */
diff --git a/arch/um/include/skas_ptrace.h b/arch/um/include/skas_ptrace.h
index cd2327d09c8d..3d31bbacd016 100644
--- a/arch/um/include/skas_ptrace.h
+++ b/arch/um/include/skas_ptrace.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com) 2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
@@ -12,14 +12,3 @@
12#include "sysdep/skas_ptrace.h" 12#include "sysdep/skas_ptrace.h"
13 13
14#endif 14#endif
15
16/*
17 * Overrides for Emacs so that we follow Linus's tabbing style.
18 * Emacs will notice this stuff at the end of the file and automatically
19 * adjust the settings for this buffer only. This must remain at the end
20 * of the file.
21 * ---------------------------------------------------------------------------
22 * Local variables:
23 * c-file-style: "linux"
24 * End:
25 */
diff --git a/arch/um/include/sysdep-i386/ptrace_user.h b/arch/um/include/sysdep-i386/ptrace_user.h
index 75650723c38f..ef56247e4143 100644
--- a/arch/um/include/sysdep-i386/ptrace_user.h
+++ b/arch/um/include/sysdep-i386/ptrace_user.h
@@ -41,38 +41,10 @@
41#define PT_SP_OFFSET PT_OFFSET(UESP) 41#define PT_SP_OFFSET PT_OFFSET(UESP)
42#define PT_SP(regs) ((regs)[UESP]) 42#define PT_SP(regs) ((regs)[UESP])
43 43
44#define FP_SIZE ((HOST_XFP_SIZE > HOST_FP_SIZE) ? HOST_XFP_SIZE : HOST_FP_SIZE) 44#define FP_SIZE ((HOST_FPX_SIZE > HOST_FP_SIZE) ? HOST_FPX_SIZE : HOST_FP_SIZE)
45 45
46#ifndef FRAME_SIZE 46#ifndef FRAME_SIZE
47#define FRAME_SIZE (17) 47#define FRAME_SIZE (17)
48#endif 48#endif
49#define FRAME_SIZE_OFFSET (FRAME_SIZE * sizeof(unsigned long))
50
51#define FP_FRAME_SIZE (27)
52#define FPX_FRAME_SIZE (128)
53
54#ifdef PTRACE_GETREGS
55#define UM_HAVE_GETREGS
56#endif
57
58#ifdef PTRACE_SETREGS
59#define UM_HAVE_SETREGS
60#endif
61
62#ifdef PTRACE_GETFPREGS
63#define UM_HAVE_GETFPREGS
64#endif
65
66#ifdef PTRACE_SETFPREGS
67#define UM_HAVE_SETFPREGS
68#endif
69
70#ifdef PTRACE_GETFPXREGS
71#define UM_HAVE_GETFPXREGS
72#endif
73
74#ifdef PTRACE_SETFPXREGS
75#define UM_HAVE_SETFPXREGS
76#endif
77 49
78#endif 50#endif
diff --git a/arch/um/include/sysdep-i386/sigcontext.h b/arch/um/include/sysdep-i386/sigcontext.h
index 67e77122aa45..f583c87111a0 100644
--- a/arch/um/include/sysdep-i386/sigcontext.h
+++ b/arch/um/include/sysdep-i386/sigcontext.h
@@ -10,7 +10,7 @@
10 10
11#define IP_RESTART_SYSCALL(ip) ((ip) -= 2) 11#define IP_RESTART_SYSCALL(ip) ((ip) -= 2)
12 12
13#define GET_FAULTINFO_FROM_SC(fi,sc) \ 13#define GET_FAULTINFO_FROM_SC(fi, sc) \
14 { \ 14 { \
15 (fi).cr2 = SC_CR2(sc); \ 15 (fi).cr2 = SC_CR2(sc); \
16 (fi).error_code = SC_ERR(sc); \ 16 (fi).error_code = SC_ERR(sc); \
diff --git a/arch/um/include/sysdep-x86_64/ptrace_user.h b/arch/um/include/sysdep-x86_64/ptrace_user.h
index 45c0bd881cb3..4dbccdb58f48 100644
--- a/arch/um/include/sysdep-x86_64/ptrace_user.h
+++ b/arch/um/include/sysdep-x86_64/ptrace_user.h
@@ -48,7 +48,8 @@
48#define PT_ORIG_RAX_OFFSET (ORIG_RAX) 48#define PT_ORIG_RAX_OFFSET (ORIG_RAX)
49#define PT_ORIG_RAX(regs) ((regs)[PT_INDEX(ORIG_RAX)]) 49#define PT_ORIG_RAX(regs) ((regs)[PT_INDEX(ORIG_RAX)])
50 50
51/* x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though 51/*
52 * x86_64 FC3 doesn't define this in /usr/include/linux/ptrace.h even though
52 * it's defined in the kernel's include/linux/ptrace.h. Additionally, use the 53 * it's defined in the kernel's include/linux/ptrace.h. Additionally, use the
53 * 2.4 name and value for 2.4 host compatibility. 54 * 2.4 name and value for 2.4 host compatibility.
54 */ 55 */
@@ -56,7 +57,8 @@
56#define PTRACE_OLDSETOPTIONS 21 57#define PTRACE_OLDSETOPTIONS 21
57#endif 58#endif
58 59
59/* These are before the system call, so the system call number is RAX 60/*
61 * These are before the system call, so the system call number is RAX
60 * rather than ORIG_RAX, and arg4 is R10 rather than RCX 62 * rather than ORIG_RAX, and arg4 is R10 rather than RCX
61 */ 63 */
62#define REGS_SYSCALL_NR PT_INDEX(RAX) 64#define REGS_SYSCALL_NR PT_INDEX(RAX)
@@ -73,14 +75,3 @@
73#define FP_SIZE (HOST_FP_SIZE) 75#define FP_SIZE (HOST_FP_SIZE)
74 76
75#endif 77#endif
76
77/*
78 * Overrides for Emacs so that we follow Linus's tabbing style.
79 * Emacs will notice this stuff at the end of the file and automatically
80 * adjust the settings for this buffer only. This must remain at the end
81 * of the file.
82 * ---------------------------------------------------------------------------
83 * Local variables:
84 * c-file-style: "linux"
85 * End:
86 */
diff --git a/arch/um/include/um_malloc.h b/arch/um/include/um_malloc.h
index 0ad17cb83d96..c554d706d106 100644
--- a/arch/um/include/um_malloc.h
+++ b/arch/um/include/um_malloc.h
@@ -8,15 +8,12 @@
8 8
9#include "kern_constants.h" 9#include "kern_constants.h"
10 10
11extern void *__kmalloc(int size, int flags); 11extern void *uml_kmalloc(int size, int flags);
12static inline void *kmalloc(int size, int flags)
13{
14 return __kmalloc(size, flags);
15}
16
17extern void kfree(const void *ptr); 12extern void kfree(const void *ptr);
18 13
19extern void *vmalloc(unsigned long size); 14extern void *vmalloc(unsigned long size);
20extern void vfree(void *ptr); 15extern void vfree(void *ptr);
21 16
22#endif /* __UM_MALLOC_H__ */ 17#endif /* __UM_MALLOC_H__ */
18
19
diff --git a/arch/um/kernel/dyn.lds.S b/arch/um/kernel/dyn.lds.S
index 26090b7f323e..9975e1ab44fb 100644
--- a/arch/um/kernel/dyn.lds.S
+++ b/arch/um/kernel/dyn.lds.S
@@ -1,4 +1,5 @@
1#include <asm-generic/vmlinux.lds.h> 1#include <asm-generic/vmlinux.lds.h>
2#include <asm/page.h>
2 3
3OUTPUT_FORMAT(ELF_FORMAT) 4OUTPUT_FORMAT(ELF_FORMAT)
4OUTPUT_ARCH(ELF_ARCH) 5OUTPUT_ARCH(ELF_ARCH)
@@ -21,7 +22,7 @@ SECTIONS
21 _einittext = .; 22 _einittext = .;
22 } 23 }
23 24
24 . = ALIGN(4096); 25 . = ALIGN(PAGE_SIZE);
25 26
26 /* Read-only sections, merged into text segment: */ 27 /* Read-only sections, merged into text segment: */
27 .hash : { *(.hash) } 28 .hash : { *(.hash) }
@@ -68,9 +69,9 @@ SECTIONS
68 /* .gnu.warning sections are handled specially by elf32.em. */ 69 /* .gnu.warning sections are handled specially by elf32.em. */
69 *(.gnu.warning) 70 *(.gnu.warning)
70 71
71 . = ALIGN(4096); 72 . = ALIGN(PAGE_SIZE);
72 } =0x90909090 73 } =0x90909090
73 . = ALIGN(4096); 74 . = ALIGN(PAGE_SIZE);
74 .syscall_stub : { 75 .syscall_stub : {
75 __syscall_stub_start = .; 76 __syscall_stub_start = .;
76 *(.__syscall_stub*) 77 *(.__syscall_stub*)
diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c
index 2eea1ff235e6..b0ee64622ff7 100644
--- a/arch/um/kernel/mem.c
+++ b/arch/um/kernel/mem.c
@@ -375,3 +375,8 @@ pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
375 return pmd; 375 return pmd;
376} 376}
377#endif 377#endif
378
379void *uml_kmalloc(int size, int flags)
380{
381 return kmalloc(size, flags);
382}
diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
index 0d0cea2ac98d..c3e2f369c33c 100644
--- a/arch/um/kernel/time.c
+++ b/arch/um/kernel/time.c
@@ -75,7 +75,7 @@ static irqreturn_t um_timer(int irq, void *dev)
75 75
76static cycle_t itimer_read(void) 76static cycle_t itimer_read(void)
77{ 77{
78 return os_nsecs(); 78 return os_nsecs() / 1000;
79} 79}
80 80
81static struct clocksource itimer_clocksource = { 81static struct clocksource itimer_clocksource = {
@@ -83,7 +83,7 @@ static struct clocksource itimer_clocksource = {
83 .rating = 300, 83 .rating = 300,
84 .read = itimer_read, 84 .read = itimer_read,
85 .mask = CLOCKSOURCE_MASK(64), 85 .mask = CLOCKSOURCE_MASK(64),
86 .mult = 1, 86 .mult = 1000,
87 .shift = 0, 87 .shift = 0,
88 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 88 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
89}; 89};
diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c
index 56deed623446..9db85b2ce698 100644
--- a/arch/um/kernel/um_arch.c
+++ b/arch/um/kernel/um_arch.c
@@ -150,7 +150,7 @@ __uml_setup("root=", uml_root_setup,
150static int __init no_skas_debug_setup(char *line, int *add) 150static int __init no_skas_debug_setup(char *line, int *add)
151{ 151{
152 printf("'debug' is not necessary to gdb UML in skas mode - run \n"); 152 printf("'debug' is not necessary to gdb UML in skas mode - run \n");
153 printf("'gdb linux'"); 153 printf("'gdb linux'\n");
154 154
155 return 0; 155 return 0;
156} 156}
@@ -258,6 +258,7 @@ int __init linux_main(int argc, char **argv)
258{ 258{
259 unsigned long avail, diff; 259 unsigned long avail, diff;
260 unsigned long virtmem_size, max_physmem; 260 unsigned long virtmem_size, max_physmem;
261 unsigned long stack;
261 unsigned int i; 262 unsigned int i;
262 int add; 263 int add;
263 char * mode; 264 char * mode;
@@ -348,7 +349,9 @@ int __init linux_main(int argc, char **argv)
348 } 349 }
349 350
350 virtmem_size = physmem_size; 351 virtmem_size = physmem_size;
351 avail = TASK_SIZE - start_vm; 352 stack = (unsigned long) argv;
353 stack &= ~(1024 * 1024 - 1);
354 avail = stack - start_vm;
352 if (physmem_size > avail) 355 if (physmem_size > avail)
353 virtmem_size = avail; 356 virtmem_size = avail;
354 end_vm = start_vm + virtmem_size; 357 end_vm = start_vm + virtmem_size;
diff --git a/arch/um/kernel/uml.lds.S b/arch/um/kernel/uml.lds.S
index 5828c1d54505..11b835248b86 100644
--- a/arch/um/kernel/uml.lds.S
+++ b/arch/um/kernel/uml.lds.S
@@ -1,4 +1,5 @@
1#include <asm-generic/vmlinux.lds.h> 1#include <asm-generic/vmlinux.lds.h>
2#include <asm/page.h>
2 3
3OUTPUT_FORMAT(ELF_FORMAT) 4OUTPUT_FORMAT(ELF_FORMAT)
4OUTPUT_ARCH(ELF_ARCH) 5OUTPUT_ARCH(ELF_ARCH)
@@ -26,7 +27,7 @@ SECTIONS
26 INIT_TEXT 27 INIT_TEXT
27 _einittext = .; 28 _einittext = .;
28 } 29 }
29 . = ALIGN(4096); 30 . = ALIGN(PAGE_SIZE);
30 31
31 .text : 32 .text :
32 { 33 {
@@ -39,7 +40,7 @@ SECTIONS
39 *(.gnu.linkonce.t*) 40 *(.gnu.linkonce.t*)
40 } 41 }
41 42
42 . = ALIGN(4096); 43 . = ALIGN(PAGE_SIZE);
43 .syscall_stub : { 44 .syscall_stub : {
44 __syscall_stub_start = .; 45 __syscall_stub_start = .;
45 *(.__syscall_stub*) 46 *(.__syscall_stub*)
@@ -79,7 +80,7 @@ SECTIONS
79 .sdata : { *(.sdata) } 80 .sdata : { *(.sdata) }
80 _edata = .; 81 _edata = .;
81 PROVIDE (edata = .); 82 PROVIDE (edata = .);
82 . = ALIGN(0x1000); 83 . = ALIGN(PAGE_SIZE);
83 .sbss : 84 .sbss :
84 { 85 {
85 __bss_start = .; 86 __bss_start = .;
diff --git a/arch/um/os-Linux/drivers/ethertap_user.c b/arch/um/os-Linux/drivers/ethertap_user.c
index 6fb0b174f538..cc72cb2c1af6 100644
--- a/arch/um/os-Linux/drivers/ethertap_user.c
+++ b/arch/um/os-Linux/drivers/ethertap_user.c
@@ -52,7 +52,7 @@ static void etap_change(int op, unsigned char *addr, unsigned char *netmask,
52 return; 52 return;
53 } 53 }
54 54
55 output = kmalloc(UM_KERN_PAGE_SIZE, UM_GFP_KERNEL); 55 output = uml_kmalloc(UM_KERN_PAGE_SIZE, UM_GFP_KERNEL);
56 if (output == NULL) 56 if (output == NULL)
57 printk(UM_KERN_ERR "etap_change : Failed to allocate output " 57 printk(UM_KERN_ERR "etap_change : Failed to allocate output "
58 "buffer\n"); 58 "buffer\n");
@@ -165,7 +165,7 @@ static int etap_open(void *data)
165 err = etap_tramp(pri->dev_name, pri->gate_addr, control_fds[0], 165 err = etap_tramp(pri->dev_name, pri->gate_addr, control_fds[0],
166 control_fds[1], data_fds[0], data_fds[1]); 166 control_fds[1], data_fds[0], data_fds[1]);
167 output_len = UM_KERN_PAGE_SIZE; 167 output_len = UM_KERN_PAGE_SIZE;
168 output = kmalloc(output_len, UM_GFP_KERNEL); 168 output = uml_kmalloc(output_len, UM_GFP_KERNEL);
169 read_output(control_fds[0], output, output_len); 169 read_output(control_fds[0], output, output_len);
170 170
171 if (output == NULL) 171 if (output == NULL)
diff --git a/arch/um/os-Linux/helper.c b/arch/um/os-Linux/helper.c
index f25c29a12d00..74ca7aabf4e1 100644
--- a/arch/um/os-Linux/helper.c
+++ b/arch/um/os-Linux/helper.c
@@ -71,8 +71,8 @@ int run_helper(void (*pre_exec)(void *), void *pre_data, char **argv)
71 data.pre_data = pre_data; 71 data.pre_data = pre_data;
72 data.argv = argv; 72 data.argv = argv;
73 data.fd = fds[1]; 73 data.fd = fds[1];
74 data.buf = __cant_sleep() ? kmalloc(PATH_MAX, UM_GFP_ATOMIC) : 74 data.buf = __cant_sleep() ? uml_kmalloc(PATH_MAX, UM_GFP_ATOMIC) :
75 kmalloc(PATH_MAX, UM_GFP_KERNEL); 75 uml_kmalloc(PATH_MAX, UM_GFP_KERNEL);
76 pid = clone(helper_child, (void *) sp, CLONE_VM, &data); 76 pid = clone(helper_child, (void *) sp, CLONE_VM, &data);
77 if (pid < 0) { 77 if (pid < 0) {
78 ret = -errno; 78 ret = -errno;
diff --git a/arch/um/os-Linux/main.c b/arch/um/os-Linux/main.c
index abb9b0ffd960..eee69b9f52c9 100644
--- a/arch/um/os-Linux/main.c
+++ b/arch/um/os-Linux/main.c
@@ -199,7 +199,7 @@ void *__wrap_malloc(int size)
199 return __real_malloc(size); 199 return __real_malloc(size);
200 else if (size <= UM_KERN_PAGE_SIZE) 200 else if (size <= UM_KERN_PAGE_SIZE)
201 /* finding contiguous pages can be hard*/ 201 /* finding contiguous pages can be hard*/
202 ret = kmalloc(size, UM_GFP_KERNEL); 202 ret = uml_kmalloc(size, UM_GFP_KERNEL);
203 else ret = vmalloc(size); 203 else ret = vmalloc(size);
204 204
205 /* 205 /*
diff --git a/arch/um/os-Linux/sigio.c b/arch/um/os-Linux/sigio.c
index abf47a7c4abd..eb8f2e4be192 100644
--- a/arch/um/os-Linux/sigio.c
+++ b/arch/um/os-Linux/sigio.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2002 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) 2 * Copyright (C) 2002 - 2008 Jeff Dike (jdike@{addtoit,linux.intel}.com)
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
@@ -15,6 +15,7 @@
15#include "kern_util.h" 15#include "kern_util.h"
16#include "init.h" 16#include "init.h"
17#include "os.h" 17#include "os.h"
18#include "process.h"
18#include "sigio.h" 19#include "sigio.h"
19#include "um_malloc.h" 20#include "um_malloc.h"
20#include "user.h" 21#include "user.h"
@@ -109,7 +110,7 @@ static int need_poll(struct pollfds *polls, int n)
109 if (n <= polls->size) 110 if (n <= polls->size)
110 return 0; 111 return 0;
111 112
112 new = kmalloc(n * sizeof(struct pollfd), UM_GFP_ATOMIC); 113 new = uml_kmalloc(n * sizeof(struct pollfd), UM_GFP_ATOMIC);
113 if (new == NULL) { 114 if (new == NULL) {
114 printk(UM_KERN_ERR "need_poll : failed to allocate new " 115 printk(UM_KERN_ERR "need_poll : failed to allocate new "
115 "pollfds\n"); 116 "pollfds\n");
@@ -243,7 +244,7 @@ static struct pollfd *setup_initial_poll(int fd)
243{ 244{
244 struct pollfd *p; 245 struct pollfd *p;
245 246
246 p = kmalloc(sizeof(struct pollfd), UM_GFP_KERNEL); 247 p = uml_kmalloc(sizeof(struct pollfd), UM_GFP_KERNEL);
247 if (p == NULL) { 248 if (p == NULL) {
248 printk(UM_KERN_ERR "setup_initial_poll : failed to allocate " 249 printk(UM_KERN_ERR "setup_initial_poll : failed to allocate "
249 "poll\n"); 250 "poll\n");
@@ -338,20 +339,10 @@ out_close1:
338 close(l_write_sigio_fds[1]); 339 close(l_write_sigio_fds[1]);
339} 340}
340 341
341/* Changed during early boot */ 342void sigio_broken(int fd, int read)
342static int pty_output_sigio = 0;
343static int pty_close_sigio = 0;
344
345void maybe_sigio_broken(int fd, int read)
346{ 343{
347 int err; 344 int err;
348 345
349 if (!isatty(fd))
350 return;
351
352 if ((read || pty_output_sigio) && (!read || pty_close_sigio))
353 return;
354
355 write_sigio_workaround(); 346 write_sigio_workaround();
356 347
357 sigio_lock(); 348 sigio_lock();
@@ -370,6 +361,21 @@ out:
370 sigio_unlock(); 361 sigio_unlock();
371} 362}
372 363
364/* Changed during early boot */
365static int pty_output_sigio;
366static int pty_close_sigio;
367
368void maybe_sigio_broken(int fd, int read)
369{
370 if (!isatty(fd))
371 return;
372
373 if ((read || pty_output_sigio) && (!read || pty_close_sigio))
374 return;
375
376 sigio_broken(fd, read);
377}
378
373static void sigio_cleanup(void) 379static void sigio_cleanup(void)
374{ 380{
375 if (write_sigio_pid == -1) 381 if (write_sigio_pid == -1)
@@ -383,7 +389,7 @@ static void sigio_cleanup(void)
383__uml_exitcall(sigio_cleanup); 389__uml_exitcall(sigio_cleanup);
384 390
385/* Used as a flag during SIGIO testing early in boot */ 391/* Used as a flag during SIGIO testing early in boot */
386static volatile int got_sigio = 0; 392static int got_sigio;
387 393
388static void __init handler(int sig) 394static void __init handler(int sig)
389{ 395{
@@ -498,7 +504,8 @@ static void tty_output(int master, int slave)
498 if (errno != EAGAIN) 504 if (errno != EAGAIN)
499 printk(UM_KERN_ERR "tty_output : write failed, errno = %d\n", 505 printk(UM_KERN_ERR "tty_output : write failed, errno = %d\n",
500 errno); 506 errno);
501 while (((n = read(slave, buf, sizeof(buf))) > 0) && !got_sigio) 507 while (((n = read(slave, buf, sizeof(buf))) > 0) &&
508 !({ barrier(); got_sigio; }))
502 ; 509 ;
503 510
504 if (got_sigio) { 511 if (got_sigio) {
diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c
index 3f1694b134cb..5aade6027e40 100644
--- a/arch/um/os-Linux/signal.c
+++ b/arch/um/os-Linux/signal.c
@@ -12,6 +12,7 @@
12#include "as-layout.h" 12#include "as-layout.h"
13#include "kern_util.h" 13#include "kern_util.h"
14#include "os.h" 14#include "os.h"
15#include "process.h"
15#include "sysdep/barrier.h" 16#include "sysdep/barrier.h"
16#include "sysdep/sigcontext.h" 17#include "sysdep/sigcontext.h"
17#include "user.h" 18#include "user.h"
diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c
index 1e8cba6550a9..6be028ca1817 100644
--- a/arch/um/os-Linux/skas/process.c
+++ b/arch/um/os-Linux/skas/process.c
@@ -442,7 +442,7 @@ void userspace(struct uml_pt_regs *regs)
442 unblock_signals(); 442 unblock_signals();
443 break; 443 break;
444 default: 444 default:
445 printk(UM_KERN_ERR "userspace - child stopped " 445 printk(UM_KERN_ERR "userspace - child stopped "
446 "with signal %d\n", sig); 446 "with signal %d\n", sig);
447 fatal_sigsegv(); 447 fatal_sigsegv();
448 } 448 }
diff --git a/arch/um/os-Linux/start_up.c b/arch/um/os-Linux/start_up.c
index 997d01944f91..b4b36e0f2e89 100644
--- a/arch/um/os-Linux/start_up.c
+++ b/arch/um/os-Linux/start_up.c
@@ -23,6 +23,7 @@
23#include "mem_user.h" 23#include "mem_user.h"
24#include "ptrace_user.h" 24#include "ptrace_user.h"
25#include "registers.h" 25#include "registers.h"
26#include "skas.h"
26#include "skas_ptrace.h" 27#include "skas_ptrace.h"
27 28
28static void ptrace_child(void) 29static void ptrace_child(void)
@@ -140,14 +141,27 @@ static int stop_ptraced_child(int pid, int exitcode, int mustexit)
140} 141}
141 142
142/* Changed only during early boot */ 143/* Changed only during early boot */
143int ptrace_faultinfo = 1; 144int ptrace_faultinfo;
144int ptrace_ldt = 1; 145static int disable_ptrace_faultinfo;
145int proc_mm = 1; 146
146int skas_needs_stub = 0; 147int ptrace_ldt;
148static int disable_ptrace_ldt;
149
150int proc_mm;
151static int disable_proc_mm;
152
153int have_switch_mm;
154static int disable_switch_mm;
155
156int skas_needs_stub;
147 157
148static int __init skas0_cmd_param(char *str, int* add) 158static int __init skas0_cmd_param(char *str, int* add)
149{ 159{
150 ptrace_faultinfo = proc_mm = 0; 160 disable_ptrace_faultinfo = 1;
161 disable_ptrace_ldt = 1;
162 disable_proc_mm = 1;
163 disable_switch_mm = 1;
164
151 return 0; 165 return 0;
152} 166}
153 167
@@ -157,15 +171,12 @@ static int __init mode_skas0_cmd_param(char *str, int* add)
157 __attribute__((alias("skas0_cmd_param"))); 171 __attribute__((alias("skas0_cmd_param")));
158 172
159__uml_setup("skas0", skas0_cmd_param, 173__uml_setup("skas0", skas0_cmd_param,
160 "skas0\n" 174"skas0\n"
161 " Disables SKAS3 usage, so that SKAS0 is used, unless \n" 175" Disables SKAS3 and SKAS4 usage, so that SKAS0 is used\n\n");
162 " you specify mode=tt.\n\n");
163 176
164__uml_setup("mode=skas0", mode_skas0_cmd_param, 177__uml_setup("mode=skas0", mode_skas0_cmd_param,
165 "mode=skas0\n" 178"mode=skas0\n"
166 " Disables SKAS3 usage, so that SKAS0 is used, unless you \n" 179" Disables SKAS3 and SKAS4 usage, so that SKAS0 is used.\n\n");
167 " specify mode=tt. Note that this was recently added - on \n"
168 " older kernels you must use simply \"skas0\".\n\n");
169 180
170/* Changed only during early boot */ 181/* Changed only during early boot */
171static int force_sysemu_disabled = 0; 182static int force_sysemu_disabled = 0;
@@ -360,7 +371,7 @@ void __init os_early_checks(void)
360 371
361static int __init noprocmm_cmd_param(char *str, int* add) 372static int __init noprocmm_cmd_param(char *str, int* add)
362{ 373{
363 proc_mm = 0; 374 disable_proc_mm = 1;
364 return 0; 375 return 0;
365} 376}
366 377
@@ -372,7 +383,7 @@ __uml_setup("noprocmm", noprocmm_cmd_param,
372 383
373static int __init noptracefaultinfo_cmd_param(char *str, int* add) 384static int __init noptracefaultinfo_cmd_param(char *str, int* add)
374{ 385{
375 ptrace_faultinfo = 0; 386 disable_ptrace_faultinfo = 1;
376 return 0; 387 return 0;
377} 388}
378 389
@@ -384,7 +395,7 @@ __uml_setup("noptracefaultinfo", noptracefaultinfo_cmd_param,
384 395
385static int __init noptraceldt_cmd_param(char *str, int* add) 396static int __init noptraceldt_cmd_param(char *str, int* add)
386{ 397{
387 ptrace_ldt = 0; 398 disable_ptrace_ldt = 1;
388 return 0; 399 return 0;
389} 400}
390 401
@@ -404,17 +415,15 @@ static inline void check_skas3_ptrace_faultinfo(void)
404 415
405 n = ptrace(PTRACE_FAULTINFO, pid, 0, &fi); 416 n = ptrace(PTRACE_FAULTINFO, pid, 0, &fi);
406 if (n < 0) { 417 if (n < 0) {
407 ptrace_faultinfo = 0;
408 if (errno == EIO) 418 if (errno == EIO)
409 non_fatal("not found\n"); 419 non_fatal("not found\n");
410 else 420 else
411 perror("not found"); 421 perror("not found");
412 } 422 } else if (disable_ptrace_faultinfo)
423 non_fatal("found but disabled on command line\n");
413 else { 424 else {
414 if (!ptrace_faultinfo) 425 ptrace_faultinfo = 1;
415 non_fatal("found but disabled on command line\n"); 426 non_fatal("found\n");
416 else
417 non_fatal("found\n");
418 } 427 }
419 428
420 stop_ptraced_child(pid, 1, 1); 429 stop_ptraced_child(pid, 1, 1);
@@ -437,38 +446,30 @@ static inline void check_skas3_ptrace_ldt(void)
437 if (n < 0) { 446 if (n < 0) {
438 if (errno == EIO) 447 if (errno == EIO)
439 non_fatal("not found\n"); 448 non_fatal("not found\n");
440 else { 449 else
441 perror("not found"); 450 perror("not found");
442 } 451 } else if (disable_ptrace_ldt)
443 ptrace_ldt = 0; 452 non_fatal("found, but use is disabled\n");
444 }
445 else { 453 else {
446 if (ptrace_ldt) 454 ptrace_ldt = 1;
447 non_fatal("found\n"); 455 non_fatal("found\n");
448 else
449 non_fatal("found, but use is disabled\n");
450 } 456 }
451 457
452 stop_ptraced_child(pid, 1, 1); 458 stop_ptraced_child(pid, 1, 1);
453#else
454 /* PTRACE_LDT might be disabled via cmdline option.
455 * We want to override this, else we might use the stub
456 * without real need
457 */
458 ptrace_ldt = 1;
459#endif 459#endif
460} 460}
461 461
462static inline void check_skas3_proc_mm(void) 462static inline void check_skas3_proc_mm(void)
463{ 463{
464 non_fatal(" - /proc/mm..."); 464 non_fatal(" - /proc/mm...");
465 if (access("/proc/mm", W_OK) < 0) { 465 if (access("/proc/mm", W_OK) < 0)
466 proc_mm = 0;
467 perror("not found"); 466 perror("not found");
468 } 467 else if (disable_proc_mm)
469 else if (!proc_mm)
470 non_fatal("found but disabled on command line\n"); 468 non_fatal("found but disabled on command line\n");
471 else non_fatal("found\n"); 469 else {
470 proc_mm = 1;
471 non_fatal("found\n");
472 }
472} 473}
473 474
474void can_do_skas(void) 475void can_do_skas(void)
diff --git a/arch/um/os-Linux/sys-i386/registers.c b/arch/um/os-Linux/sys-i386/registers.c
index b613473b3ec1..c6183e7aec3d 100644
--- a/arch/um/os-Linux/sys-i386/registers.c
+++ b/arch/um/os-Linux/sys-i386/registers.c
@@ -5,6 +5,7 @@
5 */ 5 */
6 6
7#include <errno.h> 7#include <errno.h>
8#include <asm/user.h>
8#include "kern_constants.h" 9#include "kern_constants.h"
9#include "longjmp.h" 10#include "longjmp.h"
10#include "user.h" 11#include "user.h"
@@ -74,10 +75,10 @@ int put_fp_registers(int pid, unsigned long *regs)
74 75
75void arch_init_registers(int pid) 76void arch_init_registers(int pid)
76{ 77{
77 unsigned long fpx_regs[HOST_XFP_SIZE]; 78 struct user_fxsr_struct fpx_regs;
78 int err; 79 int err;
79 80
80 err = ptrace(PTRACE_GETFPXREGS, pid, 0, fpx_regs); 81 err = ptrace(PTRACE_GETFPXREGS, pid, 0, &fpx_regs);
81 if (!err) 82 if (!err)
82 return; 83 return;
83 84
diff --git a/arch/um/os-Linux/time.c b/arch/um/os-Linux/time.c
index e49280599465..bee98f466d66 100644
--- a/arch/um/os-Linux/time.c
+++ b/arch/um/os-Linux/time.c
@@ -9,7 +9,9 @@
9#include <time.h> 9#include <time.h>
10#include <sys/time.h> 10#include <sys/time.h>
11#include "kern_constants.h" 11#include "kern_constants.h"
12#include "kern_util.h"
12#include "os.h" 13#include "os.h"
14#include "process.h"
13#include "user.h" 15#include "user.h"
14 16
15int set_interval(void) 17int set_interval(void)
@@ -58,12 +60,17 @@ static inline long long timeval_to_ns(const struct timeval *tv)
58long long disable_timer(void) 60long long disable_timer(void)
59{ 61{
60 struct itimerval time = ((struct itimerval) { { 0, 0 }, { 0, 0 } }); 62 struct itimerval time = ((struct itimerval) { { 0, 0 }, { 0, 0 } });
63 int remain, max = UM_NSEC_PER_SEC / UM_HZ;
61 64
62 if (setitimer(ITIMER_VIRTUAL, &time, &time) < 0) 65 if (setitimer(ITIMER_VIRTUAL, &time, &time) < 0)
63 printk(UM_KERN_ERR "disable_timer - setitimer failed, " 66 printk(UM_KERN_ERR "disable_timer - setitimer failed, "
64 "errno = %d\n", errno); 67 "errno = %d\n", errno);
65 68
66 return timeval_to_ns(&time.it_value); 69 remain = timeval_to_ns(&time.it_value);
70 if (remain > max)
71 remain = max;
72
73 return remain;
67} 74}
68 75
69long long os_nsecs(void) 76long long os_nsecs(void)
@@ -79,7 +86,44 @@ static int after_sleep_interval(struct timespec *ts)
79{ 86{
80 return 0; 87 return 0;
81} 88}
89
90static void deliver_alarm(void)
91{
92 alarm_handler(SIGVTALRM, NULL);
93}
94
95static unsigned long long sleep_time(unsigned long long nsecs)
96{
97 return nsecs;
98}
99
82#else 100#else
101unsigned long long last_tick;
102unsigned long long skew;
103
104static void deliver_alarm(void)
105{
106 unsigned long long this_tick = os_nsecs();
107 int one_tick = UM_NSEC_PER_SEC / UM_HZ;
108
109 if (last_tick == 0)
110 last_tick = this_tick - one_tick;
111
112 skew += this_tick - last_tick;
113
114 while (skew >= one_tick) {
115 alarm_handler(SIGVTALRM, NULL);
116 skew -= one_tick;
117 }
118
119 last_tick = this_tick;
120}
121
122static unsigned long long sleep_time(unsigned long long nsecs)
123{
124 return nsecs > skew ? nsecs - skew : 0;
125}
126
83static inline long long timespec_to_us(const struct timespec *ts) 127static inline long long timespec_to_us(const struct timespec *ts)
84{ 128{
85 return ((long long) ts->tv_sec * UM_USEC_PER_SEC) + 129 return ((long long) ts->tv_sec * UM_USEC_PER_SEC) +
@@ -102,6 +146,8 @@ static int after_sleep_interval(struct timespec *ts)
102 */ 146 */
103 if (start_usecs > usec) 147 if (start_usecs > usec)
104 start_usecs = usec; 148 start_usecs = usec;
149
150 start_usecs -= skew / UM_NSEC_PER_USEC;
105 tv = ((struct timeval) { .tv_sec = start_usecs / UM_USEC_PER_SEC, 151 tv = ((struct timeval) { .tv_sec = start_usecs / UM_USEC_PER_SEC,
106 .tv_usec = start_usecs % UM_USEC_PER_SEC }); 152 .tv_usec = start_usecs % UM_USEC_PER_SEC });
107 interval = ((struct itimerval) { { 0, usec }, tv }); 153 interval = ((struct itimerval) { { 0, usec }, tv });
@@ -113,8 +159,6 @@ static int after_sleep_interval(struct timespec *ts)
113} 159}
114#endif 160#endif
115 161
116extern void alarm_handler(int sig, struct sigcontext *sc);
117
118void idle_sleep(unsigned long long nsecs) 162void idle_sleep(unsigned long long nsecs)
119{ 163{
120 struct timespec ts; 164 struct timespec ts;
@@ -126,10 +170,12 @@ void idle_sleep(unsigned long long nsecs)
126 */ 170 */
127 if (nsecs == 0) 171 if (nsecs == 0)
128 nsecs = UM_NSEC_PER_SEC / UM_HZ; 172 nsecs = UM_NSEC_PER_SEC / UM_HZ;
173
174 nsecs = sleep_time(nsecs);
129 ts = ((struct timespec) { .tv_sec = nsecs / UM_NSEC_PER_SEC, 175 ts = ((struct timespec) { .tv_sec = nsecs / UM_NSEC_PER_SEC,
130 .tv_nsec = nsecs % UM_NSEC_PER_SEC }); 176 .tv_nsec = nsecs % UM_NSEC_PER_SEC });
131 177
132 if (nanosleep(&ts, &ts) == 0) 178 if (nanosleep(&ts, &ts) == 0)
133 alarm_handler(SIGVTALRM, NULL); 179 deliver_alarm();
134 after_sleep_interval(&ts); 180 after_sleep_interval(&ts);
135} 181}
diff --git a/arch/um/sys-i386/ptrace.c b/arch/um/sys-i386/ptrace.c
index 6b4499906a6c..c9b176534d65 100644
--- a/arch/um/sys-i386/ptrace.c
+++ b/arch/um/sys-i386/ptrace.c
@@ -148,14 +148,13 @@ int peek_user(struct task_struct *child, long addr, long data)
148int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child) 148int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
149{ 149{
150 int err, n, cpu = ((struct thread_info *) child->stack)->cpu; 150 int err, n, cpu = ((struct thread_info *) child->stack)->cpu;
151 long fpregs[HOST_FP_SIZE]; 151 struct user_i387_struct fpregs;
152 152
153 BUG_ON(sizeof(*buf) != sizeof(fpregs)); 153 err = save_fp_registers(userspace_pid[cpu], (unsigned long *) &fpregs);
154 err = save_fp_registers(userspace_pid[cpu], fpregs);
155 if (err) 154 if (err)
156 return err; 155 return err;
157 156
158 n = copy_to_user(buf, fpregs, sizeof(fpregs)); 157 n = copy_to_user(buf, &fpregs, sizeof(fpregs));
159 if(n > 0) 158 if(n > 0)
160 return -EFAULT; 159 return -EFAULT;
161 160
@@ -165,27 +164,26 @@ int get_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
165int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child) 164int set_fpregs(struct user_i387_struct __user *buf, struct task_struct *child)
166{ 165{
167 int n, cpu = ((struct thread_info *) child->stack)->cpu; 166 int n, cpu = ((struct thread_info *) child->stack)->cpu;
168 long fpregs[HOST_FP_SIZE]; 167 struct user_i387_struct fpregs;
169 168
170 BUG_ON(sizeof(*buf) != sizeof(fpregs)); 169 n = copy_from_user(&fpregs, buf, sizeof(fpregs));
171 n = copy_from_user(fpregs, buf, sizeof(fpregs));
172 if (n > 0) 170 if (n > 0)
173 return -EFAULT; 171 return -EFAULT;
174 172
175 return restore_fp_registers(userspace_pid[cpu], fpregs); 173 return restore_fp_registers(userspace_pid[cpu],
174 (unsigned long *) &fpregs);
176} 175}
177 176
178int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child) 177int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
179{ 178{
180 int err, n, cpu = ((struct thread_info *) child->stack)->cpu; 179 int err, n, cpu = ((struct thread_info *) child->stack)->cpu;
181 long fpregs[HOST_XFP_SIZE]; 180 struct user_fxsr_struct fpregs;
182 181
183 BUG_ON(sizeof(*buf) != sizeof(fpregs)); 182 err = save_fpx_registers(userspace_pid[cpu], (unsigned long *) &fpregs);
184 err = save_fpx_registers(userspace_pid[cpu], fpregs);
185 if (err) 183 if (err)
186 return err; 184 return err;
187 185
188 n = copy_to_user(buf, fpregs, sizeof(fpregs)); 186 n = copy_to_user(buf, &fpregs, sizeof(fpregs));
189 if(n > 0) 187 if(n > 0)
190 return -EFAULT; 188 return -EFAULT;
191 189
@@ -195,14 +193,14 @@ int get_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
195int set_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child) 193int set_fpxregs(struct user_fxsr_struct __user *buf, struct task_struct *child)
196{ 194{
197 int n, cpu = ((struct thread_info *) child->stack)->cpu; 195 int n, cpu = ((struct thread_info *) child->stack)->cpu;
198 long fpregs[HOST_XFP_SIZE]; 196 struct user_fxsr_struct fpregs;
199 197
200 BUG_ON(sizeof(*buf) != sizeof(fpregs)); 198 n = copy_from_user(&fpregs, buf, sizeof(fpregs));
201 n = copy_from_user(fpregs, buf, sizeof(fpregs));
202 if (n > 0) 199 if (n > 0)
203 return -EFAULT; 200 return -EFAULT;
204 201
205 return restore_fpx_registers(userspace_pid[cpu], fpregs); 202 return restore_fpx_registers(userspace_pid[cpu],
203 (unsigned long *) &fpregs);
206} 204}
207 205
208long subarch_ptrace(struct task_struct *child, long request, long addr, 206long subarch_ptrace(struct task_struct *child, long request, long addr,
diff --git a/arch/um/sys-i386/user-offsets.c b/arch/um/sys-i386/user-offsets.c
index 39bd32bf84f0..5f883bfe773f 100644
--- a/arch/um/sys-i386/user-offsets.c
+++ b/arch/um/sys-i386/user-offsets.c
@@ -22,7 +22,7 @@ void foo(void)
22 OFFSET(HOST_SC_CR2, sigcontext, cr2); 22 OFFSET(HOST_SC_CR2, sigcontext, cr2);
23 23
24 DEFINE_LONGS(HOST_FP_SIZE, sizeof(struct user_fpregs_struct)); 24 DEFINE_LONGS(HOST_FP_SIZE, sizeof(struct user_fpregs_struct));
25 DEFINE_LONGS(HOST_XFP_SIZE, sizeof(struct user_fpxregs_struct)); 25 DEFINE_LONGS(HOST_FPX_SIZE, sizeof(struct user_fpxregs_struct));
26 26
27 DEFINE(HOST_IP, EIP); 27 DEFINE(HOST_IP, EIP);
28 DEFINE(HOST_SP, UESP); 28 DEFINE(HOST_SP, UESP);
diff --git a/arch/um/sys-x86_64/user-offsets.c b/arch/um/sys-x86_64/user-offsets.c
index 2f3443c6e859..973585414a66 100644
--- a/arch/um/sys-x86_64/user-offsets.c
+++ b/arch/um/sys-x86_64/user-offsets.c
@@ -24,7 +24,6 @@ void foo(void)
24 OFFSET(HOST_SC_TRAPNO, sigcontext, trapno); 24 OFFSET(HOST_SC_TRAPNO, sigcontext, trapno);
25 25
26 DEFINE(HOST_FP_SIZE, sizeof(struct _fpstate) / sizeof(unsigned long)); 26 DEFINE(HOST_FP_SIZE, sizeof(struct _fpstate) / sizeof(unsigned long));
27 DEFINE(HOST_XFP_SIZE, 0);
28 DEFINE_LONGS(HOST_RBX, RBX); 27 DEFINE_LONGS(HOST_RBX, RBX);
29 DEFINE_LONGS(HOST_RCX, RCX); 28 DEFINE_LONGS(HOST_RCX, RCX);
30 DEFINE_LONGS(HOST_RDI, RDI); 29 DEFINE_LONGS(HOST_RDI, RDI);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 845ea2b2d487..fe361ae7ef2f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -18,6 +18,7 @@ config X86_64
18### Arch settings 18### Arch settings
19config X86 19config X86
20 def_bool y 20 def_bool y
21 select HAVE_UNSTABLE_SCHED_CLOCK
21 select HAVE_IDE 22 select HAVE_IDE
22 select HAVE_OPROFILE 23 select HAVE_OPROFILE
23 select HAVE_KPROBES 24 select HAVE_KPROBES
@@ -334,6 +335,7 @@ config X86_RDC321X
334 select GENERIC_GPIO 335 select GENERIC_GPIO
335 select LEDS_CLASS 336 select LEDS_CLASS
336 select LEDS_GPIO 337 select LEDS_GPIO
338 select NEW_LEDS
337 help 339 help
338 This option is needed for RDC R-321x system-on-chip, also known 340 This option is needed for RDC R-321x system-on-chip, also known
339 as R-8610-(G). 341 as R-8610-(G).
@@ -1661,7 +1663,6 @@ config GEODE_MFGPT_TIMER
1661 1663
1662config OLPC 1664config OLPC
1663 bool "One Laptop Per Child support" 1665 bool "One Laptop Per Child support"
1664 depends on MGEODE_LX
1665 default n 1666 default n
1666 help 1667 help
1667 Add support for detecting the unique features of the OLPC 1668 Add support for detecting the unique features of the OLPC
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index bbdacb398d48..5e618c3b4720 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -83,9 +83,7 @@ obj-$(CONFIG_KVM_GUEST) += kvm.o
83obj-$(CONFIG_KVM_CLOCK) += kvmclock.o 83obj-$(CONFIG_KVM_CLOCK) += kvmclock.o
84obj-$(CONFIG_PARAVIRT) += paravirt.o paravirt_patch_$(BITS).o 84obj-$(CONFIG_PARAVIRT) += paravirt.o paravirt_patch_$(BITS).o
85 85
86ifdef CONFIG_INPUT_PCSPKR 86obj-$(CONFIG_PCSPKR_PLATFORM) += pcspeaker.o
87obj-y += pcspeaker.o
88endif
89 87
90obj-$(CONFIG_SCx200) += scx200.o 88obj-$(CONFIG_SCx200) += scx200.o
91scx200-y += scx200_32.o 89scx200-y += scx200_32.o
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.lds.S b/arch/x86/kernel/acpi/realmode/wakeup.lds.S
index 22fab6c4be15..7da00b799cda 100644
--- a/arch/x86/kernel/acpi/realmode/wakeup.lds.S
+++ b/arch/x86/kernel/acpi/realmode/wakeup.lds.S
@@ -12,11 +12,6 @@ ENTRY(_start)
12 12
13SECTIONS 13SECTIONS
14{ 14{
15 . = HEADER_OFFSET;
16 .header : {
17 *(.header)
18 }
19
20 . = 0; 15 . = 0;
21 .text : { 16 .text : {
22 *(.text*) 17 *(.text*)
@@ -50,6 +45,11 @@ SECTIONS
50 __bss_end = .; 45 __bss_end = .;
51 } 46 }
52 47
48 . = HEADER_OFFSET;
49 .header : {
50 *(.header)
51 }
52
53 . = ALIGN(16); 53 . = ALIGN(16);
54 _end = .; 54 _end = .;
55 55
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 238468ae1993..c2e1ce33c7cb 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -6,6 +6,7 @@
6 6
7#include <linux/cpu.h> 7#include <linux/cpu.h>
8 8
9#include <asm/pat.h>
9#include <asm/processor.h> 10#include <asm/processor.h>
10 11
11struct cpuid_bit { 12struct cpuid_bit {
@@ -48,3 +49,23 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
48 set_cpu_cap(c, cb->feature); 49 set_cpu_cap(c, cb->feature);
49 } 50 }
50} 51}
52
53#ifdef CONFIG_X86_PAT
54void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
55{
56 switch (c->x86_vendor) {
57 case X86_VENDOR_AMD:
58 if (c->x86 >= 0xf && c->x86 <= 0x11)
59 return;
60 break;
61 case X86_VENDOR_INTEL:
62 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
63 return;
64 break;
65 }
66
67 pat_disable(cpu_has_pat ?
68 "PAT disabled. Not yet verified on this CPU type." :
69 "PAT not supported by CPU.");
70}
71#endif
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 35b4f6a9c8ef..d0463a946247 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -12,6 +12,7 @@
12#include <asm/mmu_context.h> 12#include <asm/mmu_context.h>
13#include <asm/mtrr.h> 13#include <asm/mtrr.h>
14#include <asm/mce.h> 14#include <asm/mce.h>
15#include <asm/pat.h>
15#ifdef CONFIG_X86_LOCAL_APIC 16#ifdef CONFIG_X86_LOCAL_APIC
16#include <asm/mpspec.h> 17#include <asm/mpspec.h>
17#include <asm/apic.h> 18#include <asm/apic.h>
@@ -308,19 +309,6 @@ static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
308 309
309 } 310 }
310 311
311 clear_cpu_cap(c, X86_FEATURE_PAT);
312
313 switch (c->x86_vendor) {
314 case X86_VENDOR_AMD:
315 if (c->x86 >= 0xf && c->x86 <= 0x11)
316 set_cpu_cap(c, X86_FEATURE_PAT);
317 break;
318 case X86_VENDOR_INTEL:
319 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
320 set_cpu_cap(c, X86_FEATURE_PAT);
321 break;
322 }
323
324} 312}
325 313
326/* 314/*
@@ -409,18 +397,6 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
409 init_scattered_cpuid_features(c); 397 init_scattered_cpuid_features(c);
410 } 398 }
411 399
412 clear_cpu_cap(c, X86_FEATURE_PAT);
413
414 switch (c->x86_vendor) {
415 case X86_VENDOR_AMD:
416 if (c->x86 >= 0xf && c->x86 <= 0x11)
417 set_cpu_cap(c, X86_FEATURE_PAT);
418 break;
419 case X86_VENDOR_INTEL:
420 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
421 set_cpu_cap(c, X86_FEATURE_PAT);
422 break;
423 }
424} 400}
425 401
426static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c) 402static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
@@ -651,6 +627,7 @@ void __init early_cpu_init(void)
651 cpu_devs[cvdev->vendor] = cvdev->cpu_dev; 627 cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
652 628
653 early_cpu_detect(); 629 early_cpu_detect();
630 validate_pat_support(&boot_cpu_data);
654} 631}
655 632
656/* Make sure %fs is initialized properly in idle threads */ 633/* Make sure %fs is initialized properly in idle threads */
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c
index 9dad6ca6cd70..e8edd63ab000 100644
--- a/arch/x86/kernel/geode_32.c
+++ b/arch/x86/kernel/geode_32.c
@@ -161,6 +161,25 @@ void geode_gpio_setup_event(unsigned int gpio, int pair, int pme)
161} 161}
162EXPORT_SYMBOL_GPL(geode_gpio_setup_event); 162EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
163 163
164int geode_has_vsa2(void)
165{
166 static int has_vsa2 = -1;
167
168 if (has_vsa2 == -1) {
169 /*
170 * The VSA has virtual registers that we can query for a
171 * signature.
172 */
173 outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
174 outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
175
176 has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
177 }
178
179 return has_vsa2;
180}
181EXPORT_SYMBOL_GPL(geode_has_vsa2);
182
164static int __init geode_southbridge_init(void) 183static int __init geode_southbridge_init(void)
165{ 184{
166 if (!is_geode()) 185 if (!is_geode())
diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c
index db6839b53195..e03cc952f233 100644
--- a/arch/x86/kernel/i387.c
+++ b/arch/x86/kernel/i387.c
@@ -450,7 +450,6 @@ static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
450{ 450{
451 struct task_struct *tsk = current; 451 struct task_struct *tsk = current;
452 452
453 clear_fpu(tsk);
454 return __copy_from_user(&tsk->thread.xstate->fsave, buf, 453 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
455 sizeof(struct i387_fsave_struct)); 454 sizeof(struct i387_fsave_struct));
456} 455}
@@ -461,7 +460,6 @@ static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
461 struct user_i387_ia32_struct env; 460 struct user_i387_ia32_struct env;
462 int err; 461 int err;
463 462
464 clear_fpu(tsk);
465 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0], 463 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
466 sizeof(struct i387_fxsave_struct)); 464 sizeof(struct i387_fxsave_struct));
467 /* mxcsr reserved bits must be masked to zero for security reasons */ 465 /* mxcsr reserved bits must be masked to zero for security reasons */
@@ -478,6 +476,16 @@ int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
478 int err; 476 int err;
479 477
480 if (HAVE_HWFP) { 478 if (HAVE_HWFP) {
479 struct task_struct *tsk = current;
480
481 clear_fpu(tsk);
482
483 if (!used_math()) {
484 err = init_fpu(tsk);
485 if (err)
486 return err;
487 }
488
481 if (cpu_has_fxsr) 489 if (cpu_has_fxsr)
482 err = restore_i387_fxsave(buf); 490 err = restore_i387_fxsave(buf);
483 else 491 else
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 0c37f16b6950..c5ef1af8e79d 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -385,11 +385,13 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
385 if (dma_alloc_from_coherent_mem(dev, size, dma_handle, &memory)) 385 if (dma_alloc_from_coherent_mem(dev, size, dma_handle, &memory))
386 return memory; 386 return memory;
387 387
388 if (!dev) 388 if (!dev) {
389 dev = &fallback_dev; 389 dev = &fallback_dev;
390 gfp |= GFP_DMA;
391 }
390 dma_mask = dev->coherent_dma_mask; 392 dma_mask = dev->coherent_dma_mask;
391 if (dma_mask == 0) 393 if (dma_mask == 0)
392 dma_mask = DMA_32BIT_MASK; 394 dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
393 395
394 /* Device not DMA able */ 396 /* Device not DMA able */
395 if (dev->dma_mask == NULL) 397 if (dev->dma_mask == NULL)
@@ -403,7 +405,7 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
403 larger than 16MB and in this case we have a chance of 405 larger than 16MB and in this case we have a chance of
404 finding fitting memory in the next higher zone first. If 406 finding fitting memory in the next higher zone first. If
405 not retry with true GFP_DMA. -AK */ 407 not retry with true GFP_DMA. -AK */
406 if (dma_mask <= DMA_32BIT_MASK) 408 if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
407 gfp |= GFP_DMA32; 409 gfp |= GFP_DMA32;
408#endif 410#endif
409 411
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index fb03ef380f0e..a7835f282936 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -1303,6 +1303,9 @@ static const struct user_regset_view user_x86_64_view = {
1303#define genregs32_get genregs_get 1303#define genregs32_get genregs_get
1304#define genregs32_set genregs_set 1304#define genregs32_set genregs_set
1305 1305
1306#define user_i387_ia32_struct user_i387_struct
1307#define user32_fxsr_struct user_fxsr_struct
1308
1306#endif /* CONFIG_X86_64 */ 1309#endif /* CONFIG_X86_64 */
1307 1310
1308#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION 1311#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
@@ -1315,13 +1318,13 @@ static const struct user_regset x86_32_regsets[] = {
1315 }, 1318 },
1316 [REGSET_FP] = { 1319 [REGSET_FP] = {
1317 .core_note_type = NT_PRFPREG, 1320 .core_note_type = NT_PRFPREG,
1318 .n = sizeof(struct user_i387_struct) / sizeof(u32), 1321 .n = sizeof(struct user_i387_ia32_struct) / sizeof(u32),
1319 .size = sizeof(u32), .align = sizeof(u32), 1322 .size = sizeof(u32), .align = sizeof(u32),
1320 .active = fpregs_active, .get = fpregs_get, .set = fpregs_set 1323 .active = fpregs_active, .get = fpregs_get, .set = fpregs_set
1321 }, 1324 },
1322 [REGSET_XFP] = { 1325 [REGSET_XFP] = {
1323 .core_note_type = NT_PRXFPREG, 1326 .core_note_type = NT_PRXFPREG,
1324 .n = sizeof(struct user_i387_struct) / sizeof(u32), 1327 .n = sizeof(struct user32_fxsr_struct) / sizeof(u32),
1325 .size = sizeof(u32), .align = sizeof(u32), 1328 .size = sizeof(u32), .align = sizeof(u32),
1326 .active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set 1329 .active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set
1327 }, 1330 },
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index cc6f5eb20b24..6f80b852a196 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -12,6 +12,7 @@
12#include <asm/mpspec.h> 12#include <asm/mpspec.h>
13#include <asm/apicdef.h> 13#include <asm/apicdef.h>
14 14
15#ifdef CONFIG_X86_LOCAL_APIC
15unsigned int num_processors; 16unsigned int num_processors;
16unsigned disabled_cpus __cpuinitdata; 17unsigned disabled_cpus __cpuinitdata;
17/* Processor that is doing the boot up */ 18/* Processor that is doing the boot up */
@@ -23,8 +24,9 @@ EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
23 24
24/* Bitmask of physically existing CPUs */ 25/* Bitmask of physically existing CPUs */
25physid_mask_t phys_cpu_present_map; 26physid_mask_t phys_cpu_present_map;
27#endif
26 28
27#if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_SMP) 29#if defined(CONFIG_HAVE_SETUP_PER_CPU_AREA) && defined(CONFIG_X86_SMP)
28/* 30/*
29 * Copy data used in early init routines from the initial arrays to the 31 * Copy data used in early init routines from the initial arrays to the
30 * per cpu data areas. These arrays then become expendable and the 32 * per cpu data areas. These arrays then become expendable and the
@@ -95,7 +97,7 @@ void __init setup_per_cpu_areas(void)
95 97
96 /* Copy section for each CPU (we discard the original) */ 98 /* Copy section for each CPU (we discard the original) */
97 size = PERCPU_ENOUGH_ROOM; 99 size = PERCPU_ENOUGH_ROOM;
98 printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n", 100 printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n",
99 size); 101 size);
100 102
101 for_each_possible_cpu(i) { 103 for_each_possible_cpu(i) {
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
index 2283422af794..2c5f8b213e86 100644
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -127,7 +127,12 @@ static struct resource standard_io_resources[] = { {
127}, { 127}, {
128 .name = "keyboard", 128 .name = "keyboard",
129 .start = 0x0060, 129 .start = 0x0060,
130 .end = 0x006f, 130 .end = 0x0060,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132}, {
133 .name = "keyboard",
134 .start = 0x0064,
135 .end = 0x0064,
131 .flags = IORESOURCE_BUSY | IORESOURCE_IO 136 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132}, { 137}, {
133 .name = "dma page reg", 138 .name = "dma page reg",
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 22c14e21c97c..6dff1286ad8a 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -70,6 +70,7 @@
70#include <asm/ds.h> 70#include <asm/ds.h>
71#include <asm/topology.h> 71#include <asm/topology.h>
72#include <asm/trampoline.h> 72#include <asm/trampoline.h>
73#include <asm/pat.h>
73 74
74#include <mach_apic.h> 75#include <mach_apic.h>
75#ifdef CONFIG_PARAVIRT 76#ifdef CONFIG_PARAVIRT
@@ -128,7 +129,9 @@ static struct resource standard_io_resources[] = {
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 129 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "timer1", .start = 0x50, .end = 0x53, 130 { .name = "timer1", .start = 0x50, .end = 0x53,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 131 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "keyboard", .start = 0x60, .end = 0x6f, 132 { .name = "keyboard", .start = 0x60, .end = 0x60,
133 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
134 { .name = "keyboard", .start = 0x64, .end = 0x64,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 135 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
133 { .name = "dma page reg", .start = 0x80, .end = 0x8f, 136 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
134 .flags = IORESOURCE_BUSY | IORESOURCE_IO }, 137 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
@@ -948,7 +951,7 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
948static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c) 951static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
949{ 952{
950 if (c->x86 == 0x6 && c->x86_model >= 0xf) 953 if (c->x86 == 0x6 && c->x86_model >= 0xf)
951 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); 954 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
952} 955}
953 956
954static void __cpuinit init_centaur(struct cpuinfo_x86 *c) 957static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
@@ -1063,25 +1066,19 @@ static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1063 if (c->extended_cpuid_level >= 0x80000007) 1066 if (c->extended_cpuid_level >= 0x80000007)
1064 c->x86_power = cpuid_edx(0x80000007); 1067 c->x86_power = cpuid_edx(0x80000007);
1065 1068
1066
1067 clear_cpu_cap(c, X86_FEATURE_PAT);
1068
1069 switch (c->x86_vendor) { 1069 switch (c->x86_vendor) {
1070 case X86_VENDOR_AMD: 1070 case X86_VENDOR_AMD:
1071 early_init_amd(c); 1071 early_init_amd(c);
1072 if (c->x86 >= 0xf && c->x86 <= 0x11)
1073 set_cpu_cap(c, X86_FEATURE_PAT);
1074 break; 1072 break;
1075 case X86_VENDOR_INTEL: 1073 case X86_VENDOR_INTEL:
1076 early_init_intel(c); 1074 early_init_intel(c);
1077 if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
1078 set_cpu_cap(c, X86_FEATURE_PAT);
1079 break; 1075 break;
1080 case X86_VENDOR_CENTAUR: 1076 case X86_VENDOR_CENTAUR:
1081 early_init_centaur(c); 1077 early_init_centaur(c);
1082 break; 1078 break;
1083 } 1079 }
1084 1080
1081 validate_pat_support(c);
1085} 1082}
1086 1083
1087/* 1084/*
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 8f75893a6467..0cb7aadc87cd 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -231,7 +231,8 @@ native_smp_call_function_mask(cpumask_t mask,
231 wmb(); 231 wmb();
232 232
233 /* Send a message to other CPUs */ 233 /* Send a message to other CPUs */
234 if (cpus_equal(mask, allbutself)) 234 if (cpus_equal(mask, allbutself) &&
235 cpus_equal(cpu_online_map, cpu_callout_map))
235 send_IPI_allbutself(CALL_FUNCTION_VECTOR); 236 send_IPI_allbutself(CALL_FUNCTION_VECTOR);
236 else 237 else
237 send_IPI_mask(mask, CALL_FUNCTION_VECTOR); 238 send_IPI_mask(mask, CALL_FUNCTION_VECTOR);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 6b087ab6cd8f..38988491c622 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -86,6 +86,7 @@ void *x86_bios_cpu_apicid_early_ptr;
86 86
87#ifdef CONFIG_X86_32 87#ifdef CONFIG_X86_32
88u8 apicid_2_node[MAX_APICID]; 88u8 apicid_2_node[MAX_APICID];
89static int low_mappings;
89#endif 90#endif
90 91
91/* State of each CPU */ 92/* State of each CPU */
@@ -326,6 +327,12 @@ static void __cpuinit start_secondary(void *unused)
326 enable_8259A_irq(0); 327 enable_8259A_irq(0);
327 } 328 }
328 329
330#ifdef CONFIG_X86_32
331 while (low_mappings)
332 cpu_relax();
333 __flush_tlb_all();
334#endif
335
329 /* This must be done before setting cpu_online_map */ 336 /* This must be done before setting cpu_online_map */
330 set_cpu_sibling_map(raw_smp_processor_id()); 337 set_cpu_sibling_map(raw_smp_processor_id());
331 wmb(); 338 wmb();
@@ -1040,14 +1047,20 @@ int __cpuinit native_cpu_up(unsigned int cpu)
1040#ifdef CONFIG_X86_32 1047#ifdef CONFIG_X86_32
1041 /* init low mem mapping */ 1048 /* init low mem mapping */
1042 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, 1049 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
1043 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY)); 1050 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
1044 flush_tlb_all(); 1051 flush_tlb_all();
1045#endif 1052 low_mappings = 1;
1046 1053
1047 err = do_boot_cpu(apicid, cpu); 1054 err = do_boot_cpu(apicid, cpu);
1048 if (err < 0) { 1055
1056 zap_low_mappings();
1057 low_mappings = 0;
1058#else
1059 err = do_boot_cpu(apicid, cpu);
1060#endif
1061 if (err) {
1049 Dprintk("do_boot_cpu failed %d\n", err); 1062 Dprintk("do_boot_cpu failed %d\n", err);
1050 return err; 1063 return -EIO;
1051 } 1064 }
1052 1065
1053 /* 1066 /*
@@ -1259,9 +1272,6 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
1259 setup_ioapic_dest(); 1272 setup_ioapic_dest();
1260#endif 1273#endif
1261 check_nmi_watchdog(); 1274 check_nmi_watchdog();
1262#ifdef CONFIG_X86_32
1263 zap_low_mappings();
1264#endif
1265} 1275}
1266 1276
1267#ifdef CONFIG_HOTPLUG_CPU 1277#ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/x86/kernel/x8664_ksyms_64.c b/arch/x86/kernel/x8664_ksyms_64.c
index 58882f9f2637..f6c05d0410fb 100644
--- a/arch/x86/kernel/x8664_ksyms_64.c
+++ b/arch/x86/kernel/x8664_ksyms_64.c
@@ -2,6 +2,7 @@
2 All C exports should go in the respective C files. */ 2 All C exports should go in the respective C files. */
3 3
4#include <linux/module.h> 4#include <linux/module.h>
5#include <net/checksum.h>
5#include <linux/smp.h> 6#include <linux/smp.h>
6 7
7#include <asm/processor.h> 8#include <asm/processor.h>
@@ -29,6 +30,8 @@ EXPORT_SYMBOL(__copy_from_user_inatomic);
29EXPORT_SYMBOL(copy_page); 30EXPORT_SYMBOL(copy_page);
30EXPORT_SYMBOL(clear_page); 31EXPORT_SYMBOL(clear_page);
31 32
33EXPORT_SYMBOL(csum_partial);
34
32/* 35/*
33 * Export string functions. We normally rely on gcc builtin for most of these, 36 * Export string functions. We normally rely on gcc builtin for most of these,
34 * but gcc sometimes decides not to inline them. 37 * but gcc sometimes decides not to inline them.
diff --git a/arch/x86/lib/csum-partial_64.c b/arch/x86/lib/csum-partial_64.c
index bc503f506903..bf51144d97e1 100644
--- a/arch/x86/lib/csum-partial_64.c
+++ b/arch/x86/lib/csum-partial_64.c
@@ -136,8 +136,6 @@ __wsum csum_partial(const void *buff, int len, __wsum sum)
136 (__force u32)sum); 136 (__force u32)sum);
137} 137}
138 138
139EXPORT_SYMBOL(csum_partial);
140
141/* 139/*
142 * this routine is used for miscellaneous IP-like checksums, mainly 140 * this routine is used for miscellaneous IP-like checksums, mainly
143 * in icmp.c 141 * in icmp.c
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index de236e419cb5..ec30d10154b6 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -438,8 +438,6 @@ void zap_low_mappings(void)
438{ 438{
439 int i; 439 int i;
440 440
441 save_pg_dir();
442
443 /* 441 /*
444 * Zap initial low-memory mappings. 442 * Zap initial low-memory mappings.
445 * 443 *
@@ -663,16 +661,8 @@ void __init mem_init(void)
663 test_wp_bit(); 661 test_wp_bit();
664 662
665 cpa_init(); 663 cpa_init();
666 664 save_pg_dir();
667 /*
668 * Subtle. SMP is doing it's boot stuff late (because it has to
669 * fork idle threads) - but it also needs low mappings for the
670 * protected-mode entry to work. We zap these entries only after
671 * the WP-bit has been tested.
672 */
673#ifndef CONFIG_SMP
674 zap_low_mappings(); 665 zap_low_mappings();
675#endif
676} 666}
677 667
678#ifdef CONFIG_MEMORY_HOTPLUG 668#ifdef CONFIG_MEMORY_HOTPLUG
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 277446cd30b6..bcb1a8e4b2db 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -25,31 +25,24 @@
25#include <asm/mtrr.h> 25#include <asm/mtrr.h>
26#include <asm/io.h> 26#include <asm/io.h>
27 27
28int pat_wc_enabled = 1; 28#ifdef CONFIG_X86_PAT
29int __read_mostly pat_wc_enabled = 1;
29 30
30static u64 __read_mostly boot_pat_state; 31void __init pat_disable(char *reason)
31
32static int nopat(char *str)
33{ 32{
34 pat_wc_enabled = 0; 33 pat_wc_enabled = 0;
35 printk(KERN_INFO "x86: PAT support disabled.\n"); 34 printk(KERN_INFO "%s\n", reason);
36
37 return 0;
38} 35}
39early_param("nopat", nopat);
40 36
41static int pat_known_cpu(void) 37static int nopat(char *str)
42{ 38{
43 if (!pat_wc_enabled) 39 pat_disable("PAT support disabled.");
44 return 0;
45
46 if (cpu_has_pat)
47 return 1;
48
49 pat_wc_enabled = 0;
50 printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
51 return 0; 40 return 0;
52} 41}
42early_param("nopat", nopat);
43#endif
44
45static u64 __read_mostly boot_pat_state;
53 46
54enum { 47enum {
55 PAT_UC = 0, /* uncached */ 48 PAT_UC = 0, /* uncached */
@@ -66,17 +59,19 @@ void pat_init(void)
66{ 59{
67 u64 pat; 60 u64 pat;
68 61
69#ifndef CONFIG_X86_PAT 62 if (!pat_wc_enabled)
70 nopat(NULL);
71#endif
72
73 /* Boot CPU enables PAT based on CPU feature */
74 if (!smp_processor_id() && !pat_known_cpu())
75 return; 63 return;
76 64
77 /* APs enable PAT iff boot CPU has enabled it before */ 65 /* Paranoia check. */
78 if (smp_processor_id() && !pat_wc_enabled) 66 if (!cpu_has_pat) {
79 return; 67 printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
68 /*
69 * Panic if this happens on the secondary CPU, and we
70 * switched to PAT on the boot CPU. We have no way to
71 * undo PAT.
72 */
73 BUG_ON(boot_pat_state);
74 }
80 75
81 /* Set PWT to Write-Combining. All other bits stay the same */ 76 /* Set PWT to Write-Combining. All other bits stay the same */
82 /* 77 /*
@@ -95,9 +90,8 @@ void pat_init(void)
95 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC); 90 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
96 91
97 /* Boot CPU check */ 92 /* Boot CPU check */
98 if (!smp_processor_id()) { 93 if (!boot_pat_state)
99 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state); 94 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
100 }
101 95
102 wrmsrl(MSR_IA32_CR_PAT, pat); 96 wrmsrl(MSR_IA32_CR_PAT, pat);
103 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n", 97 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
@@ -561,7 +555,7 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
561 "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n", 555 "%s:%d /dev/mem ioremap_change_attr failed %s for %Lx-%Lx\n",
562 current->comm, current->pid, 556 current->comm, current->pid,
563 cattr_name(flags), 557 cattr_name(flags),
564 offset, offset + size); 558 offset, (unsigned long long)(offset + size));
565 return 0; 559 return 0;
566 } 560 }
567 561
@@ -582,7 +576,7 @@ void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot)
582 "%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n", 576 "%s:%d /dev/mem expected mapping type %s for %Lx-%Lx, got %s\n",
583 current->comm, current->pid, 577 current->comm, current->pid,
584 cattr_name(want_flags), 578 cattr_name(want_flags),
585 addr, addr + size, 579 addr, (unsigned long long)(addr + size),
586 cattr_name(flags)); 580 cattr_name(flags));
587 } 581 }
588} 582}
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index 9ee007be9142..369cf065b6a4 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -172,10 +172,3 @@ void reserve_top_address(unsigned long reserve)
172 __FIXADDR_TOP = -reserve - PAGE_SIZE; 172 __FIXADDR_TOP = -reserve - PAGE_SIZE;
173 __VMALLOC_RESERVE += reserve; 173 __VMALLOC_RESERVE += reserve;
174} 174}
175
176int pmd_bad(pmd_t pmd)
177{
178 WARN_ON_ONCE(pmd_bad_v1(pmd) != pmd_bad_v2(pmd));
179
180 return pmd_bad_v1(pmd);
181}
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 1a9c0c6a1a18..d95de2f199cd 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -6,45 +6,6 @@
6#include <asm/numa.h> 6#include <asm/numa.h>
7#include "pci.h" 7#include "pci.h"
8 8
9static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
10{
11 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
12 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
13 return 0;
14}
15
16static struct dmi_system_id acpi_pciprobe_dmi_table[] __devinitdata = {
17/*
18 * Systems where PCI IO resource ISA alignment can be skipped
19 * when the ISA enable bit in the bridge control is not set
20 */
21 {
22 .callback = can_skip_ioresource_align,
23 .ident = "IBM System x3800",
24 .matches = {
25 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
26 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
27 },
28 },
29 {
30 .callback = can_skip_ioresource_align,
31 .ident = "IBM System x3850",
32 .matches = {
33 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
34 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
35 },
36 },
37 {
38 .callback = can_skip_ioresource_align,
39 .ident = "IBM System x3950",
40 .matches = {
41 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
42 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
43 },
44 },
45 {}
46};
47
48struct pci_root_info { 9struct pci_root_info {
49 char *name; 10 char *name;
50 unsigned int res_num; 11 unsigned int res_num;
@@ -196,8 +157,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do
196 int pxm; 157 int pxm;
197#endif 158#endif
198 159
199 dmi_check_system(acpi_pciprobe_dmi_table);
200
201 if (domain && !pci_domains_supported) { 160 if (domain && !pci_domains_supported) {
202 printk(KERN_WARNING "PCI: Multiple domains not supported " 161 printk(KERN_WARNING "PCI: Multiple domains not supported "
203 "(dom %d, bus %d)\n", domain, busnum); 162 "(dom %d, bus %d)\n", domain, busnum);
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 2a4d751818b7..8545c8a9d107 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -77,17 +77,48 @@ int pcibios_scanned;
77 */ 77 */
78DEFINE_SPINLOCK(pci_config_lock); 78DEFINE_SPINLOCK(pci_config_lock);
79 79
80static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) 80static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
81{ 81{
82 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE]; 82 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
83 83 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
84 if (rom_r->parent) 84 return 0;
85 return; 85}
86 if (rom_r->start) 86
87 /* we deal with BIOS assigned ROM later */ 87static struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitdata = {
88 return; 88/*
89 if (!(pci_probe & PCI_ASSIGN_ROMS)) 89 * Systems where PCI IO resource ISA alignment can be skipped
90 rom_r->start = rom_r->end = rom_r->flags = 0; 90 * when the ISA enable bit in the bridge control is not set
91 */
92 {
93 .callback = can_skip_ioresource_align,
94 .ident = "IBM System x3800",
95 .matches = {
96 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
97 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
98 },
99 },
100 {
101 .callback = can_skip_ioresource_align,
102 .ident = "IBM System x3850",
103 .matches = {
104 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
105 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
106 },
107 },
108 {
109 .callback = can_skip_ioresource_align,
110 .ident = "IBM System x3950",
111 .matches = {
112 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
113 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
114 },
115 },
116 {}
117};
118
119void __init dmi_check_skip_isa_align(void)
120{
121 dmi_check_system(can_skip_pciprobe_dmi_table);
91} 122}
92 123
93/* 124/*
@@ -97,11 +128,7 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
97 128
98void __devinit pcibios_fixup_bus(struct pci_bus *b) 129void __devinit pcibios_fixup_bus(struct pci_bus *b)
99{ 130{
100 struct pci_dev *dev;
101
102 pci_read_bridge_bases(b); 131 pci_read_bridge_bases(b);
103 list_for_each_entry(dev, &b->devices, bus_list)
104 pcibios_fixup_device_resources(dev);
105} 132}
106 133
107/* 134/*
@@ -318,13 +345,16 @@ static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
318 {} 345 {}
319}; 346};
320 347
348void __init dmi_check_pciprobe(void)
349{
350 dmi_check_system(pciprobe_dmi_table);
351}
352
321struct pci_bus * __devinit pcibios_scan_root(int busnum) 353struct pci_bus * __devinit pcibios_scan_root(int busnum)
322{ 354{
323 struct pci_bus *bus = NULL; 355 struct pci_bus *bus = NULL;
324 struct pci_sysdata *sd; 356 struct pci_sysdata *sd;
325 357
326 dmi_check_system(pciprobe_dmi_table);
327
328 while ((bus = pci_find_next_bus(bus)) != NULL) { 358 while ((bus = pci_find_next_bus(bus)) != NULL) {
329 if (bus->number == busnum) { 359 if (bus->number == busnum) {
330 /* Already scanned */ 360 /* Already scanned */
@@ -462,6 +492,9 @@ char * __devinit pcibios_setup(char *str)
462 } else if (!strcmp(str, "routeirq")) { 492 } else if (!strcmp(str, "routeirq")) {
463 pci_routeirq = 1; 493 pci_routeirq = 1;
464 return NULL; 494 return NULL;
495 } else if (!strcmp(str, "skip_isa_align")) {
496 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
497 return NULL;
465 } 498 }
466 return str; 499 return str;
467} 500}
@@ -489,7 +522,7 @@ void pcibios_disable_device (struct pci_dev *dev)
489 pcibios_disable_irq(dev); 522 pcibios_disable_irq(dev);
490} 523}
491 524
492struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node) 525struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
493{ 526{
494 struct pci_bus *bus = NULL; 527 struct pci_bus *bus = NULL;
495 struct pci_sysdata *sd; 528 struct pci_sysdata *sd;
@@ -512,7 +545,7 @@ struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
512 return bus; 545 return bus;
513} 546}
514 547
515struct pci_bus *pci_scan_bus_with_sysdata(int busno) 548struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
516{ 549{
517 return pci_scan_bus_on_node(busno, &pci_root_ops, -1); 550 return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
518} 551}
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index b60b2abd480c..ff3a6a336342 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -502,7 +502,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SIEMENS, 0x0015,
502 */ 502 */
503static void fam10h_pci_cfg_space_size(struct pci_dev *dev) 503static void fam10h_pci_cfg_space_size(struct pci_dev *dev)
504{ 504{
505 dev->cfg_size = pci_cfg_space_size_ext(dev, 0); 505 dev->cfg_size = pci_cfg_space_size_ext(dev);
506} 506}
507 507
508DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1200, fam10h_pci_cfg_space_size); 508DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x1200, fam10h_pci_cfg_space_size);
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 8af0f0bae2af..10fb308fded8 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -301,15 +301,13 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
301 prot = pgprot_val(vma->vm_page_prot); 301 prot = pgprot_val(vma->vm_page_prot);
302 if (pat_wc_enabled && write_combine) 302 if (pat_wc_enabled && write_combine)
303 prot |= _PAGE_CACHE_WC; 303 prot |= _PAGE_CACHE_WC;
304 else if (pat_wc_enabled) 304 else if (pat_wc_enabled || boot_cpu_data.x86 > 3)
305 /* 305 /*
306 * ioremap() and ioremap_nocache() defaults to UC MINUS for now. 306 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
307 * To avoid attribute conflicts, request UC MINUS here 307 * To avoid attribute conflicts, request UC MINUS here
308 * aswell. 308 * aswell.
309 */ 309 */
310 prot |= _PAGE_CACHE_UC_MINUS; 310 prot |= _PAGE_CACHE_UC_MINUS;
311 else if (boot_cpu_data.x86 > 3)
312 prot |= _PAGE_CACHE_UC;
313 311
314 vma->vm_page_prot = __pgprot(prot); 312 vma->vm_page_prot = __pgprot(prot);
315 313
diff --git a/arch/x86/pci/init.c b/arch/x86/pci/init.c
index dd30c6076b5d..e70b9c57b88e 100644
--- a/arch/x86/pci/init.c
+++ b/arch/x86/pci/init.c
@@ -33,6 +33,10 @@ static __init int pci_access_init(void)
33 printk(KERN_ERR 33 printk(KERN_ERR
34 "PCI: Fatal: No config space access function found\n"); 34 "PCI: Fatal: No config space access function found\n");
35 35
36 dmi_check_pciprobe();
37
38 dmi_check_skip_isa_align();
39
36 return 0; 40 return 0;
37} 41}
38arch_initcall(pci_access_init); 42arch_initcall(pci_access_init);
diff --git a/arch/x86/pci/k8-bus_64.c b/arch/x86/pci/k8-bus_64.c
index ab6d4b18a88f..5c2799c20e47 100644
--- a/arch/x86/pci/k8-bus_64.c
+++ b/arch/x86/pci/k8-bus_64.c
@@ -504,14 +504,6 @@ static int __init early_fill_mp_bus_info(void)
504 } 504 }
505 } 505 }
506 506
507#ifdef CONFIG_NUMA
508 for (i = 0; i < BUS_NR; i++) {
509 node = mp_bus_to_node[i];
510 if (node >= 0)
511 printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
512 }
513#endif
514
515 for (i = 0; i < pci_root_num; i++) { 507 for (i = 0; i < pci_root_num; i++) {
516 int res_num; 508 int res_num;
517 int busnum; 509 int busnum;
diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h
index c58805a92db5..f3972b12c60a 100644
--- a/arch/x86/pci/pci.h
+++ b/arch/x86/pci/pci.h
@@ -38,6 +38,9 @@ enum pci_bf_sort_state {
38 pci_dmi_bf, 38 pci_dmi_bf,
39}; 39};
40 40
41extern void __init dmi_check_pciprobe(void);
42extern void __init dmi_check_skip_isa_align(void);
43
41/* pci-i386.c */ 44/* pci-i386.c */
42 45
43extern unsigned int pcibios_max_latency; 46extern unsigned int pcibios_max_latency;