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-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c62
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c89
2 files changed, 72 insertions, 79 deletions
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 79283e6c1d8f..f83ff8a68f35 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -52,42 +52,38 @@ static int __init sh7619_devices_setup(void)
52} 52}
53__initcall(sh7619_devices_setup); 53__initcall(sh7619_devices_setup);
54 54
55#define INTC_IPRC 0xf8080000UL
56#define INTC_IPRD 0xf8080002UL
57
58#define CMI0_IRQ 86
59
60#define SCIF0_ERI_IRQ 88
61#define SCIF0_RXI_IRQ 89
62#define SCIF0_BRI_IRQ 90
63#define SCIF0_TXI_IRQ 91
64
65#define SCIF1_ERI_IRQ 92
66#define SCIF1_RXI_IRQ 93
67#define SCIF1_BRI_IRQ 94
68#define SCIF1_TXI_IRQ 95
69
70#define SCIF2_BRI_IRQ 96
71#define SCIF2_ERI_IRQ 97
72#define SCIF2_RXI_IRQ 98
73#define SCIF2_TXI_IRQ 99
74
75static struct ipr_data sh7619_ipr_map[] = { 55static struct ipr_data sh7619_ipr_map[] = {
76 { CMI0_IRQ, INTC_IPRC, 1, 2 }, 56 { 86, 0, 4, 2 }, /* CMI0 */
77 { SCIF0_ERI_IRQ, INTC_IPRD, 3, 3 }, 57 { 88, 1, 12, 3 }, /* SCIF0_ERI */
78 { SCIF0_RXI_IRQ, INTC_IPRD, 3, 3 }, 58 { 89, 1, 12, 3 }, /* SCIF0_RXI */
79 { SCIF0_BRI_IRQ, INTC_IPRD, 3, 3 }, 59 { 90, 1, 12, 3 }, /* SCIF0_BRI */
80 { SCIF0_TXI_IRQ, INTC_IPRD, 3, 3 }, 60 { 91, 1, 12, 3 }, /* SCIF0_TXI */
81 { SCIF1_ERI_IRQ, INTC_IPRD, 2, 3 }, 61 { 92, 1, 8, 3 }, /* SCIF1_ERI */
82 { SCIF1_RXI_IRQ, INTC_IPRD, 2, 3 }, 62 { 93, 1, 8, 3 }, /* SCIF1_RXI */
83 { SCIF1_BRI_IRQ, INTC_IPRD, 2, 3 }, 63 { 94, 1, 8, 3 }, /* SCIF1_BRI */
84 { SCIF1_TXI_IRQ, INTC_IPRD, 2, 3 }, 64 { 95, 1, 8, 3 }, /* SCIF1_TXI */
85 { SCIF2_ERI_IRQ, INTC_IPRD, 1, 3 }, 65 { 96, 1, 4, 3 }, /* SCIF2_ERI */
86 { SCIF2_RXI_IRQ, INTC_IPRD, 1, 3 }, 66 { 97, 1, 4, 3 }, /* SCIF2_RXI */
87 { SCIF2_BRI_IRQ, INTC_IPRD, 1, 3 }, 67 { 98, 1, 4, 3 }, /* SCIF2_BRI */
88 { SCIF2_TXI_IRQ, INTC_IPRD, 1, 3 }, 68 { 99, 1, 4, 3 }, /* SCIF2_TXI */
89}; 69};
90 70
71static unsigned int ipr_offsets[] = {
72 0xf8080000, /* IPRC */
73 0xf8080002, /* IPRD */
74 0xf8080004, /* IPRE */
75 0xf8080006, /* IPRF */
76 0xf8080008, /* IPRG */
77};
78
79/* given the IPR index return the address of the IPR register */
80unsigned int map_ipridx_to_addr(int idx)
81{
82 if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
83 return 0;
84 return ipr_offsets[idx];
85}
86
91void __init init_IRQ_ipr(void) 87void __init init_IRQ_ipr(void)
92{ 88{
93 make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map)); 89 make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map));
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index 4b60fcc7d667..4ed9110632bc 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -57,55 +57,52 @@ static int __init sh7206_devices_setup(void)
57} 57}
58__initcall(sh7206_devices_setup); 58__initcall(sh7206_devices_setup);
59 59
60#define INTC_IPR08 0xfffe0c04UL
61#define INTC_IPR09 0xfffe0c06UL
62#define INTC_IPR14 0xfffe0c10UL
63
64#define CMI0_IRQ 140
65
66#define MTU1_TGI1A 164
67
68#define SCIF0_BRI_IRQ 240
69#define SCIF0_ERI_IRQ 241
70#define SCIF0_RXI_IRQ 242
71#define SCIF0_TXI_IRQ 243
72
73#define SCIF1_BRI_IRQ 244
74#define SCIF1_ERI_IRQ 245
75#define SCIF1_RXI_IRQ 246
76#define SCIF1_TXI_IRQ 247
77
78#define SCIF2_BRI_IRQ 248
79#define SCIF2_ERI_IRQ 249
80#define SCIF2_RXI_IRQ 250
81#define SCIF2_TXI_IRQ 251
82
83#define SCIF3_BRI_IRQ 252
84#define SCIF3_ERI_IRQ 253
85#define SCIF3_RXI_IRQ 254
86#define SCIF3_TXI_IRQ 255
87
88static struct ipr_data sh7206_ipr_map[] = { 60static struct ipr_data sh7206_ipr_map[] = {
89 { CMI0_IRQ, INTC_IPR08, 3, 2 }, 61 { 140, 7, 12, 2 }, /* CMI0 */
90 { MTU2_TGI1A, INTC_IPR09, 1, 2 }, 62 { 164, 8, 4, 2 }, /* MTU2_TGI1A */
91 { SCIF0_ERI_IRQ, INTC_IPR14, 3, 3 }, 63 { 240, 13, 12, 3 }, /* SCIF0_BRI */
92 { SCIF0_RXI_IRQ, INTC_IPR14, 3, 3 }, 64 { 241, 13, 12, 3 }, /* SCIF0_ERI */
93 { SCIF0_BRI_IRQ, INTC_IPR14, 3, 3 }, 65 { 242, 13, 12, 3 }, /* SCIF0_RXI */
94 { SCIF0_TXI_IRQ, INTC_IPR14, 3, 3 }, 66 { 243, 13, 12, 3 }, /* SCIF0_TXI */
95 { SCIF1_ERI_IRQ, INTC_IPR14, 2, 3 }, 67 { 244, 13, 8, 3 }, /* SCIF1_BRI */
96 { SCIF1_RXI_IRQ, INTC_IPR14, 2, 3 }, 68 { 245, 13, 8, 3 }, /* SCIF1_ERI */
97 { SCIF1_BRI_IRQ, INTC_IPR14, 2, 3 }, 69 { 246, 13, 8, 3 }, /* SCIF1_RXI */
98 { SCIF1_TXI_IRQ, INTC_IPR14, 2, 3 }, 70 { 247, 13, 8, 3 }, /* SCIF1_TXI */
99 { SCIF2_ERI_IRQ, INTC_IPR14, 1, 3 }, 71 { 248, 13, 4, 3 }, /* SCIF2_BRI */
100 { SCIF2_RXI_IRQ, INTC_IPR14, 1, 3 }, 72 { 249, 13, 4, 3 }, /* SCIF2_ERI */
101 { SCIF2_BRI_IRQ, INTC_IPR14, 1, 3 }, 73 { 250, 13, 4, 3 }, /* SCIF2_RXI */
102 { SCIF2_TXI_IRQ, INTC_IPR14, 1, 3 }, 74 { 251, 13, 4, 3 }, /* SCIF2_TXI */
103 { SCIF3_ERI_IRQ, INTC_IPR14, 0, 3 }, 75 { 252, 13, 0, 3 }, /* SCIF3_BRI */
104 { SCIF3_RXI_IRQ, INTC_IPR14, 0, 3 }, 76 { 253, 13, 0, 3 }, /* SCIF3_ERI */
105 { SCIF3_BRI_IRQ, INTC_IPR14, 0, 3 }, 77 { 254, 13, 0, 3 }, /* SCIF3_RXI */
106 { SCIF3_TXI_IRQ, INTC_IPR14, 0, 3 }, 78 { 255, 13, 0, 3 }, /* SCIF3_TXI */
79};
80
81static unsigned int ipr_offsets[] = {
82 0xfffe0818, /* IPR01 */
83 0xfffe081a, /* IPR02 */
84 0, /* unused */
85 0, /* unused */
86 0xfffe0820, /* IPR05 */
87 0xfffe0c00, /* IPR06 */
88 0xfffe0c02, /* IPR07 */
89 0xfffe0c04, /* IPR08 */
90 0xfffe0c06, /* IPR09 */
91 0xfffe0c08, /* IPR10 */
92 0xfffe0c0a, /* IPR11 */
93 0xfffe0c0c, /* IPR12 */
94 0xfffe0c0e, /* IPR13 */
95 0xfffe0c10, /* IPR14 */
107}; 96};
108 97
98/* given the IPR index return the address of the IPR register */
99unsigned int map_ipridx_to_addr(int idx)
100{
101 if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
102 return 0;
103 return ipr_offsets[idx];
104}
105
109void __init init_IRQ_ipr(void) 106void __init init_IRQ_ipr(void)
110{ 107{
111 make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map)); 108 make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map));
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-08 13:29:13 -0400