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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/include/asm/hardware/sp810.h6
-rw-r--r--arch/arm/include/asm/io.h33
-rw-r--r--arch/arm/include/asm/memory.h2
-rw-r--r--arch/arm/kernel/head.S60
-rw-r--r--arch/arm/kernel/hw_breakpoint.c44
-rw-r--r--arch/arm/kernel/module.c22
-rw-r--r--arch/arm/kernel/perf_event.c2
-rw-r--r--arch/arm/kernel/smp_twd.c7
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-ep93xx/gpio.c7
-rw-r--r--arch/arm/mach-footbridge/include/mach/debug-macro.S4
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/timex.h5
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c9
-rw-r--r--arch/arm/mach-mxs/clock-mx23.c4
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c7
-rw-r--r--arch/arm/mach-mxs/clock.c2
-rw-r--r--arch/arm/mach-mxs/gpio.c2
-rw-r--r--arch/arm/mach-mxs/include/mach/clock.h2
-rw-r--r--arch/arm/mach-omap1/include/mach/entry-macro.S13
-rw-r--r--arch/arm/mach-omap1/irq.c2
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c24
-rw-r--r--arch/arm/mach-omap1/time.c1
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c27
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c2
-rw-r--r--arch/arm/mach-omap2/board-rm680.c3
-rw-r--r--arch/arm/mach-omap2/dma.c2
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S14
-rw-r--r--arch/arm/mach-omap2/io.c6
-rw-r--r--arch/arm/mach-omap2/mux.c3
-rw-r--r--arch/arm/mach-omap2/pm24xx.c4
-rw-r--r--arch/arm/mach-omap2/pm34xx.c11
-rw-r--r--arch/arm/mach-omap2/serial.c4
-rw-r--r--arch/arm/mach-omap2/smartreflex.c11
-rw-r--r--arch/arm/mach-omap2/voltage.c1
-rw-r--r--arch/arm/mach-pxa/colibri-evalboard.c2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa300.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/colibri.h2
-rw-r--r--arch/arm/mach-pxa/palm27x.c2
-rw-r--r--arch/arm/mach-pxa/pm.c4
-rw-r--r--arch/arm/mach-realview/Kconfig49
-rw-r--r--arch/arm/mach-realview/platsmp.c2
-rw-r--r--arch/arm/mach-s5pv310/Kconfig1
-rw-r--r--arch/arm/mach-s5pv310/include/mach/map.h2
-rw-r--r--arch/arm/mach-s5pv310/include/mach/sysmmu.h5
-rw-r--r--arch/arm/mach-sa1100/collie.c3
-rw-r--r--arch/arm/mach-shmobile/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c180
-rw-r--r--arch/arm/mach-shmobile/board-g3evm.c1
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c5
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c4
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c29
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c11
-rw-r--r--arch/arm/mach-shmobile/intc-sh73a0.c5
-rw-r--r--arch/arm/mach-tegra/gpio.c4
-rw-r--r--arch/arm/mach-tegra/include/mach/clk.h2
-rw-r--r--arch/arm/mach-tegra/include/mach/clkdev.h2
-rw-r--r--arch/arm/mach-tegra/include/mach/kbc.h61
-rw-r--r--arch/arm/mach-tegra/irq.c18
-rw-r--r--arch/arm/mach-versatile/Kconfig10
-rw-r--r--arch/arm/mach-vexpress/platsmp.c2
-rw-r--r--arch/arm/mach-vexpress/v2m.c9
-rw-r--r--arch/arm/mm/Kconfig6
-rw-r--r--arch/arm/mm/init.c6
-rw-r--r--arch/arm/oprofile/common.c14
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h2
-rw-r--r--arch/arm/plat-pxa/mfp.c8
-rw-r--r--arch/arm/plat-s5p/Kconfig24
-rw-r--r--arch/arm/plat-s5p/Makefile2
-rw-r--r--arch/arm/plat-s5p/include/plat/sysmmu.h23
-rw-r--r--arch/arm/plat-s5p/sysmmu.c4
-rw-r--r--arch/arm/plat-samsung/include/plat/pm.h2
-rw-r--r--arch/arm/tools/mach-types105
-rw-r--r--arch/avr32/include/asm/pgalloc.h1
-rw-r--r--arch/blackfin/include/asm/bfin_serial.h2
-rw-r--r--arch/m32r/kernel/irq.c2
-rw-r--r--arch/m68k/amiga/config.c16
-rw-r--r--arch/m68k/atari/ataints.c4
-rw-r--r--arch/m68k/atari/config.c2
-rw-r--r--arch/m68k/atari/debug.c14
-rw-r--r--arch/m68k/include/asm/atarihw.h2
-rw-r--r--arch/m68k/include/asm/string.h16
-rw-r--r--arch/m68k/lib/string.c11
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S6
-rw-r--r--arch/m68knommu/lib/Makefile2
-rw-r--r--arch/m68knommu/lib/memmove.c105
-rw-r--r--arch/m68knommu/platform/5249/intc2.c4
-rw-r--r--arch/m68knommu/platform/68328/entry.S1
-rw-r--r--arch/m68knommu/platform/68360/commproc.c2
-rw-r--r--arch/m68knommu/platform/68360/config.c2
-rw-r--r--arch/m68knommu/platform/68360/entry.S1
-rw-r--r--arch/m68knommu/platform/68360/ints.c4
-rw-r--r--arch/m68knommu/platform/coldfire/entry.S1
-rw-r--r--arch/microblaze/include/asm/irqflags.h2
-rw-r--r--arch/microblaze/include/asm/pgtable.h27
-rw-r--r--arch/microblaze/kernel/cpu/pvr.c4
-rw-r--r--arch/microblaze/kernel/head.S29
-rw-r--r--arch/microblaze/kernel/hw_exception_handler.S4
-rw-r--r--arch/microblaze/kernel/setup.c4
-rw-r--r--arch/microblaze/lib/fastcopy.S4
-rw-r--r--arch/parisc/kernel/pdc_cons.c4
-rw-r--r--arch/powerpc/include/asm/mmu-book3e.h8
-rw-r--r--arch/powerpc/include/asm/page.h2
-rw-r--r--arch/powerpc/kernel/cpu_setup_6xx.S40
-rw-r--r--arch/powerpc/kernel/cputable.c4
-rw-r--r--arch/powerpc/mm/numa.c55
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c37
-rw-r--r--arch/s390/Kconfig2
-rw-r--r--arch/s390/crypto/sha_common.c1
-rw-r--r--arch/s390/include/asm/cacheflush.h23
-rw-r--r--arch/s390/include/asm/processor.h5
-rw-r--r--arch/s390/include/asm/tlb.h1
-rw-r--r--arch/s390/kernel/traps.c37
-rw-r--r--arch/s390/lib/uaccess_std.c10
-rw-r--r--arch/s390/mm/pgtable.c3
-rw-r--r--arch/sh/Kconfig1
-rw-r--r--arch/sh/Makefile3
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c2
-rw-r--r--arch/sh/boot/Makefile11
-rw-r--r--arch/sh/boot/compressed/Makefile4
-rw-r--r--arch/sh/boot/compressed/misc.c4
-rw-r--r--arch/sh/include/asm/pgtable.h1
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c6
-rw-r--r--arch/sh/kernel/topology.c1
-rw-r--r--arch/sparc/include/asm/pcr.h2
-rw-r--r--arch/sparc/kernel/iommu.c5
-rw-r--r--arch/sparc/kernel/pcr.c2
-rw-r--r--arch/sparc/kernel/smp_64.c2
-rw-r--r--arch/sparc/kernel/una_asm_32.S4
-rw-r--r--arch/sparc/lib/bitext.c5
-rw-r--r--arch/x86/include/asm/apic.h1
-rw-r--r--arch/x86/include/asm/cpu.h2
-rw-r--r--arch/x86/include/asm/mmu_context.h5
-rw-r--r--arch/x86/include/asm/paravirt.h5
-rw-r--r--arch/x86/include/asm/percpu.h24
-rw-r--r--arch/x86/include/asm/smp.h5
-rw-r--r--arch/x86/include/asm/system_64.h22
-rw-r--r--arch/x86/kernel/acpi/sleep.c15
-rw-r--r--arch/x86/kernel/alternative.c2
-rw-r--r--arch/x86/kernel/apic/apic.c9
-rw-r--r--arch/x86/kernel/apic/io_apic.c3
-rw-r--r--arch/x86/kernel/cpu/mtrr/main.c10
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c12
-rw-r--r--arch/x86/kernel/dumpstack_64.c2
-rw-r--r--arch/x86/kernel/head_32.S30
-rw-r--r--arch/x86/kernel/irq.c3
-rw-r--r--arch/x86/kernel/process.c24
-rw-r--r--arch/x86/kernel/smpboot.c8
-rw-r--r--arch/x86/kvm/svm.c2
-rw-r--r--arch/x86/mm/pageattr.c8
-rw-r--r--arch/x86/xen/p2m.c18
-rw-r--r--arch/x86/xen/setup.c8
154 files changed, 1113 insertions, 633 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5cff165b7eb0..26d45e5b636b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1391,7 +1391,7 @@ config AEABI
1391 1391
1392config OABI_COMPAT 1392config OABI_COMPAT
1393 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1393 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1394 depends on AEABI && EXPERIMENTAL 1394 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1395 default y 1395 default y
1396 help 1396 help
1397 This option preserves the old syscall interface along with the 1397 This option preserves the old syscall interface along with the
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
index a101f10bb5b1..721847dc68ab 100644
--- a/arch/arm/include/asm/hardware/sp810.h
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -50,6 +50,12 @@
50#define SCPCELLID2 0xFF8 50#define SCPCELLID2 0xFF8
51#define SCPCELLID3 0xFFC 51#define SCPCELLID3 0xFFC
52 52
53#define SCCTRL_TIMEREN0SEL_REFCLK (0 << 15)
54#define SCCTRL_TIMEREN0SEL_TIMCLK (1 << 15)
55
56#define SCCTRL_TIMEREN1SEL_REFCLK (0 << 17)
57#define SCCTRL_TIMEREN1SEL_TIMCLK (1 << 17)
58
53static inline void sysctl_soft_reset(void __iomem *base) 59static inline void sysctl_soft_reset(void __iomem *base)
54{ 60{
55 /* writing any value to SCSYSSTAT reg will reset system */ 61 /* writing any value to SCSYSSTAT reg will reset system */
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 20e0f7c9e03e..d66605dea55a 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -95,6 +95,15 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
95 return (void __iomem *)addr; 95 return (void __iomem *)addr;
96} 96}
97 97
98/* IO barriers */
99#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
100#define __iormb() rmb()
101#define __iowmb() wmb()
102#else
103#define __iormb() do { } while (0)
104#define __iowmb() do { } while (0)
105#endif
106
98/* 107/*
99 * Now, pick up the machine-defined IO definitions 108 * Now, pick up the machine-defined IO definitions
100 */ 109 */
@@ -125,17 +134,17 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
125 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. 134 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
126 */ 135 */
127#ifdef __io 136#ifdef __io
128#define outb(v,p) __raw_writeb(v,__io(p)) 137#define outb(v,p) ({ __iowmb(); __raw_writeb(v,__io(p)); })
129#define outw(v,p) __raw_writew((__force __u16) \ 138#define outw(v,p) ({ __iowmb(); __raw_writew((__force __u16) \
130 cpu_to_le16(v),__io(p)) 139 cpu_to_le16(v),__io(p)); })
131#define outl(v,p) __raw_writel((__force __u32) \ 140#define outl(v,p) ({ __iowmb(); __raw_writel((__force __u32) \
132 cpu_to_le32(v),__io(p)) 141 cpu_to_le32(v),__io(p)); })
133 142
134#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; }) 143#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __iormb(); __v; })
135#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \ 144#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \
136 __raw_readw(__io(p))); __v; }) 145 __raw_readw(__io(p))); __iormb(); __v; })
137#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \ 146#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \
138 __raw_readl(__io(p))); __v; }) 147 __raw_readl(__io(p))); __iormb(); __v; })
139 148
140#define outsb(p,d,l) __raw_writesb(__io(p),d,l) 149#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
141#define outsw(p,d,l) __raw_writesw(__io(p),d,l) 150#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
@@ -192,14 +201,6 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
192#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ 201#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
193 cpu_to_le32(v),__mem_pci(c))) 202 cpu_to_le32(v),__mem_pci(c)))
194 203
195#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
196#define __iormb() rmb()
197#define __iowmb() wmb()
198#else
199#define __iormb() do { } while (0)
200#define __iowmb() do { } while (0)
201#endif
202
203#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) 204#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
204#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) 205#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
205#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) 206#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 23c2e8e5c0fa..d0ee74b7cf86 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -188,7 +188,7 @@
188 * translation for translating DMA addresses. Use the driver 188 * translation for translating DMA addresses. Use the driver
189 * DMA support - see dma-mapping.h. 189 * DMA support - see dma-mapping.h.
190 */ 190 */
191static inline unsigned long virt_to_phys(void *x) 191static inline unsigned long virt_to_phys(const volatile void *x)
192{ 192{
193 return __virt_to_phys((unsigned long)(x)); 193 return __virt_to_phys((unsigned long)(x));
194} 194}
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index f17d9a09e8fb..f06ff9feb0db 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -391,25 +391,24 @@ ENDPROC(__turn_mmu_on)
391 391
392 392
393#ifdef CONFIG_SMP_ON_UP 393#ifdef CONFIG_SMP_ON_UP
394 __INIT
394__fixup_smp: 395__fixup_smp:
395 mov r4, #0x00070000 396 and r3, r9, #0x000f0000 @ architecture version
396 orr r3, r4, #0xff000000 @ mask 0xff070000 397 teq r3, #0x000f0000 @ CPU ID supported?
397 orr r4, r4, #0x41000000 @ val 0x41070000
398 and r0, r9, r3
399 teq r0, r4 @ ARM CPU and ARMv6/v7?
400 bne __fixup_smp_on_up @ no, assume UP 398 bne __fixup_smp_on_up @ no, assume UP
401 399
402 orr r3, r3, #0x0000ff00 400 bic r3, r9, #0x00ff0000
403 orr r3, r3, #0x000000f0 @ mask 0xff07fff0 401 bic r3, r3, #0x0000000f @ mask 0xff00fff0
402 mov r4, #0x41000000
404 orr r4, r4, #0x0000b000 403 orr r4, r4, #0x0000b000
405 orr r4, r4, #0x00000020 @ val 0x4107b020 404 orr r4, r4, #0x00000020 @ val 0x4100b020
406 and r0, r9, r3 405 teq r3, r4 @ ARM 11MPCore?
407 teq r0, r4 @ ARM 11MPCore?
408 moveq pc, lr @ yes, assume SMP 406 moveq pc, lr @ yes, assume SMP
409 407
410 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR 408 mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
411 tst r0, #1 << 31 409 and r0, r0, #0xc0000000 @ multiprocessing extensions and
412 movne pc, lr @ bit 31 => SMP 410 teq r0, #0x80000000 @ not part of a uniprocessor system?
411 moveq pc, lr @ yes, assume SMP
413 412
414__fixup_smp_on_up: 413__fixup_smp_on_up:
415 adr r0, 1f 414 adr r0, 1f
@@ -417,18 +416,7 @@ __fixup_smp_on_up:
417 sub r3, r0, r3 416 sub r3, r0, r3
418 add r4, r4, r3 417 add r4, r4, r3
419 add r5, r5, r3 418 add r5, r5, r3
4202: cmp r4, r5 419 b __do_fixup_smp_on_up
421 movhs pc, lr
422 ldmia r4!, {r0, r6}
423 ARM( str r6, [r0, r3] )
424 THUMB( add r0, r0, r3 )
425#ifdef __ARMEB__
426 THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian.
427#endif
428 THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords
429 THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r3.
430 THUMB( strh r6, [r0] )
431 b 2b
432ENDPROC(__fixup_smp) 420ENDPROC(__fixup_smp)
433 421
434 .align 422 .align
@@ -442,7 +430,31 @@ smp_on_up:
442 ALT_SMP(.long 1) 430 ALT_SMP(.long 1)
443 ALT_UP(.long 0) 431 ALT_UP(.long 0)
444 .popsection 432 .popsection
433#endif
445 434
435 .text
436__do_fixup_smp_on_up:
437 cmp r4, r5
438 movhs pc, lr
439 ldmia r4!, {r0, r6}
440 ARM( str r6, [r0, r3] )
441 THUMB( add r0, r0, r3 )
442#ifdef __ARMEB__
443 THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian.
446#endif 444#endif
445 THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords
446 THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r3.
447 THUMB( strh r6, [r0] )
448 b __do_fixup_smp_on_up
449ENDPROC(__do_fixup_smp_on_up)
450
451ENTRY(fixup_smp)
452 stmfd sp!, {r4 - r6, lr}
453 mov r4, r0
454 add r5, r0, r1
455 mov r3, #0
456 bl __do_fixup_smp_on_up
457 ldmfd sp!, {r4 - r6, pc}
458ENDPROC(fixup_smp)
447 459
448#include "head-common.S" 460#include "head-common.S"
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index c9f3f0467570..d600bd350704 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -137,11 +137,10 @@ static u8 get_debug_arch(void)
137 u32 didr; 137 u32 didr;
138 138
139 /* Do we implement the extended CPUID interface? */ 139 /* Do we implement the extended CPUID interface? */
140 if (((read_cpuid_id() >> 16) & 0xf) != 0xf) { 140 if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf),
141 pr_warning("CPUID feature registers not supported. " 141 "CPUID feature registers not supported. "
142 "Assuming v6 debug is present.\n"); 142 "Assuming v6 debug is present.\n"))
143 return ARM_DEBUG_ARCH_V6; 143 return ARM_DEBUG_ARCH_V6;
144 }
145 144
146 ARM_DBG_READ(c0, 0, didr); 145 ARM_DBG_READ(c0, 0, didr);
147 return (didr >> 16) & 0xf; 146 return (didr >> 16) & 0xf;
@@ -152,6 +151,12 @@ u8 arch_get_debug_arch(void)
152 return debug_arch; 151 return debug_arch;
153} 152}
154 153
154static int debug_arch_supported(void)
155{
156 u8 arch = get_debug_arch();
157 return arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14;
158}
159
155/* Determine number of BRP register available. */ 160/* Determine number of BRP register available. */
156static int get_num_brp_resources(void) 161static int get_num_brp_resources(void)
157{ 162{
@@ -268,6 +273,9 @@ out:
268 273
269int hw_breakpoint_slots(int type) 274int hw_breakpoint_slots(int type)
270{ 275{
276 if (!debug_arch_supported())
277 return 0;
278
271 /* 279 /*
272 * We can be called early, so don't rely on 280 * We can be called early, so don't rely on
273 * our static variables being initialised. 281 * our static variables being initialised.
@@ -834,11 +842,11 @@ static void reset_ctrl_regs(void *unused)
834 842
835 /* 843 /*
836 * v7 debug contains save and restore registers so that debug state 844 * v7 debug contains save and restore registers so that debug state
837 * can be maintained across low-power modes without leaving 845 * can be maintained across low-power modes without leaving the debug
838 * the debug logic powered up. It is IMPLEMENTATION DEFINED whether 846 * logic powered up. It is IMPLEMENTATION DEFINED whether we can access
839 * we can write to the debug registers out of reset, so we must 847 * the debug registers out of reset, so we must unlock the OS Lock
840 * unlock the OS Lock Access Register to avoid taking undefined 848 * Access Register to avoid taking undefined instruction exceptions
841 * instruction exceptions later on. 849 * later on.
842 */ 850 */
843 if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { 851 if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
844 /* 852 /*
@@ -882,7 +890,7 @@ static int __init arch_hw_breakpoint_init(void)
882 890
883 debug_arch = get_debug_arch(); 891 debug_arch = get_debug_arch();
884 892
885 if (debug_arch > ARM_DEBUG_ARCH_V7_ECP14) { 893 if (!debug_arch_supported()) {
886 pr_info("debug architecture 0x%x unsupported.\n", debug_arch); 894 pr_info("debug architecture 0x%x unsupported.\n", debug_arch);
887 return 0; 895 return 0;
888 } 896 }
@@ -899,18 +907,18 @@ static int __init arch_hw_breakpoint_init(void)
899 pr_info("%d breakpoint(s) reserved for watchpoint " 907 pr_info("%d breakpoint(s) reserved for watchpoint "
900 "single-step.\n", core_num_reserved_brps); 908 "single-step.\n", core_num_reserved_brps);
901 909
910 /*
911 * Reset the breakpoint resources. We assume that a halting
912 * debugger will leave the world in a nice state for us.
913 */
914 on_each_cpu(reset_ctrl_regs, NULL, 1);
915
902 ARM_DBG_READ(c1, 0, dscr); 916 ARM_DBG_READ(c1, 0, dscr);
903 if (dscr & ARM_DSCR_HDBGEN) { 917 if (dscr & ARM_DSCR_HDBGEN) {
918 max_watchpoint_len = 4;
904 pr_warning("halting debug mode enabled. Assuming maximum " 919 pr_warning("halting debug mode enabled. Assuming maximum "
905 "watchpoint size of 4 bytes."); 920 "watchpoint size of %u bytes.", max_watchpoint_len);
906 } else { 921 } else {
907 /*
908 * Reset the breakpoint resources. We assume that a halting
909 * debugger will leave the world in a nice state for us.
910 */
911 smp_call_function(reset_ctrl_regs, NULL, 1);
912 reset_ctrl_regs(NULL);
913
914 /* Work out the maximum supported watchpoint length. */ 922 /* Work out the maximum supported watchpoint length. */
915 max_watchpoint_len = get_max_wp_len(); 923 max_watchpoint_len = get_max_wp_len();
916 pr_info("maximum watchpoint size is %u bytes.\n", 924 pr_info("maximum watchpoint size is %u bytes.\n",
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 2cfe8161b478..6d4105e6872f 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -22,6 +22,7 @@
22 22
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/sections.h> 24#include <asm/sections.h>
25#include <asm/smp_plat.h>
25#include <asm/unwind.h> 26#include <asm/unwind.h>
26 27
27#ifdef CONFIG_XIP_KERNEL 28#ifdef CONFIG_XIP_KERNEL
@@ -268,12 +269,28 @@ struct mod_unwind_map {
268 const Elf_Shdr *txt_sec; 269 const Elf_Shdr *txt_sec;
269}; 270};
270 271
272static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
273 const Elf_Shdr *sechdrs, const char *name)
274{
275 const Elf_Shdr *s, *se;
276 const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
277
278 for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
279 if (strcmp(name, secstrs + s->sh_name) == 0)
280 return s;
281
282 return NULL;
283}
284
285extern void fixup_smp(const void *, unsigned long);
286
271int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, 287int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
272 struct module *mod) 288 struct module *mod)
273{ 289{
290 const Elf_Shdr * __maybe_unused s = NULL;
274#ifdef CONFIG_ARM_UNWIND 291#ifdef CONFIG_ARM_UNWIND
275 const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; 292 const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
276 const Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; 293 const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
277 struct mod_unwind_map maps[ARM_SEC_MAX]; 294 struct mod_unwind_map maps[ARM_SEC_MAX];
278 int i; 295 int i;
279 296
@@ -315,6 +332,9 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
315 maps[i].txt_sec->sh_addr, 332 maps[i].txt_sec->sh_addr,
316 maps[i].txt_sec->sh_size); 333 maps[i].txt_sec->sh_size);
317#endif 334#endif
335 s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
336 if (s && !is_smp())
337 fixup_smp((void *)s->sh_addr, s->sh_size);
318 return 0; 338 return 0;
319} 339}
320 340
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 5efa2647a2fb..d150ad1ccb5d 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -700,7 +700,7 @@ user_backtrace(struct frame_tail __user *tail,
700 * Frame pointers should strictly progress back up the stack 700 * Frame pointers should strictly progress back up the stack
701 * (towards higher addresses). 701 * (towards higher addresses).
702 */ 702 */
703 if (tail >= buftail.fp) 703 if (tail + 1 >= buftail.fp)
704 return NULL; 704 return NULL;
705 705
706 return buftail.fp - 1; 706 return buftail.fp - 1;
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index fd9156698ab9..60636f499cb3 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -36,6 +36,7 @@ static void twd_set_mode(enum clock_event_mode mode,
36 /* timer load already set up */ 36 /* timer load already set up */
37 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE 37 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
38 | TWD_TIMER_CONTROL_PERIODIC; 38 | TWD_TIMER_CONTROL_PERIODIC;
39 __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
39 break; 40 break;
40 case CLOCK_EVT_MODE_ONESHOT: 41 case CLOCK_EVT_MODE_ONESHOT:
41 /* period set, and timer enabled in 'next_event' hook */ 42 /* period set, and timer enabled in 'next_event' hook */
@@ -81,7 +82,7 @@ int twd_timer_ack(void)
81 82
82static void __cpuinit twd_calibrate_rate(void) 83static void __cpuinit twd_calibrate_rate(void)
83{ 84{
84 unsigned long load, count; 85 unsigned long count;
85 u64 waitjiffies; 86 u64 waitjiffies;
86 87
87 /* 88 /*
@@ -116,10 +117,6 @@ static void __cpuinit twd_calibrate_rate(void)
116 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, 117 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
117 (twd_timer_rate / 1000000) % 100); 118 (twd_timer_rate / 1000000) % 100);
118 } 119 }
119
120 load = twd_timer_rate / HZ;
121
122 __raw_writel(load, twd_base + TWD_TIMER_LOAD);
123} 120}
124 121
125/* 122/*
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index ffdf87be2958..82079545adc4 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release);
838static struct resource ep93xx_ac97_resources[] = { 838static struct resource ep93xx_ac97_resources[] = {
839 { 839 {
840 .start = EP93XX_AAC_PHYS_BASE, 840 .start = EP93XX_AAC_PHYS_BASE,
841 .end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1, 841 .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
842 .flags = IORESOURCE_MEM, 842 .flags = IORESOURCE_MEM,
843 }, 843 },
844 { 844 {
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index f3dc76fdcea8..bec34b834958 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -427,6 +427,13 @@ void __init ep93xx_gpio_init(void)
427{ 427{
428 int i; 428 int i;
429 429
430 /* Set Ports C, D, E, G, and H for GPIO use */
431 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
432 EP93XX_SYSCON_DEVCFG_GONK |
433 EP93XX_SYSCON_DEVCFG_EONIDE |
434 EP93XX_SYSCON_DEVCFG_GONIDE |
435 EP93XX_SYSCON_DEVCFG_HONIDE);
436
430 for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) 437 for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++)
431 gpiochip_add(&ep93xx_gpio_banks[i].chip); 438 gpiochip_add(&ep93xx_gpio_banks[i].chip);
432} 439}
diff --git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S
index 3c9e0c40c679..30b971d65815 100644
--- a/arch/arm/mach-footbridge/include/mach/debug-macro.S
+++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S
@@ -17,8 +17,8 @@
17 /* For NetWinder debugging */ 17 /* For NetWinder debugging */
18 .macro addruart, rp, rv 18 .macro addruart, rp, rv
19 mov \rp, #0x000003f8 19 mov \rp, #0x000003f8
20 orr \rv, \rp, #0x7c000000 @ physical 20 orr \rv, \rp, #0xff000000 @ virtual
21 orr \rp, \rp, #0xff000000 @ virtual 21 orr \rp, \rp, #0x7c000000 @ physical
22 .endm 22 .endm
23 23
24#define UART_SHIFT 0 24#define UART_SHIFT 0
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index aa76cfd9f348..8382e7902078 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = {
180 KEY(3, 3, KEY_POWER), 180 KEY(3, 3, KEY_POWER),
181}; 181};
182 182
183static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = { 183static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = {
184 .keymap = mx25pdk_keymap, 184 .keymap = mx25pdk_keymap,
185 .keymap_size = ARRAY_SIZE(mx25pdk_keymap), 185 .keymap_size = ARRAY_SIZE(mx25pdk_keymap),
186}; 186};
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 4dc68d6bb6be..9fd894271d5d 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -432,7 +432,7 @@ static struct clocksource clocksource_ixp4xx = {
432 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 432 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
433}; 433};
434 434
435unsigned long ixp4xx_timer_freq = FREQ; 435unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
436EXPORT_SYMBOL(ixp4xx_timer_freq); 436EXPORT_SYMBOL(ixp4xx_timer_freq);
437static void __init ixp4xx_clocksource_init(void) 437static void __init ixp4xx_clocksource_init(void)
438{ 438{
@@ -496,7 +496,7 @@ static struct clock_event_device clockevent_ixp4xx = {
496 496
497static void __init ixp4xx_clockevent_init(void) 497static void __init ixp4xx_clockevent_init(void)
498{ 498{
499 clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC, 499 clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
500 clockevent_ixp4xx.shift); 500 clockevent_ixp4xx.shift);
501 clockevent_ixp4xx.max_delta_ns = 501 clockevent_ixp4xx.max_delta_ns =
502 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx); 502 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
diff --git a/arch/arm/mach-ixp4xx/include/mach/timex.h b/arch/arm/mach-ixp4xx/include/mach/timex.h
index 2c3f93c3eb79..c9e930f29339 100644
--- a/arch/arm/mach-ixp4xx/include/mach/timex.h
+++ b/arch/arm/mach-ixp4xx/include/mach/timex.h
@@ -10,6 +10,7 @@
10 * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the 10 * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the
11 * timer register ignores the bottom 2 bits of the LATCH value. 11 * timer register ignores the bottom 2 bits of the LATCH value.
12 */ 12 */
13#define FREQ 66666000 13#define IXP4XX_TIMER_FREQ 66666000
14#define CLOCK_TICK_RATE (((FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) 14#define CLOCK_TICK_RATE \
15 (((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
15 16
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index bfdbe4b5a3cc..852f7c9f87d0 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -265,6 +265,11 @@ void qmgr_release_queue(unsigned int queue)
265 qmgr_queue_descs[queue], queue); 265 qmgr_queue_descs[queue], queue);
266 qmgr_queue_descs[queue][0] = '\x0'; 266 qmgr_queue_descs[queue][0] = '\x0';
267#endif 267#endif
268
269 while ((addr = qmgr_get_entry(queue)))
270 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
271 queue, addr);
272
268 __raw_writel(0, &qmgr_regs->sram[queue]); 273 __raw_writel(0, &qmgr_regs->sram[queue]);
269 274
270 used_sram_bitmap[0] &= ~mask[0]; 275 used_sram_bitmap[0] &= ~mask[0];
@@ -275,10 +280,6 @@ void qmgr_release_queue(unsigned int queue)
275 spin_unlock_irq(&qmgr_lock); 280 spin_unlock_irq(&qmgr_lock);
276 281
277 module_put(THIS_MODULE); 282 module_put(THIS_MODULE);
278
279 while ((addr = qmgr_get_entry(queue)))
280 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
281 queue, addr);
282} 283}
283 284
284static int qmgr_init(void) 285static int qmgr_init(void)
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index b1a362ebfded..ca72a05ed9c1 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
304 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ 304 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
305 reg &= ~BM_CLKCTRL_##dr##_DIV; \ 305 reg &= ~BM_CLKCTRL_##dr##_DIV; \
306 reg |= div << BP_CLKCTRL_##dr##_DIV; \ 306 reg |= div << BP_CLKCTRL_##dr##_DIV; \
307 if (reg | (1 << clk->enable_shift)) { \ 307 if (reg & (1 << clk->enable_shift)) { \
308 pr_err("%s: clock is gated\n", __func__); \ 308 pr_err("%s: clock is gated\n", __func__); \
309 return -EINVAL; \ 309 return -EINVAL; \
310 } \ 310 } \
@@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
347{ \ 347{ \
348 if (parent != clk->parent) { \ 348 if (parent != clk->parent) { \
349 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ 349 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
350 HW_CLKCTRL_CLKSEQ_TOG); \ 350 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
351 clk->parent = parent; \ 351 clk->parent = parent; \
352 } \ 352 } \
353 \ 353 \
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 56312c092a9e..fd1c4c54b8e5 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
355 } else { \ 355 } else { \
356 reg &= ~BM_CLKCTRL_##dr##_DIV; \ 356 reg &= ~BM_CLKCTRL_##dr##_DIV; \
357 reg |= div << BP_CLKCTRL_##dr##_DIV; \ 357 reg |= div << BP_CLKCTRL_##dr##_DIV; \
358 if (reg | (1 << clk->enable_shift)) { \ 358 if (reg & (1 << clk->enable_shift)) { \
359 pr_err("%s: clock is gated\n", __func__); \ 359 pr_err("%s: clock is gated\n", __func__); \
360 return -EINVAL; \ 360 return -EINVAL; \
361 } \ 361 } \
362 } \ 362 } \
363 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \ 363 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
364 \ 364 \
365 for (i = 10000; i; i--) \ 365 for (i = 10000; i; i--) \
366 if (!(__raw_readl(CLKCTRL_BASE_ADDR + \ 366 if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
@@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
483{ \ 483{ \
484 if (parent != clk->parent) { \ 484 if (parent != clk->parent) { \
485 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ 485 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
486 HW_CLKCTRL_CLKSEQ_TOG); \ 486 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
487 clk->parent = parent; \ 487 clk->parent = parent; \
488 } \ 488 } \
489 \ 489 \
@@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = {
609 _REGISTER_CLOCK("duart", NULL, uart_clk) 609 _REGISTER_CLOCK("duart", NULL, uart_clk)
610 _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) 610 _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
611 _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) 611 _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
612 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
613 _REGISTER_CLOCK("rtc", NULL, rtc_clk) 612 _REGISTER_CLOCK("rtc", NULL, rtc_clk)
614 _REGISTER_CLOCK("pll2", NULL, pll2_clk) 613 _REGISTER_CLOCK("pll2", NULL, pll2_clk)
615 _REGISTER_CLOCK(NULL, "hclk", hbus_clk) 614 _REGISTER_CLOCK(NULL, "hclk", hbus_clk)
diff --git a/arch/arm/mach-mxs/clock.c b/arch/arm/mach-mxs/clock.c
index e7d2269cf70e..a7093c88e6a6 100644
--- a/arch/arm/mach-mxs/clock.c
+++ b/arch/arm/mach-mxs/clock.c
@@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk)
57 if (clk->disable) 57 if (clk->disable)
58 clk->disable(clk); 58 clk->disable(clk);
59 __clk_disable(clk->parent); 59 __clk_disable(clk->parent);
60 __clk_disable(clk->secondary);
61 } 60 }
62} 61}
63 62
@@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk)
68 67
69 if (clk->usecount++ == 0) { 68 if (clk->usecount++ == 0) {
70 __clk_enable(clk->parent); 69 __clk_enable(clk->parent);
71 __clk_enable(clk->secondary);
72 70
73 if (clk->enable) 71 if (clk->enable)
74 clk->enable(clk); 72 clk->enable(clk);
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c
index d7ad7a61366d..cb0c0e83a527 100644
--- a/arch/arm/mach-mxs/gpio.c
+++ b/arch/arm/mach-mxs/gpio.c
@@ -139,6 +139,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
139 struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq); 139 struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
140 u32 gpio_irq_no_base = port->virtual_irq_start; 140 u32 gpio_irq_no_base = port->virtual_irq_start;
141 141
142 desc->irq_data.chip->irq_ack(&desc->irq_data);
143
142 irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) & 144 irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
143 __raw_readl(port->base + PINCTRL_IRQEN(port->id)); 145 __raw_readl(port->base + PINCTRL_IRQEN(port->id));
144 146
diff --git a/arch/arm/mach-mxs/include/mach/clock.h b/arch/arm/mach-mxs/include/mach/clock.h
index 041e276d8a32..592c9ab5d760 100644
--- a/arch/arm/mach-mxs/include/mach/clock.h
+++ b/arch/arm/mach-mxs/include/mach/clock.h
@@ -29,8 +29,6 @@ struct clk {
29 int id; 29 int id;
30 /* Source clock this clk depends on */ 30 /* Source clock this clk depends on */
31 struct clk *parent; 31 struct clk *parent;
32 /* Secondary clock to enable/disable with this clock */
33 struct clk *secondary;
34 /* Reference count of clock enable/disable */ 32 /* Reference count of clock enable/disable */
35 __s8 usecount; 33 __s8 usecount;
36 /* Register bit position for clock's enable/disable control. */ 34 /* Register bit position for clock's enable/disable control. */
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S
index c9be6d4d83e2..bfb4fb1d7382 100644
--- a/arch/arm/mach-omap1/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap1/include/mach/entry-macro.S
@@ -14,19 +14,6 @@
14#include <mach/irqs.h> 14#include <mach/irqs.h>
15#include <asm/hardware/gic.h> 15#include <asm/hardware/gic.h>
16 16
17/*
18 * We use __glue to avoid errors with multiple definitions of
19 * .globl omap_irq_flags as it's included from entry-armv.S but not
20 * from entry-common.S.
21 */
22#ifdef __glue
23 .pushsection .data
24 .globl omap_irq_flags
25omap_irq_flags:
26 .word 0
27 .popsection
28#endif
29
30 .macro disable_fiq 17 .macro disable_fiq
31 .endm 18 .endm
32 19
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 47701584df35..731dd33bff51 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -57,6 +57,7 @@ struct omap_irq_bank {
57 unsigned long wake_enable; 57 unsigned long wake_enable;
58}; 58};
59 59
60u32 omap_irq_flags;
60static unsigned int irq_bank_count; 61static unsigned int irq_bank_count;
61static struct omap_irq_bank *irq_banks; 62static struct omap_irq_bank *irq_banks;
62 63
@@ -176,7 +177,6 @@ static struct irq_chip omap_irq_chip = {
176 177
177void __init omap_init_irq(void) 178void __init omap_init_irq(void)
178{ 179{
179 extern unsigned int omap_irq_flags;
180 int i, j; 180 int i, j;
181 181
182#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) 182#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index c9088d85da04..453809359ba6 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -37,7 +37,7 @@ int omap_lcd_dma_running(void)
37 * On OMAP1510, internal LCD controller will start the transfer 37 * On OMAP1510, internal LCD controller will start the transfer
38 * when it gets enabled, so assume DMA running if LCD enabled. 38 * when it gets enabled, so assume DMA running if LCD enabled.
39 */ 39 */
40 if (cpu_is_omap1510()) 40 if (cpu_is_omap15xx())
41 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN) 41 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
42 return 1; 42 return 1;
43 43
@@ -95,7 +95,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
95 95
96void omap_set_lcd_dma_b1_rotation(int rotate) 96void omap_set_lcd_dma_b1_rotation(int rotate)
97{ 97{
98 if (cpu_is_omap1510()) { 98 if (cpu_is_omap15xx()) {
99 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n"); 99 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
100 BUG(); 100 BUG();
101 return; 101 return;
@@ -106,7 +106,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
106 106
107void omap_set_lcd_dma_b1_mirror(int mirror) 107void omap_set_lcd_dma_b1_mirror(int mirror)
108{ 108{
109 if (cpu_is_omap1510()) { 109 if (cpu_is_omap15xx()) {
110 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n"); 110 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
111 BUG(); 111 BUG();
112 } 112 }
@@ -116,7 +116,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
116 116
117void omap_set_lcd_dma_b1_vxres(unsigned long vxres) 117void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
118{ 118{
119 if (cpu_is_omap1510()) { 119 if (cpu_is_omap15xx()) {
120 printk(KERN_ERR "DMA virtual resulotion is not supported " 120 printk(KERN_ERR "DMA virtual resulotion is not supported "
121 "in 1510 mode\n"); 121 "in 1510 mode\n");
122 BUG(); 122 BUG();
@@ -127,7 +127,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
127 127
128void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) 128void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
129{ 129{
130 if (cpu_is_omap1510()) { 130 if (cpu_is_omap15xx()) {
131 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n"); 131 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
132 BUG(); 132 BUG();
133 } 133 }
@@ -177,7 +177,7 @@ static void set_b1_regs(void)
177 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); 177 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
178 /* 1510 DMA requires the bottom address to be 2 more 178 /* 1510 DMA requires the bottom address to be 2 more
179 * than the actual last memory access location. */ 179 * than the actual last memory access location. */
180 if (cpu_is_omap1510() && 180 if (cpu_is_omap15xx() &&
181 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32) 181 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
182 bottom += 2; 182 bottom += 2;
183 ei = PIXSTEP(0, 0, 1, 0); 183 ei = PIXSTEP(0, 0, 1, 0);
@@ -241,7 +241,7 @@ static void set_b1_regs(void)
241 return; /* Suppress warning about uninitialized vars */ 241 return; /* Suppress warning about uninitialized vars */
242 } 242 }
243 243
244 if (cpu_is_omap1510()) { 244 if (cpu_is_omap15xx()) {
245 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U); 245 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
246 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L); 246 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
247 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U); 247 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
@@ -343,7 +343,7 @@ void omap_free_lcd_dma(void)
343 BUG(); 343 BUG();
344 return; 344 return;
345 } 345 }
346 if (!cpu_is_omap1510()) 346 if (!cpu_is_omap15xx())
347 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1, 347 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
348 OMAP1610_DMA_LCD_CCR); 348 OMAP1610_DMA_LCD_CCR);
349 lcd_dma.reserved = 0; 349 lcd_dma.reserved = 0;
@@ -360,7 +360,7 @@ void omap_enable_lcd_dma(void)
360 * connected. Otherwise the OMAP internal controller will 360 * connected. Otherwise the OMAP internal controller will
361 * start the transfer when it gets enabled. 361 * start the transfer when it gets enabled.
362 */ 362 */
363 if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) 363 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
364 return; 364 return;
365 365
366 w = omap_readw(OMAP1610_DMA_LCD_CTRL); 366 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
@@ -378,14 +378,14 @@ EXPORT_SYMBOL(omap_enable_lcd_dma);
378void omap_setup_lcd_dma(void) 378void omap_setup_lcd_dma(void)
379{ 379{
380 BUG_ON(lcd_dma.active); 380 BUG_ON(lcd_dma.active);
381 if (!cpu_is_omap1510()) { 381 if (!cpu_is_omap15xx()) {
382 /* Set some reasonable defaults */ 382 /* Set some reasonable defaults */
383 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR); 383 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
384 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP); 384 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
385 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL); 385 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
386 } 386 }
387 set_b1_regs(); 387 set_b1_regs();
388 if (!cpu_is_omap1510()) { 388 if (!cpu_is_omap15xx()) {
389 u16 w; 389 u16 w;
390 390
391 w = omap_readw(OMAP1610_DMA_LCD_CCR); 391 w = omap_readw(OMAP1610_DMA_LCD_CCR);
@@ -407,7 +407,7 @@ void omap_stop_lcd_dma(void)
407 u16 w; 407 u16 w;
408 408
409 lcd_dma.active = 0; 409 lcd_dma.active = 0;
410 if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) 410 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
411 return; 411 return;
412 412
413 w = omap_readw(OMAP1610_DMA_LCD_CCR); 413 w = omap_readw(OMAP1610_DMA_LCD_CCR);
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index f83fc335c613..6885d2fac183 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,7 +44,6 @@
44#include <linux/clocksource.h> 44#include <linux/clocksource.h>
45#include <linux/clockchips.h> 45#include <linux/clockchips.h>
46#include <linux/io.h> 46#include <linux/io.h>
47#include <linux/sched.h>
48 47
49#include <asm/system.h> 48#include <asm/system.h>
50#include <mach/hardware.h> 49#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index e906e05bb41b..9a2a31e011ce 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -115,9 +115,6 @@ static struct omap2_hsmmc_info mmc[] = {
115 115
116static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) 116static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
117{ 117{
118 twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
119 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
120
121 if (gpio_is_valid(dssdev->reset_gpio)) 118 if (gpio_is_valid(dssdev->reset_gpio))
122 gpio_set_value_cansleep(dssdev->reset_gpio, 1); 119 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
123 return 0; 120 return 0;
@@ -247,6 +244,8 @@ static struct gpio_led gpio_leds[];
247static int devkit8000_twl_gpio_setup(struct device *dev, 244static int devkit8000_twl_gpio_setup(struct device *dev,
248 unsigned gpio, unsigned ngpio) 245 unsigned gpio, unsigned ngpio)
249{ 246{
247 int ret;
248
250 omap_mux_init_gpio(29, OMAP_PIN_INPUT); 249 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
251 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 250 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
252 mmc[0].gpio_cd = gpio + 0; 251 mmc[0].gpio_cd = gpio + 0;
@@ -255,17 +254,23 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
255 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 254 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
256 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 255 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
257 256
258 /* gpio + 1 is "LCD_PWREN" (out, active high) */ 257 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
259 devkit8000_lcd_device.reset_gpio = gpio + 1; 258 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
260 gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN"); 259 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
261 /* Disable until needed */ 260 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN");
262 gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0); 261 if (ret < 0) {
262 devkit8000_lcd_device.reset_gpio = -EINVAL;
263 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
264 }
263 265
264 /* gpio + 7 is "DVI_PD" (out, active low) */ 266 /* gpio + 7 is "DVI_PD" (out, active low) */
265 devkit8000_dvi_device.reset_gpio = gpio + 7; 267 devkit8000_dvi_device.reset_gpio = gpio + 7;
266 gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown"); 268 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
267 /* Disable until needed */ 269 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown");
268 gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0); 270 if (ret < 0) {
271 devkit8000_dvi_device.reset_gpio = -EINVAL;
272 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
273 }
269 274
270 return 0; 275 return 0;
271} 276}
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index e001a048dc0c..e944025d5ef8 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -409,8 +409,6 @@ static void __init omap4_panda_init(void)
409 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 409 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
410 omap_serial_init(); 410 omap_serial_init();
411 omap4_twl6030_hsmmc_init(mmc); 411 omap4_twl6030_hsmmc_init(mmc);
412 /* OMAP4 Panda uses internal transceiver so register nop transceiver */
413 usb_nop_xceiv_register();
414 omap4_ehci_init(); 412 omap4_ehci_init();
415 usb_musb_init(&musb_board_data); 413 usb_musb_init(&musb_board_data);
416} 414}
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index cb77be7ac44f..39a71bb8a308 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -40,9 +40,6 @@ static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
40static struct regulator_init_data rm680_vemmc = { 40static struct regulator_init_data rm680_vemmc = {
41 .constraints = { 41 .constraints = {
42 .name = "rm680_vemmc", 42 .name = "rm680_vemmc",
43 .min_uV = 2900000,
44 .max_uV = 2900000,
45 .apply_uV = 1,
46 .valid_modes_mask = REGULATOR_MODE_NORMAL 43 .valid_modes_mask = REGULATOR_MODE_NORMAL
47 | REGULATOR_MODE_STANDBY, 44 | REGULATOR_MODE_STANDBY,
48 .valid_ops_mask = REGULATOR_CHANGE_STATUS 45 .valid_ops_mask = REGULATOR_CHANGE_STATUS
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index d2f15f5cfd36..34922b2d2e3f 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -264,7 +264,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
264 if (IS_ERR(od)) { 264 if (IS_ERR(od)) {
265 pr_err("%s: Cant build omap_device for %s:%s.\n", 265 pr_err("%s: Cant build omap_device for %s:%s.\n",
266 __func__, name, oh->name); 266 __func__, name, oh->name);
267 return IS_ERR(od); 267 return PTR_ERR(od);
268 } 268 }
269 269
270 mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0); 270 mem = platform_get_resource(&od->pdev, IORESOURCE_MEM, 0);
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index befa321c4c13..81985a665cb3 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -38,20 +38,6 @@
38 */ 38 */
39 39
40#ifdef MULTI_OMAP2 40#ifdef MULTI_OMAP2
41
42/*
43 * We use __glue to avoid errors with multiple definitions of
44 * .globl omap_irq_base as it's included from entry-armv.S but not
45 * from entry-common.S.
46 */
47#ifdef __glue
48 .pushsection .data
49 .globl omap_irq_base
50omap_irq_base:
51 .word 0
52 .popsection
53#endif
54
55 /* 41 /*
56 * Configure the interrupt base on the first interrupt. 42 * Configure the interrupt base on the first interrupt.
57 * See also omap_irq_base_init for setting omap_irq_base. 43 * See also omap_irq_base_init for setting omap_irq_base.
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e66687b0b9de..c2032041d26f 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -314,14 +314,13 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
314 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); 314 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
315} 315}
316 316
317void __iomem *omap_irq_base;
318
317/* 319/*
318 * Initialize asm_irq_base for entry-macro.S 320 * Initialize asm_irq_base for entry-macro.S
319 */ 321 */
320static inline void omap_irq_base_init(void) 322static inline void omap_irq_base_init(void)
321{ 323{
322 extern void __iomem *omap_irq_base;
323
324#ifdef MULTI_OMAP2
325 if (cpu_is_omap24xx()) 324 if (cpu_is_omap24xx())
326 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); 325 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
327 else if (cpu_is_omap34xx()) 326 else if (cpu_is_omap34xx())
@@ -330,7 +329,6 @@ static inline void omap_irq_base_init(void)
330 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); 329 omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
331 else 330 else
332 pr_err("Could not initialize omap_irq_base\n"); 331 pr_err("Could not initialize omap_irq_base\n");
333#endif
334} 332}
335 333
336void __init omap2_init_common_infrastructure(void) 334void __init omap2_init_common_infrastructure(void)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index df8d2f2872c6..98148b6c36e9 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -160,7 +160,7 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
160 struct omap_mux *mux = NULL; 160 struct omap_mux *mux = NULL;
161 struct omap_mux_entry *e; 161 struct omap_mux_entry *e;
162 const char *mode_name; 162 const char *mode_name;
163 int found = 0, found_mode, mode0_len = 0; 163 int found = 0, found_mode = 0, mode0_len = 0;
164 struct list_head *muxmodes = &partition->muxmodes; 164 struct list_head *muxmodes = &partition->muxmodes;
165 165
166 mode_name = strchr(muxname, '.'); 166 mode_name = strchr(muxname, '.');
@@ -1000,6 +1000,7 @@ int __init omap_mux_init(const char *name, u32 flags,
1000 if (!partition->base) { 1000 if (!partition->base) {
1001 pr_err("%s: Could not ioremap mux partition at 0x%08x\n", 1001 pr_err("%s: Could not ioremap mux partition at 0x%08x\n",
1002 __func__, partition->phys); 1002 __func__, partition->phys);
1003 kfree(partition);
1003 return -ENODEV; 1004 return -ENODEV;
1004 } 1005 }
1005 1006
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 9e5dc8ed51e9..97feb3ab6a69 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -134,7 +134,7 @@ static void omap2_enter_full_retention(void)
134 134
135 /* Block console output in case it is on one of the OMAP UARTs */ 135 /* Block console output in case it is on one of the OMAP UARTs */
136 if (!is_suspending()) 136 if (!is_suspending())
137 if (try_acquire_console_sem()) 137 if (!console_trylock())
138 goto no_sleep; 138 goto no_sleep;
139 139
140 omap_uart_prepare_idle(0); 140 omap_uart_prepare_idle(0);
@@ -151,7 +151,7 @@ static void omap2_enter_full_retention(void)
151 omap_uart_resume_idle(0); 151 omap_uart_resume_idle(0);
152 152
153 if (!is_suspending()) 153 if (!is_suspending())
154 release_console_sem(); 154 console_unlock();
155 155
156no_sleep: 156no_sleep:
157 if (omap2_pm_debug) { 157 if (omap2_pm_debug) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 8cbbeade4b8a..2f864e4b085d 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -168,9 +168,10 @@ static void omap3_core_restore_context(void)
168 * once during boot sequence, but this works as we are not using secure 168 * once during boot sequence, but this works as we are not using secure
169 * services. 169 * services.
170 */ 170 */
171static void omap3_save_secure_ram_context(u32 target_mpu_state) 171static void omap3_save_secure_ram_context(void)
172{ 172{
173 u32 ret; 173 u32 ret;
174 int mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
174 175
175 if (omap_type() != OMAP2_DEVICE_TYPE_GP) { 176 if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
176 /* 177 /*
@@ -181,7 +182,7 @@ static void omap3_save_secure_ram_context(u32 target_mpu_state)
181 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); 182 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
182 ret = _omap_save_secure_sram((u32 *) 183 ret = _omap_save_secure_sram((u32 *)
183 __pa(omap3_secure_ram_storage)); 184 __pa(omap3_secure_ram_storage));
184 pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state); 185 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
185 /* Following is for error tracking, it should not happen */ 186 /* Following is for error tracking, it should not happen */
186 if (ret) { 187 if (ret) {
187 printk(KERN_ERR "save_secure_sram() returns %08x\n", 188 printk(KERN_ERR "save_secure_sram() returns %08x\n",
@@ -398,7 +399,7 @@ void omap_sram_idle(void)
398 if (!is_suspending()) 399 if (!is_suspending())
399 if (per_next_state < PWRDM_POWER_ON || 400 if (per_next_state < PWRDM_POWER_ON ||
400 core_next_state < PWRDM_POWER_ON) 401 core_next_state < PWRDM_POWER_ON)
401 if (try_acquire_console_sem()) 402 if (!console_trylock())
402 goto console_still_active; 403 goto console_still_active;
403 404
404 /* PER */ 405 /* PER */
@@ -481,7 +482,7 @@ void omap_sram_idle(void)
481 } 482 }
482 483
483 if (!is_suspending()) 484 if (!is_suspending())
484 release_console_sem(); 485 console_unlock();
485 486
486console_still_active: 487console_still_active:
487 /* Disable IO-PAD and IO-CHAIN wakeup */ 488 /* Disable IO-PAD and IO-CHAIN wakeup */
@@ -1094,7 +1095,7 @@ static int __init omap3_pm_init(void)
1094 local_fiq_disable(); 1095 local_fiq_disable();
1095 1096
1096 omap_dma_global_context_save(); 1097 omap_dma_global_context_save();
1097 omap3_save_secure_ram_context(PWRDM_POWER_ON); 1098 omap3_save_secure_ram_context();
1098 omap_dma_global_context_restore(); 1099 omap_dma_global_context_restore();
1099 1100
1100 local_irq_enable(); 1101 local_irq_enable();
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 302da7403a10..32e91a9c8b6b 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -812,7 +812,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
812 812
813 oh->dev_attr = uart; 813 oh->dev_attr = uart;
814 814
815 acquire_console_sem(); /* in case the earlycon is on the UART */ 815 console_lock(); /* in case the earlycon is on the UART */
816 816
817 /* 817 /*
818 * Because of early UART probing, UART did not get idled 818 * Because of early UART probing, UART did not get idled
@@ -838,7 +838,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
838 omap_uart_block_sleep(uart); 838 omap_uart_block_sleep(uart);
839 uart->timeout = DEFAULT_TIMEOUT; 839 uart->timeout = DEFAULT_TIMEOUT;
840 840
841 release_console_sem(); 841 console_unlock();
842 842
843 if ((cpu_is_omap34xx() && uart->padconf) || 843 if ((cpu_is_omap34xx() && uart->padconf) ||
844 (uart->wk_en && uart->wk_mask)) { 844 (uart->wk_en && uart->wk_mask)) {
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 77ecebf3fae2..c37e823266d3 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -780,8 +780,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
780 struct omap_sr *sr_info = (struct omap_sr *) data; 780 struct omap_sr *sr_info = (struct omap_sr *) data;
781 781
782 if (!sr_info) { 782 if (!sr_info) {
783 pr_warning("%s: omap_sr struct for sr_%s not found\n", 783 pr_warning("%s: omap_sr struct not found\n", __func__);
784 __func__, sr_info->voltdm->name);
785 return -EINVAL; 784 return -EINVAL;
786 } 785 }
787 786
@@ -795,8 +794,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
795 struct omap_sr *sr_info = (struct omap_sr *) data; 794 struct omap_sr *sr_info = (struct omap_sr *) data;
796 795
797 if (!sr_info) { 796 if (!sr_info) {
798 pr_warning("%s: omap_sr struct for sr_%s not found\n", 797 pr_warning("%s: omap_sr struct not found\n", __func__);
799 __func__, sr_info->voltdm->name);
800 return -EINVAL; 798 return -EINVAL;
801 } 799 }
802 800
@@ -834,7 +832,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
834 832
835 if (!pdata) { 833 if (!pdata) {
836 dev_err(&pdev->dev, "%s: platform data missing\n", __func__); 834 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
837 return -EINVAL; 835 ret = -EINVAL;
836 goto err_free_devinfo;
838 } 837 }
839 838
840 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 839 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -966,7 +965,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
966 } 965 }
967 966
968 sr_info = _sr_lookup(pdata->voltdm); 967 sr_info = _sr_lookup(pdata->voltdm);
969 if (!sr_info) { 968 if (IS_ERR(sr_info)) {
970 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", 969 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
971 __func__); 970 __func__);
972 return -EINVAL; 971 return -EINVAL;
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index ed6079c94c57..12be525b8df4 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -471,6 +471,7 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
471 strcat(name, vdd->voltdm.name); 471 strcat(name, vdd->voltdm.name);
472 472
473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir); 473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
474 kfree(name);
474 if (IS_ERR(vdd->debug_dir)) { 475 if (IS_ERR(vdd->debug_dir)) {
475 pr_warning("%s: Unable to create debugfs directory for" 476 pr_warning("%s: Unable to create debugfs directory for"
476 " vdd_%s\n", __func__, vdd->voltdm.name); 477 " vdd_%s\n", __func__, vdd->voltdm.name);
diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c
index 6b2c800a1133..28f667e52ef9 100644
--- a/arch/arm/mach-pxa/colibri-evalboard.c
+++ b/arch/arm/mach-pxa/colibri-evalboard.c
@@ -50,7 +50,7 @@ static void __init colibri_mmc_init(void)
50 GPIO0_COLIBRI_PXA270_SD_DETECT; 50 GPIO0_COLIBRI_PXA270_SD_DETECT;
51 if (machine_is_colibri300()) /* PXA300 Colibri */ 51 if (machine_is_colibri300()) /* PXA300 Colibri */
52 colibri_mci_platform_data.gpio_card_detect = 52 colibri_mci_platform_data.gpio_card_detect =
53 GPIO39_COLIBRI_PXA300_SD_DETECT; 53 GPIO13_COLIBRI_PXA300_SD_DETECT;
54 else /* PXA320 Colibri */ 54 else /* PXA320 Colibri */
55 colibri_mci_platform_data.gpio_card_detect = 55 colibri_mci_platform_data.gpio_card_detect =
56 GPIO28_COLIBRI_PXA320_SD_DETECT; 56 GPIO28_COLIBRI_PXA320_SD_DETECT;
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index fddb16d07eb0..66dd81cbc8a0 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -41,7 +41,7 @@ static mfp_cfg_t colibri_pxa300_evalboard_pin_config[] __initdata = {
41 GPIO4_MMC1_DAT1, 41 GPIO4_MMC1_DAT1,
42 GPIO5_MMC1_DAT2, 42 GPIO5_MMC1_DAT2,
43 GPIO6_MMC1_DAT3, 43 GPIO6_MMC1_DAT3,
44 GPIO39_GPIO, /* SD detect */ 44 GPIO13_GPIO, /* GPIO13_COLIBRI_PXA300_SD_DETECT */
45 45
46 /* UHC */ 46 /* UHC */
47 GPIO0_2_USBH_PEN, 47 GPIO0_2_USBH_PEN,
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 388a96f1ef93..cb4236e98a0f 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -60,7 +60,7 @@ static inline void colibri_pxa3xx_init_nand(void) {}
60#define GPIO113_COLIBRI_PXA270_TS_IRQ 113 60#define GPIO113_COLIBRI_PXA270_TS_IRQ 113
61 61
62/* GPIO definitions for Colibri PXA300/310 */ 62/* GPIO definitions for Colibri PXA300/310 */
63#define GPIO39_COLIBRI_PXA300_SD_DETECT 39 63#define GPIO13_COLIBRI_PXA300_SD_DETECT 13
64 64
65/* GPIO definitions for Colibri PXA320 */ 65/* GPIO definitions for Colibri PXA320 */
66#define GPIO28_COLIBRI_PXA320_SD_DETECT 28 66#define GPIO28_COLIBRI_PXA320_SD_DETECT 28
diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c
index 405b92a29793..35572c427fa8 100644
--- a/arch/arm/mach-pxa/palm27x.c
+++ b/arch/arm/mach-pxa/palm27x.c
@@ -323,7 +323,7 @@ static struct platform_pwm_backlight_data palm27x_backlight_data = {
323 .pwm_id = 0, 323 .pwm_id = 0,
324 .max_brightness = 0xfe, 324 .max_brightness = 0xfe,
325 .dft_brightness = 0x7e, 325 .dft_brightness = 0x7e,
326 .pwm_period_ns = 3500, 326 .pwm_period_ns = 3500 * 1024,
327 .init = palm27x_backlight_init, 327 .init = palm27x_backlight_init,
328 .notify = palm27x_backlight_notify, 328 .notify = palm27x_backlight_notify,
329 .exit = palm27x_backlight_exit, 329 .exit = palm27x_backlight_exit,
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c
index 978e1b289544..1807c9abdde0 100644
--- a/arch/arm/mach-pxa/pm.c
+++ b/arch/arm/mach-pxa/pm.c
@@ -33,7 +33,7 @@ int pxa_pm_enter(suspend_state_t state)
33#endif 33#endif
34 34
35 /* skip registers saving for standby */ 35 /* skip registers saving for standby */
36 if (state != PM_SUSPEND_STANDBY) { 36 if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->save) {
37 pxa_cpu_pm_fns->save(sleep_save); 37 pxa_cpu_pm_fns->save(sleep_save);
38 /* before sleeping, calculate and save a checksum */ 38 /* before sleeping, calculate and save a checksum */
39 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++) 39 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
@@ -44,7 +44,7 @@ int pxa_pm_enter(suspend_state_t state)
44 pxa_cpu_pm_fns->enter(state); 44 pxa_cpu_pm_fns->enter(state);
45 cpu_init(); 45 cpu_init();
46 46
47 if (state != PM_SUSPEND_STANDBY) { 47 if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->restore) {
48 /* after sleeping, validate the checksum */ 48 /* after sleeping, validate the checksum */
49 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++) 49 for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
50 checksum += sleep_save[i]; 50 checksum += sleep_save[i];
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index b4575ae9648e..7ca138a943a9 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -2,52 +2,56 @@ menu "RealView platform type"
2 depends on ARCH_REALVIEW 2 depends on ARCH_REALVIEW
3 3
4config MACH_REALVIEW_EB 4config MACH_REALVIEW_EB
5 bool "Support RealView/EB platform" 5 bool "Support RealView(R) Emulation Baseboard"
6 select ARM_GIC 6 select ARM_GIC
7 help 7 help
8 Include support for the ARM(R) RealView Emulation Baseboard platform. 8 Include support for the ARM(R) RealView(R) Emulation Baseboard
9 platform.
9 10
10config REALVIEW_EB_A9MP 11config REALVIEW_EB_A9MP
11 bool "Support Multicore Cortex-A9" 12 bool "Support Multicore Cortex-A9 Tile"
12 depends on MACH_REALVIEW_EB 13 depends on MACH_REALVIEW_EB
13 select CPU_V7 14 select CPU_V7
14 help 15 help
15 Enable support for the Cortex-A9MPCore tile on the Realview platform. 16 Enable support for the Cortex-A9MPCore tile fitted to the
17 Realview(R) Emulation Baseboard platform.
16 18
17config REALVIEW_EB_ARM11MP 19config REALVIEW_EB_ARM11MP
18 bool "Support ARM11MPCore tile" 20 bool "Support ARM11MPCore Tile"
19 depends on MACH_REALVIEW_EB 21 depends on MACH_REALVIEW_EB
20 select CPU_V6 22 select CPU_V6
21 select ARCH_HAS_BARRIERS if SMP 23 select ARCH_HAS_BARRIERS if SMP
22 help 24 help
23 Enable support for the ARM11MPCore tile on the Realview platform. 25 Enable support for the ARM11MPCore tile fitted to the Realview(R)
26 Emulation Baseboard platform.
24 27
25config REALVIEW_EB_ARM11MP_REVB 28config REALVIEW_EB_ARM11MP_REVB
26 bool "Support ARM11MPCore RevB tile" 29 bool "Support ARM11MPCore RevB Tile"
27 depends on REALVIEW_EB_ARM11MP 30 depends on REALVIEW_EB_ARM11MP
28 help 31 help
29 Enable support for the ARM11MPCore RevB tile on the Realview 32 Enable support for the ARM11MPCore Revision B tile on the
30 platform. Since there are device address differences, a 33 Realview(R) Emulation Baseboard platform. Since there are device
31 kernel built with this option enabled is not compatible with 34 address differences, a kernel built with this option enabled is
32 other revisions of the ARM11MPCore tile. 35 not compatible with other revisions of the ARM11MPCore tile.
33 36
34config MACH_REALVIEW_PB11MP 37config MACH_REALVIEW_PB11MP
35 bool "Support RealView/PB11MPCore platform" 38 bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
36 select CPU_V6 39 select CPU_V6
37 select ARM_GIC 40 select ARM_GIC
38 select HAVE_PATA_PLATFORM 41 select HAVE_PATA_PLATFORM
39 select ARCH_HAS_BARRIERS if SMP 42 select ARCH_HAS_BARRIERS if SMP
40 help 43 help
41 Include support for the ARM(R) RealView MPCore Platform Baseboard. 44 Include support for the ARM(R) RealView(R) Platform Baseboard for
42 PB11MPCore is a platform with an on-board ARM11MPCore and has 45 the ARM11MPCore. This platform has an on-board ARM11MPCore and has
43 support for PCI-E and Compact Flash. 46 support for PCI-E and Compact Flash.
44 47
45config MACH_REALVIEW_PB1176 48config MACH_REALVIEW_PB1176
46 bool "Support RealView/PB1176 platform" 49 bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S"
47 select CPU_V6 50 select CPU_V6
48 select ARM_GIC 51 select ARM_GIC
49 help 52 help
50 Include support for the ARM(R) RealView ARM1176 Platform Baseboard. 53 Include support for the ARM(R) RealView(R) Platform Baseboard for
54 ARM1176JZF-S.
51 55
52config REALVIEW_PB1176_SECURE_FLASH 56config REALVIEW_PB1176_SECURE_FLASH
53 bool "Allow access to the secure flash memory block" 57 bool "Allow access to the secure flash memory block"
@@ -59,23 +63,24 @@ config REALVIEW_PB1176_SECURE_FLASH
59 block (64MB @ 0x3c000000) is required. 63 block (64MB @ 0x3c000000) is required.
60 64
61config MACH_REALVIEW_PBA8 65config MACH_REALVIEW_PBA8
62 bool "Support RealView/PB-A8 platform" 66 bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform"
63 select CPU_V7 67 select CPU_V7
64 select ARM_GIC 68 select ARM_GIC
65 select HAVE_PATA_PLATFORM 69 select HAVE_PATA_PLATFORM
66 help 70 help
67 Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard. 71 Include support for the ARM(R) RealView Platform Baseboard for
68 PB-A8 is a platform with an on-board Cortex-A8 and has support for 72 Cortex(tm)-A8. This platform has an on-board Cortex-A8 and has
69 PCI-E and Compact Flash. 73 support for PCI-E and Compact Flash.
70 74
71config MACH_REALVIEW_PBX 75config MACH_REALVIEW_PBX
72 bool "Support RealView/PBX platform" 76 bool "Support RealView(R) Platform Baseboard Explore"
73 select ARM_GIC 77 select ARM_GIC
74 select HAVE_PATA_PLATFORM 78 select HAVE_PATA_PLATFORM
75 select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET 79 select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
76 select ZONE_DMA if SPARSEMEM 80 select ZONE_DMA if SPARSEMEM
77 help 81 help
78 Include support for the ARM(R) RealView PBX platform. 82 Include support for the ARM(R) RealView(R) Platform Baseboard
83 Explore.
79 84
80config REALVIEW_HIGH_PHYS_OFFSET 85config REALVIEW_HIGH_PHYS_OFFSET
81 bool "High physical base address for the RealView platform" 86 bool "High physical base address for the RealView platform"
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index a22bf67f2f78..6959d13d908a 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -41,7 +41,7 @@ volatile int __cpuinitdata pen_release = -1;
41 * observers, irrespective of whether they're taking part in coherency 41 * observers, irrespective of whether they're taking part in coherency
42 * or not. This is necessary for the hotplug code to work reliably. 42 * or not. This is necessary for the hotplug code to work reliably.
43 */ 43 */
44static void write_pen_release(int val) 44static void __cpuinit write_pen_release(int val)
45{ 45{
46 pen_release = val; 46 pen_release = val;
47 smp_wmb(); 47 smp_wmb();
diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig
index 09c4c21b70cc..b2a9acc5185f 100644
--- a/arch/arm/mach-s5pv310/Kconfig
+++ b/arch/arm/mach-s5pv310/Kconfig
@@ -122,6 +122,7 @@ config MACH_SMDKV310
122 select S3C_DEV_HSMMC2 122 select S3C_DEV_HSMMC2
123 select S3C_DEV_HSMMC3 123 select S3C_DEV_HSMMC3
124 select S5PV310_DEV_PD 124 select S5PV310_DEV_PD
125 select S5PV310_DEV_SYSMMU
125 select S5PV310_SETUP_I2C1 126 select S5PV310_SETUP_I2C1
126 select S5PV310_SETUP_SDHCI 127 select S5PV310_SETUP_SDHCI
127 help 128 help
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 74d400625a23..3060f78e12ab 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -124,8 +124,6 @@
124#define S5PV310_PA_SYSMMU_TV 0x12E20000 124#define S5PV310_PA_SYSMMU_TV 0x12E20000
125#define S5PV310_PA_SYSMMU_MFC_L 0x13620000 125#define S5PV310_PA_SYSMMU_MFC_L 0x13620000
126#define S5PV310_PA_SYSMMU_MFC_R 0x13630000 126#define S5PV310_PA_SYSMMU_MFC_R 0x13630000
127#define S5PV310_SYSMMU_TOTAL_IPNUM 16
128#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM
129 127
130/* compatibiltiy defines. */ 128/* compatibiltiy defines. */
131#define S3C_PA_UART S5PV310_PA_UART 129#define S3C_PA_UART S5PV310_PA_UART
diff --git a/arch/arm/mach-s5pv310/include/mach/sysmmu.h b/arch/arm/mach-s5pv310/include/mach/sysmmu.h
index 662fe85ff4d5..598fc5c9211b 100644
--- a/arch/arm/mach-s5pv310/include/mach/sysmmu.h
+++ b/arch/arm/mach-s5pv310/include/mach/sysmmu.h
@@ -13,6 +13,9 @@
13#ifndef __ASM_ARM_ARCH_SYSMMU_H 13#ifndef __ASM_ARM_ARCH_SYSMMU_H
14#define __ASM_ARM_ARCH_SYSMMU_H __FILE__ 14#define __ASM_ARM_ARCH_SYSMMU_H __FILE__
15 15
16#define S5PV310_SYSMMU_TOTAL_IPNUM 16
17#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM
18
16enum s5pv310_sysmmu_ips { 19enum s5pv310_sysmmu_ips {
17 SYSMMU_MDMA, 20 SYSMMU_MDMA,
18 SYSMMU_SSS, 21 SYSMMU_SSS,
@@ -32,7 +35,7 @@ enum s5pv310_sysmmu_ips {
32 SYSMMU_MFC_R, 35 SYSMMU_MFC_R,
33}; 36};
34 37
35static char *sysmmu_ips_name[S5P_SYSMMU_TOTAL_IPNUM] = { 38static char *sysmmu_ips_name[S5PV310_SYSMMU_TOTAL_IPNUM] = {
36 "SYSMMU_MDMA" , 39 "SYSMMU_MDMA" ,
37 "SYSMMU_SSS" , 40 "SYSMMU_SSS" ,
38 "SYSMMU_FIMC0" , 41 "SYSMMU_FIMC0" ,
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index d43c5ef58eb6..bd3e1bfdd6aa 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -241,6 +241,9 @@ static struct locomo_platform_data locomo_info = {
241struct platform_device collie_locomo_device = { 241struct platform_device collie_locomo_device = {
242 .name = "locomo", 242 .name = "locomo",
243 .id = 0, 243 .id = 0,
244 .dev = {
245 .platform_data = &locomo_info,
246 },
244 .num_resources = ARRAY_SIZE(locomo_resources), 247 .num_resources = ARRAY_SIZE(locomo_resources),
245 .resource = locomo_resources, 248 .resource = locomo_resources,
246}; 249};
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 4d1b4c5c9389..0c8f6cf3e948 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -60,6 +60,8 @@ endchoice
60 60
61config MACH_AG5EVM 61config MACH_AG5EVM
62 bool "AG5EVM board" 62 bool "AG5EVM board"
63 select ARCH_REQUIRE_GPIOLIB
64 select SH_LCD_MIPI_DSI
63 depends on ARCH_SH73A0 65 depends on ARCH_SH73A0
64 66
65config MACH_MACKEREL 67config MACH_MACKEREL
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index c18a740a4159..2123b96b5638 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -34,9 +34,10 @@
34#include <linux/input/sh_keysc.h> 34#include <linux/input/sh_keysc.h>
35#include <linux/mmc/host.h> 35#include <linux/mmc/host.h>
36#include <linux/mmc/sh_mmcif.h> 36#include <linux/mmc/sh_mmcif.h>
37 37#include <linux/sh_clk.h>
38#include <video/sh_mobile_lcdc.h>
39#include <video/sh_mipi_dsi.h>
38#include <sound/sh_fsi.h> 40#include <sound/sh_fsi.h>
39
40#include <mach/hardware.h> 41#include <mach/hardware.h>
41#include <mach/sh73a0.h> 42#include <mach/sh73a0.h>
42#include <mach/common.h> 43#include <mach/common.h>
@@ -183,11 +184,165 @@ static struct platform_device mmc_device = {
183 .resource = sh_mmcif_resources, 184 .resource = sh_mmcif_resources,
184}; 185};
185 186
187/* IrDA */
188static struct resource irda_resources[] = {
189 [0] = {
190 .start = 0xE6D00000,
191 .end = 0xE6D01FD4 - 1,
192 .flags = IORESOURCE_MEM,
193 },
194 [1] = {
195 .start = gic_spi(95),
196 .flags = IORESOURCE_IRQ,
197 },
198};
199
200static struct platform_device irda_device = {
201 .name = "sh_irda",
202 .id = 0,
203 .resource = irda_resources,
204 .num_resources = ARRAY_SIZE(irda_resources),
205};
206
207static unsigned char lcd_backlight_seq[3][2] = {
208 { 0x04, 0x07 },
209 { 0x23, 0x80 },
210 { 0x03, 0x01 },
211};
212
213static void lcd_backlight_on(void)
214{
215 struct i2c_adapter *a;
216 struct i2c_msg msg;
217 int k;
218
219 a = i2c_get_adapter(1);
220 for (k = 0; a && k < 3; k++) {
221 msg.addr = 0x6d;
222 msg.buf = &lcd_backlight_seq[k][0];
223 msg.len = 2;
224 msg.flags = 0;
225 if (i2c_transfer(a, &msg, 1) != 1)
226 break;
227 }
228}
229
230static void lcd_backlight_reset(void)
231{
232 gpio_set_value(GPIO_PORT235, 0);
233 mdelay(24);
234 gpio_set_value(GPIO_PORT235, 1);
235}
236
237static void lcd_on(void *board_data, struct fb_info *info)
238{
239 lcd_backlight_on();
240}
241
242static void lcd_off(void *board_data)
243{
244 lcd_backlight_reset();
245}
246
247/* LCDC0 */
248static const struct fb_videomode lcdc0_modes[] = {
249 {
250 .name = "R63302(QHD)",
251 .xres = 544,
252 .yres = 961,
253 .left_margin = 72,
254 .right_margin = 600,
255 .hsync_len = 16,
256 .upper_margin = 8,
257 .lower_margin = 8,
258 .vsync_len = 2,
259 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
260 },
261};
262
263static struct sh_mobile_lcdc_info lcdc0_info = {
264 .clock_source = LCDC_CLK_PERIPHERAL,
265 .ch[0] = {
266 .chan = LCDC_CHAN_MAINLCD,
267 .interface_type = RGB24,
268 .clock_divider = 1,
269 .flags = LCDC_FLAGS_DWPOL,
270 .lcd_size_cfg.width = 44,
271 .lcd_size_cfg.height = 79,
272 .bpp = 16,
273 .lcd_cfg = lcdc0_modes,
274 .num_cfg = ARRAY_SIZE(lcdc0_modes),
275 .board_cfg = {
276 .display_on = lcd_on,
277 .display_off = lcd_off,
278 },
279 }
280};
281
282static struct resource lcdc0_resources[] = {
283 [0] = {
284 .name = "LCDC0",
285 .start = 0xfe940000, /* P4-only space */
286 .end = 0xfe943fff,
287 .flags = IORESOURCE_MEM,
288 },
289 [1] = {
290 .start = intcs_evt2irq(0x580),
291 .flags = IORESOURCE_IRQ,
292 },
293};
294
295static struct platform_device lcdc0_device = {
296 .name = "sh_mobile_lcdc_fb",
297 .num_resources = ARRAY_SIZE(lcdc0_resources),
298 .resource = lcdc0_resources,
299 .id = 0,
300 .dev = {
301 .platform_data = &lcdc0_info,
302 .coherent_dma_mask = ~0,
303 },
304};
305
306/* MIPI-DSI */
307static struct resource mipidsi0_resources[] = {
308 [0] = {
309 .start = 0xfeab0000,
310 .end = 0xfeab3fff,
311 .flags = IORESOURCE_MEM,
312 },
313 [1] = {
314 .start = 0xfeab4000,
315 .end = 0xfeab7fff,
316 .flags = IORESOURCE_MEM,
317 },
318};
319
320static struct sh_mipi_dsi_info mipidsi0_info = {
321 .data_format = MIPI_RGB888,
322 .lcd_chan = &lcdc0_info.ch[0],
323 .vsynw_offset = 20,
324 .clksrc = 1,
325 .flags = SH_MIPI_DSI_HSABM,
326};
327
328static struct platform_device mipidsi0_device = {
329 .name = "sh-mipi-dsi",
330 .num_resources = ARRAY_SIZE(mipidsi0_resources),
331 .resource = mipidsi0_resources,
332 .id = 0,
333 .dev = {
334 .platform_data = &mipidsi0_info,
335 },
336};
337
186static struct platform_device *ag5evm_devices[] __initdata = { 338static struct platform_device *ag5evm_devices[] __initdata = {
187 &eth_device, 339 &eth_device,
188 &keysc_device, 340 &keysc_device,
189 &fsi_device, 341 &fsi_device,
190 &mmc_device, 342 &mmc_device,
343 &irda_device,
344 &lcdc0_device,
345 &mipidsi0_device,
191}; 346};
192 347
193static struct map_desc ag5evm_io_desc[] __initdata = { 348static struct map_desc ag5evm_io_desc[] __initdata = {
@@ -224,6 +379,8 @@ void __init ag5evm_init_irq(void)
224 __raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A); 379 __raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A);
225} 380}
226 381
382#define DSI0PHYCR 0xe615006c
383
227static void __init ag5evm_init(void) 384static void __init ag5evm_init(void)
228{ 385{
229 sh73a0_pinmux_init(); 386 sh73a0_pinmux_init();
@@ -287,6 +444,25 @@ static void __init ag5evm_init(void)
287 gpio_request(GPIO_FN_FSIAISLD, NULL); 444 gpio_request(GPIO_FN_FSIAISLD, NULL);
288 gpio_request(GPIO_FN_FSIAOSLD, NULL); 445 gpio_request(GPIO_FN_FSIAOSLD, NULL);
289 446
447 /* IrDA */
448 gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
449 gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL);
450 gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
451
452 /* LCD panel */
453 gpio_request(GPIO_PORT217, NULL); /* RESET */
454 gpio_direction_output(GPIO_PORT217, 0);
455 mdelay(1);
456 gpio_set_value(GPIO_PORT217, 1);
457
458 /* LCD backlight controller */
459 gpio_request(GPIO_PORT235, NULL); /* RESET */
460 gpio_direction_output(GPIO_PORT235, 0);
461 lcd_backlight_reset();
462
463 /* MIPI-DSI clock setup */
464 __raw_writel(0x2a809010, DSI0PHYCR);
465
290#ifdef CONFIG_CACHE_L2X0 466#ifdef CONFIG_CACHE_L2X0
291 /* Shared attribute override enable, 64K*8way */ 467 /* Shared attribute override enable, 64K*8way */
292 l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff); 468 l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 686b304a7708..ef4613b993a2 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -347,7 +347,6 @@ static void __init g3evm_init(void)
347 gpio_request(GPIO_FN_IRDA_OUT, NULL); 347 gpio_request(GPIO_FN_IRDA_OUT, NULL);
348 gpio_request(GPIO_FN_IRDA_IN, NULL); 348 gpio_request(GPIO_FN_IRDA_IN, NULL);
349 gpio_request(GPIO_FN_IRDA_FIRSEL, NULL); 349 gpio_request(GPIO_FN_IRDA_FIRSEL, NULL);
350 set_irq_type(evt2irq(0x480), IRQ_TYPE_LEVEL_LOW);
351 350
352 sh7367_add_standard_devices(); 351 sh7367_add_standard_devices();
353 352
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 7b15d21f0f68..fb4213a4e15a 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -169,9 +169,8 @@
169 * SW1 | SW33 169 * SW1 | SW33
170 * | bit1 | bit2 | bit3 | bit4 170 * | bit1 | bit2 | bit3 | bit4
171 * -------------+------+------+------+------- 171 * -------------+------+------+------+-------
172 * MMC0 OFF | OFF | ON | ON | X 172 * MMC0 OFF | OFF | X | ON | X (Use MMCIF)
173 * MMC1 ON | OFF | ON | X | ON 173 * SDHI1 OFF | ON | X | OFF | X (Use MFD_SH_MOBILE_SDHI)
174 * SDHI1 OFF | ON | X | OFF | ON
175 * 174 *
176 */ 175 */
177 176
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 9aa8d68d1a9c..e9731b5a73ed 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -234,7 +234,9 @@ static int pllc2_set_rate(struct clk *clk, unsigned long rate)
234 234
235 value = __raw_readl(PLLC2CR) & ~(0x3f << 24); 235 value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
236 236
237 __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); 237 __raw_writel(value | ((idx + 19) << 24), PLLC2CR);
238
239 clk->rate = clk->freq_table[idx].frequency;
238 240
239 return 0; 241 return 0;
240} 242}
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 720a71433be6..ddd4a1b775f0 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -118,8 +118,16 @@ static unsigned long pll_recalc(struct clk *clk)
118{ 118{
119 unsigned long mult = 1; 119 unsigned long mult = 1;
120 120
121 if (__raw_readl(PLLECR) & (1 << clk->enable_bit)) 121 if (__raw_readl(PLLECR) & (1 << clk->enable_bit)) {
122 mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1); 122 mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1);
123 /* handle CFG bit for PLL1 and PLL2 */
124 switch (clk->enable_bit) {
125 case 1:
126 case 2:
127 if (__raw_readl(clk->enable_reg) & (1 << 20))
128 mult *= 2;
129 }
130 }
123 131
124 return clk->parent->rate * mult; 132 return clk->parent->rate * mult;
125} 133}
@@ -212,7 +220,7 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2,
212static struct clk div4_clks[DIV4_NR] = { 220static struct clk div4_clks[DIV4_NR] = {
213 [DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT), 221 [DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT),
214 [DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT), 222 [DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT),
215 [DIV4_M3] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT), 223 [DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT),
216 [DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT), 224 [DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),
217 [DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0), 225 [DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0),
218 [DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0), 226 [DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0),
@@ -255,10 +263,10 @@ static struct clk div6_clks[DIV6_NR] = {
255}; 263};
256 264
257enum { MSTP001, 265enum { MSTP001,
258 MSTP125, MSTP116, 266 MSTP125, MSTP118, MSTP116, MSTP100,
259 MSTP219, 267 MSTP219,
260 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 268 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
261 MSTP331, MSTP329, MSTP323, MSTP312, 269 MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
262 MSTP411, MSTP410, MSTP403, 270 MSTP411, MSTP410, MSTP403,
263 MSTP_NR }; 271 MSTP_NR };
264 272
@@ -268,7 +276,9 @@ enum { MSTP001,
268static struct clk mstp_clks[MSTP_NR] = { 276static struct clk mstp_clks[MSTP_NR] = {
269 [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */ 277 [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
270 [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ 278 [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
279 [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
271 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ 280 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
281 [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
272 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */ 282 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
273 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ 283 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
274 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ 284 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
@@ -279,6 +289,7 @@ static struct clk mstp_clks[MSTP_NR] = {
279 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ 289 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
280 [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */ 290 [MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
281 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ 291 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
292 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
282 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ 293 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
283 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 294 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
284 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ 295 [MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
@@ -288,16 +299,25 @@ static struct clk mstp_clks[MSTP_NR] = {
288 299
289#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } 300#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
290#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } 301#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
302#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
291 303
292static struct clk_lookup lookups[] = { 304static struct clk_lookup lookups[] = {
293 /* main clocks */ 305 /* main clocks */
294 CLKDEV_CON_ID("r_clk", &r_clk), 306 CLKDEV_CON_ID("r_clk", &r_clk),
295 307
308 /* DIV6 clocks */
309 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
310 CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
311 CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
312 CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
313
296 /* MSTP32 clocks */ 314 /* MSTP32 clocks */
297 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ 315 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
316 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
298 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */ 317 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
299 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ 318 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
300 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ 319 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
320 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
301 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ 321 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
302 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ 322 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
303 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ 323 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
@@ -308,6 +328,7 @@ static struct clk_lookup lookups[] = {
308 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ 328 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
309 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ 329 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
310 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ 330 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
331 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
311 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ 332 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
312 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 333 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
313 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ 334 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index f78a1ead71a5..ca5f9d17b39a 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -365,6 +365,7 @@ static struct intc_desc intca_desc __initdata = {
365 365
366enum { 366enum {
367 UNUSED_INTCS = 0, 367 UNUSED_INTCS = 0,
368 ENABLED_INTCS,
368 369
369 INTCS, 370 INTCS,
370 371
@@ -413,7 +414,7 @@ enum {
413 CMT4, 414 CMT4,
414 DSITX1_DSITX1_0, 415 DSITX1_DSITX1_0,
415 DSITX1_DSITX1_1, 416 DSITX1_DSITX1_1,
416 /* MFIS2 */ 417 MFIS2_INTCS, /* Priority always enabled using ENABLED_INTCS */
417 CPORTS2R, 418 CPORTS2R,
418 /* CEC */ 419 /* CEC */
419 JPU6E, 420 JPU6E,
@@ -477,7 +478,7 @@ static struct intc_vect intcs_vectors[] = {
477 INTCS_VECT(CMT4, 0x1980), 478 INTCS_VECT(CMT4, 0x1980),
478 INTCS_VECT(DSITX1_DSITX1_0, 0x19a0), 479 INTCS_VECT(DSITX1_DSITX1_0, 0x19a0),
479 INTCS_VECT(DSITX1_DSITX1_1, 0x19c0), 480 INTCS_VECT(DSITX1_DSITX1_1, 0x19c0),
480 /* MFIS2 */ 481 INTCS_VECT(MFIS2_INTCS, 0x1a00),
481 INTCS_VECT(CPORTS2R, 0x1a20), 482 INTCS_VECT(CPORTS2R, 0x1a20),
482 /* CEC */ 483 /* CEC */
483 INTCS_VECT(JPU6E, 0x1a80), 484 INTCS_VECT(JPU6E, 0x1a80),
@@ -543,7 +544,7 @@ static struct intc_mask_reg intcs_mask_registers[] = {
543 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, 544 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
544 CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } }, 545 CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } },
545 { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */ 546 { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */
546 { 0, CPORTS2R, 0, 0, 547 { MFIS2_INTCS, CPORTS2R, 0, 0,
547 JPU6E, 0, 0, 0 } }, 548 JPU6E, 0, 0, 0 } },
548 { 0xffd20104, 0, 16, /* INTAMASK */ 549 { 0xffd20104, 0, 16, /* INTAMASK */
549 { 0, 0, 0, 0, 0, 0, 0, 0, 550 { 0, 0, 0, 0, 0, 0, 0, 0,
@@ -571,7 +572,8 @@ static struct intc_prio_reg intcs_prio_registers[] = {
571 { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } }, 572 { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } },
572 { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0, 573 { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0,
573 DSITX1_DSITX1_1, 0 } }, 574 DSITX1_DSITX1_1, 0 } },
574 { 0xffd50038, 0, 16, 4, /* IPROS3 */ { 0, CPORTS2R, 0, 0 } }, 575 { 0xffd50038, 0, 16, 4, /* IPROS3 */ { ENABLED_INTCS, CPORTS2R,
576 0, 0 } },
575 { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } }, 577 { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } },
576}; 578};
577 579
@@ -590,6 +592,7 @@ static struct resource intcs_resources[] __initdata = {
590 592
591static struct intc_desc intcs_desc __initdata = { 593static struct intc_desc intcs_desc __initdata = {
592 .name = "sh7372-intcs", 594 .name = "sh7372-intcs",
595 .force_enable = ENABLED_INTCS,
593 .resource = intcs_resources, 596 .resource = intcs_resources,
594 .num_resources = ARRAY_SIZE(intcs_resources), 597 .num_resources = ARRAY_SIZE(intcs_resources),
595 .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers, 598 .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers,
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index 322d8d57cbcf..5d0e1503ece6 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -252,10 +252,11 @@ static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id)
252 252
253void __init sh73a0_init_irq(void) 253void __init sh73a0_init_irq(void)
254{ 254{
255 void __iomem *gic_base = __io(0xf0001000); 255 void __iomem *gic_dist_base = __io(0xf0001000);
256 void __iomem *gic_cpu_base = __io(0xf0000100);
256 void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE); 257 void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
257 258
258 gic_init(0, 29, gic_base, gic_base); 259 gic_init(0, 29, gic_dist_base, gic_cpu_base);
259 260
260 register_intc_controller(&intcs_desc); 261 register_intc_controller(&intcs_desc);
261 262
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index bd066206e110..ad8048801513 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -207,9 +207,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
207 spin_unlock_irqrestore(&bank->lvl_lock[port], flags); 207 spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
208 208
209 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) 209 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
210 __set_irq_handler_unlocked(irq, handle_level_irq); 210 __set_irq_handler_unlocked(d->irq, handle_level_irq);
211 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) 211 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
212 __set_irq_handler_unlocked(irq, handle_edge_irq); 212 __set_irq_handler_unlocked(d->irq, handle_edge_irq);
213 213
214 return 0; 214 return 0;
215} 215}
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h
index d7723955dac7..a217f68ba57c 100644
--- a/arch/arm/mach-tegra/include/mach/clk.h
+++ b/arch/arm/mach-tegra/include/mach/clk.h
@@ -20,6 +20,8 @@
20#ifndef __MACH_CLK_H 20#ifndef __MACH_CLK_H
21#define __MACH_CLK_H 21#define __MACH_CLK_H
22 22
23struct clk;
24
23void tegra_periph_reset_deassert(struct clk *c); 25void tegra_periph_reset_deassert(struct clk *c);
24void tegra_periph_reset_assert(struct clk *c); 26void tegra_periph_reset_assert(struct clk *c);
25 27
diff --git a/arch/arm/mach-tegra/include/mach/clkdev.h b/arch/arm/mach-tegra/include/mach/clkdev.h
index 412f5c63e65a..66cd3f4fc896 100644
--- a/arch/arm/mach-tegra/include/mach/clkdev.h
+++ b/arch/arm/mach-tegra/include/mach/clkdev.h
@@ -20,6 +20,8 @@
20#ifndef __MACH_CLKDEV_H 20#ifndef __MACH_CLKDEV_H
21#define __MACH_CLKDEV_H 21#define __MACH_CLKDEV_H
22 22
23struct clk;
24
23static inline int __clk_get(struct clk *clk) 25static inline int __clk_get(struct clk *clk)
24{ 26{
25 return 1; 27 return 1;
diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h
new file mode 100644
index 000000000000..66ad2760c621
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/kbc.h
@@ -0,0 +1,61 @@
1/*
2 * Platform definitions for tegra-kbc keyboard input driver
3 *
4 * Copyright (c) 2010-2011, NVIDIA Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 */
20
21#ifndef ASMARM_ARCH_TEGRA_KBC_H
22#define ASMARM_ARCH_TEGRA_KBC_H
23
24#include <linux/types.h>
25#include <linux/input/matrix_keypad.h>
26
27#ifdef CONFIG_ARCH_TEGRA_2x_SOC
28#define KBC_MAX_GPIO 24
29#define KBC_MAX_KPENT 8
30#else
31#define KBC_MAX_GPIO 20
32#define KBC_MAX_KPENT 7
33#endif
34
35#define KBC_MAX_ROW 16
36#define KBC_MAX_COL 8
37#define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL)
38
39struct tegra_kbc_pin_cfg {
40 bool is_row;
41 unsigned char num;
42};
43
44struct tegra_kbc_wake_key {
45 u8 row:4;
46 u8 col:4;
47};
48
49struct tegra_kbc_platform_data {
50 unsigned int debounce_cnt;
51 unsigned int repeat_cnt;
52
53 unsigned int wake_cnt; /* 0:wake on any key >1:wake on wake_cfg */
54 const struct tegra_kbc_wake_key *wake_cfg;
55
56 struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
57 const struct matrix_keymap_data *keymap_data;
58
59 bool wakeup;
60};
61#endif
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index de7dfad6f769..17c74d21077c 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -46,24 +46,24 @@
46#define ICTLR_COP_IER_CLR 0x38 46#define ICTLR_COP_IER_CLR 0x38
47#define ICTLR_COP_IEP_CLASS 0x3c 47#define ICTLR_COP_IEP_CLASS 0x3c
48 48
49static void (*gic_mask_irq)(struct irq_data *d); 49static void (*tegra_gic_mask_irq)(struct irq_data *d);
50static void (*gic_unmask_irq)(struct irq_data *d); 50static void (*tegra_gic_unmask_irq)(struct irq_data *d);
51 51
52#define irq_to_ictlr(irq) (((irq)-32) >> 5) 52#define irq_to_ictlr(irq) (((irq) - 32) >> 5)
53static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); 53static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE);
54#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100) 54#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr) * 0x100)
55 55
56static void tegra_mask(struct irq_data *d) 56static void tegra_mask(struct irq_data *d)
57{ 57{
58 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); 58 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
59 gic_mask_irq(d); 59 tegra_gic_mask_irq(d);
60 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_CLR); 60 writel(1 << (d->irq & 31), addr+ICTLR_CPU_IER_CLR);
61} 61}
62 62
63static void tegra_unmask(struct irq_data *d) 63static void tegra_unmask(struct irq_data *d)
64{ 64{
65 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); 65 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
66 gic_unmask_irq(d); 66 tegra_gic_unmask_irq(d);
67 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET); 67 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET);
68} 68}
69 69
@@ -98,8 +98,8 @@ void __init tegra_init_irq(void)
98 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); 98 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
99 99
100 gic = get_irq_chip(29); 100 gic = get_irq_chip(29);
101 gic_unmask_irq = gic->irq_unmask; 101 tegra_gic_unmask_irq = gic->irq_unmask;
102 gic_mask_irq = gic->irq_mask; 102 tegra_gic_mask_irq = gic->irq_mask;
103 tegra_irq.irq_ack = gic->irq_ack; 103 tegra_irq.irq_ack = gic->irq_ack;
104#ifdef CONFIG_SMP 104#ifdef CONFIG_SMP
105 tegra_irq.irq_set_affinity = gic->irq_set_affinity; 105 tegra_irq.irq_set_affinity = gic->irq_set_affinity;
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index 3f7b5e9d83c5..9cdec5aa04a0 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -2,17 +2,19 @@ menu "Versatile platform type"
2 depends on ARCH_VERSATILE 2 depends on ARCH_VERSATILE
3 3
4config ARCH_VERSATILE_PB 4config ARCH_VERSATILE_PB
5 bool "Support Versatile/PB platform" 5 bool "Support Versatile Platform Baseboard for ARM926EJ-S"
6 select CPU_ARM926T 6 select CPU_ARM926T
7 select MIGHT_HAVE_PCI 7 select MIGHT_HAVE_PCI
8 default y 8 default y
9 help 9 help
10 Include support for the ARM(R) Versatile/PB platform. 10 Include support for the ARM(R) Versatile Platform Baseboard
11 for the ARM926EJ-S.
11 12
12config MACH_VERSATILE_AB 13config MACH_VERSATILE_AB
13 bool "Support Versatile/AB platform" 14 bool "Support Versatile Application Baseboard for ARM926EJ-S"
14 select CPU_ARM926T 15 select CPU_ARM926T
15 help 16 help
16 Include support for the ARM(R) Versatile/AP platform. 17 Include support for the ARM(R) Versatile Application Baseboard
18 for the ARM926EJ-S.
17 19
18endmenu 20endmenu
diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c
index b1687b6abe63..634bf1d3a311 100644
--- a/arch/arm/mach-vexpress/platsmp.c
+++ b/arch/arm/mach-vexpress/platsmp.c
@@ -39,7 +39,7 @@ volatile int __cpuinitdata pen_release = -1;
39 * observers, irrespective of whether they're taking part in coherency 39 * observers, irrespective of whether they're taking part in coherency
40 * or not. This is necessary for the hotplug code to work reliably. 40 * or not. This is necessary for the hotplug code to work reliably.
41 */ 41 */
42static void write_pen_release(int val) 42static void __cpuinit write_pen_release(int val)
43{ 43{
44 pen_release = val; 44 pen_release = val;
45 smp_wmb(); 45 smp_wmb();
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index a9ed3428a2fa..1edae65a0e72 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -19,6 +19,7 @@
19#include <asm/mach/time.h> 19#include <asm/mach/time.h>
20#include <asm/hardware/arm_timer.h> 20#include <asm/hardware/arm_timer.h>
21#include <asm/hardware/timer-sp.h> 21#include <asm/hardware/timer-sp.h>
22#include <asm/hardware/sp810.h>
22 23
23#include <mach/motherboard.h> 24#include <mach/motherboard.h>
24 25
@@ -50,8 +51,16 @@ void __init v2m_map_io(struct map_desc *tile, size_t num)
50 51
51static void __init v2m_timer_init(void) 52static void __init v2m_timer_init(void)
52{ 53{
54 u32 scctrl;
55
53 versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000); 56 versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
54 57
58 /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
59 scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
60 scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
61 scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
62 writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
63
55 writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL); 64 writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
56 writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL); 65 writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
57 66
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9d30c6f804b9..e4509bae8fc4 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -405,7 +405,7 @@ config CPU_V6
405config CPU_32v6K 405config CPU_32v6K
406 bool "Support ARM V6K processor extensions" if !SMP 406 bool "Support ARM V6K processor extensions" if !SMP
407 depends on CPU_V6 || CPU_V7 407 depends on CPU_V6 || CPU_V7
408 default y if SMP && !(ARCH_MX3 || ARCH_OMAP2) 408 default y if SMP
409 help 409 help
410 Say Y here if your ARMv6 processor supports the 'K' extension. 410 Say Y here if your ARMv6 processor supports the 'K' extension.
411 This enables the kernel to use some instructions not present 411 This enables the kernel to use some instructions not present
@@ -416,7 +416,7 @@ config CPU_32v6K
416# ARMv7 416# ARMv7
417config CPU_V7 417config CPU_V7
418 bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX 418 bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
419 select CPU_32v6K if !ARCH_OMAP2 419 select CPU_32v6K
420 select CPU_32v7 420 select CPU_32v7
421 select CPU_ABRT_EV7 421 select CPU_ABRT_EV7
422 select CPU_PABRT_V7 422 select CPU_PABRT_V7
@@ -644,7 +644,7 @@ config ARM_THUMBEE
644 644
645config SWP_EMULATE 645config SWP_EMULATE
646 bool "Emulate SWP/SWPB instructions" 646 bool "Emulate SWP/SWPB instructions"
647 depends on CPU_V7 && !CPU_V6 647 depends on !CPU_USE_DOMAINS && CPU_V7 && !CPU_V6
648 select HAVE_PROC_CPU if PROC_FS 648 select HAVE_PROC_CPU if PROC_FS
649 default y if SMP 649 default y if SMP
650 help 650 help
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 5164069ced42..cddd684364da 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -297,6 +297,12 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc)
297 memblock_reserve(__pa(_stext), _end - _stext); 297 memblock_reserve(__pa(_stext), _end - _stext);
298#endif 298#endif
299#ifdef CONFIG_BLK_DEV_INITRD 299#ifdef CONFIG_BLK_DEV_INITRD
300 if (phys_initrd_size &&
301 memblock_is_region_reserved(phys_initrd_start, phys_initrd_size)) {
302 pr_err("INITRD: 0x%08lx+0x%08lx overlaps in-use memory region - disabling initrd\n",
303 phys_initrd_start, phys_initrd_size);
304 phys_initrd_start = phys_initrd_size = 0;
305 }
300 if (phys_initrd_size) { 306 if (phys_initrd_size) {
301 memblock_reserve(phys_initrd_start, phys_initrd_size); 307 memblock_reserve(phys_initrd_start, phys_initrd_size);
302 308
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index 8aa974491dfc..c074e66ad224 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -10,8 +10,6 @@
10 */ 10 */
11 11
12#include <linux/cpumask.h> 12#include <linux/cpumask.h>
13#include <linux/err.h>
14#include <linux/errno.h>
15#include <linux/init.h> 13#include <linux/init.h>
16#include <linux/mutex.h> 14#include <linux/mutex.h>
17#include <linux/oprofile.h> 15#include <linux/oprofile.h>
@@ -46,6 +44,7 @@ char *op_name_from_perf_id(void)
46 return NULL; 44 return NULL;
47 } 45 }
48} 46}
47#endif
49 48
50static int report_trace(struct stackframe *frame, void *d) 49static int report_trace(struct stackframe *frame, void *d)
51{ 50{
@@ -85,7 +84,7 @@ static struct frame_tail* user_backtrace(struct frame_tail *tail)
85 84
86 /* frame pointers should strictly progress back up the stack 85 /* frame pointers should strictly progress back up the stack
87 * (towards higher addresses) */ 86 * (towards higher addresses) */
88 if (tail >= buftail[0].fp) 87 if (tail + 1 >= buftail[0].fp)
89 return NULL; 88 return NULL;
90 89
91 return buftail[0].fp-1; 90 return buftail[0].fp-1;
@@ -111,6 +110,7 @@ static void arm_backtrace(struct pt_regs * const regs, unsigned int depth)
111 110
112int __init oprofile_arch_init(struct oprofile_operations *ops) 111int __init oprofile_arch_init(struct oprofile_operations *ops)
113{ 112{
113 /* provide backtrace support also in timer mode: */
114 ops->backtrace = arm_backtrace; 114 ops->backtrace = arm_backtrace;
115 115
116 return oprofile_perf_init(ops); 116 return oprofile_perf_init(ops);
@@ -120,11 +120,3 @@ void __exit oprofile_arch_exit(void)
120{ 120{
121 oprofile_perf_exit(); 121 oprofile_perf_exit();
122} 122}
123#else
124int __init oprofile_arch_init(struct oprofile_operations *ops)
125{
126 pr_info("oprofile: hardware counters not available\n");
127 return -ENODEV;
128}
129void __exit oprofile_arch_exit(void) {}
130#endif /* CONFIG_HW_PERF_EVENTS */
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 3a70ebf0477f..ff469c4f1d76 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -95,6 +95,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
95 case MACH_TYPE_MX35_3DS: 95 case MACH_TYPE_MX35_3DS:
96 case MACH_TYPE_PCM043: 96 case MACH_TYPE_PCM043:
97 case MACH_TYPE_LILLY1131: 97 case MACH_TYPE_LILLY1131:
98 case MACH_TYPE_VPR200:
98 uart_base = MX3X_UART1_BASE_ADDR; 99 uart_base = MX3X_UART1_BASE_ADDR;
99 break; 100 break;
100 case MACH_TYPE_MAGX_ZN5: 101 case MACH_TYPE_MAGX_ZN5:
@@ -102,6 +103,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
102 break; 103 break;
103 case MACH_TYPE_MX51_BABBAGE: 104 case MACH_TYPE_MX51_BABBAGE:
104 case MACH_TYPE_EUKREA_CPUIMX51SD: 105 case MACH_TYPE_EUKREA_CPUIMX51SD:
106 case MACH_TYPE_MX51_3DS:
105 uart_base = MX51_UART1_BASE_ADDR; 107 uart_base = MX51_UART1_BASE_ADDR;
106 break; 108 break;
107 case MACH_TYPE_MX50_RDP: 109 case MACH_TYPE_MX50_RDP:
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
index b77e018d36c1..a9aa5ad3f4eb 100644
--- a/arch/arm/plat-pxa/mfp.c
+++ b/arch/arm/plat-pxa/mfp.c
@@ -139,10 +139,11 @@ static const unsigned long mfpr_edge[] = {
139#define mfp_configured(p) ((p)->config != -1) 139#define mfp_configured(p) ((p)->config != -1)
140 140
141/* 141/*
142 * perform a read-back of any MFPR register to make sure the 142 * perform a read-back of any valid MFPR register to make sure the
143 * previous writings are finished 143 * previous writings are finished
144 */ 144 */
145#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0) 145static unsigned long mfpr_off_readback;
146#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + mfpr_off_readback)
146 147
147static inline void __mfp_config_run(struct mfp_pin *p) 148static inline void __mfp_config_run(struct mfp_pin *p)
148{ 149{
@@ -248,6 +249,9 @@ void __init mfp_init_addr(struct mfp_addr_map *map)
248 249
249 spin_lock_irqsave(&mfp_spin_lock, flags); 250 spin_lock_irqsave(&mfp_spin_lock, flags);
250 251
252 /* mfp offset for readback */
253 mfpr_off_readback = map[0].offset;
254
251 for (p = map; p->start != MFP_PIN_INVALID; p++) { 255 for (p = map; p->start != MFP_PIN_INVALID; p++) {
252 offset = p->offset; 256 offset = p->offset;
253 i = p->start; 257 i = p->start;
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index deb39951a22e..557f8c507f6d 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -37,6 +37,14 @@ config S5P_GPIO_INT
37 help 37 help
38 Common code for the GPIO interrupts (other than external interrupts.) 38 Common code for the GPIO interrupts (other than external interrupts.)
39 39
40comment "System MMU"
41
42config S5P_SYSTEM_MMU
43 bool "S5P SYSTEM MMU"
44 depends on ARCH_S5PV310
45 help
46 Say Y here if you want to enable System MMU
47
40config S5P_DEV_FIMC0 48config S5P_DEV_FIMC0
41 bool 49 bool
42 help 50 help
@@ -66,19 +74,3 @@ config S5P_DEV_CSIS1
66 bool 74 bool
67 help 75 help
68 Compile in platform device definitions for MIPI-CSIS channel 1 76 Compile in platform device definitions for MIPI-CSIS channel 1
69
70menuconfig S5P_SYSMMU
71 bool "SYSMMU support"
72 depends on ARCH_S5PV310
73 help
74 This is a System MMU driver for Samsung ARM based Soc.
75
76if S5P_SYSMMU
77
78config S5P_SYSMMU_DEBUG
79 bool "Enables debug messages"
80 depends on S5P_SYSMMU
81 help
82 This enables SYSMMU driver debug massages.
83
84endif
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 92efe1adcfd6..4bd5cf908977 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -19,6 +19,7 @@ obj-y += clock.o
19obj-y += irq.o 19obj-y += irq.o
20obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o 20obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
21obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o 21obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o
22obj-$(CONFIG_S5P_SYSTEM_MMU) += sysmmu.o
22obj-$(CONFIG_PM) += pm.o 23obj-$(CONFIG_PM) += pm.o
23obj-$(CONFIG_PM) += irq-pm.o 24obj-$(CONFIG_PM) += irq-pm.o
24 25
@@ -30,4 +31,3 @@ obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o
30obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o 31obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o
31obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o 32obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o
32obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o 33obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o
33obj-$(CONFIG_S5P_SYSMMU) += sysmmu.o
diff --git a/arch/arm/plat-s5p/include/plat/sysmmu.h b/arch/arm/plat-s5p/include/plat/sysmmu.h
deleted file mode 100644
index db298fc5438a..000000000000
--- a/arch/arm/plat-s5p/include/plat/sysmmu.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/sysmmu.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Samsung sysmmu driver
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_SYSMMU_H
14#define __ASM_PLAT_S5P_SYSMMU_H __FILE__
15
16/* debug macro */
17#ifdef CONFIG_S5P_SYSMMU_DEBUG
18#define sysmmu_debug(fmt, arg...) printk(KERN_INFO "[%s] " fmt, __func__, ## arg)
19#else
20#define sysmmu_debug(fmt, arg...) do { } while (0)
21#endif
22
23#endif /* __ASM_PLAT_S5P_SYSMMU_H */
diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c
index d804914dc2e2..ffe8a48bc3c1 100644
--- a/arch/arm/plat-s5p/sysmmu.c
+++ b/arch/arm/plat-s5p/sysmmu.c
@@ -16,8 +16,6 @@
16#include <mach/regs-sysmmu.h> 16#include <mach/regs-sysmmu.h>
17#include <mach/sysmmu.h> 17#include <mach/sysmmu.h>
18 18
19#include <plat/sysmmu.h>
20
21struct sysmmu_controller s5p_sysmmu_cntlrs[S5P_SYSMMU_TOTAL_IPNUM]; 19struct sysmmu_controller s5p_sysmmu_cntlrs[S5P_SYSMMU_TOTAL_IPNUM];
22 20
23void s5p_sysmmu_register(struct sysmmu_controller *sysmmuconp) 21void s5p_sysmmu_register(struct sysmmu_controller *sysmmuconp)
@@ -123,7 +121,7 @@ static int s5p_sysmmu_set_tablebase(sysmmu_ips ips)
123 : "=r" (pg) : : "cc"); \ 121 : "=r" (pg) : : "cc"); \
124 pg &= ~0x3fff; 122 pg &= ~0x3fff;
125 123
126 sysmmu_debug("CP15 TTBR0 : 0x%x\n", pg); 124 printk(KERN_INFO "%s: CP15 TTBR0 : 0x%x\n", __func__, pg);
127 125
128 /* Set sysmmu page table base address */ 126 /* Set sysmmu page table base address */
129 __raw_writel(pg, sysmmuconp->regs + S5P_PT_BASE_ADDR); 127 __raw_writel(pg, sysmmuconp->regs + S5P_PT_BASE_ADDR);
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index d9025e377675..30518cc9a67c 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -17,6 +17,8 @@
17 17
18#include <linux/irq.h> 18#include <linux/irq.h>
19 19
20struct sys_device;
21
20#ifdef CONFIG_PM 22#ifdef CONFIG_PM
21 23
22extern __init int s3c_pm_init(void); 24extern __init int s3c_pm_init(void);
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 2fea897ebeb1..9d6feaabbe7d 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Sun Dec 12 23:24:27 2010 15# Last update: Mon Feb 7 08:59:27 2011
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -2240,7 +2240,7 @@ arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
2240vs_v210 MACH_VS_V210 VS_V210 2252 2240vs_v210 MACH_VS_V210 VS_V210 2252
2241vs_v212 MACH_VS_V212 VS_V212 2253 2241vs_v212 MACH_VS_V212 VS_V212 2253
2242hmt MACH_HMT HMT 2254 2242hmt MACH_HMT HMT 2254
2243suen3 MACH_SUEN3 SUEN3 2255 2243km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255
2244vesper MACH_VESPER VESPER 2256 2244vesper MACH_VESPER VESPER 2256
2245str9 MACH_STR9 STR9 2257 2245str9 MACH_STR9 STR9 2257
2246omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258 2246omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
@@ -2987,7 +2987,7 @@ pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
2987ea20 MACH_EA20 EA20 3002 2987ea20 MACH_EA20 EA20 3002
2988awm2 MACH_AWM2 AWM2 3003 2988awm2 MACH_AWM2 AWM2 3003
2989ti8148evm MACH_TI8148EVM TI8148EVM 3004 2989ti8148evm MACH_TI8148EVM TI8148EVM 3004
2990tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005 2990seaboard MACH_SEABOARD SEABOARD 3005
2991linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006 2991linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
2992tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007 2992tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
2993rubys MACH_RUBYS RUBYS 3008 2993rubys MACH_RUBYS RUBYS 3008
@@ -3190,7 +3190,7 @@ synergy MACH_SYNERGY SYNERGY 3205
3190ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 3190ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
3191wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 3191wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
3192punica MACH_PUNICA PUNICA 3208 3192punica MACH_PUNICA PUNICA 3208
3193sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209 3193trimslice MACH_TRIMSLICE TRIMSLICE 3209
3194mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210 3194mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
3195mackerel MACH_MACKEREL MACKEREL 3211 3195mackerel MACH_MACKEREL MACKEREL 3211
3196fa9x27 MACH_FA9X27 FA9X27 3213 3196fa9x27 MACH_FA9X27 FA9X27 3213
@@ -3219,3 +3219,100 @@ pivicc MACH_PIVICC PIVICC 3235
3219pcm048 MACH_PCM048 PCM048 3236 3219pcm048 MACH_PCM048 PCM048 3236
3220dds MACH_DDS DDS 3237 3220dds MACH_DDS DDS 3237
3221chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238 3221chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238
3222ts48xx MACH_TS48XX TS48XX 3239
3223tonga2_tfttimer MACH_TONGA2_TFTTIMER TONGA2_TFTTIMER 3240
3224whistler MACH_WHISTLER WHISTLER 3241
3225asl_phoenix MACH_ASL_PHOENIX ASL_PHOENIX 3242
3226at91sam9263otlite MACH_AT91SAM9263OTLITE AT91SAM9263OTLITE 3243
3227ddplug MACH_DDPLUG DDPLUG 3244
3228d2plug MACH_D2PLUG D2PLUG 3245
3229kzm9d MACH_KZM9D KZM9D 3246
3230verdi_lte MACH_VERDI_LTE VERDI_LTE 3247
3231nanozoom MACH_NANOZOOM NANOZOOM 3248
3232dm3730_som_lv MACH_DM3730_SOM_LV DM3730_SOM_LV 3249
3233dm3730_torpedo MACH_DM3730_TORPEDO DM3730_TORPEDO 3250
3234anchovy MACH_ANCHOVY ANCHOVY 3251
3235re2rev20 MACH_RE2REV20 RE2REV20 3253
3236re2rev21 MACH_RE2REV21 RE2REV21 3254
3237cns21xx MACH_CNS21XX CNS21XX 3255
3238rider MACH_RIDER RIDER 3257
3239nsk330 MACH_NSK330 NSK330 3258
3240cns2133evb MACH_CNS2133EVB CNS2133EVB 3259
3241z3_816x_mod MACH_Z3_816X_MOD Z3_816X_MOD 3260
3242z3_814x_mod MACH_Z3_814X_MOD Z3_814X_MOD 3261
3243beect MACH_BEECT BEECT 3262
3244dma_thunderbug MACH_DMA_THUNDERBUG DMA_THUNDERBUG 3263
3245omn_at91sam9g20 MACH_OMN_AT91SAM9G20 OMN_AT91SAM9G20 3264
3246mx25_e2s_uc MACH_MX25_E2S_UC MX25_E2S_UC 3265
3247mione MACH_MIONE MIONE 3266
3248top9000_tcu MACH_TOP9000_TCU TOP9000_TCU 3267
3249top9000_bsl MACH_TOP9000_BSL TOP9000_BSL 3268
3250kingdom MACH_KINGDOM KINGDOM 3269
3251armadillo460 MACH_ARMADILLO460 ARMADILLO460 3270
3252lq2 MACH_LQ2 LQ2 3271
3253sweda_tms2 MACH_SWEDA_TMS2 SWEDA_TMS2 3272
3254mx53_loco MACH_MX53_LOCO MX53_LOCO 3273
3255acer_a8 MACH_ACER_A8 ACER_A8 3275
3256acer_gauguin MACH_ACER_GAUGUIN ACER_GAUGUIN 3276
3257guppy MACH_GUPPY GUPPY 3277
3258mx61_ard MACH_MX61_ARD MX61_ARD 3278
3259tx53 MACH_TX53 TX53 3279
3260omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280
3261uemd MACH_UEMD UEMD 3281
3262ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282
3263rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283
3264nookcolor MACH_NOOKCOLOR NOOKCOLOR 3284
3265hkdkc100 MACH_HKDKC100 HKDKC100 3285
3266ts42xx MACH_TS42XX TS42XX 3286
3267aebl MACH_AEBL AEBL 3287
3268wario MACH_WARIO WARIO 3288
3269gfs_spm MACH_GFS_SPM GFS_SPM 3289
3270cm_t3730 MACH_CM_T3730 CM_T3730 3290
3271isc3 MACH_ISC3 ISC3 3291
3272rascal MACH_RASCAL RASCAL 3292
3273hrefv60 MACH_HREFV60 HREFV60 3293
3274tpt_2_0 MACH_TPT_2_0 TPT_2_0 3294
3275pyramid_td MACH_PYRAMID_TD PYRAMID_TD 3295
3276splendor MACH_SPLENDOR SPLENDOR 3296
3277guf_planet MACH_GUF_PLANET GUF_PLANET 3297
3278msm8x60_qt MACH_MSM8X60_QT MSM8X60_QT 3298
3279htc_hd_mini MACH_HTC_HD_MINI HTC_HD_MINI 3299
3280athene MACH_ATHENE ATHENE 3300
3281deep_r_ek_1 MACH_DEEP_R_EK_1 DEEP_R_EK_1 3301
3282vivow_ct MACH_VIVOW_CT VIVOW_CT 3302
3283nery_1000 MACH_NERY_1000 NERY_1000 3303
3284rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
3285nmh MACH_NMH NMH 3305
3286wn802t MACH_WN802T WN802T 3306
3287dragonet MACH_DRAGONET DRAGONET 3307
3288geneva_b MACH_GENEVA_B GENEVA_B 3308
3289at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
3290bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
3291bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
3292koi MACH_KOI KOI 3312
3293ts4800 MACH_TS4800 TS4800 3313
3294tqma9263 MACH_TQMA9263 TQMA9263 3314
3295holiday MACH_HOLIDAY HOLIDAY 3315
3296dma_6410 MACH_DMA6410 DMA6410 3316
3297pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317
3298hwgw6410 MACH_HWGW6410 HWGW6410 3318
3299shenzhou MACH_SHENZHOU SHENZHOU 3319
3300cwme9210 MACH_CWME9210 CWME9210 3320
3301cwme9210js MACH_CWME9210JS CWME9210JS 3321
3302pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322
3303colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323
3304w21 MACH_W21 W21 3324
3305polysat1 MACH_POLYSAT1 POLYSAT1 3325
3306dataway MACH_DATAWAY DATAWAY 3326
3307cobral138 MACH_COBRAL138 COBRAL138 3327
3308roverpcs8 MACH_ROVERPCS8 ROVERPCS8 3328
3309marvelc MACH_MARVELC MARVELC 3329
3310navefihid MACH_NAVEFIHID NAVEFIHID 3330
3311dm365_cv100 MACH_DM365_CV100 DM365_CV100 3331
3312able MACH_ABLE ABLE 3332
3313legacy MACH_LEGACY LEGACY 3333
3314icong MACH_ICONG ICONG 3334
3315rover_g8 MACH_ROVER_G8 ROVER_G8 3335
3316t5388p MACH_T5388P T5388P 3336
3317dingo MACH_DINGO DINGO 3337
3318goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338
diff --git a/arch/avr32/include/asm/pgalloc.h b/arch/avr32/include/asm/pgalloc.h
index 92ecd8446ef8..bc7e8ae479ee 100644
--- a/arch/avr32/include/asm/pgalloc.h
+++ b/arch/avr32/include/asm/pgalloc.h
@@ -8,6 +8,7 @@
8#ifndef __ASM_AVR32_PGALLOC_H 8#ifndef __ASM_AVR32_PGALLOC_H
9#define __ASM_AVR32_PGALLOC_H 9#define __ASM_AVR32_PGALLOC_H
10 10
11#include <linux/mm.h>
11#include <linux/quicklist.h> 12#include <linux/quicklist.h>
12#include <asm/page.h> 13#include <asm/page.h>
13#include <asm/pgtable.h> 14#include <asm/pgtable.h>
diff --git a/arch/blackfin/include/asm/bfin_serial.h b/arch/blackfin/include/asm/bfin_serial.h
index 1ff9f1468c02..7dbc664eab1e 100644
--- a/arch/blackfin/include/asm/bfin_serial.h
+++ b/arch/blackfin/include/asm/bfin_serial.h
@@ -10,6 +10,7 @@
10#define __BFIN_ASM_SERIAL_H__ 10#define __BFIN_ASM_SERIAL_H__
11 11
12#include <linux/serial_core.h> 12#include <linux/serial_core.h>
13#include <linux/spinlock.h>
13#include <mach/anomaly.h> 14#include <mach/anomaly.h>
14#include <mach/bfin_serial.h> 15#include <mach/bfin_serial.h>
15 16
@@ -41,6 +42,7 @@ struct bfin_serial_port {
41 struct circ_buf rx_dma_buf; 42 struct circ_buf rx_dma_buf;
42 struct timer_list rx_dma_timer; 43 struct timer_list rx_dma_timer;
43 int rx_dma_nrows; 44 int rx_dma_nrows;
45 spinlock_t rx_lock;
44 unsigned int tx_dma_channel; 46 unsigned int tx_dma_channel;
45 unsigned int rx_dma_channel; 47 unsigned int rx_dma_channel;
46 struct work_struct tx_dma_workqueue; 48 struct work_struct tx_dma_workqueue;
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
index f745c1287f3a..76eaf3883fbd 100644
--- a/arch/m32r/kernel/irq.c
+++ b/arch/m32r/kernel/irq.c
@@ -80,7 +80,7 @@ asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
80#ifdef CONFIG_DEBUG_STACKOVERFLOW 80#ifdef CONFIG_DEBUG_STACKOVERFLOW
81 /* FIXME M32R */ 81 /* FIXME M32R */
82#endif 82#endif
83 __do_IRQ(irq); 83 generic_handle_irq(irq);
84 irq_exit(); 84 irq_exit();
85 set_irq_regs(old_regs); 85 set_irq_regs(old_regs);
86 86
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c
index b1577f741fa8..82a4bb51d5d8 100644
--- a/arch/m68k/amiga/config.c
+++ b/arch/m68k/amiga/config.c
@@ -610,17 +610,17 @@ static void amiga_mem_console_write(struct console *co, const char *s,
610 610
611static int __init amiga_savekmsg_setup(char *arg) 611static int __init amiga_savekmsg_setup(char *arg)
612{ 612{
613 static struct resource debug_res = { .name = "Debug" };
614
615 if (!MACH_IS_AMIGA || strcmp(arg, "mem")) 613 if (!MACH_IS_AMIGA || strcmp(arg, "mem"))
616 goto done; 614 return 0;
617 615
618 if (!AMIGAHW_PRESENT(CHIP_RAM)) { 616 if (amiga_chip_size < SAVEKMSG_MAXMEM) {
619 printk("Warning: no chipram present for debugging\n"); 617 pr_err("Not enough chipram for debugging\n");
620 goto done; 618 return -ENOMEM;
621 } 619 }
622 620
623 savekmsg = amiga_chip_alloc_res(SAVEKMSG_MAXMEM, &debug_res); 621 /* Just steal the block, the chipram allocator isn't functional yet */
622 amiga_chip_size -= SAVEKMSG_MAXMEM;
623 savekmsg = (void *)ZTWO_VADDR(CHIP_PHYSADDR + amiga_chip_size);
624 savekmsg->magic1 = SAVEKMSG_MAGIC1; 624 savekmsg->magic1 = SAVEKMSG_MAGIC1;
625 savekmsg->magic2 = SAVEKMSG_MAGIC2; 625 savekmsg->magic2 = SAVEKMSG_MAGIC2;
626 savekmsg->magicptr = ZTWO_PADDR(savekmsg); 626 savekmsg->magicptr = ZTWO_PADDR(savekmsg);
@@ -628,8 +628,6 @@ static int __init amiga_savekmsg_setup(char *arg)
628 628
629 amiga_console_driver.write = amiga_mem_console_write; 629 amiga_console_driver.write = amiga_mem_console_write;
630 register_console(&amiga_console_driver); 630 register_console(&amiga_console_driver);
631
632done:
633 return 0; 631 return 0;
634} 632}
635 633
diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c
index 39478dd08e67..26a804e67bce 100644
--- a/arch/m68k/atari/ataints.c
+++ b/arch/m68k/atari/ataints.c
@@ -388,9 +388,9 @@ void __init atari_init_IRQ(void)
388 } 388 }
389 389
390 if (ATARIHW_PRESENT(SCC) && !atari_SCC_reset_done) { 390 if (ATARIHW_PRESENT(SCC) && !atari_SCC_reset_done) {
391 scc.cha_a_ctrl = 9; 391 atari_scc.cha_a_ctrl = 9;
392 MFPDELAY(); 392 MFPDELAY();
393 scc.cha_a_ctrl = (char) 0xc0; /* hardware reset */ 393 atari_scc.cha_a_ctrl = (char) 0xc0; /* hardware reset */
394 } 394 }
395 395
396 if (ATARIHW_PRESENT(SCU)) { 396 if (ATARIHW_PRESENT(SCU)) {
diff --git a/arch/m68k/atari/config.c b/arch/m68k/atari/config.c
index ae2d96e5d618..4203d101363c 100644
--- a/arch/m68k/atari/config.c
+++ b/arch/m68k/atari/config.c
@@ -315,7 +315,7 @@ void __init config_atari(void)
315 ATARIHW_SET(SCC_DMA); 315 ATARIHW_SET(SCC_DMA);
316 printk("SCC_DMA "); 316 printk("SCC_DMA ");
317 } 317 }
318 if (scc_test(&scc.cha_a_ctrl)) { 318 if (scc_test(&atari_scc.cha_a_ctrl)) {
319 ATARIHW_SET(SCC); 319 ATARIHW_SET(SCC);
320 printk("SCC "); 320 printk("SCC ");
321 } 321 }
diff --git a/arch/m68k/atari/debug.c b/arch/m68k/atari/debug.c
index 28efdc33c1ae..5a484247e493 100644
--- a/arch/m68k/atari/debug.c
+++ b/arch/m68k/atari/debug.c
@@ -53,9 +53,9 @@ static inline void ata_scc_out(char c)
53{ 53{
54 do { 54 do {
55 MFPDELAY(); 55 MFPDELAY();
56 } while (!(scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */ 56 } while (!(atari_scc.cha_b_ctrl & 0x04)); /* wait for tx buf empty */
57 MFPDELAY(); 57 MFPDELAY();
58 scc.cha_b_data = c; 58 atari_scc.cha_b_data = c;
59} 59}
60 60
61static void atari_scc_console_write(struct console *co, const char *str, 61static void atari_scc_console_write(struct console *co, const char *str,
@@ -140,9 +140,9 @@ int atari_scc_console_wait_key(struct console *co)
140{ 140{
141 do { 141 do {
142 MFPDELAY(); 142 MFPDELAY();
143 } while (!(scc.cha_b_ctrl & 0x01)); /* wait for rx buf filled */ 143 } while (!(atari_scc.cha_b_ctrl & 0x01)); /* wait for rx buf filled */
144 MFPDELAY(); 144 MFPDELAY();
145 return scc.cha_b_data; 145 return atari_scc.cha_b_data;
146} 146}
147 147
148int atari_midi_console_wait_key(struct console *co) 148int atari_midi_console_wait_key(struct console *co)
@@ -185,9 +185,9 @@ static void __init atari_init_mfp_port(int cflag)
185 185
186#define SCC_WRITE(reg, val) \ 186#define SCC_WRITE(reg, val) \
187 do { \ 187 do { \
188 scc.cha_b_ctrl = (reg); \ 188 atari_scc.cha_b_ctrl = (reg); \
189 MFPDELAY(); \ 189 MFPDELAY(); \
190 scc.cha_b_ctrl = (val); \ 190 atari_scc.cha_b_ctrl = (val); \
191 MFPDELAY(); \ 191 MFPDELAY(); \
192 } while (0) 192 } while (0)
193 193
@@ -240,7 +240,7 @@ static void __init atari_init_scc_port(int cflag)
240 reg3 = (cflag & CSIZE) == CS8 ? 0xc0 : 0x40; 240 reg3 = (cflag & CSIZE) == CS8 ? 0xc0 : 0x40;
241 reg5 = (cflag & CSIZE) == CS8 ? 0x60 : 0x20 | 0x82 /* assert DTR/RTS */; 241 reg5 = (cflag & CSIZE) == CS8 ? 0x60 : 0x20 | 0x82 /* assert DTR/RTS */;
242 242
243 (void)scc.cha_b_ctrl; /* reset reg pointer */ 243 (void)atari_scc.cha_b_ctrl; /* reset reg pointer */
244 SCC_WRITE(9, 0xc0); /* reset */ 244 SCC_WRITE(9, 0xc0); /* reset */
245 LONG_DELAY(); /* extra delay after WR9 access */ 245 LONG_DELAY(); /* extra delay after WR9 access */
246 SCC_WRITE(4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) 246 SCC_WRITE(4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03)
diff --git a/arch/m68k/include/asm/atarihw.h b/arch/m68k/include/asm/atarihw.h
index a714e1aa072a..f51f709bbf30 100644
--- a/arch/m68k/include/asm/atarihw.h
+++ b/arch/m68k/include/asm/atarihw.h
@@ -449,7 +449,7 @@ struct SCC
449 u_char char_dummy3; 449 u_char char_dummy3;
450 u_char cha_b_data; 450 u_char cha_b_data;
451 }; 451 };
452# define scc ((*(volatile struct SCC*)SCC_BAS)) 452# define atari_scc ((*(volatile struct SCC*)SCC_BAS))
453 453
454/* The ESCC (Z85230) in an Atari ST. The channels are reversed! */ 454/* The ESCC (Z85230) in an Atari ST. The channels are reversed! */
455# define st_escc ((*(volatile struct SCC*)0xfffffa31)) 455# define st_escc ((*(volatile struct SCC*)0xfffffa31))
diff --git a/arch/m68k/include/asm/string.h b/arch/m68k/include/asm/string.h
index 2936dda938d7..32198454da70 100644
--- a/arch/m68k/include/asm/string.h
+++ b/arch/m68k/include/asm/string.h
@@ -81,18 +81,6 @@ static inline char *strncpy(char *dest, const char *src, size_t n)
81 strcpy(__d + strlen(__d), (s)); \ 81 strcpy(__d + strlen(__d), (s)); \
82}) 82})
83 83
84#define __HAVE_ARCH_STRCHR
85static inline char *strchr(const char *s, int c)
86{
87 char sc, ch = c;
88
89 for (; (sc = *s++) != ch; ) {
90 if (!sc)
91 return NULL;
92 }
93 return (char *)s - 1;
94}
95
96#ifndef CONFIG_COLDFIRE 84#ifndef CONFIG_COLDFIRE
97#define __HAVE_ARCH_STRCMP 85#define __HAVE_ARCH_STRCMP
98static inline int strcmp(const char *cs, const char *ct) 86static inline int strcmp(const char *cs, const char *ct)
@@ -111,14 +99,12 @@ static inline int strcmp(const char *cs, const char *ct)
111 : "+a" (cs), "+a" (ct), "=d" (res)); 99 : "+a" (cs), "+a" (ct), "=d" (res));
112 return res; 100 return res;
113} 101}
102#endif /* CONFIG_COLDFIRE */
114 103
115#define __HAVE_ARCH_MEMMOVE 104#define __HAVE_ARCH_MEMMOVE
116extern void *memmove(void *, const void *, __kernel_size_t); 105extern void *memmove(void *, const void *, __kernel_size_t);
117 106
118#define __HAVE_ARCH_MEMCMP
119extern int memcmp(const void *, const void *, __kernel_size_t);
120#define memcmp(d, s, n) __builtin_memcmp(d, s, n) 107#define memcmp(d, s, n) __builtin_memcmp(d, s, n)
121#endif /* CONFIG_COLDFIRE */
122 108
123#define __HAVE_ARCH_MEMSET 109#define __HAVE_ARCH_MEMSET
124extern void *memset(void *, int, __kernel_size_t); 110extern void *memset(void *, int, __kernel_size_t);
diff --git a/arch/m68k/lib/string.c b/arch/m68k/lib/string.c
index 4253f870e54f..d399c5f25636 100644
--- a/arch/m68k/lib/string.c
+++ b/arch/m68k/lib/string.c
@@ -243,14 +243,3 @@ void *memmove(void *dest, const void *src, size_t n)
243 return xdest; 243 return xdest;
244} 244}
245EXPORT_SYMBOL(memmove); 245EXPORT_SYMBOL(memmove);
246
247int memcmp(const void *cs, const void *ct, size_t count)
248{
249 const unsigned char *su1, *su2;
250
251 for (su1 = cs, su2 = ct; count > 0; ++su1, ++su2, count--)
252 if (*su1 != *su2)
253 return *su1 < *su2 ? -1 : +1;
254 return 0;
255}
256EXPORT_SYMBOL(memcmp);
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index ef332136f96d..47e15ebfd893 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -141,6 +141,12 @@ SECTIONS {
141 *(__param) 141 *(__param)
142 __stop___param = .; 142 __stop___param = .;
143 143
144 /* Built-in module versions */
145 . = ALIGN(4) ;
146 __start___modver = .;
147 *(__modver)
148 __stop___modver = .;
149
144 . = ALIGN(4) ; 150 . = ALIGN(4) ;
145 _etext = . ; 151 _etext = . ;
146 } > TEXT 152 } > TEXT
diff --git a/arch/m68knommu/lib/Makefile b/arch/m68knommu/lib/Makefile
index d94d709665aa..32d852e586d7 100644
--- a/arch/m68knommu/lib/Makefile
+++ b/arch/m68knommu/lib/Makefile
@@ -4,4 +4,4 @@
4 4
5lib-y := ashldi3.o ashrdi3.o lshrdi3.o \ 5lib-y := ashldi3.o ashrdi3.o lshrdi3.o \
6 muldi3.o mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \ 6 muldi3.o mulsi3.o divsi3.o udivsi3.o modsi3.o umodsi3.o \
7 checksum.o memcpy.o memset.o delay.o 7 checksum.o memcpy.o memmove.o memset.o delay.o
diff --git a/arch/m68knommu/lib/memmove.c b/arch/m68knommu/lib/memmove.c
new file mode 100644
index 000000000000..b3dcfe9dab7e
--- /dev/null
+++ b/arch/m68knommu/lib/memmove.c
@@ -0,0 +1,105 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file COPYING in the main directory of this archive
4 * for more details.
5 */
6
7#define __IN_STRING_C
8
9#include <linux/module.h>
10#include <linux/string.h>
11
12void *memmove(void *dest, const void *src, size_t n)
13{
14 void *xdest = dest;
15 size_t temp;
16
17 if (!n)
18 return xdest;
19
20 if (dest < src) {
21 if ((long)dest & 1) {
22 char *cdest = dest;
23 const char *csrc = src;
24 *cdest++ = *csrc++;
25 dest = cdest;
26 src = csrc;
27 n--;
28 }
29 if (n > 2 && (long)dest & 2) {
30 short *sdest = dest;
31 const short *ssrc = src;
32 *sdest++ = *ssrc++;
33 dest = sdest;
34 src = ssrc;
35 n -= 2;
36 }
37 temp = n >> 2;
38 if (temp) {
39 long *ldest = dest;
40 const long *lsrc = src;
41 temp--;
42 do
43 *ldest++ = *lsrc++;
44 while (temp--);
45 dest = ldest;
46 src = lsrc;
47 }
48 if (n & 2) {
49 short *sdest = dest;
50 const short *ssrc = src;
51 *sdest++ = *ssrc++;
52 dest = sdest;
53 src = ssrc;
54 }
55 if (n & 1) {
56 char *cdest = dest;
57 const char *csrc = src;
58 *cdest = *csrc;
59 }
60 } else {
61 dest = (char *)dest + n;
62 src = (const char *)src + n;
63 if ((long)dest & 1) {
64 char *cdest = dest;
65 const char *csrc = src;
66 *--cdest = *--csrc;
67 dest = cdest;
68 src = csrc;
69 n--;
70 }
71 if (n > 2 && (long)dest & 2) {
72 short *sdest = dest;
73 const short *ssrc = src;
74 *--sdest = *--ssrc;
75 dest = sdest;
76 src = ssrc;
77 n -= 2;
78 }
79 temp = n >> 2;
80 if (temp) {
81 long *ldest = dest;
82 const long *lsrc = src;
83 temp--;
84 do
85 *--ldest = *--lsrc;
86 while (temp--);
87 dest = ldest;
88 src = lsrc;
89 }
90 if (n & 2) {
91 short *sdest = dest;
92 const short *ssrc = src;
93 *--sdest = *--ssrc;
94 dest = sdest;
95 src = ssrc;
96 }
97 if (n & 1) {
98 char *cdest = dest;
99 const char *csrc = src;
100 *--cdest = *--csrc;
101 }
102 }
103 return xdest;
104}
105EXPORT_SYMBOL(memmove);
diff --git a/arch/m68knommu/platform/5249/intc2.c b/arch/m68knommu/platform/5249/intc2.c
index d09d9da04537..c5151f846591 100644
--- a/arch/m68knommu/platform/5249/intc2.c
+++ b/arch/m68knommu/platform/5249/intc2.c
@@ -50,8 +50,10 @@ static int __init mcf_intc2_init(void)
50 int irq; 50 int irq;
51 51
52 /* GPIO interrupt sources */ 52 /* GPIO interrupt sources */
53 for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) 53 for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) {
54 irq_desc[irq].chip = &intc2_irq_gpio_chip; 54 irq_desc[irq].chip = &intc2_irq_gpio_chip;
55 set_irq_handler(irq, handle_edge_irq);
56 }
55 57
56 return 0; 58 return 0;
57} 59}
diff --git a/arch/m68knommu/platform/68328/entry.S b/arch/m68knommu/platform/68328/entry.S
index 240a7a6e25c8..676960cf022a 100644
--- a/arch/m68knommu/platform/68328/entry.S
+++ b/arch/m68knommu/platform/68328/entry.S
@@ -108,7 +108,6 @@ Luser_return:
108 movel %d1,%a2 108 movel %d1,%a2
1091: 1091:
110 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ 110 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
111 andl #_TIF_WORK_MASK,%d1
112 jne Lwork_to_do 111 jne Lwork_to_do
113 RESTORE_ALL 112 RESTORE_ALL
114 113
diff --git a/arch/m68knommu/platform/68360/commproc.c b/arch/m68knommu/platform/68360/commproc.c
index f27e688c404e..8e4e10cc0080 100644
--- a/arch/m68knommu/platform/68360/commproc.c
+++ b/arch/m68knommu/platform/68360/commproc.c
@@ -210,7 +210,7 @@ void
210cpm_install_handler(int vec, void (*handler)(), void *dev_id) 210cpm_install_handler(int vec, void (*handler)(), void *dev_id)
211{ 211{
212 212
213 request_irq(vec, handler, IRQ_FLG_LOCK, "timer", dev_id); 213 request_irq(vec, handler, 0, "timer", dev_id);
214 214
215/* if (cpm_vecs[vec].handler != 0) */ 215/* if (cpm_vecs[vec].handler != 0) */
216/* printk(KERN_INFO "CPM interrupt %x replacing %x\n", */ 216/* printk(KERN_INFO "CPM interrupt %x replacing %x\n", */
diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68knommu/platform/68360/config.c
index ac629fa30099..9dd5bca38749 100644
--- a/arch/m68knommu/platform/68360/config.c
+++ b/arch/m68knommu/platform/68360/config.c
@@ -75,7 +75,7 @@ void hw_timer_init(void)
75 /* Set compare register 32Khz / 32 / 10 = 100 */ 75 /* Set compare register 32Khz / 32 / 10 = 100 */
76 TCMP = 10; 76 TCMP = 10;
77 77
78 request_irq(IRQ_MACHSPEC | 1, timer_routine, IRQ_FLG_LOCK, "timer", NULL); 78 request_irq(IRQ_MACHSPEC | 1, timer_routine, 0, "timer", NULL);
79#endif 79#endif
80 80
81 /* General purpose quicc timers: MC68360UM p7-20 */ 81 /* General purpose quicc timers: MC68360UM p7-20 */
diff --git a/arch/m68knommu/platform/68360/entry.S b/arch/m68knommu/platform/68360/entry.S
index 8a28788c0eea..46c1b18c9dcb 100644
--- a/arch/m68knommu/platform/68360/entry.S
+++ b/arch/m68knommu/platform/68360/entry.S
@@ -104,7 +104,6 @@ Luser_return:
104 movel %d1,%a2 104 movel %d1,%a2
1051: 1051:
106 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ 106 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */
107 andl #_TIF_WORK_MASK,%d1
108 jne Lwork_to_do 107 jne Lwork_to_do
109 RESTORE_ALL 108 RESTORE_ALL
110 109
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c
index ad96ab1051f0..a29041c1a8a0 100644
--- a/arch/m68knommu/platform/68360/ints.c
+++ b/arch/m68knommu/platform/68360/ints.c
@@ -132,8 +132,8 @@ void init_IRQ(void)
132 pquicc->intr_cimr = 0x00000000; 132 pquicc->intr_cimr = 0x00000000;
133 133
134 for (i = 0; (i < NR_IRQS); i++) { 134 for (i = 0; (i < NR_IRQS); i++) {
135 set_irq_chip(irq, &intc_irq_chip); 135 set_irq_chip(i, &intc_irq_chip);
136 set_irq_handler(irq, handle_level_irq); 136 set_irq_handler(i, handle_level_irq);
137 } 137 }
138} 138}
139 139
diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S
index 4ddfc3da70d8..5837cf080b6d 100644
--- a/arch/m68knommu/platform/coldfire/entry.S
+++ b/arch/m68knommu/platform/coldfire/entry.S
@@ -138,7 +138,6 @@ Luser_return:
138 andl #-THREAD_SIZE,%d1 /* at base of kernel stack */ 138 andl #-THREAD_SIZE,%d1 /* at base of kernel stack */
139 movel %d1,%a0 139 movel %d1,%a0
140 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */ 140 movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */
141 andl #0xefff,%d1
142 jne Lwork_to_do /* still work to do */ 141 jne Lwork_to_do /* still work to do */
143 142
144Lreturn: 143Lreturn:
diff --git a/arch/microblaze/include/asm/irqflags.h b/arch/microblaze/include/asm/irqflags.h
index 5fd31905775d..c4532f032b3b 100644
--- a/arch/microblaze/include/asm/irqflags.h
+++ b/arch/microblaze/include/asm/irqflags.h
@@ -12,7 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <asm/registers.h> 13#include <asm/registers.h>
14 14
15#ifdef CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR 15#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
16 16
17static inline unsigned long arch_local_irq_save(void) 17static inline unsigned long arch_local_irq_save(void)
18{ 18{
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index b23f68075879..885574a73f01 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -411,20 +411,19 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
411static inline unsigned long pte_update(pte_t *p, unsigned long clr, 411static inline unsigned long pte_update(pte_t *p, unsigned long clr,
412 unsigned long set) 412 unsigned long set)
413{ 413{
414 unsigned long old, tmp, msr; 414 unsigned long flags, old, tmp;
415 415
416 __asm__ __volatile__("\ 416 raw_local_irq_save(flags);
417 msrclr %2, 0x2\n\ 417
418 nop\n\ 418 __asm__ __volatile__( "lw %0, %2, r0 \n"
419 lw %0, %4, r0\n\ 419 "andn %1, %0, %3 \n"
420 andn %1, %0, %5\n\ 420 "or %1, %1, %4 \n"
421 or %1, %1, %6\n\ 421 "sw %1, %2, r0 \n"
422 sw %1, %4, r0\n\ 422 : "=&r" (old), "=&r" (tmp)
423 mts rmsr, %2\n\ 423 : "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set)
424 nop" 424 : "cc");
425 : "=&r" (old), "=&r" (tmp), "=&r" (msr), "=m" (*p) 425
426 : "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set), "m" (*p) 426 raw_local_irq_restore(flags);
427 : "cc");
428 427
429 return old; 428 return old;
430} 429}
diff --git a/arch/microblaze/kernel/cpu/pvr.c b/arch/microblaze/kernel/cpu/pvr.c
index e01afa68273e..488c1ed24e38 100644
--- a/arch/microblaze/kernel/cpu/pvr.c
+++ b/arch/microblaze/kernel/cpu/pvr.c
@@ -27,7 +27,7 @@
27 register unsigned tmp __asm__("r3"); \ 27 register unsigned tmp __asm__("r3"); \
28 tmp = 0x0; /* Prevent warning about unused */ \ 28 tmp = 0x0; /* Prevent warning about unused */ \
29 __asm__ __volatile__ ( \ 29 __asm__ __volatile__ ( \
30 "mfs %0, rpvr" #pvrid ";" \ 30 "mfs %0, rpvr" #pvrid ";" \
31 : "=r" (tmp) : : "memory"); \ 31 : "=r" (tmp) : : "memory"); \
32 val = tmp; \ 32 val = tmp; \
33} 33}
@@ -54,7 +54,7 @@ int cpu_has_pvr(void)
54 if (!(flags & PVR_MSR_BIT)) 54 if (!(flags & PVR_MSR_BIT))
55 return 0; 55 return 0;
56 56
57 get_single_pvr(0x00, pvr0); 57 get_single_pvr(0, pvr0);
58 pr_debug("%s: pvr0 is 0x%08x\n", __func__, pvr0); 58 pr_debug("%s: pvr0 is 0x%08x\n", __func__, pvr0);
59 59
60 if (pvr0 & PVR0_PVR_FULL_MASK) 60 if (pvr0 & PVR0_PVR_FULL_MASK)
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 42434008209e..778a5ce2e4fc 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -62,23 +62,32 @@ real_start:
62 andi r1, r1, ~2 62 andi r1, r1, ~2
63 mts rmsr, r1 63 mts rmsr, r1
64/* 64/*
65 * Here is checking mechanism which check if Microblaze has msr instructions 65 * According to Xilinx, msrclr instruction behaves like 'mfs rX,rpc'
66 * We load msr and compare it with previous r1 value - if is the same, 66 * if the msrclr instruction is not enabled. We use this to detect
67 * msr instructions works if not - cpu don't have them. 67 * if the opcode is available, by issuing msrclr and then testing the result.
68 * r8 == 0 - msr instructions are implemented
69 * r8 != 0 - msr instructions are not implemented
68 */ 70 */
69 /* r8=0 - I have msr instr, 1 - I don't have them */ 71 msrclr r8, 0 /* clear nothing - just read msr for test */
70 rsubi r0, r0, 1 /* set the carry bit */ 72 cmpu r8, r8, r1 /* r1 must contain msr reg content */
71 msrclr r0, 0x4 /* try to clear it */
72 /* read the carry bit, r8 will be '0' if msrclr exists */
73 addik r8, r0, 0
74 73
75/* r7 may point to an FDT, or there may be one linked in. 74/* r7 may point to an FDT, or there may be one linked in.
76 if it's in r7, we've got to save it away ASAP. 75 if it's in r7, we've got to save it away ASAP.
77 We ensure r7 points to a valid FDT, just in case the bootloader 76 We ensure r7 points to a valid FDT, just in case the bootloader
78 is broken or non-existent */ 77 is broken or non-existent */
79 beqi r7, no_fdt_arg /* NULL pointer? don't copy */ 78 beqi r7, no_fdt_arg /* NULL pointer? don't copy */
80 lw r11, r0, r7 /* Does r7 point to a */ 79/* Does r7 point to a valid FDT? Load HEADER magic number */
81 rsubi r11, r11, OF_DT_HEADER /* valid FDT? */ 80 /* Run time Big/Little endian platform */
81 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
82 addik r11, r0, 0x1 /* BIG/LITTLE checking value */
83 /* __bss_start will be zeroed later - it is just temp location */
84 swi r11, r0, TOPHYS(__bss_start)
85 lbui r11, r0, TOPHYS(__bss_start)
86 beqid r11, big_endian /* DO NOT break delay stop dependency */
87 lw r11, r0, r7 /* Big endian load in delay slot */
88 lwr r11, r0, r7 /* Little endian load */
89big_endian:
90 rsubi r11, r11, OF_DT_HEADER /* Check FDT header */
82 beqi r11, _prepare_copy_fdt 91 beqi r11, _prepare_copy_fdt
83 or r7, r0, r0 /* clear R7 when not valid DTB */ 92 or r7, r0, r0 /* clear R7 when not valid DTB */
84 bnei r11, no_fdt_arg /* No - get out of here */ 93 bnei r11, no_fdt_arg /* No - get out of here */
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 25f6e07d8de8..782680de3121 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -147,10 +147,6 @@
147 #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL > 0 147 #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL > 0
148 #define BSRLI(rD, rA, imm) \ 148 #define BSRLI(rD, rA, imm) \
149 bsrli rD, rA, imm 149 bsrli rD, rA, imm
150 #elif CONFIG_XILINX_MICROBLAZE0_USE_DIV > 0
151 #define BSRLI(rD, rA, imm) \
152 ori rD, r0, (1 << imm); \
153 idivu rD, rD, rA
154 #else 150 #else
155 #define BSRLI(rD, rA, imm) BSRLI ## imm (rD, rA) 151 #define BSRLI(rD, rA, imm) BSRLI ## imm (rD, rA)
156 /* Only the used shift constants defined here - add more if needed */ 152 /* Only the used shift constants defined here - add more if needed */
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index bb1558e4b283..9312fbb37efd 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -161,11 +161,11 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
161#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR 161#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
162 if (msr) 162 if (msr)
163 eprintk("!!!Your kernel has setup MSR instruction but " 163 eprintk("!!!Your kernel has setup MSR instruction but "
164 "CPU don't have it %d\n", msr); 164 "CPU don't have it %x\n", msr);
165#else 165#else
166 if (!msr) 166 if (!msr)
167 eprintk("!!!Your kernel not setup MSR instruction but " 167 eprintk("!!!Your kernel not setup MSR instruction but "
168 "CPU have it %d\n", msr); 168 "CPU have it %x\n", msr);
169#endif 169#endif
170 170
171 for (src = __ivt_start; src < __ivt_end; src++, dst++) 171 for (src = __ivt_start; src < __ivt_end; src++, dst++)
diff --git a/arch/microblaze/lib/fastcopy.S b/arch/microblaze/lib/fastcopy.S
index fdc48bb065d8..62021d7e249e 100644
--- a/arch/microblaze/lib/fastcopy.S
+++ b/arch/microblaze/lib/fastcopy.S
@@ -29,6 +29,10 @@
29 * between mem locations with size of xfer spec'd in bytes 29 * between mem locations with size of xfer spec'd in bytes
30 */ 30 */
31 31
32#ifdef __MICROBLAZEEL__
33#error Microblaze LE not support ASM optimized lib func. Disable OPT_LIB_ASM.
34#endif
35
32#include <linux/linkage.h> 36#include <linux/linkage.h>
33 .text 37 .text
34 .globl memcpy 38 .globl memcpy
diff --git a/arch/parisc/kernel/pdc_cons.c b/arch/parisc/kernel/pdc_cons.c
index 11bdd68e5762..fc770be465ff 100644
--- a/arch/parisc/kernel/pdc_cons.c
+++ b/arch/parisc/kernel/pdc_cons.c
@@ -169,11 +169,11 @@ static int __init pdc_console_tty_driver_init(void)
169 169
170 struct console *tmp; 170 struct console *tmp;
171 171
172 acquire_console_sem(); 172 console_lock();
173 for_each_console(tmp) 173 for_each_console(tmp)
174 if (tmp == &pdc_cons) 174 if (tmp == &pdc_cons)
175 break; 175 break;
176 release_console_sem(); 176 console_unlock();
177 177
178 if (!tmp) { 178 if (!tmp) {
179 printk(KERN_INFO "PDC console driver not registered anymore, not creating %s\n", pdc_cons.name); 179 printk(KERN_INFO "PDC console driver not registered anymore, not creating %s\n", pdc_cons.name);
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 8eaed81ea642..17194fcd4040 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,8 +40,8 @@
40 40
41/* MAS registers bit definitions */ 41/* MAS registers bit definitions */
42 42
43#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) 43#define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000)
44#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) 44#define MAS0_ESEL(x) (((x) << 16) & 0x0FFF0000)
45#define MAS0_NV(x) ((x) & 0x00000FFF) 45#define MAS0_NV(x) ((x) & 0x00000FFF)
46#define MAS0_HES 0x00004000 46#define MAS0_HES 0x00004000
47#define MAS0_WQ_ALLWAYS 0x00000000 47#define MAS0_WQ_ALLWAYS 0x00000000
@@ -50,12 +50,12 @@
50 50
51#define MAS1_VALID 0x80000000 51#define MAS1_VALID 0x80000000
52#define MAS1_IPROT 0x40000000 52#define MAS1_IPROT 0x40000000
53#define MAS1_TID(x) ((x << 16) & 0x3FFF0000) 53#define MAS1_TID(x) (((x) << 16) & 0x3FFF0000)
54#define MAS1_IND 0x00002000 54#define MAS1_IND 0x00002000
55#define MAS1_TS 0x00001000 55#define MAS1_TS 0x00001000
56#define MAS1_TSIZE_MASK 0x00000f80 56#define MAS1_TSIZE_MASK 0x00000f80
57#define MAS1_TSIZE_SHIFT 7 57#define MAS1_TSIZE_SHIFT 7
58#define MAS1_TSIZE(x) ((x << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK) 58#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
59 59
60#define MAS2_EPN 0xFFFFF000 60#define MAS2_EPN 0xFFFFF000
61#define MAS2_X0 0x00000040 61#define MAS2_X0 0x00000040
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 53b64be40eb2..da4b20008541 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -101,7 +101,7 @@ extern phys_addr_t kernstart_addr;
101 101
102#ifdef CONFIG_FLATMEM 102#ifdef CONFIG_FLATMEM
103#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT) 103#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT)
104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < (ARCH_PFN_OFFSET + max_mapnr)) 104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
105#endif 105#endif
106 106
107#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) 107#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 55cba4a8a959..f8cd9fba4d35 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -18,7 +18,7 @@
18#include <asm/mmu.h> 18#include <asm/mmu.h>
19 19
20_GLOBAL(__setup_cpu_603) 20_GLOBAL(__setup_cpu_603)
21 mflr r4 21 mflr r5
22BEGIN_MMU_FTR_SECTION 22BEGIN_MMU_FTR_SECTION
23 li r10,0 23 li r10,0
24 mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */ 24 mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */
@@ -27,60 +27,60 @@ BEGIN_FTR_SECTION
27 bl __init_fpu_registers 27 bl __init_fpu_registers
28END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) 28END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
29 bl setup_common_caches 29 bl setup_common_caches
30 mtlr r4 30 mtlr r5
31 blr 31 blr
32_GLOBAL(__setup_cpu_604) 32_GLOBAL(__setup_cpu_604)
33 mflr r4 33 mflr r5
34 bl setup_common_caches 34 bl setup_common_caches
35 bl setup_604_hid0 35 bl setup_604_hid0
36 mtlr r4 36 mtlr r5
37 blr 37 blr
38_GLOBAL(__setup_cpu_750) 38_GLOBAL(__setup_cpu_750)
39 mflr r4 39 mflr r5
40 bl __init_fpu_registers 40 bl __init_fpu_registers
41 bl setup_common_caches 41 bl setup_common_caches
42 bl setup_750_7400_hid0 42 bl setup_750_7400_hid0
43 mtlr r4 43 mtlr r5
44 blr 44 blr
45_GLOBAL(__setup_cpu_750cx) 45_GLOBAL(__setup_cpu_750cx)
46 mflr r4 46 mflr r5
47 bl __init_fpu_registers 47 bl __init_fpu_registers
48 bl setup_common_caches 48 bl setup_common_caches
49 bl setup_750_7400_hid0 49 bl setup_750_7400_hid0
50 bl setup_750cx 50 bl setup_750cx
51 mtlr r4 51 mtlr r5
52 blr 52 blr
53_GLOBAL(__setup_cpu_750fx) 53_GLOBAL(__setup_cpu_750fx)
54 mflr r4 54 mflr r5
55 bl __init_fpu_registers 55 bl __init_fpu_registers
56 bl setup_common_caches 56 bl setup_common_caches
57 bl setup_750_7400_hid0 57 bl setup_750_7400_hid0
58 bl setup_750fx 58 bl setup_750fx
59 mtlr r4 59 mtlr r5
60 blr 60 blr
61_GLOBAL(__setup_cpu_7400) 61_GLOBAL(__setup_cpu_7400)
62 mflr r4 62 mflr r5
63 bl __init_fpu_registers 63 bl __init_fpu_registers
64 bl setup_7400_workarounds 64 bl setup_7400_workarounds
65 bl setup_common_caches 65 bl setup_common_caches
66 bl setup_750_7400_hid0 66 bl setup_750_7400_hid0
67 mtlr r4 67 mtlr r5
68 blr 68 blr
69_GLOBAL(__setup_cpu_7410) 69_GLOBAL(__setup_cpu_7410)
70 mflr r4 70 mflr r5
71 bl __init_fpu_registers 71 bl __init_fpu_registers
72 bl setup_7410_workarounds 72 bl setup_7410_workarounds
73 bl setup_common_caches 73 bl setup_common_caches
74 bl setup_750_7400_hid0 74 bl setup_750_7400_hid0
75 li r3,0 75 li r3,0
76 mtspr SPRN_L2CR2,r3 76 mtspr SPRN_L2CR2,r3
77 mtlr r4 77 mtlr r5
78 blr 78 blr
79_GLOBAL(__setup_cpu_745x) 79_GLOBAL(__setup_cpu_745x)
80 mflr r4 80 mflr r5
81 bl setup_common_caches 81 bl setup_common_caches
82 bl setup_745x_specifics 82 bl setup_745x_specifics
83 mtlr r4 83 mtlr r5
84 blr 84 blr
85 85
86/* Enable caches for 603's, 604, 750 & 7400 */ 86/* Enable caches for 603's, 604, 750 & 7400 */
@@ -194,10 +194,10 @@ setup_750cx:
194 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq 194 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
195 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq 195 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
196 bnelr 196 bnelr
197 lwz r6,CPU_SPEC_FEATURES(r5) 197 lwz r6,CPU_SPEC_FEATURES(r4)
198 li r7,CPU_FTR_CAN_NAP 198 li r7,CPU_FTR_CAN_NAP
199 andc r6,r6,r7 199 andc r6,r6,r7
200 stw r6,CPU_SPEC_FEATURES(r5) 200 stw r6,CPU_SPEC_FEATURES(r4)
201 blr 201 blr
202 202
203/* 750fx specific 203/* 750fx specific
@@ -225,12 +225,12 @@ BEGIN_FTR_SECTION
225 andis. r11,r11,L3CR_L3E@h 225 andis. r11,r11,L3CR_L3E@h
226 beq 1f 226 beq 1f
227END_FTR_SECTION_IFSET(CPU_FTR_L3CR) 227END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
228 lwz r6,CPU_SPEC_FEATURES(r5) 228 lwz r6,CPU_SPEC_FEATURES(r4)
229 andi. r0,r6,CPU_FTR_L3_DISABLE_NAP 229 andi. r0,r6,CPU_FTR_L3_DISABLE_NAP
230 beq 1f 230 beq 1f
231 li r7,CPU_FTR_CAN_NAP 231 li r7,CPU_FTR_CAN_NAP
232 andc r6,r6,r7 232 andc r6,r6,r7
233 stw r6,CPU_SPEC_FEATURES(r5) 233 stw r6,CPU_SPEC_FEATURES(r4)
2341: 2341:
235 mfspr r11,SPRN_HID0 235 mfspr r11,SPRN_HID0
236 236
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 8d74a24c5502..e8e915ce3d8d 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -2076,8 +2076,8 @@ static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
2076 * pointer on ppc64 and booke as we are running at 0 in real mode 2076 * pointer on ppc64 and booke as we are running at 0 in real mode
2077 * on ppc64 and reloc_offset is always 0 on booke. 2077 * on ppc64 and reloc_offset is always 0 on booke.
2078 */ 2078 */
2079 if (s->cpu_setup) { 2079 if (t->cpu_setup) {
2080 s->cpu_setup(offset, s); 2080 t->cpu_setup(offset, t);
2081 } 2081 }
2082#endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2082#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2083} 2083}
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index bf5cb91f07de..fd4812329570 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -186,7 +186,7 @@ static void unmap_cpu_from_node(unsigned long cpu)
186 dbg("removing cpu %lu from node %d\n", cpu, node); 186 dbg("removing cpu %lu from node %d\n", cpu, node);
187 187
188 if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) { 188 if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) {
189 cpumask_set_cpu(cpu, node_to_cpumask_map[node]); 189 cpumask_clear_cpu(cpu, node_to_cpumask_map[node]);
190 } else { 190 } else {
191 printk(KERN_ERR "WARNING: cpu %lu not found in node %d\n", 191 printk(KERN_ERR "WARNING: cpu %lu not found in node %d\n",
192 cpu, node); 192 cpu, node);
@@ -1289,10 +1289,9 @@ u64 memory_hotplug_max(void)
1289} 1289}
1290#endif /* CONFIG_MEMORY_HOTPLUG */ 1290#endif /* CONFIG_MEMORY_HOTPLUG */
1291 1291
1292/* Vrtual Processor Home Node (VPHN) support */ 1292/* Virtual Processor Home Node (VPHN) support */
1293#ifdef CONFIG_PPC_SPLPAR 1293#ifdef CONFIG_PPC_SPLPAR
1294#define VPHN_NR_CHANGE_CTRS (8) 1294static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
1295static u8 vphn_cpu_change_counts[NR_CPUS][VPHN_NR_CHANGE_CTRS];
1296static cpumask_t cpu_associativity_changes_mask; 1295static cpumask_t cpu_associativity_changes_mask;
1297static int vphn_enabled; 1296static int vphn_enabled;
1298static void set_topology_timer(void); 1297static void set_topology_timer(void);
@@ -1303,16 +1302,18 @@ static void set_topology_timer(void);
1303 */ 1302 */
1304static void setup_cpu_associativity_change_counters(void) 1303static void setup_cpu_associativity_change_counters(void)
1305{ 1304{
1306 int cpu = 0; 1305 int cpu;
1306
1307 /* The VPHN feature supports a maximum of 8 reference points */
1308 BUILD_BUG_ON(MAX_DISTANCE_REF_POINTS > 8);
1307 1309
1308 for_each_possible_cpu(cpu) { 1310 for_each_possible_cpu(cpu) {
1309 int i = 0; 1311 int i;
1310 u8 *counts = vphn_cpu_change_counts[cpu]; 1312 u8 *counts = vphn_cpu_change_counts[cpu];
1311 volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts; 1313 volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
1312 1314
1313 for (i = 0; i < VPHN_NR_CHANGE_CTRS; i++) { 1315 for (i = 0; i < distance_ref_points_depth; i++)
1314 counts[i] = hypervisor_counts[i]; 1316 counts[i] = hypervisor_counts[i];
1315 }
1316 } 1317 }
1317} 1318}
1318 1319
@@ -1329,7 +1330,7 @@ static void setup_cpu_associativity_change_counters(void)
1329 */ 1330 */
1330static int update_cpu_associativity_changes_mask(void) 1331static int update_cpu_associativity_changes_mask(void)
1331{ 1332{
1332 int cpu = 0, nr_cpus = 0; 1333 int cpu, nr_cpus = 0;
1333 cpumask_t *changes = &cpu_associativity_changes_mask; 1334 cpumask_t *changes = &cpu_associativity_changes_mask;
1334 1335
1335 cpumask_clear(changes); 1336 cpumask_clear(changes);
@@ -1339,8 +1340,8 @@ static int update_cpu_associativity_changes_mask(void)
1339 u8 *counts = vphn_cpu_change_counts[cpu]; 1340 u8 *counts = vphn_cpu_change_counts[cpu];
1340 volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts; 1341 volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
1341 1342
1342 for (i = 0; i < VPHN_NR_CHANGE_CTRS; i++) { 1343 for (i = 0; i < distance_ref_points_depth; i++) {
1343 if (hypervisor_counts[i] > counts[i]) { 1344 if (hypervisor_counts[i] != counts[i]) {
1344 counts[i] = hypervisor_counts[i]; 1345 counts[i] = hypervisor_counts[i];
1345 changed = 1; 1346 changed = 1;
1346 } 1347 }
@@ -1354,8 +1355,11 @@ static int update_cpu_associativity_changes_mask(void)
1354 return nr_cpus; 1355 return nr_cpus;
1355} 1356}
1356 1357
1357/* 6 64-bit registers unpacked into 12 32-bit associativity values */ 1358/*
1358#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32)) 1359 * 6 64-bit registers unpacked into 12 32-bit associativity values. To form
1360 * the complete property we have to add the length in the first cell.
1361 */
1362#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32) + 1)
1359 1363
1360/* 1364/*
1361 * Convert the associativity domain numbers returned from the hypervisor 1365 * Convert the associativity domain numbers returned from the hypervisor
@@ -1363,15 +1367,14 @@ static int update_cpu_associativity_changes_mask(void)
1363 */ 1367 */
1364static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked) 1368static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
1365{ 1369{
1366 int i = 0; 1370 int i, nr_assoc_doms = 0;
1367 int nr_assoc_doms = 0;
1368 const u16 *field = (const u16*) packed; 1371 const u16 *field = (const u16*) packed;
1369 1372
1370#define VPHN_FIELD_UNUSED (0xffff) 1373#define VPHN_FIELD_UNUSED (0xffff)
1371#define VPHN_FIELD_MSB (0x8000) 1374#define VPHN_FIELD_MSB (0x8000)
1372#define VPHN_FIELD_MASK (~VPHN_FIELD_MSB) 1375#define VPHN_FIELD_MASK (~VPHN_FIELD_MSB)
1373 1376
1374 for (i = 0; i < VPHN_ASSOC_BUFSIZE; i++) { 1377 for (i = 1; i < VPHN_ASSOC_BUFSIZE; i++) {
1375 if (*field == VPHN_FIELD_UNUSED) { 1378 if (*field == VPHN_FIELD_UNUSED) {
1376 /* All significant fields processed, and remaining 1379 /* All significant fields processed, and remaining
1377 * fields contain the reserved value of all 1's. 1380 * fields contain the reserved value of all 1's.
@@ -1379,14 +1382,12 @@ static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
1379 */ 1382 */
1380 unpacked[i] = *((u32*)field); 1383 unpacked[i] = *((u32*)field);
1381 field += 2; 1384 field += 2;
1382 } 1385 } else if (*field & VPHN_FIELD_MSB) {
1383 else if (*field & VPHN_FIELD_MSB) {
1384 /* Data is in the lower 15 bits of this field */ 1386 /* Data is in the lower 15 bits of this field */
1385 unpacked[i] = *field & VPHN_FIELD_MASK; 1387 unpacked[i] = *field & VPHN_FIELD_MASK;
1386 field++; 1388 field++;
1387 nr_assoc_doms++; 1389 nr_assoc_doms++;
1388 } 1390 } else {
1389 else {
1390 /* Data is in the lower 15 bits of this field 1391 /* Data is in the lower 15 bits of this field
1391 * concatenated with the next 16 bit field 1392 * concatenated with the next 16 bit field
1392 */ 1393 */
@@ -1396,6 +1397,9 @@ static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
1396 } 1397 }
1397 } 1398 }
1398 1399
1400 /* The first cell contains the length of the property */
1401 unpacked[0] = nr_assoc_doms;
1402
1399 return nr_assoc_doms; 1403 return nr_assoc_doms;
1400} 1404}
1401 1405
@@ -1405,7 +1409,7 @@ static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
1405 */ 1409 */
1406static long hcall_vphn(unsigned long cpu, unsigned int *associativity) 1410static long hcall_vphn(unsigned long cpu, unsigned int *associativity)
1407{ 1411{
1408 long rc = 0; 1412 long rc;
1409 long retbuf[PLPAR_HCALL9_BUFSIZE] = {0}; 1413 long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
1410 u64 flags = 1; 1414 u64 flags = 1;
1411 int hwcpu = get_hard_smp_processor_id(cpu); 1415 int hwcpu = get_hard_smp_processor_id(cpu);
@@ -1419,7 +1423,7 @@ static long hcall_vphn(unsigned long cpu, unsigned int *associativity)
1419static long vphn_get_associativity(unsigned long cpu, 1423static long vphn_get_associativity(unsigned long cpu,
1420 unsigned int *associativity) 1424 unsigned int *associativity)
1421{ 1425{
1422 long rc = 0; 1426 long rc;
1423 1427
1424 rc = hcall_vphn(cpu, associativity); 1428 rc = hcall_vphn(cpu, associativity);
1425 1429
@@ -1445,9 +1449,9 @@ static long vphn_get_associativity(unsigned long cpu,
1445 */ 1449 */
1446int arch_update_cpu_topology(void) 1450int arch_update_cpu_topology(void)
1447{ 1451{
1448 int cpu = 0, nid = 0, old_nid = 0; 1452 int cpu, nid, old_nid;
1449 unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0}; 1453 unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
1450 struct sys_device *sysdev = NULL; 1454 struct sys_device *sysdev;
1451 1455
1452 for_each_cpu_mask(cpu, cpu_associativity_changes_mask) { 1456 for_each_cpu_mask(cpu, cpu_associativity_changes_mask) {
1453 vphn_get_associativity(cpu, associativity); 1457 vphn_get_associativity(cpu, associativity);
@@ -1512,7 +1516,8 @@ int start_topology_update(void)
1512{ 1516{
1513 int rc = 0; 1517 int rc = 0;
1514 1518
1515 if (firmware_has_feature(FW_FEATURE_VPHN)) { 1519 if (firmware_has_feature(FW_FEATURE_VPHN) &&
1520 get_lppaca()->shared_proc) {
1516 vphn_enabled = 1; 1521 vphn_enabled = 1;
1517 setup_cpu_associativity_change_counters(); 1522 setup_cpu_associativity_change_counters();
1518 init_timer_deferrable(&topology_timer); 1523 init_timer_deferrable(&topology_timer);
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 5d3ea9f60dd7..ca5d5898d320 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -713,6 +713,13 @@ EXPORT_SYMBOL(arch_free_page);
713/* NB: reg/unreg are called while guarded with the tracepoints_mutex */ 713/* NB: reg/unreg are called while guarded with the tracepoints_mutex */
714extern long hcall_tracepoint_refcount; 714extern long hcall_tracepoint_refcount;
715 715
716/*
717 * Since the tracing code might execute hcalls we need to guard against
718 * recursion. One example of this are spinlocks calling H_YIELD on
719 * shared processor partitions.
720 */
721static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
722
716void hcall_tracepoint_regfunc(void) 723void hcall_tracepoint_regfunc(void)
717{ 724{
718 hcall_tracepoint_refcount++; 725 hcall_tracepoint_refcount++;
@@ -725,12 +732,42 @@ void hcall_tracepoint_unregfunc(void)
725 732
726void __trace_hcall_entry(unsigned long opcode, unsigned long *args) 733void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
727{ 734{
735 unsigned long flags;
736 unsigned int *depth;
737
738 local_irq_save(flags);
739
740 depth = &__get_cpu_var(hcall_trace_depth);
741
742 if (*depth)
743 goto out;
744
745 (*depth)++;
728 trace_hcall_entry(opcode, args); 746 trace_hcall_entry(opcode, args);
747 (*depth)--;
748
749out:
750 local_irq_restore(flags);
729} 751}
730 752
731void __trace_hcall_exit(long opcode, unsigned long retval, 753void __trace_hcall_exit(long opcode, unsigned long retval,
732 unsigned long *retbuf) 754 unsigned long *retbuf)
733{ 755{
756 unsigned long flags;
757 unsigned int *depth;
758
759 local_irq_save(flags);
760
761 depth = &__get_cpu_var(hcall_trace_depth);
762
763 if (*depth)
764 goto out;
765
766 (*depth)++;
734 trace_hcall_exit(opcode, retval, retbuf); 767 trace_hcall_exit(opcode, retval, retbuf);
768 (*depth)--;
769
770out:
771 local_irq_restore(flags);
735} 772}
736#endif 773#endif
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index ff19efdf6fef..636bcb81d068 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -406,7 +406,7 @@ config QDIO
406 If unsure, say Y. 406 If unsure, say Y.
407 407
408config CHSC_SCH 408config CHSC_SCH
409 def_tristate y 409 def_tristate m
410 prompt "Support for CHSC subchannels" 410 prompt "Support for CHSC subchannels"
411 help 411 help
412 This driver allows usage of CHSC subchannels. A CHSC subchannel 412 This driver allows usage of CHSC subchannels. A CHSC subchannel
diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c
index f42dbabc0d30..48884f89ab92 100644
--- a/arch/s390/crypto/sha_common.c
+++ b/arch/s390/crypto/sha_common.c
@@ -38,6 +38,7 @@ int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len)
38 BUG_ON(ret != bsize); 38 BUG_ON(ret != bsize);
39 data += bsize - index; 39 data += bsize - index;
40 len -= bsize - index; 40 len -= bsize - index;
41 index = 0;
41 } 42 }
42 43
43 /* process as many blocks as possible */ 44 /* process as many blocks as possible */
diff --git a/arch/s390/include/asm/cacheflush.h b/arch/s390/include/asm/cacheflush.h
index 405cc97c6249..7e1f77620624 100644
--- a/arch/s390/include/asm/cacheflush.h
+++ b/arch/s390/include/asm/cacheflush.h
@@ -1,29 +1,8 @@
1#ifndef _S390_CACHEFLUSH_H 1#ifndef _S390_CACHEFLUSH_H
2#define _S390_CACHEFLUSH_H 2#define _S390_CACHEFLUSH_H
3 3
4/* Keep includes the same across arches. */
5#include <linux/mm.h>
6
7/* Caches aren't brain-dead on the s390. */ 4/* Caches aren't brain-dead on the s390. */
8#define flush_cache_all() do { } while (0) 5#include <asm-generic/cacheflush.h>
9#define flush_cache_mm(mm) do { } while (0)
10#define flush_cache_dup_mm(mm) do { } while (0)
11#define flush_cache_range(vma, start, end) do { } while (0)
12#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
13#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
14#define flush_dcache_page(page) do { } while (0)
15#define flush_dcache_mmap_lock(mapping) do { } while (0)
16#define flush_dcache_mmap_unlock(mapping) do { } while (0)
17#define flush_icache_range(start, end) do { } while (0)
18#define flush_icache_page(vma,pg) do { } while (0)
19#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
20#define flush_cache_vmap(start, end) do { } while (0)
21#define flush_cache_vunmap(start, end) do { } while (0)
22
23#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
24 memcpy(dst, src, len)
25#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
26 memcpy(dst, src, len)
27 6
28#ifdef CONFIG_DEBUG_PAGEALLOC 7#ifdef CONFIG_DEBUG_PAGEALLOC
29void kernel_map_pages(struct page *page, int numpages, int enable); 8void kernel_map_pages(struct page *page, int numpages, int enable);
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index bf3de04170a7..2c79b6416271 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -148,11 +148,6 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
148 */ 148 */
149extern unsigned long thread_saved_pc(struct task_struct *t); 149extern unsigned long thread_saved_pc(struct task_struct *t);
150 150
151/*
152 * Print register of task into buffer. Used in fs/proc/array.c.
153 */
154extern void task_show_regs(struct seq_file *m, struct task_struct *task);
155
156extern void show_code(struct pt_regs *regs); 151extern void show_code(struct pt_regs *regs);
157 152
158unsigned long get_wchan(struct task_struct *p); 153unsigned long get_wchan(struct task_struct *p);
diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h
index f1f644f2240a..9074a54c4d10 100644
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -22,6 +22,7 @@
22 */ 22 */
23 23
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/pagemap.h>
25#include <linux/swap.h> 26#include <linux/swap.h>
26#include <asm/processor.h> 27#include <asm/processor.h>
27#include <asm/pgalloc.h> 28#include <asm/pgalloc.h>
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 5eb78dd584ce..b5a4a739b477 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -237,43 +237,6 @@ void show_regs(struct pt_regs *regs)
237 show_last_breaking_event(regs); 237 show_last_breaking_event(regs);
238} 238}
239 239
240/* This is called from fs/proc/array.c */
241void task_show_regs(struct seq_file *m, struct task_struct *task)
242{
243 struct pt_regs *regs;
244
245 regs = task_pt_regs(task);
246 seq_printf(m, "task: %p, ksp: %p\n",
247 task, (void *)task->thread.ksp);
248 seq_printf(m, "User PSW : %p %p\n",
249 (void *) regs->psw.mask, (void *)regs->psw.addr);
250
251 seq_printf(m, "User GPRS: " FOURLONG,
252 regs->gprs[0], regs->gprs[1],
253 regs->gprs[2], regs->gprs[3]);
254 seq_printf(m, " " FOURLONG,
255 regs->gprs[4], regs->gprs[5],
256 regs->gprs[6], regs->gprs[7]);
257 seq_printf(m, " " FOURLONG,
258 regs->gprs[8], regs->gprs[9],
259 regs->gprs[10], regs->gprs[11]);
260 seq_printf(m, " " FOURLONG,
261 regs->gprs[12], regs->gprs[13],
262 regs->gprs[14], regs->gprs[15]);
263 seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
264 task->thread.acrs[0], task->thread.acrs[1],
265 task->thread.acrs[2], task->thread.acrs[3]);
266 seq_printf(m, " %08x %08x %08x %08x\n",
267 task->thread.acrs[4], task->thread.acrs[5],
268 task->thread.acrs[6], task->thread.acrs[7]);
269 seq_printf(m, " %08x %08x %08x %08x\n",
270 task->thread.acrs[8], task->thread.acrs[9],
271 task->thread.acrs[10], task->thread.acrs[11]);
272 seq_printf(m, " %08x %08x %08x %08x\n",
273 task->thread.acrs[12], task->thread.acrs[13],
274 task->thread.acrs[14], task->thread.acrs[15]);
275}
276
277static DEFINE_SPINLOCK(die_lock); 240static DEFINE_SPINLOCK(die_lock);
278 241
279void die(const char * str, struct pt_regs * regs, long err) 242void die(const char * str, struct pt_regs * regs, long err)
diff --git a/arch/s390/lib/uaccess_std.c b/arch/s390/lib/uaccess_std.c
index 07deaeee14c8..a6c4f7ed24a4 100644
--- a/arch/s390/lib/uaccess_std.c
+++ b/arch/s390/lib/uaccess_std.c
@@ -125,9 +125,9 @@ static size_t copy_in_user_std(size_t size, void __user *to,
125 unsigned long tmp1; 125 unsigned long tmp1;
126 126
127 asm volatile( 127 asm volatile(
128 " sacf 256\n"
128 " "AHI" %0,-1\n" 129 " "AHI" %0,-1\n"
129 " jo 5f\n" 130 " jo 5f\n"
130 " sacf 256\n"
131 " bras %3,3f\n" 131 " bras %3,3f\n"
132 "0:"AHI" %0,257\n" 132 "0:"AHI" %0,257\n"
133 "1: mvc 0(1,%1),0(%2)\n" 133 "1: mvc 0(1,%1),0(%2)\n"
@@ -142,9 +142,8 @@ static size_t copy_in_user_std(size_t size, void __user *to,
142 "3:"AHI" %0,-256\n" 142 "3:"AHI" %0,-256\n"
143 " jnm 2b\n" 143 " jnm 2b\n"
144 "4: ex %0,1b-0b(%3)\n" 144 "4: ex %0,1b-0b(%3)\n"
145 " sacf 0\n"
146 "5: "SLR" %0,%0\n" 145 "5: "SLR" %0,%0\n"
147 "6:\n" 146 "6: sacf 0\n"
148 EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b) 147 EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b)
149 : "+a" (size), "+a" (to), "+a" (from), "=a" (tmp1) 148 : "+a" (size), "+a" (to), "+a" (from), "=a" (tmp1)
150 : : "cc", "memory"); 149 : : "cc", "memory");
@@ -156,9 +155,9 @@ static size_t clear_user_std(size_t size, void __user *to)
156 unsigned long tmp1, tmp2; 155 unsigned long tmp1, tmp2;
157 156
158 asm volatile( 157 asm volatile(
158 " sacf 256\n"
159 " "AHI" %0,-1\n" 159 " "AHI" %0,-1\n"
160 " jo 5f\n" 160 " jo 5f\n"
161 " sacf 256\n"
162 " bras %3,3f\n" 161 " bras %3,3f\n"
163 " xc 0(1,%1),0(%1)\n" 162 " xc 0(1,%1),0(%1)\n"
164 "0:"AHI" %0,257\n" 163 "0:"AHI" %0,257\n"
@@ -178,9 +177,8 @@ static size_t clear_user_std(size_t size, void __user *to)
178 "3:"AHI" %0,-256\n" 177 "3:"AHI" %0,-256\n"
179 " jnm 2b\n" 178 " jnm 2b\n"
180 "4: ex %0,0(%3)\n" 179 "4: ex %0,0(%3)\n"
181 " sacf 0\n"
182 "5: "SLR" %0,%0\n" 180 "5: "SLR" %0,%0\n"
183 "6:\n" 181 "6: sacf 0\n"
184 EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b) 182 EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b)
185 : "+a" (size), "+a" (to), "=a" (tmp1), "=a" (tmp2) 183 : "+a" (size), "+a" (to), "=a" (tmp1), "=a" (tmp2)
186 : : "cc", "memory"); 184 : : "cc", "memory");
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 0c719c61972e..e1850c28cd68 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -336,7 +336,8 @@ void page_table_free(struct mm_struct *mm, unsigned long *table)
336 page->flags ^= bits; 336 page->flags ^= bits;
337 if (page->flags & FRAG_MASK) { 337 if (page->flags & FRAG_MASK) {
338 /* Page now has some free pgtable fragments. */ 338 /* Page now has some free pgtable fragments. */
339 list_move(&page->lru, &mm->context.pgtable_list); 339 if (!list_empty(&page->lru))
340 list_move(&page->lru, &mm->context.pgtable_list);
340 page = NULL; 341 page = NULL;
341 } else 342 } else
342 /* All fragments of the 4K page have been freed. */ 343 /* All fragments of the 4K page have been freed. */
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index ae555569823b..8a9011dced14 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -15,6 +15,7 @@ config SUPERH
15 select HAVE_KERNEL_GZIP 15 select HAVE_KERNEL_GZIP
16 select HAVE_KERNEL_BZIP2 16 select HAVE_KERNEL_BZIP2
17 select HAVE_KERNEL_LZMA 17 select HAVE_KERNEL_LZMA
18 select HAVE_KERNEL_XZ
18 select HAVE_KERNEL_LZO 19 select HAVE_KERNEL_LZO
19 select HAVE_SYSCALL_TRACEPOINTS 20 select HAVE_SYSCALL_TRACEPOINTS
20 select HAVE_REGS_AND_STACK_ACCESS_API 21 select HAVE_REGS_AND_STACK_ACCESS_API
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 9c8c6e1a2a15..e3d8170ad00b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -200,7 +200,7 @@ endif
200libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) 200libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
201libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) 201libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
202 202
203BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.lzo \ 203BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.xz uImage.lzo \
204 uImage.srec uImage.bin zImage vmlinux.bin vmlinux.srec \ 204 uImage.srec uImage.bin zImage vmlinux.bin vmlinux.srec \
205 romImage 205 romImage
206PHONY += $(BOOT_TARGETS) 206PHONY += $(BOOT_TARGETS)
@@ -230,5 +230,6 @@ define archhelp
230 @echo '* uImage.gz - Kernel-only image for U-Boot (gzip)' 230 @echo '* uImage.gz - Kernel-only image for U-Boot (gzip)'
231 @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)' 231 @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)'
232 @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)' 232 @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)'
233 @echo ' uImage.xz - Kernel-only image for U-Boot (xz)'
233 @echo ' uImage.lzo - Kernel-only image for U-Boot (lzo)' 234 @echo ' uImage.lzo - Kernel-only image for U-Boot (lzo)'
234endef 235endef
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 33b662999fc6..701667acfd89 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -1294,6 +1294,7 @@ static int __init arch_setup(void)
1294 i2c_register_board_info(1, i2c1_devices, 1294 i2c_register_board_info(1, i2c1_devices,
1295 ARRAY_SIZE(i2c1_devices)); 1295 ARRAY_SIZE(i2c1_devices));
1296 1296
1297#if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
1297 /* VOU */ 1298 /* VOU */
1298 gpio_request(GPIO_FN_DV_D15, NULL); 1299 gpio_request(GPIO_FN_DV_D15, NULL);
1299 gpio_request(GPIO_FN_DV_D14, NULL); 1300 gpio_request(GPIO_FN_DV_D14, NULL);
@@ -1325,6 +1326,7 @@ static int __init arch_setup(void)
1325 1326
1326 /* Remove reset */ 1327 /* Remove reset */
1327 gpio_set_value(GPIO_PTG4, 1); 1328 gpio_set_value(GPIO_PTG4, 1);
1329#endif
1328 1330
1329 return platform_add_devices(ecovec_devices, 1331 return platform_add_devices(ecovec_devices,
1330 ARRAY_SIZE(ecovec_devices)); 1332 ARRAY_SIZE(ecovec_devices));
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index 1ce63624c9b9..ba515d800245 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -24,12 +24,13 @@ suffix-y := bin
24suffix-$(CONFIG_KERNEL_GZIP) := gz 24suffix-$(CONFIG_KERNEL_GZIP) := gz
25suffix-$(CONFIG_KERNEL_BZIP2) := bz2 25suffix-$(CONFIG_KERNEL_BZIP2) := bz2
26suffix-$(CONFIG_KERNEL_LZMA) := lzma 26suffix-$(CONFIG_KERNEL_LZMA) := lzma
27suffix-$(CONFIG_KERNEL_XZ) := xz
27suffix-$(CONFIG_KERNEL_LZO) := lzo 28suffix-$(CONFIG_KERNEL_LZO) := lzo
28 29
29targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz \ 30targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz \
30 uImage.bz2 uImage.lzma uImage.lzo uImage.bin 31 uImage.bz2 uImage.lzma uImage.xz uImage.lzo uImage.bin
31extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \ 32extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
32 vmlinux.bin.lzo 33 vmlinux.bin.xz vmlinux.bin.lzo
33subdir- := compressed romimage 34subdir- := compressed romimage
34 35
35$(obj)/zImage: $(obj)/compressed/vmlinux FORCE 36$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
@@ -76,6 +77,9 @@ $(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
76$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE 77$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
77 $(call if_changed,lzma) 78 $(call if_changed,lzma)
78 79
80$(obj)/vmlinux.bin.xz: $(obj)/vmlinux.bin FORCE
81 $(call if_changed,xzkern)
82
79$(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE 83$(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE
80 $(call if_changed,lzo) 84 $(call if_changed,lzo)
81 85
@@ -88,6 +92,9 @@ $(obj)/uImage.gz: $(obj)/vmlinux.bin.gz
88$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma 92$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma
89 $(call if_changed,uimage,lzma) 93 $(call if_changed,uimage,lzma)
90 94
95$(obj)/uImage.xz: $(obj)/vmlinux.bin.xz
96 $(call if_changed,uimage,xz)
97
91$(obj)/uImage.lzo: $(obj)/vmlinux.bin.lzo 98$(obj)/uImage.lzo: $(obj)/vmlinux.bin.lzo
92 $(call if_changed,uimage,lzo) 99 $(call if_changed,uimage,lzo)
93 100
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index cfa5a087a886..e0b0293bae63 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -6,7 +6,7 @@
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 7targets := vmlinux vmlinux.bin vmlinux.bin.gz \
8 vmlinux.bin.bz2 vmlinux.bin.lzma \ 8 vmlinux.bin.bz2 vmlinux.bin.lzma \
9 vmlinux.bin.lzo \ 9 vmlinux.bin.xz vmlinux.bin.lzo \
10 head_$(BITS).o misc.o piggy.o 10 head_$(BITS).o misc.o piggy.o
11 11
12OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o 12OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
@@ -50,6 +50,8 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
50 $(call if_changed,bzip2) 50 $(call if_changed,bzip2)
51$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE 51$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
52 $(call if_changed,lzma) 52 $(call if_changed,lzma)
53$(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y) FORCE
54 $(call if_changed,xzkern)
53$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE 55$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE
54 $(call if_changed,lzo) 56 $(call if_changed,lzo)
55 57
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c
index 27140a6b365d..95470a472d2c 100644
--- a/arch/sh/boot/compressed/misc.c
+++ b/arch/sh/boot/compressed/misc.c
@@ -61,6 +61,10 @@ static unsigned long free_mem_end_ptr;
61#include "../../../../lib/decompress_unlzma.c" 61#include "../../../../lib/decompress_unlzma.c"
62#endif 62#endif
63 63
64#ifdef CONFIG_KERNEL_XZ
65#include "../../../../lib/decompress_unxz.c"
66#endif
67
64#ifdef CONFIG_KERNEL_LZO 68#ifdef CONFIG_KERNEL_LZO
65#include "../../../../lib/decompress_unlzo.c" 69#include "../../../../lib/decompress_unlzo.c"
66#endif 70#endif
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index 083ea068e819..db85916b9e95 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -134,6 +134,7 @@ typedef pte_t *pte_addr_t;
134extern void pgtable_cache_init(void); 134extern void pgtable_cache_init(void);
135 135
136struct vm_area_struct; 136struct vm_area_struct;
137struct mm_struct;
137 138
138extern void __update_cache(struct vm_area_struct *vma, 139extern void __update_cache(struct vm_area_struct *vma,
139 unsigned long address, pte_t pte); 140 unsigned long address, pte_t pte);
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index c2b0aaaedcae..672944f5b19c 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -230,10 +230,10 @@ static struct platform_device *sh7750_devices[] __initdata = {
230static int __init sh7750_devices_setup(void) 230static int __init sh7750_devices_setup(void)
231{ 231{
232 if (mach_is_rts7751r2d()) { 232 if (mach_is_rts7751r2d()) {
233 platform_register_device(&scif_device); 233 platform_device_register(&scif_device);
234 } else { 234 } else {
235 platform_register_device(&sci_device); 235 platform_device_register(&sci_device);
236 platform_register_device(&scif_device); 236 platform_device_register(&scif_device);
237 } 237 }
238 238
239 return platform_add_devices(sh7750_devices, 239 return platform_add_devices(sh7750_devices,
diff --git a/arch/sh/kernel/topology.c b/arch/sh/kernel/topology.c
index 948fdb656933..38e862852dd0 100644
--- a/arch/sh/kernel/topology.c
+++ b/arch/sh/kernel/topology.c
@@ -17,6 +17,7 @@
17static DEFINE_PER_CPU(struct cpu, cpu_devices); 17static DEFINE_PER_CPU(struct cpu, cpu_devices);
18 18
19cpumask_t cpu_core_map[NR_CPUS]; 19cpumask_t cpu_core_map[NR_CPUS];
20EXPORT_SYMBOL(cpu_core_map);
20 21
21static cpumask_t cpu_coregroup_map(unsigned int cpu) 22static cpumask_t cpu_coregroup_map(unsigned int cpu)
22{ 23{
diff --git a/arch/sparc/include/asm/pcr.h b/arch/sparc/include/asm/pcr.h
index a2f5c61f924e..843e4faf6a50 100644
--- a/arch/sparc/include/asm/pcr.h
+++ b/arch/sparc/include/asm/pcr.h
@@ -43,4 +43,6 @@ static inline u64 picl_value(unsigned int nmi_hz)
43 43
44extern u64 pcr_enable; 44extern u64 pcr_enable;
45 45
46extern int pcr_arch_init(void);
47
46#endif /* __PCR_H */ 48#endif /* __PCR_H */
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 47977a77f6c6..72509d0e34be 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -255,10 +255,9 @@ static inline iopte_t *alloc_npages(struct device *dev, struct iommu *iommu,
255static int iommu_alloc_ctx(struct iommu *iommu) 255static int iommu_alloc_ctx(struct iommu *iommu)
256{ 256{
257 int lowest = iommu->ctx_lowest_free; 257 int lowest = iommu->ctx_lowest_free;
258 int sz = IOMMU_NUM_CTXS - lowest; 258 int n = find_next_zero_bit(iommu->ctx_bitmap, IOMMU_NUM_CTXS, lowest);
259 int n = find_next_zero_bit(iommu->ctx_bitmap, sz, lowest);
260 259
261 if (unlikely(n == sz)) { 260 if (unlikely(n == IOMMU_NUM_CTXS)) {
262 n = find_next_zero_bit(iommu->ctx_bitmap, lowest, 1); 261 n = find_next_zero_bit(iommu->ctx_bitmap, lowest, 1);
263 if (unlikely(n == lowest)) { 262 if (unlikely(n == lowest)) {
264 printk(KERN_WARNING "IOMMU: Ran out of contexts.\n"); 263 printk(KERN_WARNING "IOMMU: Ran out of contexts.\n");
diff --git a/arch/sparc/kernel/pcr.c b/arch/sparc/kernel/pcr.c
index ae96cf52a955..7c2ced612b8f 100644
--- a/arch/sparc/kernel/pcr.c
+++ b/arch/sparc/kernel/pcr.c
@@ -167,5 +167,3 @@ out_unregister:
167 unregister_perf_hsvc(); 167 unregister_perf_hsvc();
168 return err; 168 return err;
169} 169}
170
171early_initcall(pcr_arch_init);
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index b6a2b8f47040..555a76d1f4a1 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -49,6 +49,7 @@
49#include <asm/mdesc.h> 49#include <asm/mdesc.h>
50#include <asm/ldc.h> 50#include <asm/ldc.h>
51#include <asm/hypervisor.h> 51#include <asm/hypervisor.h>
52#include <asm/pcr.h>
52 53
53#include "cpumap.h" 54#include "cpumap.h"
54 55
@@ -1358,6 +1359,7 @@ void __cpu_die(unsigned int cpu)
1358 1359
1359void __init smp_cpus_done(unsigned int max_cpus) 1360void __init smp_cpus_done(unsigned int max_cpus)
1360{ 1361{
1362 pcr_arch_init();
1361} 1363}
1362 1364
1363void smp_send_reschedule(int cpu) 1365void smp_send_reschedule(int cpu)
diff --git a/arch/sparc/kernel/una_asm_32.S b/arch/sparc/kernel/una_asm_32.S
index 8cc03458eb7e..8f096e84a937 100644
--- a/arch/sparc/kernel/una_asm_32.S
+++ b/arch/sparc/kernel/una_asm_32.S
@@ -24,9 +24,9 @@ retl_efault:
24 .globl __do_int_store 24 .globl __do_int_store
25__do_int_store: 25__do_int_store:
26 ld [%o2], %g1 26 ld [%o2], %g1
27 cmp %1, 2 27 cmp %o1, 2
28 be 2f 28 be 2f
29 cmp %1, 4 29 cmp %o1, 4
30 be 1f 30 be 1f
31 srl %g1, 24, %g2 31 srl %g1, 24, %g2
32 srl %g1, 16, %g7 32 srl %g1, 16, %g7
diff --git a/arch/sparc/lib/bitext.c b/arch/sparc/lib/bitext.c
index 764b3eb7b604..48d00e72ce15 100644
--- a/arch/sparc/lib/bitext.c
+++ b/arch/sparc/lib/bitext.c
@@ -10,7 +10,7 @@
10 */ 10 */
11 11
12#include <linux/string.h> 12#include <linux/string.h>
13#include <linux/bitops.h> 13#include <linux/bitmap.h>
14 14
15#include <asm/bitext.h> 15#include <asm/bitext.h>
16 16
@@ -80,8 +80,7 @@ int bit_map_string_get(struct bit_map *t, int len, int align)
80 while (test_bit(offset + i, t->map) == 0) { 80 while (test_bit(offset + i, t->map) == 0) {
81 i++; 81 i++;
82 if (i == len) { 82 if (i == len) {
83 for (i = 0; i < len; i++) 83 bitmap_set(t->map, offset, len);
84 __set_bit(offset + i, t->map);
85 if (offset == t->first_free) 84 if (offset == t->first_free)
86 t->first_free = find_next_zero_bit 85 t->first_free = find_next_zero_bit
87 (t->map, t->size, 86 (t->map, t->size,
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 5e3969c36d7f..3c896946f4cc 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -233,6 +233,7 @@ extern void sync_Arb_IDs(void);
233extern void init_bsp_APIC(void); 233extern void init_bsp_APIC(void);
234extern void setup_local_APIC(void); 234extern void setup_local_APIC(void);
235extern void end_local_APIC_setup(void); 235extern void end_local_APIC_setup(void);
236extern void bsp_end_local_APIC_setup(void);
236extern void init_apic_mappings(void); 237extern void init_apic_mappings(void);
237void register_lapic_address(unsigned long address); 238void register_lapic_address(unsigned long address);
238extern void setup_boot_APIC_clock(void); 239extern void setup_boot_APIC_clock(void);
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 6e6e7558e702..4564c8e28a33 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -32,6 +32,6 @@ extern void arch_unregister_cpu(int);
32 32
33DECLARE_PER_CPU(int, cpu_state); 33DECLARE_PER_CPU(int, cpu_state);
34 34
35int __cpuinit mwait_usable(const struct cpuinfo_x86 *); 35int mwait_usable(const struct cpuinfo_x86 *);
36 36
37#endif /* _ASM_X86_CPU_H */ 37#endif /* _ASM_X86_CPU_H */
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index 4a2d4e0c18d9..8b5393ec1080 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -36,8 +36,6 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
36 unsigned cpu = smp_processor_id(); 36 unsigned cpu = smp_processor_id();
37 37
38 if (likely(prev != next)) { 38 if (likely(prev != next)) {
39 /* stop flush ipis for the previous mm */
40 cpumask_clear_cpu(cpu, mm_cpumask(prev));
41#ifdef CONFIG_SMP 39#ifdef CONFIG_SMP
42 percpu_write(cpu_tlbstate.state, TLBSTATE_OK); 40 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
43 percpu_write(cpu_tlbstate.active_mm, next); 41 percpu_write(cpu_tlbstate.active_mm, next);
@@ -47,6 +45,9 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
47 /* Re-load page tables */ 45 /* Re-load page tables */
48 load_cr3(next->pgd); 46 load_cr3(next->pgd);
49 47
48 /* stop flush ipis for the previous mm */
49 cpumask_clear_cpu(cpu, mm_cpumask(prev));
50
50 /* 51 /*
51 * load the LDT, if the LDT is different: 52 * load the LDT, if the LDT is different:
52 */ 53 */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 2071a8b2b32f..ebbc4d8ab170 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -558,13 +558,12 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
558static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 558static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
559 pmd_t *pmdp, pmd_t pmd) 559 pmd_t *pmdp, pmd_t pmd)
560{ 560{
561#if PAGETABLE_LEVELS >= 3
562 if (sizeof(pmdval_t) > sizeof(long)) 561 if (sizeof(pmdval_t) > sizeof(long))
563 /* 5 arg words */ 562 /* 5 arg words */
564 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd); 563 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
565 else 564 else
566 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp, pmd.pmd); 565 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
567#endif 566 native_pmd_val(pmd));
568} 567}
569#endif 568#endif
570 569
diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h
index 3788f4649db4..7e172955ee57 100644
--- a/arch/x86/include/asm/percpu.h
+++ b/arch/x86/include/asm/percpu.h
@@ -273,34 +273,34 @@ do { \
273 typeof(var) pxo_new__ = (nval); \ 273 typeof(var) pxo_new__ = (nval); \
274 switch (sizeof(var)) { \ 274 switch (sizeof(var)) { \
275 case 1: \ 275 case 1: \
276 asm("\n1:mov "__percpu_arg(1)",%%al" \ 276 asm("\n\tmov "__percpu_arg(1)",%%al" \
277 "\n\tcmpxchgb %2, "__percpu_arg(1) \ 277 "\n1:\tcmpxchgb %2, "__percpu_arg(1) \
278 "\n\tjnz 1b" \ 278 "\n\tjnz 1b" \
279 : "=a" (pxo_ret__), "+m" (var) \ 279 : "=&a" (pxo_ret__), "+m" (var) \
280 : "q" (pxo_new__) \ 280 : "q" (pxo_new__) \
281 : "memory"); \ 281 : "memory"); \
282 break; \ 282 break; \
283 case 2: \ 283 case 2: \
284 asm("\n1:mov "__percpu_arg(1)",%%ax" \ 284 asm("\n\tmov "__percpu_arg(1)",%%ax" \
285 "\n\tcmpxchgw %2, "__percpu_arg(1) \ 285 "\n1:\tcmpxchgw %2, "__percpu_arg(1) \
286 "\n\tjnz 1b" \ 286 "\n\tjnz 1b" \
287 : "=a" (pxo_ret__), "+m" (var) \ 287 : "=&a" (pxo_ret__), "+m" (var) \
288 : "r" (pxo_new__) \ 288 : "r" (pxo_new__) \
289 : "memory"); \ 289 : "memory"); \
290 break; \ 290 break; \
291 case 4: \ 291 case 4: \
292 asm("\n1:mov "__percpu_arg(1)",%%eax" \ 292 asm("\n\tmov "__percpu_arg(1)",%%eax" \
293 "\n\tcmpxchgl %2, "__percpu_arg(1) \ 293 "\n1:\tcmpxchgl %2, "__percpu_arg(1) \
294 "\n\tjnz 1b" \ 294 "\n\tjnz 1b" \
295 : "=a" (pxo_ret__), "+m" (var) \ 295 : "=&a" (pxo_ret__), "+m" (var) \
296 : "r" (pxo_new__) \ 296 : "r" (pxo_new__) \
297 : "memory"); \ 297 : "memory"); \
298 break; \ 298 break; \
299 case 8: \ 299 case 8: \
300 asm("\n1:mov "__percpu_arg(1)",%%rax" \ 300 asm("\n\tmov "__percpu_arg(1)",%%rax" \
301 "\n\tcmpxchgq %2, "__percpu_arg(1) \ 301 "\n1:\tcmpxchgq %2, "__percpu_arg(1) \
302 "\n\tjnz 1b" \ 302 "\n\tjnz 1b" \
303 : "=a" (pxo_ret__), "+m" (var) \ 303 : "=&a" (pxo_ret__), "+m" (var) \
304 : "r" (pxo_new__) \ 304 : "r" (pxo_new__) \
305 : "memory"); \ 305 : "memory"); \
306 break; \ 306 break; \
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 4c2f63c7fc1b..1f4695136776 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -40,10 +40,7 @@ DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid);
40DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid); 40DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
41 41
42/* Static state in head.S used to set up a CPU */ 42/* Static state in head.S used to set up a CPU */
43extern struct { 43extern unsigned long stack_start; /* Initial stack pointer address */
44 void *sp;
45 unsigned short ss;
46} stack_start;
47 44
48struct smp_ops { 45struct smp_ops {
49 void (*smp_prepare_boot_cpu)(void); 46 void (*smp_prepare_boot_cpu)(void);
diff --git a/arch/x86/include/asm/system_64.h b/arch/x86/include/asm/system_64.h
deleted file mode 100644
index 1159e091ad09..000000000000
--- a/arch/x86/include/asm/system_64.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef _ASM_X86_SYSTEM_64_H
2#define _ASM_X86_SYSTEM_64_H
3
4#include <asm/segment.h>
5#include <asm/cmpxchg.h>
6
7
8static inline unsigned long read_cr8(void)
9{
10 unsigned long cr8;
11 asm volatile("movq %%cr8,%0" : "=r" (cr8));
12 return cr8;
13}
14
15static inline void write_cr8(unsigned long val)
16{
17 asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
18}
19
20#include <linux/irqflags.h>
21
22#endif /* _ASM_X86_SYSTEM_64_H */
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 69fd72aa5594..68d1537b8c81 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -12,10 +12,8 @@
12#include <linux/cpumask.h> 12#include <linux/cpumask.h>
13#include <asm/segment.h> 13#include <asm/segment.h>
14#include <asm/desc.h> 14#include <asm/desc.h>
15
16#ifdef CONFIG_X86_32
17#include <asm/pgtable.h> 15#include <asm/pgtable.h>
18#endif 16#include <asm/cacheflush.h>
19 17
20#include "realmode/wakeup.h" 18#include "realmode/wakeup.h"
21#include "sleep.h" 19#include "sleep.h"
@@ -100,7 +98,7 @@ int acpi_save_state_mem(void)
100#else /* CONFIG_64BIT */ 98#else /* CONFIG_64BIT */
101 header->trampoline_segment = setup_trampoline() >> 4; 99 header->trampoline_segment = setup_trampoline() >> 4;
102#ifdef CONFIG_SMP 100#ifdef CONFIG_SMP
103 stack_start.sp = temp_stack + sizeof(temp_stack); 101 stack_start = (unsigned long)temp_stack + sizeof(temp_stack);
104 early_gdt_descr.address = 102 early_gdt_descr.address =
105 (unsigned long)get_cpu_gdt_table(smp_processor_id()); 103 (unsigned long)get_cpu_gdt_table(smp_processor_id());
106 initial_gs = per_cpu_offset(smp_processor_id()); 104 initial_gs = per_cpu_offset(smp_processor_id());
@@ -149,6 +147,15 @@ void __init acpi_reserve_wakeup_memory(void)
149 memblock_x86_reserve_range(mem, mem + WAKEUP_SIZE, "ACPI WAKEUP"); 147 memblock_x86_reserve_range(mem, mem + WAKEUP_SIZE, "ACPI WAKEUP");
150} 148}
151 149
150int __init acpi_configure_wakeup_memory(void)
151{
152 if (acpi_realmode)
153 set_memory_x(acpi_realmode, WAKEUP_SIZE >> PAGE_SHIFT);
154
155 return 0;
156}
157arch_initcall(acpi_configure_wakeup_memory);
158
152 159
153static int __init acpi_sleep_setup(char *str) 160static int __init acpi_sleep_setup(char *str)
154{ 161{
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 123608531c8f..7038b95d363f 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -671,7 +671,7 @@ void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
671 671
672 atomic_set(&stop_machine_first, 1); 672 atomic_set(&stop_machine_first, 1);
673 wrote_text = 0; 673 wrote_text = 0;
674 stop_machine(stop_machine_text_poke, (void *)&tpp, NULL); 674 __stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
675} 675}
676 676
677#if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL) 677#if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 06c196d7e59c..76b96d74978a 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1381,12 +1381,17 @@ void __cpuinit end_local_APIC_setup(void)
1381#endif 1381#endif
1382 1382
1383 apic_pm_activate(); 1383 apic_pm_activate();
1384}
1385
1386void __init bsp_end_local_APIC_setup(void)
1387{
1388 end_local_APIC_setup();
1384 1389
1385 /* 1390 /*
1386 * Now that local APIC setup is completed for BP, configure the fault 1391 * Now that local APIC setup is completed for BP, configure the fault
1387 * handling for interrupt remapping. 1392 * handling for interrupt remapping.
1388 */ 1393 */
1389 if (!smp_processor_id() && intr_remapping_enabled) 1394 if (intr_remapping_enabled)
1390 enable_drhd_fault_handling(); 1395 enable_drhd_fault_handling();
1391 1396
1392} 1397}
@@ -1756,7 +1761,7 @@ int __init APIC_init_uniprocessor(void)
1756 enable_IO_APIC(); 1761 enable_IO_APIC();
1757#endif 1762#endif
1758 1763
1759 end_local_APIC_setup(); 1764 bsp_end_local_APIC_setup();
1760 1765
1761#ifdef CONFIG_X86_IO_APIC 1766#ifdef CONFIG_X86_IO_APIC
1762 if (smp_found_config && !skip_ioapic_setup && nr_ioapics) 1767 if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 697dc34b7b87..ca9e2a3545a9 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -4002,6 +4002,9 @@ int mp_find_ioapic(u32 gsi)
4002{ 4002{
4003 int i = 0; 4003 int i = 0;
4004 4004
4005 if (nr_ioapics == 0)
4006 return -1;
4007
4005 /* Find the IOAPIC that manages this GSI. */ 4008 /* Find the IOAPIC that manages this GSI. */
4006 for (i = 0; i < nr_ioapics; i++) { 4009 for (i = 0; i < nr_ioapics; i++) {
4007 if ((gsi >= mp_gsi_routing[i].gsi_base) 4010 if ((gsi >= mp_gsi_routing[i].gsi_base)
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 01c0f3ee6cc3..bebabec5b448 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -793,13 +793,21 @@ void set_mtrr_aps_delayed_init(void)
793} 793}
794 794
795/* 795/*
796 * MTRR initialization for all AP's 796 * Delayed MTRR initialization for all AP's
797 */ 797 */
798void mtrr_aps_init(void) 798void mtrr_aps_init(void)
799{ 799{
800 if (!use_intel()) 800 if (!use_intel())
801 return; 801 return;
802 802
803 /*
804 * Check if someone has requested the delay of AP MTRR initialization,
805 * by doing set_mtrr_aps_delayed_init(), prior to this point. If not,
806 * then we are done.
807 */
808 if (!mtrr_aps_delayed_init)
809 return;
810
803 set_mtrr(~0U, 0, 0, 0); 811 set_mtrr(~0U, 0, 0, 0);
804 mtrr_aps_delayed_init = false; 812 mtrr_aps_delayed_init = false;
805} 813}
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index e56b9bfbabd1..f7a0993c1e7c 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -682,7 +682,7 @@ static int p4_validate_raw_event(struct perf_event *event)
682 * if an event is shared accross the logical threads 682 * if an event is shared accross the logical threads
683 * the user needs special permissions to be able to use it 683 * the user needs special permissions to be able to use it
684 */ 684 */
685 if (p4_event_bind_map[v].shared) { 685 if (p4_ht_active() && p4_event_bind_map[v].shared) {
686 if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN)) 686 if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
687 return -EACCES; 687 return -EACCES;
688 } 688 }
@@ -727,7 +727,8 @@ static int p4_hw_config(struct perf_event *event)
727 event->hw.config = p4_set_ht_bit(event->hw.config); 727 event->hw.config = p4_set_ht_bit(event->hw.config);
728 728
729 if (event->attr.type == PERF_TYPE_RAW) { 729 if (event->attr.type == PERF_TYPE_RAW) {
730 730 struct p4_event_bind *bind;
731 unsigned int esel;
731 /* 732 /*
732 * Clear bits we reserve to be managed by kernel itself 733 * Clear bits we reserve to be managed by kernel itself
733 * and never allowed from a user space 734 * and never allowed from a user space
@@ -743,6 +744,13 @@ static int p4_hw_config(struct perf_event *event)
743 * bits since we keep additional info here (for cache events and etc) 744 * bits since we keep additional info here (for cache events and etc)
744 */ 745 */
745 event->hw.config |= event->attr.config; 746 event->hw.config |= event->attr.config;
747 bind = p4_config_get_bind(event->attr.config);
748 if (!bind) {
749 rc = -EINVAL;
750 goto out;
751 }
752 esel = P4_OPCODE_ESEL(bind->opcode);
753 event->hw.config |= p4_config_pack_cccr(P4_CCCR_ESEL(esel));
746 } 754 }
747 755
748 rc = x86_setup_perfctr(event); 756 rc = x86_setup_perfctr(event);
diff --git a/arch/x86/kernel/dumpstack_64.c b/arch/x86/kernel/dumpstack_64.c
index 64101335de19..a6b6fcf7f0ae 100644
--- a/arch/x86/kernel/dumpstack_64.c
+++ b/arch/x86/kernel/dumpstack_64.c
@@ -149,13 +149,13 @@ void dump_trace(struct task_struct *task,
149 unsigned used = 0; 149 unsigned used = 0;
150 struct thread_info *tinfo; 150 struct thread_info *tinfo;
151 int graph = 0; 151 int graph = 0;
152 unsigned long dummy;
152 unsigned long bp; 153 unsigned long bp;
153 154
154 if (!task) 155 if (!task)
155 task = current; 156 task = current;
156 157
157 if (!stack) { 158 if (!stack) {
158 unsigned long dummy;
159 stack = &dummy; 159 stack = &dummy;
160 if (task && task != current) 160 if (task && task != current)
161 stack = (unsigned long *)task->thread.sp; 161 stack = (unsigned long *)task->thread.sp;
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index fc293dc8dc35..767d6c43de37 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -85,6 +85,8 @@ RESERVE_BRK(pagetables, INIT_MAP_SIZE)
85 */ 85 */
86__HEAD 86__HEAD
87ENTRY(startup_32) 87ENTRY(startup_32)
88 movl pa(stack_start),%ecx
89
88 /* test KEEP_SEGMENTS flag to see if the bootloader is asking 90 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
89 us to not reload segments */ 91 us to not reload segments */
90 testb $(1<<6), BP_loadflags(%esi) 92 testb $(1<<6), BP_loadflags(%esi)
@@ -99,7 +101,9 @@ ENTRY(startup_32)
99 movl %eax,%es 101 movl %eax,%es
100 movl %eax,%fs 102 movl %eax,%fs
101 movl %eax,%gs 103 movl %eax,%gs
104 movl %eax,%ss
1022: 1052:
106 leal -__PAGE_OFFSET(%ecx),%esp
103 107
104/* 108/*
105 * Clear BSS first so that there are no surprises... 109 * Clear BSS first so that there are no surprises...
@@ -145,8 +149,6 @@ ENTRY(startup_32)
145 * _brk_end is set up to point to the first "safe" location. 149 * _brk_end is set up to point to the first "safe" location.
146 * Mappings are created both at virtual address 0 (identity mapping) 150 * Mappings are created both at virtual address 0 (identity mapping)
147 * and PAGE_OFFSET for up to _end. 151 * and PAGE_OFFSET for up to _end.
148 *
149 * Note that the stack is not yet set up!
150 */ 152 */
151#ifdef CONFIG_X86_PAE 153#ifdef CONFIG_X86_PAE
152 154
@@ -282,6 +284,9 @@ ENTRY(startup_32_smp)
282 movl %eax,%es 284 movl %eax,%es
283 movl %eax,%fs 285 movl %eax,%fs
284 movl %eax,%gs 286 movl %eax,%gs
287 movl pa(stack_start),%ecx
288 movl %eax,%ss
289 leal -__PAGE_OFFSET(%ecx),%esp
285#endif /* CONFIG_SMP */ 290#endif /* CONFIG_SMP */
286default_entry: 291default_entry:
287 292
@@ -347,8 +352,8 @@ default_entry:
347 movl %eax,%cr0 /* ..and set paging (PG) bit */ 352 movl %eax,%cr0 /* ..and set paging (PG) bit */
348 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ 353 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
3491: 3541:
350 /* Set up the stack pointer */ 355 /* Shift the stack pointer to a virtual address */
351 lss stack_start,%esp 356 addl $__PAGE_OFFSET, %esp
352 357
353/* 358/*
354 * Initialize eflags. Some BIOS's leave bits like NT set. This would 359 * Initialize eflags. Some BIOS's leave bits like NT set. This would
@@ -360,9 +365,7 @@ default_entry:
360 365
361#ifdef CONFIG_SMP 366#ifdef CONFIG_SMP
362 cmpb $0, ready 367 cmpb $0, ready
363 jz 1f /* Initial CPU cleans BSS */ 368 jnz checkCPUtype
364 jmp checkCPUtype
3651:
366#endif /* CONFIG_SMP */ 369#endif /* CONFIG_SMP */
367 370
368/* 371/*
@@ -470,14 +473,7 @@ is386: movl $2,%ecx # set MP
470 473
471 cld # gcc2 wants the direction flag cleared at all times 474 cld # gcc2 wants the direction flag cleared at all times
472 pushl $0 # fake return address for unwinder 475 pushl $0 # fake return address for unwinder
473#ifdef CONFIG_SMP
474 movb ready, %cl
475 movb $1, ready 476 movb $1, ready
476 cmpb $0,%cl # the first CPU calls start_kernel
477 je 1f
478 movl (stack_start), %esp
4791:
480#endif /* CONFIG_SMP */
481 jmp *(initial_code) 477 jmp *(initial_code)
482 478
483/* 479/*
@@ -670,15 +666,15 @@ ENTRY(initial_page_table)
670#endif 666#endif
671 667
672.data 668.data
669.balign 4
673ENTRY(stack_start) 670ENTRY(stack_start)
674 .long init_thread_union+THREAD_SIZE 671 .long init_thread_union+THREAD_SIZE
675 .long __BOOT_DS
676
677ready: .byte 0
678 672
679early_recursion_flag: 673early_recursion_flag:
680 .long 0 674 .long 0
681 675
676ready: .byte 0
677
682int_msg: 678int_msg:
683 .asciz "Unknown interrupt or fault at: %p %p %p\n" 679 .asciz "Unknown interrupt or fault at: %p %p %p\n"
684 680
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 52945da52a94..387b6a0c9e81 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -367,7 +367,8 @@ void fixup_irqs(void)
367 if (irr & (1 << (vector % 32))) { 367 if (irr & (1 << (vector % 32))) {
368 irq = __this_cpu_read(vector_irq[vector]); 368 irq = __this_cpu_read(vector_irq[vector]);
369 369
370 data = irq_get_irq_data(irq); 370 desc = irq_to_desc(irq);
371 data = &desc->irq_data;
371 raw_spin_lock(&desc->lock); 372 raw_spin_lock(&desc->lock);
372 if (data->chip->irq_retrigger) 373 if (data->chip->irq_retrigger)
373 data->chip->irq_retrigger(data); 374 data->chip->irq_retrigger(data);
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index e764fc05d700..ff4554198981 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -92,21 +92,31 @@ void show_regs(struct pt_regs *regs)
92 92
93void show_regs_common(void) 93void show_regs_common(void)
94{ 94{
95 const char *board, *product; 95 const char *vendor, *product, *board;
96 96
97 board = dmi_get_system_info(DMI_BOARD_NAME); 97 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
98 if (!board) 98 if (!vendor)
99 board = ""; 99 vendor = "";
100 product = dmi_get_system_info(DMI_PRODUCT_NAME); 100 product = dmi_get_system_info(DMI_PRODUCT_NAME);
101 if (!product) 101 if (!product)
102 product = ""; 102 product = "";
103 103
104 /* Board Name is optional */
105 board = dmi_get_system_info(DMI_BOARD_NAME);
106
104 printk(KERN_CONT "\n"); 107 printk(KERN_CONT "\n");
105 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n", 108 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
106 current->pid, current->comm, print_tainted(), 109 current->pid, current->comm, print_tainted(),
107 init_utsname()->release, 110 init_utsname()->release,
108 (int)strcspn(init_utsname()->version, " "), 111 (int)strcspn(init_utsname()->version, " "),
109 init_utsname()->version, board, product); 112 init_utsname()->version);
113 printk(KERN_CONT " ");
114 printk(KERN_CONT "%s %s", vendor, product);
115 if (board) {
116 printk(KERN_CONT "/");
117 printk(KERN_CONT "%s", board);
118 }
119 printk(KERN_CONT "\n");
110} 120}
111 121
112void flush_thread(void) 122void flush_thread(void)
@@ -506,7 +516,7 @@ static void poll_idle(void)
506#define MWAIT_ECX_EXTENDED_INFO 0x01 516#define MWAIT_ECX_EXTENDED_INFO 0x01
507#define MWAIT_EDX_C1 0xf0 517#define MWAIT_EDX_C1 0xf0
508 518
509int __cpuinit mwait_usable(const struct cpuinfo_x86 *c) 519int mwait_usable(const struct cpuinfo_x86 *c)
510{ 520{
511 u32 eax, ebx, ecx, edx; 521 u32 eax, ebx, ecx, edx;
512 522
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 0cbe8c0b35ed..08776a953487 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -638,7 +638,7 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
638 * target processor state. 638 * target processor state.
639 */ 639 */
640 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary, 640 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
641 (unsigned long)stack_start.sp); 641 stack_start);
642 642
643 /* 643 /*
644 * Run STARTUP IPI loop. 644 * Run STARTUP IPI loop.
@@ -785,7 +785,7 @@ do_rest:
785#endif 785#endif
786 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu); 786 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
787 initial_code = (unsigned long)start_secondary; 787 initial_code = (unsigned long)start_secondary;
788 stack_start.sp = (void *) c_idle.idle->thread.sp; 788 stack_start = c_idle.idle->thread.sp;
789 789
790 /* start_ip had better be page-aligned! */ 790 /* start_ip had better be page-aligned! */
791 start_ip = setup_trampoline(); 791 start_ip = setup_trampoline();
@@ -1060,7 +1060,7 @@ static int __init smp_sanity_check(unsigned max_cpus)
1060 1060
1061 connect_bsp_APIC(); 1061 connect_bsp_APIC();
1062 setup_local_APIC(); 1062 setup_local_APIC();
1063 end_local_APIC_setup(); 1063 bsp_end_local_APIC_setup();
1064 return -1; 1064 return -1;
1065 } 1065 }
1066 1066
@@ -1137,7 +1137,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
1137 if (!skip_ioapic_setup && nr_ioapics) 1137 if (!skip_ioapic_setup && nr_ioapics)
1138 enable_IO_APIC(); 1138 enable_IO_APIC();
1139 1139
1140 end_local_APIC_setup(); 1140 bsp_end_local_APIC_setup();
1141 1141
1142 map_cpu_to_logical_apicid(); 1142 map_cpu_to_logical_apicid();
1143 1143
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 25bd1bc5aad2..54ce246a383e 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1150,8 +1150,8 @@ static void svm_vcpu_put(struct kvm_vcpu *vcpu)
1150 kvm_load_ldt(svm->host.ldt); 1150 kvm_load_ldt(svm->host.ldt);
1151#ifdef CONFIG_X86_64 1151#ifdef CONFIG_X86_64
1152 loadsegment(fs, svm->host.fs); 1152 loadsegment(fs, svm->host.fs);
1153 load_gs_index(svm->host.gs);
1154 wrmsrl(MSR_KERNEL_GS_BASE, current->thread.gs); 1153 wrmsrl(MSR_KERNEL_GS_BASE, current->thread.gs);
1154 load_gs_index(svm->host.gs);
1155#else 1155#else
1156 loadsegment(gs, svm->host.gs); 1156 loadsegment(gs, svm->host.gs);
1157#endif 1157#endif
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 8b830ca14ac4..d343b3c81f3c 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -256,7 +256,6 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
256 unsigned long pfn) 256 unsigned long pfn)
257{ 257{
258 pgprot_t forbidden = __pgprot(0); 258 pgprot_t forbidden = __pgprot(0);
259 pgprot_t required = __pgprot(0);
260 259
261 /* 260 /*
262 * The BIOS area between 640k and 1Mb needs to be executable for 261 * The BIOS area between 640k and 1Mb needs to be executable for
@@ -282,12 +281,6 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
282 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT, 281 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
283 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT)) 282 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
284 pgprot_val(forbidden) |= _PAGE_RW; 283 pgprot_val(forbidden) |= _PAGE_RW;
285 /*
286 * .data and .bss should always be writable.
287 */
288 if (within(address, (unsigned long)_sdata, (unsigned long)_edata) ||
289 within(address, (unsigned long)__bss_start, (unsigned long)__bss_stop))
290 pgprot_val(required) |= _PAGE_RW;
291 284
292#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA) 285#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
293 /* 286 /*
@@ -327,7 +320,6 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
327#endif 320#endif
328 321
329 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); 322 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
330 prot = __pgprot(pgprot_val(prot) | pgprot_val(required));
331 323
332 return prot; 324 return prot;
333} 325}
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index ddc81a06edb9..fd12d7ce7ff9 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -241,21 +241,15 @@ void __init xen_build_dynamic_phys_to_machine(void)
241 * As long as the mfn_list has enough entries to completely 241 * As long as the mfn_list has enough entries to completely
242 * fill a p2m page, pointing into the array is ok. But if 242 * fill a p2m page, pointing into the array is ok. But if
243 * not the entries beyond the last pfn will be undefined. 243 * not the entries beyond the last pfn will be undefined.
244 * And guessing that the 'what-ever-there-is' does not take it
245 * too kindly when changing it to invalid markers, a new page
246 * is allocated, initialized and filled with the valid part.
247 */ 244 */
248 if (unlikely(pfn + P2M_PER_PAGE > max_pfn)) { 245 if (unlikely(pfn + P2M_PER_PAGE > max_pfn)) {
249 unsigned long p2midx; 246 unsigned long p2midx;
250 unsigned long *p2m = extend_brk(PAGE_SIZE, PAGE_SIZE); 247
251 p2m_init(p2m); 248 p2midx = max_pfn % P2M_PER_PAGE;
252 249 for ( ; p2midx < P2M_PER_PAGE; p2midx++)
253 for (p2midx = 0; pfn + p2midx < max_pfn; p2midx++) { 250 mfn_list[pfn + p2midx] = INVALID_P2M_ENTRY;
254 p2m[p2midx] = mfn_list[pfn + p2midx]; 251 }
255 } 252 p2m_top[topidx][mididx] = &mfn_list[pfn];
256 p2m_top[topidx][mididx] = p2m;
257 } else
258 p2m_top[topidx][mididx] = &mfn_list[pfn];
259 } 253 }
260 254
261 m2p_override_init(); 255 m2p_override_init();
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index b5a7f928234b..a8a66a50d446 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -179,8 +179,13 @@ char * __init xen_memory_setup(void)
179 e820.nr_map = 0; 179 e820.nr_map = 0;
180 xen_extra_mem_start = mem_end; 180 xen_extra_mem_start = mem_end;
181 for (i = 0; i < memmap.nr_entries; i++) { 181 for (i = 0; i < memmap.nr_entries; i++) {
182 unsigned long long end = map[i].addr + map[i].size; 182 unsigned long long end;
183 183
184 /* Guard against non-page aligned E820 entries. */
185 if (map[i].type == E820_RAM)
186 map[i].size -= (map[i].size + map[i].addr) % PAGE_SIZE;
187
188 end = map[i].addr + map[i].size;
184 if (map[i].type == E820_RAM && end > mem_end) { 189 if (map[i].type == E820_RAM && end > mem_end) {
185 /* RAM off the end - may be partially included */ 190 /* RAM off the end - may be partially included */
186 u64 delta = min(map[i].size, end - mem_end); 191 u64 delta = min(map[i].size, end - mem_end);
@@ -350,6 +355,7 @@ void __init xen_arch_setup(void)
350 boot_cpu_data.hlt_works_ok = 1; 355 boot_cpu_data.hlt_works_ok = 1;
351#endif 356#endif
352 pm_idle = default_idle; 357 pm_idle = default_idle;
358 boot_option_idle_override = IDLE_HALT;
353 359
354 fiddle_vdso(); 360 fiddle_vdso();
355} 361}