aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/clock.c14
-rw-r--r--arch/arm/mach-omap2/clock24xx.h6
-rw-r--r--arch/arm/mach-omap2/clock34xx.h12
3 files changed, 15 insertions, 17 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 986c9f582752..76afb7b4482c 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -228,14 +228,12 @@ static void omap2_clk_wait_ready(struct clk *clk)
228 * it and pull it into struct clk itself somehow. 228 * it and pull it into struct clk itself somehow.
229 */ 229 */
230 reg = clk->enable_reg; 230 reg = clk->enable_reg;
231 if ((((u32)reg & 0xff) >= CM_FCLKEN1) && 231
232 (((u32)reg & 0xff) <= OMAP24XX_CM_FCLKEN2)) 232 /*
233 other_reg = (void __iomem *)(((u32)reg & ~0xf0) | 0x10); /* CM_ICLKEN* */ 233 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes
234 else if ((((u32)reg & 0xff) >= CM_ICLKEN1) && 234 * it's just a matter of XORing the bits.
235 (((u32)reg & 0xff) <= OMAP24XX_CM_ICLKEN4)) 235 */
236 other_reg = (void __iomem *)(((u32)reg & ~0xf0) | 0x00); /* CM_FCLKEN* */ 236 other_reg = (void __iomem *)((u32)reg ^ (CM_FCLKEN ^ CM_ICLKEN));
237 else
238 return;
239 237
240 /* Check if both functional and interface clocks 238 /* Check if both functional and interface clocks
241 * are running. */ 239 * are running. */
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index d386b3dfabae..486fd80143e4 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -890,7 +890,7 @@ static const struct clksel common_clkout_src_clksel[] = {
890 890
891static struct clk sys_clkout_src = { 891static struct clk sys_clkout_src = {
892 .name = "sys_clkout_src", 892 .name = "sys_clkout_src",
893 .ops = &clkops_omap2_dflt_wait, 893 .ops = &clkops_omap2_dflt,
894 .parent = &func_54m_ck, 894 .parent = &func_54m_ck,
895 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | 895 .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
896 RATE_PROPAGATES, 896 RATE_PROPAGATES,
@@ -937,7 +937,7 @@ static struct clk sys_clkout = {
937/* In 2430, new in 2420 ES2 */ 937/* In 2430, new in 2420 ES2 */
938static struct clk sys_clkout2_src = { 938static struct clk sys_clkout2_src = {
939 .name = "sys_clkout2_src", 939 .name = "sys_clkout2_src",
940 .ops = &clkops_omap2_dflt_wait, 940 .ops = &clkops_omap2_dflt,
941 .parent = &func_54m_ck, 941 .parent = &func_54m_ck,
942 .flags = CLOCK_IN_OMAP242X | RATE_PROPAGATES, 942 .flags = CLOCK_IN_OMAP242X | RATE_PROPAGATES,
943 .clkdm_name = "wkup_clkdm", 943 .clkdm_name = "wkup_clkdm",
@@ -974,7 +974,7 @@ static struct clk sys_clkout2 = {
974 974
975static struct clk emul_ck = { 975static struct clk emul_ck = {
976 .name = "emul_ck", 976 .name = "emul_ck",
977 .ops = &clkops_omap2_dflt_wait, 977 .ops = &clkops_omap2_dflt,
978 .parent = &func_54m_ck, 978 .parent = &func_54m_ck,
979 .flags = CLOCK_IN_OMAP242X, 979 .flags = CLOCK_IN_OMAP242X,
980 .clkdm_name = "wkup_clkdm", 980 .clkdm_name = "wkup_clkdm",
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 1ff05d351b38..335ef88ada55 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -216,7 +216,7 @@ static struct clk mcbsp_clks = {
216 216
217static struct clk sys_clkout1 = { 217static struct clk sys_clkout1 = {
218 .name = "sys_clkout1", 218 .name = "sys_clkout1",
219 .ops = &clkops_omap2_dflt_wait, 219 .ops = &clkops_omap2_dflt,
220 .parent = &osc_sys_ck, 220 .parent = &osc_sys_ck,
221 .enable_reg = OMAP3430_PRM_CLKOUT_CTRL, 221 .enable_reg = OMAP3430_PRM_CLKOUT_CTRL,
222 .enable_bit = OMAP3430_CLKOUT_EN_SHIFT, 222 .enable_bit = OMAP3430_CLKOUT_EN_SHIFT,
@@ -967,7 +967,7 @@ static const struct clksel clkout2_src_clksel[] = {
967 967
968static struct clk clkout2_src_ck = { 968static struct clk clkout2_src_ck = {
969 .name = "clkout2_src_ck", 969 .name = "clkout2_src_ck",
970 .ops = &clkops_omap2_dflt_wait, 970 .ops = &clkops_omap2_dflt,
971 .init = &omap2_init_clksel_parent, 971 .init = &omap2_init_clksel_parent,
972 .enable_reg = OMAP3430_CM_CLKOUT_CTRL, 972 .enable_reg = OMAP3430_CM_CLKOUT_CTRL,
973 .enable_bit = OMAP3430_CLKOUT2_EN_SHIFT, 973 .enable_bit = OMAP3430_CLKOUT2_EN_SHIFT,
@@ -1356,7 +1356,7 @@ static struct clk gpt11_fck = {
1356 1356
1357static struct clk cpefuse_fck = { 1357static struct clk cpefuse_fck = {
1358 .name = "cpefuse_fck", 1358 .name = "cpefuse_fck",
1359 .ops = &clkops_omap2_dflt_wait, 1359 .ops = &clkops_omap2_dflt,
1360 .parent = &sys_ck, 1360 .parent = &sys_ck,
1361 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1361 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1362 .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT, 1362 .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT,
@@ -1366,7 +1366,7 @@ static struct clk cpefuse_fck = {
1366 1366
1367static struct clk ts_fck = { 1367static struct clk ts_fck = {
1368 .name = "ts_fck", 1368 .name = "ts_fck",
1369 .ops = &clkops_omap2_dflt_wait, 1369 .ops = &clkops_omap2_dflt,
1370 .parent = &omap_32k_fck, 1370 .parent = &omap_32k_fck,
1371 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1371 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1372 .enable_bit = OMAP3430ES2_EN_TS_SHIFT, 1372 .enable_bit = OMAP3430ES2_EN_TS_SHIFT,
@@ -1376,7 +1376,7 @@ static struct clk ts_fck = {
1376 1376
1377static struct clk usbtll_fck = { 1377static struct clk usbtll_fck = {
1378 .name = "usbtll_fck", 1378 .name = "usbtll_fck",
1379 .ops = &clkops_omap2_dflt_wait, 1379 .ops = &clkops_omap2_dflt,
1380 .parent = &omap_120m_fck, 1380 .parent = &omap_120m_fck,
1381 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), 1381 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
1382 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, 1382 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
@@ -2295,7 +2295,7 @@ static struct clk usbhost_ick = {
2295 2295
2296static struct clk usbhost_sar_fck = { 2296static struct clk usbhost_sar_fck = {
2297 .name = "usbhost_sar_fck", 2297 .name = "usbhost_sar_fck",
2298 .ops = &clkops_omap2_dflt_wait, 2298 .ops = &clkops_omap2_dflt,
2299 .parent = &osc_sys_ck, 2299 .parent = &osc_sys_ck,
2300 .init = &omap2_init_clk_clkdm, 2300 .init = &omap2_init_clk_clkdm,
2301 .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL), 2301 .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL),