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-rw-r--r--arch/i386/kernel/io_apic.c10
-rw-r--r--arch/ia64/kernel/msi_ia64.c2
-rw-r--r--arch/ia64/sn/kernel/msi_sn.c2
-rw-r--r--arch/x86_64/kernel/io_apic.c10
4 files changed, 12 insertions, 12 deletions
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 4ccebd454e25..6fec4dab70bb 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -343,7 +343,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
343 break; 343 break;
344 entry = irq_2_pin + entry->next; 344 entry = irq_2_pin + entry->next;
345 } 345 }
346 set_native_irq_info(irq, cpumask); 346 irq_desc[irq].affinity = cpumask;
347 spin_unlock_irqrestore(&ioapic_lock, flags); 347 spin_unlock_irqrestore(&ioapic_lock, flags);
348} 348}
349 349
@@ -1354,7 +1354,7 @@ static void __init setup_IO_APIC_irqs(void)
1354 } 1354 }
1355 spin_lock_irqsave(&ioapic_lock, flags); 1355 spin_lock_irqsave(&ioapic_lock, flags);
1356 __ioapic_write_entry(apic, pin, entry); 1356 __ioapic_write_entry(apic, pin, entry);
1357 set_native_irq_info(irq, TARGET_CPUS); 1357 irq_desc[irq].affinity = TARGET_CPUS;
1358 spin_unlock_irqrestore(&ioapic_lock, flags); 1358 spin_unlock_irqrestore(&ioapic_lock, flags);
1359 } 1359 }
1360 } 1360 }
@@ -2585,7 +2585,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
2585 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 2585 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
2586 2586
2587 write_msi_msg(irq, &msg); 2587 write_msi_msg(irq, &msg);
2588 set_native_irq_info(irq, mask); 2588 irq_desc[irq].affinity = mask;
2589} 2589}
2590#endif /* CONFIG_SMP */ 2590#endif /* CONFIG_SMP */
2591 2591
@@ -2669,7 +2669,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
2669 dest = cpu_mask_to_apicid(mask); 2669 dest = cpu_mask_to_apicid(mask);
2670 2670
2671 target_ht_irq(irq, dest); 2671 target_ht_irq(irq, dest);
2672 set_native_irq_info(irq, mask); 2672 irq_desc[irq].affinity = mask;
2673} 2673}
2674#endif 2674#endif
2675 2675
@@ -2875,7 +2875,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
2875 2875
2876 spin_lock_irqsave(&ioapic_lock, flags); 2876 spin_lock_irqsave(&ioapic_lock, flags);
2877 __ioapic_write_entry(ioapic, pin, entry); 2877 __ioapic_write_entry(ioapic, pin, entry);
2878 set_native_irq_info(irq, TARGET_CPUS); 2878 irq_desc[irq].affinity = TARGET_CPUS;
2879 spin_unlock_irqrestore(&ioapic_lock, flags); 2879 spin_unlock_irqrestore(&ioapic_lock, flags);
2880 2880
2881 return 0; 2881 return 0;
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 0d05450c91c4..e7220900ea14 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -60,7 +60,7 @@ static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
60 msg.address_lo = addr; 60 msg.address_lo = addr;
61 61
62 write_msi_msg(irq, &msg); 62 write_msi_msg(irq, &msg);
63 set_native_irq_info(irq, cpu_mask); 63 irq_desc[irq].affinity = cpu_mask;
64} 64}
65#endif /* CONFIG_SMP */ 65#endif /* CONFIG_SMP */
66 66
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
index ea3dc38d73fd..49873aa4a37d 100644
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -204,7 +204,7 @@ static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
204 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff); 204 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
205 205
206 write_msi_msg(irq, &msg); 206 write_msi_msg(irq, &msg);
207 set_native_irq_info(irq, cpu_mask); 207 irq_desc[irq].affinity = cpu_mask;
208} 208}
209#endif /* CONFIG_SMP */ 209#endif /* CONFIG_SMP */
210 210
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index 357b354921c1..184721348f59 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -261,7 +261,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
261 261
262 spin_lock_irqsave(&ioapic_lock, flags); 262 spin_lock_irqsave(&ioapic_lock, flags);
263 __target_IO_APIC_irq(irq, dest, vector); 263 __target_IO_APIC_irq(irq, dest, vector);
264 set_native_irq_info(irq, mask); 264 irq_desc[irq].affinity = mask;
265 spin_unlock_irqrestore(&ioapic_lock, flags); 265 spin_unlock_irqrestore(&ioapic_lock, flags);
266} 266}
267#endif 267#endif
@@ -857,7 +857,7 @@ static void __init setup_IO_APIC_irq(int apic, int pin, int idx, int irq)
857 ioapic_write_entry(apic, pin, entry); 857 ioapic_write_entry(apic, pin, entry);
858 858
859 spin_lock_irqsave(&ioapic_lock, flags); 859 spin_lock_irqsave(&ioapic_lock, flags);
860 set_native_irq_info(irq, TARGET_CPUS); 860 irq_desc[irq].affinity = TARGET_CPUS;
861 spin_unlock_irqrestore(&ioapic_lock, flags); 861 spin_unlock_irqrestore(&ioapic_lock, flags);
862 862
863} 863}
@@ -1930,7 +1930,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
1930 msg.address_lo |= MSI_ADDR_DEST_ID(dest); 1930 msg.address_lo |= MSI_ADDR_DEST_ID(dest);
1931 1931
1932 write_msi_msg(irq, &msg); 1932 write_msi_msg(irq, &msg);
1933 set_native_irq_info(irq, mask); 1933 irq_desc[irq].affinity = mask;
1934} 1934}
1935#endif /* CONFIG_SMP */ 1935#endif /* CONFIG_SMP */
1936 1936
@@ -2018,7 +2018,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
2018 dest = cpu_mask_to_apicid(tmp); 2018 dest = cpu_mask_to_apicid(tmp);
2019 2019
2020 target_ht_irq(irq, dest, vector); 2020 target_ht_irq(irq, dest, vector);
2021 set_native_irq_info(irq, mask); 2021 irq_desc[irq].affinity = mask;
2022} 2022}
2023#endif 2023#endif
2024 2024
@@ -2143,7 +2143,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
2143 ioapic_write_entry(ioapic, pin, entry); 2143 ioapic_write_entry(ioapic, pin, entry);
2144 2144
2145 spin_lock_irqsave(&ioapic_lock, flags); 2145 spin_lock_irqsave(&ioapic_lock, flags);
2146 set_native_irq_info(irq, TARGET_CPUS); 2146 irq_desc[irq].affinity = TARGET_CPUS;
2147 spin_unlock_irqrestore(&ioapic_lock, flags); 2147 spin_unlock_irqrestore(&ioapic_lock, flags);
2148 2148
2149 return 0; 2149 return 0;