diff options
Diffstat (limited to 'arch')
178 files changed, 1748 insertions, 1420 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index c5213e78606b..e0d236d7ff73 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -100,6 +100,14 @@ choice | |||
100 | Note that the system will appear to hang during boot if there | 100 | Note that the system will appear to hang during boot if there |
101 | is nothing connected to read from the DCC. | 101 | is nothing connected to read from the DCC. |
102 | 102 | ||
103 | config AT91_DEBUG_LL_DBGU0 | ||
104 | bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" | ||
105 | depends on HAVE_AT91_DBGU0 | ||
106 | |||
107 | config AT91_DEBUG_LL_DBGU1 | ||
108 | bool "Kernel low-level debugging on 9263, 9g45 and cap9" | ||
109 | depends on HAVE_AT91_DBGU1 | ||
110 | |||
103 | config DEBUG_FOOTBRIDGE_COM1 | 111 | config DEBUG_FOOTBRIDGE_COM1 |
104 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" | 112 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" |
105 | depends on FOOTBRIDGE | 113 | depends on FOOTBRIDGE |
@@ -247,6 +255,43 @@ choice | |||
247 | their output to the standard serial port on the RealView | 255 | their output to the standard serial port on the RealView |
248 | PB1176 platform. | 256 | PB1176 platform. |
249 | 257 | ||
258 | config DEBUG_MSM_UART1 | ||
259 | bool "Kernel low-level debugging messages via MSM UART1" | ||
260 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
261 | help | ||
262 | Say Y here if you want the debug print routines to direct | ||
263 | their output to the first serial port on MSM devices. | ||
264 | |||
265 | config DEBUG_MSM_UART2 | ||
266 | bool "Kernel low-level debugging messages via MSM UART2" | ||
267 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
268 | help | ||
269 | Say Y here if you want the debug print routines to direct | ||
270 | their output to the second serial port on MSM devices. | ||
271 | |||
272 | config DEBUG_MSM_UART3 | ||
273 | bool "Kernel low-level debugging messages via MSM UART3" | ||
274 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
275 | help | ||
276 | Say Y here if you want the debug print routines to direct | ||
277 | their output to the third serial port on MSM devices. | ||
278 | |||
279 | config DEBUG_MSM8660_UART | ||
280 | bool "Kernel low-level debugging messages via MSM 8660 UART" | ||
281 | depends on ARCH_MSM8X60 | ||
282 | select MSM_HAS_DEBUG_UART_HS | ||
283 | help | ||
284 | Say Y here if you want the debug print routines to direct | ||
285 | their output to the serial port on MSM 8660 devices. | ||
286 | |||
287 | config DEBUG_MSM8960_UART | ||
288 | bool "Kernel low-level debugging messages via MSM 8960 UART" | ||
289 | depends on ARCH_MSM8960 | ||
290 | select MSM_HAS_DEBUG_UART_HS | ||
291 | help | ||
292 | Say Y here if you want the debug print routines to direct | ||
293 | their output to the serial port on MSM 8960 devices. | ||
294 | |||
250 | endchoice | 295 | endchoice |
251 | 296 | ||
252 | config EARLY_PRINTK | 297 | config EARLY_PRINTK |
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig index a7e777581378..945a34f2a34d 100644 --- a/arch/arm/configs/omap1_defconfig +++ b/arch/arm/configs/omap1_defconfig | |||
@@ -48,12 +48,7 @@ CONFIG_MACH_SX1=y | |||
48 | CONFIG_MACH_NOKIA770=y | 48 | CONFIG_MACH_NOKIA770=y |
49 | CONFIG_MACH_AMS_DELTA=y | 49 | CONFIG_MACH_AMS_DELTA=y |
50 | CONFIG_MACH_OMAP_GENERIC=y | 50 | CONFIG_MACH_OMAP_GENERIC=y |
51 | CONFIG_OMAP_ARM_216MHZ=y | ||
52 | CONFIG_OMAP_ARM_195MHZ=y | ||
53 | CONFIG_OMAP_ARM_192MHZ=y | ||
54 | CONFIG_OMAP_ARM_182MHZ=y | 51 | CONFIG_OMAP_ARM_182MHZ=y |
55 | CONFIG_OMAP_ARM_168MHZ=y | ||
56 | # CONFIG_OMAP_ARM_60MHZ is not set | ||
57 | # CONFIG_ARM_THUMB is not set | 52 | # CONFIG_ARM_THUMB is not set |
58 | CONFIG_PCCARD=y | 53 | CONFIG_PCCARD=y |
59 | CONFIG_OMAP_CF=y | 54 | CONFIG_OMAP_CF=y |
diff --git a/arch/arm/configs/pcontrol_g20_defconfig b/arch/arm/configs/pcontrol_g20_defconfig deleted file mode 100644 index c75c9fcede58..000000000000 --- a/arch/arm/configs/pcontrol_g20_defconfig +++ /dev/null | |||
@@ -1,175 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-" | ||
3 | # CONFIG_LOCALVERSION_AUTO is not set | ||
4 | # CONFIG_SWAP is not set | ||
5 | CONFIG_SYSVIPC=y | ||
6 | CONFIG_POSIX_MQUEUE=y | ||
7 | CONFIG_TREE_PREEMPT_RCU=y | ||
8 | CONFIG_IKCONFIG=y | ||
9 | CONFIG_IKCONFIG_PROC=y | ||
10 | CONFIG_LOG_BUF_SHIFT=14 | ||
11 | CONFIG_NAMESPACES=y | ||
12 | CONFIG_BLK_DEV_INITRD=y | ||
13 | CONFIG_EXPERT=y | ||
14 | # CONFIG_SYSCTL_SYSCALL is not set | ||
15 | # CONFIG_KALLSYMS is not set | ||
16 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
17 | # CONFIG_COMPAT_BRK is not set | ||
18 | CONFIG_SLAB=y | ||
19 | CONFIG_MODULES=y | ||
20 | CONFIG_MODULE_UNLOAD=y | ||
21 | # CONFIG_LBDAF is not set | ||
22 | # CONFIG_BLK_DEV_BSG is not set | ||
23 | CONFIG_DEFAULT_DEADLINE=y | ||
24 | CONFIG_ARCH_AT91=y | ||
25 | CONFIG_ARCH_AT91SAM9G20=y | ||
26 | CONFIG_MACH_PCONTROL_G20=y | ||
27 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
28 | CONFIG_NO_HZ=y | ||
29 | CONFIG_HIGH_RES_TIMERS=y | ||
30 | CONFIG_PREEMPT=y | ||
31 | CONFIG_AEABI=y | ||
32 | # CONFIG_OABI_COMPAT is not set | ||
33 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
34 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
35 | CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw" | ||
36 | CONFIG_VFP=y | ||
37 | CONFIG_BINFMT_MISC=y | ||
38 | CONFIG_NET=y | ||
39 | CONFIG_PACKET=y | ||
40 | CONFIG_UNIX=y | ||
41 | CONFIG_INET=y | ||
42 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
43 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
44 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
45 | # CONFIG_INET_LRO is not set | ||
46 | # CONFIG_IPV6 is not set | ||
47 | CONFIG_VLAN_8021Q=y | ||
48 | # CONFIG_WIRELESS is not set | ||
49 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
50 | # CONFIG_FW_LOADER is not set | ||
51 | CONFIG_MTD=y | ||
52 | CONFIG_MTD_PARTITIONS=y | ||
53 | CONFIG_MTD_CMDLINE_PARTS=y | ||
54 | CONFIG_MTD_CHAR=y | ||
55 | CONFIG_MTD_BLOCK=y | ||
56 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
57 | CONFIG_MTD_PHRAM=m | ||
58 | CONFIG_MTD_NAND=y | ||
59 | CONFIG_MTD_NAND_ATMEL=y | ||
60 | CONFIG_BLK_DEV_LOOP=y | ||
61 | CONFIG_BLK_DEV_RAM=y | ||
62 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
63 | CONFIG_ATMEL_TCLIB=y | ||
64 | CONFIG_EEPROM_AT24=m | ||
65 | CONFIG_SCSI=m | ||
66 | # CONFIG_SCSI_PROC_FS is not set | ||
67 | CONFIG_BLK_DEV_SD=m | ||
68 | CONFIG_SCSI_MULTI_LUN=y | ||
69 | # CONFIG_SCSI_LOWLEVEL is not set | ||
70 | CONFIG_NETDEVICES=y | ||
71 | CONFIG_MACVLAN=m | ||
72 | CONFIG_TUN=m | ||
73 | CONFIG_SMSC_PHY=m | ||
74 | CONFIG_BROADCOM_PHY=m | ||
75 | CONFIG_NET_ETHERNET=y | ||
76 | CONFIG_MII=y | ||
77 | CONFIG_MACB=y | ||
78 | CONFIG_SMSC911X=m | ||
79 | # CONFIG_NETDEV_1000 is not set | ||
80 | # CONFIG_NETDEV_10000 is not set | ||
81 | # CONFIG_WLAN is not set | ||
82 | CONFIG_PPP=m | ||
83 | CONFIG_PPP_ASYNC=m | ||
84 | CONFIG_PPP_DEFLATE=m | ||
85 | CONFIG_PPP_MPPE=m | ||
86 | CONFIG_INPUT_POLLDEV=y | ||
87 | CONFIG_INPUT_SPARSEKMAP=y | ||
88 | # CONFIG_INPUT_MOUSEDEV is not set | ||
89 | CONFIG_INPUT_EVDEV=m | ||
90 | CONFIG_INPUT_EVBUG=m | ||
91 | # CONFIG_KEYBOARD_ATKBD is not set | ||
92 | CONFIG_KEYBOARD_GPIO=m | ||
93 | CONFIG_KEYBOARD_MATRIX=m | ||
94 | # CONFIG_INPUT_MOUSE is not set | ||
95 | CONFIG_INPUT_TOUCHSCREEN=y | ||
96 | CONFIG_INPUT_MISC=y | ||
97 | CONFIG_INPUT_UINPUT=m | ||
98 | CONFIG_INPUT_GPIO_ROTARY_ENCODER=m | ||
99 | # CONFIG_SERIO is not set | ||
100 | # CONFIG_DEVKMEM is not set | ||
101 | CONFIG_SERIAL_ATMEL=y | ||
102 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
103 | CONFIG_SERIAL_MAX3100=m | ||
104 | # CONFIG_LEGACY_PTYS is not set | ||
105 | # CONFIG_HW_RANDOM is not set | ||
106 | CONFIG_R3964=m | ||
107 | CONFIG_I2C=m | ||
108 | CONFIG_I2C_CHARDEV=m | ||
109 | # CONFIG_I2C_HELPER_AUTO is not set | ||
110 | CONFIG_I2C_GPIO=m | ||
111 | CONFIG_SPI=y | ||
112 | CONFIG_SPI_ATMEL=m | ||
113 | CONFIG_SPI_SPIDEV=m | ||
114 | CONFIG_GPIO_SYSFS=y | ||
115 | CONFIG_W1=m | ||
116 | CONFIG_W1_MASTER_GPIO=m | ||
117 | CONFIG_W1_SLAVE_DS2431=m | ||
118 | # CONFIG_HWMON is not set | ||
119 | CONFIG_WATCHDOG=y | ||
120 | CONFIG_AT91SAM9X_WATCHDOG=y | ||
121 | # CONFIG_MFD_SUPPORT is not set | ||
122 | # CONFIG_HID_SUPPORT is not set | ||
123 | CONFIG_USB=y | ||
124 | # CONFIG_USB_DEVICE_CLASS is not set | ||
125 | CONFIG_USB_OHCI_HCD=y | ||
126 | CONFIG_USB_STORAGE=m | ||
127 | CONFIG_USB_LIBUSUAL=y | ||
128 | CONFIG_USB_SERIAL=m | ||
129 | CONFIG_USB_SERIAL_GENERIC=y | ||
130 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
131 | CONFIG_USB_SERIAL_PL2303=m | ||
132 | CONFIG_USB_GADGET=y | ||
133 | CONFIG_USB_ZERO=m | ||
134 | CONFIG_USB_ETH=m | ||
135 | CONFIG_USB_FILE_STORAGE=m | ||
136 | CONFIG_USB_G_SERIAL=m | ||
137 | CONFIG_USB_G_HID=m | ||
138 | CONFIG_MMC=y | ||
139 | CONFIG_MMC_UNSAFE_RESUME=y | ||
140 | CONFIG_MMC_ATMELMCI=y | ||
141 | CONFIG_NEW_LEDS=y | ||
142 | CONFIG_LEDS_CLASS=y | ||
143 | CONFIG_LEDS_GPIO=y | ||
144 | CONFIG_LEDS_TRIGGERS=y | ||
145 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
146 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
147 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
148 | CONFIG_RTC_CLASS=y | ||
149 | CONFIG_RTC_DRV_AT91SAM9=y | ||
150 | CONFIG_AUXDISPLAY=y | ||
151 | CONFIG_UIO=y | ||
152 | CONFIG_UIO_PDRV=y | ||
153 | CONFIG_STAGING=y | ||
154 | # CONFIG_STAGING_EXCLUDE_BUILD is not set | ||
155 | CONFIG_IIO=y | ||
156 | CONFIG_EXT2_FS=y | ||
157 | CONFIG_EXT3_FS=y | ||
158 | # CONFIG_EXT3_FS_XATTR is not set | ||
159 | CONFIG_VFAT_FS=y | ||
160 | CONFIG_TMPFS=y | ||
161 | CONFIG_JFFS2_FS=y | ||
162 | CONFIG_NFS_FS=y | ||
163 | CONFIG_NFS_V3=y | ||
164 | CONFIG_NFS_V4=y | ||
165 | CONFIG_PARTITION_ADVANCED=y | ||
166 | CONFIG_NLS_CODEPAGE_437=y | ||
167 | CONFIG_NLS_CODEPAGE_850=y | ||
168 | CONFIG_NLS_ISO8859_1=y | ||
169 | CONFIG_NLS_ISO8859_15=y | ||
170 | CONFIG_NLS_UTF8=y | ||
171 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
172 | CONFIG_CRYPTO=y | ||
173 | CONFIG_CRYPTO_ANSI_CPRNG=y | ||
174 | # CONFIG_CRYPTO_HW is not set | ||
175 | CONFIG_CRC_CCITT=y | ||
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 172101ac97de..a4f192cc51b2 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
@@ -346,15 +346,15 @@ validate_group(struct perf_event *event) | |||
346 | fake_pmu.used_mask = fake_used_mask; | 346 | fake_pmu.used_mask = fake_used_mask; |
347 | 347 | ||
348 | if (!validate_event(&fake_pmu, leader)) | 348 | if (!validate_event(&fake_pmu, leader)) |
349 | return -ENOSPC; | 349 | return -EINVAL; |
350 | 350 | ||
351 | list_for_each_entry(sibling, &leader->sibling_list, group_entry) { | 351 | list_for_each_entry(sibling, &leader->sibling_list, group_entry) { |
352 | if (!validate_event(&fake_pmu, sibling)) | 352 | if (!validate_event(&fake_pmu, sibling)) |
353 | return -ENOSPC; | 353 | return -EINVAL; |
354 | } | 354 | } |
355 | 355 | ||
356 | if (!validate_event(&fake_pmu, event)) | 356 | if (!validate_event(&fake_pmu, event)) |
357 | return -ENOSPC; | 357 | return -EINVAL; |
358 | 358 | ||
359 | return 0; | 359 | return 0; |
360 | } | 360 | } |
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index d111c3e99249..4f991f295284 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -3,6 +3,12 @@ if ARCH_AT91 | |||
3 | config HAVE_AT91_DATAFLASH_CARD | 3 | config HAVE_AT91_DATAFLASH_CARD |
4 | bool | 4 | bool |
5 | 5 | ||
6 | config HAVE_AT91_DBGU0 | ||
7 | bool | ||
8 | |||
9 | config HAVE_AT91_DBGU1 | ||
10 | bool | ||
11 | |||
6 | config HAVE_AT91_USART3 | 12 | config HAVE_AT91_USART3 |
7 | bool | 13 | bool |
8 | 14 | ||
@@ -21,12 +27,14 @@ config ARCH_AT91RM9200 | |||
21 | bool "AT91RM9200" | 27 | bool "AT91RM9200" |
22 | select CPU_ARM920T | 28 | select CPU_ARM920T |
23 | select GENERIC_CLOCKEVENTS | 29 | select GENERIC_CLOCKEVENTS |
30 | select HAVE_AT91_DBGU0 | ||
24 | select HAVE_AT91_USART3 | 31 | select HAVE_AT91_USART3 |
25 | 32 | ||
26 | config ARCH_AT91SAM9260 | 33 | config ARCH_AT91SAM9260 |
27 | bool "AT91SAM9260 or AT91SAM9XE" | 34 | bool "AT91SAM9260 or AT91SAM9XE" |
28 | select CPU_ARM926T | 35 | select CPU_ARM926T |
29 | select GENERIC_CLOCKEVENTS | 36 | select GENERIC_CLOCKEVENTS |
37 | select HAVE_AT91_DBGU0 | ||
30 | select HAVE_AT91_USART3 | 38 | select HAVE_AT91_USART3 |
31 | select HAVE_AT91_USART4 | 39 | select HAVE_AT91_USART4 |
32 | select HAVE_AT91_USART5 | 40 | select HAVE_AT91_USART5 |
@@ -37,11 +45,13 @@ config ARCH_AT91SAM9261 | |||
37 | select CPU_ARM926T | 45 | select CPU_ARM926T |
38 | select GENERIC_CLOCKEVENTS | 46 | select GENERIC_CLOCKEVENTS |
39 | select HAVE_FB_ATMEL | 47 | select HAVE_FB_ATMEL |
48 | select HAVE_AT91_DBGU0 | ||
40 | 49 | ||
41 | config ARCH_AT91SAM9G10 | 50 | config ARCH_AT91SAM9G10 |
42 | bool "AT91SAM9G10" | 51 | bool "AT91SAM9G10" |
43 | select CPU_ARM926T | 52 | select CPU_ARM926T |
44 | select GENERIC_CLOCKEVENTS | 53 | select GENERIC_CLOCKEVENTS |
54 | select HAVE_AT91_DBGU0 | ||
45 | select HAVE_FB_ATMEL | 55 | select HAVE_FB_ATMEL |
46 | 56 | ||
47 | config ARCH_AT91SAM9263 | 57 | config ARCH_AT91SAM9263 |
@@ -50,6 +60,7 @@ config ARCH_AT91SAM9263 | |||
50 | select GENERIC_CLOCKEVENTS | 60 | select GENERIC_CLOCKEVENTS |
51 | select HAVE_FB_ATMEL | 61 | select HAVE_FB_ATMEL |
52 | select HAVE_NET_MACB | 62 | select HAVE_NET_MACB |
63 | select HAVE_AT91_DBGU1 | ||
53 | 64 | ||
54 | config ARCH_AT91SAM9RL | 65 | config ARCH_AT91SAM9RL |
55 | bool "AT91SAM9RL" | 66 | bool "AT91SAM9RL" |
@@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL | |||
57 | select GENERIC_CLOCKEVENTS | 68 | select GENERIC_CLOCKEVENTS |
58 | select HAVE_AT91_USART3 | 69 | select HAVE_AT91_USART3 |
59 | select HAVE_FB_ATMEL | 70 | select HAVE_FB_ATMEL |
71 | select HAVE_AT91_DBGU0 | ||
60 | 72 | ||
61 | config ARCH_AT91SAM9G20 | 73 | config ARCH_AT91SAM9G20 |
62 | bool "AT91SAM9G20" | 74 | bool "AT91SAM9G20" |
63 | select CPU_ARM926T | 75 | select CPU_ARM926T |
64 | select GENERIC_CLOCKEVENTS | 76 | select GENERIC_CLOCKEVENTS |
77 | select HAVE_AT91_DBGU0 | ||
65 | select HAVE_AT91_USART3 | 78 | select HAVE_AT91_USART3 |
66 | select HAVE_AT91_USART4 | 79 | select HAVE_AT91_USART4 |
67 | select HAVE_AT91_USART5 | 80 | select HAVE_AT91_USART5 |
@@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45 | |||
74 | select HAVE_AT91_USART3 | 87 | select HAVE_AT91_USART3 |
75 | select HAVE_FB_ATMEL | 88 | select HAVE_FB_ATMEL |
76 | select HAVE_NET_MACB | 89 | select HAVE_NET_MACB |
90 | select HAVE_AT91_DBGU1 | ||
77 | 91 | ||
78 | config ARCH_AT91CAP9 | 92 | config ARCH_AT91CAP9 |
79 | bool "AT91CAP9" | 93 | bool "AT91CAP9" |
@@ -81,6 +95,7 @@ config ARCH_AT91CAP9 | |||
81 | select GENERIC_CLOCKEVENTS | 95 | select GENERIC_CLOCKEVENTS |
82 | select HAVE_FB_ATMEL | 96 | select HAVE_FB_ATMEL |
83 | select HAVE_NET_MACB | 97 | select HAVE_NET_MACB |
98 | select HAVE_AT91_DBGU1 | ||
84 | 99 | ||
85 | config ARCH_AT91X40 | 100 | config ARCH_AT91X40 |
86 | bool "AT91x40" | 101 | bool "AT91x40" |
@@ -510,8 +525,13 @@ config AT91_TIMER_HZ | |||
510 | choice | 525 | choice |
511 | prompt "Select a UART for early kernel messages" | 526 | prompt "Select a UART for early kernel messages" |
512 | 527 | ||
513 | config AT91_EARLY_DBGU | 528 | config AT91_EARLY_DBGU0 |
514 | bool "DBGU" | 529 | bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl" |
530 | depends on HAVE_AT91_DBGU0 | ||
531 | |||
532 | config AT91_EARLY_DBGU1 | ||
533 | bool "DBGU on 9263, 9g45 and cap9" | ||
534 | depends on HAVE_AT91_DBGU1 | ||
515 | 535 | ||
516 | config AT91_EARLY_USART0 | 536 | config AT91_EARLY_USART0 |
517 | bool "USART0" | 537 | bool "USART0" |
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index ecdd54dd68c6..506a26c3fff6 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -13,7 +13,6 @@ | |||
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | #include <linux/pm.h> | ||
17 | 16 | ||
18 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
19 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
@@ -23,11 +22,11 @@ | |||
23 | #include <mach/at91cap9.h> | 22 | #include <mach/at91cap9.h> |
24 | #include <mach/at91_pmc.h> | 23 | #include <mach/at91_pmc.h> |
25 | #include <mach/at91_rstc.h> | 24 | #include <mach/at91_rstc.h> |
26 | #include <mach/at91_shdwc.h> | ||
27 | 25 | ||
28 | #include "soc.h" | 26 | #include "soc.h" |
29 | #include "generic.h" | 27 | #include "generic.h" |
30 | #include "clock.h" | 28 | #include "clock.h" |
29 | #include "sam9_smc.h" | ||
31 | 30 | ||
32 | /* -------------------------------------------------------------------- | 31 | /* -------------------------------------------------------------------- |
33 | * Clocks | 32 | * Clocks |
@@ -137,7 +136,7 @@ static struct clk pwm_clk = { | |||
137 | .type = CLK_TYPE_PERIPHERAL, | 136 | .type = CLK_TYPE_PERIPHERAL, |
138 | }; | 137 | }; |
139 | static struct clk macb_clk = { | 138 | static struct clk macb_clk = { |
140 | .name = "macb_clk", | 139 | .name = "pclk", |
141 | .pmc_mask = 1 << AT91CAP9_ID_EMAC, | 140 | .pmc_mask = 1 << AT91CAP9_ID_EMAC, |
142 | .type = CLK_TYPE_PERIPHERAL, | 141 | .type = CLK_TYPE_PERIPHERAL, |
143 | }; | 142 | }; |
@@ -210,6 +209,8 @@ static struct clk *periph_clocks[] __initdata = { | |||
210 | }; | 209 | }; |
211 | 210 | ||
212 | static struct clk_lookup periph_clocks_lookups[] = { | 211 | static struct clk_lookup periph_clocks_lookups[] = { |
212 | /* One additional fake clock for macb_hclk */ | ||
213 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
213 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), | 214 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), |
214 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), | 215 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), |
215 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | 216 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), |
@@ -221,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
221 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 222 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
222 | /* fake hclk clock */ | 223 | /* fake hclk clock */ |
223 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 224 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
225 | CLKDEV_CON_ID("pioA", &pioABCD_clk), | ||
226 | CLKDEV_CON_ID("pioB", &pioABCD_clk), | ||
227 | CLKDEV_CON_ID("pioC", &pioABCD_clk), | ||
228 | CLKDEV_CON_ID("pioD", &pioABCD_clk), | ||
224 | }; | 229 | }; |
225 | 230 | ||
226 | static struct clk_lookup usart_clocks_lookups[] = { | 231 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -293,23 +298,19 @@ void __init at91cap9_set_console_clock(int id) | |||
293 | * GPIO | 298 | * GPIO |
294 | * -------------------------------------------------------------------- */ | 299 | * -------------------------------------------------------------------- */ |
295 | 300 | ||
296 | static struct at91_gpio_bank at91cap9_gpio[] = { | 301 | static struct at91_gpio_bank at91cap9_gpio[] __initdata = { |
297 | { | 302 | { |
298 | .id = AT91CAP9_ID_PIOABCD, | 303 | .id = AT91CAP9_ID_PIOABCD, |
299 | .offset = AT91_PIOA, | 304 | .regbase = AT91CAP9_BASE_PIOA, |
300 | .clock = &pioABCD_clk, | ||
301 | }, { | 305 | }, { |
302 | .id = AT91CAP9_ID_PIOABCD, | 306 | .id = AT91CAP9_ID_PIOABCD, |
303 | .offset = AT91_PIOB, | 307 | .regbase = AT91CAP9_BASE_PIOB, |
304 | .clock = &pioABCD_clk, | ||
305 | }, { | 308 | }, { |
306 | .id = AT91CAP9_ID_PIOABCD, | 309 | .id = AT91CAP9_ID_PIOABCD, |
307 | .offset = AT91_PIOC, | 310 | .regbase = AT91CAP9_BASE_PIOC, |
308 | .clock = &pioABCD_clk, | ||
309 | }, { | 311 | }, { |
310 | .id = AT91CAP9_ID_PIOABCD, | 312 | .id = AT91CAP9_ID_PIOABCD, |
311 | .offset = AT91_PIOD, | 313 | .regbase = AT91CAP9_BASE_PIOD, |
312 | .clock = &pioABCD_clk, | ||
313 | } | 314 | } |
314 | }; | 315 | }; |
315 | 316 | ||
@@ -318,12 +319,6 @@ static void at91cap9_reset(void) | |||
318 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | 319 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
319 | } | 320 | } |
320 | 321 | ||
321 | static void at91cap9_poweroff(void) | ||
322 | { | ||
323 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
324 | } | ||
325 | |||
326 | |||
327 | /* -------------------------------------------------------------------- | 322 | /* -------------------------------------------------------------------- |
328 | * AT91CAP9 processor initialization | 323 | * AT91CAP9 processor initialization |
329 | * -------------------------------------------------------------------- */ | 324 | * -------------------------------------------------------------------- */ |
@@ -333,10 +328,16 @@ static void __init at91cap9_map_io(void) | |||
333 | at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); | 328 | at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); |
334 | } | 329 | } |
335 | 330 | ||
331 | static void __init at91cap9_ioremap_registers(void) | ||
332 | { | ||
333 | at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC); | ||
334 | at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); | ||
335 | at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); | ||
336 | } | ||
337 | |||
336 | static void __init at91cap9_initialize(void) | 338 | static void __init at91cap9_initialize(void) |
337 | { | 339 | { |
338 | at91_arch_reset = at91cap9_reset; | 340 | at91_arch_reset = at91cap9_reset; |
339 | pm_power_off = at91cap9_poweroff; | ||
340 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); | 341 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); |
341 | 342 | ||
342 | /* Register GPIO subsystem */ | 343 | /* Register GPIO subsystem */ |
@@ -394,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
394 | struct at91_init_soc __initdata at91cap9_soc = { | 395 | struct at91_init_soc __initdata at91cap9_soc = { |
395 | .map_io = at91cap9_map_io, | 396 | .map_io = at91cap9_map_io, |
396 | .default_irq_priority = at91cap9_default_irq_priority, | 397 | .default_irq_priority = at91cap9_default_irq_priority, |
398 | .ioremap_registers = at91cap9_ioremap_registers, | ||
397 | .register_clocks = at91cap9_register_clocks, | 399 | .register_clocks = at91cap9_register_clocks, |
398 | .init = at91cap9_initialize, | 400 | .init = at91cap9_initialize, |
399 | }; | 401 | }; |
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index adad70db70eb..d298fb7cb210 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c | |||
@@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
76 | 76 | ||
77 | /* Enable VBus control for UHP ports */ | 77 | /* Enable VBus control for UHP ports */ |
78 | for (i = 0; i < data->ports; i++) { | 78 | for (i = 0; i < data->ports; i++) { |
79 | if (data->vbus_pin[i]) | 79 | if (gpio_is_valid(data->vbus_pin[i])) |
80 | at91_set_gpio_output(data->vbus_pin[i], 0); | 80 | at91_set_gpio_output(data->vbus_pin[i], 0); |
81 | } | 81 | } |
82 | 82 | ||
@@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
179 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); | 179 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); |
180 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); | 180 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); |
181 | 181 | ||
182 | if (data && data->vbus_pin > 0) { | 182 | if (data && gpio_is_valid(data->vbus_pin)) { |
183 | at91_set_gpio_input(data->vbus_pin, 0); | 183 | at91_set_gpio_input(data->vbus_pin, 0); |
184 | at91_set_deglitch(data->vbus_pin, 1); | 184 | at91_set_deglitch(data->vbus_pin, 1); |
185 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; | 185 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; |
@@ -200,7 +200,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {} | |||
200 | 200 | ||
201 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 201 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
202 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 202 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
203 | static struct at91_eth_data eth_data; | 203 | static struct macb_platform_data eth_data; |
204 | 204 | ||
205 | static struct resource eth_resources[] = { | 205 | static struct resource eth_resources[] = { |
206 | [0] = { | 206 | [0] = { |
@@ -227,12 +227,12 @@ static struct platform_device at91cap9_eth_device = { | |||
227 | .num_resources = ARRAY_SIZE(eth_resources), | 227 | .num_resources = ARRAY_SIZE(eth_resources), |
228 | }; | 228 | }; |
229 | 229 | ||
230 | void __init at91_add_device_eth(struct at91_eth_data *data) | 230 | void __init at91_add_device_eth(struct macb_platform_data *data) |
231 | { | 231 | { |
232 | if (!data) | 232 | if (!data) |
233 | return; | 233 | return; |
234 | 234 | ||
235 | if (data->phy_irq_pin) { | 235 | if (gpio_is_valid(data->phy_irq_pin)) { |
236 | at91_set_gpio_input(data->phy_irq_pin, 0); | 236 | at91_set_gpio_input(data->phy_irq_pin, 0); |
237 | at91_set_deglitch(data->phy_irq_pin, 1); | 237 | at91_set_deglitch(data->phy_irq_pin, 1); |
238 | } | 238 | } |
@@ -264,7 +264,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
264 | platform_device_register(&at91cap9_eth_device); | 264 | platform_device_register(&at91cap9_eth_device); |
265 | } | 265 | } |
266 | #else | 266 | #else |
267 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 267 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
268 | #endif | 268 | #endif |
269 | 269 | ||
270 | 270 | ||
@@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
332 | return; | 332 | return; |
333 | 333 | ||
334 | /* input/irq */ | 334 | /* input/irq */ |
335 | if (data->det_pin) { | 335 | if (gpio_is_valid(data->det_pin)) { |
336 | at91_set_gpio_input(data->det_pin, 1); | 336 | at91_set_gpio_input(data->det_pin, 1); |
337 | at91_set_deglitch(data->det_pin, 1); | 337 | at91_set_deglitch(data->det_pin, 1); |
338 | } | 338 | } |
339 | if (data->wp_pin) | 339 | if (gpio_is_valid(data->wp_pin)) |
340 | at91_set_gpio_input(data->wp_pin, 1); | 340 | at91_set_gpio_input(data->wp_pin, 1); |
341 | if (data->vcc_pin) | 341 | if (gpio_is_valid(data->vcc_pin)) |
342 | at91_set_gpio_output(data->vcc_pin, 0); | 342 | at91_set_gpio_output(data->vcc_pin, 0); |
343 | 343 | ||
344 | if (mmc_id == 0) { /* MCI0 */ | 344 | if (mmc_id == 0) { /* MCI0 */ |
@@ -398,8 +398,8 @@ static struct resource nand_resources[] = { | |||
398 | .flags = IORESOURCE_MEM, | 398 | .flags = IORESOURCE_MEM, |
399 | }, | 399 | }, |
400 | [1] = { | 400 | [1] = { |
401 | .start = AT91_BASE_SYS + AT91_ECC, | 401 | .start = AT91CAP9_BASE_ECC, |
402 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | 402 | .end = AT91CAP9_BASE_ECC + SZ_512 - 1, |
403 | .flags = IORESOURCE_MEM, | 403 | .flags = IORESOURCE_MEM, |
404 | } | 404 | } |
405 | }; | 405 | }; |
@@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
425 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); | 425 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); |
426 | 426 | ||
427 | /* enable pin */ | 427 | /* enable pin */ |
428 | if (data->enable_pin) | 428 | if (gpio_is_valid(data->enable_pin)) |
429 | at91_set_gpio_output(data->enable_pin, 1); | 429 | at91_set_gpio_output(data->enable_pin, 1); |
430 | 430 | ||
431 | /* ready/busy pin */ | 431 | /* ready/busy pin */ |
432 | if (data->rdy_pin) | 432 | if (gpio_is_valid(data->rdy_pin)) |
433 | at91_set_gpio_input(data->rdy_pin, 1); | 433 | at91_set_gpio_input(data->rdy_pin, 1); |
434 | 434 | ||
435 | /* card detect pin */ | 435 | /* card detect pin */ |
436 | if (data->det_pin) | 436 | if (gpio_is_valid(data->det_pin)) |
437 | at91_set_gpio_input(data->det_pin, 1); | 437 | at91_set_gpio_input(data->det_pin, 1); |
438 | 438 | ||
439 | nand_data = *data; | 439 | nand_data = *data; |
@@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { } | |||
670 | 670 | ||
671 | static struct resource rtt_resources[] = { | 671 | static struct resource rtt_resources[] = { |
672 | { | 672 | { |
673 | .start = AT91_BASE_SYS + AT91_RTT, | 673 | .start = AT91CAP9_BASE_RTT, |
674 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 674 | .end = AT91CAP9_BASE_RTT + SZ_16 - 1, |
675 | .flags = IORESOURCE_MEM, | 675 | .flags = IORESOURCE_MEM, |
676 | } | 676 | } |
677 | }; | 677 | }; |
@@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void) | |||
694 | * -------------------------------------------------------------------- */ | 694 | * -------------------------------------------------------------------- */ |
695 | 695 | ||
696 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 696 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
697 | static struct resource wdt_resources[] = { | ||
698 | { | ||
699 | .start = AT91CAP9_BASE_WDT, | ||
700 | .end = AT91CAP9_BASE_WDT + SZ_16 - 1, | ||
701 | .flags = IORESOURCE_MEM, | ||
702 | } | ||
703 | }; | ||
704 | |||
697 | static struct platform_device at91cap9_wdt_device = { | 705 | static struct platform_device at91cap9_wdt_device = { |
698 | .name = "at91_wdt", | 706 | .name = "at91_wdt", |
699 | .id = -1, | 707 | .id = -1, |
700 | .num_resources = 0, | 708 | .resource = wdt_resources, |
709 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
701 | }; | 710 | }; |
702 | 711 | ||
703 | static void __init at91_add_device_watchdog(void) | 712 | static void __init at91_add_device_watchdog(void) |
@@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) | |||
807 | at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ | 816 | at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ |
808 | 817 | ||
809 | /* reset */ | 818 | /* reset */ |
810 | if (data->reset_pin) | 819 | if (gpio_is_valid(data->reset_pin)) |
811 | at91_set_gpio_output(data->reset_pin, 0); | 820 | at91_set_gpio_output(data->reset_pin, 0); |
812 | 821 | ||
813 | ac97_data = *data; | 822 | ac97_data = *data; |
@@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
1021 | #if defined(CONFIG_SERIAL_ATMEL) | 1030 | #if defined(CONFIG_SERIAL_ATMEL) |
1022 | static struct resource dbgu_resources[] = { | 1031 | static struct resource dbgu_resources[] = { |
1023 | [0] = { | 1032 | [0] = { |
1024 | .start = AT91_BASE_SYS + AT91_DBGU, | 1033 | .start = AT91CAP9_BASE_DBGU, |
1025 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 1034 | .end = AT91CAP9_BASE_DBGU + SZ_512 - 1, |
1026 | .flags = IORESOURCE_MEM, | 1035 | .flags = IORESOURCE_MEM, |
1027 | }, | 1036 | }, |
1028 | [1] = { | 1037 | [1] = { |
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 713d3bdbd284..9163d7d5f76e 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include "soc.h" | 23 | #include "soc.h" |
24 | #include "generic.h" | 24 | #include "generic.h" |
25 | #include "clock.h" | 25 | #include "clock.h" |
26 | #include "sam9_smc.h" | ||
26 | 27 | ||
27 | static struct map_desc at91rm9200_io_desc[] __initdata = { | 28 | static struct map_desc at91rm9200_io_desc[] __initdata = { |
28 | { | 29 | { |
@@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
195 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), | 196 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
196 | /* fake hclk clock */ | 197 | /* fake hclk clock */ |
197 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 198 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
199 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
200 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
201 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
202 | CLKDEV_CON_ID("pioD", &pioD_clk), | ||
198 | }; | 203 | }; |
199 | 204 | ||
200 | static struct clk_lookup usart_clocks_lookups[] = { | 205 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -268,23 +273,19 @@ void __init at91rm9200_set_console_clock(int id) | |||
268 | * GPIO | 273 | * GPIO |
269 | * -------------------------------------------------------------------- */ | 274 | * -------------------------------------------------------------------- */ |
270 | 275 | ||
271 | static struct at91_gpio_bank at91rm9200_gpio[] = { | 276 | static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { |
272 | { | 277 | { |
273 | .id = AT91RM9200_ID_PIOA, | 278 | .id = AT91RM9200_ID_PIOA, |
274 | .offset = AT91_PIOA, | 279 | .regbase = AT91RM9200_BASE_PIOA, |
275 | .clock = &pioA_clk, | ||
276 | }, { | 280 | }, { |
277 | .id = AT91RM9200_ID_PIOB, | 281 | .id = AT91RM9200_ID_PIOB, |
278 | .offset = AT91_PIOB, | 282 | .regbase = AT91RM9200_BASE_PIOB, |
279 | .clock = &pioB_clk, | ||
280 | }, { | 283 | }, { |
281 | .id = AT91RM9200_ID_PIOC, | 284 | .id = AT91RM9200_ID_PIOC, |
282 | .offset = AT91_PIOC, | 285 | .regbase = AT91RM9200_BASE_PIOC, |
283 | .clock = &pioC_clk, | ||
284 | }, { | 286 | }, { |
285 | .id = AT91RM9200_ID_PIOD, | 287 | .id = AT91RM9200_ID_PIOD, |
286 | .offset = AT91_PIOD, | 288 | .regbase = AT91RM9200_BASE_PIOD, |
287 | .clock = &pioD_clk, | ||
288 | } | 289 | } |
289 | }; | 290 | }; |
290 | 291 | ||
@@ -307,6 +308,10 @@ static void __init at91rm9200_map_io(void) | |||
307 | iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); | 308 | iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); |
308 | } | 309 | } |
309 | 310 | ||
311 | static void __init at91rm9200_ioremap_registers(void) | ||
312 | { | ||
313 | } | ||
314 | |||
310 | static void __init at91rm9200_initialize(void) | 315 | static void __init at91rm9200_initialize(void) |
311 | { | 316 | { |
312 | at91_arch_reset = at91rm9200_reset; | 317 | at91_arch_reset = at91rm9200_reset; |
@@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
366 | struct at91_init_soc __initdata at91rm9200_soc = { | 371 | struct at91_init_soc __initdata at91rm9200_soc = { |
367 | .map_io = at91rm9200_map_io, | 372 | .map_io = at91rm9200_map_io, |
368 | .default_irq_priority = at91rm9200_default_irq_priority, | 373 | .default_irq_priority = at91rm9200_default_irq_priority, |
374 | .ioremap_registers = at91rm9200_ioremap_registers, | ||
369 | .register_clocks = at91rm9200_register_clocks, | 375 | .register_clocks = at91rm9200_register_clocks, |
370 | .init = at91rm9200_initialize, | 376 | .init = at91rm9200_initialize, |
371 | }; | 377 | }; |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 66591fa53e05..18bacec2b094 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} | |||
83 | * USB Device (Gadget) | 83 | * USB Device (Gadget) |
84 | * -------------------------------------------------------------------- */ | 84 | * -------------------------------------------------------------------- */ |
85 | 85 | ||
86 | #ifdef CONFIG_USB_GADGET_AT91 | 86 | #ifdef CONFIG_USB_AT91 |
87 | static struct at91_udc_data udc_data; | 87 | static struct at91_udc_data udc_data; |
88 | 88 | ||
89 | static struct resource udc_resources[] = { | 89 | static struct resource udc_resources[] = { |
@@ -114,11 +114,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
114 | if (!data) | 114 | if (!data) |
115 | return; | 115 | return; |
116 | 116 | ||
117 | if (data->vbus_pin) { | 117 | if (gpio_is_valid(data->vbus_pin)) { |
118 | at91_set_gpio_input(data->vbus_pin, 0); | 118 | at91_set_gpio_input(data->vbus_pin, 0); |
119 | at91_set_deglitch(data->vbus_pin, 1); | 119 | at91_set_deglitch(data->vbus_pin, 1); |
120 | } | 120 | } |
121 | if (data->pullup_pin) | 121 | if (gpio_is_valid(data->pullup_pin)) |
122 | at91_set_gpio_output(data->pullup_pin, 0); | 122 | at91_set_gpio_output(data->pullup_pin, 0); |
123 | 123 | ||
124 | udc_data = *data; | 124 | udc_data = *data; |
@@ -135,7 +135,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
135 | 135 | ||
136 | #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) | 136 | #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) |
137 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 137 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
138 | static struct at91_eth_data eth_data; | 138 | static struct macb_platform_data eth_data; |
139 | 139 | ||
140 | static struct resource eth_resources[] = { | 140 | static struct resource eth_resources[] = { |
141 | [0] = { | 141 | [0] = { |
@@ -162,12 +162,12 @@ static struct platform_device at91rm9200_eth_device = { | |||
162 | .num_resources = ARRAY_SIZE(eth_resources), | 162 | .num_resources = ARRAY_SIZE(eth_resources), |
163 | }; | 163 | }; |
164 | 164 | ||
165 | void __init at91_add_device_eth(struct at91_eth_data *data) | 165 | void __init at91_add_device_eth(struct macb_platform_data *data) |
166 | { | 166 | { |
167 | if (!data) | 167 | if (!data) |
168 | return; | 168 | return; |
169 | 169 | ||
170 | if (data->phy_irq_pin) { | 170 | if (gpio_is_valid(data->phy_irq_pin)) { |
171 | at91_set_gpio_input(data->phy_irq_pin, 0); | 171 | at91_set_gpio_input(data->phy_irq_pin, 0); |
172 | at91_set_deglitch(data->phy_irq_pin, 1); | 172 | at91_set_deglitch(data->phy_irq_pin, 1); |
173 | } | 173 | } |
@@ -199,7 +199,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
199 | platform_device_register(&at91rm9200_eth_device); | 199 | platform_device_register(&at91rm9200_eth_device); |
200 | } | 200 | } |
201 | #else | 201 | #else |
202 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 202 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
203 | #endif | 203 | #endif |
204 | 204 | ||
205 | 205 | ||
@@ -260,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
260 | ); | 260 | ); |
261 | 261 | ||
262 | /* input/irq */ | 262 | /* input/irq */ |
263 | if (data->irq_pin) { | 263 | if (gpio_is_valid(data->irq_pin)) { |
264 | at91_set_gpio_input(data->irq_pin, 1); | 264 | at91_set_gpio_input(data->irq_pin, 1); |
265 | at91_set_deglitch(data->irq_pin, 1); | 265 | at91_set_deglitch(data->irq_pin, 1); |
266 | } | 266 | } |
@@ -268,7 +268,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
268 | at91_set_deglitch(data->det_pin, 1); | 268 | at91_set_deglitch(data->det_pin, 1); |
269 | 269 | ||
270 | /* outputs, initially off */ | 270 | /* outputs, initially off */ |
271 | if (data->vcc_pin) | 271 | if (gpio_is_valid(data->vcc_pin)) |
272 | at91_set_gpio_output(data->vcc_pin, 0); | 272 | at91_set_gpio_output(data->vcc_pin, 0); |
273 | at91_set_gpio_output(data->rst_pin, 0); | 273 | at91_set_gpio_output(data->rst_pin, 0); |
274 | 274 | ||
@@ -328,13 +328,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
328 | return; | 328 | return; |
329 | 329 | ||
330 | /* input/irq */ | 330 | /* input/irq */ |
331 | if (data->det_pin) { | 331 | if (gpio_is_valid(data->det_pin)) { |
332 | at91_set_gpio_input(data->det_pin, 1); | 332 | at91_set_gpio_input(data->det_pin, 1); |
333 | at91_set_deglitch(data->det_pin, 1); | 333 | at91_set_deglitch(data->det_pin, 1); |
334 | } | 334 | } |
335 | if (data->wp_pin) | 335 | if (gpio_is_valid(data->wp_pin)) |
336 | at91_set_gpio_input(data->wp_pin, 1); | 336 | at91_set_gpio_input(data->wp_pin, 1); |
337 | if (data->vcc_pin) | 337 | if (gpio_is_valid(data->vcc_pin)) |
338 | at91_set_gpio_output(data->vcc_pin, 0); | 338 | at91_set_gpio_output(data->vcc_pin, 0); |
339 | 339 | ||
340 | /* CLK */ | 340 | /* CLK */ |
@@ -419,15 +419,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
419 | ); | 419 | ); |
420 | 420 | ||
421 | /* enable pin */ | 421 | /* enable pin */ |
422 | if (data->enable_pin) | 422 | if (gpio_is_valid(data->enable_pin)) |
423 | at91_set_gpio_output(data->enable_pin, 1); | 423 | at91_set_gpio_output(data->enable_pin, 1); |
424 | 424 | ||
425 | /* ready/busy pin */ | 425 | /* ready/busy pin */ |
426 | if (data->rdy_pin) | 426 | if (gpio_is_valid(data->rdy_pin)) |
427 | at91_set_gpio_input(data->rdy_pin, 1); | 427 | at91_set_gpio_input(data->rdy_pin, 1); |
428 | 428 | ||
429 | /* card detect pin */ | 429 | /* card detect pin */ |
430 | if (data->det_pin) | 430 | if (gpio_is_valid(data->det_pin)) |
431 | at91_set_gpio_input(data->det_pin, 1); | 431 | at91_set_gpio_input(data->det_pin, 1); |
432 | 432 | ||
433 | at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ | 433 | at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ |
@@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { } | |||
665 | * -------------------------------------------------------------------- */ | 665 | * -------------------------------------------------------------------- */ |
666 | 666 | ||
667 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) | 667 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) |
668 | static struct resource rtc_resources[] = { | ||
669 | [0] = { | ||
670 | .start = AT91RM9200_BASE_RTC, | ||
671 | .end = AT91RM9200_BASE_RTC + SZ_256 - 1, | ||
672 | .flags = IORESOURCE_MEM, | ||
673 | }, | ||
674 | [1] = { | ||
675 | .start = AT91_ID_SYS, | ||
676 | .end = AT91_ID_SYS, | ||
677 | .flags = IORESOURCE_IRQ, | ||
678 | }, | ||
679 | }; | ||
680 | |||
668 | static struct platform_device at91rm9200_rtc_device = { | 681 | static struct platform_device at91rm9200_rtc_device = { |
669 | .name = "at91_rtc", | 682 | .name = "at91_rtc", |
670 | .id = -1, | 683 | .id = -1, |
671 | .num_resources = 0, | 684 | .resource = rtc_resources, |
685 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
672 | }; | 686 | }; |
673 | 687 | ||
674 | static void __init at91_add_device_rtc(void) | 688 | static void __init at91_add_device_rtc(void) |
@@ -877,8 +891,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
877 | #if defined(CONFIG_SERIAL_ATMEL) | 891 | #if defined(CONFIG_SERIAL_ATMEL) |
878 | static struct resource dbgu_resources[] = { | 892 | static struct resource dbgu_resources[] = { |
879 | [0] = { | 893 | [0] = { |
880 | .start = AT91_BASE_SYS + AT91_DBGU, | 894 | .start = AT91RM9200_BASE_DBGU, |
881 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 895 | .end = AT91RM9200_BASE_DBGU + SZ_512 - 1, |
882 | .flags = IORESOURCE_MEM, | 896 | .flags = IORESOURCE_MEM, |
883 | }, | 897 | }, |
884 | [1] = { | 898 | [1] = { |
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index 1dd69c85dfec..a028cdf8f974 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c | |||
@@ -32,6 +32,8 @@ static unsigned long last_crtr; | |||
32 | static u32 irqmask; | 32 | static u32 irqmask; |
33 | static struct clock_event_device clkevt; | 33 | static struct clock_event_device clkevt; |
34 | 34 | ||
35 | #define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ) | ||
36 | |||
35 | /* | 37 | /* |
36 | * The ST_CRTR is updated asynchronously to the master clock ... but | 38 | * The ST_CRTR is updated asynchronously to the master clock ... but |
37 | * the updates as seen by the CPU don't seem to be strictly monotonic. | 39 | * the updates as seen by the CPU don't seem to be strictly monotonic. |
@@ -74,8 +76,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) | |||
74 | if (sr & AT91_ST_PITS) { | 76 | if (sr & AT91_ST_PITS) { |
75 | u32 crtr = read_CRTR(); | 77 | u32 crtr = read_CRTR(); |
76 | 78 | ||
77 | while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) { | 79 | while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) { |
78 | last_crtr += LATCH; | 80 | last_crtr += RM9200_TIMER_LATCH; |
79 | clkevt.event_handler(&clkevt); | 81 | clkevt.event_handler(&clkevt); |
80 | } | 82 | } |
81 | return IRQ_HANDLED; | 83 | return IRQ_HANDLED; |
@@ -116,7 +118,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
116 | case CLOCK_EVT_MODE_PERIODIC: | 118 | case CLOCK_EVT_MODE_PERIODIC: |
117 | /* PIT for periodic irqs; fixed rate of 1/HZ */ | 119 | /* PIT for periodic irqs; fixed rate of 1/HZ */ |
118 | irqmask = AT91_ST_PITS; | 120 | irqmask = AT91_ST_PITS; |
119 | at91_sys_write(AT91_ST_PIMR, LATCH); | 121 | at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH); |
120 | break; | 122 | break; |
121 | case CLOCK_EVT_MODE_ONESHOT: | 123 | case CLOCK_EVT_MODE_ONESHOT: |
122 | /* ALM for oneshot irqs, set by next_event() | 124 | /* ALM for oneshot irqs, set by next_event() |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index b84a9f642f59..3a960d2740b6 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -21,11 +20,11 @@ | |||
21 | #include <mach/at91sam9260.h> | 20 | #include <mach/at91sam9260.h> |
22 | #include <mach/at91_pmc.h> | 21 | #include <mach/at91_pmc.h> |
23 | #include <mach/at91_rstc.h> | 22 | #include <mach/at91_rstc.h> |
24 | #include <mach/at91_shdwc.h> | ||
25 | 23 | ||
26 | #include "soc.h" | 24 | #include "soc.h" |
27 | #include "generic.h" | 25 | #include "generic.h" |
28 | #include "clock.h" | 26 | #include "clock.h" |
27 | #include "sam9_smc.h" | ||
29 | 28 | ||
30 | /* -------------------------------------------------------------------- | 29 | /* -------------------------------------------------------------------- |
31 | * Clocks | 30 | * Clocks |
@@ -120,7 +119,7 @@ static struct clk ohci_clk = { | |||
120 | .type = CLK_TYPE_PERIPHERAL, | 119 | .type = CLK_TYPE_PERIPHERAL, |
121 | }; | 120 | }; |
122 | static struct clk macb_clk = { | 121 | static struct clk macb_clk = { |
123 | .name = "macb_clk", | 122 | .name = "pclk", |
124 | .pmc_mask = 1 << AT91SAM9260_ID_EMAC, | 123 | .pmc_mask = 1 << AT91SAM9260_ID_EMAC, |
125 | .type = CLK_TYPE_PERIPHERAL, | 124 | .type = CLK_TYPE_PERIPHERAL, |
126 | }; | 125 | }; |
@@ -190,14 +189,16 @@ static struct clk *periph_clocks[] __initdata = { | |||
190 | }; | 189 | }; |
191 | 190 | ||
192 | static struct clk_lookup periph_clocks_lookups[] = { | 191 | static struct clk_lookup periph_clocks_lookups[] = { |
192 | /* One additional fake clock for macb_hclk */ | ||
193 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
193 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | 194 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), |
194 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | 195 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), |
195 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), | 196 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), |
196 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), | 197 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), |
197 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), | 198 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), |
198 | CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk), | 199 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk), |
199 | CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk), | 200 | CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk), |
200 | CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk), | 201 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk), |
201 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), | 202 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), |
202 | /* more usart lookup table for DT entries */ | 203 | /* more usart lookup table for DT entries */ |
203 | CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), | 204 | CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), |
@@ -209,6 +210,9 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
209 | CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), | 210 | CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), |
210 | /* fake hclk clock */ | 211 | /* fake hclk clock */ |
211 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 212 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
213 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
214 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
215 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
212 | }; | 216 | }; |
213 | 217 | ||
214 | static struct clk_lookup usart_clocks_lookups[] = { | 218 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -270,28 +274,19 @@ void __init at91sam9260_set_console_clock(int id) | |||
270 | * GPIO | 274 | * GPIO |
271 | * -------------------------------------------------------------------- */ | 275 | * -------------------------------------------------------------------- */ |
272 | 276 | ||
273 | static struct at91_gpio_bank at91sam9260_gpio[] = { | 277 | static struct at91_gpio_bank at91sam9260_gpio[] __initdata = { |
274 | { | 278 | { |
275 | .id = AT91SAM9260_ID_PIOA, | 279 | .id = AT91SAM9260_ID_PIOA, |
276 | .offset = AT91_PIOA, | 280 | .regbase = AT91SAM9260_BASE_PIOA, |
277 | .clock = &pioA_clk, | ||
278 | }, { | 281 | }, { |
279 | .id = AT91SAM9260_ID_PIOB, | 282 | .id = AT91SAM9260_ID_PIOB, |
280 | .offset = AT91_PIOB, | 283 | .regbase = AT91SAM9260_BASE_PIOB, |
281 | .clock = &pioB_clk, | ||
282 | }, { | 284 | }, { |
283 | .id = AT91SAM9260_ID_PIOC, | 285 | .id = AT91SAM9260_ID_PIOC, |
284 | .offset = AT91_PIOC, | 286 | .regbase = AT91SAM9260_BASE_PIOC, |
285 | .clock = &pioC_clk, | ||
286 | } | 287 | } |
287 | }; | 288 | }; |
288 | 289 | ||
289 | static void at91sam9260_poweroff(void) | ||
290 | { | ||
291 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
292 | } | ||
293 | |||
294 | |||
295 | /* -------------------------------------------------------------------- | 290 | /* -------------------------------------------------------------------- |
296 | * AT91SAM9260 processor initialization | 291 | * AT91SAM9260 processor initialization |
297 | * -------------------------------------------------------------------- */ | 292 | * -------------------------------------------------------------------- */ |
@@ -325,10 +320,16 @@ static void __init at91sam9260_map_io(void) | |||
325 | } | 320 | } |
326 | } | 321 | } |
327 | 322 | ||
323 | static void __init at91sam9260_ioremap_registers(void) | ||
324 | { | ||
325 | at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC); | ||
326 | at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); | ||
327 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); | ||
328 | } | ||
329 | |||
328 | static void __init at91sam9260_initialize(void) | 330 | static void __init at91sam9260_initialize(void) |
329 | { | 331 | { |
330 | at91_arch_reset = at91sam9_alt_reset; | 332 | at91_arch_reset = at91sam9_alt_reset; |
331 | pm_power_off = at91sam9260_poweroff; | ||
332 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | 333 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
333 | | (1 << AT91SAM9260_ID_IRQ2); | 334 | | (1 << AT91SAM9260_ID_IRQ2); |
334 | 335 | ||
@@ -381,6 +382,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
381 | struct at91_init_soc __initdata at91sam9260_soc = { | 382 | struct at91_init_soc __initdata at91sam9260_soc = { |
382 | .map_io = at91sam9260_map_io, | 383 | .map_io = at91sam9260_map_io, |
383 | .default_irq_priority = at91sam9260_default_irq_priority, | 384 | .default_irq_priority = at91sam9260_default_irq_priority, |
385 | .ioremap_registers = at91sam9260_ioremap_registers, | ||
384 | .register_clocks = at91sam9260_register_clocks, | 386 | .register_clocks = at91sam9260_register_clocks, |
385 | .init = at91sam9260_initialize, | 387 | .init = at91sam9260_initialize, |
386 | }; | 388 | }; |
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 25e3464fb07f..642ccb6d26b2 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
@@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} | |||
84 | * USB Device (Gadget) | 84 | * USB Device (Gadget) |
85 | * -------------------------------------------------------------------- */ | 85 | * -------------------------------------------------------------------- */ |
86 | 86 | ||
87 | #ifdef CONFIG_USB_GADGET_AT91 | 87 | #ifdef CONFIG_USB_AT91 |
88 | static struct at91_udc_data udc_data; | 88 | static struct at91_udc_data udc_data; |
89 | 89 | ||
90 | static struct resource udc_resources[] = { | 90 | static struct resource udc_resources[] = { |
@@ -115,7 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
115 | if (!data) | 115 | if (!data) |
116 | return; | 116 | return; |
117 | 117 | ||
118 | if (data->vbus_pin) { | 118 | if (gpio_is_valid(data->vbus_pin)) { |
119 | at91_set_gpio_input(data->vbus_pin, 0); | 119 | at91_set_gpio_input(data->vbus_pin, 0); |
120 | at91_set_deglitch(data->vbus_pin, 1); | 120 | at91_set_deglitch(data->vbus_pin, 1); |
121 | } | 121 | } |
@@ -136,7 +136,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
136 | 136 | ||
137 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 137 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
138 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 138 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
139 | static struct at91_eth_data eth_data; | 139 | static struct macb_platform_data eth_data; |
140 | 140 | ||
141 | static struct resource eth_resources[] = { | 141 | static struct resource eth_resources[] = { |
142 | [0] = { | 142 | [0] = { |
@@ -163,12 +163,12 @@ static struct platform_device at91sam9260_eth_device = { | |||
163 | .num_resources = ARRAY_SIZE(eth_resources), | 163 | .num_resources = ARRAY_SIZE(eth_resources), |
164 | }; | 164 | }; |
165 | 165 | ||
166 | void __init at91_add_device_eth(struct at91_eth_data *data) | 166 | void __init at91_add_device_eth(struct macb_platform_data *data) |
167 | { | 167 | { |
168 | if (!data) | 168 | if (!data) |
169 | return; | 169 | return; |
170 | 170 | ||
171 | if (data->phy_irq_pin) { | 171 | if (gpio_is_valid(data->phy_irq_pin)) { |
172 | at91_set_gpio_input(data->phy_irq_pin, 0); | 172 | at91_set_gpio_input(data->phy_irq_pin, 0); |
173 | at91_set_deglitch(data->phy_irq_pin, 1); | 173 | at91_set_deglitch(data->phy_irq_pin, 1); |
174 | } | 174 | } |
@@ -200,7 +200,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
200 | platform_device_register(&at91sam9260_eth_device); | 200 | platform_device_register(&at91sam9260_eth_device); |
201 | } | 201 | } |
202 | #else | 202 | #else |
203 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 203 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
204 | #endif | 204 | #endif |
205 | 205 | ||
206 | 206 | ||
@@ -243,13 +243,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
243 | return; | 243 | return; |
244 | 244 | ||
245 | /* input/irq */ | 245 | /* input/irq */ |
246 | if (data->det_pin) { | 246 | if (gpio_is_valid(data->det_pin)) { |
247 | at91_set_gpio_input(data->det_pin, 1); | 247 | at91_set_gpio_input(data->det_pin, 1); |
248 | at91_set_deglitch(data->det_pin, 1); | 248 | at91_set_deglitch(data->det_pin, 1); |
249 | } | 249 | } |
250 | if (data->wp_pin) | 250 | if (gpio_is_valid(data->wp_pin)) |
251 | at91_set_gpio_input(data->wp_pin, 1); | 251 | at91_set_gpio_input(data->wp_pin, 1); |
252 | if (data->vcc_pin) | 252 | if (gpio_is_valid(data->vcc_pin)) |
253 | at91_set_gpio_output(data->vcc_pin, 0); | 253 | at91_set_gpio_output(data->vcc_pin, 0); |
254 | 254 | ||
255 | /* CLK */ | 255 | /* CLK */ |
@@ -330,11 +330,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) | |||
330 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { | 330 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { |
331 | if (data->slot[i].bus_width) { | 331 | if (data->slot[i].bus_width) { |
332 | /* input/irq */ | 332 | /* input/irq */ |
333 | if (data->slot[i].detect_pin) { | 333 | if (gpio_is_valid(data->slot[i].detect_pin)) { |
334 | at91_set_gpio_input(data->slot[i].detect_pin, 1); | 334 | at91_set_gpio_input(data->slot[i].detect_pin, 1); |
335 | at91_set_deglitch(data->slot[i].detect_pin, 1); | 335 | at91_set_deglitch(data->slot[i].detect_pin, 1); |
336 | } | 336 | } |
337 | if (data->slot[i].wp_pin) | 337 | if (gpio_is_valid(data->slot[i].wp_pin)) |
338 | at91_set_gpio_input(data->slot[i].wp_pin, 1); | 338 | at91_set_gpio_input(data->slot[i].wp_pin, 1); |
339 | 339 | ||
340 | switch (i) { | 340 | switch (i) { |
@@ -399,8 +399,8 @@ static struct resource nand_resources[] = { | |||
399 | .flags = IORESOURCE_MEM, | 399 | .flags = IORESOURCE_MEM, |
400 | }, | 400 | }, |
401 | [1] = { | 401 | [1] = { |
402 | .start = AT91_BASE_SYS + AT91_ECC, | 402 | .start = AT91SAM9260_BASE_ECC, |
403 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | 403 | .end = AT91SAM9260_BASE_ECC + SZ_512 - 1, |
404 | .flags = IORESOURCE_MEM, | 404 | .flags = IORESOURCE_MEM, |
405 | } | 405 | } |
406 | }; | 406 | }; |
@@ -426,15 +426,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
426 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); | 426 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
427 | 427 | ||
428 | /* enable pin */ | 428 | /* enable pin */ |
429 | if (data->enable_pin) | 429 | if (gpio_is_valid(data->enable_pin)) |
430 | at91_set_gpio_output(data->enable_pin, 1); | 430 | at91_set_gpio_output(data->enable_pin, 1); |
431 | 431 | ||
432 | /* ready/busy pin */ | 432 | /* ready/busy pin */ |
433 | if (data->rdy_pin) | 433 | if (gpio_is_valid(data->rdy_pin)) |
434 | at91_set_gpio_input(data->rdy_pin, 1); | 434 | at91_set_gpio_input(data->rdy_pin, 1); |
435 | 435 | ||
436 | /* card detect pin */ | 436 | /* card detect pin */ |
437 | if (data->det_pin) | 437 | if (gpio_is_valid(data->det_pin)) |
438 | at91_set_gpio_input(data->det_pin, 1); | 438 | at91_set_gpio_input(data->det_pin, 1); |
439 | 439 | ||
440 | nand_data = *data; | 440 | nand_data = *data; |
@@ -714,8 +714,8 @@ static void __init at91_add_device_tc(void) { } | |||
714 | 714 | ||
715 | static struct resource rtt_resources[] = { | 715 | static struct resource rtt_resources[] = { |
716 | { | 716 | { |
717 | .start = AT91_BASE_SYS + AT91_RTT, | 717 | .start = AT91SAM9260_BASE_RTT, |
718 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 718 | .end = AT91SAM9260_BASE_RTT + SZ_16 - 1, |
719 | .flags = IORESOURCE_MEM, | 719 | .flags = IORESOURCE_MEM, |
720 | } | 720 | } |
721 | }; | 721 | }; |
@@ -738,10 +738,19 @@ static void __init at91_add_device_rtt(void) | |||
738 | * -------------------------------------------------------------------- */ | 738 | * -------------------------------------------------------------------- */ |
739 | 739 | ||
740 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 740 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
741 | static struct resource wdt_resources[] = { | ||
742 | { | ||
743 | .start = AT91SAM9260_BASE_WDT, | ||
744 | .end = AT91SAM9260_BASE_WDT + SZ_16 - 1, | ||
745 | .flags = IORESOURCE_MEM, | ||
746 | } | ||
747 | }; | ||
748 | |||
741 | static struct platform_device at91sam9260_wdt_device = { | 749 | static struct platform_device at91sam9260_wdt_device = { |
742 | .name = "at91_wdt", | 750 | .name = "at91_wdt", |
743 | .id = -1, | 751 | .id = -1, |
744 | .num_resources = 0, | 752 | .resource = wdt_resources, |
753 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
745 | }; | 754 | }; |
746 | 755 | ||
747 | static void __init at91_add_device_watchdog(void) | 756 | static void __init at91_add_device_watchdog(void) |
@@ -837,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
837 | #if defined(CONFIG_SERIAL_ATMEL) | 846 | #if defined(CONFIG_SERIAL_ATMEL) |
838 | static struct resource dbgu_resources[] = { | 847 | static struct resource dbgu_resources[] = { |
839 | [0] = { | 848 | [0] = { |
840 | .start = AT91_BASE_SYS + AT91_DBGU, | 849 | .start = AT91SAM9260_BASE_DBGU, |
841 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 850 | .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1, |
842 | .flags = IORESOURCE_MEM, | 851 | .flags = IORESOURCE_MEM, |
843 | }, | 852 | }, |
844 | [1] = { | 853 | [1] = { |
@@ -1281,17 +1290,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
1281 | 1290 | ||
1282 | at91_sys_write(AT91_MATRIX_EBICSA, csa); | 1291 | at91_sys_write(AT91_MATRIX_EBICSA, csa); |
1283 | 1292 | ||
1284 | if (data->rst_pin) { | 1293 | if (gpio_is_valid(data->rst_pin)) { |
1285 | at91_set_multi_drive(data->rst_pin, 0); | 1294 | at91_set_multi_drive(data->rst_pin, 0); |
1286 | at91_set_gpio_output(data->rst_pin, 1); | 1295 | at91_set_gpio_output(data->rst_pin, 1); |
1287 | } | 1296 | } |
1288 | 1297 | ||
1289 | if (data->irq_pin) { | 1298 | if (gpio_is_valid(data->irq_pin)) { |
1290 | at91_set_gpio_input(data->irq_pin, 0); | 1299 | at91_set_gpio_input(data->irq_pin, 0); |
1291 | at91_set_deglitch(data->irq_pin, 1); | 1300 | at91_set_deglitch(data->irq_pin, 1); |
1292 | } | 1301 | } |
1293 | 1302 | ||
1294 | if (data->det_pin) { | 1303 | if (gpio_is_valid(data->det_pin)) { |
1295 | at91_set_gpio_input(data->det_pin, 0); | 1304 | at91_set_gpio_input(data->det_pin, 0); |
1296 | at91_set_deglitch(data->det_pin, 1); | 1305 | at91_set_deglitch(data->det_pin, 1); |
1297 | } | 1306 | } |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 658a5185abfd..a0538c5c2520 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -20,11 +19,11 @@ | |||
20 | #include <mach/at91sam9261.h> | 19 | #include <mach/at91sam9261.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | 22 | ||
25 | #include "soc.h" | 23 | #include "soc.h" |
26 | #include "generic.h" | 24 | #include "generic.h" |
27 | #include "clock.h" | 25 | #include "clock.h" |
26 | #include "sam9_smc.h" | ||
28 | 27 | ||
29 | /* -------------------------------------------------------------------- | 28 | /* -------------------------------------------------------------------- |
30 | * Clocks | 29 | * Clocks |
@@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
176 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 175 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
177 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), | 176 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
178 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), | 177 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), |
178 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
179 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
180 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
179 | }; | 181 | }; |
180 | 182 | ||
181 | static struct clk_lookup usart_clocks_lookups[] = { | 183 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id) | |||
251 | * GPIO | 253 | * GPIO |
252 | * -------------------------------------------------------------------- */ | 254 | * -------------------------------------------------------------------- */ |
253 | 255 | ||
254 | static struct at91_gpio_bank at91sam9261_gpio[] = { | 256 | static struct at91_gpio_bank at91sam9261_gpio[] __initdata = { |
255 | { | 257 | { |
256 | .id = AT91SAM9261_ID_PIOA, | 258 | .id = AT91SAM9261_ID_PIOA, |
257 | .offset = AT91_PIOA, | 259 | .regbase = AT91SAM9261_BASE_PIOA, |
258 | .clock = &pioA_clk, | ||
259 | }, { | 260 | }, { |
260 | .id = AT91SAM9261_ID_PIOB, | 261 | .id = AT91SAM9261_ID_PIOB, |
261 | .offset = AT91_PIOB, | 262 | .regbase = AT91SAM9261_BASE_PIOB, |
262 | .clock = &pioB_clk, | ||
263 | }, { | 263 | }, { |
264 | .id = AT91SAM9261_ID_PIOC, | 264 | .id = AT91SAM9261_ID_PIOC, |
265 | .offset = AT91_PIOC, | 265 | .regbase = AT91SAM9261_BASE_PIOC, |
266 | .clock = &pioC_clk, | ||
267 | } | 266 | } |
268 | }; | 267 | }; |
269 | 268 | ||
270 | static void at91sam9261_poweroff(void) | ||
271 | { | ||
272 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
273 | } | ||
274 | |||
275 | |||
276 | /* -------------------------------------------------------------------- | 269 | /* -------------------------------------------------------------------- |
277 | * AT91SAM9261 processor initialization | 270 | * AT91SAM9261 processor initialization |
278 | * -------------------------------------------------------------------- */ | 271 | * -------------------------------------------------------------------- */ |
@@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void) | |||
285 | at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); | 278 | at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); |
286 | } | 279 | } |
287 | 280 | ||
281 | static void __init at91sam9261_ioremap_registers(void) | ||
282 | { | ||
283 | at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC); | ||
284 | at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); | ||
285 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); | ||
286 | } | ||
287 | |||
288 | static void __init at91sam9261_initialize(void) | 288 | static void __init at91sam9261_initialize(void) |
289 | { | 289 | { |
290 | at91_arch_reset = at91sam9_alt_reset; | 290 | at91_arch_reset = at91sam9_alt_reset; |
291 | pm_power_off = at91sam9261_poweroff; | ||
292 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | 291 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) |
293 | | (1 << AT91SAM9261_ID_IRQ2); | 292 | | (1 << AT91SAM9261_ID_IRQ2); |
294 | 293 | ||
@@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
341 | struct at91_init_soc __initdata at91sam9261_soc = { | 340 | struct at91_init_soc __initdata at91sam9261_soc = { |
342 | .map_io = at91sam9261_map_io, | 341 | .map_io = at91sam9261_map_io, |
343 | .default_irq_priority = at91sam9261_default_irq_priority, | 342 | .default_irq_priority = at91sam9261_default_irq_priority, |
343 | .ioremap_registers = at91sam9261_ioremap_registers, | ||
344 | .register_clocks = at91sam9261_register_clocks, | 344 | .register_clocks = at91sam9261_register_clocks, |
345 | .init = at91sam9261_initialize, | 345 | .init = at91sam9261_initialize, |
346 | }; | 346 | }; |
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index ae78f4d03b73..fc59cbdb0e3c 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} | |||
87 | * USB Device (Gadget) | 87 | * USB Device (Gadget) |
88 | * -------------------------------------------------------------------- */ | 88 | * -------------------------------------------------------------------- */ |
89 | 89 | ||
90 | #ifdef CONFIG_USB_GADGET_AT91 | 90 | #ifdef CONFIG_USB_AT91 |
91 | static struct at91_udc_data udc_data; | 91 | static struct at91_udc_data udc_data; |
92 | 92 | ||
93 | static struct resource udc_resources[] = { | 93 | static struct resource udc_resources[] = { |
@@ -118,7 +118,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
118 | if (!data) | 118 | if (!data) |
119 | return; | 119 | return; |
120 | 120 | ||
121 | if (data->vbus_pin) { | 121 | if (gpio_is_valid(data->vbus_pin)) { |
122 | at91_set_gpio_input(data->vbus_pin, 0); | 122 | at91_set_gpio_input(data->vbus_pin, 0); |
123 | at91_set_deglitch(data->vbus_pin, 1); | 123 | at91_set_deglitch(data->vbus_pin, 1); |
124 | } | 124 | } |
@@ -171,13 +171,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
171 | return; | 171 | return; |
172 | 172 | ||
173 | /* input/irq */ | 173 | /* input/irq */ |
174 | if (data->det_pin) { | 174 | if (gpio_is_valid(data->det_pin)) { |
175 | at91_set_gpio_input(data->det_pin, 1); | 175 | at91_set_gpio_input(data->det_pin, 1); |
176 | at91_set_deglitch(data->det_pin, 1); | 176 | at91_set_deglitch(data->det_pin, 1); |
177 | } | 177 | } |
178 | if (data->wp_pin) | 178 | if (gpio_is_valid(data->wp_pin)) |
179 | at91_set_gpio_input(data->wp_pin, 1); | 179 | at91_set_gpio_input(data->wp_pin, 1); |
180 | if (data->vcc_pin) | 180 | if (gpio_is_valid(data->vcc_pin)) |
181 | at91_set_gpio_output(data->vcc_pin, 0); | 181 | at91_set_gpio_output(data->vcc_pin, 0); |
182 | 182 | ||
183 | /* CLK */ | 183 | /* CLK */ |
@@ -240,15 +240,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
240 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); | 240 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
241 | 241 | ||
242 | /* enable pin */ | 242 | /* enable pin */ |
243 | if (data->enable_pin) | 243 | if (gpio_is_valid(data->enable_pin)) |
244 | at91_set_gpio_output(data->enable_pin, 1); | 244 | at91_set_gpio_output(data->enable_pin, 1); |
245 | 245 | ||
246 | /* ready/busy pin */ | 246 | /* ready/busy pin */ |
247 | if (data->rdy_pin) | 247 | if (gpio_is_valid(data->rdy_pin)) |
248 | at91_set_gpio_input(data->rdy_pin, 1); | 248 | at91_set_gpio_input(data->rdy_pin, 1); |
249 | 249 | ||
250 | /* card detect pin */ | 250 | /* card detect pin */ |
251 | if (data->det_pin) | 251 | if (gpio_is_valid(data->det_pin)) |
252 | at91_set_gpio_input(data->det_pin, 1); | 252 | at91_set_gpio_input(data->det_pin, 1); |
253 | 253 | ||
254 | at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ | 254 | at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ |
@@ -600,8 +600,8 @@ static void __init at91_add_device_tc(void) { } | |||
600 | 600 | ||
601 | static struct resource rtt_resources[] = { | 601 | static struct resource rtt_resources[] = { |
602 | { | 602 | { |
603 | .start = AT91_BASE_SYS + AT91_RTT, | 603 | .start = AT91SAM9261_BASE_RTT, |
604 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 604 | .end = AT91SAM9261_BASE_RTT + SZ_16 - 1, |
605 | .flags = IORESOURCE_MEM, | 605 | .flags = IORESOURCE_MEM, |
606 | } | 606 | } |
607 | }; | 607 | }; |
@@ -624,10 +624,19 @@ static void __init at91_add_device_rtt(void) | |||
624 | * -------------------------------------------------------------------- */ | 624 | * -------------------------------------------------------------------- */ |
625 | 625 | ||
626 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 626 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
627 | static struct resource wdt_resources[] = { | ||
628 | { | ||
629 | .start = AT91SAM9261_BASE_WDT, | ||
630 | .end = AT91SAM9261_BASE_WDT + SZ_16 - 1, | ||
631 | .flags = IORESOURCE_MEM, | ||
632 | } | ||
633 | }; | ||
634 | |||
627 | static struct platform_device at91sam9261_wdt_device = { | 635 | static struct platform_device at91sam9261_wdt_device = { |
628 | .name = "at91_wdt", | 636 | .name = "at91_wdt", |
629 | .id = -1, | 637 | .id = -1, |
630 | .num_resources = 0, | 638 | .resource = wdt_resources, |
639 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
631 | }; | 640 | }; |
632 | 641 | ||
633 | static void __init at91_add_device_watchdog(void) | 642 | static void __init at91_add_device_watchdog(void) |
@@ -816,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
816 | #if defined(CONFIG_SERIAL_ATMEL) | 825 | #if defined(CONFIG_SERIAL_ATMEL) |
817 | static struct resource dbgu_resources[] = { | 826 | static struct resource dbgu_resources[] = { |
818 | [0] = { | 827 | [0] = { |
819 | .start = AT91_BASE_SYS + AT91_DBGU, | 828 | .start = AT91SAM9261_BASE_DBGU, |
820 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 829 | .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1, |
821 | .flags = IORESOURCE_MEM, | 830 | .flags = IORESOURCE_MEM, |
822 | }, | 831 | }, |
823 | [1] = { | 832 | [1] = { |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index f83fbb0ee0c5..5ffbbb024c1e 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | 14 | ||
16 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
17 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
@@ -19,11 +18,11 @@ | |||
19 | #include <mach/at91sam9263.h> | 18 | #include <mach/at91sam9263.h> |
20 | #include <mach/at91_pmc.h> | 19 | #include <mach/at91_pmc.h> |
21 | #include <mach/at91_rstc.h> | 20 | #include <mach/at91_rstc.h> |
22 | #include <mach/at91_shdwc.h> | ||
23 | 21 | ||
24 | #include "soc.h" | 22 | #include "soc.h" |
25 | #include "generic.h" | 23 | #include "generic.h" |
26 | #include "clock.h" | 24 | #include "clock.h" |
25 | #include "sam9_smc.h" | ||
27 | 26 | ||
28 | /* -------------------------------------------------------------------- | 27 | /* -------------------------------------------------------------------- |
29 | * Clocks | 28 | * Clocks |
@@ -118,7 +117,7 @@ static struct clk pwm_clk = { | |||
118 | .type = CLK_TYPE_PERIPHERAL, | 117 | .type = CLK_TYPE_PERIPHERAL, |
119 | }; | 118 | }; |
120 | static struct clk macb_clk = { | 119 | static struct clk macb_clk = { |
121 | .name = "macb_clk", | 120 | .name = "pclk", |
122 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, | 121 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, |
123 | .type = CLK_TYPE_PERIPHERAL, | 122 | .type = CLK_TYPE_PERIPHERAL, |
124 | }; | 123 | }; |
@@ -182,6 +181,8 @@ static struct clk *periph_clocks[] __initdata = { | |||
182 | }; | 181 | }; |
183 | 182 | ||
184 | static struct clk_lookup periph_clocks_lookups[] = { | 183 | static struct clk_lookup periph_clocks_lookups[] = { |
184 | /* One additional fake clock for macb_hclk */ | ||
185 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
185 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 186 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
186 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 187 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
187 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), | 188 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), |
@@ -191,6 +192,11 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
191 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | 192 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), |
192 | /* fake hclk clock */ | 193 | /* fake hclk clock */ |
193 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | 194 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
195 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
196 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
197 | CLKDEV_CON_ID("pioC", &pioCDE_clk), | ||
198 | CLKDEV_CON_ID("pioD", &pioCDE_clk), | ||
199 | CLKDEV_CON_ID("pioE", &pioCDE_clk), | ||
194 | }; | 200 | }; |
195 | 201 | ||
196 | static struct clk_lookup usart_clocks_lookups[] = { | 202 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -263,36 +269,25 @@ void __init at91sam9263_set_console_clock(int id) | |||
263 | * GPIO | 269 | * GPIO |
264 | * -------------------------------------------------------------------- */ | 270 | * -------------------------------------------------------------------- */ |
265 | 271 | ||
266 | static struct at91_gpio_bank at91sam9263_gpio[] = { | 272 | static struct at91_gpio_bank at91sam9263_gpio[] __initdata = { |
267 | { | 273 | { |
268 | .id = AT91SAM9263_ID_PIOA, | 274 | .id = AT91SAM9263_ID_PIOA, |
269 | .offset = AT91_PIOA, | 275 | .regbase = AT91SAM9263_BASE_PIOA, |
270 | .clock = &pioA_clk, | ||
271 | }, { | 276 | }, { |
272 | .id = AT91SAM9263_ID_PIOB, | 277 | .id = AT91SAM9263_ID_PIOB, |
273 | .offset = AT91_PIOB, | 278 | .regbase = AT91SAM9263_BASE_PIOB, |
274 | .clock = &pioB_clk, | ||
275 | }, { | 279 | }, { |
276 | .id = AT91SAM9263_ID_PIOCDE, | 280 | .id = AT91SAM9263_ID_PIOCDE, |
277 | .offset = AT91_PIOC, | 281 | .regbase = AT91SAM9263_BASE_PIOC, |
278 | .clock = &pioCDE_clk, | ||
279 | }, { | 282 | }, { |
280 | .id = AT91SAM9263_ID_PIOCDE, | 283 | .id = AT91SAM9263_ID_PIOCDE, |
281 | .offset = AT91_PIOD, | 284 | .regbase = AT91SAM9263_BASE_PIOD, |
282 | .clock = &pioCDE_clk, | ||
283 | }, { | 285 | }, { |
284 | .id = AT91SAM9263_ID_PIOCDE, | 286 | .id = AT91SAM9263_ID_PIOCDE, |
285 | .offset = AT91_PIOE, | 287 | .regbase = AT91SAM9263_BASE_PIOE, |
286 | .clock = &pioCDE_clk, | ||
287 | } | 288 | } |
288 | }; | 289 | }; |
289 | 290 | ||
290 | static void at91sam9263_poweroff(void) | ||
291 | { | ||
292 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
293 | } | ||
294 | |||
295 | |||
296 | /* -------------------------------------------------------------------- | 291 | /* -------------------------------------------------------------------- |
297 | * AT91SAM9263 processor initialization | 292 | * AT91SAM9263 processor initialization |
298 | * -------------------------------------------------------------------- */ | 293 | * -------------------------------------------------------------------- */ |
@@ -303,10 +298,17 @@ static void __init at91sam9263_map_io(void) | |||
303 | at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); | 298 | at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); |
304 | } | 299 | } |
305 | 300 | ||
301 | static void __init at91sam9263_ioremap_registers(void) | ||
302 | { | ||
303 | at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC); | ||
304 | at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); | ||
305 | at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); | ||
306 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); | ||
307 | } | ||
308 | |||
306 | static void __init at91sam9263_initialize(void) | 309 | static void __init at91sam9263_initialize(void) |
307 | { | 310 | { |
308 | at91_arch_reset = at91sam9_alt_reset; | 311 | at91_arch_reset = at91sam9_alt_reset; |
309 | pm_power_off = at91sam9263_poweroff; | ||
310 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); | 312 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
311 | 313 | ||
312 | /* Register GPIO subsystem */ | 314 | /* Register GPIO subsystem */ |
@@ -358,6 +360,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
358 | struct at91_init_soc __initdata at91sam9263_soc = { | 360 | struct at91_init_soc __initdata at91sam9263_soc = { |
359 | .map_io = at91sam9263_map_io, | 361 | .map_io = at91sam9263_map_io, |
360 | .default_irq_priority = at91sam9263_default_irq_priority, | 362 | .default_irq_priority = at91sam9263_default_irq_priority, |
363 | .ioremap_registers = at91sam9263_ioremap_registers, | ||
361 | .register_clocks = at91sam9263_register_clocks, | 364 | .register_clocks = at91sam9263_register_clocks, |
362 | .init = at91sam9263_initialize, | 365 | .init = at91sam9263_initialize, |
363 | }; | 366 | }; |
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index ad017eb1f8df..7b46b2787022 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -70,7 +70,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
70 | 70 | ||
71 | /* Enable VBus control for UHP ports */ | 71 | /* Enable VBus control for UHP ports */ |
72 | for (i = 0; i < data->ports; i++) { | 72 | for (i = 0; i < data->ports; i++) { |
73 | if (data->vbus_pin[i]) | 73 | if (gpio_is_valid(data->vbus_pin[i])) |
74 | at91_set_gpio_output(data->vbus_pin[i], 0); | 74 | at91_set_gpio_output(data->vbus_pin[i], 0); |
75 | } | 75 | } |
76 | 76 | ||
@@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} | |||
92 | * USB Device (Gadget) | 92 | * USB Device (Gadget) |
93 | * -------------------------------------------------------------------- */ | 93 | * -------------------------------------------------------------------- */ |
94 | 94 | ||
95 | #ifdef CONFIG_USB_GADGET_AT91 | 95 | #ifdef CONFIG_USB_AT91 |
96 | static struct at91_udc_data udc_data; | 96 | static struct at91_udc_data udc_data; |
97 | 97 | ||
98 | static struct resource udc_resources[] = { | 98 | static struct resource udc_resources[] = { |
@@ -123,7 +123,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
123 | if (!data) | 123 | if (!data) |
124 | return; | 124 | return; |
125 | 125 | ||
126 | if (data->vbus_pin) { | 126 | if (gpio_is_valid(data->vbus_pin)) { |
127 | at91_set_gpio_input(data->vbus_pin, 0); | 127 | at91_set_gpio_input(data->vbus_pin, 0); |
128 | at91_set_deglitch(data->vbus_pin, 1); | 128 | at91_set_deglitch(data->vbus_pin, 1); |
129 | } | 129 | } |
@@ -144,7 +144,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
144 | 144 | ||
145 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 145 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
146 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 146 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
147 | static struct at91_eth_data eth_data; | 147 | static struct macb_platform_data eth_data; |
148 | 148 | ||
149 | static struct resource eth_resources[] = { | 149 | static struct resource eth_resources[] = { |
150 | [0] = { | 150 | [0] = { |
@@ -171,12 +171,12 @@ static struct platform_device at91sam9263_eth_device = { | |||
171 | .num_resources = ARRAY_SIZE(eth_resources), | 171 | .num_resources = ARRAY_SIZE(eth_resources), |
172 | }; | 172 | }; |
173 | 173 | ||
174 | void __init at91_add_device_eth(struct at91_eth_data *data) | 174 | void __init at91_add_device_eth(struct macb_platform_data *data) |
175 | { | 175 | { |
176 | if (!data) | 176 | if (!data) |
177 | return; | 177 | return; |
178 | 178 | ||
179 | if (data->phy_irq_pin) { | 179 | if (gpio_is_valid(data->phy_irq_pin)) { |
180 | at91_set_gpio_input(data->phy_irq_pin, 0); | 180 | at91_set_gpio_input(data->phy_irq_pin, 0); |
181 | at91_set_deglitch(data->phy_irq_pin, 1); | 181 | at91_set_deglitch(data->phy_irq_pin, 1); |
182 | } | 182 | } |
@@ -208,7 +208,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
208 | platform_device_register(&at91sam9263_eth_device); | 208 | platform_device_register(&at91sam9263_eth_device); |
209 | } | 209 | } |
210 | #else | 210 | #else |
211 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 211 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
212 | #endif | 212 | #endif |
213 | 213 | ||
214 | 214 | ||
@@ -276,13 +276,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
276 | return; | 276 | return; |
277 | 277 | ||
278 | /* input/irq */ | 278 | /* input/irq */ |
279 | if (data->det_pin) { | 279 | if (gpio_is_valid(data->det_pin)) { |
280 | at91_set_gpio_input(data->det_pin, 1); | 280 | at91_set_gpio_input(data->det_pin, 1); |
281 | at91_set_deglitch(data->det_pin, 1); | 281 | at91_set_deglitch(data->det_pin, 1); |
282 | } | 282 | } |
283 | if (data->wp_pin) | 283 | if (gpio_is_valid(data->wp_pin)) |
284 | at91_set_gpio_input(data->wp_pin, 1); | 284 | at91_set_gpio_input(data->wp_pin, 1); |
285 | if (data->vcc_pin) | 285 | if (gpio_is_valid(data->vcc_pin)) |
286 | at91_set_gpio_output(data->vcc_pin, 0); | 286 | at91_set_gpio_output(data->vcc_pin, 0); |
287 | 287 | ||
288 | if (mmc_id == 0) { /* MCI0 */ | 288 | if (mmc_id == 0) { /* MCI0 */ |
@@ -430,17 +430,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
430 | } | 430 | } |
431 | at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); | 431 | at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); |
432 | 432 | ||
433 | if (data->det_pin) { | 433 | if (gpio_is_valid(data->det_pin)) { |
434 | at91_set_gpio_input(data->det_pin, 1); | 434 | at91_set_gpio_input(data->det_pin, 1); |
435 | at91_set_deglitch(data->det_pin, 1); | 435 | at91_set_deglitch(data->det_pin, 1); |
436 | } | 436 | } |
437 | 437 | ||
438 | if (data->irq_pin) { | 438 | if (gpio_is_valid(data->irq_pin)) { |
439 | at91_set_gpio_input(data->irq_pin, 1); | 439 | at91_set_gpio_input(data->irq_pin, 1); |
440 | at91_set_deglitch(data->irq_pin, 1); | 440 | at91_set_deglitch(data->irq_pin, 1); |
441 | } | 441 | } |
442 | 442 | ||
443 | if (data->vcc_pin) | 443 | if (gpio_is_valid(data->vcc_pin)) |
444 | /* initially off */ | 444 | /* initially off */ |
445 | at91_set_gpio_output(data->vcc_pin, 0); | 445 | at91_set_gpio_output(data->vcc_pin, 0); |
446 | 446 | ||
@@ -473,8 +473,8 @@ static struct resource nand_resources[] = { | |||
473 | .flags = IORESOURCE_MEM, | 473 | .flags = IORESOURCE_MEM, |
474 | }, | 474 | }, |
475 | [1] = { | 475 | [1] = { |
476 | .start = AT91_BASE_SYS + AT91_ECC0, | 476 | .start = AT91SAM9263_BASE_ECC0, |
477 | .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1, | 477 | .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1, |
478 | .flags = IORESOURCE_MEM, | 478 | .flags = IORESOURCE_MEM, |
479 | } | 479 | } |
480 | }; | 480 | }; |
@@ -500,15 +500,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
500 | at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); | 500 | at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); |
501 | 501 | ||
502 | /* enable pin */ | 502 | /* enable pin */ |
503 | if (data->enable_pin) | 503 | if (gpio_is_valid(data->enable_pin)) |
504 | at91_set_gpio_output(data->enable_pin, 1); | 504 | at91_set_gpio_output(data->enable_pin, 1); |
505 | 505 | ||
506 | /* ready/busy pin */ | 506 | /* ready/busy pin */ |
507 | if (data->rdy_pin) | 507 | if (gpio_is_valid(data->rdy_pin)) |
508 | at91_set_gpio_input(data->rdy_pin, 1); | 508 | at91_set_gpio_input(data->rdy_pin, 1); |
509 | 509 | ||
510 | /* card detect pin */ | 510 | /* card detect pin */ |
511 | if (data->det_pin) | 511 | if (gpio_is_valid(data->det_pin)) |
512 | at91_set_gpio_input(data->det_pin, 1); | 512 | at91_set_gpio_input(data->det_pin, 1); |
513 | 513 | ||
514 | nand_data = *data; | 514 | nand_data = *data; |
@@ -749,7 +749,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) | |||
749 | at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ | 749 | at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ |
750 | 750 | ||
751 | /* reset */ | 751 | /* reset */ |
752 | if (data->reset_pin) | 752 | if (gpio_is_valid(data->reset_pin)) |
753 | at91_set_gpio_output(data->reset_pin, 0); | 753 | at91_set_gpio_output(data->reset_pin, 0); |
754 | 754 | ||
755 | ac97_data = *data; | 755 | ac97_data = *data; |
@@ -956,8 +956,8 @@ static void __init at91_add_device_tc(void) { } | |||
956 | 956 | ||
957 | static struct resource rtt0_resources[] = { | 957 | static struct resource rtt0_resources[] = { |
958 | { | 958 | { |
959 | .start = AT91_BASE_SYS + AT91_RTT0, | 959 | .start = AT91SAM9263_BASE_RTT0, |
960 | .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, | 960 | .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1, |
961 | .flags = IORESOURCE_MEM, | 961 | .flags = IORESOURCE_MEM, |
962 | } | 962 | } |
963 | }; | 963 | }; |
@@ -971,8 +971,8 @@ static struct platform_device at91sam9263_rtt0_device = { | |||
971 | 971 | ||
972 | static struct resource rtt1_resources[] = { | 972 | static struct resource rtt1_resources[] = { |
973 | { | 973 | { |
974 | .start = AT91_BASE_SYS + AT91_RTT1, | 974 | .start = AT91SAM9263_BASE_RTT1, |
975 | .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, | 975 | .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1, |
976 | .flags = IORESOURCE_MEM, | 976 | .flags = IORESOURCE_MEM, |
977 | } | 977 | } |
978 | }; | 978 | }; |
@@ -996,10 +996,19 @@ static void __init at91_add_device_rtt(void) | |||
996 | * -------------------------------------------------------------------- */ | 996 | * -------------------------------------------------------------------- */ |
997 | 997 | ||
998 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 998 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
999 | static struct resource wdt_resources[] = { | ||
1000 | { | ||
1001 | .start = AT91SAM9263_BASE_WDT, | ||
1002 | .end = AT91SAM9263_BASE_WDT + SZ_16 - 1, | ||
1003 | .flags = IORESOURCE_MEM, | ||
1004 | } | ||
1005 | }; | ||
1006 | |||
999 | static struct platform_device at91sam9263_wdt_device = { | 1007 | static struct platform_device at91sam9263_wdt_device = { |
1000 | .name = "at91_wdt", | 1008 | .name = "at91_wdt", |
1001 | .id = -1, | 1009 | .id = -1, |
1002 | .num_resources = 0, | 1010 | .resource = wdt_resources, |
1011 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
1003 | }; | 1012 | }; |
1004 | 1013 | ||
1005 | static void __init at91_add_device_watchdog(void) | 1014 | static void __init at91_add_device_watchdog(void) |
@@ -1196,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
1196 | 1205 | ||
1197 | static struct resource dbgu_resources[] = { | 1206 | static struct resource dbgu_resources[] = { |
1198 | [0] = { | 1207 | [0] = { |
1199 | .start = AT91_BASE_SYS + AT91_DBGU, | 1208 | .start = AT91SAM9263_BASE_DBGU, |
1200 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 1209 | .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1, |
1201 | .flags = IORESOURCE_MEM, | 1210 | .flags = IORESOURCE_MEM, |
1202 | }, | 1211 | }, |
1203 | [1] = { | 1212 | [1] = { |
diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index 4ba85499fa97..d89ead740a99 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c | |||
@@ -25,7 +25,17 @@ | |||
25 | 25 | ||
26 | static u32 pit_cycle; /* write-once */ | 26 | static u32 pit_cycle; /* write-once */ |
27 | static u32 pit_cnt; /* access only w/system irq blocked */ | 27 | static u32 pit_cnt; /* access only w/system irq blocked */ |
28 | static void __iomem *pit_base_addr __read_mostly; | ||
28 | 29 | ||
30 | static inline unsigned int pit_read(unsigned int reg_offset) | ||
31 | { | ||
32 | return __raw_readl(pit_base_addr + reg_offset); | ||
33 | } | ||
34 | |||
35 | static inline void pit_write(unsigned int reg_offset, unsigned long value) | ||
36 | { | ||
37 | __raw_writel(value, pit_base_addr + reg_offset); | ||
38 | } | ||
29 | 39 | ||
30 | /* | 40 | /* |
31 | * Clocksource: just a monotonic counter of MCK/16 cycles. | 41 | * Clocksource: just a monotonic counter of MCK/16 cycles. |
@@ -39,7 +49,7 @@ static cycle_t read_pit_clk(struct clocksource *cs) | |||
39 | 49 | ||
40 | raw_local_irq_save(flags); | 50 | raw_local_irq_save(flags); |
41 | elapsed = pit_cnt; | 51 | elapsed = pit_cnt; |
42 | t = at91_sys_read(AT91_PIT_PIIR); | 52 | t = pit_read(AT91_PIT_PIIR); |
43 | raw_local_irq_restore(flags); | 53 | raw_local_irq_restore(flags); |
44 | 54 | ||
45 | elapsed += PIT_PICNT(t) * pit_cycle; | 55 | elapsed += PIT_PICNT(t) * pit_cycle; |
@@ -64,8 +74,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
64 | switch (mode) { | 74 | switch (mode) { |
65 | case CLOCK_EVT_MODE_PERIODIC: | 75 | case CLOCK_EVT_MODE_PERIODIC: |
66 | /* update clocksource counter */ | 76 | /* update clocksource counter */ |
67 | pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); | 77 | pit_cnt += pit_cycle * PIT_PICNT(pit_read(AT91_PIT_PIVR)); |
68 | at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN | 78 | pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN |
69 | | AT91_PIT_PITIEN); | 79 | | AT91_PIT_PITIEN); |
70 | break; | 80 | break; |
71 | case CLOCK_EVT_MODE_ONESHOT: | 81 | case CLOCK_EVT_MODE_ONESHOT: |
@@ -74,7 +84,7 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
74 | case CLOCK_EVT_MODE_SHUTDOWN: | 84 | case CLOCK_EVT_MODE_SHUTDOWN: |
75 | case CLOCK_EVT_MODE_UNUSED: | 85 | case CLOCK_EVT_MODE_UNUSED: |
76 | /* disable irq, leaving the clocksource active */ | 86 | /* disable irq, leaving the clocksource active */ |
77 | at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); | 87 | pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); |
78 | break; | 88 | break; |
79 | case CLOCK_EVT_MODE_RESUME: | 89 | case CLOCK_EVT_MODE_RESUME: |
80 | break; | 90 | break; |
@@ -103,11 +113,11 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) | |||
103 | 113 | ||
104 | /* The PIT interrupt may be disabled, and is shared */ | 114 | /* The PIT interrupt may be disabled, and is shared */ |
105 | if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) | 115 | if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC) |
106 | && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) { | 116 | && (pit_read(AT91_PIT_SR) & AT91_PIT_PITS)) { |
107 | unsigned nr_ticks; | 117 | unsigned nr_ticks; |
108 | 118 | ||
109 | /* Get number of ticks performed before irq, and ack it */ | 119 | /* Get number of ticks performed before irq, and ack it */ |
110 | nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR)); | 120 | nr_ticks = PIT_PICNT(pit_read(AT91_PIT_PIVR)); |
111 | do { | 121 | do { |
112 | pit_cnt += pit_cycle; | 122 | pit_cnt += pit_cycle; |
113 | pit_clkevt.event_handler(&pit_clkevt); | 123 | pit_clkevt.event_handler(&pit_clkevt); |
@@ -129,14 +139,14 @@ static struct irqaction at91sam926x_pit_irq = { | |||
129 | static void at91sam926x_pit_reset(void) | 139 | static void at91sam926x_pit_reset(void) |
130 | { | 140 | { |
131 | /* Disable timer and irqs */ | 141 | /* Disable timer and irqs */ |
132 | at91_sys_write(AT91_PIT_MR, 0); | 142 | pit_write(AT91_PIT_MR, 0); |
133 | 143 | ||
134 | /* Clear any pending interrupts, wait for PIT to stop counting */ | 144 | /* Clear any pending interrupts, wait for PIT to stop counting */ |
135 | while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0) | 145 | while (PIT_CPIV(pit_read(AT91_PIT_PIVR)) != 0) |
136 | cpu_relax(); | 146 | cpu_relax(); |
137 | 147 | ||
138 | /* Start PIT but don't enable IRQ */ | 148 | /* Start PIT but don't enable IRQ */ |
139 | at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); | 149 | pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN); |
140 | } | 150 | } |
141 | 151 | ||
142 | /* | 152 | /* |
@@ -178,7 +188,15 @@ static void __init at91sam926x_pit_init(void) | |||
178 | static void at91sam926x_pit_suspend(void) | 188 | static void at91sam926x_pit_suspend(void) |
179 | { | 189 | { |
180 | /* Disable timer */ | 190 | /* Disable timer */ |
181 | at91_sys_write(AT91_PIT_MR, 0); | 191 | pit_write(AT91_PIT_MR, 0); |
192 | } | ||
193 | |||
194 | void __init at91sam926x_ioremap_pit(u32 addr) | ||
195 | { | ||
196 | pit_base_addr = ioremap(addr, 16); | ||
197 | |||
198 | if (!pit_base_addr) | ||
199 | panic("Impossible to ioremap PIT\n"); | ||
182 | } | 200 | } |
183 | 201 | ||
184 | struct sys_timer at91sam926x_timer = { | 202 | struct sys_timer at91sam926x_timer = { |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 318b0407ea04..f61eb64e6b39 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/pm.h> | ||
15 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
16 | 15 | ||
17 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
@@ -20,12 +19,12 @@ | |||
20 | #include <mach/at91sam9g45.h> | 19 | #include <mach/at91sam9g45.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | #include <mach/cpu.h> | 22 | #include <mach/cpu.h> |
25 | 23 | ||
26 | #include "soc.h" | 24 | #include "soc.h" |
27 | #include "generic.h" | 25 | #include "generic.h" |
28 | #include "clock.h" | 26 | #include "clock.h" |
27 | #include "sam9_smc.h" | ||
29 | 28 | ||
30 | /* -------------------------------------------------------------------- | 29 | /* -------------------------------------------------------------------- |
31 | * Clocks | 30 | * Clocks |
@@ -150,7 +149,7 @@ static struct clk ac97_clk = { | |||
150 | .type = CLK_TYPE_PERIPHERAL, | 149 | .type = CLK_TYPE_PERIPHERAL, |
151 | }; | 150 | }; |
152 | static struct clk macb_clk = { | 151 | static struct clk macb_clk = { |
153 | .name = "macb_clk", | 152 | .name = "pclk", |
154 | .pmc_mask = 1 << AT91SAM9G45_ID_EMAC, | 153 | .pmc_mask = 1 << AT91SAM9G45_ID_EMAC, |
155 | .type = CLK_TYPE_PERIPHERAL, | 154 | .type = CLK_TYPE_PERIPHERAL, |
156 | }; | 155 | }; |
@@ -209,6 +208,8 @@ static struct clk *periph_clocks[] __initdata = { | |||
209 | }; | 208 | }; |
210 | 209 | ||
211 | static struct clk_lookup periph_clocks_lookups[] = { | 210 | static struct clk_lookup periph_clocks_lookups[] = { |
211 | /* One additional fake clock for macb_hclk */ | ||
212 | CLKDEV_CON_ID("hclk", &macb_clk), | ||
212 | /* One additional fake clock for ohci */ | 213 | /* One additional fake clock for ohci */ |
213 | CLKDEV_CON_ID("ohci_clk", &uhphs_clk), | 214 | CLKDEV_CON_ID("ohci_clk", &uhphs_clk), |
214 | CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk), | 215 | CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk), |
@@ -231,6 +232,11 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
231 | CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), | 232 | CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk), |
232 | /* fake hclk clock */ | 233 | /* fake hclk clock */ |
233 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), | 234 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), |
235 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
236 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
237 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
238 | CLKDEV_CON_ID("pioD", &pioDE_clk), | ||
239 | CLKDEV_CON_ID("pioE", &pioDE_clk), | ||
234 | }; | 240 | }; |
235 | 241 | ||
236 | static struct clk_lookup usart_clocks_lookups[] = { | 242 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -293,27 +299,22 @@ void __init at91sam9g45_set_console_clock(int id) | |||
293 | * GPIO | 299 | * GPIO |
294 | * -------------------------------------------------------------------- */ | 300 | * -------------------------------------------------------------------- */ |
295 | 301 | ||
296 | static struct at91_gpio_bank at91sam9g45_gpio[] = { | 302 | static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { |
297 | { | 303 | { |
298 | .id = AT91SAM9G45_ID_PIOA, | 304 | .id = AT91SAM9G45_ID_PIOA, |
299 | .offset = AT91_PIOA, | 305 | .regbase = AT91SAM9G45_BASE_PIOA, |
300 | .clock = &pioA_clk, | ||
301 | }, { | 306 | }, { |
302 | .id = AT91SAM9G45_ID_PIOB, | 307 | .id = AT91SAM9G45_ID_PIOB, |
303 | .offset = AT91_PIOB, | 308 | .regbase = AT91SAM9G45_BASE_PIOB, |
304 | .clock = &pioB_clk, | ||
305 | }, { | 309 | }, { |
306 | .id = AT91SAM9G45_ID_PIOC, | 310 | .id = AT91SAM9G45_ID_PIOC, |
307 | .offset = AT91_PIOC, | 311 | .regbase = AT91SAM9G45_BASE_PIOC, |
308 | .clock = &pioC_clk, | ||
309 | }, { | 312 | }, { |
310 | .id = AT91SAM9G45_ID_PIODE, | 313 | .id = AT91SAM9G45_ID_PIODE, |
311 | .offset = AT91_PIOD, | 314 | .regbase = AT91SAM9G45_BASE_PIOD, |
312 | .clock = &pioDE_clk, | ||
313 | }, { | 315 | }, { |
314 | .id = AT91SAM9G45_ID_PIODE, | 316 | .id = AT91SAM9G45_ID_PIODE, |
315 | .offset = AT91_PIOE, | 317 | .regbase = AT91SAM9G45_BASE_PIOE, |
316 | .clock = &pioDE_clk, | ||
317 | } | 318 | } |
318 | }; | 319 | }; |
319 | 320 | ||
@@ -322,12 +323,6 @@ static void at91sam9g45_reset(void) | |||
322 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | 323 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
323 | } | 324 | } |
324 | 325 | ||
325 | static void at91sam9g45_poweroff(void) | ||
326 | { | ||
327 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
328 | } | ||
329 | |||
330 | |||
331 | /* -------------------------------------------------------------------- | 326 | /* -------------------------------------------------------------------- |
332 | * AT91SAM9G45 processor initialization | 327 | * AT91SAM9G45 processor initialization |
333 | * -------------------------------------------------------------------- */ | 328 | * -------------------------------------------------------------------- */ |
@@ -338,10 +333,16 @@ static void __init at91sam9g45_map_io(void) | |||
338 | init_consistent_dma_size(SZ_4M); | 333 | init_consistent_dma_size(SZ_4M); |
339 | } | 334 | } |
340 | 335 | ||
336 | static void __init at91sam9g45_ioremap_registers(void) | ||
337 | { | ||
338 | at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC); | ||
339 | at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT); | ||
340 | at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC); | ||
341 | } | ||
342 | |||
341 | static void __init at91sam9g45_initialize(void) | 343 | static void __init at91sam9g45_initialize(void) |
342 | { | 344 | { |
343 | at91_arch_reset = at91sam9g45_reset; | 345 | at91_arch_reset = at91sam9g45_reset; |
344 | pm_power_off = at91sam9g45_poweroff; | ||
345 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); | 346 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); |
346 | 347 | ||
347 | /* Register GPIO subsystem */ | 348 | /* Register GPIO subsystem */ |
@@ -393,6 +394,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
393 | struct at91_init_soc __initdata at91sam9g45_soc = { | 394 | struct at91_init_soc __initdata at91sam9g45_soc = { |
394 | .map_io = at91sam9g45_map_io, | 395 | .map_io = at91sam9g45_map_io, |
395 | .default_irq_priority = at91sam9g45_default_irq_priority, | 396 | .default_irq_priority = at91sam9g45_default_irq_priority, |
397 | .ioremap_registers = at91sam9g45_ioremap_registers, | ||
396 | .register_clocks = at91sam9g45_register_clocks, | 398 | .register_clocks = at91sam9g45_register_clocks, |
397 | .init = at91sam9g45_initialize, | 399 | .init = at91sam9g45_initialize, |
398 | }; | 400 | }; |
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 09a16d6bd5cd..b7582dd10dc3 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -44,8 +44,8 @@ static struct at_dma_platform_data atdma_pdata = { | |||
44 | 44 | ||
45 | static struct resource hdmac_resources[] = { | 45 | static struct resource hdmac_resources[] = { |
46 | [0] = { | 46 | [0] = { |
47 | .start = AT91_BASE_SYS + AT91_DMA, | 47 | .start = AT91SAM9G45_BASE_DMA, |
48 | .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, | 48 | .end = AT91SAM9G45_BASE_DMA + SZ_512 - 1, |
49 | .flags = IORESOURCE_MEM, | 49 | .flags = IORESOURCE_MEM, |
50 | }, | 50 | }, |
51 | [1] = { | 51 | [1] = { |
@@ -120,7 +120,7 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) | |||
120 | 120 | ||
121 | /* Enable VBus control for UHP ports */ | 121 | /* Enable VBus control for UHP ports */ |
122 | for (i = 0; i < data->ports; i++) { | 122 | for (i = 0; i < data->ports; i++) { |
123 | if (data->vbus_pin[i]) | 123 | if (gpio_is_valid(data->vbus_pin[i])) |
124 | at91_set_gpio_output(data->vbus_pin[i], 0); | 124 | at91_set_gpio_output(data->vbus_pin[i], 0); |
125 | } | 125 | } |
126 | 126 | ||
@@ -181,7 +181,7 @@ void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) | |||
181 | 181 | ||
182 | /* Enable VBus control for UHP ports */ | 182 | /* Enable VBus control for UHP ports */ |
183 | for (i = 0; i < data->ports; i++) { | 183 | for (i = 0; i < data->ports; i++) { |
184 | if (data->vbus_pin[i]) | 184 | if (gpio_is_valid(data->vbus_pin[i])) |
185 | at91_set_gpio_output(data->vbus_pin[i], 0); | 185 | at91_set_gpio_output(data->vbus_pin[i], 0); |
186 | } | 186 | } |
187 | 187 | ||
@@ -263,7 +263,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
263 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); | 263 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); |
264 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); | 264 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); |
265 | 265 | ||
266 | if (data && data->vbus_pin > 0) { | 266 | if (data && gpio_is_valid(data->vbus_pin)) { |
267 | at91_set_gpio_input(data->vbus_pin, 0); | 267 | at91_set_gpio_input(data->vbus_pin, 0); |
268 | at91_set_deglitch(data->vbus_pin, 1); | 268 | at91_set_deglitch(data->vbus_pin, 1); |
269 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; | 269 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; |
@@ -284,7 +284,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {} | |||
284 | 284 | ||
285 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 285 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
286 | static u64 eth_dmamask = DMA_BIT_MASK(32); | 286 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
287 | static struct at91_eth_data eth_data; | 287 | static struct macb_platform_data eth_data; |
288 | 288 | ||
289 | static struct resource eth_resources[] = { | 289 | static struct resource eth_resources[] = { |
290 | [0] = { | 290 | [0] = { |
@@ -311,12 +311,12 @@ static struct platform_device at91sam9g45_eth_device = { | |||
311 | .num_resources = ARRAY_SIZE(eth_resources), | 311 | .num_resources = ARRAY_SIZE(eth_resources), |
312 | }; | 312 | }; |
313 | 313 | ||
314 | void __init at91_add_device_eth(struct at91_eth_data *data) | 314 | void __init at91_add_device_eth(struct macb_platform_data *data) |
315 | { | 315 | { |
316 | if (!data) | 316 | if (!data) |
317 | return; | 317 | return; |
318 | 318 | ||
319 | if (data->phy_irq_pin) { | 319 | if (gpio_is_valid(data->phy_irq_pin)) { |
320 | at91_set_gpio_input(data->phy_irq_pin, 0); | 320 | at91_set_gpio_input(data->phy_irq_pin, 0); |
321 | at91_set_deglitch(data->phy_irq_pin, 1); | 321 | at91_set_deglitch(data->phy_irq_pin, 1); |
322 | } | 322 | } |
@@ -348,7 +348,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) | |||
348 | platform_device_register(&at91sam9g45_eth_device); | 348 | platform_device_register(&at91sam9g45_eth_device); |
349 | } | 349 | } |
350 | #else | 350 | #else |
351 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | 351 | void __init at91_add_device_eth(struct macb_platform_data *data) {} |
352 | #endif | 352 | #endif |
353 | 353 | ||
354 | 354 | ||
@@ -449,11 +449,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) | |||
449 | 449 | ||
450 | 450 | ||
451 | /* input/irq */ | 451 | /* input/irq */ |
452 | if (data->slot[0].detect_pin) { | 452 | if (gpio_is_valid(data->slot[0].detect_pin)) { |
453 | at91_set_gpio_input(data->slot[0].detect_pin, 1); | 453 | at91_set_gpio_input(data->slot[0].detect_pin, 1); |
454 | at91_set_deglitch(data->slot[0].detect_pin, 1); | 454 | at91_set_deglitch(data->slot[0].detect_pin, 1); |
455 | } | 455 | } |
456 | if (data->slot[0].wp_pin) | 456 | if (gpio_is_valid(data->slot[0].wp_pin)) |
457 | at91_set_gpio_input(data->slot[0].wp_pin, 1); | 457 | at91_set_gpio_input(data->slot[0].wp_pin, 1); |
458 | 458 | ||
459 | if (mmc_id == 0) { /* MCI0 */ | 459 | if (mmc_id == 0) { /* MCI0 */ |
@@ -529,8 +529,8 @@ static struct resource nand_resources[] = { | |||
529 | .flags = IORESOURCE_MEM, | 529 | .flags = IORESOURCE_MEM, |
530 | }, | 530 | }, |
531 | [1] = { | 531 | [1] = { |
532 | .start = AT91_BASE_SYS + AT91_ECC, | 532 | .start = AT91SAM9G45_BASE_ECC, |
533 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | 533 | .end = AT91SAM9G45_BASE_ECC + SZ_512 - 1, |
534 | .flags = IORESOURCE_MEM, | 534 | .flags = IORESOURCE_MEM, |
535 | } | 535 | } |
536 | }; | 536 | }; |
@@ -556,15 +556,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
556 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); | 556 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); |
557 | 557 | ||
558 | /* enable pin */ | 558 | /* enable pin */ |
559 | if (data->enable_pin) | 559 | if (gpio_is_valid(data->enable_pin)) |
560 | at91_set_gpio_output(data->enable_pin, 1); | 560 | at91_set_gpio_output(data->enable_pin, 1); |
561 | 561 | ||
562 | /* ready/busy pin */ | 562 | /* ready/busy pin */ |
563 | if (data->rdy_pin) | 563 | if (gpio_is_valid(data->rdy_pin)) |
564 | at91_set_gpio_input(data->rdy_pin, 1); | 564 | at91_set_gpio_input(data->rdy_pin, 1); |
565 | 565 | ||
566 | /* card detect pin */ | 566 | /* card detect pin */ |
567 | if (data->det_pin) | 567 | if (gpio_is_valid(data->det_pin)) |
568 | at91_set_gpio_input(data->det_pin, 1); | 568 | at91_set_gpio_input(data->det_pin, 1); |
569 | 569 | ||
570 | nand_data = *data; | 570 | nand_data = *data; |
@@ -859,7 +859,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) | |||
859 | at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */ | 859 | at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */ |
860 | 860 | ||
861 | /* reset */ | 861 | /* reset */ |
862 | if (data->reset_pin) | 862 | if (gpio_is_valid(data->reset_pin)) |
863 | at91_set_gpio_output(data->reset_pin, 0); | 863 | at91_set_gpio_output(data->reset_pin, 0); |
864 | 864 | ||
865 | ac97_data = *data; | 865 | ac97_data = *data; |
@@ -1009,10 +1009,24 @@ static void __init at91_add_device_tc(void) { } | |||
1009 | * -------------------------------------------------------------------- */ | 1009 | * -------------------------------------------------------------------- */ |
1010 | 1010 | ||
1011 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) | 1011 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) |
1012 | static struct resource rtc_resources[] = { | ||
1013 | [0] = { | ||
1014 | .start = AT91SAM9G45_BASE_RTC, | ||
1015 | .end = AT91SAM9G45_BASE_RTC + SZ_256 - 1, | ||
1016 | .flags = IORESOURCE_MEM, | ||
1017 | }, | ||
1018 | [1] = { | ||
1019 | .start = AT91_ID_SYS, | ||
1020 | .end = AT91_ID_SYS, | ||
1021 | .flags = IORESOURCE_IRQ, | ||
1022 | }, | ||
1023 | }; | ||
1024 | |||
1012 | static struct platform_device at91sam9g45_rtc_device = { | 1025 | static struct platform_device at91sam9g45_rtc_device = { |
1013 | .name = "at91_rtc", | 1026 | .name = "at91_rtc", |
1014 | .id = -1, | 1027 | .id = -1, |
1015 | .num_resources = 0, | 1028 | .resource = rtc_resources, |
1029 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
1016 | }; | 1030 | }; |
1017 | 1031 | ||
1018 | static void __init at91_add_device_rtc(void) | 1032 | static void __init at91_add_device_rtc(void) |
@@ -1081,8 +1095,8 @@ void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {} | |||
1081 | 1095 | ||
1082 | static struct resource rtt_resources[] = { | 1096 | static struct resource rtt_resources[] = { |
1083 | { | 1097 | { |
1084 | .start = AT91_BASE_SYS + AT91_RTT, | 1098 | .start = AT91SAM9G45_BASE_RTT, |
1085 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 1099 | .end = AT91SAM9G45_BASE_RTT + SZ_16 - 1, |
1086 | .flags = IORESOURCE_MEM, | 1100 | .flags = IORESOURCE_MEM, |
1087 | } | 1101 | } |
1088 | }; | 1102 | }; |
@@ -1133,10 +1147,19 @@ static void __init at91_add_device_trng(void) {} | |||
1133 | * -------------------------------------------------------------------- */ | 1147 | * -------------------------------------------------------------------- */ |
1134 | 1148 | ||
1135 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 1149 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
1150 | static struct resource wdt_resources[] = { | ||
1151 | { | ||
1152 | .start = AT91SAM9G45_BASE_WDT, | ||
1153 | .end = AT91SAM9G45_BASE_WDT + SZ_16 - 1, | ||
1154 | .flags = IORESOURCE_MEM, | ||
1155 | } | ||
1156 | }; | ||
1157 | |||
1136 | static struct platform_device at91sam9g45_wdt_device = { | 1158 | static struct platform_device at91sam9g45_wdt_device = { |
1137 | .name = "at91_wdt", | 1159 | .name = "at91_wdt", |
1138 | .id = -1, | 1160 | .id = -1, |
1139 | .num_resources = 0, | 1161 | .resource = wdt_resources, |
1162 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
1140 | }; | 1163 | }; |
1141 | 1164 | ||
1142 | static void __init at91_add_device_watchdog(void) | 1165 | static void __init at91_add_device_watchdog(void) |
@@ -1332,8 +1355,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
1332 | #if defined(CONFIG_SERIAL_ATMEL) | 1355 | #if defined(CONFIG_SERIAL_ATMEL) |
1333 | static struct resource dbgu_resources[] = { | 1356 | static struct resource dbgu_resources[] = { |
1334 | [0] = { | 1357 | [0] = { |
1335 | .start = AT91_BASE_SYS + AT91_DBGU, | 1358 | .start = AT91SAM9G45_BASE_DBGU, |
1336 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 1359 | .end = AT91SAM9G45_BASE_DBGU + SZ_512 - 1, |
1337 | .flags = IORESOURCE_MEM, | 1360 | .flags = IORESOURCE_MEM, |
1338 | }, | 1361 | }, |
1339 | [1] = { | 1362 | [1] = { |
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index a238105d2c11..96247f68b9d2 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/pm.h> | ||
14 | 13 | ||
15 | #include <asm/irq.h> | 14 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 15 | #include <asm/mach/arch.h> |
@@ -20,11 +19,11 @@ | |||
20 | #include <mach/at91sam9rl.h> | 19 | #include <mach/at91sam9rl.h> |
21 | #include <mach/at91_pmc.h> | 20 | #include <mach/at91_pmc.h> |
22 | #include <mach/at91_rstc.h> | 21 | #include <mach/at91_rstc.h> |
23 | #include <mach/at91_shdwc.h> | ||
24 | 22 | ||
25 | #include "soc.h" | 23 | #include "soc.h" |
26 | #include "generic.h" | 24 | #include "generic.h" |
27 | #include "clock.h" | 25 | #include "clock.h" |
26 | #include "sam9_smc.h" | ||
28 | 27 | ||
29 | /* -------------------------------------------------------------------- | 28 | /* -------------------------------------------------------------------- |
30 | * Clocks | 29 | * Clocks |
@@ -184,6 +183,10 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
184 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), | 183 | CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk), |
185 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 184 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
186 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 185 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
186 | CLKDEV_CON_ID("pioA", &pioA_clk), | ||
187 | CLKDEV_CON_ID("pioB", &pioB_clk), | ||
188 | CLKDEV_CON_ID("pioC", &pioC_clk), | ||
189 | CLKDEV_CON_ID("pioD", &pioD_clk), | ||
187 | }; | 190 | }; |
188 | 191 | ||
189 | static struct clk_lookup usart_clocks_lookups[] = { | 192 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -243,32 +246,22 @@ void __init at91sam9rl_set_console_clock(int id) | |||
243 | * GPIO | 246 | * GPIO |
244 | * -------------------------------------------------------------------- */ | 247 | * -------------------------------------------------------------------- */ |
245 | 248 | ||
246 | static struct at91_gpio_bank at91sam9rl_gpio[] = { | 249 | static struct at91_gpio_bank at91sam9rl_gpio[] __initdata = { |
247 | { | 250 | { |
248 | .id = AT91SAM9RL_ID_PIOA, | 251 | .id = AT91SAM9RL_ID_PIOA, |
249 | .offset = AT91_PIOA, | 252 | .regbase = AT91SAM9RL_BASE_PIOA, |
250 | .clock = &pioA_clk, | ||
251 | }, { | 253 | }, { |
252 | .id = AT91SAM9RL_ID_PIOB, | 254 | .id = AT91SAM9RL_ID_PIOB, |
253 | .offset = AT91_PIOB, | 255 | .regbase = AT91SAM9RL_BASE_PIOB, |
254 | .clock = &pioB_clk, | ||
255 | }, { | 256 | }, { |
256 | .id = AT91SAM9RL_ID_PIOC, | 257 | .id = AT91SAM9RL_ID_PIOC, |
257 | .offset = AT91_PIOC, | 258 | .regbase = AT91SAM9RL_BASE_PIOC, |
258 | .clock = &pioC_clk, | ||
259 | }, { | 259 | }, { |
260 | .id = AT91SAM9RL_ID_PIOD, | 260 | .id = AT91SAM9RL_ID_PIOD, |
261 | .offset = AT91_PIOD, | 261 | .regbase = AT91SAM9RL_BASE_PIOD, |
262 | .clock = &pioD_clk, | ||
263 | } | 262 | } |
264 | }; | 263 | }; |
265 | 264 | ||
266 | static void at91sam9rl_poweroff(void) | ||
267 | { | ||
268 | at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
269 | } | ||
270 | |||
271 | |||
272 | /* -------------------------------------------------------------------- | 265 | /* -------------------------------------------------------------------- |
273 | * AT91SAM9RL processor initialization | 266 | * AT91SAM9RL processor initialization |
274 | * -------------------------------------------------------------------- */ | 267 | * -------------------------------------------------------------------- */ |
@@ -290,10 +283,16 @@ static void __init at91sam9rl_map_io(void) | |||
290 | at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); | 283 | at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size); |
291 | } | 284 | } |
292 | 285 | ||
286 | static void __init at91sam9rl_ioremap_registers(void) | ||
287 | { | ||
288 | at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC); | ||
289 | at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT); | ||
290 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); | ||
291 | } | ||
292 | |||
293 | static void __init at91sam9rl_initialize(void) | 293 | static void __init at91sam9rl_initialize(void) |
294 | { | 294 | { |
295 | at91_arch_reset = at91sam9_alt_reset; | 295 | at91_arch_reset = at91sam9_alt_reset; |
296 | pm_power_off = at91sam9rl_poweroff; | ||
297 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); | 296 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); |
298 | 297 | ||
299 | /* Register GPIO subsystem */ | 298 | /* Register GPIO subsystem */ |
@@ -345,6 +344,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = { | |||
345 | struct at91_init_soc __initdata at91sam9rl_soc = { | 344 | struct at91_init_soc __initdata at91sam9rl_soc = { |
346 | .map_io = at91sam9rl_map_io, | 345 | .map_io = at91sam9rl_map_io, |
347 | .default_irq_priority = at91sam9rl_default_irq_priority, | 346 | .default_irq_priority = at91sam9rl_default_irq_priority, |
347 | .ioremap_registers = at91sam9rl_ioremap_registers, | ||
348 | .register_clocks = at91sam9rl_register_clocks, | 348 | .register_clocks = at91sam9rl_register_clocks, |
349 | .init = at91sam9rl_initialize, | 349 | .init = at91sam9rl_initialize, |
350 | }; | 350 | }; |
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 628eb566d60c..61908dce9784 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c | |||
@@ -39,8 +39,8 @@ static struct at_dma_platform_data atdma_pdata = { | |||
39 | 39 | ||
40 | static struct resource hdmac_resources[] = { | 40 | static struct resource hdmac_resources[] = { |
41 | [0] = { | 41 | [0] = { |
42 | .start = AT91_BASE_SYS + AT91_DMA, | 42 | .start = AT91SAM9RL_BASE_DMA, |
43 | .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, | 43 | .end = AT91SAM9RL_BASE_DMA + SZ_512 - 1, |
44 | .flags = IORESOURCE_MEM, | 44 | .flags = IORESOURCE_MEM, |
45 | }, | 45 | }, |
46 | [2] = { | 46 | [2] = { |
@@ -147,7 +147,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) | |||
147 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); | 147 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); |
148 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); | 148 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); |
149 | 149 | ||
150 | if (data && data->vbus_pin > 0) { | 150 | if (data && gpio_is_valid(data->vbus_pin)) { |
151 | at91_set_gpio_input(data->vbus_pin, 0); | 151 | at91_set_gpio_input(data->vbus_pin, 0); |
152 | at91_set_deglitch(data->vbus_pin, 1); | 152 | at91_set_deglitch(data->vbus_pin, 1); |
153 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; | 153 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; |
@@ -201,13 +201,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |||
201 | return; | 201 | return; |
202 | 202 | ||
203 | /* input/irq */ | 203 | /* input/irq */ |
204 | if (data->det_pin) { | 204 | if (gpio_is_valid(data->det_pin)) { |
205 | at91_set_gpio_input(data->det_pin, 1); | 205 | at91_set_gpio_input(data->det_pin, 1); |
206 | at91_set_deglitch(data->det_pin, 1); | 206 | at91_set_deglitch(data->det_pin, 1); |
207 | } | 207 | } |
208 | if (data->wp_pin) | 208 | if (gpio_is_valid(data->wp_pin)) |
209 | at91_set_gpio_input(data->wp_pin, 1); | 209 | at91_set_gpio_input(data->wp_pin, 1); |
210 | if (data->vcc_pin) | 210 | if (gpio_is_valid(data->vcc_pin)) |
211 | at91_set_gpio_output(data->vcc_pin, 0); | 211 | at91_set_gpio_output(data->vcc_pin, 0); |
212 | 212 | ||
213 | /* CLK */ | 213 | /* CLK */ |
@@ -248,8 +248,8 @@ static struct resource nand_resources[] = { | |||
248 | .flags = IORESOURCE_MEM, | 248 | .flags = IORESOURCE_MEM, |
249 | }, | 249 | }, |
250 | [1] = { | 250 | [1] = { |
251 | .start = AT91_BASE_SYS + AT91_ECC, | 251 | .start = AT91SAM9RL_BASE_ECC, |
252 | .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | 252 | .end = AT91SAM9RL_BASE_ECC + SZ_512 - 1, |
253 | .flags = IORESOURCE_MEM, | 253 | .flags = IORESOURCE_MEM, |
254 | } | 254 | } |
255 | }; | 255 | }; |
@@ -275,15 +275,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) | |||
275 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); | 275 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
276 | 276 | ||
277 | /* enable pin */ | 277 | /* enable pin */ |
278 | if (data->enable_pin) | 278 | if (gpio_is_valid(data->enable_pin)) |
279 | at91_set_gpio_output(data->enable_pin, 1); | 279 | at91_set_gpio_output(data->enable_pin, 1); |
280 | 280 | ||
281 | /* ready/busy pin */ | 281 | /* ready/busy pin */ |
282 | if (data->rdy_pin) | 282 | if (gpio_is_valid(data->rdy_pin)) |
283 | at91_set_gpio_input(data->rdy_pin, 1); | 283 | at91_set_gpio_input(data->rdy_pin, 1); |
284 | 284 | ||
285 | /* card detect pin */ | 285 | /* card detect pin */ |
286 | if (data->det_pin) | 286 | if (gpio_is_valid(data->det_pin)) |
287 | at91_set_gpio_input(data->det_pin, 1); | 287 | at91_set_gpio_input(data->det_pin, 1); |
288 | 288 | ||
289 | at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ | 289 | at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ |
@@ -483,7 +483,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) | |||
483 | at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */ | 483 | at91_set_A_periph(AT91_PIN_PD4, 0); /* AC97RX */ |
484 | 484 | ||
485 | /* reset */ | 485 | /* reset */ |
486 | if (data->reset_pin) | 486 | if (gpio_is_valid(data->reset_pin)) |
487 | at91_set_gpio_output(data->reset_pin, 0); | 487 | at91_set_gpio_output(data->reset_pin, 0); |
488 | 488 | ||
489 | ac97_data = *data; | 489 | ac97_data = *data; |
@@ -685,8 +685,8 @@ static void __init at91_add_device_rtc(void) {} | |||
685 | 685 | ||
686 | static struct resource rtt_resources[] = { | 686 | static struct resource rtt_resources[] = { |
687 | { | 687 | { |
688 | .start = AT91_BASE_SYS + AT91_RTT, | 688 | .start = AT91SAM9RL_BASE_RTT, |
689 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | 689 | .end = AT91SAM9RL_BASE_RTT + SZ_16 - 1, |
690 | .flags = IORESOURCE_MEM, | 690 | .flags = IORESOURCE_MEM, |
691 | } | 691 | } |
692 | }; | 692 | }; |
@@ -709,10 +709,19 @@ static void __init at91_add_device_rtt(void) | |||
709 | * -------------------------------------------------------------------- */ | 709 | * -------------------------------------------------------------------- */ |
710 | 710 | ||
711 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | 711 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
712 | static struct resource wdt_resources[] = { | ||
713 | { | ||
714 | .start = AT91SAM9RL_BASE_WDT, | ||
715 | .end = AT91SAM9RL_BASE_WDT + SZ_16 - 1, | ||
716 | .flags = IORESOURCE_MEM, | ||
717 | } | ||
718 | }; | ||
719 | |||
712 | static struct platform_device at91sam9rl_wdt_device = { | 720 | static struct platform_device at91sam9rl_wdt_device = { |
713 | .name = "at91_wdt", | 721 | .name = "at91_wdt", |
714 | .id = -1, | 722 | .id = -1, |
715 | .num_resources = 0, | 723 | .resource = wdt_resources, |
724 | .num_resources = ARRAY_SIZE(wdt_resources), | ||
716 | }; | 725 | }; |
717 | 726 | ||
718 | static void __init at91_add_device_watchdog(void) | 727 | static void __init at91_add_device_watchdog(void) |
@@ -908,8 +917,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | |||
908 | #if defined(CONFIG_SERIAL_ATMEL) | 917 | #if defined(CONFIG_SERIAL_ATMEL) |
909 | static struct resource dbgu_resources[] = { | 918 | static struct resource dbgu_resources[] = { |
910 | [0] = { | 919 | [0] = { |
911 | .start = AT91_BASE_SYS + AT91_DBGU, | 920 | .start = AT91SAM9RL_BASE_DBGU, |
912 | .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | 921 | .end = AT91SAM9RL_BASE_DBGU + SZ_512 - 1, |
913 | .flags = IORESOURCE_MEM, | 922 | .flags = IORESOURCE_MEM, |
914 | }, | 923 | }, |
915 | [1] = { | 924 | [1] = { |
diff --git a/arch/arm/mach-at91/board-1arm.c b/arch/arm/mach-at91/board-1arm.c index 367d5cd5e362..2628384aaae1 100644 --- a/arch/arm/mach-at91/board-1arm.c +++ b/arch/arm/mach-at91/board-1arm.c | |||
@@ -63,13 +63,15 @@ static void __init onearm_init_early(void) | |||
63 | at91_set_serial_console(0); | 63 | at91_set_serial_console(0); |
64 | } | 64 | } |
65 | 65 | ||
66 | static struct at91_eth_data __initdata onearm_eth_data = { | 66 | static struct macb_platform_data __initdata onearm_eth_data = { |
67 | .phy_irq_pin = AT91_PIN_PC4, | 67 | .phy_irq_pin = AT91_PIN_PC4, |
68 | .is_rmii = 1, | 68 | .is_rmii = 1, |
69 | }; | 69 | }; |
70 | 70 | ||
71 | static struct at91_usbh_data __initdata onearm_usbh_data = { | 71 | static struct at91_usbh_data __initdata onearm_usbh_data = { |
72 | .ports = 1, | 72 | .ports = 1, |
73 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
74 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | static struct at91_udc_data __initdata onearm_udc_data = { | 77 | static struct at91_udc_data __initdata onearm_udc_data = { |
diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index 4282d96dffa8..3bb40694b02d 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c | |||
@@ -75,6 +75,8 @@ static void __init afeb9260_init_early(void) | |||
75 | */ | 75 | */ |
76 | static struct at91_usbh_data __initdata afeb9260_usbh_data = { | 76 | static struct at91_usbh_data __initdata afeb9260_usbh_data = { |
77 | .ports = 1, | 77 | .ports = 1, |
78 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
79 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
78 | }; | 80 | }; |
79 | 81 | ||
80 | /* | 82 | /* |
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata afeb9260_usbh_data = { | |||
82 | */ | 84 | */ |
83 | static struct at91_udc_data __initdata afeb9260_udc_data = { | 85 | static struct at91_udc_data __initdata afeb9260_udc_data = { |
84 | .vbus_pin = AT91_PIN_PC5, | 86 | .vbus_pin = AT91_PIN_PC5, |
85 | .pullup_pin = 0, /* pull-up driven by UDC */ | 87 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
86 | }; | 88 | }; |
87 | 89 | ||
88 | 90 | ||
@@ -103,7 +105,7 @@ static struct spi_board_info afeb9260_spi_devices[] = { | |||
103 | /* | 105 | /* |
104 | * MACB Ethernet device | 106 | * MACB Ethernet device |
105 | */ | 107 | */ |
106 | static struct at91_eth_data __initdata afeb9260_macb_data = { | 108 | static struct macb_platform_data __initdata afeb9260_macb_data = { |
107 | .phy_irq_pin = AT91_PIN_PA9, | 109 | .phy_irq_pin = AT91_PIN_PA9, |
108 | .is_rmii = 0, | 110 | .is_rmii = 0, |
109 | }; | 111 | }; |
@@ -138,6 +140,7 @@ static struct atmel_nand_data __initdata afeb9260_nand_data = { | |||
138 | .bus_width_16 = 0, | 140 | .bus_width_16 = 0, |
139 | .parts = afeb9260_nand_partition, | 141 | .parts = afeb9260_nand_partition, |
140 | .num_parts = ARRAY_SIZE(afeb9260_nand_partition), | 142 | .num_parts = ARRAY_SIZE(afeb9260_nand_partition), |
143 | .det_pin = -EINVAL, | ||
141 | }; | 144 | }; |
142 | 145 | ||
143 | 146 | ||
@@ -149,6 +152,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = { | |||
149 | .wp_pin = AT91_PIN_PC4, | 152 | .wp_pin = AT91_PIN_PC4, |
150 | .slot_b = 1, | 153 | .slot_b = 1, |
151 | .wire4 = 1, | 154 | .wire4 = 1, |
155 | .vcc_pin = -EINVAL, | ||
152 | }; | 156 | }; |
153 | 157 | ||
154 | 158 | ||
@@ -169,6 +173,8 @@ static struct i2c_board_info __initdata afeb9260_i2c_devices[] = { | |||
169 | static struct at91_cf_data afeb9260_cf_data = { | 173 | static struct at91_cf_data afeb9260_cf_data = { |
170 | .chipselect = 4, | 174 | .chipselect = 4, |
171 | .irq_pin = AT91_PIN_PA6, | 175 | .irq_pin = AT91_PIN_PA6, |
176 | .det_pin = -EINVAL, | ||
177 | .vcc_pin = -EINVAL, | ||
172 | .rst_pin = AT91_PIN_PA7, | 178 | .rst_pin = AT91_PIN_PA7, |
173 | .flags = AT91_CF_TRUE_IDE, | 179 | .flags = AT91_CF_TRUE_IDE, |
174 | }; | 180 | }; |
diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index f90cfb32bad2..8510e9e54988 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c | |||
@@ -62,6 +62,8 @@ static void __init cam60_init_early(void) | |||
62 | */ | 62 | */ |
63 | static struct at91_usbh_data __initdata cam60_usbh_data = { | 63 | static struct at91_usbh_data __initdata cam60_usbh_data = { |
64 | .ports = 1, | 64 | .ports = 1, |
65 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
66 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
65 | }; | 67 | }; |
66 | 68 | ||
67 | 69 | ||
@@ -115,7 +117,7 @@ static struct spi_board_info cam60_spi_devices[] __initdata = { | |||
115 | /* | 117 | /* |
116 | * MACB Ethernet device | 118 | * MACB Ethernet device |
117 | */ | 119 | */ |
118 | static struct __initdata at91_eth_data cam60_macb_data = { | 120 | static struct __initdata macb_platform_data cam60_macb_data = { |
119 | .phy_irq_pin = AT91_PIN_PB5, | 121 | .phy_irq_pin = AT91_PIN_PB5, |
120 | .is_rmii = 0, | 122 | .is_rmii = 0, |
121 | }; | 123 | }; |
@@ -135,7 +137,7 @@ static struct mtd_partition __initdata cam60_nand_partition[] = { | |||
135 | static struct atmel_nand_data __initdata cam60_nand_data = { | 137 | static struct atmel_nand_data __initdata cam60_nand_data = { |
136 | .ale = 21, | 138 | .ale = 21, |
137 | .cle = 22, | 139 | .cle = 22, |
138 | // .det_pin = ... not there | 140 | .det_pin = -EINVAL, |
139 | .rdy_pin = AT91_PIN_PA9, | 141 | .rdy_pin = AT91_PIN_PA9, |
140 | .enable_pin = AT91_PIN_PA7, | 142 | .enable_pin = AT91_PIN_PA7, |
141 | .parts = cam60_nand_partition, | 143 | .parts = cam60_nand_partition, |
@@ -163,7 +165,7 @@ static struct sam9_smc_config __initdata cam60_nand_smc_config = { | |||
163 | static void __init cam60_add_device_nand(void) | 165 | static void __init cam60_add_device_nand(void) |
164 | { | 166 | { |
165 | /* configure chip-select 3 (NAND) */ | 167 | /* configure chip-select 3 (NAND) */ |
166 | sam9_smc_configure(3, &cam60_nand_smc_config); | 168 | sam9_smc_configure(0, 3, &cam60_nand_smc_config); |
167 | 169 | ||
168 | at91_add_device_nand(&cam60_nand_data); | 170 | at91_add_device_nand(&cam60_nand_data); |
169 | } | 171 | } |
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index 5dffd3be62d2..ac3de4f7c31d 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c | |||
@@ -70,6 +70,8 @@ static void __init cap9adk_init_early(void) | |||
70 | */ | 70 | */ |
71 | static struct at91_usbh_data __initdata cap9adk_usbh_data = { | 71 | static struct at91_usbh_data __initdata cap9adk_usbh_data = { |
72 | .ports = 2, | 72 | .ports = 2, |
73 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
74 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | /* | 77 | /* |
@@ -144,16 +146,17 @@ static struct spi_board_info cap9adk_spi_devices[] = { | |||
144 | */ | 146 | */ |
145 | static struct at91_mmc_data __initdata cap9adk_mmc_data = { | 147 | static struct at91_mmc_data __initdata cap9adk_mmc_data = { |
146 | .wire4 = 1, | 148 | .wire4 = 1, |
147 | // .det_pin = ... not connected | 149 | .det_pin = -EINVAL, |
148 | // .wp_pin = ... not connected | 150 | .wp_pin = -EINVAL, |
149 | // .vcc_pin = ... not connected | 151 | .vcc_pin = -EINVAL, |
150 | }; | 152 | }; |
151 | 153 | ||
152 | 154 | ||
153 | /* | 155 | /* |
154 | * MACB Ethernet device | 156 | * MACB Ethernet device |
155 | */ | 157 | */ |
156 | static struct at91_eth_data __initdata cap9adk_macb_data = { | 158 | static struct macb_platform_data __initdata cap9adk_macb_data = { |
159 | .phy_irq_pin = -EINVAL, | ||
157 | .is_rmii = 1, | 160 | .is_rmii = 1, |
158 | }; | 161 | }; |
159 | 162 | ||
@@ -172,8 +175,8 @@ static struct mtd_partition __initdata cap9adk_nand_partitions[] = { | |||
172 | static struct atmel_nand_data __initdata cap9adk_nand_data = { | 175 | static struct atmel_nand_data __initdata cap9adk_nand_data = { |
173 | .ale = 21, | 176 | .ale = 21, |
174 | .cle = 22, | 177 | .cle = 22, |
175 | // .det_pin = ... not connected | 178 | .det_pin = -EINVAL, |
176 | // .rdy_pin = ... not connected | 179 | .rdy_pin = -EINVAL, |
177 | .enable_pin = AT91_PIN_PD15, | 180 | .enable_pin = AT91_PIN_PD15, |
178 | .parts = cap9adk_nand_partitions, | 181 | .parts = cap9adk_nand_partitions, |
179 | .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), | 182 | .num_parts = ARRAY_SIZE(cap9adk_nand_partitions), |
@@ -212,7 +215,7 @@ static void __init cap9adk_add_device_nand(void) | |||
212 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; | 215 | cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8; |
213 | 216 | ||
214 | /* configure chip-select 3 (NAND) */ | 217 | /* configure chip-select 3 (NAND) */ |
215 | sam9_smc_configure(3, &cap9adk_nand_smc_config); | 218 | sam9_smc_configure(0, 3, &cap9adk_nand_smc_config); |
216 | 219 | ||
217 | at91_add_device_nand(&cap9adk_nand_data); | 220 | at91_add_device_nand(&cap9adk_nand_data); |
218 | } | 221 | } |
@@ -282,7 +285,7 @@ static __init void cap9adk_add_device_nor(void) | |||
282 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); | 285 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); |
283 | 286 | ||
284 | /* configure chip-select 0 (NOR) */ | 287 | /* configure chip-select 0 (NOR) */ |
285 | sam9_smc_configure(0, &cap9adk_nor_smc_config); | 288 | sam9_smc_configure(0, 0, &cap9adk_nor_smc_config); |
286 | 289 | ||
287 | platform_device_register(&cap9adk_nor_flash); | 290 | platform_device_register(&cap9adk_nor_flash); |
288 | } | 291 | } |
@@ -351,7 +354,7 @@ static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data; | |||
351 | * AC97 | 354 | * AC97 |
352 | */ | 355 | */ |
353 | static struct ac97c_platform_data cap9adk_ac97_data = { | 356 | static struct ac97c_platform_data cap9adk_ac97_data = { |
354 | // .reset_pin = ... not connected | 357 | .reset_pin = -EINVAL, |
355 | }; | 358 | }; |
356 | 359 | ||
357 | 360 | ||
diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 774c87fcbd5b..59d9cf997537 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c | |||
@@ -57,13 +57,15 @@ static void __init carmeva_init_early(void) | |||
57 | at91_set_serial_console(0); | 57 | at91_set_serial_console(0); |
58 | } | 58 | } |
59 | 59 | ||
60 | static struct at91_eth_data __initdata carmeva_eth_data = { | 60 | static struct macb_platform_data __initdata carmeva_eth_data = { |
61 | .phy_irq_pin = AT91_PIN_PC4, | 61 | .phy_irq_pin = AT91_PIN_PC4, |
62 | .is_rmii = 1, | 62 | .is_rmii = 1, |
63 | }; | 63 | }; |
64 | 64 | ||
65 | static struct at91_usbh_data __initdata carmeva_usbh_data = { | 65 | static struct at91_usbh_data __initdata carmeva_usbh_data = { |
66 | .ports = 2, | 66 | .ports = 2, |
67 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
68 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
67 | }; | 69 | }; |
68 | 70 | ||
69 | static struct at91_udc_data __initdata carmeva_udc_data = { | 71 | static struct at91_udc_data __initdata carmeva_udc_data = { |
@@ -75,8 +77,8 @@ static struct at91_udc_data __initdata carmeva_udc_data = { | |||
75 | // static struct at91_cf_data __initdata carmeva_cf_data = { | 77 | // static struct at91_cf_data __initdata carmeva_cf_data = { |
76 | // .det_pin = AT91_PIN_PB0, | 78 | // .det_pin = AT91_PIN_PB0, |
77 | // .rst_pin = AT91_PIN_PC5, | 79 | // .rst_pin = AT91_PIN_PC5, |
78 | // .irq_pin = ... not connected | 80 | // .irq_pin = -EINVAL, |
79 | // .vcc_pin = ... always powered | 81 | // .vcc_pin = -EINVAL, |
80 | // }; | 82 | // }; |
81 | 83 | ||
82 | static struct at91_mmc_data __initdata carmeva_mmc_data = { | 84 | static struct at91_mmc_data __initdata carmeva_mmc_data = { |
@@ -84,6 +86,7 @@ static struct at91_mmc_data __initdata carmeva_mmc_data = { | |||
84 | .wire4 = 1, | 86 | .wire4 = 1, |
85 | .det_pin = AT91_PIN_PB10, | 87 | .det_pin = AT91_PIN_PB10, |
86 | .wp_pin = AT91_PIN_PC14, | 88 | .wp_pin = AT91_PIN_PC14, |
89 | .vcc_pin = -EINVAL, | ||
87 | }; | 90 | }; |
88 | 91 | ||
89 | static struct spi_board_info carmeva_spi_devices[] = { | 92 | static struct spi_board_info carmeva_spi_devices[] = { |
diff --git a/arch/arm/mach-at91/board-cpu9krea.c b/arch/arm/mach-at91/board-cpu9krea.c index fc885a4ce243..9ab3d1ea326d 100644 --- a/arch/arm/mach-at91/board-cpu9krea.c +++ b/arch/arm/mach-at91/board-cpu9krea.c | |||
@@ -86,6 +86,8 @@ static void __init cpu9krea_init_early(void) | |||
86 | */ | 86 | */ |
87 | static struct at91_usbh_data __initdata cpu9krea_usbh_data = { | 87 | static struct at91_usbh_data __initdata cpu9krea_usbh_data = { |
88 | .ports = 2, | 88 | .ports = 2, |
89 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
90 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
89 | }; | 91 | }; |
90 | 92 | ||
91 | /* | 93 | /* |
@@ -93,13 +95,14 @@ static struct at91_usbh_data __initdata cpu9krea_usbh_data = { | |||
93 | */ | 95 | */ |
94 | static struct at91_udc_data __initdata cpu9krea_udc_data = { | 96 | static struct at91_udc_data __initdata cpu9krea_udc_data = { |
95 | .vbus_pin = AT91_PIN_PC8, | 97 | .vbus_pin = AT91_PIN_PC8, |
96 | .pullup_pin = 0, /* pull-up driven by UDC */ | 98 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
97 | }; | 99 | }; |
98 | 100 | ||
99 | /* | 101 | /* |
100 | * MACB Ethernet device | 102 | * MACB Ethernet device |
101 | */ | 103 | */ |
102 | static struct at91_eth_data __initdata cpu9krea_macb_data = { | 104 | static struct macb_platform_data __initdata cpu9krea_macb_data = { |
105 | .phy_irq_pin = -EINVAL, | ||
103 | .is_rmii = 1, | 106 | .is_rmii = 1, |
104 | }; | 107 | }; |
105 | 108 | ||
@@ -112,6 +115,7 @@ static struct atmel_nand_data __initdata cpu9krea_nand_data = { | |||
112 | .rdy_pin = AT91_PIN_PC13, | 115 | .rdy_pin = AT91_PIN_PC13, |
113 | .enable_pin = AT91_PIN_PC14, | 116 | .enable_pin = AT91_PIN_PC14, |
114 | .bus_width_16 = 0, | 117 | .bus_width_16 = 0, |
118 | .det_pin = -EINVAL, | ||
115 | }; | 119 | }; |
116 | 120 | ||
117 | #ifdef CONFIG_MACH_CPU9260 | 121 | #ifdef CONFIG_MACH_CPU9260 |
@@ -156,7 +160,7 @@ static struct sam9_smc_config __initdata cpu9krea_nand_smc_config = { | |||
156 | 160 | ||
157 | static void __init cpu9krea_add_device_nand(void) | 161 | static void __init cpu9krea_add_device_nand(void) |
158 | { | 162 | { |
159 | sam9_smc_configure(3, &cpu9krea_nand_smc_config); | 163 | sam9_smc_configure(0, 3, &cpu9krea_nand_smc_config); |
160 | at91_add_device_nand(&cpu9krea_nand_data); | 164 | at91_add_device_nand(&cpu9krea_nand_data); |
161 | } | 165 | } |
162 | 166 | ||
@@ -238,7 +242,7 @@ static __init void cpu9krea_add_device_nor(void) | |||
238 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); | 242 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_VDDIOMSEL_3_3V); |
239 | 243 | ||
240 | /* configure chip-select 0 (NOR) */ | 244 | /* configure chip-select 0 (NOR) */ |
241 | sam9_smc_configure(0, &cpu9krea_nor_smc_config); | 245 | sam9_smc_configure(0, 0, &cpu9krea_nor_smc_config); |
242 | 246 | ||
243 | platform_device_register(&cpu9krea_nor_flash); | 247 | platform_device_register(&cpu9krea_nor_flash); |
244 | } | 248 | } |
@@ -337,6 +341,8 @@ static struct at91_mmc_data __initdata cpu9krea_mmc_data = { | |||
337 | .slot_b = 0, | 341 | .slot_b = 0, |
338 | .wire4 = 1, | 342 | .wire4 = 1, |
339 | .det_pin = AT91_PIN_PA29, | 343 | .det_pin = AT91_PIN_PA29, |
344 | .wp_pin = -EINVAL, | ||
345 | .vcc_pin = -EINVAL, | ||
340 | }; | 346 | }; |
341 | 347 | ||
342 | static void __init cpu9krea_board_init(void) | 348 | static void __init cpu9krea_board_init(void) |
diff --git a/arch/arm/mach-at91/board-cpuat91.c b/arch/arm/mach-at91/board-cpuat91.c index d35e65b08ccd..368e1427ad99 100644 --- a/arch/arm/mach-at91/board-cpuat91.c +++ b/arch/arm/mach-at91/board-cpuat91.c | |||
@@ -82,12 +82,15 @@ static void __init cpuat91_init_early(void) | |||
82 | at91_set_serial_console(0); | 82 | at91_set_serial_console(0); |
83 | } | 83 | } |
84 | 84 | ||
85 | static struct at91_eth_data __initdata cpuat91_eth_data = { | 85 | static struct macb_platform_data __initdata cpuat91_eth_data = { |
86 | .phy_irq_pin = -EINVAL, | ||
86 | .is_rmii = 1, | 87 | .is_rmii = 1, |
87 | }; | 88 | }; |
88 | 89 | ||
89 | static struct at91_usbh_data __initdata cpuat91_usbh_data = { | 90 | static struct at91_usbh_data __initdata cpuat91_usbh_data = { |
90 | .ports = 1, | 91 | .ports = 1, |
92 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
93 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
91 | }; | 94 | }; |
92 | 95 | ||
93 | static struct at91_udc_data __initdata cpuat91_udc_data = { | 96 | static struct at91_udc_data __initdata cpuat91_udc_data = { |
@@ -98,6 +101,8 @@ static struct at91_udc_data __initdata cpuat91_udc_data = { | |||
98 | static struct at91_mmc_data __initdata cpuat91_mmc_data = { | 101 | static struct at91_mmc_data __initdata cpuat91_mmc_data = { |
99 | .det_pin = AT91_PIN_PC2, | 102 | .det_pin = AT91_PIN_PC2, |
100 | .wire4 = 1, | 103 | .wire4 = 1, |
104 | .wp_pin = -EINVAL, | ||
105 | .vcc_pin = -EINVAL, | ||
101 | }; | 106 | }; |
102 | 107 | ||
103 | static struct physmap_flash_data cpuat91_flash_data = { | 108 | static struct physmap_flash_data cpuat91_flash_data = { |
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index c3936665e645..1a1547b1ce4e 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c | |||
@@ -58,18 +58,20 @@ static void __init csb337_init_early(void) | |||
58 | at91_set_serial_console(0); | 58 | at91_set_serial_console(0); |
59 | } | 59 | } |
60 | 60 | ||
61 | static struct at91_eth_data __initdata csb337_eth_data = { | 61 | static struct macb_platform_data __initdata csb337_eth_data = { |
62 | .phy_irq_pin = AT91_PIN_PC2, | 62 | .phy_irq_pin = AT91_PIN_PC2, |
63 | .is_rmii = 0, | 63 | .is_rmii = 0, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | static struct at91_usbh_data __initdata csb337_usbh_data = { | 66 | static struct at91_usbh_data __initdata csb337_usbh_data = { |
67 | .ports = 2, | 67 | .ports = 2, |
68 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
69 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
68 | }; | 70 | }; |
69 | 71 | ||
70 | static struct at91_udc_data __initdata csb337_udc_data = { | 72 | static struct at91_udc_data __initdata csb337_udc_data = { |
71 | // this has no VBUS sensing pin | ||
72 | .pullup_pin = AT91_PIN_PA24, | 73 | .pullup_pin = AT91_PIN_PA24, |
74 | .vbus_pin = -EINVAL, | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | static struct i2c_board_info __initdata csb337_i2c_devices[] = { | 77 | static struct i2c_board_info __initdata csb337_i2c_devices[] = { |
@@ -98,6 +100,7 @@ static struct at91_mmc_data __initdata csb337_mmc_data = { | |||
98 | .slot_b = 0, | 100 | .slot_b = 0, |
99 | .wire4 = 1, | 101 | .wire4 = 1, |
100 | .wp_pin = AT91_PIN_PD6, | 102 | .wp_pin = AT91_PIN_PD6, |
103 | .vcc_pin = -EINVAL, | ||
101 | }; | 104 | }; |
102 | 105 | ||
103 | static struct spi_board_info csb337_spi_devices[] = { | 106 | static struct spi_board_info csb337_spi_devices[] = { |
diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index 586100e2acbb..f650bf39455d 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c | |||
@@ -52,13 +52,15 @@ static void __init csb637_init_early(void) | |||
52 | at91_set_serial_console(0); | 52 | at91_set_serial_console(0); |
53 | } | 53 | } |
54 | 54 | ||
55 | static struct at91_eth_data __initdata csb637_eth_data = { | 55 | static struct macb_platform_data __initdata csb637_eth_data = { |
56 | .phy_irq_pin = AT91_PIN_PC0, | 56 | .phy_irq_pin = AT91_PIN_PC0, |
57 | .is_rmii = 0, | 57 | .is_rmii = 0, |
58 | }; | 58 | }; |
59 | 59 | ||
60 | static struct at91_usbh_data __initdata csb637_usbh_data = { | 60 | static struct at91_usbh_data __initdata csb637_usbh_data = { |
61 | .ports = 2, | 61 | .ports = 2, |
62 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
63 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
62 | }; | 64 | }; |
63 | 65 | ||
64 | static struct at91_udc_data __initdata csb637_udc_data = { | 66 | static struct at91_udc_data __initdata csb637_udc_data = { |
diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt.c index 0b7d32778210..bb6b434ec0c1 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt.c | |||
@@ -50,6 +50,7 @@ static void __init ek_init_early(void) | |||
50 | static struct atmel_nand_data __initdata ek_nand_data = { | 50 | static struct atmel_nand_data __initdata ek_nand_data = { |
51 | .ale = 21, | 51 | .ale = 21, |
52 | .cle = 22, | 52 | .cle = 22, |
53 | .det_pin = -EINVAL, | ||
53 | .rdy_pin = AT91_PIN_PC8, | 54 | .rdy_pin = AT91_PIN_PC8, |
54 | .enable_pin = AT91_PIN_PC14, | 55 | .enable_pin = AT91_PIN_PC14, |
55 | }; | 56 | }; |
@@ -82,7 +83,7 @@ static void __init ek_add_device_nand(void) | |||
82 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 83 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
83 | 84 | ||
84 | /* configure chip-select 3 (NAND) */ | 85 | /* configure chip-select 3 (NAND) */ |
85 | sam9_smc_configure(3, &ek_nand_smc_config); | 86 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
86 | 87 | ||
87 | at91_add_device_nand(&ek_nand_data); | 88 | at91_add_device_nand(&ek_nand_data); |
88 | } | 89 | } |
diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index 45db7a3dbef0..d302ca3eeb64 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c | |||
@@ -60,13 +60,15 @@ static void __init eb9200_init_early(void) | |||
60 | at91_set_serial_console(0); | 60 | at91_set_serial_console(0); |
61 | } | 61 | } |
62 | 62 | ||
63 | static struct at91_eth_data __initdata eb9200_eth_data = { | 63 | static struct macb_platform_data __initdata eb9200_eth_data = { |
64 | .phy_irq_pin = AT91_PIN_PC4, | 64 | .phy_irq_pin = AT91_PIN_PC4, |
65 | .is_rmii = 1, | 65 | .is_rmii = 1, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | static struct at91_usbh_data __initdata eb9200_usbh_data = { | 68 | static struct at91_usbh_data __initdata eb9200_usbh_data = { |
69 | .ports = 2, | 69 | .ports = 2, |
70 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
71 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
70 | }; | 72 | }; |
71 | 73 | ||
72 | static struct at91_udc_data __initdata eb9200_udc_data = { | 74 | static struct at91_udc_data __initdata eb9200_udc_data = { |
@@ -75,15 +77,18 @@ static struct at91_udc_data __initdata eb9200_udc_data = { | |||
75 | }; | 77 | }; |
76 | 78 | ||
77 | static struct at91_cf_data __initdata eb9200_cf_data = { | 79 | static struct at91_cf_data __initdata eb9200_cf_data = { |
80 | .irq_pin = -EINVAL, | ||
78 | .det_pin = AT91_PIN_PB0, | 81 | .det_pin = AT91_PIN_PB0, |
82 | .vcc_pin = -EINVAL, | ||
79 | .rst_pin = AT91_PIN_PC5, | 83 | .rst_pin = AT91_PIN_PC5, |
80 | // .irq_pin = ... not connected | ||
81 | // .vcc_pin = ... always powered | ||
82 | }; | 84 | }; |
83 | 85 | ||
84 | static struct at91_mmc_data __initdata eb9200_mmc_data = { | 86 | static struct at91_mmc_data __initdata eb9200_mmc_data = { |
85 | .slot_b = 0, | 87 | .slot_b = 0, |
86 | .wire4 = 1, | 88 | .wire4 = 1, |
89 | .det_pin = -EINVAL, | ||
90 | .wp_pin = -EINVAL, | ||
91 | .vcc_pin = -EINVAL, | ||
87 | }; | 92 | }; |
88 | 93 | ||
89 | static struct i2c_board_info __initdata eb9200_i2c_devices[] = { | 94 | static struct i2c_board_info __initdata eb9200_i2c_devices[] = { |
diff --git a/arch/arm/mach-at91/board-ecbat91.c b/arch/arm/mach-at91/board-ecbat91.c index 2f9c16d29212..69966ce4d776 100644 --- a/arch/arm/mach-at91/board-ecbat91.c +++ b/arch/arm/mach-at91/board-ecbat91.c | |||
@@ -64,18 +64,23 @@ static void __init ecb_at91init_early(void) | |||
64 | at91_set_serial_console(0); | 64 | at91_set_serial_console(0); |
65 | } | 65 | } |
66 | 66 | ||
67 | static struct at91_eth_data __initdata ecb_at91eth_data = { | 67 | static struct macb_platform_data __initdata ecb_at91eth_data = { |
68 | .phy_irq_pin = AT91_PIN_PC4, | 68 | .phy_irq_pin = AT91_PIN_PC4, |
69 | .is_rmii = 0, | 69 | .is_rmii = 0, |
70 | }; | 70 | }; |
71 | 71 | ||
72 | static struct at91_usbh_data __initdata ecb_at91usbh_data = { | 72 | static struct at91_usbh_data __initdata ecb_at91usbh_data = { |
73 | .ports = 1, | 73 | .ports = 1, |
74 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
75 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
74 | }; | 76 | }; |
75 | 77 | ||
76 | static struct at91_mmc_data __initdata ecb_at91mmc_data = { | 78 | static struct at91_mmc_data __initdata ecb_at91mmc_data = { |
77 | .slot_b = 0, | 79 | .slot_b = 0, |
78 | .wire4 = 1, | 80 | .wire4 = 1, |
81 | .det_pin = -EINVAL, | ||
82 | .wp_pin = -EINVAL, | ||
83 | .vcc_pin = -EINVAL, | ||
79 | }; | 84 | }; |
80 | 85 | ||
81 | 86 | ||
diff --git a/arch/arm/mach-at91/board-eco920.c b/arch/arm/mach-at91/board-eco920.c index 8252c722607b..07ef35b0ec2c 100644 --- a/arch/arm/mach-at91/board-eco920.c +++ b/arch/arm/mach-at91/board-eco920.c | |||
@@ -47,13 +47,15 @@ static void __init eco920_init_early(void) | |||
47 | at91_set_serial_console(0); | 47 | at91_set_serial_console(0); |
48 | } | 48 | } |
49 | 49 | ||
50 | static struct at91_eth_data __initdata eco920_eth_data = { | 50 | static struct macb_platform_data __initdata eco920_eth_data = { |
51 | .phy_irq_pin = AT91_PIN_PC2, | 51 | .phy_irq_pin = AT91_PIN_PC2, |
52 | .is_rmii = 1, | 52 | .is_rmii = 1, |
53 | }; | 53 | }; |
54 | 54 | ||
55 | static struct at91_usbh_data __initdata eco920_usbh_data = { | 55 | static struct at91_usbh_data __initdata eco920_usbh_data = { |
56 | .ports = 1, | 56 | .ports = 1, |
57 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
58 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
57 | }; | 59 | }; |
58 | 60 | ||
59 | static struct at91_udc_data __initdata eco920_udc_data = { | 61 | static struct at91_udc_data __initdata eco920_udc_data = { |
@@ -64,6 +66,9 @@ static struct at91_udc_data __initdata eco920_udc_data = { | |||
64 | static struct at91_mmc_data __initdata eco920_mmc_data = { | 66 | static struct at91_mmc_data __initdata eco920_mmc_data = { |
65 | .slot_b = 0, | 67 | .slot_b = 0, |
66 | .wire4 = 0, | 68 | .wire4 = 0, |
69 | .det_pin = -EINVAL, | ||
70 | .wp_pin = -EINVAL, | ||
71 | .vcc_pin = -EINVAL, | ||
67 | }; | 72 | }; |
68 | 73 | ||
69 | static struct physmap_flash_data eco920_flash_data = { | 74 | static struct physmap_flash_data eco920_flash_data = { |
diff --git a/arch/arm/mach-at91/board-flexibity.c b/arch/arm/mach-at91/board-flexibity.c index 4c3f65d9c59b..eec02cd57ced 100644 --- a/arch/arm/mach-at91/board-flexibity.c +++ b/arch/arm/mach-at91/board-flexibity.c | |||
@@ -52,12 +52,14 @@ static void __init flexibity_init_early(void) | |||
52 | /* USB Host port */ | 52 | /* USB Host port */ |
53 | static struct at91_usbh_data __initdata flexibity_usbh_data = { | 53 | static struct at91_usbh_data __initdata flexibity_usbh_data = { |
54 | .ports = 2, | 54 | .ports = 2, |
55 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
56 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
55 | }; | 57 | }; |
56 | 58 | ||
57 | /* USB Device port */ | 59 | /* USB Device port */ |
58 | static struct at91_udc_data __initdata flexibity_udc_data = { | 60 | static struct at91_udc_data __initdata flexibity_udc_data = { |
59 | .vbus_pin = AT91_PIN_PC5, | 61 | .vbus_pin = AT91_PIN_PC5, |
60 | .pullup_pin = 0, /* pull-up driven by UDC */ | 62 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
61 | }; | 63 | }; |
62 | 64 | ||
63 | /* SPI devices */ | 65 | /* SPI devices */ |
@@ -76,6 +78,7 @@ static struct at91_mmc_data __initdata flexibity_mmc_data = { | |||
76 | .wire4 = 1, | 78 | .wire4 = 1, |
77 | .det_pin = AT91_PIN_PC9, | 79 | .det_pin = AT91_PIN_PC9, |
78 | .wp_pin = AT91_PIN_PC4, | 80 | .wp_pin = AT91_PIN_PC4, |
81 | .vcc_pin = -EINVAL, | ||
79 | }; | 82 | }; |
80 | 83 | ||
81 | /* LEDs */ | 84 | /* LEDs */ |
diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index f27d1a780cfa..caf017f0f4ee 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c | |||
@@ -106,6 +106,8 @@ static void __init foxg20_init_early(void) | |||
106 | */ | 106 | */ |
107 | static struct at91_usbh_data __initdata foxg20_usbh_data = { | 107 | static struct at91_usbh_data __initdata foxg20_usbh_data = { |
108 | .ports = 2, | 108 | .ports = 2, |
109 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
110 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
109 | }; | 111 | }; |
110 | 112 | ||
111 | /* | 113 | /* |
@@ -113,7 +115,7 @@ static struct at91_usbh_data __initdata foxg20_usbh_data = { | |||
113 | */ | 115 | */ |
114 | static struct at91_udc_data __initdata foxg20_udc_data = { | 116 | static struct at91_udc_data __initdata foxg20_udc_data = { |
115 | .vbus_pin = AT91_PIN_PC6, | 117 | .vbus_pin = AT91_PIN_PC6, |
116 | .pullup_pin = 0, /* pull-up driven by UDC */ | 118 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
117 | }; | 119 | }; |
118 | 120 | ||
119 | 121 | ||
@@ -135,7 +137,7 @@ static struct spi_board_info foxg20_spi_devices[] = { | |||
135 | /* | 137 | /* |
136 | * MACB Ethernet device | 138 | * MACB Ethernet device |
137 | */ | 139 | */ |
138 | static struct at91_eth_data __initdata foxg20_macb_data = { | 140 | static struct macb_platform_data __initdata foxg20_macb_data = { |
139 | .phy_irq_pin = AT91_PIN_PA7, | 141 | .phy_irq_pin = AT91_PIN_PA7, |
140 | .is_rmii = 1, | 142 | .is_rmii = 1, |
141 | }; | 143 | }; |
@@ -147,6 +149,9 @@ static struct at91_eth_data __initdata foxg20_macb_data = { | |||
147 | static struct at91_mmc_data __initdata foxg20_mmc_data = { | 149 | static struct at91_mmc_data __initdata foxg20_mmc_data = { |
148 | .slot_b = 1, | 150 | .slot_b = 1, |
149 | .wire4 = 1, | 151 | .wire4 = 1, |
152 | .det_pin = -EINVAL, | ||
153 | .wp_pin = -EINVAL, | ||
154 | .vcc_pin = -EINVAL, | ||
150 | }; | 155 | }; |
151 | 156 | ||
152 | 157 | ||
diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c index 2e95949737e6..230e71969fb7 100644 --- a/arch/arm/mach-at91/board-gsia18s.c +++ b/arch/arm/mach-at91/board-gsia18s.c | |||
@@ -80,6 +80,8 @@ static void __init gsia18s_init_early(void) | |||
80 | */ | 80 | */ |
81 | static struct at91_usbh_data __initdata usbh_data = { | 81 | static struct at91_usbh_data __initdata usbh_data = { |
82 | .ports = 2, | 82 | .ports = 2, |
83 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
84 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
83 | }; | 85 | }; |
84 | 86 | ||
85 | /* | 87 | /* |
@@ -87,13 +89,13 @@ static struct at91_usbh_data __initdata usbh_data = { | |||
87 | */ | 89 | */ |
88 | static struct at91_udc_data __initdata udc_data = { | 90 | static struct at91_udc_data __initdata udc_data = { |
89 | .vbus_pin = AT91_PIN_PA22, | 91 | .vbus_pin = AT91_PIN_PA22, |
90 | .pullup_pin = 0, /* pull-up driven by UDC */ | 92 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
91 | }; | 93 | }; |
92 | 94 | ||
93 | /* | 95 | /* |
94 | * MACB Ethernet device | 96 | * MACB Ethernet device |
95 | */ | 97 | */ |
96 | static struct at91_eth_data __initdata macb_data = { | 98 | static struct macb_platform_data __initdata macb_data = { |
97 | .phy_irq_pin = AT91_PIN_PA28, | 99 | .phy_irq_pin = AT91_PIN_PA28, |
98 | .is_rmii = 1, | 100 | .is_rmii = 1, |
99 | }; | 101 | }; |
@@ -530,6 +532,7 @@ static struct i2c_board_info __initdata gsia18s_i2c_devices[] = { | |||
530 | static struct at91_cf_data __initdata gsia18s_cf1_data = { | 532 | static struct at91_cf_data __initdata gsia18s_cf1_data = { |
531 | .irq_pin = AT91_PIN_PA27, | 533 | .irq_pin = AT91_PIN_PA27, |
532 | .det_pin = AT91_PIN_PB30, | 534 | .det_pin = AT91_PIN_PB30, |
535 | .vcc_pin = -EINVAL, | ||
533 | .rst_pin = AT91_PIN_PB31, | 536 | .rst_pin = AT91_PIN_PB31, |
534 | .chipselect = 5, | 537 | .chipselect = 5, |
535 | .flags = AT91_CF_TRUE_IDE, | 538 | .flags = AT91_CF_TRUE_IDE, |
diff --git a/arch/arm/mach-at91/board-kafa.c b/arch/arm/mach-at91/board-kafa.c index 3bae73e63633..efde1b2327c8 100644 --- a/arch/arm/mach-at91/board-kafa.c +++ b/arch/arm/mach-at91/board-kafa.c | |||
@@ -61,13 +61,15 @@ static void __init kafa_init_early(void) | |||
61 | at91_set_serial_console(0); | 61 | at91_set_serial_console(0); |
62 | } | 62 | } |
63 | 63 | ||
64 | static struct at91_eth_data __initdata kafa_eth_data = { | 64 | static struct macb_platform_data __initdata kafa_eth_data = { |
65 | .phy_irq_pin = AT91_PIN_PC4, | 65 | .phy_irq_pin = AT91_PIN_PC4, |
66 | .is_rmii = 0, | 66 | .is_rmii = 0, |
67 | }; | 67 | }; |
68 | 68 | ||
69 | static struct at91_usbh_data __initdata kafa_usbh_data = { | 69 | static struct at91_usbh_data __initdata kafa_usbh_data = { |
70 | .ports = 1, | 70 | .ports = 1, |
71 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
72 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
71 | }; | 73 | }; |
72 | 74 | ||
73 | static struct at91_udc_data __initdata kafa_udc_data = { | 75 | static struct at91_udc_data __initdata kafa_udc_data = { |
diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index e61351ffad50..d75a4a2ad9c2 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c | |||
@@ -69,13 +69,15 @@ static void __init kb9202_init_early(void) | |||
69 | at91_set_serial_console(0); | 69 | at91_set_serial_console(0); |
70 | } | 70 | } |
71 | 71 | ||
72 | static struct at91_eth_data __initdata kb9202_eth_data = { | 72 | static struct macb_platform_data __initdata kb9202_eth_data = { |
73 | .phy_irq_pin = AT91_PIN_PB29, | 73 | .phy_irq_pin = AT91_PIN_PB29, |
74 | .is_rmii = 0, | 74 | .is_rmii = 0, |
75 | }; | 75 | }; |
76 | 76 | ||
77 | static struct at91_usbh_data __initdata kb9202_usbh_data = { | 77 | static struct at91_usbh_data __initdata kb9202_usbh_data = { |
78 | .ports = 1, | 78 | .ports = 1, |
79 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
80 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
79 | }; | 81 | }; |
80 | 82 | ||
81 | static struct at91_udc_data __initdata kb9202_udc_data = { | 83 | static struct at91_udc_data __initdata kb9202_udc_data = { |
@@ -87,6 +89,8 @@ static struct at91_mmc_data __initdata kb9202_mmc_data = { | |||
87 | .det_pin = AT91_PIN_PB2, | 89 | .det_pin = AT91_PIN_PB2, |
88 | .slot_b = 0, | 90 | .slot_b = 0, |
89 | .wire4 = 1, | 91 | .wire4 = 1, |
92 | .wp_pin = -EINVAL, | ||
93 | .vcc_pin = -EINVAL, | ||
90 | }; | 94 | }; |
91 | 95 | ||
92 | static struct mtd_partition __initdata kb9202_nand_partition[] = { | 96 | static struct mtd_partition __initdata kb9202_nand_partition[] = { |
@@ -100,7 +104,7 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = { | |||
100 | static struct atmel_nand_data __initdata kb9202_nand_data = { | 104 | static struct atmel_nand_data __initdata kb9202_nand_data = { |
101 | .ale = 22, | 105 | .ale = 22, |
102 | .cle = 21, | 106 | .cle = 21, |
103 | // .det_pin = ... not there | 107 | .det_pin = -EINVAL, |
104 | .rdy_pin = AT91_PIN_PC29, | 108 | .rdy_pin = AT91_PIN_PC29, |
105 | .enable_pin = AT91_PIN_PC28, | 109 | .enable_pin = AT91_PIN_PC28, |
106 | .parts = kb9202_nand_partition, | 110 | .parts = kb9202_nand_partition, |
diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index ef816c17dc61..3f8617c0e04e 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c | |||
@@ -72,6 +72,7 @@ static void __init neocore926_init_early(void) | |||
72 | static struct at91_usbh_data __initdata neocore926_usbh_data = { | 72 | static struct at91_usbh_data __initdata neocore926_usbh_data = { |
73 | .ports = 2, | 73 | .ports = 2, |
74 | .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, | 74 | .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, |
75 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | 76 | }; |
76 | 77 | ||
77 | /* | 78 | /* |
@@ -79,7 +80,7 @@ static struct at91_usbh_data __initdata neocore926_usbh_data = { | |||
79 | */ | 80 | */ |
80 | static struct at91_udc_data __initdata neocore926_udc_data = { | 81 | static struct at91_udc_data __initdata neocore926_udc_data = { |
81 | .vbus_pin = AT91_PIN_PA25, | 82 | .vbus_pin = AT91_PIN_PA25, |
82 | .pullup_pin = 0, /* pull-up driven by UDC */ | 83 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
83 | }; | 84 | }; |
84 | 85 | ||
85 | 86 | ||
@@ -149,13 +150,14 @@ static struct at91_mmc_data __initdata neocore926_mmc_data = { | |||
149 | .wire4 = 1, | 150 | .wire4 = 1, |
150 | .det_pin = AT91_PIN_PE18, | 151 | .det_pin = AT91_PIN_PE18, |
151 | .wp_pin = AT91_PIN_PE19, | 152 | .wp_pin = AT91_PIN_PE19, |
153 | .vcc_pin = -EINVAL, | ||
152 | }; | 154 | }; |
153 | 155 | ||
154 | 156 | ||
155 | /* | 157 | /* |
156 | * MACB Ethernet device | 158 | * MACB Ethernet device |
157 | */ | 159 | */ |
158 | static struct at91_eth_data __initdata neocore926_macb_data = { | 160 | static struct macb_platform_data __initdata neocore926_macb_data = { |
159 | .phy_irq_pin = AT91_PIN_PE31, | 161 | .phy_irq_pin = AT91_PIN_PE31, |
160 | .is_rmii = 1, | 162 | .is_rmii = 1, |
161 | }; | 163 | }; |
@@ -190,6 +192,7 @@ static struct atmel_nand_data __initdata neocore926_nand_data = { | |||
190 | .enable_pin = AT91_PIN_PD15, | 192 | .enable_pin = AT91_PIN_PD15, |
191 | .parts = neocore926_nand_partition, | 193 | .parts = neocore926_nand_partition, |
192 | .num_parts = ARRAY_SIZE(neocore926_nand_partition), | 194 | .num_parts = ARRAY_SIZE(neocore926_nand_partition), |
195 | .det_pin = -EINVAL, | ||
193 | }; | 196 | }; |
194 | 197 | ||
195 | static struct sam9_smc_config __initdata neocore926_nand_smc_config = { | 198 | static struct sam9_smc_config __initdata neocore926_nand_smc_config = { |
@@ -213,7 +216,7 @@ static struct sam9_smc_config __initdata neocore926_nand_smc_config = { | |||
213 | static void __init neocore926_add_device_nand(void) | 216 | static void __init neocore926_add_device_nand(void) |
214 | { | 217 | { |
215 | /* configure chip-select 3 (NAND) */ | 218 | /* configure chip-select 3 (NAND) */ |
216 | sam9_smc_configure(3, &neocore926_nand_smc_config); | 219 | sam9_smc_configure(0, 3, &neocore926_nand_smc_config); |
217 | 220 | ||
218 | at91_add_device_nand(&neocore926_nand_data); | 221 | at91_add_device_nand(&neocore926_nand_data); |
219 | } | 222 | } |
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c index 49e3f699b48e..b4a12fc184c8 100644 --- a/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/arch/arm/mach-at91/board-pcontrol-g20.c | |||
@@ -96,9 +96,9 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { | |||
96 | static void __init add_device_pcontrol(void) | 96 | static void __init add_device_pcontrol(void) |
97 | { | 97 | { |
98 | /* configure chip-select 4 (IO compatible to 8051 X4 ) */ | 98 | /* configure chip-select 4 (IO compatible to 8051 X4 ) */ |
99 | sam9_smc_configure(4, &pcontrol_smc_config[0]); | 99 | sam9_smc_configure(0, 4, &pcontrol_smc_config[0]); |
100 | /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ | 100 | /* configure chip-select 7 (FerroRAM 256KiBx16bit MR2A16A D4 ) */ |
101 | sam9_smc_configure(7, &pcontrol_smc_config[1]); | 101 | sam9_smc_configure(0, 7, &pcontrol_smc_config[1]); |
102 | } | 102 | } |
103 | 103 | ||
104 | 104 | ||
@@ -107,6 +107,8 @@ static void __init add_device_pcontrol(void) | |||
107 | */ | 107 | */ |
108 | static struct at91_usbh_data __initdata usbh_data = { | 108 | static struct at91_usbh_data __initdata usbh_data = { |
109 | .ports = 2, | 109 | .ports = 2, |
110 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
111 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
110 | }; | 112 | }; |
111 | 113 | ||
112 | 114 | ||
@@ -122,7 +124,7 @@ static struct at91_udc_data __initdata pcontrol_g20_udc_data = { | |||
122 | /* | 124 | /* |
123 | * MACB Ethernet device | 125 | * MACB Ethernet device |
124 | */ | 126 | */ |
125 | static struct at91_eth_data __initdata macb_data = { | 127 | static struct macb_platform_data __initdata macb_data = { |
126 | .phy_irq_pin = AT91_PIN_PA28, | 128 | .phy_irq_pin = AT91_PIN_PA28, |
127 | .is_rmii = 1, | 129 | .is_rmii = 1, |
128 | }; | 130 | }; |
diff --git a/arch/arm/mach-at91/board-picotux200.c b/arch/arm/mach-at91/board-picotux200.c index 0a8fe6a1b7c8..ab024fa11d5c 100644 --- a/arch/arm/mach-at91/board-picotux200.c +++ b/arch/arm/mach-at91/board-picotux200.c | |||
@@ -60,13 +60,15 @@ static void __init picotux200_init_early(void) | |||
60 | at91_set_serial_console(0); | 60 | at91_set_serial_console(0); |
61 | } | 61 | } |
62 | 62 | ||
63 | static struct at91_eth_data __initdata picotux200_eth_data = { | 63 | static struct macb_platform_data __initdata picotux200_eth_data = { |
64 | .phy_irq_pin = AT91_PIN_PC4, | 64 | .phy_irq_pin = AT91_PIN_PC4, |
65 | .is_rmii = 1, | 65 | .is_rmii = 1, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | static struct at91_usbh_data __initdata picotux200_usbh_data = { | 68 | static struct at91_usbh_data __initdata picotux200_usbh_data = { |
69 | .ports = 1, | 69 | .ports = 1, |
70 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
71 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
70 | }; | 72 | }; |
71 | 73 | ||
72 | static struct at91_mmc_data __initdata picotux200_mmc_data = { | 74 | static struct at91_mmc_data __initdata picotux200_mmc_data = { |
@@ -74,6 +76,7 @@ static struct at91_mmc_data __initdata picotux200_mmc_data = { | |||
74 | .slot_b = 0, | 76 | .slot_b = 0, |
75 | .wire4 = 1, | 77 | .wire4 = 1, |
76 | .wp_pin = AT91_PIN_PA17, | 78 | .wp_pin = AT91_PIN_PA17, |
79 | .vcc_pin = -EINVAL, | ||
77 | }; | 80 | }; |
78 | 81 | ||
79 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 | 82 | #define PICOTUX200_FLASH_BASE AT91_CHIPSELECT_0 |
diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c index 07421bdb88ea..e029d220cb84 100644 --- a/arch/arm/mach-at91/board-qil-a9260.c +++ b/arch/arm/mach-at91/board-qil-a9260.c | |||
@@ -77,6 +77,8 @@ static void __init ek_init_early(void) | |||
77 | */ | 77 | */ |
78 | static struct at91_usbh_data __initdata ek_usbh_data = { | 78 | static struct at91_usbh_data __initdata ek_usbh_data = { |
79 | .ports = 2, | 79 | .ports = 2, |
80 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
81 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
80 | }; | 82 | }; |
81 | 83 | ||
82 | /* | 84 | /* |
@@ -84,7 +86,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
84 | */ | 86 | */ |
85 | static struct at91_udc_data __initdata ek_udc_data = { | 87 | static struct at91_udc_data __initdata ek_udc_data = { |
86 | .vbus_pin = AT91_PIN_PC5, | 88 | .vbus_pin = AT91_PIN_PC5, |
87 | .pullup_pin = 0, /* pull-up driven by UDC */ | 89 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
88 | }; | 90 | }; |
89 | 91 | ||
90 | /* | 92 | /* |
@@ -104,7 +106,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
104 | /* | 106 | /* |
105 | * MACB Ethernet device | 107 | * MACB Ethernet device |
106 | */ | 108 | */ |
107 | static struct at91_eth_data __initdata ek_macb_data = { | 109 | static struct macb_platform_data __initdata ek_macb_data = { |
108 | .phy_irq_pin = AT91_PIN_PA31, | 110 | .phy_irq_pin = AT91_PIN_PA31, |
109 | .is_rmii = 1, | 111 | .is_rmii = 1, |
110 | }; | 112 | }; |
@@ -133,7 +135,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
133 | static struct atmel_nand_data __initdata ek_nand_data = { | 135 | static struct atmel_nand_data __initdata ek_nand_data = { |
134 | .ale = 21, | 136 | .ale = 21, |
135 | .cle = 22, | 137 | .cle = 22, |
136 | // .det_pin = ... not connected | 138 | .det_pin = -EINVAL, |
137 | .rdy_pin = AT91_PIN_PC13, | 139 | .rdy_pin = AT91_PIN_PC13, |
138 | .enable_pin = AT91_PIN_PC14, | 140 | .enable_pin = AT91_PIN_PC14, |
139 | .parts = ek_nand_partition, | 141 | .parts = ek_nand_partition, |
@@ -161,7 +163,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
161 | static void __init ek_add_device_nand(void) | 163 | static void __init ek_add_device_nand(void) |
162 | { | 164 | { |
163 | /* configure chip-select 3 (NAND) */ | 165 | /* configure chip-select 3 (NAND) */ |
164 | sam9_smc_configure(3, &ek_nand_smc_config); | 166 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
165 | 167 | ||
166 | at91_add_device_nand(&ek_nand_data); | 168 | at91_add_device_nand(&ek_nand_data); |
167 | } | 169 | } |
@@ -172,9 +174,9 @@ static void __init ek_add_device_nand(void) | |||
172 | static struct at91_mmc_data __initdata ek_mmc_data = { | 174 | static struct at91_mmc_data __initdata ek_mmc_data = { |
173 | .slot_b = 0, | 175 | .slot_b = 0, |
174 | .wire4 = 1, | 176 | .wire4 = 1, |
175 | // .det_pin = ... not connected | 177 | .det_pin = -EINVAL, |
176 | // .wp_pin = ... not connected | 178 | .wp_pin = -EINVAL, |
177 | // .vcc_pin = ... not connected | 179 | .vcc_pin = -EINVAL, |
178 | }; | 180 | }; |
179 | 181 | ||
180 | /* | 182 | /* |
@@ -251,7 +253,7 @@ static void __init ek_board_init(void) | |||
251 | /* LEDs */ | 253 | /* LEDs */ |
252 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); | 254 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); |
253 | /* shutdown controller, wakeup button (5 msec low) */ | 255 | /* shutdown controller, wakeup button (5 msec low) */ |
254 | at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW | 256 | at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW |
255 | | AT91_SHDW_RTTWKEN); | 257 | | AT91_SHDW_RTTWKEN); |
256 | } | 258 | } |
257 | 259 | ||
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c index 80a8c9c6e922..782f37946af5 100644 --- a/arch/arm/mach-at91/board-rm9200dk.c +++ b/arch/arm/mach-at91/board-rm9200dk.c | |||
@@ -65,13 +65,15 @@ static void __init dk_init_early(void) | |||
65 | at91_set_serial_console(0); | 65 | at91_set_serial_console(0); |
66 | } | 66 | } |
67 | 67 | ||
68 | static struct at91_eth_data __initdata dk_eth_data = { | 68 | static struct macb_platform_data __initdata dk_eth_data = { |
69 | .phy_irq_pin = AT91_PIN_PC4, | 69 | .phy_irq_pin = AT91_PIN_PC4, |
70 | .is_rmii = 1, | 70 | .is_rmii = 1, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | static struct at91_usbh_data __initdata dk_usbh_data = { | 73 | static struct at91_usbh_data __initdata dk_usbh_data = { |
74 | .ports = 2, | 74 | .ports = 2, |
75 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
76 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | 77 | }; |
76 | 78 | ||
77 | static struct at91_udc_data __initdata dk_udc_data = { | 79 | static struct at91_udc_data __initdata dk_udc_data = { |
@@ -80,16 +82,19 @@ static struct at91_udc_data __initdata dk_udc_data = { | |||
80 | }; | 82 | }; |
81 | 83 | ||
82 | static struct at91_cf_data __initdata dk_cf_data = { | 84 | static struct at91_cf_data __initdata dk_cf_data = { |
85 | .irq_pin = -EINVAL, | ||
83 | .det_pin = AT91_PIN_PB0, | 86 | .det_pin = AT91_PIN_PB0, |
87 | .vcc_pin = -EINVAL, | ||
84 | .rst_pin = AT91_PIN_PC5, | 88 | .rst_pin = AT91_PIN_PC5, |
85 | // .irq_pin = ... not connected | ||
86 | // .vcc_pin = ... always powered | ||
87 | }; | 89 | }; |
88 | 90 | ||
89 | #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD | 91 | #ifndef CONFIG_MTD_AT91_DATAFLASH_CARD |
90 | static struct at91_mmc_data __initdata dk_mmc_data = { | 92 | static struct at91_mmc_data __initdata dk_mmc_data = { |
91 | .slot_b = 0, | 93 | .slot_b = 0, |
92 | .wire4 = 1, | 94 | .wire4 = 1, |
95 | .det_pin = -EINVAL, | ||
96 | .wp_pin = -EINVAL, | ||
97 | .vcc_pin = -EINVAL, | ||
93 | }; | 98 | }; |
94 | #endif | 99 | #endif |
95 | 100 | ||
@@ -143,7 +148,7 @@ static struct atmel_nand_data __initdata dk_nand_data = { | |||
143 | .cle = 21, | 148 | .cle = 21, |
144 | .det_pin = AT91_PIN_PB1, | 149 | .det_pin = AT91_PIN_PB1, |
145 | .rdy_pin = AT91_PIN_PC2, | 150 | .rdy_pin = AT91_PIN_PC2, |
146 | // .enable_pin = ... not there | 151 | .enable_pin = -EINVAL, |
147 | .parts = dk_nand_partition, | 152 | .parts = dk_nand_partition, |
148 | .num_parts = ARRAY_SIZE(dk_nand_partition), | 153 | .num_parts = ARRAY_SIZE(dk_nand_partition), |
149 | }; | 154 | }; |
diff --git a/arch/arm/mach-at91/board-rm9200ek.c b/arch/arm/mach-at91/board-rm9200ek.c index 99fd7f8aee0e..ef7c12a92246 100644 --- a/arch/arm/mach-at91/board-rm9200ek.c +++ b/arch/arm/mach-at91/board-rm9200ek.c | |||
@@ -65,13 +65,15 @@ static void __init ek_init_early(void) | |||
65 | at91_set_serial_console(0); | 65 | at91_set_serial_console(0); |
66 | } | 66 | } |
67 | 67 | ||
68 | static struct at91_eth_data __initdata ek_eth_data = { | 68 | static struct macb_platform_data __initdata ek_eth_data = { |
69 | .phy_irq_pin = AT91_PIN_PC4, | 69 | .phy_irq_pin = AT91_PIN_PC4, |
70 | .is_rmii = 1, | 70 | .is_rmii = 1, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | static struct at91_usbh_data __initdata ek_usbh_data = { | 73 | static struct at91_usbh_data __initdata ek_usbh_data = { |
74 | .ports = 2, | 74 | .ports = 2, |
75 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
76 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | 77 | }; |
76 | 78 | ||
77 | static struct at91_udc_data __initdata ek_udc_data = { | 79 | static struct at91_udc_data __initdata ek_udc_data = { |
@@ -85,6 +87,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
85 | .slot_b = 0, | 87 | .slot_b = 0, |
86 | .wire4 = 1, | 88 | .wire4 = 1, |
87 | .wp_pin = AT91_PIN_PA17, | 89 | .wp_pin = AT91_PIN_PA17, |
90 | .vcc_pin = -EINVAL, | ||
88 | }; | 91 | }; |
89 | #endif | 92 | #endif |
90 | 93 | ||
diff --git a/arch/arm/mach-at91/board-rsi-ews.c b/arch/arm/mach-at91/board-rsi-ews.c index e927df0175df..af0750fafa29 100644 --- a/arch/arm/mach-at91/board-rsi-ews.c +++ b/arch/arm/mach-at91/board-rsi-ews.c | |||
@@ -60,7 +60,7 @@ static void __init rsi_ews_init_early(void) | |||
60 | /* | 60 | /* |
61 | * Ethernet | 61 | * Ethernet |
62 | */ | 62 | */ |
63 | static struct at91_eth_data rsi_ews_eth_data __initdata = { | 63 | static struct macb_platform_data rsi_ews_eth_data __initdata = { |
64 | .phy_irq_pin = AT91_PIN_PC4, | 64 | .phy_irq_pin = AT91_PIN_PC4, |
65 | .is_rmii = 1, | 65 | .is_rmii = 1, |
66 | }; | 66 | }; |
@@ -70,6 +70,8 @@ static struct at91_eth_data rsi_ews_eth_data __initdata = { | |||
70 | */ | 70 | */ |
71 | static struct at91_usbh_data rsi_ews_usbh_data __initdata = { | 71 | static struct at91_usbh_data rsi_ews_usbh_data __initdata = { |
72 | .ports = 1, | 72 | .ports = 1, |
73 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
74 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
73 | }; | 75 | }; |
74 | 76 | ||
75 | /* | 77 | /* |
diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index 072d53af98d9..84bce587735f 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c | |||
@@ -72,6 +72,8 @@ static void __init ek_init_early(void) | |||
72 | */ | 72 | */ |
73 | static struct at91_usbh_data __initdata ek_usbh_data = { | 73 | static struct at91_usbh_data __initdata ek_usbh_data = { |
74 | .ports = 2, | 74 | .ports = 2, |
75 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
76 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
75 | }; | 77 | }; |
76 | 78 | ||
77 | /* | 79 | /* |
@@ -79,7 +81,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
79 | */ | 81 | */ |
80 | static struct at91_udc_data __initdata ek_udc_data = { | 82 | static struct at91_udc_data __initdata ek_udc_data = { |
81 | .vbus_pin = AT91_PIN_PC5, | 83 | .vbus_pin = AT91_PIN_PC5, |
82 | .pullup_pin = 0, /* pull-up driven by UDC */ | 84 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
83 | }; | 85 | }; |
84 | 86 | ||
85 | 87 | ||
@@ -109,7 +111,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
109 | /* | 111 | /* |
110 | * MACB Ethernet device | 112 | * MACB Ethernet device |
111 | */ | 113 | */ |
112 | static struct at91_eth_data __initdata ek_macb_data = { | 114 | static struct macb_platform_data __initdata ek_macb_data = { |
113 | .phy_irq_pin = AT91_PIN_PA7, | 115 | .phy_irq_pin = AT91_PIN_PA7, |
114 | .is_rmii = 0, | 116 | .is_rmii = 0, |
115 | }; | 117 | }; |
@@ -134,7 +136,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
134 | static struct atmel_nand_data __initdata ek_nand_data = { | 136 | static struct atmel_nand_data __initdata ek_nand_data = { |
135 | .ale = 21, | 137 | .ale = 21, |
136 | .cle = 22, | 138 | .cle = 22, |
137 | // .det_pin = ... not connected | 139 | .det_pin = -EINVAL, |
138 | .rdy_pin = AT91_PIN_PC13, | 140 | .rdy_pin = AT91_PIN_PC13, |
139 | .enable_pin = AT91_PIN_PC14, | 141 | .enable_pin = AT91_PIN_PC14, |
140 | .parts = ek_nand_partition, | 142 | .parts = ek_nand_partition, |
@@ -162,7 +164,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
162 | static void __init ek_add_device_nand(void) | 164 | static void __init ek_add_device_nand(void) |
163 | { | 165 | { |
164 | /* configure chip-select 3 (NAND) */ | 166 | /* configure chip-select 3 (NAND) */ |
165 | sam9_smc_configure(3, &ek_nand_smc_config); | 167 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
166 | 168 | ||
167 | at91_add_device_nand(&ek_nand_data); | 169 | at91_add_device_nand(&ek_nand_data); |
168 | } | 170 | } |
@@ -176,7 +178,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
176 | .wire4 = 1, | 178 | .wire4 = 1, |
177 | .det_pin = AT91_PIN_PC8, | 179 | .det_pin = AT91_PIN_PC8, |
178 | .wp_pin = AT91_PIN_PC4, | 180 | .wp_pin = AT91_PIN_PC4, |
179 | // .vcc_pin = ... not connected | 181 | .vcc_pin = -EINVAL, |
180 | }; | 182 | }; |
181 | 183 | ||
182 | static void __init ek_board_init(void) | 184 | static void __init ek_board_init(void) |
diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index 4f10181a0782..be8233bcabdc 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c | |||
@@ -75,6 +75,8 @@ static void __init ek_init_early(void) | |||
75 | */ | 75 | */ |
76 | static struct at91_usbh_data __initdata ek_usbh_data = { | 76 | static struct at91_usbh_data __initdata ek_usbh_data = { |
77 | .ports = 2, | 77 | .ports = 2, |
78 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
79 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
78 | }; | 80 | }; |
79 | 81 | ||
80 | /* | 82 | /* |
@@ -82,7 +84,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
82 | */ | 84 | */ |
83 | static struct at91_udc_data __initdata ek_udc_data = { | 85 | static struct at91_udc_data __initdata ek_udc_data = { |
84 | .vbus_pin = AT91_PIN_PC5, | 86 | .vbus_pin = AT91_PIN_PC5, |
85 | .pullup_pin = 0, /* pull-up driven by UDC */ | 87 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
86 | }; | 88 | }; |
87 | 89 | ||
88 | 90 | ||
@@ -151,7 +153,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
151 | /* | 153 | /* |
152 | * MACB Ethernet device | 154 | * MACB Ethernet device |
153 | */ | 155 | */ |
154 | static struct at91_eth_data __initdata ek_macb_data = { | 156 | static struct macb_platform_data __initdata ek_macb_data = { |
155 | .phy_irq_pin = AT91_PIN_PA7, | 157 | .phy_irq_pin = AT91_PIN_PA7, |
156 | .is_rmii = 1, | 158 | .is_rmii = 1, |
157 | }; | 159 | }; |
@@ -176,7 +178,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
176 | static struct atmel_nand_data __initdata ek_nand_data = { | 178 | static struct atmel_nand_data __initdata ek_nand_data = { |
177 | .ale = 21, | 179 | .ale = 21, |
178 | .cle = 22, | 180 | .cle = 22, |
179 | // .det_pin = ... not connected | 181 | .det_pin = -EINVAL, |
180 | .rdy_pin = AT91_PIN_PC13, | 182 | .rdy_pin = AT91_PIN_PC13, |
181 | .enable_pin = AT91_PIN_PC14, | 183 | .enable_pin = AT91_PIN_PC14, |
182 | .parts = ek_nand_partition, | 184 | .parts = ek_nand_partition, |
@@ -211,7 +213,7 @@ static void __init ek_add_device_nand(void) | |||
211 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 213 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
212 | 214 | ||
213 | /* configure chip-select 3 (NAND) */ | 215 | /* configure chip-select 3 (NAND) */ |
214 | sam9_smc_configure(3, &ek_nand_smc_config); | 216 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
215 | 217 | ||
216 | at91_add_device_nand(&ek_nand_data); | 218 | at91_add_device_nand(&ek_nand_data); |
217 | } | 219 | } |
@@ -223,9 +225,9 @@ static void __init ek_add_device_nand(void) | |||
223 | static struct at91_mmc_data __initdata ek_mmc_data = { | 225 | static struct at91_mmc_data __initdata ek_mmc_data = { |
224 | .slot_b = 1, | 226 | .slot_b = 1, |
225 | .wire4 = 1, | 227 | .wire4 = 1, |
226 | // .det_pin = ... not connected | 228 | .det_pin = -EINVAL, |
227 | // .wp_pin = ... not connected | 229 | .wp_pin = -EINVAL, |
228 | // .vcc_pin = ... not connected | 230 | .vcc_pin = -EINVAL, |
229 | }; | 231 | }; |
230 | 232 | ||
231 | 233 | ||
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index b005b738e8ff..40895072a1a7 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c | |||
@@ -131,7 +131,7 @@ static struct sam9_smc_config __initdata dm9000_smc_config = { | |||
131 | static void __init ek_add_device_dm9000(void) | 131 | static void __init ek_add_device_dm9000(void) |
132 | { | 132 | { |
133 | /* Configure chip-select 2 (DM9000) */ | 133 | /* Configure chip-select 2 (DM9000) */ |
134 | sam9_smc_configure(2, &dm9000_smc_config); | 134 | sam9_smc_configure(0, 2, &dm9000_smc_config); |
135 | 135 | ||
136 | /* Configure Reset signal as output */ | 136 | /* Configure Reset signal as output */ |
137 | at91_set_gpio_output(AT91_PIN_PC10, 0); | 137 | at91_set_gpio_output(AT91_PIN_PC10, 0); |
@@ -151,6 +151,8 @@ static void __init ek_add_device_dm9000(void) {} | |||
151 | */ | 151 | */ |
152 | static struct at91_usbh_data __initdata ek_usbh_data = { | 152 | static struct at91_usbh_data __initdata ek_usbh_data = { |
153 | .ports = 2, | 153 | .ports = 2, |
154 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
155 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
154 | }; | 156 | }; |
155 | 157 | ||
156 | 158 | ||
@@ -159,7 +161,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
159 | */ | 161 | */ |
160 | static struct at91_udc_data __initdata ek_udc_data = { | 162 | static struct at91_udc_data __initdata ek_udc_data = { |
161 | .vbus_pin = AT91_PIN_PB29, | 163 | .vbus_pin = AT91_PIN_PB29, |
162 | .pullup_pin = 0, /* pull-up driven by UDC */ | 164 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
163 | }; | 165 | }; |
164 | 166 | ||
165 | 167 | ||
@@ -182,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
182 | static struct atmel_nand_data __initdata ek_nand_data = { | 184 | static struct atmel_nand_data __initdata ek_nand_data = { |
183 | .ale = 22, | 185 | .ale = 22, |
184 | .cle = 21, | 186 | .cle = 21, |
185 | // .det_pin = ... not connected | 187 | .det_pin = -EINVAL, |
186 | .rdy_pin = AT91_PIN_PC15, | 188 | .rdy_pin = AT91_PIN_PC15, |
187 | .enable_pin = AT91_PIN_PC14, | 189 | .enable_pin = AT91_PIN_PC14, |
188 | .parts = ek_nand_partition, | 190 | .parts = ek_nand_partition, |
@@ -217,7 +219,7 @@ static void __init ek_add_device_nand(void) | |||
217 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 219 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
218 | 220 | ||
219 | /* configure chip-select 3 (NAND) */ | 221 | /* configure chip-select 3 (NAND) */ |
220 | sam9_smc_configure(3, &ek_nand_smc_config); | 222 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
221 | 223 | ||
222 | at91_add_device_nand(&ek_nand_data); | 224 | at91_add_device_nand(&ek_nand_data); |
223 | } | 225 | } |
@@ -345,6 +347,9 @@ static struct spi_board_info ek_spi_devices[] = { | |||
345 | */ | 347 | */ |
346 | static struct at91_mmc_data __initdata ek_mmc_data = { | 348 | static struct at91_mmc_data __initdata ek_mmc_data = { |
347 | .wire4 = 1, | 349 | .wire4 = 1, |
350 | .det_pin = -EINVAL, | ||
351 | .wp_pin = -EINVAL, | ||
352 | .vcc_pin = -EINVAL, | ||
348 | }; | 353 | }; |
349 | 354 | ||
350 | #endif /* CONFIG_SPI_ATMEL_* */ | 355 | #endif /* CONFIG_SPI_ATMEL_* */ |
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index bccdcf23caa1..29f66052fe63 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c | |||
@@ -74,6 +74,7 @@ static void __init ek_init_early(void) | |||
74 | static struct at91_usbh_data __initdata ek_usbh_data = { | 74 | static struct at91_usbh_data __initdata ek_usbh_data = { |
75 | .ports = 2, | 75 | .ports = 2, |
76 | .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, | 76 | .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 }, |
77 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
77 | }; | 78 | }; |
78 | 79 | ||
79 | /* | 80 | /* |
@@ -81,7 +82,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
81 | */ | 82 | */ |
82 | static struct at91_udc_data __initdata ek_udc_data = { | 83 | static struct at91_udc_data __initdata ek_udc_data = { |
83 | .vbus_pin = AT91_PIN_PA25, | 84 | .vbus_pin = AT91_PIN_PA25, |
84 | .pullup_pin = 0, /* pull-up driven by UDC */ | 85 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
85 | }; | 86 | }; |
86 | 87 | ||
87 | 88 | ||
@@ -151,14 +152,14 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
151 | .wire4 = 1, | 152 | .wire4 = 1, |
152 | .det_pin = AT91_PIN_PE18, | 153 | .det_pin = AT91_PIN_PE18, |
153 | .wp_pin = AT91_PIN_PE19, | 154 | .wp_pin = AT91_PIN_PE19, |
154 | // .vcc_pin = ... not connected | 155 | .vcc_pin = -EINVAL, |
155 | }; | 156 | }; |
156 | 157 | ||
157 | 158 | ||
158 | /* | 159 | /* |
159 | * MACB Ethernet device | 160 | * MACB Ethernet device |
160 | */ | 161 | */ |
161 | static struct at91_eth_data __initdata ek_macb_data = { | 162 | static struct macb_platform_data __initdata ek_macb_data = { |
162 | .phy_irq_pin = AT91_PIN_PE31, | 163 | .phy_irq_pin = AT91_PIN_PE31, |
163 | .is_rmii = 1, | 164 | .is_rmii = 1, |
164 | }; | 165 | }; |
@@ -183,7 +184,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
183 | static struct atmel_nand_data __initdata ek_nand_data = { | 184 | static struct atmel_nand_data __initdata ek_nand_data = { |
184 | .ale = 21, | 185 | .ale = 21, |
185 | .cle = 22, | 186 | .cle = 22, |
186 | // .det_pin = ... not connected | 187 | .det_pin = -EINVAL, |
187 | .rdy_pin = AT91_PIN_PA22, | 188 | .rdy_pin = AT91_PIN_PA22, |
188 | .enable_pin = AT91_PIN_PD15, | 189 | .enable_pin = AT91_PIN_PD15, |
189 | .parts = ek_nand_partition, | 190 | .parts = ek_nand_partition, |
@@ -218,7 +219,7 @@ static void __init ek_add_device_nand(void) | |||
218 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 219 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
219 | 220 | ||
220 | /* configure chip-select 3 (NAND) */ | 221 | /* configure chip-select 3 (NAND) */ |
221 | sam9_smc_configure(3, &ek_nand_smc_config); | 222 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
222 | 223 | ||
223 | at91_add_device_nand(&ek_nand_data); | 224 | at91_add_device_nand(&ek_nand_data); |
224 | } | 225 | } |
@@ -353,6 +354,7 @@ static void __init ek_add_device_buttons(void) {} | |||
353 | * reset_pin is not connected: NRST | 354 | * reset_pin is not connected: NRST |
354 | */ | 355 | */ |
355 | static struct ac97c_platform_data ek_ac97_data = { | 356 | static struct ac97c_platform_data ek_ac97_data = { |
357 | .reset_pin = -EINVAL, | ||
356 | }; | 358 | }; |
357 | 359 | ||
358 | 360 | ||
diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 64fc75c9d0ac..843d6286c6f4 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c | |||
@@ -86,6 +86,8 @@ static void __init ek_init_early(void) | |||
86 | */ | 86 | */ |
87 | static struct at91_usbh_data __initdata ek_usbh_data = { | 87 | static struct at91_usbh_data __initdata ek_usbh_data = { |
88 | .ports = 2, | 88 | .ports = 2, |
89 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
90 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
89 | }; | 91 | }; |
90 | 92 | ||
91 | /* | 93 | /* |
@@ -93,7 +95,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
93 | */ | 95 | */ |
94 | static struct at91_udc_data __initdata ek_udc_data = { | 96 | static struct at91_udc_data __initdata ek_udc_data = { |
95 | .vbus_pin = AT91_PIN_PC5, | 97 | .vbus_pin = AT91_PIN_PC5, |
96 | .pullup_pin = 0, /* pull-up driven by UDC */ | 98 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
97 | }; | 99 | }; |
98 | 100 | ||
99 | 101 | ||
@@ -123,7 +125,7 @@ static struct spi_board_info ek_spi_devices[] = { | |||
123 | /* | 125 | /* |
124 | * MACB Ethernet device | 126 | * MACB Ethernet device |
125 | */ | 127 | */ |
126 | static struct at91_eth_data __initdata ek_macb_data = { | 128 | static struct macb_platform_data __initdata ek_macb_data = { |
127 | .phy_irq_pin = AT91_PIN_PA7, | 129 | .phy_irq_pin = AT91_PIN_PA7, |
128 | .is_rmii = 1, | 130 | .is_rmii = 1, |
129 | }; | 131 | }; |
@@ -163,6 +165,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
163 | .cle = 22, | 165 | .cle = 22, |
164 | .rdy_pin = AT91_PIN_PC13, | 166 | .rdy_pin = AT91_PIN_PC13, |
165 | .enable_pin = AT91_PIN_PC14, | 167 | .enable_pin = AT91_PIN_PC14, |
168 | .det_pin = -EINVAL, | ||
166 | .parts = ek_nand_partition, | 169 | .parts = ek_nand_partition, |
167 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 170 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
168 | }; | 171 | }; |
@@ -195,7 +198,7 @@ static void __init ek_add_device_nand(void) | |||
195 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 198 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
196 | 199 | ||
197 | /* configure chip-select 3 (NAND) */ | 200 | /* configure chip-select 3 (NAND) */ |
198 | sam9_smc_configure(3, &ek_nand_smc_config); | 201 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
199 | 202 | ||
200 | at91_add_device_nand(&ek_nand_data); | 203 | at91_add_device_nand(&ek_nand_data); |
201 | } | 204 | } |
@@ -210,6 +213,7 @@ static struct mci_platform_data __initdata ek_mmc_data = { | |||
210 | .slot[1] = { | 213 | .slot[1] = { |
211 | .bus_width = 4, | 214 | .bus_width = 4, |
212 | .detect_pin = AT91_PIN_PC9, | 215 | .detect_pin = AT91_PIN_PC9, |
216 | .wp_pin = -EINVAL, | ||
213 | }, | 217 | }, |
214 | 218 | ||
215 | }; | 219 | }; |
@@ -218,6 +222,8 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
218 | .slot_b = 1, /* Only one slot so use slot B */ | 222 | .slot_b = 1, /* Only one slot so use slot B */ |
219 | .wire4 = 1, | 223 | .wire4 = 1, |
220 | .det_pin = AT91_PIN_PC9, | 224 | .det_pin = AT91_PIN_PC9, |
225 | .wp_pin = -EINVAL, | ||
226 | .vcc_pin = -EINVAL, | ||
221 | }; | 227 | }; |
222 | #endif | 228 | #endif |
223 | 229 | ||
@@ -227,6 +233,7 @@ static void __init ek_add_device_mmc(void) | |||
227 | if (ek_have_2mmc()) { | 233 | if (ek_have_2mmc()) { |
228 | ek_mmc_data.slot[0].bus_width = 4; | 234 | ek_mmc_data.slot[0].bus_width = 4; |
229 | ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2; | 235 | ek_mmc_data.slot[0].detect_pin = AT91_PIN_PC2; |
236 | ek_mmc_data.slot[0].wp_pin = -1; | ||
230 | } | 237 | } |
231 | at91_add_device_mci(0, &ek_mmc_data); | 238 | at91_add_device_mci(0, &ek_mmc_data); |
232 | #else | 239 | #else |
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 92de9127923a..ea0d1b9c2b7b 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
@@ -69,6 +69,7 @@ static void __init ek_init_early(void) | |||
69 | static struct at91_usbh_data __initdata ek_usbh_hs_data = { | 69 | static struct at91_usbh_data __initdata ek_usbh_hs_data = { |
70 | .ports = 2, | 70 | .ports = 2, |
71 | .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, | 71 | .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3}, |
72 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
72 | }; | 73 | }; |
73 | 74 | ||
74 | 75 | ||
@@ -100,6 +101,7 @@ static struct mci_platform_data __initdata mci0_data = { | |||
100 | .slot[0] = { | 101 | .slot[0] = { |
101 | .bus_width = 4, | 102 | .bus_width = 4, |
102 | .detect_pin = AT91_PIN_PD10, | 103 | .detect_pin = AT91_PIN_PD10, |
104 | .wp_pin = -EINVAL, | ||
103 | }, | 105 | }, |
104 | }; | 106 | }; |
105 | 107 | ||
@@ -115,7 +117,7 @@ static struct mci_platform_data __initdata mci1_data = { | |||
115 | /* | 117 | /* |
116 | * MACB Ethernet device | 118 | * MACB Ethernet device |
117 | */ | 119 | */ |
118 | static struct at91_eth_data __initdata ek_macb_data = { | 120 | static struct macb_platform_data __initdata ek_macb_data = { |
119 | .phy_irq_pin = AT91_PIN_PD5, | 121 | .phy_irq_pin = AT91_PIN_PD5, |
120 | .is_rmii = 1, | 122 | .is_rmii = 1, |
121 | }; | 123 | }; |
@@ -143,6 +145,7 @@ static struct atmel_nand_data __initdata ek_nand_data = { | |||
143 | .cle = 22, | 145 | .cle = 22, |
144 | .rdy_pin = AT91_PIN_PC8, | 146 | .rdy_pin = AT91_PIN_PC8, |
145 | .enable_pin = AT91_PIN_PC14, | 147 | .enable_pin = AT91_PIN_PC14, |
148 | .det_pin = -EINVAL, | ||
146 | .parts = ek_nand_partition, | 149 | .parts = ek_nand_partition, |
147 | .num_parts = ARRAY_SIZE(ek_nand_partition), | 150 | .num_parts = ARRAY_SIZE(ek_nand_partition), |
148 | }; | 151 | }; |
@@ -175,7 +178,7 @@ static void __init ek_add_device_nand(void) | |||
175 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; | 178 | ek_nand_smc_config.mode |= AT91_SMC_DBW_8; |
176 | 179 | ||
177 | /* configure chip-select 3 (NAND) */ | 180 | /* configure chip-select 3 (NAND) */ |
178 | sam9_smc_configure(3, &ek_nand_smc_config); | 181 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
179 | 182 | ||
180 | at91_add_device_nand(&ek_nand_data); | 183 | at91_add_device_nand(&ek_nand_data); |
181 | } | 184 | } |
@@ -330,6 +333,7 @@ static void __init ek_add_device_buttons(void) {} | |||
330 | * reset_pin is not connected: NRST | 333 | * reset_pin is not connected: NRST |
331 | */ | 334 | */ |
332 | static struct ac97c_platform_data ek_ac97_data = { | 335 | static struct ac97c_platform_data ek_ac97_data = { |
336 | .reset_pin = -EINVAL, | ||
333 | }; | 337 | }; |
334 | 338 | ||
335 | 339 | ||
diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index b2b748239f36..c1366d0032bf 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c | |||
@@ -67,8 +67,8 @@ static struct usba_platform_data __initdata ek_usba_udc_data = { | |||
67 | static struct at91_mmc_data __initdata ek_mmc_data = { | 67 | static struct at91_mmc_data __initdata ek_mmc_data = { |
68 | .wire4 = 1, | 68 | .wire4 = 1, |
69 | .det_pin = AT91_PIN_PA15, | 69 | .det_pin = AT91_PIN_PA15, |
70 | // .wp_pin = ... not connected | 70 | .wp_pin = -EINVAL, |
71 | // .vcc_pin = ... not connected | 71 | .vcc_pin = -EINVAL, |
72 | }; | 72 | }; |
73 | 73 | ||
74 | 74 | ||
@@ -91,7 +91,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
91 | static struct atmel_nand_data __initdata ek_nand_data = { | 91 | static struct atmel_nand_data __initdata ek_nand_data = { |
92 | .ale = 21, | 92 | .ale = 21, |
93 | .cle = 22, | 93 | .cle = 22, |
94 | // .det_pin = ... not connected | 94 | .det_pin = -EINVAL, |
95 | .rdy_pin = AT91_PIN_PD17, | 95 | .rdy_pin = AT91_PIN_PD17, |
96 | .enable_pin = AT91_PIN_PB6, | 96 | .enable_pin = AT91_PIN_PB6, |
97 | .parts = ek_nand_partition, | 97 | .parts = ek_nand_partition, |
@@ -119,7 +119,7 @@ static struct sam9_smc_config __initdata ek_nand_smc_config = { | |||
119 | static void __init ek_add_device_nand(void) | 119 | static void __init ek_add_device_nand(void) |
120 | { | 120 | { |
121 | /* configure chip-select 3 (NAND) */ | 121 | /* configure chip-select 3 (NAND) */ |
122 | sam9_smc_configure(3, &ek_nand_smc_config); | 122 | sam9_smc_configure(0, 3, &ek_nand_smc_config); |
123 | 123 | ||
124 | at91_add_device_nand(&ek_nand_data); | 124 | at91_add_device_nand(&ek_nand_data); |
125 | } | 125 | } |
@@ -204,6 +204,7 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data; | |||
204 | * reset_pin is not connected: NRST | 204 | * reset_pin is not connected: NRST |
205 | */ | 205 | */ |
206 | static struct ac97c_platform_data ek_ac97_data = { | 206 | static struct ac97c_platform_data ek_ac97_data = { |
207 | .reset_pin = -EINVAL, | ||
207 | }; | 208 | }; |
208 | 209 | ||
209 | 210 | ||
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c index 0df01c6e2d0c..4770db08e5a6 100644 --- a/arch/arm/mach-at91/board-snapper9260.c +++ b/arch/arm/mach-at91/board-snapper9260.c | |||
@@ -57,15 +57,19 @@ static void __init snapper9260_init_early(void) | |||
57 | 57 | ||
58 | static struct at91_usbh_data __initdata snapper9260_usbh_data = { | 58 | static struct at91_usbh_data __initdata snapper9260_usbh_data = { |
59 | .ports = 2, | 59 | .ports = 2, |
60 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
61 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
60 | }; | 62 | }; |
61 | 63 | ||
62 | static struct at91_udc_data __initdata snapper9260_udc_data = { | 64 | static struct at91_udc_data __initdata snapper9260_udc_data = { |
63 | .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5), | 65 | .vbus_pin = SNAPPER9260_IO_EXP_GPIO(5), |
64 | .vbus_active_low = 1, | 66 | .vbus_active_low = 1, |
65 | .vbus_polled = 1, | 67 | .vbus_polled = 1, |
68 | .pullup_pin = -EINVAL, | ||
66 | }; | 69 | }; |
67 | 70 | ||
68 | static struct at91_eth_data snapper9260_macb_data = { | 71 | static struct macb_platform_data snapper9260_macb_data = { |
72 | .phy_irq_pin = -EINVAL, | ||
69 | .is_rmii = 1, | 73 | .is_rmii = 1, |
70 | }; | 74 | }; |
71 | 75 | ||
@@ -104,6 +108,8 @@ static struct atmel_nand_data __initdata snapper9260_nand_data = { | |||
104 | .parts = snapper9260_nand_partitions, | 108 | .parts = snapper9260_nand_partitions, |
105 | .num_parts = ARRAY_SIZE(snapper9260_nand_partitions), | 109 | .num_parts = ARRAY_SIZE(snapper9260_nand_partitions), |
106 | .bus_width_16 = 0, | 110 | .bus_width_16 = 0, |
111 | .enable_pin = -EINVAL, | ||
112 | .det_pin = -EINVAL, | ||
107 | }; | 113 | }; |
108 | 114 | ||
109 | static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { | 115 | static struct sam9_smc_config __initdata snapper9260_nand_smc_config = { |
@@ -149,7 +155,7 @@ static struct i2c_board_info __initdata snapper9260_i2c_devices[] = { | |||
149 | static void __init snapper9260_add_device_nand(void) | 155 | static void __init snapper9260_add_device_nand(void) |
150 | { | 156 | { |
151 | at91_set_A_periph(AT91_PIN_PC14, 0); | 157 | at91_set_A_periph(AT91_PIN_PC14, 0); |
152 | sam9_smc_configure(3, &snapper9260_nand_smc_config); | 158 | sam9_smc_configure(0, 3, &snapper9260_nand_smc_config); |
153 | at91_add_device_nand(&snapper9260_nand_data); | 159 | at91_add_device_nand(&snapper9260_nand_data); |
154 | } | 160 | } |
155 | 161 | ||
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index 936e5fd7f406..e8d3d5b88244 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c | |||
@@ -85,6 +85,7 @@ static struct atmel_nand_data __initdata nand_data = { | |||
85 | .rdy_pin = AT91_PIN_PC13, | 85 | .rdy_pin = AT91_PIN_PC13, |
86 | .enable_pin = AT91_PIN_PC14, | 86 | .enable_pin = AT91_PIN_PC14, |
87 | .bus_width_16 = 0, | 87 | .bus_width_16 = 0, |
88 | .det_pin = -EINVAL, | ||
88 | }; | 89 | }; |
89 | 90 | ||
90 | static struct sam9_smc_config __initdata nand_smc_config = { | 91 | static struct sam9_smc_config __initdata nand_smc_config = { |
@@ -108,7 +109,7 @@ static struct sam9_smc_config __initdata nand_smc_config = { | |||
108 | static void __init add_device_nand(void) | 109 | static void __init add_device_nand(void) |
109 | { | 110 | { |
110 | /* configure chip-select 3 (NAND) */ | 111 | /* configure chip-select 3 (NAND) */ |
111 | sam9_smc_configure(3, &nand_smc_config); | 112 | sam9_smc_configure(0, 3, &nand_smc_config); |
112 | 113 | ||
113 | at91_add_device_nand(&nand_data); | 114 | at91_add_device_nand(&nand_data); |
114 | } | 115 | } |
@@ -122,12 +123,17 @@ static void __init add_device_nand(void) | |||
122 | static struct mci_platform_data __initdata mmc_data = { | 123 | static struct mci_platform_data __initdata mmc_data = { |
123 | .slot[0] = { | 124 | .slot[0] = { |
124 | .bus_width = 4, | 125 | .bus_width = 4, |
126 | .detect_pin = -1; | ||
127 | .wp_pin = -1; | ||
125 | }, | 128 | }, |
126 | }; | 129 | }; |
127 | #else | 130 | #else |
128 | static struct at91_mmc_data __initdata mmc_data = { | 131 | static struct at91_mmc_data __initdata mmc_data = { |
129 | .slot_b = 0, | 132 | .slot_b = 0, |
130 | .wire4 = 1, | 133 | .wire4 = 1, |
134 | .det_pin = -EINVAL, | ||
135 | .wp_pin = -EINVAL, | ||
136 | .vcc_pin = -EINVAL, | ||
131 | }; | 137 | }; |
132 | #endif | 138 | #endif |
133 | 139 | ||
@@ -137,6 +143,8 @@ static struct at91_mmc_data __initdata mmc_data = { | |||
137 | */ | 143 | */ |
138 | static struct at91_usbh_data __initdata usbh_data = { | 144 | static struct at91_usbh_data __initdata usbh_data = { |
139 | .ports = 2, | 145 | .ports = 2, |
146 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
147 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
140 | }; | 148 | }; |
141 | 149 | ||
142 | 150 | ||
@@ -145,19 +153,19 @@ static struct at91_usbh_data __initdata usbh_data = { | |||
145 | */ | 153 | */ |
146 | static struct at91_udc_data __initdata portuxg20_udc_data = { | 154 | static struct at91_udc_data __initdata portuxg20_udc_data = { |
147 | .vbus_pin = AT91_PIN_PC7, | 155 | .vbus_pin = AT91_PIN_PC7, |
148 | .pullup_pin = 0, /* pull-up driven by UDC */ | 156 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
149 | }; | 157 | }; |
150 | 158 | ||
151 | static struct at91_udc_data __initdata stamp9g20evb_udc_data = { | 159 | static struct at91_udc_data __initdata stamp9g20evb_udc_data = { |
152 | .vbus_pin = AT91_PIN_PA22, | 160 | .vbus_pin = AT91_PIN_PA22, |
153 | .pullup_pin = 0, /* pull-up driven by UDC */ | 161 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
154 | }; | 162 | }; |
155 | 163 | ||
156 | 164 | ||
157 | /* | 165 | /* |
158 | * MACB Ethernet device | 166 | * MACB Ethernet device |
159 | */ | 167 | */ |
160 | static struct at91_eth_data __initdata macb_data = { | 168 | static struct macb_platform_data __initdata macb_data = { |
161 | .phy_irq_pin = AT91_PIN_PA28, | 169 | .phy_irq_pin = AT91_PIN_PA28, |
162 | .is_rmii = 1, | 170 | .is_rmii = 1, |
163 | }; | 171 | }; |
diff --git a/arch/arm/mach-at91/board-usb-a926x.c b/arch/arm/mach-at91/board-usb-a926x.c index 0a20bab21f99..26c36fc2d1e5 100644 --- a/arch/arm/mach-at91/board-usb-a926x.c +++ b/arch/arm/mach-at91/board-usb-a926x.c | |||
@@ -66,6 +66,8 @@ static void __init ek_init_early(void) | |||
66 | */ | 66 | */ |
67 | static struct at91_usbh_data __initdata ek_usbh_data = { | 67 | static struct at91_usbh_data __initdata ek_usbh_data = { |
68 | .ports = 2, | 68 | .ports = 2, |
69 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
70 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
69 | }; | 71 | }; |
70 | 72 | ||
71 | /* | 73 | /* |
@@ -73,7 +75,7 @@ static struct at91_usbh_data __initdata ek_usbh_data = { | |||
73 | */ | 75 | */ |
74 | static struct at91_udc_data __initdata ek_udc_data = { | 76 | static struct at91_udc_data __initdata ek_udc_data = { |
75 | .vbus_pin = AT91_PIN_PB11, | 77 | .vbus_pin = AT91_PIN_PB11, |
76 | .pullup_pin = 0, /* pull-up driven by UDC */ | 78 | .pullup_pin = -EINVAL, /* pull-up driven by UDC */ |
77 | }; | 79 | }; |
78 | 80 | ||
79 | static void __init ek_add_device_udc(void) | 81 | static void __init ek_add_device_udc(void) |
@@ -146,7 +148,7 @@ static void __init ek_add_device_spi(void) | |||
146 | /* | 148 | /* |
147 | * MACB Ethernet device | 149 | * MACB Ethernet device |
148 | */ | 150 | */ |
149 | static struct at91_eth_data __initdata ek_macb_data = { | 151 | static struct macb_platform_data __initdata ek_macb_data = { |
150 | .phy_irq_pin = AT91_PIN_PE31, | 152 | .phy_irq_pin = AT91_PIN_PE31, |
151 | .is_rmii = 1, | 153 | .is_rmii = 1, |
152 | }; | 154 | }; |
@@ -193,7 +195,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = { | |||
193 | static struct atmel_nand_data __initdata ek_nand_data = { | 195 | static struct atmel_nand_data __initdata ek_nand_data = { |
194 | .ale = 21, | 196 | .ale = 21, |
195 | .cle = 22, | 197 | .cle = 22, |
196 | // .det_pin = ... not connected | 198 | .det_pin = -EINVAL, |
197 | .rdy_pin = AT91_PIN_PA22, | 199 | .rdy_pin = AT91_PIN_PA22, |
198 | .enable_pin = AT91_PIN_PD15, | 200 | .enable_pin = AT91_PIN_PD15, |
199 | .parts = ek_nand_partition, | 201 | .parts = ek_nand_partition, |
@@ -245,9 +247,9 @@ static void __init ek_add_device_nand(void) | |||
245 | 247 | ||
246 | /* configure chip-select 3 (NAND) */ | 248 | /* configure chip-select 3 (NAND) */ |
247 | if (machine_is_usb_a9g20()) | 249 | if (machine_is_usb_a9g20()) |
248 | sam9_smc_configure(3, &usb_a9g20_nand_smc_config); | 250 | sam9_smc_configure(0, 3, &usb_a9g20_nand_smc_config); |
249 | else | 251 | else |
250 | sam9_smc_configure(3, &usb_a9260_nand_smc_config); | 252 | sam9_smc_configure(0, 3, &usb_a9260_nand_smc_config); |
251 | 253 | ||
252 | at91_add_device_nand(&ek_nand_data); | 254 | at91_add_device_nand(&ek_nand_data); |
253 | } | 255 | } |
@@ -344,7 +346,7 @@ static void __init ek_board_init(void) | |||
344 | /* I2C */ | 346 | /* I2C */ |
345 | at91_add_device_i2c(NULL, 0); | 347 | at91_add_device_i2c(NULL, 0); |
346 | /* shutdown controller, wakeup button (5 msec low) */ | 348 | /* shutdown controller, wakeup button (5 msec low) */ |
347 | at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | 349 | at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) |
348 | | AT91_SHDW_WKMODE0_LOW | 350 | | AT91_SHDW_WKMODE0_LOW |
349 | | AT91_SHDW_RTTWKEN); | 351 | | AT91_SHDW_RTTWKEN); |
350 | } | 352 | } |
diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c index 12a3f955162b..bbd553e1cd93 100644 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c | |||
@@ -110,7 +110,7 @@ static struct gpio_led yl9200_leds[] = { | |||
110 | /* | 110 | /* |
111 | * Ethernet | 111 | * Ethernet |
112 | */ | 112 | */ |
113 | static struct at91_eth_data __initdata yl9200_eth_data = { | 113 | static struct macb_platform_data __initdata yl9200_eth_data = { |
114 | .phy_irq_pin = AT91_PIN_PB28, | 114 | .phy_irq_pin = AT91_PIN_PB28, |
115 | .is_rmii = 1, | 115 | .is_rmii = 1, |
116 | }; | 116 | }; |
@@ -120,6 +120,8 @@ static struct at91_eth_data __initdata yl9200_eth_data = { | |||
120 | */ | 120 | */ |
121 | static struct at91_usbh_data __initdata yl9200_usbh_data = { | 121 | static struct at91_usbh_data __initdata yl9200_usbh_data = { |
122 | .ports = 1, /* PQFP version of AT91RM9200 */ | 122 | .ports = 1, /* PQFP version of AT91RM9200 */ |
123 | .vbus_pin = {-EINVAL, -EINVAL}, | ||
124 | .overcurrent_pin= {-EINVAL, -EINVAL}, | ||
123 | }; | 125 | }; |
124 | 126 | ||
125 | /* | 127 | /* |
@@ -137,8 +139,9 @@ static struct at91_udc_data __initdata yl9200_udc_data = { | |||
137 | */ | 139 | */ |
138 | static struct at91_mmc_data __initdata yl9200_mmc_data = { | 140 | static struct at91_mmc_data __initdata yl9200_mmc_data = { |
139 | .det_pin = AT91_PIN_PB9, | 141 | .det_pin = AT91_PIN_PB9, |
140 | // .wp_pin = ... not connected | ||
141 | .wire4 = 1, | 142 | .wire4 = 1, |
143 | .wp_pin = -EINVAL, | ||
144 | .vcc_pin = -EINVAL, | ||
142 | }; | 145 | }; |
143 | 146 | ||
144 | /* | 147 | /* |
@@ -175,7 +178,7 @@ static struct mtd_partition __initdata yl9200_nand_partition[] = { | |||
175 | static struct atmel_nand_data __initdata yl9200_nand_data = { | 178 | static struct atmel_nand_data __initdata yl9200_nand_data = { |
176 | .ale = 6, | 179 | .ale = 6, |
177 | .cle = 7, | 180 | .cle = 7, |
178 | // .det_pin = ... not connected | 181 | .det_pin = -EINVAL, |
179 | .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ | 182 | .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ |
180 | .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ | 183 | .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ |
181 | .parts = yl9200_nand_partition, | 184 | .parts = yl9200_nand_partition, |
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 938b34f57741..40309588f360 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -29,6 +29,7 @@ extern void __init at91_aic_init(unsigned int priority[]); | |||
29 | /* Timer */ | 29 | /* Timer */ |
30 | struct sys_timer; | 30 | struct sys_timer; |
31 | extern struct sys_timer at91rm9200_timer; | 31 | extern struct sys_timer at91rm9200_timer; |
32 | extern void at91sam926x_ioremap_pit(u32 addr); | ||
32 | extern struct sys_timer at91sam926x_timer; | 33 | extern struct sys_timer at91sam926x_timer; |
33 | extern struct sys_timer at91x40_timer; | 34 | extern struct sys_timer at91x40_timer; |
34 | 35 | ||
@@ -59,14 +60,16 @@ extern void at91_irq_resume(void); | |||
59 | /* reset */ | 60 | /* reset */ |
60 | extern void at91sam9_alt_reset(void); | 61 | extern void at91sam9_alt_reset(void); |
61 | 62 | ||
63 | /* shutdown */ | ||
64 | extern void at91_ioremap_shdwc(u32 base_addr); | ||
65 | |||
62 | /* GPIO */ | 66 | /* GPIO */ |
63 | #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ | 67 | #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */ |
64 | #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ | 68 | #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ |
65 | 69 | ||
66 | struct at91_gpio_bank { | 70 | struct at91_gpio_bank { |
67 | unsigned short id; /* peripheral ID */ | 71 | unsigned short id; /* peripheral ID */ |
68 | unsigned long offset; /* offset from system peripheral base */ | 72 | unsigned long regbase; /* offset from system peripheral base */ |
69 | struct clk *clock; /* associated clock */ | ||
70 | }; | 73 | }; |
71 | extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); | 74 | extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks); |
72 | extern void __init at91_gpio_irq_setup(void); | 75 | extern void __init at91_gpio_irq_setup(void); |
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index 224e9e2f8674..74d6783eeabb 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c | |||
@@ -29,8 +29,9 @@ | |||
29 | struct at91_gpio_chip { | 29 | struct at91_gpio_chip { |
30 | struct gpio_chip chip; | 30 | struct gpio_chip chip; |
31 | struct at91_gpio_chip *next; /* Bank sharing same clock */ | 31 | struct at91_gpio_chip *next; /* Bank sharing same clock */ |
32 | struct at91_gpio_bank *bank; /* Bank definition */ | 32 | int id; /* ID of register bank */ |
33 | void __iomem *regbase; /* Base of register bank */ | 33 | void __iomem *regbase; /* Base of register bank */ |
34 | struct clk *clock; /* associated clock */ | ||
34 | }; | 35 | }; |
35 | 36 | ||
36 | #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) | 37 | #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) |
@@ -58,18 +59,17 @@ static int at91_gpiolib_direction_input(struct gpio_chip *chip, | |||
58 | } | 59 | } |
59 | 60 | ||
60 | static struct at91_gpio_chip gpio_chip[] = { | 61 | static struct at91_gpio_chip gpio_chip[] = { |
61 | AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), | 62 | AT91_GPIO_CHIP("pioA", 0x00, 32), |
62 | AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), | 63 | AT91_GPIO_CHIP("pioB", 0x20, 32), |
63 | AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), | 64 | AT91_GPIO_CHIP("pioC", 0x40, 32), |
64 | AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), | 65 | AT91_GPIO_CHIP("pioD", 0x60, 32), |
65 | AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), | 66 | AT91_GPIO_CHIP("pioE", 0x80, 32), |
66 | }; | 67 | }; |
67 | 68 | ||
68 | static int gpio_banks; | 69 | static int gpio_banks; |
69 | 70 | ||
70 | static inline void __iomem *pin_to_controller(unsigned pin) | 71 | static inline void __iomem *pin_to_controller(unsigned pin) |
71 | { | 72 | { |
72 | pin -= PIN_BASE; | ||
73 | pin /= 32; | 73 | pin /= 32; |
74 | if (likely(pin < gpio_banks)) | 74 | if (likely(pin < gpio_banks)) |
75 | return gpio_chip[pin].regbase; | 75 | return gpio_chip[pin].regbase; |
@@ -79,7 +79,6 @@ static inline void __iomem *pin_to_controller(unsigned pin) | |||
79 | 79 | ||
80 | static inline unsigned pin_to_mask(unsigned pin) | 80 | static inline unsigned pin_to_mask(unsigned pin) |
81 | { | 81 | { |
82 | pin -= PIN_BASE; | ||
83 | return 1 << (pin % 32); | 82 | return 1 << (pin % 32); |
84 | } | 83 | } |
85 | 84 | ||
@@ -274,8 +273,9 @@ static u32 backups[MAX_GPIO_BANKS]; | |||
274 | 273 | ||
275 | static int gpio_irq_set_wake(struct irq_data *d, unsigned state) | 274 | static int gpio_irq_set_wake(struct irq_data *d, unsigned state) |
276 | { | 275 | { |
277 | unsigned mask = pin_to_mask(d->irq); | 276 | unsigned pin = irq_to_gpio(d->irq); |
278 | unsigned bank = (d->irq - PIN_BASE) / 32; | 277 | unsigned mask = pin_to_mask(pin); |
278 | unsigned bank = pin / 32; | ||
279 | 279 | ||
280 | if (unlikely(bank >= MAX_GPIO_BANKS)) | 280 | if (unlikely(bank >= MAX_GPIO_BANKS)) |
281 | return -EINVAL; | 281 | return -EINVAL; |
@@ -285,7 +285,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state) | |||
285 | else | 285 | else |
286 | wakeups[bank] &= ~mask; | 286 | wakeups[bank] &= ~mask; |
287 | 287 | ||
288 | irq_set_irq_wake(gpio_chip[bank].bank->id, state); | 288 | irq_set_irq_wake(gpio_chip[bank].id, state); |
289 | 289 | ||
290 | return 0; | 290 | return 0; |
291 | } | 291 | } |
@@ -302,7 +302,7 @@ void at91_gpio_suspend(void) | |||
302 | __raw_writel(wakeups[i], pio + PIO_IER); | 302 | __raw_writel(wakeups[i], pio + PIO_IER); |
303 | 303 | ||
304 | if (!wakeups[i]) | 304 | if (!wakeups[i]) |
305 | clk_disable(gpio_chip[i].bank->clock); | 305 | clk_disable(gpio_chip[i].clock); |
306 | else { | 306 | else { |
307 | #ifdef CONFIG_PM_DEBUG | 307 | #ifdef CONFIG_PM_DEBUG |
308 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); | 308 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); |
@@ -319,7 +319,7 @@ void at91_gpio_resume(void) | |||
319 | void __iomem *pio = gpio_chip[i].regbase; | 319 | void __iomem *pio = gpio_chip[i].regbase; |
320 | 320 | ||
321 | if (!wakeups[i]) | 321 | if (!wakeups[i]) |
322 | clk_enable(gpio_chip[i].bank->clock); | 322 | clk_enable(gpio_chip[i].clock); |
323 | 323 | ||
324 | __raw_writel(wakeups[i], pio + PIO_IDR); | 324 | __raw_writel(wakeups[i], pio + PIO_IDR); |
325 | __raw_writel(backups[i], pio + PIO_IER); | 325 | __raw_writel(backups[i], pio + PIO_IER); |
@@ -344,8 +344,9 @@ void at91_gpio_resume(void) | |||
344 | 344 | ||
345 | static void gpio_irq_mask(struct irq_data *d) | 345 | static void gpio_irq_mask(struct irq_data *d) |
346 | { | 346 | { |
347 | void __iomem *pio = pin_to_controller(d->irq); | 347 | unsigned pin = irq_to_gpio(d->irq); |
348 | unsigned mask = pin_to_mask(d->irq); | 348 | void __iomem *pio = pin_to_controller(pin); |
349 | unsigned mask = pin_to_mask(pin); | ||
349 | 350 | ||
350 | if (pio) | 351 | if (pio) |
351 | __raw_writel(mask, pio + PIO_IDR); | 352 | __raw_writel(mask, pio + PIO_IDR); |
@@ -353,8 +354,9 @@ static void gpio_irq_mask(struct irq_data *d) | |||
353 | 354 | ||
354 | static void gpio_irq_unmask(struct irq_data *d) | 355 | static void gpio_irq_unmask(struct irq_data *d) |
355 | { | 356 | { |
356 | void __iomem *pio = pin_to_controller(d->irq); | 357 | unsigned pin = irq_to_gpio(d->irq); |
357 | unsigned mask = pin_to_mask(d->irq); | 358 | void __iomem *pio = pin_to_controller(pin); |
359 | unsigned mask = pin_to_mask(pin); | ||
358 | 360 | ||
359 | if (pio) | 361 | if (pio) |
360 | __raw_writel(mask, pio + PIO_IER); | 362 | __raw_writel(mask, pio + PIO_IER); |
@@ -382,7 +384,7 @@ static struct irq_chip gpio_irqchip = { | |||
382 | 384 | ||
383 | static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | 385 | static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) |
384 | { | 386 | { |
385 | unsigned pin; | 387 | unsigned irq_pin; |
386 | struct irq_data *idata = irq_desc_get_irq_data(desc); | 388 | struct irq_data *idata = irq_desc_get_irq_data(desc); |
387 | struct irq_chip *chip = irq_data_get_irq_chip(idata); | 389 | struct irq_chip *chip = irq_data_get_irq_chip(idata); |
388 | struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); | 390 | struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); |
@@ -405,12 +407,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
405 | continue; | 407 | continue; |
406 | } | 408 | } |
407 | 409 | ||
408 | pin = at91_gpio->chip.base; | 410 | irq_pin = gpio_to_irq(at91_gpio->chip.base); |
409 | 411 | ||
410 | while (isr) { | 412 | while (isr) { |
411 | if (isr & 1) | 413 | if (isr & 1) |
412 | generic_handle_irq(pin); | 414 | generic_handle_irq(irq_pin); |
413 | pin++; | 415 | irq_pin++; |
414 | isr >>= 1; | 416 | isr >>= 1; |
415 | } | 417 | } |
416 | } | 418 | } |
@@ -438,7 +440,7 @@ static int at91_gpio_show(struct seq_file *s, void *unused) | |||
438 | seq_printf(s, "%i:\t", j); | 440 | seq_printf(s, "%i:\t", j); |
439 | 441 | ||
440 | for (bank = 0; bank < gpio_banks; bank++) { | 442 | for (bank = 0; bank < gpio_banks; bank++) { |
441 | unsigned pin = PIN_BASE + (32 * bank) + j; | 443 | unsigned pin = (32 * bank) + j; |
442 | void __iomem *pio = pin_to_controller(pin); | 444 | void __iomem *pio = pin_to_controller(pin); |
443 | unsigned mask = pin_to_mask(pin); | 445 | unsigned mask = pin_to_mask(pin); |
444 | 446 | ||
@@ -491,27 +493,28 @@ static struct lock_class_key gpio_lock_class; | |||
491 | */ | 493 | */ |
492 | void __init at91_gpio_irq_setup(void) | 494 | void __init at91_gpio_irq_setup(void) |
493 | { | 495 | { |
494 | unsigned pioc, pin; | 496 | unsigned pioc, irq = gpio_to_irq(0); |
495 | struct at91_gpio_chip *this, *prev; | 497 | struct at91_gpio_chip *this, *prev; |
496 | 498 | ||
497 | for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; | 499 | for (pioc = 0, this = gpio_chip, prev = NULL; |
498 | pioc++ < gpio_banks; | 500 | pioc++ < gpio_banks; |
499 | prev = this, this++) { | 501 | prev = this, this++) { |
500 | unsigned id = this->bank->id; | 502 | unsigned id = this->id; |
501 | unsigned i; | 503 | unsigned i; |
502 | 504 | ||
503 | __raw_writel(~0, this->regbase + PIO_IDR); | 505 | __raw_writel(~0, this->regbase + PIO_IDR); |
504 | 506 | ||
505 | for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { | 507 | for (i = 0, irq = gpio_to_irq(this->chip.base); i < 32; |
506 | irq_set_lockdep_class(pin, &gpio_lock_class); | 508 | i++, irq++) { |
509 | irq_set_lockdep_class(irq, &gpio_lock_class); | ||
507 | 510 | ||
508 | /* | 511 | /* |
509 | * Can use the "simple" and not "edge" handler since it's | 512 | * Can use the "simple" and not "edge" handler since it's |
510 | * shorter, and the AIC handles interrupts sanely. | 513 | * shorter, and the AIC handles interrupts sanely. |
511 | */ | 514 | */ |
512 | irq_set_chip_and_handler(pin, &gpio_irqchip, | 515 | irq_set_chip_and_handler(irq, &gpio_irqchip, |
513 | handle_simple_irq); | 516 | handle_simple_irq); |
514 | set_irq_flags(pin, IRQF_VALID); | 517 | set_irq_flags(irq, IRQF_VALID); |
515 | } | 518 | } |
516 | 519 | ||
517 | /* The toplevel handler handles one bank of GPIOs, except | 520 | /* The toplevel handler handles one bank of GPIOs, except |
@@ -524,7 +527,7 @@ void __init at91_gpio_irq_setup(void) | |||
524 | irq_set_chip_data(id, this); | 527 | irq_set_chip_data(id, this); |
525 | irq_set_chained_handler(id, gpio_irq_handler); | 528 | irq_set_chained_handler(id, gpio_irq_handler); |
526 | } | 529 | } |
527 | pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); | 530 | pr_info("AT91: %d gpio irqs in %d banks\n", irq - gpio_to_irq(0), gpio_banks); |
528 | } | 531 | } |
529 | 532 | ||
530 | /* gpiolib support */ | 533 | /* gpiolib support */ |
@@ -612,16 +615,26 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) | |||
612 | for (i = 0; i < nr_banks; i++) { | 615 | for (i = 0; i < nr_banks; i++) { |
613 | at91_gpio = &gpio_chip[i]; | 616 | at91_gpio = &gpio_chip[i]; |
614 | 617 | ||
615 | at91_gpio->bank = &data[i]; | 618 | at91_gpio->id = data[i].id; |
616 | at91_gpio->chip.base = PIN_BASE + i * 32; | 619 | at91_gpio->chip.base = i * 32; |
617 | at91_gpio->regbase = at91_gpio->bank->offset + | 620 | |
618 | (void __iomem *)AT91_VA_BASE_SYS; | 621 | at91_gpio->regbase = ioremap(data[i].regbase, 512); |
622 | if (!at91_gpio->regbase) { | ||
623 | pr_err("at91_gpio.%d, failed to map registers, ignoring.\n", i); | ||
624 | continue; | ||
625 | } | ||
626 | |||
627 | at91_gpio->clock = clk_get_sys(NULL, at91_gpio->chip.label); | ||
628 | if (!at91_gpio->clock) { | ||
629 | pr_err("at91_gpio.%d, failed to get clock, ignoring.\n", i); | ||
630 | continue; | ||
631 | } | ||
619 | 632 | ||
620 | /* enable PIO controller's clock */ | 633 | /* enable PIO controller's clock */ |
621 | clk_enable(at91_gpio->bank->clock); | 634 | clk_enable(at91_gpio->clock); |
622 | 635 | ||
623 | /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ | 636 | /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ |
624 | if (last && last->bank->id == at91_gpio->bank->id) | 637 | if (last && last->id == at91_gpio->id) |
625 | last->next = at91_gpio; | 638 | last->next = at91_gpio; |
626 | last = at91_gpio; | 639 | last = at91_gpio; |
627 | 640 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91_aic.h b/arch/arm/mach-at91/include/mach/at91_aic.h index 03566799d3be..3045781c473f 100644 --- a/arch/arm/mach-at91/include/mach/at91_aic.h +++ b/arch/arm/mach-at91/include/mach/at91_aic.h | |||
@@ -16,7 +16,19 @@ | |||
16 | #ifndef AT91_AIC_H | 16 | #ifndef AT91_AIC_H |
17 | #define AT91_AIC_H | 17 | #define AT91_AIC_H |
18 | 18 | ||
19 | #define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ | 19 | #ifndef __ASSEMBLY__ |
20 | extern void __iomem *at91_aic_base; | ||
21 | |||
22 | #define at91_aic_read(field) \ | ||
23 | __raw_readl(at91_aic_base + field) | ||
24 | |||
25 | #define at91_aic_write(field, value) \ | ||
26 | __raw_writel(value, at91_aic_base + field); | ||
27 | #else | ||
28 | .extern at91_aic_base | ||
29 | #endif | ||
30 | |||
31 | #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ | ||
20 | #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ | 32 | #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ |
21 | #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ | 33 | #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ |
22 | #define AT91_AIC_SRCTYPE_LOW (0 << 5) | 34 | #define AT91_AIC_SRCTYPE_LOW (0 << 5) |
@@ -24,30 +36,30 @@ | |||
24 | #define AT91_AIC_SRCTYPE_HIGH (2 << 5) | 36 | #define AT91_AIC_SRCTYPE_HIGH (2 << 5) |
25 | #define AT91_AIC_SRCTYPE_RISING (3 << 5) | 37 | #define AT91_AIC_SRCTYPE_RISING (3 << 5) |
26 | 38 | ||
27 | #define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ | 39 | #define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ |
28 | #define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ | 40 | #define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ |
29 | #define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ | 41 | #define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ |
30 | #define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ | 42 | #define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ |
31 | #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ | 43 | #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ |
32 | 44 | ||
33 | #define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ | 45 | #define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ |
34 | #define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ | 46 | #define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ |
35 | #define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ | 47 | #define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ |
36 | #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ | 48 | #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ |
37 | #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ | 49 | #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ |
38 | 50 | ||
39 | #define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ | 51 | #define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ |
40 | #define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ | 52 | #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ |
41 | #define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ | 53 | #define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ |
42 | #define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ | 54 | #define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ |
43 | #define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ | 55 | #define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ |
44 | #define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ | 56 | #define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ |
45 | #define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ | 57 | #define AT91_AIC_DCR 0x138 /* Debug Control Register */ |
46 | #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ | 58 | #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ |
47 | #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ | 59 | #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ |
48 | 60 | ||
49 | #define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ | 61 | #define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ |
50 | #define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ | 62 | #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ |
51 | #define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ | 63 | #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ |
52 | 64 | ||
53 | #endif | 65 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h index dbfe455a4c41..2aa0c5e13495 100644 --- a/arch/arm/mach-at91/include/mach/at91_dbgu.h +++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #define dbgu_readl(dbgu, field) \ | 19 | #define dbgu_readl(dbgu, field) \ |
20 | __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) | 20 | __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) |
21 | 21 | ||
22 | #ifdef AT91_DBGU | 22 | #if !defined(CONFIG_ARCH_AT91X40) |
23 | #define AT91_DBGU_CR (0x00) /* Control Register */ | 23 | #define AT91_DBGU_CR (0x00) /* Control Register */ |
24 | #define AT91_DBGU_MR (0x04) /* Mode Register */ | 24 | #define AT91_DBGU_MR (0x04) /* Mode Register */ |
25 | #define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ | 25 | #define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */ |
diff --git a/arch/arm/mach-at91/include/mach/at91_pit.h b/arch/arm/mach-at91/include/mach/at91_pit.h index 974d0bd05b5b..d1f80ad7f4d4 100644 --- a/arch/arm/mach-at91/include/mach/at91_pit.h +++ b/arch/arm/mach-at91/include/mach/at91_pit.h | |||
@@ -16,16 +16,16 @@ | |||
16 | #ifndef AT91_PIT_H | 16 | #ifndef AT91_PIT_H |
17 | #define AT91_PIT_H | 17 | #define AT91_PIT_H |
18 | 18 | ||
19 | #define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ | 19 | #define AT91_PIT_MR 0x00 /* Mode Register */ |
20 | #define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ | 20 | #define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ |
21 | #define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ | 21 | #define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ |
22 | #define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ | 22 | #define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ |
23 | 23 | ||
24 | #define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ | 24 | #define AT91_PIT_SR 0x04 /* Status Register */ |
25 | #define AT91_PIT_PITS (1 << 0) /* Timer Status */ | 25 | #define AT91_PIT_PITS (1 << 0) /* Timer Status */ |
26 | 26 | ||
27 | #define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ | 27 | #define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */ |
28 | #define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ | 28 | #define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */ |
29 | #define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ | 29 | #define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ |
30 | #define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ | 30 | #define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ |
31 | 31 | ||
diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h index e56f4701a3e5..da1945e5f714 100644 --- a/arch/arm/mach-at91/include/mach/at91_rtc.h +++ b/arch/arm/mach-at91/include/mach/at91_rtc.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #ifndef AT91_RTC_H | 16 | #ifndef AT91_RTC_H |
17 | #define AT91_RTC_H | 17 | #define AT91_RTC_H |
18 | 18 | ||
19 | #define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ | 19 | #define AT91_RTC_CR 0x00 /* Control Register */ |
20 | #define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ | 20 | #define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ |
21 | #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ | 21 | #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ |
22 | #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ | 22 | #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ |
@@ -29,44 +29,44 @@ | |||
29 | #define AT91_RTC_CALEVSEL_MONTH (1 << 16) | 29 | #define AT91_RTC_CALEVSEL_MONTH (1 << 16) |
30 | #define AT91_RTC_CALEVSEL_YEAR (2 << 16) | 30 | #define AT91_RTC_CALEVSEL_YEAR (2 << 16) |
31 | 31 | ||
32 | #define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ | 32 | #define AT91_RTC_MR 0x04 /* Mode Register */ |
33 | #define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ | 33 | #define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ |
34 | 34 | ||
35 | #define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ | 35 | #define AT91_RTC_TIMR 0x08 /* Time Register */ |
36 | #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ | 36 | #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ |
37 | #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ | 37 | #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ |
38 | #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ | 38 | #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ |
39 | #define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ | 39 | #define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ |
40 | 40 | ||
41 | #define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ | 41 | #define AT91_RTC_CALR 0x0c /* Calendar Register */ |
42 | #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ | 42 | #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ |
43 | #define AT91_RTC_YEAR (0xff << 8) /* Current Year */ | 43 | #define AT91_RTC_YEAR (0xff << 8) /* Current Year */ |
44 | #define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ | 44 | #define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ |
45 | #define AT91_RTC_DAY (7 << 21) /* Current Day */ | 45 | #define AT91_RTC_DAY (7 << 21) /* Current Day */ |
46 | #define AT91_RTC_DATE (0x3f << 24) /* Current Date */ | 46 | #define AT91_RTC_DATE (0x3f << 24) /* Current Date */ |
47 | 47 | ||
48 | #define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ | 48 | #define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */ |
49 | #define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ | 49 | #define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ |
50 | #define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ | 50 | #define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ |
51 | #define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ | 51 | #define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ |
52 | 52 | ||
53 | #define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ | 53 | #define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */ |
54 | #define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ | 54 | #define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ |
55 | #define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ | 55 | #define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ |
56 | 56 | ||
57 | #define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ | 57 | #define AT91_RTC_SR 0x18 /* Status Register */ |
58 | #define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ | 58 | #define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ |
59 | #define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ | 59 | #define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ |
60 | #define AT91_RTC_SECEV (1 << 2) /* Second Event */ | 60 | #define AT91_RTC_SECEV (1 << 2) /* Second Event */ |
61 | #define AT91_RTC_TIMEV (1 << 3) /* Time Event */ | 61 | #define AT91_RTC_TIMEV (1 << 3) /* Time Event */ |
62 | #define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ | 62 | #define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ |
63 | 63 | ||
64 | #define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ | 64 | #define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */ |
65 | #define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ | 65 | #define AT91_RTC_IER 0x20 /* Interrupt Enable Register */ |
66 | #define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ | 66 | #define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ |
67 | #define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ | 67 | #define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ |
68 | 68 | ||
69 | #define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ | 69 | #define AT91_RTC_VER 0x2c /* Valid Entry Register */ |
70 | #define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ | 70 | #define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ |
71 | #define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ | 71 | #define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ |
72 | #define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ | 72 | #define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ |
diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h index c4ce07e8a8fa..1d4fe822c77a 100644 --- a/arch/arm/mach-at91/include/mach/at91_shdwc.h +++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h | |||
@@ -16,11 +16,21 @@ | |||
16 | #ifndef AT91_SHDWC_H | 16 | #ifndef AT91_SHDWC_H |
17 | #define AT91_SHDWC_H | 17 | #define AT91_SHDWC_H |
18 | 18 | ||
19 | #define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ | 19 | #ifndef __ASSEMBLY__ |
20 | extern void __iomem *at91_shdwc_base; | ||
21 | |||
22 | #define at91_shdwc_read(field) \ | ||
23 | __raw_readl(at91_shdwc_base + field) | ||
24 | |||
25 | #define at91_shdwc_write(field, value) \ | ||
26 | __raw_writel(value, at91_shdwc_base + field); | ||
27 | #endif | ||
28 | |||
29 | #define AT91_SHDW_CR 0x00 /* Shut Down Control Register */ | ||
20 | #define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ | 30 | #define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ |
21 | #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ | 31 | #define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ |
22 | 32 | ||
23 | #define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ | 33 | #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */ |
24 | #define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ | 34 | #define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ |
25 | #define AT91_SHDW_WKMODE0_NONE 0 | 35 | #define AT91_SHDW_WKMODE0_NONE 0 |
26 | #define AT91_SHDW_WKMODE0_HIGH 1 | 36 | #define AT91_SHDW_WKMODE0_HIGH 1 |
@@ -30,7 +40,7 @@ | |||
30 | #define AT91_SHDW_CPTWK0_(x) ((x) << 4) | 40 | #define AT91_SHDW_CPTWK0_(x) ((x) << 4) |
31 | #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ | 41 | #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ |
32 | 42 | ||
33 | #define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ | 43 | #define AT91_SHDW_SR 0x08 /* Shut Down Status Register */ |
34 | #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ | 44 | #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ |
35 | #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ | 45 | #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ |
36 | #define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ | 46 | #define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ |
diff --git a/arch/arm/mach-at91/include/mach/at91cap9.h b/arch/arm/mach-at91/include/mach/at91cap9.h index c5df1e8f1955..4c0e2f6011d7 100644 --- a/arch/arm/mach-at91/include/mach/at91cap9.h +++ b/arch/arm/mach-at91/include/mach/at91cap9.h | |||
@@ -79,29 +79,28 @@ | |||
79 | /* | 79 | /* |
80 | * System Peripherals (offset from AT91_BASE_SYS) | 80 | * System Peripherals (offset from AT91_BASE_SYS) |
81 | */ | 81 | */ |
82 | #define AT91_ECC (0xffffe200 - AT91_BASE_SYS) | ||
83 | #define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) | 82 | #define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) |
84 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) | 83 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) |
85 | #define AT91_SMC (0xffffe800 - AT91_BASE_SYS) | ||
86 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) | 84 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) |
87 | #define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS) | ||
88 | #define AT91_DMA (0xffffec00 - AT91_BASE_SYS) | ||
89 | #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) | ||
90 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
91 | #define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) | ||
92 | #define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) | ||
93 | #define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) | ||
94 | #define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) | ||
95 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 85 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
96 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 86 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
97 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
98 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
99 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
100 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
101 | #define AT91_GPBR (cpu_is_at91cap9_revB() ? \ | 87 | #define AT91_GPBR (cpu_is_at91cap9_revB() ? \ |
102 | (0xfffffd50 - AT91_BASE_SYS) : \ | 88 | (0xfffffd50 - AT91_BASE_SYS) : \ |
103 | (0xfffffd60 - AT91_BASE_SYS)) | 89 | (0xfffffd60 - AT91_BASE_SYS)) |
104 | 90 | ||
91 | #define AT91CAP9_BASE_ECC 0xffffe200 | ||
92 | #define AT91CAP9_BASE_DMA 0xffffec00 | ||
93 | #define AT91CAP9_BASE_SMC 0xffffe800 | ||
94 | #define AT91CAP9_BASE_DBGU AT91_BASE_DBGU1 | ||
95 | #define AT91CAP9_BASE_PIOA 0xfffff200 | ||
96 | #define AT91CAP9_BASE_PIOB 0xfffff400 | ||
97 | #define AT91CAP9_BASE_PIOC 0xfffff600 | ||
98 | #define AT91CAP9_BASE_PIOD 0xfffff800 | ||
99 | #define AT91CAP9_BASE_SHDWC 0xfffffd10 | ||
100 | #define AT91CAP9_BASE_RTT 0xfffffd20 | ||
101 | #define AT91CAP9_BASE_PIT 0xfffffd30 | ||
102 | #define AT91CAP9_BASE_WDT 0xfffffd40 | ||
103 | |||
105 | #define AT91_USART0 AT91CAP9_BASE_US0 | 104 | #define AT91_USART0 AT91CAP9_BASE_US0 |
106 | #define AT91_USART1 AT91CAP9_BASE_US1 | 105 | #define AT91_USART1 AT91CAP9_BASE_US1 |
107 | #define AT91_USART2 AT91CAP9_BASE_US2 | 106 | #define AT91_USART2 AT91CAP9_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91rm9200.h b/arch/arm/mach-at91/include/mach/at91rm9200.h index e4037b500302..bacb51141819 100644 --- a/arch/arm/mach-at91/include/mach/at91rm9200.h +++ b/arch/arm/mach-at91/include/mach/at91rm9200.h | |||
@@ -79,17 +79,17 @@ | |||
79 | /* | 79 | /* |
80 | * System Peripherals (offset from AT91_BASE_SYS) | 80 | * System Peripherals (offset from AT91_BASE_SYS) |
81 | */ | 81 | */ |
82 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ | ||
83 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */ | ||
84 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */ | ||
85 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */ | ||
86 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */ | ||
87 | #define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */ | ||
88 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ | 82 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ |
89 | #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ | 83 | #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ |
90 | #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ | ||
91 | #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ | 84 | #define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ |
92 | 85 | ||
86 | #define AT91RM9200_BASE_DBGU AT91_BASE_DBGU0 /* Debug Unit */ | ||
87 | #define AT91RM9200_BASE_PIOA 0xfffff400 /* PIO Controller A */ | ||
88 | #define AT91RM9200_BASE_PIOB 0xfffff600 /* PIO Controller B */ | ||
89 | #define AT91RM9200_BASE_PIOC 0xfffff800 /* PIO Controller C */ | ||
90 | #define AT91RM9200_BASE_PIOD 0xfffffa00 /* PIO Controller D */ | ||
91 | #define AT91RM9200_BASE_RTC 0xfffffe00 /* Real-Time Clock */ | ||
92 | |||
93 | #define AT91_USART0 AT91RM9200_BASE_US0 | 93 | #define AT91_USART0 AT91RM9200_BASE_US0 |
94 | #define AT91_USART1 AT91RM9200_BASE_US1 | 94 | #define AT91_USART1 AT91RM9200_BASE_US1 |
95 | #define AT91_USART2 AT91RM9200_BASE_US2 | 95 | #define AT91_USART2 AT91RM9200_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260.h b/arch/arm/mach-at91/include/mach/at91sam9260.h index 9a791165913f..f937c476bb67 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9260.h +++ b/arch/arm/mach-at91/include/mach/at91sam9260.h | |||
@@ -80,24 +80,23 @@ | |||
80 | /* | 80 | /* |
81 | * System Peripherals (offset from AT91_BASE_SYS) | 81 | * System Peripherals (offset from AT91_BASE_SYS) |
82 | */ | 82 | */ |
83 | #define AT91_ECC (0xffffe800 - AT91_BASE_SYS) | ||
84 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | 83 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) |
85 | #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | ||
86 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | 84 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) |
87 | #define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) | ||
88 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
89 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | ||
90 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | ||
91 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | ||
92 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | ||
93 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 85 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
94 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 86 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
95 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
96 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
97 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
98 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
99 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) | 87 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) |
100 | 88 | ||
89 | #define AT91SAM9260_BASE_ECC 0xffffe800 | ||
90 | #define AT91SAM9260_BASE_SMC 0xffffec00 | ||
91 | #define AT91SAM9260_BASE_DBGU AT91_BASE_DBGU0 | ||
92 | #define AT91SAM9260_BASE_PIOA 0xfffff400 | ||
93 | #define AT91SAM9260_BASE_PIOB 0xfffff600 | ||
94 | #define AT91SAM9260_BASE_PIOC 0xfffff800 | ||
95 | #define AT91SAM9260_BASE_SHDWC 0xfffffd10 | ||
96 | #define AT91SAM9260_BASE_RTT 0xfffffd20 | ||
97 | #define AT91SAM9260_BASE_PIT 0xfffffd30 | ||
98 | #define AT91SAM9260_BASE_WDT 0xfffffd40 | ||
99 | |||
101 | #define AT91_USART0 AT91SAM9260_BASE_US0 | 100 | #define AT91_USART0 AT91SAM9260_BASE_US0 |
102 | #define AT91_USART1 AT91SAM9260_BASE_US1 | 101 | #define AT91_USART1 AT91SAM9260_BASE_US1 |
103 | #define AT91_USART2 AT91SAM9260_BASE_US2 | 102 | #define AT91_USART2 AT91SAM9260_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261.h b/arch/arm/mach-at91/include/mach/at91sam9261.h index ce596204cefa..175604e261be 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9261.h +++ b/arch/arm/mach-at91/include/mach/at91sam9261.h | |||
@@ -66,21 +66,21 @@ | |||
66 | * System Peripherals (offset from AT91_BASE_SYS) | 66 | * System Peripherals (offset from AT91_BASE_SYS) |
67 | */ | 67 | */ |
68 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | 68 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) |
69 | #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | ||
70 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | 69 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) |
71 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
72 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | ||
73 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | ||
74 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | ||
75 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | ||
76 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 70 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
77 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 71 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
78 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
79 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
80 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
81 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
82 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) | 72 | #define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) |
83 | 73 | ||
74 | #define AT91SAM9261_BASE_SMC 0xffffec00 | ||
75 | #define AT91SAM9261_BASE_DBGU AT91_BASE_DBGU0 | ||
76 | #define AT91SAM9261_BASE_PIOA 0xfffff400 | ||
77 | #define AT91SAM9261_BASE_PIOB 0xfffff600 | ||
78 | #define AT91SAM9261_BASE_PIOC 0xfffff800 | ||
79 | #define AT91SAM9261_BASE_SHDWC 0xfffffd10 | ||
80 | #define AT91SAM9261_BASE_RTT 0xfffffd20 | ||
81 | #define AT91SAM9261_BASE_PIT 0xfffffd30 | ||
82 | #define AT91SAM9261_BASE_WDT 0xfffffd40 | ||
83 | |||
84 | #define AT91_USART0 AT91SAM9261_BASE_US0 | 84 | #define AT91_USART0 AT91SAM9261_BASE_US0 |
85 | #define AT91_USART1 AT91SAM9261_BASE_US1 | 85 | #define AT91_USART1 AT91SAM9261_BASE_US1 |
86 | #define AT91_USART2 AT91SAM9261_BASE_US2 | 86 | #define AT91_USART2 AT91SAM9261_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263.h b/arch/arm/mach-at91/include/mach/at91sam9263.h index f1b92961a2b1..80c915002d83 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9263.h +++ b/arch/arm/mach-at91/include/mach/at91sam9263.h | |||
@@ -74,30 +74,29 @@ | |||
74 | /* | 74 | /* |
75 | * System Peripherals (offset from AT91_BASE_SYS) | 75 | * System Peripherals (offset from AT91_BASE_SYS) |
76 | */ | 76 | */ |
77 | #define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS) | ||
78 | #define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) | 77 | #define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) |
79 | #define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS) | ||
80 | #define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS) | ||
81 | #define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) | 78 | #define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) |
82 | #define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS) | ||
83 | #define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) | 79 | #define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) |
84 | #define AT91_CCFG (0xffffed10 - AT91_BASE_SYS) | ||
85 | #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) | ||
86 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
87 | #define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) | ||
88 | #define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) | ||
89 | #define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) | ||
90 | #define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) | ||
91 | #define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) | ||
92 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 80 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
93 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 81 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
94 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
95 | #define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS) | ||
96 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
97 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
98 | #define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) | ||
99 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 82 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
100 | 83 | ||
84 | #define AT91SAM9263_BASE_ECC0 0xffffe000 | ||
85 | #define AT91SAM9263_BASE_SMC0 0xffffe400 | ||
86 | #define AT91SAM9263_BASE_ECC1 0xffffe600 | ||
87 | #define AT91SAM9263_BASE_SMC1 0xffffea00 | ||
88 | #define AT91SAM9263_BASE_DBGU AT91_BASE_DBGU1 | ||
89 | #define AT91SAM9263_BASE_PIOA 0xfffff200 | ||
90 | #define AT91SAM9263_BASE_PIOB 0xfffff400 | ||
91 | #define AT91SAM9263_BASE_PIOC 0xfffff600 | ||
92 | #define AT91SAM9263_BASE_PIOD 0xfffff800 | ||
93 | #define AT91SAM9263_BASE_PIOE 0xfffffa00 | ||
94 | #define AT91SAM9263_BASE_SHDWC 0xfffffd10 | ||
95 | #define AT91SAM9263_BASE_RTT0 0xfffffd20 | ||
96 | #define AT91SAM9263_BASE_PIT 0xfffffd30 | ||
97 | #define AT91SAM9263_BASE_WDT 0xfffffd40 | ||
98 | #define AT91SAM9263_BASE_RTT1 0xfffffd50 | ||
99 | |||
101 | #define AT91_USART0 AT91SAM9263_BASE_US0 | 100 | #define AT91_USART0 AT91SAM9263_BASE_US0 |
102 | #define AT91_USART1 AT91SAM9263_BASE_US1 | 101 | #define AT91_USART1 AT91SAM9263_BASE_US1 |
103 | #define AT91_USART2 AT91SAM9263_BASE_US2 | 102 | #define AT91_USART2 AT91SAM9263_BASE_US2 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_smc.h b/arch/arm/mach-at91/include/mach/at91sam9_smc.h index 57de6207e57e..eb18a70fa647 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9_smc.h +++ b/arch/arm/mach-at91/include/mach/at91sam9_smc.h | |||
@@ -16,7 +16,9 @@ | |||
16 | #ifndef AT91SAM9_SMC_H | 16 | #ifndef AT91SAM9_SMC_H |
17 | #define AT91SAM9_SMC_H | 17 | #define AT91SAM9_SMC_H |
18 | 18 | ||
19 | #define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ | 19 | #include <mach/cpu.h> |
20 | |||
21 | #define AT91_SMC_SETUP 0x00 /* Setup Register for CS n */ | ||
20 | #define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ | 22 | #define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ |
21 | #define AT91_SMC_NWESETUP_(x) ((x) << 0) | 23 | #define AT91_SMC_NWESETUP_(x) ((x) << 0) |
22 | #define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ | 24 | #define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ |
@@ -26,7 +28,7 @@ | |||
26 | #define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ | 28 | #define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ |
27 | #define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) | 29 | #define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) |
28 | 30 | ||
29 | #define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ | 31 | #define AT91_SMC_PULSE 0x04 /* Pulse Register for CS n */ |
30 | #define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ | 32 | #define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ |
31 | #define AT91_SMC_NWEPULSE_(x) ((x) << 0) | 33 | #define AT91_SMC_NWEPULSE_(x) ((x) << 0) |
32 | #define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ | 34 | #define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ |
@@ -36,13 +38,13 @@ | |||
36 | #define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ | 38 | #define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ |
37 | #define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) | 39 | #define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) |
38 | 40 | ||
39 | #define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ | 41 | #define AT91_SMC_CYCLE 0x08 /* Cycle Register for CS n */ |
40 | #define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ | 42 | #define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ |
41 | #define AT91_SMC_NWECYCLE_(x) ((x) << 0) | 43 | #define AT91_SMC_NWECYCLE_(x) ((x) << 0) |
42 | #define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ | 44 | #define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ |
43 | #define AT91_SMC_NRDCYCLE_(x) ((x) << 16) | 45 | #define AT91_SMC_NRDCYCLE_(x) ((x) << 16) |
44 | 46 | ||
45 | #define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ | 47 | #define AT91_SMC_MODE 0x0c /* Mode Register for CS n */ |
46 | #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ | 48 | #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ |
47 | #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ | 49 | #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ |
48 | #define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ | 50 | #define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ |
@@ -66,11 +68,4 @@ | |||
66 | #define AT91_SMC_PS_16 (2 << 28) | 68 | #define AT91_SMC_PS_16 (2 << 28) |
67 | #define AT91_SMC_PS_32 (3 << 28) | 69 | #define AT91_SMC_PS_32 (3 << 28) |
68 | 70 | ||
69 | #if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ | ||
70 | #define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ | ||
71 | #define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ | ||
72 | #define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ | ||
73 | #define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ | ||
74 | #endif | ||
75 | |||
76 | #endif | 71 | #endif |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h index 406bb6496805..f0c23c960dec 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9g45.h +++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h | |||
@@ -86,27 +86,27 @@ | |||
86 | /* | 86 | /* |
87 | * System Peripherals (offset from AT91_BASE_SYS) | 87 | * System Peripherals (offset from AT91_BASE_SYS) |
88 | */ | 88 | */ |
89 | #define AT91_ECC (0xffffe200 - AT91_BASE_SYS) | ||
90 | #define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) | 89 | #define AT91_DDRSDRC1 (0xffffe400 - AT91_BASE_SYS) |
91 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) | 90 | #define AT91_DDRSDRC0 (0xffffe600 - AT91_BASE_SYS) |
92 | #define AT91_SMC (0xffffe800 - AT91_BASE_SYS) | ||
93 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) | 91 | #define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) |
94 | #define AT91_DMA (0xffffec00 - AT91_BASE_SYS) | ||
95 | #define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) | ||
96 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
97 | #define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) | ||
98 | #define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) | ||
99 | #define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) | ||
100 | #define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) | ||
101 | #define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) | ||
102 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 92 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
103 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 93 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
104 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
105 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
106 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
107 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
108 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 94 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
109 | #define AT91_RTC (0xfffffdb0 - AT91_BASE_SYS) | 95 | |
96 | #define AT91SAM9G45_BASE_ECC 0xffffe200 | ||
97 | #define AT91SAM9G45_BASE_DMA 0xffffec00 | ||
98 | #define AT91SAM9G45_BASE_SMC 0xffffe800 | ||
99 | #define AT91SAM9G45_BASE_DBGU AT91_BASE_DBGU1 | ||
100 | #define AT91SAM9G45_BASE_PIOA 0xfffff200 | ||
101 | #define AT91SAM9G45_BASE_PIOB 0xfffff400 | ||
102 | #define AT91SAM9G45_BASE_PIOC 0xfffff600 | ||
103 | #define AT91SAM9G45_BASE_PIOD 0xfffff800 | ||
104 | #define AT91SAM9G45_BASE_PIOE 0xfffffa00 | ||
105 | #define AT91SAM9G45_BASE_SHDWC 0xfffffd10 | ||
106 | #define AT91SAM9G45_BASE_RTT 0xfffffd20 | ||
107 | #define AT91SAM9G45_BASE_PIT 0xfffffd30 | ||
108 | #define AT91SAM9G45_BASE_WDT 0xfffffd40 | ||
109 | #define AT91SAM9G45_BASE_RTC 0xfffffdb0 | ||
110 | 110 | ||
111 | #define AT91_USART0 AT91SAM9G45_BASE_US0 | 111 | #define AT91_USART0 AT91SAM9G45_BASE_US0 |
112 | #define AT91_USART1 AT91SAM9G45_BASE_US1 | 112 | #define AT91_USART1 AT91SAM9G45_BASE_US1 |
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index 1aabacd315d4..2bb359e60b97 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h | |||
@@ -69,27 +69,26 @@ | |||
69 | /* | 69 | /* |
70 | * System Peripherals (offset from AT91_BASE_SYS) | 70 | * System Peripherals (offset from AT91_BASE_SYS) |
71 | */ | 71 | */ |
72 | #define AT91_DMA (0xffffe600 - AT91_BASE_SYS) | ||
73 | #define AT91_ECC (0xffffe800 - AT91_BASE_SYS) | ||
74 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) | 72 | #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) |
75 | #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | ||
76 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | 73 | #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) |
77 | #define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) | ||
78 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | ||
79 | #define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | ||
80 | #define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | ||
81 | #define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | ||
82 | #define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | ||
83 | #define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) | ||
84 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | 74 | #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) |
85 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | 75 | #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) |
86 | #define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) | ||
87 | #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | ||
88 | #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | ||
89 | #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | ||
90 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) | 76 | #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) |
91 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) | 77 | #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) |
92 | #define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) | 78 | |
79 | #define AT91SAM9RL_BASE_DMA 0xffffe600 | ||
80 | #define AT91SAM9RL_BASE_ECC 0xffffe800 | ||
81 | #define AT91SAM9RL_BASE_SMC 0xffffec00 | ||
82 | #define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0 | ||
83 | #define AT91SAM9RL_BASE_PIOA 0xfffff400 | ||
84 | #define AT91SAM9RL_BASE_PIOB 0xfffff600 | ||
85 | #define AT91SAM9RL_BASE_PIOC 0xfffff800 | ||
86 | #define AT91SAM9RL_BASE_PIOD 0xfffffa00 | ||
87 | #define AT91SAM9RL_BASE_SHDWC 0xfffffd10 | ||
88 | #define AT91SAM9RL_BASE_RTT 0xfffffd20 | ||
89 | #define AT91SAM9RL_BASE_PIT 0xfffffd30 | ||
90 | #define AT91SAM9RL_BASE_WDT 0xfffffd40 | ||
91 | #define AT91SAM9RL_BASE_RTC 0xfffffe00 | ||
93 | 92 | ||
94 | #define AT91_USART0 AT91SAM9RL_BASE_US0 | 93 | #define AT91_USART0 AT91SAM9RL_BASE_US0 |
95 | #define AT91_USART1 AT91SAM9RL_BASE_US1 | 94 | #define AT91_USART1 AT91SAM9RL_BASE_US1 |
diff --git a/arch/arm/mach-at91/include/mach/at91x40.h b/arch/arm/mach-at91/include/mach/at91x40.h index a152ff87e688..a57829f4fd18 100644 --- a/arch/arm/mach-at91/include/mach/at91x40.h +++ b/arch/arm/mach-at91/include/mach/at91x40.h | |||
@@ -40,7 +40,6 @@ | |||
40 | #define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ | 40 | #define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ |
41 | #define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ | 41 | #define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ |
42 | #define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ | 42 | #define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ |
43 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ | ||
44 | 43 | ||
45 | /* | 44 | /* |
46 | * The AT91x40 series doesn't have a debug unit like the other AT91 parts. | 45 | * The AT91x40 series doesn't have a debug unit like the other AT91 parts. |
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index eac92e995bb5..d0b377b21bd7 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
@@ -40,13 +40,14 @@ | |||
40 | #include <linux/atmel-mci.h> | 40 | #include <linux/atmel-mci.h> |
41 | #include <sound/atmel-ac97c.h> | 41 | #include <sound/atmel-ac97c.h> |
42 | #include <linux/serial.h> | 42 | #include <linux/serial.h> |
43 | #include <linux/platform_data/macb.h> | ||
43 | 44 | ||
44 | /* USB Device */ | 45 | /* USB Device */ |
45 | struct at91_udc_data { | 46 | struct at91_udc_data { |
46 | u8 vbus_pin; /* high == host powering us */ | 47 | int vbus_pin; /* high == host powering us */ |
47 | u8 vbus_active_low; /* vbus polarity */ | 48 | u8 vbus_active_low; /* vbus polarity */ |
48 | u8 vbus_polled; /* Use polling, not interrupt */ | 49 | u8 vbus_polled; /* Use polling, not interrupt */ |
49 | u8 pullup_pin; /* active == D+ pulled up */ | 50 | int pullup_pin; /* active == D+ pulled up */ |
50 | u8 pullup_active_low; /* true == pullup_pin is active low */ | 51 | u8 pullup_active_low; /* true == pullup_pin is active low */ |
51 | }; | 52 | }; |
52 | extern void __init at91_add_device_udc(struct at91_udc_data *data); | 53 | extern void __init at91_add_device_udc(struct at91_udc_data *data); |
@@ -56,10 +57,10 @@ extern void __init at91_add_device_usba(struct usba_platform_data *data); | |||
56 | 57 | ||
57 | /* Compact Flash */ | 58 | /* Compact Flash */ |
58 | struct at91_cf_data { | 59 | struct at91_cf_data { |
59 | u8 irq_pin; /* I/O IRQ */ | 60 | int irq_pin; /* I/O IRQ */ |
60 | u8 det_pin; /* Card detect */ | 61 | int det_pin; /* Card detect */ |
61 | u8 vcc_pin; /* power switching */ | 62 | int vcc_pin; /* power switching */ |
62 | u8 rst_pin; /* card reset */ | 63 | int rst_pin; /* card reset */ |
63 | u8 chipselect; /* EBI Chip Select number */ | 64 | u8 chipselect; /* EBI Chip Select number */ |
64 | u8 flags; | 65 | u8 flags; |
65 | #define AT91_CF_TRUE_IDE 0x01 | 66 | #define AT91_CF_TRUE_IDE 0x01 |
@@ -70,37 +71,26 @@ extern void __init at91_add_device_cf(struct at91_cf_data *data); | |||
70 | /* MMC / SD */ | 71 | /* MMC / SD */ |
71 | /* at91_mci platform config */ | 72 | /* at91_mci platform config */ |
72 | struct at91_mmc_data { | 73 | struct at91_mmc_data { |
73 | u8 det_pin; /* card detect IRQ */ | 74 | int det_pin; /* card detect IRQ */ |
74 | unsigned slot_b:1; /* uses Slot B */ | 75 | unsigned slot_b:1; /* uses Slot B */ |
75 | unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ | 76 | unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ |
76 | u8 wp_pin; /* (SD) writeprotect detect */ | 77 | int wp_pin; /* (SD) writeprotect detect */ |
77 | u8 vcc_pin; /* power switching (high == on) */ | 78 | int vcc_pin; /* power switching (high == on) */ |
78 | }; | 79 | }; |
79 | extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); | 80 | extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); |
80 | 81 | ||
81 | /* atmel-mci platform config */ | 82 | /* atmel-mci platform config */ |
82 | extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data); | 83 | extern void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data); |
83 | 84 | ||
84 | /* Ethernet (EMAC & MACB) */ | 85 | extern void __init at91_add_device_eth(struct macb_platform_data *data); |
85 | struct at91_eth_data { | ||
86 | u32 phy_mask; | ||
87 | u8 phy_irq_pin; /* PHY IRQ */ | ||
88 | u8 is_rmii; /* using RMII interface? */ | ||
89 | }; | ||
90 | extern void __init at91_add_device_eth(struct at91_eth_data *data); | ||
91 | |||
92 | #if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \ | ||
93 | || defined(CONFIG_ARCH_AT91SAM9G45) | ||
94 | #define eth_platform_data at91_eth_data | ||
95 | #endif | ||
96 | 86 | ||
97 | /* USB Host */ | 87 | /* USB Host */ |
98 | struct at91_usbh_data { | 88 | struct at91_usbh_data { |
99 | u8 ports; /* number of ports on root hub */ | 89 | u8 ports; /* number of ports on root hub */ |
100 | u8 vbus_pin[2]; /* port power-control pin */ | 90 | int vbus_pin[2]; /* port power-control pin */ |
101 | u8 vbus_pin_inverted; | 91 | u8 vbus_pin_inverted; |
102 | u8 overcurrent_supported; | 92 | u8 overcurrent_supported; |
103 | u8 overcurrent_pin[2]; | 93 | int overcurrent_pin[2]; |
104 | u8 overcurrent_status[2]; | 94 | u8 overcurrent_status[2]; |
105 | u8 overcurrent_changed[2]; | 95 | u8 overcurrent_changed[2]; |
106 | }; | 96 | }; |
@@ -110,9 +100,9 @@ extern void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data); | |||
110 | 100 | ||
111 | /* NAND / SmartMedia */ | 101 | /* NAND / SmartMedia */ |
112 | struct atmel_nand_data { | 102 | struct atmel_nand_data { |
113 | u8 enable_pin; /* chip enable */ | 103 | int enable_pin; /* chip enable */ |
114 | u8 det_pin; /* card detect */ | 104 | int det_pin; /* card detect */ |
115 | u8 rdy_pin; /* ready/busy */ | 105 | int rdy_pin; /* ready/busy */ |
116 | u8 rdy_pin_active_low; /* rdy_pin value is inverted */ | 106 | u8 rdy_pin_active_low; /* rdy_pin value is inverted */ |
117 | u8 ale; /* address line number connected to ALE */ | 107 | u8 ale; /* address line number connected to ALE */ |
118 | u8 cle; /* address line number connected to CLE */ | 108 | u8 cle; /* address line number connected to CLE */ |
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S index 0ed8648c6452..c6bb9e2d9baa 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/mach-at91/include/mach/debug-macro.S | |||
@@ -14,9 +14,15 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/at91_dbgu.h> | 15 | #include <mach/at91_dbgu.h> |
16 | 16 | ||
17 | #if defined(CONFIG_AT91_DEBUG_LL_DBGU0) | ||
18 | #define AT91_DBGU AT91_BASE_DBGU0 | ||
19 | #else | ||
20 | #define AT91_DBGU AT91_BASE_DBGU1 | ||
21 | #endif | ||
22 | |||
17 | .macro addruart, rp, rv, tmp | 23 | .macro addruart, rp, rv, tmp |
18 | ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) | 24 | ldr \rp, =AT91_DBGU @ System peripherals (phys address) |
19 | ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) | 25 | ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) |
20 | .endm | 26 | .endm |
21 | 27 | ||
22 | .macro senduart,rd,rx | 28 | .macro senduart,rd,rx |
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S index 7ab68f972227..423eea0ed74c 100644 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ b/arch/arm/mach-at91/include/mach/entry-macro.S | |||
@@ -17,16 +17,17 @@ | |||
17 | .endm | 17 | .endm |
18 | 18 | ||
19 | .macro get_irqnr_preamble, base, tmp | 19 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral | 20 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral |
21 | ldr \base, [\base] | ||
21 | .endm | 22 | .endm |
22 | 23 | ||
23 | .macro arch_ret_to_user, tmp1, tmp2 | 24 | .macro arch_ret_to_user, tmp1, tmp2 |
24 | .endm | 25 | .endm |
25 | 26 | ||
26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
27 | ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) | 28 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) |
28 | ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number | 29 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number |
29 | teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt | 30 | teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt |
30 | streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now. | 31 | streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. |
31 | .endm | 32 | .endm |
32 | 33 | ||
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index 2b9a1f51210f..e3fd225121c7 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h | |||
@@ -16,177 +16,175 @@ | |||
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <asm/irq.h> | 17 | #include <asm/irq.h> |
18 | 18 | ||
19 | #define PIN_BASE NR_AIC_IRQS | ||
20 | |||
21 | #define MAX_GPIO_BANKS 5 | 19 | #define MAX_GPIO_BANKS 5 |
22 | #define NR_BUILTIN_GPIO (PIN_BASE + (MAX_GPIO_BANKS * 32)) | 20 | #define NR_BUILTIN_GPIO (MAX_GPIO_BANKS * 32) |
23 | 21 | ||
24 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ | 22 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ |
25 | 23 | ||
26 | #define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) | 24 | #define AT91_PIN_PA0 (0x00 + 0) |
27 | #define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) | 25 | #define AT91_PIN_PA1 (0x00 + 1) |
28 | #define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) | 26 | #define AT91_PIN_PA2 (0x00 + 2) |
29 | #define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) | 27 | #define AT91_PIN_PA3 (0x00 + 3) |
30 | #define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) | 28 | #define AT91_PIN_PA4 (0x00 + 4) |
31 | #define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) | 29 | #define AT91_PIN_PA5 (0x00 + 5) |
32 | #define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) | 30 | #define AT91_PIN_PA6 (0x00 + 6) |
33 | #define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) | 31 | #define AT91_PIN_PA7 (0x00 + 7) |
34 | #define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) | 32 | #define AT91_PIN_PA8 (0x00 + 8) |
35 | #define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) | 33 | #define AT91_PIN_PA9 (0x00 + 9) |
36 | #define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) | 34 | #define AT91_PIN_PA10 (0x00 + 10) |
37 | #define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) | 35 | #define AT91_PIN_PA11 (0x00 + 11) |
38 | #define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) | 36 | #define AT91_PIN_PA12 (0x00 + 12) |
39 | #define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) | 37 | #define AT91_PIN_PA13 (0x00 + 13) |
40 | #define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) | 38 | #define AT91_PIN_PA14 (0x00 + 14) |
41 | #define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) | 39 | #define AT91_PIN_PA15 (0x00 + 15) |
42 | #define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) | 40 | #define AT91_PIN_PA16 (0x00 + 16) |
43 | #define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) | 41 | #define AT91_PIN_PA17 (0x00 + 17) |
44 | #define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) | 42 | #define AT91_PIN_PA18 (0x00 + 18) |
45 | #define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) | 43 | #define AT91_PIN_PA19 (0x00 + 19) |
46 | #define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) | 44 | #define AT91_PIN_PA20 (0x00 + 20) |
47 | #define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) | 45 | #define AT91_PIN_PA21 (0x00 + 21) |
48 | #define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) | 46 | #define AT91_PIN_PA22 (0x00 + 22) |
49 | #define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) | 47 | #define AT91_PIN_PA23 (0x00 + 23) |
50 | #define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) | 48 | #define AT91_PIN_PA24 (0x00 + 24) |
51 | #define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) | 49 | #define AT91_PIN_PA25 (0x00 + 25) |
52 | #define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) | 50 | #define AT91_PIN_PA26 (0x00 + 26) |
53 | #define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) | 51 | #define AT91_PIN_PA27 (0x00 + 27) |
54 | #define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) | 52 | #define AT91_PIN_PA28 (0x00 + 28) |
55 | #define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) | 53 | #define AT91_PIN_PA29 (0x00 + 29) |
56 | #define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) | 54 | #define AT91_PIN_PA30 (0x00 + 30) |
57 | #define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) | 55 | #define AT91_PIN_PA31 (0x00 + 31) |
58 | 56 | ||
59 | #define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) | 57 | #define AT91_PIN_PB0 (0x20 + 0) |
60 | #define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) | 58 | #define AT91_PIN_PB1 (0x20 + 1) |
61 | #define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) | 59 | #define AT91_PIN_PB2 (0x20 + 2) |
62 | #define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) | 60 | #define AT91_PIN_PB3 (0x20 + 3) |
63 | #define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) | 61 | #define AT91_PIN_PB4 (0x20 + 4) |
64 | #define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) | 62 | #define AT91_PIN_PB5 (0x20 + 5) |
65 | #define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) | 63 | #define AT91_PIN_PB6 (0x20 + 6) |
66 | #define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) | 64 | #define AT91_PIN_PB7 (0x20 + 7) |
67 | #define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) | 65 | #define AT91_PIN_PB8 (0x20 + 8) |
68 | #define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) | 66 | #define AT91_PIN_PB9 (0x20 + 9) |
69 | #define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) | 67 | #define AT91_PIN_PB10 (0x20 + 10) |
70 | #define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) | 68 | #define AT91_PIN_PB11 (0x20 + 11) |
71 | #define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) | 69 | #define AT91_PIN_PB12 (0x20 + 12) |
72 | #define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) | 70 | #define AT91_PIN_PB13 (0x20 + 13) |
73 | #define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) | 71 | #define AT91_PIN_PB14 (0x20 + 14) |
74 | #define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) | 72 | #define AT91_PIN_PB15 (0x20 + 15) |
75 | #define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) | 73 | #define AT91_PIN_PB16 (0x20 + 16) |
76 | #define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) | 74 | #define AT91_PIN_PB17 (0x20 + 17) |
77 | #define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) | 75 | #define AT91_PIN_PB18 (0x20 + 18) |
78 | #define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) | 76 | #define AT91_PIN_PB19 (0x20 + 19) |
79 | #define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) | 77 | #define AT91_PIN_PB20 (0x20 + 20) |
80 | #define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) | 78 | #define AT91_PIN_PB21 (0x20 + 21) |
81 | #define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) | 79 | #define AT91_PIN_PB22 (0x20 + 22) |
82 | #define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) | 80 | #define AT91_PIN_PB23 (0x20 + 23) |
83 | #define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) | 81 | #define AT91_PIN_PB24 (0x20 + 24) |
84 | #define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) | 82 | #define AT91_PIN_PB25 (0x20 + 25) |
85 | #define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) | 83 | #define AT91_PIN_PB26 (0x20 + 26) |
86 | #define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) | 84 | #define AT91_PIN_PB27 (0x20 + 27) |
87 | #define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) | 85 | #define AT91_PIN_PB28 (0x20 + 28) |
88 | #define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) | 86 | #define AT91_PIN_PB29 (0x20 + 29) |
89 | #define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) | 87 | #define AT91_PIN_PB30 (0x20 + 30) |
90 | #define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) | 88 | #define AT91_PIN_PB31 (0x20 + 31) |
91 | 89 | ||
92 | #define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) | 90 | #define AT91_PIN_PC0 (0x40 + 0) |
93 | #define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) | 91 | #define AT91_PIN_PC1 (0x40 + 1) |
94 | #define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) | 92 | #define AT91_PIN_PC2 (0x40 + 2) |
95 | #define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) | 93 | #define AT91_PIN_PC3 (0x40 + 3) |
96 | #define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) | 94 | #define AT91_PIN_PC4 (0x40 + 4) |
97 | #define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) | 95 | #define AT91_PIN_PC5 (0x40 + 5) |
98 | #define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) | 96 | #define AT91_PIN_PC6 (0x40 + 6) |
99 | #define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) | 97 | #define AT91_PIN_PC7 (0x40 + 7) |
100 | #define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) | 98 | #define AT91_PIN_PC8 (0x40 + 8) |
101 | #define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) | 99 | #define AT91_PIN_PC9 (0x40 + 9) |
102 | #define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) | 100 | #define AT91_PIN_PC10 (0x40 + 10) |
103 | #define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) | 101 | #define AT91_PIN_PC11 (0x40 + 11) |
104 | #define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) | 102 | #define AT91_PIN_PC12 (0x40 + 12) |
105 | #define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) | 103 | #define AT91_PIN_PC13 (0x40 + 13) |
106 | #define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) | 104 | #define AT91_PIN_PC14 (0x40 + 14) |
107 | #define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) | 105 | #define AT91_PIN_PC15 (0x40 + 15) |
108 | #define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) | 106 | #define AT91_PIN_PC16 (0x40 + 16) |
109 | #define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) | 107 | #define AT91_PIN_PC17 (0x40 + 17) |
110 | #define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) | 108 | #define AT91_PIN_PC18 (0x40 + 18) |
111 | #define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) | 109 | #define AT91_PIN_PC19 (0x40 + 19) |
112 | #define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) | 110 | #define AT91_PIN_PC20 (0x40 + 20) |
113 | #define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) | 111 | #define AT91_PIN_PC21 (0x40 + 21) |
114 | #define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) | 112 | #define AT91_PIN_PC22 (0x40 + 22) |
115 | #define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) | 113 | #define AT91_PIN_PC23 (0x40 + 23) |
116 | #define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) | 114 | #define AT91_PIN_PC24 (0x40 + 24) |
117 | #define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) | 115 | #define AT91_PIN_PC25 (0x40 + 25) |
118 | #define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) | 116 | #define AT91_PIN_PC26 (0x40 + 26) |
119 | #define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) | 117 | #define AT91_PIN_PC27 (0x40 + 27) |
120 | #define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) | 118 | #define AT91_PIN_PC28 (0x40 + 28) |
121 | #define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) | 119 | #define AT91_PIN_PC29 (0x40 + 29) |
122 | #define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) | 120 | #define AT91_PIN_PC30 (0x40 + 30) |
123 | #define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) | 121 | #define AT91_PIN_PC31 (0x40 + 31) |
124 | 122 | ||
125 | #define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) | 123 | #define AT91_PIN_PD0 (0x60 + 0) |
126 | #define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) | 124 | #define AT91_PIN_PD1 (0x60 + 1) |
127 | #define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) | 125 | #define AT91_PIN_PD2 (0x60 + 2) |
128 | #define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) | 126 | #define AT91_PIN_PD3 (0x60 + 3) |
129 | #define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) | 127 | #define AT91_PIN_PD4 (0x60 + 4) |
130 | #define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) | 128 | #define AT91_PIN_PD5 (0x60 + 5) |
131 | #define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) | 129 | #define AT91_PIN_PD6 (0x60 + 6) |
132 | #define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) | 130 | #define AT91_PIN_PD7 (0x60 + 7) |
133 | #define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) | 131 | #define AT91_PIN_PD8 (0x60 + 8) |
134 | #define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) | 132 | #define AT91_PIN_PD9 (0x60 + 9) |
135 | #define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) | 133 | #define AT91_PIN_PD10 (0x60 + 10) |
136 | #define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) | 134 | #define AT91_PIN_PD11 (0x60 + 11) |
137 | #define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) | 135 | #define AT91_PIN_PD12 (0x60 + 12) |
138 | #define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) | 136 | #define AT91_PIN_PD13 (0x60 + 13) |
139 | #define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) | 137 | #define AT91_PIN_PD14 (0x60 + 14) |
140 | #define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) | 138 | #define AT91_PIN_PD15 (0x60 + 15) |
141 | #define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) | 139 | #define AT91_PIN_PD16 (0x60 + 16) |
142 | #define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) | 140 | #define AT91_PIN_PD17 (0x60 + 17) |
143 | #define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) | 141 | #define AT91_PIN_PD18 (0x60 + 18) |
144 | #define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) | 142 | #define AT91_PIN_PD19 (0x60 + 19) |
145 | #define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) | 143 | #define AT91_PIN_PD20 (0x60 + 20) |
146 | #define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) | 144 | #define AT91_PIN_PD21 (0x60 + 21) |
147 | #define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) | 145 | #define AT91_PIN_PD22 (0x60 + 22) |
148 | #define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) | 146 | #define AT91_PIN_PD23 (0x60 + 23) |
149 | #define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) | 147 | #define AT91_PIN_PD24 (0x60 + 24) |
150 | #define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) | 148 | #define AT91_PIN_PD25 (0x60 + 25) |
151 | #define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) | 149 | #define AT91_PIN_PD26 (0x60 + 26) |
152 | #define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) | 150 | #define AT91_PIN_PD27 (0x60 + 27) |
153 | #define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) | 151 | #define AT91_PIN_PD28 (0x60 + 28) |
154 | #define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) | 152 | #define AT91_PIN_PD29 (0x60 + 29) |
155 | #define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) | 153 | #define AT91_PIN_PD30 (0x60 + 30) |
156 | #define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) | 154 | #define AT91_PIN_PD31 (0x60 + 31) |
157 | 155 | ||
158 | #define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) | 156 | #define AT91_PIN_PE0 (0x80 + 0) |
159 | #define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) | 157 | #define AT91_PIN_PE1 (0x80 + 1) |
160 | #define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) | 158 | #define AT91_PIN_PE2 (0x80 + 2) |
161 | #define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) | 159 | #define AT91_PIN_PE3 (0x80 + 3) |
162 | #define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) | 160 | #define AT91_PIN_PE4 (0x80 + 4) |
163 | #define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) | 161 | #define AT91_PIN_PE5 (0x80 + 5) |
164 | #define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) | 162 | #define AT91_PIN_PE6 (0x80 + 6) |
165 | #define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) | 163 | #define AT91_PIN_PE7 (0x80 + 7) |
166 | #define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) | 164 | #define AT91_PIN_PE8 (0x80 + 8) |
167 | #define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) | 165 | #define AT91_PIN_PE9 (0x80 + 9) |
168 | #define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) | 166 | #define AT91_PIN_PE10 (0x80 + 10) |
169 | #define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) | 167 | #define AT91_PIN_PE11 (0x80 + 11) |
170 | #define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) | 168 | #define AT91_PIN_PE12 (0x80 + 12) |
171 | #define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) | 169 | #define AT91_PIN_PE13 (0x80 + 13) |
172 | #define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) | 170 | #define AT91_PIN_PE14 (0x80 + 14) |
173 | #define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) | 171 | #define AT91_PIN_PE15 (0x80 + 15) |
174 | #define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) | 172 | #define AT91_PIN_PE16 (0x80 + 16) |
175 | #define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) | 173 | #define AT91_PIN_PE17 (0x80 + 17) |
176 | #define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) | 174 | #define AT91_PIN_PE18 (0x80 + 18) |
177 | #define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) | 175 | #define AT91_PIN_PE19 (0x80 + 19) |
178 | #define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) | 176 | #define AT91_PIN_PE20 (0x80 + 20) |
179 | #define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) | 177 | #define AT91_PIN_PE21 (0x80 + 21) |
180 | #define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) | 178 | #define AT91_PIN_PE22 (0x80 + 22) |
181 | #define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) | 179 | #define AT91_PIN_PE23 (0x80 + 23) |
182 | #define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) | 180 | #define AT91_PIN_PE24 (0x80 + 24) |
183 | #define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) | 181 | #define AT91_PIN_PE25 (0x80 + 25) |
184 | #define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) | 182 | #define AT91_PIN_PE26 (0x80 + 26) |
185 | #define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) | 183 | #define AT91_PIN_PE27 (0x80 + 27) |
186 | #define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) | 184 | #define AT91_PIN_PE28 (0x80 + 28) |
187 | #define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) | 185 | #define AT91_PIN_PE29 (0x80 + 29) |
188 | #define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) | 186 | #define AT91_PIN_PE30 (0x80 + 30) |
189 | #define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) | 187 | #define AT91_PIN_PE31 (0x80 + 31) |
190 | 188 | ||
191 | #ifndef __ASSEMBLY__ | 189 | #ifndef __ASSEMBLY__ |
192 | /* setup setup routines, called from board init or driver probe() */ | 190 | /* setup setup routines, called from board init or driver probe() */ |
@@ -215,8 +213,8 @@ extern void at91_gpio_resume(void); | |||
215 | 213 | ||
216 | #include <asm/errno.h> | 214 | #include <asm/errno.h> |
217 | 215 | ||
218 | #define gpio_to_irq(gpio) (gpio) | 216 | #define gpio_to_irq(gpio) (gpio + NR_AIC_IRQS) |
219 | #define irq_to_gpio(irq) (irq) | 217 | #define irq_to_gpio(irq) (irq - NR_AIC_IRQS) |
220 | 218 | ||
221 | #endif /* __ASSEMBLY__ */ | 219 | #endif /* __ASSEMBLY__ */ |
222 | 220 | ||
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 483478d8be6b..2d0e4e998566 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h | |||
@@ -16,6 +16,12 @@ | |||
16 | 16 | ||
17 | #include <asm/sizes.h> | 17 | #include <asm/sizes.h> |
18 | 18 | ||
19 | /* DBGU base */ | ||
20 | /* rm9200, 9260/9g20, 9261/9g10, 9rl */ | ||
21 | #define AT91_BASE_DBGU0 0xfffff200 | ||
22 | /* 9263, 9g45, cap9 */ | ||
23 | #define AT91_BASE_DBGU1 0xffffee00 | ||
24 | |||
19 | #if defined(CONFIG_ARCH_AT91RM9200) | 25 | #if defined(CONFIG_ARCH_AT91RM9200) |
20 | #include <mach/at91rm9200.h> | 26 | #include <mach/at91rm9200.h> |
21 | #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) | 27 | #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) |
@@ -52,6 +58,12 @@ | |||
52 | #endif | 58 | #endif |
53 | 59 | ||
54 | /* | 60 | /* |
61 | * On all at91 have the Advanced Interrupt Controller starts at address | ||
62 | * 0xfffff000 | ||
63 | */ | ||
64 | #define AT91_AIC 0xfffff000 | ||
65 | |||
66 | /* | ||
55 | * Peripheral identifiers/interrupts. | 67 | * Peripheral identifiers/interrupts. |
56 | */ | 68 | */ |
57 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | 69 | #define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ |
diff --git a/arch/arm/mach-at91/include/mach/irqs.h b/arch/arm/mach-at91/include/mach/irqs.h index 36bd55f3fc6e..ac8b7dfc85ef 100644 --- a/arch/arm/mach-at91/include/mach/irqs.h +++ b/arch/arm/mach-at91/include/mach/irqs.h | |||
@@ -31,7 +31,7 @@ | |||
31 | * Acknowledge interrupt with AIC after interrupt has been handled. | 31 | * Acknowledge interrupt with AIC after interrupt has been handled. |
32 | * (by kernel/irq.c) | 32 | * (by kernel/irq.c) |
33 | */ | 33 | */ |
34 | #define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0) | 34 | #define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0) |
35 | 35 | ||
36 | 36 | ||
37 | /* | 37 | /* |
diff --git a/arch/arm/mach-at91/include/mach/system_rev.h b/arch/arm/mach-at91/include/mach/system_rev.h index 8f4866045b41..ec164a4124c9 100644 --- a/arch/arm/mach-at91/include/mach/system_rev.h +++ b/arch/arm/mach-at91/include/mach/system_rev.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #define BOARD_HAVE_NAND_16BIT (1 << 31) | 19 | #define BOARD_HAVE_NAND_16BIT (1 << 31) |
20 | static inline int board_have_nand_16bit(void) | 20 | static inline int board_have_nand_16bit(void) |
21 | { | 21 | { |
22 | return system_rev & BOARD_HAVE_NAND_16BIT; | 22 | return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0; |
23 | } | 23 | } |
24 | 24 | ||
25 | #endif /* __ARCH_SYSTEM_REV_H__ */ | 25 | #endif /* __ARCH_SYSTEM_REV_H__ */ |
diff --git a/arch/arm/mach-at91/include/mach/timex.h b/arch/arm/mach-at91/include/mach/timex.h index 85820ad801cc..5e917a66edd7 100644 --- a/arch/arm/mach-at91/include/mach/timex.h +++ b/arch/arm/mach-at91/include/mach/timex.h | |||
@@ -23,70 +23,15 @@ | |||
23 | 23 | ||
24 | #include <mach/hardware.h> | 24 | #include <mach/hardware.h> |
25 | 25 | ||
26 | #if defined(CONFIG_ARCH_AT91RM9200) | 26 | #ifdef CONFIG_ARCH_AT91X40 |
27 | 27 | ||
28 | #define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) | 28 | #define AT91X40_MASTER_CLOCK 40000000 |
29 | 29 | #define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) | |
30 | #elif defined(CONFIG_ARCH_AT91SAM9260) | ||
31 | |||
32 | #if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260) | ||
33 | #define AT91SAM9_MASTER_CLOCK 90000000 | ||
34 | #else | ||
35 | #define AT91SAM9_MASTER_CLOCK 99300000 | ||
36 | #endif | ||
37 | |||
38 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
39 | |||
40 | #elif defined(CONFIG_ARCH_AT91SAM9261) | ||
41 | |||
42 | #define AT91SAM9_MASTER_CLOCK 99300000 | ||
43 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
44 | |||
45 | #elif defined(CONFIG_ARCH_AT91SAM9G10) | ||
46 | |||
47 | #define AT91SAM9_MASTER_CLOCK 133000000 | ||
48 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
49 | |||
50 | #elif defined(CONFIG_ARCH_AT91SAM9263) | ||
51 | |||
52 | #if defined(CONFIG_MACH_USB_A9263) | ||
53 | #define AT91SAM9_MASTER_CLOCK 90000000 | ||
54 | #else | ||
55 | #define AT91SAM9_MASTER_CLOCK 99959500 | ||
56 | #endif | ||
57 | |||
58 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
59 | |||
60 | #elif defined(CONFIG_ARCH_AT91SAM9RL) | ||
61 | |||
62 | #define AT91SAM9_MASTER_CLOCK 100000000 | ||
63 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
64 | |||
65 | #elif defined(CONFIG_ARCH_AT91SAM9G20) | ||
66 | 30 | ||
67 | #if defined(CONFIG_MACH_USB_A9G20) | ||
68 | #define AT91SAM9_MASTER_CLOCK 133000000 | ||
69 | #else | 31 | #else |
70 | #define AT91SAM9_MASTER_CLOCK 132096000 | ||
71 | #endif | ||
72 | |||
73 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
74 | |||
75 | #elif defined(CONFIG_ARCH_AT91SAM9G45) | ||
76 | 32 | ||
77 | #define AT91SAM9_MASTER_CLOCK 133333333 | 33 | #define CLOCK_TICK_RATE 12345678 |
78 | #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) | ||
79 | |||
80 | #elif defined(CONFIG_ARCH_AT91CAP9) | ||
81 | |||
82 | #define AT91CAP9_MASTER_CLOCK 100000000 | ||
83 | #define CLOCK_TICK_RATE (AT91CAP9_MASTER_CLOCK/16) | ||
84 | |||
85 | #elif defined(CONFIG_ARCH_AT91X40) | ||
86 | |||
87 | #define AT91X40_MASTER_CLOCK 40000000 | ||
88 | #define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) | ||
89 | 34 | ||
90 | #endif | 35 | #endif |
91 | 36 | ||
92 | #endif | 37 | #endif /* __ASM_ARCH_TIMEX_H */ |
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h index 18bdcdeb474f..0234fd9d20d6 100644 --- a/arch/arm/mach-at91/include/mach/uncompress.h +++ b/arch/arm/mach-at91/include/mach/uncompress.h | |||
@@ -24,8 +24,10 @@ | |||
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/atmel_serial.h> | 25 | #include <linux/atmel_serial.h> |
26 | 26 | ||
27 | #if defined(CONFIG_AT91_EARLY_DBGU) | 27 | #if defined(CONFIG_AT91_EARLY_DBGU0) |
28 | #define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS) | 28 | #define UART_OFFSET AT91_BASE_DBGU0 |
29 | #elif defined(CONFIG_AT91_EARLY_DBGU1) | ||
30 | #define UART_OFFSET AT91_BASE_DBGU1 | ||
29 | #elif defined(CONFIG_AT91_EARLY_USART0) | 31 | #elif defined(CONFIG_AT91_EARLY_USART0) |
30 | #define UART_OFFSET AT91_USART0 | 32 | #define UART_OFFSET AT91_USART0 |
31 | #elif defined(CONFIG_AT91_EARLY_USART1) | 33 | #elif defined(CONFIG_AT91_EARLY_USART1) |
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 9665265ec757..be6b639ecd7b 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c | |||
@@ -33,17 +33,18 @@ | |||
33 | #include <asm/mach/irq.h> | 33 | #include <asm/mach/irq.h> |
34 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
35 | 35 | ||
36 | void __iomem *at91_aic_base; | ||
36 | 37 | ||
37 | static void at91_aic_mask_irq(struct irq_data *d) | 38 | static void at91_aic_mask_irq(struct irq_data *d) |
38 | { | 39 | { |
39 | /* Disable interrupt on AIC */ | 40 | /* Disable interrupt on AIC */ |
40 | at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); | 41 | at91_aic_write(AT91_AIC_IDCR, 1 << d->irq); |
41 | } | 42 | } |
42 | 43 | ||
43 | static void at91_aic_unmask_irq(struct irq_data *d) | 44 | static void at91_aic_unmask_irq(struct irq_data *d) |
44 | { | 45 | { |
45 | /* Enable interrupt on AIC */ | 46 | /* Enable interrupt on AIC */ |
46 | at91_sys_write(AT91_AIC_IECR, 1 << d->irq); | 47 | at91_aic_write(AT91_AIC_IECR, 1 << d->irq); |
47 | } | 48 | } |
48 | 49 | ||
49 | unsigned int at91_extern_irq; | 50 | unsigned int at91_extern_irq; |
@@ -77,8 +78,8 @@ static int at91_aic_set_type(struct irq_data *d, unsigned type) | |||
77 | return -EINVAL; | 78 | return -EINVAL; |
78 | } | 79 | } |
79 | 80 | ||
80 | smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; | 81 | smr = at91_aic_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; |
81 | at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); | 82 | at91_aic_write(AT91_AIC_SMR(d->irq), smr | srctype); |
82 | return 0; | 83 | return 0; |
83 | } | 84 | } |
84 | 85 | ||
@@ -102,15 +103,15 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value) | |||
102 | 103 | ||
103 | void at91_irq_suspend(void) | 104 | void at91_irq_suspend(void) |
104 | { | 105 | { |
105 | backups = at91_sys_read(AT91_AIC_IMR); | 106 | backups = at91_aic_read(AT91_AIC_IMR); |
106 | at91_sys_write(AT91_AIC_IDCR, backups); | 107 | at91_aic_write(AT91_AIC_IDCR, backups); |
107 | at91_sys_write(AT91_AIC_IECR, wakeups); | 108 | at91_aic_write(AT91_AIC_IECR, wakeups); |
108 | } | 109 | } |
109 | 110 | ||
110 | void at91_irq_resume(void) | 111 | void at91_irq_resume(void) |
111 | { | 112 | { |
112 | at91_sys_write(AT91_AIC_IDCR, wakeups); | 113 | at91_aic_write(AT91_AIC_IDCR, wakeups); |
113 | at91_sys_write(AT91_AIC_IECR, backups); | 114 | at91_aic_write(AT91_AIC_IECR, backups); |
114 | } | 115 | } |
115 | 116 | ||
116 | #else | 117 | #else |
@@ -133,34 +134,39 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) | |||
133 | { | 134 | { |
134 | unsigned int i; | 135 | unsigned int i; |
135 | 136 | ||
137 | at91_aic_base = ioremap(AT91_AIC, 512); | ||
138 | |||
139 | if (!at91_aic_base) | ||
140 | panic("Impossible to ioremap AT91_AIC\n"); | ||
141 | |||
136 | /* | 142 | /* |
137 | * The IVR is used by macro get_irqnr_and_base to read and verify. | 143 | * The IVR is used by macro get_irqnr_and_base to read and verify. |
138 | * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. | 144 | * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. |
139 | */ | 145 | */ |
140 | for (i = 0; i < NR_AIC_IRQS; i++) { | 146 | for (i = 0; i < NR_AIC_IRQS; i++) { |
141 | /* Put irq number in Source Vector Register: */ | 147 | /* Put irq number in Source Vector Register: */ |
142 | at91_sys_write(AT91_AIC_SVR(i), i); | 148 | at91_aic_write(AT91_AIC_SVR(i), i); |
143 | /* Active Low interrupt, with the specified priority */ | 149 | /* Active Low interrupt, with the specified priority */ |
144 | at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); | 150 | at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); |
145 | 151 | ||
146 | irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); | 152 | irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); |
147 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | 153 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
148 | 154 | ||
149 | /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ | 155 | /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ |
150 | if (i < 8) | 156 | if (i < 8) |
151 | at91_sys_write(AT91_AIC_EOICR, 0); | 157 | at91_aic_write(AT91_AIC_EOICR, 0); |
152 | } | 158 | } |
153 | 159 | ||
154 | /* | 160 | /* |
155 | * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS | 161 | * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS |
156 | * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU | 162 | * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU |
157 | */ | 163 | */ |
158 | at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS); | 164 | at91_aic_write(AT91_AIC_SPU, NR_AIC_IRQS); |
159 | 165 | ||
160 | /* No debugging in AIC: Debug (Protect) Control Register */ | 166 | /* No debugging in AIC: Debug (Protect) Control Register */ |
161 | at91_sys_write(AT91_AIC_DCR, 0); | 167 | at91_aic_write(AT91_AIC_DCR, 0); |
162 | 168 | ||
163 | /* Disable and clear all interrupts initially */ | 169 | /* Disable and clear all interrupts initially */ |
164 | at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF); | 170 | at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF); |
165 | at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF); | 171 | at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); |
166 | } | 172 | } |
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 7046158109d7..62ad95556c36 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -34,7 +34,7 @@ | |||
34 | /* | 34 | /* |
35 | * Show the reason for the previous system reset. | 35 | * Show the reason for the previous system reset. |
36 | */ | 36 | */ |
37 | #if defined(AT91_SHDWC) | 37 | #if defined(AT91_RSTC) |
38 | 38 | ||
39 | #include <mach/at91_rstc.h> | 39 | #include <mach/at91_rstc.h> |
40 | #include <mach/at91_shdwc.h> | 40 | #include <mach/at91_shdwc.h> |
@@ -58,8 +58,11 @@ static void __init show_reset_status(void) | |||
58 | char *reason, *r2 = reset; | 58 | char *reason, *r2 = reset; |
59 | u32 reset_type, wake_type; | 59 | u32 reset_type, wake_type; |
60 | 60 | ||
61 | if (!at91_shdwc_base) | ||
62 | return; | ||
63 | |||
61 | reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; | 64 | reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; |
62 | wake_type = at91_sys_read(AT91_SHDW_SR); | 65 | wake_type = at91_shdwc_read(AT91_SHDW_SR); |
63 | 66 | ||
64 | switch (reset_type) { | 67 | switch (reset_type) { |
65 | case AT91_RSTC_RSTTYP_GENERAL: | 68 | case AT91_RSTC_RSTTYP_GENERAL: |
@@ -215,7 +218,7 @@ static int at91_pm_enter(suspend_state_t state) | |||
215 | | (1 << AT91_ID_FIQ) | 218 | | (1 << AT91_ID_FIQ) |
216 | | (1 << AT91_ID_SYS) | 219 | | (1 << AT91_ID_SYS) |
217 | | (at91_extern_irq)) | 220 | | (at91_extern_irq)) |
218 | & at91_sys_read(AT91_AIC_IMR), | 221 | & at91_aic_read(AT91_AIC_IMR), |
219 | state); | 222 | state); |
220 | 223 | ||
221 | switch (state) { | 224 | switch (state) { |
@@ -283,7 +286,7 @@ static int at91_pm_enter(suspend_state_t state) | |||
283 | } | 286 | } |
284 | 287 | ||
285 | pr_debug("AT91: PM - wakeup %08x\n", | 288 | pr_debug("AT91: PM - wakeup %08x\n", |
286 | at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); | 289 | at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR)); |
287 | 290 | ||
288 | error: | 291 | error: |
289 | target_state = PM_SUSPEND_ON; | 292 | target_state = PM_SUSPEND_ON; |
diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index 5eab6aa621d0..8294783b679d 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c | |||
@@ -10,38 +10,58 @@ | |||
10 | 10 | ||
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include <linux/of.h> | ||
14 | #include <linux/of_address.h> | ||
13 | 15 | ||
14 | #include <mach/at91sam9_smc.h> | 16 | #include <mach/at91sam9_smc.h> |
15 | 17 | ||
16 | #include "sam9_smc.h" | 18 | #include "sam9_smc.h" |
17 | 19 | ||
18 | void __init sam9_smc_configure(int cs, struct sam9_smc_config* config) | 20 | |
21 | #define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10)) | ||
22 | |||
23 | static void __iomem *smc_base_addr[2]; | ||
24 | |||
25 | static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config) | ||
19 | { | 26 | { |
27 | |||
20 | /* Setup register */ | 28 | /* Setup register */ |
21 | at91_sys_write(AT91_SMC_SETUP(cs), | 29 | __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup) |
22 | AT91_SMC_NWESETUP_(config->nwe_setup) | 30 | | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) |
23 | | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) | 31 | | AT91_SMC_NRDSETUP_(config->nrd_setup) |
24 | | AT91_SMC_NRDSETUP_(config->nrd_setup) | 32 | | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup), |
25 | | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup) | 33 | base + AT91_SMC_SETUP); |
26 | ); | ||
27 | 34 | ||
28 | /* Pulse register */ | 35 | /* Pulse register */ |
29 | at91_sys_write(AT91_SMC_PULSE(cs), | 36 | __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse) |
30 | AT91_SMC_NWEPULSE_(config->nwe_pulse) | 37 | | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) |
31 | | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) | 38 | | AT91_SMC_NRDPULSE_(config->nrd_pulse) |
32 | | AT91_SMC_NRDPULSE_(config->nrd_pulse) | 39 | | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse), |
33 | | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse) | 40 | base + AT91_SMC_PULSE); |
34 | ); | ||
35 | 41 | ||
36 | /* Cycle register */ | 42 | /* Cycle register */ |
37 | at91_sys_write(AT91_SMC_CYCLE(cs), | 43 | __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle) |
38 | AT91_SMC_NWECYCLE_(config->write_cycle) | 44 | | AT91_SMC_NRDCYCLE_(config->read_cycle), |
39 | | AT91_SMC_NRDCYCLE_(config->read_cycle) | 45 | base + AT91_SMC_CYCLE); |
40 | ); | ||
41 | 46 | ||
42 | /* Mode register */ | 47 | /* Mode register */ |
43 | at91_sys_write(AT91_SMC_MODE(cs), | 48 | __raw_writel(config->mode |
44 | config->mode | 49 | | AT91_SMC_TDF_(config->tdf_cycles), |
45 | | AT91_SMC_TDF_(config->tdf_cycles) | 50 | base + AT91_SMC_MODE); |
46 | ); | 51 | } |
52 | |||
53 | void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config) | ||
54 | { | ||
55 | sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config); | ||
56 | } | ||
57 | |||
58 | void __init at91sam9_ioremap_smc(int id, u32 addr) | ||
59 | { | ||
60 | if (id > 1) { | ||
61 | pr_warn("%s: id > 2\n", __func__); | ||
62 | return; | ||
63 | } | ||
64 | smc_base_addr[id] = ioremap(addr, 512); | ||
65 | if (!smc_base_addr[id]) | ||
66 | pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr); | ||
47 | } | 67 | } |
diff --git a/arch/arm/mach-at91/sam9_smc.h b/arch/arm/mach-at91/sam9_smc.h index bf72cfb3455b..039c5ce17aec 100644 --- a/arch/arm/mach-at91/sam9_smc.h +++ b/arch/arm/mach-at91/sam9_smc.h | |||
@@ -30,4 +30,5 @@ struct sam9_smc_config { | |||
30 | u8 tdf_cycles:4; | 30 | u8 tdf_cycles:4; |
31 | }; | 31 | }; |
32 | 32 | ||
33 | extern void __init sam9_smc_configure(int cs, struct sam9_smc_config* config); | 33 | extern void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config); |
34 | extern void __init at91sam9_ioremap_smc(int id, u32 addr); | ||
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index cf98a8f94dc5..8bdcc3cb6012 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c | |||
@@ -8,6 +8,7 @@ | |||
8 | #include <linux/module.h> | 8 | #include <linux/module.h> |
9 | #include <linux/io.h> | 9 | #include <linux/io.h> |
10 | #include <linux/mm.h> | 10 | #include <linux/mm.h> |
11 | #include <linux/pm.h> | ||
11 | 12 | ||
12 | #include <asm/mach/map.h> | 13 | #include <asm/mach/map.h> |
13 | 14 | ||
@@ -15,6 +16,7 @@ | |||
15 | #include <mach/cpu.h> | 16 | #include <mach/cpu.h> |
16 | #include <mach/at91_dbgu.h> | 17 | #include <mach/at91_dbgu.h> |
17 | #include <mach/at91_pmc.h> | 18 | #include <mach/at91_pmc.h> |
19 | #include <mach/at91_shdwc.h> | ||
18 | 20 | ||
19 | #include "soc.h" | 21 | #include "soc.h" |
20 | #include "generic.h" | 22 | #include "generic.h" |
@@ -73,9 +75,6 @@ static struct map_desc at91_io_desc __initdata = { | |||
73 | .type = MT_DEVICE, | 75 | .type = MT_DEVICE, |
74 | }; | 76 | }; |
75 | 77 | ||
76 | #define AT91_DBGU0 0xfffff200 | ||
77 | #define AT91_DBGU1 0xffffee00 | ||
78 | |||
79 | static void __init soc_detect(u32 dbgu_base) | 78 | static void __init soc_detect(u32 dbgu_base) |
80 | { | 79 | { |
81 | u32 cidr, socid; | 80 | u32 cidr, socid; |
@@ -248,9 +247,9 @@ void __init at91_map_io(void) | |||
248 | at91_soc_initdata.type = AT91_SOC_NONE; | 247 | at91_soc_initdata.type = AT91_SOC_NONE; |
249 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; | 248 | at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; |
250 | 249 | ||
251 | soc_detect(AT91_DBGU0); | 250 | soc_detect(AT91_BASE_DBGU0); |
252 | if (!at91_soc_is_detected()) | 251 | if (!at91_soc_is_detected()) |
253 | soc_detect(AT91_DBGU1); | 252 | soc_detect(AT91_BASE_DBGU1); |
254 | 253 | ||
255 | if (!at91_soc_is_detected()) | 254 | if (!at91_soc_is_detected()) |
256 | panic("AT91: Impossible to detect the SOC type"); | 255 | panic("AT91: Impossible to detect the SOC type"); |
@@ -267,8 +266,25 @@ void __init at91_map_io(void) | |||
267 | at91_boot_soc.map_io(); | 266 | at91_boot_soc.map_io(); |
268 | } | 267 | } |
269 | 268 | ||
269 | void __iomem *at91_shdwc_base = NULL; | ||
270 | |||
271 | static void at91sam9_poweroff(void) | ||
272 | { | ||
273 | at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | ||
274 | } | ||
275 | |||
276 | void __init at91_ioremap_shdwc(u32 base_addr) | ||
277 | { | ||
278 | at91_shdwc_base = ioremap(base_addr, 16); | ||
279 | if (!at91_shdwc_base) | ||
280 | panic("Impossible to ioremap at91_shdwc_base\n"); | ||
281 | pm_power_off = at91sam9_poweroff; | ||
282 | } | ||
283 | |||
270 | void __init at91_initialize(unsigned long main_clock) | 284 | void __init at91_initialize(unsigned long main_clock) |
271 | { | 285 | { |
286 | at91_boot_soc.ioremap_registers(); | ||
287 | |||
272 | /* Init clock subsystem */ | 288 | /* Init clock subsystem */ |
273 | at91_clock_init(main_clock); | 289 | at91_clock_init(main_clock); |
274 | 290 | ||
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index 21ed8816e6f7..4588ae6f7acd 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h | |||
@@ -7,6 +7,7 @@ | |||
7 | struct at91_init_soc { | 7 | struct at91_init_soc { |
8 | unsigned int *default_irq_priority; | 8 | unsigned int *default_irq_priority; |
9 | void (*map_io)(void); | 9 | void (*map_io)(void); |
10 | void (*ioremap_registers)(void); | ||
10 | void (*register_clocks)(void); | 11 | void (*register_clocks)(void); |
11 | void (*init)(void); | 12 | void (*init)(void); |
12 | }; | 13 | }; |
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 1d7d24995226..6659a90dbcad 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
@@ -753,7 +753,7 @@ static struct snd_platform_data da850_evm_snd_data = { | |||
753 | .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), | 753 | .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), |
754 | .tdm_slots = 2, | 754 | .tdm_slots = 2, |
755 | .serial_dir = da850_iis_serializer_direction, | 755 | .serial_dir = da850_iis_serializer_direction, |
756 | .asp_chan_q = EVENTQ_1, | 756 | .asp_chan_q = EVENTQ_0, |
757 | .version = MCASP_VERSION_2, | 757 | .version = MCASP_VERSION_2, |
758 | .txnumevt = 1, | 758 | .txnumevt = 1, |
759 | .rxnumevt = 1, | 759 | .rxnumevt = 1, |
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c index 1918ae711428..46e1f4173b97 100644 --- a/arch/arm/mach-davinci/board-dm365-evm.c +++ b/arch/arm/mach-davinci/board-dm365-evm.c | |||
@@ -107,7 +107,7 @@ static struct mtd_partition davinci_nand_partitions[] = { | |||
107 | /* UBL (a few copies) plus U-Boot */ | 107 | /* UBL (a few copies) plus U-Boot */ |
108 | .name = "bootloader", | 108 | .name = "bootloader", |
109 | .offset = 0, | 109 | .offset = 0, |
110 | .size = 28 * NAND_BLOCK_SIZE, | 110 | .size = 30 * NAND_BLOCK_SIZE, |
111 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | 111 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
112 | }, { | 112 | }, { |
113 | /* U-Boot environment */ | 113 | /* U-Boot environment */ |
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index e574d7f837a8..635bf7740157 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c | |||
@@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
564 | int val; | 564 | int val; |
565 | u32 value; | 565 | u32 value; |
566 | 566 | ||
567 | if (!vpif_vsclkdis_reg || !cpld_client) | 567 | if (!vpif_vidclkctl_reg || !cpld_client) |
568 | return -ENXIO; | 568 | return -ENXIO; |
569 | 569 | ||
570 | val = i2c_smbus_read_byte(cpld_client); | 570 | val = i2c_smbus_read_byte(cpld_client); |
@@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
572 | return val; | 572 | return val; |
573 | 573 | ||
574 | spin_lock_irqsave(&vpif_reg_lock, flags); | 574 | spin_lock_irqsave(&vpif_reg_lock, flags); |
575 | value = __raw_readl(vpif_vsclkdis_reg); | 575 | value = __raw_readl(vpif_vidclkctl_reg); |
576 | if (mux_mode) { | 576 | if (mux_mode) { |
577 | val &= VPIF_INPUT_TWO_CHANNEL; | 577 | val &= VPIF_INPUT_TWO_CHANNEL; |
578 | value |= VIDCH1CLK; | 578 | value |= VIDCH1CLK; |
@@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode) | |||
580 | val |= VPIF_INPUT_ONE_CHANNEL; | 580 | val |= VPIF_INPUT_ONE_CHANNEL; |
581 | value &= ~VIDCH1CLK; | 581 | value &= ~VIDCH1CLK; |
582 | } | 582 | } |
583 | __raw_writel(value, vpif_vsclkdis_reg); | 583 | __raw_writel(value, vpif_vidclkctl_reg); |
584 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | 584 | spin_unlock_irqrestore(&vpif_reg_lock, flags); |
585 | 585 | ||
586 | err = i2c_smbus_write_byte(cpld_client, val); | 586 | err = i2c_smbus_write_byte(cpld_client, val); |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 0b68ed534f8e..af27c130595f 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -161,7 +161,6 @@ static struct clk dsp_clk = { | |||
161 | .name = "dsp", | 161 | .name = "dsp", |
162 | .parent = &pll1_sysclk1, | 162 | .parent = &pll1_sysclk1, |
163 | .lpsc = DM646X_LPSC_C64X_CPU, | 163 | .lpsc = DM646X_LPSC_C64X_CPU, |
164 | .flags = PSC_DSP, | ||
165 | .usecount = 1, /* REVISIT how to disable? */ | 164 | .usecount = 1, /* REVISIT how to disable? */ |
166 | }; | 165 | }; |
167 | 166 | ||
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h index 2a00fe5ac253..a8ee6c9f0bb0 100644 --- a/arch/arm/mach-davinci/include/mach/dm646x.h +++ b/arch/arm/mach-davinci/include/mach/dm646x.h | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/i2c.h> | 16 | #include <linux/i2c.h> |
17 | #include <linux/videodev2.h> | 17 | #include <linux/videodev2.h> |
18 | #include <linux/davinci_emac.h> | 18 | #include <linux/davinci_emac.h> |
19 | #include <media/davinci/vpif_types.h> | ||
19 | 20 | ||
20 | #define DM646X_EMAC_BASE (0x01C80000) | 21 | #define DM646X_EMAC_BASE (0x01C80000) |
21 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) | 22 | #define DM646X_EMAC_MDIO_BASE (DM646X_EMAC_BASE + 0x4000) |
@@ -34,58 +35,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv); | |||
34 | 35 | ||
35 | void dm646x_video_init(void); | 36 | void dm646x_video_init(void); |
36 | 37 | ||
37 | enum vpif_if_type { | ||
38 | VPIF_IF_BT656, | ||
39 | VPIF_IF_BT1120, | ||
40 | VPIF_IF_RAW_BAYER | ||
41 | }; | ||
42 | |||
43 | struct vpif_interface { | ||
44 | enum vpif_if_type if_type; | ||
45 | unsigned hd_pol:1; | ||
46 | unsigned vd_pol:1; | ||
47 | unsigned fid_pol:1; | ||
48 | }; | ||
49 | |||
50 | struct vpif_subdev_info { | ||
51 | const char *name; | ||
52 | struct i2c_board_info board_info; | ||
53 | u32 input; | ||
54 | u32 output; | ||
55 | unsigned can_route:1; | ||
56 | struct vpif_interface vpif_if; | ||
57 | }; | ||
58 | |||
59 | struct vpif_display_config { | ||
60 | int (*set_clock)(int, int); | ||
61 | struct vpif_subdev_info *subdevinfo; | ||
62 | int subdev_count; | ||
63 | const char **output; | ||
64 | int output_count; | ||
65 | const char *card_name; | ||
66 | }; | ||
67 | |||
68 | struct vpif_input { | ||
69 | struct v4l2_input input; | ||
70 | const char *subdev_name; | ||
71 | }; | ||
72 | |||
73 | #define VPIF_CAPTURE_MAX_CHANNELS 2 | ||
74 | |||
75 | struct vpif_capture_chan_config { | ||
76 | const struct vpif_input *inputs; | ||
77 | int input_count; | ||
78 | }; | ||
79 | |||
80 | struct vpif_capture_config { | ||
81 | int (*setup_input_channel_mode)(int); | ||
82 | int (*setup_input_path)(int, const char *); | ||
83 | struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS]; | ||
84 | struct vpif_subdev_info *subdev_info; | ||
85 | int subdev_count; | ||
86 | const char *card_name; | ||
87 | }; | ||
88 | |||
89 | void dm646x_setup_vpif(struct vpif_display_config *, | 38 | void dm646x_setup_vpif(struct vpif_display_config *, |
90 | struct vpif_capture_config *); | 39 | struct vpif_capture_config *); |
91 | 40 | ||
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index fa59c097223d..8bc3fc256171 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -233,7 +233,7 @@ | |||
233 | #define PTCMD 0x120 | 233 | #define PTCMD 0x120 |
234 | #define PTSTAT 0x128 | 234 | #define PTSTAT 0x128 |
235 | #define PDSTAT 0x200 | 235 | #define PDSTAT 0x200 |
236 | #define PDCTL1 0x304 | 236 | #define PDCTL 0x300 |
237 | #define MDSTAT 0x800 | 237 | #define MDSTAT 0x800 |
238 | #define MDCTL 0xA00 | 238 | #define MDCTL 0xA00 |
239 | 239 | ||
@@ -244,7 +244,10 @@ | |||
244 | #define PSC_STATE_ENABLE 3 | 244 | #define PSC_STATE_ENABLE 3 |
245 | 245 | ||
246 | #define MDSTAT_STATE_MASK 0x3f | 246 | #define MDSTAT_STATE_MASK 0x3f |
247 | #define PDSTAT_STATE_MASK 0x1f | ||
247 | #define MDCTL_FORCE BIT(31) | 248 | #define MDCTL_FORCE BIT(31) |
249 | #define PDCTL_NEXT BIT(1) | ||
250 | #define PDCTL_EPCGOOD BIT(8) | ||
248 | 251 | ||
249 | #ifndef __ASSEMBLER__ | 252 | #ifndef __ASSEMBLER__ |
250 | 253 | ||
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index 1fb6bdff38c1..d7e210f4b55c 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c | |||
@@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) | |||
52 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, | 52 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
53 | unsigned int id, bool enable, u32 flags) | 53 | unsigned int id, bool enable, u32 flags) |
54 | { | 54 | { |
55 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; | 55 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl; |
56 | void __iomem *psc_base; | 56 | void __iomem *psc_base; |
57 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 57 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
58 | u32 next_state = PSC_STATE_ENABLE; | 58 | u32 next_state = PSC_STATE_ENABLE; |
@@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, | |||
79 | mdctl |= MDCTL_FORCE; | 79 | mdctl |= MDCTL_FORCE; |
80 | __raw_writel(mdctl, psc_base + MDCTL + 4 * id); | 80 | __raw_writel(mdctl, psc_base + MDCTL + 4 * id); |
81 | 81 | ||
82 | pdstat = __raw_readl(psc_base + PDSTAT); | 82 | pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain); |
83 | if ((pdstat & 0x00000001) == 0) { | 83 | if ((pdstat & PDSTAT_STATE_MASK) == 0) { |
84 | pdctl1 = __raw_readl(psc_base + PDCTL1); | 84 | pdctl = __raw_readl(psc_base + PDCTL + 4 * domain); |
85 | pdctl1 |= 0x1; | 85 | pdctl |= PDCTL_NEXT; |
86 | __raw_writel(pdctl1, psc_base + PDCTL1); | 86 | __raw_writel(pdctl, psc_base + PDCTL + 4 * domain); |
87 | 87 | ||
88 | ptcmd = 1 << domain; | 88 | ptcmd = 1 << domain; |
89 | __raw_writel(ptcmd, psc_base + PTCMD); | 89 | __raw_writel(ptcmd, psc_base + PTCMD); |
@@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, | |||
92 | epcpr = __raw_readl(psc_base + EPCPR); | 92 | epcpr = __raw_readl(psc_base + EPCPR); |
93 | } while ((((epcpr >> domain) & 1) == 0)); | 93 | } while ((((epcpr >> domain) & 1) == 0)); |
94 | 94 | ||
95 | pdctl1 = __raw_readl(psc_base + PDCTL1); | 95 | pdctl = __raw_readl(psc_base + PDCTL + 4 * domain); |
96 | pdctl1 |= 0x100; | 96 | pdctl |= PDCTL_EPCGOOD; |
97 | __raw_writel(pdctl1, psc_base + PDCTL1); | 97 | __raw_writel(pdctl, psc_base + PDCTL + 4 * domain); |
98 | } else { | 98 | } else { |
99 | ptcmd = 1 << domain; | 99 | ptcmd = 1 << domain; |
100 | __raw_writel(ptcmd, psc_base + PTCMD); | 100 | __raw_writel(ptcmd, psc_base + PTCMD); |
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 9cd860a27af5..8deb012189b5 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c | |||
@@ -37,14 +37,15 @@ static void __init imx6q_map_io(void) | |||
37 | imx6q_clock_map_io(); | 37 | imx6q_clock_map_io(); |
38 | } | 38 | } |
39 | 39 | ||
40 | static void __init imx6q_gpio_add_irq_domain(struct device_node *np, | 40 | static int __init imx6q_gpio_add_irq_domain(struct device_node *np, |
41 | struct device_node *interrupt_parent) | 41 | struct device_node *interrupt_parent) |
42 | { | 42 | { |
43 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - | 43 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; |
44 | 32 * 7; /* imx6q gets 7 gpio ports */ | ||
45 | 44 | ||
45 | gpio_irq_base -= 32; | ||
46 | irq_domain_add_simple(np, gpio_irq_base); | 46 | irq_domain_add_simple(np, gpio_irq_base); |
47 | gpio_irq_base += 32; | 47 | |
48 | return 0; | ||
48 | } | 49 | } |
49 | 50 | ||
50 | static const struct of_device_id imx6q_irq_match[] __initconst = { | 51 | static const struct of_device_id imx6q_irq_match[] __initconst = { |
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index ebde97f5d5f0..000ddf0a4f33 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig | |||
@@ -13,7 +13,6 @@ config ARCH_MSM7X00A | |||
13 | select CPU_V6 | 13 | select CPU_V6 |
14 | select GPIO_MSM_V1 | 14 | select GPIO_MSM_V1 |
15 | select MSM_PROC_COMM | 15 | select MSM_PROC_COMM |
16 | select HAS_MSM_DEBUG_UART_PHYS | ||
17 | 16 | ||
18 | config ARCH_MSM7X30 | 17 | config ARCH_MSM7X30 |
19 | bool "MSM7x30" | 18 | bool "MSM7x30" |
@@ -25,7 +24,6 @@ config ARCH_MSM7X30 | |||
25 | select MSM_GPIOMUX | 24 | select MSM_GPIOMUX |
26 | select GPIO_MSM_V1 | 25 | select GPIO_MSM_V1 |
27 | select MSM_PROC_COMM | 26 | select MSM_PROC_COMM |
28 | select HAS_MSM_DEBUG_UART_PHYS | ||
29 | 27 | ||
30 | config ARCH_QSD8X50 | 28 | config ARCH_QSD8X50 |
31 | bool "QSD8X50" | 29 | bool "QSD8X50" |
@@ -37,7 +35,6 @@ config ARCH_QSD8X50 | |||
37 | select MSM_GPIOMUX | 35 | select MSM_GPIOMUX |
38 | select GPIO_MSM_V1 | 36 | select GPIO_MSM_V1 |
39 | select MSM_PROC_COMM | 37 | select MSM_PROC_COMM |
40 | select HAS_MSM_DEBUG_UART_PHYS | ||
41 | 38 | ||
42 | config ARCH_MSM8X60 | 39 | config ARCH_MSM8X60 |
43 | bool "MSM8X60" | 40 | bool "MSM8X60" |
@@ -63,6 +60,9 @@ config ARCH_MSM8960 | |||
63 | 60 | ||
64 | endchoice | 61 | endchoice |
65 | 62 | ||
63 | config MSM_HAS_DEBUG_UART_HS | ||
64 | bool | ||
65 | |||
66 | config MSM_SOC_REV_A | 66 | config MSM_SOC_REV_A |
67 | bool | 67 | bool |
68 | config ARCH_MSM_SCORPIONMP | 68 | config ARCH_MSM_SCORPIONMP |
@@ -73,9 +73,6 @@ config ARCH_MSM_ARM11 | |||
73 | config ARCH_MSM_SCORPION | 73 | config ARCH_MSM_SCORPION |
74 | bool | 74 | bool |
75 | 75 | ||
76 | config HAS_MSM_DEBUG_UART_PHYS | ||
77 | bool | ||
78 | |||
79 | config MSM_VIC | 76 | config MSM_VIC |
80 | bool | 77 | bool |
81 | 78 | ||
@@ -152,32 +149,6 @@ config MACH_MSM8960_RUMI3 | |||
152 | 149 | ||
153 | endmenu | 150 | endmenu |
154 | 151 | ||
155 | config MSM_DEBUG_UART | ||
156 | int | ||
157 | default 1 if MSM_DEBUG_UART1 | ||
158 | default 2 if MSM_DEBUG_UART2 | ||
159 | default 3 if MSM_DEBUG_UART3 | ||
160 | |||
161 | if HAS_MSM_DEBUG_UART_PHYS | ||
162 | choice | ||
163 | prompt "Debug UART" | ||
164 | |||
165 | default MSM_DEBUG_UART_NONE | ||
166 | |||
167 | config MSM_DEBUG_UART_NONE | ||
168 | bool "None" | ||
169 | |||
170 | config MSM_DEBUG_UART1 | ||
171 | bool "UART1" | ||
172 | |||
173 | config MSM_DEBUG_UART2 | ||
174 | bool "UART2" | ||
175 | |||
176 | config MSM_DEBUG_UART3 | ||
177 | bool "UART3" | ||
178 | endchoice | ||
179 | endif | ||
180 | |||
181 | config MSM_SMD_PKG3 | 152 | config MSM_SMD_PKG3 |
182 | bool | 153 | bool |
183 | 154 | ||
diff --git a/arch/arm/mach-msm/devices-iommu.c b/arch/arm/mach-msm/devices-iommu.c index 24030d0da6e3..0fb7a17df398 100644 --- a/arch/arm/mach-msm/devices-iommu.c +++ b/arch/arm/mach-msm/devices-iommu.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/bootmem.h> | 20 | #include <linux/bootmem.h> |
21 | #include <linux/module.h> | ||
21 | #include <mach/irqs.h> | 22 | #include <mach/irqs.h> |
22 | #include <mach/iommu.h> | 23 | #include <mach/iommu.h> |
23 | 24 | ||
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index 2dc73ccddb11..3ffd8668c9a5 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S | |||
@@ -1,6 +1,7 @@ | |||
1 | /* arch/arm/mach-msm7200/include/mach/debug-macro.S | 1 | /* |
2 | * | 2 | * |
3 | * Copyright (C) 2007 Google, Inc. | 3 | * Copyright (C) 2007 Google, Inc. |
4 | * Copyright (c) 2011, Code Aurora Forum. All rights reserved. | ||
4 | * Author: Brian Swetland <swetland@google.com> | 5 | * Author: Brian Swetland <swetland@google.com> |
5 | * | 6 | * |
6 | * This software is licensed under the terms of the GNU General Public | 7 | * This software is licensed under the terms of the GNU General Public |
@@ -14,40 +15,52 @@ | |||
14 | * | 15 | * |
15 | */ | 16 | */ |
16 | 17 | ||
17 | |||
18 | |||
19 | #include <mach/hardware.h> | 18 | #include <mach/hardware.h> |
20 | #include <mach/msm_iomap.h> | 19 | #include <mach/msm_iomap.h> |
21 | 20 | ||
22 | #if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) | ||
23 | .macro addruart, rp, rv, tmp | 21 | .macro addruart, rp, rv, tmp |
22 | #ifdef MSM_DEBUG_UART_PHYS | ||
24 | ldr \rp, =MSM_DEBUG_UART_PHYS | 23 | ldr \rp, =MSM_DEBUG_UART_PHYS |
25 | ldr \rv, =MSM_DEBUG_UART_BASE | 24 | ldr \rv, =MSM_DEBUG_UART_BASE |
25 | #endif | ||
26 | .endm | 26 | .endm |
27 | 27 | ||
28 | .macro senduart,rd,rx | 28 | .macro senduart, rd, rx |
29 | #ifdef CONFIG_MSM_HAS_DEBUG_UART_HS | ||
30 | @ Write the 1 character to UARTDM_TF | ||
31 | str \rd, [\rx, #0x70] | ||
32 | #else | ||
29 | teq \rx, #0 | 33 | teq \rx, #0 |
30 | strne \rd, [\rx, #0x0C] | 34 | strne \rd, [\rx, #0x0C] |
35 | #endif | ||
31 | .endm | 36 | .endm |
32 | 37 | ||
33 | .macro waituart,rd,rx | 38 | .macro waituart, rd, rx |
39 | #ifdef CONFIG_MSM_HAS_DEBUG_UART_HS | ||
40 | @ check for TX_EMT in UARTDM_SR | ||
41 | ldr \rd, [\rx, #0x08] | ||
42 | tst \rd, #0x08 | ||
43 | bne 1002f | ||
44 | @ wait for TXREADY in UARTDM_ISR | ||
45 | 1001: ldr \rd, [\rx, #0x14] | ||
46 | tst \rd, #0x80 | ||
47 | beq 1001b | ||
48 | 1002: | ||
49 | @ Clear TX_READY by writing to the UARTDM_CR register | ||
50 | mov \rd, #0x300 | ||
51 | str \rd, [\rx, #0x10] | ||
52 | @ Write 0x1 to NCF register | ||
53 | mov \rd, #0x1 | ||
54 | str \rd, [\rx, #0x40] | ||
55 | @ UARTDM reg. Read to induce delay | ||
56 | ldr \rd, [\rx, #0x08] | ||
57 | #else | ||
34 | @ wait for TX_READY | 58 | @ wait for TX_READY |
35 | 1001: ldr \rd, [\rx, #0x08] | 59 | 1001: ldr \rd, [\rx, #0x08] |
36 | tst \rd, #0x04 | 60 | tst \rd, #0x04 |
37 | beq 1001b | 61 | beq 1001b |
38 | .endm | ||
39 | #else | ||
40 | .macro addruart, rp, rv, tmp | ||
41 | mov \rv, #0xff000000 | ||
42 | orr \rv, \rv, #0x00f00000 | ||
43 | .endm | ||
44 | |||
45 | .macro senduart,rd,rx | ||
46 | .endm | ||
47 | |||
48 | .macro waituart,rd,rx | ||
49 | .endm | ||
50 | #endif | 62 | #endif |
63 | .endm | ||
51 | 64 | ||
52 | .macro busyuart,rd,rx | 65 | .macro busyuart, rd, rx |
53 | .endm | 66 | .endm |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h index 94fe9fe6feb3..8af46123dab6 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h | |||
@@ -78,18 +78,6 @@ | |||
78 | #define MSM_UART3_PHYS 0xA9C00000 | 78 | #define MSM_UART3_PHYS 0xA9C00000 |
79 | #define MSM_UART3_SIZE SZ_4K | 79 | #define MSM_UART3_SIZE SZ_4K |
80 | 80 | ||
81 | #ifdef CONFIG_MSM_DEBUG_UART | ||
82 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
83 | #if CONFIG_MSM_DEBUG_UART == 1 | ||
84 | #define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS | ||
85 | #elif CONFIG_MSM_DEBUG_UART == 2 | ||
86 | #define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS | ||
87 | #elif CONFIG_MSM_DEBUG_UART == 3 | ||
88 | #define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS | ||
89 | #endif | ||
90 | #define MSM_DEBUG_UART_SIZE SZ_4K | ||
91 | #endif | ||
92 | |||
93 | #define MSM_SDC1_PHYS 0xA0400000 | 81 | #define MSM_SDC1_PHYS 0xA0400000 |
94 | #define MSM_SDC1_SIZE SZ_4K | 82 | #define MSM_SDC1_SIZE SZ_4K |
95 | 83 | ||
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h index 37694442d1bd..198202c267c8 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h | |||
@@ -89,18 +89,6 @@ | |||
89 | #define MSM_UART3_PHYS 0xACC00000 | 89 | #define MSM_UART3_PHYS 0xACC00000 |
90 | #define MSM_UART3_SIZE SZ_4K | 90 | #define MSM_UART3_SIZE SZ_4K |
91 | 91 | ||
92 | #ifdef CONFIG_MSM_DEBUG_UART | ||
93 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
94 | #if CONFIG_MSM_DEBUG_UART == 1 | ||
95 | #define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS | ||
96 | #elif CONFIG_MSM_DEBUG_UART == 2 | ||
97 | #define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS | ||
98 | #elif CONFIG_MSM_DEBUG_UART == 3 | ||
99 | #define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS | ||
100 | #endif | ||
101 | #define MSM_DEBUG_UART_SIZE SZ_4K | ||
102 | #endif | ||
103 | |||
104 | #define MSM_MDC_BASE IOMEM(0xE0200000) | 92 | #define MSM_MDC_BASE IOMEM(0xE0200000) |
105 | #define MSM_MDC_PHYS 0xAA500000 | 93 | #define MSM_MDC_PHYS 0xAA500000 |
106 | #define MSM_MDC_SIZE SZ_1M | 94 | #define MSM_MDC_SIZE SZ_1M |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h index 3c9d9602a318..800b55767e6b 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h | |||
@@ -45,4 +45,9 @@ | |||
45 | #define MSM8960_TMR0_PHYS 0x0208A000 | 45 | #define MSM8960_TMR0_PHYS 0x0208A000 |
46 | #define MSM8960_TMR0_SIZE SZ_4K | 46 | #define MSM8960_TMR0_SIZE SZ_4K |
47 | 47 | ||
48 | #ifdef CONFIG_DEBUG_MSM8960_UART | ||
49 | #define MSM_DEBUG_UART_BASE 0xE1040000 | ||
50 | #define MSM_DEBUG_UART_PHYS 0x16440000 | ||
51 | #endif | ||
52 | |||
48 | #endif | 53 | #endif |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index d67cd73316f4..0faa894729b7 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | |||
@@ -83,18 +83,6 @@ | |||
83 | #define MSM_UART3_PHYS 0xA9C00000 | 83 | #define MSM_UART3_PHYS 0xA9C00000 |
84 | #define MSM_UART3_SIZE SZ_4K | 84 | #define MSM_UART3_SIZE SZ_4K |
85 | 85 | ||
86 | #ifdef CONFIG_MSM_DEBUG_UART | ||
87 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
88 | #if CONFIG_MSM_DEBUG_UART == 1 | ||
89 | #define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS | ||
90 | #elif CONFIG_MSM_DEBUG_UART == 2 | ||
91 | #define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS | ||
92 | #elif CONFIG_MSM_DEBUG_UART == 3 | ||
93 | #define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS | ||
94 | #endif | ||
95 | #define MSM_DEBUG_UART_SIZE SZ_4K | ||
96 | #endif | ||
97 | |||
98 | #define MSM_MDC_BASE IOMEM(0xE0200000) | 86 | #define MSM_MDC_BASE IOMEM(0xE0200000) |
99 | #define MSM_MDC_PHYS 0xAA500000 | 87 | #define MSM_MDC_PHYS 0xAA500000 |
100 | #define MSM_MDC_SIZE SZ_1M | 88 | #define MSM_MDC_SIZE SZ_1M |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h index 3b19b8f244b8..54e12caa8d86 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | |||
@@ -62,4 +62,9 @@ | |||
62 | #define MSM8X60_TMR0_PHYS 0x02040000 | 62 | #define MSM8X60_TMR0_PHYS 0x02040000 |
63 | #define MSM8X60_TMR0_SIZE SZ_4K | 63 | #define MSM8X60_TMR0_SIZE SZ_4K |
64 | 64 | ||
65 | #ifdef CONFIG_DEBUG_MSM8660_UART | ||
66 | #define MSM_DEBUG_UART_BASE 0xE1040000 | ||
67 | #define MSM_DEBUG_UART_PHYS 0x19C40000 | ||
68 | #endif | ||
69 | |||
65 | #endif | 70 | #endif |
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h index 4ded15238b60..90682f4599d3 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap.h | |||
@@ -55,6 +55,18 @@ | |||
55 | 55 | ||
56 | #include "msm_iomap-8960.h" | 56 | #include "msm_iomap-8960.h" |
57 | 57 | ||
58 | #define MSM_DEBUG_UART_SIZE SZ_4K | ||
59 | #if defined(CONFIG_DEBUG_MSM_UART1) | ||
60 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
61 | #define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS | ||
62 | #elif defined(CONFIG_DEBUG_MSM_UART2) | ||
63 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
64 | #define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS | ||
65 | #elif defined(CONFIG_DEBUG_MSM_UART3) | ||
66 | #define MSM_DEBUG_UART_BASE 0xE1000000 | ||
67 | #define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS | ||
68 | #endif | ||
69 | |||
58 | /* Virtual addresses shared across all MSM targets. */ | 70 | /* Virtual addresses shared across all MSM targets. */ |
59 | #define MSM_CSR_BASE IOMEM(0xE0001000) | 71 | #define MSM_CSR_BASE IOMEM(0xE0001000) |
60 | #define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) | 72 | #define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) |
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h index d94292c29d8e..169a84007456 100644 --- a/arch/arm/mach-msm/include/mach/uncompress.h +++ b/arch/arm/mach-msm/include/mach/uncompress.h | |||
@@ -1,6 +1,6 @@ | |||
1 | /* arch/arm/mach-msm/include/mach/uncompress.h | 1 | /* |
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | 2 | * Copyright (C) 2007 Google, Inc. |
3 | * Copyright (c) 2011, Code Aurora Forum. All rights reserved. | ||
4 | * | 4 | * |
5 | * This software is licensed under the terms of the GNU General Public | 5 | * This software is licensed under the terms of the GNU General Public |
6 | * License version 2, as published by the Free Software Foundation, and | 6 | * License version 2, as published by the Free Software Foundation, and |
@@ -14,17 +14,40 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H | 16 | #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H |
17 | #define __ASM_ARCH_MSM_UNCOMPRESS_H | ||
18 | |||
19 | #include <asm/processor.h> | ||
20 | #include <mach/msm_iomap.h> | ||
21 | |||
22 | #define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)) | ||
23 | #define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c)) | ||
17 | 24 | ||
18 | #include "hardware.h" | 25 | #define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))) |
19 | #include "linux/io.h" | 26 | #define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10))) |
20 | #include "mach/msm_iomap.h" | 27 | #define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14))) |
28 | #define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40))) | ||
29 | #define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70))) | ||
21 | 30 | ||
22 | static void putc(int c) | 31 | static void putc(int c) |
23 | { | 32 | { |
24 | #if defined(MSM_DEBUG_UART_PHYS) | 33 | #if defined(MSM_DEBUG_UART_PHYS) |
25 | unsigned base = MSM_DEBUG_UART_PHYS; | 34 | #ifdef CONFIG_MSM_HAS_DEBUG_UART_HS |
26 | while (!(readl(base + 0x08) & 0x04)) ; | 35 | /* |
27 | writel(c, base + 0x0c); | 36 | * Wait for TX_READY to be set; but skip it if we have a |
37 | * TX underrun. | ||
38 | */ | ||
39 | if (UART_DM_SR & 0x08) | ||
40 | while (!(UART_DM_ISR & 0x80)) | ||
41 | cpu_relax(); | ||
42 | |||
43 | UART_DM_CR = 0x300; | ||
44 | UART_DM_NCHAR = 0x1; | ||
45 | UART_DM_TF = c; | ||
46 | #else | ||
47 | while (!(UART_CSR & 0x04)) | ||
48 | cpu_relax(); | ||
49 | UART_TF = c; | ||
50 | #endif | ||
28 | #endif | 51 | #endif |
29 | } | 52 | } |
30 | 53 | ||
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 8759ecf7454f..578b04e42deb 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c | |||
@@ -47,7 +47,8 @@ static struct map_desc msm_io_desc[] __initdata = { | |||
47 | MSM_CHIP_DEVICE(GPIO1, MSM7X00), | 47 | MSM_CHIP_DEVICE(GPIO1, MSM7X00), |
48 | MSM_CHIP_DEVICE(GPIO2, MSM7X00), | 48 | MSM_CHIP_DEVICE(GPIO2, MSM7X00), |
49 | MSM_DEVICE(CLK_CTL), | 49 | MSM_DEVICE(CLK_CTL), |
50 | #ifdef CONFIG_MSM_DEBUG_UART | 50 | #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ |
51 | defined(CONFIG_DEBUG_MSM_UART3) | ||
51 | MSM_DEVICE(DEBUG_UART), | 52 | MSM_DEVICE(DEBUG_UART), |
52 | #endif | 53 | #endif |
53 | #ifdef CONFIG_ARCH_MSM7X30 | 54 | #ifdef CONFIG_ARCH_MSM7X30 |
@@ -84,7 +85,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = { | |||
84 | MSM_DEVICE(SCPLL), | 85 | MSM_DEVICE(SCPLL), |
85 | MSM_DEVICE(AD5), | 86 | MSM_DEVICE(AD5), |
86 | MSM_DEVICE(MDC), | 87 | MSM_DEVICE(MDC), |
87 | #ifdef CONFIG_MSM_DEBUG_UART | 88 | #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ |
89 | defined(CONFIG_DEBUG_MSM_UART3) | ||
88 | MSM_DEVICE(DEBUG_UART), | 90 | MSM_DEVICE(DEBUG_UART), |
89 | #endif | 91 | #endif |
90 | { | 92 | { |
@@ -109,6 +111,9 @@ static struct map_desc msm8x60_io_desc[] __initdata = { | |||
109 | MSM_CHIP_DEVICE(TMR0, MSM8X60), | 111 | MSM_CHIP_DEVICE(TMR0, MSM8X60), |
110 | MSM_DEVICE(ACC), | 112 | MSM_DEVICE(ACC), |
111 | MSM_DEVICE(GCC), | 113 | MSM_DEVICE(GCC), |
114 | #ifdef CONFIG_DEBUG_MSM8660_UART | ||
115 | MSM_DEVICE(DEBUG_UART), | ||
116 | #endif | ||
112 | }; | 117 | }; |
113 | 118 | ||
114 | void __init msm_map_msm8x60_io(void) | 119 | void __init msm_map_msm8x60_io(void) |
@@ -123,6 +128,9 @@ static struct map_desc msm8960_io_desc[] __initdata = { | |||
123 | MSM_CHIP_DEVICE(QGIC_CPU, MSM8960), | 128 | MSM_CHIP_DEVICE(QGIC_CPU, MSM8960), |
124 | MSM_CHIP_DEVICE(TMR, MSM8960), | 129 | MSM_CHIP_DEVICE(TMR, MSM8960), |
125 | MSM_CHIP_DEVICE(TMR0, MSM8960), | 130 | MSM_CHIP_DEVICE(TMR0, MSM8960), |
131 | #ifdef CONFIG_DEBUG_MSM8960_UART | ||
132 | MSM_DEVICE(DEBUG_UART), | ||
133 | #endif | ||
126 | }; | 134 | }; |
127 | 135 | ||
128 | void __init msm_map_msm8960_io(void) | 136 | void __init msm_map_msm8960_io(void) |
@@ -146,7 +154,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = { | |||
146 | MSM_DEVICE(SAW), | 154 | MSM_DEVICE(SAW), |
147 | MSM_DEVICE(GCC), | 155 | MSM_DEVICE(GCC), |
148 | MSM_DEVICE(TCSR), | 156 | MSM_DEVICE(TCSR), |
149 | #ifdef CONFIG_MSM_DEBUG_UART | 157 | #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ |
158 | defined(CONFIG_DEBUG_MSM_UART3) | ||
150 | MSM_DEVICE(DEBUG_UART), | 159 | MSM_DEVICE(DEBUG_UART), |
151 | #endif | 160 | #endif |
152 | { | 161 | { |
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index fdec58aaa35c..0b3e357c4c8c 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c | |||
@@ -79,7 +79,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu) | |||
79 | ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), | 79 | ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), |
80 | SCM_FLAG_COLDBOOT_CPU1); | 80 | SCM_FLAG_COLDBOOT_CPU1); |
81 | if (ret == 0) { | 81 | if (ret == 0) { |
82 | void *sc1_base_ptr; | 82 | void __iomem *sc1_base_ptr; |
83 | sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); | 83 | sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); |
84 | if (sc1_base_ptr) { | 84 | if (sc1_base_ptr) { |
85 | writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); | 85 | writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); |
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c index ccc61585659b..596edd967dbf 100644 --- a/arch/arm/mach-mx5/imx51-dt.c +++ b/arch/arm/mach-mx5/imx51-dt.c | |||
@@ -44,20 +44,22 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = { | |||
44 | { /* sentinel */ } | 44 | { /* sentinel */ } |
45 | }; | 45 | }; |
46 | 46 | ||
47 | static void __init imx51_tzic_add_irq_domain(struct device_node *np, | 47 | static int __init imx51_tzic_add_irq_domain(struct device_node *np, |
48 | struct device_node *interrupt_parent) | 48 | struct device_node *interrupt_parent) |
49 | { | 49 | { |
50 | irq_domain_add_simple(np, 0); | 50 | irq_domain_add_simple(np, 0); |
51 | return 0; | ||
51 | } | 52 | } |
52 | 53 | ||
53 | static void __init imx51_gpio_add_irq_domain(struct device_node *np, | 54 | static int __init imx51_gpio_add_irq_domain(struct device_node *np, |
54 | struct device_node *interrupt_parent) | 55 | struct device_node *interrupt_parent) |
55 | { | 56 | { |
56 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - | 57 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; |
57 | 32 * 4; /* imx51 gets 4 gpio ports */ | ||
58 | 58 | ||
59 | gpio_irq_base -= 32; | ||
59 | irq_domain_add_simple(np, gpio_irq_base); | 60 | irq_domain_add_simple(np, gpio_irq_base); |
60 | gpio_irq_base += 32; | 61 | |
62 | return 0; | ||
61 | } | 63 | } |
62 | 64 | ||
63 | static const struct of_device_id imx51_irq_match[] __initconst = { | 65 | static const struct of_device_id imx51_irq_match[] __initconst = { |
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c index ccaa0b81b768..85bfd5ff21b0 100644 --- a/arch/arm/mach-mx5/imx53-dt.c +++ b/arch/arm/mach-mx5/imx53-dt.c | |||
@@ -48,20 +48,22 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = { | |||
48 | { /* sentinel */ } | 48 | { /* sentinel */ } |
49 | }; | 49 | }; |
50 | 50 | ||
51 | static void __init imx53_tzic_add_irq_domain(struct device_node *np, | 51 | static int __init imx53_tzic_add_irq_domain(struct device_node *np, |
52 | struct device_node *interrupt_parent) | 52 | struct device_node *interrupt_parent) |
53 | { | 53 | { |
54 | irq_domain_add_simple(np, 0); | 54 | irq_domain_add_simple(np, 0); |
55 | return 0; | ||
55 | } | 56 | } |
56 | 57 | ||
57 | static void __init imx53_gpio_add_irq_domain(struct device_node *np, | 58 | static int __init imx53_gpio_add_irq_domain(struct device_node *np, |
58 | struct device_node *interrupt_parent) | 59 | struct device_node *interrupt_parent) |
59 | { | 60 | { |
60 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS - | 61 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; |
61 | 32 * 7; /* imx53 gets 7 gpio ports */ | ||
62 | 62 | ||
63 | gpio_irq_base -= 32; | ||
63 | irq_domain_add_simple(np, gpio_irq_base); | 64 | irq_domain_add_simple(np, gpio_irq_base); |
64 | gpio_irq_base += 32; | 65 | |
66 | return 0; | ||
65 | } | 67 | } |
66 | 68 | ||
67 | static const struct of_device_id imx53_irq_match[] __initconst = { | 69 | static const struct of_device_id imx53_irq_match[] __initconst = { |
diff --git a/arch/arm/mach-mxs/include/mach/mx28.h b/arch/arm/mach-mxs/include/mach/mx28.h index 75d86118b76a..30c7990f3c01 100644 --- a/arch/arm/mach-mxs/include/mach/mx28.h +++ b/arch/arm/mach-mxs/include/mach/mx28.h | |||
@@ -104,8 +104,8 @@ | |||
104 | #define MX28_INT_CAN1 9 | 104 | #define MX28_INT_CAN1 9 |
105 | #define MX28_INT_LRADC_TOUCH 10 | 105 | #define MX28_INT_LRADC_TOUCH 10 |
106 | #define MX28_INT_HSADC 13 | 106 | #define MX28_INT_HSADC 13 |
107 | #define MX28_INT_IRADC_THRESH0 14 | 107 | #define MX28_INT_LRADC_THRESH0 14 |
108 | #define MX28_INT_IRADC_THRESH1 15 | 108 | #define MX28_INT_LRADC_THRESH1 15 |
109 | #define MX28_INT_LRADC_CH0 16 | 109 | #define MX28_INT_LRADC_CH0 16 |
110 | #define MX28_INT_LRADC_CH1 17 | 110 | #define MX28_INT_LRADC_CH1 17 |
111 | #define MX28_INT_LRADC_CH2 18 | 111 | #define MX28_INT_LRADC_CH2 18 |
diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h index 0d2d2b470998..bde5f6634747 100644 --- a/arch/arm/mach-mxs/include/mach/mxs.h +++ b/arch/arm/mach-mxs/include/mach/mxs.h | |||
@@ -30,6 +30,7 @@ | |||
30 | */ | 30 | */ |
31 | #define cpu_is_mx23() ( \ | 31 | #define cpu_is_mx23() ( \ |
32 | machine_is_mx23evk() || \ | 32 | machine_is_mx23evk() || \ |
33 | machine_is_stmp378x() || \ | ||
33 | 0) | 34 | 0) |
34 | #define cpu_is_mx28() ( \ | 35 | #define cpu_is_mx28() ( \ |
35 | machine_is_mx28evk() || \ | 36 | machine_is_mx28evk() || \ |
diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c index 3b1681e4f49a..6b00577b7025 100644 --- a/arch/arm/mach-mxs/mach-m28evk.c +++ b/arch/arm/mach-mxs/mach-m28evk.c | |||
@@ -361,6 +361,6 @@ static struct sys_timer m28evk_timer = { | |||
361 | MACHINE_START(M28EVK, "DENX M28 EVK") | 361 | MACHINE_START(M28EVK, "DENX M28 EVK") |
362 | .map_io = mx28_map_io, | 362 | .map_io = mx28_map_io, |
363 | .init_irq = mx28_init_irq, | 363 | .init_irq = mx28_init_irq, |
364 | .init_machine = m28evk_init, | ||
365 | .timer = &m28evk_timer, | 364 | .timer = &m28evk_timer, |
365 | .init_machine = m28evk_init, | ||
366 | MACHINE_END | 366 | MACHINE_END |
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c index 177e53123a02..6834dea38c04 100644 --- a/arch/arm/mach-mxs/mach-stmp378x_devb.c +++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c | |||
@@ -115,6 +115,6 @@ static struct sys_timer stmp378x_dvb_timer = { | |||
115 | MACHINE_START(STMP378X, "STMP378X") | 115 | MACHINE_START(STMP378X, "STMP378X") |
116 | .map_io = mx23_map_io, | 116 | .map_io = mx23_map_io, |
117 | .init_irq = mx23_init_irq, | 117 | .init_irq = mx23_init_irq, |
118 | .init_machine = stmp378x_dvb_init, | ||
119 | .timer = &stmp378x_dvb_timer, | 118 | .timer = &stmp378x_dvb_timer, |
119 | .init_machine = stmp378x_dvb_init, | ||
120 | MACHINE_END | 120 | MACHINE_END |
diff --git a/arch/arm/mach-mxs/module-tx28.c b/arch/arm/mach-mxs/module-tx28.c index 0fcff47009cf..9a7b08b2a925 100644 --- a/arch/arm/mach-mxs/module-tx28.c +++ b/arch/arm/mach-mxs/module-tx28.c | |||
@@ -66,11 +66,11 @@ static const iomux_cfg_t tx28_fec1_pads[] __initconst = { | |||
66 | MX28_PAD_ENET0_CRS__ENET1_RX_EN, | 66 | MX28_PAD_ENET0_CRS__ENET1_RX_EN, |
67 | }; | 67 | }; |
68 | 68 | ||
69 | static struct fec_platform_data tx28_fec0_data = { | 69 | static const struct fec_platform_data tx28_fec0_data __initconst = { |
70 | .phy = PHY_INTERFACE_MODE_RMII, | 70 | .phy = PHY_INTERFACE_MODE_RMII, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | static struct fec_platform_data tx28_fec1_data = { | 73 | static const struct fec_platform_data tx28_fec1_data __initconst = { |
74 | .phy = PHY_INTERFACE_MODE_RMII, | 74 | .phy = PHY_INTERFACE_MODE_RMII, |
75 | }; | 75 | }; |
76 | 76 | ||
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index 1297bb58869c..9ff90a744a21 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c | |||
@@ -16,6 +16,8 @@ | |||
16 | 16 | ||
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/clk.h> | 18 | #include <linux/clk.h> |
19 | #include <linux/cpufreq.h> | ||
20 | #include <linux/delay.h> | ||
19 | #include <linux/io.h> | 21 | #include <linux/io.h> |
20 | 22 | ||
21 | #include <asm/mach-types.h> /* for machine_is_* */ | 23 | #include <asm/mach-types.h> /* for machine_is_* */ |
@@ -927,16 +929,22 @@ int __init omap1_clk_init(void) | |||
927 | 929 | ||
928 | void __init omap1_clk_late_init(void) | 930 | void __init omap1_clk_late_init(void) |
929 | { | 931 | { |
930 | if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE) | 932 | unsigned long rate = ck_dpll1.rate; |
933 | |||
934 | if (rate >= OMAP1_DPLL1_SANE_VALUE) | ||
931 | return; | 935 | return; |
932 | 936 | ||
937 | /* System booting at unusable rate, force reprogramming of DPLL1 */ | ||
938 | ck_dpll1_p->rate = 0; | ||
939 | |||
933 | /* Find the highest supported frequency and enable it */ | 940 | /* Find the highest supported frequency and enable it */ |
934 | if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { | 941 | if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { |
935 | pr_err("System frequencies not set, using default. Check your config.\n"); | 942 | pr_err("System frequencies not set, using default. Check your config.\n"); |
936 | omap_writew(0x2290, DPLL_CTL); | 943 | omap_writew(0x2290, DPLL_CTL); |
937 | omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL); | 944 | omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL); |
938 | ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE; | 945 | ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE; |
939 | } | 946 | } |
940 | propagate_rate(&ck_dpll1); | 947 | propagate_rate(&ck_dpll1); |
941 | omap1_show_rates(); | 948 | omap1_show_rates(); |
949 | loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate); | ||
942 | } | 950 | } |
diff --git a/arch/arm/mach-prima2/pm.c b/arch/arm/mach-prima2/pm.c index cb53160f6c5d..26ebb57719df 100644 --- a/arch/arm/mach-prima2/pm.c +++ b/arch/arm/mach-prima2/pm.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/suspend.h> | 10 | #include <linux/suspend.h> |
11 | #include <linux/slab.h> | 11 | #include <linux/slab.h> |
12 | #include <linux/module.h> | ||
12 | #include <linux/of.h> | 13 | #include <linux/of.h> |
13 | #include <linux/of_address.h> | 14 | #include <linux/of_address.h> |
14 | #include <linux/of_device.h> | 15 | #include <linux/of_device.h> |
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c index ef555c041962..a12b689a8702 100644 --- a/arch/arm/mach-prima2/prima2.c +++ b/arch/arm/mach-prima2/prima2.c | |||
@@ -8,6 +8,7 @@ | |||
8 | 8 | ||
9 | #include <linux/init.h> | 9 | #include <linux/init.h> |
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <asm/sizes.h> | ||
11 | #include <asm/mach-types.h> | 12 | #include <asm/mach-types.h> |
12 | #include <asm/mach/arch.h> | 13 | #include <asm/mach/arch.h> |
13 | #include <linux/of.h> | 14 | #include <linux/of.h> |
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c index 5e6b42089eb4..3341fd118723 100644 --- a/arch/arm/mach-s3c64xx/dev-spi.c +++ b/arch/arm/mach-s3c64xx/dev-spi.c | |||
@@ -10,6 +10,7 @@ | |||
10 | 10 | ||
11 | #include <linux/kernel.h> | 11 | #include <linux/kernel.h> |
12 | #include <linux/string.h> | 12 | #include <linux/string.h> |
13 | #include <linux/export.h> | ||
13 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
14 | #include <linux/dma-mapping.h> | 15 | #include <linux/dma-mapping.h> |
15 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 7a3bc32df425..51c00f2453c6 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c | |||
@@ -70,7 +70,7 @@ void __init s3c6400_init_irq(void) | |||
70 | s3c64xx_init_irq(~0 & ~(0xf << 5), ~0); | 70 | s3c64xx_init_irq(~0 & ~(0xf << 5), ~0); |
71 | } | 71 | } |
72 | 72 | ||
73 | struct sysdev_class s3c6400_sysclass = { | 73 | static struct sysdev_class s3c6400_sysclass = { |
74 | .name = "s3c6400-core", | 74 | .name = "s3c6400-core", |
75 | }; | 75 | }; |
76 | 76 | ||
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c index 83d2afb79e9f..2cf80026c58d 100644 --- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c | |||
@@ -20,7 +20,7 @@ | |||
20 | #include <plat/fb.h> | 20 | #include <plat/fb.h> |
21 | #include <plat/gpio-cfg.h> | 21 | #include <plat/gpio-cfg.h> |
22 | 22 | ||
23 | extern void s3c64xx_fb_gpio_setup_24bpp(void) | 23 | void s3c64xx_fb_gpio_setup_24bpp(void) |
24 | { | 24 | { |
25 | s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2)); | 25 | s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2)); |
26 | s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2)); | 26 | s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2)); |
diff --git a/arch/arm/mach-sa1100/Makefile.boot b/arch/arm/mach-sa1100/Makefile.boot index 5a616f6e5612..f7951aa04562 100644 --- a/arch/arm/mach-sa1100/Makefile.boot +++ b/arch/arm/mach-sa1100/Makefile.boot | |||
@@ -1,5 +1,5 @@ | |||
1 | ifeq ($(CONFIG_ARCH_SA1100),y) | 1 | ifeq ($(CONFIG_SA1111),y) |
2 | zreladdr-$(CONFIG_SA1111) += 0xc0208000 | 2 | zreladdr-y += 0xc0208000 |
3 | else | 3 | else |
4 | zreladdr-y += 0xc0008000 | 4 | zreladdr-y += 0xc0008000 |
5 | endif | 5 | endif |
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c index 1f17bde52cd4..7c756fb189f7 100644 --- a/arch/avr32/boards/atngw100/setup.c +++ b/arch/avr32/boards/atngw100/setup.c | |||
@@ -109,7 +109,7 @@ struct eth_addr { | |||
109 | u8 addr[6]; | 109 | u8 addr[6]; |
110 | }; | 110 | }; |
111 | static struct eth_addr __initdata hw_addr[2]; | 111 | static struct eth_addr __initdata hw_addr[2]; |
112 | static struct eth_platform_data __initdata eth_data[2]; | 112 | static struct macb_platform_data __initdata eth_data[2]; |
113 | 113 | ||
114 | static struct spi_board_info spi0_board_info[] __initdata = { | 114 | static struct spi_board_info spi0_board_info[] __initdata = { |
115 | { | 115 | { |
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c index 4643ff5107c9..c56ddac85d61 100644 --- a/arch/avr32/boards/atstk1000/atstk1002.c +++ b/arch/avr32/boards/atstk1000/atstk1002.c | |||
@@ -105,7 +105,7 @@ struct eth_addr { | |||
105 | }; | 105 | }; |
106 | 106 | ||
107 | static struct eth_addr __initdata hw_addr[2]; | 107 | static struct eth_addr __initdata hw_addr[2]; |
108 | static struct eth_platform_data __initdata eth_data[2] = { | 108 | static struct macb_platform_data __initdata eth_data[2] = { |
109 | { | 109 | { |
110 | /* | 110 | /* |
111 | * The MDIO pullups on STK1000 are a bit too weak for | 111 | * The MDIO pullups on STK1000 are a bit too weak for |
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c index 86fab77a5a00..27bd6fbe21cb 100644 --- a/arch/avr32/boards/favr-32/setup.c +++ b/arch/avr32/boards/favr-32/setup.c | |||
@@ -50,7 +50,7 @@ struct eth_addr { | |||
50 | u8 addr[6]; | 50 | u8 addr[6]; |
51 | }; | 51 | }; |
52 | static struct eth_addr __initdata hw_addr[1]; | 52 | static struct eth_addr __initdata hw_addr[1]; |
53 | static struct eth_platform_data __initdata eth_data[1] = { | 53 | static struct macb_platform_data __initdata eth_data[1] = { |
54 | { | 54 | { |
55 | .phy_mask = ~(1U << 1), | 55 | .phy_mask = ~(1U << 1), |
56 | }, | 56 | }, |
diff --git a/arch/avr32/boards/hammerhead/setup.c b/arch/avr32/boards/hammerhead/setup.c index da14fbdd4e8e..9d1efd1cd425 100644 --- a/arch/avr32/boards/hammerhead/setup.c +++ b/arch/avr32/boards/hammerhead/setup.c | |||
@@ -102,7 +102,7 @@ struct eth_addr { | |||
102 | }; | 102 | }; |
103 | 103 | ||
104 | static struct eth_addr __initdata hw_addr[1]; | 104 | static struct eth_addr __initdata hw_addr[1]; |
105 | static struct eth_platform_data __initdata eth_data[1]; | 105 | static struct macb_platform_data __initdata eth_data[1]; |
106 | 106 | ||
107 | /* | 107 | /* |
108 | * The next two functions should go away as the boot loader is | 108 | * The next two functions should go away as the boot loader is |
diff --git a/arch/avr32/boards/merisc/setup.c b/arch/avr32/boards/merisc/setup.c index e61bc948f959..ed137e335796 100644 --- a/arch/avr32/boards/merisc/setup.c +++ b/arch/avr32/boards/merisc/setup.c | |||
@@ -52,7 +52,7 @@ struct eth_addr { | |||
52 | }; | 52 | }; |
53 | 53 | ||
54 | static struct eth_addr __initdata hw_addr[2]; | 54 | static struct eth_addr __initdata hw_addr[2]; |
55 | static struct eth_platform_data __initdata eth_data[2]; | 55 | static struct macb_platform_data __initdata eth_data[2]; |
56 | 56 | ||
57 | static int ads7846_get_pendown_state_PB26(void) | 57 | static int ads7846_get_pendown_state_PB26(void) |
58 | { | 58 | { |
diff --git a/arch/avr32/boards/mimc200/setup.c b/arch/avr32/boards/mimc200/setup.c index c4da5cba2dbf..05358aa5ef7d 100644 --- a/arch/avr32/boards/mimc200/setup.c +++ b/arch/avr32/boards/mimc200/setup.c | |||
@@ -86,7 +86,7 @@ struct eth_addr { | |||
86 | u8 addr[6]; | 86 | u8 addr[6]; |
87 | }; | 87 | }; |
88 | static struct eth_addr __initdata hw_addr[2]; | 88 | static struct eth_addr __initdata hw_addr[2]; |
89 | static struct eth_platform_data __initdata eth_data[2]; | 89 | static struct macb_platform_data __initdata eth_data[2]; |
90 | 90 | ||
91 | static struct spi_eeprom eeprom_25lc010 = { | 91 | static struct spi_eeprom eeprom_25lc010 = { |
92 | .name = "25lc010", | 92 | .name = "25lc010", |
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index 7fbf0dcb9afe..402a7bb72669 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c | |||
@@ -1067,7 +1067,7 @@ void __init at32_setup_serial_console(unsigned int usart_id) | |||
1067 | * -------------------------------------------------------------------- */ | 1067 | * -------------------------------------------------------------------- */ |
1068 | 1068 | ||
1069 | #ifdef CONFIG_CPU_AT32AP7000 | 1069 | #ifdef CONFIG_CPU_AT32AP7000 |
1070 | static struct eth_platform_data macb0_data; | 1070 | static struct macb_platform_data macb0_data; |
1071 | static struct resource macb0_resource[] = { | 1071 | static struct resource macb0_resource[] = { |
1072 | PBMEM(0xfff01800), | 1072 | PBMEM(0xfff01800), |
1073 | IRQ(25), | 1073 | IRQ(25), |
@@ -1076,7 +1076,7 @@ DEFINE_DEV_DATA(macb, 0); | |||
1076 | DEV_CLK(hclk, macb0, hsb, 8); | 1076 | DEV_CLK(hclk, macb0, hsb, 8); |
1077 | DEV_CLK(pclk, macb0, pbb, 6); | 1077 | DEV_CLK(pclk, macb0, pbb, 6); |
1078 | 1078 | ||
1079 | static struct eth_platform_data macb1_data; | 1079 | static struct macb_platform_data macb1_data; |
1080 | static struct resource macb1_resource[] = { | 1080 | static struct resource macb1_resource[] = { |
1081 | PBMEM(0xfff01c00), | 1081 | PBMEM(0xfff01c00), |
1082 | IRQ(26), | 1082 | IRQ(26), |
@@ -1086,7 +1086,7 @@ DEV_CLK(hclk, macb1, hsb, 9); | |||
1086 | DEV_CLK(pclk, macb1, pbb, 7); | 1086 | DEV_CLK(pclk, macb1, pbb, 7); |
1087 | 1087 | ||
1088 | struct platform_device *__init | 1088 | struct platform_device *__init |
1089 | at32_add_device_eth(unsigned int id, struct eth_platform_data *data) | 1089 | at32_add_device_eth(unsigned int id, struct macb_platform_data *data) |
1090 | { | 1090 | { |
1091 | struct platform_device *pdev; | 1091 | struct platform_device *pdev; |
1092 | u32 pin_mask; | 1092 | u32 pin_mask; |
@@ -1163,7 +1163,7 @@ at32_add_device_eth(unsigned int id, struct eth_platform_data *data) | |||
1163 | return NULL; | 1163 | return NULL; |
1164 | } | 1164 | } |
1165 | 1165 | ||
1166 | memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); | 1166 | memcpy(pdev->dev.platform_data, data, sizeof(struct macb_platform_data)); |
1167 | platform_device_register(pdev); | 1167 | platform_device_register(pdev); |
1168 | 1168 | ||
1169 | return pdev; | 1169 | return pdev; |
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h index 5d7ffca7d69f..67b111ce332d 100644 --- a/arch/avr32/mach-at32ap/include/mach/board.h +++ b/arch/avr32/mach-at32ap/include/mach/board.h | |||
@@ -6,6 +6,7 @@ | |||
6 | 6 | ||
7 | #include <linux/types.h> | 7 | #include <linux/types.h> |
8 | #include <linux/serial.h> | 8 | #include <linux/serial.h> |
9 | #include <linux/platform_data/macb.h> | ||
9 | 10 | ||
10 | #define GPIO_PIN_NONE (-1) | 11 | #define GPIO_PIN_NONE (-1) |
11 | 12 | ||
@@ -42,12 +43,8 @@ struct atmel_uart_data { | |||
42 | void at32_map_usart(unsigned int hw_id, unsigned int line, int flags); | 43 | void at32_map_usart(unsigned int hw_id, unsigned int line, int flags); |
43 | struct platform_device *at32_add_device_usart(unsigned int id); | 44 | struct platform_device *at32_add_device_usart(unsigned int id); |
44 | 45 | ||
45 | struct eth_platform_data { | ||
46 | u32 phy_mask; | ||
47 | u8 is_rmii; | ||
48 | }; | ||
49 | struct platform_device * | 46 | struct platform_device * |
50 | at32_add_device_eth(unsigned int id, struct eth_platform_data *data); | 47 | at32_add_device_eth(unsigned int id, struct macb_platform_data *data); |
51 | 48 | ||
52 | struct spi_board_info; | 49 | struct spi_board_info; |
53 | struct platform_device * | 50 | struct platform_device * |
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h index 43f984e93970..303192fc9260 100644 --- a/arch/m68k/include/asm/unistd.h +++ b/arch/m68k/include/asm/unistd.h | |||
@@ -350,10 +350,12 @@ | |||
350 | #define __NR_clock_adjtime 342 | 350 | #define __NR_clock_adjtime 342 |
351 | #define __NR_syncfs 343 | 351 | #define __NR_syncfs 343 |
352 | #define __NR_setns 344 | 352 | #define __NR_setns 344 |
353 | #define __NR_process_vm_readv 345 | ||
354 | #define __NR_process_vm_writev 346 | ||
353 | 355 | ||
354 | #ifdef __KERNEL__ | 356 | #ifdef __KERNEL__ |
355 | 357 | ||
356 | #define NR_syscalls 345 | 358 | #define NR_syscalls 347 |
357 | 359 | ||
358 | #define __ARCH_WANT_IPC_PARSE_VERSION | 360 | #define __ARCH_WANT_IPC_PARSE_VERSION |
359 | #define __ARCH_WANT_OLD_READDIR | 361 | #define __ARCH_WANT_OLD_READDIR |
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S index c468f2edaa85..ce827b376110 100644 --- a/arch/m68k/kernel/syscalltable.S +++ b/arch/m68k/kernel/syscalltable.S | |||
@@ -365,4 +365,6 @@ ENTRY(sys_call_table) | |||
365 | .long sys_clock_adjtime | 365 | .long sys_clock_adjtime |
366 | .long sys_syncfs | 366 | .long sys_syncfs |
367 | .long sys_setns | 367 | .long sys_setns |
368 | .long sys_process_vm_readv /* 345 */ | ||
369 | .long sys_process_vm_writev | ||
368 | 370 | ||
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index 4f2971bcf8e5..315fc0b250f8 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c | |||
@@ -623,7 +623,7 @@ static int mipspmu_event_init(struct perf_event *event) | |||
623 | if (!atomic_inc_not_zero(&active_events)) { | 623 | if (!atomic_inc_not_zero(&active_events)) { |
624 | if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { | 624 | if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { |
625 | atomic_dec(&active_events); | 625 | atomic_dec(&active_events); |
626 | return -ENOSPC; | 626 | return -EINVAL; |
627 | } | 627 | } |
628 | 628 | ||
629 | mutex_lock(&pmu_reserve_mutex); | 629 | mutex_lock(&pmu_reserve_mutex); |
@@ -732,15 +732,15 @@ static int validate_group(struct perf_event *event) | |||
732 | memset(&fake_cpuc, 0, sizeof(fake_cpuc)); | 732 | memset(&fake_cpuc, 0, sizeof(fake_cpuc)); |
733 | 733 | ||
734 | if (!validate_event(&fake_cpuc, leader)) | 734 | if (!validate_event(&fake_cpuc, leader)) |
735 | return -ENOSPC; | 735 | return -EINVAL; |
736 | 736 | ||
737 | list_for_each_entry(sibling, &leader->sibling_list, group_entry) { | 737 | list_for_each_entry(sibling, &leader->sibling_list, group_entry) { |
738 | if (!validate_event(&fake_cpuc, sibling)) | 738 | if (!validate_event(&fake_cpuc, sibling)) |
739 | return -ENOSPC; | 739 | return -EINVAL; |
740 | } | 740 | } |
741 | 741 | ||
742 | if (!validate_event(&fake_cpuc, event)) | 742 | if (!validate_event(&fake_cpuc, event)) |
743 | return -ENOSPC; | 743 | return -EINVAL; |
744 | 744 | ||
745 | return 0; | 745 | return 0; |
746 | } | 746 | } |
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h index 524d23b8610c..4f289ff0b7fe 100644 --- a/arch/s390/include/asm/pgtable.h +++ b/arch/s390/include/asm/pgtable.h | |||
@@ -599,10 +599,10 @@ static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste) | |||
599 | skey = page_get_storage_key(address); | 599 | skey = page_get_storage_key(address); |
600 | bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED); | 600 | bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED); |
601 | /* Clear page changed & referenced bit in the storage key */ | 601 | /* Clear page changed & referenced bit in the storage key */ |
602 | if (bits) { | 602 | if (bits & _PAGE_CHANGED) |
603 | skey ^= bits; | 603 | page_set_storage_key(address, skey ^ bits, 1); |
604 | page_set_storage_key(address, skey, 1); | 604 | else if (bits) |
605 | } | 605 | page_reset_referenced(address); |
606 | /* Transfer page changed & referenced bit to guest bits in pgste */ | 606 | /* Transfer page changed & referenced bit to guest bits in pgste */ |
607 | pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */ | 607 | pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */ |
608 | /* Get host changed & referenced bits from pgste */ | 608 | /* Get host changed & referenced bits from pgste */ |
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c index 450931a45b68..573bc29551ef 100644 --- a/arch/s390/kernel/ptrace.c +++ b/arch/s390/kernel/ptrace.c | |||
@@ -296,13 +296,6 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data) | |||
296 | ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA)))) | 296 | ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA)))) |
297 | /* Invalid psw mask. */ | 297 | /* Invalid psw mask. */ |
298 | return -EINVAL; | 298 | return -EINVAL; |
299 | if (addr == (addr_t) &dummy->regs.psw.addr) | ||
300 | /* | ||
301 | * The debugger changed the instruction address, | ||
302 | * reset system call restart, see signal.c:do_signal | ||
303 | */ | ||
304 | task_thread_info(child)->system_call = 0; | ||
305 | |||
306 | *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; | 299 | *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; |
307 | 300 | ||
308 | } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { | 301 | } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { |
@@ -614,11 +607,6 @@ static int __poke_user_compat(struct task_struct *child, | |||
614 | /* Transfer 31 bit amode bit to psw mask. */ | 607 | /* Transfer 31 bit amode bit to psw mask. */ |
615 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) | | 608 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) | |
616 | (__u64)(tmp & PSW32_ADDR_AMODE); | 609 | (__u64)(tmp & PSW32_ADDR_AMODE); |
617 | /* | ||
618 | * The debugger changed the instruction address, | ||
619 | * reset system call restart, see signal.c:do_signal | ||
620 | */ | ||
621 | task_thread_info(child)->system_call = 0; | ||
622 | } else { | 610 | } else { |
623 | /* gpr 0-15 */ | 611 | /* gpr 0-15 */ |
624 | *(__u32*)((addr_t) ®s->psw + addr*2 + 4) = tmp; | 612 | *(__u32*)((addr_t) ®s->psw + addr*2 + 4) = tmp; |
@@ -905,6 +893,14 @@ static int s390_last_break_get(struct task_struct *target, | |||
905 | return 0; | 893 | return 0; |
906 | } | 894 | } |
907 | 895 | ||
896 | static int s390_last_break_set(struct task_struct *target, | ||
897 | const struct user_regset *regset, | ||
898 | unsigned int pos, unsigned int count, | ||
899 | const void *kbuf, const void __user *ubuf) | ||
900 | { | ||
901 | return 0; | ||
902 | } | ||
903 | |||
908 | #endif | 904 | #endif |
909 | 905 | ||
910 | static int s390_system_call_get(struct task_struct *target, | 906 | static int s390_system_call_get(struct task_struct *target, |
@@ -951,6 +947,7 @@ static const struct user_regset s390_regsets[] = { | |||
951 | .size = sizeof(long), | 947 | .size = sizeof(long), |
952 | .align = sizeof(long), | 948 | .align = sizeof(long), |
953 | .get = s390_last_break_get, | 949 | .get = s390_last_break_get, |
950 | .set = s390_last_break_set, | ||
954 | }, | 951 | }, |
955 | #endif | 952 | #endif |
956 | [REGSET_SYSTEM_CALL] = { | 953 | [REGSET_SYSTEM_CALL] = { |
@@ -1116,6 +1113,14 @@ static int s390_compat_last_break_get(struct task_struct *target, | |||
1116 | return 0; | 1113 | return 0; |
1117 | } | 1114 | } |
1118 | 1115 | ||
1116 | static int s390_compat_last_break_set(struct task_struct *target, | ||
1117 | const struct user_regset *regset, | ||
1118 | unsigned int pos, unsigned int count, | ||
1119 | const void *kbuf, const void __user *ubuf) | ||
1120 | { | ||
1121 | return 0; | ||
1122 | } | ||
1123 | |||
1119 | static const struct user_regset s390_compat_regsets[] = { | 1124 | static const struct user_regset s390_compat_regsets[] = { |
1120 | [REGSET_GENERAL] = { | 1125 | [REGSET_GENERAL] = { |
1121 | .core_note_type = NT_PRSTATUS, | 1126 | .core_note_type = NT_PRSTATUS, |
@@ -1139,6 +1144,7 @@ static const struct user_regset s390_compat_regsets[] = { | |||
1139 | .size = sizeof(long), | 1144 | .size = sizeof(long), |
1140 | .align = sizeof(long), | 1145 | .align = sizeof(long), |
1141 | .get = s390_compat_last_break_get, | 1146 | .get = s390_compat_last_break_get, |
1147 | .set = s390_compat_last_break_set, | ||
1142 | }, | 1148 | }, |
1143 | [REGSET_SYSTEM_CALL] = { | 1149 | [REGSET_SYSTEM_CALL] = { |
1144 | .core_note_type = NT_S390_SYSTEM_CALL, | 1150 | .core_note_type = NT_S390_SYSTEM_CALL, |
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index e58a462949b1..e54c4ff8abaa 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c | |||
@@ -579,7 +579,7 @@ static unsigned long __init find_crash_base(unsigned long crash_size, | |||
579 | *msg = "first memory chunk must be at least crashkernel size"; | 579 | *msg = "first memory chunk must be at least crashkernel size"; |
580 | return 0; | 580 | return 0; |
581 | } | 581 | } |
582 | if (is_kdump_kernel() && (crash_size == OLDMEM_SIZE)) | 582 | if (OLDMEM_BASE && crash_size == OLDMEM_SIZE) |
583 | return OLDMEM_BASE; | 583 | return OLDMEM_BASE; |
584 | 584 | ||
585 | for (i = MEMORY_CHUNKS - 1; i >= 0; i--) { | 585 | for (i = MEMORY_CHUNKS - 1; i >= 0; i--) { |
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c index 05a85bc14c98..7f6f9f354545 100644 --- a/arch/s390/kernel/signal.c +++ b/arch/s390/kernel/signal.c | |||
@@ -460,9 +460,9 @@ void do_signal(struct pt_regs *regs) | |||
460 | regs->svc_code >> 16); | 460 | regs->svc_code >> 16); |
461 | break; | 461 | break; |
462 | } | 462 | } |
463 | /* No longer in a system call */ | ||
464 | clear_thread_flag(TIF_SYSCALL); | ||
465 | } | 463 | } |
464 | /* No longer in a system call */ | ||
465 | clear_thread_flag(TIF_SYSCALL); | ||
466 | 466 | ||
467 | if ((is_compat_task() ? | 467 | if ((is_compat_task() ? |
468 | handle_signal32(signr, &ka, &info, oldset, regs) : | 468 | handle_signal32(signr, &ka, &info, oldset, regs) : |
@@ -486,6 +486,7 @@ void do_signal(struct pt_regs *regs) | |||
486 | } | 486 | } |
487 | 487 | ||
488 | /* No handlers present - check for system call restart */ | 488 | /* No handlers present - check for system call restart */ |
489 | clear_thread_flag(TIF_SYSCALL); | ||
489 | if (current_thread_info()->system_call) { | 490 | if (current_thread_info()->system_call) { |
490 | regs->svc_code = current_thread_info()->system_call; | 491 | regs->svc_code = current_thread_info()->system_call; |
491 | switch (regs->gprs[2]) { | 492 | switch (regs->gprs[2]) { |
@@ -500,9 +501,6 @@ void do_signal(struct pt_regs *regs) | |||
500 | regs->gprs[2] = regs->orig_gpr2; | 501 | regs->gprs[2] = regs->orig_gpr2; |
501 | set_thread_flag(TIF_SYSCALL); | 502 | set_thread_flag(TIF_SYSCALL); |
502 | break; | 503 | break; |
503 | default: | ||
504 | clear_thread_flag(TIF_SYSCALL); | ||
505 | break; | ||
506 | } | 504 | } |
507 | } | 505 | } |
508 | 506 | ||
diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h index 94e9a511de84..f80f8ceabc67 100644 --- a/arch/tile/include/asm/irq.h +++ b/arch/tile/include/asm/irq.h | |||
@@ -74,16 +74,6 @@ enum { | |||
74 | */ | 74 | */ |
75 | void tile_irq_activate(unsigned int irq, int tile_irq_type); | 75 | void tile_irq_activate(unsigned int irq, int tile_irq_type); |
76 | 76 | ||
77 | /* | ||
78 | * For onboard, non-PCI (e.g. TILE_IRQ_PERCPU) devices, drivers know | ||
79 | * how to use enable/disable_percpu_irq() to manage interrupts on each | ||
80 | * core. We can't use the generic enable/disable_irq() because they | ||
81 | * use a single reference count per irq, rather than per cpu per irq. | ||
82 | */ | ||
83 | void enable_percpu_irq(unsigned int irq); | ||
84 | void disable_percpu_irq(unsigned int irq); | ||
85 | |||
86 | |||
87 | void setup_irq_regs(void); | 77 | void setup_irq_regs(void); |
88 | 78 | ||
89 | #endif /* _ASM_TILE_IRQ_H */ | 79 | #endif /* _ASM_TILE_IRQ_H */ |
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c index aa0134db2dd6..02e628065012 100644 --- a/arch/tile/kernel/irq.c +++ b/arch/tile/kernel/irq.c | |||
@@ -152,14 +152,13 @@ void tile_dev_intr(struct pt_regs *regs, int intnum) | |||
152 | * Remove an irq from the disabled mask. If we're in an interrupt | 152 | * Remove an irq from the disabled mask. If we're in an interrupt |
153 | * context, defer enabling the HW interrupt until we leave. | 153 | * context, defer enabling the HW interrupt until we leave. |
154 | */ | 154 | */ |
155 | void enable_percpu_irq(unsigned int irq) | 155 | static void tile_irq_chip_enable(struct irq_data *d) |
156 | { | 156 | { |
157 | get_cpu_var(irq_disable_mask) &= ~(1UL << irq); | 157 | get_cpu_var(irq_disable_mask) &= ~(1UL << d->irq); |
158 | if (__get_cpu_var(irq_depth) == 0) | 158 | if (__get_cpu_var(irq_depth) == 0) |
159 | unmask_irqs(1UL << irq); | 159 | unmask_irqs(1UL << d->irq); |
160 | put_cpu_var(irq_disable_mask); | 160 | put_cpu_var(irq_disable_mask); |
161 | } | 161 | } |
162 | EXPORT_SYMBOL(enable_percpu_irq); | ||
163 | 162 | ||
164 | /* | 163 | /* |
165 | * Add an irq to the disabled mask. We disable the HW interrupt | 164 | * Add an irq to the disabled mask. We disable the HW interrupt |
@@ -167,13 +166,12 @@ EXPORT_SYMBOL(enable_percpu_irq); | |||
167 | * in an interrupt context, the return path is careful to avoid | 166 | * in an interrupt context, the return path is careful to avoid |
168 | * unmasking a newly disabled interrupt. | 167 | * unmasking a newly disabled interrupt. |
169 | */ | 168 | */ |
170 | void disable_percpu_irq(unsigned int irq) | 169 | static void tile_irq_chip_disable(struct irq_data *d) |
171 | { | 170 | { |
172 | get_cpu_var(irq_disable_mask) |= (1UL << irq); | 171 | get_cpu_var(irq_disable_mask) |= (1UL << d->irq); |
173 | mask_irqs(1UL << irq); | 172 | mask_irqs(1UL << d->irq); |
174 | put_cpu_var(irq_disable_mask); | 173 | put_cpu_var(irq_disable_mask); |
175 | } | 174 | } |
176 | EXPORT_SYMBOL(disable_percpu_irq); | ||
177 | 175 | ||
178 | /* Mask an interrupt. */ | 176 | /* Mask an interrupt. */ |
179 | static void tile_irq_chip_mask(struct irq_data *d) | 177 | static void tile_irq_chip_mask(struct irq_data *d) |
@@ -209,6 +207,8 @@ static void tile_irq_chip_eoi(struct irq_data *d) | |||
209 | 207 | ||
210 | static struct irq_chip tile_irq_chip = { | 208 | static struct irq_chip tile_irq_chip = { |
211 | .name = "tile_irq_chip", | 209 | .name = "tile_irq_chip", |
210 | .irq_enable = tile_irq_chip_enable, | ||
211 | .irq_disable = tile_irq_chip_disable, | ||
212 | .irq_ack = tile_irq_chip_ack, | 212 | .irq_ack = tile_irq_chip_ack, |
213 | .irq_eoi = tile_irq_chip_eoi, | 213 | .irq_eoi = tile_irq_chip_eoi, |
214 | .irq_mask = tile_irq_chip_mask, | 214 | .irq_mask = tile_irq_chip_mask, |
diff --git a/arch/tile/kernel/pci-dma.c b/arch/tile/kernel/pci-dma.c index 658f2ce426a4..b3ed19f8779c 100644 --- a/arch/tile/kernel/pci-dma.c +++ b/arch/tile/kernel/pci-dma.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/mm.h> | 15 | #include <linux/mm.h> |
16 | #include <linux/dma-mapping.h> | 16 | #include <linux/dma-mapping.h> |
17 | #include <linux/vmalloc.h> | 17 | #include <linux/vmalloc.h> |
18 | #include <linux/export.h> | ||
18 | #include <asm/tlbflush.h> | 19 | #include <asm/tlbflush.h> |
19 | #include <asm/homecache.h> | 20 | #include <asm/homecache.h> |
20 | 21 | ||
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index 2a8014cb1ff5..9d610d3fb11e 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | #include <linux/uaccess.h> | 26 | #include <linux/uaccess.h> |
27 | #include <linux/export.h> | ||
27 | 28 | ||
28 | #include <asm/processor.h> | 29 | #include <asm/processor.h> |
29 | #include <asm/sections.h> | 30 | #include <asm/sections.h> |
diff --git a/arch/tile/kernel/sysfs.c b/arch/tile/kernel/sysfs.c index b671a86f4515..602908268093 100644 --- a/arch/tile/kernel/sysfs.c +++ b/arch/tile/kernel/sysfs.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/cpu.h> | 18 | #include <linux/cpu.h> |
19 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
20 | #include <linux/smp.h> | 20 | #include <linux/smp.h> |
21 | #include <linux/stat.h> | ||
21 | #include <hv/hypervisor.h> | 22 | #include <hv/hypervisor.h> |
22 | 23 | ||
23 | /* Return a string queried from the hypervisor, truncated to page size. */ | 24 | /* Return a string queried from the hypervisor, truncated to page size. */ |
diff --git a/arch/tile/lib/exports.c b/arch/tile/lib/exports.c index a87d2a859ba9..2a81d32de0da 100644 --- a/arch/tile/lib/exports.c +++ b/arch/tile/lib/exports.c | |||
@@ -39,6 +39,9 @@ EXPORT_SYMBOL(finv_user_asm); | |||
39 | EXPORT_SYMBOL(current_text_addr); | 39 | EXPORT_SYMBOL(current_text_addr); |
40 | EXPORT_SYMBOL(dump_stack); | 40 | EXPORT_SYMBOL(dump_stack); |
41 | 41 | ||
42 | /* arch/tile/kernel/head.S */ | ||
43 | EXPORT_SYMBOL(empty_zero_page); | ||
44 | |||
42 | /* arch/tile/lib/, various memcpy files */ | 45 | /* arch/tile/lib/, various memcpy files */ |
43 | EXPORT_SYMBOL(memcpy); | 46 | EXPORT_SYMBOL(memcpy); |
44 | EXPORT_SYMBOL(__copy_to_user_inatomic); | 47 | EXPORT_SYMBOL(__copy_to_user_inatomic); |
diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c index cbe6f4f9eca3..1cc6ae477c98 100644 --- a/arch/tile/mm/homecache.c +++ b/arch/tile/mm/homecache.c | |||
@@ -449,9 +449,12 @@ void homecache_free_pages(unsigned long addr, unsigned int order) | |||
449 | VM_BUG_ON(!virt_addr_valid((void *)addr)); | 449 | VM_BUG_ON(!virt_addr_valid((void *)addr)); |
450 | page = virt_to_page((void *)addr); | 450 | page = virt_to_page((void *)addr); |
451 | if (put_page_testzero(page)) { | 451 | if (put_page_testzero(page)) { |
452 | int pages = (1 << order); | ||
453 | homecache_change_page_home(page, order, initial_page_home()); | 452 | homecache_change_page_home(page, order, initial_page_home()); |
454 | while (pages--) | 453 | if (order == 0) { |
455 | __free_page(page++); | 454 | free_hot_cold_page(page, 0); |
455 | } else { | ||
456 | init_page_count(page); | ||
457 | __free_pages(page, order); | ||
458 | } | ||
456 | } | 459 | } |
457 | } | 460 | } |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index cb9a1044a771..efb42949cc09 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -390,7 +390,7 @@ config X86_INTEL_CE | |||
390 | This option compiles in support for the CE4100 SOC for settop | 390 | This option compiles in support for the CE4100 SOC for settop |
391 | boxes and media devices. | 391 | boxes and media devices. |
392 | 392 | ||
393 | config X86_INTEL_MID | 393 | config X86_WANT_INTEL_MID |
394 | bool "Intel MID platform support" | 394 | bool "Intel MID platform support" |
395 | depends on X86_32 | 395 | depends on X86_32 |
396 | depends on X86_EXTENDED_PLATFORM | 396 | depends on X86_EXTENDED_PLATFORM |
@@ -399,7 +399,10 @@ config X86_INTEL_MID | |||
399 | systems which do not have the PCI legacy interfaces (Moorestown, | 399 | systems which do not have the PCI legacy interfaces (Moorestown, |
400 | Medfield). If you are building for a PC class system say N here. | 400 | Medfield). If you are building for a PC class system say N here. |
401 | 401 | ||
402 | if X86_INTEL_MID | 402 | if X86_WANT_INTEL_MID |
403 | |||
404 | config X86_INTEL_MID | ||
405 | bool | ||
403 | 406 | ||
404 | config X86_MRST | 407 | config X86_MRST |
405 | bool "Moorestown MID platform" | 408 | bool "Moorestown MID platform" |
@@ -411,6 +414,7 @@ config X86_MRST | |||
411 | select SPI | 414 | select SPI |
412 | select INTEL_SCU_IPC | 415 | select INTEL_SCU_IPC |
413 | select X86_PLATFORM_DEVICES | 416 | select X86_PLATFORM_DEVICES |
417 | select X86_INTEL_MID | ||
414 | ---help--- | 418 | ---help--- |
415 | Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin | 419 | Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin |
416 | Internet Device(MID) platform. Moorestown consists of two chips: | 420 | Internet Device(MID) platform. Moorestown consists of two chips: |
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h index 908b96957d88..c9547033e38e 100644 --- a/arch/x86/include/asm/e820.h +++ b/arch/x86/include/asm/e820.h | |||
@@ -53,6 +53,13 @@ | |||
53 | */ | 53 | */ |
54 | #define E820_RESERVED_KERN 128 | 54 | #define E820_RESERVED_KERN 128 |
55 | 55 | ||
56 | /* | ||
57 | * Address ranges that need to be mapped by the kernel direct | ||
58 | * mapping. This is used to make sure regions such as | ||
59 | * EFI_RUNTIME_SERVICES_DATA are directly mapped. See setup_arch(). | ||
60 | */ | ||
61 | #define E820_RESERVED_EFI 129 | ||
62 | |||
56 | #ifndef __ASSEMBLY__ | 63 | #ifndef __ASSEMBLY__ |
57 | #include <linux/types.h> | 64 | #include <linux/types.h> |
58 | struct e820entry { | 65 | struct e820entry { |
@@ -115,6 +122,7 @@ static inline void early_memtest(unsigned long start, unsigned long end) | |||
115 | } | 122 | } |
116 | #endif | 123 | #endif |
117 | 124 | ||
125 | extern unsigned long e820_end_pfn(unsigned long limit_pfn, unsigned type); | ||
118 | extern unsigned long e820_end_of_ram_pfn(void); | 126 | extern unsigned long e820_end_of_ram_pfn(void); |
119 | extern unsigned long e820_end_of_low_ram_pfn(void); | 127 | extern unsigned long e820_end_of_low_ram_pfn(void); |
120 | extern u64 early_reserve_e820(u64 startt, u64 sizet, u64 align); | 128 | extern u64 early_reserve_e820(u64 startt, u64 sizet, u64 align); |
diff --git a/arch/x86/include/asm/efi.h b/arch/x86/include/asm/efi.h index 7093e4a6a0bc..b8d8bfcd44a9 100644 --- a/arch/x86/include/asm/efi.h +++ b/arch/x86/include/asm/efi.h | |||
@@ -33,8 +33,6 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...); | |||
33 | #define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \ | 33 | #define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \ |
34 | efi_call_virt(f, a1, a2, a3, a4, a5, a6) | 34 | efi_call_virt(f, a1, a2, a3, a4, a5, a6) |
35 | 35 | ||
36 | #define efi_ioremap(addr, size, type) ioremap_cache(addr, size) | ||
37 | |||
38 | #else /* !CONFIG_X86_32 */ | 36 | #else /* !CONFIG_X86_32 */ |
39 | 37 | ||
40 | extern u64 efi_call0(void *fp); | 38 | extern u64 efi_call0(void *fp); |
@@ -84,9 +82,6 @@ extern u64 efi_call6(void *fp, u64 arg1, u64 arg2, u64 arg3, | |||
84 | efi_call6((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2), \ | 82 | efi_call6((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2), \ |
85 | (u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6)) | 83 | (u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6)) |
86 | 84 | ||
87 | extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size, | ||
88 | u32 type); | ||
89 | |||
90 | #endif /* CONFIG_X86_32 */ | 85 | #endif /* CONFIG_X86_32 */ |
91 | 86 | ||
92 | extern int add_efi_memmap; | 87 | extern int add_efi_memmap; |
diff --git a/arch/x86/include/asm/intel_scu_ipc.h b/arch/x86/include/asm/intel_scu_ipc.h index 4420993acc47..925b605eb5c6 100644 --- a/arch/x86/include/asm/intel_scu_ipc.h +++ b/arch/x86/include/asm/intel_scu_ipc.h | |||
@@ -3,11 +3,15 @@ | |||
3 | 3 | ||
4 | #include <linux/notifier.h> | 4 | #include <linux/notifier.h> |
5 | 5 | ||
6 | #define IPCMSG_VRTC 0xFA /* Set vRTC device */ | 6 | #define IPCMSG_WARM_RESET 0xF0 |
7 | 7 | #define IPCMSG_COLD_RESET 0xF1 | |
8 | /* Command id associated with message IPCMSG_VRTC */ | 8 | #define IPCMSG_SOFT_RESET 0xF2 |
9 | #define IPC_CMD_VRTC_SETTIME 1 /* Set time */ | 9 | #define IPCMSG_COLD_BOOT 0xF3 |
10 | #define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */ | 10 | |
11 | #define IPCMSG_VRTC 0xFA /* Set vRTC device */ | ||
12 | /* Command id associated with message IPCMSG_VRTC */ | ||
13 | #define IPC_CMD_VRTC_SETTIME 1 /* Set time */ | ||
14 | #define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */ | ||
11 | 15 | ||
12 | /* Read single register */ | 16 | /* Read single register */ |
13 | int intel_scu_ipc_ioread8(u16 addr, u8 *data); | 17 | int intel_scu_ipc_ioread8(u16 addr, u8 *data); |
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h index e6283129c821..93f79094c224 100644 --- a/arch/x86/include/asm/mrst.h +++ b/arch/x86/include/asm/mrst.h | |||
@@ -31,11 +31,20 @@ enum mrst_cpu_type { | |||
31 | }; | 31 | }; |
32 | 32 | ||
33 | extern enum mrst_cpu_type __mrst_cpu_chip; | 33 | extern enum mrst_cpu_type __mrst_cpu_chip; |
34 | |||
35 | #ifdef CONFIG_X86_INTEL_MID | ||
36 | |||
34 | static inline enum mrst_cpu_type mrst_identify_cpu(void) | 37 | static inline enum mrst_cpu_type mrst_identify_cpu(void) |
35 | { | 38 | { |
36 | return __mrst_cpu_chip; | 39 | return __mrst_cpu_chip; |
37 | } | 40 | } |
38 | 41 | ||
42 | #else /* !CONFIG_X86_INTEL_MID */ | ||
43 | |||
44 | #define mrst_identify_cpu() (0) | ||
45 | |||
46 | #endif /* !CONFIG_X86_INTEL_MID */ | ||
47 | |||
39 | enum mrst_timer_options { | 48 | enum mrst_timer_options { |
40 | MRST_TIMER_DEFAULT, | 49 | MRST_TIMER_DEFAULT, |
41 | MRST_TIMER_APBT_ONLY, | 50 | MRST_TIMER_APBT_ONLY, |
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 084ef95274cd..95203d40ffdd 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h | |||
@@ -169,7 +169,14 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high) | |||
169 | return native_write_msr_safe(msr, low, high); | 169 | return native_write_msr_safe(msr, low, high); |
170 | } | 170 | } |
171 | 171 | ||
172 | /* rdmsr with exception handling */ | 172 | /* |
173 | * rdmsr with exception handling. | ||
174 | * | ||
175 | * Please note that the exception handling works only after we've | ||
176 | * switched to the "smart" #GP handler in trap_init() which knows about | ||
177 | * exception tables - using this macro earlier than that causes machine | ||
178 | * hangs on boxes which do not implement the @msr in the first argument. | ||
179 | */ | ||
173 | #define rdmsr_safe(msr, p1, p2) \ | 180 | #define rdmsr_safe(msr, p1, p2) \ |
174 | ({ \ | 181 | ({ \ |
175 | int __err; \ | 182 | int __err; \ |
diff --git a/arch/x86/include/asm/system.h b/arch/x86/include/asm/system.h index c2ff2a1d845e..2d2f01ce6dcb 100644 --- a/arch/x86/include/asm/system.h +++ b/arch/x86/include/asm/system.h | |||
@@ -401,6 +401,7 @@ extern unsigned long arch_align_stack(unsigned long sp); | |||
401 | extern void free_init_pages(char *what, unsigned long begin, unsigned long end); | 401 | extern void free_init_pages(char *what, unsigned long begin, unsigned long end); |
402 | 402 | ||
403 | void default_idle(void); | 403 | void default_idle(void); |
404 | bool set_pm_idle_to_default(void); | ||
404 | 405 | ||
405 | void stop_this_cpu(void *dummy); | 406 | void stop_this_cpu(void *dummy); |
406 | 407 | ||
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index fa7b9176b76c..431793e5d484 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h | |||
@@ -32,6 +32,22 @@ extern int no_timer_check; | |||
32 | * (mathieu.desnoyers@polymtl.ca) | 32 | * (mathieu.desnoyers@polymtl.ca) |
33 | * | 33 | * |
34 | * -johnstul@us.ibm.com "math is hard, lets go shopping!" | 34 | * -johnstul@us.ibm.com "math is hard, lets go shopping!" |
35 | * | ||
36 | * In: | ||
37 | * | ||
38 | * ns = cycles * cyc2ns_scale / SC | ||
39 | * | ||
40 | * Although we may still have enough bits to store the value of ns, | ||
41 | * in some cases, we may not have enough bits to store cycles * cyc2ns_scale, | ||
42 | * leading to an incorrect result. | ||
43 | * | ||
44 | * To avoid this, we can decompose 'cycles' into quotient and remainder | ||
45 | * of division by SC. Then, | ||
46 | * | ||
47 | * ns = (quot * SC + rem) * cyc2ns_scale / SC | ||
48 | * = quot * cyc2ns_scale + (rem * cyc2ns_scale) / SC | ||
49 | * | ||
50 | * - sqazi@google.com | ||
35 | */ | 51 | */ |
36 | 52 | ||
37 | DECLARE_PER_CPU(unsigned long, cyc2ns); | 53 | DECLARE_PER_CPU(unsigned long, cyc2ns); |
@@ -41,9 +57,14 @@ DECLARE_PER_CPU(unsigned long long, cyc2ns_offset); | |||
41 | 57 | ||
42 | static inline unsigned long long __cycles_2_ns(unsigned long long cyc) | 58 | static inline unsigned long long __cycles_2_ns(unsigned long long cyc) |
43 | { | 59 | { |
60 | unsigned long long quot; | ||
61 | unsigned long long rem; | ||
44 | int cpu = smp_processor_id(); | 62 | int cpu = smp_processor_id(); |
45 | unsigned long long ns = per_cpu(cyc2ns_offset, cpu); | 63 | unsigned long long ns = per_cpu(cyc2ns_offset, cpu); |
46 | ns += cyc * per_cpu(cyc2ns, cpu) >> CYC2NS_SCALE_FACTOR; | 64 | quot = (cyc >> CYC2NS_SCALE_FACTOR); |
65 | rem = cyc & ((1ULL << CYC2NS_SCALE_FACTOR) - 1); | ||
66 | ns += quot * per_cpu(cyc2ns, cpu) + | ||
67 | ((rem * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR); | ||
47 | return ns; | 68 | return ns; |
48 | } | 69 | } |
49 | 70 | ||
diff --git a/arch/x86/include/asm/uv/uv_mmrs.h b/arch/x86/include/asm/uv/uv_mmrs.h index 10474fb1185d..cf1d73643f60 100644 --- a/arch/x86/include/asm/uv/uv_mmrs.h +++ b/arch/x86/include/asm/uv/uv_mmrs.h | |||
@@ -57,6 +57,7 @@ | |||
57 | 57 | ||
58 | #define UV1_HUB_PART_NUMBER 0x88a5 | 58 | #define UV1_HUB_PART_NUMBER 0x88a5 |
59 | #define UV2_HUB_PART_NUMBER 0x8eb8 | 59 | #define UV2_HUB_PART_NUMBER 0x8eb8 |
60 | #define UV2_HUB_PART_NUMBER_X 0x1111 | ||
60 | 61 | ||
61 | /* Compat: if this #define is present, UV headers support UV2 */ | 62 | /* Compat: if this #define is present, UV headers support UV2 */ |
62 | #define UV2_HUB_IS_SUPPORTED 1 | 63 | #define UV2_HUB_IS_SUPPORTED 1 |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index 62ae3001ae02..9d59bbacd4e3 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -93,6 +93,8 @@ static int __init early_get_pnodeid(void) | |||
93 | 93 | ||
94 | if (node_id.s.part_number == UV2_HUB_PART_NUMBER) | 94 | if (node_id.s.part_number == UV2_HUB_PART_NUMBER) |
95 | uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1; | 95 | uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1; |
96 | if (node_id.s.part_number == UV2_HUB_PART_NUMBER_X) | ||
97 | uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1; | ||
96 | 98 | ||
97 | uv_hub_info->hub_revision = uv_min_hub_revision_id; | 99 | uv_hub_info->hub_revision = uv_min_hub_revision_id; |
98 | pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1); | 100 | pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1); |
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index c7e46cb35327..0bab2b18bb20 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -442,8 +442,6 @@ static void __cpuinit bsp_init_amd(struct cpuinfo_x86 *c) | |||
442 | 442 | ||
443 | static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) | 443 | static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) |
444 | { | 444 | { |
445 | u32 dummy; | ||
446 | |||
447 | early_init_amd_mc(c); | 445 | early_init_amd_mc(c); |
448 | 446 | ||
449 | /* | 447 | /* |
@@ -473,12 +471,12 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) | |||
473 | set_cpu_cap(c, X86_FEATURE_EXTD_APICID); | 471 | set_cpu_cap(c, X86_FEATURE_EXTD_APICID); |
474 | } | 472 | } |
475 | #endif | 473 | #endif |
476 | |||
477 | rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy); | ||
478 | } | 474 | } |
479 | 475 | ||
480 | static void __cpuinit init_amd(struct cpuinfo_x86 *c) | 476 | static void __cpuinit init_amd(struct cpuinfo_x86 *c) |
481 | { | 477 | { |
478 | u32 dummy; | ||
479 | |||
482 | #ifdef CONFIG_SMP | 480 | #ifdef CONFIG_SMP |
483 | unsigned long long value; | 481 | unsigned long long value; |
484 | 482 | ||
@@ -657,6 +655,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
657 | checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask); | 655 | checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask); |
658 | } | 656 | } |
659 | } | 657 | } |
658 | |||
659 | rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy); | ||
660 | } | 660 | } |
661 | 661 | ||
662 | #ifdef CONFIG_X86_32 | 662 | #ifdef CONFIG_X86_32 |
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index a71efcdbb092..97b26356e9ee 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c | |||
@@ -547,6 +547,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base, | |||
547 | 547 | ||
548 | if (tmp != mask_lo) { | 548 | if (tmp != mask_lo) { |
549 | printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n"); | 549 | printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n"); |
550 | add_taint(TAINT_FIRMWARE_WORKAROUND); | ||
550 | mask_lo = tmp; | 551 | mask_lo = tmp; |
551 | } | 552 | } |
552 | } | 553 | } |
@@ -693,6 +694,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock) | |||
693 | 694 | ||
694 | /* Disable MTRRs, and set the default type to uncached */ | 695 | /* Disable MTRRs, and set the default type to uncached */ |
695 | mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi); | 696 | mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi); |
697 | wbinvd(); | ||
696 | } | 698 | } |
697 | 699 | ||
698 | static void post_set(void) __releases(set_atomicity_lock) | 700 | static void post_set(void) __releases(set_atomicity_lock) |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 640891014b2a..2bda212a0010 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
@@ -312,12 +312,8 @@ int x86_setup_perfctr(struct perf_event *event) | |||
312 | return -EOPNOTSUPP; | 312 | return -EOPNOTSUPP; |
313 | } | 313 | } |
314 | 314 | ||
315 | /* | ||
316 | * Do not allow config1 (extended registers) to propagate, | ||
317 | * there's no sane user-space generalization yet: | ||
318 | */ | ||
319 | if (attr->type == PERF_TYPE_RAW) | 315 | if (attr->type == PERF_TYPE_RAW) |
320 | return 0; | 316 | return x86_pmu_extra_regs(event->attr.config, event); |
321 | 317 | ||
322 | if (attr->type == PERF_TYPE_HW_CACHE) | 318 | if (attr->type == PERF_TYPE_HW_CACHE) |
323 | return set_ext_hw_attr(hwc, event); | 319 | return set_ext_hw_attr(hwc, event); |
@@ -588,7 +584,7 @@ done: | |||
588 | x86_pmu.put_event_constraints(cpuc, cpuc->event_list[i]); | 584 | x86_pmu.put_event_constraints(cpuc, cpuc->event_list[i]); |
589 | } | 585 | } |
590 | } | 586 | } |
591 | return num ? -ENOSPC : 0; | 587 | return num ? -EINVAL : 0; |
592 | } | 588 | } |
593 | 589 | ||
594 | /* | 590 | /* |
@@ -607,7 +603,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader, | |||
607 | 603 | ||
608 | if (is_x86_event(leader)) { | 604 | if (is_x86_event(leader)) { |
609 | if (n >= max_count) | 605 | if (n >= max_count) |
610 | return -ENOSPC; | 606 | return -EINVAL; |
611 | cpuc->event_list[n] = leader; | 607 | cpuc->event_list[n] = leader; |
612 | n++; | 608 | n++; |
613 | } | 609 | } |
@@ -620,7 +616,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader, | |||
620 | continue; | 616 | continue; |
621 | 617 | ||
622 | if (n >= max_count) | 618 | if (n >= max_count) |
623 | return -ENOSPC; | 619 | return -EINVAL; |
624 | 620 | ||
625 | cpuc->event_list[n] = event; | 621 | cpuc->event_list[n] = event; |
626 | n++; | 622 | n++; |
@@ -1316,7 +1312,7 @@ static int validate_event(struct perf_event *event) | |||
1316 | c = x86_pmu.get_event_constraints(fake_cpuc, event); | 1312 | c = x86_pmu.get_event_constraints(fake_cpuc, event); |
1317 | 1313 | ||
1318 | if (!c || !c->weight) | 1314 | if (!c || !c->weight) |
1319 | ret = -ENOSPC; | 1315 | ret = -EINVAL; |
1320 | 1316 | ||
1321 | if (x86_pmu.put_event_constraints) | 1317 | if (x86_pmu.put_event_constraints) |
1322 | x86_pmu.put_event_constraints(fake_cpuc, event); | 1318 | x86_pmu.put_event_constraints(fake_cpuc, event); |
@@ -1341,7 +1337,7 @@ static int validate_group(struct perf_event *event) | |||
1341 | { | 1337 | { |
1342 | struct perf_event *leader = event->group_leader; | 1338 | struct perf_event *leader = event->group_leader; |
1343 | struct cpu_hw_events *fake_cpuc; | 1339 | struct cpu_hw_events *fake_cpuc; |
1344 | int ret = -ENOSPC, n; | 1340 | int ret = -EINVAL, n; |
1345 | 1341 | ||
1346 | fake_cpuc = allocate_fake_cpuc(); | 1342 | fake_cpuc = allocate_fake_cpuc(); |
1347 | if (IS_ERR(fake_cpuc)) | 1343 | if (IS_ERR(fake_cpuc)) |
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c index ab6343d21825..3b8a2d30d14e 100644 --- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c +++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c | |||
@@ -199,8 +199,7 @@ static int force_ibs_eilvt_setup(void) | |||
199 | goto out; | 199 | goto out; |
200 | } | 200 | } |
201 | 201 | ||
202 | pr_err(FW_BUG "using offset %d for IBS interrupts\n", offset); | 202 | pr_info("IBS: LVT offset %d assigned\n", offset); |
203 | pr_err(FW_BUG "workaround enabled for IBS LVT offset\n"); | ||
204 | 203 | ||
205 | return 0; | 204 | return 0; |
206 | out: | 205 | out: |
@@ -265,19 +264,23 @@ perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *h | |||
265 | static __init int amd_ibs_init(void) | 264 | static __init int amd_ibs_init(void) |
266 | { | 265 | { |
267 | u32 caps; | 266 | u32 caps; |
268 | int ret; | 267 | int ret = -EINVAL; |
269 | 268 | ||
270 | caps = __get_ibs_caps(); | 269 | caps = __get_ibs_caps(); |
271 | if (!caps) | 270 | if (!caps) |
272 | return -ENODEV; /* ibs not supported by the cpu */ | 271 | return -ENODEV; /* ibs not supported by the cpu */ |
273 | 272 | ||
274 | if (!ibs_eilvt_valid()) { | 273 | /* |
275 | ret = force_ibs_eilvt_setup(); | 274 | * Force LVT offset assignment for family 10h: The offsets are |
276 | if (ret) { | 275 | * not assigned by the BIOS for this family, so the OS is |
277 | pr_err("Failed to setup IBS, %d\n", ret); | 276 | * responsible for doing it. If the OS assignment fails, fall |
278 | return ret; | 277 | * back to BIOS settings and try to setup this. |
279 | } | 278 | */ |
280 | } | 279 | if (boot_cpu_data.x86 == 0x10) |
280 | force_ibs_eilvt_setup(); | ||
281 | |||
282 | if (!ibs_eilvt_valid()) | ||
283 | goto out; | ||
281 | 284 | ||
282 | get_online_cpus(); | 285 | get_online_cpus(); |
283 | ibs_caps = caps; | 286 | ibs_caps = caps; |
@@ -287,7 +290,11 @@ static __init int amd_ibs_init(void) | |||
287 | smp_call_function(setup_APIC_ibs, NULL, 1); | 290 | smp_call_function(setup_APIC_ibs, NULL, 1); |
288 | put_online_cpus(); | 291 | put_online_cpus(); |
289 | 292 | ||
290 | return perf_event_ibs_init(); | 293 | ret = perf_event_ibs_init(); |
294 | out: | ||
295 | if (ret) | ||
296 | pr_err("Failed to setup IBS, %d\n", ret); | ||
297 | return ret; | ||
291 | } | 298 | } |
292 | 299 | ||
293 | /* Since we need the pci subsystem to init ibs we can't do this earlier: */ | 300 | /* Since we need the pci subsystem to init ibs we can't do this earlier: */ |
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 2be5ebe99872..8d601b18bf9f 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c | |||
@@ -1545,6 +1545,13 @@ static void intel_clovertown_quirks(void) | |||
1545 | x86_pmu.pebs_constraints = NULL; | 1545 | x86_pmu.pebs_constraints = NULL; |
1546 | } | 1546 | } |
1547 | 1547 | ||
1548 | static void intel_sandybridge_quirks(void) | ||
1549 | { | ||
1550 | printk(KERN_WARNING "PEBS disabled due to CPU errata.\n"); | ||
1551 | x86_pmu.pebs = 0; | ||
1552 | x86_pmu.pebs_constraints = NULL; | ||
1553 | } | ||
1554 | |||
1548 | __init int intel_pmu_init(void) | 1555 | __init int intel_pmu_init(void) |
1549 | { | 1556 | { |
1550 | union cpuid10_edx edx; | 1557 | union cpuid10_edx edx; |
@@ -1694,6 +1701,7 @@ __init int intel_pmu_init(void) | |||
1694 | break; | 1701 | break; |
1695 | 1702 | ||
1696 | case 42: /* SandyBridge */ | 1703 | case 42: /* SandyBridge */ |
1704 | x86_pmu.quirks = intel_sandybridge_quirks; | ||
1697 | case 45: /* SandyBridge, "Romely-EP" */ | 1705 | case 45: /* SandyBridge, "Romely-EP" */ |
1698 | memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, | 1706 | memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, |
1699 | sizeof(hw_cache_event_ids)); | 1707 | sizeof(hw_cache_event_ids)); |
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index c0d238f49db8..73da6b64f5b7 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c | |||
@@ -493,6 +493,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs) | |||
493 | unsigned long from = cpuc->lbr_entries[0].from; | 493 | unsigned long from = cpuc->lbr_entries[0].from; |
494 | unsigned long old_to, to = cpuc->lbr_entries[0].to; | 494 | unsigned long old_to, to = cpuc->lbr_entries[0].to; |
495 | unsigned long ip = regs->ip; | 495 | unsigned long ip = regs->ip; |
496 | int is_64bit = 0; | ||
496 | 497 | ||
497 | /* | 498 | /* |
498 | * We don't need to fixup if the PEBS assist is fault like | 499 | * We don't need to fixup if the PEBS assist is fault like |
@@ -544,7 +545,10 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs) | |||
544 | } else | 545 | } else |
545 | kaddr = (void *)to; | 546 | kaddr = (void *)to; |
546 | 547 | ||
547 | kernel_insn_init(&insn, kaddr); | 548 | #ifdef CONFIG_X86_64 |
549 | is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32); | ||
550 | #endif | ||
551 | insn_init(&insn, kaddr, is_64bit); | ||
548 | insn_get_length(&insn); | 552 | insn_get_length(&insn); |
549 | to += insn.length; | 553 | to += insn.length; |
550 | } while (to < ip); | 554 | } while (to < ip); |
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index 492bf1358a7c..ef484d9d0a25 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c | |||
@@ -1268,7 +1268,7 @@ reserve: | |||
1268 | } | 1268 | } |
1269 | 1269 | ||
1270 | done: | 1270 | done: |
1271 | return num ? -ENOSPC : 0; | 1271 | return num ? -EINVAL : 0; |
1272 | } | 1272 | } |
1273 | 1273 | ||
1274 | static __initconst const struct x86_pmu p4_pmu = { | 1274 | static __initconst const struct x86_pmu p4_pmu = { |
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index 303a0e48f076..65ffd110a81b 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c | |||
@@ -135,6 +135,7 @@ static void __init e820_print_type(u32 type) | |||
135 | printk(KERN_CONT "(usable)"); | 135 | printk(KERN_CONT "(usable)"); |
136 | break; | 136 | break; |
137 | case E820_RESERVED: | 137 | case E820_RESERVED: |
138 | case E820_RESERVED_EFI: | ||
138 | printk(KERN_CONT "(reserved)"); | 139 | printk(KERN_CONT "(reserved)"); |
139 | break; | 140 | break; |
140 | case E820_ACPI: | 141 | case E820_ACPI: |
@@ -783,7 +784,7 @@ u64 __init early_reserve_e820(u64 startt, u64 sizet, u64 align) | |||
783 | /* | 784 | /* |
784 | * Find the highest page frame number we have available | 785 | * Find the highest page frame number we have available |
785 | */ | 786 | */ |
786 | static unsigned long __init e820_end_pfn(unsigned long limit_pfn, unsigned type) | 787 | unsigned long __init e820_end_pfn(unsigned long limit_pfn, unsigned type) |
787 | { | 788 | { |
788 | int i; | 789 | int i; |
789 | unsigned long last_pfn = 0; | 790 | unsigned long last_pfn = 0; |
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index b946a9eac7d9..1bb0bf4d92cd 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c | |||
@@ -1049,6 +1049,14 @@ int hpet_rtc_timer_init(void) | |||
1049 | } | 1049 | } |
1050 | EXPORT_SYMBOL_GPL(hpet_rtc_timer_init); | 1050 | EXPORT_SYMBOL_GPL(hpet_rtc_timer_init); |
1051 | 1051 | ||
1052 | static void hpet_disable_rtc_channel(void) | ||
1053 | { | ||
1054 | unsigned long cfg; | ||
1055 | cfg = hpet_readl(HPET_T1_CFG); | ||
1056 | cfg &= ~HPET_TN_ENABLE; | ||
1057 | hpet_writel(cfg, HPET_T1_CFG); | ||
1058 | } | ||
1059 | |||
1052 | /* | 1060 | /* |
1053 | * The functions below are called from rtc driver. | 1061 | * The functions below are called from rtc driver. |
1054 | * Return 0 if HPET is not being used. | 1062 | * Return 0 if HPET is not being used. |
@@ -1060,6 +1068,9 @@ int hpet_mask_rtc_irq_bit(unsigned long bit_mask) | |||
1060 | return 0; | 1068 | return 0; |
1061 | 1069 | ||
1062 | hpet_rtc_flags &= ~bit_mask; | 1070 | hpet_rtc_flags &= ~bit_mask; |
1071 | if (unlikely(!hpet_rtc_flags)) | ||
1072 | hpet_disable_rtc_channel(); | ||
1073 | |||
1063 | return 1; | 1074 | return 1; |
1064 | } | 1075 | } |
1065 | EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit); | 1076 | EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit); |
@@ -1125,15 +1136,11 @@ EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq); | |||
1125 | 1136 | ||
1126 | static void hpet_rtc_timer_reinit(void) | 1137 | static void hpet_rtc_timer_reinit(void) |
1127 | { | 1138 | { |
1128 | unsigned int cfg, delta; | 1139 | unsigned int delta; |
1129 | int lost_ints = -1; | 1140 | int lost_ints = -1; |
1130 | 1141 | ||
1131 | if (unlikely(!hpet_rtc_flags)) { | 1142 | if (unlikely(!hpet_rtc_flags)) |
1132 | cfg = hpet_readl(HPET_T1_CFG); | 1143 | hpet_disable_rtc_channel(); |
1133 | cfg &= ~HPET_TN_ENABLE; | ||
1134 | hpet_writel(cfg, HPET_T1_CFG); | ||
1135 | return; | ||
1136 | } | ||
1137 | 1144 | ||
1138 | if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit) | 1145 | if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit) |
1139 | delta = hpet_default_delta; | 1146 | delta = hpet_default_delta; |
diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c index acf8fbf8fbda..69bca468c47a 100644 --- a/arch/x86/kernel/irq_64.c +++ b/arch/x86/kernel/irq_64.c | |||
@@ -38,6 +38,9 @@ static inline void stack_overflow_check(struct pt_regs *regs) | |||
38 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | 38 | #ifdef CONFIG_DEBUG_STACKOVERFLOW |
39 | u64 curbase = (u64)task_stack_page(current); | 39 | u64 curbase = (u64)task_stack_page(current); |
40 | 40 | ||
41 | if (user_mode_vm(regs)) | ||
42 | return; | ||
43 | |||
41 | WARN_ONCE(regs->sp >= curbase && | 44 | WARN_ONCE(regs->sp >= curbase && |
42 | regs->sp <= curbase + THREAD_SIZE && | 45 | regs->sp <= curbase + THREAD_SIZE && |
43 | regs->sp < curbase + sizeof(struct thread_info) + | 46 | regs->sp < curbase + sizeof(struct thread_info) + |
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c index f2d2a664e797..9d46f5e43b51 100644 --- a/arch/x86/kernel/microcode_core.c +++ b/arch/x86/kernel/microcode_core.c | |||
@@ -256,7 +256,7 @@ static int __init microcode_dev_init(void) | |||
256 | return 0; | 256 | return 0; |
257 | } | 257 | } |
258 | 258 | ||
259 | static void microcode_dev_exit(void) | 259 | static void __exit microcode_dev_exit(void) |
260 | { | 260 | { |
261 | misc_deregister(µcode_dev); | 261 | misc_deregister(µcode_dev); |
262 | } | 262 | } |
@@ -519,10 +519,8 @@ static int __init microcode_init(void) | |||
519 | 519 | ||
520 | microcode_pdev = platform_device_register_simple("microcode", -1, | 520 | microcode_pdev = platform_device_register_simple("microcode", -1, |
521 | NULL, 0); | 521 | NULL, 0); |
522 | if (IS_ERR(microcode_pdev)) { | 522 | if (IS_ERR(microcode_pdev)) |
523 | microcode_dev_exit(); | ||
524 | return PTR_ERR(microcode_pdev); | 523 | return PTR_ERR(microcode_pdev); |
525 | } | ||
526 | 524 | ||
527 | get_online_cpus(); | 525 | get_online_cpus(); |
528 | mutex_lock(µcode_mutex); | 526 | mutex_lock(µcode_mutex); |
@@ -532,14 +530,12 @@ static int __init microcode_init(void) | |||
532 | mutex_unlock(µcode_mutex); | 530 | mutex_unlock(µcode_mutex); |
533 | put_online_cpus(); | 531 | put_online_cpus(); |
534 | 532 | ||
535 | if (error) { | 533 | if (error) |
536 | platform_device_unregister(microcode_pdev); | 534 | goto out_pdev; |
537 | return error; | ||
538 | } | ||
539 | 535 | ||
540 | error = microcode_dev_init(); | 536 | error = microcode_dev_init(); |
541 | if (error) | 537 | if (error) |
542 | return error; | 538 | goto out_sysdev_driver; |
543 | 539 | ||
544 | register_syscore_ops(&mc_syscore_ops); | 540 | register_syscore_ops(&mc_syscore_ops); |
545 | register_hotcpu_notifier(&mc_cpu_notifier); | 541 | register_hotcpu_notifier(&mc_cpu_notifier); |
@@ -548,6 +544,20 @@ static int __init microcode_init(void) | |||
548 | " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n"); | 544 | " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n"); |
549 | 545 | ||
550 | return 0; | 546 | return 0; |
547 | |||
548 | out_sysdev_driver: | ||
549 | get_online_cpus(); | ||
550 | mutex_lock(µcode_mutex); | ||
551 | |||
552 | sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); | ||
553 | |||
554 | mutex_unlock(µcode_mutex); | ||
555 | put_online_cpus(); | ||
556 | |||
557 | out_pdev: | ||
558 | platform_device_unregister(microcode_pdev); | ||
559 | return error; | ||
560 | |||
551 | } | 561 | } |
552 | module_init(microcode_init); | 562 | module_init(microcode_init); |
553 | 563 | ||
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index 9103b89c145a..0741b062a304 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c | |||
@@ -95,8 +95,8 @@ static void __init MP_bus_info(struct mpc_bus *m) | |||
95 | } | 95 | } |
96 | #endif | 96 | #endif |
97 | 97 | ||
98 | set_bit(m->busid, mp_bus_not_pci); | ||
98 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { | 99 | if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) { |
99 | set_bit(m->busid, mp_bus_not_pci); | ||
100 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) | 100 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
101 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; | 101 | mp_bus_id_to_type[m->busid] = MP_BUS_ISA; |
102 | #endif | 102 | #endif |
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index b9b3b1a51643..ee5d4fbd53b4 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -403,6 +403,14 @@ void default_idle(void) | |||
403 | EXPORT_SYMBOL(default_idle); | 403 | EXPORT_SYMBOL(default_idle); |
404 | #endif | 404 | #endif |
405 | 405 | ||
406 | bool set_pm_idle_to_default(void) | ||
407 | { | ||
408 | bool ret = !!pm_idle; | ||
409 | |||
410 | pm_idle = default_idle; | ||
411 | |||
412 | return ret; | ||
413 | } | ||
406 | void stop_this_cpu(void *dummy) | 414 | void stop_this_cpu(void *dummy) |
407 | { | 415 | { |
408 | local_irq_disable(); | 416 | local_irq_disable(); |
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index b78643d0f9a5..03920a15a632 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c | |||
@@ -553,4 +553,17 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC, | |||
553 | quirk_amd_nb_node); | 553 | quirk_amd_nb_node); |
554 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK, | 554 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK, |
555 | quirk_amd_nb_node); | 555 | quirk_amd_nb_node); |
556 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F0, | ||
557 | quirk_amd_nb_node); | ||
558 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F1, | ||
559 | quirk_amd_nb_node); | ||
560 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F2, | ||
561 | quirk_amd_nb_node); | ||
562 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3, | ||
563 | quirk_amd_nb_node); | ||
564 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4, | ||
565 | quirk_amd_nb_node); | ||
566 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F5, | ||
567 | quirk_amd_nb_node); | ||
568 | |||
556 | #endif | 569 | #endif |
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index e334be1182b9..37a458b521a6 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -124,7 +124,7 @@ __setup("reboot=", reboot_setup); | |||
124 | */ | 124 | */ |
125 | 125 | ||
126 | /* | 126 | /* |
127 | * Some machines require the "reboot=b" commandline option, | 127 | * Some machines require the "reboot=b" or "reboot=k" commandline options, |
128 | * this quirk makes that automatic. | 128 | * this quirk makes that automatic. |
129 | */ | 129 | */ |
130 | static int __init set_bios_reboot(const struct dmi_system_id *d) | 130 | static int __init set_bios_reboot(const struct dmi_system_id *d) |
@@ -136,6 +136,15 @@ static int __init set_bios_reboot(const struct dmi_system_id *d) | |||
136 | return 0; | 136 | return 0; |
137 | } | 137 | } |
138 | 138 | ||
139 | static int __init set_kbd_reboot(const struct dmi_system_id *d) | ||
140 | { | ||
141 | if (reboot_type != BOOT_KBD) { | ||
142 | reboot_type = BOOT_KBD; | ||
143 | printk(KERN_INFO "%s series board detected. Selecting KBD-method for reboot.\n", d->ident); | ||
144 | } | ||
145 | return 0; | ||
146 | } | ||
147 | |||
139 | static struct dmi_system_id __initdata reboot_dmi_table[] = { | 148 | static struct dmi_system_id __initdata reboot_dmi_table[] = { |
140 | { /* Handle problems with rebooting on Dell E520's */ | 149 | { /* Handle problems with rebooting on Dell E520's */ |
141 | .callback = set_bios_reboot, | 150 | .callback = set_bios_reboot, |
@@ -295,7 +304,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { | |||
295 | }, | 304 | }, |
296 | }, | 305 | }, |
297 | { /* Handle reboot issue on Acer Aspire one */ | 306 | { /* Handle reboot issue on Acer Aspire one */ |
298 | .callback = set_bios_reboot, | 307 | .callback = set_kbd_reboot, |
299 | .ident = "Acer Aspire One A110", | 308 | .ident = "Acer Aspire One A110", |
300 | .matches = { | 309 | .matches = { |
301 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | 310 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), |
@@ -443,6 +452,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { | |||
443 | DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"), | 452 | DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"), |
444 | }, | 453 | }, |
445 | }, | 454 | }, |
455 | { /* Handle problems with rebooting on the OptiPlex 990. */ | ||
456 | .callback = set_pci_reboot, | ||
457 | .ident = "Dell OptiPlex 990", | ||
458 | .matches = { | ||
459 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | ||
460 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"), | ||
461 | }, | ||
462 | }, | ||
446 | { } | 463 | { } |
447 | }; | 464 | }; |
448 | 465 | ||
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c index 348ce016a835..af6db6ec5b2a 100644 --- a/arch/x86/kernel/rtc.c +++ b/arch/x86/kernel/rtc.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <asm/vsyscall.h> | 12 | #include <asm/vsyscall.h> |
13 | #include <asm/x86_init.h> | 13 | #include <asm/x86_init.h> |
14 | #include <asm/time.h> | 14 | #include <asm/time.h> |
15 | #include <asm/mrst.h> | ||
15 | 16 | ||
16 | #ifdef CONFIG_X86_32 | 17 | #ifdef CONFIG_X86_32 |
17 | /* | 18 | /* |
@@ -242,6 +243,10 @@ static __init int add_rtc_cmos(void) | |||
242 | if (of_have_populated_dt()) | 243 | if (of_have_populated_dt()) |
243 | return 0; | 244 | return 0; |
244 | 245 | ||
246 | /* Intel MID platforms don't have ioport rtc */ | ||
247 | if (mrst_identify_cpu()) | ||
248 | return -ENODEV; | ||
249 | |||
245 | platform_device_register(&rtc_device); | 250 | platform_device_register(&rtc_device); |
246 | dev_info(&rtc_device.dev, | 251 | dev_info(&rtc_device.dev, |
247 | "registered platform RTC device (no PNP device found)\n"); | 252 | "registered platform RTC device (no PNP device found)\n"); |
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index cf0ef986cb6d..9a9e40fb091c 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
@@ -691,6 +691,8 @@ early_param("reservelow", parse_reservelow); | |||
691 | 691 | ||
692 | void __init setup_arch(char **cmdline_p) | 692 | void __init setup_arch(char **cmdline_p) |
693 | { | 693 | { |
694 | unsigned long end_pfn; | ||
695 | |||
694 | #ifdef CONFIG_X86_32 | 696 | #ifdef CONFIG_X86_32 |
695 | memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data)); | 697 | memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data)); |
696 | visws_early_detect(); | 698 | visws_early_detect(); |
@@ -932,7 +934,24 @@ void __init setup_arch(char **cmdline_p) | |||
932 | init_gbpages(); | 934 | init_gbpages(); |
933 | 935 | ||
934 | /* max_pfn_mapped is updated here */ | 936 | /* max_pfn_mapped is updated here */ |
935 | max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT); | 937 | end_pfn = max_low_pfn; |
938 | |||
939 | #ifdef CONFIG_X86_64 | ||
940 | /* | ||
941 | * There may be regions after the last E820_RAM region that we | ||
942 | * want to include in the kernel direct mapping, such as | ||
943 | * EFI_RUNTIME_SERVICES_DATA. | ||
944 | */ | ||
945 | if (efi_enabled) { | ||
946 | unsigned long efi_end; | ||
947 | |||
948 | efi_end = e820_end_pfn(MAXMEM>>PAGE_SHIFT, E820_RESERVED_EFI); | ||
949 | if (efi_end > max_low_pfn) | ||
950 | end_pfn = efi_end; | ||
951 | } | ||
952 | #endif | ||
953 | |||
954 | max_low_pfn_mapped = init_memory_mapping(0, end_pfn << PAGE_SHIFT); | ||
936 | max_pfn_mapped = max_low_pfn_mapped; | 955 | max_pfn_mapped = max_low_pfn_mapped; |
937 | 956 | ||
938 | #ifdef CONFIG_X86_64 | 957 | #ifdef CONFIG_X86_64 |
diff --git a/arch/x86/mm/gup.c b/arch/x86/mm/gup.c index ea305856151c..dd74e46828c0 100644 --- a/arch/x86/mm/gup.c +++ b/arch/x86/mm/gup.c | |||
@@ -201,6 +201,8 @@ static noinline int gup_huge_pud(pud_t pud, unsigned long addr, | |||
201 | do { | 201 | do { |
202 | VM_BUG_ON(compound_head(page) != head); | 202 | VM_BUG_ON(compound_head(page) != head); |
203 | pages[*nr] = page; | 203 | pages[*nr] = page; |
204 | if (PageTail(page)) | ||
205 | get_huge_page_tail(page); | ||
204 | (*nr)++; | 206 | (*nr)++; |
205 | page++; | 207 | page++; |
206 | refs++; | 208 | refs++; |
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c index b49962662101..f4f29b19fac5 100644 --- a/arch/x86/mm/highmem_32.c +++ b/arch/x86/mm/highmem_32.c | |||
@@ -45,6 +45,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot) | |||
45 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); | 45 | vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); |
46 | BUG_ON(!pte_none(*(kmap_pte-idx))); | 46 | BUG_ON(!pte_none(*(kmap_pte-idx))); |
47 | set_pte(kmap_pte-idx, mk_pte(page, prot)); | 47 | set_pte(kmap_pte-idx, mk_pte(page, prot)); |
48 | arch_flush_lazy_mmu_mode(); | ||
48 | 49 | ||
49 | return (void *)vaddr; | 50 | return (void *)vaddr; |
50 | } | 51 | } |
@@ -88,6 +89,7 @@ void __kunmap_atomic(void *kvaddr) | |||
88 | */ | 89 | */ |
89 | kpte_clear_flush(kmap_pte-idx, vaddr); | 90 | kpte_clear_flush(kmap_pte-idx, vaddr); |
90 | kmap_atomic_idx_pop(); | 91 | kmap_atomic_idx_pop(); |
92 | arch_flush_lazy_mmu_mode(); | ||
91 | } | 93 | } |
92 | #ifdef CONFIG_DEBUG_HIGHMEM | 94 | #ifdef CONFIG_DEBUG_HIGHMEM |
93 | else { | 95 | else { |
diff --git a/arch/x86/oprofile/init.c b/arch/x86/oprofile/init.c index cdfe4c54deca..f148cf652678 100644 --- a/arch/x86/oprofile/init.c +++ b/arch/x86/oprofile/init.c | |||
@@ -21,6 +21,7 @@ extern int op_nmi_timer_init(struct oprofile_operations *ops); | |||
21 | extern void op_nmi_exit(void); | 21 | extern void op_nmi_exit(void); |
22 | extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth); | 22 | extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth); |
23 | 23 | ||
24 | static int nmi_timer; | ||
24 | 25 | ||
25 | int __init oprofile_arch_init(struct oprofile_operations *ops) | 26 | int __init oprofile_arch_init(struct oprofile_operations *ops) |
26 | { | 27 | { |
@@ -31,8 +32,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
31 | #ifdef CONFIG_X86_LOCAL_APIC | 32 | #ifdef CONFIG_X86_LOCAL_APIC |
32 | ret = op_nmi_init(ops); | 33 | ret = op_nmi_init(ops); |
33 | #endif | 34 | #endif |
35 | nmi_timer = (ret != 0); | ||
34 | #ifdef CONFIG_X86_IO_APIC | 36 | #ifdef CONFIG_X86_IO_APIC |
35 | if (ret < 0) | 37 | if (nmi_timer) |
36 | ret = op_nmi_timer_init(ops); | 38 | ret = op_nmi_timer_init(ops); |
37 | #endif | 39 | #endif |
38 | ops->backtrace = x86_backtrace; | 40 | ops->backtrace = x86_backtrace; |
@@ -44,6 +46,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) | |||
44 | void oprofile_arch_exit(void) | 46 | void oprofile_arch_exit(void) |
45 | { | 47 | { |
46 | #ifdef CONFIG_X86_LOCAL_APIC | 48 | #ifdef CONFIG_X86_LOCAL_APIC |
47 | op_nmi_exit(); | 49 | if (!nmi_timer) |
50 | op_nmi_exit(); | ||
48 | #endif | 51 | #endif |
49 | } | 52 | } |
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c index 37718f0f053d..c9718a16be15 100644 --- a/arch/x86/platform/efi/efi.c +++ b/arch/x86/platform/efi/efi.c | |||
@@ -323,10 +323,13 @@ static void __init do_add_efi_memmap(void) | |||
323 | case EFI_UNUSABLE_MEMORY: | 323 | case EFI_UNUSABLE_MEMORY: |
324 | e820_type = E820_UNUSABLE; | 324 | e820_type = E820_UNUSABLE; |
325 | break; | 325 | break; |
326 | case EFI_RUNTIME_SERVICES_DATA: | ||
327 | e820_type = E820_RESERVED_EFI; | ||
328 | break; | ||
326 | default: | 329 | default: |
327 | /* | 330 | /* |
328 | * EFI_RESERVED_TYPE EFI_RUNTIME_SERVICES_CODE | 331 | * EFI_RESERVED_TYPE EFI_RUNTIME_SERVICES_CODE |
329 | * EFI_RUNTIME_SERVICES_DATA EFI_MEMORY_MAPPED_IO | 332 | * EFI_MEMORY_MAPPED_IO |
330 | * EFI_MEMORY_MAPPED_IO_PORT_SPACE EFI_PAL_CODE | 333 | * EFI_MEMORY_MAPPED_IO_PORT_SPACE EFI_PAL_CODE |
331 | */ | 334 | */ |
332 | e820_type = E820_RESERVED; | 335 | e820_type = E820_RESERVED; |
@@ -671,10 +674,21 @@ void __init efi_enter_virtual_mode(void) | |||
671 | end_pfn = PFN_UP(end); | 674 | end_pfn = PFN_UP(end); |
672 | if (end_pfn <= max_low_pfn_mapped | 675 | if (end_pfn <= max_low_pfn_mapped |
673 | || (end_pfn > (1UL << (32 - PAGE_SHIFT)) | 676 | || (end_pfn > (1UL << (32 - PAGE_SHIFT)) |
674 | && end_pfn <= max_pfn_mapped)) | 677 | && end_pfn <= max_pfn_mapped)) { |
675 | va = __va(md->phys_addr); | 678 | va = __va(md->phys_addr); |
676 | else | 679 | |
677 | va = efi_ioremap(md->phys_addr, size, md->type); | 680 | if (!(md->attribute & EFI_MEMORY_WB)) { |
681 | addr = (u64) (unsigned long)va; | ||
682 | npages = md->num_pages; | ||
683 | memrange_efi_to_native(&addr, &npages); | ||
684 | set_memory_uc(addr, npages); | ||
685 | } | ||
686 | } else { | ||
687 | if (!(md->attribute & EFI_MEMORY_WB)) | ||
688 | va = ioremap_nocache(md->phys_addr, size); | ||
689 | else | ||
690 | va = ioremap_cache(md->phys_addr, size); | ||
691 | } | ||
678 | 692 | ||
679 | md->virt_addr = (u64) (unsigned long) va; | 693 | md->virt_addr = (u64) (unsigned long) va; |
680 | 694 | ||
@@ -684,13 +698,6 @@ void __init efi_enter_virtual_mode(void) | |||
684 | continue; | 698 | continue; |
685 | } | 699 | } |
686 | 700 | ||
687 | if (!(md->attribute & EFI_MEMORY_WB)) { | ||
688 | addr = md->virt_addr; | ||
689 | npages = md->num_pages; | ||
690 | memrange_efi_to_native(&addr, &npages); | ||
691 | set_memory_uc(addr, npages); | ||
692 | } | ||
693 | |||
694 | systab = (u64) (unsigned long) efi_phys.systab; | 701 | systab = (u64) (unsigned long) efi_phys.systab; |
695 | if (md->phys_addr <= systab && systab < end) { | 702 | if (md->phys_addr <= systab && systab < end) { |
696 | systab += md->virt_addr - md->phys_addr; | 703 | systab += md->virt_addr - md->phys_addr; |
diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c index ac3aa54e2654..312250c6b2de 100644 --- a/arch/x86/platform/efi/efi_64.c +++ b/arch/x86/platform/efi/efi_64.c | |||
@@ -80,20 +80,3 @@ void __init efi_call_phys_epilog(void) | |||
80 | local_irq_restore(efi_flags); | 80 | local_irq_restore(efi_flags); |
81 | early_code_mapping_set_exec(0); | 81 | early_code_mapping_set_exec(0); |
82 | } | 82 | } |
83 | |||
84 | void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size, | ||
85 | u32 type) | ||
86 | { | ||
87 | unsigned long last_map_pfn; | ||
88 | |||
89 | if (type == EFI_MEMORY_MAPPED_IO) | ||
90 | return ioremap(phys_addr, size); | ||
91 | |||
92 | last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size); | ||
93 | if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size) { | ||
94 | unsigned long top = last_map_pfn << PAGE_SHIFT; | ||
95 | efi_ioremap(top, size - (top - phys_addr), type); | ||
96 | } | ||
97 | |||
98 | return (void __iomem *)__va(phys_addr); | ||
99 | } | ||
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c index b1489a06a49d..ad4ec1cb097e 100644 --- a/arch/x86/platform/mrst/mrst.c +++ b/arch/x86/platform/mrst/mrst.c | |||
@@ -76,6 +76,20 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX]; | |||
76 | EXPORT_SYMBOL_GPL(sfi_mrtc_array); | 76 | EXPORT_SYMBOL_GPL(sfi_mrtc_array); |
77 | int sfi_mrtc_num; | 77 | int sfi_mrtc_num; |
78 | 78 | ||
79 | static void mrst_power_off(void) | ||
80 | { | ||
81 | if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) | ||
82 | intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 1); | ||
83 | } | ||
84 | |||
85 | static void mrst_reboot(void) | ||
86 | { | ||
87 | if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) | ||
88 | intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0); | ||
89 | else | ||
90 | intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0); | ||
91 | } | ||
92 | |||
79 | /* parse all the mtimer info to a static mtimer array */ | 93 | /* parse all the mtimer info to a static mtimer array */ |
80 | static int __init sfi_parse_mtmr(struct sfi_table_header *table) | 94 | static int __init sfi_parse_mtmr(struct sfi_table_header *table) |
81 | { | 95 | { |
@@ -265,17 +279,6 @@ static int mrst_i8042_detect(void) | |||
265 | return 0; | 279 | return 0; |
266 | } | 280 | } |
267 | 281 | ||
268 | /* Reboot and power off are handled by the SCU on a MID device */ | ||
269 | static void mrst_power_off(void) | ||
270 | { | ||
271 | intel_scu_ipc_simple_command(0xf1, 1); | ||
272 | } | ||
273 | |||
274 | static void mrst_reboot(void) | ||
275 | { | ||
276 | intel_scu_ipc_simple_command(0xf1, 0); | ||
277 | } | ||
278 | |||
279 | /* | 282 | /* |
280 | * Moorestown does not have external NMI source nor port 0x61 to report | 283 | * Moorestown does not have external NMI source nor port 0x61 to report |
281 | * NMI status. The possible NMI sources are from pmu as a result of NMI | 284 | * NMI status. The possible NMI sources are from pmu as a result of NMI |
@@ -484,6 +487,46 @@ static void __init *max7315_platform_data(void *info) | |||
484 | return max7315; | 487 | return max7315; |
485 | } | 488 | } |
486 | 489 | ||
490 | static void *tca6416_platform_data(void *info) | ||
491 | { | ||
492 | static struct pca953x_platform_data tca6416; | ||
493 | struct i2c_board_info *i2c_info = info; | ||
494 | int gpio_base, intr; | ||
495 | char base_pin_name[SFI_NAME_LEN + 1]; | ||
496 | char intr_pin_name[SFI_NAME_LEN + 1]; | ||
497 | |||
498 | strcpy(i2c_info->type, "tca6416"); | ||
499 | strcpy(base_pin_name, "tca6416_base"); | ||
500 | strcpy(intr_pin_name, "tca6416_int"); | ||
501 | |||
502 | gpio_base = get_gpio_by_name(base_pin_name); | ||
503 | intr = get_gpio_by_name(intr_pin_name); | ||
504 | |||
505 | if (gpio_base == -1) | ||
506 | return NULL; | ||
507 | tca6416.gpio_base = gpio_base; | ||
508 | if (intr != -1) { | ||
509 | i2c_info->irq = intr + MRST_IRQ_OFFSET; | ||
510 | tca6416.irq_base = gpio_base + MRST_IRQ_OFFSET; | ||
511 | } else { | ||
512 | i2c_info->irq = -1; | ||
513 | tca6416.irq_base = -1; | ||
514 | } | ||
515 | return &tca6416; | ||
516 | } | ||
517 | |||
518 | static void *mpu3050_platform_data(void *info) | ||
519 | { | ||
520 | struct i2c_board_info *i2c_info = info; | ||
521 | int intr = get_gpio_by_name("mpu3050_int"); | ||
522 | |||
523 | if (intr == -1) | ||
524 | return NULL; | ||
525 | |||
526 | i2c_info->irq = intr + MRST_IRQ_OFFSET; | ||
527 | return NULL; | ||
528 | } | ||
529 | |||
487 | static void __init *emc1403_platform_data(void *info) | 530 | static void __init *emc1403_platform_data(void *info) |
488 | { | 531 | { |
489 | static short intr2nd_pdata; | 532 | static short intr2nd_pdata; |
@@ -646,12 +689,15 @@ static void *msic_ocd_platform_data(void *info) | |||
646 | static const struct devs_id __initconst device_ids[] = { | 689 | static const struct devs_id __initconst device_ids[] = { |
647 | {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data}, | 690 | {"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data}, |
648 | {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data}, | 691 | {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data}, |
692 | {"pmic_gpio", SFI_DEV_TYPE_IPC, 1, &pmic_gpio_platform_data}, | ||
649 | {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data}, | 693 | {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data}, |
650 | {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, | 694 | {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, |
651 | {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, | 695 | {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, |
696 | {"tca6416", SFI_DEV_TYPE_I2C, 1, &tca6416_platform_data}, | ||
652 | {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data}, | 697 | {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data}, |
653 | {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data}, | 698 | {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data}, |
654 | {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data}, | 699 | {"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data}, |
700 | {"mpu3050", SFI_DEV_TYPE_I2C, 1, &mpu3050_platform_data}, | ||
655 | 701 | ||
656 | /* MSIC subdevices */ | 702 | /* MSIC subdevices */ |
657 | {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data}, | 703 | {"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data}, |
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index 38d0af4fefec..1093f80c162d 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c | |||
@@ -410,6 +410,6 @@ void __init xen_arch_setup(void) | |||
410 | #endif | 410 | #endif |
411 | disable_cpuidle(); | 411 | disable_cpuidle(); |
412 | boot_option_idle_override = IDLE_HALT; | 412 | boot_option_idle_override = IDLE_HALT; |
413 | 413 | WARN_ON(set_pm_idle_to_default()); | |
414 | fiddle_vdso(); | 414 | fiddle_vdso(); |
415 | } | 415 | } |