67 files changed, 506 insertions, 579 deletions
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index f3cae275d3f5..8c723c1b086a 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus)
 void __devinit
 pcibios_fixup_bus(struct pci_bus *bus)
 {
-        /* Propagate hose info into the subordinate devices.  */
-        struct pci_controller *hose = bus->sysdata;
        struct pci_dev *dev = bus->self;
-        if (!dev) {
+        if (pci_probe_only && dev &&
-                /* Root bus. */
-                u32 pci_mem_end;
-                u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
-                unsigned long end;
-                bus->resource[0] = hose->io_space;
-                bus->resource[1] = hose->mem_space;
-                /* Adjust hose mem_space limit to prevent PCI allocations
-                   in the iommu windows. */
-                pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
-                end = hose->mem_space->start + pci_mem_end;
-                if (hose->mem_space->end > end)
-                        hose->mem_space->end = end;
-        } else if (pci_probe_only &&
                   (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
                pci_read_bridge_bases(bus);
                pcibios_fixup_device_resources(dev, bus);
@@ -414,13 +396,31 @@ void __init
 common_init_pci(void)
 {
        struct pci_controller *hose;
+        struct list_head resources;
        struct pci_bus *bus;
        int next_busno;
        int need_domain_info = 0;
+        u32 pci_mem_end;
+        u32 sg_base;
+        unsigned long end;
        /* Scan all of the recorded PCI controllers.  */
        for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
-                bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose);
+                sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;
+                /* Adjust hose mem_space limit to prevent PCI allocations
+                   in the iommu windows. */
+                pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;
+                end = hose->mem_space->start + pci_mem_end;
+                if (hose->mem_space->end > end)
+                        hose->mem_space->end = end;
+                INIT_LIST_HEAD(&resources);
+                pci_add_resource(&resources, hose->io_space);
+                pci_add_resource(&resources, hose->mem_space);
+                bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
+                                        hose, &resources);
                hose->bus = bus;
                hose->need_domain_info = need_domain_info;
                next_busno = bus->subordinate + 1;
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index b539ec855e1a..d1bcd7b13ebc 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
                goto err1;
        }
-        sys->resource[0] = &it8152_io;
+        pci_add_resource(&sys->resources, &it8152_io);
-        sys->resource[1] = &it8152_mem;
+        pci_add_resource(&sys->resources, &it8152_mem);
        if (platform_notify || platform_notify_remove) {
                printk(KERN_ERR "PCI: Can't use platform_notify\n");
@@ -327,6 +327,9 @@ err0:
 */
 unsigned int pcibios_max_latency = 255;
+/* ITE bridge requires setting latency timer to avoid early bus access
+   termination by PCI bus master devices
+*/
 void pcibios_set_master(struct pci_dev *dev)
 {
        u8 lat;
@@ -352,7 +355,7 @@ void pcibios_set_master(struct pci_dev *dev)
 struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(nr, &it8152_ops, sys);
+        return pci_scan_root_bus(NULL, nr, &it8152_ops, sys, &sys->resources);
 }
 EXPORT_SYMBOL(dma_set_coherent_mask);
diff --git a/arch/arm/common/via82c505.c b/arch/arm/common/via82c505.c
index 8421d39109b3..67dd2affc57a 100644
--- a/arch/arm/common/via82c505.c
+++ b/arch/arm/common/via82c505.c
@@ -86,7 +86,8 @@ int __init via82c505_setup(int nr, struct pci_sys_data *sys)
 struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata)
 {
        if (nr == 0)
-                return pci_scan_bus(0, &via82c505_ops, sysdata);
+                return pci_scan_root_bus(NULL, 0, &via82c505_ops, sysdata,
+                                         &sysdata->resources);
        return NULL;
 }
diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h
index 186efd4e05c9..d943b7d20f11 100644
--- a/arch/arm/include/asm/mach/pci.h
+++ b/arch/arm/include/asm/mach/pci.h
@@ -40,7 +40,7 @@ struct pci_sys_data {
        u64             mem_offset;     /* bus->cpu memory mapping offset       */
        unsigned long   io_offset;      /* bus->cpu IO mapping offset           */
        struct pci_bus  *bus;           /* PCI bus                              */
-        struct resource *resource[3];   /* Primary PCI bus resources            */
+        struct list_head resources;     /* root bus resources (apertures)       */
                                        /* Bridge swizzling                     */
        u8              (*swizzle)(struct pci_dev *, u8 *);
                                        /* IRQ mapping                          */
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index 2b1f245db0c6..da337ba57ffd 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -31,18 +31,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
 }
 #endif /* CONFIG_PCI_DOMAINS */
-#ifdef CONFIG_PCI_HOST_ITE8152
-/* ITE bridge requires setting latency timer to avoid early bus access
-   termination by PIC bus mater devices
-*/
-extern void pcibios_set_master(struct pci_dev *dev);
-#else
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
-#endif
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index b530e9116a0c..f58ba3589908 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -316,21 +316,6 @@ pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev)
        }
 }
-static void __devinit
-pbus_assign_bus_resources(struct pci_bus *bus, struct pci_sys_data *root)
-{
-        struct pci_dev *dev = bus->self;
-        int i;
-        if (!dev) {
-                /*
-                 * Assign root bus resources.
-                 */
-                for (i = 0; i < 3; i++)
-                        bus->resource[i] = root->resource[i];
-        }
-}
 /*
 * pcibios_fixup_bus - Called after each bus is probed,
 * but before its children are examined.
@@ -341,8 +326,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
        struct pci_dev *dev;
        u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK;
-        pbus_assign_bus_resources(bus, root);
        /*
         * Walk the devices on this bus, working out what we can
         * and can't support.
@@ -508,12 +491,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
                sys->busnr   = busnr;
                sys->swizzle = hw->swizzle;
                sys->map_irq = hw->map_irq;
-                sys->resource[0] = &ioport_resource;
+                INIT_LIST_HEAD(&sys->resources);
-                sys->resource[1] = &iomem_resource;
                ret = hw->setup(nr, sys);
                if (ret > 0) {
+                        if (list_empty(&sys->resources)) {
+                                pci_add_resource(&sys->resources,
+                                                 &ioport_resource);
+                                pci_add_resource(&sys->resources,
+                                                 &iomem_resource);
+                        }
                        sys->bus = hw->scan(nr, sys);
                        if (!sys->bus)
@@ -571,6 +560,13 @@ void __init pci_common_init(struct hw_pci *hw)
        }
 }
+#ifndef CONFIG_PCI_HOST_ITE8152
+void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
+#endif
 char * __init pcibios_setup(char *str)
 {
        if (!strcmp(str, "debug")) {
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 0f8fca48a5ed..e159d69967c9 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -151,13 +151,12 @@ static int cns3xxx_pci_setup(int nr, struct pci_sys_data *sys)
        struct cns3xxx_pcie *cnspci = sysdata_to_cnspci(sys);
        struct resource *res_io = &cnspci->res_io;
        struct resource *res_mem = &cnspci->res_mem;
-        struct resource **sysres = sys->resource;
        BUG_ON(request_resource(&iomem_resource, res_io) ||
               request_resource(&iomem_resource, res_mem));
-        sysres[0] = res_io;
+        pci_add_resource(&sys->resources, res_io);
-        sysres[1] = res_mem;
+        pci_add_resource(&sys->resources, res_mem);
        return 1;
 }
@@ -169,7 +168,8 @@ static struct pci_ops cns3xxx_pcie_ops = {
 static struct pci_bus *cns3xxx_pci_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(sys->busnr, &cns3xxx_pcie_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &cns3xxx_pcie_ops, sys,
+                                 &sys->resources);
 }
 static int cns3xxx_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 6c11a4df7178..52e96d397ba8 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -69,7 +69,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
        pp->res[0].flags = IORESOURCE_IO;
        if (request_resource(&ioport_resource, &pp->res[0]))
                panic("Request PCIe IO resource failed\n");
-        sys->resource[0] = &pp->res[0];
+        pci_add_resource(&sys->resources, &pp->res[0]);
        /*
         * IORESOURCE_MEM
@@ -88,9 +88,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
        pp->res[1].flags = IORESOURCE_MEM;
        if (request_resource(&iomem_resource, &pp->res[1]))
                panic("Request PCIe Memory resource failed\n");
-        sys->resource[1] = &pp->res[1];
+        pci_add_resource(&sys->resources, &pp->res[1]);
-        sys->resource[2] = NULL;
        return 1;
 }
@@ -184,7 +182,8 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        struct pci_bus *bus;
        if (nr < num_pcie_ports) {
-                bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+                bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+                                        &sys->resources);
        } else {
                bus = NULL;
                BUG();
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 18c32a5541d9..f685650c25d7 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -275,9 +275,9 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
        allocate_resource(&iomem_resource, &res[0], 0x40000000,
                          0x80000000, 0xffffffff, 0x40000000, NULL, NULL);
-        sys->resource[0] = &ioport_resource;
+        pci_add_resource(&sys->resources, &ioport_resource);
-        sys->resource[1] = &res[0];
+        pci_add_resource(&sys->resources, &res[0]);
-        sys->resource[2] = &res[1];
+        pci_add_resource(&sys->resources, &res[1]);
        sys->mem_offset  = DC21285_PCI_MEM;
        return 1;
@@ -285,7 +285,7 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
 struct pci_bus * __init dc21285_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(0, &dc21285_ops, sys);
+        return pci_scan_root_bus(NULL, 0, &dc21285_ops, sys, &sys->resources);
 }
 #define dc21285_request_irq(_a, _b, _c, _d, _e) \
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index b4d8f8b8a085..3c82566acece 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -359,7 +359,7 @@ static struct resource pre_mem = {
        .flags  = IORESOURCE_MEM | IORESOURCE_PREFETCH,
 };
-static int __init pci_v3_setup_resources(struct resource **resource)
+static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
 {
        if (request_resource(&iomem_resource, &non_mem)) {
                printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
@@ -374,13 +374,13 @@ static int __init pci_v3_setup_resources(struct resource **resource)
        }
        /*
-         * bus->resource[0] is the IO resource for this bus
+         * the IO resource for this bus
-         * bus->resource[1] is the mem resource for this bus
+         * the mem resource for this bus
-         * bus->resource[2] is the prefetch mem resource for this bus
+         * the prefetch mem resource for this bus
         */
-        resource[0] = &ioport_resource;
+        pci_add_resource(&sys->resources, &ioport_resource);
-        resource[1] = &non_mem;
+        pci_add_resource(&sys->resources, &non_mem);
-        resource[2] = &pre_mem;
+        pci_add_resource(&sys->resources, &pre_mem);
        return 1;
 }
@@ -481,7 +481,7 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
        if (nr == 0) {
                sys->mem_offset = PHYS_PCI_MEM_BASE;
-                ret = pci_v3_setup_resources(sys->resource);
+                ret = pci_v3_setup_resources(sys);
        }
        return ret;
@@ -489,7 +489,8 @@ int __init pci_v3_setup(int nr, struct pci_sys_data *sys)
 struct pci_bus * __init pci_v3_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(sys->busnr, &pci_v3_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &pci_v3_ops, sys,
+                                 &sys->resources);
 }
 /*
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index db012fadf88c..b8f5a8736511 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -537,14 +537,14 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
                        while(time_before(jiffies, atux_trhfa_timeout))
                                udelay(100);
-                bus = pci_bus_atux = pci_scan_bus(sys->busnr,
+                bus = pci_bus_atux = pci_scan_root_bus(NULL, sys->busnr,
-                                                  &iop13xx_atux_ops,
+                                                       &iop13xx_atux_ops,
-                                                  sys);
+                                                       sys, &sys->resources);
                break;
        case IOP13XX_INIT_ATU_ATUE:
-                bus = pci_bus_atue = pci_scan_bus(sys->busnr,
+                bus = pci_bus_atue = pci_scan_root_bus(NULL, sys->busnr,
-                                                  &iop13xx_atue_ops,
+                                                       &iop13xx_atue_ops,
-                                                  sys);
+                                                       sys, &sys->resources);
                break;
        }
@@ -1084,9 +1084,8 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
        request_resource(&ioport_resource, &res[0]);
        request_resource(&iomem_resource, &res[1]);
-        sys->resource[0] = &res[0];
+        pci_add_resource(&sys->resources, &res[0]);
-        sys->resource[1] = &res[1];
+        pci_add_resource(&sys->resources, &res[1]);
-        sys->resource[2] = NULL;
        return 1;
 }
diff --git a/arch/arm/mach-ixp2000/enp2611.c b/arch/arm/mach-ixp2000/enp2611.c
index ee525416f0d2..e872d238cd0f 100644
--- a/arch/arm/mach-ixp2000/enp2611.c
+++ b/arch/arm/mach-ixp2000/enp2611.c
@@ -145,7 +145,8 @@ static struct pci_ops enp2611_pci_ops = {
 static struct pci_bus * __init enp2611_pci_scan_bus(int nr,
                                                struct pci_sys_data *sys)
 {
-        return pci_scan_bus(sys->busnr, &enp2611_pci_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &enp2611_pci_ops, sys,
+                                 &sys->resources);
 }
 static int __init enp2611_pci_map_irq(const struct pci_dev *dev, u8 slot,
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index f5098b306fd3..626fda435aa9 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -132,7 +132,8 @@ static struct pci_ops ixp2000_pci_ops = {
 struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
 {
-        return pci_scan_bus(sysdata->busnr, &ixp2000_pci_ops, sysdata);
+        return pci_scan_root_bus(NULL, sysdata->busnr, &ixp2000_pci_ops,
+                                 sysdata, &sysdata->resources);
 }
@@ -242,9 +243,8 @@ int ixp2000_pci_setup(int nr, struct pci_sys_data *sys)
        if (nr >= 1)
                return 0;
-        sys->resource[0] = &ixp2000_pci_io_space;
+        pci_add_resource(&sys->resources, &ixp2000_pci_io_space);
-        sys->resource[1] = &ixp2000_pci_mem_space;
+        pci_add_resource(&sys->resources, &ixp2000_pci_mem_space);
-        sys->resource[2] = NULL;
        return 1;
 }
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index e6be5711c700..25b5c462cea2 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -143,7 +143,8 @@ struct pci_ops ixp23xx_pci_ops = {
 struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
 {
-        return pci_scan_bus(sysdata->busnr, &ixp23xx_pci_ops, sysdata);
+        return pci_scan_root_bus(NULL, sysdata->busnr, &ixp23xx_pci_ops,
+                                 sysdata, &sysdata->resources);
 }
 int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
@@ -280,9 +281,8 @@ int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys)
        if (nr >= 1)
                return 0;
-        sys->resource[0] = &ixp23xx_pci_io_space;
+        pci_add_resource(&sys->resources, &ixp23xx_pci_io_space);
-        sys->resource[1] = &ixp23xx_pci_mem_space;
+        pci_add_resource(&sys->resources, &ixp23xx_pci_mem_space);
-        sys->resource[2] = NULL;
        return 1;
 }
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 8325058ef871..5eff15f24bc2 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -472,9 +472,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
        request_resource(&ioport_resource, &res[0]);
        request_resource(&iomem_resource, &res[1]);
-        sys->resource[0] = &res[0];
+        pci_add_resource(&sys->resources, &res[0]);
-        sys->resource[1] = &res[1];
+        pci_add_resource(&sys->resources, &res[1]);
-        sys->resource[2] = NULL;
        platform_notify = ixp4xx_pci_platform_notify;
        platform_notify_remove = ixp4xx_pci_platform_notify_remove;
@@ -484,7 +483,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
 struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &ixp4xx_ops, sys,
+                                 &sys->resources);
 }
 int dma_set_coherent_mask(struct device *dev, u64 mask)
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index fb451bfe478b..a066a6d8d9d2 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -198,9 +198,8 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
        if (request_resource(&iomem_resource, &pp->res[1]))
                panic("Request PCIe%d Memory resource failed\n", index);
-        sys->resource[0] = &pp->res[0];
+        pci_add_resource(&sys->resources, &pp->res[0]);
-        sys->resource[1] = &pp->res[1];
+        pci_add_resource(&sys->resources, &pp->res[1]);
-        sys->resource[2] = NULL;
        sys->io_offset = 0;
        /*
@@ -236,7 +235,8 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        struct pci_bus *bus;
        if (nr < num_pcie_ports) {
-                bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+                bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+                                        &sys->resources);
        } else {
                bus = NULL;
                BUG();
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c
index c7c9a188d105..b26f992071df 100644
--- a/arch/arm/mach-ks8695/pci.c
+++ b/arch/arm/mach-ks8695/pci.c
@@ -143,7 +143,8 @@ static struct pci_ops ks8695_pci_ops = {
 static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &ks8695_pci_ops, sys,
+                                 &sys->resources);
 }
 static struct resource pci_mem = {
@@ -168,9 +169,8 @@ static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
        request_resource(&iomem_resource, &pci_mem);
        request_resource(&ioport_resource, &pci_io);
-        sys->resource[0] = &pci_io;
+        pci_add_resource(&sys->resources, &pci_io);
-        sys->resource[1] = &pci_mem;
+        pci_add_resource(&sys->resources, &pci_mem);
-        sys->resource[2] = NULL;
        /* Assign and enable processor bridge */
        ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index 12fcb108b0e1..8459f6d7d8ca 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -155,9 +155,8 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
        orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
        orion_pcie_setup(pp->base);
-        sys->resource[0] = &pp->res[0];
+        pci_add_resource(&sys->resources, &pp->res[0]);
-        sys->resource[1] = &pp->res[1];
+        pci_add_resource(&sys->resources, &pp->res[1]);
-        sys->resource[2] = NULL;
        return 1;
 }
@@ -251,7 +250,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)
        struct pci_bus *bus;
        if (nr < num_pcie_ports) {
-                bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+                bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+                                        &sys->resources);
        } else {
                bus = NULL;
                BUG();
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index a494c470e3e4..09a045f0c406 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -177,7 +177,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
        res[0].end = res[0].start + ORION5X_PCIE_IO_SIZE - 1;
        if (request_resource(&ioport_resource, &res[0]))
                panic("Request PCIe IO resource failed\n");
-        sys->resource[0] = &res[0];
+        pci_add_resource(&sys->resources, &res[0]);
        /*
         * IORESOURCE_MEM
@@ -188,9 +188,8 @@ static int __init pcie_setup(struct pci_sys_data *sys)
        res[1].end = res[1].start + ORION5X_PCIE_MEM_SIZE - 1;
        if (request_resource(&iomem_resource, &res[1]))
                panic("Request PCIe Memory resource failed\n");
-        sys->resource[1] = &res[1];
+        pci_add_resource(&sys->resources, &res[1]);
-        sys->resource[2] = NULL;
        sys->io_offset = 0;
        return 1;
@@ -506,7 +505,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
        res[0].end = res[0].start + ORION5X_PCI_IO_SIZE - 1;
        if (request_resource(&ioport_resource, &res[0]))
                panic("Request PCI IO resource failed\n");
-        sys->resource[0] = &res[0];
+        pci_add_resource(&sys->resources, &res[0]);
        /*
         * IORESOURCE_MEM
@@ -517,9 +516,8 @@ static int __init pci_setup(struct pci_sys_data *sys)
        res[1].end = res[1].start + ORION5X_PCI_MEM_SIZE - 1;
        if (request_resource(&iomem_resource, &res[1]))
                panic("Request PCI Memory resource failed\n");
-        sys->resource[1] = &res[1];
+        pci_add_resource(&sys->resources, &res[1]);
-        sys->resource[2] = NULL;
        sys->io_offset = 0;
        return 1;
@@ -580,9 +578,11 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys
        struct pci_bus *bus;
        if (nr == 0) {
-                bus = pci_scan_bus(sys->busnr, &pcie_ops, sys);
+                bus = pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
+                                        &sys->resources);
        } else if (nr == 1 && !orion5x_pci_disabled) {
-                bus = pci_scan_bus(sys->busnr, &pci_ops, sys);
+                bus = pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
+                                        &sys->resources);
        } else {
                bus = NULL;
                BUG();
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index dd39fee59549..0d01ca788922 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -131,7 +131,8 @@ static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
 struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(sys->busnr, &pci_nano_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &pci_nano_ops, sys,
+                                 &sys->resources);
 }
 static struct resource pci_io_ports = {
@@ -226,7 +227,7 @@ static struct resource pci_prefetchable_memory = {
        .flags  = IORESOURCE_MEM  | IORESOURCE_PREFETCH,
 };
-static int __init pci_nanoengine_setup_resources(struct resource **resource)
+static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
 {
        if (request_resource(&ioport_resource, &pci_io_ports)) {
                printk(KERN_ERR "PCI: unable to allocate io port region\n");
@@ -243,9 +244,9 @@ static int __init pci_nanoengine_setup_resources(struct resource **resource)
                printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
                return -EBUSY;
        }
-        resource[0] = &pci_io_ports;
+        pci_add_resource(&sys->resources, &pci_io_ports);
-        resource[1] = &pci_non_prefetchable_memory;
+        pci_add_resource(&sys->resources, &pci_non_prefetchable_memory);
-        resource[2] = &pci_prefetchable_memory;
+        pci_add_resource(&sys->resources, &pci_prefetchable_memory);
        return 1;
 }
@@ -260,7 +261,7 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
        if (nr == 0) {
                sys->mem_offset = NANO_PCI_MEM_RW_PHYS;
                sys->io_offset = 0x400;
-                ret = pci_nanoengine_setup_resources(sys->resource);
+                ret = pci_nanoengine_setup_resources(sys);
                /* Enable alternate memory bus master mode, see
                 * "Intel StrongARM SA1110 Developer's Manual",
                 * section 10.8, "Alternate Memory Bus Master Mode". */
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index ec63c6b2b6b5..af8b63435727 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -408,7 +408,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
        pp->res[0].flags = IORESOURCE_IO;
        if (request_resource(&ioport_resource, &pp->res[0]))
                panic("Request PCIe IO resource failed\n");
-        sys->resource[0] = &pp->res[0];
+        pci_add_resource(&sys->resources, &pp->res[0]);
        /*
         * IORESOURCE_MEM
@@ -427,7 +427,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
        pp->res[1].flags = IORESOURCE_MEM;
        if (request_resource(&iomem_resource, &pp->res[1]))
                panic("Request PCIe Memory resource failed\n");
-        sys->resource[1] = &pp->res[1];
+        pci_add_resource(&sys->resources, &pp->res[1]);
        /*
         * IORESOURCE_MEM | IORESOURCE_PREFETCH
@@ -446,7 +446,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
        pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
        if (request_resource(&iomem_resource, &pp->res[2]))
                panic("Request PCIe Prefetch Memory resource failed\n");
-        sys->resource[2] = &pp->res[2];
+        pci_add_resource(&sys->resources, &pp->res[2]);
        return 1;
 }
@@ -467,7 +467,8 @@ static struct pci_bus __init *tegra_pcie_scan_bus(int nr,
        pp = tegra_pcie.port + nr;
        pp->root_bus_nr = sys->busnr;
-        return pci_scan_bus(sys->busnr, &tegra_pcie_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &tegra_pcie_ops, sys,
+                                 &sys->resources);
 }
 static struct hw_pci tegra_pcie_hw __initdata = {
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index c898deb3ada0..90069bce23bc 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -191,7 +191,7 @@ static struct resource pre_mem = {
        .flags  = IORESOURCE_MEM | IORESOURCE_PREFETCH,
 };
-static int __init pci_versatile_setup_resources(struct resource **resource)
+static int __init pci_versatile_setup_resources(struct list_head *resources)
 {
        int ret = 0;
@@ -215,13 +215,13 @@ static int __init pci_versatile_setup_resources(struct resource **resource)
        }
        /*
-         * bus->resource[0] is the IO resource for this bus
+         * the IO resource for this bus
-         * bus->resource[1] is the mem resource for this bus
+         * the mem resource for this bus
-         * bus->resource[2] is the prefetch mem resource for this bus
+         * the prefetch mem resource for this bus
         */
-        resource[0] = &io_mem;
+        pci_add_resource(resources, &io_mem);
-        resource[1] = &non_mem;
+        pci_add_resource(resources, &non_mem);
-        resource[2] = &pre_mem;
+        pci_add_resource(resources, &pre_mem);
        goto out;
@@ -250,7 +250,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
        if (nr == 0) {
                sys->mem_offset = 0;
-                ret = pci_versatile_setup_resources(sys->resource);
+                ret = pci_versatile_setup_resources(&sys->resources);
                if (ret < 0) {
                        printk("pci_versatile_setup: resources... oops?\n");
                        goto out;
@@ -306,7 +306,8 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
 struct pci_bus * __init pci_versatile_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(sys->busnr, &pci_versatile_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &pci_versatile_ops, sys,
+                                 &sys->resources);
 }
 void __init pci_versatile_preinit(void)
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index 845549cbbb27..f4d40a27111e 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -215,16 +215,16 @@ int iop3xx_pci_setup(int nr, struct pci_sys_data *sys)
        sys->mem_offset = IOP3XX_PCI_LOWER_MEM_PA - *IOP3XX_OMWTVR0;
        sys->io_offset  = IOP3XX_PCI_LOWER_IO_PA - *IOP3XX_OIOWTVR;
-        sys->resource[0] = &res[0];
+        pci_add_resource(&sys->resources, &res[0]);
-        sys->resource[1] = &res[1];
+        pci_add_resource(&sys->resources, &res[1]);
-        sys->resource[2] = NULL;
        return 1;
 }
 struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *sys)
 {
-        return pci_scan_bus(sys->busnr, &iop3xx_ops, sys);
+        return pci_scan_root_bus(NULL, sys->busnr, &iop3xx_ops, sys,
+                                 &sys->resources);
 }
 void __init iop3xx_atu_setup(void)
diff --git a/arch/blackfin/include/asm/pci.h b/arch/blackfin/include/asm/pci.h
index 99cae2e3bac7..74352c4597d9 100644
--- a/arch/blackfin/include/asm/pci.h
+++ b/arch/blackfin/include/asm/pci.h
@@ -10,10 +10,6 @@
 #define PCIBIOS_MIN_IO 0x00001000
 #define PCIBIOS_MIN_MEM 0x10000000
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c
index 6b4fb28e9f99..c28121765448 100644
--- a/arch/frv/mb93090-mb00/pci-frv.c
+++ b/arch/frv/mb93090-mb00/pci-frv.c
@@ -194,23 +194,3 @@ void __init pcibios_resource_survey(void)
        pcibios_allocate_resources(1);
        pcibios_assign_resources();
 }
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-unsigned int pcibios_max_latency = 255;
-void pcibios_set_master(struct pci_dev *dev)
-{
-        u8 lat;
-        pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-        if (lat < 16)
-                lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-        else if (lat > pcibios_max_latency)
-                lat = pcibios_max_latency;
-        else
-                return;
-        printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
diff --git a/arch/frv/mb93090-mb00/pci-frv.h b/arch/frv/mb93090-mb00/pci-frv.h
index f3fe55914793..089eeba4f3bc 100644
--- a/arch/frv/mb93090-mb00/pci-frv.h
+++ b/arch/frv/mb93090-mb00/pci-frv.h
@@ -26,8 +26,6 @@ extern unsigned int __nongpreldata pci_probe;
 /* pci-frv.c */
-extern unsigned int pcibios_max_latency;
 void pcibios_resource_survey(void);
 /* pci-vdk.c */
diff --git a/arch/frv/mb93090-mb00/pci-vdk.c b/arch/frv/mb93090-mb00/pci-vdk.c
index f8dd37e49535..6b0b82ff4419 100644
--- a/arch/frv/mb93090-mb00/pci-vdk.c
+++ b/arch/frv/mb93090-mb00/pci-vdk.c
@@ -327,11 +327,6 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
        printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number);
 #endif
-        if (bus->number == 0) {
-                bus->resource[0] = &pci_ioport_resource;
-                bus->resource[1] = &pci_iomem_resource;
-        }
        pci_read_bridge_bases(bus);
        if (bus->number == 0) {
@@ -357,6 +352,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
 int __init pcibios_init(void)
 {
        struct pci_ops *dir = NULL;
+        LIST_HEAD(resources);
        if (!mb93090_mb00_detected)
                return -ENXIO;
@@ -420,7 +416,10 @@ int __init pcibios_init(void)
        }
        printk("PCI: Probing PCI hardware\n");
-        pci_root_bus = pci_scan_bus(0, pci_root_ops, NULL);
+        pci_add_resource(&resources, &pci_ioport_resource);
+        pci_add_resource(&resources, &pci_iomem_resource);
+        pci_root_bus = pci_scan_root_bus(NULL, 0, pci_root_ops, NULL,
+                                         &resources);
        pcibios_irq_init();
        pcibios_fixup_peer_bridges();
diff --git a/arch/h8300/include/asm/pci.h b/arch/h8300/include/asm/pci.h
index cc9762091c0a..0b2acaa3dd84 100644
--- a/arch/h8300/include/asm/pci.h
+++ b/arch/h8300/include/asm/pci.h
@@ -9,11 +9,6 @@
 #define pcibios_assign_all_busses()     0
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/ia64/include/asm/pci.h b/arch/ia64/include/asm/pci.h
index 127dd7be346a..279b38ae74aa 100644
--- a/arch/ia64/include/asm/pci.h
+++ b/arch/ia64/include/asm/pci.h
@@ -43,12 +43,6 @@ extern unsigned long ia64_max_iommu_merge_mask;
 #define PCI_DMA_BUS_IS_PHYS     (ia64_max_iommu_merge_mask == ~0UL)
 static inline void
-pcibios_set_master (struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
-static inline void
 pcibios_penalize_isa_irq (int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 2c27714d7b78..f82f5d4b65fd 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -134,6 +134,7 @@ alloc_pci_controller (int seg)
 struct pci_root_info {
        struct acpi_device *bridge;
        struct pci_controller *controller;
+        struct list_head resources;
        char *name;
 };
@@ -315,24 +316,13 @@ static __devinit acpi_status add_window(struct acpi_resource *res, void *data)
                                 &window->resource);
        }
-        return AE_OK;
+        /* HP's firmware has a hack to work around a Windows bug.
-}
+         * Ignore these tiny memory ranges */
+        if (!((window->resource.flags & IORESOURCE_MEM) &&
-static void __devinit
+              (window->resource.end - window->resource.start < 16)))
-pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl)
+                pci_add_resource(&info->resources, &window->resource);
-{
-        int i;
-        pci_bus_remove_resources(bus);
+        return AE_OK;
-        for (i = 0; i < ctrl->windows; i++) {
-                struct resource *res = &ctrl->window[i].resource;
-                /* HP's firmware has a hack to work around a Windows bug.
-                 * Ignore these tiny memory ranges */
-                if ((res->flags & IORESOURCE_MEM) &&
-                    (res->end - res->start < 16))
-                        continue;
-                pci_bus_add_resource(bus, res, 0);
-        }
 }
 struct pci_bus * __devinit
@@ -343,6 +333,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
        int bus = root->secondary.start;
        struct pci_controller *controller;
        unsigned int windows = 0;
+        struct pci_root_info info;
        struct pci_bus *pbus;
        char *name;
        int pxm;
@@ -359,11 +350,10 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
                controller->node = pxm_to_node(pxm);
 #endif
+        INIT_LIST_HEAD(&info.resources);
        acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window,
                        &windows);
        if (windows) {
-                struct pci_root_info info;
                controller->window =
                        kmalloc_node(sizeof(*controller->window) * windows,
                                     GFP_KERNEL, controller->node);
@@ -387,8 +377,14 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
         * should handle the case here, but it appears that IA64 hasn't
         * such quirk. So we just ignore the case now.
         */
-        pbus = pci_scan_bus_parented(NULL, bus, &pci_root_ops, controller);
+        pbus = pci_create_root_bus(NULL, bus, &pci_root_ops, controller,
+                                   &info.resources);
+        if (!pbus) {
+                pci_free_resource_list(&info.resources);
+                return NULL;
+        }
+        pbus->subordinate = pci_scan_child_bus(pbus);
        return pbus;
 out3:
@@ -504,14 +500,15 @@ pcibios_fixup_bus (struct pci_bus *b)
        if (b->self) {
                pci_read_bridge_bases(b);
                pcibios_fixup_bridge_resources(b->self);
-        } else {
-                pcibios_setup_root_windows(b, b->sysdata);
        }
        list_for_each_entry(dev, &b->devices, bus_list)
                pcibios_fixup_device_resources(dev);
        platform_pci_fixup_bus(b);
+}
-        return;
+void pcibios_set_master (struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
 }
 void __devinit
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 32764cd077c6..e9834b2991d0 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -140,7 +140,6 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
 /* Allocate & free a PCI host bridge structure */
 extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
-extern void pcibios_setup_phb_resources(struct pci_controller *hose);
 #endif  /* __KERNEL__ */
 #endif  /* _ASM_MICROBLAZE_PCI_BRIDGE_H */
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h
index 1dd9d6b1e275..033137628e8a 100644
--- a/arch/microblaze/include/asm/pci.h
+++ b/arch/microblaze/include/asm/pci.h
@@ -42,11 +42,6 @@ struct pci_dev;
 */
 #define pcibios_assign_all_busses()     0
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 0d71b2ed8107..85f2ac1230a8 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -190,6 +190,11 @@ int pcibios_add_platform_entries(struct pci_dev *pdev)
        return device_create_file(&pdev->dev, &dev_attr_devspec);
 }
+void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
 char __devinit *pcibios_setup(char *str)
 {
        return str;
@@ -1019,7 +1024,6 @@ static void __devinit pcibios_fixup_bridge(struct pci_bus *bus)
        struct pci_dev *dev = bus->self;
        pci_bus_for_each_resource(bus, res, i) {
-                res = bus->resource[i];
                if (!res)
                        continue;
                if (!res->flags)
@@ -1219,7 +1223,6 @@ void pcibios_allocate_bus_resources(struct pci_bus *bus)
                 pci_domain_nr(bus), bus->number);
        pci_bus_for_each_resource(bus, res, i) {
-                res = bus->resource[i];
                if (!res || !res->flags
                    || res->start > res->end || res->parent)
                        continue;
@@ -1510,14 +1513,18 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
        return pci_enable_resources(dev, mask);
 }
-void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
+static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources)
 {
-        struct pci_bus *bus = hose->bus;
        struct resource *res;
        int i;
        /* Hookup PHB IO resource */
-        bus->resource[0] = res = &hose->io_resource;
+        res = &hose->io_resource;
+        /* Fixup IO space offset */
+        io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
+        res->start = (res->start + io_offset) & 0xffffffffu;
+        res->end = (res->end + io_offset) & 0xffffffffu;
        if (!res->flags) {
                printk(KERN_WARNING "PCI: I/O resource not set for host"
@@ -1528,6 +1535,7 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
                res->end = res->start + IO_SPACE_LIMIT;
                res->flags = IORESOURCE_IO;
        }
+        pci_add_resource(resources, res);
        pr_debug("PCI: PHB IO resource    = %016llx-%016llx [%lx]\n",
                 (unsigned long long)res->start,
@@ -1550,7 +1558,7 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
                        res->flags = IORESOURCE_MEM;
                }
-                bus->resource[i+1] = res;
+                pci_add_resource(resources, res);
                pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n",
                        i, (unsigned long long)res->start,
@@ -1573,34 +1581,27 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
 static void __devinit pcibios_scan_phb(struct pci_controller *hose)
 {
+        LIST_HEAD(resources);
        struct pci_bus *bus;
        struct device_node *node = hose->dn;
-        unsigned long io_offset;
-        struct resource *res = &hose->io_resource;
        pr_debug("PCI: Scanning PHB %s\n",
                 node ? node->full_name : "<NO NAME>");
-        /* Create an empty bus for the toplevel */
+        pcibios_setup_phb_resources(hose, &resources);
-        bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
+        bus = pci_scan_root_bus(hose->parent, hose->first_busno,
+                                hose->ops, hose, &resources);
        if (bus == NULL) {
                printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
                       hose->global_number);
+                pci_free_resource_list(&resources);
                return;
        }
        bus->secondary = hose->first_busno;
        hose->bus = bus;
-        /* Fixup IO space offset */
+        hose->last_busno = bus->subordinate;
-        io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
-        res->start = (res->start + io_offset) & 0xffffffffu;
-        res->end = (res->end + io_offset) & 0xffffffffu;
-        /* Wire up PHB bus resources */
-        pcibios_setup_phb_resources(hose);
-        /* Scan children */
-        hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
 }
 static int __init pcibios_init(void)
@@ -1614,8 +1615,6 @@ static int __init pcibios_init(void)
        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
                hose->last_busno = 0xff;
                pcibios_scan_phb(hose);
-                printk(KERN_INFO "calling pci_bus_add_devices()\n");
-                pci_bus_add_devices(hose->bus);
                if (next_busno <= hose->last_busno)
                        next_busno = hose->last_busno + 1;
        }
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 41af7fa2887b..fa8e378413b1 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -81,6 +81,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
 {
        static int next_busno;
        static int need_domain_info;
+        LIST_HEAD(resources);
        struct pci_bus *bus;
        if (!hose->iommu)
@@ -89,7 +90,13 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
        if (hose->get_busno && pci_probe_only)
                next_busno = (*hose->get_busno)();
-        bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
+        pci_add_resource(&resources, hose->mem_resource);
+        pci_add_resource(&resources, hose->io_resource);
+        bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
+                                &resources);
+        if (!bus)
+                pci_free_resource_list(&resources);
        hose->bus = bus;
        need_domain_info = need_domain_info || hose->index;
@@ -205,27 +212,6 @@ static int pcibios_enable_resources(struct pci_dev *dev, int mask)
        return 0;
 }
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-static unsigned int pcibios_max_latency = 255;
-void pcibios_set_master(struct pci_dev *dev)
-{
-        u8 lat;
-        pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-        if (lat < 16)
-                lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-        else if (lat > pcibios_max_latency)
-                lat = pcibios_max_latency;
-        else
-                return;
-        printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",
-               pci_name(dev), lat);
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
 unsigned int pcibios_assign_all_busses(void)
 {
        return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
@@ -266,15 +252,11 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
        /* Propagate hose info into the subordinate devices.  */
-        struct pci_controller *hose = bus->sysdata;
        struct list_head *ln;
        struct pci_dev *dev = bus->self;
-        if (!dev) {
+        if (pci_probe_only && dev &&
-                bus->resource[0] = hose->io_resource;
+            (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
-                bus->resource[1] = hose->mem_resource;
-        } else if (pci_probe_only &&
-                   (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
                pci_read_bridge_bases(bus);
                pcibios_fixup_device_resources(dev, bus);
        }
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c
index 8e6763e6f250..c4e2e79281e8 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.c
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.c
@@ -213,28 +213,6 @@ void __init pcibios_resource_survey(void)
        pcibios_allocate_resources(1);
 }
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-unsigned int pcibios_max_latency = 255;
-void pcibios_set_master(struct pci_dev *dev)
-{
-        u8 lat;
-        pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-        if (lat < 16)
-                lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-        else if (lat > pcibios_max_latency)
-                lat = pcibios_max_latency;
-        else
-                return;
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
                        enum pci_mmap_state mmap_state, int write_combine)
 {
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.h b/arch/mn10300/unit-asb2305/pci-asb2305.h
index c3fa294b6e28..1194fe486b01 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.h
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.h
@@ -31,8 +31,6 @@ extern unsigned int pci_probe;
 /* pci-asb2305.c */
-extern unsigned int pcibios_max_latency;
 extern void pcibios_resource_survey(void);
 /* pci.c */
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c
index a4954fe82094..a7c5f08ca9f5 100644
--- a/arch/mn10300/unit-asb2305/pci.c
+++ b/arch/mn10300/unit-asb2305/pci.c
@@ -380,11 +380,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
        struct pci_dev *dev;
-        if (bus->number == 0) {
-                bus->resource[0] = &pci_ioport_resource;
-                bus->resource[1] = &pci_iomem_resource;
-        }
        if (bus->self) {
                pci_read_bridge_bases(bus);
                pcibios_fixup_device_resources(bus->self);
@@ -402,6 +397,8 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 */
 static int __init pcibios_init(void)
 {
+        LIST_HEAD(resources);
        ioport_resource.start   = 0xA0000000;
        ioport_resource.end     = 0xDFFFFFFF;
        iomem_resource.start    = 0xA0000000;
@@ -423,7 +420,10 @@ static int __init pcibios_init(void)
        printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n",
               MEM_PAGING_REG);
-        pci_root_bus = pci_scan_bus(0, &pci_direct_ampci, NULL);
+        pci_add_resource(&resources, &pci_ioport_resource);
+        pci_add_resource(&resources, &pci_iomem_resource);
+        pci_root_bus = pci_scan_root_bus(NULL, 0, &pci_direct_ampci, NULL,
+                                         &resources);
        pcibios_irq_init();
        pcibios_fixup_irqs();
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 882b6aa6c857..5d487657322e 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -226,7 +226,6 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
 /* Allocate & free a PCI host bridge structure */
 extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
-extern void pcibios_setup_phb_resources(struct pci_controller *hose);
 #ifdef CONFIG_PCI
 extern int pcibios_vaddr_is_ioport(void __iomem *address);
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 1c92013466e3..f54b3d26ce9d 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -46,11 +46,6 @@ struct pci_dev;
 #define pcibios_assign_all_busses() \
        (pci_has_flag(PCI_REASSIGN_ALL_BUS))
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index fa4a573d6716..cce98d76e905 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1131,6 +1131,11 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
        }
 }
+void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
        /* When called from the generic PCI probe, read PCI<->PCI bridge
@@ -1560,14 +1565,13 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
        return pci_enable_resources(dev, mask);
 }
-void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
+static void __devinit pcibios_setup_phb_resources(struct pci_controller *hose, struct list_head *resources)
 {
-        struct pci_bus *bus = hose->bus;
        struct resource *res;
        int i;
        /* Hookup PHB IO resource */
-        bus->resource[0] = res = &hose->io_resource;
+        res = &hose->io_resource;
        if (!res->flags) {
                printk(KERN_WARNING "PCI: I/O resource not set for host"
@@ -1585,6 +1589,7 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
                 (unsigned long long)res->start,
                 (unsigned long long)res->end,
                 (unsigned long)res->flags);
+        pci_add_resource(resources, res);
        /* Hookup PHB Memory resources */
        for (i = 0; i < 3; ++i) {
@@ -1602,12 +1607,12 @@ void __devinit pcibios_setup_phb_resources(struct pci_controller *hose)
                        res->flags = IORESOURCE_MEM;
 #endif /* CONFIG_PPC32 */
                }
-                bus->resource[i+1] = res;
                pr_debug("PCI: PHB MEM resource %d = %016llx-%016llx [%lx]\n", i,
                         (unsigned long long)res->start,
                         (unsigned long long)res->end,
                         (unsigned long)res->flags);
+                pci_add_resource(resources, res);
        }
        pr_debug("PCI: PHB MEM offset     = %016llx\n",
@@ -1701,6 +1706,7 @@ struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
 */
 void __devinit pcibios_scan_phb(struct pci_controller *hose)
 {
+        LIST_HEAD(resources);
        struct pci_bus *bus;
        struct device_node *node = hose->dn;
        int mode;
@@ -1708,22 +1714,24 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
        pr_debug("PCI: Scanning PHB %s\n",
                 node ? node->full_name : "<NO NAME>");
+        /* Get some IO space for the new PHB */
+        pcibios_setup_phb_io_space(hose);
+        /* Wire up PHB bus resources */
+        pcibios_setup_phb_resources(hose, &resources);
        /* Create an empty bus for the toplevel */
-        bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
+        bus = pci_create_root_bus(hose->parent, hose->first_busno,
+                                  hose->ops, hose, &resources);
        if (bus == NULL) {
                pr_err("Failed to create bus for PCI domain %04x\n",
                        hose->global_number);
+                pci_free_resource_list(&resources);
                return;
        }
        bus->secondary = hose->first_busno;
        hose->bus = bus;
-        /* Get some IO space for the new PHB */
-        pcibios_setup_phb_io_space(hose);
-        /* Wire up PHB bus resources */
-        pcibios_setup_phb_resources(hose);
        /* Get probe mode and perform scan */
        mode = PCI_PROBE_NORMAL;
        if (node && ppc_md.pci_probe_mode)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index bcf4bf9e72d9..3318d39b7d4c 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -131,30 +131,13 @@ EXPORT_SYMBOL_GPL(pcibios_unmap_io_space);
 #endif /* CONFIG_HOTPLUG */
-int __devinit pcibios_map_io_space(struct pci_bus *bus)
+static int __devinit pcibios_map_phb_io_space(struct pci_controller *hose)
 {
        struct vm_struct *area;
        unsigned long phys_page;
        unsigned long size_page;
        unsigned long io_virt_offset;
-        struct pci_controller *hose;
-        WARN_ON(bus == NULL);
-        /* If this not a PHB, nothing to do, page tables still exist and
-         * thus HPTEs will be faulted in when needed
-         */
-        if (bus->self) {
-                pr_debug("IO mapping for PCI-PCI bridge %s\n",
-                         pci_name(bus->self));
-                pr_debug("  virt=0x%016llx...0x%016llx\n",
-                         bus->resource[0]->start + _IO_BASE,
-                         bus->resource[0]->end + _IO_BASE);
-                return 0;
-        }
-        /* Get the host bridge */
-        hose = pci_bus_to_host(bus);
        phys_page = _ALIGN_DOWN(hose->io_base_phys, PAGE_SIZE);
        size_page = _ALIGN_UP(hose->pci_io_size, PAGE_SIZE);
@@ -198,11 +181,30 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
        return 0;
 }
+int __devinit pcibios_map_io_space(struct pci_bus *bus)
+{
+        WARN_ON(bus == NULL);
+        /* If this not a PHB, nothing to do, page tables still exist and
+         * thus HPTEs will be faulted in when needed
+         */
+        if (bus->self) {
+                pr_debug("IO mapping for PCI-PCI bridge %s\n",
+                         pci_name(bus->self));
+                pr_debug("  virt=0x%016llx...0x%016llx\n",
+                         bus->resource[0]->start + _IO_BASE,
+                         bus->resource[0]->end + _IO_BASE);
+                return 0;
+        }
+        return pcibios_map_phb_io_space(pci_bus_to_host(bus));
+}
 EXPORT_SYMBOL_GPL(pcibios_map_io_space);
 void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose)
 {
-        pcibios_map_io_space(hose->bus);
+        pcibios_map_phb_io_space(hose);
 }
 #define IOBASE_BRIDGE_NUMBER    0
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 11aaf2fdec84..8f18dd090a66 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -36,9 +36,15 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
 {
        static int next_busno;
        static int need_domain_info;
+        LIST_HEAD(resources);
+        int i;
        struct pci_bus *bus;
-        bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
+        for (i = 0; i < hose->nr_resources; i++)
+                pci_add_resource(&resources, hose->resources + i);
+        bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
+                                &resources);
        hose->bus = bus;
        need_domain_info = need_domain_info || hose->index;
@@ -55,6 +61,8 @@ static void __devinit pcibios_scanbus(struct pci_channel *hose)
                pci_bus_size_bridges(bus);
                pci_bus_assign_resources(bus);
                pci_enable_bridges(bus);
+        } else {
+                pci_free_resource_list(&resources);
        }
 }
@@ -162,16 +170,8 @@ static void pcibios_fixup_device_resources(struct pci_dev *dev,
 */
 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
-        struct pci_dev *dev = bus->self;
+        struct pci_dev *dev;
        struct list_head *ln;
-        struct pci_channel *hose = bus->sysdata;
-        if (!dev) {
-                int i;
-                for (i = 0; i < hose->nr_resources; i++)
-                        bus->resource[i] = hose->resources + i;
-        }
        for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
                dev = pci_dev_b(ln);
@@ -243,27 +243,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
        return pci_enable_resources(dev, mask);
 }
-/*
- *  If we set up a device for bus mastering, we need to check and set
- *  the latency timer as it may not be properly set.
- */
-static unsigned int pcibios_max_latency = 255;
-void pcibios_set_master(struct pci_dev *dev)
-{
-        u8 lat;
-        pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-        if (lat < 16)
-                lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-        else if (lat > pcibios_max_latency)
-                lat = pcibios_max_latency;
-        else
-                return;
-        printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
-               pci_name(dev), lat);
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
 void __init pcibios_update_irq(struct pci_dev *dev, int irq)
 {
        pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h
index 02939abd356c..6de7f7bf956a 100644
--- a/arch/sparc/include/asm/pci_32.h
+++ b/arch/sparc/include/asm/pci_32.h
@@ -16,11 +16,6 @@
 #define PCI_IRQ_NONE            0xffffffff
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h
index 2614d96141c9..755a4bb6bcd3 100644
--- a/arch/sparc/include/asm/pci_64.h
+++ b/arch/sparc/include/asm/pci_64.h
@@ -16,11 +16,6 @@
 #define PCI_IRQ_NONE            0xffffffff
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/sparc/kernel/leon_pci.c b/arch/sparc/kernel/leon_pci.c
index f1cf6ef011a7..c7bec25fdb1c 100644
--- a/arch/sparc/kernel/leon_pci.c
+++ b/arch/sparc/kernel/leon_pci.c
@@ -19,22 +19,22 @@
 */
 void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
 {
+        LIST_HEAD(resources);
        struct pci_bus *root_bus;
-        root_bus = pci_scan_bus_parented(&ofdev->dev, 0, info->ops, info);
+        pci_add_resource(&resources, &info->io_space);
-        if (root_bus) {
+        pci_add_resource(&resources, &info->mem_space);
-                root_bus->resource[0] = &info->io_space;
-                root_bus->resource[1] = &info->mem_space;
-                root_bus->resource[2] = NULL;
-                /* Init all PCI devices into PCI tree */
-                pci_bus_add_devices(root_bus);
+        root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
+                                     &resources);
+        if (root_bus) {
                /* Setup IRQs of all devices using custom routines */
                pci_fixup_irqs(pci_common_swizzle, info->map_irq);
                /* Assign devices with resources */
                pci_assign_unassigned_resources();
+        } else {
+                pci_free_resource_list(&resources);
        }
 }
@@ -83,15 +83,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
        int i, has_io, has_mem;
        u16 cmd;
-        /* Generic PCI bus probing sets these to point at
-         * &io{port,mem}_resouce which is wrong for us.
-         */
-        if (pbus->self == NULL) {
-                pbus->resource[0] = &info->io_space;
-                pbus->resource[1] = &info->mem_space;
-                pbus->resource[2] = NULL;
-        }
        list_for_each_entry(dev, &pbus->devices, bus_list) {
                /*
                 * We can not rely on that the bootloader has enabled I/O
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index 31111e35281e..bb8bc2e519ac 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -685,23 +685,25 @@ static void __devinit pci_bus_register_of_sysfs(struct pci_bus *bus)
 struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
                                            struct device *parent)
 {
+        LIST_HEAD(resources);
        struct device_node *node = pbm->op->dev.of_node;
        struct pci_bus *bus;
        printk("PCI: Scanning PBM %s\n", node->full_name);
-        bus = pci_create_bus(parent, pbm->pci_first_busno, pbm->pci_ops, pbm);
+        pci_add_resource(&resources, &pbm->io_space);
+        pci_add_resource(&resources, &pbm->mem_space);
+        bus = pci_create_root_bus(parent, pbm->pci_first_busno, pbm->pci_ops,
+                                  pbm, &resources);
        if (!bus) {
                printk(KERN_ERR "Failed to create bus for %s\n",
                       node->full_name);
+                pci_free_resource_list(&resources);
                return NULL;
        }
        bus->secondary = pbm->pci_first_busno;
        bus->subordinate = pbm->pci_last_busno;
-        bus->resource[0] = &pbm->io_space;
-        bus->resource[1] = &pbm->mem_space;
        pci_of_scan_bus(pbm, node, bus);
        pci_bus_add_devices(bus);
        pci_bus_register_of_sysfs(bus);
@@ -711,13 +713,6 @@ struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm,
 void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
 {
-        struct pci_pbm_info *pbm = pbus->sysdata;
-        /* Generic PCI bus probing sets these to point at
-         * &io{port,mem}_resouce which is wrong for us.
-         */
-        pbus->resource[0] = &pbm->io_space;
-        pbus->resource[1] = &pbm->mem_space;
 }
 void pcibios_update_irq(struct pci_dev *pdev, int irq)
@@ -1083,6 +1078,11 @@ void pci_resource_to_user(const struct pci_dev *pdev, int bar,
        *end = rp->end - offset;
 }
+void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
 static int __init pcibios_init(void)
 {
        pci_dfl_cache_line_size = 64 >> 2;
diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h
index 1d25fea42e54..5d5a635530bd 100644
--- a/arch/tile/include/asm/pci.h
+++ b/arch/tile/include/asm/pci.h
@@ -76,13 +76,6 @@ static inline int pcibios_assign_all_busses(void)
        return 1;
 }
-/*
- * No special bus mastering setup handling.
- */
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-}
 #define PCIBIOS_MIN_MEM         0
 #define PCIBIOS_MIN_IO          0
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index 25567934a21e..a1bb59eecc18 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -395,6 +395,11 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
        /* Nothing needs to be done. */
 }
+void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling. */
+}
 /*
 * This can be called from the generic PCI layer, but doesn't need to
 * do anything.
diff --git a/arch/unicore32/include/asm/pci.h b/arch/unicore32/include/asm/pci.h
index c5b28b459535..dd3867727c35 100644
--- a/arch/unicore32/include/asm/pci.h
+++ b/arch/unicore32/include/asm/pci.h
@@ -17,11 +17,6 @@
 #include <asm-generic/pci.h>
 #include <mach/hardware.h> /* for PCIBIOS_MIN_* */
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq, int active)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 4892fbb54ebf..a8f07fe10cad 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -309,6 +309,11 @@ char * __devinit pcibios_setup(char *str)
        return str;
 }
+void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
 /*
 * From arch/i386/kernel/pci-i386.c:
 *
diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h
index 8e41071704a5..49ad773f4b9f 100644
--- a/arch/x86/include/asm/amd_nb.h
+++ b/arch/x86/include/asm/amd_nb.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_X86_AMD_NB_H
 #define _ASM_X86_AMD_NB_H
+#include <linux/ioport.h>
 #include <linux/pci.h>
 struct amd_nb_bus_dev_range {
@@ -13,6 +14,7 @@ extern const struct pci_device_id amd_nb_misc_ids[];
 extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
 extern bool early_is_amd_nb(u32 value);
+extern struct resource *amd_get_mmconfig_range(struct resource *res);
 extern int amd_cache_northbridges(void);
 extern void amd_flush_garts(void);
 extern int amd_numa_init(void);
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d498943b906c..df75d07571ce 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -112,19 +112,28 @@ static inline void x86_teardown_msi_irq(unsigned int irq)
 {
        x86_msi.teardown_msi_irq(irq);
 }
+static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
+{
+        x86_msi.restore_msi_irqs(dev, irq);
+}
 #define arch_setup_msi_irqs x86_setup_msi_irqs
 #define arch_teardown_msi_irqs x86_teardown_msi_irqs
 #define arch_teardown_msi_irq x86_teardown_msi_irq
+#define arch_restore_msi_irqs x86_restore_msi_irqs
 /* implemented in arch/x86/kernel/apic/io_apic. */
 int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
 void native_teardown_msi_irq(unsigned int irq);
+void native_restore_msi_irqs(struct pci_dev *dev, int irq);
 /* default to the implementation in drivers/lib/msi.c */
 #define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
+#define HAVE_DEFAULT_MSI_RESTORE_IRQS
 void default_teardown_msi_irqs(struct pci_dev *dev);
+void default_restore_msi_irqs(struct pci_dev *dev, int irq);
 #else
 #define native_setup_msi_irqs           NULL
 #define native_teardown_msi_irq         NULL
 #define default_teardown_msi_irqs       NULL
+#define default_restore_msi_irqs        NULL
 #endif
 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index e38197806853..b3a531746026 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -44,8 +44,6 @@ enum pci_bf_sort_state {
 /* pci-i386.c */
-extern unsigned int pcibios_max_latency;
 void pcibios_resource_survey(void);
 void pcibios_set_cache_line_size(void);
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 800f77c60051..b9676ae37ada 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -172,7 +172,7 @@ static inline void arch_fix_phys_package_id(int num, u32 slot)
 }
 struct pci_bus;
-void x86_pci_root_bus_res_quirks(struct pci_bus *b);
+void x86_pci_root_bus_resources(int bus, struct list_head *resources);
 #ifdef CONFIG_SMP
 #define mc_capable()    ((boot_cpu_data.x86_max_cores > 1) && \
diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h
index 1ac860a09849..517d4767ffdd 100644
--- a/arch/x86/include/asm/x86_init.h
+++ b/arch/x86/include/asm/x86_init.h
@@ -179,6 +179,7 @@ struct x86_msi_ops {
        int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
        void (*teardown_msi_irq)(unsigned int irq);
        void (*teardown_msi_irqs)(struct pci_dev *dev);
+        void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
 };
 extern struct x86_init_ops x86_init;
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 013c1810ce72..be16854591cc 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -119,6 +119,37 @@ bool __init early_is_amd_nb(u32 device)
        return false;
 }
+struct resource *amd_get_mmconfig_range(struct resource *res)
+{
+        u32 address;
+        u64 base, msr;
+        unsigned segn_busn_bits;
+        if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
+                return NULL;
+        /* assume all cpus from fam10h have mmconfig */
+        if (boot_cpu_data.x86 < 0x10)
+                return NULL;
+        address = MSR_FAM10H_MMIO_CONF_BASE;
+        rdmsrl(address, msr);
+        /* mmconfig is not enabled */
+        if (!(msr & FAM10H_MMIO_CONF_ENABLE))
+                return NULL;
+        base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
+        segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
+                         FAM10H_MMIO_CONF_BUSRANGE_MASK;
+        res->flags = IORESOURCE_MEM;
+        res->start = base;
+        res->end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
+        return res;
+}
 int amd_get_subcaches(int cpu)
 {
        struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 91f83e21b989..947a06ccc673 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -115,4 +115,5 @@ struct x86_msi_ops x86_msi = {
        .setup_msi_irqs = native_setup_msi_irqs,
        .teardown_msi_irq = native_teardown_msi_irq,
        .teardown_msi_irqs = default_teardown_msi_irqs,
+        .restore_msi_irqs = default_restore_msi_irqs,
 };
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 404f21a3ff9e..a312e76063a7 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -12,7 +12,7 @@ struct pci_root_info {
        char *name;
        unsigned int res_num;
        struct resource *res;
-        struct pci_bus *bus;
+        struct list_head *resources;
        int busnum;
 };
@@ -24,6 +24,12 @@ static int __init set_use_crs(const struct dmi_system_id *id)
        return 0;
 }
+static int __init set_nouse_crs(const struct dmi_system_id *id)
+{
+        pci_use_crs = false;
+        return 0;
+}
 static const struct dmi_system_id pci_use_crs_table[] __initconst = {
        /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
        {
@@ -54,6 +60,29 @@ static const struct dmi_system_id pci_use_crs_table[] __initconst = {
                        DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
                },
        },
+        /* Now for the blacklist.. */
+        /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
+        {
+                .callback = set_nouse_crs,
+                .ident = "Dell Studio 1557",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
+                        DMI_MATCH(DMI_BIOS_VERSION, "A09"),
+                },
+        },
+        /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
+        {
+                .callback = set_nouse_crs,
+                .ident = "Thinkpad SL510",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
+                        DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
+                        DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
+                },
+        },
        {}
 };
@@ -149,7 +178,7 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
        struct acpi_resource_address64 addr;
        acpi_status status;
        unsigned long flags;
-        u64 start, end;
+        u64 start, orig_end, end;
        status = resource_to_addr(acpi_res, &addr);
        if (!ACPI_SUCCESS(status))
@@ -165,7 +194,21 @@ setup_resource(struct acpi_resource *acpi_res, void *data)
                return AE_OK;
        start = addr.minimum + addr.translation_offset;
-        end = addr.maximum + addr.translation_offset;
+        orig_end = end = addr.maximum + addr.translation_offset;
+        /* Exclude non-addressable range or non-addressable portion of range */
+        end = min(end, (u64)iomem_resource.end);
+        if (end <= start) {
+                dev_info(&info->bridge->dev,
+                        "host bridge window [%#llx-%#llx] "
+                        "(ignored, not CPU addressable)\n", start, orig_end);
+                return AE_OK;
+        } else if (orig_end != end) {
+                dev_info(&info->bridge->dev,
+                        "host bridge window [%#llx-%#llx] "
+                        "([%#llx-%#llx] ignored, not CPU addressable)\n", 
+                        start, orig_end, end + 1, orig_end);
+        }
        res = &info->res[info->res_num];
        res->name = info->name;
@@ -261,23 +304,20 @@ static void add_resources(struct pci_root_info *info)
                                 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
                                 res, conflict->name, conflict);
                else
-                        pci_bus_add_resource(info->bus, res, 0);
+                        pci_add_resource(info->resources, res);
        }
 }
 static void
 get_current_resources(struct acpi_device *device, int busnum,
-                        int domain, struct pci_bus *bus)
+                      int domain, struct list_head *resources)
 {
        struct pci_root_info info;
        size_t size;
-        if (pci_use_crs)
-                pci_bus_remove_resources(bus);
        info.bridge = device;
-        info.bus = bus;
        info.res_num = 0;
+        info.resources = resources;
        acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
                                &info);
        if (!info.res_num)
@@ -286,7 +326,7 @@ get_current_resources(struct acpi_device *device, int busnum,
        size = sizeof(*info.res) * info.res_num;
        info.res = kmalloc(size, GFP_KERNEL);
        if (!info.res)
-                goto res_alloc_fail;
+                return;
        info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum);
        if (!info.name)
@@ -301,8 +341,6 @@ get_current_resources(struct acpi_device *device, int busnum,
 name_alloc_fail:
        kfree(info.res);
-res_alloc_fail:
-        return;
 }
 struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
@@ -310,6 +348,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
        struct acpi_device *device = root->device;
        int domain = root->segment;
        int busnum = root->secondary.start;
+        LIST_HEAD(resources);
        struct pci_bus *bus;
        struct pci_sysdata *sd;
        int node;
@@ -364,11 +403,15 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
                memcpy(bus->sysdata, sd, sizeof(*sd));
                kfree(sd);
        } else {
-                bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd);
+                get_current_resources(device, busnum, domain, &resources);
-                if (bus) {
+                if (list_empty(&resources))
-                        get_current_resources(device, busnum, domain, bus);
+                        x86_pci_root_bus_resources(busnum, &resources);
+                bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd,
+                                          &resources);
+                if (bus)
                        bus->subordinate = pci_scan_child_bus(bus);
-                }
+                else
+                        pci_free_resource_list(&resources);
        }
        /* After the PCI-E bus has been walked and all devices discovered,
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c
index 026e4931d162..0567df3890e1 100644
--- a/arch/x86/pci/amd_bus.c
+++ b/arch/x86/pci/amd_bus.c
@@ -30,34 +30,6 @@ static struct pci_hostbridge_probe pci_probes[] __initdata = {
        { 0, 0x18, PCI_VENDOR_ID_AMD, 0x1300 },
 };
-static u64 __initdata fam10h_mmconf_start;
-static u64 __initdata fam10h_mmconf_end;
-static void __init get_pci_mmcfg_amd_fam10h_range(void)
-{
-        u32 address;
-        u64 base, msr;
-        unsigned segn_busn_bits;
-        /* assume all cpus from fam10h have mmconf */
-        if (boot_cpu_data.x86 < 0x10)
-                return;
-        address = MSR_FAM10H_MMIO_CONF_BASE;
-        rdmsrl(address, msr);
-        /* mmconfig is not enable */
-        if (!(msr & FAM10H_MMIO_CONF_ENABLE))
-                return;
-        base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
-        segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
-                         FAM10H_MMIO_CONF_BUSRANGE_MASK;
-        fam10h_mmconf_start = base;
-        fam10h_mmconf_end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
-}
 #define RANGE_NUM 16
 /**
@@ -85,6 +57,9 @@ static int __init early_fill_mp_bus_info(void)
        u64 val;
        u32 address;
        bool found;
+        struct resource fam10h_mmconf_res, *fam10h_mmconf;
+        u64 fam10h_mmconf_start;
+        u64 fam10h_mmconf_end;
        if (!early_pci_allowed())
                return -1;
@@ -211,12 +186,17 @@ static int __init early_fill_mp_bus_info(void)
                subtract_range(range, RANGE_NUM, 0, end);
        /* get mmconfig */
-        get_pci_mmcfg_amd_fam10h_range();
+        fam10h_mmconf = amd_get_mmconfig_range(&fam10h_mmconf_res);
        /* need to take out mmconf range */
-        if (fam10h_mmconf_end) {
+        if (fam10h_mmconf) {
-                printk(KERN_DEBUG "Fam 10h mmconf [%llx, %llx]\n", fam10h_mmconf_start, fam10h_mmconf_end);
+                printk(KERN_DEBUG "Fam 10h mmconf %pR\n", fam10h_mmconf);
+                fam10h_mmconf_start = fam10h_mmconf->start;
+                fam10h_mmconf_end = fam10h_mmconf->end;
                subtract_range(range, RANGE_NUM, fam10h_mmconf_start,
                                 fam10h_mmconf_end + 1);
+        } else {
+                fam10h_mmconf_start = 0;
+                fam10h_mmconf_end = 0;
        }
        /* mmio resource */
@@ -403,7 +383,6 @@ static void __init pci_enable_pci_io_ecs(void)
                        ++n;
                }
        }
-        pr_info("Extended Config Space enabled on %u nodes\n", n);
 #endif
 }
diff --git a/arch/x86/pci/broadcom_bus.c b/arch/x86/pci/broadcom_bus.c
index ab8269b0da29..f3a7c569a403 100644
--- a/arch/x86/pci/broadcom_bus.c
+++ b/arch/x86/pci/broadcom_bus.c
@@ -15,10 +15,11 @@
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <asm/pci_x86.h>
+#include <asm/pci-direct.h>
 #include "bus_numa.h"
-static void __devinit cnb20le_res(struct pci_dev *dev)
+static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
 {
        struct pci_root_info *info;
        struct resource res;
@@ -26,21 +27,12 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
        u8 fbus, lbus;
        int i;
-#ifdef CONFIG_ACPI
-        /*
-         * We should get host bridge information from ACPI unless the BIOS
-         * doesn't support it.
-         */
-        if (acpi_os_get_root_pointer())
-                return;
-#endif
        info = &pci_root_info[pci_root_num];
        pci_root_num++;
        /* read the PCI bus numbers */
-        pci_read_config_byte(dev, 0x44, &fbus);
+        fbus = read_pci_config_byte(bus, slot, func, 0x44);
-        pci_read_config_byte(dev, 0x45, &lbus);
+        lbus = read_pci_config_byte(bus, slot, func, 0x45);
        info->bus_min = fbus;
        info->bus_max = lbus;
@@ -59,8 +51,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
        }
        /* read the non-prefetchable memory window */
-        pci_read_config_word(dev, 0xc0, &word1);
+        word1 = read_pci_config_16(bus, slot, func, 0xc0);
-        pci_read_config_word(dev, 0xc2, &word2);
+        word2 = read_pci_config_16(bus, slot, func, 0xc2);
        if (word1 != word2) {
                res.start = (word1 << 16) | 0x0000;
                res.end   = (word2 << 16) | 0xffff;
@@ -69,8 +61,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
        }
        /* read the prefetchable memory window */
-        pci_read_config_word(dev, 0xc4, &word1);
+        word1 = read_pci_config_16(bus, slot, func, 0xc4);
-        pci_read_config_word(dev, 0xc6, &word2);
+        word2 = read_pci_config_16(bus, slot, func, 0xc6);
        if (word1 != word2) {
                res.start = (word1 << 16) | 0x0000;
                res.end   = (word2 << 16) | 0xffff;
@@ -79,8 +71,8 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
        }
        /* read the IO port window */
-        pci_read_config_word(dev, 0xd0, &word1);
+        word1 = read_pci_config_16(bus, slot, func, 0xd0);
-        pci_read_config_word(dev, 0xd2, &word2);
+        word2 = read_pci_config_16(bus, slot, func, 0xd2);
        if (word1 != word2) {
                res.start = word1;
                res.end   = word2;
@@ -92,13 +84,37 @@ static void __devinit cnb20le_res(struct pci_dev *dev)
        res.start = fbus;
        res.end   = lbus;
        res.flags = IORESOURCE_BUS;
-        dev_info(&dev->dev, "CNB20LE PCI Host Bridge (domain %04x %pR)\n",
+        printk(KERN_INFO "CNB20LE PCI Host Bridge (domain 0000 %pR)\n", &res);
-                            pci_domain_nr(dev->bus), &res);
        for (i = 0; i < info->res_num; i++)
-                dev_info(&dev->dev, "host bridge window %pR\n", &info->res[i]);
+                printk(KERN_INFO "host bridge window %pR\n", &info->res[i]);
 }
-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_LE,
+static int __init broadcom_postcore_init(void)
-                        cnb20le_res);
+{
+        u8 bus = 0, slot = 0;
+        u32 id;
+        u16 vendor, device;
+#ifdef CONFIG_ACPI
+        /*
+         * We should get host bridge information from ACPI unless the BIOS
+         * doesn't support it.
+         */
+        if (acpi_os_get_root_pointer())
+                return 0;
+#endif
+        id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
+        vendor = id & 0xffff;
+        device = (id >> 16) & 0xffff;
+        if (vendor == PCI_VENDOR_ID_SERVERWORKS &&
+            device == PCI_DEVICE_ID_SERVERWORKS_LE) {
+                cnb20le_res(bus, slot, 0);
+                cnb20le_res(bus, slot, 1);
+        }
+        return 0;
+}
+postcore_initcall(broadcom_postcore_init);
diff --git a/arch/x86/pci/bus_numa.c b/arch/x86/pci/bus_numa.c
index 64a122883896..fd3f65510e9d 100644
--- a/arch/x86/pci/bus_numa.c
+++ b/arch/x86/pci/bus_numa.c
@@ -7,45 +7,50 @@
 int pci_root_num;
 struct pci_root_info pci_root_info[PCI_ROOT_NR];
-void x86_pci_root_bus_res_quirks(struct pci_bus *b)
+void x86_pci_root_bus_resources(int bus, struct list_head *resources)
 {
        int i;
        int j;
        struct pci_root_info *info;
-        /* don't go for it if _CRS is used already */
-        if (b->resource[0] != &ioport_resource ||
-            b->resource[1] != &iomem_resource)
-                return;
        if (!pci_root_num)
-                return;
+                goto default_resources;
        for (i = 0; i < pci_root_num; i++) {
-                if (pci_root_info[i].bus_min == b->number)
+                if (pci_root_info[i].bus_min == bus)
                        break;
        }
        if (i == pci_root_num)
-                return;
+                goto default_resources;
-        printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n",
+        printk(KERN_DEBUG "PCI: root bus %02x: hardware-probed resources\n",
-                        b->number);
+               bus);
-        pci_bus_remove_resources(b);
        info = &pci_root_info[i];
        for (j = 0; j < info->res_num; j++) {
                struct resource *res;
                struct resource *root;
                res = &info->res[j];
-                pci_bus_add_resource(b, res, 0);
+                pci_add_resource(resources, res);
                if (res->flags & IORESOURCE_IO)
                        root = &ioport_resource;
                else
                        root = &iomem_resource;
                insert_resource(root, res);
        }
+        return;
+default_resources:
+        /*
+         * We don't have any host bridge aperture information from the
+         * "native host bridge drivers," e.g., amd_bus or broadcom_bus,
+         * so fall back to the defaults historically used by pci_create_bus().
+         */
+        printk(KERN_DEBUG "PCI: root bus %02x: using default resources\n", bus);
+        pci_add_resource(resources, &ioport_resource);
+        pci_add_resource(resources, &iomem_resource);
 }
 void __devinit update_res(struct pci_root_info *info, resource_size_t start,
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 7962ccb4d9b2..323481e06ef8 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -164,9 +164,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *b)
 {
        struct pci_dev *dev;
-        /* root bus? */
-        if (!b->parent)
-                x86_pci_root_bus_res_quirks(b);
        pci_read_bridge_bases(b);
        list_for_each_entry(dev, &b->devices, bus_list)
                pcibios_fixup_device_resources(dev);
@@ -433,6 +430,7 @@ void __init dmi_check_pciprobe(void)
 struct pci_bus * __devinit pcibios_scan_root(int busnum)
 {
+        LIST_HEAD(resources);
        struct pci_bus *bus = NULL;
        struct pci_sysdata *sd;
@@ -456,9 +454,12 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)
        sd->node = get_mp_bus_to_node(busnum);
        printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
-        bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
+        x86_pci_root_bus_resources(busnum, &resources);
-        if (!bus)
+        bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
+        if (!bus) {
+                pci_free_resource_list(&resources);
                kfree(sd);
+        }
        return bus;
 }
@@ -639,6 +640,7 @@ int pci_ext_cfg_avail(struct pci_dev *dev)
 struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
 {
+        LIST_HEAD(resources);
        struct pci_bus *bus = NULL;
        struct pci_sysdata *sd;
@@ -653,9 +655,12 @@ struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops,
                return NULL;
        }
        sd->node = node;
-        bus = pci_scan_bus(busno, ops, sd);
+        x86_pci_root_bus_resources(busno, &resources);
-        if (!bus)
+        bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
+        if (!bus) {
+                pci_free_resource_list(&resources);
                kfree(sd);
+        }
        return bus;
 }
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 794b092d01ae..91821a1a0c3a 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -254,26 +254,6 @@ void __init pcibios_resource_survey(void)
 */
 fs_initcall(pcibios_assign_resources);
-/*
- *  If we set up a device for bus mastering, we need to check the latency
- *  timer as certain crappy BIOSes forget to set it properly.
- */
-unsigned int pcibios_max_latency = 255;
-void pcibios_set_master(struct pci_dev *dev)
-{
-        u8 lat;
-        pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
-        if (lat < 16)
-                lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
-        else if (lat > pcibios_max_latency)
-                lat = pcibios_max_latency;
-        else
-                return;
-        dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat);
-        pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
-}
 static const struct vm_operations_struct pci_mmap_ops = {
        .access = generic_access_phys,
 };
diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
index 2c2aeabc2609..a1df191129d3 100644
--- a/arch/x86/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
@@ -31,9 +31,6 @@ int __init pci_legacy_init(void)
        printk("PCI: Probing PCI hardware\n");
        pci_root_bus = pcibios_scan_root(0);
-        if (pci_root_bus)
-                pci_bus_add_devices(pci_root_bus);
        return 0;
 }
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 51abf02f9226..83e125b95ca6 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -153,8 +153,6 @@ int __init pci_numaq_init(void)
        raw_pci_ops = &pci_direct_conf1_mq;
        pci_root_bus = pcibios_scan_root(0);
-        if (pci_root_bus)
-                pci_bus_add_devices(pci_root_bus);
        if (num_online_nodes() > 1)
                for_each_online_node(quad) {
                        if (quad == 0)
diff --git a/arch/xtensa/include/asm/pci.h b/arch/xtensa/include/asm/pci.h
index 4609b0f15f1f..05244f07dd31 100644
--- a/arch/xtensa/include/asm/pci.h
+++ b/arch/xtensa/include/asm/pci.h
@@ -22,11 +22,6 @@
 extern struct pci_controller* pcibios_alloc_controller(void);
-static inline void pcibios_set_master(struct pci_dev *dev)
-{
-        /* No special bus mastering setup handling */
-}
 static inline void pcibios_penalize_isa_irq(int irq)
 {
        /* We don't do dynamic PCI IRQ allocation */
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index cd1026931203..61045c192e88 100644
--- a/arch/xtensa/kernel/pci.c
+++ b/arch/xtensa/kernel/pci.c
@@ -134,9 +134,46 @@ struct pci_controller * __init pcibios_alloc_controller(void)
        return pci_ctrl;
 }
+static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
+                                            struct list_head *resources)
+{
+        struct resource *res;
+        unsigned long io_offset;
+        int i;
+        io_offset = (unsigned long)pci_ctrl->io_space.base;
+        res = &pci_ctrl->io_resource;
+        if (!res->flags) {
+                if (io_offset)
+                        printk (KERN_ERR "I/O resource not set for host"
+                                " bridge %d\n", pci_ctrl->index);
+                res->start = 0;
+                res->end = IO_SPACE_LIMIT;
+                res->flags = IORESOURCE_IO;
+        }
+        res->start += io_offset;
+        res->end += io_offset;
+        pci_add_resource(resources, res);
+        for (i = 0; i < 3; i++) {
+                res = &pci_ctrl->mem_resources[i];
+                if (!res->flags) {
+                        if (i > 0)
+                                continue;
+                        printk(KERN_ERR "Memory resource not set for "
+                               "host bridge %d\n", pci_ctrl->index);
+                        res->start = 0;
+                        res->end = ~0U;
+                        res->flags = IORESOURCE_MEM;
+                }
+                pci_add_resource(resources, res);
+        }
+}
 static int __init pcibios_init(void)
 {
        struct pci_controller *pci_ctrl;
+        struct list_head resources;
        struct pci_bus *bus;
        int next_busno = 0, i;
@@ -145,19 +182,10 @@ static int __init pcibios_init(void)
        /* Scan all of the recorded PCI controllers.  */
        for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
                pci_ctrl->last_busno = 0xff;
-                bus = pci_scan_bus(pci_ctrl->first_busno, pci_ctrl->ops,
+                INIT_LIST_HEAD(&resources);
-                                   pci_ctrl);
+                pci_controller_apertures(pci_ctrl, &resources);
-                if (pci_ctrl->io_resource.flags) {
+                bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
-                        unsigned long offs;
+                                        pci_ctrl->ops, pci_ctrl, &resources);
-                        offs = (unsigned long)pci_ctrl->io_space.base;
-                        pci_ctrl->io_resource.start += offs;
-                        pci_ctrl->io_resource.end += offs;
-                        bus->resource[0] = &pci_ctrl->io_resource;
-                }
-                for (i = 0; i < 3; ++i)
-                        if (pci_ctrl->mem_resources[i].flags)
-                                bus->resource[i+1] =&pci_ctrl->mem_resources[i];
                pci_ctrl->bus = bus;
                pci_ctrl->last_busno = bus->subordinate;
                if (next_busno <= pci_ctrl->last_busno)
@@ -178,36 +206,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
        int i;
        io_offset = (unsigned long)pci_ctrl->io_space.base;
-        if (bus->parent == NULL) {
+        if (bus->parent) {
-                /* this is a host bridge - fill in its resources */
-                pci_ctrl->bus = bus;
-                bus->resource[0] = res = &pci_ctrl->io_resource;
-                if (!res->flags) {
-                        if (io_offset)
-                                printk (KERN_ERR "I/O resource not set for host"
-                                        " bridge %d\n", pci_ctrl->index);
-                        res->start = 0;
-                        res->end = IO_SPACE_LIMIT;
-                        res->flags = IORESOURCE_IO;
-                }
-                res->start += io_offset;
-                res->end += io_offset;
-                for (i = 0; i < 3; i++) {
-                        res = &pci_ctrl->mem_resources[i];
-                        if (!res->flags) {
-                                if (i > 0)
-                                        continue;
-                                printk(KERN_ERR "Memory resource not set for "
-                                       "host bridge %d\n", pci_ctrl->index);
-                                res->start = 0;
-                                res->end = ~0U;
-                                res->flags = IORESOURCE_MEM;
-                        }
-                        bus->resource[i+1] = res;
-                }
-        } else {
                /* This is a subordinate bridge */
                pci_read_bridge_bases(bus);
@@ -227,6 +226,11 @@ char __init *pcibios_setup(char *str)
        return str;
 }
+void pcibios_set_master(struct pci_dev *dev)
+{
+        /* No special bus mastering setup handling */
+}
 /* the next one is stolen from the alpha port... */
 void __init