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-rw-r--r--arch/arm/boot/dts/armada-380.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-385.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts2
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts1
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts12
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi24
-rw-r--r--arch/arm/configs/exynos_defconfig1
-rw-r--r--arch/arm/include/asm/trusted_foundations.h2
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c8
-rw-r--r--arch/arm/mach-exynos/firmware.c15
-rw-r--r--arch/arm/mach-imx/devices/platform-ipu-core.c2
-rw-r--r--arch/arm/mach-mvebu/mvebu-soc-id.c13
-rw-r--r--arch/arm/mach-omap2/board-flash.c2
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c3
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c25
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_54xx_data.c2
-rw-r--r--arch/arm/plat-omap/dma.c10
18 files changed, 85 insertions, 45 deletions
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 068031f0f263..6d0f03c98ee9 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -99,7 +99,7 @@
99 pcie@3,0 { 99 pcie@3,0 {
100 device_type = "pci"; 100 device_type = "pci";
101 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; 101 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
102 reg = <0x1000 0 0 0 0>; 102 reg = <0x1800 0 0 0 0>;
103 #address-cells = <3>; 103 #address-cells = <3>;
104 #size-cells = <2>; 104 #size-cells = <2>;
105 #interrupt-cells = <1>; 105 #interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index e2919f02e1d4..da801964a257 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -110,7 +110,7 @@
110 pcie@3,0 { 110 pcie@3,0 {
111 device_type = "pci"; 111 device_type = "pci";
112 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; 112 assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
113 reg = <0x1000 0 0 0 0>; 113 reg = <0x1800 0 0 0 0>;
114 #address-cells = <3>; 114 #address-cells = <3>;
115 #size-cells = <2>; 115 #size-cells = <2>;
116 #interrupt-cells = <1>; 116 #interrupt-cells = <1>;
@@ -131,7 +131,7 @@
131 pcie@4,0 { 131 pcie@4,0 {
132 device_type = "pci"; 132 device_type = "pci";
133 assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; 133 assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
134 reg = <0x1000 0 0 0 0>; 134 reg = <0x2000 0 0 0 0>;
135 #address-cells = <3>; 135 #address-cells = <3>;
136 #size-cells = <2>; 136 #size-cells = <2>;
137 #interrupt-cells = <1>; 137 #interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 366fc2cbcd64..c0e0eae16a27 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -641,7 +641,7 @@
641 trigger@3 { 641 trigger@3 {
642 reg = <3>; 642 reg = <3>;
643 trigger-name = "external"; 643 trigger-name = "external";
644 trigger-value = <0x13>; 644 trigger-value = <0xd>;
645 trigger-external; 645 trigger-external;
646 }; 646 };
647 }; 647 };
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 9583563dd0ef..8a558b7ac999 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -503,7 +503,7 @@
503 status = "okay"; 503 status = "okay";
504 504
505 ak8975@0c { 505 ak8975@0c {
506 compatible = "ak,ak8975"; 506 compatible = "asahi-kasei,ak8975";
507 reg = <0x0c>; 507 reg = <0x0c>;
508 gpios = <&gpj0 7 0>; 508 gpios = <&gpj0 7 0>;
509 }; 509 };
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 090f9830b129..cde19c818667 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -107,6 +107,7 @@
107 regulator-name = "VDD_IOPERI_1.8V"; 107 regulator-name = "VDD_IOPERI_1.8V";
108 regulator-min-microvolt = <1800000>; 108 regulator-min-microvolt = <1800000>;
109 regulator-max-microvolt = <1800000>; 109 regulator-max-microvolt = <1800000>;
110 regulator-always-on;
110 op_mode = <1>; 111 op_mode = <1>;
111 }; 112 };
112 113
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 80a3bf4c5986..896a2a6619e0 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -364,16 +364,4 @@
364 gpio-key,wakeup; 364 gpio-key,wakeup;
365 }; 365 };
366 }; 366 };
367
368 amba {
369 mdma1: mdma@11C10000 {
370 /*
371 * MDMA1 can support both secure and non-secure
372 * AXI transactions. When this is enabled in the kernel
373 * for boards that run in secure mode, we are getting
374 * imprecise external aborts causing the kernel to oops.
375 */
376 status = "disabled";
377 };
378 };
379}; 367};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index c3a9a66c5767..b69fbcb7dcb8 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -219,16 +219,6 @@
219 reg = <0x100440C0 0x20>; 219 reg = <0x100440C0 0x20>;
220 }; 220 };
221 221
222 mau_pd: power-domain@100440E0 {
223 compatible = "samsung,exynos4210-pd";
224 reg = <0x100440E0 0x20>;
225 };
226
227 g2d_pd: power-domain@10044100 {
228 compatible = "samsung,exynos4210-pd";
229 reg = <0x10044100 0x20>;
230 };
231
232 msc_pd: power-domain@10044120 { 222 msc_pd: power-domain@10044120 {
233 compatible = "samsung,exynos4210-pd"; 223 compatible = "samsung,exynos4210-pd";
234 reg = <0x10044120 0x20>; 224 reg = <0x10044120 0x20>;
@@ -336,6 +326,13 @@
336 #dma-cells = <1>; 326 #dma-cells = <1>;
337 #dma-channels = <8>; 327 #dma-channels = <8>;
338 #dma-requests = <1>; 328 #dma-requests = <1>;
329 /*
330 * MDMA1 can support both secure and non-secure
331 * AXI transactions. When this is enabled in the kernel
332 * for boards that run in secure mode, we are getting
333 * imprecise external aborts causing the kernel to oops.
334 */
335 status = "disabled";
339 }; 336 };
340 }; 337 };
341 338
@@ -385,7 +382,7 @@
385 spi_0: spi@12d20000 { 382 spi_0: spi@12d20000 {
386 compatible = "samsung,exynos4210-spi"; 383 compatible = "samsung,exynos4210-spi";
387 reg = <0x12d20000 0x100>; 384 reg = <0x12d20000 0x100>;
388 interrupts = <0 66 0>; 385 interrupts = <0 68 0>;
389 dmas = <&pdma0 5 386 dmas = <&pdma0 5
390 &pdma0 4>; 387 &pdma0 4>;
391 dma-names = "tx", "rx"; 388 dma-names = "tx", "rx";
@@ -401,7 +398,7 @@
401 spi_1: spi@12d30000 { 398 spi_1: spi@12d30000 {
402 compatible = "samsung,exynos4210-spi"; 399 compatible = "samsung,exynos4210-spi";
403 reg = <0x12d30000 0x100>; 400 reg = <0x12d30000 0x100>;
404 interrupts = <0 67 0>; 401 interrupts = <0 69 0>;
405 dmas = <&pdma1 5 402 dmas = <&pdma1 5
406 &pdma1 4>; 403 &pdma1 4>;
407 dma-names = "tx", "rx"; 404 dma-names = "tx", "rx";
@@ -417,7 +414,7 @@
417 spi_2: spi@12d40000 { 414 spi_2: spi@12d40000 {
418 compatible = "samsung,exynos4210-spi"; 415 compatible = "samsung,exynos4210-spi";
419 reg = <0x12d40000 0x100>; 416 reg = <0x12d40000 0x100>;
420 interrupts = <0 68 0>; 417 interrupts = <0 70 0>;
421 dmas = <&pdma0 7 418 dmas = <&pdma0 7
422 &pdma0 6>; 419 &pdma0 6>;
423 dma-names = "tx", "rx"; 420 dma-names = "tx", "rx";
@@ -730,6 +727,5 @@
730 interrupts = <0 112 0>; 727 interrupts = <0 112 0>;
731 clocks = <&clock 471>; 728 clocks = <&clock 471>;
732 clock-names = "secss"; 729 clock-names = "secss";
733 samsung,power-domain = <&g2d_pd>;
734 }; 730 };
735}; 731};
diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
index 4ce7b70ea901..e07a227ec0db 100644
--- a/arch/arm/configs/exynos_defconfig
+++ b/arch/arm/configs/exynos_defconfig
@@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
65CONFIG_I2C=y 65CONFIG_I2C=y
66CONFIG_I2C_MUX=y 66CONFIG_I2C_MUX=y
67CONFIG_I2C_ARB_GPIO_CHALLENGE=y 67CONFIG_I2C_ARB_GPIO_CHALLENGE=y
68CONFIG_I2C_EXYNOS5=y
68CONFIG_I2C_S3C2410=y 69CONFIG_I2C_S3C2410=y
69CONFIG_DEBUG_GPIO=y 70CONFIG_DEBUG_GPIO=y
70# CONFIG_HWMON is not set 71# CONFIG_HWMON is not set
diff --git a/arch/arm/include/asm/trusted_foundations.h b/arch/arm/include/asm/trusted_foundations.h
index b5f7705abcb0..624e1d436c6c 100644
--- a/arch/arm/include/asm/trusted_foundations.h
+++ b/arch/arm/include/asm/trusted_foundations.h
@@ -54,7 +54,9 @@ static inline void register_trusted_foundations(
54 */ 54 */
55 pr_err("No support for Trusted Foundations, continuing in degraded mode.\n"); 55 pr_err("No support for Trusted Foundations, continuing in degraded mode.\n");
56 pr_err("Secondary processors as well as CPU PM will be disabled.\n"); 56 pr_err("Secondary processors as well as CPU PM will be disabled.\n");
57#if IS_ENABLED(CONFIG_SMP)
57 setup_max_cpus = 0; 58 setup_max_cpus = 0;
59#endif
58 cpu_idle_poll_ctrl(true); 60 cpu_idle_poll_ctrl(true);
59} 61}
60 62
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index a0282928e9c1..7cd6f19945ed 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -1308,19 +1308,19 @@ static struct platform_device at91_adc_device = {
1308static struct at91_adc_trigger at91_adc_triggers[] = { 1308static struct at91_adc_trigger at91_adc_triggers[] = {
1309 [0] = { 1309 [0] = {
1310 .name = "timer-counter-0", 1310 .name = "timer-counter-0",
1311 .value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN, 1311 .value = 0x1,
1312 }, 1312 },
1313 [1] = { 1313 [1] = {
1314 .name = "timer-counter-1", 1314 .name = "timer-counter-1",
1315 .value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN, 1315 .value = 0x3,
1316 }, 1316 },
1317 [2] = { 1317 [2] = {
1318 .name = "timer-counter-2", 1318 .name = "timer-counter-2",
1319 .value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN, 1319 .value = 0x5,
1320 }, 1320 },
1321 [3] = { 1321 [3] = {
1322 .name = "external", 1322 .name = "external",
1323 .value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN, 1323 .value = 0xd,
1324 .is_external = true, 1324 .is_external = true,
1325 }, 1325 },
1326}; 1326};
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 932129ef26c6..aa01c4222b40 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -18,6 +18,8 @@
18 18
19#include <mach/map.h> 19#include <mach/map.h>
20 20
21#include <plat/cpu.h>
22
21#include "smc.h" 23#include "smc.h"
22 24
23static int exynos_do_idle(void) 25static int exynos_do_idle(void)
@@ -28,13 +30,24 @@ static int exynos_do_idle(void)
28 30
29static int exynos_cpu_boot(int cpu) 31static int exynos_cpu_boot(int cpu)
30{ 32{
33 /*
34 * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
35 * But, Exynos4212 has only one secondary CPU so second parameter
36 * isn't used for informing secure firmware about CPU id.
37 */
38 if (soc_is_exynos4212())
39 cpu = 0;
40
31 exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); 41 exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
32 return 0; 42 return 0;
33} 43}
34 44
35static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) 45static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
36{ 46{
37 void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu; 47 void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c;
48
49 if (!soc_is_exynos4212())
50 boot_reg += 4*cpu;
38 51
39 __raw_writel(boot_addr, boot_reg); 52 __raw_writel(boot_addr, boot_reg);
40 return 0; 53 return 0;
diff --git a/arch/arm/mach-imx/devices/platform-ipu-core.c b/arch/arm/mach-imx/devices/platform-ipu-core.c
index fc4dd7cedc11..6bd7c3f37ac0 100644
--- a/arch/arm/mach-imx/devices/platform-ipu-core.c
+++ b/arch/arm/mach-imx/devices/platform-ipu-core.c
@@ -77,7 +77,7 @@ struct platform_device *__init imx_alloc_mx3_camera(
77 77
78 pdev = platform_device_alloc("mx3-camera", 0); 78 pdev = platform_device_alloc("mx3-camera", 0);
79 if (!pdev) 79 if (!pdev)
80 goto err; 80 return ERR_PTR(-ENOMEM);
81 81
82 pdev->dev.dma_mask = kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL); 82 pdev->dev.dma_mask = kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
83 if (!pdev->dev.dma_mask) 83 if (!pdev->dev.dma_mask)
diff --git a/arch/arm/mach-mvebu/mvebu-soc-id.c b/arch/arm/mach-mvebu/mvebu-soc-id.c
index f3d4cf53f746..09520e19b78e 100644
--- a/arch/arm/mach-mvebu/mvebu-soc-id.c
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.c
@@ -108,7 +108,18 @@ static int __init mvebu_soc_id_init(void)
108 iounmap(pci_base); 108 iounmap(pci_base);
109 109
110res_ioremap: 110res_ioremap:
111 clk_disable_unprepare(clk); 111 /*
112 * If the PCIe unit is actually enabled and we have PCI
113 * support in the kernel, we intentionally do not release the
114 * reference to the clock. We want to keep it running since
115 * the bootloader does some PCIe link configuration that the
116 * kernel is for now unable to do, and gating the clock would
117 * make us loose this precious configuration.
118 */
119 if (!of_device_is_available(child) || !IS_ENABLED(CONFIG_PCI_MVEBU)) {
120 clk_disable_unprepare(clk);
121 clk_put(clk);
122 }
112 123
113clk_err: 124clk_err:
114 of_node_put(child); 125 of_node_put(child);
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index ac82512b9c8c..b6885e42c0a0 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
142 board_nand_data.nr_parts = nr_parts; 142 board_nand_data.nr_parts = nr_parts;
143 board_nand_data.devsize = nand_type; 143 board_nand_data.devsize = nand_type;
144 144
145 board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW; 145 board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_HW;
146 gpmc_nand_init(&board_nand_data, gpmc_t); 146 gpmc_nand_init(&board_nand_data, gpmc_t);
147} 147}
148#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ 148#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 8f5121b89688..eb8c75ec3b1a 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -456,7 +456,8 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = {
456 .clkdm_name = "dpll4_clkdm", 456 .clkdm_name = "dpll4_clkdm",
457}; 457};
458 458
459DEFINE_STRUCT_CLK(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names, dpll4_m5x2_ck_ops); 459DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names,
460 dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
460 461
461static struct clk dpll4_m5x2_ck_3630 = { 462static struct clk dpll4_m5x2_ck_3630 = {
462 .name = "dpll4_m5x2_ck", 463 .name = "dpll4_m5x2_ck",
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 01fc710c8181..2498ab025fa2 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -14,6 +14,7 @@
14#include <linux/cpuidle.h> 14#include <linux/cpuidle.h>
15#include <linux/cpu_pm.h> 15#include <linux/cpu_pm.h>
16#include <linux/export.h> 16#include <linux/export.h>
17#include <linux/clockchips.h>
17 18
18#include <asm/cpuidle.h> 19#include <asm/cpuidle.h>
19#include <asm/proc-fns.h> 20#include <asm/proc-fns.h>
@@ -83,6 +84,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
83{ 84{
84 struct idle_statedata *cx = state_ptr + index; 85 struct idle_statedata *cx = state_ptr + index;
85 u32 mpuss_can_lose_context = 0; 86 u32 mpuss_can_lose_context = 0;
87 int cpu_id = smp_processor_id();
86 88
87 /* 89 /*
88 * CPU0 has to wait and stay ON until CPU1 is OFF state. 90 * CPU0 has to wait and stay ON until CPU1 is OFF state.
@@ -110,6 +112,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
110 mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) && 112 mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
111 (cx->mpu_logic_state == PWRDM_POWER_OFF); 113 (cx->mpu_logic_state == PWRDM_POWER_OFF);
112 114
115 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
116
113 /* 117 /*
114 * Call idle CPU PM enter notifier chain so that 118 * Call idle CPU PM enter notifier chain so that
115 * VFP and per CPU interrupt context is saved. 119 * VFP and per CPU interrupt context is saved.
@@ -165,6 +169,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
165 if (dev->cpu == 0 && mpuss_can_lose_context) 169 if (dev->cpu == 0 && mpuss_can_lose_context)
166 cpu_cluster_pm_exit(); 170 cpu_cluster_pm_exit();
167 171
172 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
173
168fail: 174fail:
169 cpuidle_coupled_parallel_barrier(dev, &abort_barrier); 175 cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
170 cpu_done[dev->cpu] = false; 176 cpu_done[dev->cpu] = false;
@@ -172,6 +178,16 @@ fail:
172 return index; 178 return index;
173} 179}
174 180
181/*
182 * For each cpu, setup the broadcast timer because local timers
183 * stops for the states above C1.
184 */
185static void omap_setup_broadcast_timer(void *arg)
186{
187 int cpu = smp_processor_id();
188 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
189}
190
175static struct cpuidle_driver omap4_idle_driver = { 191static struct cpuidle_driver omap4_idle_driver = {
176 .name = "omap4_idle", 192 .name = "omap4_idle",
177 .owner = THIS_MODULE, 193 .owner = THIS_MODULE,
@@ -189,8 +205,7 @@ static struct cpuidle_driver omap4_idle_driver = {
189 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ 205 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
190 .exit_latency = 328 + 440, 206 .exit_latency = 328 + 440,
191 .target_residency = 960, 207 .target_residency = 960,
192 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED | 208 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
193 CPUIDLE_FLAG_TIMER_STOP,
194 .enter = omap_enter_idle_coupled, 209 .enter = omap_enter_idle_coupled,
195 .name = "C2", 210 .name = "C2",
196 .desc = "CPUx OFF, MPUSS CSWR", 211 .desc = "CPUx OFF, MPUSS CSWR",
@@ -199,8 +214,7 @@ static struct cpuidle_driver omap4_idle_driver = {
199 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ 214 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
200 .exit_latency = 460 + 518, 215 .exit_latency = 460 + 518,
201 .target_residency = 1100, 216 .target_residency = 1100,
202 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED | 217 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
203 CPUIDLE_FLAG_TIMER_STOP,
204 .enter = omap_enter_idle_coupled, 218 .enter = omap_enter_idle_coupled,
205 .name = "C3", 219 .name = "C3",
206 .desc = "CPUx OFF, MPUSS OSWR", 220 .desc = "CPUx OFF, MPUSS OSWR",
@@ -231,5 +245,8 @@ int __init omap4_idle_init(void)
231 if (!cpu_clkdm[0] || !cpu_clkdm[1]) 245 if (!cpu_clkdm[0] || !cpu_clkdm[1])
232 return -ENODEV; 246 return -ENODEV;
233 247
248 /* Configure the broadcast timer on each cpu */
249 on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
250
234 return cpuidle_register(&omap4_idle_driver, cpu_online_mask); 251 return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
235} 252}
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 892317294fdc..e829664e6a6c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -895,7 +895,7 @@ static struct omap_hwmod omap54xx_mcpdm_hwmod = {
895 * current exception. 895 * current exception.
896 */ 896 */
897 897
898 .flags = HWMOD_EXT_OPT_MAIN_CLK, 898 .flags = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
899 .main_clk = "pad_clks_ck", 899 .main_clk = "pad_clks_ck",
900 .prcm = { 900 .prcm = {
901 .omap4 = { 901 .omap4 = {
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5f5b975887fc..b5608b1f9fbd 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -70,6 +70,7 @@ static u32 errata;
70 70
71static struct omap_dma_global_context_registers { 71static struct omap_dma_global_context_registers {
72 u32 dma_irqenable_l0; 72 u32 dma_irqenable_l0;
73 u32 dma_irqenable_l1;
73 u32 dma_ocp_sysconfig; 74 u32 dma_ocp_sysconfig;
74 u32 dma_gcr; 75 u32 dma_gcr;
75} omap_dma_global_context; 76} omap_dma_global_context;
@@ -1973,10 +1974,17 @@ static struct irqaction omap24xx_dma_irq;
1973 1974
1974/*----------------------------------------------------------------------------*/ 1975/*----------------------------------------------------------------------------*/
1975 1976
1977/*
1978 * Note that we are currently using only IRQENABLE_L0 and L1.
1979 * As the DSP may be using IRQENABLE_L2 and L3, let's not
1980 * touch those for now.
1981 */
1976void omap_dma_global_context_save(void) 1982void omap_dma_global_context_save(void)
1977{ 1983{
1978 omap_dma_global_context.dma_irqenable_l0 = 1984 omap_dma_global_context.dma_irqenable_l0 =
1979 p->dma_read(IRQENABLE_L0, 0); 1985 p->dma_read(IRQENABLE_L0, 0);
1986 omap_dma_global_context.dma_irqenable_l1 =
1987 p->dma_read(IRQENABLE_L1, 0);
1980 omap_dma_global_context.dma_ocp_sysconfig = 1988 omap_dma_global_context.dma_ocp_sysconfig =
1981 p->dma_read(OCP_SYSCONFIG, 0); 1989 p->dma_read(OCP_SYSCONFIG, 0);
1982 omap_dma_global_context.dma_gcr = p->dma_read(GCR, 0); 1990 omap_dma_global_context.dma_gcr = p->dma_read(GCR, 0);
@@ -1991,6 +1999,8 @@ void omap_dma_global_context_restore(void)
1991 OCP_SYSCONFIG, 0); 1999 OCP_SYSCONFIG, 0);
1992 p->dma_write(omap_dma_global_context.dma_irqenable_l0, 2000 p->dma_write(omap_dma_global_context.dma_irqenable_l0,
1993 IRQENABLE_L0, 0); 2001 IRQENABLE_L0, 0);
2002 p->dma_write(omap_dma_global_context.dma_irqenable_l1,
2003 IRQENABLE_L1, 0);
1994 2004
1995 if (IS_DMA_ERRATA(DMA_ROMCODE_BUG)) 2005 if (IS_DMA_ERRATA(DMA_ROMCODE_BUG))
1996 p->dma_write(0x3 , IRQSTATUS_L0, 0); 2006 p->dma_write(0x3 , IRQSTATUS_L0, 0);