diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-imx/include/mach/dma-v1.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-ux500/devices-db8500.c | 1 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/dma.h | 67 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/sdma.h | 17 | ||||
-rw-r--r-- | arch/arm/plat-nomadik/include/plat/ste_dma40.h | 78 | ||||
-rw-r--r-- | arch/powerpc/include/asm/fsldma.h | 137 |
6 files changed, 127 insertions, 181 deletions
diff --git a/arch/arm/mach-imx/include/mach/dma-v1.h b/arch/arm/mach-imx/include/mach/dma-v1.h index 287431cc13e5..ac6fd713828a 100644 --- a/arch/arm/mach-imx/include/mach/dma-v1.h +++ b/arch/arm/mach-imx/include/mach/dma-v1.h | |||
@@ -27,6 +27,8 @@ | |||
27 | 27 | ||
28 | #define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) | 28 | #define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) |
29 | 29 | ||
30 | #include <mach/dma.h> | ||
31 | |||
30 | #define IMX_DMA_CHANNELS 16 | 32 | #define IMX_DMA_CHANNELS 16 |
31 | 33 | ||
32 | #define DMA_MODE_READ 0 | 34 | #define DMA_MODE_READ 0 |
@@ -96,12 +98,6 @@ int imx_dma_request(int channel, const char *name); | |||
96 | 98 | ||
97 | void imx_dma_free(int channel); | 99 | void imx_dma_free(int channel); |
98 | 100 | ||
99 | enum imx_dma_prio { | ||
100 | DMA_PRIO_HIGH = 0, | ||
101 | DMA_PRIO_MEDIUM = 1, | ||
102 | DMA_PRIO_LOW = 2 | ||
103 | }; | ||
104 | |||
105 | int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio); | 101 | int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio); |
106 | 102 | ||
107 | #endif /* __MACH_DMA_V1_H__ */ | 103 | #endif /* __MACH_DMA_V1_H__ */ |
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index 9280d2561111..58b3e723b183 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c | |||
@@ -193,7 +193,6 @@ static struct stedma40_platform_data dma40_plat_data = { | |||
193 | .memcpy_len = ARRAY_SIZE(dma40_memcpy_event), | 193 | .memcpy_len = ARRAY_SIZE(dma40_memcpy_event), |
194 | .memcpy_conf_phy = &dma40_memcpy_conf_phy, | 194 | .memcpy_conf_phy = &dma40_memcpy_conf_phy, |
195 | .memcpy_conf_log = &dma40_memcpy_conf_log, | 195 | .memcpy_conf_log = &dma40_memcpy_conf_log, |
196 | .llis_per_log = 8, | ||
197 | .disabled_channels = {-1}, | 196 | .disabled_channels = {-1}, |
198 | }; | 197 | }; |
199 | 198 | ||
diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h new file mode 100644 index 000000000000..ef7751546f5f --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/dma.h | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_MXC_DMA_H__ | ||
10 | #define __ASM_ARCH_MXC_DMA_H__ | ||
11 | |||
12 | #include <linux/scatterlist.h> | ||
13 | #include <linux/device.h> | ||
14 | #include <linux/dmaengine.h> | ||
15 | |||
16 | /* | ||
17 | * This enumerates peripheral types. Used for SDMA. | ||
18 | */ | ||
19 | enum sdma_peripheral_type { | ||
20 | IMX_DMATYPE_SSI, /* MCU domain SSI */ | ||
21 | IMX_DMATYPE_SSI_SP, /* Shared SSI */ | ||
22 | IMX_DMATYPE_MMC, /* MMC */ | ||
23 | IMX_DMATYPE_SDHC, /* SDHC */ | ||
24 | IMX_DMATYPE_UART, /* MCU domain UART */ | ||
25 | IMX_DMATYPE_UART_SP, /* Shared UART */ | ||
26 | IMX_DMATYPE_FIRI, /* FIRI */ | ||
27 | IMX_DMATYPE_CSPI, /* MCU domain CSPI */ | ||
28 | IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ | ||
29 | IMX_DMATYPE_SIM, /* SIM */ | ||
30 | IMX_DMATYPE_ATA, /* ATA */ | ||
31 | IMX_DMATYPE_CCM, /* CCM */ | ||
32 | IMX_DMATYPE_EXT, /* External peripheral */ | ||
33 | IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ | ||
34 | IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ | ||
35 | IMX_DMATYPE_DSP, /* DSP */ | ||
36 | IMX_DMATYPE_MEMORY, /* Memory */ | ||
37 | IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ | ||
38 | IMX_DMATYPE_SPDIF, /* SPDIF */ | ||
39 | IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ | ||
40 | IMX_DMATYPE_ASRC, /* ASRC */ | ||
41 | IMX_DMATYPE_ESAI, /* ESAI */ | ||
42 | }; | ||
43 | |||
44 | enum imx_dma_prio { | ||
45 | DMA_PRIO_HIGH = 0, | ||
46 | DMA_PRIO_MEDIUM = 1, | ||
47 | DMA_PRIO_LOW = 2 | ||
48 | }; | ||
49 | |||
50 | struct imx_dma_data { | ||
51 | int dma_request; /* DMA request line */ | ||
52 | enum sdma_peripheral_type peripheral_type; | ||
53 | int priority; | ||
54 | }; | ||
55 | |||
56 | static inline int imx_dma_is_ipu(struct dma_chan *chan) | ||
57 | { | ||
58 | return !strcmp(dev_name(chan->device->dev), "ipu-core"); | ||
59 | } | ||
60 | |||
61 | static inline int imx_dma_is_general_purpose(struct dma_chan *chan) | ||
62 | { | ||
63 | return !strcmp(dev_name(chan->device->dev), "imx-sdma") || | ||
64 | !strcmp(dev_name(chan->device->dev), "imx-dma"); | ||
65 | } | ||
66 | |||
67 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h new file mode 100644 index 000000000000..9be112227ac4 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/sdma.h | |||
@@ -0,0 +1,17 @@ | |||
1 | #ifndef __MACH_MXC_SDMA_H__ | ||
2 | #define __MACH_MXC_SDMA_H__ | ||
3 | |||
4 | /** | ||
5 | * struct sdma_platform_data - platform specific data for SDMA engine | ||
6 | * | ||
7 | * @sdma_version The version of this SDMA engine | ||
8 | * @cpu_name used to generate the firmware name | ||
9 | * @to_version CPU Tape out version | ||
10 | */ | ||
11 | struct sdma_platform_data { | ||
12 | int sdma_version; | ||
13 | char *cpu_name; | ||
14 | int to_version; | ||
15 | }; | ||
16 | |||
17 | #endif /* __MACH_MXC_SDMA_H__ */ | ||
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h index 5fbde4b8dc12..3dd42551de04 100644 --- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h +++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h | |||
@@ -1,10 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/plat-nomadik/include/plat/ste_dma40.h | 2 | * Copyright (C) ST-Ericsson SA 2007-2010 |
3 | * | 3 | * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson |
4 | * Copyright (C) ST-Ericsson 2007-2010 | 4 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson |
5 | * License terms: GNU General Public License (GPL) version 2 | 5 | * License terms: GNU General Public License (GPL) version 2 |
6 | * Author: Per Friden <per.friden@stericsson.com> | ||
7 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | ||
8 | */ | 6 | */ |
9 | 7 | ||
10 | 8 | ||
@@ -73,6 +71,9 @@ | |||
73 | #define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8 | 71 | #define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8 |
74 | #define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16 | 72 | #define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16 |
75 | 73 | ||
74 | /* Maximum number of possible physical channels */ | ||
75 | #define STEDMA40_MAX_PHYS 32 | ||
76 | |||
76 | enum stedma40_flow_ctrl { | 77 | enum stedma40_flow_ctrl { |
77 | STEDMA40_NO_FLOW_CTRL, | 78 | STEDMA40_NO_FLOW_CTRL, |
78 | STEDMA40_FLOW_CTRL, | 79 | STEDMA40_FLOW_CTRL, |
@@ -90,15 +91,8 @@ enum stedma40_periph_data_width { | |||
90 | STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT | 91 | STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT |
91 | }; | 92 | }; |
92 | 93 | ||
93 | struct stedma40_half_channel_info { | ||
94 | enum stedma40_endianess endianess; | ||
95 | enum stedma40_periph_data_width data_width; | ||
96 | int psize; | ||
97 | enum stedma40_flow_ctrl flow_ctrl; | ||
98 | }; | ||
99 | |||
100 | enum stedma40_xfer_dir { | 94 | enum stedma40_xfer_dir { |
101 | STEDMA40_MEM_TO_MEM, | 95 | STEDMA40_MEM_TO_MEM = 1, |
102 | STEDMA40_MEM_TO_PERIPH, | 96 | STEDMA40_MEM_TO_PERIPH, |
103 | STEDMA40_PERIPH_TO_MEM, | 97 | STEDMA40_PERIPH_TO_MEM, |
104 | STEDMA40_PERIPH_TO_PERIPH | 98 | STEDMA40_PERIPH_TO_PERIPH |
@@ -106,6 +100,21 @@ enum stedma40_xfer_dir { | |||
106 | 100 | ||
107 | 101 | ||
108 | /** | 102 | /** |
103 | * struct stedma40_chan_cfg - dst/src channel configuration | ||
104 | * | ||
105 | * @endianess: Endianess of the src/dst hardware | ||
106 | * @data_width: Data width of the src/dst hardware | ||
107 | * @p_size: Burst size | ||
108 | * @flow_ctrl: Flow control on/off. | ||
109 | */ | ||
110 | struct stedma40_half_channel_info { | ||
111 | enum stedma40_endianess endianess; | ||
112 | enum stedma40_periph_data_width data_width; | ||
113 | int psize; | ||
114 | enum stedma40_flow_ctrl flow_ctrl; | ||
115 | }; | ||
116 | |||
117 | /** | ||
109 | * struct stedma40_chan_cfg - Structure to be filled by client drivers. | 118 | * struct stedma40_chan_cfg - Structure to be filled by client drivers. |
110 | * | 119 | * |
111 | * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH | 120 | * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH |
@@ -114,10 +123,6 @@ enum stedma40_xfer_dir { | |||
114 | * @dst_dev_type: Dst device type | 123 | * @dst_dev_type: Dst device type |
115 | * @src_info: Parameters for dst half channel | 124 | * @src_info: Parameters for dst half channel |
116 | * @dst_info: Parameters for dst half channel | 125 | * @dst_info: Parameters for dst half channel |
117 | * @pre_transfer_data: Data to be passed on to the pre_transfer() function. | ||
118 | * @pre_transfer: Callback used if needed before preparation of transfer. | ||
119 | * Only called if device is set. size of bytes to transfer | ||
120 | * (in case of multiple element transfer size is size of the first element). | ||
121 | * | 126 | * |
122 | * | 127 | * |
123 | * This structure has to be filled by the client drivers. | 128 | * This structure has to be filled by the client drivers. |
@@ -131,10 +136,6 @@ struct stedma40_chan_cfg { | |||
131 | int dst_dev_type; | 136 | int dst_dev_type; |
132 | struct stedma40_half_channel_info src_info; | 137 | struct stedma40_half_channel_info src_info; |
133 | struct stedma40_half_channel_info dst_info; | 138 | struct stedma40_half_channel_info dst_info; |
134 | void *pre_transfer_data; | ||
135 | int (*pre_transfer) (struct dma_chan *chan, | ||
136 | void *data, | ||
137 | int size); | ||
138 | }; | 139 | }; |
139 | 140 | ||
140 | /** | 141 | /** |
@@ -147,7 +148,6 @@ struct stedma40_chan_cfg { | |||
147 | * @memcpy_len: length of memcpy | 148 | * @memcpy_len: length of memcpy |
148 | * @memcpy_conf_phy: default configuration of physical channel memcpy | 149 | * @memcpy_conf_phy: default configuration of physical channel memcpy |
149 | * @memcpy_conf_log: default configuration of logical channel memcpy | 150 | * @memcpy_conf_log: default configuration of logical channel memcpy |
150 | * @llis_per_log: number of max linked list items per logical channel | ||
151 | * @disabled_channels: A vector, ending with -1, that marks physical channels | 151 | * @disabled_channels: A vector, ending with -1, that marks physical channels |
152 | * that are for different reasons not available for the driver. | 152 | * that are for different reasons not available for the driver. |
153 | */ | 153 | */ |
@@ -159,23 +159,10 @@ struct stedma40_platform_data { | |||
159 | u32 memcpy_len; | 159 | u32 memcpy_len; |
160 | struct stedma40_chan_cfg *memcpy_conf_phy; | 160 | struct stedma40_chan_cfg *memcpy_conf_phy; |
161 | struct stedma40_chan_cfg *memcpy_conf_log; | 161 | struct stedma40_chan_cfg *memcpy_conf_log; |
162 | unsigned int llis_per_log; | 162 | int disabled_channels[STEDMA40_MAX_PHYS]; |
163 | int disabled_channels[8]; | ||
164 | }; | 163 | }; |
165 | 164 | ||
166 | /** | 165 | #ifdef CONFIG_STE_DMA40 |
167 | * setdma40_set_psize() - Used for changing the package size of an | ||
168 | * already configured dma channel. | ||
169 | * | ||
170 | * @chan: dmaengine handle | ||
171 | * @src_psize: new package side for src. (STEDMA40_PSIZE*) | ||
172 | * @src_psize: new package side for dst. (STEDMA40_PSIZE*) | ||
173 | * | ||
174 | * returns 0 on ok, otherwise negative error number. | ||
175 | */ | ||
176 | int stedma40_set_psize(struct dma_chan *chan, | ||
177 | int src_psize, | ||
178 | int dst_psize); | ||
179 | 166 | ||
180 | /** | 167 | /** |
181 | * stedma40_filter() - Provides stedma40_chan_cfg to the | 168 | * stedma40_filter() - Provides stedma40_chan_cfg to the |
@@ -238,4 +225,21 @@ dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, | |||
238 | direction, flags); | 225 | direction, flags); |
239 | } | 226 | } |
240 | 227 | ||
228 | #else | ||
229 | static inline bool stedma40_filter(struct dma_chan *chan, void *data) | ||
230 | { | ||
231 | return false; | ||
232 | } | ||
233 | |||
234 | static inline struct | ||
235 | dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, | ||
236 | dma_addr_t addr, | ||
237 | unsigned int size, | ||
238 | enum dma_data_direction direction, | ||
239 | unsigned long flags) | ||
240 | { | ||
241 | return NULL; | ||
242 | } | ||
243 | #endif | ||
244 | |||
241 | #endif | 245 | #endif |
diff --git a/arch/powerpc/include/asm/fsldma.h b/arch/powerpc/include/asm/fsldma.h deleted file mode 100644 index debc5ed96d6e..000000000000 --- a/arch/powerpc/include/asm/fsldma.h +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | /* | ||
2 | * Freescale MPC83XX / MPC85XX DMA Controller | ||
3 | * | ||
4 | * Copyright (c) 2009 Ira W. Snyder <iws@ovro.caltech.edu> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ARCH_POWERPC_ASM_FSLDMA_H__ | ||
12 | #define __ARCH_POWERPC_ASM_FSLDMA_H__ | ||
13 | |||
14 | #include <linux/slab.h> | ||
15 | #include <linux/dmaengine.h> | ||
16 | |||
17 | /* | ||
18 | * Definitions for the Freescale DMA controller's DMA_SLAVE implemention | ||
19 | * | ||
20 | * The Freescale DMA_SLAVE implementation was designed to handle many-to-many | ||
21 | * transfers. An example usage would be an accelerated copy between two | ||
22 | * scatterlists. Another example use would be an accelerated copy from | ||
23 | * multiple non-contiguous device buffers into a single scatterlist. | ||
24 | * | ||
25 | * A DMA_SLAVE transaction is defined by a struct fsl_dma_slave. This | ||
26 | * structure contains a list of hardware addresses that should be copied | ||
27 | * to/from the scatterlist passed into device_prep_slave_sg(). The structure | ||
28 | * also has some fields to enable hardware-specific features. | ||
29 | */ | ||
30 | |||
31 | /** | ||
32 | * struct fsl_dma_hw_addr | ||
33 | * @entry: linked list entry | ||
34 | * @address: the hardware address | ||
35 | * @length: length to transfer | ||
36 | * | ||
37 | * Holds a single physical hardware address / length pair for use | ||
38 | * with the DMAEngine DMA_SLAVE API. | ||
39 | */ | ||
40 | struct fsl_dma_hw_addr { | ||
41 | struct list_head entry; | ||
42 | |||
43 | dma_addr_t address; | ||
44 | size_t length; | ||
45 | }; | ||
46 | |||
47 | /** | ||
48 | * struct fsl_dma_slave | ||
49 | * @addresses: a linked list of struct fsl_dma_hw_addr structures | ||
50 | * @request_count: value for DMA request count | ||
51 | * @src_loop_size: setup and enable constant source-address DMA transfers | ||
52 | * @dst_loop_size: setup and enable constant destination address DMA transfers | ||
53 | * @external_start: enable externally started DMA transfers | ||
54 | * @external_pause: enable externally paused DMA transfers | ||
55 | * | ||
56 | * Holds a list of address / length pairs for use with the DMAEngine | ||
57 | * DMA_SLAVE API implementation for the Freescale DMA controller. | ||
58 | */ | ||
59 | struct fsl_dma_slave { | ||
60 | |||
61 | /* List of hardware address/length pairs */ | ||
62 | struct list_head addresses; | ||
63 | |||
64 | /* Support for extra controller features */ | ||
65 | unsigned int request_count; | ||
66 | unsigned int src_loop_size; | ||
67 | unsigned int dst_loop_size; | ||
68 | bool external_start; | ||
69 | bool external_pause; | ||
70 | }; | ||
71 | |||
72 | /** | ||
73 | * fsl_dma_slave_append - add an address/length pair to a struct fsl_dma_slave | ||
74 | * @slave: the &struct fsl_dma_slave to add to | ||
75 | * @address: the hardware address to add | ||
76 | * @length: the length of bytes to transfer from @address | ||
77 | * | ||
78 | * Add a hardware address/length pair to a struct fsl_dma_slave. Returns 0 on | ||
79 | * success, -ERRNO otherwise. | ||
80 | */ | ||
81 | static inline int fsl_dma_slave_append(struct fsl_dma_slave *slave, | ||
82 | dma_addr_t address, size_t length) | ||
83 | { | ||
84 | struct fsl_dma_hw_addr *addr; | ||
85 | |||
86 | addr = kzalloc(sizeof(*addr), GFP_ATOMIC); | ||
87 | if (!addr) | ||
88 | return -ENOMEM; | ||
89 | |||
90 | INIT_LIST_HEAD(&addr->entry); | ||
91 | addr->address = address; | ||
92 | addr->length = length; | ||
93 | |||
94 | list_add_tail(&addr->entry, &slave->addresses); | ||
95 | return 0; | ||
96 | } | ||
97 | |||
98 | /** | ||
99 | * fsl_dma_slave_free - free a struct fsl_dma_slave | ||
100 | * @slave: the struct fsl_dma_slave to free | ||
101 | * | ||
102 | * Free a struct fsl_dma_slave and all associated address/length pairs | ||
103 | */ | ||
104 | static inline void fsl_dma_slave_free(struct fsl_dma_slave *slave) | ||
105 | { | ||
106 | struct fsl_dma_hw_addr *addr, *tmp; | ||
107 | |||
108 | if (slave) { | ||
109 | list_for_each_entry_safe(addr, tmp, &slave->addresses, entry) { | ||
110 | list_del(&addr->entry); | ||
111 | kfree(addr); | ||
112 | } | ||
113 | |||
114 | kfree(slave); | ||
115 | } | ||
116 | } | ||
117 | |||
118 | /** | ||
119 | * fsl_dma_slave_alloc - allocate a struct fsl_dma_slave | ||
120 | * @gfp: the flags to pass to kmalloc when allocating this structure | ||
121 | * | ||
122 | * Allocate a struct fsl_dma_slave for use by the DMA_SLAVE API. Returns a new | ||
123 | * struct fsl_dma_slave on success, or NULL on failure. | ||
124 | */ | ||
125 | static inline struct fsl_dma_slave *fsl_dma_slave_alloc(gfp_t gfp) | ||
126 | { | ||
127 | struct fsl_dma_slave *slave; | ||
128 | |||
129 | slave = kzalloc(sizeof(*slave), gfp); | ||
130 | if (!slave) | ||
131 | return NULL; | ||
132 | |||
133 | INIT_LIST_HEAD(&slave->addresses); | ||
134 | return slave; | ||
135 | } | ||
136 | |||
137 | #endif /* __ARCH_POWERPC_ASM_FSLDMA_H__ */ | ||