diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/irqs.h | 146 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/regs-irq.h | 19 | ||||
-rw-r--r-- | arch/arm/plat-s5p/include/plat/irqs.h | 2 |
3 files changed, 167 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h new file mode 100644 index 000000000000..62c5175ef291 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h | |||
@@ -0,0 +1,146 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/irqs.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV210 - IRQ definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_IRQS_H | ||
14 | #define __ASM_ARCH_IRQS_H __FILE__ | ||
15 | |||
16 | #include <plat/irqs.h> | ||
17 | |||
18 | /* VIC0: System, DMA, Timer */ | ||
19 | |||
20 | #define IRQ_EINT0 S5P_IRQ_VIC0(0) | ||
21 | #define IRQ_EINT1 S5P_IRQ_VIC0(1) | ||
22 | #define IRQ_EINT2 S5P_IRQ_VIC0(2) | ||
23 | #define IRQ_EINT3 S5P_IRQ_VIC0(3) | ||
24 | #define IRQ_EINT4 S5P_IRQ_VIC0(4) | ||
25 | #define IRQ_EINT5 S5P_IRQ_VIC0(5) | ||
26 | #define IRQ_EINT6 S5P_IRQ_VIC0(6) | ||
27 | #define IRQ_EINT7 S5P_IRQ_VIC0(7) | ||
28 | #define IRQ_EINT8 S5P_IRQ_VIC0(8) | ||
29 | #define IRQ_EINT9 S5P_IRQ_VIC0(9) | ||
30 | #define IRQ_EINT10 S5P_IRQ_VIC0(10) | ||
31 | #define IRQ_EINT11 S5P_IRQ_VIC0(11) | ||
32 | #define IRQ_EINT12 S5P_IRQ_VIC0(12) | ||
33 | #define IRQ_EINT13 S5P_IRQ_VIC0(13) | ||
34 | #define IRQ_EINT14 S5P_IRQ_VIC0(14) | ||
35 | #define IRQ_EINT15 S5P_IRQ_VIC0(15) | ||
36 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | ||
37 | #define IRQ_BATF S5P_IRQ_VIC0(17) | ||
38 | #define IRQ_MDMA S5P_IRQ_VIC0(18) | ||
39 | #define IRQ_PDMA0 S5P_IRQ_VIC0(19) | ||
40 | #define IRQ_PDMA1 S5P_IRQ_VIC0(20) | ||
41 | #define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) | ||
42 | #define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) | ||
43 | #define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) | ||
44 | #define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) | ||
45 | #define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) | ||
46 | #define IRQ_SYSTIMER S5P_IRQ_VIC0(26) | ||
47 | #define IRQ_WDT S5P_IRQ_VIC0(27) | ||
48 | #define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) | ||
49 | #define IRQ_RTC_TIC S5P_IRQ_VIC0(29) | ||
50 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | ||
51 | #define IRQ_FIMC3 S5P_IRQ_VIC0(31) | ||
52 | |||
53 | /* VIC1: ARM, Power, Memory, Connectivity, Storage */ | ||
54 | |||
55 | #define IRQ_CORTEX0 S5P_IRQ_VIC1(0) | ||
56 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) | ||
57 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) | ||
58 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) | ||
59 | #define IRQ_CORTEX4 S5P_IRQ_VIC1(4) | ||
60 | #define IRQ_IEMAPC S5P_IRQ_VIC1(5) | ||
61 | #define IRQ_IEMIEC S5P_IRQ_VIC1(6) | ||
62 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | ||
63 | #define IRQ_NFC S5P_IRQ_VIC1(8) | ||
64 | #define IRQ_CFC S5P_IRQ_VIC1(9) | ||
65 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | ||
66 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | ||
67 | #define IRQ_UART2 S5P_IRQ_VIC1(12) | ||
68 | #define IRQ_UART3 S5P_IRQ_VIC1(13) | ||
69 | #define IRQ_IIC S5P_IRQ_VIC1(14) | ||
70 | #define IRQ_SPI0 S5P_IRQ_VIC1(15) | ||
71 | #define IRQ_SPI1 S5P_IRQ_VIC1(16) | ||
72 | #define IRQ_SPI2 S5P_IRQ_VIC1(17) | ||
73 | #define IRQ_IRDA S5P_IRQ_VIC1(18) | ||
74 | #define IRQ_CAN0 S5P_IRQ_VIC1(19) | ||
75 | #define IRQ_CAN1 S5P_IRQ_VIC1(20) | ||
76 | #define IRQ_HSIRX S5P_IRQ_VIC1(21) | ||
77 | #define IRQ_HSITX S5P_IRQ_VIC1(22) | ||
78 | #define IRQ_UHOST S5P_IRQ_VIC1(23) | ||
79 | #define IRQ_OTG S5P_IRQ_VIC1(24) | ||
80 | #define IRQ_MSM S5P_IRQ_VIC1(25) | ||
81 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) | ||
82 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) | ||
83 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) | ||
84 | #define IRQ_MIPICSI S5P_IRQ_VIC1(29) | ||
85 | #define IRQ_MIPIDSI S5P_IRQ_VIC1(30) | ||
86 | #define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31) | ||
87 | |||
88 | /* VIC2: Multimedia, Audio, Security */ | ||
89 | |||
90 | #define IRQ_LCD0 S5P_IRQ_VIC2(0) | ||
91 | #define IRQ_LCD1 S5P_IRQ_VIC2(1) | ||
92 | #define IRQ_LCD2 S5P_IRQ_VIC2(2) | ||
93 | #define IRQ_LCD3 S5P_IRQ_VIC2(3) | ||
94 | #define IRQ_ROTATOR S5P_IRQ_VIC2(4) | ||
95 | #define IRQ_FIMC0 S5P_IRQ_VIC2(5) | ||
96 | #define IRQ_FIMC1 S5P_IRQ_VIC2(6) | ||
97 | #define IRQ_FIMC2 S5P_IRQ_VIC2(7) | ||
98 | #define IRQ_JPEG S5P_IRQ_VIC2(8) | ||
99 | #define IRQ_2D S5P_IRQ_VIC2(9) | ||
100 | #define IRQ_3D S5P_IRQ_VIC2(10) | ||
101 | #define IRQ_MIXER S5P_IRQ_VIC2(11) | ||
102 | #define IRQ_HDMI S5P_IRQ_VIC2(12) | ||
103 | #define IRQ_IIC1 S5P_IRQ_VIC2(13) | ||
104 | #define IRQ_MFC S5P_IRQ_VIC2(14) | ||
105 | #define IRQ_TVENC S5P_IRQ_VIC2(15) | ||
106 | #define IRQ_I2S0 S5P_IRQ_VIC2(16) | ||
107 | #define IRQ_I2S1 S5P_IRQ_VIC2(17) | ||
108 | #define IRQ_I2S2 S5P_IRQ_VIC2(18) | ||
109 | #define IRQ_AC97 S5P_IRQ_VIC2(19) | ||
110 | #define IRQ_PCM0 S5P_IRQ_VIC2(20) | ||
111 | #define IRQ_PCM1 S5P_IRQ_VIC2(21) | ||
112 | #define IRQ_SPDIF S5P_IRQ_VIC2(22) | ||
113 | #define IRQ_ADC S5P_IRQ_VIC2(23) | ||
114 | #define IRQ_PENDN S5P_IRQ_VIC2(24) | ||
115 | #define IRQ_TC IRQ_PENDN | ||
116 | #define IRQ_KEYPAD S5P_IRQ_VIC2(25) | ||
117 | #define IRQ_CG S5P_IRQ_VIC2(26) | ||
118 | #define IRQ_SEC S5P_IRQ_VIC2(27) | ||
119 | #define IRQ_SECRX S5P_IRQ_VIC2(28) | ||
120 | #define IRQ_SECTX S5P_IRQ_VIC2(29) | ||
121 | #define IRQ_SDMIRQ S5P_IRQ_VIC2(30) | ||
122 | #define IRQ_SDMFIQ S5P_IRQ_VIC2(31) | ||
123 | |||
124 | /* VIC3: Etc */ | ||
125 | |||
126 | #define IRQ_IPC S5P_IRQ_VIC3(0) | ||
127 | #define IRQ_HOSTIF S5P_IRQ_VIC3(1) | ||
128 | #define IRQ_MMC3 S5P_IRQ_VIC3(2) | ||
129 | #define IRQ_CEC S5P_IRQ_VIC3(3) | ||
130 | #define IRQ_TSI S5P_IRQ_VIC3(4) | ||
131 | #define IRQ_MDNIE0 S5P_IRQ_VIC3(5) | ||
132 | #define IRQ_MDNIE1 S5P_IRQ_VIC3(6) | ||
133 | #define IRQ_MDNIE2 S5P_IRQ_VIC3(7) | ||
134 | #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) | ||
135 | #define IRQ_VIC_END S5P_IRQ_VIC3(31) | ||
136 | |||
137 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) | ||
138 | |||
139 | #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) | ||
140 | #define IRQ_EINT(x) S5P_EINT(x) | ||
141 | |||
142 | /* Set the default NR_IRQS */ | ||
143 | |||
144 | #define NR_IRQS (IRQ_EINT(31) + 1) | ||
145 | |||
146 | #endif /* ASM_ARCH_IRQS_H */ | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/arch/arm/mach-s5pv210/include/mach/regs-irq.h new file mode 100644 index 000000000000..5c3b104a7c86 --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-irq.h | |||
@@ -0,0 +1,19 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV210 - IRQ register definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_IRQ_H | ||
14 | #define __ASM_ARCH_REGS_IRQ_H __FILE__ | ||
15 | |||
16 | #include <asm/hardware/vic.h> | ||
17 | #include <mach/map.h> | ||
18 | |||
19 | #endif /* __ASM_ARCH_REGS_IRQ_H */ | ||
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h index 9daad19ccd0d..42e757f2e40c 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-s5p/include/plat/irqs.h | |||
@@ -29,6 +29,7 @@ | |||
29 | #define S5P_VIC0_BASE S5P_IRQ(0) | 29 | #define S5P_VIC0_BASE S5P_IRQ(0) |
30 | #define S5P_VIC1_BASE S5P_IRQ(32) | 30 | #define S5P_VIC1_BASE S5P_IRQ(32) |
31 | #define S5P_VIC2_BASE S5P_IRQ(64) | 31 | #define S5P_VIC2_BASE S5P_IRQ(64) |
32 | #define S5P_VIC3_BASE S5P_IRQ(96) | ||
32 | 33 | ||
33 | #define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32)) | 34 | #define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32)) |
34 | 35 | ||
@@ -76,6 +77,7 @@ | |||
76 | #define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) | 77 | #define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x)) |
77 | #define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x)) | 78 | #define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x)) |
78 | #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) | 79 | #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) |
80 | #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) | ||
79 | 81 | ||
80 | #define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x)) | 82 | #define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x)) |
81 | 83 | ||