213 files changed, 14233 insertions, 2295 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a04f507e7f2c..e53b0ed9d00a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -180,8 +180,8 @@ config ARCH_AT91
         bool "Atmel AT91"
         select GENERIC_GPIO
         help
-          This enables support for systems based on the Atmel AT91RM9200
-          and AT91SAM9xxx processors.
+          This enables support for systems based on the Atmel AT91RM9200,
+          AT91SAM9 and AT91CAP9 processors.
 
 config ARCH_CLPS7500
         bool "Cirrus CL-PS7500FE"
@@ -217,6 +217,7 @@ config ARCH_EP93XX
         bool "EP93xx-based"
         select ARM_AMBA
         select ARM_VIC
+        select GENERIC_GPIO
         help
           This enables support for the Cirrus EP93xx series of CPUs.
 
@@ -366,6 +367,7 @@ config ARCH_SA1100
         select ARCH_DISCONTIGMEM_ENABLE
         select ARCH_MTD_XIP
         select GENERIC_GPIO
+        select GENERIC_TIME
         help
           Support for StrongARM 11x0 based boards.
 
@@ -409,6 +411,17 @@ config ARCH_OMAP
         help
           Support for TI's OMAP platform (OMAP1 and OMAP2).
 
+config ARCH_MSM7X00A
+        bool "Qualcomm MSM7X00A"
+        select GENERIC_TIME
+        select GENERIC_CLOCKEVENTS
+        help
+          Support for Qualcomm MSM7X00A based systems.  This runs on the ARM11
+          apps processor of the MSM7X00A and depends on a shared memory
+          interface to the ARM9 modem processor which runs the baseband stack
+          and controls some vital subsystems (clock and power control, etc).
+          <http://www.cdmatech.com/products/msm7200_chipset_solution.jsp>
+
 endchoice
 
 source "arch/arm/mach-clps711x/Kconfig"
@@ -477,6 +490,8 @@ source "arch/arm/mach-davinci/Kconfig"
 
 source "arch/arm/mach-ks8695/Kconfig"
 
+source "arch/arm/mach-msm/Kconfig"
+
 # Definitions to make life easier
 config ARCH_ACORN
         bool
@@ -657,6 +672,7 @@ config HZ
         default 128 if ARCH_L7200
         default 200 if ARCH_EBSA110 || ARCH_S3C2410
         default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
+        default AT91_TIMER_HZ if ARCH_AT91
         default 100
 
 config AEABI
@@ -951,7 +967,7 @@ config FPE_FASTFPE
 
 config VFP
         bool "VFP-format floating point maths"
-        depends on CPU_V6 || CPU_ARM926T
+        depends on CPU_V6 || CPU_ARM926T || CPU_V7
         help
           Say Y to include VFP support code in the kernel. This is needed
           if your hardware includes a VFP unit.
@@ -961,6 +977,18 @@ config VFP
 
           Say N if your target does not have VFP hardware.
 
+config VFPv3
+        bool
+        depends on VFP
+        default y if CPU_V7
+
+config NEON
+        bool "Advanced SIMD (NEON) Extension support"
+        depends on VFPv3 && CPU_V7
+        help
+          Say Y to include support code for NEON, the ARMv7 Advanced SIMD
+          Extension.
+
 endmenu
 
 menu "Userspace binary formats"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 18101f5f5f24..192ee01a9ba2 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -43,6 +43,12 @@ config DEBUG_ERRORS
           you are concerned with the code size or don't want to see these
           messages.
 
+config DEBUG_STACK_USAGE
+        bool "Enable stack utilization instrumentation"
+        depends on DEBUG_KERNEL
+        help
+          Enables the display of the minimum amount of free stack which each
+          task has ever had available in the sysrq-T output.
 
 # These options are only for real kernel hackers who want to get their hands dirty.
 config DEBUG_LL
diff --git a/arch/arm/Kconfig.instrumentation b/arch/arm/Kconfig.instrumentation
index 63b8c6d5606a..453ad8e15d69 100644
--- a/arch/arm/Kconfig.instrumentation
+++ b/arch/arm/Kconfig.instrumentation
@@ -43,6 +43,16 @@ config OPROFILE_MPCORE
 config OPROFILE_ARM11_CORE
         bool
 
+config KPROBES
+        bool "Kprobes"
+        depends on KALLSYMS && MODULES && !UML && !XIP_KERNEL
+        help
+          Kprobes allows you to trap at almost any kernel address and
+          execute a callback function.  register_kprobe() establishes
+          a probepoint and specifies the callback.  Kprobes is useful
+          for kernel debugging, non-intrusive instrumentation and testing.
+          If in doubt, say "N".
+
 config MARKERS
         bool "Activate markers"
         help
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 35e56c99ad1d..dd220d189843 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -139,6 +139,7 @@ endif
  machine-$(CONFIG_ARCH_KS8695)     := ks8695
   incdir-$(CONFIG_ARCH_MXC)        := mxc
  machine-$(CONFIG_ARCH_MX3)        := mx3
+ machine-$(CONFIG_ARCH_MSM7X00A)   := msm
 
 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 5fde99f9d9f9..de9d9ee50958 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -44,10 +44,6 @@ ifeq ($(CONFIG_PXA_SHARPSL),y)
 OBJS            += head-sharpsl.o
 endif
 
-ifeq ($(CONFIG_ARCH_AT91RM9200),y)
-OBJS            += head-at91rm9200.o
-endif
-
 ifeq ($(CONFIG_CPU_BIG_ENDIAN),y)
 ifeq ($(CONFIG_CPU_CP15),y)
 OBJS            += big-endian.o
diff --git a/arch/arm/boot/compressed/head-at91rm9200.S b/arch/arm/boot/compressed/head-at91rm9200.S
deleted file mode 100644
index 11782ccd93a1..000000000000
--- a/arch/arm/boot/compressed/head-at91rm9200.S
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-at91rm9200.S
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-#include <asm/mach-types.h>
-
-                .section        ".start", "ax"
-
-                @ Atmel AT91RM9200-DK : 262
-                mov     r3,     #(MACH_TYPE_AT91RM9200DK & 0xff)
-                orr     r3, r3, #(MACH_TYPE_AT91RM9200DK & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ Cogent CSB337 : 399
-                mov     r3,     #(MACH_TYPE_CSB337 & 0xff)
-                orr     r3, r3, #(MACH_TYPE_CSB337 & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ Cogent CSB637 : 648
-                mov     r3,     #(MACH_TYPE_CSB637 & 0xff)
-                orr     r3, r3, #(MACH_TYPE_CSB637 & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ Atmel AT91RM9200-EK : 705
-                mov     r3,     #(MACH_TYPE_AT91RM9200EK & 0xff)
-                orr     r3, r3, #(MACH_TYPE_AT91RM9200EK & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ Conitec Carmeva : 769
-                mov     r3,     #(MACH_TYPE_CARMEVA & 0xff)
-                orr     r3, r3, #(MACH_TYPE_CARMEVA & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ KwikByte KB920x : 612
-                mov     r3,     #(MACH_TYPE_KB9200 & 0xff)
-                orr     r3, r3, #(MACH_TYPE_KB9200 & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ Embest ATEB9200 : 923
-                mov     r3,     #(MACH_TYPE_ATEB9200 & 0xff)
-                orr     r3, r3, #(MACH_TYPE_ATEB9200 & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ Sperry-Sun KAFA : 662
-                mov     r3,     #(MACH_TYPE_KAFA & 0xff)
-                orr     r3, r3, #(MACH_TYPE_KAFA & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ picotux 200 : 963
-                mov     r3,     #(MACH_TYPE_PICOTUX2XX & 0xff)
-                orr     r3, r3, #(MACH_TYPE_PICOTUX2XX & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ Ajeco 1ARM : 1075
-                mov     r3,     #(MACH_TYPE_ONEARM & 0xff)
-                orr     r3, r3, #(MACH_TYPE_ONEARM & 0xff00)
-                cmp     r7, r3
-                beq     99f
-
-                @ Unknown board, use the AT91RM9200DK board
-                @ mov   r7, #MACH_TYPE_AT91RM9200
-                mov     r7,     #(MACH_TYPE_AT91RM9200DK & 0xff)
-                orr     r7, r7, #(MACH_TYPE_AT91RM9200DK & 0xff00)
-
-99:
diff --git a/arch/arm/common/rtctime.c b/arch/arm/common/rtctime.c
index bf1075e1f571..f53bca46e23c 100644
--- a/arch/arm/common/rtctime.c
+++ b/arch/arm/common/rtctime.c
@@ -20,7 +20,6 @@
 #include <linux/capability.h>
 #include <linux/device.h>
 #include <linux/mutex.h>
-#include <linux/rtc.h>
 
 #include <asm/rtc.h>
 #include <asm/semaphore.h>
diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9adk_defconfig
new file mode 100644
index 000000000000..e32e73648129
--- /dev/null
+++ b/arch/arm/configs/at91cap9adk_defconfig
@@ -0,0 +1,1143 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24-rc8
+# Wed Jan 23 22:55:57 2008
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_GENERIC_TIME is not set
+# CONFIG_GENERIC_CLOCKEVENTS is not set
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAIR_USER_SCHED=y
+# CONFIG_FAIR_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+CONFIG_ARCH_AT91=y
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# Atmel AT91 System-on-Chip
+#
+# CONFIG_ARCH_AT91RM9200 is not set
+# CONFIG_ARCH_AT91SAM9260 is not set
+# CONFIG_ARCH_AT91SAM9261 is not set
+# CONFIG_ARCH_AT91SAM9263 is not set
+# CONFIG_ARCH_AT91SAM9RL is not set
+CONFIG_ARCH_AT91CAP9=y
+# CONFIG_ARCH_AT91X40 is not set
+CONFIG_AT91_PMC_UNIT=y
+
+#
+# AT91CAP9 Board Type
+#
+CONFIG_MACH_AT91CAP9ADK=y
+
+#
+# AT91 Board Options
+#
+CONFIG_MTD_AT91_DATAFLASH_CARD=y
+# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
+
+#
+# AT91 Feature Selections
+#
+CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+CONFIG_AT91_TIMER_HZ=100
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5TJ=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_COPY_V4WB=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_LEDS=y
+CONFIG_LEDS_TIMER=y
+CONFIG_LEDS_CPU=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_SUSPEND_UP_POSSIBLE=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x0
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=0
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_IMPA7 is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+CONFIG_MTD_NAND_AT91=y
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_ATMEL_SSC=y
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+CONFIG_LOGO_LINUX_VGA16=y
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HID_DEBUG=y
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_AT91=y
+# CONFIG_MMC_SPI is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+CONFIG_INSTRUMENTATION=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FORCED_INLINING=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig
index 970c8c772eb7..4264e273202d 100644
--- a/arch/arm/configs/collie_defconfig
+++ b/arch/arm/configs/collie_defconfig
@@ -367,7 +367,6 @@ CONFIG_MTD_CFI_UTIL=y
 # CONFIG_MTD_RAM is not set
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
-CONFIG_MTD_OBSOLETE_CHIPS=y
 CONFIG_MTD_SHARP=y
 # CONFIG_MTD_XIP is not set
 
diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig
new file mode 100644
index 000000000000..ae4c5e62086a
--- /dev/null
+++ b/arch/arm/configs/msm_defconfig
@@ -0,0 +1,895 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23
+# Wed Nov  7 01:36:45 2007
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_GPIOS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_PANIC_TIMEOUT=0
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_GOLDFISH is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+CONFIG_ARCH_MSM7X00A=y
+
+#
+# Boot options
+#
+
+#
+# Power management
+#
+
+#
+# MSM7200 Board Type
+#
+CONFIG_MACH_HALIBUT=y
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+# CONFIG_SERIAL_MSM_NOINIT is not set
+CONFIG_MSM_SMD=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_RESOURCES_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="mem=64M console=ttyMSM,115200n8"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_VFP is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+CONFIG_SUSPEND_UP_POSSIBLE=y
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+CONFIG_MTD_MSM_NAND=y
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_GOLDFISH_NAND is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+CONFIG_SMC91X=y
+# CONFIG_DM9000 is not set
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=y
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_BSDCOMP=y
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+CONFIG_MSM_RMNET=y
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GOLDFISH_EVENTS is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_MEP is not set
+CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI=y
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_UINPUT is not set
+CONFIG_INPUT_GPIO=y
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DCC_TTY=y
+# CONFIG_GOLDFISH_TTY is not set
+CONFIG_BINDER=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_MSM=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+CONFIG_SENSORS_PCA9633=y
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+CONFIG_SENSORS_AKM8976=y
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_HWMON is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_LOW_MEMORY_KILLER=y
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_MSM=y
+# CONFIG_FB_GOLDFISH is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# USB Function Support
+#
+CONFIG_USB_FUNCTION=y
+CONFIG_USB_FUNCTION_MSM_HSUSB=y
+# CONFIG_USB_FUNCTION_NULL is not set
+# CONFIG_USB_FUNCTION_ZERO is not set
+# CONFIG_USB_FUNCTION_LOOPBACK is not set
+CONFIG_USB_FUNCTION_ADB=y
+# CONFIG_MMC is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Android
+#
+# CONFIG_ANDROID_GADGET is not set
+# CONFIG_ANDROID_RAM_CONSOLE is not set
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_VIBRATOR=y
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_YAFFS_FS=y
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+CONFIG_SCHEDSTATS=y
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_FORCED_INLINING is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 593b56509f4f..faa761921153 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA)		+= dma-isa.o
 obj-$(CONFIG_PCI)               += bios32.o isa.o
 obj-$(CONFIG_SMP)               += smp.o
 obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
+obj-$(CONFIG_KPROBES)           += kprobes.o kprobes-decode.o
 obj-$(CONFIG_OABI_COMPAT)       += sys_oabi-compat.o
 
 obj-$(CONFIG_CRUNCH)            += crunch.o crunch-bits.o
diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c
index 0a3e9ad297d8..2f080a35a2d9 100644
--- a/arch/arm/kernel/dma-isa.c
+++ b/arch/arm/kernel/dma-isa.c
@@ -216,7 +216,7 @@ void __init isa_init_dma(dma_t *dma)
 
                 request_dma(DMA_ISA_CASCADE, "cascade");
 
-                for (i = 0; i < sizeof(dma_resources) / sizeof(dma_resources[0]); i++)
+                for (i = 0; i < ARRAY_SIZE(dma_resources); i++)
                         request_resource(&ioport_resource, dma_resources + i);
         }
 }
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 29dec080a604..a46d5b456765 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -11,8 +11,8 @@
  *
  *  Low-level vector interface routines
  *
- *  Note:  there is a StrongARM bug in the STMIA rn, {regs}^ instruction that causes
- *  it to save wrong values...  Be aware!
+ *  Note:  there is a StrongARM bug in the STMIA rn, {regs}^ instruction
+ *  that causes it to save wrong values...  Be aware!
  */
 
 #include <asm/memory.h>
@@ -58,6 +58,12 @@
 
         .endm
 
+#ifdef CONFIG_KPROBES
+        .section        .kprobes.text,"ax",%progbits
+#else
+        .text
+#endif
+
 /*
  * Invalid mode handlers
  */
@@ -112,8 +118,8 @@ common_invalid:
 #define SPFIX(code...)
 #endif
 
-        .macro  svc_entry
-        sub     sp, sp, #S_FRAME_SIZE
+        .macro  svc_entry, stack_hole=0
+        sub     sp, sp, #(S_FRAME_SIZE + \stack_hole)
  SPFIX( tst     sp, #4          )
  SPFIX( bicne   sp, sp, #4      )
         stmib   sp, {r1 - r12}
@@ -121,7 +127,7 @@ common_invalid:
         ldmia   r0, {r1 - r3}
         add     r5, sp, #S_SP           @ here for interlock avoidance
         mov     r4, #-1                 @  ""  ""      ""       ""
-        add     r0, sp, #S_FRAME_SIZE   @  ""  ""      ""       ""
+        add     r0, sp, #(S_FRAME_SIZE + \stack_hole)
  SPFIX( addne   r0, r0, #4      )
         str     r1, [sp]                @ save the "real" r0 copied
                                         @ from the exception stack
@@ -242,7 +248,14 @@ svc_preempt:
 
         .align  5
 __und_svc:
+#ifdef CONFIG_KPROBES
+        @ If a kprobe is about to simulate a "stmdb sp..." instruction,
+        @ it obviously needs free stack space which then will belong to
+        @ the saved context.
+        svc_entry 64
+#else
         svc_entry
+#endif
 
         @
         @ call emulation code, which returns using r9 if it has emulated
@@ -480,6 +493,13 @@ __und_usr:
  * co-processor instructions.  However, we have to watch out
  * for the ARM6/ARM7 SWI bug.
  *
+ * NEON is a special case that has to be handled here. Not all
+ * NEON instructions are co-processor instructions, so we have
+ * to make a special case of checking for them. Plus, there's
+ * five groups of them, so we have a table of mask/opcode pairs
+ * to check against, and if any match then we branch off into the
+ * NEON handler code.
+ *
  * Emulators may wish to make use of the following registers:
  *  r0  = instruction opcode.
  *  r2  = PC+4
@@ -488,6 +508,23 @@ __und_usr:
  *  lr  = unrecognised instruction return address
  */
 call_fpe:
+#ifdef CONFIG_NEON
+        adr     r6, .LCneon_opcodes
+2:
+        ldr     r7, [r6], #4                    @ mask value
+        cmp     r7, #0                          @ end mask?
+        beq     1f
+        and     r8, r0, r7
+        ldr     r7, [r6], #4                    @ opcode bits matching in mask
+        cmp     r8, r7                          @ NEON instruction?
+        bne     2b
+        get_thread_info r10
+        mov     r7, #1
+        strb    r7, [r10, #TI_USED_CP + 10]     @ mark CP#10 as used
+        strb    r7, [r10, #TI_USED_CP + 11]     @ mark CP#11 as used
+        b       do_vfp                          @ let VFP handler handle this
+1:
+#endif
         tst     r0, #0x08000000                 @ only CDP/CPRT/LDC/STC have bit 27
 #if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710)
         and     r8, r0, #0x0f000000             @ mask out op-code bits
@@ -537,6 +574,20 @@ call_fpe:
         mov     pc, lr                          @ CP#14 (Debug)
         mov     pc, lr                          @ CP#15 (Control)
 
+#ifdef CONFIG_NEON
+        .align  6
+
+.LCneon_opcodes:
+        .word   0xfe000000                      @ mask
+        .word   0xf2000000                      @ opcode
+
+        .word   0xff100000                      @ mask
+        .word   0xf4000000                      @ opcode
+
+        .word   0x00000000                      @ mask
+        .word   0x00000000                      @ opcode
+#endif
+
 do_fpe:
         enable_irq
         ldr     r4, .LCfp
@@ -555,7 +606,7 @@ do_fpe:
         .data
 ENTRY(fp_enter)
         .word   no_fp
-        .text
+        .previous
 
 no_fp:  mov     pc, lr
 
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 33e6cc2ffd3b..6c90c50a9ee3 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -72,7 +72,7 @@ no_work_pending:
         ldr     r1, [sp, #S_PSR]                @ get calling cpsr
         ldr     lr, [sp, #S_PC]!                @ get pc
         msr     spsr_cxsf, r1                   @ save in spsr_svc
-        ldmdb   sp, {r0 - lr}^                  @ get calling r1 - lr
+        ldmdb   sp, {r0 - lr}^                  @ get calling r0 - lr
         mov     r0, r0
         add     sp, sp, #S_FRAME_SIZE - S_PC
         movs    pc, lr                          @ return & move spsr_svc into cpsr
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c
new file mode 100644
index 000000000000..d51bc8b60557
--- /dev/null
+++ b/arch/arm/kernel/kprobes-decode.c
@@ -0,0 +1,1529 @@
+/*
+ * arch/arm/kernel/kprobes-decode.c
+ *
+ * Copyright (C) 2006, 2007 Motorola Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ */
+
+/*
+ * We do not have hardware single-stepping on ARM, This
+ * effort is further complicated by the ARM not having a
+ * "next PC" register.  Instructions that change the PC
+ * can't be safely single-stepped in a MP environment, so
+ * we have a lot of work to do:
+ *
+ * In the prepare phase:
+ *   *) If it is an instruction that does anything
+ *      with the CPU mode, we reject it for a kprobe.
+ *      (This is out of laziness rather than need.  The
+ *      instructions could be simulated.)
+ *
+ *   *) Otherwise, decode the instruction rewriting its
+ *      registers to take fixed, ordered registers and
+ *      setting a handler for it to run the instruction.
+ *
+ * In the execution phase by an instruction's handler:
+ *
+ *   *) If the PC is written to by the instruction, the
+ *      instruction must be fully simulated in software.
+ *      If it is a conditional instruction, the handler
+ *      will use insn[0] to copy its condition code to
+ *      set r0 to 1 and insn[1] to "mov pc, lr" to return.
+ *
+ *   *) Otherwise, a modified form of the instruction is
+ *      directly executed.  Its handler calls the
+ *      instruction in insn[0].  In insn[1] is a
+ *      "mov pc, lr" to return.
+ *
+ *      Before calling, load up the reordered registers
+ *      from the original instruction's registers.  If one
+ *      of the original input registers is the PC, compute
+ *      and adjust the appropriate input register.
+ *
+ *      After call completes, copy the output registers to
+ *      the original instruction's original registers.
+ *
+ * We don't use a real breakpoint instruction since that
+ * would have us in the kernel go from SVC mode to SVC
+ * mode losing the link register.  Instead we use an
+ * undefined instruction.  To simplify processing, the
+ * undefined instruction used for kprobes must be reserved
+ * exclusively for kprobes use.
+ *
+ * TODO: ifdef out some instruction decoding based on architecture.
+ */
+
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+
+#define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
+
+#define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
+
+#define PSR_fs  (PSR_f|PSR_s)
+
+#define KPROBE_RETURN_INSTRUCTION       0xe1a0f00e      /* mov pc, lr */
+#define SET_R0_TRUE_INSTRUCTION         0xe3a00001      /* mov  r0, #1 */
+
+#define truecc_insn(insn)       (((insn) & 0xf0000000) | \
+                                 (SET_R0_TRUE_INSTRUCTION & 0x0fffffff))
+
+typedef long (insn_0arg_fn_t)(void);
+typedef long (insn_1arg_fn_t)(long);
+typedef long (insn_2arg_fn_t)(long, long);
+typedef long (insn_3arg_fn_t)(long, long, long);
+typedef long (insn_4arg_fn_t)(long, long, long, long);
+typedef long long (insn_llret_0arg_fn_t)(void);
+typedef long long (insn_llret_3arg_fn_t)(long, long, long);
+typedef long long (insn_llret_4arg_fn_t)(long, long, long, long);
+
+union reg_pair {
+        long long       dr;
+#ifdef __LITTLE_ENDIAN
+        struct { long   r0, r1; };
+#else
+        struct { long   r1, r0; };
+#endif
+};
+
+/*
+ * For STR and STM instructions, an ARM core may choose to use either
+ * a +8 or a +12 displacement from the current instruction's address.
+ * Whichever value is chosen for a given core, it must be the same for
+ * both instructions and may not change.  This function measures it.
+ */
+
+static int str_pc_offset;
+
+static void __init find_str_pc_offset(void)
+{
+        int addr, scratch, ret;
+
+        __asm__ (
+                "sub    %[ret], pc, #4          \n\t"
+                "str    pc, %[addr]             \n\t"
+                "ldr    %[scr], %[addr]         \n\t"
+                "sub    %[ret], %[scr], %[ret]  \n\t"
+                : [ret] "=r" (ret), [scr] "=r" (scratch), [addr] "+m" (addr));
+
+        str_pc_offset = ret;
+}
+
+/*
+ * The insnslot_?arg_r[w]flags() functions below are to keep the
+ * msr -> *fn -> mrs instruction sequences indivisible so that
+ * the state of the CPSR flags aren't inadvertently modified
+ * just before or just after the call.
+ */
+
+static inline long __kprobes
+insnslot_0arg_rflags(long cpsr, insn_0arg_fn_t *fn)
+{
+        register long ret asm("r0");
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[cpsr]        \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                : "=r" (ret)
+                : [cpsr] "r" (cpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        return ret;
+}
+
+static inline long long __kprobes
+insnslot_llret_0arg_rflags(long cpsr, insn_llret_0arg_fn_t *fn)
+{
+        register long ret0 asm("r0");
+        register long ret1 asm("r1");
+        union reg_pair fnr;
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[cpsr]        \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                : "=r" (ret0), "=r" (ret1)
+                : [cpsr] "r" (cpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        fnr.r0 = ret0;
+        fnr.r1 = ret1;
+        return fnr.dr;
+}
+
+static inline long __kprobes
+insnslot_1arg_rflags(long r0, long cpsr, insn_1arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long ret asm("r0");
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[cpsr]        \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                : "=r" (ret)
+                : "0" (rr0), [cpsr] "r" (cpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        return ret;
+}
+
+static inline long __kprobes
+insnslot_2arg_rflags(long r0, long r1, long cpsr, insn_2arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long rr1 asm("r1") = r1;
+        register long ret asm("r0");
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[cpsr]        \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                : "=r" (ret)
+                : "0" (rr0), "r" (rr1),
+                  [cpsr] "r" (cpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        return ret;
+}
+
+static inline long __kprobes
+insnslot_3arg_rflags(long r0, long r1, long r2, long cpsr, insn_3arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long rr1 asm("r1") = r1;
+        register long rr2 asm("r2") = r2;
+        register long ret asm("r0");
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[cpsr]        \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                : "=r" (ret)
+                : "0" (rr0), "r" (rr1), "r" (rr2),
+                  [cpsr] "r" (cpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        return ret;
+}
+
+static inline long long __kprobes
+insnslot_llret_3arg_rflags(long r0, long r1, long r2, long cpsr,
+                           insn_llret_3arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long rr1 asm("r1") = r1;
+        register long rr2 asm("r2") = r2;
+        register long ret0 asm("r0");
+        register long ret1 asm("r1");
+        union reg_pair fnr;
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[cpsr]        \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                : "=r" (ret0), "=r" (ret1)
+                : "0" (rr0), "r" (rr1), "r" (rr2),
+                  [cpsr] "r" (cpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        fnr.r0 = ret0;
+        fnr.r1 = ret1;
+        return fnr.dr;
+}
+
+static inline long __kprobes
+insnslot_4arg_rflags(long r0, long r1, long r2, long r3, long cpsr,
+                     insn_4arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long rr1 asm("r1") = r1;
+        register long rr2 asm("r2") = r2;
+        register long rr3 asm("r3") = r3;
+        register long ret asm("r0");
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[cpsr]        \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                : "=r" (ret)
+                : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
+                  [cpsr] "r" (cpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        return ret;
+}
+
+static inline long __kprobes
+insnslot_1arg_rwflags(long r0, long *cpsr, insn_1arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long ret asm("r0");
+        long oldcpsr = *cpsr;
+        long newcpsr;
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[oldcpsr]     \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                "mrs    %[newcpsr], cpsr        \n\t"
+                : "=r" (ret), [newcpsr] "=r" (newcpsr)
+                : "0" (rr0), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
+        return ret;
+}
+
+static inline long __kprobes
+insnslot_2arg_rwflags(long r0, long r1, long *cpsr, insn_2arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long rr1 asm("r1") = r1;
+        register long ret asm("r0");
+        long oldcpsr = *cpsr;
+        long newcpsr;
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[oldcpsr]     \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                "mrs    %[newcpsr], cpsr        \n\t"
+                : "=r" (ret), [newcpsr] "=r" (newcpsr)
+                : "0" (rr0), "r" (rr1), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
+        return ret;
+}
+
+static inline long __kprobes
+insnslot_3arg_rwflags(long r0, long r1, long r2, long *cpsr,
+                      insn_3arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long rr1 asm("r1") = r1;
+        register long rr2 asm("r2") = r2;
+        register long ret asm("r0");
+        long oldcpsr = *cpsr;
+        long newcpsr;
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[oldcpsr]     \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                "mrs    %[newcpsr], cpsr        \n\t"
+                : "=r" (ret), [newcpsr] "=r" (newcpsr)
+                : "0" (rr0), "r" (rr1), "r" (rr2),
+                  [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
+        return ret;
+}
+
+static inline long __kprobes
+insnslot_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr,
+                      insn_4arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long rr1 asm("r1") = r1;
+        register long rr2 asm("r2") = r2;
+        register long rr3 asm("r3") = r3;
+        register long ret asm("r0");
+        long oldcpsr = *cpsr;
+        long newcpsr;
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[oldcpsr]     \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                "mrs    %[newcpsr], cpsr        \n\t"
+                : "=r" (ret), [newcpsr] "=r" (newcpsr)
+                : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
+                  [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
+        return ret;
+}
+
+static inline long long __kprobes
+insnslot_llret_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr,
+                            insn_llret_4arg_fn_t *fn)
+{
+        register long rr0 asm("r0") = r0;
+        register long rr1 asm("r1") = r1;
+        register long rr2 asm("r2") = r2;
+        register long rr3 asm("r3") = r3;
+        register long ret0 asm("r0");
+        register long ret1 asm("r1");
+        long oldcpsr = *cpsr;
+        long newcpsr;
+        union reg_pair fnr;
+
+        __asm__ __volatile__ (
+                "msr    cpsr_fs, %[oldcpsr]     \n\t"
+                "mov    lr, pc                  \n\t"
+                "mov    pc, %[fn]               \n\t"
+                "mrs    %[newcpsr], cpsr        \n\t"
+                : "=r" (ret0), "=r" (ret1), [newcpsr] "=r" (newcpsr)
+                : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
+                  [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
+                : "lr", "cc"
+        );
+        *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
+        fnr.r0 = ret0;
+        fnr.r1 = ret1;
+        return fnr.dr;
+}
+
+/*
+ * To avoid the complications of mimicing single-stepping on a
+ * processor without a Next-PC or a single-step mode, and to
+ * avoid having to deal with the side-effects of boosting, we
+ * simulate or emulate (almost) all ARM instructions.
+ *
+ * "Simulation" is where the instruction's behavior is duplicated in
+ * C code.  "Emulation" is where the original instruction is rewritten
+ * and executed, often by altering its registers.
+ *
+ * By having all behavior of the kprobe'd instruction completed before
+ * returning from the kprobe_handler(), all locks (scheduler and
+ * interrupt) can safely be released.  There is no need for secondary
+ * breakpoints, no race with MP or preemptable kernels, nor having to
+ * clean up resources counts at a later time impacting overall system
+ * performance.  By rewriting the instruction, only the minimum registers
+ * need to be loaded and saved back optimizing performance.
+ *
+ * Calling the insnslot_*_rwflags version of a function doesn't hurt
+ * anything even when the CPSR flags aren't updated by the
+ * instruction.  It's just a little slower in return for saving
+ * a little space by not having a duplicate function that doesn't
+ * update the flags.  (The same optimization can be said for
+ * instructions that do or don't perform register writeback)
+ * Also, instructions can either read the flags, only write the
+ * flags, or read and write the flags.  To save combinations
+ * rather than for sheer performance, flag functions just assume
+ * read and write of flags.
+ */
+
+static void __kprobes simulate_bbl(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        long iaddr = (long)p->addr;
+        int disp  = branch_displacement(insn);
+
+        if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn))
+                return;
+
+        if (insn & (1 << 24))
+                regs->ARM_lr = iaddr + 4;
+
+        regs->ARM_pc = iaddr + 8 + disp;
+}
+
+static void __kprobes simulate_blx1(struct kprobe *p, struct pt_regs *regs)
+{
+        kprobe_opcode_t insn = p->opcode;
+        long iaddr = (long)p->addr;
+        int disp = branch_displacement(insn);
+
+        regs->ARM_lr = iaddr + 4;
+        regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2);
+        regs->ARM_cpsr |= PSR_T_BIT;
+}
+
+static void __kprobes simulate_blx2bx(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rm = insn & 0xf;
+        long rmv = regs->uregs[rm];
+
+        if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn))
+                return;
+
+        if (insn & (1 << 5))
+                regs->ARM_lr = (long)p->addr + 4;
+
+        regs->ARM_pc = rmv & ~0x1;
+        regs->ARM_cpsr &= ~PSR_T_BIT;
+        if (rmv & 0x1)
+                regs->ARM_cpsr |= PSR_T_BIT;
+}
+
+static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rn = (insn >> 16) & 0xf;
+        int lbit = insn & (1 << 20);
+        int wbit = insn & (1 << 21);
+        int ubit = insn & (1 << 23);
+        int pbit = insn & (1 << 24);
+        long *addr = (long *)regs->uregs[rn];
+        int reg_bit_vector;
+        int reg_count;
+
+        if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn))
+                return;
+
+        reg_count = 0;
+        reg_bit_vector = insn & 0xffff;
+        while (reg_bit_vector) {
+                reg_bit_vector &= (reg_bit_vector - 1);
+                ++reg_count;
+        }
+
+        if (!ubit)
+                addr -= reg_count;
+        addr += (!pbit ^ !ubit);
+
+        reg_bit_vector = insn & 0xffff;
+        while (reg_bit_vector) {
+                int reg = __ffs(reg_bit_vector);
+                reg_bit_vector &= (reg_bit_vector - 1);
+                if (lbit)
+                        regs->uregs[reg] = *addr++;
+                else
+                        *addr++ = regs->uregs[reg];
+        }
+
+        if (wbit) {
+                if (!ubit)
+                        addr -= reg_count;
+                addr -= (!pbit ^ !ubit);
+                regs->uregs[rn] = (long)addr;
+        }
+}
+
+static void __kprobes simulate_stm1_pc(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+
+        if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn))
+                return;
+
+        regs->ARM_pc = (long)p->addr + str_pc_offset;
+        simulate_ldm1stm1(p, regs);
+        regs->ARM_pc = (long)p->addr + 4;
+}
+
+static void __kprobes simulate_mov_ipsp(struct kprobe *p, struct pt_regs *regs)
+{
+        regs->uregs[12] = regs->uregs[13];
+}
+
+static void __kprobes emulate_ldcstc(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rn = (insn >> 16) & 0xf;
+        long rnv = regs->uregs[rn];
+
+        /* Save Rn in case of writeback. */
+        regs->uregs[rn] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_ldrd(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        int rm = insn & 0xf;  /* rm may be invalid, don't care. */
+
+        /* Not following the C calling convention here, so need asm(). */
+        __asm__ __volatile__ (
+                "ldr    r0, %[rn]       \n\t"
+                "ldr    r1, %[rm]       \n\t"
+                "msr    cpsr_fs, %[cpsr]\n\t"
+                "mov    lr, pc          \n\t"
+                "mov    pc, %[i_fn]     \n\t"
+                "str    r0, %[rn]       \n\t"   /* in case of writeback */
+                "str    r2, %[rd0]      \n\t"
+                "str    r3, %[rd1]      \n\t"
+                : [rn]  "+m" (regs->uregs[rn]),
+                  [rd0] "=m" (regs->uregs[rd]),
+                  [rd1] "=m" (regs->uregs[rd+1])
+                : [rm]   "m" (regs->uregs[rm]),
+                  [cpsr] "r" (regs->ARM_cpsr),
+                  [i_fn] "r" (i_fn)
+                : "r0", "r1", "r2", "r3", "lr", "cc"
+        );
+}
+
+static void __kprobes emulate_strd(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_4arg_fn_t *i_fn = (insn_4arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        int rm  = insn & 0xf;
+        long rnv = regs->uregs[rn];
+        long rmv = regs->uregs[rm];  /* rm/rmv may be invalid, don't care. */
+
+        regs->uregs[rn] = insnslot_4arg_rflags(rnv, rmv, regs->uregs[rd],
+                                               regs->uregs[rd+1],
+                                               regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_llret_3arg_fn_t *i_fn = (insn_llret_3arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        union reg_pair fnr;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        int rm = insn & 0xf;
+        long rdv;
+        long rnv  = regs->uregs[rn];
+        long rmv  = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */
+        long cpsr = regs->ARM_cpsr;
+
+        fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn);
+        regs->uregs[rn] = fnr.r0;  /* Save Rn in case of writeback. */
+        rdv = fnr.r1;
+
+        if (rd == 15) {
+#if __LINUX_ARM_ARCH__ >= 5
+                cpsr &= ~PSR_T_BIT;
+                if (rdv & 0x1)
+                        cpsr |= PSR_T_BIT;
+                regs->ARM_cpsr = cpsr;
+                rdv &= ~0x1;
+#else
+                rdv &= ~0x2;
+#endif
+        }
+        regs->uregs[rd] = rdv;
+}
+
+static void __kprobes emulate_str(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        long iaddr = (long)p->addr;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        int rm = insn & 0xf;
+        long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd];
+        long rnv = (rn == 15) ? iaddr +  8 : regs->uregs[rn];
+        long rmv = regs->uregs[rm];  /* rm/rmv may be invalid, don't care. */
+
+        /* Save Rn in case of writeback. */
+        regs->uregs[rn] =
+                insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_llret_0arg_fn_t *i_fn = (insn_llret_0arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        union reg_pair fnr;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+
+        fnr.dr = insnslot_llret_0arg_rflags(regs->ARM_cpsr, i_fn);
+        regs->uregs[rn] = fnr.r0;
+        regs->uregs[rd] = fnr.r1;
+}
+
+static void __kprobes emulate_mcrr(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        long rnv = regs->uregs[rn];
+        long rdv = regs->uregs[rd];
+
+        insnslot_2arg_rflags(rnv, rdv, regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_sat(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rm = insn & 0xf;
+        long rmv = regs->uregs[rm];
+
+        /* Writes Q flag */
+        regs->uregs[rd] = insnslot_1arg_rwflags(rmv, &regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_sel(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        int rm = insn & 0xf;
+        long rnv = regs->uregs[rn];
+        long rmv = regs->uregs[rm];
+
+        /* Reads GE bits */
+        regs->uregs[rd] = insnslot_2arg_rflags(rnv, rmv, regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_none(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0];
+
+        insnslot_0arg_rflags(regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_rd12(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+
+        regs->uregs[rd] = insnslot_0arg_rflags(regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_ird12(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int ird = (insn >> 12) & 0xf;
+
+        insnslot_1arg_rflags(regs->uregs[ird], regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_rn16(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rn = (insn >> 16) & 0xf;
+        long rnv = regs->uregs[rn];
+
+        insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes emulate_rd12rm0(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rm = insn & 0xf;
+        long rmv = regs->uregs[rm];
+
+        regs->uregs[rd] = insnslot_1arg_rflags(rmv, regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes
+emulate_rd12rn16rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        int rm = insn & 0xf;
+        long rnv = regs->uregs[rn];
+        long rmv = regs->uregs[rm];
+
+        regs->uregs[rd] =
+                insnslot_2arg_rwflags(rnv, rmv, &regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes
+emulate_rd16rn12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 16) & 0xf;
+        int rn = (insn >> 12) & 0xf;
+        int rs = (insn >> 8) & 0xf;
+        int rm = insn & 0xf;
+        long rnv = regs->uregs[rn];
+        long rsv = regs->uregs[rs];
+        long rmv = regs->uregs[rm];
+
+        regs->uregs[rd] =
+                insnslot_3arg_rwflags(rnv, rsv, rmv, &regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes
+emulate_rd16rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 16) & 0xf;
+        int rs = (insn >> 8) & 0xf;
+        int rm = insn & 0xf;
+        long rsv = regs->uregs[rs];
+        long rmv = regs->uregs[rm];
+
+        regs->uregs[rd] =
+                insnslot_2arg_rwflags(rsv, rmv, &regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes
+emulate_rdhi16rdlo12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_llret_4arg_fn_t *i_fn = (insn_llret_4arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        union reg_pair fnr;
+        int rdhi = (insn >> 16) & 0xf;
+        int rdlo = (insn >> 12) & 0xf;
+        int rs   = (insn >> 8) & 0xf;
+        int rm   = insn & 0xf;
+        long rsv = regs->uregs[rs];
+        long rmv = regs->uregs[rm];
+
+        fnr.dr = insnslot_llret_4arg_rwflags(regs->uregs[rdhi],
+                                             regs->uregs[rdlo], rsv, rmv,
+                                             &regs->ARM_cpsr, i_fn);
+        regs->uregs[rdhi] = fnr.r0;
+        regs->uregs[rdlo] = fnr.r1;
+}
+
+static void __kprobes
+emulate_alu_imm_rflags(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
+
+        regs->uregs[rd] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes
+emulate_alu_imm_rwflags(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;
+        long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
+
+        regs->uregs[rd] = insnslot_1arg_rwflags(rnv, &regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes
+emulate_alu_rflags(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        long ppc = (long)p->addr + 8;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;    /* rn/rnv/rs/rsv may be */
+        int rs = (insn >> 8) & 0xf;     /* invalid, don't care. */
+        int rm = insn & 0xf;
+        long rnv = (rn == 15) ? ppc : regs->uregs[rn];
+        long rmv = (rm == 15) ? ppc : regs->uregs[rm];
+        long rsv = regs->uregs[rs];
+
+        regs->uregs[rd] =
+                insnslot_3arg_rflags(rnv, rmv, rsv, regs->ARM_cpsr, i_fn);
+}
+
+static void __kprobes
+emulate_alu_rwflags(struct kprobe *p, struct pt_regs *regs)
+{
+        insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
+        kprobe_opcode_t insn = p->opcode;
+        long ppc = (long)p->addr + 8;
+        int rd = (insn >> 12) & 0xf;
+        int rn = (insn >> 16) & 0xf;    /* rn/rnv/rs/rsv may be */
+        int rs = (insn >> 8) & 0xf;     /* invalid, don't care. */
+        int rm = insn & 0xf;
+        long rnv = (rn == 15) ? ppc : regs->uregs[rn];
+        long rmv = (rm == 15) ? ppc : regs->uregs[rm];
+        long rsv = regs->uregs[rs];
+
+        regs->uregs[rd] =
+                insnslot_3arg_rwflags(rnv, rmv, rsv, &regs->ARM_cpsr, i_fn);
+}
+
+static enum kprobe_insn __kprobes
+prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        int ibit = (insn & (1 << 26)) ? 25 : 22;
+
+        insn &= 0xfff00fff;
+        insn |= 0x00001000;     /* Rn = r0, Rd = r1 */
+        if (insn & (1 << ibit)) {
+                insn &= ~0xf;
+                insn |= 2;      /* Rm = r2 */
+        }
+        asi->insn[0] = insn;
+        asi->insn_handler = (insn & (1 << 20)) ? emulate_ldr : emulate_str;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+prep_emulate_rd12rm0(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        insn &= 0xffff0ff0;     /* Rd = r0, Rm = r0 */
+        asi->insn[0] = insn;
+        asi->insn_handler = emulate_rd12rm0;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+prep_emulate_rd12(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        insn &= 0xffff0fff;     /* Rd = r0 */
+        asi->insn[0] = insn;
+        asi->insn_handler = emulate_rd12;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+prep_emulate_rd12rn16rm0_wflags(kprobe_opcode_t insn,
+                                struct arch_specific_insn *asi)
+{
+        insn &= 0xfff00ff0;     /* Rd = r0, Rn = r0 */
+        insn |= 0x00000001;     /* Rm = r1 */
+        asi->insn[0] = insn;
+        asi->insn_handler = emulate_rd12rn16rm0_rwflags;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+prep_emulate_rd16rs8rm0_wflags(kprobe_opcode_t insn,
+                               struct arch_specific_insn *asi)
+{
+        insn &= 0xfff0f0f0;     /* Rd = r0, Rs = r0 */
+        insn |= 0x00000001;     /* Rm = r1          */
+        asi->insn[0] = insn;
+        asi->insn_handler = emulate_rd16rs8rm0_rwflags;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+prep_emulate_rd16rn12rs8rm0_wflags(kprobe_opcode_t insn,
+                                   struct arch_specific_insn *asi)
+{
+        insn &= 0xfff000f0;     /* Rd = r0, Rn = r0 */
+        insn |= 0x00000102;     /* Rs = r1, Rm = r2 */
+        asi->insn[0] = insn;
+        asi->insn_handler = emulate_rd16rn12rs8rm0_rwflags;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn,
+                                       struct arch_specific_insn *asi)
+{
+        insn &= 0xfff000f0;     /* RdHi = r0, RdLo = r1 */
+        insn |= 0x00001203;     /* Rs = r2, Rm = r3 */
+        asi->insn[0] = insn;
+        asi->insn_handler = emulate_rdhi16rdlo12rs8rm0_rwflags;
+        return INSN_GOOD;
+}
+
+/*
+ * For the instruction masking and comparisons in all the "space_*"
+ * functions below, Do _not_ rearrange the order of tests unless
+ * you're very, very sure of what you are doing.  For the sake of
+ * efficiency, the masks for some tests sometimes assume other test
+ * have been done prior to them so the number of patterns to test
+ * for an instruction set can be as broad as possible to reduce the
+ * number of tests needed.
+ */
+
+static enum kprobe_insn __kprobes
+space_1111(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* CPS mmod == 1 : 1111 0001 0000 xx10 xxxx xxxx xx0x xxxx */
+        /* RFE           : 1111 100x x0x1 xxxx xxxx 1010 xxxx xxxx */
+        /* SRS           : 1111 100x x1x0 1101 xxxx 0101 xxxx xxxx */
+        if ((insn & 0xfff30020) == 0xf1020000 ||
+            (insn & 0xfe500f00) == 0xf8100a00 ||
+            (insn & 0xfe5f0f00) == 0xf84d0500)
+                return INSN_REJECTED;
+
+        /* PLD : 1111 01x1 x101 xxxx xxxx xxxx xxxx xxxx : */
+        if ((insn & 0xfd700000) == 0xf4500000) {
+                insn &= 0xfff0ffff;     /* Rn = r0 */
+                asi->insn[0] = insn;
+                asi->insn_handler = emulate_rn16;
+                return INSN_GOOD;
+        }
+
+        /* BLX(1) : 1111 101x xxxx xxxx xxxx xxxx xxxx xxxx : */
+        if ((insn & 0xfe000000) == 0xfa000000) {
+                asi->insn_handler = simulate_blx1;
+                return INSN_GOOD_NO_SLOT;
+        }
+
+        /* SETEND : 1111 0001 0000 0001 xxxx xxxx 0000 xxxx */
+        /* CDP2   : 1111 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */
+        if ((insn & 0xffff00f0) == 0xf1010000 ||
+            (insn & 0xff000010) == 0xfe000000) {
+                asi->insn[0] = insn;
+                asi->insn_handler = emulate_none;
+                return INSN_GOOD;
+        }
+
+        /* MCRR2 : 1111 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */
+        /* MRRC2 : 1111 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */
+        if ((insn & 0xffe00000) == 0xfc400000) {
+                insn &= 0xfff00fff;     /* Rn = r0 */
+                insn |= 0x00001000;     /* Rd = r1 */
+                asi->insn[0] = insn;
+                asi->insn_handler =
+                        (insn & (1 << 20)) ? emulate_mrrc : emulate_mcrr;
+                return INSN_GOOD;
+        }
+
+        /* LDC2 : 1111 110x xxx1 xxxx xxxx xxxx xxxx xxxx */
+        /* STC2 : 1111 110x xxx0 xxxx xxxx xxxx xxxx xxxx */
+        if ((insn & 0xfe000000) == 0xfc000000) {
+                insn &= 0xfff0ffff;      /* Rn = r0 */
+                asi->insn[0] = insn;
+                asi->insn_handler = emulate_ldcstc;
+                return INSN_GOOD;
+        }
+
+        /* MCR2 : 1111 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */
+        /* MRC2 : 1111 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */
+        insn &= 0xffff0fff;     /* Rd = r0 */
+        asi->insn[0]      = insn;
+        asi->insn_handler = (insn & (1 << 20)) ? emulate_rd12 : emulate_ird12;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx xxx0 xxxx */
+        if ((insn & 0x0f900010) == 0x01000000) {
+
+                /* BXJ  : cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */
+                /* MSR  : cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */
+                if ((insn & 0x0ff000f0) == 0x01200020 ||
+                    (insn & 0x0fb000f0) == 0x01200000)
+                        return INSN_REJECTED;
+
+                /* MRS : cccc 0001 0x00 xxxx xxxx xxxx 0000 xxxx */
+                if ((insn & 0x0fb00010) == 0x01000000)
+                        return prep_emulate_rd12(insn, asi);
+
+                /* SMLALxy : cccc 0001 0100 xxxx xxxx xxxx 1xx0 xxxx */
+                if ((insn & 0x0ff00090) == 0x01400080)
+                        return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi);
+
+                /* SMULWy : cccc 0001 0010 xxxx xxxx xxxx 1x10 xxxx */
+                /* SMULxy : cccc 0001 0110 xxxx xxxx xxxx 1xx0 xxxx */
+                if ((insn & 0x0ff000b0) == 0x012000a0 ||
+                    (insn & 0x0ff00090) == 0x01600080)
+                        return prep_emulate_rd16rs8rm0_wflags(insn, asi);
+
+                /* SMLAxy : cccc 0001 0000 xxxx xxxx xxxx 1xx0 xxxx : Q */
+                /* SMLAWy : cccc 0001 0010 xxxx xxxx xxxx 0x00 xxxx : Q */
+                return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
+
+        }
+
+        /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx 0xx1 xxxx */
+        else if ((insn & 0x0f900090) == 0x01000010) {
+
+                /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */
+                if ((insn & 0xfff000f0) == 0xe1200070)
+                        return INSN_REJECTED;
+
+                /* BLX(2) : cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */
+                /* BX     : cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */
+                if ((insn & 0x0ff000d0) == 0x01200010) {
+                        asi->insn[0] = truecc_insn(insn);
+                        asi->insn_handler = simulate_blx2bx;
+                        return INSN_GOOD;
+                }
+
+                /* CLZ : cccc 0001 0110 xxxx xxxx xxxx 0001 xxxx */
+                if ((insn & 0x0ff000f0) == 0x01600010)
+                        return prep_emulate_rd12rm0(insn, asi);
+
+                /* QADD    : cccc 0001 0000 xxxx xxxx xxxx 0101 xxxx :Q */
+                /* QSUB    : cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx :Q */
+                /* QDADD   : cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx :Q */
+                /* QDSUB   : cccc 0001 0110 xxxx xxxx xxxx 0101 xxxx :Q */
+                return prep_emulate_rd12rn16rm0_wflags(insn, asi);
+        }
+
+        /* cccc 0000 xxxx xxxx xxxx xxxx xxxx 1001 xxxx */
+        else if ((insn & 0x0f000090) == 0x00000090) {
+
+                /* MUL    : cccc 0000 0000 xxxx xxxx xxxx 1001 xxxx :   */
+                /* MULS   : cccc 0000 0001 xxxx xxxx xxxx 1001 xxxx :cc */
+                /* MLA    : cccc 0000 0010 xxxx xxxx xxxx 1001 xxxx :   */
+                /* MLAS   : cccc 0000 0011 xxxx xxxx xxxx 1001 xxxx :cc */
+                /* UMAAL  : cccc 0000 0100 xxxx xxxx xxxx 1001 xxxx :   */
+                /* UMULL  : cccc 0000 1000 xxxx xxxx xxxx 1001 xxxx :   */
+                /* UMULLS : cccc 0000 1001 xxxx xxxx xxxx 1001 xxxx :cc */
+                /* UMLAL  : cccc 0000 1010 xxxx xxxx xxxx 1001 xxxx :   */
+                /* UMLALS : cccc 0000 1011 xxxx xxxx xxxx 1001 xxxx :cc */
+                /* SMULL  : cccc 0000 1100 xxxx xxxx xxxx 1001 xxxx :   */
+                /* SMULLS : cccc 0000 1101 xxxx xxxx xxxx 1001 xxxx :cc */
+                /* SMLAL  : cccc 0000 1110 xxxx xxxx xxxx 1001 xxxx :   */
+                /* SMLALS : cccc 0000 1111 xxxx xxxx xxxx 1001 xxxx :cc */
+                if ((insn & 0x0fe000f0) == 0x00000090) {
+                       return prep_emulate_rd16rs8rm0_wflags(insn, asi);
+                } else if  ((insn & 0x0fe000f0) == 0x00200090) {
+                       return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
+                } else {
+                       return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi);
+                }
+        }
+
+        /* cccc 000x xxxx xxxx xxxx xxxx xxxx 1xx1 xxxx */
+        else if ((insn & 0x0e000090) == 0x00000090) {
+
+                /* SWP   : cccc 0001 0000 xxxx xxxx xxxx 1001 xxxx */
+                /* SWPB  : cccc 0001 0100 xxxx xxxx xxxx 1001 xxxx */
+                /* LDRD  : cccc 000x xxx0 xxxx xxxx xxxx 1101 xxxx */
+                /* STRD  : cccc 000x xxx0 xxxx xxxx xxxx 1111 xxxx */
+                /* STREX : cccc 0001 1000 xxxx xxxx xxxx 1001 xxxx */
+                /* LDREX : cccc 0001 1001 xxxx xxxx xxxx 1001 xxxx */
+                /* LDRH  : cccc 000x xxx1 xxxx xxxx xxxx 1011 xxxx */
+                /* STRH  : cccc 000x xxx0 xxxx xxxx xxxx 1011 xxxx */
+                /* LDRSB : cccc 000x xxx1 xxxx xxxx xxxx 1101 xxxx */
+                /* LDRSH : cccc 000x xxx1 xxxx xxxx xxxx 1111 xxxx */
+                if ((insn & 0x0fb000f0) == 0x01000090) {
+                        /* SWP/SWPB */
+                        return prep_emulate_rd12rn16rm0_wflags(insn, asi);
+                } else if ((insn & 0x0e1000d0) == 0x00000d0) {
+                        /* STRD/LDRD */
+                        insn &= 0xfff00fff;
+                        insn |= 0x00002000;     /* Rn = r0, Rd = r2 */
+                        if (insn & (1 << 22)) {
+                                /* I bit */
+                                insn &= ~0xf;
+                                insn |= 1;      /* Rm = r1 */
+                        }
+                        asi->insn[0] = insn;
+                        asi->insn_handler =
+                                (insn & (1 << 5)) ? emulate_strd : emulate_ldrd;
+                        return INSN_GOOD;
+                }
+
+                return prep_emulate_ldr_str(insn, asi);
+        }
+
+        /* cccc 000x xxxx xxxx xxxx xxxx xxxx xxxx xxxx */
+
+        /*
+         * ALU op with S bit and Rd == 15 :
+         *      cccc 000x xxx1 xxxx 1111 xxxx xxxx xxxx
+         */
+        if ((insn & 0x0e10f000) == 0x0010f000)
+                return INSN_REJECTED;
+
+        /*
+         * "mov ip, sp" is the most common kprobe'd instruction by far.
+         * Check and optimize for it explicitly.
+         */
+        if (insn == 0xe1a0c00d) {
+                asi->insn_handler = simulate_mov_ipsp;
+                return INSN_GOOD_NO_SLOT;
+        }
+
+        /*
+         * Data processing: Immediate-shift / Register-shift
+         * ALU op : cccc 000x xxxx xxxx xxxx xxxx xxxx xxxx
+         * CPY    : cccc 0001 1010 xxxx xxxx 0000 0000 xxxx
+         * MOV    : cccc 0001 101x xxxx xxxx xxxx xxxx xxxx
+         * *S (bit 20) updates condition codes
+         * ADC/SBC/RSC reads the C flag
+         */
+        insn &= 0xfff00ff0;     /* Rn = r0, Rd = r0 */
+        insn |= 0x00000001;     /* Rm = r1 */
+        if (insn & 0x010) {
+                insn &= 0xfffff0ff;     /* register shift */
+                insn |= 0x00000200;     /* Rs = r2 */
+        }
+        asi->insn[0] = insn;
+        asi->insn_handler = (insn & (1 << 20)) ?  /* S-bit */
+                                emulate_alu_rwflags : emulate_alu_rflags;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /*
+         * MSR   : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx
+         * Undef : cccc 0011 0x00 xxxx xxxx xxxx xxxx xxxx
+         * ALU op with S bit and Rd == 15 :
+         *         cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx
+         */
+        if ((insn & 0x0f900000) == 0x03200000 ||        /* MSR & Undef */
+            (insn & 0x0e10f000) == 0x0210f000)          /* ALU s-bit, R15  */
+                return INSN_REJECTED;
+
+        /*
+         * Data processing: 32-bit Immediate
+         * ALU op : cccc 001x xxxx xxxx xxxx xxxx xxxx xxxx
+         * MOV    : cccc 0011 101x xxxx xxxx xxxx xxxx xxxx
+         * *S (bit 20) updates condition codes
+         * ADC/SBC/RSC reads the C flag
+         */
+        insn &= 0xfff00ff0;     /* Rn = r0, Rd = r0 */
+        asi->insn[0] = insn;
+        asi->insn_handler = (insn & (1 << 20)) ?  /* S-bit */
+                        emulate_alu_imm_rwflags : emulate_alu_imm_rflags;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_0110__1(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* SEL : cccc 0110 1000 xxxx xxxx xxxx 1011 xxxx GE: !!! */
+        if ((insn & 0x0ff000f0) == 0x068000b0) {
+                insn &= 0xfff00ff0;     /* Rd = r0, Rn = r0 */
+                insn |= 0x00000001;     /* Rm = r1 */
+                asi->insn[0] = insn;
+                asi->insn_handler = emulate_sel;
+                return INSN_GOOD;
+        }
+
+        /* SSAT   : cccc 0110 101x xxxx xxxx xxxx xx01 xxxx :Q */
+        /* USAT   : cccc 0110 111x xxxx xxxx xxxx xx01 xxxx :Q */
+        /* SSAT16 : cccc 0110 1010 xxxx xxxx xxxx 0011 xxxx :Q */
+        /* USAT16 : cccc 0110 1110 xxxx xxxx xxxx 0011 xxxx :Q */
+        if ((insn & 0x0fa00030) == 0x06a00010 ||
+            (insn & 0x0fb000f0) == 0x06a00030) {
+                insn &= 0xffff0ff0;     /* Rd = r0, Rm = r0 */
+                asi->insn[0] = insn;
+                asi->insn_handler = emulate_sat;
+                return INSN_GOOD;
+        }
+
+        /* REV    : cccc 0110 1011 xxxx xxxx xxxx 0011 xxxx */
+        /* REV16  : cccc 0110 1011 xxxx xxxx xxxx 1011 xxxx */
+        /* REVSH  : cccc 0110 1111 xxxx xxxx xxxx 1011 xxxx */
+        if ((insn & 0x0ff00070) == 0x06b00030 ||
+            (insn & 0x0ff000f0) == 0x06f000b0)
+                return prep_emulate_rd12rm0(insn, asi);
+
+        /* SADD16    : cccc 0110 0001 xxxx xxxx xxxx 0001 xxxx :GE */
+        /* SADDSUBX  : cccc 0110 0001 xxxx xxxx xxxx 0011 xxxx :GE */
+        /* SSUBADDX  : cccc 0110 0001 xxxx xxxx xxxx 0101 xxxx :GE */
+        /* SSUB16    : cccc 0110 0001 xxxx xxxx xxxx 0111 xxxx :GE */
+        /* SADD8     : cccc 0110 0001 xxxx xxxx xxxx 1001 xxxx :GE */
+        /* SSUB8     : cccc 0110 0001 xxxx xxxx xxxx 1111 xxxx :GE */
+        /* QADD16    : cccc 0110 0010 xxxx xxxx xxxx 0001 xxxx :   */
+        /* QADDSUBX  : cccc 0110 0010 xxxx xxxx xxxx 0011 xxxx :   */
+        /* QSUBADDX  : cccc 0110 0010 xxxx xxxx xxxx 0101 xxxx :   */
+        /* QSUB16    : cccc 0110 0010 xxxx xxxx xxxx 0111 xxxx :   */
+        /* QADD8     : cccc 0110 0010 xxxx xxxx xxxx 1001 xxxx :   */
+        /* QSUB8     : cccc 0110 0010 xxxx xxxx xxxx 1111 xxxx :   */
+        /* SHADD16   : cccc 0110 0011 xxxx xxxx xxxx 0001 xxxx :   */
+        /* SHADDSUBX : cccc 0110 0011 xxxx xxxx xxxx 0011 xxxx :   */
+        /* SHSUBADDX : cccc 0110 0011 xxxx xxxx xxxx 0101 xxxx :   */
+        /* SHSUB16   : cccc 0110 0011 xxxx xxxx xxxx 0111 xxxx :   */
+        /* SHADD8    : cccc 0110 0011 xxxx xxxx xxxx 1001 xxxx :   */
+        /* SHSUB8    : cccc 0110 0011 xxxx xxxx xxxx 1111 xxxx :   */
+        /* UADD16    : cccc 0110 0101 xxxx xxxx xxxx 0001 xxxx :GE */
+        /* UADDSUBX  : cccc 0110 0101 xxxx xxxx xxxx 0011 xxxx :GE */
+        /* USUBADDX  : cccc 0110 0101 xxxx xxxx xxxx 0101 xxxx :GE */
+        /* USUB16    : cccc 0110 0101 xxxx xxxx xxxx 0111 xxxx :GE */
+        /* UADD8     : cccc 0110 0101 xxxx xxxx xxxx 1001 xxxx :GE */
+        /* USUB8     : cccc 0110 0101 xxxx xxxx xxxx 1111 xxxx :GE */
+        /* UQADD16   : cccc 0110 0110 xxxx xxxx xxxx 0001 xxxx :   */
+        /* UQADDSUBX : cccc 0110 0110 xxxx xxxx xxxx 0011 xxxx :   */
+        /* UQSUBADDX : cccc 0110 0110 xxxx xxxx xxxx 0101 xxxx :   */
+        /* UQSUB16   : cccc 0110 0110 xxxx xxxx xxxx 0111 xxxx :   */
+        /* UQADD8    : cccc 0110 0110 xxxx xxxx xxxx 1001 xxxx :   */
+        /* UQSUB8    : cccc 0110 0110 xxxx xxxx xxxx 1111 xxxx :   */
+        /* UHADD16   : cccc 0110 0111 xxxx xxxx xxxx 0001 xxxx :   */
+        /* UHADDSUBX : cccc 0110 0111 xxxx xxxx xxxx 0011 xxxx :   */
+        /* UHSUBADDX : cccc 0110 0111 xxxx xxxx xxxx 0101 xxxx :   */
+        /* UHSUB16   : cccc 0110 0111 xxxx xxxx xxxx 0111 xxxx :   */
+        /* UHADD8    : cccc 0110 0111 xxxx xxxx xxxx 1001 xxxx :   */
+        /* UHSUB8    : cccc 0110 0111 xxxx xxxx xxxx 1111 xxxx :   */
+        /* PKHBT     : cccc 0110 1000 xxxx xxxx xxxx x001 xxxx :   */
+        /* PKHTB     : cccc 0110 1000 xxxx xxxx xxxx x101 xxxx :   */
+        /* SXTAB16   : cccc 0110 1000 xxxx xxxx xxxx 0111 xxxx :   */
+        /* SXTB      : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx :   */
+        /* SXTAB     : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx :   */
+        /* SXTAH     : cccc 0110 1011 xxxx xxxx xxxx 0111 xxxx :   */
+        /* UXTAB16   : cccc 0110 1100 xxxx xxxx xxxx 0111 xxxx :   */
+        /* UXTAB     : cccc 0110 1110 xxxx xxxx xxxx 0111 xxxx :   */
+        /* UXTAH     : cccc 0110 1111 xxxx xxxx xxxx 0111 xxxx :   */
+        return prep_emulate_rd12rn16rm0_wflags(insn, asi);
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_0111__1(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* Undef : cccc 0111 1111 xxxx xxxx xxxx 1111 xxxx */
+        if ((insn & 0x0ff000f0) == 0x03f000f0)
+                return INSN_REJECTED;
+
+        /* USADA8 : cccc 0111 1000 xxxx xxxx xxxx 0001 xxxx */
+        /* USAD8  : cccc 0111 1000 xxxx 1111 xxxx 0001 xxxx */
+        if ((insn & 0x0ff000f0) == 0x07800010)
+                 return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
+
+        /* SMLALD : cccc 0111 0100 xxxx xxxx xxxx 00x1 xxxx */
+        /* SMLSLD : cccc 0111 0100 xxxx xxxx xxxx 01x1 xxxx */
+        if ((insn & 0x0ff00090) == 0x07400010)
+                return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi);
+
+        /* SMLAD  : cccc 0111 0000 xxxx xxxx xxxx 00x1 xxxx :Q */
+        /* SMLSD  : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx :Q */
+        /* SMMLA  : cccc 0111 0101 xxxx xxxx xxxx 00x1 xxxx :  */
+        /* SMMLS  : cccc 0111 0101 xxxx xxxx xxxx 11x1 xxxx :  */
+        if ((insn & 0x0ff00090) == 0x07000010 ||
+            (insn & 0x0ff000d0) == 0x07500010 ||
+            (insn & 0x0ff000d0) == 0x075000d0)
+                return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
+
+        /* SMUSD  : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx :  */
+        /* SMUAD  : cccc 0111 0000 xxxx 1111 xxxx 00x1 xxxx :Q */
+        /* SMMUL  : cccc 0111 0101 xxxx 1111 xxxx 00x1 xxxx :  */
+        return prep_emulate_rd16rs8rm0_wflags(insn, asi);
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_01xx(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* LDR   : cccc 01xx x0x1 xxxx xxxx xxxx xxxx xxxx */
+        /* LDRB  : cccc 01xx x1x1 xxxx xxxx xxxx xxxx xxxx */
+        /* LDRBT : cccc 01x0 x111 xxxx xxxx xxxx xxxx xxxx */
+        /* LDRT  : cccc 01x0 x011 xxxx xxxx xxxx xxxx xxxx */
+        /* STR   : cccc 01xx x0x0 xxxx xxxx xxxx xxxx xxxx */
+        /* STRB  : cccc 01xx x1x0 xxxx xxxx xxxx xxxx xxxx */
+        /* STRBT : cccc 01x0 x110 xxxx xxxx xxxx xxxx xxxx */
+        /* STRT  : cccc 01x0 x010 xxxx xxxx xxxx xxxx xxxx */
+        return prep_emulate_ldr_str(insn, asi);
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_100x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* LDM(2) : cccc 100x x101 xxxx 0xxx xxxx xxxx xxxx */
+        /* LDM(3) : cccc 100x x1x1 xxxx 1xxx xxxx xxxx xxxx */
+        if ((insn & 0x0e708000) == 0x85000000 ||
+            (insn & 0x0e508000) == 0x85010000)
+                return INSN_REJECTED;
+
+        /* LDM(1) : cccc 100x x0x1 xxxx xxxx xxxx xxxx xxxx */
+        /* STM(1) : cccc 100x x0x0 xxxx xxxx xxxx xxxx xxxx */
+        asi->insn[0] = truecc_insn(insn);
+        asi->insn_handler = ((insn & 0x108000) == 0x008000) ? /* STM & R15 */
+                                simulate_stm1_pc : simulate_ldm1stm1;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_101x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* B  : cccc 1010 xxxx xxxx xxxx xxxx xxxx xxxx */
+        /* BL : cccc 1011 xxxx xxxx xxxx xxxx xxxx xxxx */
+        asi->insn[0] = truecc_insn(insn);
+        asi->insn_handler = simulate_bbl;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_1100_010x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* MCRR : cccc 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */
+        /* MRRC : cccc 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */
+        insn &= 0xfff00fff;
+        insn |= 0x00001000;     /* Rn = r0, Rd = r1 */
+        asi->insn[0] = insn;
+        asi->insn_handler = (insn & (1 << 20)) ? emulate_mrrc : emulate_mcrr;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_110x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* LDC : cccc 110x xxx1 xxxx xxxx xxxx xxxx xxxx */
+        /* STC : cccc 110x xxx0 xxxx xxxx xxxx xxxx xxxx */
+        insn &= 0xfff0ffff;     /* Rn = r0 */
+        asi->insn[0] = insn;
+        asi->insn_handler = emulate_ldcstc;
+        return INSN_GOOD;
+}
+
+static enum kprobe_insn __kprobes
+space_cccc_111x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */
+        /* SWI  : cccc 1111 xxxx xxxx xxxx xxxx xxxx xxxx */
+        if ((insn & 0xfff000f0) == 0xe1200070 ||
+            (insn & 0x0f000000) == 0x0f000000)
+                return INSN_REJECTED;
+
+        /* CDP : cccc 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */
+        if ((insn & 0x0f000010) == 0x0e000000) {
+                asi->insn[0] = insn;
+                asi->insn_handler = emulate_none;
+                return INSN_GOOD;
+        }
+
+        /* MCR : cccc 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */
+        /* MRC : cccc 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */
+        insn &= 0xffff0fff;     /* Rd = r0 */
+        asi->insn[0] = insn;
+        asi->insn_handler = (insn & (1 << 20)) ? emulate_rd12 : emulate_ird12;
+        return INSN_GOOD;
+}
+
+/* Return:
+ *   INSN_REJECTED     If instruction is one not allowed to kprobe,
+ *   INSN_GOOD         If instruction is supported and uses instruction slot,
+ *   INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot.
+ *
+ * For instructions we don't want to kprobe (INSN_REJECTED return result):
+ *   These are generally ones that modify the processor state making
+ *   them "hard" to simulate such as switches processor modes or
+ *   make accesses in alternate modes.  Any of these could be simulated
+ *   if the work was put into it, but low return considering they
+ *   should also be very rare.
+ */
+enum kprobe_insn __kprobes
+arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
+{
+        asi->insn[1] = KPROBE_RETURN_INSTRUCTION;
+
+        if ((insn & 0xf0000000) == 0xf0000000) {
+
+                return space_1111(insn, asi);
+
+        } else if ((insn & 0x0e000000) == 0x00000000) {
+
+                return space_cccc_000x(insn, asi);
+
+        } else if ((insn & 0x0e000000) == 0x02000000) {
+
+                return space_cccc_001x(insn, asi);
+
+        } else if ((insn & 0x0f000010) == 0x06000010) {
+
+                return space_cccc_0110__1(insn, asi);
+
+        } else if ((insn & 0x0f000010) == 0x07000010) {
+
+                return space_cccc_0111__1(insn, asi);
+
+        } else if ((insn & 0x0c000000) == 0x04000000) {
+
+                return space_cccc_01xx(insn, asi);
+
+        } else if ((insn & 0x0e000000) == 0x08000000) {
+
+                return space_cccc_100x(insn, asi);
+
+        } else if ((insn & 0x0e000000) == 0x0a000000) {
+
+                return space_cccc_101x(insn, asi);
+
+        } else if ((insn & 0x0fe00000) == 0x0c400000) {
+
+                return space_cccc_1100_010x(insn, asi);
+
+        } else if ((insn & 0x0e000000) == 0x0c400000) {
+
+                return space_cccc_110x(insn, asi);
+
+        }
+
+        return space_cccc_111x(insn, asi);
+}
+
+void __init arm_kprobe_decode_init(void)
+{
+        find_str_pc_offset();
+}
+
+
+/*
+ * All ARM instructions listed below.
+ *
+ * Instructions and their general purpose registers are given.
+ * If a particular register may not use R15, it is prefixed with a "!".
+ * If marked with a "*" means the value returned by reading R15
+ * is implementation defined.
+ *
+ * ADC/ADD/AND/BIC/CMN/CMP/EOR/MOV/MVN/ORR/RSB/RSC/SBC/SUB/TEQ
+ *     TST: Rd, Rn, Rm, !Rs
+ * BX: Rm
+ * BLX(2): !Rm
+ * BX: Rm (R15 legal, but discouraged)
+ * BXJ: !Rm,
+ * CLZ: !Rd, !Rm
+ * CPY: Rd, Rm
+ * LDC/2,STC/2 immediate offset & unindex: Rn
+ * LDC/2,STC/2 immediate pre/post-indexed: !Rn
+ * LDM(1/3): !Rn, register_list
+ * LDM(2): !Rn, !register_list
+ * LDR,STR,PLD immediate offset: Rd, Rn
+ * LDR,STR,PLD register offset: Rd, Rn, !Rm
+ * LDR,STR,PLD scaled register offset: Rd, !Rn, !Rm
+ * LDR,STR immediate pre/post-indexed: Rd, !Rn
+ * LDR,STR register pre/post-indexed: Rd, !Rn, !Rm
+ * LDR,STR scaled register pre/post-indexed: Rd, !Rn, !Rm
+ * LDRB,STRB immediate offset: !Rd, Rn
+ * LDRB,STRB register offset: !Rd, Rn, !Rm
+ * LDRB,STRB scaled register offset: !Rd, !Rn, !Rm
+ * LDRB,STRB immediate pre/post-indexed: !Rd, !Rn
+ * LDRB,STRB register pre/post-indexed: !Rd, !Rn, !Rm
+ * LDRB,STRB scaled register pre/post-indexed: !Rd, !Rn, !Rm
+ * LDRT,LDRBT,STRBT immediate pre/post-indexed: !Rd, !Rn
+ * LDRT,LDRBT,STRBT register pre/post-indexed: !Rd, !Rn, !Rm
+ * LDRT,LDRBT,STRBT scaled register pre/post-indexed: !Rd, !Rn, !Rm
+ * LDRH/SH/SB/D,STRH/SH/SB/D immediate offset: !Rd, Rn
+ * LDRH/SH/SB/D,STRH/SH/SB/D register offset: !Rd, Rn, !Rm
+ * LDRH/SH/SB/D,STRH/SH/SB/D immediate pre/post-indexed: !Rd, !Rn
+ * LDRH/SH/SB/D,STRH/SH/SB/D register pre/post-indexed: !Rd, !Rn, !Rm
+ * LDREX: !Rd, !Rn
+ * MCR/2: !Rd
+ * MCRR/2,MRRC/2: !Rd, !Rn
+ * MLA: !Rd, !Rn, !Rm, !Rs
+ * MOV: Rd
+ * MRC/2: !Rd (if Rd==15, only changes cond codes, not the register)
+ * MRS,MSR: !Rd
+ * MUL: !Rd, !Rm, !Rs
+ * PKH{BT,TB}: !Rd, !Rn, !Rm
+ * QDADD,[U]QADD/16/8/SUBX: !Rd, !Rm, !Rn
+ * QDSUB,[U]QSUB/16/8/ADDX: !Rd, !Rm, !Rn
+ * REV/16/SH: !Rd, !Rm
+ * RFE: !Rn
+ * {S,U}[H]ADD{16,8,SUBX},{S,U}[H]SUB{16,8,ADDX}: !Rd, !Rn, !Rm
+ * SEL: !Rd, !Rn, !Rm
+ * SMLA<x><y>,SMLA{D,W<y>},SMLSD,SMML{A,S}: !Rd, !Rn, !Rm, !Rs
+ * SMLAL<x><y>,SMLA{D,LD},SMLSLD,SMMULL,SMULW<y>: !RdHi, !RdLo, !Rm, !Rs
+ * SMMUL,SMUAD,SMUL<x><y>,SMUSD: !Rd, !Rm, !Rs
+ * SSAT/16: !Rd, !Rm
+ * STM(1/2): !Rn, register_list* (R15 in reg list not recommended)
+ * STRT immediate pre/post-indexed: Rd*, !Rn
+ * STRT register pre/post-indexed: Rd*, !Rn, !Rm
+ * STRT scaled register pre/post-indexed: Rd*, !Rn, !Rm
+ * STREX: !Rd, !Rn, !Rm
+ * SWP/B: !Rd, !Rn, !Rm
+ * {S,U}XTA{B,B16,H}: !Rd, !Rn, !Rm
+ * {S,U}XT{B,B16,H}: !Rd, !Rm
+ * UM{AA,LA,UL}L: !RdHi, !RdLo, !Rm, !Rs
+ * USA{D8,A8,T,T16}: !Rd, !Rm, !Rs
+ *
+ * May transfer control by writing R15 (possible mode changes or alternate
+ * mode accesses marked by "*"):
+ * ALU op (* with s-bit), B, BL, BKPT, BLX(1/2), BX, BXJ, CPS*, CPY,
+ * LDM(1), LDM(2/3)*, LDR, MOV, RFE*, SWI*
+ *
+ * Instructions that do not take general registers, nor transfer control:
+ * CDP/2, SETEND, SRS*
+ */
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c
new file mode 100644
index 000000000000..a22a98c43ca5
--- /dev/null
+++ b/arch/arm/kernel/kprobes.c
@@ -0,0 +1,447 @@
+/*
+ * arch/arm/kernel/kprobes.c
+ *
+ * Kprobes on ARM
+ *
+ * Abhishek Sagar <sagar.abhishek@gmail.com>
+ * Copyright (C) 2006, 2007 Motorola Inc.
+ *
+ * Nicolas Pitre <nico@marvell.com>
+ * Copyright (C) 2007 Marvell Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/kprobes.h>
+#include <linux/module.h>
+#include <linux/stringify.h>
+#include <asm/traps.h>
+#include <asm/cacheflush.h>
+
+#define MIN_STACK_SIZE(addr)                            \
+        min((unsigned long)MAX_STACK_SIZE,              \
+            (unsigned long)current_thread_info() + THREAD_START_SP - (addr))
+
+#define flush_insns(addr, cnt)                          \
+        flush_icache_range((unsigned long)(addr),       \
+                           (unsigned long)(addr) +      \
+                           sizeof(kprobe_opcode_t) * (cnt))
+
+/* Used as a marker in ARM_pc to note when we're in a jprobe. */
+#define JPROBE_MAGIC_ADDR               0xffffffff
+
+DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
+DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
+
+
+int __kprobes arch_prepare_kprobe(struct kprobe *p)
+{
+        kprobe_opcode_t insn;
+        kprobe_opcode_t tmp_insn[MAX_INSN_SIZE];
+        unsigned long addr = (unsigned long)p->addr;
+        int is;
+
+        if (addr & 0x3 || in_exception_text(addr))
+                return -EINVAL;
+
+        insn = *p->addr;
+        p->opcode = insn;
+        p->ainsn.insn = tmp_insn;
+
+        switch (arm_kprobe_decode_insn(insn, &p->ainsn)) {
+        case INSN_REJECTED:     /* not supported */
+                return -EINVAL;
+
+        case INSN_GOOD:         /* instruction uses slot */
+                p->ainsn.insn = get_insn_slot();
+                if (!p->ainsn.insn)
+                        return -ENOMEM;
+                for (is = 0; is < MAX_INSN_SIZE; ++is)
+                        p->ainsn.insn[is] = tmp_insn[is];
+                flush_insns(&p->ainsn.insn, MAX_INSN_SIZE);
+                break;
+
+        case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */
+                p->ainsn.insn = NULL;
+                break;
+        }
+
+        return 0;
+}
+
+void __kprobes arch_arm_kprobe(struct kprobe *p)
+{
+        *p->addr = KPROBE_BREAKPOINT_INSTRUCTION;
+        flush_insns(p->addr, 1);
+}
+
+void __kprobes arch_disarm_kprobe(struct kprobe *p)
+{
+        *p->addr = p->opcode;
+        flush_insns(p->addr, 1);
+}
+
+void __kprobes arch_remove_kprobe(struct kprobe *p)
+{
+        if (p->ainsn.insn) {
+                mutex_lock(&kprobe_mutex);
+                free_insn_slot(p->ainsn.insn, 0);
+                mutex_unlock(&kprobe_mutex);
+                p->ainsn.insn = NULL;
+        }
+}
+
+static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
+{
+        kcb->prev_kprobe.kp = kprobe_running();
+        kcb->prev_kprobe.status = kcb->kprobe_status;
+}
+
+static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
+{
+        __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
+        kcb->kprobe_status = kcb->prev_kprobe.status;
+}
+
+static void __kprobes set_current_kprobe(struct kprobe *p)
+{
+        __get_cpu_var(current_kprobe) = p;
+}
+
+static void __kprobes singlestep(struct kprobe *p, struct pt_regs *regs,
+                                 struct kprobe_ctlblk *kcb)
+{
+        regs->ARM_pc += 4;
+        p->ainsn.insn_handler(p, regs);
+}
+
+/*
+ * Called with IRQs disabled. IRQs must remain disabled from that point
+ * all the way until processing this kprobe is complete.  The current
+ * kprobes implementation cannot process more than one nested level of
+ * kprobe, and that level is reserved for user kprobe handlers, so we can't
+ * risk encountering a new kprobe in an interrupt handler.
+ */
+void __kprobes kprobe_handler(struct pt_regs *regs)
+{
+        struct kprobe *p, *cur;
+        struct kprobe_ctlblk *kcb;
+        kprobe_opcode_t *addr = (kprobe_opcode_t *)regs->ARM_pc;
+
+        kcb = get_kprobe_ctlblk();
+        cur = kprobe_running();
+        p = get_kprobe(addr);
+
+        if (p) {
+                if (cur) {
+                        /* Kprobe is pending, so we're recursing. */
+                        switch (kcb->kprobe_status) {
+                        case KPROBE_HIT_ACTIVE:
+                        case KPROBE_HIT_SSDONE:
+                                /* A pre- or post-handler probe got us here. */
+                                kprobes_inc_nmissed_count(p);
+                                save_previous_kprobe(kcb);
+                                set_current_kprobe(p);
+                                kcb->kprobe_status = KPROBE_REENTER;
+                                singlestep(p, regs, kcb);
+                                restore_previous_kprobe(kcb);
+                                break;
+                        default:
+                                /* impossible cases */
+                                BUG();
+                        }
+                } else {
+                        set_current_kprobe(p);
+                        kcb->kprobe_status = KPROBE_HIT_ACTIVE;
+
+                        /*
+                         * If we have no pre-handler or it returned 0, we
+                         * continue with normal processing.  If we have a
+                         * pre-handler and it returned non-zero, it prepped
+                         * for calling the break_handler below on re-entry,
+                         * so get out doing nothing more here.
+                         */
+                        if (!p->pre_handler || !p->pre_handler(p, regs)) {
+                                kcb->kprobe_status = KPROBE_HIT_SS;
+                                singlestep(p, regs, kcb);
+                                if (p->post_handler) {
+                                        kcb->kprobe_status = KPROBE_HIT_SSDONE;
+                                        p->post_handler(p, regs, 0);
+                                }
+                                reset_current_kprobe();
+                        }
+                }
+        } else if (cur) {
+                /* We probably hit a jprobe.  Call its break handler. */
+                if (cur->break_handler && cur->break_handler(cur, regs)) {
+                        kcb->kprobe_status = KPROBE_HIT_SS;
+                        singlestep(cur, regs, kcb);
+                        if (cur->post_handler) {
+                                kcb->kprobe_status = KPROBE_HIT_SSDONE;
+                                cur->post_handler(cur, regs, 0);
+                        }
+                }
+                reset_current_kprobe();
+        } else {
+                /*
+                 * The probe was removed and a race is in progress.
+                 * There is nothing we can do about it.  Let's restart
+                 * the instruction.  By the time we can restart, the
+                 * real instruction will be there.
+                 */
+        }
+}
+
+int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr)
+{
+        kprobe_handler(regs);
+        return 0;
+}
+
+int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr)
+{
+        struct kprobe *cur = kprobe_running();
+        struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+        switch (kcb->kprobe_status) {
+        case KPROBE_HIT_SS:
+        case KPROBE_REENTER:
+                /*
+                 * We are here because the instruction being single
+                 * stepped caused a page fault. We reset the current
+                 * kprobe and the PC to point back to the probe address
+                 * and allow the page fault handler to continue as a
+                 * normal page fault.
+                 */
+                regs->ARM_pc = (long)cur->addr;
+                if (kcb->kprobe_status == KPROBE_REENTER) {
+                        restore_previous_kprobe(kcb);
+                } else {
+                        reset_current_kprobe();
+                }
+                break;
+
+        case KPROBE_HIT_ACTIVE:
+        case KPROBE_HIT_SSDONE:
+                /*
+                 * We increment the nmissed count for accounting,
+                 * we can also use npre/npostfault count for accounting
+                 * these specific fault cases.
+                 */
+                kprobes_inc_nmissed_count(cur);
+
+                /*
+                 * We come here because instructions in the pre/post
+                 * handler caused the page_fault, this could happen
+                 * if handler tries to access user space by
+                 * copy_from_user(), get_user() etc. Let the
+                 * user-specified handler try to fix it.
+                 */
+                if (cur->fault_handler && cur->fault_handler(cur, regs, fsr))
+                        return 1;
+                break;
+
+        default:
+                break;
+        }
+
+        return 0;
+}
+
+int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
+                                       unsigned long val, void *data)
+{
+        /*
+         * notify_die() is currently never called on ARM,
+         * so this callback is currently empty.
+         */
+        return NOTIFY_DONE;
+}
+
+/*
+ * When a retprobed function returns, trampoline_handler() is called,
+ * calling the kretprobe's handler. We construct a struct pt_regs to
+ * give a view of registers r0-r11 to the user return-handler.  This is
+ * not a complete pt_regs structure, but that should be plenty sufficient
+ * for kretprobe handlers which should normally be interested in r0 only
+ * anyway.
+ */
+static void __attribute__((naked)) __kprobes kretprobe_trampoline(void)
+{
+        __asm__ __volatile__ (
+                "stmdb  sp!, {r0 - r11}         \n\t"
+                "mov    r0, sp                  \n\t"
+                "bl     trampoline_handler      \n\t"
+                "mov    lr, r0                  \n\t"
+                "ldmia  sp!, {r0 - r11}         \n\t"
+                "mov    pc, lr                  \n\t"
+                : : : "memory");
+}
+
+/* Called from kretprobe_trampoline */
+static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
+{
+        struct kretprobe_instance *ri = NULL;
+        struct hlist_head *head, empty_rp;
+        struct hlist_node *node, *tmp;
+        unsigned long flags, orig_ret_address = 0;
+        unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline;
+
+        INIT_HLIST_HEAD(&empty_rp);
+        spin_lock_irqsave(&kretprobe_lock, flags);
+        head = kretprobe_inst_table_head(current);
+
+        /*
+         * It is possible to have multiple instances associated with a given
+         * task either because multiple functions in the call path have
+         * a return probe installed on them, and/or more than one return
+         * probe was registered for a target function.
+         *
+         * We can handle this because:
+         *     - instances are always inserted at the head of the list
+         *     - when multiple return probes are registered for the same
+         *       function, the first instance's ret_addr will point to the
+         *       real return address, and all the rest will point to
+         *       kretprobe_trampoline
+         */
+        hlist_for_each_entry_safe(ri, node, tmp, head, hlist) {
+                if (ri->task != current)
+                        /* another task is sharing our hash bucket */
+                        continue;
+
+                if (ri->rp && ri->rp->handler) {
+                        __get_cpu_var(current_kprobe) = &ri->rp->kp;
+                        get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
+                        ri->rp->handler(ri, regs);
+                        __get_cpu_var(current_kprobe) = NULL;
+                }
+
+                orig_ret_address = (unsigned long)ri->ret_addr;
+                recycle_rp_inst(ri, &empty_rp);
+
+                if (orig_ret_address != trampoline_address)
+                        /*
+                         * This is the real return address. Any other
+                         * instances associated with this task are for
+                         * other calls deeper on the call stack
+                         */
+                        break;
+        }
+
+        kretprobe_assert(ri, orig_ret_address, trampoline_address);
+        spin_unlock_irqrestore(&kretprobe_lock, flags);
+
+        hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) {
+                hlist_del(&ri->hlist);
+                kfree(ri);
+        }
+
+        return (void *)orig_ret_address;
+}
+
+/* Called with kretprobe_lock held. */
+void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
+                                      struct pt_regs *regs)
+{
+        ri->ret_addr = (kprobe_opcode_t *)regs->ARM_lr;
+
+        /* Replace the return addr with trampoline addr. */
+        regs->ARM_lr = (unsigned long)&kretprobe_trampoline;
+}
+
+int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
+{
+        struct jprobe *jp = container_of(p, struct jprobe, kp);
+        struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+        long sp_addr = regs->ARM_sp;
+
+        kcb->jprobe_saved_regs = *regs;
+        memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr));
+        regs->ARM_pc = (long)jp->entry;
+        regs->ARM_cpsr |= PSR_I_BIT;
+        preempt_disable();
+        return 1;
+}
+
+void __kprobes jprobe_return(void)
+{
+        struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+
+        __asm__ __volatile__ (
+                /*
+                 * Setup an empty pt_regs. Fill SP and PC fields as
+                 * they're needed by longjmp_break_handler.
+                 */
+                "sub    sp, %0, %1              \n\t"
+                "ldr    r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t"
+                "str    %0, [sp, %2]            \n\t"
+                "str    r0, [sp, %3]            \n\t"
+                "mov    r0, sp                  \n\t"
+                "bl     kprobe_handler          \n\t"
+
+                /*
+                 * Return to the context saved by setjmp_pre_handler
+                 * and restored by longjmp_break_handler.
+                 */
+                "ldr    r0, [sp, %4]            \n\t"
+                "msr    cpsr_cxsf, r0           \n\t"
+                "ldmia  sp, {r0 - pc}           \n\t"
+                :
+                : "r" (kcb->jprobe_saved_regs.ARM_sp),
+                  "I" (sizeof(struct pt_regs)),
+                  "J" (offsetof(struct pt_regs, ARM_sp)),
+                  "J" (offsetof(struct pt_regs, ARM_pc)),
+                  "J" (offsetof(struct pt_regs, ARM_cpsr))
+                : "memory", "cc");
+}
+
+int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
+{
+        struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
+        long stack_addr = kcb->jprobe_saved_regs.ARM_sp;
+        long orig_sp = regs->ARM_sp;
+        struct jprobe *jp = container_of(p, struct jprobe, kp);
+
+        if (regs->ARM_pc == JPROBE_MAGIC_ADDR) {
+                if (orig_sp != stack_addr) {
+                        struct pt_regs *saved_regs =
+                                (struct pt_regs *)kcb->jprobe_saved_regs.ARM_sp;
+                        printk("current sp %lx does not match saved sp %lx\n",
+                               orig_sp, stack_addr);
+                        printk("Saved registers for jprobe %p\n", jp);
+                        show_regs(saved_regs);
+                        printk("Current registers\n");
+                        show_regs(regs);
+                        BUG();
+                }
+                *regs = kcb->jprobe_saved_regs;
+                memcpy((void *)stack_addr, kcb->jprobes_stack,
+                       MIN_STACK_SIZE(stack_addr));
+                preempt_enable_no_resched();
+                return 1;
+        }
+        return 0;
+}
+
+static struct undef_hook kprobes_break_hook = {
+        .instr_mask     = 0xffffffff,
+        .instr_val      = KPROBE_BREAKPOINT_INSTRUCTION,
+        .cpsr_mask      = MODE_MASK,
+        .cpsr_val       = SVC_MODE,
+        .fn             = kprobe_trap_handler,
+};
+
+int __init arch_init_kprobes()
+{
+        arm_kprobe_decode_init();
+        register_undef_hook(&kprobes_break_hook);
+        return 0;
+}
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index e59b5b84168d..b5867eca1d0b 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -325,7 +325,9 @@ void timer_tick(void)
         profile_tick(CPU_PROFILING);
         do_leds();
         do_set_rtc();
+        write_seqlock(&xtime_lock);
         do_timer(1);
+        write_sequnlock(&xtime_lock);
 #ifndef CONFIG_SMP
         update_process_times(user_mode(get_irq_regs()));
 #endif
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index c34db4e868fa..5595fdd75e82 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -19,6 +19,7 @@
 #include <linux/kallsyms.h>
 #include <linux/delay.h>
 #include <linux/init.h>
+#include <linux/kprobes.h>
 
 #include <asm/atomic.h>
 #include <asm/cacheflush.h>
@@ -46,15 +47,6 @@ __setup("user_debug=", user_debug_setup);
 
 static void dump_mem(const char *str, unsigned long bottom, unsigned long top);
 
-static inline int in_exception_text(unsigned long ptr)
-{
-        extern char __exception_text_start[];
-        extern char __exception_text_end[];
-
-        return ptr >= (unsigned long)&__exception_text_start &&
-               ptr < (unsigned long)&__exception_text_end;
-}
-
 void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
 {
 #ifdef CONFIG_KALLSYMS
@@ -322,6 +314,17 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
                 get_user(instr, (u32 __user *)pc);
         }
 
+#ifdef CONFIG_KPROBES
+        /*
+         * It is possible to have recursive kprobes, so we can't call
+         * the kprobe trap handler with the undef_lock held.
+         */
+        if (instr == KPROBE_BREAKPOINT_INSTRUCTION && !user_mode(regs)) {
+                kprobe_trap_handler(regs, instr);
+                return;
+        }
+#endif
+
         spin_lock_irqsave(&undef_lock, flags);
         list_for_each_entry(hook, &undef_hook, node) {
                 if ((instr & hook->instr_mask) == hook->instr_val &&
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 5ff5406666b4..30f732c7fdb5 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -94,6 +94,7 @@ SECTIONS
                         TEXT_TEXT
                         SCHED_TEXT
                         LOCK_TEXT
+                        KPROBES_TEXT
 #ifdef CONFIG_MMU
                         *(.fixup)
 #endif
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
index 0446ef2f5bd6..b016be2b0e35 100644
--- a/arch/arm/mach-aaec2000/core.c
+++ b/arch/arm/mach-aaec2000/core.c
@@ -130,13 +130,9 @@ static irqreturn_t
 aaec2000_timer_interrupt(int irq, void *dev_id)
 {
         /* TODO: Check timer accuracy */
-        write_seqlock(&xtime_lock);
-
         timer_tick();
         TIMER1_CLEAR = 1;
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 05a9f8a1b45e..5b0422cdde76 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -22,6 +22,9 @@ config ARCH_AT91SAM9263
 config ARCH_AT91SAM9RL
         bool "AT91SAM9RL"
 
+config ARCH_AT91CAP9
+        bool "AT91CAP9"
+
 config ARCH_AT91X40
         bool "AT91x40"
 
@@ -178,6 +181,21 @@ endif
 
 # ----------------------------------------------------------
 
+if ARCH_AT91CAP9
+
+comment "AT91CAP9 Board Type"
+
+config MACH_AT91CAP9ADK
+        bool "Atmel AT91CAP9A-DK Evaluation Kit"
+        depends on ARCH_AT91CAP9
+        help
+          Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit.
+          <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138>
+
+endif
+
+# ----------------------------------------------------------
+
 if ARCH_AT91X40
 
 comment "AT91X40 Board Type"
@@ -198,13 +216,13 @@ comment "AT91 Board Options"
 
 config MTD_AT91_DATAFLASH_CARD
         bool "Enable DataFlash Card support"
-        depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK)
+        depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK)
         help
           Enable support for the DataFlash card.
 
 config MTD_NAND_AT91_BUSWIDTH_16
         bool "Enable 16-bit data bus interface to NAND flash"
-        depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK)
+        depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK)
         help
           On AT91SAM926x boards both types of NAND flash can be present
           (8 and 16 bit data bus width).
@@ -219,6 +237,22 @@ config AT91_PROGRAMMABLE_CLOCKS
           Select this if you need to program one or more of the PCK0..PCK3
           programmable clock outputs.
 
+config AT91_TIMER_HZ
+       int "Kernel HZ (jiffies per second)"
+       range 32 1024
+       depends on ARCH_AT91
+       default "128" if ARCH_AT91RM9200
+       default "100"
+       help
+          On AT91rm9200 chips where you're using a system clock derived
+          from the 32768 Hz hardware clock, this tick rate should divide
+          it exactly: use a power-of-two value, such as 128 or 256, to
+          reduce timing errors caused by rounding.
+
+          On AT91sam926x chips, or otherwise when using a higher precision
+          system clock (of at least several MHz), rounding is less of a
+          problem so it can be safer to use a decimal values like 100.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index a21f08c64ea6..bf5f293dccf8 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -8,7 +8,6 @@ obj-n		:=
 obj-            :=
 
 obj-$(CONFIG_AT91_PMC_UNIT)     += clock.o
-obj-$(CONFIG_PM)                += pm.o
 
 # CPU-specific support
 obj-$(CONFIG_ARCH_AT91RM9200)   += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
@@ -16,6 +15,7 @@ obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o at91sam9260_d
 obj-$(CONFIG_ARCH_AT91SAM9261)  += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
 obj-$(CONFIG_ARCH_AT91SAM9263)  += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
 obj-$(CONFIG_ARCH_AT91SAM9RL)   += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o
+obj-$(CONFIG_ARCH_AT91CAP9)     += at91cap9.o at91sam926x_time.o at91cap9_devices.o
 obj-$(CONFIG_ARCH_AT91X40)      += at91x40.o at91x40_time.o
 
 # AT91RM9200 board-specific support
@@ -29,7 +29,6 @@ obj-$(CONFIG_MACH_KB9200)	+= board-kb9202.o
 obj-$(CONFIG_MACH_ATEB9200)     += board-eb9200.o
 obj-$(CONFIG_MACH_KAFA)         += board-kafa.o
 obj-$(CONFIG_MACH_PICOTUX2XX)   += board-picotux200.o
-obj-$(CONFIG_MACH_AT91EB01)     += board-eb01.o
 
 # AT91SAM9260 board-specific support
 obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
@@ -43,19 +42,17 @@ obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
 # AT91SAM9RL board-specific support
 obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
 
-# LEDs support
-led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
-led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
-led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o
-led-$(CONFIG_MACH_CSB337)       += leds.o
-led-$(CONFIG_MACH_CSB637)       += leds.o
-led-$(CONFIG_MACH_KB9200)       += leds.o
-led-$(CONFIG_MACH_KAFA)         += leds.o
-obj-$(CONFIG_LEDS) += $(led-y)
+# AT91CAP9 board-specific support
+obj-$(CONFIG_MACH_AT91CAP9ADK)  += board-cap9adk.o
 
-# VGA support
-#obj-$(CONFIG_FB_S1D13XXX)      += ics1523.o
+# AT91X40 board-specific support
+obj-$(CONFIG_MACH_AT91EB01)     += board-eb01.o
 
+# Drivers
+obj-y                           += leds.o
+
+# Power Management
+obj-$(CONFIG_PM)                += pm.o
 
 ifeq ($(CONFIG_PM_DEBUG),y)
 CFLAGS_pm.o += -DDEBUG
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
index e667dcc7cd34..071a2506a69f 100644
--- a/arch/arm/mach-at91/Makefile.boot
+++ b/arch/arm/mach-at91/Makefile.boot
@@ -3,7 +3,12 @@
 #   PARAMS_PHYS must be within 4MB of ZRELADDR
 #   INITRD_PHYS must be in RAM
 
+ifeq ($(CONFIG_ARCH_AT91CAP9),y)
+   zreladdr-y   := 0x70008000
+params_phys-y   := 0x70000100
+initrd_phys-y   := 0x70410000
+else
    zreladdr-y   := 0x20008000
 params_phys-y   := 0x20000100
 initrd_phys-y   := 0x20410000
-
+endif
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c
new file mode 100644
index 000000000000..48d27d8000b0
--- /dev/null
+++ b/arch/arm/mach-at91/at91cap9.c
@@ -0,0 +1,365 @@
+/*
+ * arch/arm/mach-at91/at91cap9.c
+ *
+ *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
+ *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
+ *  Copyright (C) 2007 Atmel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/arch/at91cap9.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+
+#include "generic.h"
+#include "clock.h"
+
+static struct map_desc at91cap9_io_desc[] __initdata = {
+        {
+                .virtual        = AT91_VA_BASE_SYS,
+                .pfn            = __phys_to_pfn(AT91_BASE_SYS),
+                .length         = SZ_16K,
+                .type           = MT_DEVICE,
+        }, {
+                .virtual        = AT91_IO_VIRT_BASE - AT91CAP9_SRAM_SIZE,
+                .pfn            = __phys_to_pfn(AT91CAP9_SRAM_BASE),
+                .length         = AT91CAP9_SRAM_SIZE,
+                .type           = MT_DEVICE,
+        },
+};
+
+/* --------------------------------------------------------------------
+ *  Clocks
+ * -------------------------------------------------------------------- */
+
+/*
+ * The peripheral clocks.
+ */
+static struct clk pioABCD_clk = {
+        .name           = "pioABCD_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_PIOABCD,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mpb0_clk = {
+        .name           = "mpb0_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_MPB0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mpb1_clk = {
+        .name           = "mpb1_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_MPB1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mpb2_clk = {
+        .name           = "mpb2_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_MPB2,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mpb3_clk = {
+        .name           = "mpb3_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_MPB3,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mpb4_clk = {
+        .name           = "mpb4_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_MPB4,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart0_clk = {
+        .name           = "usart0_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_US0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart1_clk = {
+        .name           = "usart1_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_US1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk usart2_clk = {
+        .name           = "usart2_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_US2,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mmc0_clk = {
+        .name           = "mci0_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_MCI0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk mmc1_clk = {
+        .name           = "mci1_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_MCI1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk can_clk = {
+        .name           = "can_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_CAN,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk twi_clk = {
+        .name           = "twi_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_TWI,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi0_clk = {
+        .name           = "spi0_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_SPI0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk spi1_clk = {
+        .name           = "spi1_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_SPI1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc0_clk = {
+        .name           = "ssc0_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_SSC0,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ssc1_clk = {
+        .name           = "ssc1_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_SSC1,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ac97_clk = {
+        .name           = "ac97_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_AC97C,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk tcb_clk = {
+        .name           = "tcb_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_TCB,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk pwmc_clk = {
+        .name           = "pwmc_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_PWMC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk macb_clk = {
+        .name           = "macb_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_EMAC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk aestdes_clk = {
+        .name           = "aestdes_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_AESTDES,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk adc_clk = {
+        .name           = "adc_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_ADC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk isi_clk = {
+        .name           = "isi_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_ISI,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk lcdc_clk = {
+        .name           = "lcdc_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_LCDC,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk dma_clk = {
+        .name           = "dma_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_DMA,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk udphs_clk = {
+        .name           = "udphs_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_UDPHS,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+static struct clk ohci_clk = {
+        .name           = "ohci_clk",
+        .pmc_mask       = 1 << AT91CAP9_ID_UHP,
+        .type           = CLK_TYPE_PERIPHERAL,
+};
+
+static struct clk *periph_clocks[] __initdata = {
+        &pioABCD_clk,
+        &mpb0_clk,
+        &mpb1_clk,
+        &mpb2_clk,
+        &mpb3_clk,
+        &mpb4_clk,
+        &usart0_clk,
+        &usart1_clk,
+        &usart2_clk,
+        &mmc0_clk,
+        &mmc1_clk,
+        &can_clk,
+        &twi_clk,
+        &spi0_clk,
+        &spi1_clk,
+        &ssc0_clk,
+        &ssc1_clk,
+        &ac97_clk,
+        &tcb_clk,
+        &pwmc_clk,
+        &macb_clk,
+        &aestdes_clk,
+        &adc_clk,
+        &isi_clk,
+        &lcdc_clk,
+        &dma_clk,
+        &udphs_clk,
+        &ohci_clk,
+        // irq0 .. irq1
+};
+
+/*
+ * The four programmable clocks.
+ * You must configure pin multiplexing to bring these signals out.
+ */
+static struct clk pck0 = {
+        .name           = "pck0",
+        .pmc_mask       = AT91_PMC_PCK0,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 0,
+};
+static struct clk pck1 = {
+        .name           = "pck1",
+        .pmc_mask       = AT91_PMC_PCK1,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 1,
+};
+static struct clk pck2 = {
+        .name           = "pck2",
+        .pmc_mask       = AT91_PMC_PCK2,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 2,
+};
+static struct clk pck3 = {
+        .name           = "pck3",
+        .pmc_mask       = AT91_PMC_PCK3,
+        .type           = CLK_TYPE_PROGRAMMABLE,
+        .id             = 3,
+};
+
+static void __init at91cap9_register_clocks(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
+                clk_register(periph_clocks[i]);
+
+        clk_register(&pck0);
+        clk_register(&pck1);
+        clk_register(&pck2);
+        clk_register(&pck3);
+}
+
+/* --------------------------------------------------------------------
+ *  GPIO
+ * -------------------------------------------------------------------- */
+
+static struct at91_gpio_bank at91cap9_gpio[] = {
+        {
+                .id             = AT91CAP9_ID_PIOABCD,
+                .offset         = AT91_PIOA,
+                .clock          = &pioABCD_clk,
+        }, {
+                .id             = AT91CAP9_ID_PIOABCD,
+                .offset         = AT91_PIOB,
+                .clock          = &pioABCD_clk,
+        }, {
+                .id             = AT91CAP9_ID_PIOABCD,
+                .offset         = AT91_PIOC,
+                .clock          = &pioABCD_clk,
+        }, {
+                .id             = AT91CAP9_ID_PIOABCD,
+                .offset         = AT91_PIOD,
+                .clock          = &pioABCD_clk,
+        }
+};
+
+static void at91cap9_reset(void)
+{
+        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
+}
+
+/* --------------------------------------------------------------------
+ *  AT91CAP9 processor initialization
+ * -------------------------------------------------------------------- */
+
+void __init at91cap9_initialize(unsigned long main_clock)
+{
+        /* Map peripherals */
+        iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
+
+        at91_arch_reset = at91cap9_reset;
+        at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
+
+        /* Init clock subsystem */
+        at91_clock_init(main_clock);
+
+        /* Register the processor-specific clocks */
+        at91cap9_register_clocks();
+
+        /* Register GPIO subsystem */
+        at91_gpio_init(at91cap9_gpio, 4);
+}
+
+/* --------------------------------------------------------------------
+ *  Interrupt initialization
+ * -------------------------------------------------------------------- */
+
+/*
+ * The default interrupt priority levels (0 = lowest, 7 = highest).
+ */
+static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = {
+        7,      /* Advanced Interrupt Controller (FIQ) */
+        7,      /* System Peripherals */
+        1,      /* Parallel IO Controller A, B, C and D */
+        0,      /* MP Block Peripheral 0 */
+        0,      /* MP Block Peripheral 1 */
+        0,      /* MP Block Peripheral 2 */
+        0,      /* MP Block Peripheral 3 */
+        0,      /* MP Block Peripheral 4 */
+        5,      /* USART 0 */
+        5,      /* USART 1 */
+        5,      /* USART 2 */
+        0,      /* Multimedia Card Interface 0 */
+        0,      /* Multimedia Card Interface 1 */
+        3,      /* CAN */
+        6,      /* Two-Wire Interface */
+        5,      /* Serial Peripheral Interface 0 */
+        5,      /* Serial Peripheral Interface 1 */
+        4,      /* Serial Synchronous Controller 0 */
+        4,      /* Serial Synchronous Controller 1 */
+        5,      /* AC97 Controller */
+        0,      /* Timer Counter 0, 1 and 2 */
+        0,      /* Pulse Width Modulation Controller */
+        3,      /* Ethernet */
+        0,      /* Advanced Encryption Standard, Triple DES*/
+        0,      /* Analog-to-Digital Converter */
+        0,      /* Image Sensor Interface */
+        3,      /* LCD Controller */
+        0,      /* DMA Controller */
+        2,      /* USB Device Port */
+        2,      /* USB Host port */
+        0,      /* Advanced Interrupt Controller (IRQ0) */
+        0,      /* Advanced Interrupt Controller (IRQ1) */
+};
+
+void __init at91cap9_init_interrupts(unsigned int priority[NR_AIC_IRQS])
+{
+        if (!priority)
+                priority = at91cap9_default_irq_priority;
+
+        /* Initialize the AIC interrupt controller */
+        at91_aic_init(priority);
+
+        /* Enable GPIO interrupts */
+        at91_gpio_irq_setup();
+}
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c
new file mode 100644
index 000000000000..c50fad9cd143
--- /dev/null
+++ b/arch/arm/mach-at91/at91cap9_devices.c
@@ -0,0 +1,1066 @@
+/*
+ * arch/arm/mach-at91/at91cap9_devices.c
+ *
+ *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
+ *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
+ *  Copyright (C) 2007 Atmel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+
+#include <video/atmel_lcdc.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91cap9.h>
+#include <asm/arch/at91sam926x_mc.h>
+#include <asm/arch/at91cap9_matrix.h>
+
+#include "generic.h"
+
+
+/* --------------------------------------------------------------------
+ *  USB Host
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
+static struct at91_usbh_data usbh_data;
+
+static struct resource usbh_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_UHP_BASE,
+                .end    = AT91CAP9_UHP_BASE + SZ_1M - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_UHP,
+                .end    = AT91CAP9_ID_UHP,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91_usbh_device = {
+        .name           = "at91_ohci",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &ohci_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &usbh_data,
+        },
+        .resource       = usbh_resources,
+        .num_resources  = ARRAY_SIZE(usbh_resources),
+};
+
+void __init at91_add_device_usbh(struct at91_usbh_data *data)
+{
+        int i;
+
+        if (!data)
+                return;
+
+        /* Enable VBus control for UHP ports */
+        for (i = 0; i < data->ports; i++) {
+                if (data->vbus_pin[i])
+                        at91_set_gpio_output(data->vbus_pin[i], 0);
+        }
+
+        usbh_data = *data;
+        platform_device_register(&at91_usbh_device);
+}
+#else
+void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  Ethernet
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
+static u64 eth_dmamask = DMA_BIT_MASK(32);
+static struct at91_eth_data eth_data;
+
+static struct resource eth_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_EMAC,
+                .end    = AT91CAP9_BASE_EMAC + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_EMAC,
+                .end    = AT91CAP9_ID_EMAC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_eth_device = {
+        .name           = "macb",
+        .id             = -1,
+        .dev            = {
+                                .dma_mask               = &eth_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &eth_data,
+        },
+        .resource       = eth_resources,
+        .num_resources  = ARRAY_SIZE(eth_resources),
+};
+
+void __init at91_add_device_eth(struct at91_eth_data *data)
+{
+        if (!data)
+                return;
+
+        if (data->phy_irq_pin) {
+                at91_set_gpio_input(data->phy_irq_pin, 0);
+                at91_set_deglitch(data->phy_irq_pin, 1);
+        }
+
+        /* Pins used for MII and RMII */
+        at91_set_A_periph(AT91_PIN_PB21, 0);    /* ETXCK_EREFCK */
+        at91_set_A_periph(AT91_PIN_PB22, 0);    /* ERXDV */
+        at91_set_A_periph(AT91_PIN_PB25, 0);    /* ERX0 */
+        at91_set_A_periph(AT91_PIN_PB26, 0);    /* ERX1 */
+        at91_set_A_periph(AT91_PIN_PB27, 0);    /* ERXER */
+        at91_set_A_periph(AT91_PIN_PB28, 0);    /* ETXEN */
+        at91_set_A_periph(AT91_PIN_PB23, 0);    /* ETX0 */
+        at91_set_A_periph(AT91_PIN_PB24, 0);    /* ETX1 */
+        at91_set_A_periph(AT91_PIN_PB30, 0);    /* EMDIO */
+        at91_set_A_periph(AT91_PIN_PB29, 0);    /* EMDC */
+
+        if (!data->is_rmii) {
+                at91_set_B_periph(AT91_PIN_PC25, 0);    /* ECRS */
+                at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
+                at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
+                at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
+                at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
+                at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
+                at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
+                at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
+        }
+
+        eth_data = *data;
+        platform_device_register(&at91cap9_eth_device);
+}
+#else
+void __init at91_add_device_eth(struct at91_eth_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  MMC / SD
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
+static u64 mmc_dmamask = DMA_BIT_MASK(32);
+static struct at91_mmc_data mmc0_data, mmc1_data;
+
+static struct resource mmc0_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_MCI0,
+                .end    = AT91CAP9_BASE_MCI0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_MCI0,
+                .end    = AT91CAP9_ID_MCI0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_mmc0_device = {
+        .name           = "at91_mci",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &mmc_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &mmc0_data,
+        },
+        .resource       = mmc0_resources,
+        .num_resources  = ARRAY_SIZE(mmc0_resources),
+};
+
+static struct resource mmc1_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_MCI1,
+                .end    = AT91CAP9_BASE_MCI1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_MCI1,
+                .end    = AT91CAP9_ID_MCI1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_mmc1_device = {
+        .name           = "at91_mci",
+        .id             = 1,
+        .dev            = {
+                                .dma_mask               = &mmc_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &mmc1_data,
+        },
+        .resource       = mmc1_resources,
+        .num_resources  = ARRAY_SIZE(mmc1_resources),
+};
+
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
+{
+        if (!data)
+                return;
+
+        /* input/irq */
+        if (data->det_pin) {
+                at91_set_gpio_input(data->det_pin, 1);
+                at91_set_deglitch(data->det_pin, 1);
+        }
+        if (data->wp_pin)
+                at91_set_gpio_input(data->wp_pin, 1);
+        if (data->vcc_pin)
+                at91_set_gpio_output(data->vcc_pin, 0);
+
+        if (mmc_id == 0) {              /* MCI0 */
+                /* CLK */
+                at91_set_A_periph(AT91_PIN_PA2, 0);
+
+                /* CMD */
+                at91_set_A_periph(AT91_PIN_PA1, 1);
+
+                /* DAT0, maybe DAT1..DAT3 */
+                at91_set_A_periph(AT91_PIN_PA0, 1);
+                if (data->wire4) {
+                        at91_set_A_periph(AT91_PIN_PA3, 1);
+                        at91_set_A_periph(AT91_PIN_PA4, 1);
+                        at91_set_A_periph(AT91_PIN_PA5, 1);
+                }
+
+                mmc0_data = *data;
+                at91_clock_associate("mci0_clk", &at91cap9_mmc1_device.dev, "mci_clk");
+                platform_device_register(&at91cap9_mmc0_device);
+        } else {                        /* MCI1 */
+                /* CLK */
+                at91_set_A_periph(AT91_PIN_PA16, 0);
+
+                /* CMD */
+                at91_set_A_periph(AT91_PIN_PA17, 1);
+
+                /* DAT0, maybe DAT1..DAT3 */
+                at91_set_A_periph(AT91_PIN_PA18, 1);
+                if (data->wire4) {
+                        at91_set_A_periph(AT91_PIN_PA19, 1);
+                        at91_set_A_periph(AT91_PIN_PA20, 1);
+                        at91_set_A_periph(AT91_PIN_PA21, 1);
+                }
+
+                mmc1_data = *data;
+                at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk");
+                platform_device_register(&at91cap9_mmc1_device);
+        }
+}
+#else
+void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  NAND / SmartMedia
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
+static struct at91_nand_data nand_data;
+
+#define NAND_BASE       AT91_CHIPSELECT_3
+
+static struct resource nand_resources[] = {
+        {
+                .start  = NAND_BASE,
+                .end    = NAND_BASE + SZ_256M - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device at91cap9_nand_device = {
+        .name           = "at91_nand",
+        .id             = -1,
+        .dev            = {
+                                .platform_data  = &nand_data,
+        },
+        .resource       = nand_resources,
+        .num_resources  = ARRAY_SIZE(nand_resources),
+};
+
+void __init at91_add_device_nand(struct at91_nand_data *data)
+{
+        unsigned long csa, mode;
+
+        if (!data)
+                return;
+
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
+
+        /* set the bus interface characteristics */
+        at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1)
+                        | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1));
+
+        at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6)
+                        | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6));
+
+        at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8));
+
+        if (data->bus_width_16)
+                mode = AT91_SMC_DBW_16;
+        else
+                mode = AT91_SMC_DBW_8;
+        at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
+
+        /* enable pin */
+        if (data->enable_pin)
+                at91_set_gpio_output(data->enable_pin, 1);
+
+        /* ready/busy pin */
+        if (data->rdy_pin)
+                at91_set_gpio_input(data->rdy_pin, 1);
+
+        /* card detect pin */
+        if (data->det_pin)
+                at91_set_gpio_input(data->det_pin, 1);
+
+        nand_data = *data;
+        platform_device_register(&at91cap9_nand_device);
+}
+#else
+void __init at91_add_device_nand(struct at91_nand_data *data) {}
+#endif
+
+/* --------------------------------------------------------------------
+ *  TWI (i2c)
+ * -------------------------------------------------------------------- */
+
+/*
+ * Prefer the GPIO code since the TWI controller isn't robust
+ * (gets overruns and underruns under load) and can only issue
+ * repeated STARTs in one scenario (the driver doesn't yet handle them).
+ */
+#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
+
+static struct i2c_gpio_platform_data pdata = {
+        .sda_pin                = AT91_PIN_PB4,
+        .sda_is_open_drain      = 1,
+        .scl_pin                = AT91_PIN_PB5,
+        .scl_is_open_drain      = 1,
+        .udelay                 = 2,            /* ~100 kHz */
+};
+
+static struct platform_device at91cap9_twi_device = {
+        .name                   = "i2c-gpio",
+        .id                     = -1,
+        .dev.platform_data      = &pdata,
+};
+
+void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
+{
+        at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
+        at91_set_multi_drive(AT91_PIN_PB4, 1);
+
+        at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
+        at91_set_multi_drive(AT91_PIN_PB5, 1);
+
+        i2c_register_board_info(0, devices, nr_devices);
+        platform_device_register(&at91cap9_twi_device);
+}
+
+#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
+
+static struct resource twi_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_TWI,
+                .end    = AT91CAP9_BASE_TWI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_TWI,
+                .end    = AT91CAP9_ID_TWI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_twi_device = {
+        .name           = "at91_i2c",
+        .id             = -1,
+        .resource       = twi_resources,
+        .num_resources  = ARRAY_SIZE(twi_resources),
+};
+
+void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
+{
+        /* pins used for TWI interface */
+        at91_set_B_periph(AT91_PIN_PB4, 0);             /* TWD */
+        at91_set_multi_drive(AT91_PIN_PB4, 1);
+
+        at91_set_B_periph(AT91_PIN_PB5, 0);             /* TWCK */
+        at91_set_multi_drive(AT91_PIN_PB5, 1);
+
+        i2c_register_board_info(0, devices, nr_devices);
+        platform_device_register(&at91cap9_twi_device);
+}
+#else
+void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
+#endif
+
+/* --------------------------------------------------------------------
+ *  SPI
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+static struct resource spi0_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_SPI0,
+                .end    = AT91CAP9_BASE_SPI0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_SPI0,
+                .end    = AT91CAP9_ID_SPI0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_spi0_device = {
+        .name           = "atmel_spi",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &spi_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = spi0_resources,
+        .num_resources  = ARRAY_SIZE(spi0_resources),
+};
+
+static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 };
+
+static struct resource spi1_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_SPI1,
+                .end    = AT91CAP9_BASE_SPI1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_SPI1,
+                .end    = AT91CAP9_ID_SPI1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_spi1_device = {
+        .name           = "atmel_spi",
+        .id             = 1,
+        .dev            = {
+                                .dma_mask               = &spi_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = spi1_resources,
+        .num_resources  = ARRAY_SIZE(spi1_resources),
+};
+
+static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
+
+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
+{
+        int i;
+        unsigned long cs_pin;
+        short enable_spi0 = 0;
+        short enable_spi1 = 0;
+
+        /* Choose SPI chip-selects */
+        for (i = 0; i < nr_devices; i++) {
+                if (devices[i].controller_data)
+                        cs_pin = (unsigned long) devices[i].controller_data;
+                else if (devices[i].bus_num == 0)
+                        cs_pin = spi0_standard_cs[devices[i].chip_select];
+                else
+                        cs_pin = spi1_standard_cs[devices[i].chip_select];
+
+                if (devices[i].bus_num == 0)
+                        enable_spi0 = 1;
+                else
+                        enable_spi1 = 1;
+
+                /* enable chip-select pin */
+                at91_set_gpio_output(cs_pin, 1);
+
+                /* pass chip-select pin to driver */
+                devices[i].controller_data = (void *) cs_pin;
+        }
+
+        spi_register_board_info(devices, nr_devices);
+
+        /* Configure SPI bus(es) */
+        if (enable_spi0) {
+                at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
+                at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
+                at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
+
+                at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk");
+                platform_device_register(&at91cap9_spi0_device);
+        }
+        if (enable_spi1) {
+                at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
+                at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
+                at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
+
+                at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk");
+                platform_device_register(&at91cap9_spi1_device);
+        }
+}
+#else
+void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  RTT
+ * -------------------------------------------------------------------- */
+
+static struct platform_device at91cap9_rtt_device = {
+        .name           = "at91_rtt",
+        .id             = -1,
+        .num_resources  = 0,
+};
+
+static void __init at91_add_device_rtt(void)
+{
+        platform_device_register(&at91cap9_rtt_device);
+}
+
+
+/* --------------------------------------------------------------------
+ *  Watchdog
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
+static struct platform_device at91cap9_wdt_device = {
+        .name           = "at91_wdt",
+        .id             = -1,
+        .num_resources  = 0,
+};
+
+static void __init at91_add_device_watchdog(void)
+{
+        platform_device_register(&at91cap9_wdt_device);
+}
+#else
+static void __init at91_add_device_watchdog(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  AC97
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
+static u64 ac97_dmamask = DMA_BIT_MASK(32);
+static struct atmel_ac97_data ac97_data;
+
+static struct resource ac97_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_AC97C,
+                .end    = AT91CAP9_BASE_AC97C + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_AC97C,
+                .end    = AT91CAP9_ID_AC97C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_ac97_device = {
+        .name           = "ac97c",
+        .id             = 1,
+        .dev            = {
+                                .dma_mask               = &ac97_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &ac97_data,
+        },
+        .resource       = ac97_resources,
+        .num_resources  = ARRAY_SIZE(ac97_resources),
+};
+
+void __init at91_add_device_ac97(struct atmel_ac97_data *data)
+{
+        if (!data)
+                return;
+
+        at91_set_A_periph(AT91_PIN_PA6, 0);     /* AC97FS */
+        at91_set_A_periph(AT91_PIN_PA7, 0);     /* AC97CK */
+        at91_set_A_periph(AT91_PIN_PA8, 0);     /* AC97TX */
+        at91_set_A_periph(AT91_PIN_PA9, 0);     /* AC97RX */
+
+        /* reset */
+        if (data->reset_pin)
+                at91_set_gpio_output(data->reset_pin, 0);
+
+        ac97_data = *data;
+        platform_device_register(&at91cap9_ac97_device);
+}
+#else
+void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  LCD Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+static u64 lcdc_dmamask = DMA_BIT_MASK(32);
+static struct atmel_lcdfb_info lcdc_data;
+
+static struct resource lcdc_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_LCDC_BASE,
+                .end    = AT91CAP9_LCDC_BASE + SZ_4K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_LCDC,
+                .end    = AT91CAP9_ID_LCDC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91_lcdc_device = {
+        .name           = "atmel_lcdfb",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &lcdc_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &lcdc_data,
+        },
+        .resource       = lcdc_resources,
+        .num_resources  = ARRAY_SIZE(lcdc_resources),
+};
+
+void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
+{
+        if (!data)
+                return;
+
+        at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
+        at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
+        at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
+        at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
+        at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
+        at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
+        at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
+        at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
+        at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
+        at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
+        at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
+        at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
+        at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
+        at91_set_A_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
+        at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
+        at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
+        at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
+        at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
+        at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
+        at91_set_A_periph(AT91_PIN_PC25, 0);    /* LCDD21 */
+        at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
+        at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
+
+        lcdc_data = *data;
+        platform_device_register(&at91_lcdc_device);
+}
+#else
+void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  SSC -- Synchronous Serial Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
+static u64 ssc0_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc0_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_SSC0,
+                .end    = AT91CAP9_BASE_SSC0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_SSC0,
+                .end    = AT91CAP9_ID_SSC0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_ssc0_device = {
+        .name   = "ssc",
+        .id     = 0,
+        .dev    = {
+                .dma_mask               = &ssc0_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc0_resources,
+        .num_resources  = ARRAY_SIZE(ssc0_resources),
+};
+
+static inline void configure_ssc0_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PB0, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PB1, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PB2, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PB3, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_A_periph(AT91_PIN_PB4, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_A_periph(AT91_PIN_PB5, 1);
+}
+
+static u64 ssc1_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc1_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_SSC1,
+                .end    = AT91CAP9_BASE_SSC1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_SSC1,
+                .end    = AT91CAP9_ID_SSC1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91cap9_ssc1_device = {
+        .name   = "ssc",
+        .id     = 1,
+        .dev    = {
+                .dma_mask               = &ssc1_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc1_resources,
+        .num_resources  = ARRAY_SIZE(ssc1_resources),
+};
+
+static inline void configure_ssc1_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PB6, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PB7, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PB8, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PB9, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_A_periph(AT91_PIN_PB10, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_A_periph(AT91_PIN_PB11, 1);
+}
+
+/*
+ * SSC controllers are accessed through library code, instead of any
+ * kind of all-singing/all-dancing driver.  For example one could be
+ * used by a particular I2S audio codec's driver, while another one
+ * on the same system might be used by a custom data capture driver.
+ */
+void __init at91_add_device_ssc(unsigned id, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        /*
+         * NOTE: caller is responsible for passing information matching
+         * "pins" to whatever will be using each particular controller.
+         */
+        switch (id) {
+        case AT91CAP9_ID_SSC0:
+                pdev = &at91cap9_ssc0_device;
+                configure_ssc0_pins(pins);
+                at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
+                break;
+        case AT91CAP9_ID_SSC1:
+                pdev = &at91cap9_ssc1_device;
+                configure_ssc1_pins(pins);
+                at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
+                break;
+        default:
+                return;
+        }
+
+        platform_device_register(pdev);
+}
+
+#else
+void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  UART
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_SERIAL_ATMEL)
+static struct resource dbgu_resources[] = {
+        [0] = {
+                .start  = AT91_VA_BASE_SYS + AT91_DBGU,
+                .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91_ID_SYS,
+                .end    = AT91_ID_SYS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data dbgu_data = {
+        .use_dma_tx     = 0,
+        .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
+        .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
+};
+
+static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device at91cap9_dbgu_device = {
+        .name           = "atmel_usart",
+        .id             = 0,
+        .dev            = {
+                                .dma_mask               = &dbgu_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &dbgu_data,
+        },
+        .resource       = dbgu_resources,
+        .num_resources  = ARRAY_SIZE(dbgu_resources),
+};
+
+static inline void configure_dbgu_pins(void)
+{
+        at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
+        at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
+}
+
+static struct resource uart0_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_US0,
+                .end    = AT91CAP9_BASE_US0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_US0,
+                .end    = AT91CAP9_ID_US0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart0_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static u64 uart0_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device at91cap9_uart0_device = {
+        .name           = "atmel_usart",
+        .id             = 1,
+        .dev            = {
+                                .dma_mask               = &uart0_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart0_data,
+        },
+        .resource       = uart0_resources,
+        .num_resources  = ARRAY_SIZE(uart0_resources),
+};
+
+static inline void configure_usart0_pins(unsigned pins)
+{
+        at91_set_A_periph(AT91_PIN_PA22, 1);            /* TXD0 */
+        at91_set_A_periph(AT91_PIN_PA23, 0);            /* RXD0 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PA24, 0);    /* RTS0 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PA25, 0);    /* CTS0 */
+}
+
+static struct resource uart1_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_US1,
+                .end    = AT91CAP9_BASE_US1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_US1,
+                .end    = AT91CAP9_ID_US1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart1_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static u64 uart1_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device at91cap9_uart1_device = {
+        .name           = "atmel_usart",
+        .id             = 2,
+        .dev            = {
+                                .dma_mask               = &uart1_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart1_data,
+        },
+        .resource       = uart1_resources,
+        .num_resources  = ARRAY_SIZE(uart1_resources),
+};
+
+static inline void configure_usart1_pins(unsigned pins)
+{
+        at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
+        at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
+}
+
+static struct resource uart2_resources[] = {
+        [0] = {
+                .start  = AT91CAP9_BASE_US2,
+                .end    = AT91CAP9_BASE_US2 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91CAP9_ID_US2,
+                .end    = AT91CAP9_ID_US2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct atmel_uart_data uart2_data = {
+        .use_dma_tx     = 1,
+        .use_dma_rx     = 1,
+};
+
+static u64 uart2_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device at91cap9_uart2_device = {
+        .name           = "atmel_usart",
+        .id             = 3,
+        .dev            = {
+                                .dma_mask               = &uart2_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart2_data,
+        },
+        .resource       = uart2_resources,
+        .num_resources  = ARRAY_SIZE(uart2_resources),
+};
+
+static inline void configure_usart2_pins(unsigned pins)
+{
+        at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
+        at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
+}
+
+static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
+struct platform_device *atmel_default_console_device;   /* the serial console device */
+
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        switch (id) {
+                case 0:         /* DBGU */
+                        pdev = &at91cap9_dbgu_device;
+                        configure_dbgu_pins();
+                        at91_clock_associate("mck", &pdev->dev, "usart");
+                        break;
+                case AT91CAP9_ID_US0:
+                        pdev = &at91cap9_uart0_device;
+                        configure_usart0_pins(pins);
+                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
+                        break;
+                case AT91CAP9_ID_US1:
+                        pdev = &at91cap9_uart1_device;
+                        configure_usart1_pins(pins);
+                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
+                        break;
+                case AT91CAP9_ID_US2:
+                        pdev = &at91cap9_uart2_device;
+                        configure_usart2_pins(pins);
+                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
+                        break;
+                default:
+                        return;
+        }
+        pdev->id = portnr;              /* update to mapped ID */
+
+        if (portnr < ATMEL_MAX_UART)
+                at91_uarts[portnr] = pdev;
+}
+
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART)
+                atmel_default_console_device = at91_uarts[portnr];
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+
+void __init at91_add_device_serial(void)
+{
+        int i;
+
+        for (i = 0; i < ATMEL_MAX_UART; i++) {
+                if (at91_uarts[i])
+                        platform_device_register(at91_uarts[i]);
+        }
+}
+#else
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
+void __init at91_add_device_serial(void) {}
+#endif
+
+
+/* -------------------------------------------------------------------- */
+/*
+ * These devices are always present and don't need any board-specific
+ * setup.
+ */
+static int __init at91_add_standard_devices(void)
+{
+        at91_add_device_rtt();
+        at91_add_device_watchdog();
+        return 0;
+}
+
+arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 2cad2bf864be..d688c1dbd925 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -301,28 +301,28 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks
 static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
         7,      /* Advanced Interrupt Controller (FIQ) */
         7,      /* System Peripherals */
-        0,      /* Parallel IO Controller A */
-        0,      /* Parallel IO Controller B */
-        0,      /* Parallel IO Controller C */
-        0,      /* Parallel IO Controller D */
-        6,      /* USART 0 */
-        6,      /* USART 1 */
-        6,      /* USART 2 */
-        6,      /* USART 3 */
+        1,      /* Parallel IO Controller A */
+        1,      /* Parallel IO Controller B */
+        1,      /* Parallel IO Controller C */
+        1,      /* Parallel IO Controller D */
+        5,      /* USART 0 */
+        5,      /* USART 1 */
+        5,      /* USART 2 */
+        5,      /* USART 3 */
         0,      /* Multimedia Card Interface */
-        4,      /* USB Device Port */
-        0,      /* Two-Wire Interface */
-        6,      /* Serial Peripheral Interface */
-        5,      /* Serial Synchronous Controller 0 */
-        5,      /* Serial Synchronous Controller 1 */
-        5,      /* Serial Synchronous Controller 2 */
+        2,      /* USB Device Port */
+        6,      /* Two-Wire Interface */
+        5,      /* Serial Peripheral Interface */
+        4,      /* Serial Synchronous Controller 0 */
+        4,      /* Serial Synchronous Controller 1 */
+        4,      /* Serial Synchronous Controller 2 */
         0,      /* Timer Counter 0 */
         0,      /* Timer Counter 1 */
         0,      /* Timer Counter 2 */
         0,      /* Timer Counter 3 */
         0,      /* Timer Counter 4 */
         0,      /* Timer Counter 5 */
-        3,      /* USB Host port */
+        2,      /* USB Host port */
         3,      /* Ethernet MAC */
         0,      /* Advanced Interrupt Controller (IRQ0) */
         0,      /* Advanced Interrupt Controller (IRQ1) */
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 9296833f91cc..ef6aeb86e980 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -13,6 +13,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
@@ -29,7 +30,7 @@
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static u64 ohci_dmamask = 0xffffffffUL;
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
 static struct at91_usbh_data usbh_data;
 
 static struct resource usbh_resources[] = {
@@ -50,7 +51,7 @@ static struct platform_device at91rm9200_usbh_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &ohci_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &usbh_data,
         },
         .resource       = usbh_resources,
@@ -125,7 +126,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
-static u64 eth_dmamask = 0xffffffffUL;
+static u64 eth_dmamask = DMA_BIT_MASK(32);
 static struct at91_eth_data eth_data;
 
 static struct resource eth_resources[] = {
@@ -146,7 +147,7 @@ static struct platform_device at91rm9200_eth_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &eth_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &eth_data,
         },
         .resource       = eth_resources,
@@ -285,7 +286,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = 0xffffffffUL;
+static u64 mmc_dmamask = DMA_BIT_MASK(32);
 static struct at91_mmc_data mmc_data;
 
 static struct resource mmc_resources[] = {
@@ -306,7 +307,7 @@ static struct platform_device at91rm9200_mmc_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &mmc_data,
         },
         .resource       = mmc_resources,
@@ -375,7 +376,7 @@ static struct at91_nand_data nand_data;
 static struct resource nand_resources[] = {
         {
                 .start  = NAND_BASE,
-                .end    = NAND_BASE + SZ_8M - 1,
+                .end    = NAND_BASE + SZ_256M - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -513,7 +514,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = 0xffffffffUL;
+static u64 spi_dmamask = DMA_BIT_MASK(32);
 
 static struct resource spi_resources[] = {
         [0] = {
@@ -533,7 +534,7 @@ static struct platform_device at91rm9200_spi_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
         .resource       = spi_resources,
         .num_resources  = ARRAY_SIZE(spi_resources),
@@ -557,8 +558,11 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
                 else
                         cs_pin = spi_standard_cs[devices[i].chip_select];
 
-                /* enable chip-select pin */
-                at91_set_gpio_output(cs_pin, 1);
+                if (devices[i].chip_select == 0)        /* for CS0 errata */
+                        at91_set_A_periph(cs_pin, 0);
+                else
+                        at91_set_gpio_output(cs_pin, 1);
+
 
                 /* pass chip-select pin to driver */
                 devices[i].controller_data = (void *) cs_pin;
@@ -613,24 +617,175 @@ static void __init at91_add_device_watchdog(void) {}
 
 
 /* --------------------------------------------------------------------
- *  LEDs
+ *  SSC -- Synchronous Serial Controller
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_LEDS)
-u8 at91_leds_cpu;
-u8 at91_leds_timer;
+#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
+static u64 ssc0_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc0_resources[] = {
+        [0] = {
+                .start  = AT91RM9200_BASE_SSC0,
+                .end    = AT91RM9200_BASE_SSC0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91RM9200_ID_SSC0,
+                .end    = AT91RM9200_ID_SSC0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91rm9200_ssc0_device = {
+        .name   = "ssc",
+        .id     = 0,
+        .dev    = {
+                .dma_mask               = &ssc0_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc0_resources,
+        .num_resources  = ARRAY_SIZE(ssc0_resources),
+};
+
+static inline void configure_ssc0_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PB0, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PB1, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PB2, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PB3, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_A_periph(AT91_PIN_PB4, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_A_periph(AT91_PIN_PB5, 1);
+}
+
+static u64 ssc1_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc1_resources[] = {
+        [0] = {
+                .start  = AT91RM9200_BASE_SSC1,
+                .end    = AT91RM9200_BASE_SSC1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91RM9200_ID_SSC1,
+                .end    = AT91RM9200_ID_SSC1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91rm9200_ssc1_device = {
+        .name   = "ssc",
+        .id     = 1,
+        .dev    = {
+                .dma_mask               = &ssc1_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc1_resources,
+        .num_resources  = ARRAY_SIZE(ssc1_resources),
+};
+
+static inline void configure_ssc1_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PB6, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PB7, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PB8, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PB9, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_A_periph(AT91_PIN_PB10, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_A_periph(AT91_PIN_PB11, 1);
+}
+
+static u64 ssc2_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc2_resources[] = {
+        [0] = {
+                .start  = AT91RM9200_BASE_SSC2,
+                .end    = AT91RM9200_BASE_SSC2 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91RM9200_ID_SSC2,
+                .end    = AT91RM9200_ID_SSC2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91rm9200_ssc2_device = {
+        .name   = "ssc",
+        .id     = 2,
+        .dev    = {
+                .dma_mask               = &ssc2_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc2_resources,
+        .num_resources  = ARRAY_SIZE(ssc2_resources),
+};
+
+static inline void configure_ssc2_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PB12, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PB13, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PB14, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PB15, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_A_periph(AT91_PIN_PB16, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_A_periph(AT91_PIN_PB17, 1);
+}
 
-void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+/*
+ * SSC controllers are accessed through library code, instead of any
+ * kind of all-singing/all-dancing driver.  For example one could be
+ * used by a particular I2S audio codec's driver, while another one
+ * on the same system might be used by a custom data capture driver.
+ */
+void __init at91_add_device_ssc(unsigned id, unsigned pins)
 {
-        /* Enable GPIO to access the LEDs */
-        at91_set_gpio_output(cpu_led, 1);
-        at91_set_gpio_output(timer_led, 1);
+        struct platform_device *pdev;
 
-        at91_leds_cpu   = cpu_led;
-        at91_leds_timer = timer_led;
+        /*
+         * NOTE: caller is responsible for passing information matching
+         * "pins" to whatever will be using each particular controller.
+         */
+        switch (id) {
+        case AT91RM9200_ID_SSC0:
+                pdev = &at91rm9200_ssc0_device;
+                configure_ssc0_pins(pins);
+                at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
+                break;
+        case AT91RM9200_ID_SSC1:
+                pdev = &at91rm9200_ssc1_device;
+                configure_ssc1_pins(pins);
+                at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
+                break;
+        case AT91RM9200_ID_SSC2:
+                pdev = &at91rm9200_ssc2_device;
+                configure_ssc2_pins(pins);
+                at91_clock_associate("ssc2_clk", &pdev->dev, "ssc");
+                break;
+        default:
+                return;
+        }
+
+        platform_device_register(pdev);
 }
+
 #else
-void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #endif
 
 
@@ -658,12 +813,15 @@ static struct atmel_uart_data dbgu_data = {
         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
+static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91rm9200_dbgu_device = {
         .name           = "atmel_usart",
         .id             = 0,
         .dev            = {
-                                .platform_data  = &dbgu_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &dbgu_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &dbgu_data,
         },
         .resource       = dbgu_resources,
         .num_resources  = ARRAY_SIZE(dbgu_resources),
@@ -693,28 +851,35 @@ static struct atmel_uart_data uart0_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart0_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91rm9200_uart0_device = {
         .name           = "atmel_usart",
         .id             = 1,
         .dev            = {
-                                .platform_data  = &uart0_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart0_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart0_data,
         },
         .resource       = uart0_resources,
         .num_resources  = ARRAY_SIZE(uart0_resources),
 };
 
-static inline void configure_usart0_pins(void)
+static inline void configure_usart0_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PA17, 1);            /* TXD0 */
         at91_set_A_periph(AT91_PIN_PA18, 0);            /* RXD0 */
-        at91_set_A_periph(AT91_PIN_PA20, 0);            /* CTS0 */
 
-        /*
-         * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
-         *  We need to drive the pin manually.  Default is off (RTS is active low).
-         */
-        at91_set_gpio_output(AT91_PIN_PA21, 1);
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PA20, 0);    /* CTS0 */
+
+        if (pins & ATMEL_UART_RTS) {
+                /*
+                 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
+                 *  We need to drive the pin manually.  Default is off (RTS is active low).
+                 */
+                at91_set_gpio_output(AT91_PIN_PA21, 1);
+        }
 }
 
 static struct resource uart1_resources[] = {
@@ -735,27 +900,37 @@ static struct atmel_uart_data uart1_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart1_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91rm9200_uart1_device = {
         .name           = "atmel_usart",
         .id             = 2,
         .dev            = {
-                                .platform_data  = &uart1_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart1_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart1_data,
         },
         .resource       = uart1_resources,
         .num_resources  = ARRAY_SIZE(uart1_resources),
 };
 
-static inline void configure_usart1_pins(void)
+static inline void configure_usart1_pins(unsigned pins)
 {
-        at91_set_A_periph(AT91_PIN_PB18, 0);            /* RI1 */
-        at91_set_A_periph(AT91_PIN_PB19, 0);            /* DTR1 */
         at91_set_A_periph(AT91_PIN_PB20, 1);            /* TXD1 */
         at91_set_A_periph(AT91_PIN_PB21, 0);            /* RXD1 */
-        at91_set_A_periph(AT91_PIN_PB23, 0);            /* DCD1 */
-        at91_set_A_periph(AT91_PIN_PB24, 0);            /* CTS1 */
-        at91_set_A_periph(AT91_PIN_PB25, 0);            /* DSR1 */
-        at91_set_A_periph(AT91_PIN_PB26, 0);            /* RTS1 */
+
+        if (pins & ATMEL_UART_RI)
+                at91_set_A_periph(AT91_PIN_PB18, 0);    /* RI1 */
+        if (pins & ATMEL_UART_DTR)
+                at91_set_A_periph(AT91_PIN_PB19, 0);    /* DTR1 */
+        if (pins & ATMEL_UART_DCD)
+                at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD1 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PB24, 0);    /* CTS1 */
+        if (pins & ATMEL_UART_DSR)
+                at91_set_A_periph(AT91_PIN_PB25, 0);    /* DSR1 */
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS1 */
 }
 
 static struct resource uart2_resources[] = {
@@ -776,21 +951,29 @@ static struct atmel_uart_data uart2_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart2_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91rm9200_uart2_device = {
         .name           = "atmel_usart",
         .id             = 3,
         .dev            = {
-                                .platform_data  = &uart2_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart2_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart2_data,
         },
         .resource       = uart2_resources,
         .num_resources  = ARRAY_SIZE(uart2_resources),
 };
 
-static inline void configure_usart2_pins(void)
+static inline void configure_usart2_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PA22, 0);            /* RXD2 */
         at91_set_A_periph(AT91_PIN_PA23, 1);            /* TXD2 */
+
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PA30, 0);    /* CTS2 */
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PA31, 0);    /* RTS2 */
 }
 
 static struct resource uart3_resources[] = {
@@ -811,27 +994,35 @@ static struct atmel_uart_data uart3_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart3_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91rm9200_uart3_device = {
         .name           = "atmel_usart",
         .id             = 4,
         .dev            = {
-                                .platform_data  = &uart3_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart3_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart3_data,
         },
         .resource       = uart3_resources,
         .num_resources  = ARRAY_SIZE(uart3_resources),
 };
 
-static inline void configure_usart3_pins(void)
+static inline void configure_usart3_pins(unsigned pins)
 {
         at91_set_B_periph(AT91_PIN_PA5, 1);             /* TXD3 */
         at91_set_B_periph(AT91_PIN_PA6, 0);             /* RXD3 */
+
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PB1, 0);     /* CTS3 */
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PB0, 0);     /* RTS3 */
 }
 
-struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
+static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
 struct platform_device *atmel_default_console_device;   /* the serial console device */
 
-void __init at91_init_serial(struct at91_uart_config *config)
+void __init __deprecated at91_init_serial(struct at91_uart_config *config)
 {
         int i;
 
@@ -839,22 +1030,22 @@ void __init at91_init_serial(struct at91_uart_config *config)
         for (i = 0; i < config->nr_tty; i++) {
                 switch (config->tty_map[i]) {
                         case 0:
-                                configure_usart0_pins();
+                                configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
                                 at91_uarts[i] = &at91rm9200_uart0_device;
                                 at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
                                 break;
                         case 1:
-                                configure_usart1_pins();
+                                configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI);
                                 at91_uarts[i] = &at91rm9200_uart1_device;
                                 at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
                                 break;
                         case 2:
-                                configure_usart2_pins();
+                                configure_usart2_pins(0);
                                 at91_uarts[i] = &at91rm9200_uart2_device;
                                 at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
                                 break;
                         case 3:
-                                configure_usart3_pins();
+                                configure_usart3_pins(0);
                                 at91_uarts[i] = &at91rm9200_uart3_device;
                                 at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
                                 break;
@@ -876,6 +1067,53 @@ void __init at91_init_serial(struct at91_uart_config *config)
                 printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        switch (id) {
+                case 0:         /* DBGU */
+                        pdev = &at91rm9200_dbgu_device;
+                        configure_dbgu_pins();
+                        at91_clock_associate("mck", &pdev->dev, "usart");
+                        break;
+                case AT91RM9200_ID_US0:
+                        pdev = &at91rm9200_uart0_device;
+                        configure_usart0_pins(pins);
+                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
+                        break;
+                case AT91RM9200_ID_US1:
+                        pdev = &at91rm9200_uart1_device;
+                        configure_usart1_pins(pins);
+                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
+                        break;
+                case AT91RM9200_ID_US2:
+                        pdev = &at91rm9200_uart2_device;
+                        configure_usart2_pins(pins);
+                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
+                        break;
+                case AT91RM9200_ID_US3:
+                        pdev = &at91rm9200_uart3_device;
+                        configure_usart3_pins(pins);
+                        at91_clock_associate("usart3_clk", &pdev->dev, "usart");
+                        break;
+                default:
+                        return;
+        }
+        pdev->id = portnr;              /* update to mapped ID */
+
+        if (portnr < ATMEL_MAX_UART)
+                at91_uarts[portnr] = pdev;
+}
+
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART)
+                atmel_default_console_device = at91_uarts[portnr];
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -886,7 +1124,9 @@ void __init at91_add_device_serial(void)
         }
 }
 #else
-void __init at91_init_serial(struct at91_uart_config *config) {}
+void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index e47381e8aaba..18d06612ce8a 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -327,30 +327,30 @@ void __init at91sam9260_initialize(unsigned long main_clock)
 static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
         7,      /* Advanced Interrupt Controller */
         7,      /* System Peripherals */
-        0,      /* Parallel IO Controller A */
-        0,      /* Parallel IO Controller B */
-        0,      /* Parallel IO Controller C */
+        1,      /* Parallel IO Controller A */
+        1,      /* Parallel IO Controller B */
+        1,      /* Parallel IO Controller C */
         0,      /* Analog-to-Digital Converter */
-        6,      /* USART 0 */
-        6,      /* USART 1 */
-        6,      /* USART 2 */
+        5,      /* USART 0 */
+        5,      /* USART 1 */
+        5,      /* USART 2 */
         0,      /* Multimedia Card Interface */
-        4,      /* USB Device Port */
-        0,      /* Two-Wire Interface */
-        6,      /* Serial Peripheral Interface 0 */
-        6,      /* Serial Peripheral Interface 1 */
+        2,      /* USB Device Port */
+        6,      /* Two-Wire Interface */
+        5,      /* Serial Peripheral Interface 0 */
+        5,      /* Serial Peripheral Interface 1 */
         5,      /* Serial Synchronous Controller */
         0,
         0,
         0,      /* Timer Counter 0 */
         0,      /* Timer Counter 1 */
         0,      /* Timer Counter 2 */
-        3,      /* USB Host port */
+        2,      /* USB Host port */
         3,      /* Ethernet */
         0,      /* Image Sensor Interface */
-        6,      /* USART 3 */
-        6,      /* USART 4 */
-        6,      /* USART 5 */
+        5,      /* USART 3 */
+        5,      /* USART 4 */
+        5,      /* USART 5 */
         0,      /* Timer Counter 3 */
         0,      /* Timer Counter 4 */
         0,      /* Timer Counter 5 */
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 3091bf47d8c9..105f8403860b 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -12,6 +12,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
@@ -29,7 +30,7 @@
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static u64 ohci_dmamask = 0xffffffffUL;
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
 static struct at91_usbh_data usbh_data;
 
 static struct resource usbh_resources[] = {
@@ -50,7 +51,7 @@ static struct platform_device at91_usbh_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &ohci_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &usbh_data,
         },
         .resource       = usbh_resources,
@@ -125,7 +126,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
-static u64 eth_dmamask = 0xffffffffUL;
+static u64 eth_dmamask = DMA_BIT_MASK(32);
 static struct at91_eth_data eth_data;
 
 static struct resource eth_resources[] = {
@@ -146,7 +147,7 @@ static struct platform_device at91sam9260_eth_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &eth_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &eth_data,
         },
         .resource       = eth_resources,
@@ -199,7 +200,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = 0xffffffffUL;
+static u64 mmc_dmamask = DMA_BIT_MASK(32);
 static struct at91_mmc_data mmc_data;
 
 static struct resource mmc_resources[] = {
@@ -220,7 +221,7 @@ static struct platform_device at91sam9260_mmc_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &mmc_data,
         },
         .resource       = mmc_resources,
@@ -289,7 +290,7 @@ static struct at91_nand_data nand_data;
 static struct resource nand_resources[] = {
         {
                 .start  = NAND_BASE,
-                .end    = NAND_BASE + SZ_8M - 1,
+                .end    = NAND_BASE + SZ_256M - 1,
                 .flags  = IORESOURCE_MEM,
         }
 };
@@ -312,7 +313,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
                 return;
 
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* set the bus interface characteristics */
         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
@@ -431,7 +432,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = 0xffffffffUL;
+static u64 spi_dmamask = DMA_BIT_MASK(32);
 
 static struct resource spi0_resources[] = {
         [0] = {
@@ -451,7 +452,7 @@ static struct platform_device at91sam9260_spi0_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
         .resource       = spi0_resources,
         .num_resources  = ARRAY_SIZE(spi0_resources),
@@ -477,7 +478,7 @@ static struct platform_device at91sam9260_spi1_device = {
         .id             = 1,
         .dev            = {
                                 .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
         .resource       = spi1_resources,
         .num_resources  = ARRAY_SIZE(spi1_resources),
@@ -539,24 +540,126 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 
 
 /* --------------------------------------------------------------------
- *  LEDs
+ *  RTT
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_LEDS)
-u8 at91_leds_cpu;
-u8 at91_leds_timer;
+static struct resource rtt_resources[] = {
+        {
+                .start  = AT91_BASE_SYS + AT91_RTT,
+                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
 
-void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+static struct platform_device at91sam9260_rtt_device = {
+        .name           = "at91_rtt",
+        .id             = -1,
+        .resource       = rtt_resources,
+        .num_resources  = ARRAY_SIZE(rtt_resources),
+};
+
+static void __init at91_add_device_rtt(void)
 {
-        /* Enable GPIO to access the LEDs */
-        at91_set_gpio_output(cpu_led, 1);
-        at91_set_gpio_output(timer_led, 1);
+        platform_device_register(&at91sam9260_rtt_device);
+}
+
 
-        at91_leds_cpu   = cpu_led;
-        at91_leds_timer = timer_led;
+/* --------------------------------------------------------------------
+ *  Watchdog
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
+static struct platform_device at91sam9260_wdt_device = {
+        .name           = "at91_wdt",
+        .id             = -1,
+        .num_resources  = 0,
+};
+
+static void __init at91_add_device_watchdog(void)
+{
+        platform_device_register(&at91sam9260_wdt_device);
 }
 #else
-void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+static void __init at91_add_device_watchdog(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  SSC -- Synchronous Serial Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
+static u64 ssc_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc_resources[] = {
+        [0] = {
+                .start  = AT91SAM9260_BASE_SSC,
+                .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9260_ID_SSC,
+                .end    = AT91SAM9260_ID_SSC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9260_ssc_device = {
+        .name   = "ssc",
+        .id     = 0,
+        .dev    = {
+                .dma_mask               = &ssc_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc_resources,
+        .num_resources  = ARRAY_SIZE(ssc_resources),
+};
+
+static inline void configure_ssc_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PB17, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PB16, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PB18, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PB19, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_A_periph(AT91_PIN_PB20, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_A_periph(AT91_PIN_PB21, 1);
+}
+
+/*
+ * SSC controllers are accessed through library code, instead of any
+ * kind of all-singing/all-dancing driver.  For example one could be
+ * used by a particular I2S audio codec's driver, while another one
+ * on the same system might be used by a custom data capture driver.
+ */
+void __init at91_add_device_ssc(unsigned id, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        /*
+         * NOTE: caller is responsible for passing information matching
+         * "pins" to whatever will be using each particular controller.
+         */
+        switch (id) {
+        case AT91SAM9260_ID_SSC:
+                pdev = &at91sam9260_ssc_device;
+                configure_ssc_pins(pins);
+                at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
+                break;
+        default:
+                return;
+        }
+
+        platform_device_register(pdev);
+}
+
+#else
+void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #endif
 
 
@@ -583,12 +686,15 @@ static struct atmel_uart_data dbgu_data = {
         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
+static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9260_dbgu_device = {
         .name           = "atmel_usart",
         .id             = 0,
         .dev            = {
-                                .platform_data  = &dbgu_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &dbgu_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &dbgu_data,
         },
         .resource       = dbgu_resources,
         .num_resources  = ARRAY_SIZE(dbgu_resources),
@@ -618,27 +724,37 @@ static struct atmel_uart_data uart0_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart0_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9260_uart0_device = {
         .name           = "atmel_usart",
         .id             = 1,
         .dev            = {
-                                .platform_data  = &uart0_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart0_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart0_data,
         },
         .resource       = uart0_resources,
         .num_resources  = ARRAY_SIZE(uart0_resources),
 };
 
-static inline void configure_usart0_pins(void)
+static inline void configure_usart0_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
-        at91_set_A_periph(AT91_PIN_PB26, 0);            /* RTS0 */
-        at91_set_A_periph(AT91_PIN_PB27, 0);            /* CTS0 */
-        at91_set_A_periph(AT91_PIN_PB24, 0);            /* DTR0 */
-        at91_set_A_periph(AT91_PIN_PB22, 0);            /* DSR0 */
-        at91_set_A_periph(AT91_PIN_PB23, 0);            /* DCD0 */
-        at91_set_A_periph(AT91_PIN_PB25, 0);            /* RI0 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
+        if (pins & ATMEL_UART_DTR)
+                at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
+        if (pins & ATMEL_UART_DSR)
+                at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
+        if (pins & ATMEL_UART_DCD)
+                at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
+        if (pins & ATMEL_UART_RI)
+                at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
 }
 
 static struct resource uart1_resources[] = {
@@ -659,23 +775,29 @@ static struct atmel_uart_data uart1_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart1_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9260_uart1_device = {
         .name           = "atmel_usart",
         .id             = 2,
         .dev            = {
-                                .platform_data  = &uart1_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart1_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart1_data,
         },
         .resource       = uart1_resources,
         .num_resources  = ARRAY_SIZE(uart1_resources),
 };
 
-static inline void configure_usart1_pins(void)
+static inline void configure_usart1_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
-        at91_set_A_periph(AT91_PIN_PB28, 0);            /* RTS1 */
-        at91_set_A_periph(AT91_PIN_PB29, 0);            /* CTS1 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
 }
 
 static struct resource uart2_resources[] = {
@@ -696,21 +818,29 @@ static struct atmel_uart_data uart2_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart2_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9260_uart2_device = {
         .name           = "atmel_usart",
         .id             = 3,
         .dev            = {
-                                .platform_data  = &uart2_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart2_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart2_data,
         },
         .resource       = uart2_resources,
         .num_resources  = ARRAY_SIZE(uart2_resources),
 };
 
-static inline void configure_usart2_pins(void)
+static inline void configure_usart2_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
 }
 
 static struct resource uart3_resources[] = {
@@ -731,21 +861,29 @@ static struct atmel_uart_data uart3_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart3_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9260_uart3_device = {
         .name           = "atmel_usart",
         .id             = 4,
         .dev            = {
-                                .platform_data  = &uart3_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart3_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart3_data,
         },
         .resource       = uart3_resources,
         .num_resources  = ARRAY_SIZE(uart3_resources),
 };
 
-static inline void configure_usart3_pins(void)
+static inline void configure_usart3_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
 }
 
 static struct resource uart4_resources[] = {
@@ -766,12 +904,15 @@ static struct atmel_uart_data uart4_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart4_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9260_uart4_device = {
         .name           = "atmel_usart",
         .id             = 5,
         .dev            = {
-                                .platform_data  = &uart4_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart4_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart4_data,
         },
         .resource       = uart4_resources,
         .num_resources  = ARRAY_SIZE(uart4_resources),
@@ -801,12 +942,15 @@ static struct atmel_uart_data uart5_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart5_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9260_uart5_device = {
         .name           = "atmel_usart",
         .id             = 6,
         .dev            = {
-                                .platform_data  = &uart5_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart5_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart5_data,
         },
         .resource       = uart5_resources,
         .num_resources  = ARRAY_SIZE(uart5_resources),
@@ -818,10 +962,10 @@ static inline void configure_usart5_pins(void)
         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
 }
 
-struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
+static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
 struct platform_device *atmel_default_console_device;   /* the serial console device */
 
-void __init at91_init_serial(struct at91_uart_config *config)
+void __init __deprecated at91_init_serial(struct at91_uart_config *config)
 {
         int i;
 
@@ -829,22 +973,22 @@ void __init at91_init_serial(struct at91_uart_config *config)
         for (i = 0; i < config->nr_tty; i++) {
                 switch (config->tty_map[i]) {
                         case 0:
-                                configure_usart0_pins();
+                                configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI);
                                 at91_uarts[i] = &at91sam9260_uart0_device;
                                 at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
                                 break;
                         case 1:
-                                configure_usart1_pins();
+                                configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
                                 at91_uarts[i] = &at91sam9260_uart1_device;
                                 at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
                                 break;
                         case 2:
-                                configure_usart2_pins();
+                                configure_usart2_pins(0);
                                 at91_uarts[i] = &at91sam9260_uart2_device;
                                 at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
                                 break;
                         case 3:
-                                configure_usart3_pins();
+                                configure_usart3_pins(0);
                                 at91_uarts[i] = &at91sam9260_uart3_device;
                                 at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
                                 break;
@@ -876,6 +1020,63 @@ void __init at91_init_serial(struct at91_uart_config *config)
                 printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        switch (id) {
+                case 0:         /* DBGU */
+                        pdev = &at91sam9260_dbgu_device;
+                        configure_dbgu_pins();
+                        at91_clock_associate("mck", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9260_ID_US0:
+                        pdev = &at91sam9260_uart0_device;
+                        configure_usart0_pins(pins);
+                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9260_ID_US1:
+                        pdev = &at91sam9260_uart1_device;
+                        configure_usart1_pins(pins);
+                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9260_ID_US2:
+                        pdev = &at91sam9260_uart2_device;
+                        configure_usart2_pins(pins);
+                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9260_ID_US3:
+                        pdev = &at91sam9260_uart3_device;
+                        configure_usart3_pins(pins);
+                        at91_clock_associate("usart3_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9260_ID_US4:
+                        pdev = &at91sam9260_uart4_device;
+                        configure_usart4_pins();
+                        at91_clock_associate("usart4_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9260_ID_US5:
+                        pdev = &at91sam9260_uart5_device;
+                        configure_usart5_pins();
+                        at91_clock_associate("usart5_clk", &pdev->dev, "usart");
+                        break;
+                default:
+                        return;
+        }
+        pdev->id = portnr;              /* update to mapped ID */
+
+        if (portnr < ATMEL_MAX_UART)
+                at91_uarts[portnr] = pdev;
+}
+
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART)
+                atmel_default_console_device = at91_uarts[portnr];
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -886,7 +1087,9 @@ void __init at91_add_device_serial(void)
         }
 }
 #else
-void __init at91_init_serial(struct at91_uart_config *config) {}
+void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
@@ -898,6 +1101,8 @@ void __init at91_add_device_serial(void) {}
  */
 static int __init at91_add_standard_devices(void)
 {
+        at91_add_device_rtt();
+        at91_add_device_watchdog();
         return 0;
 }
 
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index dfe8c39c9fb9..90b87e1877d9 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -279,25 +279,25 @@ void __init at91sam9261_initialize(unsigned long main_clock)
 static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
         7,      /* Advanced Interrupt Controller */
         7,      /* System Peripherals */
-        0,      /* Parallel IO Controller A */
-        0,      /* Parallel IO Controller B */
-        0,      /* Parallel IO Controller C */
+        1,      /* Parallel IO Controller A */
+        1,      /* Parallel IO Controller B */
+        1,      /* Parallel IO Controller C */
         0,
-        6,      /* USART 0 */
-        6,      /* USART 1 */
-        6,      /* USART 2 */
+        5,      /* USART 0 */
+        5,      /* USART 1 */
+        5,      /* USART 2 */
         0,      /* Multimedia Card Interface */
-        4,      /* USB Device Port */
-        0,      /* Two-Wire Interface */
-        6,      /* Serial Peripheral Interface 0 */
-        6,      /* Serial Peripheral Interface 1 */
-        5,      /* Serial Synchronous Controller 0 */
-        5,      /* Serial Synchronous Controller 1 */
-        5,      /* Serial Synchronous Controller 2 */
+        2,      /* USB Device Port */
+        6,      /* Two-Wire Interface */
+        5,      /* Serial Peripheral Interface 0 */
+        5,      /* Serial Peripheral Interface 1 */
+        4,      /* Serial Synchronous Controller 0 */
+        4,      /* Serial Synchronous Controller 1 */
+        4,      /* Serial Synchronous Controller 2 */
         0,      /* Timer Counter 0 */
         0,      /* Timer Counter 1 */
         0,      /* Timer Counter 2 */
-        3,      /* USB Host port */
+        2,      /* USB Host port */
         3,      /* LCD Controller */
         0,
         0,
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 64979a9023c2..245641263fce 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -13,6 +13,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
@@ -33,7 +34,7 @@
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static u64 ohci_dmamask = 0xffffffffUL;
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
 static struct at91_usbh_data usbh_data;
 
 static struct resource usbh_resources[] = {
@@ -54,7 +55,7 @@ static struct platform_device at91sam9261_usbh_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &ohci_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &usbh_data,
         },
         .resource       = usbh_resources,
@@ -106,8 +107,6 @@ static struct platform_device at91sam9261_udc_device = {
 
 void __init at91_add_device_udc(struct at91_udc_data *data)
 {
-        unsigned long x;
-
         if (!data)
                 return;
 
@@ -116,9 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data)
                 at91_set_deglitch(data->vbus_pin, 1);
         }
 
-        /* Pullup pin is handled internally */
-        x = at91_sys_read(AT91_MATRIX_USBPUCR);
-        at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
+        /* Pullup pin is handled internally by USB device peripheral */
 
         udc_data = *data;
         platform_device_register(&at91sam9261_udc_device);
@@ -132,7 +129,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = 0xffffffffUL;
+static u64 mmc_dmamask = DMA_BIT_MASK(32);
 static struct at91_mmc_data mmc_data;
 
 static struct resource mmc_resources[] = {
@@ -153,7 +150,7 @@ static struct platform_device at91sam9261_mmc_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &mmc_data,
         },
         .resource       = mmc_resources,
@@ -232,7 +229,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
                 return;
 
         csa = at91_sys_read(AT91_MATRIX_EBICSA);
-        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 
         /* set the bus interface characteristics */
         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
@@ -354,7 +351,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = 0xffffffffUL;
+static u64 spi_dmamask = DMA_BIT_MASK(32);
 
 static struct resource spi0_resources[] = {
         [0] = {
@@ -374,7 +371,7 @@ static struct platform_device at91sam9261_spi0_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
         .resource       = spi0_resources,
         .num_resources  = ARRAY_SIZE(spi0_resources),
@@ -400,7 +397,7 @@ static struct platform_device at91sam9261_spi1_device = {
         .id             = 1,
         .dev            = {
                                 .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
         .resource       = spi1_resources,
         .num_resources  = ARRAY_SIZE(spi1_resources),
@@ -466,7 +463,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static u64 lcdc_dmamask = 0xffffffffUL;
+static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 static struct atmel_lcdfb_info lcdc_data;
 
 static struct resource lcdc_resources[] = {
@@ -494,7 +491,7 @@ static struct platform_device at91_lcdc_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &lcdc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &lcdc_data,
         },
         .resource       = lcdc_resources,
@@ -507,6 +504,17 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
                 return;
         }
 
+#if defined(CONFIG_FB_ATMEL_STN)
+        at91_set_A_periph(AT91_PIN_PB0, 0);     /* LCDVSYNC */
+        at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
+        at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
+        at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
+        at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
+        at91_set_A_periph(AT91_PIN_PB5, 0);     /* LCDD0 */
+        at91_set_A_periph(AT91_PIN_PB6, 0);     /* LCDD1 */
+        at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
+        at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
+#else
         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
@@ -529,6 +537,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
         at91_set_B_periph(AT91_PIN_PB26, 0);    /* LCDD21 */
         at91_set_B_periph(AT91_PIN_PB27, 0);    /* LCDD22 */
         at91_set_B_periph(AT91_PIN_PB28, 0);    /* LCDD23 */
+#endif
 
         lcdc_data = *data;
         platform_device_register(&at91_lcdc_device);
@@ -539,24 +548,220 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 
 
 /* --------------------------------------------------------------------
- *  LEDs
+ *  RTT
+ * -------------------------------------------------------------------- */
+
+static struct resource rtt_resources[] = {
+        {
+                .start  = AT91_BASE_SYS + AT91_RTT,
+                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device at91sam9261_rtt_device = {
+        .name           = "at91_rtt",
+        .id             = -1,
+        .resource       = rtt_resources,
+        .num_resources  = ARRAY_SIZE(rtt_resources),
+};
+
+static void __init at91_add_device_rtt(void)
+{
+        platform_device_register(&at91sam9261_rtt_device);
+}
+
+
+/* --------------------------------------------------------------------
+ *  Watchdog
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
+static struct platform_device at91sam9261_wdt_device = {
+        .name           = "at91_wdt",
+        .id             = -1,
+        .num_resources  = 0,
+};
+
+static void __init at91_add_device_watchdog(void)
+{
+        platform_device_register(&at91sam9261_wdt_device);
+}
+#else
+static void __init at91_add_device_watchdog(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  SSC -- Synchronous Serial Controller
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_LEDS)
-u8 at91_leds_cpu;
-u8 at91_leds_timer;
+#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
+static u64 ssc0_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc0_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_SSC0,
+                .end    = AT91SAM9261_BASE_SSC0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_SSC0,
+                .end    = AT91SAM9261_ID_SSC0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_ssc0_device = {
+        .name   = "ssc",
+        .id     = 0,
+        .dev    = {
+                .dma_mask               = &ssc0_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc0_resources,
+        .num_resources  = ARRAY_SIZE(ssc0_resources),
+};
+
+static inline void configure_ssc0_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PB21, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PB22, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PB23, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PB24, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_A_periph(AT91_PIN_PB25, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_A_periph(AT91_PIN_PB26, 1);
+}
+
+static u64 ssc1_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc1_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_SSC1,
+                .end    = AT91SAM9261_BASE_SSC1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_SSC1,
+                .end    = AT91SAM9261_ID_SSC1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_ssc1_device = {
+        .name   = "ssc",
+        .id     = 1,
+        .dev    = {
+                .dma_mask               = &ssc1_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc1_resources,
+        .num_resources  = ARRAY_SIZE(ssc1_resources),
+};
+
+static inline void configure_ssc1_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_B_periph(AT91_PIN_PA17, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_B_periph(AT91_PIN_PA18, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_B_periph(AT91_PIN_PA19, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_B_periph(AT91_PIN_PA20, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_B_periph(AT91_PIN_PA21, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_B_periph(AT91_PIN_PA22, 1);
+}
+
+static u64 ssc2_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc2_resources[] = {
+        [0] = {
+                .start  = AT91SAM9261_BASE_SSC2,
+                .end    = AT91SAM9261_BASE_SSC2 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9261_ID_SSC2,
+                .end    = AT91SAM9261_ID_SSC2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9261_ssc2_device = {
+        .name   = "ssc",
+        .id     = 2,
+        .dev    = {
+                .dma_mask               = &ssc2_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc2_resources,
+        .num_resources  = ARRAY_SIZE(ssc2_resources),
+};
+
+static inline void configure_ssc2_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_B_periph(AT91_PIN_PC25, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_B_periph(AT91_PIN_PC26, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_B_periph(AT91_PIN_PC27, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_B_periph(AT91_PIN_PC28, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_B_periph(AT91_PIN_PC29, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_B_periph(AT91_PIN_PC30, 1);
+}
 
-void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+/*
+ * SSC controllers are accessed through library code, instead of any
+ * kind of all-singing/all-dancing driver.  For example one could be
+ * used by a particular I2S audio codec's driver, while another one
+ * on the same system might be used by a custom data capture driver.
+ */
+void __init at91_add_device_ssc(unsigned id, unsigned pins)
 {
-        /* Enable GPIO to access the LEDs */
-        at91_set_gpio_output(cpu_led, 1);
-        at91_set_gpio_output(timer_led, 1);
+        struct platform_device *pdev;
+
+        /*
+         * NOTE: caller is responsible for passing information matching
+         * "pins" to whatever will be using each particular controller.
+         */
+        switch (id) {
+        case AT91SAM9261_ID_SSC0:
+                pdev = &at91sam9261_ssc0_device;
+                configure_ssc0_pins(pins);
+                at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
+                break;
+        case AT91SAM9261_ID_SSC1:
+                pdev = &at91sam9261_ssc1_device;
+                configure_ssc1_pins(pins);
+                at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
+                break;
+        case AT91SAM9261_ID_SSC2:
+                pdev = &at91sam9261_ssc2_device;
+                configure_ssc2_pins(pins);
+                at91_clock_associate("ssc2_clk", &pdev->dev, "pclk");
+                break;
+        default:
+                return;
+        }
 
-        at91_leds_cpu   = cpu_led;
-        at91_leds_timer = timer_led;
+        platform_device_register(pdev);
 }
+
 #else
-void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #endif
 
 
@@ -584,12 +789,15 @@ static struct atmel_uart_data dbgu_data = {
         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
+static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9261_dbgu_device = {
         .name           = "atmel_usart",
         .id             = 0,
         .dev            = {
-                                .platform_data  = &dbgu_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &dbgu_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &dbgu_data,
         },
         .resource       = dbgu_resources,
         .num_resources  = ARRAY_SIZE(dbgu_resources),
@@ -619,23 +827,29 @@ static struct atmel_uart_data uart0_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart0_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9261_uart0_device = {
         .name           = "atmel_usart",
         .id             = 1,
         .dev            = {
-                                .platform_data  = &uart0_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart0_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart0_data,
         },
         .resource       = uart0_resources,
         .num_resources  = ARRAY_SIZE(uart0_resources),
 };
 
-static inline void configure_usart0_pins(void)
+static inline void configure_usart0_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PC8, 1);             /* TXD0 */
         at91_set_A_periph(AT91_PIN_PC9, 0);             /* RXD0 */
-        at91_set_A_periph(AT91_PIN_PC10, 0);            /* RTS0 */
-        at91_set_A_periph(AT91_PIN_PC11, 0);            /* CTS0 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PC10, 0);    /* RTS0 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PC11, 0);    /* CTS0 */
 }
 
 static struct resource uart1_resources[] = {
@@ -656,21 +870,29 @@ static struct atmel_uart_data uart1_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart1_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9261_uart1_device = {
         .name           = "atmel_usart",
         .id             = 2,
         .dev            = {
-                                .platform_data  = &uart1_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart1_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart1_data,
         },
         .resource       = uart1_resources,
         .num_resources  = ARRAY_SIZE(uart1_resources),
 };
 
-static inline void configure_usart1_pins(void)
+static inline void configure_usart1_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PC12, 1);            /* TXD1 */
         at91_set_A_periph(AT91_PIN_PC13, 0);            /* RXD1 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PA12, 0);    /* RTS1 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PA13, 0);    /* CTS1 */
 }
 
 static struct resource uart2_resources[] = {
@@ -691,27 +913,35 @@ static struct atmel_uart_data uart2_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart2_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9261_uart2_device = {
         .name           = "atmel_usart",
         .id             = 3,
         .dev            = {
-                                .platform_data  = &uart2_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart2_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart2_data,
         },
         .resource       = uart2_resources,
         .num_resources  = ARRAY_SIZE(uart2_resources),
 };
 
-static inline void configure_usart2_pins(void)
+static inline void configure_usart2_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PC15, 0);            /* RXD2 */
         at91_set_A_periph(AT91_PIN_PC14, 1);            /* TXD2 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PA15, 0);    /* RTS2*/
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PA16, 0);    /* CTS2 */
 }
 
-struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
+static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
 struct platform_device *atmel_default_console_device;   /* the serial console device */
 
-void __init at91_init_serial(struct at91_uart_config *config)
+void __init __deprecated at91_init_serial(struct at91_uart_config *config)
 {
         int i;
 
@@ -719,17 +949,17 @@ void __init at91_init_serial(struct at91_uart_config *config)
         for (i = 0; i < config->nr_tty; i++) {
                 switch (config->tty_map[i]) {
                         case 0:
-                                configure_usart0_pins();
+                                configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
                                 at91_uarts[i] = &at91sam9261_uart0_device;
                                 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
                                 break;
                         case 1:
-                                configure_usart1_pins();
+                                configure_usart1_pins(0);
                                 at91_uarts[i] = &at91sam9261_uart1_device;
                                 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
                                 break;
                         case 2:
-                                configure_usart2_pins();
+                                configure_usart2_pins(0);
                                 at91_uarts[i] = &at91sam9261_uart2_device;
                                 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
                                 break;
@@ -751,6 +981,48 @@ void __init at91_init_serial(struct at91_uart_config *config)
                 printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        switch (id) {
+                case 0:         /* DBGU */
+                        pdev = &at91sam9261_dbgu_device;
+                        configure_dbgu_pins();
+                        at91_clock_associate("mck", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9261_ID_US0:
+                        pdev = &at91sam9261_uart0_device;
+                        configure_usart0_pins(pins);
+                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9261_ID_US1:
+                        pdev = &at91sam9261_uart1_device;
+                        configure_usart1_pins(pins);
+                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9261_ID_US2:
+                        pdev = &at91sam9261_uart2_device;
+                        configure_usart2_pins(pins);
+                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
+                        break;
+                default:
+                        return;
+        }
+        pdev->id = portnr;              /* update to mapped ID */
+
+        if (portnr < ATMEL_MAX_UART)
+                at91_uarts[portnr] = pdev;
+}
+
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART)
+                atmel_default_console_device = at91_uarts[portnr];
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -761,7 +1033,9 @@ void __init at91_add_device_serial(void)
         }
 }
 #else
-void __init at91_init_serial(struct at91_uart_config *config) {}
+void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
@@ -774,6 +1048,8 @@ void __init at91_add_device_serial(void) {}
  */
 static int __init at91_add_standard_devices(void)
 {
+        at91_add_device_rtt();
+        at91_add_device_watchdog();
         return 0;
 }
 
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 00e27b177857..a53ba0f74351 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -304,34 +304,34 @@ void __init at91sam9263_initialize(unsigned long main_clock)
 static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
         7,      /* Advanced Interrupt Controller (FIQ) */
         7,      /* System Peripherals */
-        0,      /* Parallel IO Controller A */
-        0,      /* Parallel IO Controller B */
-        0,      /* Parallel IO Controller C, D and E */
+        1,      /* Parallel IO Controller A */
+        1,      /* Parallel IO Controller B */
+        1,      /* Parallel IO Controller C, D and E */
         0,
         0,
-        6,      /* USART 0 */
-        6,      /* USART 1 */
-        6,      /* USART 2 */
+        5,      /* USART 0 */
+        5,      /* USART 1 */
+        5,      /* USART 2 */
         0,      /* Multimedia Card Interface 0 */
         0,      /* Multimedia Card Interface 1 */
-        4,      /* CAN */
-        0,      /* Two-Wire Interface */
-        6,      /* Serial Peripheral Interface 0 */
-        6,      /* Serial Peripheral Interface 1 */
-        5,      /* Serial Synchronous Controller 0 */
-        5,      /* Serial Synchronous Controller 1 */
-        6,      /* AC97 Controller */
+        3,      /* CAN */
+        6,      /* Two-Wire Interface */
+        5,      /* Serial Peripheral Interface 0 */
+        5,      /* Serial Peripheral Interface 1 */
+        4,      /* Serial Synchronous Controller 0 */
+        4,      /* Serial Synchronous Controller 1 */
+        5,      /* AC97 Controller */
         0,      /* Timer Counter 0, 1 and 2 */
         0,      /* Pulse Width Modulation Controller */
         3,      /* Ethernet */
         0,
         0,      /* 2D Graphic Engine */
-        3,      /* USB Device Port */
+        2,      /* USB Device Port */
         0,      /* Image Sensor Interface */
         3,      /* LDC Controller */
         0,      /* DMA Controller */
         0,
-        3,      /* USB Host port */
+        2,      /* USB Host port */
         0,      /* Advanced Interrupt Controller (IRQ0) */
         0,      /* Advanced Interrupt Controller (IRQ1) */
 };
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index ac329a98e959..0b12e1adcc8e 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -12,6 +12,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
@@ -32,7 +33,7 @@
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-static u64 ohci_dmamask = 0xffffffffUL;
+static u64 ohci_dmamask = DMA_BIT_MASK(32);
 static struct at91_usbh_data usbh_data;
 
 static struct resource usbh_resources[] = {
@@ -53,7 +54,7 @@ static struct platform_device at91_usbh_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &ohci_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &usbh_data,
         },
         .resource       = usbh_resources,
@@ -136,7 +137,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
-static u64 eth_dmamask = 0xffffffffUL;
+static u64 eth_dmamask = DMA_BIT_MASK(32);
 static struct at91_eth_data eth_data;
 
 static struct resource eth_resources[] = {
@@ -157,7 +158,7 @@ static struct platform_device at91sam9263_eth_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &eth_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &eth_data,
         },
         .resource       = eth_resources,
@@ -210,7 +211,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = 0xffffffffUL;
+static u64 mmc_dmamask = DMA_BIT_MASK(32);
 static struct at91_mmc_data mmc0_data, mmc1_data;
 
 static struct resource mmc0_resources[] = {
@@ -231,7 +232,7 @@ static struct platform_device at91sam9263_mmc0_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &mmc0_data,
         },
         .resource       = mmc0_resources,
@@ -256,7 +257,7 @@ static struct platform_device at91sam9263_mmc1_device = {
         .id             = 1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &mmc1_data,
         },
         .resource       = mmc1_resources,
@@ -382,7 +383,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
                 return;
 
         csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
-        at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC);
+        at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 
         /* set the bus interface characteristics */
         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
@@ -500,7 +501,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = 0xffffffffUL;
+static u64 spi_dmamask = DMA_BIT_MASK(32);
 
 static struct resource spi0_resources[] = {
         [0] = {
@@ -520,7 +521,7 @@ static struct platform_device at91sam9263_spi0_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
         .resource       = spi0_resources,
         .num_resources  = ARRAY_SIZE(spi0_resources),
@@ -546,7 +547,7 @@ static struct platform_device at91sam9263_spi1_device = {
         .id             = 1,
         .dev            = {
                                 .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
         .resource       = spi1_resources,
         .num_resources  = ARRAY_SIZE(spi1_resources),
@@ -612,7 +613,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
-static u64 ac97_dmamask = 0xffffffffUL;
+static u64 ac97_dmamask = DMA_BIT_MASK(32);
 static struct atmel_ac97_data ac97_data;
 
 static struct resource ac97_resources[] = {
@@ -633,7 +634,7 @@ static struct platform_device at91sam9263_ac97_device = {
         .id             = 1,
         .dev            = {
                                 .dma_mask               = &ac97_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &ac97_data,
         },
         .resource       = ac97_resources,
@@ -667,7 +668,7 @@ void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static u64 lcdc_dmamask = 0xffffffffUL;
+static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 static struct atmel_lcdfb_info lcdc_data;
 
 static struct resource lcdc_resources[] = {
@@ -688,7 +689,7 @@ static struct platform_device at91_lcdc_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &lcdc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &lcdc_data,
         },
         .resource       = lcdc_resources,
@@ -732,24 +733,242 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 
 
 /* --------------------------------------------------------------------
- *  LEDs
+ *  Image Sensor Interface
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_LEDS)
-u8 at91_leds_cpu;
-u8 at91_leds_timer;
+#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
 
-void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+struct resource isi_resources[] = {
+        [0] = {
+                .start  = AT91SAM9263_BASE_ISI,
+                .end    = AT91SAM9263_BASE_ISI + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9263_ID_ISI,
+                .end    = AT91SAM9263_ID_ISI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9263_isi_device = {
+        .name           = "at91_isi",
+        .id             = -1,
+        .resource       = isi_resources,
+        .num_resources  = ARRAY_SIZE(isi_resources),
+};
+
+void __init at91_add_device_isi(void)
+{
+        at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
+        at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
+        at91_set_A_periph(AT91_PIN_PE2, 0);     /* ISI_D2 */
+        at91_set_A_periph(AT91_PIN_PE3, 0);     /* ISI_D3 */
+        at91_set_A_periph(AT91_PIN_PE4, 0);     /* ISI_D4 */
+        at91_set_A_periph(AT91_PIN_PE5, 0);     /* ISI_D5 */
+        at91_set_A_periph(AT91_PIN_PE6, 0);     /* ISI_D6 */
+        at91_set_A_periph(AT91_PIN_PE7, 0);     /* ISI_D7 */
+        at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
+        at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
+        at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
+        at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
+        at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
+        at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
+        at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
+        at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
+}
+#else
+void __init at91_add_device_isi(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  RTT
+ * -------------------------------------------------------------------- */
+
+static struct resource rtt0_resources[] = {
+        {
+                .start  = AT91_BASE_SYS + AT91_RTT0,
+                .end    = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device at91sam9263_rtt0_device = {
+        .name           = "at91_rtt",
+        .id             = 0,
+        .resource       = rtt0_resources,
+        .num_resources  = ARRAY_SIZE(rtt0_resources),
+};
+
+static struct resource rtt1_resources[] = {
+        {
+                .start  = AT91_BASE_SYS + AT91_RTT1,
+                .end    = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device at91sam9263_rtt1_device = {
+        .name           = "at91_rtt",
+        .id             = 1,
+        .resource       = rtt1_resources,
+        .num_resources  = ARRAY_SIZE(rtt1_resources),
+};
+
+static void __init at91_add_device_rtt(void)
+{
+        platform_device_register(&at91sam9263_rtt0_device);
+        platform_device_register(&at91sam9263_rtt1_device);
+}
+
+
+/* --------------------------------------------------------------------
+ *  Watchdog
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
+static struct platform_device at91sam9263_wdt_device = {
+        .name           = "at91_wdt",
+        .id             = -1,
+        .num_resources  = 0,
+};
+
+static void __init at91_add_device_watchdog(void)
+{
+        platform_device_register(&at91sam9263_wdt_device);
+}
+#else
+static void __init at91_add_device_watchdog(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  SSC -- Synchronous Serial Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
+static u64 ssc0_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc0_resources[] = {
+        [0] = {
+                .start  = AT91SAM9263_BASE_SSC0,
+                .end    = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9263_ID_SSC0,
+                .end    = AT91SAM9263_ID_SSC0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9263_ssc0_device = {
+        .name   = "ssc",
+        .id     = 0,
+        .dev    = {
+                .dma_mask               = &ssc0_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc0_resources,
+        .num_resources  = ARRAY_SIZE(ssc0_resources),
+};
+
+static inline void configure_ssc0_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_B_periph(AT91_PIN_PB0, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_B_periph(AT91_PIN_PB1, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_B_periph(AT91_PIN_PB2, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_B_periph(AT91_PIN_PB3, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_B_periph(AT91_PIN_PB4, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_B_periph(AT91_PIN_PB5, 1);
+}
+
+static u64 ssc1_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc1_resources[] = {
+        [0] = {
+                .start  = AT91SAM9263_BASE_SSC1,
+                .end    = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9263_ID_SSC1,
+                .end    = AT91SAM9263_ID_SSC1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9263_ssc1_device = {
+        .name   = "ssc",
+        .id     = 1,
+        .dev    = {
+                .dma_mask               = &ssc1_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc1_resources,
+        .num_resources  = ARRAY_SIZE(ssc1_resources),
+};
+
+static inline void configure_ssc1_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PB6, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PB7, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PB8, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PB9, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_A_periph(AT91_PIN_PB10, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_A_periph(AT91_PIN_PB11, 1);
+}
+
+/*
+ * Return the device node so that board init code can use it as the
+ * parent for the device node reflecting how it's used on this board.
+ *
+ * SSC controllers are accessed through library code, instead of any
+ * kind of all-singing/all-dancing driver.  For example one could be
+ * used by a particular I2S audio codec's driver, while another one
+ * on the same system might be used by a custom data capture driver.
+ */
+void __init at91_add_device_ssc(unsigned id, unsigned pins)
 {
-        /* Enable GPIO to access the LEDs */
-        at91_set_gpio_output(cpu_led, 1);
-        at91_set_gpio_output(timer_led, 1);
+        struct platform_device *pdev;
+
+        /*
+         * NOTE: caller is responsible for passing information matching
+         * "pins" to whatever will be using each particular controller.
+         */
+        switch (id) {
+        case AT91SAM9263_ID_SSC0:
+                pdev = &at91sam9263_ssc0_device;
+                configure_ssc0_pins(pins);
+                at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
+                break;
+        case AT91SAM9263_ID_SSC1:
+                pdev = &at91sam9263_ssc1_device;
+                configure_ssc1_pins(pins);
+                at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
+                break;
+        default:
+                return;
+        }
 
-        at91_leds_cpu   = cpu_led;
-        at91_leds_timer = timer_led;
+        platform_device_register(pdev);
 }
+
 #else
-void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #endif
 
 
@@ -778,12 +997,15 @@ static struct atmel_uart_data dbgu_data = {
         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
+static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9263_dbgu_device = {
         .name           = "atmel_usart",
         .id             = 0,
         .dev            = {
-                                .platform_data  = &dbgu_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &dbgu_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &dbgu_data,
         },
         .resource       = dbgu_resources,
         .num_resources  = ARRAY_SIZE(dbgu_resources),
@@ -813,23 +1035,29 @@ static struct atmel_uart_data uart0_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart0_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9263_uart0_device = {
         .name           = "atmel_usart",
         .id             = 1,
         .dev            = {
-                                .platform_data  = &uart0_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart0_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart0_data,
         },
         .resource       = uart0_resources,
         .num_resources  = ARRAY_SIZE(uart0_resources),
 };
 
-static inline void configure_usart0_pins(void)
+static inline void configure_usart0_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PA26, 1);            /* TXD0 */
         at91_set_A_periph(AT91_PIN_PA27, 0);            /* RXD0 */
-        at91_set_A_periph(AT91_PIN_PA28, 0);            /* RTS0 */
-        at91_set_A_periph(AT91_PIN_PA29, 0);            /* CTS0 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PA28, 0);    /* RTS0 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PA29, 0);    /* CTS0 */
 }
 
 static struct resource uart1_resources[] = {
@@ -850,23 +1078,29 @@ static struct atmel_uart_data uart1_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart1_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9263_uart1_device = {
         .name           = "atmel_usart",
         .id             = 2,
         .dev            = {
-                                .platform_data  = &uart1_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart1_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart1_data,
         },
         .resource       = uart1_resources,
         .num_resources  = ARRAY_SIZE(uart1_resources),
 };
 
-static inline void configure_usart1_pins(void)
+static inline void configure_usart1_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
         at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
-        at91_set_B_periph(AT91_PIN_PD7, 0);             /* RTS1 */
-        at91_set_B_periph(AT91_PIN_PD8, 0);             /* CTS1 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
 }
 
 static struct resource uart2_resources[] = {
@@ -887,29 +1121,35 @@ static struct atmel_uart_data uart2_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart2_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9263_uart2_device = {
         .name           = "atmel_usart",
         .id             = 3,
         .dev            = {
-                                .platform_data  = &uart2_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart2_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart2_data,
         },
         .resource       = uart2_resources,
         .num_resources  = ARRAY_SIZE(uart2_resources),
 };
 
-static inline void configure_usart2_pins(void)
+static inline void configure_usart2_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
         at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
-        at91_set_B_periph(AT91_PIN_PD5, 0);             /* RTS2 */
-        at91_set_B_periph(AT91_PIN_PD6, 0);             /* CTS2 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
 }
 
-struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
+static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
 struct platform_device *atmel_default_console_device;   /* the serial console device */
 
-void __init at91_init_serial(struct at91_uart_config *config)
+void __init __deprecated at91_init_serial(struct at91_uart_config *config)
 {
         int i;
 
@@ -917,17 +1157,17 @@ void __init at91_init_serial(struct at91_uart_config *config)
         for (i = 0; i < config->nr_tty; i++) {
                 switch (config->tty_map[i]) {
                         case 0:
-                                configure_usart0_pins();
+                                configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
                                 at91_uarts[i] = &at91sam9263_uart0_device;
                                 at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart");
                                 break;
                         case 1:
-                                configure_usart1_pins();
+                                configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
                                 at91_uarts[i] = &at91sam9263_uart1_device;
                                 at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart");
                                 break;
                         case 2:
-                                configure_usart2_pins();
+                                configure_usart2_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
                                 at91_uarts[i] = &at91sam9263_uart2_device;
                                 at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart");
                                 break;
@@ -949,6 +1189,48 @@ void __init at91_init_serial(struct at91_uart_config *config)
                 printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        switch (id) {
+                case 0:         /* DBGU */
+                        pdev = &at91sam9263_dbgu_device;
+                        configure_dbgu_pins();
+                        at91_clock_associate("mck", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9263_ID_US0:
+                        pdev = &at91sam9263_uart0_device;
+                        configure_usart0_pins(pins);
+                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9263_ID_US1:
+                        pdev = &at91sam9263_uart1_device;
+                        configure_usart1_pins(pins);
+                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9263_ID_US2:
+                        pdev = &at91sam9263_uart2_device;
+                        configure_usart2_pins(pins);
+                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
+                        break;
+                default:
+                        return;
+        }
+        pdev->id = portnr;              /* update to mapped ID */
+
+        if (portnr < ATMEL_MAX_UART)
+                at91_uarts[portnr] = pdev;
+}
+
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART)
+                atmel_default_console_device = at91_uarts[portnr];
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -960,6 +1242,8 @@ void __init at91_add_device_serial(void)
 }
 #else
 void __init at91_init_serial(struct at91_uart_config *config) {}
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
@@ -971,6 +1255,8 @@ void __init at91_add_device_serial(void) {}
  */
 static int __init at91_add_standard_devices(void)
 {
+        at91_add_device_rtt();
+        at91_add_device_watchdog();
         return 0;
 }
 
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index 2bd60a3dc623..f43b5c33e45d 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -9,6 +9,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 
+#include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 #include <linux/i2c-gpio.h>
 
@@ -29,7 +30,7 @@
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
-static u64 mmc_dmamask = 0xffffffffUL;
+static u64 mmc_dmamask = DMA_BIT_MASK(32);
 static struct at91_mmc_data mmc_data;
 
 static struct resource mmc_resources[] = {
@@ -50,7 +51,7 @@ static struct platform_device at91sam9rl_mmc_device = {
         .id             = -1,
         .dev            = {
                                 .dma_mask               = &mmc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &mmc_data,
         },
         .resource       = mmc_resources,
@@ -247,7 +248,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
-static u64 spi_dmamask = 0xffffffffUL;
+static u64 spi_dmamask = DMA_BIT_MASK(32);
 
 static struct resource spi_resources[] = {
         [0] = {
@@ -267,7 +268,7 @@ static struct platform_device at91sam9rl_spi_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &spi_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
         },
         .resource       = spi_resources,
         .num_resources  = ARRAY_SIZE(spi_resources),
@@ -312,7 +313,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
  * -------------------------------------------------------------------- */
 
 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-static u64 lcdc_dmamask = 0xffffffffUL;
+static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 static struct atmel_lcdfb_info lcdc_data;
 
 static struct resource lcdc_resources[] = {
@@ -340,7 +341,7 @@ static struct platform_device at91_lcdc_device = {
         .id             = 0,
         .dev            = {
                                 .dma_mask               = &lcdc_dmamask,
-                                .coherent_dma_mask      = 0xffffffff,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
                                 .platform_data          = &lcdc_data,
         },
         .resource       = lcdc_resources,
@@ -384,24 +385,196 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 
 
 /* --------------------------------------------------------------------
- *  LEDs
+ *  RTC
  * -------------------------------------------------------------------- */
 
-#if defined(CONFIG_LEDS)
-u8 at91_leds_cpu;
-u8 at91_leds_timer;
+#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
+static struct platform_device at91sam9rl_rtc_device = {
+        .name           = "at91_rtc",
+        .id             = -1,
+        .num_resources  = 0,
+};
 
-void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+static void __init at91_add_device_rtc(void)
 {
-        /* Enable GPIO to access the LEDs */
-        at91_set_gpio_output(cpu_led, 1);
-        at91_set_gpio_output(timer_led, 1);
+        platform_device_register(&at91sam9rl_rtc_device);
+}
+#else
+static void __init at91_add_device_rtc(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  RTT
+ * -------------------------------------------------------------------- */
+
+static struct resource rtt_resources[] = {
+        {
+                .start  = AT91_BASE_SYS + AT91_RTT,
+                .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device at91sam9rl_rtt_device = {
+        .name           = "at91_rtt",
+        .id             = -1,
+        .resource       = rtt_resources,
+        .num_resources  = ARRAY_SIZE(rtt_resources),
+};
 
-        at91_leds_cpu   = cpu_led;
-        at91_leds_timer = timer_led;
+static void __init at91_add_device_rtt(void)
+{
+        platform_device_register(&at91sam9rl_rtt_device);
+}
+
+
+/* --------------------------------------------------------------------
+ *  Watchdog
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
+static struct platform_device at91sam9rl_wdt_device = {
+        .name           = "at91_wdt",
+        .id             = -1,
+        .num_resources  = 0,
+};
+
+static void __init at91_add_device_watchdog(void)
+{
+        platform_device_register(&at91sam9rl_wdt_device);
 }
 #else
-void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+static void __init at91_add_device_watchdog(void) {}
+#endif
+
+
+/* --------------------------------------------------------------------
+ *  SSC -- Synchronous Serial Controller
+ * -------------------------------------------------------------------- */
+
+#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
+static u64 ssc0_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc0_resources[] = {
+        [0] = {
+                .start  = AT91SAM9RL_BASE_SSC0,
+                .end    = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9RL_ID_SSC0,
+                .end    = AT91SAM9RL_ID_SSC0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9rl_ssc0_device = {
+        .name   = "ssc",
+        .id     = 0,
+        .dev    = {
+                .dma_mask               = &ssc0_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc0_resources,
+        .num_resources  = ARRAY_SIZE(ssc0_resources),
+};
+
+static inline void configure_ssc0_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_A_periph(AT91_PIN_PC0, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_A_periph(AT91_PIN_PC1, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_A_periph(AT91_PIN_PA15, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_A_periph(AT91_PIN_PA16, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_B_periph(AT91_PIN_PA10, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_B_periph(AT91_PIN_PA22, 1);
+}
+
+static u64 ssc1_dmamask = DMA_BIT_MASK(32);
+
+static struct resource ssc1_resources[] = {
+        [0] = {
+                .start  = AT91SAM9RL_BASE_SSC1,
+                .end    = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = AT91SAM9RL_ID_SSC1,
+                .end    = AT91SAM9RL_ID_SSC1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device at91sam9rl_ssc1_device = {
+        .name   = "ssc",
+        .id     = 1,
+        .dev    = {
+                .dma_mask               = &ssc1_dmamask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .resource       = ssc1_resources,
+        .num_resources  = ARRAY_SIZE(ssc1_resources),
+};
+
+static inline void configure_ssc1_pins(unsigned pins)
+{
+        if (pins & ATMEL_SSC_TF)
+                at91_set_B_periph(AT91_PIN_PA29, 1);
+        if (pins & ATMEL_SSC_TK)
+                at91_set_B_periph(AT91_PIN_PA30, 1);
+        if (pins & ATMEL_SSC_TD)
+                at91_set_B_periph(AT91_PIN_PA13, 1);
+        if (pins & ATMEL_SSC_RD)
+                at91_set_B_periph(AT91_PIN_PA14, 1);
+        if (pins & ATMEL_SSC_RK)
+                at91_set_B_periph(AT91_PIN_PA9, 1);
+        if (pins & ATMEL_SSC_RF)
+                at91_set_B_periph(AT91_PIN_PA8, 1);
+}
+
+/*
+ * Return the device node so that board init code can use it as the
+ * parent for the device node reflecting how it's used on this board.
+ *
+ * SSC controllers are accessed through library code, instead of any
+ * kind of all-singing/all-dancing driver.  For example one could be
+ * used by a particular I2S audio codec's driver, while another one
+ * on the same system might be used by a custom data capture driver.
+ */
+void __init at91_add_device_ssc(unsigned id, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        /*
+         * NOTE: caller is responsible for passing information matching
+         * "pins" to whatever will be using each particular controller.
+         */
+        switch (id) {
+        case AT91SAM9RL_ID_SSC0:
+                pdev = &at91sam9rl_ssc0_device;
+                configure_ssc0_pins(pins);
+                at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
+                break;
+        case AT91SAM9RL_ID_SSC1:
+                pdev = &at91sam9rl_ssc1_device;
+                configure_ssc1_pins(pins);
+                at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
+                break;
+        default:
+                return;
+        }
+
+        platform_device_register(pdev);
+}
+
+#else
+void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 #endif
 
 
@@ -429,12 +602,15 @@ static struct atmel_uart_data dbgu_data = {
         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 };
 
+static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9rl_dbgu_device = {
         .name           = "atmel_usart",
         .id             = 0,
         .dev            = {
-                                .platform_data  = &dbgu_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &dbgu_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &dbgu_data,
         },
         .resource       = dbgu_resources,
         .num_resources  = ARRAY_SIZE(dbgu_resources),
@@ -464,23 +640,37 @@ static struct atmel_uart_data uart0_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart0_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9rl_uart0_device = {
         .name           = "atmel_usart",
         .id             = 1,
         .dev            = {
-                                .platform_data  = &uart0_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart0_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart0_data,
         },
         .resource       = uart0_resources,
         .num_resources  = ARRAY_SIZE(uart0_resources),
 };
 
-static inline void configure_usart0_pins(void)
+static inline void configure_usart0_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
         at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
-        at91_set_A_periph(AT91_PIN_PA9, 0);             /* RTS0 */
-        at91_set_A_periph(AT91_PIN_PA10, 0);            /* CTS0 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PA9, 0);     /* RTS0 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PA10, 0);    /* CTS0 */
+        if (pins & ATMEL_UART_DSR)
+                at91_set_A_periph(AT91_PIN_PD14, 0);    /* DSR0 */
+        if (pins & ATMEL_UART_DTR)
+                at91_set_A_periph(AT91_PIN_PD15, 0);    /* DTR0 */
+        if (pins & ATMEL_UART_DCD)
+                at91_set_A_periph(AT91_PIN_PD16, 0);    /* DCD0 */
+        if (pins & ATMEL_UART_RI)
+                at91_set_A_periph(AT91_PIN_PD17, 0);    /* RI0 */
 }
 
 static struct resource uart1_resources[] = {
@@ -501,21 +691,29 @@ static struct atmel_uart_data uart1_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart1_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9rl_uart1_device = {
         .name           = "atmel_usart",
         .id             = 2,
         .dev            = {
-                                .platform_data  = &uart1_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart1_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart1_data,
         },
         .resource       = uart1_resources,
         .num_resources  = ARRAY_SIZE(uart1_resources),
 };
 
-static inline void configure_usart1_pins(void)
+static inline void configure_usart1_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
         at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PA18, 0);    /* RTS1 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PA19, 0);    /* CTS1 */
 }
 
 static struct resource uart2_resources[] = {
@@ -536,21 +734,29 @@ static struct atmel_uart_data uart2_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart2_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9rl_uart2_device = {
         .name           = "atmel_usart",
         .id             = 3,
         .dev            = {
-                                .platform_data  = &uart2_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart2_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart2_data,
         },
         .resource       = uart2_resources,
         .num_resources  = ARRAY_SIZE(uart2_resources),
 };
 
-static inline void configure_usart2_pins(void)
+static inline void configure_usart2_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
         at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_A_periph(AT91_PIN_PA29, 0);    /* RTS2 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_A_periph(AT91_PIN_PA30, 0);    /* CTS2 */
 }
 
 static struct resource uart3_resources[] = {
@@ -571,27 +777,35 @@ static struct atmel_uart_data uart3_data = {
         .use_dma_rx     = 1,
 };
 
+static u64 uart3_dmamask = DMA_BIT_MASK(32);
+
 static struct platform_device at91sam9rl_uart3_device = {
         .name           = "atmel_usart",
         .id             = 4,
         .dev            = {
-                                .platform_data  = &uart3_data,
-                                .coherent_dma_mask = 0xffffffff,
+                                .dma_mask               = &uart3_dmamask,
+                                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                                .platform_data          = &uart3_data,
         },
         .resource       = uart3_resources,
         .num_resources  = ARRAY_SIZE(uart3_resources),
 };
 
-static inline void configure_usart3_pins(void)
+static inline void configure_usart3_pins(unsigned pins)
 {
         at91_set_A_periph(AT91_PIN_PB0, 1);             /* TXD3 */
         at91_set_A_periph(AT91_PIN_PB1, 0);             /* RXD3 */
+
+        if (pins & ATMEL_UART_RTS)
+                at91_set_B_periph(AT91_PIN_PD4, 0);     /* RTS3 */
+        if (pins & ATMEL_UART_CTS)
+                at91_set_B_periph(AT91_PIN_PD3, 0);     /* CTS3 */
 }
 
-struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
+static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
 struct platform_device *atmel_default_console_device;   /* the serial console device */
 
-void __init at91_init_serial(struct at91_uart_config *config)
+void __init __deprecated at91_init_serial(struct at91_uart_config *config)
 {
         int i;
 
@@ -599,22 +813,22 @@ void __init at91_init_serial(struct at91_uart_config *config)
         for (i = 0; i < config->nr_tty; i++) {
                 switch (config->tty_map[i]) {
                         case 0:
-                                configure_usart0_pins();
+                                configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
                                 at91_uarts[i] = &at91sam9rl_uart0_device;
                                 at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart");
                                 break;
                         case 1:
-                                configure_usart1_pins();
+                                configure_usart1_pins(0);
                                 at91_uarts[i] = &at91sam9rl_uart1_device;
                                 at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart");
                                 break;
                         case 2:
-                                configure_usart2_pins();
+                                configure_usart2_pins(0);
                                 at91_uarts[i] = &at91sam9rl_uart2_device;
                                 at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart");
                                 break;
                         case 3:
-                                configure_usart3_pins();
+                                configure_usart3_pins(0);
                                 at91_uarts[i] = &at91sam9rl_uart3_device;
                                 at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart");
                                 break;
@@ -636,6 +850,53 @@ void __init at91_init_serial(struct at91_uart_config *config)
                 printk(KERN_INFO "AT91: No default serial console defined.\n");
 }
 
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
+{
+        struct platform_device *pdev;
+
+        switch (id) {
+                case 0:         /* DBGU */
+                        pdev = &at91sam9rl_dbgu_device;
+                        configure_dbgu_pins();
+                        at91_clock_associate("mck", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9RL_ID_US0:
+                        pdev = &at91sam9rl_uart0_device;
+                        configure_usart0_pins(pins);
+                        at91_clock_associate("usart0_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9RL_ID_US1:
+                        pdev = &at91sam9rl_uart1_device;
+                        configure_usart1_pins(pins);
+                        at91_clock_associate("usart1_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9RL_ID_US2:
+                        pdev = &at91sam9rl_uart2_device;
+                        configure_usart2_pins(pins);
+                        at91_clock_associate("usart2_clk", &pdev->dev, "usart");
+                        break;
+                case AT91SAM9RL_ID_US3:
+                        pdev = &at91sam9rl_uart3_device;
+                        configure_usart3_pins(pins);
+                        at91_clock_associate("usart3_clk", &pdev->dev, "usart");
+                        break;
+                default:
+                        return;
+        }
+        pdev->id = portnr;              /* update to mapped ID */
+
+        if (portnr < ATMEL_MAX_UART)
+                at91_uarts[portnr] = pdev;
+}
+
+void __init at91_set_serial_console(unsigned portnr)
+{
+        if (portnr < ATMEL_MAX_UART)
+                atmel_default_console_device = at91_uarts[portnr];
+        if (!atmel_default_console_device)
+                printk(KERN_INFO "AT91: No default serial console defined.\n");
+}
+
 void __init at91_add_device_serial(void)
 {
         int i;
@@ -646,7 +907,9 @@ void __init at91_add_device_serial(void)
         }
 }
 #else
-void __init at91_init_serial(struct at91_uart_config *config) {}
+void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
+void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
+void __init at91_set_serial_console(unsigned portnr) {}
 void __init at91_add_device_serial(void) {}
 #endif
 
@@ -659,6 +922,9 @@ void __init at91_add_device_serial(void) {}
  */
 static int __init at91_add_standard_devices(void)
 {
+        at91_add_device_rtc();
+        at91_add_device_rtt();
+        at91_add_device_watchdog();
         return 0;
 }
 
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
new file mode 100644
index 000000000000..185437131541
--- /dev/null
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -0,0 +1,359 @@
+/*
+ * linux/arch/arm/mach-at91/board-cap9adk.c
+ *
+ *  Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
+ *  Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
+ *  Copyright (C) 2005 SAN People
+ *  Copyright (C) 2007 Atmel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+#include <linux/fb.h>
+#include <linux/mtd/physmap.h>
+
+#include <video/atmel_lcdc.h>
+
+#include <asm/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/at91cap9_matrix.h>
+#include <asm/arch/at91sam926x_mc.h>
+
+#include "generic.h"
+
+
+static void __init cap9adk_map_io(void)
+{
+        /* Initialize processor: 12 MHz crystal */
+        at91cap9_initialize(12000000);
+
+        /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */
+        at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11);
+        /* ... POWER LED always on */
+        at91_set_gpio_output(AT91_PIN_PC29, 1);
+
+        /* Setup the serial ports and console */
+        at91_register_uart(0, 0, 0);            /* DBGU = ttyS0 */
+        at91_set_serial_console(0);
+}
+
+static void __init cap9adk_init_irq(void)
+{
+        at91cap9_init_interrupts(NULL);
+}
+
+
+/*
+ * USB Host port
+ */
+static struct at91_usbh_data __initdata cap9adk_usbh_data = {
+        .ports          = 2,
+};
+
+
+/*
+ * ADS7846 Touchscreen
+ */
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+static int ads7843_pendown_state(void)
+{
+        return !at91_get_gpio_value(AT91_PIN_PC4);      /* Touchscreen PENIRQ */
+}
+
+static struct ads7846_platform_data ads_info = {
+        .model                  = 7843,
+        .x_min                  = 150,
+        .x_max                  = 3830,
+        .y_min                  = 190,
+        .y_max                  = 3830,
+        .vref_delay_usecs       = 100,
+        .x_plate_ohms           = 450,
+        .y_plate_ohms           = 250,
+        .pressure_max           = 15000,
+        .debounce_max           = 1,
+        .debounce_rep           = 0,
+        .debounce_tol           = (~0),
+        .get_pendown_state      = ads7843_pendown_state,
+};
+
+static void __init cap9adk_add_device_ts(void)
+{
+        at91_set_gpio_input(AT91_PIN_PC4, 1);   /* Touchscreen PENIRQ */
+        at91_set_gpio_input(AT91_PIN_PC5, 1);   /* Touchscreen BUSY */
+}
+#else
+static void __init cap9adk_add_device_ts(void) {}
+#endif
+
+
+/*
+ * SPI devices.
+ */
+static struct spi_board_info cap9adk_spi_devices[] = {
+#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
+        {       /* DataFlash card */
+                .modalias       = "mtd_dataflash",
+                .chip_select    = 0,
+                .max_speed_hz   = 15 * 1000 * 1000,
+                .bus_num        = 0,
+        },
+#endif
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+        {
+                .modalias       = "ads7846",
+                .chip_select    = 3,            /* can be 2 or 3, depending on J2 jumper */
+                .max_speed_hz   = 125000 * 26,  /* (max sample rate @ 3V) * (cmd + data + overhead) */
+                .bus_num        = 0,
+                .platform_data  = &ads_info,
+                .irq            = AT91_PIN_PC4,
+        },
+#endif
+};
+
+
+/*
+ * MCI (SD/MMC)
+ */
+static struct at91_mmc_data __initdata cap9adk_mmc_data = {
+        .wire4          = 1,
+//      .det_pin        = ... not connected
+//      .wp_pin         = ... not connected
+//      .vcc_pin        = ... not connected
+};
+
+
+/*
+ * MACB Ethernet device
+ */
+static struct at91_eth_data __initdata cap9adk_macb_data = {
+        .is_rmii        = 1,
+};
+
+
+/*
+ * NAND flash
+ */
+static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
+        {
+                .name   = "NAND partition",
+                .offset = 0,
+                .size   = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
+{
+        *num_partitions = ARRAY_SIZE(cap9adk_nand_partitions);
+        return cap9adk_nand_partitions;
+}
+
+static struct at91_nand_data __initdata cap9adk_nand_data = {
+        .ale            = 21,
+        .cle            = 22,
+//      .det_pin        = ... not connected
+//      .rdy_pin        = ... not connected
+        .enable_pin     = AT91_PIN_PD15,
+        .partition_info = nand_partitions,
+#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
+        .bus_width_16   = 1,
+#else
+        .bus_width_16   = 0,
+#endif
+};
+
+
+/*
+ * NOR flash
+ */
+static struct mtd_partition cap9adk_nor_partitions[] = {
+        {
+                .name           = "NOR partition",
+                .offset         = 0,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data cap9adk_nor_data = {
+        .width          = 2,
+        .parts          = cap9adk_nor_partitions,
+        .nr_parts       = ARRAY_SIZE(cap9adk_nor_partitions),
+};
+
+#define NOR_BASE        AT91_CHIPSELECT_0
+#define NOR_SIZE        0x800000
+
+static struct resource nor_flash_resources[] = {
+        {
+                .start  = NOR_BASE,
+                .end    = NOR_BASE + NOR_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device cap9adk_nor_flash = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                                .platform_data  = &cap9adk_nor_data,
+        },
+        .resource       = nor_flash_resources,
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+};
+
+static __init void cap9adk_add_device_nor(void)
+{
+        unsigned long csa;
+
+        csa = at91_sys_read(AT91_MATRIX_EBICSA);
+        at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
+
+        /* set the bus interface characteristics */
+        at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2)
+                        | AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2));
+
+        at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10)
+                        | AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10));
+
+        at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16));
+
+        at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE
+                        | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE
+                        | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1));
+
+        platform_device_register(&cap9adk_nor_flash);
+}
+
+
+/*
+ * LCD Controller
+ */
+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+static struct fb_videomode at91_tft_vga_modes[] = {
+        {
+                .name           = "TX09D50VM1CCA @ 60",
+                .refresh        = 60,
+                .xres           = 240,          .yres           = 320,
+                .pixclock       = KHZ2PICOS(4965),
+
+                .left_margin    = 1,            .right_margin   = 33,
+                .upper_margin   = 1,            .lower_margin   = 0,
+                .hsync_len      = 5,            .vsync_len      = 1,
+
+                .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+};
+
+static struct fb_monspecs at91fb_default_monspecs = {
+        .manufacturer   = "HIT",
+        .monitor        = "TX09D70VM1CCA",
+
+        .modedb         = at91_tft_vga_modes,
+        .modedb_len     = ARRAY_SIZE(at91_tft_vga_modes),
+        .hfmin          = 15000,
+        .hfmax          = 64000,
+        .vfmin          = 50,
+        .vfmax          = 150,
+};
+
+#define AT91CAP9_DEFAULT_LCDCON2        (ATMEL_LCDC_MEMOR_LITTLE \
+                                        | ATMEL_LCDC_DISTYPE_TFT    \
+                                        | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
+
+static void at91_lcdc_power_control(int on)
+{
+        if (on)
+                at91_set_gpio_value(AT91_PIN_PC0, 0);   /* power up */
+        else
+                at91_set_gpio_value(AT91_PIN_PC0, 1);   /* power down */
+}
+
+/* Driver datas */
+static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = {
+        .default_bpp                    = 16,
+        .default_dmacon                 = ATMEL_LCDC_DMAEN,
+        .default_lcdcon2                = AT91CAP9_DEFAULT_LCDCON2,
+        .default_monspecs               = &at91fb_default_monspecs,
+        .atmel_lcdfb_power_control      = at91_lcdc_power_control,
+        .guard_time                     = 1,
+};
+
+#else
+static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
+#endif
+
+
+/*
+ * AC97
+ */
+static struct atmel_ac97_data cap9adk_ac97_data = {
+//      .reset_pin      = ... not connected
+};
+
+
+static void __init cap9adk_board_init(void)
+{
+        /* Serial */
+        at91_add_device_serial();
+        /* USB Host */
+        set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
+        at91_add_device_usbh(&cap9adk_usbh_data);
+        /* SPI */
+        at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
+        /* Touchscreen */
+        cap9adk_add_device_ts();
+        /* MMC */
+        at91_add_device_mmc(1, &cap9adk_mmc_data);
+        /* Ethernet */
+        at91_add_device_eth(&cap9adk_macb_data);
+        /* NAND */
+        at91_add_device_nand(&cap9adk_nand_data);
+        /* NOR Flash */
+        cap9adk_add_device_nor();
+        /* I2C */
+        at91_add_device_i2c(NULL, 0);
+        /* LCD Controller */
+        set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH);
+        at91_add_device_lcdc(&cap9adk_lcdc_data);
+        /* AC97 */
+        at91_add_device_ac97(&cap9adk_ac97_data);
+}
+
+MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
+        /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
+        .phys_io        = AT91_BASE_SYS,
+        .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+        .boot_params    = AT91_SDRAM_BASE + 0x100,
+        .timer          = &at91sam926x_timer,
+        .map_io         = cap9adk_map_io,
+        .init_irq       = cap9adk_init_irq,
+        .init_machine   = cap9adk_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index d0aa20c9383e..0e2a11fc5bbd 100644
--- a/arch/arm/mach-at91/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -25,6 +25,8 @@
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
 #include <linux/mtd/physmap.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
 
 #include <asm/hardware.h>
 #include <asm/setup.h>
@@ -156,6 +158,85 @@ static struct platform_device csb_flash = {
         .num_resources  = ARRAY_SIZE(csb_flash_resources),
 };
 
+/*
+ * GPIO Buttons (on CSB300)
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button csb300_buttons[] = {
+        {
+                .gpio           = AT91_PIN_PB29,
+                .code           = BTN_0,
+                .desc           = "sw0",
+                .active_low     = 1,
+                .wakeup         = 1,
+        },
+        {
+                .gpio           = AT91_PIN_PB28,
+                .code           = BTN_1,
+                .desc           = "sw1",
+                .active_low     = 1,
+                .wakeup         = 1,
+        },
+        {
+                .gpio           = AT91_PIN_PA21,
+                .code           = BTN_2,
+                .desc           = "sw2",
+                .active_low     = 1,
+                .wakeup         = 1,
+        }
+};
+
+static struct gpio_keys_platform_data csb300_button_data = {
+        .buttons        = csb300_buttons,
+        .nbuttons       = ARRAY_SIZE(csb300_buttons),
+};
+
+static struct platform_device csb300_button_device = {
+        .name           = "gpio-keys",
+        .id             = -1,
+        .num_resources  = 0,
+        .dev            = {
+                .platform_data  = &csb300_button_data,
+        }
+};
+
+static void __init csb300_add_device_buttons(void)
+{
+        at91_set_gpio_input(AT91_PIN_PB29, 0);  /* sw0 */
+        at91_set_deglitch(AT91_PIN_PB29, 1);
+        at91_set_gpio_input(AT91_PIN_PB28, 0);  /* sw1 */
+        at91_set_deglitch(AT91_PIN_PB28, 1);
+        at91_set_gpio_input(AT91_PIN_PA21, 0);  /* sw2 */
+        at91_set_deglitch(AT91_PIN_PA21, 1);
+
+        platform_device_register(&csb300_button_device);
+}
+#else
+static void __init csb300_add_device_buttons(void) {}
+#endif
+
+static struct gpio_led csb_leds[] = {
+        {       /* "led0", yellow */
+                .name                   = "led0",
+                .gpio                   = AT91_PIN_PB2,
+                .active_low             = 1,
+                .default_trigger        = "heartbeat",
+        },
+        {       /* "led1", green */
+                .name                   = "led1",
+                .gpio                   = AT91_PIN_PB1,
+                .active_low             = 1,
+                .default_trigger        = "mmc0",
+        },
+        {       /* "led2", yellow */
+                .name                   = "led2",
+                .gpio                   = AT91_PIN_PB0,
+                .active_low             = 1,
+                .default_trigger        = "ide-disk",
+        },
+};
+
+
 static void __init csb337_board_init(void)
 {
         /* Serial */
@@ -177,6 +258,10 @@ static void __init csb337_board_init(void)
         at91_add_device_mmc(0, &csb337_mmc_data);
         /* NOR flash */
         platform_device_register(&csb_flash);
+        /* LEDs */
+        at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));
+        /* Switches on CSB300 */
+        csb300_add_device_buttons();
 }
 
 MACHINE_START(CSB337, "Cogent CSB337")
diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-dk.c
index 40c9e4331706..0a897efeba8e 100644
--- a/arch/arm/mach-at91/board-dk.c
+++ b/arch/arm/mach-at91/board-dk.c
@@ -183,6 +183,14 @@ static struct platform_device dk_flash = {
         .num_resources  = 1,
 };
 
+static struct gpio_led dk_leds[] = {
+        {
+                .name                   = "led0",
+                .gpio                   = AT91_PIN_PB2,
+                .active_low             = 1,
+                .default_trigger        = "heartbeat",
+        }
+};
 
 static void __init dk_board_init(void)
 {
@@ -213,6 +221,8 @@ static void __init dk_board_init(void)
         at91_add_device_nand(&dk_nand_data);
         /* NOR Flash */
         platform_device_register(&dk_flash);
+        /* LEDs */
+        at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
         /* VGA */
 //      dk_add_device_video();
 }
diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-ek.c
index 53a5ef9e72ee..0574e50a30dd 100644
--- a/arch/arm/mach-at91/board-ek.c
+++ b/arch/arm/mach-at91/board-ek.c
@@ -141,6 +141,25 @@ static struct platform_device ek_flash = {
         .num_resources  = 1,
 };
 
+static struct gpio_led ek_leds[] = {
+        {       /* "user led 1", DS2 */
+                .name                   = "green",
+                .gpio                   = AT91_PIN_PB0,
+                .active_low             = 1,
+                .default_trigger        = "mmc0",
+        },
+        {       /* "user led 2", DS4 */
+                .name                   = "yellow",
+                .gpio                   = AT91_PIN_PB1,
+                .active_low             = 1,
+                .default_trigger        = "heartbeat",
+        },
+        {       /* "user led 3", DS6 */
+                .name                   = "red",
+                .gpio                   = AT91_PIN_PB2,
+                .active_low             = 1,
+        }
+};
 
 static void __init ek_board_init(void)
 {
@@ -167,6 +186,8 @@ static void __init ek_board_init(void)
 #endif
         /* NOR Flash */
         platform_device_register(&ek_flash);
+        /* LEDs */
+        at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
         /* VGA */
 //      ek_add_device_video();
 }
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 550ae59a3aca..aa29ea58ca09 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -280,6 +280,68 @@ static struct spi_board_info ek_spi_devices[] = {
  * LCD Controller
  */
 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+
+#if defined(CONFIG_FB_ATMEL_STN)
+
+/* STN */
+static struct fb_videomode at91_stn_modes[] = {
+        {
+                .name           = "SP06Q002 @ 75",
+                .refresh        = 75,
+                .xres           = 320,          .yres           = 240,
+                .pixclock       = KHZ2PICOS(1440),
+
+                .left_margin    = 1,            .right_margin   = 1,
+                .upper_margin   = 0,            .lower_margin   = 0,
+                .hsync_len      = 1,            .vsync_len      = 1,
+
+                .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+};
+
+static struct fb_monspecs at91fb_default_stn_monspecs = {
+        .manufacturer   = "HIT",
+        .monitor        = "SP06Q002",
+
+        .modedb         = at91_stn_modes,
+        .modedb_len     = ARRAY_SIZE(at91_stn_modes),
+        .hfmin          = 15000,
+        .hfmax          = 64000,
+        .vfmin          = 50,
+        .vfmax          = 150,
+};
+
+#define AT91SAM9261_DEFAULT_STN_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
+                                        | ATMEL_LCDC_DISTYPE_STNMONO \
+                                        | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE \
+                                        | ATMEL_LCDC_IFWIDTH_4 \
+                                        | ATMEL_LCDC_SCANMOD_SINGLE)
+
+static void at91_lcdc_stn_power_control(int on)
+{
+        /* backlight */
+        if (on) {       /* power up */
+                at91_set_gpio_value(AT91_PIN_PC14, 0);
+                at91_set_gpio_value(AT91_PIN_PC15, 0);
+        } else {        /* power down */
+                at91_set_gpio_value(AT91_PIN_PC14, 1);
+                at91_set_gpio_value(AT91_PIN_PC15, 1);
+        }
+}
+
+static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
+        .default_bpp                    = 1,
+        .default_dmacon                 = ATMEL_LCDC_DMAEN,
+        .default_lcdcon2                = AT91SAM9261_DEFAULT_STN_LCDCON2,
+        .default_monspecs               = &at91fb_default_stn_monspecs,
+        .atmel_lcdfb_power_control      = at91_lcdc_stn_power_control,
+        .guard_time                     = 1,
+};
+
+#else
+
+/* TFT */
 static struct fb_videomode at91_tft_vga_modes[] = {
         {
                 .name           = "TX09D50VM1CCA @ 60",
@@ -296,7 +358,7 @@ static struct fb_videomode at91_tft_vga_modes[] = {
         },
 };
 
-static struct fb_monspecs at91fb_default_monspecs = {
+static struct fb_monspecs at91fb_default_tft_monspecs = {
         .manufacturer   = "HIT",
         .monitor        = "TX09D50VM1CCA",
 
@@ -308,11 +370,11 @@ static struct fb_monspecs at91fb_default_monspecs = {
         .vfmax          = 150,
 };
 
-#define AT91SAM9261_DEFAULT_LCDCON2     (ATMEL_LCDC_MEMOR_LITTLE \
+#define AT91SAM9261_DEFAULT_TFT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
                                         | ATMEL_LCDC_DISTYPE_TFT    \
                                         | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
 
-static void at91_lcdc_power_control(int on)
+static void at91_lcdc_tft_power_control(int on)
 {
         if (on)
                 at91_set_gpio_value(AT91_PIN_PA12, 0);  /* power up */
@@ -320,15 +382,15 @@ static void at91_lcdc_power_control(int on)
                 at91_set_gpio_value(AT91_PIN_PA12, 1);  /* power down */
 }
 
-/* Driver datas */
 static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
         .default_bpp                    = 16,
         .default_dmacon                 = ATMEL_LCDC_DMAEN,
-        .default_lcdcon2                = AT91SAM9261_DEFAULT_LCDCON2,
-        .default_monspecs               = &at91fb_default_monspecs,
-        .atmel_lcdfb_power_control      = at91_lcdc_power_control,
+        .default_lcdcon2                = AT91SAM9261_DEFAULT_TFT_LCDCON2,
+        .default_monspecs               = &at91fb_default_tft_monspecs,
+        .atmel_lcdfb_power_control      = at91_lcdc_tft_power_control,
         .guard_time                     = 1,
 };
+#endif
 
 #else
 static struct atmel_lcdfb_info __initdata ek_lcdc_data;
@@ -342,25 +404,25 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
 static struct gpio_keys_button ek_buttons[] = {
         {
                 .gpio           = AT91_PIN_PA27,
-                .keycode        = BTN_0,
+                .code           = BTN_0,
                 .desc           = "Button 0",
                 .active_low     = 1,
         },
         {
                 .gpio           = AT91_PIN_PA26,
-                .keycode        = BTN_1,
+                .code           = BTN_1,
                 .desc           = "Button 1",
                 .active_low     = 1,
         },
         {
                 .gpio           = AT91_PIN_PA25,
-                .keycode        = BTN_2,
+                .code           = BTN_2,
                 .desc           = "Button 2",
                 .active_low     = 1,
         },
         {
                 .gpio           = AT91_PIN_PA24,
-                .keycode        = BTN_3,
+                .code           = BTN_3,
                 .desc           = "Button 3",
                 .active_low     = 1,
         }
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
index ab9dcc075454..f09347a86e71 100644
--- a/arch/arm/mach-at91/board-sam9263ek.c
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -27,6 +27,8 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
 #include <linux/fb.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
 
 #include <video/atmel_lcdc.h>
 
@@ -163,6 +165,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = {
  * MACB Ethernet device
  */
 static struct at91_eth_data __initdata ek_macb_data = {
+        .phy_irq_pin    = AT91_PIN_PE31,
         .is_rmii        = 1,
 };
 
@@ -264,6 +267,55 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data;
 
 
 /*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+static struct gpio_keys_button ek_buttons[] = {
+        {       /* BP1, "leftclic" */
+                .code           = BTN_LEFT,
+                .gpio           = AT91_PIN_PC5,
+                .active_low     = 1,
+                .desc           = "left_click",
+                .wakeup         = 1,
+        },
+        {       /* BP2, "rightclic" */
+                .code           = BTN_RIGHT,
+                .gpio           = AT91_PIN_PC4,
+                .active_low     = 1,
+                .desc           = "right_click",
+                .wakeup         = 1,
+        },
+};
+
+static struct gpio_keys_platform_data ek_button_data = {
+        .buttons        = ek_buttons,
+        .nbuttons       = ARRAY_SIZE(ek_buttons),
+};
+
+static struct platform_device ek_button_device = {
+        .name           = "gpio-keys",
+        .id             = -1,
+        .num_resources  = 0,
+        .dev            = {
+                .platform_data  = &ek_button_data,
+        }
+};
+
+static void __init ek_add_device_buttons(void)
+{
+        at91_set_GPIO_periph(AT91_PIN_PC5, 0);  /* left button */
+        at91_set_deglitch(AT91_PIN_PC5, 1);
+        at91_set_GPIO_periph(AT91_PIN_PC4, 0);  /* right button */
+        at91_set_deglitch(AT91_PIN_PC4, 1);
+
+        platform_device_register(&ek_button_device);
+}
+#else
+static void __init ek_add_device_buttons(void) {}
+#endif
+
+
+/*
  * AC97
  */
 static struct atmel_ac97_data ek_ac97_data = {
@@ -271,6 +323,30 @@ static struct atmel_ac97_data ek_ac97_data = {
 };
 
 
+/*
+ * LEDs ... these could all be PWM-driven, for variable brightness
+ */
+static struct gpio_led ek_leds[] = {
+        {       /* "left" led, green, userled1, pwm1 */
+                .name                   = "ds1",
+                .gpio                   = AT91_PIN_PB8,
+                .active_low             = 1,
+                .default_trigger        = "mmc0",
+        },
+        {       /* "right" led, green, userled2, pwm2 */
+                .name                   = "ds2",
+                .gpio                   = AT91_PIN_PC29,
+                .active_low             = 1,
+                .default_trigger        = "nand-disk",
+        },
+        {       /* "power" led, yellow, pwm0 */
+                .name                   = "ds3",
+                .gpio                   = AT91_PIN_PB7,
+                .default_trigger        = "heartbeat",
+        },
+};
+
+
 static void __init ek_board_init(void)
 {
         /* Serial */
@@ -294,8 +370,12 @@ static void __init ek_board_init(void)
         at91_add_device_i2c(NULL, 0);
         /* LCD Controller */
         at91_add_device_lcdc(&ek_lcdc_data);
+        /* Push Buttons */
+        ek_add_device_buttons();
         /* AC97 */
         at91_add_device_ac97(&ek_ac97_data);
+        /* LEDs */
+        at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
 }
 
 MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 57c3b647ce83..ec76eeaafd45 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -574,6 +574,8 @@ int __init at91_clock_init(unsigned long main_clock)
         } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) {
                 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
                 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
+        } else if (cpu_is_at91cap9()) {
+                uhpck.pmc_mask = AT91CAP9_PMC_UHP;
         }
         at91_sys_write(AT91_CKGR_PLLBR, 0);
 
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 77d4c0a37842..b5daf7f5e011 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -15,6 +15,7 @@ extern void __init at91sam9261_initialize(unsigned long main_clock);
 extern void __init at91sam9263_initialize(unsigned long main_clock);
 extern void __init at91sam9rl_initialize(unsigned long main_clock);
 extern void __init at91x40_initialize(unsigned long main_clock);
+extern void __init at91cap9_initialize(unsigned long main_clock);
 
  /* Interrupts */
 extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
@@ -23,6 +24,7 @@ extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
 extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
 extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
 extern void __init at91x40_init_interrupts(unsigned int priority[]);
+extern void __init at91cap9_init_interrupts(unsigned int priority[]);
 extern void __init at91_aic_init(unsigned int priority[]);
 
  /* Timer */
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index aa2d365c93fb..6aeddd68d8af 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -13,6 +13,8 @@
 #include <linux/errno.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/module.h>
@@ -414,6 +416,66 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 
 /*--------------------------------------------------------------------------*/
 
+#ifdef CONFIG_DEBUG_FS
+
+static int at91_gpio_show(struct seq_file *s, void *unused)
+{
+        int bank, j;
+
+        /* print heading */
+        seq_printf(s, "Pin\t");
+        for (bank = 0; bank < gpio_banks; bank++) {
+                seq_printf(s, "PIO%c\t", 'A' + bank);
+        };
+        seq_printf(s, "\n\n");
+
+        /* print pin status */
+        for (j = 0; j < 32; j++) {
+                seq_printf(s, "%i:\t", j);
+
+                for (bank = 0; bank < gpio_banks; bank++) {
+                        unsigned        pin  = PIN_BASE + (32 * bank) + j;
+                        void __iomem    *pio = pin_to_controller(pin);
+                        unsigned        mask = pin_to_mask(pin);
+
+                        if (__raw_readl(pio + PIO_PSR) & mask)
+                                seq_printf(s, "GPIO:%s", __raw_readl(pio + PIO_PDSR) & mask ? "1" : "0");
+                        else
+                                seq_printf(s, "%s", __raw_readl(pio + PIO_ABSR) & mask ? "B" : "A");
+
+                        seq_printf(s, "\t");
+                }
+
+                seq_printf(s, "\n");
+        }
+
+        return 0;
+}
+
+static int at91_gpio_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, at91_gpio_show, NULL);
+}
+
+static const struct file_operations at91_gpio_operations = {
+        .open           = at91_gpio_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init at91_gpio_debugfs_init(void)
+{
+        /* /sys/kernel/debug/at91_gpio */
+        (void) debugfs_create_file("at91_gpio", S_IFREG | S_IRUGO, NULL, NULL, &at91_gpio_operations);
+        return 0;
+}
+postcore_initcall(at91_gpio_debugfs_init);
+
+#endif
+
+/*--------------------------------------------------------------------------*/
+
 /*
  * Called from the processor-specific init to enable GPIO interrupt support.
  */
diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c
index 0d5144973988..9cdcda500fe8 100644
--- a/arch/arm/mach-at91/leds.c
+++ b/arch/arm/mach-at91/leds.c
@@ -14,11 +14,62 @@
 #include <linux/init.h>
 
 #include <asm/mach-types.h>
-#include <asm/leds.h>
 #include <asm/arch/board.h>
 #include <asm/arch/gpio.h>
 
 
+/* ------------------------------------------------------------------------- */
+
+#if defined(CONFIG_NEW_LEDS)
+
+#include <linux/platform_device.h>
+
+/*
+ * New cross-platform LED support.
+ */
+
+static struct gpio_led_platform_data led_data;
+
+static struct platform_device at91_leds = {
+        .name                   = "leds-gpio",
+        .id                     = -1,
+        .dev.platform_data      = &led_data,
+};
+
+void __init at91_gpio_leds(struct gpio_led *leds, int nr)
+{
+        int i;
+
+        if (!nr)
+                return;
+
+        for (i = 0; i < nr; i++)
+                at91_set_gpio_output(leds[i].gpio, leds[i].active_low);
+
+        led_data.leds = leds;
+        led_data.num_leds = nr;
+        platform_device_register(&at91_leds);
+}
+
+#else
+void __init at91_gpio_leds(struct gpio_led *leds, int nr) {}
+#endif
+
+
+/* ------------------------------------------------------------------------- */
+
+#if defined(CONFIG_LEDS)
+
+#include <asm/leds.h>
+
+/*
+ * Old ARM-specific LED framework; not fully functional when generic time is
+ * in use.
+ */
+
+static u8 at91_leds_cpu;
+static u8 at91_leds_timer;
+
 static inline void at91_led_on(unsigned int led)
 {
         at91_set_gpio_value(led, 0);
@@ -93,3 +144,18 @@ static int __init leds_init(void)
 }
 
 __initcall(leds_init);
+
+
+void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+{
+        /* Enable GPIO to access the LEDs */
+        at91_set_gpio_output(cpu_led, 1);
+        at91_set_gpio_output(timer_led, 1);
+
+        at91_leds_cpu   = cpu_led;
+        at91_leds_timer = timer_led;
+}
+
+#else
+void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
+#endif
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 98cb61482917..4b120cc36135 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -80,6 +80,11 @@ static int at91_pm_verify_clocks(void)
                         pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
                         return 0;
                 }
+        } else if (cpu_is_at91cap9()) {
+                if ((scsr & AT91CAP9_PMC_UHP) != 0) {
+                        pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n");
+                        return 0;
+                }
         }
 
 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c
index f428af7545b4..e5dc33f1f95c 100644
--- a/arch/arm/mach-clps711x/time.c
+++ b/arch/arm/mach-clps711x/time.c
@@ -50,9 +50,7 @@ static unsigned long clps711x_gettimeoffset(void)
 static irqreturn_t
 p720t_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
         timer_tick();
-        write_sequnlock(&xtime_lock);
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c
index 986205ec9269..2ac63671ea5f 100644
--- a/arch/arm/mach-clps7500/core.c
+++ b/arch/arm/mach-clps7500/core.c
@@ -298,8 +298,6 @@ extern unsigned long ioc_timer_gettimeoffset(void);
 static irqreturn_t
 clps7500_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         timer_tick();
 
         /* Why not using do_leds interface?? */
@@ -313,8 +311,6 @@ clps7500_timer_interrupt(int irq, void *dev_id)
                 }
         }
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 8c1b5690dfe8..7710e14b5268 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -178,8 +178,6 @@ ebsa110_timer_interrupt(int irq, void *dev_id)
 {
         u32 count;
 
-        write_seqlock(&xtime_lock);
-
         /* latch and read timer 1 */
         __raw_writeb(0x40, PIT_CTRL);
         count = __raw_readb(PIT_T1);
@@ -192,8 +190,6 @@ ebsa110_timer_interrupt(int irq, void *dev_id)
 
         timer_tick();
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 70b2c7801110..91f6a07a51d5 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -3,6 +3,7 @@
  * Core routines for Cirrus EP93xx chips.
  *
  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
  *
  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
  * role in the ep93xx linux community.
@@ -21,7 +22,6 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/bitops.h>
-#include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_core.h>
 #include <linux/device.h>
@@ -99,8 +99,6 @@ static unsigned int last_jiffy_time;
 
 static int ep93xx_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         __raw_writel(1, EP93XX_TIMER1_CLEAR);
         while ((signed long)
                 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
@@ -109,8 +107,6 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id)
                 timer_tick();
         }
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
@@ -157,38 +153,41 @@ static unsigned char gpio_int_enabled[3];
 static unsigned char gpio_int_type1[3];
 static unsigned char gpio_int_type2[3];
 
-static void update_gpio_int_params(int abf)
+/* Port ordering is: A B F */
+static const u8 int_type1_register_offset[3]    = { 0x90, 0xac, 0x4c };
+static const u8 int_type2_register_offset[3]    = { 0x94, 0xb0, 0x50 };
+static const u8 eoi_register_offset[3]          = { 0x98, 0xb4, 0x54 };
+static const u8 int_en_register_offset[3]       = { 0x9c, 0xb8, 0x5c };
+
+static void update_gpio_int_params(unsigned port)
 {
-        if (abf == 0) {
-                __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE);
-                __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2);
-                __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1);
-                __raw_writeb(gpio_int_unmasked[0] & gpio_int_enabled[0], EP93XX_GPIO_A_INT_ENABLE);
-        } else if (abf == 1) {
-                __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE);
-                __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2);
-                __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1);
-                __raw_writeb(gpio_int_unmasked[1] & gpio_int_enabled[1], EP93XX_GPIO_B_INT_ENABLE);
-        } else if (abf == 2) {
-                __raw_writeb(0, EP93XX_GPIO_F_INT_ENABLE);
-                __raw_writeb(gpio_int_type2[2], EP93XX_GPIO_F_INT_TYPE2);
-                __raw_writeb(gpio_int_type1[2], EP93XX_GPIO_F_INT_TYPE1);
-                __raw_writeb(gpio_int_unmasked[2] & gpio_int_enabled[2], EP93XX_GPIO_F_INT_ENABLE);
-        } else {
-                BUG();
-        }
-}
+        BUG_ON(port > 2);
 
+        __raw_writeb(0, EP93XX_GPIO_REG(int_en_register_offset[port]));
 
-static unsigned char data_register_offset[8] = {
-        0x00, 0x04, 0x08, 0x0c, 0x20, 0x30, 0x38, 0x40,
+        __raw_writeb(gpio_int_type2[port],
+                EP93XX_GPIO_REG(int_type2_register_offset[port]));
+
+        __raw_writeb(gpio_int_type1[port],
+                EP93XX_GPIO_REG(int_type1_register_offset[port]));
+
+        __raw_writeb(gpio_int_unmasked[port] & gpio_int_enabled[port],
+                EP93XX_GPIO_REG(int_en_register_offset[port]));
+}
+
+/* Port ordering is: A B F D E C G H */
+static const u8 data_register_offset[8] = {
+        0x00, 0x04, 0x30, 0x0c, 0x20, 0x08, 0x38, 0x40,
 };
 
-static unsigned char data_direction_register_offset[8] = {
-        0x10, 0x14, 0x18, 0x1c, 0x24, 0x34, 0x3c, 0x44,
+static const u8 data_direction_register_offset[8] = {
+        0x10, 0x14, 0x34, 0x1c, 0x24, 0x18, 0x3c, 0x44,
 };
 
-void gpio_line_config(int line, int direction)
+#define GPIO_IN         0
+#define GPIO_OUT        1
+
+static void ep93xx_gpio_set_direction(unsigned line, int direction)
 {
         unsigned int data_direction_register;
         unsigned long flags;
@@ -199,14 +198,10 @@ void gpio_line_config(int line, int direction)
 
         local_irq_save(flags);
         if (direction == GPIO_OUT) {
-                if (line >= 0 && line < 16) {
-                        /* Port A/B.  */
+                if (line >= 0 && line <= EP93XX_GPIO_LINE_MAX_IRQ) {
+                        /* Port A/B/F */
                         gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
                         update_gpio_int_params(line >> 3);
-                } else if (line >= 40 && line < 48) {
-                        /* Port F.  */
-                        gpio_int_unmasked[2] &= ~(1 << (line & 7));
-                        update_gpio_int_params(2);
                 }
 
                 v = __raw_readb(data_direction_register);
@@ -219,39 +214,58 @@ void gpio_line_config(int line, int direction)
         }
         local_irq_restore(flags);
 }
-EXPORT_SYMBOL(gpio_line_config);
 
-int gpio_line_get(int line)
+int gpio_direction_input(unsigned gpio)
+{
+        if (gpio > EP93XX_GPIO_LINE_MAX)
+                return -EINVAL;
+
+        ep93xx_gpio_set_direction(gpio, GPIO_IN);
+
+        return 0;
+}
+EXPORT_SYMBOL(gpio_direction_input);
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+        if (gpio > EP93XX_GPIO_LINE_MAX)
+                return -EINVAL;
+
+        gpio_set_value(gpio, value);
+        ep93xx_gpio_set_direction(gpio, GPIO_OUT);
+
+        return 0;
+}
+EXPORT_SYMBOL(gpio_direction_output);
+
+int gpio_get_value(unsigned gpio)
 {
         unsigned int data_register;
 
-        data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
+        data_register = EP93XX_GPIO_REG(data_register_offset[gpio >> 3]);
 
-        return !!(__raw_readb(data_register) & (1 << (line & 7)));
+        return !!(__raw_readb(data_register) & (1 << (gpio & 7)));
 }
-EXPORT_SYMBOL(gpio_line_get);
+EXPORT_SYMBOL(gpio_get_value);
 
-void gpio_line_set(int line, int value)
+void gpio_set_value(unsigned gpio, int value)
 {
         unsigned int data_register;
         unsigned long flags;
         unsigned char v;
 
-        data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
+        data_register = EP93XX_GPIO_REG(data_register_offset[gpio >> 3]);
 
         local_irq_save(flags);
-        if (value == EP93XX_GPIO_HIGH) {
-                v = __raw_readb(data_register);
-                v |= 1 << (line & 7);
-                __raw_writeb(v, data_register);
-        } else if (value == EP93XX_GPIO_LOW) {
-                v = __raw_readb(data_register);
-                v &= ~(1 << (line & 7));
-                __raw_writeb(v, data_register);
-        }
+        v = __raw_readb(data_register);
+        if (value)
+                v |= 1 << (gpio & 7);
+        else
+                v &= ~(1 << (gpio & 7));
+        __raw_writeb(v, data_register);
         local_irq_restore(flags);
 }
-EXPORT_SYMBOL(gpio_line_set);
+EXPORT_SYMBOL(gpio_set_value);
 
 
 /*************************************************************************
@@ -265,47 +279,67 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
         status = __raw_readb(EP93XX_GPIO_A_INT_STATUS);
         for (i = 0; i < 8; i++) {
                 if (status & (1 << i)) {
-                        desc = irq_desc + IRQ_EP93XX_GPIO(0) + i;
-                        desc_handle_irq(IRQ_EP93XX_GPIO(0) + i, desc);
+                        int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i;
+                        desc = irq_desc + gpio_irq;
+                        desc_handle_irq(gpio_irq, desc);
                 }
         }
 
         status = __raw_readb(EP93XX_GPIO_B_INT_STATUS);
         for (i = 0; i < 8; i++) {
                 if (status & (1 << i)) {
-                        desc = irq_desc + IRQ_EP93XX_GPIO(8) + i;
-                        desc_handle_irq(IRQ_EP93XX_GPIO(8) + i, desc);
+                        int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i;
+                        desc = irq_desc + gpio_irq;
+                        desc_handle_irq(gpio_irq, desc);
                 }
         }
 }
 
 static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
-        int gpio_irq = IRQ_EP93XX_GPIO(16) + (((irq + 1) & 7) ^ 4);
+        /*
+         * map discontiguous hw irq range to continous sw irq range:
+         *
+         *  IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7})
+         */
+        int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */
+        int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx;
 
         desc_handle_irq(gpio_irq, irq_desc + gpio_irq);
 }
 
+static void ep93xx_gpio_irq_ack(unsigned int irq)
+{
+        int line = irq_to_gpio(irq);
+        int port = line >> 3;
+        int port_mask = 1 << (line & 7);
+
+        if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) {
+                gpio_int_type2[port] ^= port_mask; /* switch edge direction */
+                update_gpio_int_params(port);
+        }
+
+        __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
+}
+
 static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
 {
-        int line = irq - IRQ_EP93XX_GPIO(0);
+        int line = irq_to_gpio(irq);
         int port = line >> 3;
+        int port_mask = 1 << (line & 7);
 
-        gpio_int_unmasked[port] &= ~(1 << (line & 7));
+        if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE)
+                gpio_int_type2[port] ^= port_mask; /* switch edge direction */
+
+        gpio_int_unmasked[port] &= ~port_mask;
         update_gpio_int_params(port);
 
-        if (port == 0) {
-                __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK);
-        } else if (port == 1) {
-                __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK);
-        } else if (port == 2) {
-                __raw_writel(1 << (line & 7), EP93XX_GPIO_F_INT_ACK);
-        }
+        __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port]));
 }
 
 static void ep93xx_gpio_irq_mask(unsigned int irq)
 {
-        int line = irq - IRQ_EP93XX_GPIO(0);
+        int line = irq_to_gpio(irq);
         int port = line >> 3;
 
         gpio_int_unmasked[port] &= ~(1 << (line & 7));
@@ -314,7 +348,7 @@ static void ep93xx_gpio_irq_mask(unsigned int irq)
 
 static void ep93xx_gpio_irq_unmask(unsigned int irq)
 {
-        int line = irq - IRQ_EP93XX_GPIO(0);
+        int line = irq_to_gpio(irq);
         int port = line >> 3;
 
         gpio_int_unmasked[port] |= 1 << (line & 7);
@@ -329,38 +363,54 @@ static void ep93xx_gpio_irq_unmask(unsigned int irq)
  */
 static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
 {
-        int port;
-        int line;
-
-        line = irq - IRQ_EP93XX_GPIO(0);
-        if (line >= 0 && line < 16) {
-                gpio_line_config(line, GPIO_IN);
-        } else {
-                gpio_line_config(EP93XX_GPIO_LINE_F(line-16), GPIO_IN);
+        struct irq_desc *desc = irq_desc + irq;
+        const int gpio = irq_to_gpio(irq);
+        const int port = gpio >> 3;
+        const int port_mask = 1 << (gpio & 7);
+
+        ep93xx_gpio_set_direction(gpio, GPIO_IN);
+
+        switch (type) {
+        case IRQT_RISING:
+                gpio_int_type1[port] |= port_mask;
+                gpio_int_type2[port] |= port_mask;
+                desc->handle_irq = handle_edge_irq;
+                break;
+        case IRQT_FALLING:
+                gpio_int_type1[port] |= port_mask;
+                gpio_int_type2[port] &= ~port_mask;
+                desc->handle_irq = handle_edge_irq;
+                break;
+        case IRQT_HIGH:
+                gpio_int_type1[port] &= ~port_mask;
+                gpio_int_type2[port] |= port_mask;
+                desc->handle_irq = handle_level_irq;
+                break;
+        case IRQT_LOW:
+                gpio_int_type1[port] &= ~port_mask;
+                gpio_int_type2[port] &= ~port_mask;
+                desc->handle_irq = handle_level_irq;
+                break;
+        case IRQT_BOTHEDGE:
+                gpio_int_type1[port] |= port_mask;
+                /* set initial polarity based on current input level */
+                if (gpio_get_value(gpio))
+                        gpio_int_type2[port] &= ~port_mask; /* falling */
+                else
+                        gpio_int_type2[port] |= port_mask; /* rising */
+                desc->handle_irq = handle_edge_irq;
+                break;
+        default:
+                pr_err("ep93xx: failed to set irq type %d for gpio %d\n",
+                       type, gpio);
+                return -EINVAL;
         }
 
-        port = line >> 3;
-        line &= 7;
-
-        if (type & IRQT_RISING) {
-                gpio_int_enabled[port] |= 1 << line;
-                gpio_int_type1[port] |= 1 << line;
-                gpio_int_type2[port] |= 1 << line;
-        } else if (type & IRQT_FALLING) {
-                gpio_int_enabled[port] |= 1 << line;
-                gpio_int_type1[port] |= 1 << line;
-                gpio_int_type2[port] &= ~(1 << line);
-        } else if (type & IRQT_HIGH) {
-                gpio_int_enabled[port] |= 1 << line;
-                gpio_int_type1[port] &= ~(1 << line);
-                gpio_int_type2[port] |= 1 << line;
-        } else if (type & IRQT_LOW) {
-                gpio_int_enabled[port] |= 1 << line;
-                gpio_int_type1[port] &= ~(1 << line);
-                gpio_int_type2[port] &= ~(1 << line);
-        } else {
-                gpio_int_enabled[port] &= ~(1 << line);
-        }
+        gpio_int_enabled[port] |= port_mask;
+
+        desc->status &= ~IRQ_TYPE_SENSE_MASK;
+        desc->status |= type & IRQ_TYPE_SENSE_MASK;
+
         update_gpio_int_params(port);
 
         return 0;
@@ -368,7 +418,8 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
 
 static struct irq_chip ep93xx_gpio_irq_chip = {
         .name           = "GPIO",
-        .ack            = ep93xx_gpio_irq_mask_ack,
+        .ack            = ep93xx_gpio_irq_ack,
+        .mask_ack       = ep93xx_gpio_irq_mask_ack,
         .mask           = ep93xx_gpio_irq_mask,
         .unmask         = ep93xx_gpio_irq_unmask,
         .set_type       = ep93xx_gpio_irq_type,
@@ -377,15 +428,16 @@ static struct irq_chip ep93xx_gpio_irq_chip = {
 
 void __init ep93xx_init_irq(void)
 {
-        int irq;
+        int gpio_irq;
 
         vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
         vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
 
-        for (irq = IRQ_EP93XX_GPIO(0); irq <= IRQ_EP93XX_GPIO(23); irq++) {
-                set_irq_chip(irq, &ep93xx_gpio_irq_chip);
-                set_irq_handler(irq, handle_level_irq);
-                set_irq_flags(irq, IRQF_VALID);
+        for (gpio_irq = gpio_to_irq(0);
+             gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) {
+                set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip);
+                set_irq_handler(gpio_irq, handle_level_irq);
+                set_irq_flags(gpio_irq, IRQF_VALID);
         }
 
         set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler);
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
index 3a63941d43be..b2a21189dd81 100644
--- a/arch/arm/mach-footbridge/dc21285-timer.c
+++ b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -30,14 +30,10 @@ static unsigned long timer1_gettimeoffset (void)
 static irqreturn_t
 timer1_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         *CSR_TIMER1_CLR = 0;
 
         timer_tick();
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c
index d08d64139d00..a764e01d3573 100644
--- a/arch/arm/mach-footbridge/isa-timer.c
+++ b/arch/arm/mach-footbridge/isa-timer.c
@@ -64,9 +64,7 @@ static unsigned long isa_gettimeoffset(void)
 static irqreturn_t
 isa_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
         timer_tick();
-        write_sequnlock(&xtime_lock);
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-h720x/cpu-h7201.c b/arch/arm/mach-h720x/cpu-h7201.c
index 9107b8e2ad6e..c2a431f482f0 100644
--- a/arch/arm/mach-h720x/cpu-h7201.c
+++ b/arch/arm/mach-h720x/cpu-h7201.c
@@ -29,13 +29,9 @@
 static irqreturn_t
 h7201_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         CPU_REG (TIMER_VIRT, TIMER_TOPSTAT);
         timer_tick();
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c
index 0a1a25fb8ba8..c627fa124eb3 100644
--- a/arch/arm/mach-h720x/cpu-h7202.c
+++ b/arch/arm/mach-h720x/cpu-h7202.c
@@ -113,9 +113,7 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
         mask = CPU_REG (TIMER_VIRT, TIMER_TOPSTAT);
 
         if ( mask & TSTAT_T0INT ) {
-                write_seqlock(&xtime_lock);
                 timer_tick();
-                write_sequnlock(&xtime_lock);
                 if( mask == TSTAT_T0INT )
                         return;
         }
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index e9c82deb791d..7fbbc17f8e8b 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -250,8 +250,6 @@ unsigned long integrator_gettimeoffset(void)
 static irqreturn_t
 integrator_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         /*
          * clear the interrupt
          */
@@ -259,8 +257,6 @@ integrator_timer_interrupt(int irq, void *dev_id)
 
         timer_tick();
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index d4d8134ce567..d55fa4e9bb43 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -440,7 +440,7 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         return 1;
 }
 
-static irqreturn_t v3_irq(int irq, void *devid)
+static irqreturn_t v3_irq(int dummy, void *devid)
 {
 #ifdef CONFIG_DEBUG_LL
         struct pt_regs *regs = get_irq_regs();
@@ -448,8 +448,10 @@ static irqreturn_t v3_irq(int irq, void *devid)
         unsigned long instr = *(unsigned long *)pc;
         char buf[128];
 
-        sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n", irq,
-                pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255,
+        sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x "
+                "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr,
+                __raw_readl(SC_LBFADDR),
+                __raw_readl(SC_LBFCODE) & 255,
                 v3_readb(V3_LB_ISTAT));
         printascii(buf);
 #endif
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index cb6ad211887a..81cdc8267206 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -206,8 +206,6 @@ unsigned long ixp2000_gettimeoffset (void)
 
 static int ixp2000_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         /* clear timer 1 */
         ixp2000_reg_wrb(IXP2000_T1_CLR, 1);
 
@@ -217,8 +215,6 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id)
                 next_jiffy_time -= ticks_per_jiffy;
         }
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c
index 16356ffc86ae..5fea5a132939 100644
--- a/arch/arm/mach-ixp23xx/core.c
+++ b/arch/arm/mach-ixp23xx/core.c
@@ -22,7 +22,6 @@
 #include <linux/serial.h>
 #include <linux/tty.h>
 #include <linux/bitops.h>
-#include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_core.h>
 #include <linux/device.h>
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index 7a85ced56718..d3a779a7a35f 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -19,7 +19,6 @@
 #include <linux/tty.h>
 #include <linux/bitops.h>
 #include <linux/ioport.h>
-#include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_core.h>
 #include <linux/device.h>
@@ -40,7 +39,6 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/irq.h>
 #include <asm/mach/pci.h>
 
 static int __init espresso_pci_init(void)
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index c41a6b5a0acc..5c5d4d66dee8 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -24,7 +24,6 @@
 #include <linux/tty.h>
 #include <linux/bitops.h>
 #include <linux/ioport.h>
-#include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_core.h>
 #include <linux/device.h>
@@ -44,7 +43,6 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/irq.h>
 #include <asm/mach/pci.h>
 
 /*
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index e35644961aa4..f0f70ba1e46d 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -23,7 +23,6 @@
 #include <linux/tty.h>
 #include <linux/bitops.h>
 #include <linux/ioport.h>
-#include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/serial_core.h>
 #include <linux/device.h>
@@ -44,7 +43,6 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/arch.h>
-#include <asm/mach/irq.h>
 #include <asm/mach/pci.h>
 
 /*
diff --git a/arch/arm/mach-ixp4xx/avila-setup.c b/arch/arm/mach-ixp4xx/avila-setup.c
index d59b8dc7dc7a..e38f45fa58ae 100644
--- a/arch/arm/mach-ixp4xx/avila-setup.c
+++ b/arch/arm/mach-ixp4xx/avila-setup.c
@@ -18,6 +18,7 @@
 #include <linux/tty.h>
 #include <linux/serial_8250.h>
 #include <linux/slab.h>
+#include <linux/i2c-gpio.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -47,18 +48,17 @@ static struct platform_device avila_flash = {
         .resource       = &avila_flash_resource,
 };
 
-static struct ixp4xx_i2c_pins avila_i2c_gpio_pins = {
+static struct i2c_gpio_platform_data avila_i2c_gpio_data = {
         .sda_pin        = AVILA_SDA_PIN,
         .scl_pin        = AVILA_SCL_PIN,
 };
 
-static struct platform_device avila_i2c_controller = {
-        .name           = "IXP4XX-I2C",
+static struct platform_device avila_i2c_gpio = {
+        .name           = "i2c-gpio",
         .id             = 0,
-        .dev            = {
-                .platform_data = &avila_i2c_gpio_pins,
+        .dev     = {
+                .platform_data  = &avila_i2c_gpio_data,
         },
-        .num_resources  = 0
 };
 
 static struct resource avila_uart_resources[] = {
@@ -133,7 +133,7 @@ static struct platform_device avila_pata = {
 };
 
 static struct platform_device *avila_devices[] __initdata = {
-        &avila_i2c_controller,
+        &avila_i2c_gpio,
         &avila_flash,
         &avila_uart
 };
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 1e75e105c4f7..c473d408aa7c 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -14,6 +14,7 @@
 #include <linux/kernel.h>
 #include <linux/serial.h>
 #include <linux/serial_8250.h>
+#include <linux/i2c-gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -37,15 +38,17 @@ static struct platform_device dsmg600_flash = {
         .resource               = &dsmg600_flash_resource,
 };
 
-static struct ixp4xx_i2c_pins dsmg600_i2c_gpio_pins = {
+static struct i2c_gpio_platform_data dsmg600_i2c_gpio_data = {
         .sda_pin                = DSMG600_SDA_PIN,
         .scl_pin                = DSMG600_SCL_PIN,
 };
 
-static struct platform_device dsmg600_i2c_controller = {
-        .name                   = "IXP4XX-I2C",
+static struct platform_device dsmg600_i2c_gpio = {
+        .name                   = "i2c-gpio",
         .id                     = 0,
-        .dev.platform_data      = &dsmg600_i2c_gpio_pins,
+        .dev     = {
+                .platform_data  = &dsmg600_i2c_gpio_data,
+        },
 };
 
 #ifdef CONFIG_LEDS_CLASS
@@ -116,7 +119,7 @@ static struct platform_device dsmg600_uart = {
 };
 
 static struct platform_device *dsmg600_devices[] __initdata = {
-        &dsmg600_i2c_controller,
+        &dsmg600_i2c_gpio,
         &dsmg600_flash,
 };
 
diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c
index d5008d8fc9a5..e89070da28bf 100644
--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c
+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c
@@ -15,6 +15,7 @@
 #include <linux/tty.h>
 #include <linux/serial_8250.h>
 #include <linux/slab.h>
+#include <linux/i2c-gpio.h>
 #include <linux/io.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -120,18 +121,17 @@ static struct platform_device ixdp425_flash_nand = {
 };
 #endif  /* CONFIG_MTD_NAND_PLATFORM */
 
-static struct ixp4xx_i2c_pins ixdp425_i2c_gpio_pins = {
+static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = {
         .sda_pin        = IXDP425_SDA_PIN,
         .scl_pin        = IXDP425_SCL_PIN,
 };
 
-static struct platform_device ixdp425_i2c_controller = {
-        .name           = "IXP4XX-I2C",
+static struct platform_device ixdp425_i2c_gpio = {
+        .name           = "i2c-gpio",
         .id             = 0,
-        .dev            = {
-                .platform_data = &ixdp425_i2c_gpio_pins,
+        .dev     = {
+                .platform_data  = &ixdp425_i2c_gpio_data,
         },
-        .num_resources  = 0
 };
 
 static struct resource ixdp425_uart_resources[] = {
@@ -178,7 +178,7 @@ static struct platform_device ixdp425_uart = {
 };
 
 static struct platform_device *ixdp425_devices[] __initdata = {
-        &ixdp425_i2c_controller,
+        &ixdp425_i2c_gpio,
         &ixdp425_flash,
 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 78a17413ceca..54d884fb2517 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -16,6 +16,7 @@
 #include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/leds.h>
+#include <linux/i2c-gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -68,16 +69,17 @@ static struct platform_device nas100d_leds = {
 };
 #endif
 
-static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = {
+static struct i2c_gpio_platform_data nas100d_i2c_gpio_data = {
         .sda_pin                = NAS100D_SDA_PIN,
         .scl_pin                = NAS100D_SCL_PIN,
 };
 
-static struct platform_device nas100d_i2c_controller = {
-        .name                   = "IXP4XX-I2C",
+static struct platform_device nas100d_i2c_gpio = {
+        .name                   = "i2c-gpio",
         .id                     = 0,
-        .dev.platform_data      = &nas100d_i2c_gpio_pins,
-        .num_resources          = 0,
+        .dev     = {
+                .platform_data  = &nas100d_i2c_gpio_data,
+        },
 };
 
 static struct resource nas100d_uart_resources[] = {
@@ -124,7 +126,7 @@ static struct platform_device nas100d_uart = {
 };
 
 static struct platform_device *nas100d_devices[] __initdata = {
-        &nas100d_i2c_controller,
+        &nas100d_i2c_gpio,
         &nas100d_flash,
 #ifdef CONFIG_LEDS_IXP4XX
         &nas100d_leds,
diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c
index acd71e9c38a7..6f10dc208320 100644
--- a/arch/arm/mach-ixp4xx/nslu2-power.c
+++ b/arch/arm/mach-ixp4xx/nslu2-power.c
@@ -21,7 +21,6 @@
 #include <linux/reboot.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <linux/reboot.h>
 
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
index 9bf8ccbcaccf..77277d27fcc5 100644
--- a/arch/arm/mach-ixp4xx/nslu2-setup.c
+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c
@@ -18,6 +18,7 @@
 #include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/leds.h>
+#include <linux/i2c-gpio.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -41,7 +42,7 @@ static struct platform_device nslu2_flash = {
         .resource               = &nslu2_flash_resource,
 };
 
-static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = {
+static struct i2c_gpio_platform_data nslu2_i2c_gpio_data = {
         .sda_pin                = NSLU2_SDA_PIN,
         .scl_pin                = NSLU2_SCL_PIN,
 };
@@ -82,11 +83,12 @@ static struct platform_device nslu2_leds = {
 };
 #endif
 
-static struct platform_device nslu2_i2c_controller = {
-        .name                   = "IXP4XX-I2C",
+static struct platform_device nslu2_i2c_gpio = {
+        .name                   = "i2c-gpio",
         .id                     = 0,
-        .dev.platform_data      = &nslu2_i2c_gpio_pins,
-        .num_resources          = 0,
+        .dev     = {
+                .platform_data  = &nslu2_i2c_gpio_data,
+        },
 };
 
 static struct platform_device nslu2_beeper = {
@@ -139,7 +141,7 @@ static struct platform_device nslu2_uart = {
 };
 
 static struct platform_device *nslu2_devices[] __initdata = {
-        &nslu2_i2c_controller,
+        &nslu2_i2c_gpio,
         &nslu2_flash,
         &nslu2_beeper,
 #ifdef CONFIG_LEDS_IXP4XX
diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile
index 2a07a281fa8a..730a3af12c98 100644
--- a/arch/arm/mach-ks8695/Makefile
+++ b/arch/arm/mach-ks8695/Makefile
@@ -9,7 +9,7 @@ obj-n				:=
 obj-                            :=
 
 # PCI support is optional
-#obj-$(CONFIG_PCI)              += pci.o
+obj-$(CONFIG_PCI)               += pci.o
 
 # Board-specific support
 obj-$(CONFIG_MACH_KS8695)       += board-micrel.o
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c
index 2feeef81d843..05ac2bd04020 100644
--- a/arch/arm/mach-ks8695/board-micrel.c
+++ b/arch/arm/mach-ks8695/board-micrel.c
@@ -40,7 +40,7 @@ static void __init micrel_init(void)
         printk(KERN_INFO "Micrel KS8695 Development Board initializing\n");
 
 #ifdef CONFIG_PCI
-//      ks8695_init_pci(&micrel_pci);
+        ks8695_init_pci(&micrel_pci);
 #endif
 
         /* Add devices */
diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c
index b1aa3cb3d4a3..5e46191c0af9 100644
--- a/arch/arm/mach-ks8695/gpio.c
+++ b/arch/arm/mach-ks8695/gpio.c
@@ -20,6 +20,8 @@
 #include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/init.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
 #include <linux/module.h>
 
 #include <asm/io.h>
@@ -216,3 +218,84 @@ int irq_to_gpio(unsigned int irq)
         return (irq - KS8695_IRQ_EXTERN0);
 }
 EXPORT_SYMBOL(irq_to_gpio);
+
+
+/* .... Debug interface ..................................................... */
+
+#ifdef CONFIG_DEBUG_FS
+
+static int ks8695_gpio_show(struct seq_file *s, void *unused)
+{
+        unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN };
+        unsigned int intmask[] = { IOPC_IOEINT0TM, IOPC_IOEINT1TM, IOPC_IOEINT2TM, IOPC_IOEINT3TM };
+        unsigned long mode, ctrl, data;
+        int i;
+
+        mode = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM);
+        ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC);
+        data = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
+
+        seq_printf(s, "Pin\tI/O\tFunction\tState\n\n");
+
+        for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) {
+                seq_printf(s, "%i:\t", i);
+
+                seq_printf(s, "%s\t", (mode & IOPM_(i)) ? "Output" : "Input");
+
+                if (i <= KS8695_GPIO_3) {
+                        if (ctrl & enable[i]) {
+                                seq_printf(s, "EXT%i ", i);
+
+                                switch ((ctrl & intmask[i]) >> (4 * i)) {
+                                        case IOPC_TM_LOW:
+                                                seq_printf(s, "(Low)");         break;
+                                        case IOPC_TM_HIGH:
+                                                seq_printf(s, "(High)");        break;
+                                        case IOPC_TM_RISING:
+                                                seq_printf(s, "(Rising)");      break;
+                                        case IOPC_TM_FALLING:
+                                                seq_printf(s, "(Falling)");     break;
+                                        case IOPC_TM_EDGE:
+                                                seq_printf(s, "(Edges)");       break;
+                                }
+                        }
+                        else
+                                seq_printf(s, "GPIO\t");
+                }
+                else if (i <= KS8695_GPIO_5) {
+                        if (ctrl & enable[i])
+                                seq_printf(s, "TOUT%i\t", i - KS8695_GPIO_4);
+                        else
+                                seq_printf(s, "GPIO\t");
+                }
+                else
+                        seq_printf(s, "GPIO\t");
+
+                seq_printf(s, "\t");
+
+                seq_printf(s, "%i\n", (data & IOPD_(i)) ? 1 : 0);
+        }
+        return 0;
+}
+
+static int ks8695_gpio_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, ks8695_gpio_show, NULL);
+}
+
+static const struct file_operations ks8695_gpio_operations = {
+        .open           = ks8695_gpio_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int __init ks8695_gpio_debugfs_init(void)
+{
+        /* /sys/kernel/debug/ks8695_gpio */
+        (void) debugfs_create_file("ks8695_gpio", S_IFREG | S_IRUGO, NULL, NULL, &ks8695_gpio_operations);
+        return 0;
+}
+postcore_initcall(ks8695_gpio_debugfs_init);
+
+#endif
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c
new file mode 100644
index 000000000000..3f4e0330cb1a
--- /dev/null
+++ b/arch/arm/mach-ks8695/pci.c
@@ -0,0 +1,326 @@
+/*
+ * arch/arm/mach-ks8695/pci.c
+ *
+ *  Copyright (C) 2003, Micrel Semiconductors
+ *  Copyright (C) 2006, Greg Ungerer <gerg@snapgear.com>
+ *  Copyright (C) 2006, Ben Dooks
+ *  Copyright (C) 2007, Andrew Victor
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/delay.h>
+
+#include <asm/io.h>
+#include <asm/signal.h>
+#include <asm/mach/pci.h>
+#include <asm/hardware.h>
+
+#include <asm/arch/devices.h>
+#include <asm/arch/regs-pci.h>
+
+
+static int pci_dbg;
+static int pci_cfg_dbg;
+
+
+static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where)
+{
+        unsigned long pbca;
+
+        pbca = PBCA_ENABLE | (where & ~3);
+        pbca |= PCI_SLOT(devfn) << 11 ;
+        pbca |= PCI_FUNC(devfn) << 8;
+        pbca |= bus_nr << 16;
+
+        if (bus_nr == 0) {
+                /* use Type-0 transaction */
+                __raw_writel(pbca, KS8695_PCI_VA + KS8695_PBCA);
+        } else {
+                /* use Type-1 transaction */
+                __raw_writel(pbca | PBCA_TYPE1, KS8695_PCI_VA + KS8695_PBCA);
+        }
+}
+
+
+/*
+ * The KS8695 datasheet prohibits anything other than 32bit accesses
+ * to the IO registers, so all our configuration must be done with
+ * 32bit operations, and the correct bit masking and shifting.
+ */
+
+static int ks8695_pci_readconfig(struct pci_bus *bus,
+                        unsigned int devfn, int where, int size, u32 *value)
+{
+        ks8695_pci_setupconfig(bus->number, devfn, where);
+
+        *value = __raw_readl(KS8695_PCI_VA +  KS8695_PBCD);
+
+        switch (size) {
+                case 4:
+                        break;
+                case 2:
+                        *value = *value >> ((where & 2) * 8);
+                        *value &= 0xffff;
+                        break;
+                case 1:
+                        *value = *value >> ((where & 3) * 8);
+                        *value &= 0xff;
+                        break;
+        }
+
+        if (pci_cfg_dbg) {
+                printk("read: %d,%08x,%02x,%d: %08x (%08x)\n",
+                        bus->number, devfn, where, size, *value,
+                        __raw_readl(KS8695_PCI_VA +  KS8695_PBCD));
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int ks8695_pci_writeconfig(struct pci_bus *bus,
+                        unsigned int devfn, int where, int size, u32 value)
+{
+        unsigned long tmp;
+
+        if (pci_cfg_dbg) {
+                printk("write: %d,%08x,%02x,%d: %08x\n",
+                        bus->number, devfn, where, size, value);
+        }
+
+        ks8695_pci_setupconfig(bus->number, devfn, where);
+
+        switch (size) {
+                case 4:
+                        __raw_writel(value, KS8695_PCI_VA +  KS8695_PBCD);
+                        break;
+                case 2:
+                        tmp = __raw_readl(KS8695_PCI_VA +  KS8695_PBCD);
+                        tmp &= ~(0xffff << ((where & 2) * 8));
+                        tmp |= value << ((where & 2) * 8);
+
+                        __raw_writel(tmp, KS8695_PCI_VA +  KS8695_PBCD);
+                        break;
+                case 1:
+                        tmp = __raw_readl(KS8695_PCI_VA +  KS8695_PBCD);
+                        tmp &= ~(0xff << ((where & 3) * 8));
+                        tmp |= value << ((where & 3) * 8);
+
+                        __raw_writel(tmp, KS8695_PCI_VA +  KS8695_PBCD);
+                        break;
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static void ks8695_local_writeconfig(int where, u32 value)
+{
+        ks8695_pci_setupconfig(0, 0, where);
+        __raw_writel(value, KS8695_PCI_VA + KS8695_PBCD);
+}
+
+static struct pci_ops ks8695_pci_ops = {
+        .read   = ks8695_pci_readconfig,
+        .write  = ks8695_pci_writeconfig,
+};
+
+static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
+{
+        return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys);
+}
+
+static struct resource pci_mem = {
+        .name   = "PCI Memory space",
+        .start  = KS8695_PCIMEM_PA,
+        .end    = KS8695_PCIMEM_PA + (KS8695_PCIMEM_SIZE - 1),
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct resource pci_io = {
+        .name   = "PCI IO space",
+        .start  = KS8695_PCIIO_PA,
+        .end    = KS8695_PCIIO_PA + (KS8695_PCIIO_SIZE - 1),
+        .flags  = IORESOURCE_IO,
+};
+
+static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
+{
+        if (nr > 0)
+                return 0;
+
+        request_resource(&iomem_resource, &pci_mem);
+        request_resource(&ioport_resource, &pci_io);
+
+        sys->resource[0] = &pci_io;
+        sys->resource[1] = &pci_mem;
+        sys->resource[2] = NULL;
+
+        /* Assign and enable processor bridge */
+        ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);
+
+        /* Enable bus-master & Memory Space access */
+        ks8695_local_writeconfig(PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
+
+        /* Set cache-line size & latency. */
+        ks8695_local_writeconfig(PCI_CACHE_LINE_SIZE, (32 << 8) | (L1_CACHE_BYTES / sizeof(u32)));
+
+        /* Reserve PCI memory space for PCI-AHB resources */
+        if (!request_mem_region(KS8695_PCIMEM_PA, SZ_64M, "PCI-AHB Bridge")) {
+                printk(KERN_ERR "Cannot allocate PCI-AHB Bridge memory.\n");
+                return -EBUSY;
+        }
+
+        return 1;
+}
+
+static inline unsigned int size_mask(unsigned long size)
+{
+        return (~size) + 1;
+}
+
+static int ks8695_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
+{
+        unsigned long pc = instruction_pointer(regs);
+        unsigned long instr = *(unsigned long *)pc;
+        unsigned long cmdstat;
+
+        cmdstat = __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS);
+
+        printk(KERN_ERR "PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx [%s%s%s%s%s]\n",
+                addr, fsr, regs->ARM_pc, regs->ARM_lr,
+                cmdstat & (PCI_STATUS_SIG_TARGET_ABORT << 16) ? "GenTarget" : " ",
+                cmdstat & (PCI_STATUS_REC_TARGET_ABORT << 16) ? "RecvTarget" : " ",
+                cmdstat & (PCI_STATUS_REC_MASTER_ABORT << 16) ? "MasterAbort" : " ",
+                cmdstat & (PCI_STATUS_SIG_SYSTEM_ERROR << 16) ? "SysError" : " ",
+                cmdstat & (PCI_STATUS_DETECTED_PARITY << 16)  ? "Parity" : " "
+        );
+
+        __raw_writel(cmdstat, KS8695_PCI_VA + KS8695_CRCFCS);
+
+        /*
+         * If the instruction being executed was a read,
+         * make it look like it read all-ones.
+         */
+        if ((instr & 0x0c100000) == 0x04100000) {
+                int reg = (instr >> 12) & 15;
+                unsigned long val;
+
+                if (instr & 0x00400000)
+                        val = 255;
+                else
+                        val = -1;
+
+                regs->uregs[reg] = val;
+                regs->ARM_pc += 4;
+                return 0;
+        }
+
+        if ((instr & 0x0e100090) == 0x00100090) {
+                int reg = (instr >> 12) & 15;
+
+                regs->uregs[reg] = -1;
+                regs->ARM_pc += 4;
+                return 0;
+        }
+
+        return 1;
+}
+
+static void __init ks8695_pci_preinit(void)
+{
+        /* stage 1 initialization, subid, subdevice = 0x0001 */
+        __raw_writel(0x00010001, KS8695_PCI_VA + KS8695_CRCSID);
+
+        /* stage 2 initialization */
+        /* prefetch limits with 16 words, retry enable */
+        __raw_writel(0x40000000, KS8695_PCI_VA + KS8695_PBCS);
+
+        /* configure memory mapping */
+        __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBA);
+        __raw_writel(size_mask(KS8695_PCIMEM_SIZE), KS8695_PCI_VA + KS8695_PMBAM);
+        __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBAT);
+        __raw_writel(0, KS8695_PCI_VA + KS8695_PMBAC);
+
+        /* configure IO mapping */
+        __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBA);
+        __raw_writel(size_mask(KS8695_PCIIO_SIZE), KS8695_PCI_VA + KS8695_PIOBAM);
+        __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBAT);
+        __raw_writel(0, KS8695_PCI_VA + KS8695_PIOBAC);
+
+        /* hook in fault handlers */
+        hook_fault_code(8, ks8695_pci_fault, SIGBUS, "external abort on non-linefetch");
+        hook_fault_code(10, ks8695_pci_fault, SIGBUS, "external abort on non-linefetch");
+}
+
+static void ks8695_show_pciregs(void)
+{
+        if (!pci_dbg)
+                return;
+
+        printk(KERN_INFO "PCI: CRCFID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFID));
+        printk(KERN_INFO "PCI: CRCFCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS));
+        printk(KERN_INFO "PCI: CRCFRV = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFRV));
+        printk(KERN_INFO "PCI: CRCFLT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFLT));
+        printk(KERN_INFO "PCI: CRCBMA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCBMA));
+        printk(KERN_INFO "PCI: CRCSID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCSID));
+        printk(KERN_INFO "PCI: CRCFIT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFIT));
+
+        printk(KERN_INFO "PCI: PBM    = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBM));
+        printk(KERN_INFO "PCI: PBCS   = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBCS));
+
+        printk(KERN_INFO "PCI: PMBA   = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBA));
+        printk(KERN_INFO "PCI: PMBAC  = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAC));
+        printk(KERN_INFO "PCI: PMBAM  = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAM));
+        printk(KERN_INFO "PCI: PMBAT  = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAT));
+
+        printk(KERN_INFO "PCI: PIOBA  = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBA));
+        printk(KERN_INFO "PCI: PIOBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAC));
+        printk(KERN_INFO "PCI: PIOBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAM));
+        printk(KERN_INFO "PCI: PIOBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAT));
+}
+
+
+static struct hw_pci ks8695_pci __initdata = {
+        .nr_controllers = 1,
+        .preinit        = ks8695_pci_preinit,
+        .setup          = ks8695_pci_setup,
+        .scan           = ks8695_pci_scan_bus,
+        .postinit       = NULL,
+        .swizzle        = pci_std_swizzle,
+        .map_irq        = NULL,
+};
+
+void __init ks8695_init_pci(struct ks8695_pci_cfg *cfg)
+{
+        if (__raw_readl(KS8695_PCI_VA + KS8695_CRCFRV) & CFRV_GUEST) {
+                printk("PCI: KS8695 in guest mode, not initialising\n");
+                return;
+        }
+
+        printk(KERN_INFO "PCI: Initialising\n");
+        ks8695_show_pciregs();
+
+        /* set Mode */
+        __raw_writel(cfg->mode << 29, KS8695_PCI_VA + KS8695_PBM);
+
+        ks8695_pci.map_irq = cfg->map_irq;      /* board-specific map_irq method */
+
+        pci_common_init(&ks8695_pci);
+}
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c
index d2c86e4a72eb..02f766b3121d 100644
--- a/arch/arm/mach-ks8695/time.c
+++ b/arch/arm/mach-ks8695/time.c
@@ -70,10 +70,7 @@ static unsigned long ks8695_gettimeoffset (void)
  */
 static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
         timer_tick();
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c
index c25316d02537..e50e60b33851 100644
--- a/arch/arm/mach-lh7a40x/time.c
+++ b/arch/arm/mach-lh7a40x/time.c
@@ -41,13 +41,9 @@
 static irqreturn_t
 lh7a40x_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         TIMER_EOI = 0;
         timer_tick();
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
new file mode 100644
index 000000000000..3553babbbf05
--- /dev/null
+++ b/arch/arm/mach-msm/Kconfig
@@ -0,0 +1,18 @@
+if ARCH_MSM7X00A
+
+comment "MSM7X00A Board Type"
+        depends on ARCH_MSM7X00A
+
+config MACH_HALIBUT
+        depends on ARCH_MSM7X00A
+        default y
+        bool "Halibut Board (QCT SURF7200A)"
+        help
+          Support for the Qualcomm SURF7200A eval board.
+
+config MSM7X00A_IDLE
+        depends on ARCH_MSM7X00A
+        default y
+        bool "Idle Support for MSM7X00A"
+
+endif
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
new file mode 100644
index 000000000000..d12f23655850
--- /dev/null
+++ b/arch/arm/mach-msm/Makefile
@@ -0,0 +1,7 @@
+obj-y += io.o idle.o irq.o timer.o dma.o
+
+# Common code for board init
+obj-y += common.o
+
+obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o
+
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
new file mode 100644
index 000000000000..24dfbf8c07c4
--- /dev/null
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -0,0 +1,3 @@
+  zreladdr-y            := 0x10008000
+params_phys-y           := 0x10000100
+initrd_phys-y           := 0x10800000
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
new file mode 100644
index 000000000000..86dfb2b5261c
--- /dev/null
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -0,0 +1,114 @@
+/* linux/arch/arm/mach-msm/board-halibut.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+
+#include <asm/arch/board.h>
+#include <asm/arch/msm_iomap.h>
+
+#include <asm/io.h>
+#include <asm/delay.h>
+
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .start  = 0x9C004300,
+                .end    = 0x9C004400,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = MSM_GPIO_TO_INT(49),
+                .end    = MSM_GPIO_TO_INT(49),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+};
+
+static void mddi0_panel_power(int on)
+{
+}
+
+static struct msm_mddi_platform_data msm_mddi0_pdata = {
+        .panel_power    = mddi0_panel_power,
+        .has_vsync_irq  = 0,
+};
+
+static struct platform_device msm_mddi0_device = {
+        .name   = "msm_mddi",
+        .id     = 0,
+        .dev    = {
+                .platform_data = &msm_mddi0_pdata
+        },
+};
+
+static struct platform_device msm_serial0_device = {
+        .name   = "msm_serial",
+        .id     = 0,
+};
+
+static struct platform_device *devices[] __initdata = {
+        &msm_serial0_device,
+        &msm_mddi0_device,
+        &smc91x_device,
+};
+
+extern struct sys_timer msm_timer;
+
+static void __init halibut_init_irq(void)
+{
+        msm_init_irq();
+}
+
+static void __init halibut_init(void)
+{
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+        msm_add_devices();
+}
+
+static void __init halibut_map_io(void)
+{
+        msm_map_common_io();
+}
+
+MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)")
+
+/* UART for LL DEBUG */
+        .phys_io        = MSM_UART1_PHYS,
+        .io_pg_offst    = ((MSM_UART1_BASE) >> 18) & 0xfffc,
+
+        .boot_params    = 0x10000100,
+        .map_io         = halibut_map_io,
+        .init_irq       = halibut_init_irq,
+        .init_machine   = halibut_init,
+        .timer          = &msm_timer,
+MACHINE_END
diff --git a/arch/arm/mach-msm/common.c b/arch/arm/mach-msm/common.c
new file mode 100644
index 000000000000..3f5d3362f887
--- /dev/null
+++ b/arch/arm/mach-msm/common.c
@@ -0,0 +1,116 @@
+/* linux/arch/arm/mach-msm/common.c
+ *
+ * Common setup code for MSM7K Boards
+ *
+ * Copyright (C) 2007 Google, Inc.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/flash.h>
+#include <asm/io.h>
+
+#include <asm/setup.h>
+
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/arch/msm_iomap.h>
+
+#include <asm/arch/board.h>
+
+struct flash_platform_data msm_nand_data = {
+        .parts          = 0,
+        .nr_parts       = 0,
+};
+
+static struct resource msm_nand_resources[] = {
+        [0] = {
+                .start  = 7,
+                .end    = 7,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device msm_nand_device = {
+        .name           = "msm_nand",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(msm_nand_resources),
+        .resource       = msm_nand_resources,
+        .dev            = {
+                .platform_data  = &msm_nand_data,
+        },
+};
+
+static struct platform_device msm_smd_device = {
+        .name   = "msm_smd",
+        .id     = -1,
+};
+
+static struct resource msm_i2c_resources[] = {
+        {
+                .start  = MSM_I2C_BASE,
+                .end    = MSM_I2C_BASE + MSM_I2C_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = INT_PWB_I2C,
+                .end    = INT_PWB_I2C,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device msm_i2c_device = {
+        .name           = "msm_i2c",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(msm_i2c_resources),
+        .resource       = msm_i2c_resources,
+};
+
+static struct resource usb_resources[] = {
+        {
+                .start  = MSM_HSUSB_PHYS,
+                .end    = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = INT_USB_HS,
+                .end    = INT_USB_HS,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device msm_hsusb_device = {
+        .name           = "msm_hsusb",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(usb_resources),
+        .resource       = usb_resources,
+        .dev            = {
+                .coherent_dma_mask      = 0xffffffff,
+        },
+};
+
+static struct platform_device *devices[] __initdata = {
+        &msm_nand_device,
+        &msm_smd_device,
+        &msm_i2c_device,
+        &msm_hsusb_device,
+};
+
+void __init msm_add_devices(void)
+{
+        platform_add_devices(devices, ARRAY_SIZE(devices));
+}
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c
new file mode 100644
index 000000000000..8b0f339b3274
--- /dev/null
+++ b/arch/arm/mach-msm/dma.c
@@ -0,0 +1,214 @@
+/* linux/arch/arm/mach-msm/dma.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <asm/io.h>
+#include <linux/interrupt.h>
+#include <asm/arch/dma.h>
+
+#define MSM_DMOV_CHANNEL_COUNT 16
+
+enum {
+        MSM_DMOV_PRINT_ERRORS = 1,
+        MSM_DMOV_PRINT_IO = 2,
+        MSM_DMOV_PRINT_FLOW = 4
+};
+
+static DEFINE_SPINLOCK(msm_dmov_lock);
+static struct msm_dmov_cmd active_command;
+static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
+static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
+unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS;
+
+#define MSM_DMOV_DPRINTF(mask, format, args...) \
+        do { \
+                if ((mask) & msm_dmov_print_mask) \
+                        printk(KERN_ERR format, args); \
+        } while (0)
+#define PRINT_ERROR(format, args...) \
+        MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_ERRORS, format, args);
+#define PRINT_IO(format, args...) \
+        MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_IO, format, args);
+#define PRINT_FLOW(format, args...) \
+        MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args);
+
+void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd)
+{
+        unsigned long irq_flags;
+        unsigned int status;
+
+        spin_lock_irqsave(&msm_dmov_lock, irq_flags);
+        status = readl(DMOV_STATUS(id));
+        if (list_empty(&ready_commands[id]) &&
+                (status & DMOV_STATUS_CMD_PTR_RDY)) {
+#if 0
+                if (list_empty(&active_commands[id])) {
+                        PRINT_FLOW("msm_dmov_enqueue_cmd(%d), enable interrupt\n", id);
+                        writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id));
+                }
+#endif
+                PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status);
+                list_add_tail(&cmd->list, &active_commands[id]);
+                writel(cmd->cmdptr, DMOV_CMD_PTR(id));
+        } else {
+                if (list_empty(&active_commands[id]))
+                        PRINT_ERROR("msm_dmov_enqueue_cmd(%d), error datamover stalled, status %x\n", id, status);
+
+                PRINT_IO("msm_dmov_enqueue_cmd(%d), enqueue command, status %x\n", id, status);
+                list_add_tail(&cmd->list, &ready_commands[id]);
+        }
+        spin_unlock_irqrestore(&msm_dmov_lock, irq_flags);
+}
+
+struct msm_dmov_exec_cmdptr_cmd {
+        struct msm_dmov_cmd dmov_cmd;
+        struct completion complete;
+        unsigned id;
+        unsigned int result;
+        unsigned int flush[6];
+};
+
+static void dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, unsigned int result)
+{
+        struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd);
+        cmd->result = result;
+        if (result != 0x80000002) {
+                cmd->flush[0] = readl(DMOV_FLUSH0(cmd->id));
+                cmd->flush[1] = readl(DMOV_FLUSH1(cmd->id));
+                cmd->flush[2] = readl(DMOV_FLUSH2(cmd->id));
+                cmd->flush[3] = readl(DMOV_FLUSH3(cmd->id));
+                cmd->flush[4] = readl(DMOV_FLUSH4(cmd->id));
+                cmd->flush[5] = readl(DMOV_FLUSH5(cmd->id));
+        }
+        complete(&cmd->complete);
+}
+
+int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr)
+{
+        struct msm_dmov_exec_cmdptr_cmd cmd;
+
+        PRINT_FLOW("dmov_exec_cmdptr(%d, %x)\n", id, cmdptr);
+
+        cmd.dmov_cmd.cmdptr = cmdptr;
+        cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func;
+        cmd.id = id;
+        init_completion(&cmd.complete);
+
+        msm_dmov_enqueue_cmd(id, &cmd.dmov_cmd);
+        wait_for_completion(&cmd.complete);
+
+        if (cmd.result != 0x80000002) {
+                PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result);
+                PRINT_ERROR("dmov_exec_cmdptr(%d):  flush: %x %x %x %x\n",
+                        id, cmd.flush[0], cmd.flush[1], cmd.flush[2], cmd.flush[3]);
+                return -EIO;
+        }
+        PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr);
+        return 0;
+}
+
+
+static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
+{
+        unsigned int int_status, mask, id;
+        unsigned long irq_flags;
+        unsigned int ch_status;
+        unsigned int ch_result;
+        struct msm_dmov_cmd *cmd;
+
+        spin_lock_irqsave(&msm_dmov_lock, irq_flags);
+
+        int_status = readl(DMOV_ISR); /* read and clear interrupt */
+        PRINT_FLOW("msm_datamover_irq_handler: DMOV_ISR %x\n", int_status);
+
+        while (int_status) {
+                mask = int_status & -int_status;
+                id = fls(mask) - 1;
+                PRINT_FLOW("msm_datamover_irq_handler %08x %08x id %d\n", int_status, mask, id);
+                int_status &= ~mask;
+                ch_status = readl(DMOV_STATUS(id));
+                if (!(ch_status & DMOV_STATUS_RSLT_VALID)) {
+                        PRINT_FLOW("msm_datamover_irq_handler id %d, result not valid %x\n", id, ch_status);
+                        continue;
+                }
+                do {
+                        ch_result = readl(DMOV_RSLT(id));
+                        if (list_empty(&active_commands[id])) {
+                                PRINT_ERROR("msm_datamover_irq_handler id %d, got result "
+                                        "with no active command, status %x, result %x\n",
+                                        id, ch_status, ch_result);
+                                cmd = NULL;
+                        } else
+                                cmd = list_entry(active_commands[id].next, typeof(*cmd), list);
+                        PRINT_FLOW("msm_datamover_irq_handler id %d, status %x, result %x\n", id, ch_status, ch_result);
+                        if (ch_result & DMOV_RSLT_DONE) {
+                                PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n",
+                                        id, ch_status);
+                                PRINT_IO("msm_datamover_irq_handler id %d, got result "
+                                        "for %p, result %x\n", id, cmd, ch_result);
+                                if (cmd) {
+                                        list_del(&cmd->list);
+                                        cmd->complete_func(cmd, ch_result);
+                                }
+                        }
+                        if (ch_result & DMOV_RSLT_FLUSH) {
+                                unsigned int flush0 = readl(DMOV_FLUSH0(id));
+                                PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
+                                PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, flush0);
+                                if (cmd) {
+                                        list_del(&cmd->list);
+                                        cmd->complete_func(cmd, ch_result);
+                                }
+                        }
+                        if (ch_result & DMOV_RSLT_ERROR) {
+                                unsigned int flush0 = readl(DMOV_FLUSH0(id));
+                                PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
+                                PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, flush0);
+                                if (cmd) {
+                                        list_del(&cmd->list);
+                                        cmd->complete_func(cmd, ch_result);
+                                }
+                                /* this does not seem to work, once we get an error */
+                                /* the datamover will no longer accept commands */
+                                writel(0, DMOV_FLUSH0(id));
+                        }
+                        ch_status = readl(DMOV_STATUS(id));
+                        PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
+                        if ((ch_status & DMOV_STATUS_CMD_PTR_RDY) && !list_empty(&ready_commands[id])) {
+                                cmd = list_entry(ready_commands[id].next, typeof(*cmd), list);
+                                list_del(&cmd->list);
+                                list_add_tail(&cmd->list, &active_commands[id]);
+                                PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id);
+                                writel(cmd->cmdptr, DMOV_CMD_PTR(id));
+                        }
+                } while (ch_status & DMOV_STATUS_RSLT_VALID);
+                PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
+        }
+        spin_unlock_irqrestore(&msm_dmov_lock, irq_flags);
+        return IRQ_HANDLED;
+}
+
+static int __init msm_init_datamover(void)
+{
+        int i;
+        for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) {
+                INIT_LIST_HEAD(&ready_commands[i]);
+                INIT_LIST_HEAD(&active_commands[i]);
+                writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i));
+        }
+        return request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL);
+}
+
+arch_initcall(msm_init_datamover);
+
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S
new file mode 100644
index 000000000000..2b1cb7f16943
--- /dev/null
+++ b/arch/arm/mach-msm/idle.S
@@ -0,0 +1,36 @@
+/* linux/include/asm-arm/arch-msm/idle.S
+ *
+ * Idle processing for MSM7K - work around bugs with SWFI.
+ *
+ * Copyright (c) 2007 QUALCOMM Incorporated.
+ * Copyright (C) 2007 Google, Inc. 
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */ 
+                
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+ENTRY(arch_idle)
+#ifdef CONFIG_MSM7X00A_IDLE
+        mrc     p15, 0, r1, c1, c0, 0    /* read current CR    */
+        bic     r0, r1, #(1 << 2)        /* clear dcache bit   */
+        bic     r0, r0, #(1 << 12)       /* clear icache bit   */
+        mcr     p15, 0, r0, c1, c0, 0    /* disable d/i cache  */
+
+        mov     r0, #0                   /* prepare wfi value  */
+        mcr     p15, 0, r0, c7, c10, 0   /* flush the cache    */
+        mcr     p15, 0, r0, c7, c10, 4   /* memory barrier     */
+        mcr     p15, 0, r0, c7, c0, 4    /* wait for interrupt */
+
+        mcr     p15, 0, r1, c1, c0, 0    /* restore d/i cache  */
+#endif
+        mov     pc, lr
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
new file mode 100644
index 000000000000..c39edb994a88
--- /dev/null
+++ b/arch/arm/mach-msm/io.c
@@ -0,0 +1,85 @@
+/* arch/arm/mach-msm/io.c
+ *
+ * MSM7K io support
+ *
+ * Copyright (C) 2007 Google, Inc.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/page.h>
+#include <asm/arch/msm_iomap.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/board.h>
+
+#define MSM_DEVICE(name) { \
+                .virtual = MSM_##name##_BASE, \
+                .pfn = __phys_to_pfn(MSM_##name##_PHYS), \
+                .length = MSM_##name##_SIZE, \
+                .type = MT_DEVICE_NONSHARED, \
+         }
+
+static struct map_desc msm_io_desc[] __initdata = {
+        MSM_DEVICE(VIC),
+        MSM_DEVICE(CSR),
+        MSM_DEVICE(GPT),
+        MSM_DEVICE(DMOV),
+        MSM_DEVICE(UART1),
+        MSM_DEVICE(UART2),
+        MSM_DEVICE(UART3),
+        MSM_DEVICE(I2C),
+        MSM_DEVICE(GPIO1),
+        MSM_DEVICE(GPIO2),
+        MSM_DEVICE(HSUSB),
+        MSM_DEVICE(CLK_CTL),
+        MSM_DEVICE(PMDH),
+        MSM_DEVICE(EMDH),
+        MSM_DEVICE(MDP),
+        {
+                .virtual =  MSM_SHARED_RAM_BASE,
+                .pfn =      __phys_to_pfn(MSM_SHARED_RAM_PHYS),
+                .length =   MSM_SHARED_RAM_SIZE,
+                .type =     MT_DEVICE,
+        },
+};
+
+void __init msm_map_common_io(void)
+{
+        /* Make sure the peripheral register window is closed, since
+         * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
+         * pages are peripheral interface or not.
+         */
+        asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
+
+        iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
+}
+
+void __iomem *
+__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
+{
+        if (mtype == MT_DEVICE) {
+                /* The peripherals in the 88000000 - D0000000 range
+                 * are only accessable by type MT_DEVICE_NONSHARED.
+                 * Adjust mtype as necessary to make this "just work."
+                 */
+                if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
+                        mtype = MT_DEVICE_NONSHARED;
+        }
+
+        return __arm_ioremap(phys_addr, size, mtype);
+}
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
new file mode 100644
index 000000000000..24158040b789
--- /dev/null
+++ b/arch/arm/mach-msm/irq.c
@@ -0,0 +1,154 @@
+/* linux/arch/arm/mach-msm/irq.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/ptrace.h>
+#include <linux/timer.h>
+
+#include <linux/irq.h>
+#include <asm/hardware.h>
+
+#include <asm/io.h>
+
+#include <asm/arch/msm_iomap.h>
+
+#define VIC_REG(off) (MSM_VIC_BASE + (off))
+
+#define VIC_INT_SELECT0     VIC_REG(0x0000)  /* 1: FIQ, 0: IRQ */
+#define VIC_INT_SELECT1     VIC_REG(0x0004)  /* 1: FIQ, 0: IRQ */
+#define VIC_INT_EN0         VIC_REG(0x0010)
+#define VIC_INT_EN1         VIC_REG(0x0014)
+#define VIC_INT_ENCLEAR0    VIC_REG(0x0020)
+#define VIC_INT_ENCLEAR1    VIC_REG(0x0024)
+#define VIC_INT_ENSET0      VIC_REG(0x0030)
+#define VIC_INT_ENSET1      VIC_REG(0x0034)
+#define VIC_INT_TYPE0       VIC_REG(0x0040)  /* 1: EDGE, 0: LEVEL  */
+#define VIC_INT_TYPE1       VIC_REG(0x0044)  /* 1: EDGE, 0: LEVEL  */
+#define VIC_INT_POLARITY0   VIC_REG(0x0050)  /* 1: NEG, 0: POS */
+#define VIC_INT_POLARITY1   VIC_REG(0x0054)  /* 1: NEG, 0: POS */
+#define VIC_NO_PEND_VAL     VIC_REG(0x0060)
+#define VIC_INT_MASTEREN    VIC_REG(0x0064)  /* 1: IRQ, 2: FIQ     */
+#define VIC_PROTECTION      VIC_REG(0x006C)  /* 1: ENABLE          */
+#define VIC_CONFIG          VIC_REG(0x0068)  /* 1: USE ARM1136 VIC */
+#define VIC_IRQ_STATUS0     VIC_REG(0x0080)
+#define VIC_IRQ_STATUS1     VIC_REG(0x0084)
+#define VIC_FIQ_STATUS0     VIC_REG(0x0090)
+#define VIC_FIQ_STATUS1     VIC_REG(0x0094)
+#define VIC_RAW_STATUS0     VIC_REG(0x00A0)
+#define VIC_RAW_STATUS1     VIC_REG(0x00A4)
+#define VIC_INT_CLEAR0      VIC_REG(0x00B0)
+#define VIC_INT_CLEAR1      VIC_REG(0x00B4)
+#define VIC_SOFTINT0        VIC_REG(0x00C0)
+#define VIC_SOFTINT1        VIC_REG(0x00C4)
+#define VIC_IRQ_VEC_RD      VIC_REG(0x00D0)  /* pending int # */
+#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4)  /* pending vector addr */
+#define VIC_IRQ_VEC_WR      VIC_REG(0x00D8)
+#define VIC_IRQ_IN_SERVICE  VIC_REG(0x00E0)
+#define VIC_IRQ_IN_STACK    VIC_REG(0x00E4)
+#define VIC_TEST_BUS_SEL    VIC_REG(0x00E8)
+
+#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4))
+#define VIC_VECTADDR(n)     VIC_REG(0x0400+((n) * 4))
+
+static void msm_irq_ack(unsigned int irq)
+{
+        unsigned reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0);
+        irq = 1 << (irq & 31);
+        writel(irq, reg);
+}
+
+static void msm_irq_mask(unsigned int irq)
+{
+        unsigned reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0);
+        writel(1 << (irq & 31), reg);
+}
+
+static void msm_irq_unmask(unsigned int irq)
+{
+        unsigned reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0);
+        writel(1 << (irq & 31), reg);
+}
+
+static int msm_irq_set_wake(unsigned int irq, unsigned int on)
+{
+        return -EINVAL;
+}
+
+static int msm_irq_set_type(unsigned int irq, unsigned int flow_type)
+{
+        unsigned treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0);
+        unsigned preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0);
+        int b = 1 << (irq & 31);
+
+        if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
+                writel(readl(preg) | b, preg);
+        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH))
+                writel(readl(preg) & (~b), preg);
+
+        if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
+                writel(readl(treg) | b, treg);
+                set_irq_handler(irq, handle_edge_irq);
+        }
+        if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
+                writel(readl(treg) & (~b), treg);
+                set_irq_handler(irq, handle_level_irq);
+        }
+        return 0;
+}
+
+static struct irq_chip msm_irq_chip = {
+        .name      = "msm",
+        .ack       = msm_irq_ack,
+        .mask      = msm_irq_mask,
+        .unmask    = msm_irq_unmask,
+        .set_wake  = msm_irq_set_wake,
+        .set_type  = msm_irq_set_type,
+};
+
+void __init msm_init_irq(void)
+{
+        unsigned n;
+
+        /* select level interrupts */
+        writel(0, VIC_INT_TYPE0);
+        writel(0, VIC_INT_TYPE1);
+
+        /* select highlevel interrupts */
+        writel(0, VIC_INT_POLARITY0);
+        writel(0, VIC_INT_POLARITY1);
+
+        /* select IRQ for all INTs */
+        writel(0, VIC_INT_SELECT0);
+        writel(0, VIC_INT_SELECT1);
+
+        /* disable all INTs */
+        writel(0, VIC_INT_EN0);
+        writel(0, VIC_INT_EN1);
+
+        /* don't use 1136 vic */
+        writel(0, VIC_CONFIG);
+
+        /* enable interrupt controller */
+        writel(1, VIC_INT_MASTEREN);
+
+        for (n = 0; n < NR_MSM_IRQS; n++) {
+                set_irq_chip(n, &msm_irq_chip);
+                set_irq_handler(n, handle_level_irq);
+                set_irq_flags(n, IRQF_VALID);
+        }
+}
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
new file mode 100644
index 000000000000..bd4732d1ab3e
--- /dev/null
+++ b/arch/arm/mach-msm/timer.c
@@ -0,0 +1,205 @@
+/* linux/arch/arm/mach-msm/timer.c
+ *
+ * Copyright (C) 2007 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/time.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/delay.h>
+
+#include <asm/mach/time.h>
+#include <asm/arch/msm_iomap.h>
+
+#include <asm/io.h>
+
+#define MSM_DGT_BASE (MSM_GPT_BASE + 0x10)
+#define MSM_DGT_SHIFT (5)
+
+#define TIMER_MATCH_VAL         0x0000
+#define TIMER_COUNT_VAL         0x0004
+#define TIMER_ENABLE            0x0008
+#define TIMER_ENABLE_CLR_ON_MATCH_EN    2
+#define TIMER_ENABLE_EN                 1
+#define TIMER_CLEAR             0x000C
+
+#define CSR_PROTECTION          0x0020
+#define CSR_PROTECTION_EN               1
+
+#define GPT_HZ 32768
+#define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */
+
+struct msm_clock {
+        struct clock_event_device   clockevent;
+        struct clocksource          clocksource;
+        struct irqaction            irq;
+        uint32_t                    regbase;
+        uint32_t                    freq;
+        uint32_t                    shift;
+};
+
+static irqreturn_t msm_timer_interrupt(int irq, void *dev_id)
+{
+        struct clock_event_device *evt = dev_id;
+        evt->event_handler(evt);
+        return IRQ_HANDLED;
+}
+
+static cycle_t msm_gpt_read(void)
+{
+        return readl(MSM_GPT_BASE + TIMER_COUNT_VAL);
+}
+
+static cycle_t msm_dgt_read(void)
+{
+        return readl(MSM_DGT_BASE + TIMER_COUNT_VAL) >> MSM_DGT_SHIFT;
+}
+
+static int msm_timer_set_next_event(unsigned long cycles,
+                                    struct clock_event_device *evt)
+{
+        struct msm_clock *clock = container_of(evt, struct msm_clock, clockevent);
+        uint32_t now = readl(clock->regbase + TIMER_COUNT_VAL);
+        uint32_t alarm = now + (cycles << clock->shift);
+        int late;
+
+        writel(alarm, clock->regbase + TIMER_MATCH_VAL);
+        now = readl(clock->regbase + TIMER_COUNT_VAL);
+        late = now - alarm;
+        if (late >= (-2 << clock->shift) && late < DGT_HZ*5) {
+                printk(KERN_NOTICE "msm_timer_set_next_event(%lu) clock %s, "
+                       "alarm already expired, now %x, alarm %x, late %d\n",
+                       cycles, clock->clockevent.name, now, alarm, late);
+                return -ETIME;
+        }
+        return 0;
+}
+
+static void msm_timer_set_mode(enum clock_event_mode mode,
+                              struct clock_event_device *evt)
+{
+        struct msm_clock *clock = container_of(evt, struct msm_clock, clockevent);
+        switch (mode) {
+        case CLOCK_EVT_MODE_RESUME:
+        case CLOCK_EVT_MODE_PERIODIC:
+                break;
+        case CLOCK_EVT_MODE_ONESHOT:
+                writel(TIMER_ENABLE_EN, clock->regbase + TIMER_ENABLE);
+                break;
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_SHUTDOWN:
+                writel(0, clock->regbase + TIMER_ENABLE);
+                break;
+        }
+}
+
+static struct msm_clock msm_clocks[] = {
+        {
+                .clockevent = {
+                        .name           = "gp_timer",
+                        .features       = CLOCK_EVT_FEAT_ONESHOT,
+                        .shift          = 32,
+                        .rating         = 200,
+                        .set_next_event = msm_timer_set_next_event,
+                        .set_mode       = msm_timer_set_mode,
+                },
+                .clocksource = {
+                        .name           = "gp_timer",
+                        .rating         = 200,
+                        .read           = msm_gpt_read,
+                        .mask           = CLOCKSOURCE_MASK(32),
+                        .shift          = 24,
+                        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+                },
+                .irq = {
+                        .name    = "gp_timer",
+                        .flags   = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING,
+                        .handler = msm_timer_interrupt,
+                        .dev_id  = &msm_clocks[0].clockevent,
+                        .irq     = INT_GP_TIMER_EXP
+                },
+                .regbase = MSM_GPT_BASE,
+                .freq = GPT_HZ
+        },
+        {
+                .clockevent = {
+                        .name           = "dg_timer",
+                        .features       = CLOCK_EVT_FEAT_ONESHOT,
+                        .shift          = 32 + MSM_DGT_SHIFT,
+                        .rating         = 300,
+                        .set_next_event = msm_timer_set_next_event,
+                        .set_mode       = msm_timer_set_mode,
+                },
+                .clocksource = {
+                        .name           = "dg_timer",
+                        .rating         = 300,
+                        .read           = msm_dgt_read,
+                        .mask           = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)),
+                        .shift          = 24 - MSM_DGT_SHIFT,
+                        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+                },
+                .irq = {
+                        .name    = "dg_timer",
+                        .flags   = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING,
+                        .handler = msm_timer_interrupt,
+                        .dev_id  = &msm_clocks[1].clockevent,
+                        .irq     = INT_DEBUG_TIMER_EXP
+                },
+                .regbase = MSM_DGT_BASE,
+                .freq = DGT_HZ >> MSM_DGT_SHIFT,
+                .shift = MSM_DGT_SHIFT
+        }
+};
+
+static void __init msm_timer_init(void)
+{
+        int i;
+        int res;
+
+        for (i = 0; i < ARRAY_SIZE(msm_clocks); i++) {
+                struct msm_clock *clock = &msm_clocks[i];
+                struct clock_event_device *ce = &clock->clockevent;
+                struct clocksource *cs = &clock->clocksource;
+                writel(0, clock->regbase + TIMER_ENABLE);
+                writel(0, clock->regbase + TIMER_CLEAR);
+                writel(~0, clock->regbase + TIMER_MATCH_VAL);
+
+                ce->mult = div_sc(clock->freq, NSEC_PER_SEC, ce->shift);
+                /* allow at least 10 seconds to notice that the timer wrapped */
+                ce->max_delta_ns =
+                        clockevent_delta2ns(0xf0000000 >> clock->shift, ce);
+                /* 4 gets rounded down to 3 */
+                ce->min_delta_ns = clockevent_delta2ns(4, ce);
+                ce->cpumask = cpumask_of_cpu(0);
+
+                cs->mult = clocksource_hz2mult(clock->freq, cs->shift);
+                res = clocksource_register(cs);
+                if (res)
+                        printk(KERN_ERR "msm_timer_init: clocksource_register "
+                               "failed for %s\n", cs->name);
+
+                res = setup_irq(clock->irq.irq, &clock->irq);
+                if (res)
+                        printk(KERN_ERR "msm_timer_init: setup_irq "
+                               "failed for %s\n", cs->name);
+
+                clockevents_register_device(ce);
+        }
+}
+
+struct sys_timer msm_timer = {
+        .init = msm_timer_init
+};
diff --git a/arch/arm/mach-mx3/time.c b/arch/arm/mach-mx3/time.c
index e81fb5c5d7c3..fb565c98dbfb 100644
--- a/arch/arm/mach-mx3/time.c
+++ b/arch/arm/mach-mx3/time.c
@@ -45,8 +45,6 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
 {
         unsigned int next_match;
 
-        write_seqlock(&xtime_lock);
-
         if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) {
                 do {
                         timer_tick();
@@ -57,8 +55,6 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
                                        __raw_readl(MXC_GPT_GPTCNT)) <= 0);
         }
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index 4762e207b0bf..ea07b54afa59 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -33,12 +33,8 @@
 static irqreturn_t
 netx_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         timer_tick();
 
-        write_sequnlock(&xtime_lock);
-
         /* acknowledge interrupt */
         writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
 
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 130681201c19..9393824cc150 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -27,6 +27,7 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/input.h>
+#include <linux/i2c/tps65010.h>
 
 #include <asm/hardware.h>
 #include <asm/gpio.h>
@@ -36,7 +37,6 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include <asm/arch/tps65010.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/tc.h>
 #include <asm/arch/irda.h>
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 4f84ae273a1f..978cdab16535 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -26,6 +26,7 @@
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/input.h>
+#include <linux/i2c/tps65010.h>
 
 #include <asm/setup.h>
 #include <asm/page.h>
@@ -37,7 +38,6 @@
 #include <asm/mach/flash.h>
 #include <asm/mach/map.h>
 
-#include <asm/arch/tps65010.h>
 #include <asm/arch/gpioexpander.h>
 #include <asm/arch/irqs.h>
 #include <asm/arch/mux.h>
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 182a98a9df4c..e2c8ffd75cff 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -32,7 +32,6 @@
 #include <asm/arch/common.h>
 #include <asm/arch/dsp_common.h>
 #include <asm/arch/aic23.h>
-#include <asm/arch/gpio.h>
 #include <asm/arch/omapfb.h>
 #include <asm/arch/lcd_mipid.h>
 
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 5db182da322b..4e016179f312 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -31,12 +31,13 @@
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
-#include <linux/interrupt.h>
 #include <linux/i2c.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 
+#include <linux/i2c/tps65010.h>
+
 #include <asm/hardware.h>
 #include <asm/gpio.h>
 
@@ -46,7 +47,6 @@
 #include <asm/mach/flash.h>
 
 #include <asm/arch/usb.h>
-#include <asm/arch/tps65010.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/tc.h>
 #include <asm/arch/common.h>
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index e47010fec275..ed7094a70064 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -42,7 +42,6 @@
 #include <asm/arch/common.h>
 #include <asm/arch/omap-alsa.h>
 
-#include <linux/input.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
 
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index c275d517764a..a9a0f6610c3d 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -44,7 +44,6 @@
 #include <asm/arch/common.h>
 #include <asm/arch/omap-alsa.h>
 
-#include <linux/input.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
 
diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c
index 86de303ecab2..6939d5e7569a 100644
--- a/arch/arm/mach-omap1/leds-osk.c
+++ b/arch/arm/mach-omap1/leds-osk.c
@@ -5,13 +5,13 @@
  */
 #include <linux/init.h>
 #include <linux/workqueue.h>
+#include <linux/i2c/tps65010.h>
 
 #include <asm/hardware.h>
 #include <asm/leds.h>
 #include <asm/system.h>
 
 #include <asm/arch/gpio.h>
-#include <asm/arch/tps65010.h>
 
 #include "leds.h"
 
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index d9805e3d9304..06b7e54a0128 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -639,7 +639,7 @@ static void omap_pm_finish(void)
 }
 
 
-static irqreturn_t  omap_wakeup_interrupt(int irq, void *dev)
+static irqreturn_t omap_wakeup_interrupt(int irq, void *dev)
 {
         return IRQ_HANDLED;
 }
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 3bb49c17c858..94e38cc2bb6c 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -26,7 +26,6 @@
 #include <linux/interrupt.h>
 #include <linux/delay.h>
 #include <linux/leds.h>
-#include <linux/irq.h>
 
 #include <asm/hardware.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 8d322c20ccae..3234deedb946 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -40,13 +40,9 @@ static inline void omap2_gp_timer_start(unsigned long load_val)
 
 static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW);
         timer_tick();
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c
index 67e05f005a6b..6d4ca8fc0cb4 100644
--- a/arch/arm/mach-pnx4008/time.c
+++ b/arch/arm/mach-pnx4008/time.c
@@ -51,8 +51,6 @@ static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id)
 {
         if (__raw_readl(HSTIM_INT) & MATCH0_INT) {
 
-                write_seqlock(&xtime_lock);
-
                 do {
                         timer_tick();
 
@@ -73,8 +71,6 @@ static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id)
                 } while ((signed)
                          (__raw_readl(HSTIM_MATCH0) -
                           __raw_readl(HSTIM_COUNTER)) < 0);
-
-                write_sequnlock(&xtime_lock);
         }
 
         return IRQ_HANDLED;
diff --git a/arch/arm/mach-pxa/akita-ioexp.c b/arch/arm/mach-pxa/akita-ioexp.c
index 12d2fe0ceff6..254892ac30cd 100644
--- a/arch/arm/mach-pxa/akita-ioexp.c
+++ b/arch/arm/mach-pxa/akita-ioexp.c
@@ -29,7 +29,7 @@
 #define MAX7310_TIMEOUT  0x04
 
 /* Addresses to scan */
-static unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END };
+static const unsigned short normal_i2c[] = { 0x18, I2C_CLIENT_END };
 
 /* I2C Magic */
 I2C_CLIENT_INSMOD;
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 9732d5d9466b..006a6e09589c 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -111,11 +111,14 @@ static const struct clkops clk_pxa25x_lcd_ops = {
  * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
  * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
  */
+static struct clk pxa25x_hwuart_clk =
+        INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
+;
+
 static struct clk pxa25x_clks[] = {
         INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
         INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
         INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
-        INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
         INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
         INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev),
         INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
@@ -303,6 +306,10 @@ static int __init pxa25x_init(void)
 {
         int ret = 0;
 
+        /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
+        if (cpu_is_pxa25x())
+                clks_register(&pxa25x_hwuart_clk, 1);
+
         if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
                 clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
 
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 8e126e6b74c3..57efebdc4324 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -24,6 +24,7 @@
 #include <asm/arch/ohci.h>
 #include <asm/arch/pm.h>
 #include <asm/arch/dma.h>
+#include <asm/arch/i2c.h>
 
 #include "generic.h"
 #include "devices.h"
@@ -423,6 +424,11 @@ struct platform_device pxa27x_device_i2c_power = {
         .num_resources  = ARRAY_SIZE(i2c_power_resources),
 };
 
+void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info)
+{
+        pxa27x_device_i2c_power.dev.platform_data = info;
+}
+
 static struct platform_device *devices[] __initdata = {
         &pxa_device_mci,
         &pxa_device_udc,
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 61d9c9d69e6b..37e93f9ba8fc 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -86,7 +86,7 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info)
                         HSS / 1000000, (HSS % 1000000) / 10000);
         }
 
-        return CLK;
+        return CLK / 1000;
 }
 
 /*
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c
index 422afee88169..b2eb38543d1c 100644
--- a/arch/arm/mach-pxa/ssp.c
+++ b/arch/arm/mach-pxa/ssp.c
@@ -67,7 +67,7 @@ static int use_count[PXA_SSP_PORTS] = {0, 0, 0};
 
 static irqreturn_t ssp_interrupt(int irq, void *dev_id)
 {
-        struct ssp_dev *dev = (struct ssp_dev*) dev_id;
+        struct ssp_dev *dev = dev_id;
         unsigned int status = SSSR_P(dev->port);
 
         SSSR_P(dev->port) = status; /* clear status bits */
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index c7f1b44da40d..61d70218f1e8 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -530,8 +530,6 @@ static unsigned long realview_gettimeoffset(void)
  */
 static irqreturn_t realview_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
-
         // ...clear the interrupt
         writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
 
@@ -542,8 +540,6 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id)
         update_process_times(user_mode(get_irq_regs()));
 #endif
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index 587864fe25fb..66175471fff3 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -530,7 +530,7 @@ static struct s3c2410fb_mach_info __initdata bast_fb_info = {
 
         .displays = bast_lcd_info,
         .num_displays = ARRAY_SIZE(bast_lcd_info),
-        .default_display = 4,
+        .default_display = 1,
 };
 
 /* Standard BAST devices */
@@ -540,7 +540,6 @@ static struct platform_device *bast_devices[] __initdata = {
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c,
-        &s3c_device_iis,
         &s3c_device_rtc,
         &s3c_device_nand,
         &bast_device_nor,
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 9f43f3f124f5..3aade7b78fe5 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -365,7 +365,6 @@ static struct platform_device *vr1000_devices[] __initdata = {
         &s3c_device_lcd,
         &s3c_device_wdt,
         &s3c_device_i2c,
-        &s3c_device_iis,
         &s3c_device_adc,
         &serial_device,
         &vr1000_nor,
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index bcd562ac1d3d..6aec86a5da56 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -60,7 +60,7 @@ usb_simtec_powercontrol(int port, int to)
 static irqreturn_t
 usb_simtec_ocirq(int irq, void *pw)
 {
-        struct s3c2410_hcd_info *info = (struct s3c2410_hcd_info *)pw;
+        struct s3c2410_hcd_info *info = pw;
 
         if (s3c2410_gpio_getpin(S3C2410_GPG10) == 0) {
                 pr_debug("usb_simtec: over-current irq (oc detected)\n");
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index 8e8fe48ea47f..0b43431d4b75 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -10,6 +10,7 @@ config CPU_S3C2412
         select CPU_LLSERIAL_S3C2440
         select S3C2412_PM if PM
         select S3C2412_DMA if S3C2410_DMA
+        select S3C2410_GPIO
         help
           Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile
index f8e011691b31..267f3348301e 100644
--- a/arch/arm/mach-s3c2412/Makefile
+++ b/arch/arm/mach-s3c2412/Makefile
@@ -12,8 +12,9 @@ obj-				:=
 obj-$(CONFIG_CPU_S3C2412)       += s3c2412.o
 obj-$(CONFIG_CPU_S3C2412)       += irq.o
 obj-$(CONFIG_CPU_S3C2412)       += clock.o
+obj-$(CONFIG_CPU_S3C2412)       += gpio.o
 obj-$(CONFIG_S3C2412_DMA)       += dma.o
-obj-$(CONFIG_S3C2412_PM)        += pm.o
+obj-$(CONFIG_S3C2412_PM)        += pm.o sleep.o
 
 # Machine support
 
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 458993601897..2697a65ba727 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -217,7 +217,7 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent)
 
         if (parent == &clk_mdivclk)
                 clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL;
-        else if (parent == &clk_upll)
+        else if (parent == &clk_mpll)
                 clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL;
         else
                 return -EINVAL;
@@ -234,6 +234,45 @@ static struct clk clk_msysclk = {
         .set_parent     = s3c2412_setparent_msysclk,
 };
 
+static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent)
+{
+        unsigned long flags;
+        unsigned long clkdiv;
+        unsigned long dvs;
+
+        /* Note, we current equate fclk andf msysclk for S3C2412 */
+
+        if (parent == &clk_msysclk || parent == &clk_f)
+                dvs = 0;
+        else if (parent == &clk_h)
+                dvs = S3C2412_CLKDIVN_DVSEN;
+        else
+                return -EINVAL;
+
+        clk->parent = parent;
+
+        /* update this under irq lockdown, clkdivn is not protected
+         * by the clock system. */
+
+        local_irq_save(flags);
+
+        clkdiv  = __raw_readl(S3C2410_CLKDIVN);
+        clkdiv &= ~S3C2412_CLKDIVN_DVSEN;
+        clkdiv |= dvs;
+        __raw_writel(clkdiv, S3C2410_CLKDIVN);
+
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+static struct clk clk_armclk = {
+        .name           = "armclk",
+        .id             = -1,
+        .parent         = &clk_msysclk,
+        .set_parent     = s3c2412_setparent_armclk,
+};
+
 /* these next clocks have an divider immediately after them,
  * so we can register them with their divider and leave out the
  * intermediate clock stage
@@ -630,11 +669,13 @@ static struct clk *clks[] __initdata = {
         &clk_erefclk,
         &clk_urefclk,
         &clk_mrefclk,
+        &clk_armclk,
 };
 
 int __init s3c2412_baseclk_add(void)
 {
         unsigned long clkcon  = __raw_readl(S3C2410_CLKCON);
+        unsigned int dvs;
         struct clk *clkp;
         int ret;
         int ptr;
@@ -643,6 +684,8 @@ int __init s3c2412_baseclk_add(void)
         clk_usb_bus.parent = &clk_usbsrc;
         clk_usb_bus.rate = 0x0;
 
+        clk_f.parent = &clk_msysclk;
+
         s3c2412_clk_initparents();
 
         for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
@@ -655,6 +698,15 @@ int __init s3c2412_baseclk_add(void)
                 }
         }
 
+        /* set the dvs state according to what we got at boot time */
+
+        dvs = __raw_readl(S3C2410_CLKDIVN) & S3C2412_CLKDIVN_DVSEN;
+
+        if (dvs)
+                clk_armclk.parent = &clk_h;
+
+        printk(KERN_INFO "S3C2412: DVS is %s\n", dvs ? "on" : "off");
+
         /* ensure usb bus clock is within correct rate of 48MHz */
 
         if (clk_get_rate(&clk_usb_bus) != (48 * 1000 * 1000)) {
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 53c1d5bbce19..1dd864993566 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -30,6 +30,7 @@
 #include <asm/arch/regs-mem.h>
 #include <asm/arch/regs-lcd.h>
 #include <asm/arch/regs-sdi.h>
+#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
 #include <asm/plat-s3c24xx/regs-iis.h>
 #include <asm/plat-s3c24xx/regs-spi.h>
 
@@ -39,106 +40,141 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
         [DMACH_XD0] = {
                 .name           = "xdreq0",
                 .channels       = MAP(S3C2412_DMAREQSEL_XDREQ0),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_XDREQ0),
         },
         [DMACH_XD1] = {
                 .name           = "xdreq1",
                 .channels       = MAP(S3C2412_DMAREQSEL_XDREQ1),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_XDREQ1),
         },
         [DMACH_SDI] = {
                 .name           = "sdi",
                 .channels       = MAP(S3C2412_DMAREQSEL_SDI),
-                .hw_addr.to     = S3C2410_PA_IIS + S3C2410_IISFIFO,
-                .hw_addr.from   = S3C2410_PA_IIS + S3C2410_IISFIFO,
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_SDI),
+                .hw_addr.to     = S3C2410_PA_SDI + S3C2410_SDIDATA,
+                .hw_addr.from   = S3C2410_PA_SDI + S3C2410_SDIDATA,
         },
         [DMACH_SPI0] = {
                 .name           = "spi0",
                 .channels       = MAP(S3C2412_DMAREQSEL_SPI0TX),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_SPI0RX),
                 .hw_addr.to     = S3C2410_PA_SPI + S3C2410_SPTDAT,
                 .hw_addr.from   = S3C2410_PA_SPI + S3C2410_SPRDAT,
         },
         [DMACH_SPI1] = {
                 .name           = "spi1",
                 .channels       = MAP(S3C2412_DMAREQSEL_SPI1TX),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_SPI1RX),
                 .hw_addr.to     = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
                 .hw_addr.from   = S3C2410_PA_SPI + S3C2412_SPI1  + S3C2410_SPRDAT,
         },
         [DMACH_UART0] = {
                 .name           = "uart0",
                 .channels       = MAP(S3C2412_DMAREQSEL_UART0_0),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_UART0_0),
                 .hw_addr.to     = S3C2410_PA_UART0 + S3C2410_UTXH,
                 .hw_addr.from   = S3C2410_PA_UART0 + S3C2410_URXH,
         },
         [DMACH_UART1] = {
                 .name           = "uart1",
                 .channels       = MAP(S3C2412_DMAREQSEL_UART1_0),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_UART1_0),
                 .hw_addr.to     = S3C2410_PA_UART1 + S3C2410_UTXH,
                 .hw_addr.from   = S3C2410_PA_UART1 + S3C2410_URXH,
         },
         [DMACH_UART2] = {
                 .name           = "uart2",
                 .channels       = MAP(S3C2412_DMAREQSEL_UART2_0),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_UART2_0),
                 .hw_addr.to     = S3C2410_PA_UART2 + S3C2410_UTXH,
                 .hw_addr.from   = S3C2410_PA_UART2 + S3C2410_URXH,
         },
         [DMACH_UART0_SRC2] = {
                 .name           = "uart0",
                 .channels       = MAP(S3C2412_DMAREQSEL_UART0_1),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_UART0_1),
                 .hw_addr.to     = S3C2410_PA_UART0 + S3C2410_UTXH,
                 .hw_addr.from   = S3C2410_PA_UART0 + S3C2410_URXH,
         },
         [DMACH_UART1_SRC2] = {
                 .name           = "uart1",
                 .channels       = MAP(S3C2412_DMAREQSEL_UART1_1),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_UART1_1),
                 .hw_addr.to     = S3C2410_PA_UART1 + S3C2410_UTXH,
                 .hw_addr.from   = S3C2410_PA_UART1 + S3C2410_URXH,
         },
         [DMACH_UART2_SRC2] = {
                 .name           = "uart2",
                 .channels       = MAP(S3C2412_DMAREQSEL_UART2_1),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_UART2_1),
                 .hw_addr.to     = S3C2410_PA_UART2 + S3C2410_UTXH,
                 .hw_addr.from   = S3C2410_PA_UART2 + S3C2410_URXH,
         },
         [DMACH_TIMER] = {
                 .name           = "timer",
                 .channels       = MAP(S3C2412_DMAREQSEL_TIMER),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_TIMER),
         },
         [DMACH_I2S_IN] = {
                 .name           = "i2s-sdi",
                 .channels       = MAP(S3C2412_DMAREQSEL_I2SRX),
-                .hw_addr.from   = S3C2410_PA_IIS + S3C2410_IISFIFO,
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_I2SRX),
+                .hw_addr.from   = S3C2410_PA_IIS + S3C2412_IISRXD,
         },
         [DMACH_I2S_OUT] = {
                 .name           = "i2s-sdo",
                 .channels       = MAP(S3C2412_DMAREQSEL_I2STX),
-                .hw_addr.to     = S3C2410_PA_IIS + S3C2410_IISFIFO,
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_I2STX),
+                .hw_addr.to     = S3C2410_PA_IIS + S3C2412_IISTXD,
         },
         [DMACH_USB_EP1] = {
                 .name           = "usb-ep1",
                 .channels       = MAP(S3C2412_DMAREQSEL_USBEP1),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_USBEP1),
         },
         [DMACH_USB_EP2] = {
                 .name           = "usb-ep2",
                 .channels       = MAP(S3C2412_DMAREQSEL_USBEP2),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_USBEP2),
         },
         [DMACH_USB_EP3] = {
                 .name           = "usb-ep3",
                 .channels       = MAP(S3C2412_DMAREQSEL_USBEP3),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_USBEP3),
         },
         [DMACH_USB_EP4] = {
                 .name           = "usb-ep4",
                 .channels       = MAP(S3C2412_DMAREQSEL_USBEP4),
+                .channels_rx    = MAP(S3C2412_DMAREQSEL_USBEP4),
         },
 };
 
+static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
+                                  struct s3c24xx_dma_map *map,
+                                  enum s3c2410_dmasrc dir)
+{
+        unsigned long chsel;
+
+        if (dir == S3C2410_DMASRC_HW)
+                chsel = map->channels_rx[0];
+        else
+                chsel = map->channels[0];
+
+        chsel &= ~DMA_CH_VALID;
+        chsel |= S3C2412_DMAREQSEL_HW;
+
+        writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
+}
+
 static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
                                struct s3c24xx_dma_map *map)
 {
-        writel(map->channels[0] | S3C2412_DMAREQSEL_HW,
-               chan->regs + S3C2412_DMA_DMAREQSEL);
+        s3c2412_dma_direction(chan, map, chan->source);
 }
 
 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
         .select         = s3c2412_dma_select,
+        .direction      = s3c2412_dma_direction,
         .dcon_mask      = 0,
         .map            = s3c2412_dma_mappings,
         .map_size       = ARRAY_SIZE(s3c2412_dma_mappings),
diff --git a/arch/arm/mach-s3c2412/gpio.c b/arch/arm/mach-s3c2412/gpio.c
new file mode 100644
index 000000000000..8e55c3a2eab8
--- /dev/null
+++ b/arch/arm/mach-s3c2412/gpio.c
@@ -0,0 +1,60 @@
+/* linux/arch/arm/mach-s3c2412/gpio.c
+ *
+ * Copyright (c) 2007 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * http://armlinux.simtec.co.uk/.
+ *
+ * S3C2412/S3C2413 specific GPIO support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/regs-gpio.h>
+
+#include <asm/hardware.h>
+
+int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state)
+{
+        void __iomem *base = S3C24XX_GPIO_BASE(pin);
+        unsigned long offs = S3C2410_GPIO_OFFSET(pin);
+        unsigned long flags;
+        unsigned long slpcon;
+
+        offs *= 2;
+
+        if (pin < S3C2410_GPIO_BANKB)
+                return -EINVAL;
+
+        if (pin >= S3C2410_GPIO_BANKF &&
+            pin <= S3C2410_GPIO_BANKG)
+                return -EINVAL;
+
+        if (pin > (S3C2410_GPIO_BANKH + 32))
+                return -EINVAL;
+
+        local_irq_save(flags);
+
+        slpcon = __raw_readl(base + 0x0C);
+
+        slpcon &= ~(3 << offs);
+        slpcon |= state << offs;
+
+        __raw_writel(slpcon, base + 0x0C);
+
+        local_irq_restore(flags);
+
+        return 0;
+}
+
+EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg);
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c
index e9d0c769f5da..cc1917bf952a 100644
--- a/arch/arm/mach-s3c2412/irq.c
+++ b/arch/arm/mach-s3c2412/irq.c
@@ -33,6 +33,7 @@
 
 #include <asm/arch/regs-irq.h>
 #include <asm/arch/regs-gpio.h>
+#include <asm/arch/regs-power.h>
 
 #include <asm/plat-s3c24xx/cpu.h>
 #include <asm/plat-s3c24xx/irq.h>
@@ -153,6 +154,22 @@ static struct irq_chip s3c2412_irq_cfsdi = {
         .unmask         = s3c2412_irq_cfsdi_unmask,
 };
 
+static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
+{
+        unsigned long pwrcfg;
+
+        pwrcfg = __raw_readl(S3C2412_PWRCFG);
+        if (state)
+                pwrcfg &= ~S3C2412_PWRCFG_RTC_MASKIRQ;
+        else
+                pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ;
+        __raw_writel(pwrcfg, S3C2412_PWRCFG);
+
+        return s3c_irq_chip.set_wake(irqno, state);
+}
+
+static struct irq_chip s3c2412_irq_rtc_chip;
+
 static int s3c2412_irq_add(struct sys_device *sysdev)
 {
         unsigned int irqno;
@@ -173,6 +190,13 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
                 set_irq_flags(irqno, IRQF_VALID);
         }
 
+        /* change RTC IRQ's set wake method */
+
+        s3c2412_irq_rtc_chip = s3c_irq_chip;
+        s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake;
+
+        set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);
+
         return 0;
 }
 
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c
index 8988dac388a9..d4ffb2d98076 100644
--- a/arch/arm/mach-s3c2412/pm.c
+++ b/arch/arm/mach-s3c2412/pm.c
@@ -33,6 +33,8 @@
 
 #include <asm/plat-s3c24xx/s3c2412.h>
 
+extern void s3c2412_sleep_enter(void);
+
 static void s3c2412_cpu_suspend(void)
 {
         unsigned long tmp;
@@ -43,20 +45,7 @@ static void s3c2412_cpu_suspend(void)
         tmp |= S3C2412_PWRCFG_STANDBYWFI_SLEEP;
         __raw_writel(tmp, S3C2412_PWRCFG);
 
-        /* issue the standby signal into the pm unit. Note, we
-         * issue a write-buffer drain just in case */
-
-        tmp = 0;
-
-        asm("b 1f\n\t"
-            ".align 5\n\t"
-            "1:\n\t"
-            "mcr p15, 0, %0, c7, c10, 4\n\t"
-            "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp));
-
-        /* we should never get past here */
-
-        panic("sleep resumed to originator?");
+        s3c2412_sleep_enter();
 }
 
 static void s3c2412_pm_prepare(void)
@@ -88,7 +77,6 @@ static struct sleep_save s3c2412_sleep[] = {
         SAVE_ITEM(S3C2412_GPBSLPCON),
         SAVE_ITEM(S3C2412_GPCSLPCON),
         SAVE_ITEM(S3C2412_GPDSLPCON),
-        SAVE_ITEM(S3C2412_GPESLPCON),
         SAVE_ITEM(S3C2412_GPFSLPCON),
         SAVE_ITEM(S3C2412_GPGSLPCON),
         SAVE_ITEM(S3C2412_GPHSLPCON),
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index 265cd3f567a3..abf1599c9f97 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -168,6 +168,8 @@ void __init s3c2412_init_clocks(int xtal)
 
         fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
 
+        clk_mpll.rate = fclk;
+
         tmp = __raw_readl(S3C2410_CLKDIVN);
 
         /* work out clock scalings */
diff --git a/arch/arm/mach-s3c2412/sleep.S b/arch/arm/mach-s3c2412/sleep.S
new file mode 100644
index 000000000000..db32cac4199a
--- /dev/null
+++ b/arch/arm/mach-s3c2412/sleep.S
@@ -0,0 +1,68 @@
+/* linux/arch/arm/mach-s3c2412/sleep.S
+ *
+ * Copyright (c) 2007 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2412 Power Manager low-level sleep support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/hardware.h>
+#include <asm/arch/map.h>
+
+#include <asm/arch/regs-irq.h>
+
+        .text
+
+        .global s3c2412_sleep_enter
+
+s3c2412_sleep_enter:
+        mov     r0, #0                  /* argument for coprocessors */
+        ldr     r1, =S3C2410_INTPND
+        ldr     r2, =S3C2410_SRCPND
+        ldr     r3, =S3C2410_EINTPEND
+
+        teq     r0, r0
+        bl      s3c2412_sleep_enter1
+        teq     pc, r0
+        bl      s3c2412_sleep_enter1
+
+        .align  5
+
+        /* this is called twice, first with the Z flag to ensure that the
+         * instructions have been loaded into the cache, and the second
+         * time to try and suspend the system.
+        */
+s3c2412_sleep_enter1:
+        mcr     p15, 0, r0, c7, c10, 4
+        mcrne   p15, 0, r0, c7, c0, 4
+
+        /* if we return from here, it is because an interrupt was
+         * active when we tried to shutdown. Try and ack the IRQ and
+         * retry, as simply returning causes the system to lock.
+        */
+
+        ldrne   r9, [ r1 ]
+        strne   r9, [ r1 ]
+        ldrne   r9, [ r2 ]
+        strne   r9, [ r2 ]
+        ldrne   r9, [ r3 ]
+        strne   r9, [ r3 ]
+        bne     s3c2412_sleep_enter1
+
+        mov     pc, r14
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index 79e2ea4adaf3..184d804934c9 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -111,14 +111,9 @@ static struct clk s3c2440_clk_ac97 = {
 
 static int s3c2440_clk_add(struct sys_device *sysdev)
 {
-        unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
-        unsigned long clkdivn;
+        struct clk *clock_upll;
         struct clk *clock_h;
         struct clk *clock_p;
-        struct clk *clock_upll;
-
-        printk("S3C2440: Clock Support, DVS %s\n",
-               (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
 
         clock_p = clk_get(NULL, "pclk");
         clock_h = clk_get(NULL, "hclk");
@@ -129,21 +124,6 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
                 return -EINVAL;
         }
 
-        /* check rate of UPLL, and if it is near 96MHz, then change
-         * to using half the UPLL rate for the system */
-
-        if (clk_get_rate(clock_upll) > (94 * MHZ)) {
-                clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
-
-                mutex_lock(&clocks_mutex);
-
-                clkdivn = __raw_readl(S3C2410_CLKDIVN);
-                clkdivn |= S3C2440_CLKDIVN_UCLK;
-                __raw_writel(clkdivn, S3C2410_CLKDIVN);
-
-                mutex_unlock(&clocks_mutex);
-        }
-
         s3c2440_clk_cam.parent = clock_h;
         s3c2440_clk_ac97.parent = clock_p;
         s3c2440_clk_cam_upll.parent = clock_upll;
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c
index 5b9e830ac4d3..2d030d439fe9 100644
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2442/clock.c
@@ -115,14 +115,9 @@ static struct clk s3c2442_clk_cam_upll = {
 
 static int s3c2442_clk_add(struct sys_device *sysdev)
 {
-        unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
-        unsigned long clkdivn;
+        struct clk *clock_upll;
         struct clk *clock_h;
         struct clk *clock_p;
-        struct clk *clock_upll;
-
-        printk("S3C2442: Clock Support, DVS %s\n",
-               (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
 
         clock_p = clk_get(NULL, "pclk");
         clock_h = clk_get(NULL, "hclk");
@@ -133,21 +128,6 @@ static int s3c2442_clk_add(struct sys_device *sysdev)
                 return -EINVAL;
         }
 
-        /* check rate of UPLL, and if it is near 96MHz, then change
-         * to using half the UPLL rate for the system */
-
-        if (clk_get_rate(clock_upll) > (94 * MHZ)) {
-                clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
-
-                mutex_lock(&clocks_mutex);
-
-                clkdivn = __raw_readl(S3C2410_CLKDIVN);
-                clkdivn |= S3C2440_CLKDIVN_UCLK;
-                __raw_writel(clkdivn, S3C2410_CLKDIVN);
-
-                mutex_unlock(&clocks_mutex);
-        }
-
         s3c2442_clk_cam.parent = clock_h;
         s3c2442_clk_cam_upll.parent = clock_upll;
 
diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c
index 59703c6fb29b..06206ceb312e 100644
--- a/arch/arm/mach-sa1100/ssp.c
+++ b/arch/arm/mach-sa1100/ssp.c
@@ -29,9 +29,8 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id)
 {
         unsigned int status = Ser4SSSR;
 
-        if (status & SSSR_ROR) {
+        if (status & SSSR_ROR)
                 printk(KERN_WARNING "SSP: receiver overrun\n");
-        }
 
         Ser4SSSR = SSSR_ROR;
 
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index fdf7b016e7ad..c2677368d6af 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -14,6 +14,7 @@
 #include <linux/irq.h>
 #include <linux/timex.h>
 #include <linux/signal.h>
+#include <linux/clocksource.h>
 
 #include <asm/mach/time.h>
 #include <asm/hardware.h>
@@ -35,23 +36,6 @@ static int sa1100_set_rtc(void)
         return 0;
 }
 
-/* IRQs are disabled before entering here from do_gettimeofday() */
-static unsigned long sa1100_gettimeoffset (void)
-{
-        unsigned long ticks_to_match, elapsed, usec;
-
-        /* Get ticks before next timer match */
-        ticks_to_match = OSMR0 - OSCR;
-
-        /* We need elapsed ticks since last match */
-        elapsed = LATCH - ticks_to_match;
-
-        /* Now convert them to usec */
-        usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
-
-        return usec;
-}
-
 #ifdef CONFIG_NO_IDLE_HZ
 static unsigned long initial_match;
 static int match_posponed;
@@ -62,8 +46,6 @@ sa1100_timer_interrupt(int irq, void *dev_id)
 {
         unsigned int next_match;
 
-        write_seqlock(&xtime_lock);
-
 #ifdef CONFIG_NO_IDLE_HZ
         if (match_posponed) {
                 match_posponed = 0;
@@ -85,8 +67,6 @@ sa1100_timer_interrupt(int irq, void *dev_id)
                 next_match = (OSMR0 += LATCH);
         } while ((signed long)(next_match - OSCR) <= 0);
 
-        write_sequnlock(&xtime_lock);
-
         return IRQ_HANDLED;
 }
 
@@ -96,6 +76,20 @@ static struct irqaction sa1100_timer_irq = {
         .handler        = sa1100_timer_interrupt,
 };
 
+static cycle_t sa1100_read_oscr(void)
+{
+        return OSCR;
+}
+
+static struct clocksource cksrc_sa1100_oscr = {
+        .name           = "oscr",
+        .rating         = 200,
+        .read           = sa1100_read_oscr,
+        .mask           = CLOCKSOURCE_MASK(32),
+        .shift          = 20,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
 static void __init sa1100_timer_init(void)
 {
         unsigned long flags;
@@ -109,6 +103,11 @@ static void __init sa1100_timer_init(void)
         OIER = OIER_E0;         /* enable match on timer 0 to cause interrupts */
         OSMR0 = OSCR + LATCH;   /* set initial match */
         local_irq_restore(flags);
+
+        cksrc_sa1100_oscr.mult =
+                clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
+
+        clocksource_register(&cksrc_sa1100_oscr);
 }
 
 #ifdef CONFIG_NO_IDLE_HZ
@@ -182,7 +181,6 @@ struct sys_timer sa1100_timer = {
         .init           = sa1100_timer_init,
         .suspend        = sa1100_timer_suspend,
         .resume         = sa1100_timer_resume,
-        .offset         = sa1100_gettimeoffset,
 #ifdef CONFIG_NO_IDLE_HZ
         .dyn_tick       = &sa1100_dyn_tick,
 #endif
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index a0545db2a34f..09d9f33d4072 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -82,9 +82,7 @@ static void __init shark_map_io(void)
 static irqreturn_t
 shark_timer_interrupt(int irq, void *dev_id)
 {
-        write_seqlock(&xtime_lock);
         timer_tick();
-        write_sequnlock(&xtime_lock);
         return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 7868f4dc1d00..cb104c2a7329 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -171,8 +171,8 @@ config CPU_ARM925T
 # ARM926T
 config CPU_ARM926T
         bool "Support ARM926T processor"
-        depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX || ARCH_DAVINCI
-        default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX || ARCH_DAVINCI
+        depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_NS9XXX || ARCH_DAVINCI
+        default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_NS9XXX || ARCH_DAVINCI
         select CPU_32v5
         select CPU_ABRT_EV5TJ
         select CPU_CACHE_VIVT
@@ -345,8 +345,9 @@ config CPU_XSC3
 # ARMv6
 config CPU_V6
         bool "Support ARM V6 processor"
-        depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3
+        depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM7X00A
         default y if ARCH_MX3
+        default y if ARCH_MSM7X00A
         select CPU_32v6
         select CPU_ABRT_EV6
         select CPU_CACHE_V6
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index a8a7dab757eb..28ad7ab1c0cd 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -12,6 +12,7 @@
 #include <linux/signal.h>
 #include <linux/mm.h>
 #include <linux/init.h>
+#include <linux/kprobes.h>
 
 #include <asm/system.h>
 #include <asm/pgtable.h>
@@ -20,6 +21,29 @@
 
 #include "fault.h"
 
+
+#ifdef CONFIG_KPROBES
+static inline int notify_page_fault(struct pt_regs *regs, unsigned int fsr)
+{
+        int ret = 0;
+
+        if (!user_mode(regs)) {
+                /* kprobe_running() needs smp_processor_id() */
+                preempt_disable();
+                if (kprobe_running() && kprobe_fault_handler(regs, fsr))
+                        ret = 1;
+                preempt_enable();
+        }
+
+        return ret;
+}
+#else
+static inline int notify_page_fault(struct pt_regs *regs, unsigned int fsr)
+{
+        return 0;
+}
+#endif
+
 /*
  * This is useful to dump out the page tables associated with
  * 'addr' in mm 'mm'.
@@ -215,13 +239,16 @@ out:
         return fault;
 }
 
-static int
+static int __kprobes
 do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 {
         struct task_struct *tsk;
         struct mm_struct *mm;
         int fault, sig, code;
 
+        if (notify_page_fault(regs, fsr))
+                return 0;
+
         tsk = current;
         mm  = tsk->mm;
 
@@ -311,7 +338,7 @@ no_context:
  * interrupt or a critical region, and should only copy the information
  * from the master page table, nothing more.
  */
-static int
+static int __kprobes
 do_translation_fault(unsigned long addr, unsigned int fsr,
                      struct pt_regs *regs)
 {
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 0360b1f14d11..45a77df668f1 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -212,7 +212,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
 
 static irqreturn_t mbox_interrupt(int irq, void *p)
 {
-        struct omap_mbox *mbox = (struct omap_mbox *)p;
+        struct omap_mbox *mbox = p;
 
         if (is_mbox_irq(mbox, IRQ_TX))
                 __mbox_tx_interrupt(mbox);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index f7b9ccdaacbc..2af5bd5a1344 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -98,9 +98,10 @@ static void omap_mcbsp_dump_reg(u8 id)
 
 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
 {
-        struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id);
+        struct omap_mcbsp *mcbsp_tx = dev_id;
 
-        DBG("TX IRQ callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
+        DBG("TX IRQ callback : 0x%x\n",
+            OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
 
         complete(&mcbsp_tx->tx_irq_completion);
         return IRQ_HANDLED;
@@ -108,9 +109,10 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
 
 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 {
-        struct omap_mcbsp * mcbsp_rx = (struct omap_mcbsp *)(dev_id);
+        struct omap_mcbsp *mcbsp_rx = dev_id;
 
-        DBG("RX IRQ callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
+        DBG("RX IRQ callback : 0x%x\n",
+            OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
 
         complete(&mcbsp_rx->rx_irq_completion);
         return IRQ_HANDLED;
@@ -118,9 +120,10 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 
 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 {
-        struct omap_mcbsp * mcbsp_dma_tx = (struct omap_mcbsp *)(data);
+        struct omap_mcbsp *mcbsp_dma_tx = data;
 
-        DBG("TX DMA callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
+        DBG("TX DMA callback : 0x%x\n",
+            OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
 
         /* We can free the channels */
         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
@@ -131,9 +134,10 @@ static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 
 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
 {
-        struct omap_mcbsp * mcbsp_dma_rx = (struct omap_mcbsp *)(data);
+        struct omap_mcbsp *mcbsp_dma_rx = data;
 
-        DBG("RX DMA callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
+        DBG("RX DMA callback : 0x%x\n",
+            OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
 
         /* We can free the channels */
         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 8e5ccaa1f03c..131d20237dd7 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -23,6 +23,7 @@ obj-y				+= clock.o
 
 obj-$(CONFIG_CPU_S3C244X)       += s3c244x.o
 obj-$(CONFIG_CPU_S3C244X)       += s3c244x-irq.o
+obj-$(CONFIG_CPU_S3C244X)       += s3c244x-clock.o
 obj-$(CONFIG_PM_SIMTEC)         += pm-simtec.o
 obj-$(CONFIG_PM)                += pm.o
 obj-$(CONFIG_PM)                += sleep.o
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c
index 79cda0faec86..99a44746f8f2 100644
--- a/arch/arm/plat-s3c24xx/clock.c
+++ b/arch/arm/plat-s3c24xx/clock.c
@@ -172,6 +172,15 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
         if (IS_ERR(clk))
                 return -EINVAL;
 
+        /* We do not default just do a clk->rate = rate as
+         * the clock may have been made this way by choice.
+         */
+
+        WARN_ON(clk->set_rate == NULL);
+
+        if (clk->set_rate == NULL)
+                return -EINVAL;
+
         mutex_lock(&clocks_mutex);
         ret = (clk->set_rate)(clk, rate);
         mutex_unlock(&clocks_mutex);
@@ -213,6 +222,12 @@ EXPORT_SYMBOL(clk_set_parent);
 
 /* base clocks */
 
+static int clk_default_setrate(struct clk *clk, unsigned long rate)
+{
+        clk->rate = rate;
+        return 0;
+}
+
 struct clk clk_xtal = {
         .name           = "xtal",
         .id             = -1,
@@ -224,6 +239,7 @@ struct clk clk_xtal = {
 struct clk clk_mpll = {
         .name           = "mpll",
         .id             = -1,
+        .set_rate       = clk_default_setrate,
 };
 
 struct clk clk_upll = {
@@ -239,6 +255,7 @@ struct clk clk_f = {
         .rate           = 0,
         .parent         = &clk_mpll,
         .ctrlbit        = 0,
+        .set_rate       = clk_default_setrate,
 };
 
 struct clk clk_h = {
@@ -247,6 +264,7 @@ struct clk clk_h = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
+        .set_rate       = clk_default_setrate,
 };
 
 struct clk clk_p = {
@@ -255,6 +273,7 @@ struct clk clk_p = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
+        .set_rate       = clk_default_setrate,
 };
 
 struct clk clk_usb_bus = {
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index aae1b9cbaf44..ac9ff1666fcc 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -525,7 +525,8 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id,
                 }
         } else if (chan->state == S3C2410_DMA_IDLE) {
                 if (chan->flags & S3C2410_DMAF_AUTOSTART) {
-                        s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_START);
+                        s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL,
+                                         S3C2410_DMAOP_START);
                 }
         }
 
@@ -787,7 +788,7 @@ int s3c2410_dma_request(unsigned int channel,
 
         pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan);
 
-        return 0;
+        return chan->number | DMACH_LOW_LEVEL;
 }
 
 EXPORT_SYMBOL(s3c2410_dma_request);
@@ -1173,6 +1174,7 @@ int s3c2410_dma_devconfig(int channel,
 
         chan->source = source;
         chan->dev_addr = devaddr;
+        chan->hw_cfg = hwcfg;
 
         switch (source) {
         case S3C2410_DMASRC_HW:
@@ -1184,7 +1186,7 @@ int s3c2410_dma_devconfig(int channel,
                 dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0));
 
                 chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST);
-                return 0;
+                break;
 
         case S3C2410_DMASRC_MEM:
                 /* source is memory */
@@ -1195,11 +1197,19 @@ int s3c2410_dma_devconfig(int channel,
                 dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3);
 
                 chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DISRC);
-                return 0;
+                break;
+
+        default:
+                printk(KERN_ERR "dma%d: invalid source type (%d)\n",
+                       channel, source);
+
+                return -EINVAL;
         }
 
-        printk(KERN_ERR "dma%d: invalid source type (%d)\n", channel, source);
-        return -EINVAL;
+        if (dma_sel.direction != NULL)
+                (dma_sel.direction)(chan, chan->map, source);
+
+        return 0;
 }
 
 EXPORT_SYMBOL(s3c2410_dma_devconfig);
@@ -1227,6 +1237,10 @@ int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst)
 
 EXPORT_SYMBOL(s3c2410_dma_getposition);
 
+static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev)
+{
+        return container_of(dev, struct s3c2410_dma_chan, dev);
+}
 
 /* system device class */
 
@@ -1234,7 +1248,7 @@ EXPORT_SYMBOL(s3c2410_dma_getposition);
 
 static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state)
 {
-        struct s3c2410_dma_chan *cp = container_of(dev, struct s3c2410_dma_chan, dev);
+        struct s3c2410_dma_chan *cp = to_dma_chan(dev);
 
         printk(KERN_DEBUG "suspending dma channel %d\n", cp->number);
 
@@ -1256,6 +1270,24 @@ static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state)
 
 static int s3c2410_dma_resume(struct sys_device *dev)
 {
+        struct s3c2410_dma_chan *cp = to_dma_chan(dev);
+        unsigned int no = cp->number | DMACH_LOW_LEVEL;
+
+        /* restore channel's hardware configuration */
+
+        if (!cp->in_use)
+                return 0;
+
+        printk(KERN_INFO "dma%d: restoring configuration\n", cp->number);
+
+        s3c2410_dma_config(no, cp->xfer_unit, cp->dcon);
+        s3c2410_dma_devconfig(no, cp->source, cp->hw_cfg, cp->dev_addr);
+
+        /* re-select the dma source for this channel */
+
+        if (cp->map != NULL)
+                dma_sel.select(cp, cp->map);
+
         return 0;
 }
 
@@ -1445,6 +1477,7 @@ static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel)
 
  found:
         dmach = &s3c2410_chans[ch];
+        dmach->map = ch_map;
         dma_chan_map[channel] = dmach;
 
         /* select the channel */
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c
index ec3a09c4d181..ee99dcc7f0bd 100644
--- a/arch/arm/plat-s3c24xx/gpio.c
+++ b/arch/arm/plat-s3c24xx/gpio.c
@@ -122,6 +122,19 @@ void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
 
 EXPORT_SYMBOL(s3c2410_gpio_pullup);
 
+int s3c2410_gpio_getpull(unsigned int pin)
+{
+        void __iomem *base = S3C24XX_GPIO_BASE(pin);
+        unsigned long offs = S3C2410_GPIO_OFFSET(pin);
+
+        if (pin < S3C2410_GPIO_BANKB)
+                return -EINVAL;
+
+        return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0;
+}
+
+EXPORT_SYMBOL(s3c2410_gpio_getpull);
+
 void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
 {
         void __iomem *base = S3C24XX_GPIO_BASE(pin);
@@ -186,3 +199,19 @@ int s3c2410_gpio_getirq(unsigned int pin)
 }
 
 EXPORT_SYMBOL(s3c2410_gpio_getirq);
+
+int s3c2410_gpio_irq2pin(unsigned int irq)
+{
+        if (irq >= IRQ_EINT0 && irq <= IRQ_EINT3)
+                return S3C2410_GPF0 + (irq - IRQ_EINT0);
+
+        if (irq >= IRQ_EINT4 && irq <= IRQ_EINT7)
+                return S3C2410_GPF4 + (irq - IRQ_EINT4);
+
+        if (irq >= IRQ_EINT8 && irq <= IRQ_EINT23)
+                return S3C2410_GPG0 + (irq - IRQ_EINT8);
+
+        return -EINVAL;
+}
+
+EXPORT_SYMBOL(s3c2410_gpio_irq2pin);
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index 8fbc88470261..d486f5112569 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -187,7 +187,7 @@ struct irq_chip s3c_irq_level_chip = {
         .set_wake       = s3c_irq_wake
 };
 
-static struct irq_chip s3c_irq_chip = {
+struct irq_chip s3c_irq_chip = {
         .name           = "s3c",
         .ack            = s3c_irq_ack,
         .mask           = s3c_irq_mask,
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c
index 4fdb3117744f..bf5581a9aeea 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/plat-s3c24xx/pm.c
@@ -83,38 +83,39 @@ static struct sleep_save core_save[] = {
         SAVE_ITEM(S3C2410_REFRESH),
 };
 
-static struct sleep_save gpio_save[] = {
-        SAVE_ITEM(S3C2410_GPACON),
-        SAVE_ITEM(S3C2410_GPADAT),
-
-        SAVE_ITEM(S3C2410_GPBCON),
-        SAVE_ITEM(S3C2410_GPBDAT),
-        SAVE_ITEM(S3C2410_GPBUP),
-
-        SAVE_ITEM(S3C2410_GPCCON),
-        SAVE_ITEM(S3C2410_GPCDAT),
-        SAVE_ITEM(S3C2410_GPCUP),
-
-        SAVE_ITEM(S3C2410_GPDCON),
-        SAVE_ITEM(S3C2410_GPDDAT),
-        SAVE_ITEM(S3C2410_GPDUP),
-
-        SAVE_ITEM(S3C2410_GPECON),
-        SAVE_ITEM(S3C2410_GPEDAT),
-        SAVE_ITEM(S3C2410_GPEUP),
-
-        SAVE_ITEM(S3C2410_GPFCON),
-        SAVE_ITEM(S3C2410_GPFDAT),
-        SAVE_ITEM(S3C2410_GPFUP),
-
-        SAVE_ITEM(S3C2410_GPGCON),
-        SAVE_ITEM(S3C2410_GPGDAT),
-        SAVE_ITEM(S3C2410_GPGUP),
-
-        SAVE_ITEM(S3C2410_GPHCON),
-        SAVE_ITEM(S3C2410_GPHDAT),
-        SAVE_ITEM(S3C2410_GPHUP),
+static struct gpio_sleep {
+        void __iomem    *base;
+        unsigned int     gpcon;
+        unsigned int     gpdat;
+        unsigned int     gpup;
+} gpio_save[] = {
+        [0] = {
+                .base   = S3C2410_GPACON,
+        },
+        [1] = {
+                .base   = S3C2410_GPBCON,
+        },
+        [2] = {
+                .base   = S3C2410_GPCCON,
+        },
+        [3] = {
+                .base   = S3C2410_GPDCON,
+        },
+        [4] = {
+                .base   = S3C2410_GPECON,
+        },
+        [5] = {
+                .base   = S3C2410_GPFCON,
+        },
+        [6] = {
+                .base   = S3C2410_GPGCON,
+        },
+        [7] = {
+                .base   = S3C2410_GPHCON,
+        },
+};
 
+static struct sleep_save misc_save[] = {
         SAVE_ITEM(S3C2410_DCLKCON),
 };
 
@@ -486,6 +487,184 @@ static void s3c2410_pm_configure_extint(void)
         }
 }
 
+/* offsets for CON/DAT/UP registers */
+
+#define OFFS_CON        (S3C2410_GPACON - S3C2410_GPACON)
+#define OFFS_DAT        (S3C2410_GPADAT - S3C2410_GPACON)
+#define OFFS_UP         (S3C2410_GPBUP  - S3C2410_GPBCON)
+
+/* s3c2410_pm_save_gpios()
+ *
+ * Save the state of the GPIOs
+ */
+
+static void s3c2410_pm_save_gpios(void)
+{
+        struct gpio_sleep *gps = gpio_save;
+        unsigned int gpio;
+
+        for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) {
+                void __iomem *base = gps->base;
+
+                gps->gpcon = __raw_readl(base + OFFS_CON);
+                gps->gpdat = __raw_readl(base + OFFS_DAT);
+
+                if (gpio > 0)
+                        gps->gpup = __raw_readl(base + OFFS_UP);
+
+        }
+}
+
+/* Test whether the given masked+shifted bits of an GPIO configuration
+ * are one of the SFN (special function) modes. */
+
+static inline int is_sfn(unsigned long con)
+{
+        return (con == 2 || con == 3);
+}
+
+/* Test if the given masked+shifted GPIO configuration is an input */
+
+static inline int is_in(unsigned long con)
+{
+        return con == 0;
+}
+
+/* Test if the given masked+shifted GPIO configuration is an output */
+
+static inline int is_out(unsigned long con)
+{
+        return con == 1;
+}
+
+/* s3c2410_pm_restore_gpio()
+ *
+ * Restore one of the GPIO banks that was saved during suspend. This is
+ * not as simple as once thought, due to the possibility of glitches
+ * from the order that the CON and DAT registers are set in.
+ *
+ * The three states the pin can be are {IN,OUT,SFN} which gives us 9
+ * combinations of changes to check. Three of these, if the pin stays
+ * in the same configuration can be discounted. This leaves us with
+ * the following:
+ *
+ * { IN => OUT }  Change DAT first
+ * { IN => SFN }  Change CON first
+ * { OUT => SFN } Change CON first, so new data will not glitch
+ * { OUT => IN }  Change CON first, so new data will not glitch
+ * { SFN => IN }  Change CON first
+ * { SFN => OUT } Change DAT first, so new data will not glitch [1]
+ *
+ * We do not currently deal with the UP registers as these control
+ * weak resistors, so a small delay in change should not need to bring
+ * these into the calculations.
+ *
+ * [1] this assumes that writing to a pin DAT whilst in SFN will set the
+ *     state for when it is next output.
+ */
+
+static void s3c2410_pm_restore_gpio(int index, struct gpio_sleep *gps)
+{
+        void __iomem *base = gps->base;
+        unsigned long gps_gpcon = gps->gpcon;
+        unsigned long gps_gpdat = gps->gpdat;
+        unsigned long old_gpcon;
+        unsigned long old_gpdat;
+        unsigned long old_gpup = 0x0;
+        unsigned long gpcon;
+        int nr;
+
+        old_gpcon = __raw_readl(base + OFFS_CON);
+        old_gpdat = __raw_readl(base + OFFS_DAT);
+
+        if (base == S3C2410_GPACON) {
+                /* GPACON only has one bit per control / data and no PULLUPs.
+                 * GPACON[x] = 0 => Output, 1 => SFN */
+
+                /* first set all SFN bits to SFN */
+
+                gpcon = old_gpcon | gps->gpcon;
+                __raw_writel(gpcon, base + OFFS_CON);
+
+                /* now set all the other bits */
+
+                __raw_writel(gps_gpdat, base + OFFS_DAT);
+                __raw_writel(gps_gpcon, base + OFFS_CON);
+        } else {
+                unsigned long old, new, mask;
+                unsigned long change_mask = 0x0;
+
+                old_gpup = __raw_readl(base + OFFS_UP);
+
+                /* Create a change_mask of all the items that need to have
+                 * their CON value changed before their DAT value, so that
+                 * we minimise the work between the two settings.
+                 */
+
+                for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) {
+                        old = (old_gpcon & mask) >> nr;
+                        new = (gps_gpcon & mask) >> nr;
+
+                        /* If there is no change, then skip */
+
+                        if (old == new)
+                                continue;
+
+                        /* If both are special function, then skip */
+
+                        if (is_sfn(old) && is_sfn(new))
+                                continue;
+
+                        /* Change is IN => OUT, do not change now */
+
+                        if (is_in(old) && is_out(new))
+                                continue;
+
+                        /* Change is SFN => OUT, do not change now */
+
+                        if (is_sfn(old) && is_out(new))
+                                continue;
+
+                        /* We should now be at the case of IN=>SFN,
+                         * OUT=>SFN, OUT=>IN, SFN=>IN. */
+
+                        change_mask |= mask;
+                }
+
+                /* Write the new CON settings */
+
+                gpcon = old_gpcon & ~change_mask;
+                gpcon |= gps_gpcon & change_mask;
+
+                __raw_writel(gpcon, base + OFFS_CON);
+
+                /* Now change any items that require DAT,CON */
+
+                __raw_writel(gps_gpdat, base + OFFS_DAT);
+                __raw_writel(gps_gpcon, base + OFFS_CON);
+                __raw_writel(gps->gpup, base + OFFS_UP);
+        }
+
+        DBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n",
+            index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat);
+}
+
+
+/** s3c2410_pm_restore_gpios()
+ *
+ * Restore the state of the GPIOs
+ */
+
+static void s3c2410_pm_restore_gpios(void)
+{
+        struct gpio_sleep *gps = gpio_save;
+        int gpio;
+
+        for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) {
+                s3c2410_pm_restore_gpio(gpio, gps);
+        }
+}
+
 void (*pm_cpu_prep)(void);
 void (*pm_cpu_sleep)(void);
 
@@ -535,7 +714,8 @@ static int s3c2410_pm_enter(suspend_state_t state)
 
         /* save all necessary core registers not covered by the drivers */
 
-        s3c2410_pm_do_save(gpio_save, ARRAY_SIZE(gpio_save));
+        s3c2410_pm_save_gpios();
+        s3c2410_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
         s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save));
         s3c2410_pm_do_save(uart_save, ARRAY_SIZE(uart_save));
 
@@ -585,8 +765,9 @@ static int s3c2410_pm_enter(suspend_state_t state)
         /* restore the system state */
 
         s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
-        s3c2410_pm_do_restore(gpio_save, ARRAY_SIZE(gpio_save));
+        s3c2410_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
         s3c2410_pm_do_restore(uart_save, ARRAY_SIZE(uart_save));
+        s3c2410_pm_restore_gpios();
 
         s3c2410_pm_debug_init();
 
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c
new file mode 100644
index 000000000000..faf3e0f9f4e2
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c
@@ -0,0 +1,137 @@
+/* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c
+ *
+ * Copyright (c) 2004-2005,2008 Simtec Electronics
+ *      http://armlinux.simtec.co.uk/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2440/S3C2442 Common clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/device.h>
+#include <linux/sysdev.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/mutex.h>
+#include <linux/clk.h>
+
+#include <asm/hardware.h>
+#include <asm/atomic.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#include <asm/arch/regs-clock.h>
+
+#include <asm/plat-s3c24xx/clock.h>
+#include <asm/plat-s3c24xx/cpu.h>
+
+static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent)
+{
+        unsigned long camdivn;
+        unsigned long dvs;
+
+        if (parent == &clk_f)
+                dvs = 0;
+        else if (parent == &clk_h)
+                dvs = S3C2440_CAMDIVN_DVSEN;
+        else
+                return -EINVAL;
+
+        clk->parent = parent;
+
+        camdivn  = __raw_readl(S3C2440_CAMDIVN);
+        camdivn &= ~S3C2440_CAMDIVN_DVSEN;
+        camdivn |= dvs;
+        __raw_writel(camdivn, S3C2440_CAMDIVN);
+
+        return 0;
+}
+
+static struct clk clk_arm = {
+        .name           = "armclk",
+        .id             = -1,
+        .set_parent     = s3c2440_setparent_armclk,
+};
+
+static int s3c244x_clk_add(struct sys_device *sysdev)
+{
+        unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
+        unsigned long clkdivn;
+        struct clk *clock_upll;
+        int ret;
+
+        printk("S3C244X: Clock Support, DVS %s\n",
+               (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
+
+        clk_arm.parent = (camdivn & S3C2440_CAMDIVN_DVSEN) ? &clk_h : &clk_f;
+
+        ret = s3c24xx_register_clock(&clk_arm);
+        if (ret < 0) {
+                printk(KERN_ERR "S3C24XX: Failed to add armclk (%d)\n", ret);
+                return ret;
+        }
+
+        clock_upll = clk_get(NULL, "upll");
+        if (IS_ERR(clock_upll)) {
+                printk(KERN_ERR "S3C244X: Failed to get upll clock\n");
+                return -ENOENT;
+        }
+
+        /* check rate of UPLL, and if it is near 96MHz, then change
+         * to using half the UPLL rate for the system */
+
+        if (clk_get_rate(clock_upll) > (94 * MHZ)) {
+                clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
+
+                mutex_lock(&clocks_mutex);
+
+                clkdivn = __raw_readl(S3C2410_CLKDIVN);
+                clkdivn |= S3C2440_CLKDIVN_UCLK;
+                __raw_writel(clkdivn, S3C2410_CLKDIVN);
+
+                mutex_unlock(&clocks_mutex);
+        }
+
+        return 0;
+}
+
+static struct sysdev_driver s3c2440_clk_driver = {
+        .add            = s3c244x_clk_add,
+};
+
+static int s3c2440_clk_init(void)
+{
+        return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
+}
+
+arch_initcall(s3c2440_clk_init);
+
+static struct sysdev_driver s3c2442_clk_driver = {
+        .add            = s3c244x_clk_add,
+};
+
+static int s3c2442_clk_init(void)
+{
+        return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver);
+}
+
+arch_initcall(s3c2442_clk_init);
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 0a9a5e7f62e5..7ed58c0c24c2 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# Last update: Fri May 11 19:53:41 2007
+# Last update: Sat Jan 26 14:45:34 2008
 #
 # machine_is_xxx        CONFIG_xxxx             MACH_TYPE_xxx           number
 #
@@ -266,7 +266,7 @@ stork_egg		ARCH_STORK_EGG		STORK_EGG		248
 wismo                   SA1100_WISMO            WISMO                   249
 ezlinx                  ARCH_EZLINX             EZLINX                  250
 at91rm9200              ARCH_AT91RM9200         AT91RM9200              251
-orion                   ARCH_ORION              ORION                   252
+adtech_orion            ARCH_ADTECH_ORION       ADTECH_ORION            252
 neptune                 ARCH_NEPTUNE            NEPTUNE                 253
 hackkit                 SA1100_HACKKIT          HACKKIT                 254
 pxa_wins30              ARCH_PXA_WINS30         PXA_WINS30              255
@@ -661,7 +661,6 @@ a9200ec			MACH_A9200EC		A9200EC			645
 pnx0105                 MACH_PNX0105            PNX0105                 646
 adcpoecpu               MACH_ADCPOECPU          ADCPOECPU               647
 csb637                  MACH_CSB637             CSB637                  648
-ml69q6203               MACH_ML69Q6203          ML69Q6203               649
 mb9200                  MACH_MB9200             MB9200                  650
 kulun                   MACH_KULUN              KULUN                   651
 snapper                 MACH_SNAPPER            SNAPPER                 652
@@ -953,7 +952,6 @@ fred_jack		MACH_FRED_JACK		FRED_JACK		939
 ttg_color1              MACH_TTG_COLOR1         TTG_COLOR1              940
 nxeb500hmi              MACH_NXEB500HMI         NXEB500HMI              941
 netdcu8                 MACH_NETDCU8            NETDCU8                 942
-ml675050_cpu_boa        MACH_ML675050_CPU_BOA   ML675050_CPU_BOA        943
 ng_fvx538               MACH_NG_FVX538          NG_FVX538               944
 ng_fvs338               MACH_NG_FVS338          NG_FVS338               945
 pnx4103                 MACH_PNX4103            PNX4103                 946
@@ -1148,7 +1146,7 @@ aidx270			MACH_AIDX270		AIDX270			1134
 rema                    MACH_REMA               REMA                    1135
 bps1000                 MACH_BPS1000            BPS1000                 1136
 hw90350                 MACH_HW90350            HW90350                 1137
-omap_sdp3430            MACH_OMAP_SDP3430       OMAP_SDP3430            1138
+omap_3430sdp            MACH_OMAP_3430SDP       OMAP_3430SDP            1138
 bluetouch               MACH_BLUETOUCH          BLUETOUCH               1139
 vstms                   MACH_VSTMS              VSTMS                   1140
 xsbase270               MACH_XSBASE270          XSBASE270               1141
@@ -1214,7 +1212,7 @@ osstbox			MACH_OSSTBOX		OSSTBOX			1203
 kbat9261                MACH_KBAT9261           KBAT9261                1204
 ct1100                  MACH_CT1100             CT1100                  1205
 akcppxa                 MACH_AKCPPXA            AKCPPXA                 1206
-zevio_1020              MACH_ZEVIO_1020         ZEVIO_1020              1207
+ochaya1020              MACH_OCHAYA1020         OCHAYA1020              1207
 hitrack                 MACH_HITRACK            HITRACK                 1208
 syme1                   MACH_SYME1              SYME1                   1209
 syhl1                   MACH_SYHL1              SYHL1                   1210
@@ -1299,7 +1297,7 @@ xp179			MACH_XP179		XP179			1290
 h4300                   MACH_H4300              H4300                   1291
 goramo_mlr              MACH_GORAMO_MLR         GORAMO_MLR              1292
 mxc30020evb             MACH_MXC30020EVB        MXC30020EVB             1293
-adsbitsymx              MACH_ADSBITSIMX         ADSBITSIMX              1294
+adsbitsyg5              MACH_ADSBITSYG5         ADSBITSYG5              1294
 adsportalplus           MACH_ADSPORTALPLUS      ADSPORTALPLUS           1295
 mmsp2plus               MACH_MMSP2PLUS          MMSP2PLUS               1296
 em_x270                 MACH_EM_X270            EM_X270                 1297
@@ -1367,3 +1365,249 @@ db88f5281		MACH_DB88F5281		DB88F5281		1358
 csb726                  MACH_CSB726             CSB726                  1359
 tik27                   MACH_TIK27              TIK27                   1360
 mx_uc7420               MACH_MX_UC7420          MX_UC7420               1361
+rirm3                   MACH_RIRM3              RIRM3                   1362
+pelco_odyssey           MACH_PELCO_ODYSSEY      PELCO_ODYSSEY           1363
+adx_abox                MACH_ADX_ABOX           ADX_ABOX                1365
+adx_tpid                MACH_ADX_TPID           ADX_TPID                1366
+minicheck               MACH_MINICHECK          MINICHECK               1367
+idam                    MACH_IDAM               IDAM                    1368
+mario_mx                MACH_MARIO_MX           MARIO_MX                1369
+vi1888                  MACH_VI1888             VI1888                  1370
+zr4230                  MACH_ZR4230             ZR4230                  1371
+t1_ix_blue              MACH_T1_IX_BLUE         T1_IX_BLUE              1372
+syhq2                   MACH_SYHQ2              SYHQ2                   1373
+computime_r3            MACH_COMPUTIME_R3       COMPUTIME_R3            1374
+oratis                  MACH_ORATIS             ORATIS                  1375
+mikko                   MACH_MIKKO              MIKKO                   1376
+holon                   MACH_HOLON              HOLON                   1377
+olip8                   MACH_OLIP8              OLIP8                   1378
+ghi270hg                MACH_GHI270HG           GHI270HG                1379
+davinci_dm6467_evm      MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM      1380
+davinci_dm355_evm       MACH_DAVINCI_DM350_EVM  DAVINCI_DM350_EVM       1381
+blackriver              MACH_BLACKRIVER         BLACKRIVER              1383
+sandgate_wp             MACH_SANDGATEWP         SANDGATEWP              1384
+cdotbwsg                MACH_CDOTBWSG           CDOTBWSG                1385
+quark963                MACH_QUARK963           QUARK963                1386
+csb735                  MACH_CSB735             CSB735                  1387
+littleton               MACH_LITTLETON          LITTLETON               1388
+mio_p550                MACH_MIO_P550           MIO_P550                1389
+motion2440              MACH_MOTION2440         MOTION2440              1390
+imm500                  MACH_IMM500             IMM500                  1391
+homematic               MACH_HOMEMATIC          HOMEMATIC               1392
+ermine                  MACH_ERMINE             ERMINE                  1393
+kb9202b                 MACH_KB9202B            KB9202B                 1394
+hs1xx                   MACH_HS1XX              HS1XX                   1395
+studentmate2440         MACH_STUDENTMATE2440    STUDENTMATE2440         1396
+arvoo_l1_z1             MACH_ARVOO_L1_Z1        ARVOO_L1_Z1             1397
+dep2410k                MACH_DEP2410K           DEP2410K                1398
+xxsvideo                MACH_XXSVIDEO           XXSVIDEO                1399
+im4004                  MACH_IM4004             IM4004                  1400
+ochaya1050              MACH_OCHAYA1050         OCHAYA1050              1401
+lep9261                 MACH_LEP9261            LEP9261                 1402
+svenmeb                 MACH_SVENMEB            SVENMEB                 1403
+fortunet2ne             MACH_FORTUNET2NE        FORTUNET2NE             1404
+nxhx                    MACH_NXHX               NXHX                    1406
+realview_pb11mp         MACH_REALVIEW_PB11MP    REALVIEW_PB11MP         1407
+ids500                  MACH_IDS500             IDS500                  1408
+ors_n725                MACH_ORS_N725           ORS_N725                1409
+hsdarm                  MACH_HSDARM             HSDARM                  1410
+sha_pon003              MACH_SHA_PON003         SHA_PON003              1411
+sha_pon004              MACH_SHA_PON004         SHA_PON004              1412
+sha_pon007              MACH_SHA_PON007         SHA_PON007              1413
+sha_pon011              MACH_SHA_PON011         SHA_PON011              1414
+h6042                   MACH_H6042              H6042                   1415
+h6043                   MACH_H6043              H6043                   1416
+looxc550                MACH_LOOXC550           LOOXC550                1417
+cnty_titan              MACH_CNTY_TITAN         CNTY_TITAN              1418
+app3xx                  MACH_APP3XX             APP3XX                  1419
+sideoatsgrama           MACH_SIDEOATSGRAMA      SIDEOATSGRAMA           1420
+xscale_palmt700p        MACH_XSCALE_PALMT700P   XSCALE_PALMT700P        1421
+xscale_palmt700w        MACH_XSCALE_PALMT700W   XSCALE_PALMT700W        1422
+xscale_palmt750         MACH_XSCALE_PALMT750    XSCALE_PALMT750         1423
+xscale_palmt755p        MACH_XSCALE_PALMT755P   XSCALE_PALMT755P        1424
+ezreganut9200           MACH_EZREGANUT9200      EZREGANUT9200           1425
+sarge                   MACH_SARGE              SARGE                   1426
+a696                    MACH_A696               A696                    1427
+turtle1916              MACH_TURTLE             TURTLE                  1428
+mx27_3ds                MACH_MX27_3DS           MX27_3DS                1430
+bishop                  MACH_BISHOP             BISHOP                  1431
+pxx                     MACH_PXX                PXX                     1432
+redwood                 MACH_REDWOOD            REDWOOD                 1433
+omap_2430dlp            MACH_OMAP_2430DLP       OMAP_2430DLP            1436
+omap_2430osk            MACH_OMAP_2430OSK       OMAP_2430OSK            1437
+sardine                 MACH_SARDINE            SARDINE                 1438
+halibut                 MACH_HALIBUT            HALIBUT                 1439
+trout                   MACH_TROUT              TROUT                   1440
+goldfish                MACH_GOLDFISH           GOLDFISH                1441
+gesbc2440               MACH_GESBC2440          GESBC2440               1442
+nomad                   MACH_NOMAD              NOMAD                   1443
+rosalind                MACH_ROSALIND           ROSALIND                1444
+cc9p9215                MACH_CC9P9215           CC9P9215                1445
+cc9p9210                MACH_CC9P9210           CC9P9210                1446
+cc9p9215js              MACH_CC9P9215JS         CC9P9215JS              1447
+cc9p9210js              MACH_CC9P9210JS         CC9P9210JS              1448
+nasffe                  MACH_NASFFE             NASFFE                  1449
+tn2x0bd                 MACH_TN2X0BD            TN2X0BD                 1450
+gwmpxa                  MACH_GWMPXA             GWMPXA                  1451
+exyplus                 MACH_EXYPLUS            EXYPLUS                 1452
+jadoo21                 MACH_JADOO21            JADOO21                 1453
+looxn560                MACH_LOOXN560           LOOXN560                1454
+bonsai                  MACH_BONSAI             BONSAI                  1455
+adsmilgato              MACH_ADSMILGATO         ADSMILGATO              1456
+gba                     MACH_GBA                GBA                     1457
+h6044                   MACH_H6044              H6044                   1458
+app                     MACH_APP                APP                     1459
+tct_hammer              MACH_TCT_HAMMER         TCT_HAMMER              1460
+herald                  MACH_HERMES             HERMES                  1461
+artemis                 MACH_ARTEMIS            ARTEMIS                 1462
+htctitan                MACH_HTCTITAN           HTCTITAN                1463
+qranium                 MACH_QRANIUM            QRANIUM                 1464
+adx_wsc2                MACH_ADX_WSC2           ADX_WSC2                1465
+adx_medinet             MACH_ADX_MEDINET        ADX_MEDINET             1466
+bboard                  MACH_BBOARD             BBOARD                  1467
+cambria                 MACH_CAMBRIA            CAMBRIA                 1468
+mt7xxx                  MACH_MT7XXX             MT7XXX                  1469
+matrix512               MACH_MATRIX512          MATRIX512               1470
+matrix522               MACH_MATRIX522          MATRIX522               1471
+ipac5010                MACH_IPAC5010           IPAC5010                1472
+sakura                  MACH_SAKURA             SAKURA                  1473
+grocx                   MACH_GROCX              GROCX                   1474
+pm9263                  MACH_PM9263             PM9263                  1475
+sim_one                 MACH_SIM_ONE            SIM_ONE                 1476
+acq132                  MACH_ACQ132             ACQ132                  1477
+datr                    MACH_DATR               DATR                    1478
+actux1                  MACH_ACTUX1             ACTUX1                  1479
+actux2                  MACH_ACTUX2             ACTUX2                  1480
+actux3                  MACH_ACTUX3             ACTUX3                  1481
+flexit                  MACH_FLEXIT             FLEXIT                  1482
+bh2x0bd                 MACH_BH2X0BD            BH2X0BD                 1483
+atb2002                 MACH_ATB2002            ATB2002                 1484
+xenon                   MACH_XENON              XENON                   1485
+fm607                   MACH_FM607              FM607                   1486
+matrix514               MACH_MATRIX514          MATRIX514               1487
+matrix524               MACH_MATRIX524          MATRIX524               1488
+inpod                   MACH_INPOD              INPOD                   1489
+jive                    MACH_JIVE               JIVE                    1490
+tll_mx21                MACH_TLL_MX21           TLL_MX21                1491
+sbc2800                 MACH_SBC2800            SBC2800                 1492
+cc7ucamry               MACH_CC7UCAMRY          CC7UCAMRY               1493
+ubisys_p9_sc15          MACH_UBISYS_P9_SC15     UBISYS_P9_SC15          1494
+ubisys_p9_ssc2d10       MACH_UBISYS_P9_SSC2D10  UBISYS_P9_SSC2D10       1495
+ubisys_p9_rcu3          MACH_UBISYS_P9_RCU3     UBISYS_P9_RCU3          1496
+aml_m8000               MACH_AML_M8000          AML_M8000               1497
+snapper_270             MACH_SNAPPER_270        SNAPPER_270             1498
+omap_bbx                MACH_OMAP_BBX           OMAP_BBX                1499
+ucn2410                 MACH_UCN2410            UCN2410                 1500
+sam9_l9260              MACH_SAM9_L9260         SAM9_L9260              1501
+eti_c2                  MACH_ETI_C2             ETI_C2                  1502
+avalanche               MACH_AVALANCHE          AVALANCHE               1503
+realview_pb1176         MACH_REALVIEW_PB1176    REALVIEW_PB1176         1504
+dp1500                  MACH_DP1500             DP1500                  1505
+apple_iphone            MACH_APPLE_IPHONE       APPLE_IPHONE            1506
+yl9200                  MACH_YL9200             YL9200                  1507
+rd88f5182               MACH_RD88F5182          RD88F5182               1508
+kurobox_pro             MACH_KUROBOX_PRO        KUROBOX_PRO             1509
+se_poet                 MACH_SE_POET            SE_POET                 1510
+mx31_3ds                MACH_MX31_3DS           MX31_3DS                1511
+r270                    MACH_R270               R270                    1512
+armour21                MACH_ARMOUR21           ARMOUR21                1513
+dt2                     MACH_DT2                DT2                     1514
+vt4                     MACH_VT4                VT4                     1515
+tyco320                 MACH_TYCO320            TYCO320                 1516
+adma                    MACH_ADMA               ADMA                    1517
+wp188                   MACH_WP188              WP188                   1518
+corsica                 MACH_CORSICA            CORSICA                 1519
+bigeye                  MACH_BIGEYE             BIGEYE                  1520
+tll5000                 MACH_TLL5000            TLL5000                 1522
+hni270                  MACH_HNI_X270           HNI_X270                1523
+qong                    MACH_QONG               QONG                    1524
+tcompact                MACH_TCOMPACT           TCOMPACT                1525
+puma5                   MACH_PUMA5              PUMA5                   1526
+elara                   MACH_ELARA              ELARA                   1527
+ellington               MACH_ELLINGTON          ELLINGTON               1528
+xda_atom                MACH_XDA_ATOM           XDA_ATOM                1529
+energizer2              MACH_ENERGIZER2         ENERGIZER2              1530
+odin                    MACH_ODIN               ODIN                    1531
+actux4                  MACH_ACTUX4             ACTUX4                  1532
+esl_omap                MACH_ESL_OMAP           ESL_OMAP                1533
+omap2evm                MACH_OMAP2EVM           OMAP2EVM                1534
+omap3evm                MACH_OMAP3EVM           OMAP3EVM                1535
+adx_pcu57               MACH_ADX_PCU57          ADX_PCU57               1536
+monaco                  MACH_MONACO             MONACO                  1537
+levante                 MACH_LEVANTE            LEVANTE                 1538
+tmxipx425               MACH_TMXIPX425          TMXIPX425               1539
+leep                    MACH_LEEP               LEEP                    1540
+raad                    MACH_RAAD               RAAD                    1541
+dns323                  MACH_DNS323             DNS323                  1542
+ap1000                  MACH_AP1000             AP1000                  1543
+a9sam6432               MACH_A9SAM6432          A9SAM6432               1544
+shiny                   MACH_SHINY              SHINY                   1545
+omap3_beagle            MACH_OMAP3_BEAGLE       OMAP3_BEAGLE            1546
+csr_bdb2                MACH_CSR_BDB2           CSR_BDB2                1547
+nokia_n810              MACH_NOKIA_N810         NOKIA_N810              1548
+c270                    MACH_C270               C270                    1549
+sentry                  MACH_SENTRY             SENTRY                  1550
+pcm038                  MACH_PCM038             PCM038                  1551
+anc300                  MACH_ANC300             ANC300                  1552
+htckaiser               MACH_HTCKAISER          HTCKAISER               1553
+sbat100                 MACH_SBAT100            SBAT100                 1554
+modunorm                MACH_MODUNORM           MODUNORM                1555
+pelos_twarm             MACH_PELOS_TWARM        PELOS_TWARM             1556
+flank                   MACH_FLANK              FLANK                   1557
+sirloin                 MACH_SIRLOIN            SIRLOIN                 1558
+brisket                 MACH_BRISKET            BRISKET                 1559
+chuck                   MACH_CHUCK              CHUCK                   1560
+otter                   MACH_OTTER              OTTER                   1561
+davinci_ldk             MACH_DAVINCI_LDK        DAVINCI_LDK             1562
+phreedom                MACH_PHREEDOM           PHREEDOM                1563
+sg310                   MACH_SG310              SG310                   1564
+ts_x09                  MACH_TS209              TS209                   1565
+at91cap9adk             MACH_AT91CAP9ADK        AT91CAP9ADK             1566
+tion9315                MACH_TION9315           TION9315                1567
+mast                    MACH_MAST               MAST                    1568
+pfw                     MACH_PFW                PFW                     1569
+yl_p2440                MACH_YL_P2440           YL_P2440                1570
+zsbc32                  MACH_ZSBC32             ZSBC32                  1571
+omap_pace2              MACH_OMAP_PACE2         OMAP_PACE2              1572
+imx_pace2               MACH_IMX_PACE2          IMX_PACE2               1573
+mx31moboard             MACH_MX31MOBOARD        MX31MOBOARD             1574
+mx37_3ds                MACH_MX37_3DS           MX37_3DS                1575
+rcc                     MACH_RCC                RCC                     1576
+dmp                     MACH_ARM9               ARM9                    1577
+vision_ep9307           MACH_VISION_EP9307      VISION_EP9307           1578
+scly1000                MACH_SCLY1000           SCLY1000                1579
+fontel_ep               MACH_FONTEL_EP          FONTEL_EP               1580
+voiceblue3g             MACH_VOICEBLUE3G        VOICEBLUE3G             1581
+tt9200                  MACH_TT9200             TT9200                  1582
+digi2410                MACH_DIGI2410           DIGI2410                1583
+terastation_pro2        MACH_TERASTATION_PRO2   TERASTATION_PRO2        1584
+linkstation_pro         MACH_LINKSTATION_PRO    LINKSTATION_PRO         1585
+motorola_a780           MACH_MOTOROLA_A780      MOTOROLA_A780           1587
+motorola_e6             MACH_MOTOROLA_E6        MOTOROLA_E6             1588
+motorola_e2             MACH_MOTOROLA_E2        MOTOROLA_E2             1589
+motorola_e680           MACH_MOTOROLA_E680      MOTOROLA_E680           1590
+ur2410                  MACH_UR2410             UR2410                  1591
+tas9261                 MACH_TAS9261            TAS9261                 1592
+davinci_hermes_hd       MACH_HERMES_HD          HERMES_HD               1593
+davinci_perseo_hd       MACH_PERSEO_HD          PERSEO_HD               1594
+stargazer2              MACH_STARGAZER2         STARGAZER2              1595
+e350                    MACH_E350               E350                    1596
+wpcm450                 MACH_WPCM450            WPCM450                 1597
+cartesio                MACH_CARTESIO           CARTESIO                1598
+toybox                  MACH_TOYBOX             TOYBOX                  1599
+tx27                    MACH_TX27               TX27                    1600
+ts409                   MACH_TS409              TS409                   1601
+p300                    MACH_P300               P300                    1602
+xdacomet                MACH_XDACOMET           XDACOMET                1603
+dexflex2                MACH_DEXFLEX2           DEXFLEX2                1604
+ow                      MACH_OW                 OW                      1605
+armebs3                 MACH_ARMEBS3            ARMEBS3                 1606
+u3                      MACH_U3                 U3                      1607
+smdk2450                MACH_SMDK2450           SMDK2450                1608
+rsi_ews                 MACH_RSI_EWS            RSI_EWS                 1609
+tnb                     MACH_TNB                TNB                     1610
+toepath                 MACH_TOEPATH            TOEPATH                 1611
+kb9263                  MACH_KB9263             KB9263                  1612
+mt7108                  MACH_MT7108             MT7108                  1613
+smtr2440                MACH_SMTR2440           SMTR2440                1614
+manao                   MACH_MANAO              MANAO                   1615
diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h
index 791d0238c68f..c85860bad585 100644
--- a/arch/arm/vfp/vfp.h
+++ b/arch/arm/vfp/vfp.h
@@ -265,7 +265,11 @@ struct vfp_double {
  * which returns (double)0.0.  This is useful for the compare with
  * zero instructions.
  */
+#ifdef CONFIG_VFPv3
+#define VFP_REG_ZERO    32
+#else
 #define VFP_REG_ZERO    16
+#endif
 extern u64 vfp_get_double(unsigned int reg);
 extern void vfp_put_double(u64 val, unsigned int reg);
 
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index 0ac022f800a1..353f9e5c7919 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -99,12 +99,12 @@ vfp_support_entry:
         DBGSTR1 "save old state %p", r4
         cmp     r4, #0
         beq     no_old_VFP_process
+        VFPFSTMIA r4, r5                @ save the working registers
         VFPFMRX r5, FPSCR               @ current status
-        VFPFMRX r6, FPINST              @ FPINST (always there, rev0 onwards)
-        tst     r1, #FPEXC_FPV2         @ is there an FPINST2 to read?
-        VFPFMRX r8, FPINST2, NE         @ FPINST2 if needed - avoids reading
-                                        @ nonexistant reg on rev0
-        VFPFSTMIA r4                    @ save the working registers
+        tst     r1, #FPEXC_EX           @ is there additional state to save?
+        VFPFMRX r6, FPINST, NE          @ FPINST (only if FPEXC.EX is set)
+        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
+        VFPFMRX r8, FPINST2, NE         @ FPINST2 if needed (and present)
         stmia   r4, {r1, r5, r6, r8}    @ save FPEXC, FPSCR, FPINST, FPINST2
                                         @ and point r4 at the word at the
                                         @ start of the register dump
@@ -114,13 +114,13 @@ no_old_VFP_process:
         DBGSTR1 "load state %p", r10
         str     r10, [r3, r11, lsl #2]  @ update the last_VFP_context pointer
                                         @ Load the saved state back into the VFP
-        VFPFLDMIA r10                   @ reload the working registers while
+        VFPFLDMIA r10, r5               @ reload the working registers while
                                         @ FPEXC is in a safe state
         ldmia   r10, {r1, r5, r6, r8}   @ load FPEXC, FPSCR, FPINST, FPINST2
-        tst     r1, #FPEXC_FPV2         @ is there an FPINST2 to write?
-        VFPFMXR FPINST2, r8, NE         @ FPINST2 if needed - avoids writing
-                                        @ nonexistant reg on rev0
-        VFPFMXR FPINST, r6
+        tst     r1, #FPEXC_EX           @ is there additional state to restore?
+        VFPFMXR FPINST, r6, NE          @ restore FPINST (only if FPEXC.EX is set)
+        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to write?
+        VFPFMXR FPINST2, r8, NE         @ FPINST2 if needed (and present)
         VFPFMXR FPSCR, r5               @ restore status
 
 check_for_exception:
@@ -136,10 +136,14 @@ check_for_exception:
 
 
 look_for_VFP_exceptions:
-        tst     r1, #FPEXC_EX
+        @ Check for synchronous or asynchronous exception
+        tst     r1, #FPEXC_EX | FPEXC_DEX
         bne     process_exception
+        @ On some implementations of the VFP subarch 1, setting FPSCR.IXE
+        @ causes all the CDP instructions to be bounced synchronously without
+        @ setting the FPEXC.EX bit
         VFPFMRX r5, FPSCR
-        tst     r5, #FPSCR_IXE          @ IXE doesn't set FPEXC_EX !
+        tst     r5, #FPSCR_IXE
         bne     process_exception
 
         @ Fall into hand on to next handler - appropriate coproc instr
@@ -150,10 +154,6 @@ look_for_VFP_exceptions:
 
 process_exception:
         DBGSTR  "bounce"
-        sub     r2, r2, #4
-        str     r2, [sp, #S_PC]         @ retry the instruction on exit from
-                                        @ the imprecise exception handling in
-                                        @ the support code
         mov     r2, sp                  @ nothing stacked - regdump is at TOS
         mov     lr, r9                  @ setup for a return to the user code.
 
@@ -161,7 +161,7 @@ process_exception:
         @   r0 holds the trigger instruction
         @   r1 holds the FPEXC value
         @   r2 pointer to register dump
-        b       VFP9_bounce             @ we have handled this - the support
+        b       VFP_bounce              @ we have handled this - the support
                                         @ code will raise an exception if
                                         @ required. If not, the user code will
                                         @ retry the faulted instruction
@@ -174,12 +174,12 @@ vfp_save_state:
         @ r0 - save location
         @ r1 - FPEXC
         DBGSTR1 "save VFP state %p", r0
+        VFPFSTMIA r0, r2                @ save the working registers
         VFPFMRX r2, FPSCR               @ current status
-        VFPFMRX r3, FPINST              @ FPINST (always there, rev0 onwards)
-        tst     r1, #FPEXC_FPV2         @ is there an FPINST2 to read?
-        VFPFMRX r12, FPINST2, NE        @ FPINST2 if needed - avoids reading
-                                        @ nonexistant reg on rev0
-        VFPFSTMIA r0                    @ save the working registers
+        tst     r1, #FPEXC_EX           @ is there additional state to save?
+        VFPFMRX r3, FPINST, NE          @ FPINST (only if FPEXC.EX is set)
+        tstne   r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
+        VFPFMRX r12, FPINST2, NE        @ FPINST2 if needed (and present)
         stmia   r0, {r1, r2, r3, r12}   @ save FPEXC, FPSCR, FPINST, FPINST2
         mov     pc, lr
 #endif
@@ -217,8 +217,15 @@ vfp_get_double:
         fmrrd   r0, r1, d\dr
         mov     pc, lr
         .endr
+#ifdef CONFIG_VFPv3
+        @ d16 - d31 registers
+        .irp    dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+        mrrc    p11, 3, r0, r1, c\dr    @ fmrrd r0, r1, d\dr
+        mov     pc, lr
+        .endr
+#endif
 
-        @ virtual register 16 for compare with zero
+        @ virtual register 16 (or 32 if VFPv3) for compare with zero
         mov     r0, #0
         mov     r1, #0
         mov     pc, lr
@@ -231,3 +238,10 @@ vfp_put_double:
         fmdrr   d\dr, r0, r1
         mov     pc, lr
         .endr
+#ifdef CONFIG_VFPv3
+        @ d16 - d31 registers
+        .irp    dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+        mcrr    p11, 3, r1, r2, c\dr    @ fmdrr r1, r2, d\dr
+        mov     pc, lr
+        .endr
+#endif
diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h
index 7f343a4beca0..15b95b5ab97e 100644
--- a/arch/arm/vfp/vfpinstr.h
+++ b/arch/arm/vfp/vfpinstr.h
@@ -52,11 +52,11 @@
 #define FEXT_TO_IDX(inst)       ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7)
 
 #define vfp_get_sd(inst)        ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22)
-#define vfp_get_dd(inst)        ((inst & 0x0000f000) >> 12)
+#define vfp_get_dd(inst)        ((inst & 0x0000f000) >> 12 | (inst & (1 << 22)) >> 18)
 #define vfp_get_sm(inst)        ((inst & 0x0000000f) << 1 | (inst & (1 << 5)) >> 5)
-#define vfp_get_dm(inst)        ((inst & 0x0000000f))
+#define vfp_get_dm(inst)        ((inst & 0x0000000f) | (inst & (1 << 5)) >> 1)
 #define vfp_get_sn(inst)        ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7)
-#define vfp_get_dn(inst)        ((inst & 0x000f0000) >> 16)
+#define vfp_get_dn(inst)        ((inst & 0x000f0000) >> 16 | (inst & (1 << 7)) >> 3)
 
 #define vfp_single(inst)        (((inst) & 0x0000f00) == 0xa00)
 
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index b4e210df92f2..32455c633f1c 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -125,13 +125,13 @@ void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
         send_sig_info(SIGFPE, &info, current);
 }
 
-static void vfp_panic(char *reason)
+static void vfp_panic(char *reason, u32 inst)
 {
         int i;
 
         printk(KERN_ERR "VFP: Error: %s\n", reason);
         printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
-                fmrx(FPEXC), fmrx(FPSCR), fmrx(FPINST));
+                fmrx(FPEXC), fmrx(FPSCR), inst);
         for (i = 0; i < 32; i += 2)
                 printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
                        i, vfp_get_float(i), i+1, vfp_get_float(i+1));
@@ -147,19 +147,16 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_
         pr_debug("VFP: raising exceptions %08x\n", exceptions);
 
         if (exceptions == VFP_EXCEPTION_ERROR) {
-                vfp_panic("unhandled bounce");
+                vfp_panic("unhandled bounce", inst);
                 vfp_raise_sigfpe(0, regs);
                 return;
         }
 
         /*
-         * If any of the status flags are set, update the FPSCR.
+         * Update the FPSCR with the additional exception flags.
          * Comparison instructions always return at least one of
          * these flags set.
          */
-        if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
-                fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
-
         fpscr |= exceptions;
 
         fmxr(FPSCR, fpscr);
@@ -220,35 +217,64 @@ static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
 /*
  * Package up a bounce condition.
  */
-void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
+void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
 {
-        u32 fpscr, orig_fpscr, exceptions, inst;
+        u32 fpscr, orig_fpscr, fpsid, exceptions;
 
         pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
 
         /*
-         * Enable access to the VFP so we can handle the bounce.
+         * At this point, FPEXC can have the following configuration:
+         *
+         *  EX DEX IXE
+         *  0   1   x   - synchronous exception
+         *  1   x   0   - asynchronous exception
+         *  1   x   1   - sychronous on VFP subarch 1 and asynchronous on later
+         *  0   0   1   - synchronous on VFP9 (non-standard subarch 1
+         *                implementation), undefined otherwise
+         *
+         * Clear various bits and enable access to the VFP so we can
+         * handle the bounce.
          */
-        fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_FPV2|FPEXC_INV|FPEXC_UFC|FPEXC_OFC|FPEXC_IOC));
+        fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
 
+        fpsid = fmrx(FPSID);
         orig_fpscr = fpscr = fmrx(FPSCR);
 
         /*
-         * If we are running with inexact exceptions enabled, we need to
-         * emulate the trigger instruction.  Note that as we're emulating
-         * the trigger instruction, we need to increment PC.
+         * Check for the special VFP subarch 1 and FPSCR.IXE bit case
          */
-        if (fpscr & FPSCR_IXE) {
-                regs->ARM_pc += 4;
+        if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT)
+            && (fpscr & FPSCR_IXE)) {
+                /*
+                 * Synchronous exception, emulate the trigger instruction
+                 */
                 goto emulate;
         }
 
-        barrier();
+        if (fpexc & FPEXC_EX) {
+                /*
+                 * Asynchronous exception. The instruction is read from FPINST
+                 * and the interrupted instruction has to be restarted.
+                 */
+                trigger = fmrx(FPINST);
+                regs->ARM_pc -= 4;
+        } else if (!(fpexc & FPEXC_DEX)) {
+                /*
+                 * Illegal combination of bits. It can be caused by an
+                 * unallocated VFP instruction but with FPSCR.IXE set and not
+                 * on VFP subarch 1.
+                 */
+                 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
+                 return;
+        }
 
         /*
-         * Modify fpscr to indicate the number of iterations remaining
+         * Modify fpscr to indicate the number of iterations remaining.
+         * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
+         * whether FPEXC.VECITR or FPSCR.LEN is used.
          */
-        if (fpexc & FPEXC_EX) {
+        if (fpexc & (FPEXC_EX | FPEXC_VV)) {
                 u32 len;
 
                 len = fpexc + (1 << FPEXC_LENGTH_BIT);
@@ -262,15 +288,15 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
          * FPEXC bounce reason, but this appears to be unreliable.
          * Emulate the bounced instruction instead.
          */
-        inst = fmrx(FPINST);
-        exceptions = vfp_emulate_instruction(inst, fpscr, regs);
+        exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
         if (exceptions)
-                vfp_raise_exceptions(exceptions, inst, orig_fpscr, regs);
+                vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
 
         /*
-         * If there isn't a second FP instruction, exit now.
+         * If there isn't a second FP instruction, exit now. Note that
+         * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
          */
-        if (!(fpexc & FPEXC_FPV2))
+        if (fpexc ^ (FPEXC_EX | FPEXC_FP2V))
                 return;
 
         /*
@@ -279,10 +305,9 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
          */
         barrier();
         trigger = fmrx(FPINST2);
-        orig_fpscr = fpscr = fmrx(FPSCR);
 
  emulate:
-        exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
+        exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
         if (exceptions)
                 vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
 }
@@ -306,16 +331,9 @@ static int __init vfp_init(void)
 {
         unsigned int vfpsid;
         unsigned int cpu_arch = cpu_architecture();
-        u32 access = 0;
 
-        if (cpu_arch >= CPU_ARCH_ARMv6) {
-                access = get_copro_access();
-
-                /*
-                 * Enable full access to VFP (cp10 and cp11)
-                 */
-                set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
-        }
+        if (cpu_arch >= CPU_ARCH_ARMv6)
+                vfp_enable(NULL);
 
         /*
          * First check that there is a VFP that we can use.
@@ -329,15 +347,9 @@ static int __init vfp_init(void)
         vfp_vector = vfp_null_entry;
 
         printk(KERN_INFO "VFP support v0.3: ");
-        if (VFP_arch) {
+        if (VFP_arch)
                 printk("not present\n");
-
-                /*
-                 * Restore the copro access register.
-                 */
-                if (cpu_arch >= CPU_ARCH_ARMv6)
-                        set_copro_access(access);
-        } else if (vfpsid & FPSID_NODOUBLE) {
+        else if (vfpsid & FPSID_NODOUBLE) {
                 printk("no double precision support\n");
         } else {
                 smp_call_function(vfp_enable, NULL, 1, 1);
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 25232ba08119..fc7ca86ac8bf 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -85,11 +85,26 @@ config BF522
         help
           BF522 Processor Support.
 
+config BF523
+        bool "BF523"
+        help
+          BF523 Processor Support.
+
+config BF524
+        bool "BF524"
+        help
+          BF524 Processor Support.
+
 config BF525
         bool "BF525"
         help
           BF525 Processor Support.
 
+config BF526
+        bool "BF526"
+        help
+          BF526 Processor Support.
+
 config BF527
         bool "BF527"
         help
@@ -198,7 +213,7 @@ endchoice
 
 config BF52x
         bool
-        depends on (BF522 || BF525 || BF527)
+        depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527)
         default y
 
 config BF53x
@@ -253,11 +268,6 @@ config MEM_MT48LC32M16A2TG_75
         depends on (BFIN527_EZKIT)
         default y
 
-config BFIN_SHARED_FLASH_ENET
-        bool
-        depends on (BFIN533_STAMP)
-        default y
-
 source "arch/blackfin/mach-bf527/Kconfig"
 source "arch/blackfin/mach-bf533/Kconfig"
 source "arch/blackfin/mach-bf561/Kconfig"
@@ -317,7 +327,7 @@ config VCO_MULT
         range 1 64
         default "22" if BFIN533_EZKIT
         default "45" if BFIN533_STAMP
-        default "20" if (BFIN537_STAMP || BFIN527_EZKIT)
+        default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT)
         default "22" if BFIN533_BLUETECHNIX_CM
         default "20" if BFIN537_BLUETECHNIX_CM
         default "20" if BFIN561_BLUETECHNIX_CM
@@ -354,7 +364,7 @@ config SCLK_DIV
         range 1 15
         default 5 if BFIN533_EZKIT
         default 5 if BFIN533_STAMP
-        default 4 if (BFIN537_STAMP || BFIN527_EZKIT)
+        default 4 if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT)
         default 5 if BFIN533_BLUETECHNIX_CM
         default 4 if BFIN537_BLUETECHNIX_CM
         default 4 if BFIN561_BLUETECHNIX_CM
@@ -371,7 +381,10 @@ config SCLK_DIV
 config MAX_VCO_HZ
         int
         default 600000000 if BF522
+        default 400000000 if BF523
+        default 400000000 if BF524
         default 600000000 if BF525
+        default 400000000 if BF526
         default 600000000 if BF527
         default 400000000 if BF531
         default 400000000 if BF532
@@ -383,6 +396,8 @@ config MAX_VCO_HZ
         default 533333333 if BF539
         default 600000000 if BF542
         default 533333333 if BF544
+        default 600000000 if BF547
+        default 600000000 if BF548
         default 533333333 if BF549
         default 600000000 if BF561
 
@@ -409,6 +424,7 @@ config MEM_SIZE
         default  32 if BFIN533_EZKIT
         default  64 if BFIN527_EZKIT
         default  64 if BFIN537_STAMP
+        default  64 if BFIN548_EZKIT
         default  64 if BFIN561_EZKIT
         default 128 if BFIN533_STAMP
         default  64 if PNAV10
@@ -416,6 +432,7 @@ config MEM_SIZE
 
 config MEM_ADD_WIDTH
         int "SDRAM Memory Address Width"
+        depends on (!BF54x)
         default  9 if BFIN533_EZKIT
         default  9 if BFIN561_EZKIT
         default  9 if H8606_HVSISTEMAS
@@ -424,6 +441,19 @@ config MEM_ADD_WIDTH
         default 11 if BFIN533_STAMP
         default 10 if PNAV10
 
+
+choice
+        prompt "DDR SDRAM Chip Type"
+        depends on BFIN548_EZKIT
+        default MEM_MT46V32M16_5B
+
+config MEM_MT46V32M16_6T
+        bool "MT46V32M16_6T"
+
+config MEM_MT46V32M16_5B
+        bool "MT46V32M16_5B"
+endchoice
+
 config ENET_FLASH_PIN
         int "PF port/pin used for flash and ethernet sharing"
         depends on (BFIN533_STAMP)
@@ -448,40 +478,6 @@ config BOOT_LOAD
           memory region is used to capture NULL pointer references as well
           as some core kernel functions.
 
-comment "LED Status Indicators"
-        depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
-
-config BFIN_ALIVE_LED
-        bool "Enable Board Alive"
-        depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
-        default n
-        help
-          Blink the LEDs you select when the kernel is running.  Helps detect
-          a hung kernel.
-
-config BFIN_ALIVE_LED_NUM
-        int "LED"
-        depends on BFIN_ALIVE_LED
-        range 1 3 if BFIN533_STAMP
-        default "3" if BFIN533_STAMP
-        help
-          Select the LED (marked on the board) for you to blink.
-
-config BFIN_IDLE_LED
-        bool "Enable System Load/Idle LED"
-        depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
-        default n
-        help
-          Blinks the LED you select when to determine kernel load.
-
-config BFIN_IDLE_LED_NUM
-        int "LED"
-        depends on BFIN_IDLE_LED
-        range 1 3 if BFIN533_STAMP
-        default "2" if BFIN533_STAMP
-        help
-          Select the LED (marked on the board) for you to blink.
-
 choice
         prompt "Blackfin Exception Scratch Register"
         default BFIN_SCRATCH_REG_RETN
@@ -528,41 +524,6 @@ config BFIN_SCRATCH_REG_CYCLES
 
 endchoice
 
-#
-# Sorry - but you need to put the hex address here -
-#
-
-# Flag Data register
-config BFIN_ALIVE_LED_PORT
-        hex
-        default 0xFFC00700 if (BFIN533_STAMP)
-
-# Peripheral Flag Direction Register
-config BFIN_ALIVE_LED_DPORT
-        hex
-        default 0xFFC00730 if (BFIN533_STAMP)
-
-config BFIN_ALIVE_LED_PIN
-        hex
-        default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
-        default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
-        default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
-
-config BFIN_IDLE_LED_PORT
-        hex
-        default 0xFFC00700 if (BFIN533_STAMP)
-
-# Peripheral Flag Direction Register
-config BFIN_IDLE_LED_DPORT
-        hex
-        default 0xFFC00730 if (BFIN533_STAMP)
-
-config BFIN_IDLE_LED_PIN
-        hex
-        default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
-        default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
-        default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
-
 endmenu
 
 
@@ -799,6 +760,15 @@ config L1_MAX_PIECE
           Set the max memory pieces for the L1 SRAM allocation algorithm.
           Min value is 16. Max value is 1024.
 
+
+config MPU
+        bool "Enable the memory protection unit (EXPERIMENTAL)"
+        default n
+        help
+          Use the processor's MPU to protect applications from accessing
+          memory they do not own.  This comes at a performance penalty
+          and is recommended only for debugging.
+
 comment "Asynchonous Memory Configuration"
 
 menu "EBIU_AMGCTL Global Control"
@@ -808,7 +778,6 @@ config C_AMCKEN
 
 config C_CDPRIO
         bool "DMA has priority over core for ext. accesses"
-        depends on !BF54x
         default n
 
 config C_B0PEN
@@ -949,8 +918,10 @@ endchoice
 config PM_WAKEUP_SIC_IWR
         hex "Wakeup Events (SIC_IWR)"
         depends on PM_WAKEUP_GPIO_BY_SIC_IWR
-        default 0x80000000 if (BF537 || BF536 || BF534)
-        default 0x100000 if (BF533 || BF532 || BF531)
+        default 0x8 if (BF537 || BF536 || BF534)
+        default 0x80 if (BF533 || BF532 || BF531)
+        default 0x80 if (BF54x)
+        default 0x80 if (BF52x)
 
 config PM_WAKEUP_GPIO_NUMBER
         int "Wakeup GPIO number"
diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile
index c47e000f8324..0edc402fef54 100644
--- a/arch/blackfin/Makefile
+++ b/arch/blackfin/Makefile
@@ -21,7 +21,10 @@ KBUILD_DEFCONFIG := BF537-STAMP_defconfig
 
 # setup the machine name and the machine dependent settings
 machine-$(CONFIG_BF522) := bf527
+machine-$(CONFIG_BF523) := bf527
+machine-$(CONFIG_BF524) := bf527
 machine-$(CONFIG_BF525) := bf527
+machine-$(CONFIG_BF526) := bf527
 machine-$(CONFIG_BF527) := bf527
 machine-$(CONFIG_BF531) := bf533
 machine-$(CONFIG_BF532) := bf533
@@ -39,7 +42,10 @@ MACHINE := $(machine-y)
 export MACHINE
 
 cpu-$(CONFIG_BF522) := bf522
+cpu-$(CONFIG_BF523) := bf523
+cpu-$(CONFIG_BF524) := bf524
 cpu-$(CONFIG_BF525) := bf525
+cpu-$(CONFIG_BF526) := bf526
 cpu-$(CONFIG_BF527) := bf527
 cpu-$(CONFIG_BF531) := bf531
 cpu-$(CONFIG_BF532) := bf532
@@ -76,6 +82,12 @@ core-y   += arch/$(ARCH)/mach-$(MACHINE)/
 core-y   += arch/$(ARCH)/mach-$(MACHINE)/boards/
 endif
 
+ifeq ($(CONFIG_MPU),y)
+core-y  += arch/$(ARCH)/kernel/cplb-mpu/
+else
+core-y  += arch/$(ARCH)/kernel/cplb-nompu/
+endif
+
 libs-y   += arch/$(ARCH)/lib/
 
 drivers-$(CONFIG_OPROFILE) += arch/$(ARCH)/oprofile/
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index fa6eb4e00fae..d59ee1530bd4 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.12
+# Linux kernel version: 2.6.22.14
+# Thu Nov 29 17:32:47 2007
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -153,8 +154,8 @@ CONFIG_BFIN527_EZKIT=y
 CONFIG_BF527_SPORT0_PORTG=y
 CONFIG_BF527_SPORT0_TSCLK_PG10=y
 # CONFIG_BF527_SPORT0_TSCLK_PG14 is not set
-# CONFIG_BF527_UART1_PORTF is not set
-CONFIG_BF527_UART1_PORTG=y
+CONFIG_BF527_UART1_PORTF=y
+# CONFIG_BF527_UART1_PORTG is not set
 # CONFIG_BF527_NAND_D_PORTF is not set
 CONFIG_BF527_NAND_D_PORTH=y
 
@@ -232,7 +233,7 @@ CONFIG_CLKIN_HZ=25000000
 # CONFIG_BFIN_KERNEL_CLOCK is not set
 CONFIG_MAX_VCO_HZ=600000000
 CONFIG_MIN_VCO_HZ=50000000
-CONFIG_MAX_SCLK_HZ=133000000
+CONFIG_MAX_SCLK_HZ=133333333
 CONFIG_MIN_SCLK_HZ=27000000
 
 #
@@ -626,8 +627,8 @@ CONFIG_BFIN_MAC_RMII=y
 # CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 CONFIG_NETDEV_1000=y
-CONFIG_NETDEV_10000=y
 # CONFIG_AX88180 is not set
+CONFIG_NETDEV_10000=y
 
 #
 # Wireless LAN
@@ -1183,7 +1184,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 #
 # CONFIG_PRINTK_TIME is not set
 CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_MAGIC_SYSRQ=y
+# CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1208,7 +1209,7 @@ CONFIG_ACCESS_CHECK=y
 # CONFIG_KEYS is not set
 CONFIG_SECURITY=y
 # CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+CONFIG_SECURITY_CAPABILITIES=m
 
 #
 # Cryptographic options
@@ -1219,7 +1220,7 @@ CONFIG_SECURITY_CAPABILITIES=y
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
+CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 4fdb49362ba3..811711f59a25 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.12
+# Linux kernel version: 2.6.22.16
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # Processor and Board Settings
 #
 # CONFIG_BF522 is not set
+# CONFIG_BF523 is not set
+# CONFIG_BF524 is not set
 # CONFIG_BF525 is not set
+# CONFIG_BF526 is not set
 # CONFIG_BF527 is not set
 # CONFIG_BF531 is not set
 # CONFIG_BF532 is not set
@@ -194,7 +197,7 @@ CONFIG_CLKIN_HZ=27000000
 # CONFIG_BFIN_KERNEL_CLOCK is not set
 CONFIG_MAX_VCO_HZ=750000000
 CONFIG_MIN_VCO_HZ=50000000
-CONFIG_MAX_SCLK_HZ=133000000
+CONFIG_MAX_SCLK_HZ=133333333
 CONFIG_MIN_SCLK_HZ=27000000
 
 #
@@ -267,6 +270,7 @@ CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_WB is not set
 CONFIG_BFIN_WT=y
 CONFIG_L1_MAX_PIECE=16
+# CONFIG_MPU is not set
 
 #
 # Asynchonous Memory Configuration
@@ -321,7 +325,7 @@ CONFIG_PM=y
 CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
 # CONFIG_PM_WAKEUP_BY_GPIO is not set
 # CONFIG_PM_WAKEUP_GPIO_API is not set
-CONFIG_PM_WAKEUP_SIC_IWR=0x100000
+CONFIG_PM_WAKEUP_SIC_IWR=0x80
 
 #
 # CPU Frequency scaling
@@ -510,7 +514,6 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_INTELEXT is not set
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_MW320D=m
 CONFIG_MTD_RAM=y
 CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
@@ -520,9 +523,6 @@ CONFIG_MTD_ROM=m
 #
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
-CONFIG_MTD_BF5xx=m
-CONFIG_BFIN_FLASH_SIZE=0x400000
-CONFIG_EBIU_FLASH_BASE=0x20000000
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -610,8 +610,8 @@ CONFIG_SMC91X=y
 # CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 CONFIG_NETDEV_1000=y
-CONFIG_NETDEV_10000=y
 # CONFIG_AX88180 is not set
+CONFIG_NETDEV_10000=y
 
 #
 # Wireless LAN
@@ -680,7 +680,6 @@ CONFIG_INPUT_EVDEV=m
 CONFIG_BFIN_SPORT=y
 # CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_AD5304 is not set
-# CONFIG_BF5xx_FBDMA is not set
 # CONFIG_VT is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index b04e8e533e9a..9b7123cf27a3 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.12
+# Linux kernel version: 2.6.22.16
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # Processor and Board Settings
 #
 # CONFIG_BF522 is not set
+# CONFIG_BF523 is not set
+# CONFIG_BF524 is not set
 # CONFIG_BF525 is not set
+# CONFIG_BF526 is not set
 # CONFIG_BF527 is not set
 # CONFIG_BF531 is not set
 # CONFIG_BF532 is not set
@@ -140,7 +143,6 @@ CONFIG_BF_REV_0_3=y
 CONFIG_BF53x=y
 CONFIG_BFIN_SINGLE_CORE=y
 CONFIG_MEM_MT48LC64M4A2FB_7E=y
-CONFIG_BFIN_SHARED_FLASH_ENET=y
 # CONFIG_BFIN533_EZKIT is not set
 CONFIG_BFIN533_STAMP=y
 # CONFIG_BFIN533_BLUETECHNIX_CM is not set
@@ -195,7 +197,7 @@ CONFIG_CLKIN_HZ=11059200
 # CONFIG_BFIN_KERNEL_CLOCK is not set
 CONFIG_MAX_VCO_HZ=750000000
 CONFIG_MIN_VCO_HZ=50000000
-CONFIG_MAX_SCLK_HZ=133000000
+CONFIG_MAX_SCLK_HZ=133333333
 CONFIG_MIN_SCLK_HZ=27000000
 
 #
@@ -215,18 +217,10 @@ CONFIG_MEM_ADD_WIDTH=11
 CONFIG_ENET_FLASH_PIN=0
 CONFIG_BOOT_LOAD=0x1000
 
-#
-# LED Status Indicators
-#
-# CONFIG_BFIN_ALIVE_LED is not set
-# CONFIG_BFIN_IDLE_LED is not set
+
 CONFIG_BFIN_SCRATCH_REG_RETN=y
 # CONFIG_BFIN_SCRATCH_REG_RETE is not set
 # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
-CONFIG_BFIN_ALIVE_LED_PORT=0xFFC00700
-CONFIG_BFIN_ALIVE_LED_DPORT=0xFFC00730
-CONFIG_BFIN_IDLE_LED_PORT=0xFFC00700
-CONFIG_BFIN_IDLE_LED_DPORT=0xFFC00730
 
 #
 # Blackfin Kernel Optimizations
@@ -279,6 +273,7 @@ CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_WB is not set
 CONFIG_BFIN_WT=y
 CONFIG_L1_MAX_PIECE=16
+# CONFIG_MPU is not set
 
 #
 # Asynchonous Memory Configuration
@@ -333,7 +328,7 @@ CONFIG_PM=y
 CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
 # CONFIG_PM_WAKEUP_BY_GPIO is not set
 # CONFIG_PM_WAKEUP_GPIO_API is not set
-CONFIG_PM_WAKEUP_SIC_IWR=0x100000
+CONFIG_PM_WAKEUP_SIC_IWR=0x80
 
 #
 # CPU Frequency scaling
@@ -522,7 +517,6 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_INTELEXT is not set
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_MW320D=m
 CONFIG_MTD_RAM=y
 CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
@@ -532,17 +526,6 @@ CONFIG_MTD_ROM=m
 #
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 # CONFIG_MTD_PHYSMAP is not set
-CONFIG_MTD_BF5xx=m
-CONFIG_BFIN_FLASH_SIZE=0x400000
-CONFIG_EBIU_FLASH_BASE=0x20000000
-
-#
-# FLASH_EBIU_AMBCTL Control
-#
-CONFIG_BFIN_FLASH_BANK_0=0x7BB0
-CONFIG_BFIN_FLASH_BANK_1=0x7BB0
-CONFIG_BFIN_FLASH_BANK_2=0x7BB0
-CONFIG_BFIN_FLASH_BANK_3=0x7BB0
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -630,8 +613,8 @@ CONFIG_SMC91X=y
 # CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 CONFIG_NETDEV_1000=y
-CONFIG_NETDEV_10000=y
 # CONFIG_AX88180 is not set
+CONFIG_NETDEV_10000=y
 
 #
 # Wireless LAN
@@ -687,7 +670,6 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_POWERMATE is not set
 # CONFIG_INPUT_YEALINK is not set
 # CONFIG_INPUT_UINPUT is not set
-# CONFIG_BF53X_PFBUTTONS is not set
 CONFIG_TWI_KEYPAD=m
 CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=39
 
@@ -711,8 +693,6 @@ CONFIG_BFIN_SPORT=y
 CONFIG_TWI_LCD=m
 CONFIG_TWI_LCD_SLAVE_ADDR=34
 # CONFIG_AD5304 is not set
-# CONFIG_BF5xx_TEA5764 is not set
-# CONFIG_BF5xx_FBDMA is not set
 # CONFIG_VT is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 
@@ -778,7 +758,6 @@ CONFIG_I2C_ALGOBIT=m
 #
 # I2C Hardware Bus support
 #
-# CONFIG_I2C_BLACKFIN_GPIO is not set
 # CONFIG_I2C_GPIO is not set
 # CONFIG_I2C_OCORES is not set
 # CONFIG_I2C_PARPORT_LIGHT is not set
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index f812b66318b9..b37ccc681e7a 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.12
+# Linux kernel version: 2.6.22.16
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # Processor and Board Settings
 #
 # CONFIG_BF522 is not set
+# CONFIG_BF523 is not set
+# CONFIG_BF524 is not set
 # CONFIG_BF525 is not set
+# CONFIG_BF526 is not set
 # CONFIG_BF527 is not set
 # CONFIG_BF531 is not set
 # CONFIG_BF532 is not set
@@ -170,6 +173,7 @@ CONFIG_IRQ_WATCH=13
 CONFIG_BFIN537_STAMP=y
 # CONFIG_BFIN537_BLUETECHNIX_CM is not set
 # CONFIG_PNAV10 is not set
+# CONFIG_CAMSIG_MINOTAUR is not set
 # CONFIG_GENERIC_BF537_BOARD is not set
 
 #
@@ -201,7 +205,7 @@ CONFIG_CLKIN_HZ=25000000
 # CONFIG_BFIN_KERNEL_CLOCK is not set
 CONFIG_MAX_VCO_HZ=600000000
 CONFIG_MIN_VCO_HZ=50000000
-CONFIG_MAX_SCLK_HZ=133000000
+CONFIG_MAX_SCLK_HZ=133333333
 CONFIG_MIN_SCLK_HZ=27000000
 
 #
@@ -274,6 +278,7 @@ CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_WB is not set
 CONFIG_BFIN_WT=y
 CONFIG_L1_MAX_PIECE=16
+# CONFIG_MPU is not set
 
 #
 # Asynchonous Memory Configuration
@@ -328,7 +333,7 @@ CONFIG_PM=y
 CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR=y
 # CONFIG_PM_WAKEUP_BY_GPIO is not set
 # CONFIG_PM_WAKEUP_GPIO_API is not set
-CONFIG_PM_WAKEUP_SIC_IWR=0x80000000
+CONFIG_PM_WAKEUP_SIC_IWR=0x8
 
 #
 # CPU Frequency scaling
@@ -483,7 +488,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
 
 #
 # User Modules And Translation Layers
@@ -500,8 +505,8 @@ CONFIG_MTD_BLOCK=y
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
-CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_CFI=m
+# CONFIG_MTD_JEDECPROBE is not set
 CONFIG_MTD_GEN_PROBE=m
 # CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
@@ -515,9 +520,9 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
 # CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_AMDSTD=m
 # CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_MW320D=m
+CONFIG_MTD_CFI_UTIL=m
 CONFIG_MTD_RAM=y
 CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
@@ -525,11 +530,11 @@ CONFIG_MTD_ROM=m
 #
 # Mapping drivers for chip access
 #
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_PHYSMAP is not set
-CONFIG_MTD_BF5xx=m
-CONFIG_BFIN_FLASH_SIZE=0x400000
-CONFIG_EBIU_FLASH_BASE=0x20000000
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PHYSMAP_START=0x20000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -647,8 +652,8 @@ CONFIG_BFIN_RX_DESC_NUM=20
 # CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 CONFIG_NETDEV_1000=y
-CONFIG_NETDEV_10000=y
 # CONFIG_AX88180 is not set
+CONFIG_NETDEV_10000=y
 
 #
 # Wireless LAN
@@ -704,7 +709,6 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_POWERMATE is not set
 # CONFIG_INPUT_YEALINK is not set
 # CONFIG_INPUT_UINPUT is not set
-# CONFIG_BF53X_PFBUTTONS is not set
 CONFIG_TWI_KEYPAD=m
 CONFIG_BFIN_TWIKEYPAD_IRQ_PFX=72
 
@@ -728,8 +732,6 @@ CONFIG_BFIN_SPORT=y
 CONFIG_TWI_LCD=m
 CONFIG_TWI_LCD_SLAVE_ADDR=34
 # CONFIG_AD5304 is not set
-# CONFIG_BF5xx_TEA5764 is not set
-# CONFIG_BF5xx_FBDMA is not set
 # CONFIG_VT is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 
@@ -802,7 +804,6 @@ CONFIG_I2C_CHARDEV=m
 #
 # I2C Hardware Bus support
 #
-# CONFIG_I2C_BLACKFIN_GPIO is not set
 CONFIG_I2C_BLACKFIN_TWI=m
 CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
 # CONFIG_I2C_GPIO is not set
@@ -957,6 +958,7 @@ CONFIG_LQ035_SLAVE_ADDR=0x58
 # CONFIG_FB_BFIN_LANDSCAPE is not set
 # CONFIG_FB_BFIN_BGR is not set
 # CONFIG_FB_BFIN_T350MCQB is not set
+# CONFIG_FB_HITACHI_TX09 is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_LOGO is not set
@@ -1008,12 +1010,22 @@ CONFIG_SND_BFIN_AD73311_SE=4
 #
 # System on Chip audio support
 #
-# CONFIG_SND_SOC is not set
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_SOC=m
+CONFIG_SND_BF5XX_SOC=m
+CONFIG_SND_BF5XX_SOC_AC97=m
+# CONFIG_SND_BF5XX_SOC_WM8750 is not set
+# CONFIG_SND_BF5XX_SOC_WM8731 is not set
+CONFIG_SND_BF5XX_SOC_BF5xx=m
+CONFIG_SND_BF5XX_SPORT_NUM=0
+# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_SOC_AD1980=m
 
 #
 # Open Sound System
 #
 # CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=m
 
 #
 # HID Devices
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index 48367cc9fe35..fd702161ef59 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.12
+# Linux kernel version: 2.6.22.16
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # Processor and Board Settings
 #
 # CONFIG_BF522 is not set
+# CONFIG_BF523 is not set
+# CONFIG_BF524 is not set
 # CONFIG_BF525 is not set
+# CONFIG_BF526 is not set
 # CONFIG_BF527 is not set
 # CONFIG_BF531 is not set
 # CONFIG_BF532 is not set
@@ -126,8 +129,8 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # CONFIG_BF542 is not set
 # CONFIG_BF544 is not set
 # CONFIG_BF547 is not set
-# CONFIG_BF548 is not set
-CONFIG_BF549=y
+CONFIG_BF548=y
+# CONFIG_BF549 is not set
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_0_0=y
 # CONFIG_BF_REV_0_1 is not set
@@ -265,9 +268,9 @@ CONFIG_PINT3_ASSIGN=0x02020303
 #
 CONFIG_CLKIN_HZ=25000000
 # CONFIG_BFIN_KERNEL_CLOCK is not set
-CONFIG_MAX_VCO_HZ=533000000
+CONFIG_MAX_VCO_HZ=600000000
 CONFIG_MIN_VCO_HZ=50000000
-CONFIG_MAX_SCLK_HZ=133000000
+CONFIG_MAX_SCLK_HZ=133333333
 CONFIG_MIN_SCLK_HZ=27000000
 
 #
@@ -283,7 +286,8 @@ CONFIG_HZ=250
 # Memory Setup
 #
 CONFIG_MEM_SIZE=64
-CONFIG_MEM_ADD_WIDTH=10
+# CONFIG_MEM_MT46V32M16_6T is not set
+CONFIG_MEM_MT46V32M16_5B=y
 CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y
 # CONFIG_BFIN_SCRATCH_REG_RETE is not set
@@ -340,6 +344,7 @@ CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_WB is not set
 CONFIG_BFIN_WT=y
 CONFIG_L1_MAX_PIECE=16
+# CONFIG_MPU is not set
 
 #
 # Asynchonous Memory Configuration
@@ -349,6 +354,7 @@ CONFIG_L1_MAX_PIECE=16
 # EBIU_AMGCTL Global Control
 #
 CONFIG_C_AMCKEN=y
+# CONFIG_C_CDPRIO is not set
 # CONFIG_C_AMBEN is not set
 # CONFIG_C_AMBEN_B0 is not set
 # CONFIG_C_AMBEN_B0_B1 is not set
@@ -362,9 +368,9 @@ CONFIG_BANK_0=0x7BB0
 CONFIG_BANK_1=0x5554
 CONFIG_BANK_2=0x7BB0
 CONFIG_BANK_3=0x99B3
-CONFIG_EBUI_MBSCTLVAL=0x0
-CONFIG_EBUI_MODEVAL=0x1
-CONFIG_EBUI_FCTLVAL=0x6
+CONFIG_EBIU_MBSCTLVAL=0x0
+CONFIG_EBIU_MODEVAL=0x1
+CONFIG_EBIU_FCTLVAL=0x6
 
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
@@ -537,7 +543,6 @@ CONFIG_MTD_CFI_I2=y
 CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
-# CONFIG_MTD_MW320D is not set
 CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
 # CONFIG_MTD_ROM is not set
@@ -549,9 +554,8 @@ CONFIG_MTD_RAM=y
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_PHYSMAP_START=0x20000000
-CONFIG_MTD_PHYSMAP_LEN=0x400000
+CONFIG_MTD_PHYSMAP_LEN=0
 CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-# CONFIG_MTD_BF5xx is not set
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -690,8 +694,8 @@ CONFIG_MII=y
 CONFIG_SMSC911X=y
 # CONFIG_DM9000 is not set
 CONFIG_NETDEV_1000=y
-CONFIG_NETDEV_10000=y
 # CONFIG_AX88180 is not set
+CONFIG_NETDEV_10000=y
 
 #
 # Wireless LAN
@@ -719,7 +723,7 @@ CONFIG_NETDEV_10000=y
 #
 # Input device support
 #
-CONFIG_INPUT=m
+CONFIG_INPUT=y
 # CONFIG_INPUT_FF_MEMLESS is not set
 # CONFIG_INPUT_POLLDEV is not set
 
@@ -745,7 +749,8 @@ CONFIG_INPUT_KEYBOARD=y
 # CONFIG_KEYBOARD_NEWTON is not set
 # CONFIG_KEYBOARD_STOWAWAY is not set
 # CONFIG_KEYBOARD_GPIO is not set
-CONFIG_KEYBOARD_BFIN=m
+CONFIG_KEYBOARD_BFIN=y
+# CONFIG_KEYBOARD_OPENCORES is not set
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
@@ -768,7 +773,6 @@ CONFIG_INPUT_MISC=y
 # CONFIG_INPUT_POWERMATE is not set
 # CONFIG_INPUT_YEALINK is not set
 # CONFIG_INPUT_UINPUT is not set
-# CONFIG_BF53X_PFBUTTONS is not set
 # CONFIG_TWI_KEYPAD is not set
 
 #
@@ -786,13 +790,16 @@ CONFIG_INPUT_MISC=y
 # CONFIG_BF5xx_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
 # CONFIG_BF5xx_PPI is not set
+CONFIG_BFIN_OTP=y
+# CONFIG_BFIN_OTP_WRITE_ENABLE is not set
 # CONFIG_BFIN_SPORT is not set
 # CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_TWI_LCD is not set
 # CONFIG_AD5304 is not set
-# CONFIG_BF5xx_TEA5764 is not set
-# CONFIG_BF5xx_FBDMA is not set
-# CONFIG_VT is not set
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 
 #
@@ -858,7 +865,6 @@ CONFIG_I2C_CHARDEV=y
 #
 # I2C Hardware Bus support
 #
-# CONFIG_I2C_BLACKFIN_GPIO is not set
 CONFIG_I2C_BLACKFIN_TWI=y
 CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=50
 # CONFIG_I2C_GPIO is not set
@@ -976,12 +982,12 @@ CONFIG_DAB=y
 #
 # CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_VGASTATE is not set
-CONFIG_FB=m
+CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 # CONFIG_FB_DDC is not set
-CONFIG_FB_CFB_FILLRECT=m
-CONFIG_FB_CFB_COPYAREA=m
-CONFIG_FB_CFB_IMAGEBLIT=m
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
 # CONFIG_FB_SYS_FILLRECT is not set
 # CONFIG_FB_SYS_COPYAREA is not set
 # CONFIG_FB_SYS_IMAGEBLIT is not set
@@ -998,11 +1004,34 @@ CONFIG_FB_DEFERRED_IO=y
 #
 # CONFIG_FB_BFIN_7171 is not set
 # CONFIG_FB_BFIN_7393 is not set
-CONFIG_FB_BF54X_LQ043=m
+CONFIG_FB_BF54X_LQ043=y
 # CONFIG_FB_BFIN_T350MCQB is not set
 # CONFIG_FB_S1D13XXX is not set
 # CONFIG_FB_VIRTUAL is not set
-# CONFIG_LOGO is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+# CONFIG_FONT_8x16 is not set
+CONFIG_FONT_6x11=y
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+# CONFIG_LOGO_BLACKFIN_VGA16 is not set
+CONFIG_LOGO_BLACKFIN_CLUT224=y
 
 #
 # Sound
@@ -1051,7 +1080,8 @@ CONFIG_SND_BF5XX_SOC_BF548_EZKIT=y
 # CONFIG_SND_BF5XX_SOC_WM8750 is not set
 # CONFIG_SND_BF5XX_SOC_WM8731 is not set
 CONFIG_SND_BF5XX_SPORT_NUM=0
-# CONFIG_SND_BF5XX_HAVE_COLD_RESET is not set
+CONFIG_SND_BF5XX_HAVE_COLD_RESET=y
+CONFIG_SND_BF5XX_RESET_GPIO_NUM=19
 CONFIG_SND_SOC_AD1980=y
 
 #
@@ -1403,7 +1433,7 @@ CONFIG_NLS_UTF8=m
 #
 # CONFIG_PRINTK_TIME is not set
 CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_MAGIC_SYSRQ=y
+# CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
@@ -1428,7 +1458,7 @@ CONFIG_ACCESS_CHECK=y
 # CONFIG_KEYS is not set
 CONFIG_SECURITY=y
 # CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+CONFIG_SECURITY_CAPABILITIES=m
 
 #
 # Cryptographic options
@@ -1439,7 +1469,7 @@ CONFIG_SECURITY_CAPABILITIES=y
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
+CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index e9f100b45eb1..8546994939fb 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.12
+# Linux kernel version: 2.6.22.16
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -115,7 +115,10 @@ CONFIG_PREEMPT_VOLUNTARY=y
 # Processor and Board Settings
 #
 # CONFIG_BF522 is not set
+# CONFIG_BF523 is not set
+# CONFIG_BF524 is not set
 # CONFIG_BF525 is not set
+# CONFIG_BF526 is not set
 # CONFIG_BF527 is not set
 # CONFIG_BF531 is not set
 # CONFIG_BF532 is not set
@@ -238,7 +241,7 @@ CONFIG_CLKIN_HZ=30000000
 # CONFIG_BFIN_KERNEL_CLOCK is not set
 CONFIG_MAX_VCO_HZ=600000000
 CONFIG_MIN_VCO_HZ=50000000
-CONFIG_MAX_SCLK_HZ=133000000
+CONFIG_MAX_SCLK_HZ=133333333
 CONFIG_MIN_SCLK_HZ=27000000
 
 #
@@ -311,6 +314,7 @@ CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_WB is not set
 CONFIG_BFIN_WT=y
 CONFIG_L1_MAX_PIECE=16
+# CONFIG_MPU is not set
 
 #
 # Asynchonous Memory Configuration
@@ -512,7 +516,7 @@ CONFIG_MTD=y
 # CONFIG_MTD_CONCAT is not set
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
 
 #
 # User Modules And Translation Layers
@@ -529,8 +533,8 @@ CONFIG_MTD_BLOCK=y
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
-CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_CFI=m
+# CONFIG_MTD_JEDECPROBE is not set
 CONFIG_MTD_GEN_PROBE=m
 # CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
@@ -544,9 +548,9 @@ CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
 # CONFIG_MTD_CFI_INTELEXT is not set
-# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_AMDSTD=m
 # CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_MW320D=m
+CONFIG_MTD_CFI_UTIL=m
 CONFIG_MTD_RAM=y
 CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
@@ -554,12 +558,11 @@ CONFIG_MTD_ROM=m
 #
 # Mapping drivers for chip access
 #
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_EZKIT561 is not set
-CONFIG_MTD_BF5xx=m
-CONFIG_BFIN_FLASH_SIZE=0x0400000
-CONFIG_EBIU_FLASH_BASE=0x20000000
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PHYSMAP_START=0x20000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -647,8 +650,8 @@ CONFIG_SMC91X=y
 # CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
 CONFIG_NETDEV_1000=y
-CONFIG_NETDEV_10000=y
 # CONFIG_AX88180 is not set
+CONFIG_NETDEV_10000=y
 
 #
 # Wireless LAN
@@ -717,7 +720,6 @@ CONFIG_INPUT_EVDEV=m
 # CONFIG_BFIN_SPORT is not set
 # CONFIG_BFIN_TIMER_LATENCY is not set
 # CONFIG_AD5304 is not set
-# CONFIG_BF5xx_FBDMA is not set
 # CONFIG_VT is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index 8a4cfb293b27..318b9b692a48 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -7,7 +7,7 @@ extra-y := init_task.o vmlinux.lds
 obj-y := \
         entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
         sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
-        fixed_code.o cplbinit.o cacheinit.o reboot.o bfin_gpio.o
+        fixed_code.o reboot.o bfin_gpio.o
 
 obj-$(CONFIG_BFIN_GPTIMERS)          += gptimers.o
 obj-$(CONFIG_MODULES)                += module.o
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index b54446055a43..fa9debe8d5f4 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -339,13 +339,13 @@ EXPORT_SYMBOL(set_dma_config);
 
 unsigned short
 set_bfin_dma_config(char direction, char flow_mode,
-                    char intr_mode, char dma_mode, char width)
+                    char intr_mode, char dma_mode, char width, char syncmode)
 {
         unsigned short config;
 
         config =
             ((direction << 1) | (width << 2) | (dma_mode << 4) |
-             (intr_mode << 6) | (flow_mode << 12) | RESTART);
+             (intr_mode << 6) | (flow_mode << 12) | (syncmode << 5));
         return config;
 }
 EXPORT_SYMBOL(set_bfin_dma_config);
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index ce85d4bf34ca..6bbe0a2fccb8 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -7,7 +7,7 @@
  * Description:  GPIO Abstraction Layer
  *
  * Modified:
- *               Copyright 2007 Analog Devices Inc.
+ *               Copyright 2008 Analog Devices Inc.
  *
  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  *
@@ -83,6 +83,7 @@
 #include <linux/delay.h>
 #include <linux/module.h>
 #include <linux/err.h>
+#include <linux/proc_fs.h>
 #include <asm/blackfin.h>
 #include <asm/gpio.h>
 #include <asm/portmux.h>
@@ -136,7 +137,6 @@ static unsigned short *port_fer[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
         (unsigned short *) PORTG_FER,
         (unsigned short *) PORTH_FER,
 };
-
 #endif
 
 #ifdef BF527_FAMILY
@@ -178,15 +178,13 @@ static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
 #endif
 
 static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
-static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS + 16)];
+static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
 
-#define MAX_RESOURCES           256
 #define RESOURCE_LABEL_SIZE     16
 
-struct str_ident {
+static struct str_ident {
         char name[RESOURCE_LABEL_SIZE];
-} *str_ident;
-
+} str_ident[MAX_RESOURCES];
 
 #ifdef CONFIG_PM
 static unsigned short wakeup_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
@@ -212,7 +210,7 @@ static unsigned int sic_iwr_irqs[gpio_bank(MAX_BLACKFIN_GPIOS)] = {IRQ_PROG0_INT
 #endif /* CONFIG_PM */
 
 #if defined(BF548_FAMILY)
-inline int check_gpio(unsigned short gpio)
+inline int check_gpio(unsigned gpio)
 {
         if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
             || gpio == GPIO_PH14 || gpio == GPIO_PH15
@@ -222,7 +220,7 @@ inline int check_gpio(unsigned short gpio)
         return 0;
 }
 #else
-inline int check_gpio(unsigned short gpio)
+inline int check_gpio(unsigned gpio)
 {
         if (gpio >= MAX_BLACKFIN_GPIOS)
                 return -EINVAL;
@@ -230,9 +228,13 @@ inline int check_gpio(unsigned short gpio)
 }
 #endif
 
-static void set_label(unsigned short ident, const char *label)
+void gpio_error(unsigned gpio)
 {
+        printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
+}
 
+static void set_label(unsigned short ident, const char *label)
+{
         if (label && str_ident) {
                 strncpy(str_ident[ident].name, label,
                          RESOURCE_LABEL_SIZE);
@@ -250,6 +252,11 @@ static char *get_label(unsigned short ident)
 
 static int cmp_label(unsigned short ident, const char *label)
 {
+        if (label == NULL) {
+                dump_stack();
+                printk(KERN_ERR "Please provide none-null label\n");
+        }
+
         if (label && str_ident)
                 return strncmp(str_ident[ident].name,
                                  label, strlen(label));
@@ -258,7 +265,7 @@ static int cmp_label(unsigned short ident, const char *label)
 }
 
 #if defined(BF527_FAMILY) || defined(BF537_FAMILY)
-static void port_setup(unsigned short gpio, unsigned short usage)
+static void port_setup(unsigned gpio, unsigned short usage)
 {
         if (!check_gpio(gpio)) {
                 if (usage == GPIO_USAGE)
@@ -269,7 +276,7 @@ static void port_setup(unsigned short gpio, unsigned short usage)
         }
 }
 #elif defined(BF548_FAMILY)
-static void port_setup(unsigned short gpio, unsigned short usage)
+static void port_setup(unsigned gpio, unsigned short usage)
 {
         if (usage == GPIO_USAGE)
                 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
@@ -390,7 +397,7 @@ inline void portmux_setup(unsigned short portno, unsigned short function)
 #endif
 
 #ifndef BF548_FAMILY
-static void default_gpio(unsigned short gpio)
+static void default_gpio(unsigned gpio)
 {
         unsigned short bank, bitmask;
         unsigned long flags;
@@ -410,7 +417,6 @@ static void default_gpio(unsigned short gpio)
         gpio_bankb[bank]->edge &= ~bitmask;
         AWA_DUMMY_READ(edge);
         local_irq_restore(flags);
-
 }
 #else
 # define default_gpio(...)  do { } while (0)
@@ -418,12 +424,6 @@ static void default_gpio(unsigned short gpio)
 
 static int __init bfin_gpio_init(void)
 {
-        str_ident = kcalloc(MAX_RESOURCES,
-                                 sizeof(struct str_ident), GFP_KERNEL);
-        if (str_ident == NULL)
-                return -ENOMEM;
-
-        memset(str_ident, 0, MAX_RESOURCES * sizeof(struct str_ident));
 
         printk(KERN_INFO "Blackfin GPIO Controller\n");
 
@@ -454,10 +454,9 @@ arch_initcall(bfin_gpio_init);
 /* Set a specific bit */
 
 #define SET_GPIO(name) \
-void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
+void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 { \
         unsigned long flags; \
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
         local_irq_save(flags); \
         if (arg) \
                 gpio_bankb[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
@@ -477,10 +476,9 @@ SET_GPIO(both)
 
 #if ANOMALY_05000311 || ANOMALY_05000323
 #define SET_GPIO_SC(name) \
-void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
+void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 { \
         unsigned long flags; \
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
         local_irq_save(flags); \
         if (arg) \
                 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
@@ -492,9 +490,8 @@ void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
 EXPORT_SYMBOL(set_gpio_ ## name);
 #else
 #define SET_GPIO_SC(name) \
-void set_gpio_ ## name(unsigned short gpio, unsigned short arg) \
+void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
 { \
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))); \
         if (arg) \
                 gpio_bankb[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
         else \
@@ -508,19 +505,17 @@ SET_GPIO_SC(maskb)
 SET_GPIO_SC(data)
 
 #if ANOMALY_05000311 || ANOMALY_05000323
-void set_gpio_toggle(unsigned short gpio)
+void set_gpio_toggle(unsigned gpio)
 {
         unsigned long flags;
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
         local_irq_save(flags);
         gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
         AWA_DUMMY_READ(toggle);
         local_irq_restore(flags);
 }
 #else
-void set_gpio_toggle(unsigned short gpio)
+void set_gpio_toggle(unsigned gpio)
 {
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
         gpio_bankb[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
 }
 #endif
@@ -531,7 +526,7 @@ EXPORT_SYMBOL(set_gpio_toggle);
 
 #if ANOMALY_05000311 || ANOMALY_05000323
 #define SET_GPIO_P(name) \
-void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
+void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
 { \
         unsigned long flags; \
         local_irq_save(flags); \
@@ -542,7 +537,7 @@ void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
 EXPORT_SYMBOL(set_gpiop_ ## name);
 #else
 #define SET_GPIO_P(name) \
-void set_gpiop_ ## name(unsigned short gpio, unsigned short arg) \
+void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
 { \
         gpio_bankb[gpio_bank(gpio)]->name = arg; \
 } \
@@ -558,11 +553,10 @@ SET_GPIO_P(both)
 SET_GPIO_P(maska)
 SET_GPIO_P(maskb)
 
-
 /* Get a specific bit */
 #if ANOMALY_05000311 || ANOMALY_05000323
 #define GET_GPIO(name) \
-unsigned short get_gpio_ ## name(unsigned short gpio) \
+unsigned short get_gpio_ ## name(unsigned gpio) \
 { \
         unsigned long flags; \
         unsigned short ret; \
@@ -575,7 +569,7 @@ unsigned short get_gpio_ ## name(unsigned short gpio) \
 EXPORT_SYMBOL(get_gpio_ ## name);
 #else
 #define GET_GPIO(name) \
-unsigned short get_gpio_ ## name(unsigned short gpio) \
+unsigned short get_gpio_ ## name(unsigned gpio) \
 { \
         return (0x01 & (gpio_bankb[gpio_bank(gpio)]->name >> gpio_sub_n(gpio))); \
 } \
@@ -595,7 +589,7 @@ GET_GPIO(maskb)
 
 #if ANOMALY_05000311 || ANOMALY_05000323
 #define GET_GPIO_P(name) \
-unsigned short get_gpiop_ ## name(unsigned short gpio) \
+unsigned short get_gpiop_ ## name(unsigned gpio) \
 { \
         unsigned long flags; \
         unsigned short ret; \
@@ -608,7 +602,7 @@ unsigned short get_gpiop_ ## name(unsigned short gpio) \
 EXPORT_SYMBOL(get_gpiop_ ## name);
 #else
 #define GET_GPIO_P(name) \
-unsigned short get_gpiop_ ## name(unsigned short gpio) \
+unsigned short get_gpiop_ ## name(unsigned gpio) \
 { \
         return (gpio_bankb[gpio_bank(gpio)]->name);\
 } \
@@ -645,7 +639,7 @@ GET_GPIO_P(maskb)
 *************************************************************
 * MODIFICATION HISTORY :
 **************************************************************/
-int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
+int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
 {
         unsigned long flags;
 
@@ -653,7 +647,6 @@ int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
                 return -EINVAL;
 
         local_irq_save(flags);
-
         wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
         wakeup_flags_map[gpio] = type;
         local_irq_restore(flags);
@@ -662,7 +655,7 @@ int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type)
 }
 EXPORT_SYMBOL(gpio_pm_wakeup_request);
 
-void gpio_pm_wakeup_free(unsigned short gpio)
+void gpio_pm_wakeup_free(unsigned gpio)
 {
         unsigned long flags;
 
@@ -677,7 +670,7 @@ void gpio_pm_wakeup_free(unsigned short gpio)
 }
 EXPORT_SYMBOL(gpio_pm_wakeup_free);
 
-static int bfin_gpio_wakeup_type(unsigned short gpio, unsigned char type)
+static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
 {
         port_setup(gpio, GPIO_USAGE);
         set_gpio_dir(gpio, 0);
@@ -784,6 +777,14 @@ void gpio_pm_restore(void)
 }
 
 #endif
+#else /* BF548_FAMILY */
+
+unsigned short get_gpio_dir(unsigned gpio)
+{
+        return (0x01 & (gpio_array[gpio_bank(gpio)]->port_dir_clear >> gpio_sub_n(gpio)));
+}
+EXPORT_SYMBOL(get_gpio_dir);
+
 #endif /* BF548_FAMILY */
 
 /***********************************************************
@@ -1028,7 +1029,7 @@ EXPORT_SYMBOL(peripheral_free_list);
 * MODIFICATION HISTORY :
 **************************************************************/
 
-int gpio_request(unsigned short gpio, const char *label)
+int gpio_request(unsigned gpio, const char *label)
 {
         unsigned long flags;
 
@@ -1075,7 +1076,7 @@ int gpio_request(unsigned short gpio, const char *label)
 }
 EXPORT_SYMBOL(gpio_request);
 
-void gpio_free(unsigned short gpio)
+void gpio_free(unsigned gpio)
 {
         unsigned long flags;
 
@@ -1085,7 +1086,7 @@ void gpio_free(unsigned short gpio)
         local_irq_save(flags);
 
         if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
-                printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
+                gpio_error(gpio);
                 dump_stack();
                 local_irq_restore(flags);
                 return;
@@ -1101,44 +1102,55 @@ void gpio_free(unsigned short gpio)
 }
 EXPORT_SYMBOL(gpio_free);
 
+
 #ifdef BF548_FAMILY
-void gpio_direction_input(unsigned short gpio)
+int gpio_direction_input(unsigned gpio)
 {
         unsigned long flags;
 
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
+        if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+                gpio_error(gpio);
+                return -EINVAL;
+        }
 
         local_irq_save(flags);
         gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
         gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
         local_irq_restore(flags);
+
+        return 0;
 }
 EXPORT_SYMBOL(gpio_direction_input);
 
-void gpio_direction_output(unsigned short gpio)
+int gpio_direction_output(unsigned gpio, int value)
 {
         unsigned long flags;
 
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
+        if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+                gpio_error(gpio);
+                return -EINVAL;
+        }
 
         local_irq_save(flags);
         gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
+        gpio_set_value(gpio, value);
         gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
         local_irq_restore(flags);
+
+        return 0;
 }
 EXPORT_SYMBOL(gpio_direction_output);
 
-void gpio_set_value(unsigned short gpio, unsigned short arg)
+void gpio_set_value(unsigned gpio, int arg)
 {
         if (arg)
                 gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
         else
                 gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
-
 }
 EXPORT_SYMBOL(gpio_set_value);
 
-unsigned short gpio_get_value(unsigned short gpio)
+int gpio_get_value(unsigned gpio)
 {
         return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
 }
@@ -1146,31 +1158,47 @@ EXPORT_SYMBOL(gpio_get_value);
 
 #else
 
-void gpio_direction_input(unsigned short gpio)
+int gpio_direction_input(unsigned gpio)
 {
         unsigned long flags;
 
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
+        if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+                gpio_error(gpio);
+                return -EINVAL;
+        }
 
         local_irq_save(flags);
         gpio_bankb[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
         gpio_bankb[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
         AWA_DUMMY_READ(inen);
         local_irq_restore(flags);
+
+        return 0;
 }
 EXPORT_SYMBOL(gpio_direction_input);
 
-void gpio_direction_output(unsigned short gpio)
+int gpio_direction_output(unsigned gpio, int value)
 {
         unsigned long flags;
 
-        BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
+        if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+                gpio_error(gpio);
+                return -EINVAL;
+        }
 
         local_irq_save(flags);
         gpio_bankb[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
+
+        if (value)
+                gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
+        else
+                gpio_bankb[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
+
         gpio_bankb[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
         AWA_DUMMY_READ(dir);
         local_irq_restore(flags);
+
+        return 0;
 }
 EXPORT_SYMBOL(gpio_direction_output);
 
@@ -1190,7 +1218,40 @@ void bfin_gpio_reset_spi0_ssel1(void)
 
         port_setup(gpio, GPIO_USAGE);
         gpio_bankb[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
+        AWA_DUMMY_READ(data_set);
         udelay(1);
 }
 
 #endif /*BF548_FAMILY */
+
+#if defined(CONFIG_PROC_FS)
+static int gpio_proc_read(char *buf, char **start, off_t offset,
+                          int len, int *unused_i, void *unused_v)
+{
+        int c, outlen = 0;
+
+        for (c = 0; c < MAX_RESOURCES; c++) {
+                if (!check_gpio(c) && (reserved_gpio_map[gpio_bank(c)] & gpio_bit(c)))
+                        len = sprintf(buf, "GPIO_%d: %s \t\tGPIO %s\n", c,
+                                 get_label(c), get_gpio_dir(c) ? "OUTPUT" : "INPUT");
+                else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
+                        len = sprintf(buf, "GPIO_%d: %s \t\tPeripheral\n", c, get_label(c));
+                else
+                        continue;
+                buf += len;
+                outlen += len;
+        }
+        return outlen;
+}
+
+static __init int gpio_register_proc(void)
+{
+        struct proc_dir_entry *proc_gpio;
+
+        proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
+        if (proc_gpio)
+                proc_gpio->read_proc = gpio_proc_read;
+        return proc_gpio != NULL;
+}
+__initcall(gpio_register_proc);
+#endif
diff --git a/arch/blackfin/kernel/cplb-mpu/Makefile b/arch/blackfin/kernel/cplb-mpu/Makefile
new file mode 100644
index 000000000000..286b69357f97
--- /dev/null
+++ b/arch/blackfin/kernel/cplb-mpu/Makefile
@@ -0,0 +1,8 @@
+#
+# arch/blackfin/kernel/cplb-nompu/Makefile
+#
+
+obj-y := cplbinit.o cacheinit.o cplbmgr.o
+
+obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
+
diff --git a/arch/blackfin/kernel/cplb-mpu/cacheinit.c b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
new file mode 100644
index 000000000000..9eecfa403187
--- /dev/null
+++ b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
@@ -0,0 +1,62 @@
+/*
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/cpu.h>
+
+#include <asm/cacheflush.h>
+#include <asm/blackfin.h>
+#include <asm/cplb.h>
+#include <asm/cplbinit.h>
+
+#if defined(CONFIG_BFIN_ICACHE)
+void bfin_icache_init(void)
+{
+        unsigned long ctrl;
+        int i;
+
+        SSYNC();
+        for (i = 0; i < MAX_CPLBS; i++) {
+                bfin_write32(ICPLB_ADDR0 + i * 4, icplb_tbl[i].addr);
+                bfin_write32(ICPLB_DATA0 + i * 4, icplb_tbl[i].data);
+        }
+        ctrl = bfin_read_IMEM_CONTROL();
+        ctrl |= IMC | ENICPLB;
+        bfin_write_IMEM_CONTROL(ctrl);
+        SSYNC();
+}
+#endif
+
+#if defined(CONFIG_BFIN_DCACHE)
+void bfin_dcache_init(void)
+{
+        unsigned long ctrl;
+        int i;
+
+        SSYNC();
+        for (i = 0; i < MAX_CPLBS; i++) {
+                bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr);
+                bfin_write32(DCPLB_DATA0 + i * 4, dcplb_tbl[i].data);
+        }
+
+        ctrl = bfin_read_DMEM_CONTROL();
+        ctrl |= DMEM_CNTR;
+        bfin_write_DMEM_CONTROL(ctrl);
+        SSYNC();
+}
+#endif
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinfo.c b/arch/blackfin/kernel/cplb-mpu/cplbinfo.c
new file mode 100644
index 000000000000..bd072299f7f2
--- /dev/null
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinfo.c
@@ -0,0 +1,144 @@
+/*
+ * File:         arch/blackfin/mach-common/cplbinfo.c
+ * Based on:
+ * Author:       Sonic Zhang <sonic.zhang@analog.com>
+ *
+ * Created:      Jan. 2005
+ * Description:  Display CPLB status
+ *
+ * Modified:
+ *               Copyright 2004-2006 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <linux/uaccess.h>
+
+#include <asm/current.h>
+#include <asm/system.h>
+#include <asm/cplb.h>
+#include <asm/cplbinit.h>
+#include <asm/blackfin.h>
+
+#define CPLB_I 1
+#define CPLB_D 2
+
+#define SYNC_SYS    SSYNC()
+#define SYNC_CORE   CSYNC()
+
+#define CPLB_BIT_PAGESIZE 0x30000
+
+static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
+
+static char *cplb_print_entry(char *buf, struct cplb_entry *tbl, int switched)
+{
+        int i;
+        buf += sprintf(buf, "Index\tAddress\t\tData\tSize\tU/RD\tU/WR\tS/WR\tSwitch\n");
+        for (i = 0; i < MAX_CPLBS; i++) {
+                unsigned long data = tbl[i].data;
+                unsigned long addr = tbl[i].addr;
+                if (!(data & CPLB_VALID))
+                        continue;
+
+                buf +=
+                    sprintf(buf,
+                            "%d\t0x%08lx\t%06lx\t%s\t%c\t%c\t%c\t%c\n",
+                            i, addr, data,
+                            page_size_string_table[(data & 0x30000) >> 16],
+                            (data & CPLB_USER_RD) ? 'Y' : 'N',
+                            (data & CPLB_USER_WR) ? 'Y' : 'N',
+                            (data & CPLB_SUPV_WR) ? 'Y' : 'N',
+                            i < switched ? 'N' : 'Y');
+        }
+        buf += sprintf(buf, "\n");
+
+        return buf;
+}
+
+int cplbinfo_proc_output(char *buf)
+{
+        char *p;
+
+        p = buf;
+
+        p += sprintf(p, "------------------ CPLB Information ------------------\n\n");
+
+        if (bfin_read_IMEM_CONTROL() & ENICPLB) {
+                p += sprintf(p, "Instruction CPLB entry:\n");
+                p = cplb_print_entry(p, icplb_tbl, first_switched_icplb);
+        } else
+                p += sprintf(p, "Instruction CPLB is disabled.\n\n");
+
+        if (1 || bfin_read_DMEM_CONTROL() & ENDCPLB) {
+                p += sprintf(p, "Data CPLB entry:\n");
+                p = cplb_print_entry(p, dcplb_tbl, first_switched_dcplb);
+        } else
+                p += sprintf(p, "Data CPLB is disabled.\n");
+
+        p += sprintf(p, "ICPLB miss: %d\nICPLB supervisor miss: %d\n",
+                     nr_icplb_miss, nr_icplb_supv_miss);
+        p += sprintf(p, "DCPLB miss: %d\nDCPLB protection fault:%d\n",
+                     nr_dcplb_miss, nr_dcplb_prot);
+        p += sprintf(p, "CPLB flushes: %d\n",
+                     nr_cplb_flush);
+
+        return p - buf;
+}
+
+static int cplbinfo_read_proc(char *page, char **start, off_t off,
+                              int count, int *eof, void *data)
+{
+        int len;
+
+        len = cplbinfo_proc_output(page);
+        if (len <= off + count)
+                *eof = 1;
+        *start = page + off;
+        len -= off;
+        if (len > count)
+                len = count;
+        if (len < 0)
+                len = 0;
+        return len;
+}
+
+static int __init cplbinfo_init(void)
+{
+        struct proc_dir_entry *entry;
+
+        entry = create_proc_entry("cplbinfo", 0, NULL);
+        if (!entry)
+                return -ENOMEM;
+
+        entry->read_proc = cplbinfo_read_proc;
+        entry->data = NULL;
+
+        return 0;
+}
+
+static void __exit cplbinfo_exit(void)
+{
+        remove_proc_entry("cplbinfo", NULL);
+}
+
+module_init(cplbinfo_init);
+module_exit(cplbinfo_exit);
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
new file mode 100644
index 000000000000..e2e2b5079f5b
--- /dev/null
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -0,0 +1,91 @@
+/*
+ * Blackfin CPLB initialization
+ *
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/module.h>
+
+#include <asm/blackfin.h>
+#include <asm/cplb.h>
+#include <asm/cplbinit.h>
+
+struct cplb_entry icplb_tbl[MAX_CPLBS];
+struct cplb_entry dcplb_tbl[MAX_CPLBS];
+
+int first_switched_icplb, first_switched_dcplb;
+int first_mask_dcplb;
+
+void __init generate_cpl_tables(void)
+{
+        int i_d, i_i;
+        unsigned long addr;
+        unsigned long d_data, i_data;
+        unsigned long d_cache = 0, i_cache = 0;
+
+#ifdef CONFIG_BFIN_ICACHE
+        i_cache = CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
+#endif
+
+#ifdef CONFIG_BFIN_DCACHE
+        d_cache = CPLB_L1_CHBL;
+#ifdef CONFIG_BLKFIN_WT
+        d_cache |= CPLB_L1_AOW | CPLB_WT;
+#endif
+#endif
+        i_d = i_i = 0;
+
+        /* Set up the zero page.  */
+        dcplb_tbl[i_d].addr = 0;
+        dcplb_tbl[i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
+
+#if 0
+        icplb_tbl[i_i].addr = 0;
+        icplb_tbl[i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB;
+#endif
+
+        /* Cover kernel memory with 4M pages.  */
+        addr = 0;
+        d_data = d_cache | CPLB_SUPV_WR | CPLB_VALID | PAGE_SIZE_4MB | CPLB_DIRTY;
+        i_data = i_cache | CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4MB;
+
+        for (; addr < memory_start; addr += 4 * 1024 * 1024) {
+                dcplb_tbl[i_d].addr = addr;
+                dcplb_tbl[i_d++].data = d_data;
+                icplb_tbl[i_i].addr = addr;
+                icplb_tbl[i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0);
+        }
+
+        /* Cover L1 memory.  One 4M area for code and data each is enough.  */
+#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0
+        dcplb_tbl[i_d].addr = L1_DATA_A_START;
+        dcplb_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
+#endif
+        icplb_tbl[i_i].addr = L1_CODE_START;
+        icplb_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
+
+        first_mask_dcplb = i_d;
+        first_switched_dcplb = i_d + (1 << page_mask_order);
+        first_switched_icplb = i_i;
+
+        while (i_d < MAX_CPLBS)
+                dcplb_tbl[i_d++].data = 0;
+        while (i_i < MAX_CPLBS)
+                icplb_tbl[i_i++].data = 0;
+}
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
new file mode 100644
index 000000000000..c426a22f9907
--- /dev/null
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -0,0 +1,338 @@
+/*
+ *               Blackfin CPLB exception handling.
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/module.h>
+#include <linux/mm.h>
+
+#include <asm/blackfin.h>
+#include <asm/cplbinit.h>
+#include <asm/mmu_context.h>
+
+#ifdef CONFIG_BFIN_ICACHE
+
+#define FAULT_RW        (1 << 16)
+#define FAULT_USERSUPV  (1 << 17)
+
+int page_mask_nelts;
+int page_mask_order;
+unsigned long *current_rwx_mask;
+
+int nr_dcplb_miss, nr_icplb_miss, nr_icplb_supv_miss, nr_dcplb_prot;
+int nr_cplb_flush;
+
+static inline void disable_dcplb(void)
+{
+        unsigned long ctrl;
+        SSYNC();
+        ctrl = bfin_read_DMEM_CONTROL();
+        ctrl &= ~ENDCPLB;
+        bfin_write_DMEM_CONTROL(ctrl);
+        SSYNC();
+}
+
+static inline void enable_dcplb(void)
+{
+        unsigned long ctrl;
+        SSYNC();
+        ctrl = bfin_read_DMEM_CONTROL();
+        ctrl |= ENDCPLB;
+        bfin_write_DMEM_CONTROL(ctrl);
+        SSYNC();
+}
+
+static inline void disable_icplb(void)
+{
+        unsigned long ctrl;
+        SSYNC();
+        ctrl = bfin_read_IMEM_CONTROL();
+        ctrl &= ~ENICPLB;
+        bfin_write_IMEM_CONTROL(ctrl);
+        SSYNC();
+}
+
+static inline void enable_icplb(void)
+{
+        unsigned long ctrl;
+        SSYNC();
+        ctrl = bfin_read_IMEM_CONTROL();
+        ctrl |= ENICPLB;
+        bfin_write_IMEM_CONTROL(ctrl);
+        SSYNC();
+}
+
+/*
+ * Given the contents of the status register, return the index of the
+ * CPLB that caused the fault.
+ */
+static inline int faulting_cplb_index(int status)
+{
+        int signbits = __builtin_bfin_norm_fr1x32(status & 0xFFFF);
+        return 30 - signbits;
+}
+
+/*
+ * Given the contents of the status register and the DCPLB_DATA contents,
+ * return true if a write access should be permitted.
+ */
+static inline int write_permitted(int status, unsigned long data)
+{
+        if (status & FAULT_USERSUPV)
+                return !!(data & CPLB_SUPV_WR);
+        else
+                return !!(data & CPLB_USER_WR);
+}
+
+/* Counters to implement round-robin replacement.  */
+static int icplb_rr_index, dcplb_rr_index;
+
+/*
+ * Find an ICPLB entry to be evicted and return its index.
+ */
+static int evict_one_icplb(void)
+{
+        int i;
+        for (i = first_switched_icplb; i < MAX_CPLBS; i++)
+                if ((icplb_tbl[i].data & CPLB_VALID) == 0)
+                        return i;
+        i = first_switched_icplb + icplb_rr_index;
+        if (i >= MAX_CPLBS) {
+                i -= MAX_CPLBS - first_switched_icplb;
+                icplb_rr_index -= MAX_CPLBS - first_switched_icplb;
+        }
+        icplb_rr_index++;
+        return i;
+}
+
+static int evict_one_dcplb(void)
+{
+        int i;
+        for (i = first_switched_dcplb; i < MAX_CPLBS; i++)
+                if ((dcplb_tbl[i].data & CPLB_VALID) == 0)
+                        return i;
+        i = first_switched_dcplb + dcplb_rr_index;
+        if (i >= MAX_CPLBS) {
+                i -= MAX_CPLBS - first_switched_dcplb;
+                dcplb_rr_index -= MAX_CPLBS - first_switched_dcplb;
+        }
+        dcplb_rr_index++;
+        return i;
+}
+
+static noinline int dcplb_miss(void)
+{
+        unsigned long addr = bfin_read_DCPLB_FAULT_ADDR();
+        int status = bfin_read_DCPLB_STATUS();
+        unsigned long *mask;
+        int idx;
+        unsigned long d_data;
+
+        nr_dcplb_miss++;
+        if (addr >= _ramend)
+                return CPLB_PROT_VIOL;
+
+        d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
+#ifdef CONFIG_BFIN_DCACHE
+        d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
+#ifdef CONFIG_BLKFIN_WT
+        d_data |= CPLB_L1_AOW | CPLB_WT;
+#endif
+#endif
+        mask = current_rwx_mask;
+        if (mask) {
+                int page = addr >> PAGE_SHIFT;
+                int offs = page >> 5;
+                int bit = 1 << (page & 31);
+
+                if (mask[offs] & bit)
+                        d_data |= CPLB_USER_RD;
+
+                mask += page_mask_nelts;
+                if (mask[offs] & bit)
+                        d_data |= CPLB_USER_WR;
+        }
+
+        idx = evict_one_dcplb();
+
+        addr &= PAGE_MASK;
+        dcplb_tbl[idx].addr = addr;
+        dcplb_tbl[idx].data = d_data;
+
+        disable_dcplb();
+        bfin_write32(DCPLB_DATA0 + idx * 4, d_data);
+        bfin_write32(DCPLB_ADDR0 + idx * 4, addr);
+        enable_dcplb();
+
+        return 0;
+}
+
+static noinline int icplb_miss(void)
+{
+        unsigned long addr = bfin_read_ICPLB_FAULT_ADDR();
+        int status = bfin_read_ICPLB_STATUS();
+        int idx;
+        unsigned long i_data;
+
+        nr_icplb_miss++;
+        if (status & FAULT_USERSUPV)
+                nr_icplb_supv_miss++;
+
+        if (addr >= _ramend)
+                return CPLB_PROT_VIOL;
+
+        /*
+         * First, try to find a CPLB that matches this address.  If we
+         * find one, then the fact that we're in the miss handler means
+         * that the instruction crosses a page boundary.
+         */
+        for (idx = first_switched_icplb; idx < MAX_CPLBS; idx++) {
+                if (icplb_tbl[idx].data & CPLB_VALID) {
+                        unsigned long this_addr = icplb_tbl[idx].addr;
+                        if (this_addr <= addr && this_addr + PAGE_SIZE > addr) {
+                                addr += PAGE_SIZE;
+                                break;
+                        }
+                }
+        }
+
+        i_data = CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4KB;
+#ifdef CONFIG_BFIN_ICACHE
+        i_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
+#endif
+
+        /*
+         * Two cases to distinguish - a supervisor access must necessarily
+         * be for a module page; we grant it unconditionally (could do better
+         * here in the future).  Otherwise, check the x bitmap of the current
+         * process.
+         */
+        if (!(status & FAULT_USERSUPV)) {
+                unsigned long *mask = current_rwx_mask;
+
+                if (mask) {
+                        int page = addr >> PAGE_SHIFT;
+                        int offs = page >> 5;
+                        int bit = 1 << (page & 31);
+
+                        mask += 2 * page_mask_nelts;
+                        if (mask[offs] & bit)
+                                i_data |= CPLB_USER_RD;
+                }
+        }
+
+        idx = evict_one_icplb();
+        addr &= PAGE_MASK;
+        icplb_tbl[idx].addr = addr;
+        icplb_tbl[idx].data = i_data;
+
+        disable_icplb();
+        bfin_write32(ICPLB_DATA0 + idx * 4, i_data);
+        bfin_write32(ICPLB_ADDR0 + idx * 4, addr);
+        enable_icplb();
+
+        return 0;
+}
+
+static noinline int dcplb_protection_fault(void)
+{
+        unsigned long addr = bfin_read_DCPLB_FAULT_ADDR();
+        int status = bfin_read_DCPLB_STATUS();
+
+        nr_dcplb_prot++;
+
+        if (status & FAULT_RW) {
+                int idx = faulting_cplb_index(status);
+                unsigned long data = dcplb_tbl[idx].data;
+                if (!(data & CPLB_WT) && !(data & CPLB_DIRTY) &&
+                    write_permitted(status, data)) {
+                        data |= CPLB_DIRTY;
+                        dcplb_tbl[idx].data = data;
+                        bfin_write32(DCPLB_DATA0 + idx * 4, data);
+                        return 0;
+                }
+        }
+        return CPLB_PROT_VIOL;
+}
+
+int cplb_hdr(int seqstat, struct pt_regs *regs)
+{
+        int cause = seqstat & 0x3f;
+        switch (cause) {
+        case 0x23:
+                return dcplb_protection_fault();
+        case 0x2C:
+                return icplb_miss();
+        case 0x26:
+                return dcplb_miss();
+        default:
+            return 1;
+                panic_cplb_error(seqstat, regs);
+        }
+}
+
+void flush_switched_cplbs(void)
+{
+        int i;
+
+        nr_cplb_flush++;
+
+        disable_icplb();
+        for (i = first_switched_icplb; i < MAX_CPLBS; i++) {
+                icplb_tbl[i].data = 0;
+                bfin_write32(ICPLB_DATA0 + i * 4, 0);
+        }
+        enable_icplb();
+
+        disable_dcplb();
+        for (i = first_mask_dcplb; i < MAX_CPLBS; i++) {
+                dcplb_tbl[i].data = 0;
+                bfin_write32(DCPLB_DATA0 + i * 4, 0);
+        }
+        enable_dcplb();
+}
+
+void set_mask_dcplbs(unsigned long *masks)
+{
+        int i;
+        unsigned long addr = (unsigned long)masks;
+        unsigned long d_data;
+        current_rwx_mask = masks;
+
+        if (!masks)
+                return;
+
+        d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
+#ifdef CONFIG_BFIN_DCACHE
+        d_data |= CPLB_L1_CHBL;
+#ifdef CONFIG_BLKFIN_WT
+        d_data |= CPLB_L1_AOW | CPLB_WT;
+#endif
+#endif
+
+        disable_dcplb();
+        for (i = first_mask_dcplb; i < first_switched_dcplb; i++) {
+                dcplb_tbl[i].addr = addr;
+                dcplb_tbl[i].data = d_data;
+                bfin_write32(DCPLB_DATA0 + i * 4, d_data);
+                bfin_write32(DCPLB_ADDR0 + i * 4, addr);
+                addr += PAGE_SIZE;
+        }
+        enable_dcplb();
+}
+
+#endif
diff --git a/arch/blackfin/kernel/cplb-nompu/Makefile b/arch/blackfin/kernel/cplb-nompu/Makefile
new file mode 100644
index 000000000000..d36ea9b5382e
--- /dev/null
+++ b/arch/blackfin/kernel/cplb-nompu/Makefile
@@ -0,0 +1,8 @@
+#
+# arch/blackfin/kernel/cplb-nompu/Makefile
+#
+
+obj-y := cplbinit.o cacheinit.o cplbhdlr.o cplbmgr.o
+
+obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
+
diff --git a/arch/blackfin/kernel/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
index 62cbba7364b0..8a18399f6072 100644
--- a/arch/blackfin/kernel/cacheinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
@@ -42,6 +42,7 @@ void bfin_icache_init(void)
         ctrl = bfin_read_IMEM_CONTROL();
         ctrl |= IMC | ENICPLB;
         bfin_write_IMEM_CONTROL(ctrl);
+        SSYNC();
 }
 #endif
 
@@ -63,5 +64,6 @@ void bfin_dcache_init(void)
         ctrl = bfin_read_DMEM_CONTROL();
         ctrl |= DMEM_CNTR;
         bfin_write_DMEM_CONTROL(ctrl);
+        SSYNC();
 }
 #endif
diff --git a/arch/blackfin/mach-common/cplbhdlr.S b/arch/blackfin/kernel/cplb-nompu/cplbhdlr.S
index 2788532de72b..2788532de72b 100644
--- a/arch/blackfin/mach-common/cplbhdlr.S
+++ b/arch/blackfin/kernel/cplb-nompu/cplbhdlr.S
diff --git a/arch/blackfin/mach-common/cplbinfo.c b/arch/blackfin/kernel/cplb-nompu/cplbinfo.c
index a4f0b428a34d..a4f0b428a34d 100644
--- a/arch/blackfin/mach-common/cplbinfo.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinfo.c
diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 6320bc45fbba..6320bc45fbba 100644
--- a/arch/blackfin/kernel/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
diff --git a/arch/blackfin/mach-common/cplbmgr.S b/arch/blackfin/kernel/cplb-nompu/cplbmgr.S
index 6f909cbfac7b..f5cf3accef37 100644
--- a/arch/blackfin/mach-common/cplbmgr.S
+++ b/arch/blackfin/kernel/cplb-nompu/cplbmgr.S
@@ -75,6 +75,15 @@ ENTRY(_cplb_mgr)
         * from the configuration table.
         */
 
+        /* A multi-word instruction can cross a page boundary. This means the
+         * first part of the instruction can be in a valid page, but the
+         * second part is not, and hence generates the instruction miss.
+         * However, the fault address is for the start of the instruction,
+         * not the part that's in the bad page. Therefore, we have to check
+         * whether the fault address applies to a page that is already present
+         * in the table.
+         */
+
         P4.L = LO(ICPLB_FAULT_ADDR);
         P4.H = HI(ICPLB_FAULT_ADDR);
 
@@ -87,7 +96,7 @@ ENTRY(_cplb_mgr)
         R4 = [P4];              /* Get faulting address*/
         R6 = 64;                /* Advance past the fault address, which*/
         R6 = R6 + R4;           /* we'll use if we find a match*/
-        R3 = ((16 << 8) | 2);   /* Extract mask, bits 16 and 17.*/
+        R3 = ((16 << 8) | 2);   /* Extract mask, two bits at posn 16 */
 
         R5 = 0;
 .Lisearch:
@@ -125,7 +134,9 @@ ENTRY(_cplb_mgr)
         P4.L = LO(IMEM_CONTROL);
         P4.H = HI(IMEM_CONTROL);
 
-        /* disable cplbs */
+        /* Turn off CPLBs while we work, necessary according to HRM before
+         * modifying CPLB descriptors
+         */
         R5 = [P4];              /* Control Register*/
         BITCLR(R5,ENICPLB_P);
         CLI R1;
@@ -179,7 +190,14 @@ ENTRY(_cplb_mgr)
         [P0 - 4] = R0;
         R0 = [P0 - 0x100];
         [P0-0x104] = R0;
-.Lie_move:P0+=4;
+.Lie_move:
+        P0+=4;
+
+        /* Clear ICPLB_DATA15, in case we don't find a replacement
+         * otherwise, we would have a duplicate entry, and will crash
+         */
+        R0 = 0;
+        [P0 - 4] = R0;
 
         /* We've made space in the ICPLB table, so that ICPLB15
          * is now free to be overwritten. Next, we have to determine
@@ -504,14 +522,23 @@ ENTRY(_cplb_mgr)
         R0 = [P0++];    /* move data */
         [P0 - 8] = R0;
         R0 = [P0-0x104] /* move address */
-.Lde_move: [P0-0x108] = R0;
+.Lde_move:
+         [P0-0x108] = R0;
+
+.Lde_moved:
+        NOP;
+
+        /* Clear DCPLB_DATA15, in case we don't find a replacement
+         * otherwise, we would have a duplicate entry, and will crash
+         */
+        R0 = 0;
+        [P0 - 0x4] = R0;
 
         /* We've now made space in DCPLB15 for the new CPLB to be
          * installed. The next stage is to locate a CPLB in the
          * config table that covers the faulting address.
          */
 
-.Lde_moved:NOP;
         R0 = I0;                /* Our faulting address */
 
         P2.L = _dpdt_table;
diff --git a/arch/blackfin/kernel/early_printk.c b/arch/blackfin/kernel/early_printk.c
index 724f4a5a1d46..60f67f90fe35 100644
--- a/arch/blackfin/kernel/early_printk.c
+++ b/arch/blackfin/kernel/early_printk.c
@@ -187,7 +187,7 @@ asmlinkage void __init init_early_exception_vectors(void)
         bfin_write_EVT15(early_trap);
         CSYNC();
 
-        /* Set all the return from interupt, exception, NMI to a known place
+        /* Set all the return from interrupt, exception, NMI to a known place
          * so if we do a RETI, RETX or RETN by mistake - we go somewhere known
          * Note - don't change RETS - we are in a subroutine, or
          * RETE - since it might screw up if emulator is attached
@@ -205,7 +205,7 @@ asmlinkage void __init early_trap_c(struct pt_regs *fp, void *retaddr)
         if (likely(early_console == NULL))
                 setup_early_printk(DEFAULT_EARLY_PORT);
 
-        dump_bfin_mem((void *)fp->retx);
+        dump_bfin_mem(fp);
         show_regs(fp);
         dump_bfin_trace_buffer();
 
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 5bf15125f0d6..023dc80af187 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -39,9 +39,6 @@
 #include <asm/blackfin.h>
 #include <asm/fixed_code.h>
 
-#define LED_ON  0
-#define LED_OFF 1
-
 asmlinkage void ret_from_fork(void);
 
 /* Points to the SDRAM backup memory for the stack that is currently in
@@ -70,32 +67,6 @@ void (*pm_power_off)(void) = NULL;
 EXPORT_SYMBOL(pm_power_off);
 
 /*
- * We are using a different LED from the one used to indicate timer interrupt.
- */
-#if defined(CONFIG_BFIN_IDLE_LED)
-static inline void leds_switch(int flag)
-{
-        unsigned short tmp = 0;
-
-        tmp = bfin_read_CONFIG_BFIN_IDLE_LED_PORT();
-        SSYNC();
-
-        if (flag == LED_ON)
-                tmp &= ~CONFIG_BFIN_IDLE_LED_PIN;       /* light on */
-        else
-                tmp |= CONFIG_BFIN_IDLE_LED_PIN;        /* light off */
-
-        bfin_write_CONFIG_BFIN_IDLE_LED_PORT(tmp);
-        SSYNC();
-
-}
-#else
-static inline void leds_switch(int flag)
-{
-}
-#endif
-
-/*
  * The idle loop on BFIN
  */
 #ifdef CONFIG_IDLE_L1
@@ -106,12 +77,10 @@ void cpu_idle(void)__attribute__((l1_text));
 void default_idle(void)
 {
         while (!need_resched()) {
-                leds_switch(LED_OFF);
                 local_irq_disable();
                 if (likely(!need_resched()))
                         idle_with_irq_disabled();
                 local_irq_enable();
-                leds_switch(LED_ON);
         }
 }
 
@@ -327,6 +296,7 @@ void finish_atomic_sections (struct pt_regs *regs)
 }
 
 #if defined(CONFIG_ACCESS_CHECK)
+/* Return 1 if access to memory range is OK, 0 otherwise */
 int _access_ok(unsigned long addr, unsigned long size)
 {
         if (size == 0)
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c
index ae28aac6fec1..483f93dfc1b5 100644
--- a/arch/blackfin/kernel/reboot.c
+++ b/arch/blackfin/kernel/reboot.c
@@ -19,6 +19,11 @@
 #define SYSCR_VAL       0x10
 #endif
 
+/*
+ * Delay min 5 SCLK cycles using worst case CCLK/SCLK ratio (15)
+ */
+#define SWRST_DELAY     (5 * 15)
+
 /* A system soft reset makes external memory unusable
  * so force this function into L1.
  */
@@ -34,7 +39,13 @@ void bfin_reset(void)
         while (1) {
                 /* initiate system soft reset with magic 0x7 */
                 bfin_write_SWRST(0x7);
-                asm("ssync;");
+
+                /* Wait for System reset to actually reset, needs to be 5 SCLKs, */
+                /* Assume CCLK / SCLK ratio is worst case (15), and use 5*15     */
+
+                asm("LSETUP(.Lfoo,.Lfoo) LC0 = %0\n .Lfoo: NOP;\n"
+                 : : "a" (SWRST_DELAY) : "LC0", "LT0", "LB0");
+
                 /* clear system soft reset */
                 bfin_write_SWRST(0);
                 asm("ssync;");
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index d2822010b7ce..462cae893757 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -238,7 +238,13 @@ void __init setup_arch(char **cmdline_p)
         memory_end = _ramend - DMA_UNCACHED_REGION;
 
         _ramstart = (unsigned long)__bss_stop;
+        _rambase = (unsigned long)_stext;
+#ifdef CONFIG_MPU
+        /* Round up to multiple of 4MB.  */
+        memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
+#else
         memory_start = PAGE_ALIGN(_ramstart);
+#endif
 
 #if defined(CONFIG_MTD_UCLINUX)
         /* generic memory mapped MTD driver */
@@ -307,6 +313,11 @@ void __init setup_arch(char **cmdline_p)
         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
 #endif                          /* ANOMALY_05000263 */
 
+#ifdef CONFIG_MPU
+        page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
+        page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
+#endif
+
 #if !defined(CONFIG_MTD_UCLINUX)
         memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
 #endif
@@ -315,8 +326,6 @@ void __init setup_arch(char **cmdline_p)
         init_mm.end_data = (unsigned long)_edata;
         init_mm.brk = (unsigned long)0;
 
-        init_leds();
-
         _bfin_swrst = bfin_read_SWRST();
 
         if (_bfin_swrst & RESET_DOUBLE)
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index beef057bd1dc..5bd64e341df3 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -42,75 +42,6 @@
 static void time_sched_init(irqreturn_t(*timer_routine)
                         (int, void *));
 static unsigned long gettimeoffset(void);
-static inline void do_leds(void);
-
-#if (defined(CONFIG_BFIN_ALIVE_LED) || defined(CONFIG_BFIN_IDLE_LED))
-void __init init_leds(void)
-{
-        unsigned int tmp = 0;
-
-#if defined(CONFIG_BFIN_ALIVE_LED)
-        /* config pins as output. */
-        tmp = bfin_read_CONFIG_BFIN_ALIVE_LED_DPORT();
-        SSYNC();
-        bfin_write_CONFIG_BFIN_ALIVE_LED_DPORT(tmp | CONFIG_BFIN_ALIVE_LED_PIN);
-        SSYNC();
-
-        /*      First set led be off */
-        tmp = bfin_read_CONFIG_BFIN_ALIVE_LED_PORT();
-        SSYNC();
-        bfin_write_CONFIG_BFIN_ALIVE_LED_PORT(tmp | CONFIG_BFIN_ALIVE_LED_PIN); /* light off */
-        SSYNC();
-#endif
-
-#if defined(CONFIG_BFIN_IDLE_LED)
-        /* config pins as output. */
-        tmp = bfin_read_CONFIG_BFIN_IDLE_LED_DPORT();
-        SSYNC();
-        bfin_write_CONFIG_BFIN_IDLE_LED_DPORT(tmp | CONFIG_BFIN_IDLE_LED_PIN);
-        SSYNC();
-
-        /*      First set led be off */
-        tmp = bfin_read_CONFIG_BFIN_IDLE_LED_PORT();
-        SSYNC();
-        bfin_write_CONFIG_BFIN_IDLE_LED_PORT(tmp | CONFIG_BFIN_IDLE_LED_PIN);   /* light off */
-        SSYNC();
-#endif
-}
-#else
-void __init init_leds(void)
-{
-}
-#endif
-
-#if defined(CONFIG_BFIN_ALIVE_LED)
-static inline void do_leds(void)
-{
-        static unsigned int count = 50;
-        static int flag;
-        unsigned short tmp = 0;
-
-        if (--count == 0) {
-                count = 50;
-                flag = ~flag;
-        }
-        tmp = bfin_read_CONFIG_BFIN_ALIVE_LED_PORT();
-        SSYNC();
-
-        if (flag)
-                tmp &= ~CONFIG_BFIN_ALIVE_LED_PIN;      /* light on */
-        else
-                tmp |= CONFIG_BFIN_ALIVE_LED_PIN;       /* light off */
-
-        bfin_write_CONFIG_BFIN_ALIVE_LED_PORT(tmp);
-        SSYNC();
-
-}
-#else
-static inline void do_leds(void)
-{
-}
-#endif
 
 static struct irqaction bfin_timer_irq = {
         .name = "BFIN Timer Tick",
@@ -205,7 +136,6 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
         write_seqlock(&xtime_lock);
 
         do_timer(1);
-        do_leds();
 
 #ifndef CONFIG_SMP
         update_process_times(user_mode(get_irq_regs()));
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index 21a55ef19cbd..66b5f3e3ae2a 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -36,8 +36,10 @@
 #include <asm/cacheflush.h>
 #include <asm/blackfin.h>
 #include <asm/irq_handler.h>
+#include <linux/irq.h>
 #include <asm/trace.h>
 #include <asm/fixed_code.h>
+#include <asm/dma.h>
 
 #ifdef CONFIG_KGDB
 # include <linux/debugger.h>
@@ -170,7 +172,7 @@ asmlinkage void double_fault_c(struct pt_regs *fp)
         oops_in_progress = 1;
         printk(KERN_EMERG "\n" KERN_EMERG "Double Fault\n");
         dump_bfin_process(fp);
-        dump_bfin_mem((void *)fp->retx);
+        dump_bfin_mem(fp);
         show_regs(fp);
         panic("Double Fault - unrecoverable event\n");
 
@@ -195,9 +197,13 @@ asmlinkage void trap_c(struct pt_regs *fp)
          * we will kernel panic, so the system reboots.
          * If KGDB is enabled, don't set this for kernel breakpoints
         */
-        if ((bfin_read_IPEND() & 0xFFC0)
+
+        /* TODO: check to see if we are in some sort of deferred HWERR
+         * that we should be able to recover from, not kernel panic
+         */
+        if ((bfin_read_IPEND() & 0xFFC0) && (trapnr != VEC_STEP)
 #ifdef CONFIG_KGDB
-                && trapnr != VEC_EXCPT02
+                && (trapnr != VEC_EXCPT02)
 #endif
         ){
                 console_verbose();
@@ -433,6 +439,36 @@ asmlinkage void trap_c(struct pt_regs *fp)
         /* 0x3D - Reserved, Caught by default */
         /* 0x3E - Reserved, Caught by default */
         /* 0x3F - Reserved, Caught by default */
+        case VEC_HWERR:
+                info.si_code = BUS_ADRALN;
+                sig = SIGBUS;
+                switch (fp->seqstat & SEQSTAT_HWERRCAUSE) {
+                /* System MMR Error */
+                case (SEQSTAT_HWERRCAUSE_SYSTEM_MMR):
+                        info.si_code = BUS_ADRALN;
+                        sig = SIGBUS;
+                        printk(KERN_NOTICE HWC_x2(KERN_NOTICE));
+                        break;
+                /* External Memory Addressing Error */
+                case (SEQSTAT_HWERRCAUSE_EXTERN_ADDR):
+                        info.si_code = BUS_ADRERR;
+                        sig = SIGBUS;
+                        printk(KERN_NOTICE HWC_x3(KERN_NOTICE));
+                        break;
+                /* Performance Monitor Overflow */
+                case (SEQSTAT_HWERRCAUSE_PERF_FLOW):
+                        printk(KERN_NOTICE HWC_x12(KERN_NOTICE));
+                        break;
+                /* RAISE 5 instruction */
+                case (SEQSTAT_HWERRCAUSE_RAISE_5):
+                        printk(KERN_NOTICE HWC_x18(KERN_NOTICE));
+                        break;
+                default:        /* Reserved */
+                        printk(KERN_NOTICE HWC_default(KERN_NOTICE));
+                        break;
+                }
+                CHK_DEBUGGER_TRAP();
+                break;
         default:
                 info.si_code = TRAP_ILLTRAP;
                 sig = SIGTRAP;
@@ -447,7 +483,7 @@ asmlinkage void trap_c(struct pt_regs *fp)
         if (sig != SIGTRAP) {
                 unsigned long stack;
                 dump_bfin_process(fp);
-                dump_bfin_mem((void *)fp->retx);
+                dump_bfin_mem(fp);
                 show_regs(fp);
 
                 /* Print out the trace buffer if it makes sense */
@@ -461,6 +497,7 @@ asmlinkage void trap_c(struct pt_regs *fp)
                         dump_bfin_trace_buffer();
                 show_stack(current, &stack);
                 if (oops_in_progress) {
+                        print_modules();
 #ifndef CONFIG_ACCESS_CHECK
                         printk(KERN_EMERG "Please turn on "
                                "CONFIG_ACCESS_CHECK\n");
@@ -474,13 +511,6 @@ asmlinkage void trap_c(struct pt_regs *fp)
         info.si_addr = (void *)fp->pc;
         force_sig_info(sig, &info, current);
 
-        /* Ensure that bad return addresses don't end up in an infinite
-         * loop, due to speculative loads/reads. This needs to be done after
-         * the signal has been sent.
-         */
-        if (trapnr == VEC_CPLB_I_M && sig != SIGTRAP)
-                fp->pc = SAFE_USER_INSTRUCTION;
-
         trace_buffer_restore(j);
         return;
 }
@@ -616,8 +646,10 @@ void dump_bfin_process(struct pt_regs *fp)
         if (oops_in_progress)
                 printk(KERN_EMERG "Kernel OOPS in progress\n");
 
-        if (context & 0x0020)
-                printk(KERN_NOTICE "Deferred excecption or HW Error context\n");
+        if (context & 0x0020 && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR)
+                printk(KERN_NOTICE "HW Error context\n");
+        else if (context & 0x0020)
+                printk(KERN_NOTICE "Defered Exception context\n");
         else if (context & 0x3FC0)
                 printk(KERN_NOTICE "Interrupt context\n");
         else if (context & 0x4000)
@@ -645,59 +677,124 @@ void dump_bfin_process(struct pt_regs *fp)
                      "No Valid process in current context\n");
 }
 
-void dump_bfin_mem(void *retaddr)
+void dump_bfin_mem(struct pt_regs *fp)
 {
+        unsigned short *addr, *erraddr, val = 0, err = 0;
+        char sti = 0, buf[6];
 
-        if (retaddr >= (void *)FIXED_CODE_START  && retaddr < (void *)physical_mem_end
-#if L1_CODE_LENGTH != 0
-            /* FIXME: Copy the code out of L1 Instruction SRAM through dma
-               memcpy.  */
-            && !(retaddr >= (void *)L1_CODE_START
-                 && retaddr < (void *)(L1_CODE_START + L1_CODE_LENGTH))
-#endif
-        ) {
-                int i = ((unsigned int)retaddr & 0xFFFFFFF0) - 32;
-                unsigned short x = 0;
-                printk(KERN_NOTICE "return address: [0x%p]; contents of:", retaddr);
-                for (; i < ((unsigned int)retaddr & 0xFFFFFFF0) + 32; i += 2) {
-                        if (!(i & 0xF))
-                                printk("\n" KERN_NOTICE "0x%08x: ", i);
-
-                        if (get_user(x, (unsigned short *)i))
-                                break;
+        if (unlikely((fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR))
+                erraddr = (void *)fp->pc;
+        else
+                erraddr = (void *)fp->retx;
+
+        printk(KERN_NOTICE "return address: [0x%p]; contents of:", erraddr);
+
+        for (addr = (unsigned short *)((unsigned long)erraddr & ~0xF) - 0x10;
+             addr < (unsigned short *)((unsigned long)erraddr & ~0xF) + 0x10;
+             addr++) {
+                if (!((unsigned long)addr & 0xF))
+                        printk("\n" KERN_NOTICE "0x%p: ", addr);
+
+                if (get_user(val, addr)) {
+                        if (addr >= (unsigned short *)L1_CODE_START &&
+                            addr < (unsigned short *)(L1_CODE_START + L1_CODE_LENGTH)) {
+                                dma_memcpy(&val, addr, sizeof(val));
+                                sprintf(buf, "%04x", val);
+                        } else if (addr >= (unsigned short *)FIXED_CODE_START &&
+                                addr <= (unsigned short *)memory_start) {
+                                val = bfin_read16(addr);
+                                sprintf(buf, "%04x", val);
+                        } else {
+                                val = 0;
+                                sprintf(buf, "????");
+                        }
+                } else
+                        sprintf(buf, "%04x", val);
+
+                if (addr == erraddr) {
+                        printk("[%s]", buf);
+                        err = val;
+                } else
+                        printk(" %s ", buf);
+
+                /* Do any previous instructions turn on interrupts? */
+                if (addr <= erraddr &&                          /* in the past */
+                    ((val >= 0x0040 && val <= 0x0047) ||        /* STI instruction */
+                      val == 0x017b))                           /* [SP++] = RETI */
+                        sti = 1;
+        }
+
+        printk("\n");
+
+        /* Hardware error interrupts can be deferred */
+        if (unlikely(sti && (fp->seqstat & SEQSTAT_EXCAUSE) == VEC_HWERR &&
+            oops_in_progress)){
+                printk(KERN_NOTICE "Looks like this was a deferred error - sorry\n");
 #ifndef CONFIG_DEBUG_HWERR
-                        /* If one of the last few instructions was a STI
-                         * it is likely that the error occured awhile ago
-                         * and we just noticed. This only happens in kernel
-                         * context, which should mean an oops is happening
-                         */
-                        if (oops_in_progress && x >= 0x0040 && x <= 0x0047 && i <= 0)
-                                panic("\n\nWARNING : You should reconfigure"
-                                        " the kernel to turn on\n"
-                                        " 'Hardware error interrupt"
-                                        " debugging'\n"
-                                        " The rest of this error"
-                                        " is meanless\n");
-#endif
-                        if (i == (unsigned int)retaddr)
-                                printk("[%04x]", x);
-                        else
-                                printk(" %04x ", x);
+                printk(KERN_NOTICE "The remaining message may be meaningless\n"
+                        KERN_NOTICE "You should enable CONFIG_DEBUG_HWERR to get a"
+                         " better idea where it came from\n");
+#else
+                /* If we are handling only one peripheral interrupt
+                 * and current mm and pid are valid, and the last error
+                 * was in that user space process's text area
+                 * print it out - because that is where the problem exists
+                 */
+                if ((!(((fp)->ipend & ~0x30) & (((fp)->ipend & ~0x30) - 1))) &&
+                     (current->pid && current->mm)) {
+                        /* And the last RETI points to the current userspace context */
+                        if ((fp + 1)->pc >= current->mm->start_code &&
+                            (fp + 1)->pc <= current->mm->end_code) {
+                                printk(KERN_NOTICE "It might be better to look around here : \n");
+                                printk(KERN_NOTICE "-------------------------------------------\n");
+                                show_regs(fp + 1);
+                                printk(KERN_NOTICE "-------------------------------------------\n");
+                        }
                 }
-                printk("\n");
-        } else
-                printk("\n" KERN_NOTICE
-                        "Cannot look at the [PC] <%p> for it is"
-                        " in unreadable memory - sorry\n", retaddr);
+#endif
+        }
 }
 
 void show_regs(struct pt_regs *fp)
 {
         char buf [150];
+        struct irqaction *action;
+        unsigned int i;
+        unsigned long flags;
 
-        printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\n");
+        printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted());
         printk(KERN_NOTICE " SEQSTAT: %08lx  IPEND: %04lx  SYSCFG: %04lx\n",
                 (long)fp->seqstat, fp->ipend, fp->syscfg);
+        printk(KERN_NOTICE "  HWERRCAUSE: 0x%lx\n",
+                (fp->seqstat & SEQSTAT_HWERRCAUSE) >> 14);
+        printk(KERN_NOTICE "  EXCAUSE   : 0x%lx\n",
+                fp->seqstat & SEQSTAT_EXCAUSE);
+        for (i = 6; i <= 15 ; i++) {
+                if (fp->ipend & (1 << i)) {
+                        decode_address(buf, bfin_read32(EVT0 + 4*i));
+                        printk(KERN_NOTICE "  physical IVG%i asserted : %s\n", i, buf);
+                }
+        }
+
+        /* if no interrupts are going off, don't print this out */
+        if (fp->ipend & ~0x3F) {
+                for (i = 0; i < (NR_IRQS - 1); i++) {
+                        spin_lock_irqsave(&irq_desc[i].lock, flags);
+                        action = irq_desc[i].action;
+                        if (!action)
+                                goto unlock;
+
+                        decode_address(buf, (unsigned int)action->handler);
+                        printk(KERN_NOTICE "  logical irq %3d mapped  : %s", i, buf);
+                        for (action = action->next; action; action = action->next) {
+                                decode_address(buf, (unsigned int)action->handler);
+                                printk(", %s", buf);
+                        }
+                        printk("\n");
+unlock:
+                        spin_unlock_irqrestore(&irq_desc[i].lock, flags);
+                }
+        }
 
         decode_address(buf, fp->rete);
         printk(KERN_NOTICE " RETE: %s\n", buf);
@@ -708,9 +805,10 @@ void show_regs(struct pt_regs *fp)
         decode_address(buf, fp->rets);
         printk(KERN_NOTICE " RETS: %s\n", buf);
         decode_address(buf, fp->pc);
-        printk(KERN_NOTICE " PC: %s\n", buf);
+        printk(KERN_NOTICE " PC  : %s\n", buf);
 
-        if ((long)fp->seqstat & SEQSTAT_EXCAUSE) {
+        if (((long)fp->seqstat &  SEQSTAT_EXCAUSE) &&
+            (((long)fp->seqstat & SEQSTAT_EXCAUSE) != VEC_HWERR)) {
                 decode_address(buf, bfin_read_DCPLB_FAULT_ADDR());
                 printk(KERN_NOTICE "DCPLB_FAULT_ADDR: %s\n", buf);
                 decode_address(buf, bfin_read_ICPLB_FAULT_ADDR());
@@ -824,7 +922,7 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp)
         printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", (void *)bfin_read_DCPLB_FAULT_ADDR());
         printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", (void *)bfin_read_ICPLB_FAULT_ADDR());
         dump_bfin_process(fp);
-        dump_bfin_mem((void *)fp->retx);
+        dump_bfin_mem(fp);
         show_regs(fp);
         dump_stack();
         panic("Unrecoverable event\n");
diff --git a/arch/blackfin/lib/memcpy.S b/arch/blackfin/lib/memcpy.S
index 2e6336492b4b..e654a18a0754 100644
--- a/arch/blackfin/lib/memcpy.S
+++ b/arch/blackfin/lib/memcpy.S
@@ -70,8 +70,8 @@ ENTRY(_memcpy)
         /* Check for aligned data.*/
 
         R3 = R1 | R0;
-        R0 = 0x3;
-        R3 = R3 & R0;
+        R1 = 0x3;
+        R3 = R3 & R1;
         CC = R3;        /* low bits set on either address? */
         IF CC JUMP .Lnot_aligned;
 
@@ -83,7 +83,6 @@ ENTRY(_memcpy)
         /* less than eight bytes... */
         P2 = R2;
         LSETUP(.Lthree_start, .Lthree_end) LC0=P2;
-        R0 = R1;        /* setup src address for return */
 .Lthree_start:
         R3 = B[P1++] (X);
 .Lthree_end:
@@ -95,7 +94,6 @@ ENTRY(_memcpy)
         /* There's at least eight bytes to copy. */
         P2 += -1;       /* because we unroll one iteration */
         LSETUP(.Lword_loops, .Lword_loope) LC0=P2;
-        R0 = R1;
         I1 = P1;
         R3 = [I1++];
 #if ANOMALY_05000202
@@ -120,7 +118,6 @@ ENTRY(_memcpy)
 .Lnot_aligned:
         /* From here, we're copying byte-by-byte. */
         LSETUP (.Lbyte_start, .Lbyte_end) LC0=P2;
-        R0 = R1;        /* Save src address for return */
 .Lbyte_start:
         R1 = B[P1++] (X);
 .Lbyte_end:
@@ -135,7 +132,6 @@ ENTRY(_memcpy)
          * Don't bother to work out alignment for
          * the reverse case.
          */
-        R0 = R1;        /* save src for later. */
         P0 = P0 + P2;
         P0 += -1;
         P1 = P1 + P2;
diff --git a/arch/blackfin/mach-bf527/Kconfig b/arch/blackfin/mach-bf527/Kconfig
index 5c736837d4bf..3cde4beeb214 100644
--- a/arch/blackfin/mach-bf527/Kconfig
+++ b/arch/blackfin/mach-bf527/Kconfig
@@ -43,7 +43,7 @@ endchoice
 
 choice
         prompt "UART1"
-        default BF527_UART1_PORTG
+        default BF527_UART1_PORTF
         help
           Select PORT used for UART1. See Hardware Reference Manual
 
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index 003e2ac654d8..f8c411a24af7 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -8,7 +8,7 @@
  *
  * Modified:
  *               Copyright 2005 National ICT Australia (NICTA)
- *               Copyright 2004-2007 Analog Devices Inc.
+ *               Copyright 2004-2008 Analog Devices Inc.
  *
  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  *
@@ -41,6 +41,7 @@
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/usb/sl811.h>
+#include <linux/usb/musb.h>
 #include <asm/cplb.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
@@ -105,6 +106,69 @@ void __exit bfin_isp1761_exit(void)
 arch_initcall(bfin_isp1761_init);
 #endif
 
+#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
+static struct resource musb_resources[] = {
+        [0] = {
+                .start  = 0xffc03800,
+                .end    = 0xffc03cff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = { /* general IRQ */
+                .start  = IRQ_USB_INT0,
+                .end    = IRQ_USB_INT0,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+        [2] = { /* DMA IRQ */
+                .start  = IRQ_USB_DMA,
+                .end    = IRQ_USB_DMA,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct musb_hdrc_platform_data musb_plat = {
+#if defined(CONFIG_USB_MUSB_OTG)
+        .mode           = MUSB_OTG,
+#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
+        .mode           = MUSB_HOST,
+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
+        .mode           = MUSB_PERIPHERAL,
+#endif
+        .multipoint     = 0,
+};
+
+static u64 musb_dmamask = ~(u32)0;
+
+static struct platform_device musb_device = {
+        .name           = "musb_hdrc",
+        .id             = 0,
+        .dev = {
+                .dma_mask               = &musb_dmamask,
+                .coherent_dma_mask      = 0xffffffff,
+                .platform_data          = &musb_plat,
+        },
+        .num_resources  = ARRAY_SIZE(musb_resources),
+        .resource       = musb_resources,
+};
+#endif
+
+#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
+
+static struct resource bf52x_t350mcqb_resources[] = {
+        {
+                .start = IRQ_PPI_ERROR,
+                .end = IRQ_PPI_ERROR,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bf52x_t350mcqb_device = {
+        .name           = "bfin-t350mcqb",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(bf52x_t350mcqb_resources),
+        .resource       = bf52x_t350mcqb_resources,
+};
+#endif
+
 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 static struct mtd_partition partition_info[] = {
         {
@@ -253,12 +317,7 @@ static struct resource sl811_hcd_resources[] = {
 void sl811_port_power(struct device *dev, int is_on)
 {
         gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
-        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
-
-        if (is_on)
-                gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
-        else
-                gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
+        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
 }
 #endif
 
@@ -718,6 +777,28 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+static struct gpio_keys_button bfin_gpio_keys_table[] = {
+        {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
+        {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
+};
+
+static struct gpio_keys_platform_data bfin_gpio_keys_data = {
+        .buttons        = bfin_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
+};
+
+static struct platform_device bfin_device_gpiokeys = {
+        .name      = "gpio-keys",
+        .dev = {
+                .platform_data = &bfin_gpio_keys_data,
+        },
+};
+#endif
+
 static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
         &bf5xx_nand_device,
@@ -739,6 +820,10 @@ static struct platform_device *stamp_devices[] __initdata = {
         &isp1362_hcd_device,
 #endif
 
+#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
+        &musb_device,
+#endif
+
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
         &smc91x_device,
 #endif
@@ -763,6 +848,10 @@ static struct platform_device *stamp_devices[] __initdata = {
         &bfin_fb_device,
 #endif
 
+#if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
+        &bf52x_t350mcqb_device,
+#endif
+
 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
         &bfin_fb_adv7393_device,
 #endif
@@ -783,6 +872,10 @@ static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
         &bfin_pata_device,
 #endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+        &bfin_device_gpiokeys,
+#endif
 };
 
 static int __init stamp_init(void)
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 6bcf4047f89c..a72c7a620fa1 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -40,6 +40,7 @@
 #endif
 #include <linux/pata_platform.h>
 #include <linux/irq.h>
+
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/reboot.h>
@@ -303,7 +304,77 @@ static struct platform_device bfin_uart_device = {
 };
 #endif
 
-static struct platform_device *stamp_devices[] __initdata = {
+#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
+
+#include <linux/serial_8250.h>
+#include <linux/serial.h>
+
+/*
+ * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
+ * running at half system clock, both with interrupt output or-ed to PF8. Change to
+ * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
+ */
+
+static struct plat_serial8250_port serial8250_platform_data [] = {
+        {
+                .membase = 0x20200000,
+                .mapbase = 0x20200000,
+                .irq = IRQ_PF8,
+                .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
+                .iotype = UPIO_MEM,
+                .regshift = 1,
+                .uartclk = 66666667,
+        }, {
+                .membase = 0x20200010,
+                .mapbase = 0x20200010,
+                .irq = IRQ_PF8,
+                .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
+                .iotype = UPIO_MEM,
+                .regshift = 1,
+                .uartclk = 66666667,
+        }, {
+        }
+};
+
+static struct platform_device serial8250_device = {
+        .id             = PLAT8250_DEV_PLATFORM,
+        .name           = "serial8250",
+        .dev            = {
+                .platform_data = serial8250_platform_data,
+        },
+};
+
+#endif
+
+#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
+
+/*
+ * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
+ * interrupt output wired to PF9. Change to suit different FPGA configuration
+ */
+
+static struct resource opencores_kbd_resources[] = {
+        [0] = {
+                .start  = 0x20200030,
+                .end    = 0x20300030 + 2,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_PF9,
+                .end    = IRQ_PF9,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
+        },
+};
+
+static struct platform_device opencores_kbd_device = {
+        .id             = -1,
+        .name           = "opencores-kbd",
+        .resource       = opencores_kbd_resources,
+        .num_resources  = ARRAY_SIZE(opencores_kbd_resources),
+};
+#endif
+
+static struct platform_device *h8606_devices[] __initdata = {
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
         &rtc_device,
 #endif
@@ -327,13 +398,21 @@ static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
         &bfin_uart_device,
 #endif
+
+#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
+        &serial8250_device,
+#endif
+
+#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
+        &opencores_kbd_device,
+#endif
 };
 
 static int __init H8606_init(void)
 {
         printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
         printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
-        platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
+        platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 #endif
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index be852034a68b..c37dd45c8803 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -256,6 +256,50 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+static struct gpio_keys_button bfin_gpio_keys_table[] = {
+        {BTN_0, GPIO_PF7, 1, "gpio-keys: BTN0"},
+        {BTN_1, GPIO_PF8, 1, "gpio-keys: BTN1"},
+        {BTN_2, GPIO_PF9, 1, "gpio-keys: BTN2"},
+        {BTN_3, GPIO_PF10, 1, "gpio-keys: BTN3"},
+};
+
+static struct gpio_keys_platform_data bfin_gpio_keys_data = {
+        .buttons        = bfin_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
+};
+
+static struct platform_device bfin_device_gpiokeys = {
+        .name      = "gpio-keys",
+        .dev = {
+                .platform_data = &bfin_gpio_keys_data,
+        },
+};
+#endif
+
+#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
+#include <linux/i2c-gpio.h>
+
+static struct i2c_gpio_platform_data i2c_gpio_data = {
+        .sda_pin                = 1,
+        .scl_pin                = 0,
+        .sda_is_open_drain      = 0,
+        .scl_is_open_drain      = 0,
+        .udelay                 = 40,
+};
+
+static struct platform_device i2c_gpio_device = {
+        .name           = "i2c-gpio",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &i2c_gpio_data,
+        },
+};
+#endif
+
 static struct platform_device *ezkit_devices[] __initdata = {
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
         &smc91x_device,
@@ -280,6 +324,14 @@ static struct platform_device *ezkit_devices[] __initdata = {
 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
         &bfin_pata_device,
 #endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+        &bfin_device_gpiokeys,
+#endif
+
+#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
+        &i2c_gpio_device,
+#endif
 };
 
 static int __init ezkit_init(void)
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index 8fde8d832850..ac52b040b336 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -32,6 +32,7 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
@@ -108,6 +109,50 @@ static struct platform_device net2272_bfin_device = {
 };
 #endif
 
+static struct mtd_partition stamp_partitions[] = {
+        {
+                .name   = "Bootloader",
+                .size   = 0x20000,
+                .offset = 0,
+        }, {
+                .name   = "Kernel",
+                .size   = 0xE0000,
+                .offset = MTDPART_OFS_APPEND,
+        }, {
+                .name   = "RootFS",
+                .size   = MTDPART_SIZ_FULL,
+                .offset = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct physmap_flash_data stamp_flash_data = {
+        .width    = 2,
+        .parts    = stamp_partitions,
+        .nr_parts = ARRAY_SIZE(stamp_partitions),
+};
+
+static struct resource stamp_flash_resource[] = {
+        {
+                .name  = "cfi_probe",
+                .start = 0x20000000,
+                .end   = 0x203fffff,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = CONFIG_ENET_FLASH_PIN,
+                .flags = IORESOURCE_IRQ,
+        }
+};
+
+static struct platform_device stamp_flash_device = {
+        .name          = "BF5xx-Flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &stamp_flash_data,
+        },
+        .num_resources = ARRAY_SIZE(stamp_flash_resource),
+        .resource      = stamp_flash_resource,
+};
+
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 /* all SPI peripherals info goes here */
 
@@ -373,6 +418,49 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+static struct gpio_keys_button bfin_gpio_keys_table[] = {
+        {BTN_0, GPIO_PF5, 1, "gpio-keys: BTN0"},
+        {BTN_1, GPIO_PF6, 1, "gpio-keys: BTN1"},
+        {BTN_2, GPIO_PF8, 1, "gpio-keys: BTN2"},
+};
+
+static struct gpio_keys_platform_data bfin_gpio_keys_data = {
+        .buttons        = bfin_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
+};
+
+static struct platform_device bfin_device_gpiokeys = {
+        .name      = "gpio-keys",
+        .dev = {
+                .platform_data = &bfin_gpio_keys_data,
+        },
+};
+#endif
+
+#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
+#include <linux/i2c-gpio.h>
+
+static struct i2c_gpio_platform_data i2c_gpio_data = {
+        .sda_pin                = 2,
+        .scl_pin                = 3,
+        .sda_is_open_drain      = 0,
+        .scl_is_open_drain      = 0,
+        .udelay                 = 40,
+};
+
+static struct platform_device i2c_gpio_device = {
+        .name           = "i2c-gpio",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &i2c_gpio_data,
+        },
+};
+#endif
+
 static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
         &rtc_device,
@@ -406,6 +494,15 @@ static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
         &bfin_pata_device,
 #endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+        &bfin_device_gpiokeys,
+#endif
+
+#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
+        &i2c_gpio_device,
+#endif
+        &stamp_flash_device,
 };
 
 static int __init stamp_init(void)
@@ -418,12 +515,10 @@ static int __init stamp_init(void)
                 return ret;
 
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
-# if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
         /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
         bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN));
         bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN);
         SSYNC();
-# endif
 #endif
 
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
@@ -440,10 +535,8 @@ arch_initcall(stamp_init);
 
 void native_machine_restart(char *cmd)
 {
-#if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
-# define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN)
+#define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN)
         bfin_write_FIO_INEN(~BIT_TO_SET);
         bfin_write_FIO_DIR(BIT_TO_SET);
         bfin_write_FIO_FLAG_C(BIT_TO_SET);
-#endif
 }
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig
index 96a15196e416..7e789dbef036 100644
--- a/arch/blackfin/mach-bf537/boards/Kconfig
+++ b/arch/blackfin/mach-bf537/boards/Kconfig
@@ -21,6 +21,12 @@ config PNAV10
         help
           PNAV board support.
 
+config CAMSIG_MINOTAUR
+        bool "Cambridge Signal Processing LTD Minotaur"
+        depends on (BF537)
+        help
+          Board supply package for CSP Minotaur
+
 config GENERIC_BF537_BOARD
         bool "Generic"
         help
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
index 94a85174283a..87e450f29e37 100644
--- a/arch/blackfin/mach-bf537/boards/Makefile
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_GENERIC_BF537_BOARD)      += generic_board.o
 obj-$(CONFIG_BFIN537_STAMP)            += stamp.o led.o
 obj-$(CONFIG_BFIN537_BLUETECHNIX_CM)   += cm_bf537.o
 obj-$(CONFIG_PNAV10)                   += pnav10.o
+obj-$(CONFIG_CAMSIG_MINOTAUR)          += minotaur.o
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index c0fb06dbc42e..8703b67d5ec6 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -29,6 +29,7 @@
  */
 
 #include <linux/device.h>
+#include <linux/etherdevice.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
@@ -216,6 +217,12 @@ static struct platform_device rtc_device = {
 };
 #endif
 
+#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
+static struct platform_device hitachi_fb_device = {
+        .name = "hitachi-tx09",
+};
+#endif
+
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 static struct resource smc91x_resources[] = {
         {
@@ -374,6 +381,10 @@ static struct platform_device bfin_pata_device = {
 #endif
 
 static struct platform_device *cm_bf537_devices[] __initdata = {
+#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
+        &hitachi_fb_device,
+#endif
+
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
         &rtc_device,
 #endif
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
index 09f4bfbd2350..3e52f3f5bd58 100644
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ b/arch/blackfin/mach-bf537/boards/generic_board.c
@@ -8,7 +8,7 @@
  *
  * Modified:
  *               Copyright 2005 National ICT Australia (NICTA)
- *               Copyright 2004-2007 Analog Devices Inc.
+ *               Copyright 2004-2008 Analog Devices Inc.
  *
  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  *
@@ -29,6 +29,7 @@
  */
 
 #include <linux/device.h>
+#include <linux/etherdevice.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
@@ -204,12 +205,8 @@ static struct resource sl811_hcd_resources[] = {
 void sl811_port_power(struct device *dev, int is_on)
 {
         gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
-        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
+        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
 
-        if (is_on)
-                gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
-        else
-                gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
 }
 #endif
 
@@ -733,9 +730,11 @@ void native_machine_restart(char *cmd)
                 bfin_gpio_reset_spi0_ssel1();
 }
 
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 void bfin_get_ether_addr(char *addr)
 {
         random_ether_addr(addr);
         printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
 }
 EXPORT_SYMBOL(bfin_get_ether_addr);
+#endif
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
new file mode 100644
index 000000000000..b8bbba85af53
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -0,0 +1,317 @@
+/*
+ */
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
+#include <linux/usb_isp1362.h>
+#endif
+#include <linux/pata_platform.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/usb_sl811.h>
+#include <asm/dma.h>
+#include <asm/bfin5xx_spi.h>
+#include <asm/reboot.h>
+#include <linux/spi/ad7877.h>
+
+/*
+ * Name the Board for the /proc/cpuinfo
+ */
+char *bfin_board_name = "CamSig Minotaur BF537";
+
+#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
+static struct resource bfin_pcmcia_cf_resources[] = {
+        {
+                .start = 0x20310000, /* IO PORT */
+                .end = 0x20312000,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = 0x20311000, /* Attribute Memory */
+                .end = 0x20311FFF,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PF4,
+                .end = IRQ_PF4,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
+        }, {
+                .start = IRQ_PF6, /* Card Detect PF6 */
+                .end = IRQ_PF6,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_pcmcia_cf_device = {
+        .name = "bfin_cf_pcmcia",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
+        .resource = bfin_pcmcia_cf_resources,
+};
+#endif
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+static struct platform_device rtc_device = {
+        .name = "rtc-bfin",
+        .id   = -1,
+};
+#endif
+
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+static struct platform_device bfin_mac_device = {
+        .name = "bfin_mac",
+};
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+static struct resource net2272_bfin_resources[] = {
+        {
+                .start = 0x20300000,
+                .end = 0x20300000 + 0x100,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = IRQ_PF7,
+                .end = IRQ_PF7,
+                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct platform_device net2272_bfin_device = {
+        .name = "net2272",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(net2272_bfin_resources),
+        .resource = net2272_bfin_resources,
+};
+#endif
+
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+/* all SPI peripherals info goes here */
+
+#if defined(CONFIG_MTD_M25P80) \
+        || defined(CONFIG_MTD_M25P80_MODULE)
+
+/* Partition sizes */
+#define FLASH_SIZE       0x00400000
+#define PSIZE_UBOOT      0x00030000
+#define PSIZE_INITRAMFS  0x00240000
+
+static struct mtd_partition bfin_spi_flash_partitions[] = {
+        {
+                .name       = "uboot",
+                .size       = PSIZE_UBOOT,
+                .offset     = 0x000000,
+                .mask_flags = MTD_CAP_ROM
+        }, {
+                .name       = "initramfs",
+                .size       = PSIZE_INITRAMFS,
+                .offset     = PSIZE_UBOOT
+        }, {
+                .name       = "opt",
+                .size       = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
+                .offset     = PSIZE_UBOOT + PSIZE_INITRAMFS,
+        }
+};
+
+static struct flash_platform_data bfin_spi_flash_data = {
+        .name = "m25p80",
+        .parts = bfin_spi_flash_partitions,
+        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
+        .type = "m25p64",
+};
+
+/* SPI flash chip (m25p64) */
+static struct bfin5xx_spi_chip spi_flash_chip_info = {
+        .enable_dma = 0,         /* use dma transfer with this chip*/
+        .bits_per_word = 8,
+};
+#endif
+
+#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
+static struct bfin5xx_spi_chip spi_mmc_chip_info = {
+        .enable_dma = 1,
+        .bits_per_word = 8,
+};
+#endif
+
+static struct spi_board_info bfin_spi_board_info[] __initdata = {
+#if defined(CONFIG_MTD_M25P80) \
+        || defined(CONFIG_MTD_M25P80_MODULE)
+        {
+                /* the modalias must be the same as spi device driver name */
+                .modalias = "m25p80", /* Name of spi_driver for this device */
+                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0, /* Framework bus number */
+                .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
+                .platform_data = &bfin_spi_flash_data,
+                .controller_data = &spi_flash_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+
+#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
+        {
+                .modalias = "spi_mmc_dummy",
+                .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 0,
+                .platform_data = NULL,
+                .controller_data = &spi_mmc_chip_info,
+                .mode = SPI_MODE_3,
+        },
+        {
+                .modalias = "spi_mmc",
+                .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = CONFIG_SPI_MMC_CS_CHAN,
+                .platform_data = NULL,
+                .controller_data = &spi_mmc_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
+};
+
+/* SPI controller data */
+static struct bfin5xx_spi_master bfin_spi0_info = {
+        .num_chipselect = 8,
+        .enable_dma = 1,  /* master has the ability to do dma transfer */
+};
+
+/* SPI (0) */
+static struct resource bfin_spi0_resource[] = {
+        [0] = {
+                .start = SPI0_REGBASE,
+                .end   = SPI0_REGBASE + 0xFF,
+                .flags = IORESOURCE_MEM,
+                },
+        [1] = {
+                .start = CH_SPI,
+                .end   = CH_SPI,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device bfin_spi0_device = {
+        .name = "bfin-spi",
+        .id = 0, /* Bus number */
+        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
+        .resource = bfin_spi0_resource,
+        .dev = {
+                .platform_data = &bfin_spi0_info, /* Passed to driver */
+        },
+};
+#endif  /* spi master and devices */
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+static struct resource bfin_uart_resources[] = {
+        {
+                .start = 0xFFC00400,
+                .end = 0xFFC004FF,
+                .flags = IORESOURCE_MEM,
+        }, {
+                .start = 0xFFC02000,
+                .end = 0xFFC020FF,
+                .flags = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device bfin_uart_device = {
+        .name = "bfin-uart",
+        .id = 1,
+        .num_resources = ARRAY_SIZE(bfin_uart_resources),
+        .resource = bfin_uart_resources,
+};
+#endif
+
+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
+static struct resource bfin_twi0_resource[] = {
+        [0] = {
+                .start = TWI0_REGBASE,
+                .end   = TWI0_REGBASE + 0xFF,
+                .flags = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start = IRQ_TWI,
+                .end   = IRQ_TWI,
+                .flags = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device i2c_bfin_twi_device = {
+        .name = "i2c-bfin-twi",
+        .id = 0,
+        .num_resources = ARRAY_SIZE(bfin_twi0_resource),
+        .resource = bfin_twi0_resource,
+};
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+static struct platform_device bfin_sport0_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 0,
+};
+
+static struct platform_device bfin_sport1_uart_device = {
+        .name = "bfin-sport-uart",
+        .id = 1,
+};
+#endif
+
+static struct platform_device *minotaur_devices[] __initdata = {
+#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
+        &bfin_pcmcia_cf_device,
+#endif
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+        &rtc_device,
+#endif
+
+#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
+        &bfin_mac_device,
+#endif
+
+#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
+        &net2272_bfin_device,
+#endif
+
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        &bfin_spi0_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+        &bfin_uart_device,
+#endif
+
+#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
+        &i2c_bfin_twi_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
+        &bfin_sport0_uart_device,
+        &bfin_sport1_uart_device,
+#endif
+
+};
+
+static int __init minotaur_init(void)
+{
+        printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
+        platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        spi_register_board_info(bfin_spi_board_info,
+                                ARRAY_SIZE(bfin_spi_board_info));
+#endif
+
+        return 0;
+}
+
+arch_initcall(minotaur_init);
+
+void native_machine_restart(char *cmd)
+{
+        /* workaround reboot hang when booting from SPI */
+        if ((bfin_read_SYSCR() & 0x7) == 0x3)
+                bfin_gpio_reset_spi0_ssel1();
+}
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index fd5f4a6f08e4..509a8a236fd0 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -8,7 +8,7 @@
  *
  * Modified:
  *               Copyright 2005 National ICT Australia (NICTA)
- *               Copyright 2004-2006 Analog Devices Inc.
+ *               Copyright 2004-2008 Analog Devices Inc.
  *
  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  *
@@ -29,6 +29,7 @@
  */
 
 #include <linux/device.h>
+#include <linux/etherdevice.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
@@ -133,12 +134,8 @@ static struct resource sl811_hcd_resources[] = {
 void sl811_port_power(struct device *dev, int is_on)
 {
         gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
-        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
+        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
 
-        if (is_on)
-                gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
-        else
-                gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
 }
 #endif
 
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 07b0dc273d2f..772541548b76 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -32,6 +32,7 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
@@ -103,6 +104,30 @@ void __exit bfin_isp1761_exit(void)
 arch_initcall(bfin_isp1761_init);
 #endif
 
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+static struct gpio_keys_button bfin_gpio_keys_table[] = {
+        {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
+        {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
+        {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
+        {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
+};
+
+static struct gpio_keys_platform_data bfin_gpio_keys_data = {
+        .buttons        = bfin_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
+};
+
+static struct platform_device bfin_device_gpiokeys = {
+        .name      = "gpio-keys",
+        .dev = {
+                .platform_data = &bfin_gpio_keys_data,
+        },
+};
+#endif
+
 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 static struct resource bfin_pcmcia_cf_resources[] = {
         {
@@ -226,12 +251,7 @@ static struct resource sl811_hcd_resources[] = {
 void sl811_port_power(struct device *dev, int is_on)
 {
         gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
-        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS);
-
-        if (is_on)
-                gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 1);
-        else
-                gpio_set_value(CONFIG_USB_SL811_BFIN_GPIO_VBUS, 0);
+        gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
 }
 #endif
 
@@ -320,6 +340,49 @@ static struct platform_device net2272_bfin_device = {
 };
 #endif
 
+static struct mtd_partition stamp_partitions[] = {
+        {
+                .name       = "Bootloader",
+                .size       = 0x20000,
+                .offset     = 0,
+        }, {
+                .name       = "Kernel",
+                .size       = 0xE0000,
+                .offset     = MTDPART_OFS_APPEND,
+        }, {
+                .name       = "RootFS",
+                .size       = 0x400000 - 0x20000 - 0xE0000 - 0x10000,
+                .offset     = MTDPART_OFS_APPEND,
+        }, {
+                .name       = "MAC Address",
+                .size       = MTDPART_SIZ_FULL,
+                .offset     = 0x3F0000,
+                .mask_flags = MTD_WRITEABLE,
+        }
+};
+
+static struct physmap_flash_data stamp_flash_data = {
+        .width      = 2,
+        .parts      = stamp_partitions,
+        .nr_parts   = ARRAY_SIZE(stamp_partitions),
+};
+
+static struct resource stamp_flash_resource = {
+        .start = 0x20000000,
+        .end   = 0x203fffff,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device stamp_flash_device = {
+        .name          = "physmap-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &stamp_flash_data,
+        },
+        .num_resources = 1,
+        .resource      = &stamp_flash_resource,
+};
+
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 /* all SPI peripherals info goes here */
 
@@ -738,6 +801,11 @@ static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
         &bfin_pata_device,
 #endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+        &bfin_device_gpiokeys,
+#endif
+        &stamp_flash_device,
 };
 
 static int __init stamp_init(void)
diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig
index d8bd3b49f150..1bfcd8f646ab 100644
--- a/arch/blackfin/mach-bf548/Kconfig
+++ b/arch/blackfin/mach-bf548/Kconfig
@@ -7,7 +7,7 @@ menu "BF548 Specific Configuration"
 config DEB_DMA_URGENT
         bool "DMA has priority over core for ext. accesses"
         depends on BF54x
-        default n
+        default y
         help
           Treat any DEB1, DEB2 and DEB3 request as Urgent
 
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index d37d6653c4bc..14860f04d1bd 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -32,6 +32,7 @@
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/irq.h>
@@ -206,23 +207,6 @@ static struct platform_device smsc911x_device = {
 };
 #endif
 
-#if defined(CONFIG_USB_BF54x_HCD) || defined(CONFIG_USB_BF54x_HCD_MODULE)
-static struct resource bf54x_hcd_resources[] = {
-        {
-                .start = 0xFFC03C00,
-                .end = 0xFFC040FF,
-                .flags = IORESOURCE_MEM,
-        },
-};
-
-static struct platform_device bf54x_hcd = {
-        .name = "bf54x-hcd",
-        .id = 0,
-        .num_resources = ARRAY_SIZE(bf54x_hcd_resources),
-        .resource = bf54x_hcd_resources,
-};
-#endif
-
 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 static struct resource musb_resources[] = {
         [0] = {
@@ -243,14 +227,14 @@ static struct resource musb_resources[] = {
 };
 
 static struct musb_hdrc_platform_data musb_plat = {
-#ifdef CONFIG_USB_MUSB_OTG
+#if defined(CONFIG_USB_MUSB_OTG)
         .mode           = MUSB_OTG,
-#elif CONFIG_USB_MUSB_HDRC_HCD
+#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
         .mode           = MUSB_HOST,
-#elif CONFIG_USB_GADGET_MUSB_HDRC
+#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
         .mode           = MUSB_PERIPHERAL,
 #endif
-        .multipoint     = 1,
+        .multipoint     = 0,
 };
 
 static u64 musb_dmamask = ~(u32)0;
@@ -344,6 +328,44 @@ static struct platform_device bf54x_sdh_device = {
 };
 #endif
 
+static struct mtd_partition ezkit_partitions[] = {
+        {
+                .name       = "Bootloader",
+                .size       = 0x20000,
+                .offset     = 0,
+        }, {
+                .name       = "Kernel",
+                .size       = 0xE0000,
+                .offset     = MTDPART_OFS_APPEND,
+        }, {
+                .name       = "RootFS",
+                .size       = MTDPART_SIZ_FULL,
+                .offset     = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct physmap_flash_data ezkit_flash_data = {
+        .width      = 2,
+        .parts      = ezkit_partitions,
+        .nr_parts   = ARRAY_SIZE(ezkit_partitions),
+};
+
+static struct resource ezkit_flash_resource = {
+        .start = 0x20000000,
+        .end   = 0x20ffffff,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ezkit_flash_device = {
+        .name          = "physmap-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &ezkit_flash_data,
+        },
+        .num_resources = 1,
+        .resource      = &ezkit_flash_resource,
+};
+
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 /* all SPI peripherals info goes here */
 #if defined(CONFIG_MTD_M25P80) \
@@ -531,6 +553,29 @@ static struct platform_device i2c_bfin_twi1_device = {
 #endif
 #endif
 
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+#include <linux/gpio_keys.h>
+
+static struct gpio_keys_button bfin_gpio_keys_table[] = {
+        {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
+        {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
+        {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
+        {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
+};
+
+static struct gpio_keys_platform_data bfin_gpio_keys_data = {
+        .buttons        = bfin_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
+};
+
+static struct platform_device bfin_device_gpiokeys = {
+        .name      = "gpio-keys",
+        .dev = {
+                .platform_data = &bfin_gpio_keys_data,
+        },
+};
+#endif
+
 static struct platform_device *ezkit_devices[] __initdata = {
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
         &rtc_device,
@@ -548,10 +593,6 @@ static struct platform_device *ezkit_devices[] __initdata = {
         &smsc911x_device,
 #endif
 
-#if defined(CONFIG_USB_BF54x_HCD) || defined(CONFIG_USB_BF54x_HCD_MODULE)
-        &bf54x_hcd,
-#endif
-
 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
         &musb_device,
 #endif
@@ -583,6 +624,11 @@ static struct platform_device *ezkit_devices[] __initdata = {
         &i2c_bfin_twi1_device,
 #endif
 #endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+        &bfin_device_gpiokeys,
+#endif
+        &ezkit_flash_device,
 };
 
 static int __init stamp_init(void)
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 74b34c7f3629..74fe258421a5 100644
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -298,8 +298,8 @@ ENTRY(_start_dma_code)
         w[p0] = r0.l;
         ssync;
 
-        p0.h = hi(SIC_IWR);
-        p0.l = lo(SIC_IWR);
+        p0.h = hi(SIC_IWR0);
+        p0.l = lo(SIC_IWR0);
         r0.l = 0x1;
         r0.h = 0x0;
         [p0] = r0;
@@ -324,12 +324,25 @@ ENTRY(_start_dma_code)
         w[p0] = r0.l;
         ssync;
 
+#if defined(CONFIG_BF54x)
+        P2.H = hi(EBIU_RSTCTL);
+        P2.L = lo(EBIU_RSTCTL);
+        R0 = [P2];
+        BITSET (R0, 3);
+#else
         P2.H = hi(EBIU_SDGCTL);
         P2.L = lo(EBIU_SDGCTL);
         R0 = [P2];
         BITSET (R0, 24);
+#endif
         [P2] = R0;
         SSYNC;
+#if defined(CONFIG_BF54x)
+.LSRR_MODE:
+        R0 = [P2];
+        CC = BITTST(R0, 4);
+        if !CC JUMP .LSRR_MODE;
+#endif
 
         r0 = CONFIG_VCO_MULT & 63;       /* Load the VCO multiplier         */
         r0 = r0 << 9;                    /* Shift it over,                  */
@@ -361,6 +374,39 @@ ENTRY(_start_dma_code)
         w[p0] = r0.l;
         ssync;
 
+#if defined(CONFIG_BF54x)
+        P2.H = hi(EBIU_RSTCTL);
+        P2.L = lo(EBIU_RSTCTL);
+        R0 = [P2];
+        CC = BITTST(R0, 0);
+        if CC jump .Lskipddrrst;
+        BITSET (R0, 0);
+.Lskipddrrst:
+        BITCLR (R0, 3);
+        [P2] = R0;
+        SSYNC;
+
+        p0.l = lo(EBIU_DDRCTL0);
+        p0.h = hi(EBIU_DDRCTL0);
+        r0.l = lo(mem_DDRCTL0);
+        r0.h = hi(mem_DDRCTL0);
+        [p0] = r0;
+        ssync;
+
+        p0.l = lo(EBIU_DDRCTL1);
+        p0.h = hi(EBIU_DDRCTL1);
+        r0.l = lo(mem_DDRCTL1);
+        r0.h = hi(mem_DDRCTL1);
+        [p0] = r0;
+        ssync;
+
+        p0.l = lo(EBIU_DDRCTL2);
+        p0.h = hi(EBIU_DDRCTL2);
+        r0.l = lo(mem_DDRCTL2);
+        r0.h = hi(mem_DDRCTL2);
+        [p0] = r0;
+        ssync;
+#else
         p0.l = lo(EBIU_SDRRC);
         p0.h = hi(EBIU_SDRRC);
         r0 = mem_SDRRC;
@@ -394,9 +440,10 @@ ENTRY(_start_dma_code)
         R1 = R1 | R0;
         [P2] = R1;
         SSYNC;
+#endif
 
-        p0.h = hi(SIC_IWR);
-        p0.l = lo(SIC_IWR);
+        p0.h = hi(SIC_IWR0);
+        p0.l = lo(SIC_IWR0);
         r0.l = lo(IWR_ENABLE_ALL);
         r0.h = hi(IWR_ENABLE_ALL);
         [p0] = r0;
diff --git a/arch/blackfin/mach-bf548/ints-priority.c b/arch/blackfin/mach-bf548/ints-priority.c
index cb0ebac53c79..2665653cee37 100644
--- a/arch/blackfin/mach-bf548/ints-priority.c
+++ b/arch/blackfin/mach-bf548/ints-priority.c
@@ -4,7 +4,7 @@
  * Author:       Michael Hennerich
  *
  * Created:
- * Description:  Set up the interupt priorities
+ * Description:  Set up the interrupt priorities
  *
  * Modified:
  *               Copyright 2004-2006 Analog Devices Inc.
@@ -58,7 +58,7 @@ void program_IAR(void)
                             ((CONFIG_IRQ_PINT1 - 7) << IRQ_PINT1_POS) |
                             ((CONFIG_IRQ_MDMAS0 - 7) << IRQ_MDMAS0_POS) |
                             ((CONFIG_IRQ_MDMAS1 - 7) << IRQ_MDMAS1_POS) |
-                            ((CONFIG_IRQ_WATCHDOG - 7) << IRQ_WATCHDOG_POS));
+                            ((CONFIG_IRQ_WATCHDOG - 7) << IRQ_WATCH_POS));
 
         bfin_write_SIC_IAR3(((CONFIG_IRQ_DMAC1_ERR - 7) << IRQ_DMAC1_ERR_POS) |
                             ((CONFIG_IRQ_SPORT2_ERR - 7) << IRQ_SPORT2_ERR_POS) |
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index c19cd29b948a..3a79a9061bdc 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -198,6 +198,13 @@ static struct platform_device bfin_spi0_device = {
 #endif  /* spi master and devices */
 
 
+#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
+static struct platform_device hitachi_fb_device = {
+        .name = "hitachi-tx09",
+};
+#endif
+
+
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 
 static struct resource smc91x_resources[] = {
@@ -315,6 +322,10 @@ static struct platform_device bfin_pata_device = {
 
 static struct platform_device *cm_bf561_devices[] __initdata = {
 
+#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
+        &hitachi_fb_device,
+#endif
+
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
         &bfin_uart_device,
 #endif
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 4ff8f6e7a11f..7601c3be1b5c 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -29,6 +29,9 @@
 
 #include <linux/device.h>
 #include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
@@ -155,6 +158,44 @@ static struct platform_device bfin_uart_device = {
 };
 #endif
 
+static struct mtd_partition ezkit_partitions[] = {
+        {
+                .name       = "Bootloader",
+                .size       = 0x20000,
+                .offset     = 0,
+        }, {
+                .name       = "Kernel",
+                .size       = 0xE0000,
+                .offset     = MTDPART_OFS_APPEND,
+        }, {
+                .name       = "RootFS",
+                .size       = MTDPART_SIZ_FULL,
+                .offset     = MTDPART_OFS_APPEND,
+        }
+};
+
+static struct physmap_flash_data ezkit_flash_data = {
+        .width      = 2,
+        .parts      = ezkit_partitions,
+        .nr_parts   = ARRAY_SIZE(ezkit_partitions),
+};
+
+static struct resource ezkit_flash_resource = {
+        .start = 0x20000000,
+        .end   = 0x207fffff,
+        .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ezkit_flash_device = {
+        .name          = "physmap-flash",
+        .id            = 0,
+        .dev = {
+                .platform_data = &ezkit_flash_data,
+        },
+        .num_resources = 1,
+        .resource      = &ezkit_flash_resource,
+};
+
 #ifdef CONFIG_SPI_BFIN
 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
@@ -246,6 +287,50 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+
+static struct gpio_keys_button bfin_gpio_keys_table[] = {
+        {BTN_0, GPIO_PF5, 1, "gpio-keys: BTN0"},
+        {BTN_1, GPIO_PF6, 1, "gpio-keys: BTN1"},
+        {BTN_2, GPIO_PF7, 1, "gpio-keys: BTN2"},
+        {BTN_3, GPIO_PF8, 1, "gpio-keys: BTN3"},
+};
+
+static struct gpio_keys_platform_data bfin_gpio_keys_data = {
+        .buttons        = bfin_gpio_keys_table,
+        .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
+};
+
+static struct platform_device bfin_device_gpiokeys = {
+        .name      = "gpio-keys",
+        .dev = {
+                .platform_data = &bfin_gpio_keys_data,
+        },
+};
+#endif
+
+#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
+#include <linux/i2c-gpio.h>
+
+static struct i2c_gpio_platform_data i2c_gpio_data = {
+        .sda_pin                = 1,
+        .scl_pin                = 0,
+        .sda_is_open_drain      = 0,
+        .scl_is_open_drain      = 0,
+        .udelay                 = 40,
+};
+
+static struct platform_device i2c_gpio_device = {
+        .name           = "i2c-gpio",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &i2c_gpio_data,
+        },
+};
+#endif
+
 static struct platform_device *ezkit_devices[] __initdata = {
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
         &smc91x_device,
@@ -258,12 +343,23 @@ static struct platform_device *ezkit_devices[] __initdata = {
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
         &bfin_spi0_device,
 #endif
+
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
         &bfin_uart_device,
 #endif
+
 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
         &bfin_pata_device,
 #endif
+
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
+        &bfin_device_gpiokeys,
+#endif
+
+#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
+        &i2c_gpio_device,
+#endif
+        &ezkit_flash_device,
 };
 
 static int __init ezkit_init(void)
diff --git a/arch/blackfin/mach-bf561/coreb.c b/arch/blackfin/mach-bf561/coreb.c
index 5d1d21b4c2a7..1b44e9e6dc3b 100644
--- a/arch/blackfin/mach-bf561/coreb.c
+++ b/arch/blackfin/mach-bf561/coreb.c
@@ -33,7 +33,9 @@
 #include <linux/ioport.h>
 #include <linux/module.h>
 #include <linux/uaccess.h>
+#include <linux/fs.h>
 #include <asm/dma.h>
+#include <asm/cacheflush.h>
 
 #define MODULE_VER              "v0.1"
 
@@ -90,11 +92,12 @@ static ssize_t coreb_write(struct file *file, const char *buf, size_t count,
 
                 coreb_dma_done = 0;
 
+                flush_dcache_range((unsigned long)buf, (unsigned long)(buf+len));
                 /* Source Channel */
                 set_dma_start_addr(CH_MEM_STREAM2_SRC, (unsigned long)buf);
                 set_dma_x_count(CH_MEM_STREAM2_SRC, len);
                 set_dma_x_modify(CH_MEM_STREAM2_SRC, sizeof(char));
-                set_dma_config(CH_MEM_STREAM2_SRC, RESTART);
+                set_dma_config(CH_MEM_STREAM2_SRC, 0);
                 /* Destination Channel */
                 set_dma_start_addr(CH_MEM_STREAM2_DEST, coreb_base + p);
                 set_dma_x_count(CH_MEM_STREAM2_DEST, len);
@@ -135,11 +138,12 @@ static ssize_t coreb_read(struct file *file, char *buf, size_t count,
 
                 coreb_dma_done = 0;
 
+                invalidate_dcache_range((unsigned long)buf, (unsigned long)(buf+len));
                 /* Source Channel */
                 set_dma_start_addr(CH_MEM_STREAM2_SRC, coreb_base + p);
                 set_dma_x_count(CH_MEM_STREAM2_SRC, len);
                 set_dma_x_modify(CH_MEM_STREAM2_SRC, sizeof(char));
-                set_dma_config(CH_MEM_STREAM2_SRC, RESTART);
+                set_dma_config(CH_MEM_STREAM2_SRC, 0);
                 /* Destination Channel */
                 set_dma_start_addr(CH_MEM_STREAM2_DEST, (unsigned long)buf);
                 set_dma_x_count(CH_MEM_STREAM2_DEST, len);
@@ -266,7 +270,7 @@ static int coreb_ioctl(struct inode *inode, struct file *file,
                 coreb_status |= COREB_IS_RUNNING;
                 bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~0x0020);
                 SSYNC();
-                spin_lock_irq(&coreb_lock);
+                spin_unlock_irq(&coreb_lock);
                 break;
 #if defined(CONFIG_BF561_COREB_RESET)
         case CMD_COREB_STOP:
@@ -275,7 +279,7 @@ static int coreb_ioctl(struct inode *inode, struct file *file,
                 bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() | 0x0020);
                 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080);
                 coreb_status &= ~COREB_IS_RUNNING;
-                spin_lock_irq(&coreb_lock);
+                spin_unlock_irq(&coreb_lock);
                 break;
         case CMD_COREB_RESET:
                 printk(KERN_INFO "Resetting Core B\n");
diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile
index 4d7733dfd5de..8636d4284bdb 100644
--- a/arch/blackfin/mach-common/Makefile
+++ b/arch/blackfin/mach-common/Makefile
@@ -3,10 +3,9 @@
 #
 
 obj-y := \
-        cache.o cacheinit.o cplbhdlr.o cplbmgr.o entry.o \
+        cache.o cacheinit.o entry.o \
         interrupt.o lock.o irqpanic.o arch_checks.o
 
-obj-$(CONFIG_CPLB_INFO)          += cplbinfo.o
 obj-$(CONFIG_BFIN_SINGLE_CORE)   += ints-priority-sc.o
 obj-$(CONFIG_BFIN_DUAL_CORE)     += ints-priority-dc.o
 obj-$(CONFIG_PM)                 += pm.o dpmc.o
diff --git a/arch/blackfin/mach-common/dpmc.S b/arch/blackfin/mach-common/dpmc.S
index 39fbc2861107..b82c096e1980 100644
--- a/arch/blackfin/mach-common/dpmc.S
+++ b/arch/blackfin/mach-common/dpmc.S
@@ -38,6 +38,9 @@ ENTRY(_unmask_wdog_wakeup_evt)
 #if defined(CONFIG_BF561)
         P0.H = hi(SICA_IWR1);
         P0.L = lo(SICA_IWR1);
+#elif defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
+        P0.h = HI(SIC_IWR0);
+        P0.l = LO(SIC_IWR0);
 #else
         P0.h = HI(SIC_IWR);
         P0.l = LO(SIC_IWR);
@@ -172,7 +175,7 @@ ENTRY(_sleep_mode)
         call _set_sic_iwr;
 
         R0 = 0xFFFF (Z);
-        call _set_rtc_istat
+        call _set_rtc_istat;
 
         P0.H = hi(PLL_CTL);
         P0.L = lo(PLL_CTL);
@@ -210,7 +213,7 @@ ENTRY(_hibernate_mode)
         call _set_sic_iwr;
 
         R0 = 0xFFFF (Z);
-        call _set_rtc_istat
+        call _set_rtc_istat;
 
         P0.H = hi(VR_CTL);
         P0.L = lo(VR_CTL);
@@ -236,7 +239,7 @@ ENTRY(_deep_sleep)
 
         call _set_sic_iwr;
 
-        call _set_sdram_srfs;
+        call _set_dram_srfs;
 
         /* Clear all the interrupts,bits sticky */
         R0 = 0xFFFF (Z);
@@ -253,7 +256,7 @@ ENTRY(_deep_sleep)
         SSYNC;
         IDLE;
 
-        call _unset_sdram_srfs;
+        call _unset_dram_srfs;
 
         call _test_pll_locked;
 
@@ -285,23 +288,22 @@ ENTRY(_sleep_deeper)
         P3 = R0;
         R0 = IWR_ENABLE(0);
         call _set_sic_iwr;
-        call _set_sdram_srfs;
+        call _set_dram_srfs;    /* Set SDRAM Self Refresh */
 
         /* Clear all the interrupts,bits sticky */
         R0 = 0xFFFF (Z);
-        call _set_rtc_istat
-
+        call _set_rtc_istat;
         P0.H = hi(PLL_DIV);
         P0.L = lo(PLL_DIV);
         R6 = W[P0](z);
         R0.L = 0xF;
-        W[P0] = R0.l;
+        W[P0] = R0.l;           /* Set Max VCO to SCLK divider */
 
         P0.H = hi(PLL_CTL);
         P0.L = lo(PLL_CTL);
         R5 = W[P0](z);
         R0.L = (CONFIG_MIN_VCO_HZ/CONFIG_CLKIN_HZ) << 9;
-        W[P0] = R0.l;
+        W[P0] = R0.l;           /* Set Min CLKIN to VCO multiplier */
 
         SSYNC;
         IDLE;
@@ -317,29 +319,28 @@ ENTRY(_sleep_deeper)
         R1 = R1|R2;
 
         R2 = DEPOSIT(R7, R1);
-        W[P0] = R2;
+        W[P0] = R2;             /* Set Min Core Voltage */
 
         SSYNC;
         IDLE;
 
         call _test_pll_locked;
 
+        R0 = P3;
+        call _set_sic_iwr;      /* Set Awake from IDLE */
+
         P0.H = hi(PLL_CTL);
         P0.L = lo(PLL_CTL);
         R0 = W[P0](z);
         BITSET (R0, 3);
-        W[P0] = R0.L;
-
-        R0 = P3;
-        call _set_sic_iwr;
-
+        W[P0] = R0.L;           /* Turn CCLK OFF */
         SSYNC;
         IDLE;
 
         call _test_pll_locked;
 
         R0 = IWR_ENABLE(0);
-        call _set_sic_iwr;
+        call _set_sic_iwr;      /* Set Awake from IDLE PLL */
 
         P0.H = hi(VR_CTL);
         P0.L = lo(VR_CTL);
@@ -352,15 +353,15 @@ ENTRY(_sleep_deeper)
 
         P0.H = hi(PLL_DIV);
         P0.L = lo(PLL_DIV);
-        W[P0]= R6;
+        W[P0]= R6;              /* Restore CCLK and SCLK divider */
 
         P0.H = hi(PLL_CTL);
         P0.L = lo(PLL_CTL);
-        w[p0] = R5;
+        w[p0] = R5;             /* Restore VCO multiplier */
         IDLE;
         call _test_pll_locked;
 
-        call _unset_sdram_srfs;
+        call _unset_dram_srfs;  /* SDRAM Self Refresh Off */
 
         STI R4;
 
@@ -368,25 +369,47 @@ ENTRY(_sleep_deeper)
         ( R7:0, P5:0 ) = [SP++];
         RTS;
 
-ENTRY(_set_sdram_srfs)
-        /*  set the sdram to self refresh mode */
+ENTRY(_set_dram_srfs)
+        /*  set the dram to self refresh mode */
+#if defined(CONFIG_BF54x)
+        P0.H = hi(EBIU_RSTCTL);
+        P0.L = lo(EBIU_RSTCTL);
+        R2 = [P0];
+        R3.H = hi(SRREQ);
+        R3.L = lo(SRREQ);
+#else
         P0.H = hi(EBIU_SDGCTL);
         P0.L = lo(EBIU_SDGCTL);
         R2 = [P0];
         R3.H = hi(SRFS);
         R3.L = lo(SRFS);
+#endif
         R2 = R2|R3;
         [P0] = R2;
         ssync;
+#if defined(CONFIG_BF54x)
+.LSRR_MODE:
+        R2 = [P0];
+        CC = BITTST(R2, 4);
+        if !CC JUMP .LSRR_MODE;
+#endif
         RTS;
 
-ENTRY(_unset_sdram_srfs)
-        /*  set the sdram out of self refresh mode */
+ENTRY(_unset_dram_srfs)
+        /*  set the dram out of self refresh mode */
+#if defined(CONFIG_BF54x)
+        P0.H = hi(EBIU_RSTCTL);
+        P0.L = lo(EBIU_RSTCTL);
+        R2 = [P0];
+        R3.H = hi(SRREQ);
+        R3.L = lo(SRREQ);
+#else
         P0.H = hi(EBIU_SDGCTL);
         P0.L = lo(EBIU_SDGCTL);
         R2 = [P0];
         R3.H = hi(SRFS);
         R3.L = lo(SRFS);
+#endif
         R3 = ~R3;
         R2 = R2&R3;
         [P0] = R2;
@@ -394,8 +417,13 @@ ENTRY(_unset_sdram_srfs)
         RTS;
 
 ENTRY(_set_sic_iwr)
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
+        P0.H = hi(SIC_IWR0);
+        P0.L = lo(SIC_IWR0);
+#else
         P0.H = hi(SIC_IWR);
         P0.L = lo(SIC_IWR);
+#endif
         [P0] = R0;
         SSYNC;
         RTS;
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index dc9d3ee2e691..56ff51bc8c21 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -95,6 +95,9 @@ ENTRY(_ex_workaround_261)
         R6 = 0x26;      /* Data CPLB Miss */
         cc = R6 == R7;
         if cc jump _ex_dcplb_miss (BP);
+        R6 = 0x23;      /* Data CPLB Miss */
+        cc = R6 == R7;
+        if cc jump _ex_dcplb_viol (BP);
         /* Handle 0x23 Data CPLB Protection Violation
          * and Data CPLB Multiple Hits - Linux Trap Zero
          */
@@ -102,17 +105,33 @@ ENTRY(_ex_workaround_261)
 ENDPROC(_ex_workaround_261)
 
 #else
+#ifdef CONFIG_MPU
+#define _ex_dviol _ex_dcplb_viol
+#else
 #define _ex_dviol _ex_trap_c
+#endif
 #define _ex_dmiss _ex_dcplb_miss
 #define _ex_dmult _ex_trap_c
 #endif
 
+
+ENTRY(_ex_dcplb_viol)
 ENTRY(_ex_dcplb_miss)
 ENTRY(_ex_icplb_miss)
         (R7:6,P5:4) = [sp++];
         ASTAT = [sp++];
         SAVE_ALL_SYS
+#ifdef CONFIG_MPU
+        R0 = SEQSTAT;
+        R1 = SP;
+        sp += -12;
+        call _cplb_hdr;
+        sp += 12;
+        CC = R0 == 0;
+        IF !CC JUMP _handle_bad_cplb;
+#else
         call __cplb_hdr;
+#endif
         DEBUG_START_HWTRACE(p5, r7)
         RESTORE_ALL_SYS
         SP = EX_SCRATCH_REG;
@@ -329,7 +348,7 @@ ENTRY(_exception_to_level5)
         R7 = R7 + R6;
         P5 = R7;
         R1 = [P5];
-        [SP + 8] = r1;
+        [SP + PT_SEQSTAT] = r1;
 
         r0 = sp;        /* stack frame pt_regs pointer argument ==> r0 */
         SP += -12;
@@ -633,9 +652,7 @@ ENTRY(_ret_from_exception)
         [sp + PT_IPEND] = r0;
 
 1:
-        r1 = 0x37(Z);
-        r2 = ~r1;
-        r2.h = 0;
+        r2 = LO(~0x37) (Z);
         r0 = r2 & r0;
         cc = r0 == 0;
         if !cc jump 4f; /* if not return to user mode, get out */
@@ -1364,6 +1381,7 @@ ENTRY(_sys_call_table)
         .long _sys_set_robust_list
         .long _sys_get_robust_list      /* 355 */
         .long _sys_fallocate
+        .long _sys_semtimedop
         .rept NR_syscalls-(.-_sys_call_table)/4
         .long _sys_ni_syscall
         .endr
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 4de376418a18..7f752c87fe46 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -34,9 +34,13 @@
 #include <asm/entry.h>
 #include <asm/asm-offsets.h>
 #include <asm/trace.h>
+#include <asm/traps.h>
+#include <asm/thread_info.h>
 
 #include <asm/mach-common/context.S>
 
+.extern _ret_from_exception
+
 #ifdef CONFIG_I_ENTRY_L1
 .section .l1.text
 #else
@@ -117,8 +121,8 @@ __common_int_entry:
 
 #if ANOMALY_05000283 || ANOMALY_05000315
         cc = r7 == r7;
-        p5.h = 0xffc0;
-        p5.l = 0x0014;
+        p5.h = HI(CHIPID);
+        p5.l = LO(CHIPID);
         if cc jump 1f;
         r7.l = W[p5];
 1:
@@ -134,26 +138,22 @@ __common_int_entry:
 
 /* interrupt routine for ivhw - 5 */
 ENTRY(_evt_ivhw)
-        SAVE_CONTEXT
+        SAVE_ALL_SYS
 #ifdef CONFIG_FRAME_POINTER
         fp = 0;
 #endif
+
 #if ANOMALY_05000283
         cc = r7 == r7;
-        p5.h = 0xffc0;
-        p5.l = 0x0014;
+        p5.h = HI(CHIPID);
+        p5.l = LO(CHIPID);
         if cc jump 1f;
         r7.l = W[p5];
 1:
 #endif
 
-        trace_buffer_stop(p0, r0);
-
-        r0 = IRQ_HWERR;
-        r1 = sp;
-
 #ifdef CONFIG_HARDWARE_PM
-        r7 = SEQSTAT;
+        r7 = [sp + PT_SEQSTAT];
         r7 = r7 >>> 0xe;
         r6 = 0x1F;
         r7 = r7 & r6;
@@ -161,11 +161,29 @@ ENTRY(_evt_ivhw)
         cc = r7 == r5;
         if cc jump .Lcall_do_ovf; /* deal with performance counter overflow */
 #endif
-
+        # We are going to dump something out, so make sure we print IPEND properly
+        p2.l = lo(IPEND);
+        p2.h = hi(IPEND);
+        r0 = [p2];
+        [sp + PT_IPEND] = r0;
+
+        /* set the EXCAUSE to HWERR for trap_c */
+        r0 = [sp + PT_SEQSTAT];
+        R1.L = LO(VEC_HWERR);
+        R1.H = HI(VEC_HWERR);
+        R0 = R0 | R1;
+        [sp + PT_SEQSTAT] = R0;
+
+        r0 = sp;        /* stack frame pt_regs pointer argument ==> r0 */
         SP += -12;
-        call _irq_panic;
+        call _trap_c;
         SP += 12;
+
+        call _ret_from_exception;
+.Lcommon_restore_all_sys:
+        RESTORE_ALL_SYS
         rti;
+
 #ifdef CONFIG_HARDWARE_PM
 .Lcall_do_ovf:
 
@@ -173,9 +191,11 @@ ENTRY(_evt_ivhw)
         call _pm_overflow;
         SP += 12;
 
-        jump .Lcommon_restore_context;
+        jump .Lcommon_restore_all_sys;
 #endif
 
+ENDPROC(_evt_ivhw)
+
 /* Interrupt routine for evt2 (NMI).
  * We don't actually use this, so just return.
  * For inner circle type details, please see:
diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c
index 4882f0e801a9..8d18d6b163bb 100644
--- a/arch/blackfin/mach-common/ints-priority-dc.c
+++ b/arch/blackfin/mach-common/ints-priority-dc.c
@@ -222,11 +222,12 @@ static void bf561_gpio_unmask_irq(unsigned int irq)
 static unsigned int bf561_gpio_irq_startup(unsigned int irq)
 {
         unsigned int ret;
+        char buf[8];
         u16 gpionr = irq - IRQ_PF0;
 
         if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-
-                ret = gpio_request(gpionr, "IRQ");
+                snprintf(buf, sizeof buf, "IRQ %d", irq);
+                ret = gpio_request(gpionr, buf);
                 if (ret)
                         return ret;
 
@@ -250,6 +251,7 @@ static int bf561_gpio_irq_type(unsigned int irq, unsigned int type)
 {
 
         unsigned int ret;
+        char buf[8];
         u16 gpionr = irq - IRQ_PF0;
 
 
@@ -265,8 +267,8 @@ static int bf561_gpio_irq_type(unsigned int irq, unsigned int type)
                             IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
 
                 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-
-                        ret = gpio_request(gpionr, "IRQ");
+                        snprintf(buf, sizeof buf, "IRQ %d", irq);
+                        ret = gpio_request(gpionr, buf);
                         if (ret)
                                 return ret;
 
diff --git a/arch/blackfin/mach-common/ints-priority-sc.c b/arch/blackfin/mach-common/ints-priority-sc.c
index 147f0731087a..dec42acb5de0 100644
--- a/arch/blackfin/mach-common/ints-priority-sc.c
+++ b/arch/blackfin/mach-common/ints-priority-sc.c
@@ -313,6 +313,7 @@ static void bfin_demux_error_irq(unsigned int int_err_irq,
 static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
 static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)];
 
+
 static void bfin_gpio_ack_irq(unsigned int irq)
 {
         u16 gpionr = irq - IRQ_PF0;
@@ -352,9 +353,11 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq)
 {
         unsigned int ret;
         u16 gpionr = irq - IRQ_PF0;
+        char buf[8];
 
         if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-                ret = gpio_request(gpionr, "IRQ");
+                snprintf(buf, sizeof buf, "IRQ %d", irq);
+                ret = gpio_request(gpionr, buf);
                 if (ret)
                         return ret;
         }
@@ -376,6 +379,7 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
 {
 
         unsigned int ret;
+        char buf[8];
         u16 gpionr = irq - IRQ_PF0;
 
         if (type == IRQ_TYPE_PROBE) {
@@ -388,7 +392,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
         if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
                     IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
                 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-                        ret = gpio_request(gpionr, "IRQ");
+                        snprintf(buf, sizeof buf, "IRQ %d", irq);
+                        ret = gpio_request(gpionr, buf);
                         if (ret)
                                 return ret;
                 }
@@ -478,6 +483,10 @@ static void bfin_demux_gpio_irq(unsigned int intb_irq,
 static unsigned char irq2pint_lut[NR_PINTS];
 static unsigned char pint2irq_lut[NR_PINT_SYS_IRQS * NR_PINT_BITS];
 
+static unsigned int gpio_both_edge_triggered[NR_PINT_SYS_IRQS];
+static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
+
+
 struct pin_int_t {
         unsigned int mask_set;
         unsigned int mask_clear;
@@ -544,13 +553,20 @@ void init_pint_lut(void)
 
 }
 
-static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
-
 static void bfin_gpio_ack_irq(unsigned int irq)
 {
         u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
+        u32 pintbit = PINT_BIT(pint_val);
+        u8 bank = PINT_2_BANK(pint_val);
+
+        if (unlikely(gpio_both_edge_triggered[bank] & pintbit)) {
+                if (pint[bank]->invert_set & pintbit)
+                        pint[bank]->invert_clear = pintbit;
+                else
+                        pint[bank]->invert_set = pintbit;
+        }
+        pint[bank]->request = pintbit;
 
-        pint[PINT_2_BANK(pint_val)]->request = PINT_BIT(pint_val);
         SSYNC();
 }
 
@@ -560,6 +576,13 @@ static void bfin_gpio_mask_ack_irq(unsigned int irq)
         u32 pintbit = PINT_BIT(pint_val);
         u8 bank = PINT_2_BANK(pint_val);
 
+        if (unlikely(gpio_both_edge_triggered[bank] & pintbit)) {
+                if (pint[bank]->invert_set & pintbit)
+                        pint[bank]->invert_clear = pintbit;
+                else
+                        pint[bank]->invert_set = pintbit;
+        }
+
         pint[bank]->request = pintbit;
         pint[bank]->mask_clear = pintbit;
         SSYNC();
@@ -587,7 +610,8 @@ static void bfin_gpio_unmask_irq(unsigned int irq)
 static unsigned int bfin_gpio_irq_startup(unsigned int irq)
 {
         unsigned int ret;
-        u16 gpionr = irq - IRQ_PA0;
+        char buf[8];
+        u16 gpionr = irq_to_gpio(irq);
         u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
 
         if (pint_val == IRQ_NOT_AVAIL) {
@@ -598,7 +622,8 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq)
         }
 
         if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-                ret = gpio_request(gpionr, "IRQ");
+                snprintf(buf, sizeof buf, "IRQ %d", irq);
+                ret = gpio_request(gpionr, buf);
                 if (ret)
                         return ret;
         }
@@ -611,16 +636,19 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq)
 
 static void bfin_gpio_irq_shutdown(unsigned int irq)
 {
+        u16 gpionr = irq_to_gpio(irq);
+
         bfin_gpio_mask_irq(irq);
-        gpio_free(irq - IRQ_PA0);
-        gpio_enabled[gpio_bank(irq - IRQ_PA0)] &= ~gpio_bit(irq - IRQ_PA0);
+        gpio_free(gpionr);
+        gpio_enabled[gpio_bank(gpionr)] &= ~gpio_bit(gpionr);
 }
 
 static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
 {
 
         unsigned int ret;
-        u16 gpionr = irq - IRQ_PA0;
+        char buf[8];
+        u16 gpionr = irq_to_gpio(irq);
         u8 pint_val = irq2pint_lut[irq - SYS_IRQS];
         u32 pintbit = PINT_BIT(pint_val);
         u8 bank = PINT_2_BANK(pint_val);
@@ -638,7 +666,8 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
         if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
                     IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
                 if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-                        ret = gpio_request(gpionr, "IRQ");
+                        snprintf(buf, sizeof buf, "IRQ %d", irq);
+                        ret = gpio_request(gpionr, buf);
                         if (ret)
                                 return ret;
                 }
@@ -651,28 +680,33 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type)
 
         gpio_direction_input(gpionr);
 
-        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
-                pint[bank]->edge_set = pintbit;
-        } else {
-                pint[bank]->edge_clear = pintbit;
-        }
-
         if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))
                 pint[bank]->invert_set = pintbit;       /* low or falling edge denoted by one */
         else
-                pint[bank]->invert_set = pintbit;       /* high or rising edge denoted by zero */
+                pint[bank]->invert_clear = pintbit;     /* high or rising edge denoted by zero */
 
-        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
-                pint[bank]->invert_set = pintbit;
-        else
-                pint[bank]->invert_set = pintbit;
+        if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
+            == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
 
-        SSYNC();
+                gpio_both_edge_triggered[bank] |= pintbit;
 
-        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
+                if (gpio_get_value(gpionr))
+                        pint[bank]->invert_set = pintbit;
+                else
+                        pint[bank]->invert_clear = pintbit;
+        } else {
+                gpio_both_edge_triggered[bank] &= ~pintbit;
+        }
+
+        if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
+                pint[bank]->edge_set = pintbit;
                 set_irq_handler(irq, handle_edge_irq);
-        else
+        } else {
+                pint[bank]->edge_clear = pintbit;
                 set_irq_handler(irq, handle_level_irq);
+        }
+
+        SSYNC();
 
         return 0;
 }
diff --git a/arch/blackfin/mach-common/irqpanic.c b/arch/blackfin/mach-common/irqpanic.c
index b22959b197e5..606ded9ff4e1 100644
--- a/arch/blackfin/mach-common/irqpanic.c
+++ b/arch/blackfin/mach-common/irqpanic.c
@@ -46,9 +46,6 @@ void irq_panic(int reason, struct pt_regs *regs) __attribute__ ((l1_text));
  */
 asmlinkage void irq_panic(int reason, struct pt_regs *regs)
 {
-        int sig = 0;
-        siginfo_t info;
-
 #ifdef CONFIG_DEBUG_ICACHE_CHECK
         unsigned int cmd, tag, ca, cache_hi, cache_lo, *pa;
         unsigned short i, j, die;
@@ -136,53 +133,6 @@ asmlinkage void irq_panic(int reason, struct pt_regs *regs)
         }
 #endif
 
-        printk(KERN_EMERG "\n");
-        printk(KERN_EMERG "Exception: IRQ 0x%x entered\n", reason);
-        printk(KERN_EMERG " code=[0x%08lx],   stack frame=0x%08lx,  "
-            " bad PC=0x%08lx\n",
-            (unsigned long)regs->seqstat,
-            (unsigned long)regs,
-            (unsigned long)regs->pc);
-        if (reason == 0x5) {
-                printk(KERN_EMERG "----------- HARDWARE ERROR -----------\n");
-
-                /* There is only need to check for Hardware Errors, since other
-                 * EXCEPTIONS are handled in TRAPS.c (MH)
-                 */
-                switch (regs->seqstat & SEQSTAT_HWERRCAUSE) {
-                case (SEQSTAT_HWERRCAUSE_SYSTEM_MMR):   /* System MMR Error */
-                        info.si_code = BUS_ADRALN;
-                        sig = SIGBUS;
-                        printk(KERN_EMERG HWC_x2(KERN_EMERG));
-                        break;
-                case (SEQSTAT_HWERRCAUSE_EXTERN_ADDR):  /* External Memory Addressing Error */
-                        info.si_code = BUS_ADRERR;
-                        sig = SIGBUS;
-                        printk(KERN_EMERG HWC_x3(KERN_EMERG));
-                        break;
-                case (SEQSTAT_HWERRCAUSE_PERF_FLOW):    /* Performance Monitor Overflow */
-                        printk(KERN_EMERG HWC_x12(KERN_EMERG));
-                        break;
-                case (SEQSTAT_HWERRCAUSE_RAISE_5):      /* RAISE 5 instruction */
-                        printk(KERN_EMERG HWC_x18(KERN_EMERG));
-                        break;
-                default:        /* Reserved */
-                        printk(KERN_EMERG HWC_default(KERN_EMERG));
-                        break;
-                }
-        }
-
-        regs->ipend = bfin_read_IPEND();
-        dump_bfin_process(regs);
-        dump_bfin_mem((void *)regs->pc);
-        show_regs(regs);
-        if (0 == (info.si_signo = sig) || 0 == user_mode(regs)) /* in kernelspace */
-                panic("Unhandled IRQ or exceptions!\n");
-        else {                  /* in userspace */
-                info.si_errno = 0;
-                info.si_addr = (void *)regs->pc;
-                force_sig_info(sig, &info, current);
-        }
 }
 
 #ifdef CONFIG_HARDWARE_PM
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index dac51fb06f22..81930f7d06f1 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -77,7 +77,15 @@ void bfin_pm_suspend_standby_enter(void)
 
                 gpio_pm_restore();
 
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
+                bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
+                bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
+# ifdef CONFIG_BF54x
+                bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
+# endif
+#else
                 bfin_write_SIC_IWR(IWR_ENABLE_ALL);
+#endif
 
                 local_irq_restore(flags);
         }
@@ -85,7 +93,15 @@ void bfin_pm_suspend_standby_enter(void)
 
 #if defined(CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR)
         sleep_deeper(CONFIG_PM_WAKEUP_SIC_IWR);
+# if defined(CONFIG_BF54x) || defined(CONFIG_BF52x)
+        bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
+        bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
+#  ifdef CONFIG_BF54x
+        bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
+#  endif
+# else
         bfin_write_SIC_IWR(IWR_ENABLE_ALL);
+# endif
 #endif                          /* CONFIG_PM_WAKEUP_GPIO_BY_SIC_IWR */
 }
 
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index e97ea8fc8dc4..eb1a12ac9e33 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -128,8 +128,8 @@ void __init paging_init(void)
 void __init mem_init(void)
 {
         unsigned int codek = 0, datak = 0, initk = 0;
+        unsigned int reservedpages = 0, freepages = 0;
         unsigned long tmp;
-        unsigned int len = _ramend - _rambase;
         unsigned long start_mem = memory_start;
         unsigned long end_mem = memory_end;
 
@@ -138,19 +138,36 @@ void __init mem_init(void)
 
         start_mem = PAGE_ALIGN(start_mem);
         max_mapnr = num_physpages = MAP_NR(high_memory);
-        printk(KERN_INFO "Physical pages: %lx\n", num_physpages);
+        printk(KERN_INFO "Kernel managed physical pages: %lu\n",
+                num_physpages);
 
         /* This will put all memory onto the freelists. */
         totalram_pages = free_all_bootmem();
 
+        reservedpages = 0;
+        for (tmp = 0; tmp < max_mapnr; tmp++)
+                if (PageReserved(pfn_to_page(tmp)))
+                        reservedpages++;
+        freepages =  max_mapnr - reservedpages;
+
+        /* do not count in kernel image between _rambase and _ramstart */
+        reservedpages -= (_ramstart - _rambase) >> PAGE_SHIFT;
+#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
+        reservedpages += (_ramend - memory_end - DMA_UNCACHED_REGION) >>
+                                PAGE_SHIFT;
+#endif
+
         codek = (_etext - _stext) >> 10;
-        datak = (__bss_stop - __bss_start) >> 10;
         initk = (__init_end - __init_begin) >> 10;
+        datak = ((_ramstart - _rambase) >> 10) - codek - initk;
 
-        tmp = nr_free_pages() << PAGE_SHIFT;
         printk(KERN_INFO
-             "Memory available: %luk/%uk RAM, (%uk init code, %uk kernel code, %uk data, %uk dma)\n",
-             tmp >> 10, len >> 10, initk, codek, datak, DMA_UNCACHED_REGION >> 10);
+             "Memory available: %luk/%luk RAM, "
+                "(%uk init code, %uk kernel code, "
+                "%uk data, %uk dma, %uk reserved)\n",
+                (unsigned long) freepages << (PAGE_SHIFT-10), _ramend >> 10,
+                initk, codek, datak, DMA_UNCACHED_REGION >> 10,
+                (reservedpages << (PAGE_SHIFT-10)));
 
         /* Initialize the blackfin L1 Memory. */
         l1sram_init();
@@ -184,13 +201,15 @@ static __init void free_init_pages(const char *what, unsigned long begin, unsign
 #ifdef CONFIG_BLK_DEV_INITRD
 void __init free_initrd_mem(unsigned long start, unsigned long end)
 {
+#ifndef CONFIG_MPU
         free_init_pages("initrd memory", start, end);
+#endif
 }
 #endif
 
 void __init free_initmem(void)
 {
-#ifdef CONFIG_RAMKERNEL
+#if defined CONFIG_RAMKERNEL && !defined CONFIG_MPU
         free_init_pages("unused kernel memory",
                         (unsigned long)(&__init_begin),
                         (unsigned long)(&__init_end));
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index d51e18fb789b..841904cdef4d 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -270,6 +270,24 @@ static struct platform_device smc91x_device = {
 
 #endif
 
+/* All Alchemy demoboards with I2C have this #define in their headers */
+#ifdef SMBUS_PSC_BASE
+static struct resource pbdb_smbus_resources[] = {
+        {
+                .start  = SMBUS_PSC_BASE,
+                .end    = SMBUS_PSC_BASE + 0x24 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device pbdb_smbus_device = {
+        .name           = "au1xpsc_smbus",
+        .id             = 0,    /* bus number */
+        .num_resources  = ARRAY_SIZE(pbdb_smbus_resources),
+        .resource       = pbdb_smbus_resources,
+};
+#endif
+
 static struct platform_device *au1xxx_platform_devices[] __initdata = {
         &au1xxx_usb_ohci_device,
         &au1x00_pcmcia_device,
@@ -287,6 +305,9 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
 #ifdef CONFIG_MIPS_DB1200
         &smc91x_device,
 #endif
+#ifdef SMBUS_PSC_BASE
+        &pbdb_smbus_device,
+#endif
 };
 
 int __init au1xxx_platform_init(void)
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index b84f8df325c4..cb0a7493ff64 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -224,26 +224,6 @@ mpc834x_sys_init_IRQ(void)
         ipic_set_default_priority();
 }
 
-#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
-extern ulong    ds1374_get_rtc_time(void);
-extern int      ds1374_set_rtc_time(ulong);
-
-static int __init
-mpc834x_rtc_hookup(void)
-{
-        struct timespec tv;
-
-        ppc_md.get_rtc_time = ds1374_get_rtc_time;
-        ppc_md.set_rtc_time = ds1374_set_rtc_time;
-
-        tv.tv_nsec = 0;
-        tv.tv_sec = (ppc_md.get_rtc_time)();
-        do_settimeofday(&tv);
-
-        return 0;
-}
-late_initcall(mpc834x_rtc_hookup);
-#endif
 static __inline__ void
 mpc834x_sys_set_bat(void)
 {
diff --git a/arch/ppc/platforms/85xx/tqm85xx.c b/arch/ppc/platforms/85xx/tqm85xx.c
index 4ee2bd156dc5..27ce389c1224 100644
--- a/arch/ppc/platforms/85xx/tqm85xx.c
+++ b/arch/ppc/platforms/85xx/tqm85xx.c
@@ -258,27 +258,6 @@ int tqm85xx_show_cpuinfo(struct seq_file *m)
         return 0;
 }
 
-#if defined(CONFIG_I2C) && defined(CONFIG_SENSORS_DS1337)
-extern ulong ds1337_get_rtc_time(void);
-extern int ds1337_set_rtc_time(unsigned long nowtime);
-
-static int __init
-tqm85xx_rtc_hookup(void)
-{
-        struct timespec tv;
-
-        ppc_md.set_rtc_time = ds1337_set_rtc_time;
-        ppc_md.get_rtc_time = ds1337_get_rtc_time;
-
-        tv.tv_nsec = 0;
-        tv.tv_sec = (ppc_md.get_rtc_time)();
-        do_settimeofday(&tv);
-
-        return 0;
-}
-late_initcall(tqm85xx_rtc_hookup);
-#endif
-
 #ifdef CONFIG_PCI
 /*
  * interrupt routing
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index 52f63e6f0856..fe6e88cdb1cd 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -838,27 +838,6 @@ katana_find_end_of_memory(void)
         return bdp->bi_memsize;
 }
 
-#if defined(CONFIG_I2C_MV64XXX) && defined(CONFIG_SENSORS_M41T00)
-extern ulong    m41t00_get_rtc_time(void);
-extern int      m41t00_set_rtc_time(ulong);
-
-static int __init
-katana_rtc_hookup(void)
-{
-        struct timespec tv;
-
-        ppc_md.get_rtc_time = m41t00_get_rtc_time;
-        ppc_md.set_rtc_time = m41t00_set_rtc_time;
-
-        tv.tv_nsec = 0;
-        tv.tv_sec = (ppc_md.get_rtc_time)();
-        do_settimeofday(&tv);
-
-        return 0;
-}
-late_initcall(katana_rtc_hookup);
-#endif
-
 #if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
 static void __init
 katana_map_io(void)
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 1330061020ab..6ef54d27fc00 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -276,9 +276,6 @@ source "kernel/Kconfig.preempt"
 
 source "mm/Kconfig"
 
-config HOLES_IN_ZONE
-        def_bool y
-
 comment "I/O subsystem configuration"
 
 config MACHCHK_WARNING
diff --git a/arch/s390/crypto/Kconfig b/arch/s390/crypto/Kconfig
deleted file mode 100644
index d1defbbfcd81..000000000000
--- a/arch/s390/crypto/Kconfig
+++ /dev/null
@@ -1,60 +0,0 @@
-config CRYPTO_SHA1_S390
-        tristate "SHA1 digest algorithm"
-        depends on S390
-        select CRYPTO_ALGAPI
-        help
-          This is the s390 hardware accelerated implementation of the
-          SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
-
-config CRYPTO_SHA256_S390
-        tristate "SHA256 digest algorithm"
-        depends on S390
-        select CRYPTO_ALGAPI
-        help
-          This is the s390 hardware accelerated implementation of the
-          SHA256 secure hash standard (DFIPS 180-2).
-
-          This version of SHA implements a 256 bit hash with 128 bits of
-          security against collision attacks.
-
-config CRYPTO_DES_S390
-        tristate "DES and Triple DES cipher algorithms"
-        depends on S390
-        select CRYPTO_ALGAPI
-        select CRYPTO_BLKCIPHER
-        help
-          This us the s390 hardware accelerated implementation of the
-          DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
-
-config CRYPTO_AES_S390
-        tristate "AES cipher algorithms"
-        depends on S390
-        select CRYPTO_ALGAPI
-        select CRYPTO_BLKCIPHER
-        help
-          This is the s390 hardware accelerated implementation of the
-          AES cipher algorithms (FIPS-197). AES uses the Rijndael
-          algorithm.
-
-          Rijndael appears to be consistently a very good performer in
-          both hardware and software across a wide range of computing
-          environments regardless of its use in feedback or non-feedback
-          modes. Its key setup time is excellent, and its key agility is
-          good. Rijndael's very low memory requirements make it very well
-          suited for restricted-space environments, in which it also
-          demonstrates excellent performance. Rijndael's operations are
-          among the easiest to defend against power and timing attacks.
-
-          On s390 the System z9-109 currently only supports the key size
-          of 128 bit.
-
-config S390_PRNG
-        tristate "Pseudo random number generator device driver"
-        depends on S390
-        default "m"
-        help
-          Select this option if you want to use the s390 pseudo random number
-          generator. The PRNG is part of the cryptographic processor functions
-          and uses triple-DES to generate secure random numbers like the
-          ANSI X9.17 standard. The PRNG is usable via the char device
-          /dev/prandom.
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c
index 46c97058ebe1..a3f67f8b5427 100644
--- a/arch/s390/crypto/aes_s390.c
+++ b/arch/s390/crypto/aes_s390.c
@@ -516,7 +516,7 @@ static int __init aes_init(void)
         /* z9 109 and z9 BC/EC only support 128 bit key length */
         if (keylen_flag == AES_KEYLEN_128)
                 printk(KERN_INFO
-                       "aes_s390: hardware acceleration only available for"
+                       "aes_s390: hardware acceleration only available for "
                        "128 bit keys\n");
 
         ret = crypto_register_alg(&aes_alg);
diff --git a/arch/s390/crypto/prng.c b/arch/s390/crypto/prng.c
index 8eb3a1aedc22..0cfefddd8375 100644
--- a/arch/s390/crypto/prng.c
+++ b/arch/s390/crypto/prng.c
@@ -90,7 +90,7 @@ static ssize_t prng_read(struct file *file, char __user *ubuf, size_t nbytes,
         int ret = 0;
         int tmp;
 
-        /* nbytes can be arbitrary long, we spilt it into chunks */
+        /* nbytes can be arbitrary length, we split it into chunks */
         while (nbytes) {
                 /* same as in extract_entropy_user in random.c */
                 if (need_resched()) {
@@ -146,7 +146,7 @@ static ssize_t prng_read(struct file *file, char __user *ubuf, size_t nbytes,
         return ret;
 }
 
-static struct file_operations prng_fops = {
+static const struct file_operations prng_fops = {
         .owner          = THIS_MODULE,
         .open           = &prng_open,
         .release        = NULL,
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 56cb71007cd9..b3b650a93c7c 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -31,7 +31,3 @@ S390_KEXEC_OBJS := machine_kexec.o crash.o
 S390_KEXEC_OBJS += $(if $(CONFIG_64BIT),relocate_kernel64.o,relocate_kernel.o)
 obj-$(CONFIG_KEXEC) += $(S390_KEXEC_OBJS)
 
-#
-# This is just to get the dependencies...
-#
-binfmt_elf32.o: $(TOPDIR)/fs/binfmt_elf.c
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 1b3af7dab816..9f7b73b180f0 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -276,7 +276,7 @@ void __init startup_init(void)
         create_kernel_nss();
         sort_main_extable();
         setup_lowcore_early();
-        sclp_readinfo_early();
+        sclp_read_info_early();
         sclp_facilities_detect();
         memsize = sclp_memory_detect();
 #ifndef CONFIG_64BIT
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index a87b1976d409..79dccd206a6e 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -157,7 +157,7 @@ startup_continue:
         .long   0xb2b10000              # store facility list
         tm      0xc8,0x08               # check bit for clearing-by-ASCE
         bno     0f-.LPG1(%r13)
-        lhi     %r1,2094
+        lhi     %r1,2048
         lhi     %r2,0
         .long   0xb98e2001
         oi      7(%r12),0x80            # set IDTE flag
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index b97694fa62ec..db28cca81fef 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -2,7 +2,7 @@
  *  arch/s390/kernel/ipl.c
  *    ipl/reipl/dump support for Linux on s390.
  *
- *    Copyright (C) IBM Corp. 2005,2006
+ *    Copyright IBM Corp. 2005,2007
  *    Author(s): Michael Holzheu <holzheu@de.ibm.com>
  *               Heiko Carstens <heiko.carstens@de.ibm.com>
  *               Volker Sameske <sameske@de.ibm.com>
@@ -31,6 +31,43 @@
 #define IPL_FCP_DUMP_STR        "fcp_dump"
 #define IPL_NSS_STR             "nss"
 
+#define DUMP_CCW_STR            "ccw"
+#define DUMP_FCP_STR            "fcp"
+#define DUMP_NONE_STR           "none"
+
+/*
+ * Four shutdown trigger types are supported:
+ * - panic
+ * - halt
+ * - power off
+ * - reipl
+ */
+#define ON_PANIC_STR            "on_panic"
+#define ON_HALT_STR             "on_halt"
+#define ON_POFF_STR             "on_poff"
+#define ON_REIPL_STR            "on_reboot"
+
+struct shutdown_action;
+struct shutdown_trigger {
+        char *name;
+        struct shutdown_action *action;
+};
+
+/*
+ * Five shutdown action types are supported:
+ */
+#define SHUTDOWN_ACTION_IPL_STR         "ipl"
+#define SHUTDOWN_ACTION_REIPL_STR       "reipl"
+#define SHUTDOWN_ACTION_DUMP_STR        "dump"
+#define SHUTDOWN_ACTION_VMCMD_STR       "vmcmd"
+#define SHUTDOWN_ACTION_STOP_STR        "stop"
+
+struct shutdown_action {
+        char *name;
+        void (*fn) (struct shutdown_trigger *trigger);
+        int (*init) (void);
+};
+
 static char *ipl_type_str(enum ipl_type type)
 {
         switch (type) {
@@ -54,10 +91,6 @@ enum dump_type {
         DUMP_TYPE_FCP   = 4,
 };
 
-#define DUMP_NONE_STR    "none"
-#define DUMP_CCW_STR     "ccw"
-#define DUMP_FCP_STR     "fcp"
-
 static char *dump_type_str(enum dump_type type)
 {
         switch (type) {
@@ -99,30 +132,6 @@ enum dump_method {
         DUMP_METHOD_FCP_DIAG,
 };
 
-enum shutdown_action {
-        SHUTDOWN_REIPL,
-        SHUTDOWN_DUMP,
-        SHUTDOWN_STOP,
-};
-
-#define SHUTDOWN_REIPL_STR "reipl"
-#define SHUTDOWN_DUMP_STR  "dump"
-#define SHUTDOWN_STOP_STR  "stop"
-
-static char *shutdown_action_str(enum shutdown_action action)
-{
-        switch (action) {
-        case SHUTDOWN_REIPL:
-                return SHUTDOWN_REIPL_STR;
-        case SHUTDOWN_DUMP:
-                return SHUTDOWN_DUMP_STR;
-        case SHUTDOWN_STOP:
-                return SHUTDOWN_STOP_STR;
-        default:
-                return NULL;
-        }
-}
-
 static int diag308_set_works = 0;
 
 static int reipl_capabilities = IPL_TYPE_UNKNOWN;
@@ -140,8 +149,6 @@ static enum dump_method dump_method = DUMP_METHOD_NONE;
 static struct ipl_parameter_block *dump_block_fcp;
 static struct ipl_parameter_block *dump_block_ccw;
 
-static enum shutdown_action on_panic_action = SHUTDOWN_STOP;
-
 static struct sclp_ipl_info sclp_ipl_info;
 
 int diag308(unsigned long subcode, void *addr)
@@ -205,8 +212,8 @@ static ssize_t sys_##_prefix##_##_name##_store(struct kobject *kobj,	\
                 struct kobj_attribute *attr,                            \
                 const char *buf, size_t len)                            \
 {                                                                       \
-        if (sscanf(buf, _fmt_in, _value) != 1)                          \
-                return -EINVAL;                                         \
+        strncpy(_value, buf, sizeof(_value) - 1);                       \
+        strstrip(_value);                                               \
         return len;                                                     \
 }                                                                       \
 static struct kobj_attribute sys_##_prefix##_##_name##_attr =           \
@@ -245,33 +252,6 @@ static __init enum ipl_type get_ipl_type(void)
         return IPL_TYPE_FCP;
 }
 
-void __init setup_ipl_info(void)
-{
-        ipl_info.type = get_ipl_type();
-        switch (ipl_info.type) {
-        case IPL_TYPE_CCW:
-                ipl_info.data.ccw.dev_id.devno = ipl_devno;
-                ipl_info.data.ccw.dev_id.ssid = 0;
-                break;
-        case IPL_TYPE_FCP:
-        case IPL_TYPE_FCP_DUMP:
-                ipl_info.data.fcp.dev_id.devno =
-                        IPL_PARMBLOCK_START->ipl_info.fcp.devno;
-                ipl_info.data.fcp.dev_id.ssid = 0;
-                ipl_info.data.fcp.wwpn = IPL_PARMBLOCK_START->ipl_info.fcp.wwpn;
-                ipl_info.data.fcp.lun = IPL_PARMBLOCK_START->ipl_info.fcp.lun;
-                break;
-        case IPL_TYPE_NSS:
-                strncpy(ipl_info.data.nss.name, kernel_nss_name,
-                        sizeof(ipl_info.data.nss.name));
-                break;
-        case IPL_TYPE_UNKNOWN:
-        default:
-                /* We have no info to copy */
-                break;
-        }
-}
-
 struct ipl_info ipl_info;
 EXPORT_SYMBOL_GPL(ipl_info);
 
@@ -428,8 +408,74 @@ static struct attribute_group ipl_unknown_attr_group = {
 
 static struct kset *ipl_kset;
 
+static int __init ipl_register_fcp_files(void)
+{
+        int rc;
+
+        rc = sysfs_create_group(&ipl_kset->kobj, &ipl_fcp_attr_group);
+        if (rc)
+                goto out;
+        rc = sysfs_create_bin_file(&ipl_kset->kobj, &ipl_parameter_attr);
+        if (rc)
+                goto out_ipl_parm;
+        rc = sysfs_create_bin_file(&ipl_kset->kobj, &ipl_scp_data_attr);
+        if (!rc)
+                goto out;
+
+        sysfs_remove_bin_file(&ipl_kset->kobj, &ipl_parameter_attr);
+
+out_ipl_parm:
+        sysfs_remove_group(&ipl_kset->kobj, &ipl_fcp_attr_group);
+out:
+        return rc;
+}
+
+static void ipl_run(struct shutdown_trigger *trigger)
+{
+        diag308(DIAG308_IPL, NULL);
+        if (MACHINE_IS_VM)
+                __cpcmd("IPL", NULL, 0, NULL);
+        else if (ipl_info.type == IPL_TYPE_CCW)
+                reipl_ccw_dev(&ipl_info.data.ccw.dev_id);
+}
+
+static int ipl_init(void)
+{
+        int rc;
+
+        ipl_kset = kset_create_and_add("ipl", NULL, firmware_kobj);
+        if (!ipl_kset) {
+                rc = -ENOMEM;
+                goto out;
+        }
+        switch (ipl_info.type) {
+        case IPL_TYPE_CCW:
+                rc = sysfs_create_group(&ipl_kset->kobj, &ipl_ccw_attr_group);
+                break;
+        case IPL_TYPE_FCP:
+        case IPL_TYPE_FCP_DUMP:
+                rc = ipl_register_fcp_files();
+                break;
+        case IPL_TYPE_NSS:
+                rc = sysfs_create_group(&ipl_kset->kobj, &ipl_nss_attr_group);
+                break;
+        default:
+                rc = sysfs_create_group(&ipl_kset->kobj,
+                                        &ipl_unknown_attr_group);
+                break;
+        }
+out:
+        if (rc)
+                panic("ipl_init failed: rc = %i\n", rc);
+
+        return 0;
+}
+
+static struct shutdown_action ipl_action = {SHUTDOWN_ACTION_IPL_STR, ipl_run,
+                                            ipl_init};
+
 /*
- * reipl section
+ * reipl shutdown action: Reboot Linux on shutdown.
  */
 
 /* FCP reipl device attributes */
@@ -549,7 +595,9 @@ static int reipl_set_type(enum ipl_type type)
 
         switch(type) {
         case IPL_TYPE_CCW:
-                if (MACHINE_IS_VM)
+                if (diag308_set_works)
+                        reipl_method = REIPL_METHOD_CCW_DIAG;
+                else if (MACHINE_IS_VM)
                         reipl_method = REIPL_METHOD_CCW_VM;
                 else
                         reipl_method = REIPL_METHOD_CCW_CIO;
@@ -600,143 +648,11 @@ static ssize_t reipl_type_store(struct kobject *kobj,
 }
 
 static struct kobj_attribute reipl_type_attr =
-                __ATTR(reipl_type, 0644, reipl_type_show, reipl_type_store);
+        __ATTR(reipl_type, 0644, reipl_type_show, reipl_type_store);
 
 static struct kset *reipl_kset;
 
-/*
- * dump section
- */
-
-/* FCP dump device attributes */
-
-DEFINE_IPL_ATTR_RW(dump_fcp, wwpn, "0x%016llx\n", "%016llx\n",
-                   dump_block_fcp->ipl_info.fcp.wwpn);
-DEFINE_IPL_ATTR_RW(dump_fcp, lun, "0x%016llx\n", "%016llx\n",
-                   dump_block_fcp->ipl_info.fcp.lun);
-DEFINE_IPL_ATTR_RW(dump_fcp, bootprog, "%lld\n", "%lld\n",
-                   dump_block_fcp->ipl_info.fcp.bootprog);
-DEFINE_IPL_ATTR_RW(dump_fcp, br_lba, "%lld\n", "%lld\n",
-                   dump_block_fcp->ipl_info.fcp.br_lba);
-DEFINE_IPL_ATTR_RW(dump_fcp, device, "0.0.%04llx\n", "0.0.%llx\n",
-                   dump_block_fcp->ipl_info.fcp.devno);
-
-static struct attribute *dump_fcp_attrs[] = {
-        &sys_dump_fcp_device_attr.attr,
-        &sys_dump_fcp_wwpn_attr.attr,
-        &sys_dump_fcp_lun_attr.attr,
-        &sys_dump_fcp_bootprog_attr.attr,
-        &sys_dump_fcp_br_lba_attr.attr,
-        NULL,
-};
-
-static struct attribute_group dump_fcp_attr_group = {
-        .name  = IPL_FCP_STR,
-        .attrs = dump_fcp_attrs,
-};
-
-/* CCW dump device attributes */
-
-DEFINE_IPL_ATTR_RW(dump_ccw, device, "0.0.%04llx\n", "0.0.%llx\n",
-                   dump_block_ccw->ipl_info.ccw.devno);
-
-static struct attribute *dump_ccw_attrs[] = {
-        &sys_dump_ccw_device_attr.attr,
-        NULL,
-};
-
-static struct attribute_group dump_ccw_attr_group = {
-        .name  = IPL_CCW_STR,
-        .attrs = dump_ccw_attrs,
-};
-
-/* dump type */
-
-static int dump_set_type(enum dump_type type)
-{
-        if (!(dump_capabilities & type))
-                return -EINVAL;
-        switch(type) {
-        case DUMP_TYPE_CCW:
-                if (MACHINE_IS_VM)
-                        dump_method = DUMP_METHOD_CCW_VM;
-                else if (diag308_set_works)
-                        dump_method = DUMP_METHOD_CCW_DIAG;
-                else
-                        dump_method = DUMP_METHOD_CCW_CIO;
-                break;
-        case DUMP_TYPE_FCP:
-                dump_method = DUMP_METHOD_FCP_DIAG;
-                break;
-        default:
-                dump_method = DUMP_METHOD_NONE;
-        }
-        dump_type = type;
-        return 0;
-}
-
-static ssize_t dump_type_show(struct kobject *kobj,
-                              struct kobj_attribute *attr, char *page)
-{
-        return sprintf(page, "%s\n", dump_type_str(dump_type));
-}
-
-static ssize_t dump_type_store(struct kobject *kobj,
-                               struct kobj_attribute *attr,
-                               const char *buf, size_t len)
-{
-        int rc = -EINVAL;
-
-        if (strncmp(buf, DUMP_NONE_STR, strlen(DUMP_NONE_STR)) == 0)
-                rc = dump_set_type(DUMP_TYPE_NONE);
-        else if (strncmp(buf, DUMP_CCW_STR, strlen(DUMP_CCW_STR)) == 0)
-                rc = dump_set_type(DUMP_TYPE_CCW);
-        else if (strncmp(buf, DUMP_FCP_STR, strlen(DUMP_FCP_STR)) == 0)
-                rc = dump_set_type(DUMP_TYPE_FCP);
-        return (rc != 0) ? rc : len;
-}
-
-static struct kobj_attribute dump_type_attr =
-                __ATTR(dump_type, 0644, dump_type_show, dump_type_store);
-
-static struct kset *dump_kset;
-
-/*
- * Shutdown actions section
- */
-
-static struct kset *shutdown_actions_kset;
-
-/* on panic */
-
-static ssize_t on_panic_show(struct kobject *kobj,
-                             struct kobj_attribute *attr, char *page)
-{
-        return sprintf(page, "%s\n", shutdown_action_str(on_panic_action));
-}
-
-static ssize_t on_panic_store(struct kobject *kobj,
-                              struct kobj_attribute *attr,
-                              const char *buf, size_t len)
-{
-        if (strncmp(buf, SHUTDOWN_REIPL_STR, strlen(SHUTDOWN_REIPL_STR)) == 0)
-                on_panic_action = SHUTDOWN_REIPL;
-        else if (strncmp(buf, SHUTDOWN_DUMP_STR,
-                         strlen(SHUTDOWN_DUMP_STR)) == 0)
-                on_panic_action = SHUTDOWN_DUMP;
-        else if (strncmp(buf, SHUTDOWN_STOP_STR,
-                         strlen(SHUTDOWN_STOP_STR)) == 0)
-                on_panic_action = SHUTDOWN_STOP;
-        else
-                return -EINVAL;
-
-        return len;
-}
-
-static struct kobj_attribute on_panic_attr =
-                __ATTR(on_panic, 0644, on_panic_show, on_panic_store);
-
-void do_reipl(void)
+void reipl_run(struct shutdown_trigger *trigger)
 {
         struct ccw_dev_id devid;
         static char buf[100];
@@ -745,8 +661,6 @@ void do_reipl(void)
         switch (reipl_method) {
         case REIPL_METHOD_CCW_CIO:
                 devid.devno = reipl_block_ccw->ipl_info.ccw.devno;
-                if (ipl_info.type == IPL_TYPE_CCW && devid.devno == ipl_devno)
-                        diag308(DIAG308_IPL, NULL);
                 devid.ssid  = 0;
                 reipl_ccw_dev(&devid);
                 break;
@@ -787,98 +701,6 @@ void do_reipl(void)
         default:
                 break;
         }
-        signal_processor(smp_processor_id(), sigp_stop_and_store_status);
-}
-
-static void do_dump(void)
-{
-        struct ccw_dev_id devid;
-        static char buf[100];
-
-        switch (dump_method) {
-        case DUMP_METHOD_CCW_CIO:
-                smp_send_stop();
-                devid.devno = dump_block_ccw->ipl_info.ccw.devno;
-                devid.ssid  = 0;
-                reipl_ccw_dev(&devid);
-                break;
-        case DUMP_METHOD_CCW_VM:
-                smp_send_stop();
-                sprintf(buf, "STORE STATUS");
-                __cpcmd(buf, NULL, 0, NULL);
-                sprintf(buf, "IPL %X", dump_block_ccw->ipl_info.ccw.devno);
-                __cpcmd(buf, NULL, 0, NULL);
-                break;
-        case DUMP_METHOD_CCW_DIAG:
-                diag308(DIAG308_SET, dump_block_ccw);
-                diag308(DIAG308_DUMP, NULL);
-                break;
-        case DUMP_METHOD_FCP_DIAG:
-                diag308(DIAG308_SET, dump_block_fcp);
-                diag308(DIAG308_DUMP, NULL);
-                break;
-        case DUMP_METHOD_NONE:
-        default:
-                return;
-        }
-        printk(KERN_EMERG "Dump failed!\n");
-}
-
-/* init functions */
-
-static int __init ipl_register_fcp_files(void)
-{
-        int rc;
-
-        rc = sysfs_create_group(&ipl_kset->kobj,
-                                &ipl_fcp_attr_group);
-        if (rc)
-                goto out;
-        rc = sysfs_create_bin_file(&ipl_kset->kobj,
-                                   &ipl_parameter_attr);
-        if (rc)
-                goto out_ipl_parm;
-        rc = sysfs_create_bin_file(&ipl_kset->kobj,
-                                   &ipl_scp_data_attr);
-        if (!rc)
-                goto out;
-
-        sysfs_remove_bin_file(&ipl_kset->kobj, &ipl_parameter_attr);
-
-out_ipl_parm:
-        sysfs_remove_group(&ipl_kset->kobj, &ipl_fcp_attr_group);
-out:
-        return rc;
-}
-
-static int __init ipl_init(void)
-{
-        int rc;
-
-        ipl_kset = kset_create_and_add("ipl", NULL, firmware_kobj);
-        if (!ipl_kset)
-                return -ENOMEM;
-        switch (ipl_info.type) {
-        case IPL_TYPE_CCW:
-                rc = sysfs_create_group(&ipl_kset->kobj,
-                                        &ipl_ccw_attr_group);
-                break;
-        case IPL_TYPE_FCP:
-        case IPL_TYPE_FCP_DUMP:
-                rc = ipl_register_fcp_files();
-                break;
-        case IPL_TYPE_NSS:
-                rc = sysfs_create_group(&ipl_kset->kobj,
-                                        &ipl_nss_attr_group);
-                break;
-        default:
-                rc = sysfs_create_group(&ipl_kset->kobj,
-                                        &ipl_unknown_attr_group);
-                break;
-        }
-        if (rc)
-                kset_unregister(ipl_kset);
-        return rc;
 }
 
 static void __init reipl_probe(void)
@@ -923,6 +745,7 @@ static int __init reipl_ccw_init(void)
         reipl_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION;
         reipl_block_ccw->hdr.blk0_len = IPL_PARM_BLK0_CCW_LEN;
         reipl_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW;
+        reipl_block_ccw->hdr.flags = DIAG308_FLAGS_LP_VALID;
         /* check if read scp info worked and set loadparm */
         if (sclp_ipl_info.is_valid)
                 memcpy(reipl_block_ccw->ipl_info.ccw.load_param,
@@ -931,8 +754,7 @@ static int __init reipl_ccw_init(void)
                 /* read scp info failed: set empty loadparm (EBCDIC blanks) */
                 memset(reipl_block_ccw->ipl_info.ccw.load_param, 0x40,
                        LOADPARM_LEN);
-        /* FIXME: check for diag308_set_works when enabling diag ccw reipl */
-        if (!MACHINE_IS_VM)
+        if (!MACHINE_IS_VM && !diag308_set_works)
                 sys_reipl_ccw_loadparm_attr.attr.mode = S_IRUGO;
         if (ipl_info.type == IPL_TYPE_CCW)
                 reipl_block_ccw->ipl_info.ccw.devno = ipl_devno;
@@ -970,7 +792,7 @@ static int __init reipl_fcp_init(void)
         return 0;
 }
 
-static int __init reipl_init(void)
+static int reipl_init(void)
 {
         int rc;
 
@@ -997,6 +819,140 @@ static int __init reipl_init(void)
         return 0;
 }
 
+static struct shutdown_action reipl_action = {SHUTDOWN_ACTION_REIPL_STR,
+                                              reipl_run, reipl_init};
+
+/*
+ * dump shutdown action: Dump Linux on shutdown.
+ */
+
+/* FCP dump device attributes */
+
+DEFINE_IPL_ATTR_RW(dump_fcp, wwpn, "0x%016llx\n", "%016llx\n",
+                   dump_block_fcp->ipl_info.fcp.wwpn);
+DEFINE_IPL_ATTR_RW(dump_fcp, lun, "0x%016llx\n", "%016llx\n",
+                   dump_block_fcp->ipl_info.fcp.lun);
+DEFINE_IPL_ATTR_RW(dump_fcp, bootprog, "%lld\n", "%lld\n",
+                   dump_block_fcp->ipl_info.fcp.bootprog);
+DEFINE_IPL_ATTR_RW(dump_fcp, br_lba, "%lld\n", "%lld\n",
+                   dump_block_fcp->ipl_info.fcp.br_lba);
+DEFINE_IPL_ATTR_RW(dump_fcp, device, "0.0.%04llx\n", "0.0.%llx\n",
+                   dump_block_fcp->ipl_info.fcp.devno);
+
+static struct attribute *dump_fcp_attrs[] = {
+        &sys_dump_fcp_device_attr.attr,
+        &sys_dump_fcp_wwpn_attr.attr,
+        &sys_dump_fcp_lun_attr.attr,
+        &sys_dump_fcp_bootprog_attr.attr,
+        &sys_dump_fcp_br_lba_attr.attr,
+        NULL,
+};
+
+static struct attribute_group dump_fcp_attr_group = {
+        .name  = IPL_FCP_STR,
+        .attrs = dump_fcp_attrs,
+};
+
+/* CCW dump device attributes */
+
+DEFINE_IPL_ATTR_RW(dump_ccw, device, "0.0.%04llx\n", "0.0.%llx\n",
+                   dump_block_ccw->ipl_info.ccw.devno);
+
+static struct attribute *dump_ccw_attrs[] = {
+        &sys_dump_ccw_device_attr.attr,
+        NULL,
+};
+
+static struct attribute_group dump_ccw_attr_group = {
+        .name  = IPL_CCW_STR,
+        .attrs = dump_ccw_attrs,
+};
+
+/* dump type */
+
+static int dump_set_type(enum dump_type type)
+{
+        if (!(dump_capabilities & type))
+                return -EINVAL;
+        switch (type) {
+        case DUMP_TYPE_CCW:
+                if (diag308_set_works)
+                        dump_method = DUMP_METHOD_CCW_DIAG;
+                else if (MACHINE_IS_VM)
+                        dump_method = DUMP_METHOD_CCW_VM;
+                else
+                        dump_method = DUMP_METHOD_CCW_CIO;
+                break;
+        case DUMP_TYPE_FCP:
+                dump_method = DUMP_METHOD_FCP_DIAG;
+                break;
+        default:
+                dump_method = DUMP_METHOD_NONE;
+        }
+        dump_type = type;
+        return 0;
+}
+
+static ssize_t dump_type_show(struct kobject *kobj,
+                              struct kobj_attribute *attr, char *page)
+{
+        return sprintf(page, "%s\n", dump_type_str(dump_type));
+}
+
+static ssize_t dump_type_store(struct kobject *kobj,
+                               struct kobj_attribute *attr,
+                               const char *buf, size_t len)
+{
+        int rc = -EINVAL;
+
+        if (strncmp(buf, DUMP_NONE_STR, strlen(DUMP_NONE_STR)) == 0)
+                rc = dump_set_type(DUMP_TYPE_NONE);
+        else if (strncmp(buf, DUMP_CCW_STR, strlen(DUMP_CCW_STR)) == 0)
+                rc = dump_set_type(DUMP_TYPE_CCW);
+        else if (strncmp(buf, DUMP_FCP_STR, strlen(DUMP_FCP_STR)) == 0)
+                rc = dump_set_type(DUMP_TYPE_FCP);
+        return (rc != 0) ? rc : len;
+}
+
+static struct kobj_attribute dump_type_attr =
+        __ATTR(dump_type, 0644, dump_type_show, dump_type_store);
+
+static struct kset *dump_kset;
+
+static void dump_run(struct shutdown_trigger *trigger)
+{
+        struct ccw_dev_id devid;
+        static char buf[100];
+
+        switch (dump_method) {
+        case DUMP_METHOD_CCW_CIO:
+                smp_send_stop();
+                devid.devno = dump_block_ccw->ipl_info.ccw.devno;
+                devid.ssid  = 0;
+                reipl_ccw_dev(&devid);
+                break;
+        case DUMP_METHOD_CCW_VM:
+                smp_send_stop();
+                sprintf(buf, "STORE STATUS");
+                __cpcmd(buf, NULL, 0, NULL);
+                sprintf(buf, "IPL %X", dump_block_ccw->ipl_info.ccw.devno);
+                __cpcmd(buf, NULL, 0, NULL);
+                break;
+        case DUMP_METHOD_CCW_DIAG:
+                diag308(DIAG308_SET, dump_block_ccw);
+                diag308(DIAG308_DUMP, NULL);
+                break;
+        case DUMP_METHOD_FCP_DIAG:
+                diag308(DIAG308_SET, dump_block_fcp);
+                diag308(DIAG308_DUMP, NULL);
+                break;
+        case DUMP_METHOD_NONE:
+        default:
+                return;
+        }
+        printk(KERN_EMERG "Dump failed!\n");
+}
+
 static int __init dump_ccw_init(void)
 {
         int rc;
@@ -1042,31 +998,14 @@ static int __init dump_fcp_init(void)
         return 0;
 }
 
-#define SHUTDOWN_ON_PANIC_PRIO 0
-
-static int shutdown_on_panic_notify(struct notifier_block *self,
-                                    unsigned long event, void *data)
-{
-        if (on_panic_action == SHUTDOWN_DUMP)
-                do_dump();
-        else if (on_panic_action == SHUTDOWN_REIPL)
-                do_reipl();
-        return NOTIFY_OK;
-}
-
-static struct notifier_block shutdown_on_panic_nb = {
-        .notifier_call = shutdown_on_panic_notify,
-        .priority = SHUTDOWN_ON_PANIC_PRIO
-};
-
-static int __init dump_init(void)
+static int dump_init(void)
 {
         int rc;
 
         dump_kset = kset_create_and_add("dump", NULL, firmware_kobj);
         if (!dump_kset)
                 return -ENOMEM;
-        rc = sysfs_create_file(&dump_kset->kobj, &dump_type_attr);
+        rc = sysfs_create_file(&dump_kset->kobj, &dump_type_attr.attr);
         if (rc) {
                 kset_unregister(dump_kset);
                 return rc;
@@ -1081,47 +1020,381 @@ static int __init dump_init(void)
         return 0;
 }
 
-static int __init shutdown_actions_init(void)
+static struct shutdown_action dump_action = {SHUTDOWN_ACTION_DUMP_STR,
+                                             dump_run, dump_init};
+
+/*
+ * vmcmd shutdown action: Trigger vm command on shutdown.
+ */
+
+static char vmcmd_on_reboot[128];
+static char vmcmd_on_panic[128];
+static char vmcmd_on_halt[128];
+static char vmcmd_on_poff[128];
+
+DEFINE_IPL_ATTR_STR_RW(vmcmd, on_reboot, "%s\n", "%s\n", vmcmd_on_reboot);
+DEFINE_IPL_ATTR_STR_RW(vmcmd, on_panic, "%s\n", "%s\n", vmcmd_on_panic);
+DEFINE_IPL_ATTR_STR_RW(vmcmd, on_halt, "%s\n", "%s\n", vmcmd_on_halt);
+DEFINE_IPL_ATTR_STR_RW(vmcmd, on_poff, "%s\n", "%s\n", vmcmd_on_poff);
+
+static struct attribute *vmcmd_attrs[] = {
+        &sys_vmcmd_on_reboot_attr.attr,
+        &sys_vmcmd_on_panic_attr.attr,
+        &sys_vmcmd_on_halt_attr.attr,
+        &sys_vmcmd_on_poff_attr.attr,
+        NULL,
+};
+
+static struct attribute_group vmcmd_attr_group = {
+        .attrs = vmcmd_attrs,
+};
+
+static struct kset *vmcmd_kset;
+
+static void vmcmd_run(struct shutdown_trigger *trigger)
+{
+        char *cmd, *next_cmd;
+
+        if (strcmp(trigger->name, ON_REIPL_STR) == 0)
+                cmd = vmcmd_on_reboot;
+        else if (strcmp(trigger->name, ON_PANIC_STR) == 0)
+                cmd = vmcmd_on_panic;
+        else if (strcmp(trigger->name, ON_HALT_STR) == 0)
+                cmd = vmcmd_on_halt;
+        else if (strcmp(trigger->name, ON_POFF_STR) == 0)
+                cmd = vmcmd_on_poff;
+        else
+                return;
+
+        if (strlen(cmd) == 0)
+                return;
+        do {
+                next_cmd = strchr(cmd, '\n');
+                if (next_cmd) {
+                        next_cmd[0] = 0;
+                        next_cmd += 1;
+                }
+                __cpcmd(cmd, NULL, 0, NULL);
+                cmd = next_cmd;
+        } while (cmd != NULL);
+}
+
+static int vmcmd_init(void)
 {
-        int rc;
+        if (!MACHINE_IS_VM)
+                return -ENOTSUPP;
+        vmcmd_kset = kset_create_and_add("vmcmd", NULL, firmware_kobj);
+        if (!vmcmd_kset)
+                return -ENOMEM;
+        return sysfs_create_group(&vmcmd_kset->kobj, &vmcmd_attr_group);
+}
+
+static struct shutdown_action vmcmd_action = {SHUTDOWN_ACTION_VMCMD_STR,
+                                              vmcmd_run, vmcmd_init};
+
+/*
+ * stop shutdown action: Stop Linux on shutdown.
+ */
+
+static void stop_run(struct shutdown_trigger *trigger)
+{
+        if (strcmp(trigger->name, ON_PANIC_STR) == 0)
+                disabled_wait((unsigned long) __builtin_return_address(0));
+        else {
+                signal_processor(smp_processor_id(), sigp_stop);
+                for (;;);
+        }
+}
+
+static struct shutdown_action stop_action = {SHUTDOWN_ACTION_STOP_STR,
+                                             stop_run, NULL};
+
+/* action list */
+
+static struct shutdown_action *shutdown_actions_list[] = {
+        &ipl_action, &reipl_action, &dump_action, &vmcmd_action, &stop_action};
+#define SHUTDOWN_ACTIONS_COUNT (sizeof(shutdown_actions_list) / sizeof(void *))
+
+/*
+ * Trigger section
+ */
+
+static struct kset *shutdown_actions_kset;
+
+static int set_trigger(const char *buf, struct shutdown_trigger *trigger,
+                       size_t len)
+{
+        int i;
+        for (i = 0; i < SHUTDOWN_ACTIONS_COUNT; i++) {
+                if (!shutdown_actions_list[i])
+                        continue;
+                if (strncmp(buf, shutdown_actions_list[i]->name,
+                            strlen(shutdown_actions_list[i]->name)) == 0) {
+                        trigger->action = shutdown_actions_list[i];
+                        return len;
+                }
+        }
+        return -EINVAL;
+}
+
+/* on reipl */
+
+static struct shutdown_trigger on_reboot_trigger = {ON_REIPL_STR,
+                                                    &reipl_action};
+
+static ssize_t on_reboot_show(struct kobject *kobj,
+                              struct kobj_attribute *attr, char *page)
+{
+        return sprintf(page, "%s\n", on_reboot_trigger.action->name);
+}
+
+static ssize_t on_reboot_store(struct kobject *kobj,
+                               struct kobj_attribute *attr,
+                               const char *buf, size_t len)
+{
+        return set_trigger(buf, &on_reboot_trigger, len);
+}
+
+static struct kobj_attribute on_reboot_attr =
+        __ATTR(on_reboot, 0644, on_reboot_show, on_reboot_store);
+
+static void do_machine_restart(char *__unused)
+{
+        smp_send_stop();
+        on_reboot_trigger.action->fn(&on_reboot_trigger);
+        reipl_run(NULL);
+}
+void (*_machine_restart)(char *command) = do_machine_restart;
+
+/* on panic */
+
+static struct shutdown_trigger on_panic_trigger = {ON_PANIC_STR, &stop_action};
+
+static ssize_t on_panic_show(struct kobject *kobj,
+                             struct kobj_attribute *attr, char *page)
+{
+        return sprintf(page, "%s\n", on_panic_trigger.action->name);
+}
 
+static ssize_t on_panic_store(struct kobject *kobj,
+                              struct kobj_attribute *attr,
+                              const char *buf, size_t len)
+{
+        return set_trigger(buf, &on_panic_trigger, len);
+}
+
+static struct kobj_attribute on_panic_attr =
+        __ATTR(on_panic, 0644, on_panic_show, on_panic_store);
+
+static void do_panic(void)
+{
+        on_panic_trigger.action->fn(&on_panic_trigger);
+        stop_run(&on_panic_trigger);
+}
+
+/* on halt */
+
+static struct shutdown_trigger on_halt_trigger = {ON_HALT_STR, &stop_action};
+
+static ssize_t on_halt_show(struct kobject *kobj,
+                            struct kobj_attribute *attr, char *page)
+{
+        return sprintf(page, "%s\n", on_halt_trigger.action->name);
+}
+
+static ssize_t on_halt_store(struct kobject *kobj,
+                             struct kobj_attribute *attr,
+                             const char *buf, size_t len)
+{
+        return set_trigger(buf, &on_halt_trigger, len);
+}
+
+static struct kobj_attribute on_halt_attr =
+        __ATTR(on_halt, 0644, on_halt_show, on_halt_store);
+
+
+static void do_machine_halt(void)
+{
+        smp_send_stop();
+        on_halt_trigger.action->fn(&on_halt_trigger);
+        stop_run(&on_halt_trigger);
+}
+void (*_machine_halt)(void) = do_machine_halt;
+
+/* on power off */
+
+static struct shutdown_trigger on_poff_trigger = {ON_POFF_STR, &stop_action};
+
+static ssize_t on_poff_show(struct kobject *kobj,
+                            struct kobj_attribute *attr, char *page)
+{
+        return sprintf(page, "%s\n", on_poff_trigger.action->name);
+}
+
+static ssize_t on_poff_store(struct kobject *kobj,
+                             struct kobj_attribute *attr,
+                             const char *buf, size_t len)
+{
+        return set_trigger(buf, &on_poff_trigger, len);
+}
+
+static struct kobj_attribute on_poff_attr =
+        __ATTR(on_poff, 0644, on_poff_show, on_poff_store);
+
+
+static void do_machine_power_off(void)
+{
+        smp_send_stop();
+        on_poff_trigger.action->fn(&on_poff_trigger);
+        stop_run(&on_poff_trigger);
+}
+void (*_machine_power_off)(void) = do_machine_power_off;
+
+static void __init shutdown_triggers_init(void)
+{
         shutdown_actions_kset = kset_create_and_add("shutdown_actions", NULL,
                                                     firmware_kobj);
         if (!shutdown_actions_kset)
-                return -ENOMEM;
-        rc = sysfs_create_file(&shutdown_actions_kset->kobj, &on_panic_attr);
-        if (rc) {
-                kset_unregister(shutdown_actions_kset);
-                return rc;
+                goto fail;
+        if (sysfs_create_file(&shutdown_actions_kset->kobj,
+                              &on_reboot_attr.attr))
+                goto fail;
+        if (sysfs_create_file(&shutdown_actions_kset->kobj,
+                              &on_panic_attr.attr))
+                goto fail;
+        if (sysfs_create_file(&shutdown_actions_kset->kobj,
+                              &on_halt_attr.attr))
+                goto fail;
+        if (sysfs_create_file(&shutdown_actions_kset->kobj,
+                              &on_poff_attr.attr))
+                goto fail;
+
+        return;
+fail:
+        panic("shutdown_triggers_init failed\n");
+}
+
+static void __init shutdown_actions_init(void)
+{
+        int i;
+
+        for (i = 0; i < SHUTDOWN_ACTIONS_COUNT; i++) {
+                if (!shutdown_actions_list[i]->init)
+                        continue;
+                if (shutdown_actions_list[i]->init())
+                        shutdown_actions_list[i] = NULL;
         }
-        atomic_notifier_chain_register(&panic_notifier_list,
-                                       &shutdown_on_panic_nb);
-        return 0;
 }
 
 static int __init s390_ipl_init(void)
 {
-        int rc;
-
-        sclp_get_ipl_info(&sclp_ipl_info);
         reipl_probe();
-        rc = ipl_init();
-        if (rc)
-                return rc;
-        rc = reipl_init();
-        if (rc)
-                return rc;
-        rc = dump_init();
-        if (rc)
-                return rc;
-        rc = shutdown_actions_init();
-        if (rc)
-                return rc;
+        sclp_get_ipl_info(&sclp_ipl_info);
+        shutdown_actions_init();
+        shutdown_triggers_init();
         return 0;
 }
 
 __initcall(s390_ipl_init);
 
+static void __init strncpy_skip_quote(char *dst, char *src, int n)
+{
+        int sx, dx;
+
+        dx = 0;
+        for (sx = 0; src[sx] != 0; sx++) {
+                if (src[sx] == '"')
+                        continue;
+                dst[dx++] = src[sx];
+                if (dx >= n)
+                        break;
+        }
+}
+
+static int __init vmcmd_on_reboot_setup(char *str)
+{
+        if (!MACHINE_IS_VM)
+                return 1;
+        strncpy_skip_quote(vmcmd_on_reboot, str, 127);
+        vmcmd_on_reboot[127] = 0;
+        on_reboot_trigger.action = &vmcmd_action;
+        return 1;
+}
+__setup("vmreboot=", vmcmd_on_reboot_setup);
+
+static int __init vmcmd_on_panic_setup(char *str)
+{
+        if (!MACHINE_IS_VM)
+                return 1;
+        strncpy_skip_quote(vmcmd_on_panic, str, 127);
+        vmcmd_on_panic[127] = 0;
+        on_panic_trigger.action = &vmcmd_action;
+        return 1;
+}
+__setup("vmpanic=", vmcmd_on_panic_setup);
+
+static int __init vmcmd_on_halt_setup(char *str)
+{
+        if (!MACHINE_IS_VM)
+                return 1;
+        strncpy_skip_quote(vmcmd_on_halt, str, 127);
+        vmcmd_on_halt[127] = 0;
+        on_halt_trigger.action = &vmcmd_action;
+        return 1;
+}
+__setup("vmhalt=", vmcmd_on_halt_setup);
+
+static int __init vmcmd_on_poff_setup(char *str)
+{
+        if (!MACHINE_IS_VM)
+                return 1;
+        strncpy_skip_quote(vmcmd_on_poff, str, 127);
+        vmcmd_on_poff[127] = 0;
+        on_poff_trigger.action = &vmcmd_action;
+        return 1;
+}
+__setup("vmpoff=", vmcmd_on_poff_setup);
+
+static int on_panic_notify(struct notifier_block *self,
+                           unsigned long event, void *data)
+{
+        do_panic();
+        return NOTIFY_OK;
+}
+
+static struct notifier_block on_panic_nb = {
+        .notifier_call = on_panic_notify,
+        .priority = 0,
+};
+
+void __init setup_ipl(void)
+{
+        ipl_info.type = get_ipl_type();
+        switch (ipl_info.type) {
+        case IPL_TYPE_CCW:
+                ipl_info.data.ccw.dev_id.devno = ipl_devno;
+                ipl_info.data.ccw.dev_id.ssid = 0;
+                break;
+        case IPL_TYPE_FCP:
+        case IPL_TYPE_FCP_DUMP:
+                ipl_info.data.fcp.dev_id.devno =
+                        IPL_PARMBLOCK_START->ipl_info.fcp.devno;
+                ipl_info.data.fcp.dev_id.ssid = 0;
+                ipl_info.data.fcp.wwpn = IPL_PARMBLOCK_START->ipl_info.fcp.wwpn;
+                ipl_info.data.fcp.lun = IPL_PARMBLOCK_START->ipl_info.fcp.lun;
+                break;
+        case IPL_TYPE_NSS:
+                strncpy(ipl_info.data.nss.name, kernel_nss_name,
+                        sizeof(ipl_info.data.nss.name));
+                break;
+        case IPL_TYPE_UNKNOWN:
+        default:
+                /* We have no info to copy */
+                break;
+        }
+        atomic_notifier_chain_register(&panic_notifier_list, &on_panic_nb);
+}
+
 void __init ipl_save_parameters(void)
 {
         struct cio_iplinfo iplinfo;
@@ -1202,3 +1475,4 @@ void s390_reset_system(void)
 
         do_reset_calls();
 }
+
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 29f7884b4ffa..0e7aca039307 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -36,7 +36,7 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/notifier.h>
-
+#include <linux/utsname.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -182,13 +182,15 @@ void cpu_idle(void)
 
 void show_regs(struct pt_regs *regs)
 {
-        struct task_struct *tsk = current;
-
-        printk("CPU:    %d    %s\n", task_thread_info(tsk)->cpu, print_tainted());
-        printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
-               current->comm, task_pid_nr(current), (void *) tsk,
-               (void *) tsk->thread.ksp);
-
+        print_modules();
+        printk("CPU: %d %s %s %.*s\n",
+               task_thread_info(current)->cpu, print_tainted(),
+               init_utsname()->release,
+               (int)strcspn(init_utsname()->version, " "),
+               init_utsname()->version);
+        printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
+               current->comm, current->pid, current,
+               (void *) current->thread.ksp);
         show_registers(regs);
         /* Show stack backtrace if pt_regs is from kernel mode */
         if (!(regs->psw.mask & PSW_MASK_PSTATE))
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 1d81bf9488ae..6e036bae9875 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -86,13 +86,13 @@ FixPerRegisters(struct task_struct *task)
                 per_info->control_regs.bits.storage_alt_space_ctl = 0;
 }
 
-static void set_single_step(struct task_struct *task)
+void user_enable_single_step(struct task_struct *task)
 {
         task->thread.per_info.single_step = 1;
         FixPerRegisters(task);
 }
 
-static void clear_single_step(struct task_struct *task)
+void user_disable_single_step(struct task_struct *task)
 {
         task->thread.per_info.single_step = 0;
         FixPerRegisters(task);
@@ -107,7 +107,7 @@ void
 ptrace_disable(struct task_struct *child)
 {
         /* make sure the single step bit is not set. */
-        clear_single_step(child);
+        user_disable_single_step(child);
 }
 
 #ifndef CONFIG_64BIT
@@ -651,7 +651,7 @@ do_ptrace(struct task_struct *child, long request, long addr, long data)
                         clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
                 child->exit_code = data;
                 /* make sure the single step bit is not set. */
-                clear_single_step(child);
+                user_disable_single_step(child);
                 wake_up_process(child);
                 return 0;
 
@@ -665,7 +665,7 @@ do_ptrace(struct task_struct *child, long request, long addr, long data)
                         return 0;
                 child->exit_code = SIGKILL;
                 /* make sure the single step bit is not set. */
-                clear_single_step(child);
+                user_disable_single_step(child);
                 wake_up_process(child);
                 return 0;
 
@@ -675,10 +675,7 @@ do_ptrace(struct task_struct *child, long request, long addr, long data)
                         return -EIO;
                 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
                 child->exit_code = data;
-                if (data)
-                        set_tsk_thread_flag(child, TIF_SINGLE_STEP);
-                else
-                        set_single_step(child);
+                user_enable_single_step(child);
                 /* give it a chance to run. */
                 wake_up_process(child);
                 return 0;
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 577aa7dd660e..766c783bd7a7 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -126,75 +126,6 @@ void __cpuinit cpu_init(void)
 }
 
 /*
- * VM halt and poweroff setup routines
- */
-char vmhalt_cmd[128] = "";
-char vmpoff_cmd[128] = "";
-static char vmpanic_cmd[128] = "";
-
-static void strncpy_skip_quote(char *dst, char *src, int n)
-{
-        int sx, dx;
-
-        dx = 0;
-        for (sx = 0; src[sx] != 0; sx++) {
-                if (src[sx] == '"') continue;
-                dst[dx++] = src[sx];
-                if (dx >= n) break;
-        }
-}
-
-static int __init vmhalt_setup(char *str)
-{
-        strncpy_skip_quote(vmhalt_cmd, str, 127);
-        vmhalt_cmd[127] = 0;
-        return 1;
-}
-
-__setup("vmhalt=", vmhalt_setup);
-
-static int __init vmpoff_setup(char *str)
-{
-        strncpy_skip_quote(vmpoff_cmd, str, 127);
-        vmpoff_cmd[127] = 0;
-        return 1;
-}
-
-__setup("vmpoff=", vmpoff_setup);
-
-static int vmpanic_notify(struct notifier_block *self, unsigned long event,
-                          void *data)
-{
-        if (MACHINE_IS_VM && strlen(vmpanic_cmd) > 0)
-                cpcmd(vmpanic_cmd, NULL, 0, NULL);
-
-        return NOTIFY_OK;
-}
-
-#define PANIC_PRI_VMPANIC       0
-
-static struct notifier_block vmpanic_nb = {
-        .notifier_call = vmpanic_notify,
-        .priority = PANIC_PRI_VMPANIC
-};
-
-static int __init vmpanic_setup(char *str)
-{
-        static int register_done __initdata = 0;
-
-        strncpy_skip_quote(vmpanic_cmd, str, 127);
-        vmpanic_cmd[127] = 0;
-        if (!register_done) {
-                register_done = 1;
-                atomic_notifier_chain_register(&panic_notifier_list,
-                                               &vmpanic_nb);
-        }
-        return 1;
-}
-
-__setup("vmpanic=", vmpanic_setup);
-
-/*
  * condev= and conmode= setup parameter.
  */
 
@@ -308,38 +239,6 @@ static void __init setup_zfcpdump(unsigned int console_devno)
 static inline void setup_zfcpdump(unsigned int console_devno) {}
 #endif /* CONFIG_ZFCPDUMP */
 
-#ifdef CONFIG_SMP
-void (*_machine_restart)(char *command) = machine_restart_smp;
-void (*_machine_halt)(void) = machine_halt_smp;
-void (*_machine_power_off)(void) = machine_power_off_smp;
-#else
-/*
- * Reboot, halt and power_off routines for non SMP.
- */
-static void do_machine_restart_nonsmp(char * __unused)
-{
-        do_reipl();
-}
-
-static void do_machine_halt_nonsmp(void)
-{
-        if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0)
-                __cpcmd(vmhalt_cmd, NULL, 0, NULL);
-        signal_processor(smp_processor_id(), sigp_stop_and_store_status);
-}
-
-static void do_machine_power_off_nonsmp(void)
-{
-        if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0)
-                __cpcmd(vmpoff_cmd, NULL, 0, NULL);
-        signal_processor(smp_processor_id(), sigp_stop_and_store_status);
-}
-
-void (*_machine_restart)(char *command) = do_machine_restart_nonsmp;
-void (*_machine_halt)(void) = do_machine_halt_nonsmp;
-void (*_machine_power_off)(void) = do_machine_power_off_nonsmp;
-#endif
-
  /*
  * Reboot, halt and power_off stubs. They just call _machine_restart,
  * _machine_halt or _machine_power_off. 
@@ -559,7 +458,9 @@ setup_resources(void)
         data_resource.start = (unsigned long) &_etext;
         data_resource.end = (unsigned long) &_edata - 1;
 
-        for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++) {
+        for (i = 0; i < MEMORY_CHUNKS; i++) {
+                if (!memory_chunk[i].size)
+                        continue;
                 res = alloc_bootmem_low(sizeof(struct resource));
                 res->flags = IORESOURCE_BUSY | IORESOURCE_MEM;
                 switch (memory_chunk[i].type) {
@@ -617,7 +518,7 @@ EXPORT_SYMBOL_GPL(real_memory_size);
 static void __init setup_memory_end(void)
 {
         unsigned long memory_size;
-        unsigned long max_mem, max_phys;
+        unsigned long max_mem;
         int i;
 
 #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
@@ -625,10 +526,31 @@ static void __init setup_memory_end(void)
                 memory_end = ZFCPDUMP_HSA_SIZE;
 #endif
         memory_size = 0;
-        max_phys = VMALLOC_END_INIT - VMALLOC_MIN_SIZE;
         memory_end &= PAGE_MASK;
 
-        max_mem = memory_end ? min(max_phys, memory_end) : max_phys;
+        max_mem = memory_end ? min(VMALLOC_START, memory_end) : VMALLOC_START;
+        memory_end = min(max_mem, memory_end);
+
+        /*
+         * Make sure all chunks are MAX_ORDER aligned so we don't need the
+         * extra checks that HOLES_IN_ZONE would require.
+         */
+        for (i = 0; i < MEMORY_CHUNKS; i++) {
+                unsigned long start, end;
+                struct mem_chunk *chunk;
+                unsigned long align;
+
+                chunk = &memory_chunk[i];
+                align = 1UL << (MAX_ORDER + PAGE_SHIFT - 1);
+                start = (chunk->addr + align - 1) & ~(align - 1);
+                end = (chunk->addr + chunk->size) & ~(align - 1);
+                if (start >= end)
+                        memset(chunk, 0, sizeof(*chunk));
+                else {
+                        chunk->addr = start;
+                        chunk->size = end - start;
+                }
+        }
 
         for (i = 0; i < MEMORY_CHUNKS; i++) {
                 struct mem_chunk *chunk = &memory_chunk[i];
@@ -890,7 +812,7 @@ setup_arch(char **cmdline_p)
 
         parse_early_param();
 
-        setup_ipl_info();
+        setup_ipl();
         setup_memory_end();
         setup_addressing_mode();
         setup_memory();
@@ -899,7 +821,6 @@ setup_arch(char **cmdline_p)
 
         cpu_init();
         __cpu_logical_map[0] = S390_lowcore.cpu_data.cpu_addr;
-        smp_setup_cpu_possible_map();
 
         /*
          * Setup capabilities (ELF_HWCAP & ELF_PLATFORM).
@@ -920,7 +841,7 @@ setup_arch(char **cmdline_p)
 
 void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
 {
-   printk("cpu %d "
+   printk(KERN_INFO "cpu %d "
 #ifdef CONFIG_SMP
            "phys_idx=%d "
 #endif
@@ -996,7 +917,7 @@ static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 static void c_stop(struct seq_file *m, void *v)
 {
 }
-struct seq_operations cpuinfo_op = {
+const struct seq_operations cpuinfo_op = {
         .start  = c_start,
         .next   = c_next,
         .stop   = c_stop,
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index d264671c1b71..4449bf32cbf1 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -471,6 +471,7 @@ void do_signal(struct pt_regs *regs)
 
         if (signr > 0) {
                 /* Whee!  Actually deliver the signal.  */
+                int ret;
 #ifdef CONFIG_COMPAT
                 if (test_thread_flag(TIF_31BIT)) {
                         extern int handle_signal32(unsigned long sig,
@@ -478,15 +479,12 @@ void do_signal(struct pt_regs *regs)
                                                    siginfo_t *info,
                                                    sigset_t *oldset,
                                                    struct pt_regs *regs);
-                        if (handle_signal32(
-                                    signr, &ka, &info, oldset, regs) == 0) {
-                                if (test_thread_flag(TIF_RESTORE_SIGMASK))
-                                        clear_thread_flag(TIF_RESTORE_SIGMASK);
-                        }
-                        return;
+                        ret = handle_signal32(signr, &ka, &info, oldset, regs);
                 }
+                else
 #endif
-                if (handle_signal(signr, &ka, &info, oldset, regs) == 0) {
+                        ret = handle_signal(signr, &ka, &info, oldset, regs);
+                if (!ret) {
                         /*
                          * A signal was successfully delivered; the saved
                          * sigmask will have been stored in the signal frame,
@@ -495,6 +493,14 @@ void do_signal(struct pt_regs *regs)
                          */
                         if (test_thread_flag(TIF_RESTORE_SIGMASK))
                                 clear_thread_flag(TIF_RESTORE_SIGMASK);
+
+                        /*
+                         * If we would have taken a single-step trap
+                         * for a normal instruction, act like we took
+                         * one for the handler setup.
+                         */
+                        if (current->thread.per_info.single_step)
+                                set_thread_flag(TIF_SINGLE_STEP);
                 }
                 return;
         }
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 264ea906db4c..aa37fa154512 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -42,6 +42,7 @@
 #include <asm/tlbflush.h>
 #include <asm/timer.h>
 #include <asm/lowcore.h>
+#include <asm/sclp.h>
 #include <asm/cpu.h>
 
 /*
@@ -53,11 +54,27 @@ EXPORT_SYMBOL(lowcore_ptr);
 cpumask_t cpu_online_map = CPU_MASK_NONE;
 EXPORT_SYMBOL(cpu_online_map);
 
-cpumask_t cpu_possible_map = CPU_MASK_NONE;
+cpumask_t cpu_possible_map = CPU_MASK_ALL;
 EXPORT_SYMBOL(cpu_possible_map);
 
 static struct task_struct *current_set[NR_CPUS];
 
+static u8 smp_cpu_type;
+static int smp_use_sigp_detection;
+
+enum s390_cpu_state {
+        CPU_STATE_STANDBY,
+        CPU_STATE_CONFIGURED,
+};
+
+#ifdef CONFIG_HOTPLUG_CPU
+static DEFINE_MUTEX(smp_cpu_state_mutex);
+#endif
+static int smp_cpu_state[NR_CPUS];
+
+static DEFINE_PER_CPU(struct cpu, cpu_devices);
+DEFINE_PER_CPU(struct s390_idle_data, s390_idle);
+
 static void smp_ext_bitcall(int, ec_bit_sig);
 
 /*
@@ -193,6 +210,33 @@ int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
 }
 EXPORT_SYMBOL(smp_call_function_single);
 
+/**
+ * smp_call_function_mask(): Run a function on a set of other CPUs.
+ * @mask: The set of cpus to run on.  Must not include the current cpu.
+ * @func: The function to run. This must be fast and non-blocking.
+ * @info: An arbitrary pointer to pass to the function.
+ * @wait: If true, wait (atomically) until function has completed on other CPUs.
+ *
+ * Returns 0 on success, else a negative status code.
+ *
+ * If @wait is true, then returns once @func has returned; otherwise
+ * it returns just before the target cpu calls @func.
+ *
+ * You must not call this function with disabled interrupts or from a
+ * hardware interrupt handler or from a bottom half handler.
+ */
+int
+smp_call_function_mask(cpumask_t mask,
+                        void (*func)(void *), void *info,
+                        int wait)
+{
+        preempt_disable();
+        __smp_call_function_map(func, info, 0, wait, mask);
+        preempt_enable();
+        return 0;
+}
+EXPORT_SYMBOL(smp_call_function_mask);
+
 void smp_send_stop(void)
 {
         int cpu, rc;
@@ -217,33 +261,6 @@ void smp_send_stop(void)
 }
 
 /*
- * Reboot, halt and power_off routines for SMP.
- */
-void machine_restart_smp(char *__unused)
-{
-        smp_send_stop();
-        do_reipl();
-}
-
-void machine_halt_smp(void)
-{
-        smp_send_stop();
-        if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0)
-                __cpcmd(vmhalt_cmd, NULL, 0, NULL);
-        signal_processor(smp_processor_id(), sigp_stop_and_store_status);
-        for (;;);
-}
-
-void machine_power_off_smp(void)
-{
-        smp_send_stop();
-        if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0)
-                __cpcmd(vmpoff_cmd, NULL, 0, NULL);
-        signal_processor(smp_processor_id(), sigp_stop_and_store_status);
-        for (;;);
-}
-
-/*
  * This is the main routine where commands issued by other
  * cpus are handled.
  */
@@ -355,6 +372,13 @@ void smp_ctl_clear_bit(int cr, int bit)
 }
 EXPORT_SYMBOL(smp_ctl_clear_bit);
 
+/*
+ * In early ipl state a temp. logically cpu number is needed, so the sigp
+ * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on
+ * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1.
+ */
+#define CPU_INIT_NO     1
+
 #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
 
 /*
@@ -375,9 +399,10 @@ static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
                        "kernel was compiled with NR_CPUS=%i\n", cpu, NR_CPUS);
                 return;
         }
-        zfcpdump_save_areas[cpu] = alloc_bootmem(sizeof(union save_area));
-        __cpu_logical_map[1] = (__u16) phy_cpu;
-        while (signal_processor(1, sigp_stop_and_store_status) == sigp_busy)
+        zfcpdump_save_areas[cpu] = kmalloc(sizeof(union save_area), GFP_KERNEL);
+        __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu;
+        while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) ==
+               sigp_busy)
                 cpu_relax();
         memcpy(zfcpdump_save_areas[cpu],
                (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
@@ -397,32 +422,155 @@ static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
 
 #endif /* CONFIG_ZFCPDUMP || CONFIG_ZFCPDUMP_MODULE */
 
-/*
- * Lets check how many CPUs we have.
- */
-static unsigned int __init smp_count_cpus(void)
+static int cpu_stopped(int cpu)
 {
-        unsigned int cpu, num_cpus;
-        __u16 boot_cpu_addr;
+        __u32 status;
 
-        /*
-         * cpu 0 is the boot cpu. See smp_prepare_boot_cpu.
-         */
+        /* Check for stopped state */
+        if (signal_processor_ps(&status, 0, cpu, sigp_sense) ==
+            sigp_status_stored) {
+                if (status & 0x40)
+                        return 1;
+        }
+        return 0;
+}
+
+static int cpu_known(int cpu_id)
+{
+        int cpu;
+
+        for_each_present_cpu(cpu) {
+                if (__cpu_logical_map[cpu] == cpu_id)
+                        return 1;
+        }
+        return 0;
+}
+
+static int smp_rescan_cpus_sigp(cpumask_t avail)
+{
+        int cpu_id, logical_cpu;
+
+        logical_cpu = first_cpu(avail);
+        if (logical_cpu == NR_CPUS)
+                return 0;
+        for (cpu_id = 0; cpu_id <= 65535; cpu_id++) {
+                if (cpu_known(cpu_id))
+                        continue;
+                __cpu_logical_map[logical_cpu] = cpu_id;
+                if (!cpu_stopped(logical_cpu))
+                        continue;
+                cpu_set(logical_cpu, cpu_present_map);
+                smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
+                logical_cpu = next_cpu(logical_cpu, avail);
+                if (logical_cpu == NR_CPUS)
+                        break;
+        }
+        return 0;
+}
+
+static int smp_rescan_cpus_sclp(cpumask_t avail)
+{
+        struct sclp_cpu_info *info;
+        int cpu_id, logical_cpu, cpu;
+        int rc;
+
+        logical_cpu = first_cpu(avail);
+        if (logical_cpu == NR_CPUS)
+                return 0;
+        info = kmalloc(sizeof(*info), GFP_KERNEL);
+        if (!info)
+                return -ENOMEM;
+        rc = sclp_get_cpu_info(info);
+        if (rc)
+                goto out;
+        for (cpu = 0; cpu < info->combined; cpu++) {
+                if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
+                        continue;
+                cpu_id = info->cpu[cpu].address;
+                if (cpu_known(cpu_id))
+                        continue;
+                __cpu_logical_map[logical_cpu] = cpu_id;
+                cpu_set(logical_cpu, cpu_present_map);
+                if (cpu >= info->configured)
+                        smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
+                else
+                        smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
+                logical_cpu = next_cpu(logical_cpu, avail);
+                if (logical_cpu == NR_CPUS)
+                        break;
+        }
+out:
+        kfree(info);
+        return rc;
+}
+
+static int smp_rescan_cpus(void)
+{
+        cpumask_t avail;
+
+        cpus_xor(avail, cpu_possible_map, cpu_present_map);
+        if (smp_use_sigp_detection)
+                return smp_rescan_cpus_sigp(avail);
+        else
+                return smp_rescan_cpus_sclp(avail);
+}
+
+static void __init smp_detect_cpus(void)
+{
+        unsigned int cpu, c_cpus, s_cpus;
+        struct sclp_cpu_info *info;
+        u16 boot_cpu_addr, cpu_addr;
+
+        c_cpus = 1;
+        s_cpus = 0;
         boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr;
-        current_thread_info()->cpu = 0;
-        num_cpus = 1;
-        for (cpu = 0; cpu <= 65535; cpu++) {
-                if ((__u16) cpu == boot_cpu_addr)
+        info = kmalloc(sizeof(*info), GFP_KERNEL);
+        if (!info)
+                panic("smp_detect_cpus failed to allocate memory\n");
+        /* Use sigp detection algorithm if sclp doesn't work. */
+        if (sclp_get_cpu_info(info)) {
+                smp_use_sigp_detection = 1;
+                for (cpu = 0; cpu <= 65535; cpu++) {
+                        if (cpu == boot_cpu_addr)
+                                continue;
+                        __cpu_logical_map[CPU_INIT_NO] = cpu;
+                        if (!cpu_stopped(CPU_INIT_NO))
+                                continue;
+                        smp_get_save_area(c_cpus, cpu);
+                        c_cpus++;
+                }
+                goto out;
+        }
+
+        if (info->has_cpu_type) {
+                for (cpu = 0; cpu < info->combined; cpu++) {
+                        if (info->cpu[cpu].address == boot_cpu_addr) {
+                                smp_cpu_type = info->cpu[cpu].type;
+                                break;
+                        }
+                }
+        }
+
+        for (cpu = 0; cpu < info->combined; cpu++) {
+                if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
+                        continue;
+                cpu_addr = info->cpu[cpu].address;
+                if (cpu_addr == boot_cpu_addr)
                         continue;
-                __cpu_logical_map[1] = (__u16) cpu;
-                if (signal_processor(1, sigp_sense) == sigp_not_operational)
+                __cpu_logical_map[CPU_INIT_NO] = cpu_addr;
+                if (!cpu_stopped(CPU_INIT_NO)) {
+                        s_cpus++;
                         continue;
-                smp_get_save_area(num_cpus, cpu);
-                num_cpus++;
+                }
+                smp_get_save_area(c_cpus, cpu_addr);
+                c_cpus++;
         }
-        printk("Detected %d CPU's\n", (int) num_cpus);
-        printk("Boot cpu address %2X\n", boot_cpu_addr);
-        return num_cpus;
+out:
+        kfree(info);
+        printk(KERN_INFO "CPUs: %d configured, %d standby\n", c_cpus, s_cpus);
+        get_online_cpus();
+        smp_rescan_cpus();
+        put_online_cpus();
 }
 
 /*
@@ -453,8 +601,6 @@ int __cpuinit start_secondary(void *cpuvoid)
         return 0;
 }
 
-DEFINE_PER_CPU(struct s390_idle_data, s390_idle);
-
 static void __init smp_create_idle(unsigned int cpu)
 {
         struct task_struct *p;
@@ -470,37 +616,82 @@ static void __init smp_create_idle(unsigned int cpu)
         spin_lock_init(&(&per_cpu(s390_idle, cpu))->lock);
 }
 
-static int cpu_stopped(int cpu)
+static int __cpuinit smp_alloc_lowcore(int cpu)
 {
-        __u32 status;
+        unsigned long async_stack, panic_stack;
+        struct _lowcore *lowcore;
+        int lc_order;
+
+        lc_order = sizeof(long) == 8 ? 1 : 0;
+        lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, lc_order);
+        if (!lowcore)
+                return -ENOMEM;
+        async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
+        if (!async_stack)
+                goto out_async_stack;
+        panic_stack = __get_free_page(GFP_KERNEL);
+        if (!panic_stack)
+                goto out_panic_stack;
+
+        *lowcore = S390_lowcore;
+        lowcore->async_stack = async_stack + ASYNC_SIZE;
+        lowcore->panic_stack = panic_stack + PAGE_SIZE;
 
-        /* Check for stopped state */
-        if (signal_processor_ps(&status, 0, cpu, sigp_sense) ==
-            sigp_status_stored) {
-                if (status & 0x40)
-                        return 1;
+#ifndef CONFIG_64BIT
+        if (MACHINE_HAS_IEEE) {
+                unsigned long save_area;
+
+                save_area = get_zeroed_page(GFP_KERNEL);
+                if (!save_area)
+                        goto out_save_area;
+                lowcore->extended_save_area_addr = (u32) save_area;
         }
+#endif
+        lowcore_ptr[cpu] = lowcore;
         return 0;
+
+#ifndef CONFIG_64BIT
+out_save_area:
+        free_page(panic_stack);
+#endif
+out_panic_stack:
+        free_pages(async_stack, ASYNC_ORDER);
+out_async_stack:
+        free_pages((unsigned long) lowcore, lc_order);
+        return -ENOMEM;
 }
 
-/* Upping and downing of CPUs */
+#ifdef CONFIG_HOTPLUG_CPU
+static void smp_free_lowcore(int cpu)
+{
+        struct _lowcore *lowcore;
+        int lc_order;
+
+        lc_order = sizeof(long) == 8 ? 1 : 0;
+        lowcore = lowcore_ptr[cpu];
+#ifndef CONFIG_64BIT
+        if (MACHINE_HAS_IEEE)
+                free_page((unsigned long) lowcore->extended_save_area_addr);
+#endif
+        free_page(lowcore->panic_stack - PAGE_SIZE);
+        free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
+        free_pages((unsigned long) lowcore, lc_order);
+        lowcore_ptr[cpu] = NULL;
+}
+#endif /* CONFIG_HOTPLUG_CPU */
 
-int __cpu_up(unsigned int cpu)
+/* Upping and downing of CPUs */
+int __cpuinit __cpu_up(unsigned int cpu)
 {
         struct task_struct *idle;
         struct _lowcore *cpu_lowcore;
         struct stack_frame *sf;
         sigp_ccode ccode;
-        int curr_cpu;
 
-        for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) {
-                __cpu_logical_map[cpu] = (__u16) curr_cpu;
-                if (cpu_stopped(cpu))
-                        break;
-        }
-
-        if (!cpu_stopped(cpu))
-                return -ENODEV;
+        if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
+                return -EIO;
+        if (smp_alloc_lowcore(cpu))
+                return -ENOMEM;
 
         ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
                                    cpu, sigp_set_prefix);
@@ -515,6 +706,7 @@ int __cpu_up(unsigned int cpu)
         cpu_lowcore = lowcore_ptr[cpu];
         cpu_lowcore->kernel_stack = (unsigned long)
                 task_stack_page(idle) + THREAD_SIZE;
+        cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
         sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
                                      - sizeof(struct pt_regs)
                                      - sizeof(struct stack_frame));
@@ -528,6 +720,8 @@ int __cpu_up(unsigned int cpu)
         cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
         cpu_lowcore->current_task = (unsigned long) idle;
         cpu_lowcore->cpu_data.cpu_nr = cpu;
+        cpu_lowcore->softirq_pending = 0;
+        cpu_lowcore->ext_call_fast = 0;
         eieio();
 
         while (signal_processor(cpu, sigp_restart) == sigp_busy)
@@ -538,44 +732,20 @@ int __cpu_up(unsigned int cpu)
         return 0;
 }
 
-static unsigned int __initdata additional_cpus;
-static unsigned int __initdata possible_cpus;
-
-void __init smp_setup_cpu_possible_map(void)
+static int __init setup_possible_cpus(char *s)
 {
-        unsigned int phy_cpus, pos_cpus, cpu;
-
-        phy_cpus = smp_count_cpus();
-        pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS);
-
-        if (possible_cpus)
-                pos_cpus = min(possible_cpus, (unsigned int) NR_CPUS);
+        int pcpus, cpu;
 
-        for (cpu = 0; cpu < pos_cpus; cpu++)
+        pcpus = simple_strtoul(s, NULL, 0);
+        cpu_possible_map = cpumask_of_cpu(0);
+        for (cpu = 1; cpu < pcpus && cpu < NR_CPUS; cpu++)
                 cpu_set(cpu, cpu_possible_map);
-
-        phy_cpus = min(phy_cpus, pos_cpus);
-
-        for (cpu = 0; cpu < phy_cpus; cpu++)
-                cpu_set(cpu, cpu_present_map);
-}
-
-#ifdef CONFIG_HOTPLUG_CPU
-
-static int __init setup_additional_cpus(char *s)
-{
-        additional_cpus = simple_strtoul(s, NULL, 0);
-        return 0;
-}
-early_param("additional_cpus", setup_additional_cpus);
-
-static int __init setup_possible_cpus(char *s)
-{
-        possible_cpus = simple_strtoul(s, NULL, 0);
         return 0;
 }
 early_param("possible_cpus", setup_possible_cpus);
 
+#ifdef CONFIG_HOTPLUG_CPU
+
 int __cpu_disable(void)
 {
         struct ec_creg_mask_parms cr_parms;
@@ -612,7 +782,8 @@ void __cpu_die(unsigned int cpu)
         /* Wait until target cpu is down */
         while (!smp_cpu_not_running(cpu))
                 cpu_relax();
-        printk("Processor %d spun down\n", cpu);
+        smp_free_lowcore(cpu);
+        printk(KERN_INFO "Processor %d spun down\n", cpu);
 }
 
 void cpu_die(void)
@@ -625,49 +796,19 @@ void cpu_die(void)
 
 #endif /* CONFIG_HOTPLUG_CPU */
 
-/*
- *      Cycle through the processors and setup structures.
- */
-
 void __init smp_prepare_cpus(unsigned int max_cpus)
 {
-        unsigned long stack;
         unsigned int cpu;
-        int i;
+
+        smp_detect_cpus();
 
         /* request the 0x1201 emergency signal external interrupt */
         if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
                 panic("Couldn't request external interrupt 0x1201");
         memset(lowcore_ptr, 0, sizeof(lowcore_ptr));
-        /*
-         *  Initialize prefix pages and stacks for all possible cpus
-         */
         print_cpu_info(&S390_lowcore.cpu_data);
+        smp_alloc_lowcore(smp_processor_id());
 
-        for_each_possible_cpu(i) {
-                lowcore_ptr[i] = (struct _lowcore *)
-                        __get_free_pages(GFP_KERNEL | GFP_DMA,
-                                         sizeof(void*) == 8 ? 1 : 0);
-                stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
-                if (!lowcore_ptr[i] || !stack)
-                        panic("smp_boot_cpus failed to allocate memory\n");
-
-                *(lowcore_ptr[i]) = S390_lowcore;
-                lowcore_ptr[i]->async_stack = stack + ASYNC_SIZE;
-                stack = __get_free_pages(GFP_KERNEL, 0);
-                if (!stack)
-                        panic("smp_boot_cpus failed to allocate memory\n");
-                lowcore_ptr[i]->panic_stack = stack + PAGE_SIZE;
-#ifndef CONFIG_64BIT
-                if (MACHINE_HAS_IEEE) {
-                        lowcore_ptr[i]->extended_save_area_addr =
-                                (__u32) __get_free_pages(GFP_KERNEL, 0);
-                        if (!lowcore_ptr[i]->extended_save_area_addr)
-                                panic("smp_boot_cpus failed to "
-                                      "allocate memory\n");
-                }
-#endif
-        }
 #ifndef CONFIG_64BIT
         if (MACHINE_HAS_IEEE)
                 ctl_set_bit(14, 29); /* enable extended save area */
@@ -683,15 +824,17 @@ void __init smp_prepare_boot_cpu(void)
 {
         BUG_ON(smp_processor_id() != 0);
 
+        current_thread_info()->cpu = 0;
+        cpu_set(0, cpu_present_map);
         cpu_set(0, cpu_online_map);
         S390_lowcore.percpu_offset = __per_cpu_offset[0];
         current_set[0] = current;
+        smp_cpu_state[0] = CPU_STATE_CONFIGURED;
         spin_lock_init(&(&__get_cpu_var(s390_idle))->lock);
 }
 
 void __init smp_cpus_done(unsigned int max_cpus)
 {
-        cpu_present_map = cpu_possible_map;
 }
 
 /*
@@ -705,7 +848,79 @@ int setup_profiling_timer(unsigned int multiplier)
         return 0;
 }
 
-static DEFINE_PER_CPU(struct cpu, cpu_devices);
+#ifdef CONFIG_HOTPLUG_CPU
+static ssize_t cpu_configure_show(struct sys_device *dev, char *buf)
+{
+        ssize_t count;
+
+        mutex_lock(&smp_cpu_state_mutex);
+        count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
+        mutex_unlock(&smp_cpu_state_mutex);
+        return count;
+}
+
+static ssize_t cpu_configure_store(struct sys_device *dev, const char *buf,
+                                   size_t count)
+{
+        int cpu = dev->id;
+        int val, rc;
+        char delim;
+
+        if (sscanf(buf, "%d %c", &val, &delim) != 1)
+                return -EINVAL;
+        if (val != 0 && val != 1)
+                return -EINVAL;
+
+        mutex_lock(&smp_cpu_state_mutex);
+        get_online_cpus();
+        rc = -EBUSY;
+        if (cpu_online(cpu))
+                goto out;
+        rc = 0;
+        switch (val) {
+        case 0:
+                if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
+                        rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
+                        if (!rc)
+                                smp_cpu_state[cpu] = CPU_STATE_STANDBY;
+                }
+                break;
+        case 1:
+                if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
+                        rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
+                        if (!rc)
+                                smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
+                }
+                break;
+        default:
+                break;
+        }
+out:
+        put_online_cpus();
+        mutex_unlock(&smp_cpu_state_mutex);
+        return rc ? rc : count;
+}
+static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
+#endif /* CONFIG_HOTPLUG_CPU */
+
+static ssize_t show_cpu_address(struct sys_device *dev, char *buf)
+{
+        return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
+}
+static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
+
+
+static struct attribute *cpu_common_attrs[] = {
+#ifdef CONFIG_HOTPLUG_CPU
+        &attr_configure.attr,
+#endif
+        &attr_address.attr,
+        NULL,
+};
+
+static struct attribute_group cpu_common_attr_group = {
+        .attrs = cpu_common_attrs,
+};
 
 static ssize_t show_capability(struct sys_device *dev, char *buf)
 {
@@ -750,15 +965,15 @@ static ssize_t show_idle_time(struct sys_device *dev, char *buf)
 }
 static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
 
-static struct attribute *cpu_attrs[] = {
+static struct attribute *cpu_online_attrs[] = {
         &attr_capability.attr,
         &attr_idle_count.attr,
         &attr_idle_time_us.attr,
         NULL,
 };
 
-static struct attribute_group cpu_attr_group = {
-        .attrs = cpu_attrs,
+static struct attribute_group cpu_online_attr_group = {
+        .attrs = cpu_online_attrs,
 };
 
 static int __cpuinit smp_cpu_notify(struct notifier_block *self,
@@ -778,12 +993,12 @@ static int __cpuinit smp_cpu_notify(struct notifier_block *self,
                 idle->idle_time = 0;
                 idle->idle_count = 0;
                 spin_unlock_irq(&idle->lock);
-                if (sysfs_create_group(&s->kobj, &cpu_attr_group))
+                if (sysfs_create_group(&s->kobj, &cpu_online_attr_group))
                         return NOTIFY_BAD;
                 break;
         case CPU_DEAD:
         case CPU_DEAD_FROZEN:
-                sysfs_remove_group(&s->kobj, &cpu_attr_group);
+                sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
                 break;
         }
         return NOTIFY_OK;
@@ -793,6 +1008,62 @@ static struct notifier_block __cpuinitdata smp_cpu_nb = {
         .notifier_call = smp_cpu_notify,
 };
 
+static int smp_add_present_cpu(int cpu)
+{
+        struct cpu *c = &per_cpu(cpu_devices, cpu);
+        struct sys_device *s = &c->sysdev;
+        int rc;
+
+        c->hotpluggable = 1;
+        rc = register_cpu(c, cpu);
+        if (rc)
+                goto out;
+        rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
+        if (rc)
+                goto out_cpu;
+        if (!cpu_online(cpu))
+                goto out;
+        rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
+        if (!rc)
+                return 0;
+        sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
+out_cpu:
+#ifdef CONFIG_HOTPLUG_CPU
+        unregister_cpu(c);
+#endif
+out:
+        return rc;
+}
+
+#ifdef CONFIG_HOTPLUG_CPU
+static ssize_t rescan_store(struct sys_device *dev, const char *buf,
+                            size_t count)
+{
+        cpumask_t newcpus;
+        int cpu;
+        int rc;
+
+        mutex_lock(&smp_cpu_state_mutex);
+        get_online_cpus();
+        newcpus = cpu_present_map;
+        rc = smp_rescan_cpus();
+        if (rc)
+                goto out;
+        cpus_andnot(newcpus, cpu_present_map, newcpus);
+        for_each_cpu_mask(cpu, newcpus) {
+                rc = smp_add_present_cpu(cpu);
+                if (rc)
+                        cpu_clear(cpu, cpu_present_map);
+        }
+        rc = 0;
+out:
+        put_online_cpus();
+        mutex_unlock(&smp_cpu_state_mutex);
+        return rc ? rc : count;
+}
+static SYSDEV_ATTR(rescan, 0200, NULL, rescan_store);
+#endif /* CONFIG_HOTPLUG_CPU */
+
 static int __init topology_init(void)
 {
         int cpu;
@@ -800,16 +1071,14 @@ static int __init topology_init(void)
 
         register_cpu_notifier(&smp_cpu_nb);
 
-        for_each_possible_cpu(cpu) {
-                struct cpu *c = &per_cpu(cpu_devices, cpu);
-                struct sys_device *s = &c->sysdev;
-
-                c->hotpluggable = 1;
-                register_cpu(c, cpu);
-                if (!cpu_online(cpu))
-                        continue;
-                s = &c->sysdev;
-                rc = sysfs_create_group(&s->kobj, &cpu_attr_group);
+#ifdef CONFIG_HOTPLUG_CPU
+        rc = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
+                               &attr_rescan.attr);
+        if (rc)
+                return rc;
+#endif
+        for_each_present_cpu(cpu) {
+                rc = smp_add_present_cpu(cpu);
                 if (rc)
                         return rc;
         }
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 8ed16a83fba7..52b8342c6bf2 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -31,6 +31,7 @@
 #include <linux/reboot.h>
 #include <linux/kprobes.h>
 #include <linux/bug.h>
+#include <linux/utsname.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
@@ -168,9 +169,16 @@ void show_stack(struct task_struct *task, unsigned long *sp)
  */
 void dump_stack(void)
 {
+        printk("CPU: %d %s %s %.*s\n",
+               task_thread_info(current)->cpu, print_tainted(),
+               init_utsname()->release,
+               (int)strcspn(init_utsname()->version, " "),
+               init_utsname()->version);
+        printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
+               current->comm, current->pid, current,
+               (void *) current->thread.ksp);
         show_stack(NULL, NULL);
 }
-
 EXPORT_SYMBOL(dump_stack);
 
 static inline int mask_bits(struct pt_regs *regs, unsigned long bits)
@@ -258,8 +266,14 @@ void die(const char * str, struct pt_regs * regs, long err)
         console_verbose();
         spin_lock_irq(&die_lock);
         bust_spinlocks(1);
-        printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
-        print_modules();
+        printk("%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
+#ifdef CONFIG_PREEMPT
+        printk("PREEMPT ");
+#endif
+#ifdef CONFIG_SMP
+        printk("SMP");
+#endif
+        printk("\n");
         notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV);
         show_regs(regs);
         bust_spinlocks(0);
diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S
index 849120e3e28a..936159199346 100644
--- a/arch/s390/kernel/vmlinux.lds.S
+++ b/arch/s390/kernel/vmlinux.lds.S
@@ -17,6 +17,12 @@ ENTRY(_start)
 jiffies = jiffies_64;
 #endif
 
+PHDRS {
+        text PT_LOAD FLAGS(5);  /* R_E */
+        data PT_LOAD FLAGS(7);  /* RWE */
+        note PT_NOTE FLAGS(0);  /* ___ */
+}
+
 SECTIONS
 {
         . = 0x00000000;
@@ -33,6 +39,9 @@ SECTIONS
 
         _etext = .;             /* End of text section */
 
+        NOTES :text :note
+        BUG_TABLE :text
+
         RODATA
 
 #ifdef CONFIG_SHARED_KERNEL
@@ -49,9 +58,6 @@ SECTIONS
                 __stop___ex_table = .;
         }
 
-        NOTES
-        BUG_TABLE
-
         .data : {               /* Data */
                 DATA_DATA
                 CONSTRUCTORS
diff --git a/arch/s390/lib/spinlock.c b/arch/s390/lib/spinlock.c
index 8d76403fcf89..e41f4008afc5 100644
--- a/arch/s390/lib/spinlock.c
+++ b/arch/s390/lib/spinlock.c
@@ -39,7 +39,7 @@ static inline void _raw_yield_cpu(int cpu)
                 _raw_yield();
 }
 
-void _raw_spin_lock_wait(raw_spinlock_t *lp, unsigned int pc)
+void _raw_spin_lock_wait(raw_spinlock_t *lp)
 {
         int count = spin_retry;
         unsigned int cpu = ~smp_processor_id();
@@ -53,15 +53,36 @@ void _raw_spin_lock_wait(raw_spinlock_t *lp, unsigned int pc)
                 }
                 if (__raw_spin_is_locked(lp))
                         continue;
-                if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0) {
-                        lp->owner_pc = pc;
+                if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0)
                         return;
-                }
         }
 }
 EXPORT_SYMBOL(_raw_spin_lock_wait);
 
-int _raw_spin_trylock_retry(raw_spinlock_t *lp, unsigned int pc)
+void _raw_spin_lock_wait_flags(raw_spinlock_t *lp, unsigned long flags)
+{
+        int count = spin_retry;
+        unsigned int cpu = ~smp_processor_id();
+
+        local_irq_restore(flags);
+        while (1) {
+                if (count-- <= 0) {
+                        unsigned int owner = lp->owner_cpu;
+                        if (owner != 0)
+                                _raw_yield_cpu(~owner);
+                        count = spin_retry;
+                }
+                if (__raw_spin_is_locked(lp))
+                        continue;
+                local_irq_disable();
+                if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0)
+                        return;
+                local_irq_restore(flags);
+        }
+}
+EXPORT_SYMBOL(_raw_spin_lock_wait_flags);
+
+int _raw_spin_trylock_retry(raw_spinlock_t *lp)
 {
         unsigned int cpu = ~smp_processor_id();
         int count;
@@ -69,10 +90,8 @@ int _raw_spin_trylock_retry(raw_spinlock_t *lp, unsigned int pc)
         for (count = spin_retry; count > 0; count--) {
                 if (__raw_spin_is_locked(lp))
                         continue;
-                if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0) {
-                        lp->owner_pc = pc;
+                if (_raw_compare_and_swap(&lp->owner_cpu, 0, cpu) == 0)
                         return 1;
-                }
         }
         return 0;
 }
diff --git a/arch/s390/mm/extmem.c b/arch/s390/mm/extmem.c
index 394980b05e6f..880b0ebf894b 100644
--- a/arch/s390/mm/extmem.c
+++ b/arch/s390/mm/extmem.c
@@ -83,7 +83,7 @@ struct dcss_segment {
 };
 
 static DEFINE_MUTEX(dcss_lock);
-static struct list_head dcss_list = LIST_HEAD_INIT(dcss_list);
+static LIST_HEAD(dcss_list);
 static char *segtype_string[] = { "SW", "EW", "SR", "ER", "SN", "EN", "SC",
                                         "EW/EN-MIXED" };
 
diff --git a/arch/s390/mm/vmem.c b/arch/s390/mm/vmem.c
index fb9c5a85aa56..79d13a166a3d 100644
--- a/arch/s390/mm/vmem.c
+++ b/arch/s390/mm/vmem.c
@@ -15,10 +15,6 @@
 #include <asm/setup.h>
 #include <asm/tlbflush.h>
 
-unsigned long vmalloc_end;
-EXPORT_SYMBOL(vmalloc_end);
-
-static struct page *vmem_map;
 static DEFINE_MUTEX(vmem_mutex);
 
 struct memory_segment {
@@ -188,8 +184,8 @@ static int vmem_add_mem_map(unsigned long start, unsigned long size)
         pte_t  pte;
         int ret = -ENOMEM;
 
-        map_start = vmem_map + PFN_DOWN(start);
-        map_end = vmem_map + PFN_DOWN(start + size);
+        map_start = VMEM_MAP + PFN_DOWN(start);
+        map_end = VMEM_MAP + PFN_DOWN(start + size);
 
         start_addr = (unsigned long) map_start & PAGE_MASK;
         end_addr = PFN_ALIGN((unsigned long) map_end);
@@ -240,10 +236,10 @@ static int vmem_add_mem(unsigned long start, unsigned long size)
 {
         int ret;
 
-        ret = vmem_add_range(start, size);
+        ret = vmem_add_mem_map(start, size);
         if (ret)
                 return ret;
-        return vmem_add_mem_map(start, size);
+        return vmem_add_range(start, size);
 }
 
 /*
@@ -254,7 +250,7 @@ static int insert_memory_segment(struct memory_segment *seg)
 {
         struct memory_segment *tmp;
 
-        if (PFN_DOWN(seg->start + seg->size) > max_pfn ||
+        if (seg->start + seg->size >= VMALLOC_START ||
             seg->start + seg->size < seg->start)
                 return -ERANGE;
 
@@ -357,17 +353,15 @@ out:
 
 /*
  * map whole physical memory to virtual memory (identity mapping)
+ * we reserve enough space in the vmalloc area for vmemmap to hotplug
+ * additional memory segments.
  */
 void __init vmem_map_init(void)
 {
-        unsigned long map_size;
         int i;
 
-        map_size = ALIGN(max_low_pfn, MAX_ORDER_NR_PAGES) * sizeof(struct page);
-        vmalloc_end = PFN_ALIGN(VMALLOC_END_INIT) - PFN_ALIGN(map_size);
-        vmem_map = (struct page *) vmalloc_end;
-        NODE_DATA(0)->node_mem_map = vmem_map;
-
+        BUILD_BUG_ON((unsigned long)VMEM_MAP + VMEM_MAP_SIZE > VMEM_MAP_MAX);
+        NODE_DATA(0)->node_mem_map = VMEM_MAP;
         for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++)
                 vmem_add_mem(memory_chunk[i].addr, memory_chunk[i].size);
 }
@@ -382,7 +376,7 @@ static int __init vmem_convert_memory_chunk(void)
         int i;
 
         mutex_lock(&vmem_mutex);
-        for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++) {
+        for (i = 0; i < MEMORY_CHUNKS; i++) {
                 if (!memory_chunk[i].size)
                         continue;
                 seg = kzalloc(sizeof(*seg), GFP_KERNEL);