diff options
Diffstat (limited to 'arch')
136 files changed, 1527 insertions, 838 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index 47f63d480141..cc31bec2e316 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig | |||
@@ -11,6 +11,7 @@ config ALPHA | |||
11 | select HAVE_GENERIC_HARDIRQS | 11 | select HAVE_GENERIC_HARDIRQS |
12 | select GENERIC_IRQ_PROBE | 12 | select GENERIC_IRQ_PROBE |
13 | select AUTO_IRQ_AFFINITY if SMP | 13 | select AUTO_IRQ_AFFINITY if SMP |
14 | select GENERIC_HARDIRQS_NO_DEPRECATED | ||
14 | help | 15 | help |
15 | The Alpha is a 64-bit general-purpose processor designed and | 16 | The Alpha is a 64-bit general-purpose processor designed and |
16 | marketed by the Digital Equipment Corporation of blessed memory, | 17 | marketed by the Digital Equipment Corporation of blessed memory, |
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index 9ab234f48dd8..a19d60082299 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c | |||
@@ -44,11 +44,16 @@ static char irq_user_affinity[NR_IRQS]; | |||
44 | 44 | ||
45 | int irq_select_affinity(unsigned int irq) | 45 | int irq_select_affinity(unsigned int irq) |
46 | { | 46 | { |
47 | struct irq_desc *desc = irq_to_desc[irq]; | 47 | struct irq_data *data = irq_get_irq_data(irq); |
48 | struct irq_chip *chip; | ||
48 | static int last_cpu; | 49 | static int last_cpu; |
49 | int cpu = last_cpu + 1; | 50 | int cpu = last_cpu + 1; |
50 | 51 | ||
51 | if (!desc || !get_irq_desc_chip(desc)->set_affinity || irq_user_affinity[irq]) | 52 | if (!data) |
53 | return 1; | ||
54 | chip = irq_data_get_irq_chip(data); | ||
55 | |||
56 | if (!chip->irq_set_affinity || irq_user_affinity[irq]) | ||
52 | return 1; | 57 | return 1; |
53 | 58 | ||
54 | while (!cpu_possible(cpu) || | 59 | while (!cpu_possible(cpu) || |
@@ -56,8 +61,8 @@ int irq_select_affinity(unsigned int irq) | |||
56 | cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); | 61 | cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); |
57 | last_cpu = cpu; | 62 | last_cpu = cpu; |
58 | 63 | ||
59 | cpumask_copy(desc->affinity, cpumask_of(cpu)); | 64 | cpumask_copy(data->affinity, cpumask_of(cpu)); |
60 | get_irq_desc_chip(desc)->set_affinity(irq, cpumask_of(cpu)); | 65 | chip->irq_set_affinity(data, cpumask_of(cpu), false); |
61 | return 0; | 66 | return 0; |
62 | } | 67 | } |
63 | #endif /* CONFIG_SMP */ | 68 | #endif /* CONFIG_SMP */ |
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c index 2d0679b60939..411ca11d0a18 100644 --- a/arch/alpha/kernel/irq_alpha.c +++ b/arch/alpha/kernel/irq_alpha.c | |||
@@ -228,14 +228,9 @@ struct irqaction timer_irqaction = { | |||
228 | void __init | 228 | void __init |
229 | init_rtc_irq(void) | 229 | init_rtc_irq(void) |
230 | { | 230 | { |
231 | struct irq_desc *desc = irq_to_desc(RTC_IRQ); | 231 | set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip, |
232 | 232 | handle_simple_irq, "RTC"); | |
233 | if (desc) { | 233 | setup_irq(RTC_IRQ, &timer_irqaction); |
234 | desc->status |= IRQ_DISABLED; | ||
235 | set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip, | ||
236 | handle_simple_irq, "RTC"); | ||
237 | setup_irq(RTC_IRQ, &timer_irqaction); | ||
238 | } | ||
239 | } | 234 | } |
240 | 235 | ||
241 | /* Dummy irqactions. */ | 236 | /* Dummy irqactions. */ |
diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c index 956ea0ed1694..c7cc9813e45f 100644 --- a/arch/alpha/kernel/irq_i8259.c +++ b/arch/alpha/kernel/irq_i8259.c | |||
@@ -33,10 +33,10 @@ i8259_update_irq_hw(unsigned int irq, unsigned long mask) | |||
33 | } | 33 | } |
34 | 34 | ||
35 | inline void | 35 | inline void |
36 | i8259a_enable_irq(unsigned int irq) | 36 | i8259a_enable_irq(struct irq_data *d) |
37 | { | 37 | { |
38 | spin_lock(&i8259_irq_lock); | 38 | spin_lock(&i8259_irq_lock); |
39 | i8259_update_irq_hw(irq, cached_irq_mask &= ~(1 << irq)); | 39 | i8259_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq)); |
40 | spin_unlock(&i8259_irq_lock); | 40 | spin_unlock(&i8259_irq_lock); |
41 | } | 41 | } |
42 | 42 | ||
@@ -47,16 +47,18 @@ __i8259a_disable_irq(unsigned int irq) | |||
47 | } | 47 | } |
48 | 48 | ||
49 | void | 49 | void |
50 | i8259a_disable_irq(unsigned int irq) | 50 | i8259a_disable_irq(struct irq_data *d) |
51 | { | 51 | { |
52 | spin_lock(&i8259_irq_lock); | 52 | spin_lock(&i8259_irq_lock); |
53 | __i8259a_disable_irq(irq); | 53 | __i8259a_disable_irq(d->irq); |
54 | spin_unlock(&i8259_irq_lock); | 54 | spin_unlock(&i8259_irq_lock); |
55 | } | 55 | } |
56 | 56 | ||
57 | void | 57 | void |
58 | i8259a_mask_and_ack_irq(unsigned int irq) | 58 | i8259a_mask_and_ack_irq(struct irq_data *d) |
59 | { | 59 | { |
60 | unsigned int irq = d->irq; | ||
61 | |||
60 | spin_lock(&i8259_irq_lock); | 62 | spin_lock(&i8259_irq_lock); |
61 | __i8259a_disable_irq(irq); | 63 | __i8259a_disable_irq(irq); |
62 | 64 | ||
@@ -71,9 +73,9 @@ i8259a_mask_and_ack_irq(unsigned int irq) | |||
71 | 73 | ||
72 | struct irq_chip i8259a_irq_type = { | 74 | struct irq_chip i8259a_irq_type = { |
73 | .name = "XT-PIC", | 75 | .name = "XT-PIC", |
74 | .unmask = i8259a_enable_irq, | 76 | .irq_unmask = i8259a_enable_irq, |
75 | .mask = i8259a_disable_irq, | 77 | .irq_mask = i8259a_disable_irq, |
76 | .mask_ack = i8259a_mask_and_ack_irq, | 78 | .irq_mask_ack = i8259a_mask_and_ack_irq, |
77 | }; | 79 | }; |
78 | 80 | ||
79 | void __init | 81 | void __init |
diff --git a/arch/alpha/kernel/irq_impl.h b/arch/alpha/kernel/irq_impl.h index b63ccd7386f1..d507a234b05d 100644 --- a/arch/alpha/kernel/irq_impl.h +++ b/arch/alpha/kernel/irq_impl.h | |||
@@ -31,11 +31,9 @@ extern void init_rtc_irq(void); | |||
31 | 31 | ||
32 | extern void common_init_isa_dma(void); | 32 | extern void common_init_isa_dma(void); |
33 | 33 | ||
34 | extern void i8259a_enable_irq(unsigned int); | 34 | extern void i8259a_enable_irq(struct irq_data *d); |
35 | extern void i8259a_disable_irq(unsigned int); | 35 | extern void i8259a_disable_irq(struct irq_data *d); |
36 | extern void i8259a_mask_and_ack_irq(unsigned int); | 36 | extern void i8259a_mask_and_ack_irq(struct irq_data *d); |
37 | extern unsigned int i8259a_startup_irq(unsigned int); | ||
38 | extern void i8259a_end_irq(unsigned int); | ||
39 | extern struct irq_chip i8259a_irq_type; | 37 | extern struct irq_chip i8259a_irq_type; |
40 | extern void init_i8259a_irqs(void); | 38 | extern void init_i8259a_irqs(void); |
41 | 39 | ||
diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c index 2863458c853e..b30227fa7f5f 100644 --- a/arch/alpha/kernel/irq_pyxis.c +++ b/arch/alpha/kernel/irq_pyxis.c | |||
@@ -29,21 +29,21 @@ pyxis_update_irq_hw(unsigned long mask) | |||
29 | } | 29 | } |
30 | 30 | ||
31 | static inline void | 31 | static inline void |
32 | pyxis_enable_irq(unsigned int irq) | 32 | pyxis_enable_irq(struct irq_data *d) |
33 | { | 33 | { |
34 | pyxis_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16)); | 34 | pyxis_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); |
35 | } | 35 | } |
36 | 36 | ||
37 | static void | 37 | static void |
38 | pyxis_disable_irq(unsigned int irq) | 38 | pyxis_disable_irq(struct irq_data *d) |
39 | { | 39 | { |
40 | pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); | 40 | pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); |
41 | } | 41 | } |
42 | 42 | ||
43 | static void | 43 | static void |
44 | pyxis_mask_and_ack_irq(unsigned int irq) | 44 | pyxis_mask_and_ack_irq(struct irq_data *d) |
45 | { | 45 | { |
46 | unsigned long bit = 1UL << (irq - 16); | 46 | unsigned long bit = 1UL << (d->irq - 16); |
47 | unsigned long mask = cached_irq_mask &= ~bit; | 47 | unsigned long mask = cached_irq_mask &= ~bit; |
48 | 48 | ||
49 | /* Disable the interrupt. */ | 49 | /* Disable the interrupt. */ |
@@ -58,9 +58,9 @@ pyxis_mask_and_ack_irq(unsigned int irq) | |||
58 | 58 | ||
59 | static struct irq_chip pyxis_irq_type = { | 59 | static struct irq_chip pyxis_irq_type = { |
60 | .name = "PYXIS", | 60 | .name = "PYXIS", |
61 | .mask_ack = pyxis_mask_and_ack_irq, | 61 | .irq_mask_ack = pyxis_mask_and_ack_irq, |
62 | .mask = pyxis_disable_irq, | 62 | .irq_mask = pyxis_disable_irq, |
63 | .unmask = pyxis_enable_irq, | 63 | .irq_unmask = pyxis_enable_irq, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | void | 66 | void |
@@ -103,7 +103,7 @@ init_pyxis_irqs(unsigned long ignore_mask) | |||
103 | if ((ignore_mask >> i) & 1) | 103 | if ((ignore_mask >> i) & 1) |
104 | continue; | 104 | continue; |
105 | set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); | 105 | set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); |
106 | irq_to_desc(i)->status |= IRQ_LEVEL; | 106 | irq_set_status_flags(i, IRQ_LEVEL); |
107 | } | 107 | } |
108 | 108 | ||
109 | setup_irq(16+7, &isa_cascade_irqaction); | 109 | setup_irq(16+7, &isa_cascade_irqaction); |
diff --git a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c index 0e57e828b413..82a47bba41c4 100644 --- a/arch/alpha/kernel/irq_srm.c +++ b/arch/alpha/kernel/irq_srm.c | |||
@@ -18,27 +18,27 @@ | |||
18 | DEFINE_SPINLOCK(srm_irq_lock); | 18 | DEFINE_SPINLOCK(srm_irq_lock); |
19 | 19 | ||
20 | static inline void | 20 | static inline void |
21 | srm_enable_irq(unsigned int irq) | 21 | srm_enable_irq(struct irq_data *d) |
22 | { | 22 | { |
23 | spin_lock(&srm_irq_lock); | 23 | spin_lock(&srm_irq_lock); |
24 | cserve_ena(irq - 16); | 24 | cserve_ena(d->irq - 16); |
25 | spin_unlock(&srm_irq_lock); | 25 | spin_unlock(&srm_irq_lock); |
26 | } | 26 | } |
27 | 27 | ||
28 | static void | 28 | static void |
29 | srm_disable_irq(unsigned int irq) | 29 | srm_disable_irq(struct irq_data *d) |
30 | { | 30 | { |
31 | spin_lock(&srm_irq_lock); | 31 | spin_lock(&srm_irq_lock); |
32 | cserve_dis(irq - 16); | 32 | cserve_dis(d->irq - 16); |
33 | spin_unlock(&srm_irq_lock); | 33 | spin_unlock(&srm_irq_lock); |
34 | } | 34 | } |
35 | 35 | ||
36 | /* Handle interrupts from the SRM, assuming no additional weirdness. */ | 36 | /* Handle interrupts from the SRM, assuming no additional weirdness. */ |
37 | static struct irq_chip srm_irq_type = { | 37 | static struct irq_chip srm_irq_type = { |
38 | .name = "SRM", | 38 | .name = "SRM", |
39 | .unmask = srm_enable_irq, | 39 | .irq_unmask = srm_enable_irq, |
40 | .mask = srm_disable_irq, | 40 | .irq_mask = srm_disable_irq, |
41 | .mask_ack = srm_disable_irq, | 41 | .irq_mask_ack = srm_disable_irq, |
42 | }; | 42 | }; |
43 | 43 | ||
44 | void __init | 44 | void __init |
@@ -52,7 +52,7 @@ init_srm_irqs(long max, unsigned long ignore_mask) | |||
52 | if (i < 64 && ((ignore_mask >> i) & 1)) | 52 | if (i < 64 && ((ignore_mask >> i) & 1)) |
53 | continue; | 53 | continue; |
54 | set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq); | 54 | set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq); |
55 | irq_to_desc(i)->status |= IRQ_LEVEL; | 55 | irq_set_status_flags(i, IRQ_LEVEL); |
56 | } | 56 | } |
57 | } | 57 | } |
58 | 58 | ||
diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c index 7bef61768236..88d95e872f55 100644 --- a/arch/alpha/kernel/sys_alcor.c +++ b/arch/alpha/kernel/sys_alcor.c | |||
@@ -44,31 +44,31 @@ alcor_update_irq_hw(unsigned long mask) | |||
44 | } | 44 | } |
45 | 45 | ||
46 | static inline void | 46 | static inline void |
47 | alcor_enable_irq(unsigned int irq) | 47 | alcor_enable_irq(struct irq_data *d) |
48 | { | 48 | { |
49 | alcor_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16)); | 49 | alcor_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); |
50 | } | 50 | } |
51 | 51 | ||
52 | static void | 52 | static void |
53 | alcor_disable_irq(unsigned int irq) | 53 | alcor_disable_irq(struct irq_data *d) |
54 | { | 54 | { |
55 | alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); | 55 | alcor_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); |
56 | } | 56 | } |
57 | 57 | ||
58 | static void | 58 | static void |
59 | alcor_mask_and_ack_irq(unsigned int irq) | 59 | alcor_mask_and_ack_irq(struct irq_data *d) |
60 | { | 60 | { |
61 | alcor_disable_irq(irq); | 61 | alcor_disable_irq(d); |
62 | 62 | ||
63 | /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ | 63 | /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ |
64 | *(vuip)GRU_INT_CLEAR = 1 << (irq - 16); mb(); | 64 | *(vuip)GRU_INT_CLEAR = 1 << (d->irq - 16); mb(); |
65 | *(vuip)GRU_INT_CLEAR = 0; mb(); | 65 | *(vuip)GRU_INT_CLEAR = 0; mb(); |
66 | } | 66 | } |
67 | 67 | ||
68 | static void | 68 | static void |
69 | alcor_isa_mask_and_ack_irq(unsigned int irq) | 69 | alcor_isa_mask_and_ack_irq(struct irq_data *d) |
70 | { | 70 | { |
71 | i8259a_mask_and_ack_irq(irq); | 71 | i8259a_mask_and_ack_irq(d); |
72 | 72 | ||
73 | /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ | 73 | /* On ALCOR/XLT, need to dismiss interrupt via GRU. */ |
74 | *(vuip)GRU_INT_CLEAR = 0x80000000; mb(); | 74 | *(vuip)GRU_INT_CLEAR = 0x80000000; mb(); |
@@ -77,9 +77,9 @@ alcor_isa_mask_and_ack_irq(unsigned int irq) | |||
77 | 77 | ||
78 | static struct irq_chip alcor_irq_type = { | 78 | static struct irq_chip alcor_irq_type = { |
79 | .name = "ALCOR", | 79 | .name = "ALCOR", |
80 | .unmask = alcor_enable_irq, | 80 | .irq_unmask = alcor_enable_irq, |
81 | .mask = alcor_disable_irq, | 81 | .irq_mask = alcor_disable_irq, |
82 | .mask_ack = alcor_mask_and_ack_irq, | 82 | .irq_mask_ack = alcor_mask_and_ack_irq, |
83 | }; | 83 | }; |
84 | 84 | ||
85 | static void | 85 | static void |
@@ -126,9 +126,9 @@ alcor_init_irq(void) | |||
126 | if (i >= 16+20 && i <= 16+30) | 126 | if (i >= 16+20 && i <= 16+30) |
127 | continue; | 127 | continue; |
128 | set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq); | 128 | set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq); |
129 | irq_to_desc(i)->status |= IRQ_LEVEL; | 129 | irq_set_status_flags(i, IRQ_LEVEL); |
130 | } | 130 | } |
131 | i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq; | 131 | i8259a_irq_type.irq_ack = alcor_isa_mask_and_ack_irq; |
132 | 132 | ||
133 | init_i8259a_irqs(); | 133 | init_i8259a_irqs(); |
134 | common_init_isa_dma(); | 134 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c index b0c916493aea..57eb6307bc27 100644 --- a/arch/alpha/kernel/sys_cabriolet.c +++ b/arch/alpha/kernel/sys_cabriolet.c | |||
@@ -46,22 +46,22 @@ cabriolet_update_irq_hw(unsigned int irq, unsigned long mask) | |||
46 | } | 46 | } |
47 | 47 | ||
48 | static inline void | 48 | static inline void |
49 | cabriolet_enable_irq(unsigned int irq) | 49 | cabriolet_enable_irq(struct irq_data *d) |
50 | { | 50 | { |
51 | cabriolet_update_irq_hw(irq, cached_irq_mask &= ~(1UL << irq)); | 51 | cabriolet_update_irq_hw(d->irq, cached_irq_mask &= ~(1UL << d->irq)); |
52 | } | 52 | } |
53 | 53 | ||
54 | static void | 54 | static void |
55 | cabriolet_disable_irq(unsigned int irq) | 55 | cabriolet_disable_irq(struct irq_data *d) |
56 | { | 56 | { |
57 | cabriolet_update_irq_hw(irq, cached_irq_mask |= 1UL << irq); | 57 | cabriolet_update_irq_hw(d->irq, cached_irq_mask |= 1UL << d->irq); |
58 | } | 58 | } |
59 | 59 | ||
60 | static struct irq_chip cabriolet_irq_type = { | 60 | static struct irq_chip cabriolet_irq_type = { |
61 | .name = "CABRIOLET", | 61 | .name = "CABRIOLET", |
62 | .unmask = cabriolet_enable_irq, | 62 | .irq_unmask = cabriolet_enable_irq, |
63 | .mask = cabriolet_disable_irq, | 63 | .irq_mask = cabriolet_disable_irq, |
64 | .mask_ack = cabriolet_disable_irq, | 64 | .irq_mask_ack = cabriolet_disable_irq, |
65 | }; | 65 | }; |
66 | 66 | ||
67 | static void | 67 | static void |
@@ -107,7 +107,7 @@ common_init_irq(void (*srm_dev_int)(unsigned long v)) | |||
107 | for (i = 16; i < 35; ++i) { | 107 | for (i = 16; i < 35; ++i) { |
108 | set_irq_chip_and_handler(i, &cabriolet_irq_type, | 108 | set_irq_chip_and_handler(i, &cabriolet_irq_type, |
109 | handle_level_irq); | 109 | handle_level_irq); |
110 | irq_to_desc(i)->status |= IRQ_LEVEL; | 110 | irq_set_status_flags(i, IRQ_LEVEL); |
111 | } | 111 | } |
112 | } | 112 | } |
113 | 113 | ||
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index edad5f759ccd..481df4ecb651 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c | |||
@@ -98,37 +98,37 @@ tsunami_update_irq_hw(unsigned long mask) | |||
98 | } | 98 | } |
99 | 99 | ||
100 | static void | 100 | static void |
101 | dp264_enable_irq(unsigned int irq) | 101 | dp264_enable_irq(struct irq_data *d) |
102 | { | 102 | { |
103 | spin_lock(&dp264_irq_lock); | 103 | spin_lock(&dp264_irq_lock); |
104 | cached_irq_mask |= 1UL << irq; | 104 | cached_irq_mask |= 1UL << d->irq; |
105 | tsunami_update_irq_hw(cached_irq_mask); | 105 | tsunami_update_irq_hw(cached_irq_mask); |
106 | spin_unlock(&dp264_irq_lock); | 106 | spin_unlock(&dp264_irq_lock); |
107 | } | 107 | } |
108 | 108 | ||
109 | static void | 109 | static void |
110 | dp264_disable_irq(unsigned int irq) | 110 | dp264_disable_irq(struct irq_data *d) |
111 | { | 111 | { |
112 | spin_lock(&dp264_irq_lock); | 112 | spin_lock(&dp264_irq_lock); |
113 | cached_irq_mask &= ~(1UL << irq); | 113 | cached_irq_mask &= ~(1UL << d->irq); |
114 | tsunami_update_irq_hw(cached_irq_mask); | 114 | tsunami_update_irq_hw(cached_irq_mask); |
115 | spin_unlock(&dp264_irq_lock); | 115 | spin_unlock(&dp264_irq_lock); |
116 | } | 116 | } |
117 | 117 | ||
118 | static void | 118 | static void |
119 | clipper_enable_irq(unsigned int irq) | 119 | clipper_enable_irq(struct irq_data *d) |
120 | { | 120 | { |
121 | spin_lock(&dp264_irq_lock); | 121 | spin_lock(&dp264_irq_lock); |
122 | cached_irq_mask |= 1UL << (irq - 16); | 122 | cached_irq_mask |= 1UL << (d->irq - 16); |
123 | tsunami_update_irq_hw(cached_irq_mask); | 123 | tsunami_update_irq_hw(cached_irq_mask); |
124 | spin_unlock(&dp264_irq_lock); | 124 | spin_unlock(&dp264_irq_lock); |
125 | } | 125 | } |
126 | 126 | ||
127 | static void | 127 | static void |
128 | clipper_disable_irq(unsigned int irq) | 128 | clipper_disable_irq(struct irq_data *d) |
129 | { | 129 | { |
130 | spin_lock(&dp264_irq_lock); | 130 | spin_lock(&dp264_irq_lock); |
131 | cached_irq_mask &= ~(1UL << (irq - 16)); | 131 | cached_irq_mask &= ~(1UL << (d->irq - 16)); |
132 | tsunami_update_irq_hw(cached_irq_mask); | 132 | tsunami_update_irq_hw(cached_irq_mask); |
133 | spin_unlock(&dp264_irq_lock); | 133 | spin_unlock(&dp264_irq_lock); |
134 | } | 134 | } |
@@ -149,10 +149,11 @@ cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) | |||
149 | } | 149 | } |
150 | 150 | ||
151 | static int | 151 | static int |
152 | dp264_set_affinity(unsigned int irq, const struct cpumask *affinity) | 152 | dp264_set_affinity(struct irq_data *d, const struct cpumask *affinity, |
153 | { | 153 | bool force) |
154 | { | ||
154 | spin_lock(&dp264_irq_lock); | 155 | spin_lock(&dp264_irq_lock); |
155 | cpu_set_irq_affinity(irq, *affinity); | 156 | cpu_set_irq_affinity(d->irq, *affinity); |
156 | tsunami_update_irq_hw(cached_irq_mask); | 157 | tsunami_update_irq_hw(cached_irq_mask); |
157 | spin_unlock(&dp264_irq_lock); | 158 | spin_unlock(&dp264_irq_lock); |
158 | 159 | ||
@@ -160,10 +161,11 @@ dp264_set_affinity(unsigned int irq, const struct cpumask *affinity) | |||
160 | } | 161 | } |
161 | 162 | ||
162 | static int | 163 | static int |
163 | clipper_set_affinity(unsigned int irq, const struct cpumask *affinity) | 164 | clipper_set_affinity(struct irq_data *d, const struct cpumask *affinity, |
164 | { | 165 | bool force) |
166 | { | ||
165 | spin_lock(&dp264_irq_lock); | 167 | spin_lock(&dp264_irq_lock); |
166 | cpu_set_irq_affinity(irq - 16, *affinity); | 168 | cpu_set_irq_affinity(d->irq - 16, *affinity); |
167 | tsunami_update_irq_hw(cached_irq_mask); | 169 | tsunami_update_irq_hw(cached_irq_mask); |
168 | spin_unlock(&dp264_irq_lock); | 170 | spin_unlock(&dp264_irq_lock); |
169 | 171 | ||
@@ -171,19 +173,19 @@ clipper_set_affinity(unsigned int irq, const struct cpumask *affinity) | |||
171 | } | 173 | } |
172 | 174 | ||
173 | static struct irq_chip dp264_irq_type = { | 175 | static struct irq_chip dp264_irq_type = { |
174 | .name = "DP264", | 176 | .name = "DP264", |
175 | .unmask = dp264_enable_irq, | 177 | .irq_unmask = dp264_enable_irq, |
176 | .mask = dp264_disable_irq, | 178 | .irq_mask = dp264_disable_irq, |
177 | .mask_ack = dp264_disable_irq, | 179 | .irq_mask_ack = dp264_disable_irq, |
178 | .set_affinity = dp264_set_affinity, | 180 | .irq_set_affinity = dp264_set_affinity, |
179 | }; | 181 | }; |
180 | 182 | ||
181 | static struct irq_chip clipper_irq_type = { | 183 | static struct irq_chip clipper_irq_type = { |
182 | .name = "CLIPPER", | 184 | .name = "CLIPPER", |
183 | .unmask = clipper_enable_irq, | 185 | .irq_unmask = clipper_enable_irq, |
184 | .mask = clipper_disable_irq, | 186 | .irq_mask = clipper_disable_irq, |
185 | .mask_ack = clipper_disable_irq, | 187 | .irq_mask_ack = clipper_disable_irq, |
186 | .set_affinity = clipper_set_affinity, | 188 | .irq_set_affinity = clipper_set_affinity, |
187 | }; | 189 | }; |
188 | 190 | ||
189 | static void | 191 | static void |
@@ -268,8 +270,8 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax) | |||
268 | { | 270 | { |
269 | long i; | 271 | long i; |
270 | for (i = imin; i <= imax; ++i) { | 272 | for (i = imin; i <= imax; ++i) { |
271 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
272 | set_irq_chip_and_handler(i, ops, handle_level_irq); | 273 | set_irq_chip_and_handler(i, ops, handle_level_irq); |
274 | irq_set_status_flags(i, IRQ_LEVEL); | ||
273 | } | 275 | } |
274 | } | 276 | } |
275 | 277 | ||
diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c index ae5f29d127b0..402e908ffb3e 100644 --- a/arch/alpha/kernel/sys_eb64p.c +++ b/arch/alpha/kernel/sys_eb64p.c | |||
@@ -44,22 +44,22 @@ eb64p_update_irq_hw(unsigned int irq, unsigned long mask) | |||
44 | } | 44 | } |
45 | 45 | ||
46 | static inline void | 46 | static inline void |
47 | eb64p_enable_irq(unsigned int irq) | 47 | eb64p_enable_irq(struct irq_data *d) |
48 | { | 48 | { |
49 | eb64p_update_irq_hw(irq, cached_irq_mask &= ~(1 << irq)); | 49 | eb64p_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq)); |
50 | } | 50 | } |
51 | 51 | ||
52 | static void | 52 | static void |
53 | eb64p_disable_irq(unsigned int irq) | 53 | eb64p_disable_irq(struct irq_data *d) |
54 | { | 54 | { |
55 | eb64p_update_irq_hw(irq, cached_irq_mask |= 1 << irq); | 55 | eb64p_update_irq_hw(d->irq, cached_irq_mask |= 1 << d->irq); |
56 | } | 56 | } |
57 | 57 | ||
58 | static struct irq_chip eb64p_irq_type = { | 58 | static struct irq_chip eb64p_irq_type = { |
59 | .name = "EB64P", | 59 | .name = "EB64P", |
60 | .unmask = eb64p_enable_irq, | 60 | .irq_unmask = eb64p_enable_irq, |
61 | .mask = eb64p_disable_irq, | 61 | .irq_mask = eb64p_disable_irq, |
62 | .mask_ack = eb64p_disable_irq, | 62 | .irq_mask_ack = eb64p_disable_irq, |
63 | }; | 63 | }; |
64 | 64 | ||
65 | static void | 65 | static void |
@@ -118,9 +118,9 @@ eb64p_init_irq(void) | |||
118 | init_i8259a_irqs(); | 118 | init_i8259a_irqs(); |
119 | 119 | ||
120 | for (i = 16; i < 32; ++i) { | 120 | for (i = 16; i < 32; ++i) { |
121 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
122 | set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); | 121 | set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); |
123 | } | 122 | irq_set_status_flags(i, IRQ_LEVEL); |
123 | } | ||
124 | 124 | ||
125 | common_init_isa_dma(); | 125 | common_init_isa_dma(); |
126 | setup_irq(16+5, &isa_cascade_irqaction); | 126 | setup_irq(16+5, &isa_cascade_irqaction); |
diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c index 1121bc5c6c6c..0b44a54c1522 100644 --- a/arch/alpha/kernel/sys_eiger.c +++ b/arch/alpha/kernel/sys_eiger.c | |||
@@ -51,16 +51,18 @@ eiger_update_irq_hw(unsigned long irq, unsigned long mask) | |||
51 | } | 51 | } |
52 | 52 | ||
53 | static inline void | 53 | static inline void |
54 | eiger_enable_irq(unsigned int irq) | 54 | eiger_enable_irq(struct irq_data *d) |
55 | { | 55 | { |
56 | unsigned int irq = d->irq; | ||
56 | unsigned long mask; | 57 | unsigned long mask; |
57 | mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); | 58 | mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); |
58 | eiger_update_irq_hw(irq, mask); | 59 | eiger_update_irq_hw(irq, mask); |
59 | } | 60 | } |
60 | 61 | ||
61 | static void | 62 | static void |
62 | eiger_disable_irq(unsigned int irq) | 63 | eiger_disable_irq(struct irq_data *d) |
63 | { | 64 | { |
65 | unsigned int irq = d->irq; | ||
64 | unsigned long mask; | 66 | unsigned long mask; |
65 | mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); | 67 | mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); |
66 | eiger_update_irq_hw(irq, mask); | 68 | eiger_update_irq_hw(irq, mask); |
@@ -68,9 +70,9 @@ eiger_disable_irq(unsigned int irq) | |||
68 | 70 | ||
69 | static struct irq_chip eiger_irq_type = { | 71 | static struct irq_chip eiger_irq_type = { |
70 | .name = "EIGER", | 72 | .name = "EIGER", |
71 | .unmask = eiger_enable_irq, | 73 | .irq_unmask = eiger_enable_irq, |
72 | .mask = eiger_disable_irq, | 74 | .irq_mask = eiger_disable_irq, |
73 | .mask_ack = eiger_disable_irq, | 75 | .irq_mask_ack = eiger_disable_irq, |
74 | }; | 76 | }; |
75 | 77 | ||
76 | static void | 78 | static void |
@@ -136,8 +138,8 @@ eiger_init_irq(void) | |||
136 | init_i8259a_irqs(); | 138 | init_i8259a_irqs(); |
137 | 139 | ||
138 | for (i = 16; i < 128; ++i) { | 140 | for (i = 16; i < 128; ++i) { |
139 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
140 | set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq); | 141 | set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq); |
142 | irq_set_status_flags(i, IRQ_LEVEL); | ||
141 | } | 143 | } |
142 | } | 144 | } |
143 | 145 | ||
diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c index 34f55e03d331..00341b75c8b2 100644 --- a/arch/alpha/kernel/sys_jensen.c +++ b/arch/alpha/kernel/sys_jensen.c | |||
@@ -63,34 +63,34 @@ | |||
63 | */ | 63 | */ |
64 | 64 | ||
65 | static void | 65 | static void |
66 | jensen_local_enable(unsigned int irq) | 66 | jensen_local_enable(struct irq_data *d) |
67 | { | 67 | { |
68 | /* the parport is really hw IRQ 1, silly Jensen. */ | 68 | /* the parport is really hw IRQ 1, silly Jensen. */ |
69 | if (irq == 7) | 69 | if (d->irq == 7) |
70 | i8259a_enable_irq(1); | 70 | i8259a_enable_irq(d); |
71 | } | 71 | } |
72 | 72 | ||
73 | static void | 73 | static void |
74 | jensen_local_disable(unsigned int irq) | 74 | jensen_local_disable(struct irq_data *d) |
75 | { | 75 | { |
76 | /* the parport is really hw IRQ 1, silly Jensen. */ | 76 | /* the parport is really hw IRQ 1, silly Jensen. */ |
77 | if (irq == 7) | 77 | if (d->irq == 7) |
78 | i8259a_disable_irq(1); | 78 | i8259a_disable_irq(d); |
79 | } | 79 | } |
80 | 80 | ||
81 | static void | 81 | static void |
82 | jensen_local_mask_ack(unsigned int irq) | 82 | jensen_local_mask_ack(struct irq_data *d) |
83 | { | 83 | { |
84 | /* the parport is really hw IRQ 1, silly Jensen. */ | 84 | /* the parport is really hw IRQ 1, silly Jensen. */ |
85 | if (irq == 7) | 85 | if (d->irq == 7) |
86 | i8259a_mask_and_ack_irq(1); | 86 | i8259a_mask_and_ack_irq(d); |
87 | } | 87 | } |
88 | 88 | ||
89 | static struct irq_chip jensen_local_irq_type = { | 89 | static struct irq_chip jensen_local_irq_type = { |
90 | .name = "LOCAL", | 90 | .name = "LOCAL", |
91 | .unmask = jensen_local_enable, | 91 | .irq_unmask = jensen_local_enable, |
92 | .mask = jensen_local_disable, | 92 | .irq_mask = jensen_local_disable, |
93 | .mask_ack = jensen_local_mask_ack, | 93 | .irq_mask_ack = jensen_local_mask_ack, |
94 | }; | 94 | }; |
95 | 95 | ||
96 | static void | 96 | static void |
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index 2bfc9f1b1ddc..e61910734e41 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c | |||
@@ -104,9 +104,10 @@ io7_get_irq_ctl(unsigned int irq, struct io7 **pio7) | |||
104 | } | 104 | } |
105 | 105 | ||
106 | static void | 106 | static void |
107 | io7_enable_irq(unsigned int irq) | 107 | io7_enable_irq(struct irq_data *d) |
108 | { | 108 | { |
109 | volatile unsigned long *ctl; | 109 | volatile unsigned long *ctl; |
110 | unsigned int irq = d->irq; | ||
110 | struct io7 *io7; | 111 | struct io7 *io7; |
111 | 112 | ||
112 | ctl = io7_get_irq_ctl(irq, &io7); | 113 | ctl = io7_get_irq_ctl(irq, &io7); |
@@ -115,7 +116,7 @@ io7_enable_irq(unsigned int irq) | |||
115 | __func__, irq); | 116 | __func__, irq); |
116 | return; | 117 | return; |
117 | } | 118 | } |
118 | 119 | ||
119 | spin_lock(&io7->irq_lock); | 120 | spin_lock(&io7->irq_lock); |
120 | *ctl |= 1UL << 24; | 121 | *ctl |= 1UL << 24; |
121 | mb(); | 122 | mb(); |
@@ -124,9 +125,10 @@ io7_enable_irq(unsigned int irq) | |||
124 | } | 125 | } |
125 | 126 | ||
126 | static void | 127 | static void |
127 | io7_disable_irq(unsigned int irq) | 128 | io7_disable_irq(struct irq_data *d) |
128 | { | 129 | { |
129 | volatile unsigned long *ctl; | 130 | volatile unsigned long *ctl; |
131 | unsigned int irq = d->irq; | ||
130 | struct io7 *io7; | 132 | struct io7 *io7; |
131 | 133 | ||
132 | ctl = io7_get_irq_ctl(irq, &io7); | 134 | ctl = io7_get_irq_ctl(irq, &io7); |
@@ -135,7 +137,7 @@ io7_disable_irq(unsigned int irq) | |||
135 | __func__, irq); | 137 | __func__, irq); |
136 | return; | 138 | return; |
137 | } | 139 | } |
138 | 140 | ||
139 | spin_lock(&io7->irq_lock); | 141 | spin_lock(&io7->irq_lock); |
140 | *ctl &= ~(1UL << 24); | 142 | *ctl &= ~(1UL << 24); |
141 | mb(); | 143 | mb(); |
@@ -144,35 +146,29 @@ io7_disable_irq(unsigned int irq) | |||
144 | } | 146 | } |
145 | 147 | ||
146 | static void | 148 | static void |
147 | marvel_irq_noop(unsigned int irq) | 149 | marvel_irq_noop(struct irq_data *d) |
148 | { | 150 | { |
149 | return; | 151 | return; |
150 | } | ||
151 | |||
152 | static unsigned int | ||
153 | marvel_irq_noop_return(unsigned int irq) | ||
154 | { | ||
155 | return 0; | ||
156 | } | 152 | } |
157 | 153 | ||
158 | static struct irq_chip marvel_legacy_irq_type = { | 154 | static struct irq_chip marvel_legacy_irq_type = { |
159 | .name = "LEGACY", | 155 | .name = "LEGACY", |
160 | .mask = marvel_irq_noop, | 156 | .irq_mask = marvel_irq_noop, |
161 | .unmask = marvel_irq_noop, | 157 | .irq_unmask = marvel_irq_noop, |
162 | }; | 158 | }; |
163 | 159 | ||
164 | static struct irq_chip io7_lsi_irq_type = { | 160 | static struct irq_chip io7_lsi_irq_type = { |
165 | .name = "LSI", | 161 | .name = "LSI", |
166 | .unmask = io7_enable_irq, | 162 | .irq_unmask = io7_enable_irq, |
167 | .mask = io7_disable_irq, | 163 | .irq_mask = io7_disable_irq, |
168 | .mask_ack = io7_disable_irq, | 164 | .irq_mask_ack = io7_disable_irq, |
169 | }; | 165 | }; |
170 | 166 | ||
171 | static struct irq_chip io7_msi_irq_type = { | 167 | static struct irq_chip io7_msi_irq_type = { |
172 | .name = "MSI", | 168 | .name = "MSI", |
173 | .unmask = io7_enable_irq, | 169 | .irq_unmask = io7_enable_irq, |
174 | .mask = io7_disable_irq, | 170 | .irq_mask = io7_disable_irq, |
175 | .ack = marvel_irq_noop, | 171 | .irq_ack = marvel_irq_noop, |
176 | }; | 172 | }; |
177 | 173 | ||
178 | static void | 174 | static void |
@@ -280,8 +276,8 @@ init_io7_irqs(struct io7 *io7, | |||
280 | 276 | ||
281 | /* Set up the lsi irqs. */ | 277 | /* Set up the lsi irqs. */ |
282 | for (i = 0; i < 128; ++i) { | 278 | for (i = 0; i < 128; ++i) { |
283 | irq_to_desc(base + i)->status |= IRQ_LEVEL; | ||
284 | set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq); | 279 | set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq); |
280 | irq_set_status_flags(i, IRQ_LEVEL); | ||
285 | } | 281 | } |
286 | 282 | ||
287 | /* Disable the implemented irqs in hardware. */ | 283 | /* Disable the implemented irqs in hardware. */ |
@@ -294,8 +290,8 @@ init_io7_irqs(struct io7 *io7, | |||
294 | 290 | ||
295 | /* Set up the msi irqs. */ | 291 | /* Set up the msi irqs. */ |
296 | for (i = 128; i < (128 + 512); ++i) { | 292 | for (i = 128; i < (128 + 512); ++i) { |
297 | irq_to_desc(base + i)->status |= IRQ_LEVEL; | ||
298 | set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq); | 293 | set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq); |
294 | irq_set_status_flags(i, IRQ_LEVEL); | ||
299 | } | 295 | } |
300 | 296 | ||
301 | for (i = 0; i < 16; ++i) | 297 | for (i = 0; i < 16; ++i) |
diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c index bcc1639e8efb..cf7f43dd3147 100644 --- a/arch/alpha/kernel/sys_mikasa.c +++ b/arch/alpha/kernel/sys_mikasa.c | |||
@@ -43,22 +43,22 @@ mikasa_update_irq_hw(int mask) | |||
43 | } | 43 | } |
44 | 44 | ||
45 | static inline void | 45 | static inline void |
46 | mikasa_enable_irq(unsigned int irq) | 46 | mikasa_enable_irq(struct irq_data *d) |
47 | { | 47 | { |
48 | mikasa_update_irq_hw(cached_irq_mask |= 1 << (irq - 16)); | 48 | mikasa_update_irq_hw(cached_irq_mask |= 1 << (d->irq - 16)); |
49 | } | 49 | } |
50 | 50 | ||
51 | static void | 51 | static void |
52 | mikasa_disable_irq(unsigned int irq) | 52 | mikasa_disable_irq(struct irq_data *d) |
53 | { | 53 | { |
54 | mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (irq - 16))); | 54 | mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (d->irq - 16))); |
55 | } | 55 | } |
56 | 56 | ||
57 | static struct irq_chip mikasa_irq_type = { | 57 | static struct irq_chip mikasa_irq_type = { |
58 | .name = "MIKASA", | 58 | .name = "MIKASA", |
59 | .unmask = mikasa_enable_irq, | 59 | .irq_unmask = mikasa_enable_irq, |
60 | .mask = mikasa_disable_irq, | 60 | .irq_mask = mikasa_disable_irq, |
61 | .mask_ack = mikasa_disable_irq, | 61 | .irq_mask_ack = mikasa_disable_irq, |
62 | }; | 62 | }; |
63 | 63 | ||
64 | static void | 64 | static void |
@@ -98,8 +98,8 @@ mikasa_init_irq(void) | |||
98 | mikasa_update_irq_hw(0); | 98 | mikasa_update_irq_hw(0); |
99 | 99 | ||
100 | for (i = 16; i < 32; ++i) { | 100 | for (i = 16; i < 32; ++i) { |
101 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
102 | set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq); | 101 | set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq); |
102 | irq_set_status_flags(i, IRQ_LEVEL); | ||
103 | } | 103 | } |
104 | 104 | ||
105 | init_i8259a_irqs(); | 105 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c index e88f4ae1260e..92bc188e94a9 100644 --- a/arch/alpha/kernel/sys_noritake.c +++ b/arch/alpha/kernel/sys_noritake.c | |||
@@ -48,22 +48,22 @@ noritake_update_irq_hw(int irq, int mask) | |||
48 | } | 48 | } |
49 | 49 | ||
50 | static void | 50 | static void |
51 | noritake_enable_irq(unsigned int irq) | 51 | noritake_enable_irq(struct irq_data *d) |
52 | { | 52 | { |
53 | noritake_update_irq_hw(irq, cached_irq_mask |= 1 << (irq - 16)); | 53 | noritake_update_irq_hw(d->irq, cached_irq_mask |= 1 << (d->irq - 16)); |
54 | } | 54 | } |
55 | 55 | ||
56 | static void | 56 | static void |
57 | noritake_disable_irq(unsigned int irq) | 57 | noritake_disable_irq(struct irq_data *d) |
58 | { | 58 | { |
59 | noritake_update_irq_hw(irq, cached_irq_mask &= ~(1 << (irq - 16))); | 59 | noritake_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << (d->irq - 16))); |
60 | } | 60 | } |
61 | 61 | ||
62 | static struct irq_chip noritake_irq_type = { | 62 | static struct irq_chip noritake_irq_type = { |
63 | .name = "NORITAKE", | 63 | .name = "NORITAKE", |
64 | .unmask = noritake_enable_irq, | 64 | .irq_unmask = noritake_enable_irq, |
65 | .mask = noritake_disable_irq, | 65 | .irq_mask = noritake_disable_irq, |
66 | .mask_ack = noritake_disable_irq, | 66 | .irq_mask_ack = noritake_disable_irq, |
67 | }; | 67 | }; |
68 | 68 | ||
69 | static void | 69 | static void |
@@ -127,8 +127,8 @@ noritake_init_irq(void) | |||
127 | outw(0, 0x54c); | 127 | outw(0, 0x54c); |
128 | 128 | ||
129 | for (i = 16; i < 48; ++i) { | 129 | for (i = 16; i < 48; ++i) { |
130 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
131 | set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq); | 130 | set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq); |
131 | irq_set_status_flags(i, IRQ_LEVEL); | ||
132 | } | 132 | } |
133 | 133 | ||
134 | init_i8259a_irqs(); | 134 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c index 6a51364dd1cc..936d4140ed5f 100644 --- a/arch/alpha/kernel/sys_rawhide.c +++ b/arch/alpha/kernel/sys_rawhide.c | |||
@@ -56,9 +56,10 @@ rawhide_update_irq_hw(int hose, int mask) | |||
56 | (((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0)) | 56 | (((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0)) |
57 | 57 | ||
58 | static inline void | 58 | static inline void |
59 | rawhide_enable_irq(unsigned int irq) | 59 | rawhide_enable_irq(struct irq_data *d) |
60 | { | 60 | { |
61 | unsigned int mask, hose; | 61 | unsigned int mask, hose; |
62 | unsigned int irq = d->irq; | ||
62 | 63 | ||
63 | irq -= 16; | 64 | irq -= 16; |
64 | hose = irq / 24; | 65 | hose = irq / 24; |
@@ -76,9 +77,10 @@ rawhide_enable_irq(unsigned int irq) | |||
76 | } | 77 | } |
77 | 78 | ||
78 | static void | 79 | static void |
79 | rawhide_disable_irq(unsigned int irq) | 80 | rawhide_disable_irq(struct irq_data *d) |
80 | { | 81 | { |
81 | unsigned int mask, hose; | 82 | unsigned int mask, hose; |
83 | unsigned int irq = d->irq; | ||
82 | 84 | ||
83 | irq -= 16; | 85 | irq -= 16; |
84 | hose = irq / 24; | 86 | hose = irq / 24; |
@@ -96,9 +98,10 @@ rawhide_disable_irq(unsigned int irq) | |||
96 | } | 98 | } |
97 | 99 | ||
98 | static void | 100 | static void |
99 | rawhide_mask_and_ack_irq(unsigned int irq) | 101 | rawhide_mask_and_ack_irq(struct irq_data *d) |
100 | { | 102 | { |
101 | unsigned int mask, mask1, hose; | 103 | unsigned int mask, mask1, hose; |
104 | unsigned int irq = d->irq; | ||
102 | 105 | ||
103 | irq -= 16; | 106 | irq -= 16; |
104 | hose = irq / 24; | 107 | hose = irq / 24; |
@@ -123,9 +126,9 @@ rawhide_mask_and_ack_irq(unsigned int irq) | |||
123 | 126 | ||
124 | static struct irq_chip rawhide_irq_type = { | 127 | static struct irq_chip rawhide_irq_type = { |
125 | .name = "RAWHIDE", | 128 | .name = "RAWHIDE", |
126 | .unmask = rawhide_enable_irq, | 129 | .irq_unmask = rawhide_enable_irq, |
127 | .mask = rawhide_disable_irq, | 130 | .irq_mask = rawhide_disable_irq, |
128 | .mask_ack = rawhide_mask_and_ack_irq, | 131 | .irq_mask_ack = rawhide_mask_and_ack_irq, |
129 | }; | 132 | }; |
130 | 133 | ||
131 | static void | 134 | static void |
@@ -177,8 +180,8 @@ rawhide_init_irq(void) | |||
177 | } | 180 | } |
178 | 181 | ||
179 | for (i = 16; i < 128; ++i) { | 182 | for (i = 16; i < 128; ++i) { |
180 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
181 | set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq); | 183 | set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq); |
184 | irq_set_status_flags(i, IRQ_LEVEL); | ||
182 | } | 185 | } |
183 | 186 | ||
184 | init_i8259a_irqs(); | 187 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c index 89e7e37ec84c..cea22a62913b 100644 --- a/arch/alpha/kernel/sys_rx164.c +++ b/arch/alpha/kernel/sys_rx164.c | |||
@@ -47,22 +47,22 @@ rx164_update_irq_hw(unsigned long mask) | |||
47 | } | 47 | } |
48 | 48 | ||
49 | static inline void | 49 | static inline void |
50 | rx164_enable_irq(unsigned int irq) | 50 | rx164_enable_irq(struct irq_data *d) |
51 | { | 51 | { |
52 | rx164_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16)); | 52 | rx164_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); |
53 | } | 53 | } |
54 | 54 | ||
55 | static void | 55 | static void |
56 | rx164_disable_irq(unsigned int irq) | 56 | rx164_disable_irq(struct irq_data *d) |
57 | { | 57 | { |
58 | rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); | 58 | rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); |
59 | } | 59 | } |
60 | 60 | ||
61 | static struct irq_chip rx164_irq_type = { | 61 | static struct irq_chip rx164_irq_type = { |
62 | .name = "RX164", | 62 | .name = "RX164", |
63 | .unmask = rx164_enable_irq, | 63 | .irq_unmask = rx164_enable_irq, |
64 | .mask = rx164_disable_irq, | 64 | .irq_mask = rx164_disable_irq, |
65 | .mask_ack = rx164_disable_irq, | 65 | .irq_mask_ack = rx164_disable_irq, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | static void | 68 | static void |
@@ -99,8 +99,8 @@ rx164_init_irq(void) | |||
99 | 99 | ||
100 | rx164_update_irq_hw(0); | 100 | rx164_update_irq_hw(0); |
101 | for (i = 16; i < 40; ++i) { | 101 | for (i = 16; i < 40; ++i) { |
102 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
103 | set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq); | 102 | set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq); |
103 | irq_set_status_flags(i, IRQ_LEVEL); | ||
104 | } | 104 | } |
105 | 105 | ||
106 | init_i8259a_irqs(); | 106 | init_i8259a_irqs(); |
diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c index 5c4423d1b06c..a349538aabc9 100644 --- a/arch/alpha/kernel/sys_sable.c +++ b/arch/alpha/kernel/sys_sable.c | |||
@@ -443,11 +443,11 @@ lynx_swizzle(struct pci_dev *dev, u8 *pinp) | |||
443 | /* GENERIC irq routines */ | 443 | /* GENERIC irq routines */ |
444 | 444 | ||
445 | static inline void | 445 | static inline void |
446 | sable_lynx_enable_irq(unsigned int irq) | 446 | sable_lynx_enable_irq(struct irq_data *d) |
447 | { | 447 | { |
448 | unsigned long bit, mask; | 448 | unsigned long bit, mask; |
449 | 449 | ||
450 | bit = sable_lynx_irq_swizzle->irq_to_mask[irq]; | 450 | bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; |
451 | spin_lock(&sable_lynx_irq_lock); | 451 | spin_lock(&sable_lynx_irq_lock); |
452 | mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit); | 452 | mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit); |
453 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); | 453 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); |
@@ -459,11 +459,11 @@ sable_lynx_enable_irq(unsigned int irq) | |||
459 | } | 459 | } |
460 | 460 | ||
461 | static void | 461 | static void |
462 | sable_lynx_disable_irq(unsigned int irq) | 462 | sable_lynx_disable_irq(struct irq_data *d) |
463 | { | 463 | { |
464 | unsigned long bit, mask; | 464 | unsigned long bit, mask; |
465 | 465 | ||
466 | bit = sable_lynx_irq_swizzle->irq_to_mask[irq]; | 466 | bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; |
467 | spin_lock(&sable_lynx_irq_lock); | 467 | spin_lock(&sable_lynx_irq_lock); |
468 | mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; | 468 | mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; |
469 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); | 469 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); |
@@ -475,11 +475,11 @@ sable_lynx_disable_irq(unsigned int irq) | |||
475 | } | 475 | } |
476 | 476 | ||
477 | static void | 477 | static void |
478 | sable_lynx_mask_and_ack_irq(unsigned int irq) | 478 | sable_lynx_mask_and_ack_irq(struct irq_data *d) |
479 | { | 479 | { |
480 | unsigned long bit, mask; | 480 | unsigned long bit, mask; |
481 | 481 | ||
482 | bit = sable_lynx_irq_swizzle->irq_to_mask[irq]; | 482 | bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; |
483 | spin_lock(&sable_lynx_irq_lock); | 483 | spin_lock(&sable_lynx_irq_lock); |
484 | mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; | 484 | mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; |
485 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); | 485 | sable_lynx_irq_swizzle->update_irq_hw(bit, mask); |
@@ -489,9 +489,9 @@ sable_lynx_mask_and_ack_irq(unsigned int irq) | |||
489 | 489 | ||
490 | static struct irq_chip sable_lynx_irq_type = { | 490 | static struct irq_chip sable_lynx_irq_type = { |
491 | .name = "SABLE/LYNX", | 491 | .name = "SABLE/LYNX", |
492 | .unmask = sable_lynx_enable_irq, | 492 | .irq_unmask = sable_lynx_enable_irq, |
493 | .mask = sable_lynx_disable_irq, | 493 | .irq_mask = sable_lynx_disable_irq, |
494 | .mask_ack = sable_lynx_mask_and_ack_irq, | 494 | .irq_mask_ack = sable_lynx_mask_and_ack_irq, |
495 | }; | 495 | }; |
496 | 496 | ||
497 | static void | 497 | static void |
@@ -518,9 +518,9 @@ sable_lynx_init_irq(int nr_of_irqs) | |||
518 | long i; | 518 | long i; |
519 | 519 | ||
520 | for (i = 0; i < nr_of_irqs; ++i) { | 520 | for (i = 0; i < nr_of_irqs; ++i) { |
521 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
522 | set_irq_chip_and_handler(i, &sable_lynx_irq_type, | 521 | set_irq_chip_and_handler(i, &sable_lynx_irq_type, |
523 | handle_level_irq); | 522 | handle_level_irq); |
523 | irq_set_status_flags(i, IRQ_LEVEL); | ||
524 | } | 524 | } |
525 | 525 | ||
526 | common_init_isa_dma(); | 526 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c index f8a1e8a862fb..42a5331f13c4 100644 --- a/arch/alpha/kernel/sys_takara.c +++ b/arch/alpha/kernel/sys_takara.c | |||
@@ -45,16 +45,18 @@ takara_update_irq_hw(unsigned long irq, unsigned long mask) | |||
45 | } | 45 | } |
46 | 46 | ||
47 | static inline void | 47 | static inline void |
48 | takara_enable_irq(unsigned int irq) | 48 | takara_enable_irq(struct irq_data *d) |
49 | { | 49 | { |
50 | unsigned int irq = d->irq; | ||
50 | unsigned long mask; | 51 | unsigned long mask; |
51 | mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); | 52 | mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); |
52 | takara_update_irq_hw(irq, mask); | 53 | takara_update_irq_hw(irq, mask); |
53 | } | 54 | } |
54 | 55 | ||
55 | static void | 56 | static void |
56 | takara_disable_irq(unsigned int irq) | 57 | takara_disable_irq(struct irq_data *d) |
57 | { | 58 | { |
59 | unsigned int irq = d->irq; | ||
58 | unsigned long mask; | 60 | unsigned long mask; |
59 | mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); | 61 | mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); |
60 | takara_update_irq_hw(irq, mask); | 62 | takara_update_irq_hw(irq, mask); |
@@ -62,9 +64,9 @@ takara_disable_irq(unsigned int irq) | |||
62 | 64 | ||
63 | static struct irq_chip takara_irq_type = { | 65 | static struct irq_chip takara_irq_type = { |
64 | .name = "TAKARA", | 66 | .name = "TAKARA", |
65 | .unmask = takara_enable_irq, | 67 | .irq_unmask = takara_enable_irq, |
66 | .mask = takara_disable_irq, | 68 | .irq_mask = takara_disable_irq, |
67 | .mask_ack = takara_disable_irq, | 69 | .irq_mask_ack = takara_disable_irq, |
68 | }; | 70 | }; |
69 | 71 | ||
70 | static void | 72 | static void |
@@ -136,8 +138,8 @@ takara_init_irq(void) | |||
136 | takara_update_irq_hw(i, -1); | 138 | takara_update_irq_hw(i, -1); |
137 | 139 | ||
138 | for (i = 16; i < 128; ++i) { | 140 | for (i = 16; i < 128; ++i) { |
139 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
140 | set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq); | 141 | set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq); |
142 | irq_set_status_flags(i, IRQ_LEVEL); | ||
141 | } | 143 | } |
142 | 144 | ||
143 | common_init_isa_dma(); | 145 | common_init_isa_dma(); |
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index e02494bf5ef3..8c13a0c77830 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c | |||
@@ -112,8 +112,9 @@ titan_update_irq_hw(unsigned long mask) | |||
112 | } | 112 | } |
113 | 113 | ||
114 | static inline void | 114 | static inline void |
115 | titan_enable_irq(unsigned int irq) | 115 | titan_enable_irq(struct irq_data *d) |
116 | { | 116 | { |
117 | unsigned int irq = d->irq; | ||
117 | spin_lock(&titan_irq_lock); | 118 | spin_lock(&titan_irq_lock); |
118 | titan_cached_irq_mask |= 1UL << (irq - 16); | 119 | titan_cached_irq_mask |= 1UL << (irq - 16); |
119 | titan_update_irq_hw(titan_cached_irq_mask); | 120 | titan_update_irq_hw(titan_cached_irq_mask); |
@@ -121,8 +122,9 @@ titan_enable_irq(unsigned int irq) | |||
121 | } | 122 | } |
122 | 123 | ||
123 | static inline void | 124 | static inline void |
124 | titan_disable_irq(unsigned int irq) | 125 | titan_disable_irq(struct irq_data *d) |
125 | { | 126 | { |
127 | unsigned int irq = d->irq; | ||
126 | spin_lock(&titan_irq_lock); | 128 | spin_lock(&titan_irq_lock); |
127 | titan_cached_irq_mask &= ~(1UL << (irq - 16)); | 129 | titan_cached_irq_mask &= ~(1UL << (irq - 16)); |
128 | titan_update_irq_hw(titan_cached_irq_mask); | 130 | titan_update_irq_hw(titan_cached_irq_mask); |
@@ -144,8 +146,10 @@ titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) | |||
144 | } | 146 | } |
145 | 147 | ||
146 | static int | 148 | static int |
147 | titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | 149 | titan_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, |
150 | bool force) | ||
148 | { | 151 | { |
152 | unsigned int irq = d->irq; | ||
149 | spin_lock(&titan_irq_lock); | 153 | spin_lock(&titan_irq_lock); |
150 | titan_cpu_set_irq_affinity(irq - 16, *affinity); | 154 | titan_cpu_set_irq_affinity(irq - 16, *affinity); |
151 | titan_update_irq_hw(titan_cached_irq_mask); | 155 | titan_update_irq_hw(titan_cached_irq_mask); |
@@ -175,17 +179,17 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax) | |||
175 | { | 179 | { |
176 | long i; | 180 | long i; |
177 | for (i = imin; i <= imax; ++i) { | 181 | for (i = imin; i <= imax; ++i) { |
178 | irq_to_desc(i)->status |= IRQ_LEVEL; | ||
179 | set_irq_chip_and_handler(i, ops, handle_level_irq); | 182 | set_irq_chip_and_handler(i, ops, handle_level_irq); |
183 | irq_set_status_flags(i, IRQ_LEVEL); | ||
180 | } | 184 | } |
181 | } | 185 | } |
182 | 186 | ||
183 | static struct irq_chip titan_irq_type = { | 187 | static struct irq_chip titan_irq_type = { |
184 | .name = "TITAN", | 188 | .name = "TITAN", |
185 | .unmask = titan_enable_irq, | 189 | .irq_unmask = titan_enable_irq, |
186 | .mask = titan_disable_irq, | 190 | .irq_mask = titan_disable_irq, |
187 | .mask_ack = titan_disable_irq, | 191 | .irq_mask_ack = titan_disable_irq, |
188 | .set_affinity = titan_set_irq_affinity, | 192 | .irq_set_affinity = titan_set_irq_affinity, |
189 | }; | 193 | }; |
190 | 194 | ||
191 | static irqreturn_t | 195 | static irqreturn_t |
diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c index eec52594d410..ca60a387ef0a 100644 --- a/arch/alpha/kernel/sys_wildfire.c +++ b/arch/alpha/kernel/sys_wildfire.c | |||
@@ -104,10 +104,12 @@ wildfire_init_irq_hw(void) | |||
104 | } | 104 | } |
105 | 105 | ||
106 | static void | 106 | static void |
107 | wildfire_enable_irq(unsigned int irq) | 107 | wildfire_enable_irq(struct irq_data *d) |
108 | { | 108 | { |
109 | unsigned int irq = d->irq; | ||
110 | |||
109 | if (irq < 16) | 111 | if (irq < 16) |
110 | i8259a_enable_irq(irq); | 112 | i8259a_enable_irq(d); |
111 | 113 | ||
112 | spin_lock(&wildfire_irq_lock); | 114 | spin_lock(&wildfire_irq_lock); |
113 | set_bit(irq, &cached_irq_mask); | 115 | set_bit(irq, &cached_irq_mask); |
@@ -116,10 +118,12 @@ wildfire_enable_irq(unsigned int irq) | |||
116 | } | 118 | } |
117 | 119 | ||
118 | static void | 120 | static void |
119 | wildfire_disable_irq(unsigned int irq) | 121 | wildfire_disable_irq(struct irq_data *d) |
120 | { | 122 | { |
123 | unsigned int irq = d->irq; | ||
124 | |||
121 | if (irq < 16) | 125 | if (irq < 16) |
122 | i8259a_disable_irq(irq); | 126 | i8259a_disable_irq(d); |
123 | 127 | ||
124 | spin_lock(&wildfire_irq_lock); | 128 | spin_lock(&wildfire_irq_lock); |
125 | clear_bit(irq, &cached_irq_mask); | 129 | clear_bit(irq, &cached_irq_mask); |
@@ -128,10 +132,12 @@ wildfire_disable_irq(unsigned int irq) | |||
128 | } | 132 | } |
129 | 133 | ||
130 | static void | 134 | static void |
131 | wildfire_mask_and_ack_irq(unsigned int irq) | 135 | wildfire_mask_and_ack_irq(struct irq_data *d) |
132 | { | 136 | { |
137 | unsigned int irq = d->irq; | ||
138 | |||
133 | if (irq < 16) | 139 | if (irq < 16) |
134 | i8259a_mask_and_ack_irq(irq); | 140 | i8259a_mask_and_ack_irq(d); |
135 | 141 | ||
136 | spin_lock(&wildfire_irq_lock); | 142 | spin_lock(&wildfire_irq_lock); |
137 | clear_bit(irq, &cached_irq_mask); | 143 | clear_bit(irq, &cached_irq_mask); |
@@ -141,9 +147,9 @@ wildfire_mask_and_ack_irq(unsigned int irq) | |||
141 | 147 | ||
142 | static struct irq_chip wildfire_irq_type = { | 148 | static struct irq_chip wildfire_irq_type = { |
143 | .name = "WILDFIRE", | 149 | .name = "WILDFIRE", |
144 | .unmask = wildfire_enable_irq, | 150 | .irq_unmask = wildfire_enable_irq, |
145 | .mask = wildfire_disable_irq, | 151 | .irq_mask = wildfire_disable_irq, |
146 | .mask_ack = wildfire_mask_and_ack_irq, | 152 | .irq_mask_ack = wildfire_mask_and_ack_irq, |
147 | }; | 153 | }; |
148 | 154 | ||
149 | static void __init | 155 | static void __init |
@@ -177,21 +183,21 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) | |||
177 | for (i = 0; i < 16; ++i) { | 183 | for (i = 0; i < 16; ++i) { |
178 | if (i == 2) | 184 | if (i == 2) |
179 | continue; | 185 | continue; |
180 | irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL; | ||
181 | set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, | 186 | set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, |
182 | handle_level_irq); | 187 | handle_level_irq); |
188 | irq_set_status_flags(i + irq_bias, IRQ_LEVEL); | ||
183 | } | 189 | } |
184 | 190 | ||
185 | irq_to_desc(36+irq_bias)->status |= IRQ_LEVEL; | ||
186 | set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, | 191 | set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, |
187 | handle_level_irq); | 192 | handle_level_irq); |
193 | irq_set_status_flags(36 + irq_bias, IRQ_LEVEL); | ||
188 | for (i = 40; i < 64; ++i) { | 194 | for (i = 40; i < 64; ++i) { |
189 | irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL; | ||
190 | set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, | 195 | set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, |
191 | handle_level_irq); | 196 | handle_level_irq); |
197 | irq_set_status_flags(i + irq_bias, IRQ_LEVEL); | ||
192 | } | 198 | } |
193 | 199 | ||
194 | setup_irq(32+irq_bias, &isa_enable); | 200 | setup_irq(32+irq_bias, &isa_enable); |
195 | } | 201 | } |
196 | 202 | ||
197 | static void __init | 203 | static void __init |
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 778655f0257a..ea5ee4d067f3 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig | |||
@@ -6,6 +6,8 @@ config ARM_VIC | |||
6 | 6 | ||
7 | config ARM_VIC_NR | 7 | config ARM_VIC_NR |
8 | int | 8 | int |
9 | default 4 if ARCH_S5PV210 | ||
10 | default 3 if ARCH_S5P6442 || ARCH_S5PC100 | ||
9 | default 2 | 11 | default 2 |
10 | depends on ARM_VIC | 12 | depends on ARM_VIC |
11 | help | 13 | help |
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index 3a0893a76a3b..bf13b814c1b8 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h | |||
@@ -15,10 +15,6 @@ struct meminfo; | |||
15 | struct sys_timer; | 15 | struct sys_timer; |
16 | 16 | ||
17 | struct machine_desc { | 17 | struct machine_desc { |
18 | /* | ||
19 | * Note! The first two elements are used | ||
20 | * by assembler code in head.S, head-common.S | ||
21 | */ | ||
22 | unsigned int nr; /* architecture number */ | 18 | unsigned int nr; /* architecture number */ |
23 | const char *name; /* architecture name */ | 19 | const char *name; /* architecture name */ |
24 | unsigned long boot_params; /* tagged list */ | 20 | unsigned long boot_params; /* tagged list */ |
diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h index 9763be04f77e..22de005f159c 100644 --- a/arch/arm/include/asm/pgalloc.h +++ b/arch/arm/include/asm/pgalloc.h | |||
@@ -10,6 +10,8 @@ | |||
10 | #ifndef _ASMARM_PGALLOC_H | 10 | #ifndef _ASMARM_PGALLOC_H |
11 | #define _ASMARM_PGALLOC_H | 11 | #define _ASMARM_PGALLOC_H |
12 | 12 | ||
13 | #include <linux/pagemap.h> | ||
14 | |||
13 | #include <asm/domain.h> | 15 | #include <asm/domain.h> |
14 | #include <asm/pgtable-hwdef.h> | 16 | #include <asm/pgtable-hwdef.h> |
15 | #include <asm/processor.h> | 17 | #include <asm/processor.h> |
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index d600bd350704..44b84fe6e1b0 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c | |||
@@ -836,9 +836,11 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, | |||
836 | /* | 836 | /* |
837 | * One-time initialisation. | 837 | * One-time initialisation. |
838 | */ | 838 | */ |
839 | static void reset_ctrl_regs(void *unused) | 839 | static void reset_ctrl_regs(void *info) |
840 | { | 840 | { |
841 | int i; | 841 | int i, cpu = smp_processor_id(); |
842 | u32 dbg_power; | ||
843 | cpumask_t *cpumask = info; | ||
842 | 844 | ||
843 | /* | 845 | /* |
844 | * v7 debug contains save and restore registers so that debug state | 846 | * v7 debug contains save and restore registers so that debug state |
@@ -850,6 +852,17 @@ static void reset_ctrl_regs(void *unused) | |||
850 | */ | 852 | */ |
851 | if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { | 853 | if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) { |
852 | /* | 854 | /* |
855 | * Ensure sticky power-down is clear (i.e. debug logic is | ||
856 | * powered up). | ||
857 | */ | ||
858 | asm volatile("mrc p14, 0, %0, c1, c5, 4" : "=r" (dbg_power)); | ||
859 | if ((dbg_power & 0x1) == 0) { | ||
860 | pr_warning("CPU %d debug is powered down!\n", cpu); | ||
861 | cpumask_or(cpumask, cpumask, cpumask_of(cpu)); | ||
862 | return; | ||
863 | } | ||
864 | |||
865 | /* | ||
853 | * Unconditionally clear the lock by writing a value | 866 | * Unconditionally clear the lock by writing a value |
854 | * other than 0xC5ACCE55 to the access register. | 867 | * other than 0xC5ACCE55 to the access register. |
855 | */ | 868 | */ |
@@ -887,6 +900,7 @@ static struct notifier_block __cpuinitdata dbg_reset_nb = { | |||
887 | static int __init arch_hw_breakpoint_init(void) | 900 | static int __init arch_hw_breakpoint_init(void) |
888 | { | 901 | { |
889 | u32 dscr; | 902 | u32 dscr; |
903 | cpumask_t cpumask = { CPU_BITS_NONE }; | ||
890 | 904 | ||
891 | debug_arch = get_debug_arch(); | 905 | debug_arch = get_debug_arch(); |
892 | 906 | ||
@@ -911,7 +925,13 @@ static int __init arch_hw_breakpoint_init(void) | |||
911 | * Reset the breakpoint resources. We assume that a halting | 925 | * Reset the breakpoint resources. We assume that a halting |
912 | * debugger will leave the world in a nice state for us. | 926 | * debugger will leave the world in a nice state for us. |
913 | */ | 927 | */ |
914 | on_each_cpu(reset_ctrl_regs, NULL, 1); | 928 | on_each_cpu(reset_ctrl_regs, &cpumask, 1); |
929 | if (!cpumask_empty(&cpumask)) { | ||
930 | core_num_brps = 0; | ||
931 | core_num_reserved_brps = 0; | ||
932 | core_num_wrps = 0; | ||
933 | return 0; | ||
934 | } | ||
915 | 935 | ||
916 | ARM_DBG_READ(c1, 0, dscr); | 936 | ARM_DBG_READ(c1, 0, dscr); |
917 | if (dscr & ARM_DSCR_HDBGEN) { | 937 | if (dscr & ARM_DSCR_HDBGEN) { |
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 19c6816db61e..b13e70f63d71 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c | |||
@@ -996,10 +996,10 @@ static int ptrace_gethbpregs(struct task_struct *tsk, long num, | |||
996 | while (!(arch_ctrl.len & 0x1)) | 996 | while (!(arch_ctrl.len & 0x1)) |
997 | arch_ctrl.len >>= 1; | 997 | arch_ctrl.len >>= 1; |
998 | 998 | ||
999 | if (idx & 0x1) | 999 | if (num & 0x1) |
1000 | reg = encode_ctrl_reg(arch_ctrl); | ||
1001 | else | ||
1002 | reg = bp->attr.bp_addr; | 1000 | reg = bp->attr.bp_addr; |
1001 | else | ||
1002 | reg = encode_ctrl_reg(arch_ctrl); | ||
1003 | } | 1003 | } |
1004 | 1004 | ||
1005 | put: | 1005 | put: |
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c index 343de73161fa..4a68c2b1ec11 100644 --- a/arch/arm/mach-davinci/cpufreq.c +++ b/arch/arm/mach-davinci/cpufreq.c | |||
@@ -132,7 +132,7 @@ out: | |||
132 | return ret; | 132 | return ret; |
133 | } | 133 | } |
134 | 134 | ||
135 | static int __init davinci_cpu_init(struct cpufreq_policy *policy) | 135 | static int davinci_cpu_init(struct cpufreq_policy *policy) |
136 | { | 136 | { |
137 | int result = 0; | 137 | int result = 0; |
138 | struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data; | 138 | struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data; |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 9eec63070e0c..beda8a4133a0 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -480,8 +480,15 @@ static struct platform_device da850_mcasp_device = { | |||
480 | .resource = da850_mcasp_resources, | 480 | .resource = da850_mcasp_resources, |
481 | }; | 481 | }; |
482 | 482 | ||
483 | struct platform_device davinci_pcm_device = { | ||
484 | .name = "davinci-pcm-audio", | ||
485 | .id = -1, | ||
486 | }; | ||
487 | |||
483 | void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) | 488 | void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) |
484 | { | 489 | { |
490 | platform_device_register(&davinci_pcm_device); | ||
491 | |||
485 | /* DA830/OMAP-L137 has 3 instances of McASP */ | 492 | /* DA830/OMAP-L137 has 3 instances of McASP */ |
486 | if (cpu_is_davinci_da830() && id == 1) { | 493 | if (cpu_is_davinci_da830() && id == 1) { |
487 | da830_mcasp1_device.dev.platform_data = pdata; | 494 | da830_mcasp1_device.dev.platform_data = pdata; |
diff --git a/arch/arm/mach-davinci/gpio-tnetv107x.c b/arch/arm/mach-davinci/gpio-tnetv107x.c index d10298620e2c..3fa3e2867e19 100644 --- a/arch/arm/mach-davinci/gpio-tnetv107x.c +++ b/arch/arm/mach-davinci/gpio-tnetv107x.c | |||
@@ -58,7 +58,7 @@ static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset) | |||
58 | 58 | ||
59 | spin_lock_irqsave(&ctlr->lock, flags); | 59 | spin_lock_irqsave(&ctlr->lock, flags); |
60 | 60 | ||
61 | gpio_reg_set_bit(®s->enable, gpio); | 61 | gpio_reg_set_bit(regs->enable, gpio); |
62 | 62 | ||
63 | spin_unlock_irqrestore(&ctlr->lock, flags); | 63 | spin_unlock_irqrestore(&ctlr->lock, flags); |
64 | 64 | ||
@@ -74,7 +74,7 @@ static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
74 | 74 | ||
75 | spin_lock_irqsave(&ctlr->lock, flags); | 75 | spin_lock_irqsave(&ctlr->lock, flags); |
76 | 76 | ||
77 | gpio_reg_clear_bit(®s->enable, gpio); | 77 | gpio_reg_clear_bit(regs->enable, gpio); |
78 | 78 | ||
79 | spin_unlock_irqrestore(&ctlr->lock, flags); | 79 | spin_unlock_irqrestore(&ctlr->lock, flags); |
80 | } | 80 | } |
@@ -88,7 +88,7 @@ static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset) | |||
88 | 88 | ||
89 | spin_lock_irqsave(&ctlr->lock, flags); | 89 | spin_lock_irqsave(&ctlr->lock, flags); |
90 | 90 | ||
91 | gpio_reg_set_bit(®s->direction, gpio); | 91 | gpio_reg_set_bit(regs->direction, gpio); |
92 | 92 | ||
93 | spin_unlock_irqrestore(&ctlr->lock, flags); | 93 | spin_unlock_irqrestore(&ctlr->lock, flags); |
94 | 94 | ||
@@ -106,11 +106,11 @@ static int tnetv107x_gpio_dir_out(struct gpio_chip *chip, | |||
106 | spin_lock_irqsave(&ctlr->lock, flags); | 106 | spin_lock_irqsave(&ctlr->lock, flags); |
107 | 107 | ||
108 | if (value) | 108 | if (value) |
109 | gpio_reg_set_bit(®s->data_out, gpio); | 109 | gpio_reg_set_bit(regs->data_out, gpio); |
110 | else | 110 | else |
111 | gpio_reg_clear_bit(®s->data_out, gpio); | 111 | gpio_reg_clear_bit(regs->data_out, gpio); |
112 | 112 | ||
113 | gpio_reg_clear_bit(®s->direction, gpio); | 113 | gpio_reg_clear_bit(regs->direction, gpio); |
114 | 114 | ||
115 | spin_unlock_irqrestore(&ctlr->lock, flags); | 115 | spin_unlock_irqrestore(&ctlr->lock, flags); |
116 | 116 | ||
@@ -124,7 +124,7 @@ static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
124 | unsigned gpio = chip->base + offset; | 124 | unsigned gpio = chip->base + offset; |
125 | int ret; | 125 | int ret; |
126 | 126 | ||
127 | ret = gpio_reg_get_bit(®s->data_in, gpio); | 127 | ret = gpio_reg_get_bit(regs->data_in, gpio); |
128 | 128 | ||
129 | return ret ? 1 : 0; | 129 | return ret ? 1 : 0; |
130 | } | 130 | } |
@@ -140,9 +140,9 @@ static void tnetv107x_gpio_set(struct gpio_chip *chip, | |||
140 | spin_lock_irqsave(&ctlr->lock, flags); | 140 | spin_lock_irqsave(&ctlr->lock, flags); |
141 | 141 | ||
142 | if (value) | 142 | if (value) |
143 | gpio_reg_set_bit(®s->data_out, gpio); | 143 | gpio_reg_set_bit(regs->data_out, gpio); |
144 | else | 144 | else |
145 | gpio_reg_clear_bit(®s->data_out, gpio); | 145 | gpio_reg_clear_bit(regs->data_out, gpio); |
146 | 146 | ||
147 | spin_unlock_irqrestore(&ctlr->lock, flags); | 147 | spin_unlock_irqrestore(&ctlr->lock, flags); |
148 | } | 148 | } |
diff --git a/arch/arm/mach-davinci/include/mach/clkdev.h b/arch/arm/mach-davinci/include/mach/clkdev.h index 730c49d1ebd8..14a504887189 100644 --- a/arch/arm/mach-davinci/include/mach/clkdev.h +++ b/arch/arm/mach-davinci/include/mach/clkdev.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef __MACH_CLKDEV_H | 1 | #ifndef __MACH_CLKDEV_H |
2 | #define __MACH_CLKDEV_H | 2 | #define __MACH_CLKDEV_H |
3 | 3 | ||
4 | struct clk; | ||
5 | |||
4 | static inline int __clk_get(struct clk *clk) | 6 | static inline int __clk_get(struct clk *clk) |
5 | { | 7 | { |
6 | return 1; | 8 | return 1; |
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index 337392c3f549..acb7ae5b0a25 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c | |||
@@ -77,7 +77,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n) | |||
77 | dd = clk->dpll_data; | 77 | dd = clk->dpll_data; |
78 | 78 | ||
79 | /* DPLL divider must result in a valid jitter correction val */ | 79 | /* DPLL divider must result in a valid jitter correction val */ |
80 | fint = clk->parent->rate / (n + 1); | 80 | fint = clk->parent->rate / n; |
81 | if (fint < DPLL_FINT_BAND1_MIN) { | 81 | if (fint < DPLL_FINT_BAND1_MIN) { |
82 | 82 | ||
83 | pr_debug("rejecting n=%d due to Fint failure, " | 83 | pr_debug("rejecting n=%d due to Fint failure, " |
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 394413dc7deb..24b88504df0f 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
@@ -193,10 +193,12 @@ static void omap2_mbox_disable_irq(struct omap_mbox *mbox, | |||
193 | omap_mbox_type_t irq) | 193 | omap_mbox_type_t irq) |
194 | { | 194 | { |
195 | struct omap_mbox2_priv *p = mbox->priv; | 195 | struct omap_mbox2_priv *p = mbox->priv; |
196 | u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; | 196 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
197 | l = mbox_read_reg(p->irqdisable); | 197 | |
198 | l &= ~bit; | 198 | if (!cpu_is_omap44xx()) |
199 | mbox_write_reg(l, p->irqdisable); | 199 | bit = mbox_read_reg(p->irqdisable) & ~bit; |
200 | |||
201 | mbox_write_reg(bit, p->irqdisable); | ||
200 | } | 202 | } |
201 | 203 | ||
202 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, | 204 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, |
@@ -334,7 +336,7 @@ static struct omap_mbox mbox_iva_info = { | |||
334 | .priv = &omap2_mbox_iva_priv, | 336 | .priv = &omap2_mbox_iva_priv, |
335 | }; | 337 | }; |
336 | 338 | ||
337 | struct omap_mbox *omap2_mboxes[] = { &mbox_iva_info, &mbox_dsp_info, NULL }; | 339 | struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL }; |
338 | #endif | 340 | #endif |
339 | 341 | ||
340 | #if defined(CONFIG_ARCH_OMAP4) | 342 | #if defined(CONFIG_ARCH_OMAP4) |
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 98148b6c36e9..6c84659cf846 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c | |||
@@ -605,7 +605,7 @@ static void __init omap_mux_dbg_create_entry( | |||
605 | list_for_each_entry(e, &partition->muxmodes, node) { | 605 | list_for_each_entry(e, &partition->muxmodes, node) { |
606 | struct omap_mux *m = &e->mux; | 606 | struct omap_mux *m = &e->mux; |
607 | 607 | ||
608 | (void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir, | 608 | (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir, |
609 | m, &omap_mux_dbg_signal_fops); | 609 | m, &omap_mux_dbg_signal_fops); |
610 | } | 610 | } |
611 | } | 611 | } |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 125f56591fb5..a5a83b358ddd 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -637,14 +637,14 @@ static int __init pm_dbg_init(void) | |||
637 | 637 | ||
638 | } | 638 | } |
639 | 639 | ||
640 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUGO, d, | 640 | (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d, |
641 | &enable_off_mode, &pm_dbg_option_fops); | 641 | &enable_off_mode, &pm_dbg_option_fops); |
642 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d, | 642 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, |
643 | &sleep_while_idle, &pm_dbg_option_fops); | 643 | &sleep_while_idle, &pm_dbg_option_fops); |
644 | (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, | 644 | (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d, |
645 | &wakeup_timer_seconds, &pm_dbg_option_fops); | 645 | &wakeup_timer_seconds, &pm_dbg_option_fops); |
646 | (void) debugfs_create_file("wakeup_timer_milliseconds", | 646 | (void) debugfs_create_file("wakeup_timer_milliseconds", |
647 | S_IRUGO | S_IWUGO, d, &wakeup_timer_milliseconds, | 647 | S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds, |
648 | &pm_dbg_option_fops); | 648 | &pm_dbg_option_fops); |
649 | pm_dbg_init_done = 1; | 649 | pm_dbg_init_done = 1; |
650 | 650 | ||
diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h index 729a644ce852..3300ff6e3cfe 100644 --- a/arch/arm/mach-omap2/prcm_mpu44xx.h +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h | |||
@@ -38,8 +38,8 @@ | |||
38 | #define OMAP4430_PRCM_MPU_CPU1_INST 0x0800 | 38 | #define OMAP4430_PRCM_MPU_CPU1_INST 0x0800 |
39 | 39 | ||
40 | /* PRCM_MPU clockdomain register offsets (from instance start) */ | 40 | /* PRCM_MPU clockdomain register offsets (from instance start) */ |
41 | #define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0000 | 41 | #define OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS 0x0018 |
42 | #define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0000 | 42 | #define OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS 0x0018 |
43 | 43 | ||
44 | 44 | ||
45 | /* | 45 | /* |
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index c37e823266d3..1a777e34d0c2 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c | |||
@@ -282,6 +282,7 @@ error: | |||
282 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | 282 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" |
283 | "interrupt handler. Smartreflex will" | 283 | "interrupt handler. Smartreflex will" |
284 | "not function as desired\n", __func__); | 284 | "not function as desired\n", __func__); |
285 | kfree(name); | ||
285 | kfree(sr_info); | 286 | kfree(sr_info); |
286 | return ret; | 287 | return ret; |
287 | } | 288 | } |
@@ -879,7 +880,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
879 | ret = sr_late_init(sr_info); | 880 | ret = sr_late_init(sr_info); |
880 | if (ret) { | 881 | if (ret) { |
881 | pr_warning("%s: Error in SR late init\n", __func__); | 882 | pr_warning("%s: Error in SR late init\n", __func__); |
882 | return ret; | 883 | goto err_release_region; |
883 | } | 884 | } |
884 | } | 885 | } |
885 | 886 | ||
@@ -890,17 +891,20 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
890 | * not try to create rest of the debugfs entries. | 891 | * not try to create rest of the debugfs entries. |
891 | */ | 892 | */ |
892 | vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); | 893 | vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); |
893 | if (!vdd_dbg_dir) | 894 | if (!vdd_dbg_dir) { |
894 | return -EINVAL; | 895 | ret = -EINVAL; |
896 | goto err_release_region; | ||
897 | } | ||
895 | 898 | ||
896 | dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); | 899 | dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); |
897 | if (IS_ERR(dbg_dir)) { | 900 | if (IS_ERR(dbg_dir)) { |
898 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", | 901 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", |
899 | __func__); | 902 | __func__); |
900 | return PTR_ERR(dbg_dir); | 903 | ret = PTR_ERR(dbg_dir); |
904 | goto err_release_region; | ||
901 | } | 905 | } |
902 | 906 | ||
903 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUGO, dbg_dir, | 907 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir, |
904 | (void *)sr_info, &pm_sr_fops); | 908 | (void *)sr_info, &pm_sr_fops); |
905 | (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir, | 909 | (void) debugfs_create_x32("errweight", S_IRUGO, dbg_dir, |
906 | &sr_info->err_weight); | 910 | &sr_info->err_weight); |
@@ -913,7 +917,8 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
913 | if (IS_ERR(nvalue_dir)) { | 917 | if (IS_ERR(nvalue_dir)) { |
914 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | 918 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" |
915 | "for n-values\n", __func__); | 919 | "for n-values\n", __func__); |
916 | return PTR_ERR(nvalue_dir); | 920 | ret = PTR_ERR(nvalue_dir); |
921 | goto err_release_region; | ||
917 | } | 922 | } |
918 | 923 | ||
919 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); | 924 | omap_voltage_get_volttable(sr_info->voltdm, &volt_data); |
@@ -922,24 +927,16 @@ static int __init omap_sr_probe(struct platform_device *pdev) | |||
922 | " corresponding vdd vdd_%s. Cannot create debugfs" | 927 | " corresponding vdd vdd_%s. Cannot create debugfs" |
923 | "entries for n-values\n", | 928 | "entries for n-values\n", |
924 | __func__, sr_info->voltdm->name); | 929 | __func__, sr_info->voltdm->name); |
925 | return -ENODATA; | 930 | ret = -ENODATA; |
931 | goto err_release_region; | ||
926 | } | 932 | } |
927 | 933 | ||
928 | for (i = 0; i < sr_info->nvalue_count; i++) { | 934 | for (i = 0; i < sr_info->nvalue_count; i++) { |
929 | char *name; | 935 | char name[NVALUE_NAME_LEN + 1]; |
930 | char volt_name[32]; | ||
931 | |||
932 | name = kzalloc(NVALUE_NAME_LEN + 1, GFP_KERNEL); | ||
933 | if (!name) { | ||
934 | dev_err(&pdev->dev, "%s: Unable to allocate memory" | ||
935 | " for n-value directory name\n", __func__); | ||
936 | return -ENOMEM; | ||
937 | } | ||
938 | 936 | ||
939 | strcpy(name, "volt_"); | 937 | snprintf(name, sizeof(name), "volt_%d", |
940 | sprintf(volt_name, "%d", volt_data[i].volt_nominal); | 938 | volt_data[i].volt_nominal); |
941 | strcat(name, volt_name); | 939 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, |
942 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUGO, nvalue_dir, | ||
943 | &(sr_info->nvalue_table[i].nvalue)); | 940 | &(sr_info->nvalue_table[i].nvalue)); |
944 | } | 941 | } |
945 | 942 | ||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 7b7c2683ae7b..0fc550e7e482 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <asm/mach/time.h> | 39 | #include <asm/mach/time.h> |
40 | #include <plat/dmtimer.h> | 40 | #include <plat/dmtimer.h> |
41 | #include <asm/localtimer.h> | 41 | #include <asm/localtimer.h> |
42 | #include <asm/sched_clock.h> | ||
42 | 43 | ||
43 | #include "timer-gp.h" | 44 | #include "timer-gp.h" |
44 | 45 | ||
@@ -190,6 +191,7 @@ static void __init omap2_gp_clocksource_init(void) | |||
190 | /* | 191 | /* |
191 | * clocksource | 192 | * clocksource |
192 | */ | 193 | */ |
194 | static DEFINE_CLOCK_DATA(cd); | ||
193 | static struct omap_dm_timer *gpt_clocksource; | 195 | static struct omap_dm_timer *gpt_clocksource; |
194 | static cycle_t clocksource_read_cycles(struct clocksource *cs) | 196 | static cycle_t clocksource_read_cycles(struct clocksource *cs) |
195 | { | 197 | { |
@@ -204,6 +206,15 @@ static struct clocksource clocksource_gpt = { | |||
204 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 206 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
205 | }; | 207 | }; |
206 | 208 | ||
209 | static void notrace dmtimer_update_sched_clock(void) | ||
210 | { | ||
211 | u32 cyc; | ||
212 | |||
213 | cyc = omap_dm_timer_read_counter(gpt_clocksource); | ||
214 | |||
215 | update_sched_clock(&cd, cyc, (u32)~0); | ||
216 | } | ||
217 | |||
207 | /* Setup free-running counter for clocksource */ | 218 | /* Setup free-running counter for clocksource */ |
208 | static void __init omap2_gp_clocksource_init(void) | 219 | static void __init omap2_gp_clocksource_init(void) |
209 | { | 220 | { |
@@ -224,6 +235,8 @@ static void __init omap2_gp_clocksource_init(void) | |||
224 | 235 | ||
225 | omap_dm_timer_set_load_start(gpt, 1, 0); | 236 | omap_dm_timer_set_load_start(gpt, 1, 0); |
226 | 237 | ||
238 | init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); | ||
239 | |||
227 | if (clocksource_register_hz(&clocksource_gpt, tick_rate)) | 240 | if (clocksource_register_hz(&clocksource_gpt, tick_rate)) |
228 | printk(err2, clocksource_gpt.name); | 241 | printk(err2, clocksource_gpt.name); |
229 | } | 242 | } |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index fbc5b775f895..b166b1d845d7 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -347,6 +347,7 @@ static struct platform_device *pxa25x_devices[] __initdata = { | |||
347 | &pxa25x_device_assp, | 347 | &pxa25x_device_assp, |
348 | &pxa25x_device_pwm0, | 348 | &pxa25x_device_pwm0, |
349 | &pxa25x_device_pwm1, | 349 | &pxa25x_device_pwm1, |
350 | &pxa_device_asoc_platform, | ||
350 | }; | 351 | }; |
351 | 352 | ||
352 | static struct sys_device pxa25x_sysdev[] = { | 353 | static struct sys_device pxa25x_sysdev[] = { |
diff --git a/arch/arm/mach-pxa/tosa-bt.c b/arch/arm/mach-pxa/tosa-bt.c index c31e601eb49c..b9b1e5c2b290 100644 --- a/arch/arm/mach-pxa/tosa-bt.c +++ b/arch/arm/mach-pxa/tosa-bt.c | |||
@@ -81,8 +81,6 @@ static int tosa_bt_probe(struct platform_device *dev) | |||
81 | goto err_rfk_alloc; | 81 | goto err_rfk_alloc; |
82 | } | 82 | } |
83 | 83 | ||
84 | rfkill_set_led_trigger_name(rfk, "tosa-bt"); | ||
85 | |||
86 | rc = rfkill_register(rfk); | 84 | rc = rfkill_register(rfk); |
87 | if (rc) | 85 | if (rc) |
88 | goto err_rfkill; | 86 | goto err_rfkill; |
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index af152e70cfcf..f2582ec300d9 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
@@ -875,6 +875,11 @@ static struct platform_device sharpsl_rom_device = { | |||
875 | .dev.platform_data = &sharpsl_rom_data, | 875 | .dev.platform_data = &sharpsl_rom_data, |
876 | }; | 876 | }; |
877 | 877 | ||
878 | static struct platform_device wm9712_device = { | ||
879 | .name = "wm9712-codec", | ||
880 | .id = -1, | ||
881 | }; | ||
882 | |||
878 | static struct platform_device *devices[] __initdata = { | 883 | static struct platform_device *devices[] __initdata = { |
879 | &tosascoop_device, | 884 | &tosascoop_device, |
880 | &tosascoop_jc_device, | 885 | &tosascoop_jc_device, |
@@ -885,6 +890,7 @@ static struct platform_device *devices[] __initdata = { | |||
885 | &tosaled_device, | 890 | &tosaled_device, |
886 | &tosa_bt_device, | 891 | &tosa_bt_device, |
887 | &sharpsl_rom_device, | 892 | &sharpsl_rom_device, |
893 | &wm9712_device, | ||
888 | }; | 894 | }; |
889 | 895 | ||
890 | static void tosa_poweroff(void) | 896 | static void tosa_poweroff(void) |
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index a0cb2581894f..50825a3f91cc 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig | |||
@@ -99,6 +99,7 @@ config MACH_NEO1973_GTA02 | |||
99 | select POWER_SUPPLY | 99 | select POWER_SUPPLY |
100 | select MACH_NEO1973 | 100 | select MACH_NEO1973 |
101 | select S3C2410_PWM | 101 | select S3C2410_PWM |
102 | select S3C_DEV_USB_HOST | ||
102 | help | 103 | help |
103 | Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone | 104 | Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone |
104 | 105 | ||
diff --git a/arch/arm/mach-s3c2440/include/mach/gta02.h b/arch/arm/mach-s3c2440/include/mach/gta02.h index 953331d8d56a..3a56a229cac6 100644 --- a/arch/arm/mach-s3c2440/include/mach/gta02.h +++ b/arch/arm/mach-s3c2440/include/mach/gta02.h | |||
@@ -44,19 +44,19 @@ | |||
44 | #define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */ | 44 | #define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */ |
45 | #define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */ | 45 | #define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */ |
46 | 46 | ||
47 | #define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */ | 47 | #define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */ |
48 | #define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2 | 48 | #define GTA02v1_GPIO_WLAN_GPIO10 S3C2410_GPJ(2) |
49 | #define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */ | 49 | #define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */ |
50 | #define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */ | 50 | #define GTA02_GPIO_INT0 S3C2410_GPJ(3) /* v2 + v3 + v4 only */ |
51 | #define GTA02_GPIO_nGSM_EN S3C2440_GPJ4 | 51 | #define GTA02_GPIO_nGSM_EN S3C2410_GPJ(4) |
52 | #define GTA02_GPIO_3D_RESET S3C2440_GPJ5 | 52 | #define GTA02_GPIO_3D_RESET S3C2410_GPJ(5) |
53 | #define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */ | 53 | #define GTA02_GPIO_nDL_GSM S3C2410_GPJ(6) /* v4 + v5 only */ |
54 | #define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7 | 54 | #define GTA02_GPIO_WLAN_GPIO0 S3C2410_GPJ(7) |
55 | #define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8 | 55 | #define GTA02v1_GPIO_BAT_ID S3C2410_GPJ(8) |
56 | #define GTA02_GPIO_KEEPACT S3C2440_GPJ8 | 56 | #define GTA02_GPIO_KEEPACT S3C2410_GPJ(8) |
57 | #define GTA02v1_GPIO_HP_IN S3C2440_GPJ10 | 57 | #define GTA02v1_GPIO_HP_IN S3C2410_GPJ(10) |
58 | #define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */ | 58 | #define GTA02_CHIP_PWD S3C2410_GPJ(11) /* v2 + v3 + v4 only */ |
59 | #define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */ | 59 | #define GTA02_GPIO_nWLAN_RESET S3C2410_GPJ(12) /* v2 + v3 + v4 only */ |
60 | 60 | ||
61 | #define GTA02_IRQ_GSENSOR_1 IRQ_EINT0 | 61 | #define GTA02_IRQ_GSENSOR_1 IRQ_EINT0 |
62 | #define GTA02_IRQ_MODEM IRQ_EINT1 | 62 | #define GTA02_IRQ_MODEM IRQ_EINT1 |
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index dd3782064508..fdfc4d5e37a1 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -151,6 +151,12 @@ static struct clk init_clocks_off[] = { | |||
151 | .enable = s3c64xx_pclk_ctrl, | 151 | .enable = s3c64xx_pclk_ctrl, |
152 | .ctrlbit = S3C_CLKCON_PCLK_IIC, | 152 | .ctrlbit = S3C_CLKCON_PCLK_IIC, |
153 | }, { | 153 | }, { |
154 | .name = "i2c", | ||
155 | .id = 1, | ||
156 | .parent = &clk_p, | ||
157 | .enable = s3c64xx_pclk_ctrl, | ||
158 | .ctrlbit = S3C6410_CLKCON_PCLK_I2C1, | ||
159 | }, { | ||
154 | .name = "iis", | 160 | .name = "iis", |
155 | .id = 0, | 161 | .id = 0, |
156 | .parent = &clk_p, | 162 | .parent = &clk_p, |
diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index 135db1b41252..c35585cf8c4f 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c | |||
@@ -690,12 +690,12 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase, | |||
690 | 690 | ||
691 | regptr = regs + PL080_Cx_BASE(0); | 691 | regptr = regs + PL080_Cx_BASE(0); |
692 | 692 | ||
693 | for (ch = 0; ch < 8; ch++, chno++, chptr++) { | 693 | for (ch = 0; ch < 8; ch++, chptr++) { |
694 | printk(KERN_INFO "%s: registering DMA %d (%p)\n", | 694 | pr_debug("%s: registering DMA %d (%p)\n", |
695 | __func__, chno, regptr); | 695 | __func__, chno + ch, regptr); |
696 | 696 | ||
697 | chptr->bit = 1 << ch; | 697 | chptr->bit = 1 << ch; |
698 | chptr->number = chno; | 698 | chptr->number = chno + ch; |
699 | chptr->dmac = dmac; | 699 | chptr->dmac = dmac; |
700 | chptr->regs = regptr; | 700 | chptr->regs = regptr; |
701 | regptr += PL080_Cx_STRIDE; | 701 | regptr += PL080_Cx_STRIDE; |
@@ -704,7 +704,8 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase, | |||
704 | /* for the moment, permanently enable the controller */ | 704 | /* for the moment, permanently enable the controller */ |
705 | writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG); | 705 | writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG); |
706 | 706 | ||
707 | printk(KERN_INFO "PL080: IRQ %d, at %p\n", irq, regs); | 707 | printk(KERN_INFO "PL080: IRQ %d, at %p, channels %d..%d\n", |
708 | irq, regs, chno, chno+8); | ||
708 | 709 | ||
709 | return 0; | 710 | return 0; |
710 | 711 | ||
diff --git a/arch/arm/mach-s3c64xx/gpiolib.c b/arch/arm/mach-s3c64xx/gpiolib.c index fd99a82e82c4..92b09085caaa 100644 --- a/arch/arm/mach-s3c64xx/gpiolib.c +++ b/arch/arm/mach-s3c64xx/gpiolib.c | |||
@@ -72,7 +72,7 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = { | |||
72 | .get_pull = s3c_gpio_getpull_updown, | 72 | .get_pull = s3c_gpio_getpull_updown, |
73 | }; | 73 | }; |
74 | 74 | ||
75 | int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) | 75 | static int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin) |
76 | { | 76 | { |
77 | return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; | 77 | return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; |
78 | } | 78 | } |
@@ -138,7 +138,7 @@ static struct s3c_gpio_chip gpio_4bit[] = { | |||
138 | }, | 138 | }, |
139 | }; | 139 | }; |
140 | 140 | ||
141 | int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) | 141 | static int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin) |
142 | { | 142 | { |
143 | return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; | 143 | return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; |
144 | } | 144 | } |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index e85192a86fbe..a80a3163dd30 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/delay.h> | 28 | #include <linux/delay.h> |
29 | #include <linux/smsc911x.h> | 29 | #include <linux/smsc911x.h> |
30 | #include <linux/regulator/fixed.h> | 30 | #include <linux/regulator/fixed.h> |
31 | #include <linux/regulator/machine.h> | ||
31 | 32 | ||
32 | #ifdef CONFIG_SMDK6410_WM1190_EV1 | 33 | #ifdef CONFIG_SMDK6410_WM1190_EV1 |
33 | #include <linux/mfd/wm8350/core.h> | 34 | #include <linux/mfd/wm8350/core.h> |
@@ -351,7 +352,7 @@ static struct regulator_init_data smdk6410_vddpll = { | |||
351 | /* VDD_UH_MMC, LDO5 on J5 */ | 352 | /* VDD_UH_MMC, LDO5 on J5 */ |
352 | static struct regulator_init_data smdk6410_vdduh_mmc = { | 353 | static struct regulator_init_data smdk6410_vdduh_mmc = { |
353 | .constraints = { | 354 | .constraints = { |
354 | .name = "PVDD_UH/PVDD_MMC", | 355 | .name = "PVDD_UH+PVDD_MMC", |
355 | .always_on = 1, | 356 | .always_on = 1, |
356 | }, | 357 | }, |
357 | }; | 358 | }; |
@@ -417,7 +418,7 @@ static struct regulator_init_data smdk6410_vddaudio = { | |||
417 | /* S3C64xx internal logic & PLL */ | 418 | /* S3C64xx internal logic & PLL */ |
418 | static struct regulator_init_data wm8350_dcdc1_data = { | 419 | static struct regulator_init_data wm8350_dcdc1_data = { |
419 | .constraints = { | 420 | .constraints = { |
420 | .name = "PVDD_INT/PVDD_PLL", | 421 | .name = "PVDD_INT+PVDD_PLL", |
421 | .min_uV = 1200000, | 422 | .min_uV = 1200000, |
422 | .max_uV = 1200000, | 423 | .max_uV = 1200000, |
423 | .always_on = 1, | 424 | .always_on = 1, |
@@ -452,7 +453,7 @@ static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { | |||
452 | 453 | ||
453 | static struct regulator_init_data wm8350_dcdc4_data = { | 454 | static struct regulator_init_data wm8350_dcdc4_data = { |
454 | .constraints = { | 455 | .constraints = { |
455 | .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", | 456 | .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV", |
456 | .min_uV = 3000000, | 457 | .min_uV = 3000000, |
457 | .max_uV = 3000000, | 458 | .max_uV = 3000000, |
458 | .always_on = 1, | 459 | .always_on = 1, |
@@ -464,7 +465,7 @@ static struct regulator_init_data wm8350_dcdc4_data = { | |||
464 | /* OTGi/1190-EV1 HPVDD & AVDD */ | 465 | /* OTGi/1190-EV1 HPVDD & AVDD */ |
465 | static struct regulator_init_data wm8350_ldo4_data = { | 466 | static struct regulator_init_data wm8350_ldo4_data = { |
466 | .constraints = { | 467 | .constraints = { |
467 | .name = "PVDD_OTGI/HPVDD/AVDD", | 468 | .name = "PVDD_OTGI+HPVDD+AVDD", |
468 | .min_uV = 1200000, | 469 | .min_uV = 1200000, |
469 | .max_uV = 1200000, | 470 | .max_uV = 1200000, |
470 | .apply_uV = 1, | 471 | .apply_uV = 1, |
@@ -552,7 +553,7 @@ static struct wm831x_backlight_pdata wm1192_backlight_pdata = { | |||
552 | 553 | ||
553 | static struct regulator_init_data wm1192_dcdc3 = { | 554 | static struct regulator_init_data wm1192_dcdc3 = { |
554 | .constraints = { | 555 | .constraints = { |
555 | .name = "PVDD_MEM/PVDD_GPS", | 556 | .name = "PVDD_MEM+PVDD_GPS", |
556 | .always_on = 1, | 557 | .always_on = 1, |
557 | }, | 558 | }, |
558 | }; | 559 | }; |
@@ -563,7 +564,7 @@ static struct regulator_consumer_supply wm1192_ldo1_consumers[] = { | |||
563 | 564 | ||
564 | static struct regulator_init_data wm1192_ldo1 = { | 565 | static struct regulator_init_data wm1192_ldo1 = { |
565 | .constraints = { | 566 | .constraints = { |
566 | .name = "PVDD_LCD/PVDD_EXT", | 567 | .name = "PVDD_LCD+PVDD_EXT", |
567 | .always_on = 1, | 568 | .always_on = 1, |
568 | }, | 569 | }, |
569 | .consumer_supplies = wm1192_ldo1_consumers, | 570 | .consumer_supplies = wm1192_ldo1_consumers, |
diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c64xx/setup-keypad.c index f8ed0d22db70..1d4d0ee9e870 100644 --- a/arch/arm/mach-s3c64xx/setup-keypad.c +++ b/arch/arm/mach-s3c64xx/setup-keypad.c | |||
@@ -17,7 +17,7 @@ | |||
17 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) | 17 | void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) |
18 | { | 18 | { |
19 | /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ | 19 | /* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */ |
20 | s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3)); | 20 | s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), rows, S3C_GPIO_SFN(3)); |
21 | 21 | ||
22 | /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ | 22 | /* Set all the necessary GPL pins to special-function 3: KP_COL[x] */ |
23 | s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3)); | 23 | s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3)); |
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c index 1a942037c4ef..f344a222bc84 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci.c +++ b/arch/arm/mach-s3c64xx/setup-sdhci.c | |||
@@ -56,7 +56,7 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, | |||
56 | else | 56 | else |
57 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | 57 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); |
58 | 58 | ||
59 | printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); | 59 | pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); |
60 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | 60 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); |
61 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | 61 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); |
62 | } | 62 | } |
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h index 5486c8f01f1d..adb5f298ead8 100644 --- a/arch/arm/mach-s5p64x0/include/mach/gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/gpio.h | |||
@@ -23,7 +23,7 @@ | |||
23 | #define S5P6440_GPIO_A_NR (6) | 23 | #define S5P6440_GPIO_A_NR (6) |
24 | #define S5P6440_GPIO_B_NR (7) | 24 | #define S5P6440_GPIO_B_NR (7) |
25 | #define S5P6440_GPIO_C_NR (8) | 25 | #define S5P6440_GPIO_C_NR (8) |
26 | #define S5P6440_GPIO_F_NR (2) | 26 | #define S5P6440_GPIO_F_NR (16) |
27 | #define S5P6440_GPIO_G_NR (7) | 27 | #define S5P6440_GPIO_G_NR (7) |
28 | #define S5P6440_GPIO_H_NR (10) | 28 | #define S5P6440_GPIO_H_NR (10) |
29 | #define S5P6440_GPIO_I_NR (16) | 29 | #define S5P6440_GPIO_I_NR (16) |
@@ -36,7 +36,7 @@ | |||
36 | #define S5P6450_GPIO_B_NR (7) | 36 | #define S5P6450_GPIO_B_NR (7) |
37 | #define S5P6450_GPIO_C_NR (8) | 37 | #define S5P6450_GPIO_C_NR (8) |
38 | #define S5P6450_GPIO_D_NR (8) | 38 | #define S5P6450_GPIO_D_NR (8) |
39 | #define S5P6450_GPIO_F_NR (2) | 39 | #define S5P6450_GPIO_F_NR (16) |
40 | #define S5P6450_GPIO_G_NR (14) | 40 | #define S5P6450_GPIO_G_NR (14) |
41 | #define S5P6450_GPIO_H_NR (10) | 41 | #define S5P6450_GPIO_H_NR (10) |
42 | #define S5P6450_GPIO_I_NR (16) | 42 | #define S5P6450_GPIO_I_NR (16) |
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 2123b96b5638..4303a86e6e38 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c | |||
@@ -454,6 +454,7 @@ static void __init ag5evm_init(void) | |||
454 | gpio_direction_output(GPIO_PORT217, 0); | 454 | gpio_direction_output(GPIO_PORT217, 0); |
455 | mdelay(1); | 455 | mdelay(1); |
456 | gpio_set_value(GPIO_PORT217, 1); | 456 | gpio_set_value(GPIO_PORT217, 1); |
457 | mdelay(100); | ||
457 | 458 | ||
458 | /* LCD backlight controller */ | 459 | /* LCD backlight controller */ |
459 | gpio_request(GPIO_PORT235, NULL); /* RESET */ | 460 | gpio_request(GPIO_PORT235, NULL); /* RESET */ |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 3cf0951caa2d..81d6536552a9 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
@@ -1303,7 +1303,7 @@ static void __init ap4evb_init(void) | |||
1303 | 1303 | ||
1304 | lcdc_info.clock_source = LCDC_CLK_BUS; | 1304 | lcdc_info.clock_source = LCDC_CLK_BUS; |
1305 | lcdc_info.ch[0].interface_type = RGB18; | 1305 | lcdc_info.ch[0].interface_type = RGB18; |
1306 | lcdc_info.ch[0].clock_divider = 2; | 1306 | lcdc_info.ch[0].clock_divider = 3; |
1307 | lcdc_info.ch[0].flags = 0; | 1307 | lcdc_info.ch[0].flags = 0; |
1308 | lcdc_info.ch[0].lcd_size_cfg.width = 152; | 1308 | lcdc_info.ch[0].lcd_size_cfg.width = 152; |
1309 | lcdc_info.ch[0].lcd_size_cfg.height = 91; | 1309 | lcdc_info.ch[0].lcd_size_cfg.height = 91; |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index fb4213a4e15a..1657eac5dde2 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
@@ -303,7 +303,7 @@ static struct sh_mobile_lcdc_info lcdc_info = { | |||
303 | .lcd_cfg = mackerel_lcdc_modes, | 303 | .lcd_cfg = mackerel_lcdc_modes, |
304 | .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes), | 304 | .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes), |
305 | .interface_type = RGB24, | 305 | .interface_type = RGB24, |
306 | .clock_divider = 2, | 306 | .clock_divider = 3, |
307 | .flags = 0, | 307 | .flags = 0, |
308 | .lcd_size_cfg.width = 152, | 308 | .lcd_size_cfg.width = 152, |
309 | .lcd_size_cfg.height = 91, | 309 | .lcd_size_cfg.height = 91, |
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index ddd4a1b775f0..7e58904c1c8c 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c | |||
@@ -263,7 +263,7 @@ static struct clk div6_clks[DIV6_NR] = { | |||
263 | }; | 263 | }; |
264 | 264 | ||
265 | enum { MSTP001, | 265 | enum { MSTP001, |
266 | MSTP125, MSTP118, MSTP116, MSTP100, | 266 | MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, |
267 | MSTP219, | 267 | MSTP219, |
268 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, | 268 | MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, |
269 | MSTP331, MSTP329, MSTP325, MSTP323, MSTP312, | 269 | MSTP331, MSTP329, MSTP325, MSTP323, MSTP312, |
@@ -275,6 +275,10 @@ enum { MSTP001, | |||
275 | 275 | ||
276 | static struct clk mstp_clks[MSTP_NR] = { | 276 | static struct clk mstp_clks[MSTP_NR] = { |
277 | [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */ | 277 | [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */ |
278 | [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* CEU1 */ | ||
279 | [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* CSI2-RX1 */ | ||
280 | [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU0 */ | ||
281 | [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2-RX0 */ | ||
278 | [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ | 282 | [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ |
279 | [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */ | 283 | [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */ |
280 | [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ | 284 | [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ |
@@ -306,6 +310,9 @@ static struct clk_lookup lookups[] = { | |||
306 | CLKDEV_CON_ID("r_clk", &r_clk), | 310 | CLKDEV_CON_ID("r_clk", &r_clk), |
307 | 311 | ||
308 | /* DIV6 clocks */ | 312 | /* DIV6 clocks */ |
313 | CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), | ||
314 | CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]), | ||
315 | CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), | ||
309 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]), | 316 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]), |
310 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), | 317 | CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), |
311 | CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), | 318 | CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), |
@@ -313,11 +320,15 @@ static struct clk_lookup lookups[] = { | |||
313 | 320 | ||
314 | /* MSTP32 clocks */ | 321 | /* MSTP32 clocks */ |
315 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ | 322 | CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ |
316 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ | 323 | CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */ |
324 | CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */ | ||
325 | CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */ | ||
326 | CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */ | ||
317 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */ | 327 | CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */ |
318 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ | 328 | CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ |
319 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ | ||
320 | CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ | 329 | CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ |
330 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ | ||
331 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ | ||
321 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ | 332 | CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ |
322 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ | 333 | CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ |
323 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ | 334 | CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ |
diff --git a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt index efd3687ba190..3029aba38688 100644 --- a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt +++ b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt | |||
@@ -6,13 +6,10 @@ LIST "RWT Setting" | |||
6 | EW 0xE6020004, 0xA500 | 6 | EW 0xE6020004, 0xA500 |
7 | EW 0xE6030004, 0xA500 | 7 | EW 0xE6030004, 0xA500 |
8 | 8 | ||
9 | DD 0x01001000, 0x01001000 | ||
10 | |||
11 | LIST "GPIO Setting" | 9 | LIST "GPIO Setting" |
12 | EB 0xE6051013, 0xA2 | 10 | EB 0xE6051013, 0xA2 |
13 | 11 | ||
14 | LIST "CPG" | 12 | LIST "CPG" |
15 | ED 0xE6150080, 0x00000180 | ||
16 | ED 0xE61500C0, 0x00000002 | 13 | ED 0xE61500C0, 0x00000002 |
17 | 14 | ||
18 | WAIT 1, 0xFE40009C | 15 | WAIT 1, 0xFE40009C |
@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040 | |||
37 | 34 | ||
38 | WAIT 1, 0xFE40009C | 35 | WAIT 1, 0xFE40009C |
39 | 36 | ||
37 | LIST "SUB/USBClk" | ||
38 | ED 0xE6150080, 0x00000180 | ||
39 | |||
40 | LIST "BSC" | 40 | LIST "BSC" |
41 | ED 0xFEC10000, 0x00E0001B | 41 | ED 0xFEC10000, 0x00E0001B |
42 | 42 | ||
@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505 | |||
53 | ED 0xFE40004C, 0x00110209 | 53 | ED 0xFE40004C, 0x00110209 |
54 | ED 0xFE400010, 0x00000087 | 54 | ED 0xFE400010, 0x00000087 |
55 | 55 | ||
56 | WAIT 10, 0xFE40009C | 56 | WAIT 30, 0xFE40009C |
57 | 57 | ||
58 | ED 0xFE400084, 0x0000003F | 58 | ED 0xFE400084, 0x0000003F |
59 | EB 0xFE500000, 0x00 | 59 | EB 0xFE500000, 0x00 |
@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050 | |||
84 | 84 | ||
85 | WAIT 1, 0xFE40009C | 85 | WAIT 1, 0xFE40009C |
86 | 86 | ||
87 | ED 0xE6150354, 0x00000002 | 87 | ED 0xFE400354, 0x01AD8002 |
88 | 88 | ||
89 | LIST "SCIF0 - Serial port for earlyprintk" | 89 | LIST "SCIF0 - Serial port for earlyprintk" |
90 | EB 0xE6053098, 0x11 | 90 | EB 0xE6053098, 0x11 |
diff --git a/arch/arm/mach-shmobile/include/mach/head-mackerel.txt b/arch/arm/mach-shmobile/include/mach/head-mackerel.txt index efd3687ba190..3029aba38688 100644 --- a/arch/arm/mach-shmobile/include/mach/head-mackerel.txt +++ b/arch/arm/mach-shmobile/include/mach/head-mackerel.txt | |||
@@ -6,13 +6,10 @@ LIST "RWT Setting" | |||
6 | EW 0xE6020004, 0xA500 | 6 | EW 0xE6020004, 0xA500 |
7 | EW 0xE6030004, 0xA500 | 7 | EW 0xE6030004, 0xA500 |
8 | 8 | ||
9 | DD 0x01001000, 0x01001000 | ||
10 | |||
11 | LIST "GPIO Setting" | 9 | LIST "GPIO Setting" |
12 | EB 0xE6051013, 0xA2 | 10 | EB 0xE6051013, 0xA2 |
13 | 11 | ||
14 | LIST "CPG" | 12 | LIST "CPG" |
15 | ED 0xE6150080, 0x00000180 | ||
16 | ED 0xE61500C0, 0x00000002 | 13 | ED 0xE61500C0, 0x00000002 |
17 | 14 | ||
18 | WAIT 1, 0xFE40009C | 15 | WAIT 1, 0xFE40009C |
@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040 | |||
37 | 34 | ||
38 | WAIT 1, 0xFE40009C | 35 | WAIT 1, 0xFE40009C |
39 | 36 | ||
37 | LIST "SUB/USBClk" | ||
38 | ED 0xE6150080, 0x00000180 | ||
39 | |||
40 | LIST "BSC" | 40 | LIST "BSC" |
41 | ED 0xFEC10000, 0x00E0001B | 41 | ED 0xFEC10000, 0x00E0001B |
42 | 42 | ||
@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505 | |||
53 | ED 0xFE40004C, 0x00110209 | 53 | ED 0xFE40004C, 0x00110209 |
54 | ED 0xFE400010, 0x00000087 | 54 | ED 0xFE400010, 0x00000087 |
55 | 55 | ||
56 | WAIT 10, 0xFE40009C | 56 | WAIT 30, 0xFE40009C |
57 | 57 | ||
58 | ED 0xFE400084, 0x0000003F | 58 | ED 0xFE400084, 0x0000003F |
59 | EB 0xFE500000, 0x00 | 59 | EB 0xFE500000, 0x00 |
@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050 | |||
84 | 84 | ||
85 | WAIT 1, 0xFE40009C | 85 | WAIT 1, 0xFE40009C |
86 | 86 | ||
87 | ED 0xE6150354, 0x00000002 | 87 | ED 0xFE400354, 0x01AD8002 |
88 | 88 | ||
89 | LIST "SCIF0 - Serial port for earlyprintk" | 89 | LIST "SCIF0 - Serial port for earlyprintk" |
90 | EB 0xE6053098, 0x11 | 90 | EB 0xE6053098, 0x11 |
diff --git a/arch/arm/mach-tegra/include/mach/kbc.h b/arch/arm/mach-tegra/include/mach/kbc.h index 66ad2760c621..04c779832c78 100644 --- a/arch/arm/mach-tegra/include/mach/kbc.h +++ b/arch/arm/mach-tegra/include/mach/kbc.h | |||
@@ -57,5 +57,6 @@ struct tegra_kbc_platform_data { | |||
57 | const struct matrix_keymap_data *keymap_data; | 57 | const struct matrix_keymap_data *keymap_data; |
58 | 58 | ||
59 | bool wakeup; | 59 | bool wakeup; |
60 | bool use_fn_map; | ||
60 | }; | 61 | }; |
61 | #endif | 62 | #endif |
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 459b319a9fad..49d3208793e5 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c | |||
@@ -322,15 +322,18 @@ static void omap_mbox_fini(struct omap_mbox *mbox) | |||
322 | 322 | ||
323 | struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb) | 323 | struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb) |
324 | { | 324 | { |
325 | struct omap_mbox *mbox; | 325 | struct omap_mbox *_mbox, *mbox = NULL; |
326 | int ret; | 326 | int i, ret; |
327 | 327 | ||
328 | if (!mboxes) | 328 | if (!mboxes) |
329 | return ERR_PTR(-EINVAL); | 329 | return ERR_PTR(-EINVAL); |
330 | 330 | ||
331 | for (mbox = *mboxes; mbox; mbox++) | 331 | for (i = 0; (_mbox = mboxes[i]); i++) { |
332 | if (!strcmp(mbox->name, name)) | 332 | if (!strcmp(_mbox->name, name)) { |
333 | mbox = _mbox; | ||
333 | break; | 334 | break; |
335 | } | ||
336 | } | ||
334 | 337 | ||
335 | if (!mbox) | 338 | if (!mbox) |
336 | return ERR_PTR(-ENOENT); | 339 | return ERR_PTR(-ENOENT); |
diff --git a/arch/arm/plat-samsung/dev-uart.c b/arch/arm/plat-samsung/dev-uart.c index 3776cd952450..5928105490fa 100644 --- a/arch/arm/plat-samsung/dev-uart.c +++ b/arch/arm/plat-samsung/dev-uart.c | |||
@@ -15,6 +15,8 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | 17 | ||
18 | #include <plat/devs.h> | ||
19 | |||
18 | /* uart devices */ | 20 | /* uart devices */ |
19 | 21 | ||
20 | static struct platform_device s3c24xx_uart_device0 = { | 22 | static struct platform_device s3c24xx_uart_device0 = { |
diff --git a/arch/blackfin/lib/outs.S b/arch/blackfin/lib/outs.S index 250f4d4b9436..06a5e674401f 100644 --- a/arch/blackfin/lib/outs.S +++ b/arch/blackfin/lib/outs.S | |||
@@ -13,6 +13,8 @@ | |||
13 | .align 2 | 13 | .align 2 |
14 | 14 | ||
15 | ENTRY(_outsl) | 15 | ENTRY(_outsl) |
16 | CC = R2 == 0; | ||
17 | IF CC JUMP 1f; | ||
16 | P0 = R0; /* P0 = port */ | 18 | P0 = R0; /* P0 = port */ |
17 | P1 = R1; /* P1 = address */ | 19 | P1 = R1; /* P1 = address */ |
18 | P2 = R2; /* P2 = count */ | 20 | P2 = R2; /* P2 = count */ |
@@ -20,10 +22,12 @@ ENTRY(_outsl) | |||
20 | LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; | 22 | LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; |
21 | .Llong_loop_s: R0 = [P1++]; | 23 | .Llong_loop_s: R0 = [P1++]; |
22 | .Llong_loop_e: [P0] = R0; | 24 | .Llong_loop_e: [P0] = R0; |
23 | RTS; | 25 | 1: RTS; |
24 | ENDPROC(_outsl) | 26 | ENDPROC(_outsl) |
25 | 27 | ||
26 | ENTRY(_outsw) | 28 | ENTRY(_outsw) |
29 | CC = R2 == 0; | ||
30 | IF CC JUMP 1f; | ||
27 | P0 = R0; /* P0 = port */ | 31 | P0 = R0; /* P0 = port */ |
28 | P1 = R1; /* P1 = address */ | 32 | P1 = R1; /* P1 = address */ |
29 | P2 = R2; /* P2 = count */ | 33 | P2 = R2; /* P2 = count */ |
@@ -31,10 +35,12 @@ ENTRY(_outsw) | |||
31 | LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; | 35 | LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; |
32 | .Lword_loop_s: R0 = W[P1++]; | 36 | .Lword_loop_s: R0 = W[P1++]; |
33 | .Lword_loop_e: W[P0] = R0; | 37 | .Lword_loop_e: W[P0] = R0; |
34 | RTS; | 38 | 1: RTS; |
35 | ENDPROC(_outsw) | 39 | ENDPROC(_outsw) |
36 | 40 | ||
37 | ENTRY(_outsb) | 41 | ENTRY(_outsb) |
42 | CC = R2 == 0; | ||
43 | IF CC JUMP 1f; | ||
38 | P0 = R0; /* P0 = port */ | 44 | P0 = R0; /* P0 = port */ |
39 | P1 = R1; /* P1 = address */ | 45 | P1 = R1; /* P1 = address */ |
40 | P2 = R2; /* P2 = count */ | 46 | P2 = R2; /* P2 = count */ |
@@ -42,10 +48,12 @@ ENTRY(_outsb) | |||
42 | LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; | 48 | LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; |
43 | .Lbyte_loop_s: R0 = B[P1++]; | 49 | .Lbyte_loop_s: R0 = B[P1++]; |
44 | .Lbyte_loop_e: B[P0] = R0; | 50 | .Lbyte_loop_e: B[P0] = R0; |
45 | RTS; | 51 | 1: RTS; |
46 | ENDPROC(_outsb) | 52 | ENDPROC(_outsb) |
47 | 53 | ||
48 | ENTRY(_outsw_8) | 54 | ENTRY(_outsw_8) |
55 | CC = R2 == 0; | ||
56 | IF CC JUMP 1f; | ||
49 | P0 = R0; /* P0 = port */ | 57 | P0 = R0; /* P0 = port */ |
50 | P1 = R1; /* P1 = address */ | 58 | P1 = R1; /* P1 = address */ |
51 | P2 = R2; /* P2 = count */ | 59 | P2 = R2; /* P2 = count */ |
@@ -56,5 +64,5 @@ ENTRY(_outsw_8) | |||
56 | R0 = R0 << 8; | 64 | R0 = R0 << 8; |
57 | R0 = R0 + R1; | 65 | R0 = R0 + R1; |
58 | .Lword8_loop_e: W[P0] = R0; | 66 | .Lword8_loop_e: W[P0] = R0; |
59 | RTS; | 67 | 1: RTS; |
60 | ENDPROC(_outsw_8) | 68 | ENDPROC(_outsw_8) |
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index 790c767ca95a..ab4a925a443e 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S | |||
@@ -58,6 +58,8 @@ | |||
58 | 1: | 58 | 1: |
59 | .ifeqs "\flushins", BROK_FLUSH_INST | 59 | .ifeqs "\flushins", BROK_FLUSH_INST |
60 | \flushins [P0++]; | 60 | \flushins [P0++]; |
61 | nop; | ||
62 | nop; | ||
61 | 2: nop; | 63 | 2: nop; |
62 | .else | 64 | .else |
63 | 2: \flushins [P0++]; | 65 | 2: \flushins [P0++]; |
diff --git a/arch/cris/kernel/vmlinux.lds.S b/arch/cris/kernel/vmlinux.lds.S index 442218980db0..c49be845f96a 100644 --- a/arch/cris/kernel/vmlinux.lds.S +++ b/arch/cris/kernel/vmlinux.lds.S | |||
@@ -72,11 +72,6 @@ SECTIONS | |||
72 | INIT_TEXT_SECTION(PAGE_SIZE) | 72 | INIT_TEXT_SECTION(PAGE_SIZE) |
73 | .init.data : { INIT_DATA } | 73 | .init.data : { INIT_DATA } |
74 | .init.setup : { INIT_SETUP(16) } | 74 | .init.setup : { INIT_SETUP(16) } |
75 | #ifdef CONFIG_ETRAX_ARCH_V32 | ||
76 | __start___param = .; | ||
77 | __param : { *(__param) } | ||
78 | __stop___param = .; | ||
79 | #endif | ||
80 | .initcall.init : { | 75 | .initcall.init : { |
81 | INIT_CALLS | 76 | INIT_CALLS |
82 | } | 77 | } |
diff --git a/arch/ia64/include/asm/xen/hypercall.h b/arch/ia64/include/asm/xen/hypercall.h index 96fc62366aa4..ed28bcd5bb85 100644 --- a/arch/ia64/include/asm/xen/hypercall.h +++ b/arch/ia64/include/asm/xen/hypercall.h | |||
@@ -107,7 +107,7 @@ extern unsigned long __hypercall(unsigned long a1, unsigned long a2, | |||
107 | static inline int | 107 | static inline int |
108 | xencomm_arch_hypercall_sched_op(int cmd, struct xencomm_handle *arg) | 108 | xencomm_arch_hypercall_sched_op(int cmd, struct xencomm_handle *arg) |
109 | { | 109 | { |
110 | return _hypercall2(int, sched_op_new, cmd, arg); | 110 | return _hypercall2(int, sched_op, cmd, arg); |
111 | } | 111 | } |
112 | 112 | ||
113 | static inline long | 113 | static inline long |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index f5ecc0566bc2..d88983516e26 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -4,6 +4,7 @@ config MIPS | |||
4 | select HAVE_GENERIC_DMA_COHERENT | 4 | select HAVE_GENERIC_DMA_COHERENT |
5 | select HAVE_IDE | 5 | select HAVE_IDE |
6 | select HAVE_OPROFILE | 6 | select HAVE_OPROFILE |
7 | select HAVE_IRQ_WORK | ||
7 | select HAVE_PERF_EVENTS | 8 | select HAVE_PERF_EVENTS |
8 | select PERF_USE_VMALLOC | 9 | select PERF_USE_VMALLOC |
9 | select HAVE_ARCH_KGDB | 10 | select HAVE_ARCH_KGDB |
@@ -208,6 +209,7 @@ config MACH_JZ4740 | |||
208 | select ARCH_REQUIRE_GPIOLIB | 209 | select ARCH_REQUIRE_GPIOLIB |
209 | select SYS_HAS_EARLY_PRINTK | 210 | select SYS_HAS_EARLY_PRINTK |
210 | select HAVE_PWM | 211 | select HAVE_PWM |
212 | select HAVE_CLK | ||
211 | 213 | ||
212 | config LASAT | 214 | config LASAT |
213 | bool "LASAT Networks platforms" | 215 | bool "LASAT Networks platforms" |
@@ -333,6 +335,8 @@ config PNX8550_STB810 | |||
333 | config PMC_MSP | 335 | config PMC_MSP |
334 | bool "PMC-Sierra MSP chipsets" | 336 | bool "PMC-Sierra MSP chipsets" |
335 | depends on EXPERIMENTAL | 337 | depends on EXPERIMENTAL |
338 | select CEVT_R4K | ||
339 | select CSRC_R4K | ||
336 | select DMA_NONCOHERENT | 340 | select DMA_NONCOHERENT |
337 | select SWAP_IO_SPACE | 341 | select SWAP_IO_SPACE |
338 | select NO_EXCEPT_FILL | 342 | select NO_EXCEPT_FILL |
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c index 6398fa95905c..40b84b991191 100644 --- a/arch/mips/alchemy/mtx-1/board_setup.c +++ b/arch/mips/alchemy/mtx-1/board_setup.c | |||
@@ -54,8 +54,8 @@ int mtx1_pci_idsel(unsigned int devsel, int assert); | |||
54 | 54 | ||
55 | static void mtx1_reset(char *c) | 55 | static void mtx1_reset(char *c) |
56 | { | 56 | { |
57 | /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ | 57 | /* Jump to the reset vector */ |
58 | au_writel(0x00000000, 0xAE00001C); | 58 | __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000)); |
59 | } | 59 | } |
60 | 60 | ||
61 | static void mtx1_power_off(void) | 61 | static void mtx1_power_off(void) |
diff --git a/arch/mips/alchemy/mtx-1/platform.c b/arch/mips/alchemy/mtx-1/platform.c index e30e42add697..956f946218c5 100644 --- a/arch/mips/alchemy/mtx-1/platform.c +++ b/arch/mips/alchemy/mtx-1/platform.c | |||
@@ -28,6 +28,8 @@ | |||
28 | #include <linux/mtd/physmap.h> | 28 | #include <linux/mtd/physmap.h> |
29 | #include <mtd/mtd-abi.h> | 29 | #include <mtd/mtd-abi.h> |
30 | 30 | ||
31 | #include <asm/mach-au1x00/au1xxx_eth.h> | ||
32 | |||
31 | static struct gpio_keys_button mtx1_gpio_button[] = { | 33 | static struct gpio_keys_button mtx1_gpio_button[] = { |
32 | { | 34 | { |
33 | .gpio = 207, | 35 | .gpio = 207, |
@@ -140,10 +142,17 @@ static struct __initdata platform_device * mtx1_devs[] = { | |||
140 | &mtx1_mtd, | 142 | &mtx1_mtd, |
141 | }; | 143 | }; |
142 | 144 | ||
145 | static struct au1000_eth_platform_data mtx1_au1000_eth0_pdata = { | ||
146 | .phy_search_highest_addr = 1, | ||
147 | .phy1_search_mac0 = 1, | ||
148 | }; | ||
149 | |||
143 | static int __init mtx1_register_devices(void) | 150 | static int __init mtx1_register_devices(void) |
144 | { | 151 | { |
145 | int rc; | 152 | int rc; |
146 | 153 | ||
154 | au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata); | ||
155 | |||
147 | rc = gpio_request(mtx1_gpio_button[0].gpio, | 156 | rc = gpio_request(mtx1_gpio_button[0].gpio, |
148 | mtx1_gpio_button[0].desc); | 157 | mtx1_gpio_button[0].desc); |
149 | if (rc < 0) { | 158 | if (rc < 0) { |
diff --git a/arch/mips/alchemy/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c index b43c918925d3..80c521e5290d 100644 --- a/arch/mips/alchemy/xxs1500/board_setup.c +++ b/arch/mips/alchemy/xxs1500/board_setup.c | |||
@@ -36,8 +36,8 @@ | |||
36 | 36 | ||
37 | static void xxs1500_reset(char *c) | 37 | static void xxs1500_reset(char *c) |
38 | { | 38 | { |
39 | /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */ | 39 | /* Jump to the reset vector */ |
40 | au_writel(0x00000000, 0xAE00001C); | 40 | __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000)); |
41 | } | 41 | } |
42 | 42 | ||
43 | static void xxs1500_power_off(void) | 43 | static void xxs1500_power_off(void) |
diff --git a/arch/mips/include/asm/perf_event.h b/arch/mips/include/asm/perf_event.h index e00007cf8162..d0c77496c728 100644 --- a/arch/mips/include/asm/perf_event.h +++ b/arch/mips/include/asm/perf_event.h | |||
@@ -11,15 +11,5 @@ | |||
11 | 11 | ||
12 | #ifndef __MIPS_PERF_EVENT_H__ | 12 | #ifndef __MIPS_PERF_EVENT_H__ |
13 | #define __MIPS_PERF_EVENT_H__ | 13 | #define __MIPS_PERF_EVENT_H__ |
14 | 14 | /* Leave it empty here. The file is required by linux/perf_event.h */ | |
15 | /* | ||
16 | * MIPS performance counters do not raise NMI upon overflow, a regular | ||
17 | * interrupt will be signaled. Hence we can do the pending perf event | ||
18 | * work at the tail of the irq handler. | ||
19 | */ | ||
20 | static inline void | ||
21 | set_perf_event_pending(void) | ||
22 | { | ||
23 | } | ||
24 | |||
25 | #endif /* __MIPS_PERF_EVENT_H__ */ | 15 | #endif /* __MIPS_PERF_EVENT_H__ */ |
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c index 5a84a1f11231..94ca2b018af7 100644 --- a/arch/mips/kernel/ftrace.c +++ b/arch/mips/kernel/ftrace.c | |||
@@ -17,29 +17,13 @@ | |||
17 | #include <asm/cacheflush.h> | 17 | #include <asm/cacheflush.h> |
18 | #include <asm/uasm.h> | 18 | #include <asm/uasm.h> |
19 | 19 | ||
20 | /* | 20 | #include <asm-generic/sections.h> |
21 | * If the Instruction Pointer is in module space (0xc0000000), return true; | ||
22 | * otherwise, it is in kernel space (0x80000000), return false. | ||
23 | * | ||
24 | * FIXME: This will not work when the kernel space and module space are the | ||
25 | * same. If they are the same, we need to modify scripts/recordmcount.pl, | ||
26 | * ftrace_make_nop/call() and the other related parts to ensure the | ||
27 | * enabling/disabling of the calling site to _mcount is right for both kernel | ||
28 | * and module. | ||
29 | */ | ||
30 | |||
31 | static inline int in_module(unsigned long ip) | ||
32 | { | ||
33 | return ip & 0x40000000; | ||
34 | } | ||
35 | 21 | ||
36 | #ifdef CONFIG_DYNAMIC_FTRACE | 22 | #ifdef CONFIG_DYNAMIC_FTRACE |
37 | 23 | ||
38 | #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ | 24 | #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ |
39 | #define ADDR_MASK 0x03ffffff /* op_code|addr : 31...26|25 ....0 */ | 25 | #define ADDR_MASK 0x03ffffff /* op_code|addr : 31...26|25 ....0 */ |
40 | 26 | ||
41 | #define INSN_B_1F_4 0x10000004 /* b 1f; offset = 4 */ | ||
42 | #define INSN_B_1F_5 0x10000005 /* b 1f; offset = 5 */ | ||
43 | #define INSN_NOP 0x00000000 /* nop */ | 27 | #define INSN_NOP 0x00000000 /* nop */ |
44 | #define INSN_JAL(addr) \ | 28 | #define INSN_JAL(addr) \ |
45 | ((unsigned int)(JAL | (((addr) >> 2) & ADDR_MASK))) | 29 | ((unsigned int)(JAL | (((addr) >> 2) & ADDR_MASK))) |
@@ -69,6 +53,20 @@ static inline void ftrace_dyn_arch_init_insns(void) | |||
69 | #endif | 53 | #endif |
70 | } | 54 | } |
71 | 55 | ||
56 | /* | ||
57 | * Check if the address is in kernel space | ||
58 | * | ||
59 | * Clone core_kernel_text() from kernel/extable.c, but doesn't call | ||
60 | * init_kernel_text() for Ftrace doesn't trace functions in init sections. | ||
61 | */ | ||
62 | static inline int in_kernel_space(unsigned long ip) | ||
63 | { | ||
64 | if (ip >= (unsigned long)_stext && | ||
65 | ip <= (unsigned long)_etext) | ||
66 | return 1; | ||
67 | return 0; | ||
68 | } | ||
69 | |||
72 | static int ftrace_modify_code(unsigned long ip, unsigned int new_code) | 70 | static int ftrace_modify_code(unsigned long ip, unsigned int new_code) |
73 | { | 71 | { |
74 | int faulted; | 72 | int faulted; |
@@ -84,6 +82,42 @@ static int ftrace_modify_code(unsigned long ip, unsigned int new_code) | |||
84 | return 0; | 82 | return 0; |
85 | } | 83 | } |
86 | 84 | ||
85 | /* | ||
86 | * The details about the calling site of mcount on MIPS | ||
87 | * | ||
88 | * 1. For kernel: | ||
89 | * | ||
90 | * move at, ra | ||
91 | * jal _mcount --> nop | ||
92 | * | ||
93 | * 2. For modules: | ||
94 | * | ||
95 | * 2.1 For KBUILD_MCOUNT_RA_ADDRESS and CONFIG_32BIT | ||
96 | * | ||
97 | * lui v1, hi_16bit_of_mcount --> b 1f (0x10000005) | ||
98 | * addiu v1, v1, low_16bit_of_mcount | ||
99 | * move at, ra | ||
100 | * move $12, ra_address | ||
101 | * jalr v1 | ||
102 | * sub sp, sp, 8 | ||
103 | * 1: offset = 5 instructions | ||
104 | * 2.2 For the Other situations | ||
105 | * | ||
106 | * lui v1, hi_16bit_of_mcount --> b 1f (0x10000004) | ||
107 | * addiu v1, v1, low_16bit_of_mcount | ||
108 | * move at, ra | ||
109 | * jalr v1 | ||
110 | * nop | move $12, ra_address | sub sp, sp, 8 | ||
111 | * 1: offset = 4 instructions | ||
112 | */ | ||
113 | |||
114 | #if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT) | ||
115 | #define MCOUNT_OFFSET_INSNS 5 | ||
116 | #else | ||
117 | #define MCOUNT_OFFSET_INSNS 4 | ||
118 | #endif | ||
119 | #define INSN_B_1F (0x10000000 | MCOUNT_OFFSET_INSNS) | ||
120 | |||
87 | int ftrace_make_nop(struct module *mod, | 121 | int ftrace_make_nop(struct module *mod, |
88 | struct dyn_ftrace *rec, unsigned long addr) | 122 | struct dyn_ftrace *rec, unsigned long addr) |
89 | { | 123 | { |
@@ -91,39 +125,11 @@ int ftrace_make_nop(struct module *mod, | |||
91 | unsigned long ip = rec->ip; | 125 | unsigned long ip = rec->ip; |
92 | 126 | ||
93 | /* | 127 | /* |
94 | * We have compiled module with -mlong-calls, but compiled the kernel | 128 | * If ip is in kernel space, no long call, otherwise, long call is |
95 | * without it, we need to cope with them respectively. | 129 | * needed. |
96 | */ | 130 | */ |
97 | if (in_module(ip)) { | 131 | new = in_kernel_space(ip) ? INSN_NOP : INSN_B_1F; |
98 | #if defined(KBUILD_MCOUNT_RA_ADDRESS) && defined(CONFIG_32BIT) | 132 | |
99 | /* | ||
100 | * lui v1, hi_16bit_of_mcount --> b 1f (0x10000005) | ||
101 | * addiu v1, v1, low_16bit_of_mcount | ||
102 | * move at, ra | ||
103 | * move $12, ra_address | ||
104 | * jalr v1 | ||
105 | * sub sp, sp, 8 | ||
106 | * 1: offset = 5 instructions | ||
107 | */ | ||
108 | new = INSN_B_1F_5; | ||
109 | #else | ||
110 | /* | ||
111 | * lui v1, hi_16bit_of_mcount --> b 1f (0x10000004) | ||
112 | * addiu v1, v1, low_16bit_of_mcount | ||
113 | * move at, ra | ||
114 | * jalr v1 | ||
115 | * nop | move $12, ra_address | sub sp, sp, 8 | ||
116 | * 1: offset = 4 instructions | ||
117 | */ | ||
118 | new = INSN_B_1F_4; | ||
119 | #endif | ||
120 | } else { | ||
121 | /* | ||
122 | * move at, ra | ||
123 | * jal _mcount --> nop | ||
124 | */ | ||
125 | new = INSN_NOP; | ||
126 | } | ||
127 | return ftrace_modify_code(ip, new); | 133 | return ftrace_modify_code(ip, new); |
128 | } | 134 | } |
129 | 135 | ||
@@ -132,8 +138,8 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
132 | unsigned int new; | 138 | unsigned int new; |
133 | unsigned long ip = rec->ip; | 139 | unsigned long ip = rec->ip; |
134 | 140 | ||
135 | /* ip, module: 0xc0000000, kernel: 0x80000000 */ | 141 | new = in_kernel_space(ip) ? insn_jal_ftrace_caller : |
136 | new = in_module(ip) ? insn_lui_v1_hi16_mcount : insn_jal_ftrace_caller; | 142 | insn_lui_v1_hi16_mcount; |
137 | 143 | ||
138 | return ftrace_modify_code(ip, new); | 144 | return ftrace_modify_code(ip, new); |
139 | } | 145 | } |
@@ -190,29 +196,25 @@ int ftrace_disable_ftrace_graph_caller(void) | |||
190 | #define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */ | 196 | #define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */ |
191 | #define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */ | 197 | #define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */ |
192 | 198 | ||
193 | unsigned long ftrace_get_parent_addr(unsigned long self_addr, | 199 | unsigned long ftrace_get_parent_ra_addr(unsigned long self_ra, unsigned long |
194 | unsigned long parent, | 200 | old_parent_ra, unsigned long parent_ra_addr, unsigned long fp) |
195 | unsigned long parent_addr, | ||
196 | unsigned long fp) | ||
197 | { | 201 | { |
198 | unsigned long sp, ip, ra; | 202 | unsigned long sp, ip, tmp; |
199 | unsigned int code; | 203 | unsigned int code; |
200 | int faulted; | 204 | int faulted; |
201 | 205 | ||
202 | /* | 206 | /* |
203 | * For module, move the ip from calling site of mcount to the | 207 | * For module, move the ip from the return address after the |
204 | * instruction "lui v1, hi_16bit_of_mcount"(offset is 20), but for | 208 | * instruction "lui v1, hi_16bit_of_mcount"(offset is 24), but for |
205 | * kernel, move to the instruction "move ra, at"(offset is 12) | 209 | * kernel, move after the instruction "move ra, at"(offset is 16) |
206 | */ | 210 | */ |
207 | ip = self_addr - (in_module(self_addr) ? 20 : 12); | 211 | ip = self_ra - (in_kernel_space(self_ra) ? 16 : 24); |
208 | 212 | ||
209 | /* | 213 | /* |
210 | * search the text until finding the non-store instruction or "s{d,w} | 214 | * search the text until finding the non-store instruction or "s{d,w} |
211 | * ra, offset(sp)" instruction | 215 | * ra, offset(sp)" instruction |
212 | */ | 216 | */ |
213 | do { | 217 | do { |
214 | ip -= 4; | ||
215 | |||
216 | /* get the code at "ip": code = *(unsigned int *)ip; */ | 218 | /* get the code at "ip": code = *(unsigned int *)ip; */ |
217 | safe_load_code(code, ip, faulted); | 219 | safe_load_code(code, ip, faulted); |
218 | 220 | ||
@@ -224,18 +226,20 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr, | |||
224 | * store the ra on the stack | 226 | * store the ra on the stack |
225 | */ | 227 | */ |
226 | if ((code & S_R_SP) != S_R_SP) | 228 | if ((code & S_R_SP) != S_R_SP) |
227 | return parent_addr; | 229 | return parent_ra_addr; |
228 | 230 | ||
229 | } while (((code & S_RA_SP) != S_RA_SP)); | 231 | /* Move to the next instruction */ |
232 | ip -= 4; | ||
233 | } while ((code & S_RA_SP) != S_RA_SP); | ||
230 | 234 | ||
231 | sp = fp + (code & OFFSET_MASK); | 235 | sp = fp + (code & OFFSET_MASK); |
232 | 236 | ||
233 | /* ra = *(unsigned long *)sp; */ | 237 | /* tmp = *(unsigned long *)sp; */ |
234 | safe_load_stack(ra, sp, faulted); | 238 | safe_load_stack(tmp, sp, faulted); |
235 | if (unlikely(faulted)) | 239 | if (unlikely(faulted)) |
236 | return 0; | 240 | return 0; |
237 | 241 | ||
238 | if (ra == parent) | 242 | if (tmp == old_parent_ra) |
239 | return sp; | 243 | return sp; |
240 | return 0; | 244 | return 0; |
241 | } | 245 | } |
@@ -246,21 +250,21 @@ unsigned long ftrace_get_parent_addr(unsigned long self_addr, | |||
246 | * Hook the return address and push it in the stack of return addrs | 250 | * Hook the return address and push it in the stack of return addrs |
247 | * in current thread info. | 251 | * in current thread info. |
248 | */ | 252 | */ |
249 | void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, | 253 | void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra, |
250 | unsigned long fp) | 254 | unsigned long fp) |
251 | { | 255 | { |
252 | unsigned long old; | 256 | unsigned long old_parent_ra; |
253 | struct ftrace_graph_ent trace; | 257 | struct ftrace_graph_ent trace; |
254 | unsigned long return_hooker = (unsigned long) | 258 | unsigned long return_hooker = (unsigned long) |
255 | &return_to_handler; | 259 | &return_to_handler; |
256 | int faulted; | 260 | int faulted, insns; |
257 | 261 | ||
258 | if (unlikely(atomic_read(¤t->tracing_graph_pause))) | 262 | if (unlikely(atomic_read(¤t->tracing_graph_pause))) |
259 | return; | 263 | return; |
260 | 264 | ||
261 | /* | 265 | /* |
262 | * "parent" is the stack address saved the return address of the caller | 266 | * "parent_ra_addr" is the stack address saved the return address of |
263 | * of _mcount. | 267 | * the caller of _mcount. |
264 | * | 268 | * |
265 | * if the gcc < 4.5, a leaf function does not save the return address | 269 | * if the gcc < 4.5, a leaf function does not save the return address |
266 | * in the stack address, so, we "emulate" one in _mcount's stack space, | 270 | * in the stack address, so, we "emulate" one in _mcount's stack space, |
@@ -275,37 +279,44 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, | |||
275 | * do it in ftrace_graph_caller of mcount.S. | 279 | * do it in ftrace_graph_caller of mcount.S. |
276 | */ | 280 | */ |
277 | 281 | ||
278 | /* old = *parent; */ | 282 | /* old_parent_ra = *parent_ra_addr; */ |
279 | safe_load_stack(old, parent, faulted); | 283 | safe_load_stack(old_parent_ra, parent_ra_addr, faulted); |
280 | if (unlikely(faulted)) | 284 | if (unlikely(faulted)) |
281 | goto out; | 285 | goto out; |
282 | #ifndef KBUILD_MCOUNT_RA_ADDRESS | 286 | #ifndef KBUILD_MCOUNT_RA_ADDRESS |
283 | parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old, | 287 | parent_ra_addr = (unsigned long *)ftrace_get_parent_ra_addr(self_ra, |
284 | (unsigned long)parent, fp); | 288 | old_parent_ra, (unsigned long)parent_ra_addr, fp); |
285 | /* | 289 | /* |
286 | * If fails when getting the stack address of the non-leaf function's | 290 | * If fails when getting the stack address of the non-leaf function's |
287 | * ra, stop function graph tracer and return | 291 | * ra, stop function graph tracer and return |
288 | */ | 292 | */ |
289 | if (parent == 0) | 293 | if (parent_ra_addr == 0) |
290 | goto out; | 294 | goto out; |
291 | #endif | 295 | #endif |
292 | /* *parent = return_hooker; */ | 296 | /* *parent_ra_addr = return_hooker; */ |
293 | safe_store_stack(return_hooker, parent, faulted); | 297 | safe_store_stack(return_hooker, parent_ra_addr, faulted); |
294 | if (unlikely(faulted)) | 298 | if (unlikely(faulted)) |
295 | goto out; | 299 | goto out; |
296 | 300 | ||
297 | if (ftrace_push_return_trace(old, self_addr, &trace.depth, fp) == | 301 | if (ftrace_push_return_trace(old_parent_ra, self_ra, &trace.depth, fp) |
298 | -EBUSY) { | 302 | == -EBUSY) { |
299 | *parent = old; | 303 | *parent_ra_addr = old_parent_ra; |
300 | return; | 304 | return; |
301 | } | 305 | } |
302 | 306 | ||
303 | trace.func = self_addr; | 307 | /* |
308 | * Get the recorded ip of the current mcount calling site in the | ||
309 | * __mcount_loc section, which will be used to filter the function | ||
310 | * entries configured through the tracing/set_graph_function interface. | ||
311 | */ | ||
312 | |||
313 | insns = in_kernel_space(self_ra) ? 2 : MCOUNT_OFFSET_INSNS + 1; | ||
314 | trace.func = self_ra - (MCOUNT_INSN_SIZE * insns); | ||
304 | 315 | ||
305 | /* Only trace if the calling function expects to */ | 316 | /* Only trace if the calling function expects to */ |
306 | if (!ftrace_graph_entry(&trace)) { | 317 | if (!ftrace_graph_entry(&trace)) { |
307 | current->curr_ret_stack--; | 318 | current->curr_ret_stack--; |
308 | *parent = old; | 319 | *parent_ra_addr = old_parent_ra; |
309 | } | 320 | } |
310 | return; | 321 | return; |
311 | out: | 322 | out: |
diff --git a/arch/mips/kernel/perf_event.c b/arch/mips/kernel/perf_event.c index 2b7f3f703b83..a8244854d3dc 100644 --- a/arch/mips/kernel/perf_event.c +++ b/arch/mips/kernel/perf_event.c | |||
@@ -161,41 +161,6 @@ mipspmu_event_set_period(struct perf_event *event, | |||
161 | return ret; | 161 | return ret; |
162 | } | 162 | } |
163 | 163 | ||
164 | static int mipspmu_enable(struct perf_event *event) | ||
165 | { | ||
166 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
167 | struct hw_perf_event *hwc = &event->hw; | ||
168 | int idx; | ||
169 | int err = 0; | ||
170 | |||
171 | /* To look for a free counter for this event. */ | ||
172 | idx = mipspmu->alloc_counter(cpuc, hwc); | ||
173 | if (idx < 0) { | ||
174 | err = idx; | ||
175 | goto out; | ||
176 | } | ||
177 | |||
178 | /* | ||
179 | * If there is an event in the counter we are going to use then | ||
180 | * make sure it is disabled. | ||
181 | */ | ||
182 | event->hw.idx = idx; | ||
183 | mipspmu->disable_event(idx); | ||
184 | cpuc->events[idx] = event; | ||
185 | |||
186 | /* Set the period for the event. */ | ||
187 | mipspmu_event_set_period(event, hwc, idx); | ||
188 | |||
189 | /* Enable the event. */ | ||
190 | mipspmu->enable_event(hwc, idx); | ||
191 | |||
192 | /* Propagate our changes to the userspace mapping. */ | ||
193 | perf_event_update_userpage(event); | ||
194 | |||
195 | out: | ||
196 | return err; | ||
197 | } | ||
198 | |||
199 | static void mipspmu_event_update(struct perf_event *event, | 164 | static void mipspmu_event_update(struct perf_event *event, |
200 | struct hw_perf_event *hwc, | 165 | struct hw_perf_event *hwc, |
201 | int idx) | 166 | int idx) |
@@ -204,7 +169,7 @@ static void mipspmu_event_update(struct perf_event *event, | |||
204 | unsigned long flags; | 169 | unsigned long flags; |
205 | int shift = 64 - TOTAL_BITS; | 170 | int shift = 64 - TOTAL_BITS; |
206 | s64 prev_raw_count, new_raw_count; | 171 | s64 prev_raw_count, new_raw_count; |
207 | s64 delta; | 172 | u64 delta; |
208 | 173 | ||
209 | again: | 174 | again: |
210 | prev_raw_count = local64_read(&hwc->prev_count); | 175 | prev_raw_count = local64_read(&hwc->prev_count); |
@@ -231,32 +196,90 @@ again: | |||
231 | return; | 196 | return; |
232 | } | 197 | } |
233 | 198 | ||
234 | static void mipspmu_disable(struct perf_event *event) | 199 | static void mipspmu_start(struct perf_event *event, int flags) |
200 | { | ||
201 | struct hw_perf_event *hwc = &event->hw; | ||
202 | |||
203 | if (!mipspmu) | ||
204 | return; | ||
205 | |||
206 | if (flags & PERF_EF_RELOAD) | ||
207 | WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE)); | ||
208 | |||
209 | hwc->state = 0; | ||
210 | |||
211 | /* Set the period for the event. */ | ||
212 | mipspmu_event_set_period(event, hwc, hwc->idx); | ||
213 | |||
214 | /* Enable the event. */ | ||
215 | mipspmu->enable_event(hwc, hwc->idx); | ||
216 | } | ||
217 | |||
218 | static void mipspmu_stop(struct perf_event *event, int flags) | ||
219 | { | ||
220 | struct hw_perf_event *hwc = &event->hw; | ||
221 | |||
222 | if (!mipspmu) | ||
223 | return; | ||
224 | |||
225 | if (!(hwc->state & PERF_HES_STOPPED)) { | ||
226 | /* We are working on a local event. */ | ||
227 | mipspmu->disable_event(hwc->idx); | ||
228 | barrier(); | ||
229 | mipspmu_event_update(event, hwc, hwc->idx); | ||
230 | hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; | ||
231 | } | ||
232 | } | ||
233 | |||
234 | static int mipspmu_add(struct perf_event *event, int flags) | ||
235 | { | 235 | { |
236 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 236 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
237 | struct hw_perf_event *hwc = &event->hw; | 237 | struct hw_perf_event *hwc = &event->hw; |
238 | int idx = hwc->idx; | 238 | int idx; |
239 | int err = 0; | ||
239 | 240 | ||
241 | perf_pmu_disable(event->pmu); | ||
240 | 242 | ||
241 | WARN_ON(idx < 0 || idx >= mipspmu->num_counters); | 243 | /* To look for a free counter for this event. */ |
244 | idx = mipspmu->alloc_counter(cpuc, hwc); | ||
245 | if (idx < 0) { | ||
246 | err = idx; | ||
247 | goto out; | ||
248 | } | ||
242 | 249 | ||
243 | /* We are working on a local event. */ | 250 | /* |
251 | * If there is an event in the counter we are going to use then | ||
252 | * make sure it is disabled. | ||
253 | */ | ||
254 | event->hw.idx = idx; | ||
244 | mipspmu->disable_event(idx); | 255 | mipspmu->disable_event(idx); |
256 | cpuc->events[idx] = event; | ||
245 | 257 | ||
246 | barrier(); | 258 | hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE; |
247 | 259 | if (flags & PERF_EF_START) | |
248 | mipspmu_event_update(event, hwc, idx); | 260 | mipspmu_start(event, PERF_EF_RELOAD); |
249 | cpuc->events[idx] = NULL; | ||
250 | clear_bit(idx, cpuc->used_mask); | ||
251 | 261 | ||
262 | /* Propagate our changes to the userspace mapping. */ | ||
252 | perf_event_update_userpage(event); | 263 | perf_event_update_userpage(event); |
264 | |||
265 | out: | ||
266 | perf_pmu_enable(event->pmu); | ||
267 | return err; | ||
253 | } | 268 | } |
254 | 269 | ||
255 | static void mipspmu_unthrottle(struct perf_event *event) | 270 | static void mipspmu_del(struct perf_event *event, int flags) |
256 | { | 271 | { |
272 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
257 | struct hw_perf_event *hwc = &event->hw; | 273 | struct hw_perf_event *hwc = &event->hw; |
274 | int idx = hwc->idx; | ||
258 | 275 | ||
259 | mipspmu->enable_event(hwc, hwc->idx); | 276 | WARN_ON(idx < 0 || idx >= mipspmu->num_counters); |
277 | |||
278 | mipspmu_stop(event, PERF_EF_UPDATE); | ||
279 | cpuc->events[idx] = NULL; | ||
280 | clear_bit(idx, cpuc->used_mask); | ||
281 | |||
282 | perf_event_update_userpage(event); | ||
260 | } | 283 | } |
261 | 284 | ||
262 | static void mipspmu_read(struct perf_event *event) | 285 | static void mipspmu_read(struct perf_event *event) |
@@ -270,12 +293,17 @@ static void mipspmu_read(struct perf_event *event) | |||
270 | mipspmu_event_update(event, hwc, hwc->idx); | 293 | mipspmu_event_update(event, hwc, hwc->idx); |
271 | } | 294 | } |
272 | 295 | ||
273 | static struct pmu pmu = { | 296 | static void mipspmu_enable(struct pmu *pmu) |
274 | .enable = mipspmu_enable, | 297 | { |
275 | .disable = mipspmu_disable, | 298 | if (mipspmu) |
276 | .unthrottle = mipspmu_unthrottle, | 299 | mipspmu->start(); |
277 | .read = mipspmu_read, | 300 | } |
278 | }; | 301 | |
302 | static void mipspmu_disable(struct pmu *pmu) | ||
303 | { | ||
304 | if (mipspmu) | ||
305 | mipspmu->stop(); | ||
306 | } | ||
279 | 307 | ||
280 | static atomic_t active_events = ATOMIC_INIT(0); | 308 | static atomic_t active_events = ATOMIC_INIT(0); |
281 | static DEFINE_MUTEX(pmu_reserve_mutex); | 309 | static DEFINE_MUTEX(pmu_reserve_mutex); |
@@ -318,6 +346,82 @@ static void mipspmu_free_irq(void) | |||
318 | perf_irq = save_perf_irq; | 346 | perf_irq = save_perf_irq; |
319 | } | 347 | } |
320 | 348 | ||
349 | /* | ||
350 | * mipsxx/rm9000/loongson2 have different performance counters, they have | ||
351 | * specific low-level init routines. | ||
352 | */ | ||
353 | static void reset_counters(void *arg); | ||
354 | static int __hw_perf_event_init(struct perf_event *event); | ||
355 | |||
356 | static void hw_perf_event_destroy(struct perf_event *event) | ||
357 | { | ||
358 | if (atomic_dec_and_mutex_lock(&active_events, | ||
359 | &pmu_reserve_mutex)) { | ||
360 | /* | ||
361 | * We must not call the destroy function with interrupts | ||
362 | * disabled. | ||
363 | */ | ||
364 | on_each_cpu(reset_counters, | ||
365 | (void *)(long)mipspmu->num_counters, 1); | ||
366 | mipspmu_free_irq(); | ||
367 | mutex_unlock(&pmu_reserve_mutex); | ||
368 | } | ||
369 | } | ||
370 | |||
371 | static int mipspmu_event_init(struct perf_event *event) | ||
372 | { | ||
373 | int err = 0; | ||
374 | |||
375 | switch (event->attr.type) { | ||
376 | case PERF_TYPE_RAW: | ||
377 | case PERF_TYPE_HARDWARE: | ||
378 | case PERF_TYPE_HW_CACHE: | ||
379 | break; | ||
380 | |||
381 | default: | ||
382 | return -ENOENT; | ||
383 | } | ||
384 | |||
385 | if (!mipspmu || event->cpu >= nr_cpumask_bits || | ||
386 | (event->cpu >= 0 && !cpu_online(event->cpu))) | ||
387 | return -ENODEV; | ||
388 | |||
389 | if (!atomic_inc_not_zero(&active_events)) { | ||
390 | if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { | ||
391 | atomic_dec(&active_events); | ||
392 | return -ENOSPC; | ||
393 | } | ||
394 | |||
395 | mutex_lock(&pmu_reserve_mutex); | ||
396 | if (atomic_read(&active_events) == 0) | ||
397 | err = mipspmu_get_irq(); | ||
398 | |||
399 | if (!err) | ||
400 | atomic_inc(&active_events); | ||
401 | mutex_unlock(&pmu_reserve_mutex); | ||
402 | } | ||
403 | |||
404 | if (err) | ||
405 | return err; | ||
406 | |||
407 | err = __hw_perf_event_init(event); | ||
408 | if (err) | ||
409 | hw_perf_event_destroy(event); | ||
410 | |||
411 | return err; | ||
412 | } | ||
413 | |||
414 | static struct pmu pmu = { | ||
415 | .pmu_enable = mipspmu_enable, | ||
416 | .pmu_disable = mipspmu_disable, | ||
417 | .event_init = mipspmu_event_init, | ||
418 | .add = mipspmu_add, | ||
419 | .del = mipspmu_del, | ||
420 | .start = mipspmu_start, | ||
421 | .stop = mipspmu_stop, | ||
422 | .read = mipspmu_read, | ||
423 | }; | ||
424 | |||
321 | static inline unsigned int | 425 | static inline unsigned int |
322 | mipspmu_perf_event_encode(const struct mips_perf_event *pev) | 426 | mipspmu_perf_event_encode(const struct mips_perf_event *pev) |
323 | { | 427 | { |
@@ -382,8 +486,9 @@ static int validate_event(struct cpu_hw_events *cpuc, | |||
382 | { | 486 | { |
383 | struct hw_perf_event fake_hwc = event->hw; | 487 | struct hw_perf_event fake_hwc = event->hw; |
384 | 488 | ||
385 | if (event->pmu && event->pmu != &pmu) | 489 | /* Allow mixed event group. So return 1 to pass validation. */ |
386 | return 0; | 490 | if (event->pmu != &pmu || event->state <= PERF_EVENT_STATE_OFF) |
491 | return 1; | ||
387 | 492 | ||
388 | return mipspmu->alloc_counter(cpuc, &fake_hwc) >= 0; | 493 | return mipspmu->alloc_counter(cpuc, &fake_hwc) >= 0; |
389 | } | 494 | } |
@@ -409,73 +514,6 @@ static int validate_group(struct perf_event *event) | |||
409 | return 0; | 514 | return 0; |
410 | } | 515 | } |
411 | 516 | ||
412 | /* | ||
413 | * mipsxx/rm9000/loongson2 have different performance counters, they have | ||
414 | * specific low-level init routines. | ||
415 | */ | ||
416 | static void reset_counters(void *arg); | ||
417 | static int __hw_perf_event_init(struct perf_event *event); | ||
418 | |||
419 | static void hw_perf_event_destroy(struct perf_event *event) | ||
420 | { | ||
421 | if (atomic_dec_and_mutex_lock(&active_events, | ||
422 | &pmu_reserve_mutex)) { | ||
423 | /* | ||
424 | * We must not call the destroy function with interrupts | ||
425 | * disabled. | ||
426 | */ | ||
427 | on_each_cpu(reset_counters, | ||
428 | (void *)(long)mipspmu->num_counters, 1); | ||
429 | mipspmu_free_irq(); | ||
430 | mutex_unlock(&pmu_reserve_mutex); | ||
431 | } | ||
432 | } | ||
433 | |||
434 | const struct pmu *hw_perf_event_init(struct perf_event *event) | ||
435 | { | ||
436 | int err = 0; | ||
437 | |||
438 | if (!mipspmu || event->cpu >= nr_cpumask_bits || | ||
439 | (event->cpu >= 0 && !cpu_online(event->cpu))) | ||
440 | return ERR_PTR(-ENODEV); | ||
441 | |||
442 | if (!atomic_inc_not_zero(&active_events)) { | ||
443 | if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) { | ||
444 | atomic_dec(&active_events); | ||
445 | return ERR_PTR(-ENOSPC); | ||
446 | } | ||
447 | |||
448 | mutex_lock(&pmu_reserve_mutex); | ||
449 | if (atomic_read(&active_events) == 0) | ||
450 | err = mipspmu_get_irq(); | ||
451 | |||
452 | if (!err) | ||
453 | atomic_inc(&active_events); | ||
454 | mutex_unlock(&pmu_reserve_mutex); | ||
455 | } | ||
456 | |||
457 | if (err) | ||
458 | return ERR_PTR(err); | ||
459 | |||
460 | err = __hw_perf_event_init(event); | ||
461 | if (err) | ||
462 | hw_perf_event_destroy(event); | ||
463 | |||
464 | return err ? ERR_PTR(err) : &pmu; | ||
465 | } | ||
466 | |||
467 | void hw_perf_enable(void) | ||
468 | { | ||
469 | if (mipspmu) | ||
470 | mipspmu->start(); | ||
471 | } | ||
472 | |||
473 | void hw_perf_disable(void) | ||
474 | { | ||
475 | if (mipspmu) | ||
476 | mipspmu->stop(); | ||
477 | } | ||
478 | |||
479 | /* This is needed by specific irq handlers in perf_event_*.c */ | 517 | /* This is needed by specific irq handlers in perf_event_*.c */ |
480 | static void | 518 | static void |
481 | handle_associated_event(struct cpu_hw_events *cpuc, | 519 | handle_associated_event(struct cpu_hw_events *cpuc, |
@@ -496,21 +534,13 @@ handle_associated_event(struct cpu_hw_events *cpuc, | |||
496 | #include "perf_event_mipsxx.c" | 534 | #include "perf_event_mipsxx.c" |
497 | 535 | ||
498 | /* Callchain handling code. */ | 536 | /* Callchain handling code. */ |
499 | static inline void | ||
500 | callchain_store(struct perf_callchain_entry *entry, | ||
501 | u64 ip) | ||
502 | { | ||
503 | if (entry->nr < PERF_MAX_STACK_DEPTH) | ||
504 | entry->ip[entry->nr++] = ip; | ||
505 | } | ||
506 | 537 | ||
507 | /* | 538 | /* |
508 | * Leave userspace callchain empty for now. When we find a way to trace | 539 | * Leave userspace callchain empty for now. When we find a way to trace |
509 | * the user stack callchains, we add here. | 540 | * the user stack callchains, we add here. |
510 | */ | 541 | */ |
511 | static void | 542 | void perf_callchain_user(struct perf_callchain_entry *entry, |
512 | perf_callchain_user(struct pt_regs *regs, | 543 | struct pt_regs *regs) |
513 | struct perf_callchain_entry *entry) | ||
514 | { | 544 | { |
515 | } | 545 | } |
516 | 546 | ||
@@ -523,23 +553,21 @@ static void save_raw_perf_callchain(struct perf_callchain_entry *entry, | |||
523 | while (!kstack_end(sp)) { | 553 | while (!kstack_end(sp)) { |
524 | addr = *sp++; | 554 | addr = *sp++; |
525 | if (__kernel_text_address(addr)) { | 555 | if (__kernel_text_address(addr)) { |
526 | callchain_store(entry, addr); | 556 | perf_callchain_store(entry, addr); |
527 | if (entry->nr >= PERF_MAX_STACK_DEPTH) | 557 | if (entry->nr >= PERF_MAX_STACK_DEPTH) |
528 | break; | 558 | break; |
529 | } | 559 | } |
530 | } | 560 | } |
531 | } | 561 | } |
532 | 562 | ||
533 | static void | 563 | void perf_callchain_kernel(struct perf_callchain_entry *entry, |
534 | perf_callchain_kernel(struct pt_regs *regs, | 564 | struct pt_regs *regs) |
535 | struct perf_callchain_entry *entry) | ||
536 | { | 565 | { |
537 | unsigned long sp = regs->regs[29]; | 566 | unsigned long sp = regs->regs[29]; |
538 | #ifdef CONFIG_KALLSYMS | 567 | #ifdef CONFIG_KALLSYMS |
539 | unsigned long ra = regs->regs[31]; | 568 | unsigned long ra = regs->regs[31]; |
540 | unsigned long pc = regs->cp0_epc; | 569 | unsigned long pc = regs->cp0_epc; |
541 | 570 | ||
542 | callchain_store(entry, PERF_CONTEXT_KERNEL); | ||
543 | if (raw_show_trace || !__kernel_text_address(pc)) { | 571 | if (raw_show_trace || !__kernel_text_address(pc)) { |
544 | unsigned long stack_page = | 572 | unsigned long stack_page = |
545 | (unsigned long)task_stack_page(current); | 573 | (unsigned long)task_stack_page(current); |
@@ -549,53 +577,12 @@ perf_callchain_kernel(struct pt_regs *regs, | |||
549 | return; | 577 | return; |
550 | } | 578 | } |
551 | do { | 579 | do { |
552 | callchain_store(entry, pc); | 580 | perf_callchain_store(entry, pc); |
553 | if (entry->nr >= PERF_MAX_STACK_DEPTH) | 581 | if (entry->nr >= PERF_MAX_STACK_DEPTH) |
554 | break; | 582 | break; |
555 | pc = unwind_stack(current, &sp, pc, &ra); | 583 | pc = unwind_stack(current, &sp, pc, &ra); |
556 | } while (pc); | 584 | } while (pc); |
557 | #else | 585 | #else |
558 | callchain_store(entry, PERF_CONTEXT_KERNEL); | ||
559 | save_raw_perf_callchain(entry, sp); | 586 | save_raw_perf_callchain(entry, sp); |
560 | #endif | 587 | #endif |
561 | } | 588 | } |
562 | |||
563 | static void | ||
564 | perf_do_callchain(struct pt_regs *regs, | ||
565 | struct perf_callchain_entry *entry) | ||
566 | { | ||
567 | int is_user; | ||
568 | |||
569 | if (!regs) | ||
570 | return; | ||
571 | |||
572 | is_user = user_mode(regs); | ||
573 | |||
574 | if (!current || !current->pid) | ||
575 | return; | ||
576 | |||
577 | if (is_user && current->state != TASK_RUNNING) | ||
578 | return; | ||
579 | |||
580 | if (!is_user) { | ||
581 | perf_callchain_kernel(regs, entry); | ||
582 | if (current->mm) | ||
583 | regs = task_pt_regs(current); | ||
584 | else | ||
585 | regs = NULL; | ||
586 | } | ||
587 | if (regs) | ||
588 | perf_callchain_user(regs, entry); | ||
589 | } | ||
590 | |||
591 | static DEFINE_PER_CPU(struct perf_callchain_entry, pmc_irq_entry); | ||
592 | |||
593 | struct perf_callchain_entry * | ||
594 | perf_callchain(struct pt_regs *regs) | ||
595 | { | ||
596 | struct perf_callchain_entry *entry = &__get_cpu_var(pmc_irq_entry); | ||
597 | |||
598 | entry->nr = 0; | ||
599 | perf_do_callchain(regs, entry); | ||
600 | return entry; | ||
601 | } | ||
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index 183e0d226669..d9a7db78ed62 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c | |||
@@ -696,7 +696,7 @@ static int mipsxx_pmu_handle_shared_irq(void) | |||
696 | * interrupt, not NMI. | 696 | * interrupt, not NMI. |
697 | */ | 697 | */ |
698 | if (handled == IRQ_HANDLED) | 698 | if (handled == IRQ_HANDLED) |
699 | perf_event_do_pending(); | 699 | irq_work_run(); |
700 | 700 | ||
701 | #ifdef CONFIG_MIPS_MT_SMP | 701 | #ifdef CONFIG_MIPS_MT_SMP |
702 | read_unlock(&pmuint_rwlock); | 702 | read_unlock(&pmuint_rwlock); |
@@ -1045,6 +1045,8 @@ init_hw_perf_events(void) | |||
1045 | "CPU, irq %d%s\n", mipspmu->name, counters, irq, | 1045 | "CPU, irq %d%s\n", mipspmu->name, counters, irq, |
1046 | irq < 0 ? " (share with timer interrupt)" : ""); | 1046 | irq < 0 ? " (share with timer interrupt)" : ""); |
1047 | 1047 | ||
1048 | perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW); | ||
1049 | |||
1048 | return 0; | 1050 | return 0; |
1049 | } | 1051 | } |
1050 | early_initcall(init_hw_perf_events); | 1052 | early_initcall(init_hw_perf_events); |
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index 5922342bca39..dbbe0ce48d89 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c | |||
@@ -84,7 +84,7 @@ static int protected_save_fp_context(struct sigcontext __user *sc) | |||
84 | 84 | ||
85 | static int protected_restore_fp_context(struct sigcontext __user *sc) | 85 | static int protected_restore_fp_context(struct sigcontext __user *sc) |
86 | { | 86 | { |
87 | int err, tmp; | 87 | int err, tmp __maybe_unused; |
88 | while (1) { | 88 | while (1) { |
89 | lock_fpu_owner(); | 89 | lock_fpu_owner(); |
90 | own_fpu_inatomic(0); | 90 | own_fpu_inatomic(0); |
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index a0ed0e052b2e..aae986613795 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c | |||
@@ -115,7 +115,7 @@ static int protected_save_fp_context32(struct sigcontext32 __user *sc) | |||
115 | 115 | ||
116 | static int protected_restore_fp_context32(struct sigcontext32 __user *sc) | 116 | static int protected_restore_fp_context32(struct sigcontext32 __user *sc) |
117 | { | 117 | { |
118 | int err, tmp; | 118 | int err, tmp __maybe_unused; |
119 | while (1) { | 119 | while (1) { |
120 | lock_fpu_owner(); | 120 | lock_fpu_owner(); |
121 | own_fpu_inatomic(0); | 121 | own_fpu_inatomic(0); |
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index 383aeb95cb49..32a256101082 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
@@ -193,6 +193,22 @@ void __devinit smp_prepare_boot_cpu(void) | |||
193 | */ | 193 | */ |
194 | static struct task_struct *cpu_idle_thread[NR_CPUS]; | 194 | static struct task_struct *cpu_idle_thread[NR_CPUS]; |
195 | 195 | ||
196 | struct create_idle { | ||
197 | struct work_struct work; | ||
198 | struct task_struct *idle; | ||
199 | struct completion done; | ||
200 | int cpu; | ||
201 | }; | ||
202 | |||
203 | static void __cpuinit do_fork_idle(struct work_struct *work) | ||
204 | { | ||
205 | struct create_idle *c_idle = | ||
206 | container_of(work, struct create_idle, work); | ||
207 | |||
208 | c_idle->idle = fork_idle(c_idle->cpu); | ||
209 | complete(&c_idle->done); | ||
210 | } | ||
211 | |||
196 | int __cpuinit __cpu_up(unsigned int cpu) | 212 | int __cpuinit __cpu_up(unsigned int cpu) |
197 | { | 213 | { |
198 | struct task_struct *idle; | 214 | struct task_struct *idle; |
@@ -203,8 +219,19 @@ int __cpuinit __cpu_up(unsigned int cpu) | |||
203 | * Linux can schedule processes on this slave. | 219 | * Linux can schedule processes on this slave. |
204 | */ | 220 | */ |
205 | if (!cpu_idle_thread[cpu]) { | 221 | if (!cpu_idle_thread[cpu]) { |
206 | idle = fork_idle(cpu); | 222 | /* |
207 | cpu_idle_thread[cpu] = idle; | 223 | * Schedule work item to avoid forking user task |
224 | * Ported from arch/x86/kernel/smpboot.c | ||
225 | */ | ||
226 | struct create_idle c_idle = { | ||
227 | .cpu = cpu, | ||
228 | .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done), | ||
229 | }; | ||
230 | |||
231 | INIT_WORK_ONSTACK(&c_idle.work, do_fork_idle); | ||
232 | schedule_work(&c_idle.work); | ||
233 | wait_for_completion(&c_idle.done); | ||
234 | idle = cpu_idle_thread[cpu] = c_idle.idle; | ||
208 | 235 | ||
209 | if (IS_ERR(idle)) | 236 | if (IS_ERR(idle)) |
210 | panic(KERN_ERR "Fork failed for CPU %d", cpu); | 237 | panic(KERN_ERR "Fork failed for CPU %d", cpu); |
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 1dc6edff45e0..58beabf50b3c 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c | |||
@@ -383,12 +383,11 @@ save_static_function(sys_sysmips); | |||
383 | static int __used noinline | 383 | static int __used noinline |
384 | _sys_sysmips(nabi_no_regargs struct pt_regs regs) | 384 | _sys_sysmips(nabi_no_regargs struct pt_regs regs) |
385 | { | 385 | { |
386 | long cmd, arg1, arg2, arg3; | 386 | long cmd, arg1, arg2; |
387 | 387 | ||
388 | cmd = regs.regs[4]; | 388 | cmd = regs.regs[4]; |
389 | arg1 = regs.regs[5]; | 389 | arg1 = regs.regs[5]; |
390 | arg2 = regs.regs[6]; | 390 | arg2 = regs.regs[6]; |
391 | arg3 = regs.regs[7]; | ||
392 | 391 | ||
393 | switch (cmd) { | 392 | switch (cmd) { |
394 | case MIPS_ATOMIC_SET: | 393 | case MIPS_ATOMIC_SET: |
@@ -405,7 +404,7 @@ _sys_sysmips(nabi_no_regargs struct pt_regs regs) | |||
405 | if (arg1 & 2) | 404 | if (arg1 & 2) |
406 | set_thread_flag(TIF_LOGADE); | 405 | set_thread_flag(TIF_LOGADE); |
407 | else | 406 | else |
408 | clear_thread_flag(TIF_FIXADE); | 407 | clear_thread_flag(TIF_LOGADE); |
409 | 408 | ||
410 | return 0; | 409 | return 0; |
411 | 410 | ||
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 6a1fdfef8fde..ab52b7cf3b6b 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
@@ -148,9 +148,9 @@ struct { | |||
148 | spinlock_t tc_list_lock; | 148 | spinlock_t tc_list_lock; |
149 | struct list_head tc_list; /* Thread contexts */ | 149 | struct list_head tc_list; /* Thread contexts */ |
150 | } vpecontrol = { | 150 | } vpecontrol = { |
151 | .vpe_list_lock = SPIN_LOCK_UNLOCKED, | 151 | .vpe_list_lock = __SPIN_LOCK_UNLOCKED(vpe_list_lock), |
152 | .vpe_list = LIST_HEAD_INIT(vpecontrol.vpe_list), | 152 | .vpe_list = LIST_HEAD_INIT(vpecontrol.vpe_list), |
153 | .tc_list_lock = SPIN_LOCK_UNLOCKED, | 153 | .tc_list_lock = __SPIN_LOCK_UNLOCKED(tc_list_lock), |
154 | .tc_list = LIST_HEAD_INIT(vpecontrol.tc_list) | 154 | .tc_list = LIST_HEAD_INIT(vpecontrol.tc_list) |
155 | }; | 155 | }; |
156 | 156 | ||
diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig index 6e1b77fec7ea..aca93eed8779 100644 --- a/arch/mips/loongson/Kconfig +++ b/arch/mips/loongson/Kconfig | |||
@@ -1,6 +1,7 @@ | |||
1 | if MACH_LOONGSON | ||
2 | |||
1 | choice | 3 | choice |
2 | prompt "Machine Type" | 4 | prompt "Machine Type" |
3 | depends on MACH_LOONGSON | ||
4 | 5 | ||
5 | config LEMOTE_FULOONG2E | 6 | config LEMOTE_FULOONG2E |
6 | bool "Lemote Fuloong(2e) mini-PC" | 7 | bool "Lemote Fuloong(2e) mini-PC" |
@@ -87,3 +88,5 @@ config LOONGSON_UART_BASE | |||
87 | config LOONGSON_MC146818 | 88 | config LOONGSON_MC146818 |
88 | bool | 89 | bool |
89 | default n | 90 | default n |
91 | |||
92 | endif # MACH_LOONGSON | ||
diff --git a/arch/mips/loongson/common/cmdline.c b/arch/mips/loongson/common/cmdline.c index 1a06defc4f7f..353e1d2e41a5 100644 --- a/arch/mips/loongson/common/cmdline.c +++ b/arch/mips/loongson/common/cmdline.c | |||
@@ -44,10 +44,5 @@ void __init prom_init_cmdline(void) | |||
44 | strcat(arcs_cmdline, " "); | 44 | strcat(arcs_cmdline, " "); |
45 | } | 45 | } |
46 | 46 | ||
47 | if ((strstr(arcs_cmdline, "console=")) == NULL) | ||
48 | strcat(arcs_cmdline, " console=ttyS0,115200"); | ||
49 | if ((strstr(arcs_cmdline, "root=")) == NULL) | ||
50 | strcat(arcs_cmdline, " root=/dev/hda1"); | ||
51 | |||
52 | prom_init_machtype(); | 47 | prom_init_machtype(); |
53 | } | 48 | } |
diff --git a/arch/mips/loongson/common/machtype.c b/arch/mips/loongson/common/machtype.c index 81fbe6b73f91..2efd5d9dee27 100644 --- a/arch/mips/loongson/common/machtype.c +++ b/arch/mips/loongson/common/machtype.c | |||
@@ -41,7 +41,7 @@ void __weak __init mach_prom_init_machtype(void) | |||
41 | 41 | ||
42 | void __init prom_init_machtype(void) | 42 | void __init prom_init_machtype(void) |
43 | { | 43 | { |
44 | char *p, str[MACHTYPE_LEN]; | 44 | char *p, str[MACHTYPE_LEN + 1]; |
45 | int machtype = MACH_LEMOTE_FL2E; | 45 | int machtype = MACH_LEMOTE_FL2E; |
46 | 46 | ||
47 | mips_machtype = LOONGSON_MACHTYPE; | 47 | mips_machtype = LOONGSON_MACHTYPE; |
@@ -53,6 +53,7 @@ void __init prom_init_machtype(void) | |||
53 | } | 53 | } |
54 | p += strlen("machtype="); | 54 | p += strlen("machtype="); |
55 | strncpy(str, p, MACHTYPE_LEN); | 55 | strncpy(str, p, MACHTYPE_LEN); |
56 | str[MACHTYPE_LEN] = '\0'; | ||
56 | p = strstr(str, " "); | 57 | p = strstr(str, " "); |
57 | if (p) | 58 | if (p) |
58 | *p = '\0'; | 59 | *p = '\0'; |
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h index 2701d9500959..2a7d43f4f161 100644 --- a/arch/mips/math-emu/ieee754int.h +++ b/arch/mips/math-emu/ieee754int.h | |||
@@ -70,7 +70,7 @@ | |||
70 | 70 | ||
71 | 71 | ||
72 | #define COMPXSP \ | 72 | #define COMPXSP \ |
73 | unsigned xm; int xe; int xs; int xc | 73 | unsigned xm; int xe; int xs __maybe_unused; int xc |
74 | 74 | ||
75 | #define COMPYSP \ | 75 | #define COMPYSP \ |
76 | unsigned ym; int ye; int ys; int yc | 76 | unsigned ym; int ye; int ys; int yc |
@@ -104,7 +104,7 @@ | |||
104 | 104 | ||
105 | 105 | ||
106 | #define COMPXDP \ | 106 | #define COMPXDP \ |
107 | u64 xm; int xe; int xs; int xc | 107 | u64 xm; int xe; int xs __maybe_unused; int xc |
108 | 108 | ||
109 | #define COMPYDP \ | 109 | #define COMPYDP \ |
110 | u64 ym; int ye; int ys; int yc | 110 | u64 ym; int ye; int ys; int yc |
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 2efcbd24c82f..279599e9a779 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -324,7 +324,7 @@ int page_is_ram(unsigned long pagenr) | |||
324 | void __init paging_init(void) | 324 | void __init paging_init(void) |
325 | { | 325 | { |
326 | unsigned long max_zone_pfns[MAX_NR_ZONES]; | 326 | unsigned long max_zone_pfns[MAX_NR_ZONES]; |
327 | unsigned long lastpfn; | 327 | unsigned long lastpfn __maybe_unused; |
328 | 328 | ||
329 | pagetable_init(); | 329 | pagetable_init(); |
330 | 330 | ||
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 083d3412d0bc..04f9e17db9d0 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
@@ -109,6 +109,8 @@ static bool scratchpad_available(void) | |||
109 | static int scratchpad_offset(int i) | 109 | static int scratchpad_offset(int i) |
110 | { | 110 | { |
111 | BUG(); | 111 | BUG(); |
112 | /* Really unreachable, but evidently some GCC want this. */ | ||
113 | return 0; | ||
112 | } | 114 | } |
113 | #endif | 115 | #endif |
114 | /* | 116 | /* |
diff --git a/arch/mips/pci/ops-pmcmsp.c b/arch/mips/pci/ops-pmcmsp.c index b7c03d80c88c..68798f869c0f 100644 --- a/arch/mips/pci/ops-pmcmsp.c +++ b/arch/mips/pci/ops-pmcmsp.c | |||
@@ -308,7 +308,7 @@ static struct resource pci_mem_resource = { | |||
308 | * RETURNS: PCIBIOS_SUCCESSFUL - success | 308 | * RETURNS: PCIBIOS_SUCCESSFUL - success |
309 | * | 309 | * |
310 | ****************************************************************************/ | 310 | ****************************************************************************/ |
311 | static int bpci_interrupt(int irq, void *dev_id) | 311 | static irqreturn_t bpci_interrupt(int irq, void *dev_id) |
312 | { | 312 | { |
313 | struct msp_pci_regs *preg = (void *)PCI_BASE_REG; | 313 | struct msp_pci_regs *preg = (void *)PCI_BASE_REG; |
314 | unsigned int stat = preg->if_status; | 314 | unsigned int stat = preg->if_status; |
@@ -326,7 +326,7 @@ static int bpci_interrupt(int irq, void *dev_id) | |||
326 | /* write to clear all asserted interrupts */ | 326 | /* write to clear all asserted interrupts */ |
327 | preg->if_status = stat; | 327 | preg->if_status = stat; |
328 | 328 | ||
329 | return PCIBIOS_SUCCESSFUL; | 329 | return IRQ_HANDLED; |
330 | } | 330 | } |
331 | 331 | ||
332 | /***************************************************************************** | 332 | /***************************************************************************** |
diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig index c139988bb85d..8d798497c614 100644 --- a/arch/mips/pmc-sierra/Kconfig +++ b/arch/mips/pmc-sierra/Kconfig | |||
@@ -4,15 +4,11 @@ choice | |||
4 | 4 | ||
5 | config PMC_MSP4200_EVAL | 5 | config PMC_MSP4200_EVAL |
6 | bool "PMC-Sierra MSP4200 Eval Board" | 6 | bool "PMC-Sierra MSP4200 Eval Board" |
7 | select CEVT_R4K | ||
8 | select CSRC_R4K | ||
9 | select IRQ_MSP_SLP | 7 | select IRQ_MSP_SLP |
10 | select HW_HAS_PCI | 8 | select HW_HAS_PCI |
11 | 9 | ||
12 | config PMC_MSP4200_GW | 10 | config PMC_MSP4200_GW |
13 | bool "PMC-Sierra MSP4200 VoIP Gateway" | 11 | bool "PMC-Sierra MSP4200 VoIP Gateway" |
14 | select CEVT_R4K | ||
15 | select CSRC_R4K | ||
16 | select IRQ_MSP_SLP | 12 | select IRQ_MSP_SLP |
17 | select HW_HAS_PCI | 13 | select HW_HAS_PCI |
18 | 14 | ||
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_time.c b/arch/mips/pmc-sierra/msp71xx/msp_time.c index cca64e15f57f..01df84ce31e2 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_time.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_time.c | |||
@@ -81,7 +81,7 @@ void __init plat_time_init(void) | |||
81 | mips_hpt_frequency = cpu_rate/2; | 81 | mips_hpt_frequency = cpu_rate/2; |
82 | } | 82 | } |
83 | 83 | ||
84 | unsigned int __init get_c0_compare_int(void) | 84 | unsigned int __cpuinit get_c0_compare_int(void) |
85 | { | 85 | { |
86 | return MSP_INT_VPE0_TIMER; | 86 | return MSP_INT_VPE0_TIMER; |
87 | } | 87 | } |
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h index 92d2f9298e38..9d773a639513 100644 --- a/arch/mn10300/include/asm/atomic.h +++ b/arch/mn10300/include/asm/atomic.h | |||
@@ -139,7 +139,7 @@ static inline unsigned long __cmpxchg(volatile unsigned long *m, | |||
139 | * Atomically reads the value of @v. Note that the guaranteed | 139 | * Atomically reads the value of @v. Note that the guaranteed |
140 | * useful range of an atomic_t is only 24 bits. | 140 | * useful range of an atomic_t is only 24 bits. |
141 | */ | 141 | */ |
142 | #define atomic_read(v) ((v)->counter) | 142 | #define atomic_read(v) (ACCESS_ONCE((v)->counter)) |
143 | 143 | ||
144 | /** | 144 | /** |
145 | * atomic_set - set atomic variable | 145 | * atomic_set - set atomic variable |
diff --git a/arch/mn10300/include/asm/uaccess.h b/arch/mn10300/include/asm/uaccess.h index 679dee0bbd08..3d6e60dad9d9 100644 --- a/arch/mn10300/include/asm/uaccess.h +++ b/arch/mn10300/include/asm/uaccess.h | |||
@@ -160,9 +160,10 @@ struct __large_struct { unsigned long buf[100]; }; | |||
160 | 160 | ||
161 | #define __get_user_check(x, ptr, size) \ | 161 | #define __get_user_check(x, ptr, size) \ |
162 | ({ \ | 162 | ({ \ |
163 | const __typeof__(ptr) __guc_ptr = (ptr); \ | ||
163 | int _e; \ | 164 | int _e; \ |
164 | if (likely(__access_ok((unsigned long) (ptr), (size)))) \ | 165 | if (likely(__access_ok((unsigned long) __guc_ptr, (size)))) \ |
165 | _e = __get_user_nocheck((x), (ptr), (size)); \ | 166 | _e = __get_user_nocheck((x), __guc_ptr, (size)); \ |
166 | else { \ | 167 | else { \ |
167 | _e = -EFAULT; \ | 168 | _e = -EFAULT; \ |
168 | (x) = (__typeof__(x))0; \ | 169 | (x) = (__typeof__(x))0; \ |
diff --git a/arch/mn10300/mm/cache-inv-icache.c b/arch/mn10300/mm/cache-inv-icache.c index a8933a60b2d4..a6b63dde603d 100644 --- a/arch/mn10300/mm/cache-inv-icache.c +++ b/arch/mn10300/mm/cache-inv-icache.c | |||
@@ -69,7 +69,7 @@ static void flush_icache_page_range(unsigned long start, unsigned long end) | |||
69 | 69 | ||
70 | /* invalidate the icache coverage on that region */ | 70 | /* invalidate the icache coverage on that region */ |
71 | mn10300_local_icache_inv_range2(addr + off, size); | 71 | mn10300_local_icache_inv_range2(addr + off, size); |
72 | smp_cache_call(SMP_ICACHE_INV_FLUSH_RANGE, start, end); | 72 | smp_cache_call(SMP_ICACHE_INV_RANGE, start, end); |
73 | } | 73 | } |
74 | 74 | ||
75 | /** | 75 | /** |
@@ -101,7 +101,7 @@ void flush_icache_range(unsigned long start, unsigned long end) | |||
101 | * directly */ | 101 | * directly */ |
102 | start_page = (start >= 0x80000000UL) ? start : 0x80000000UL; | 102 | start_page = (start >= 0x80000000UL) ? start : 0x80000000UL; |
103 | mn10300_icache_inv_range(start_page, end); | 103 | mn10300_icache_inv_range(start_page, end); |
104 | smp_cache_call(SMP_ICACHE_INV_FLUSH_RANGE, start, end); | 104 | smp_cache_call(SMP_ICACHE_INV_RANGE, start, end); |
105 | if (start_page == start) | 105 | if (start_page == start) |
106 | goto done; | 106 | goto done; |
107 | end = start_page; | 107 | end = start_page; |
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h index 380d48bacd16..26b8c807f8f1 100644 --- a/arch/powerpc/include/asm/lppaca.h +++ b/arch/powerpc/include/asm/lppaca.h | |||
@@ -33,9 +33,25 @@ | |||
33 | // | 33 | // |
34 | //---------------------------------------------------------------------------- | 34 | //---------------------------------------------------------------------------- |
35 | #include <linux/cache.h> | 35 | #include <linux/cache.h> |
36 | #include <linux/threads.h> | ||
36 | #include <asm/types.h> | 37 | #include <asm/types.h> |
37 | #include <asm/mmu.h> | 38 | #include <asm/mmu.h> |
38 | 39 | ||
40 | /* | ||
41 | * We only have to have statically allocated lppaca structs on | ||
42 | * legacy iSeries, which supports at most 64 cpus. | ||
43 | */ | ||
44 | #ifdef CONFIG_PPC_ISERIES | ||
45 | #if NR_CPUS < 64 | ||
46 | #define NR_LPPACAS NR_CPUS | ||
47 | #else | ||
48 | #define NR_LPPACAS 64 | ||
49 | #endif | ||
50 | #else /* not iSeries */ | ||
51 | #define NR_LPPACAS 1 | ||
52 | #endif | ||
53 | |||
54 | |||
39 | /* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k | 55 | /* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k |
40 | * alignment is sufficient to prevent this */ | 56 | * alignment is sufficient to prevent this */ |
41 | struct lppaca { | 57 | struct lppaca { |
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h index 991d5998d6be..fe56a23e1ff0 100644 --- a/arch/powerpc/include/asm/machdep.h +++ b/arch/powerpc/include/asm/machdep.h | |||
@@ -240,6 +240,12 @@ struct machdep_calls { | |||
240 | * claims to support kexec. | 240 | * claims to support kexec. |
241 | */ | 241 | */ |
242 | int (*machine_kexec_prepare)(struct kimage *image); | 242 | int (*machine_kexec_prepare)(struct kimage *image); |
243 | |||
244 | /* Called to perform the _real_ kexec. | ||
245 | * Do NOT allocate memory or fail here. We are past the point of | ||
246 | * no return. | ||
247 | */ | ||
248 | void (*machine_kexec)(struct kimage *image); | ||
243 | #endif /* CONFIG_KEXEC */ | 249 | #endif /* CONFIG_KEXEC */ |
244 | 250 | ||
245 | #ifdef CONFIG_SUSPEND | 251 | #ifdef CONFIG_SUSPEND |
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index 49a170af8145..a5f8672eeff3 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c | |||
@@ -87,7 +87,10 @@ void machine_kexec(struct kimage *image) | |||
87 | 87 | ||
88 | save_ftrace_enabled = __ftrace_enabled_save(); | 88 | save_ftrace_enabled = __ftrace_enabled_save(); |
89 | 89 | ||
90 | default_machine_kexec(image); | 90 | if (ppc_md.machine_kexec) |
91 | ppc_md.machine_kexec(image); | ||
92 | else | ||
93 | default_machine_kexec(image); | ||
91 | 94 | ||
92 | __ftrace_enabled_restore(save_ftrace_enabled); | 95 | __ftrace_enabled_restore(save_ftrace_enabled); |
93 | 96 | ||
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c index ebf9846f3c3b..f4adf89d7614 100644 --- a/arch/powerpc/kernel/paca.c +++ b/arch/powerpc/kernel/paca.c | |||
@@ -27,20 +27,6 @@ extern unsigned long __toc_start; | |||
27 | #ifdef CONFIG_PPC_BOOK3S | 27 | #ifdef CONFIG_PPC_BOOK3S |
28 | 28 | ||
29 | /* | 29 | /* |
30 | * We only have to have statically allocated lppaca structs on | ||
31 | * legacy iSeries, which supports at most 64 cpus. | ||
32 | */ | ||
33 | #ifdef CONFIG_PPC_ISERIES | ||
34 | #if NR_CPUS < 64 | ||
35 | #define NR_LPPACAS NR_CPUS | ||
36 | #else | ||
37 | #define NR_LPPACAS 64 | ||
38 | #endif | ||
39 | #else /* not iSeries */ | ||
40 | #define NR_LPPACAS 1 | ||
41 | #endif | ||
42 | |||
43 | /* | ||
44 | * The structure which the hypervisor knows about - this structure | 30 | * The structure which the hypervisor knows about - this structure |
45 | * should not cross a page boundary. The vpa_init/register_vpa call | 31 | * should not cross a page boundary. The vpa_init/register_vpa call |
46 | * is now known to fail if the lppaca structure crosses a page | 32 | * is now known to fail if the lppaca structure crosses a page |
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 7a1d5cb76932..8303a6c65ef7 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -353,6 +353,7 @@ static void switch_booke_debug_regs(struct thread_struct *new_thread) | |||
353 | prime_debug_regs(new_thread); | 353 | prime_debug_regs(new_thread); |
354 | } | 354 | } |
355 | #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ | 355 | #else /* !CONFIG_PPC_ADV_DEBUG_REGS */ |
356 | #ifndef CONFIG_HAVE_HW_BREAKPOINT | ||
356 | static void set_debug_reg_defaults(struct thread_struct *thread) | 357 | static void set_debug_reg_defaults(struct thread_struct *thread) |
357 | { | 358 | { |
358 | if (thread->dabr) { | 359 | if (thread->dabr) { |
@@ -360,6 +361,7 @@ static void set_debug_reg_defaults(struct thread_struct *thread) | |||
360 | set_dabr(0); | 361 | set_dabr(0); |
361 | } | 362 | } |
362 | } | 363 | } |
364 | #endif /* !CONFIG_HAVE_HW_BREAKPOINT */ | ||
363 | #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ | 365 | #endif /* CONFIG_PPC_ADV_DEBUG_REGS */ |
364 | 366 | ||
365 | int set_dabr(unsigned long dabr) | 367 | int set_dabr(unsigned long dabr) |
@@ -670,11 +672,11 @@ void flush_thread(void) | |||
670 | { | 672 | { |
671 | discard_lazy_cpu_state(); | 673 | discard_lazy_cpu_state(); |
672 | 674 | ||
673 | #ifdef CONFIG_HAVE_HW_BREAKPOINTS | 675 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
674 | flush_ptrace_hw_breakpoint(current); | 676 | flush_ptrace_hw_breakpoint(current); |
675 | #else /* CONFIG_HAVE_HW_BREAKPOINTS */ | 677 | #else /* CONFIG_HAVE_HW_BREAKPOINT */ |
676 | set_debug_reg_defaults(¤t->thread); | 678 | set_debug_reg_defaults(¤t->thread); |
677 | #endif /* CONFIG_HAVE_HW_BREAKPOINTS */ | 679 | #endif /* CONFIG_HAVE_HW_BREAKPOINT */ |
678 | } | 680 | } |
679 | 681 | ||
680 | void | 682 | void |
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index fd4812329570..0dc95c0aa3be 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c | |||
@@ -1516,7 +1516,8 @@ int start_topology_update(void) | |||
1516 | { | 1516 | { |
1517 | int rc = 0; | 1517 | int rc = 0; |
1518 | 1518 | ||
1519 | if (firmware_has_feature(FW_FEATURE_VPHN) && | 1519 | /* Disabled until races with load balancing are fixed */ |
1520 | if (0 && firmware_has_feature(FW_FEATURE_VPHN) && | ||
1520 | get_lppaca()->shared_proc) { | 1521 | get_lppaca()->shared_proc) { |
1521 | vphn_enabled = 1; | 1522 | vphn_enabled = 1; |
1522 | setup_cpu_associativity_change_counters(); | 1523 | setup_cpu_associativity_change_counters(); |
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c index 1ec06576f619..c14d09f614f3 100644 --- a/arch/powerpc/mm/tlb_hash64.c +++ b/arch/powerpc/mm/tlb_hash64.c | |||
@@ -38,13 +38,11 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); | |||
38 | * neesd to be flushed. This function will either perform the flush | 38 | * neesd to be flushed. This function will either perform the flush |
39 | * immediately or will batch it up if the current CPU has an active | 39 | * immediately or will batch it up if the current CPU has an active |
40 | * batch on it. | 40 | * batch on it. |
41 | * | ||
42 | * Must be called from within some kind of spinlock/non-preempt region... | ||
43 | */ | 41 | */ |
44 | void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | 42 | void hpte_need_flush(struct mm_struct *mm, unsigned long addr, |
45 | pte_t *ptep, unsigned long pte, int huge) | 43 | pte_t *ptep, unsigned long pte, int huge) |
46 | { | 44 | { |
47 | struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); | 45 | struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch); |
48 | unsigned long vsid, vaddr; | 46 | unsigned long vsid, vaddr; |
49 | unsigned int psize; | 47 | unsigned int psize; |
50 | int ssize; | 48 | int ssize; |
@@ -99,6 +97,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | |||
99 | */ | 97 | */ |
100 | if (!batch->active) { | 98 | if (!batch->active) { |
101 | flush_hash_page(vaddr, rpte, psize, ssize, 0); | 99 | flush_hash_page(vaddr, rpte, psize, ssize, 0); |
100 | put_cpu_var(ppc64_tlb_batch); | ||
102 | return; | 101 | return; |
103 | } | 102 | } |
104 | 103 | ||
@@ -127,6 +126,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | |||
127 | batch->index = ++i; | 126 | batch->index = ++i; |
128 | if (i >= PPC64_TLB_BATCH_NR) | 127 | if (i >= PPC64_TLB_BATCH_NR) |
129 | __flush_tlb_pending(batch); | 128 | __flush_tlb_pending(batch); |
129 | put_cpu_var(ppc64_tlb_batch); | ||
130 | } | 130 | } |
131 | 131 | ||
132 | /* | 132 | /* |
diff --git a/arch/powerpc/platforms/iseries/dt.c b/arch/powerpc/platforms/iseries/dt.c index fdb7384c0c4f..f0491cc28900 100644 --- a/arch/powerpc/platforms/iseries/dt.c +++ b/arch/powerpc/platforms/iseries/dt.c | |||
@@ -242,8 +242,8 @@ static void __init dt_cpus(struct iseries_flat_dt *dt) | |||
242 | pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */ | 242 | pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */ |
243 | pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE); | 243 | pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE); |
244 | 244 | ||
245 | for (i = 0; i < NR_CPUS; i++) { | 245 | for (i = 0; i < NR_LPPACAS; i++) { |
246 | if (lppaca_of(i).dyn_proc_status >= 2) | 246 | if (lppaca[i].dyn_proc_status >= 2) |
247 | continue; | 247 | continue; |
248 | 248 | ||
249 | snprintf(p, 32 - (p - buf), "@%d", i); | 249 | snprintf(p, 32 - (p - buf), "@%d", i); |
@@ -251,7 +251,7 @@ static void __init dt_cpus(struct iseries_flat_dt *dt) | |||
251 | 251 | ||
252 | dt_prop_str(dt, "device_type", device_type_cpu); | 252 | dt_prop_str(dt, "device_type", device_type_cpu); |
253 | 253 | ||
254 | index = lppaca_of(i).dyn_hv_phys_proc_index; | 254 | index = lppaca[i].dyn_hv_phys_proc_index; |
255 | d = &xIoHriProcessorVpd[index]; | 255 | d = &xIoHriProcessorVpd[index]; |
256 | 256 | ||
257 | dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024); | 257 | dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024); |
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c index b0863410517f..2946ae10fbfd 100644 --- a/arch/powerpc/platforms/iseries/setup.c +++ b/arch/powerpc/platforms/iseries/setup.c | |||
@@ -680,6 +680,7 @@ void * __init iSeries_early_setup(void) | |||
680 | * on but calling this function multiple times is fine. | 680 | * on but calling this function multiple times is fine. |
681 | */ | 681 | */ |
682 | identify_cpu(0, mfspr(SPRN_PVR)); | 682 | identify_cpu(0, mfspr(SPRN_PVR)); |
683 | initialise_paca(&boot_paca, 0); | ||
683 | 684 | ||
684 | powerpc_firmware_features |= FW_FEATURE_ISERIES; | 685 | powerpc_firmware_features |= FW_FEATURE_ISERIES; |
685 | powerpc_firmware_features |= FW_FEATURE_LPAR; | 686 | powerpc_firmware_features |= FW_FEATURE_LPAR; |
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h index a78701da775b..4a5350037c8f 100644 --- a/arch/sh/include/asm/sections.h +++ b/arch/sh/include/asm/sections.h | |||
@@ -3,7 +3,7 @@ | |||
3 | 3 | ||
4 | #include <asm-generic/sections.h> | 4 | #include <asm-generic/sections.h> |
5 | 5 | ||
6 | extern void __nosave_begin, __nosave_end; | 6 | extern long __nosave_begin, __nosave_end; |
7 | extern long __machvec_start, __machvec_end; | 7 | extern long __machvec_start, __machvec_end; |
8 | extern char __uncached_start, __uncached_end; | 8 | extern char __uncached_start, __uncached_end; |
9 | extern char _ebss[]; | 9 | extern char _ebss[]; |
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c index 672944f5b19c..e53b4b38bd11 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
15 | #include <linux/sh_timer.h> | 15 | #include <linux/sh_timer.h> |
16 | #include <linux/serial_sci.h> | 16 | #include <linux/serial_sci.h> |
17 | #include <asm/machtypes.h> | 17 | #include <generated/machtypes.h> |
18 | 18 | ||
19 | static struct resource rtc_resources[] = { | 19 | static struct resource rtc_resources[] = { |
20 | [0] = { | 20 | [0] = { |
@@ -255,12 +255,17 @@ static struct platform_device *sh7750_early_devices[] __initdata = { | |||
255 | 255 | ||
256 | void __init plat_early_device_setup(void) | 256 | void __init plat_early_device_setup(void) |
257 | { | 257 | { |
258 | struct platform_device *dev[1]; | ||
259 | |||
258 | if (mach_is_rts7751r2d()) { | 260 | if (mach_is_rts7751r2d()) { |
259 | scif_platform_data.scscr |= SCSCR_CKE1; | 261 | scif_platform_data.scscr |= SCSCR_CKE1; |
260 | early_platform_add_devices(&scif_device, 1); | 262 | dev[0] = &scif_device; |
263 | early_platform_add_devices(dev, 1); | ||
261 | } else { | 264 | } else { |
262 | early_platform_add_devices(&sci_device, 1); | 265 | dev[0] = &sci_device; |
263 | early_platform_add_devices(&scif_device, 1); | 266 | early_platform_add_devices(dev, 1); |
267 | dev[0] = &scif_device; | ||
268 | early_platform_add_devices(dev, 1); | ||
264 | } | 269 | } |
265 | 270 | ||
266 | early_platform_add_devices(sh7750_early_devices, | 271 | early_platform_add_devices(sh7750_early_devices, |
diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c index faa8f86c0db4..0901b2f14e15 100644 --- a/arch/sh/lib/delay.c +++ b/arch/sh/lib/delay.c | |||
@@ -10,6 +10,16 @@ | |||
10 | void __delay(unsigned long loops) | 10 | void __delay(unsigned long loops) |
11 | { | 11 | { |
12 | __asm__ __volatile__( | 12 | __asm__ __volatile__( |
13 | /* | ||
14 | * ST40-300 appears to have an issue with this code, | ||
15 | * normally taking two cycles each loop, as with all | ||
16 | * other SH variants. If however the branch and the | ||
17 | * delay slot straddle an 8 byte boundary, this increases | ||
18 | * to 3 cycles. | ||
19 | * This align directive ensures this doesn't occur. | ||
20 | */ | ||
21 | ".balign 8\n\t" | ||
22 | |||
13 | "tst %0, %0\n\t" | 23 | "tst %0, %0\n\t" |
14 | "1:\t" | 24 | "1:\t" |
15 | "bf/s 1b\n\t" | 25 | "bf/s 1b\n\t" |
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c index 88d3dc3d30d5..5a580ea04429 100644 --- a/arch/sh/mm/cache.c +++ b/arch/sh/mm/cache.c | |||
@@ -108,7 +108,8 @@ void copy_user_highpage(struct page *to, struct page *from, | |||
108 | kunmap_atomic(vfrom, KM_USER0); | 108 | kunmap_atomic(vfrom, KM_USER0); |
109 | } | 109 | } |
110 | 110 | ||
111 | if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) | 111 | if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK) || |
112 | (vma->vm_flags & VM_EXEC)) | ||
112 | __flush_purge_region(vto, PAGE_SIZE); | 113 | __flush_purge_region(vto, PAGE_SIZE); |
113 | 114 | ||
114 | kunmap_atomic(vto, KM_USER1); | 115 | kunmap_atomic(vto, KM_USER1); |
diff --git a/arch/x86/boot/compressed/mkpiggy.c b/arch/x86/boot/compressed/mkpiggy.c index 646aa78ba5fd..46a823882437 100644 --- a/arch/x86/boot/compressed/mkpiggy.c +++ b/arch/x86/boot/compressed/mkpiggy.c | |||
@@ -62,7 +62,12 @@ int main(int argc, char *argv[]) | |||
62 | if (fseek(f, -4L, SEEK_END)) { | 62 | if (fseek(f, -4L, SEEK_END)) { |
63 | perror(argv[1]); | 63 | perror(argv[1]); |
64 | } | 64 | } |
65 | fread(&olen, sizeof olen, 1, f); | 65 | |
66 | if (fread(&olen, sizeof(olen), 1, f) != 1) { | ||
67 | perror(argv[1]); | ||
68 | return 1; | ||
69 | } | ||
70 | |||
66 | ilen = ftell(f); | 71 | ilen = ftell(f); |
67 | olen = getle32(&olen); | 72 | olen = getle32(&olen); |
68 | fclose(f); | 73 | fclose(f); |
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h index 211ca3f7fd16..4ea15ca89b2b 100644 --- a/arch/x86/include/asm/acpi.h +++ b/arch/x86/include/asm/acpi.h | |||
@@ -88,6 +88,7 @@ extern int acpi_disabled; | |||
88 | extern int acpi_pci_disabled; | 88 | extern int acpi_pci_disabled; |
89 | extern int acpi_skip_timer_override; | 89 | extern int acpi_skip_timer_override; |
90 | extern int acpi_use_timer_override; | 90 | extern int acpi_use_timer_override; |
91 | extern int acpi_fix_pin2_polarity; | ||
91 | 92 | ||
92 | extern u8 acpi_sci_flags; | 93 | extern u8 acpi_sci_flags; |
93 | extern int acpi_sci_override_gsi; | 94 | extern int acpi_sci_override_gsi; |
diff --git a/arch/x86/include/asm/ce4100.h b/arch/x86/include/asm/ce4100.h new file mode 100644 index 000000000000..e656ad8c0a2e --- /dev/null +++ b/arch/x86/include/asm/ce4100.h | |||
@@ -0,0 +1,6 @@ | |||
1 | #ifndef _ASM_CE4100_H_ | ||
2 | #define _ASM_CE4100_H_ | ||
3 | |||
4 | int ce4100_pci_init(void); | ||
5 | |||
6 | #endif | ||
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 4d0dfa0d998e..43a18c77676d 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -36,6 +36,11 @@ | |||
36 | #define MSR_IA32_PERFCTR1 0x000000c2 | 36 | #define MSR_IA32_PERFCTR1 0x000000c2 |
37 | #define MSR_FSB_FREQ 0x000000cd | 37 | #define MSR_FSB_FREQ 0x000000cd |
38 | 38 | ||
39 | #define MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2 | ||
40 | #define NHM_C3_AUTO_DEMOTE (1UL << 25) | ||
41 | #define NHM_C1_AUTO_DEMOTE (1UL << 26) | ||
42 | #define ATM_LNC_C6_AUTO_DEMOTE (1UL << 25) | ||
43 | |||
39 | #define MSR_MTRRcap 0x000000fe | 44 | #define MSR_MTRRcap 0x000000fe |
40 | #define MSR_IA32_BBL_CR_CTL 0x00000119 | 45 | #define MSR_IA32_BBL_CR_CTL 0x00000119 |
41 | 46 | ||
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h index e2f6a99f14ab..cc29086e30cd 100644 --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #define ARCH_P4_CNTRVAL_BITS (40) | 23 | #define ARCH_P4_CNTRVAL_BITS (40) |
24 | #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1) | 24 | #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1) |
25 | #define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1)) | ||
25 | 26 | ||
26 | #define P4_ESCR_EVENT_MASK 0x7e000000U | 27 | #define P4_ESCR_EVENT_MASK 0x7e000000U |
27 | #define P4_ESCR_EVENT_SHIFT 25 | 28 | #define P4_ESCR_EVENT_SHIFT 25 |
diff --git a/arch/x86/include/asm/smpboot_hooks.h b/arch/x86/include/asm/smpboot_hooks.h index 6c22bf353f26..725b77831993 100644 --- a/arch/x86/include/asm/smpboot_hooks.h +++ b/arch/x86/include/asm/smpboot_hooks.h | |||
@@ -34,7 +34,7 @@ static inline void smpboot_restore_warm_reset_vector(void) | |||
34 | */ | 34 | */ |
35 | CMOS_WRITE(0, 0xf); | 35 | CMOS_WRITE(0, 0xf); |
36 | 36 | ||
37 | *((volatile long *)phys_to_virt(apic->trampoline_phys_low)) = 0; | 37 | *((volatile u32 *)phys_to_virt(apic->trampoline_phys_low)) = 0; |
38 | } | 38 | } |
39 | 39 | ||
40 | static inline void __init smpboot_setup_io_apic(void) | 40 | static inline void __init smpboot_setup_io_apic(void) |
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h index ce1d54c8a433..3e094af443c3 100644 --- a/arch/x86/include/asm/uv/uv_bau.h +++ b/arch/x86/include/asm/uv/uv_bau.h | |||
@@ -176,7 +176,7 @@ struct bau_msg_payload { | |||
176 | struct bau_msg_header { | 176 | struct bau_msg_header { |
177 | unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ | 177 | unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ |
178 | /* bits 5:0 */ | 178 | /* bits 5:0 */ |
179 | unsigned int base_dest_nodeid:15; /* nasid (pnode<<1) of */ | 179 | unsigned int base_dest_nodeid:15; /* nasid of the */ |
180 | /* bits 20:6 */ /* first bit in uvhub map */ | 180 | /* bits 20:6 */ /* first bit in uvhub map */ |
181 | unsigned int command:8; /* message type */ | 181 | unsigned int command:8; /* message type */ |
182 | /* bits 28:21 */ | 182 | /* bits 28:21 */ |
diff --git a/arch/x86/include/asm/xen/page.h b/arch/x86/include/asm/xen/page.h index f25bdf238a33..c61934fbf22a 100644 --- a/arch/x86/include/asm/xen/page.h +++ b/arch/x86/include/asm/xen/page.h | |||
@@ -29,8 +29,10 @@ typedef struct xpaddr { | |||
29 | 29 | ||
30 | /**** MACHINE <-> PHYSICAL CONVERSION MACROS ****/ | 30 | /**** MACHINE <-> PHYSICAL CONVERSION MACROS ****/ |
31 | #define INVALID_P2M_ENTRY (~0UL) | 31 | #define INVALID_P2M_ENTRY (~0UL) |
32 | #define FOREIGN_FRAME_BIT (1UL<<31) | 32 | #define FOREIGN_FRAME_BIT (1UL<<(BITS_PER_LONG-1)) |
33 | #define IDENTITY_FRAME_BIT (1UL<<(BITS_PER_LONG-2)) | ||
33 | #define FOREIGN_FRAME(m) ((m) | FOREIGN_FRAME_BIT) | 34 | #define FOREIGN_FRAME(m) ((m) | FOREIGN_FRAME_BIT) |
35 | #define IDENTITY_FRAME(m) ((m) | IDENTITY_FRAME_BIT) | ||
34 | 36 | ||
35 | /* Maximum amount of memory we can handle in a domain in pages */ | 37 | /* Maximum amount of memory we can handle in a domain in pages */ |
36 | #define MAX_DOMAIN_PAGES \ | 38 | #define MAX_DOMAIN_PAGES \ |
@@ -41,12 +43,18 @@ extern unsigned int machine_to_phys_order; | |||
41 | 43 | ||
42 | extern unsigned long get_phys_to_machine(unsigned long pfn); | 44 | extern unsigned long get_phys_to_machine(unsigned long pfn); |
43 | extern bool set_phys_to_machine(unsigned long pfn, unsigned long mfn); | 45 | extern bool set_phys_to_machine(unsigned long pfn, unsigned long mfn); |
46 | extern bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn); | ||
47 | extern unsigned long set_phys_range_identity(unsigned long pfn_s, | ||
48 | unsigned long pfn_e); | ||
44 | 49 | ||
45 | extern int m2p_add_override(unsigned long mfn, struct page *page); | 50 | extern int m2p_add_override(unsigned long mfn, struct page *page); |
46 | extern int m2p_remove_override(struct page *page); | 51 | extern int m2p_remove_override(struct page *page); |
47 | extern struct page *m2p_find_override(unsigned long mfn); | 52 | extern struct page *m2p_find_override(unsigned long mfn); |
48 | extern unsigned long m2p_find_override_pfn(unsigned long mfn, unsigned long pfn); | 53 | extern unsigned long m2p_find_override_pfn(unsigned long mfn, unsigned long pfn); |
49 | 54 | ||
55 | #ifdef CONFIG_XEN_DEBUG_FS | ||
56 | extern int p2m_dump_show(struct seq_file *m, void *v); | ||
57 | #endif | ||
50 | static inline unsigned long pfn_to_mfn(unsigned long pfn) | 58 | static inline unsigned long pfn_to_mfn(unsigned long pfn) |
51 | { | 59 | { |
52 | unsigned long mfn; | 60 | unsigned long mfn; |
@@ -57,7 +65,7 @@ static inline unsigned long pfn_to_mfn(unsigned long pfn) | |||
57 | mfn = get_phys_to_machine(pfn); | 65 | mfn = get_phys_to_machine(pfn); |
58 | 66 | ||
59 | if (mfn != INVALID_P2M_ENTRY) | 67 | if (mfn != INVALID_P2M_ENTRY) |
60 | mfn &= ~FOREIGN_FRAME_BIT; | 68 | mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT); |
61 | 69 | ||
62 | return mfn; | 70 | return mfn; |
63 | } | 71 | } |
@@ -73,25 +81,44 @@ static inline int phys_to_machine_mapping_valid(unsigned long pfn) | |||
73 | static inline unsigned long mfn_to_pfn(unsigned long mfn) | 81 | static inline unsigned long mfn_to_pfn(unsigned long mfn) |
74 | { | 82 | { |
75 | unsigned long pfn; | 83 | unsigned long pfn; |
84 | int ret = 0; | ||
76 | 85 | ||
77 | if (xen_feature(XENFEAT_auto_translated_physmap)) | 86 | if (xen_feature(XENFEAT_auto_translated_physmap)) |
78 | return mfn; | 87 | return mfn; |
79 | 88 | ||
89 | if (unlikely((mfn >> machine_to_phys_order) != 0)) { | ||
90 | pfn = ~0; | ||
91 | goto try_override; | ||
92 | } | ||
80 | pfn = 0; | 93 | pfn = 0; |
81 | /* | 94 | /* |
82 | * The array access can fail (e.g., device space beyond end of RAM). | 95 | * The array access can fail (e.g., device space beyond end of RAM). |
83 | * In such cases it doesn't matter what we return (we return garbage), | 96 | * In such cases it doesn't matter what we return (we return garbage), |
84 | * but we must handle the fault without crashing! | 97 | * but we must handle the fault without crashing! |
85 | */ | 98 | */ |
86 | __get_user(pfn, &machine_to_phys_mapping[mfn]); | 99 | ret = __get_user(pfn, &machine_to_phys_mapping[mfn]); |
87 | 100 | try_override: | |
88 | /* | 101 | /* ret might be < 0 if there are no entries in the m2p for mfn */ |
89 | * If this appears to be a foreign mfn (because the pfn | 102 | if (ret < 0) |
90 | * doesn't map back to the mfn), then check the local override | 103 | pfn = ~0; |
91 | * table to see if there's a better pfn to use. | 104 | else if (get_phys_to_machine(pfn) != mfn) |
105 | /* | ||
106 | * If this appears to be a foreign mfn (because the pfn | ||
107 | * doesn't map back to the mfn), then check the local override | ||
108 | * table to see if there's a better pfn to use. | ||
109 | * | ||
110 | * m2p_find_override_pfn returns ~0 if it doesn't find anything. | ||
111 | */ | ||
112 | pfn = m2p_find_override_pfn(mfn, ~0); | ||
113 | |||
114 | /* | ||
115 | * pfn is ~0 if there are no entries in the m2p for mfn or if the | ||
116 | * entry doesn't map back to the mfn and m2p_override doesn't have a | ||
117 | * valid entry for it. | ||
92 | */ | 118 | */ |
93 | if (get_phys_to_machine(pfn) != mfn) | 119 | if (pfn == ~0 && |
94 | pfn = m2p_find_override_pfn(mfn, pfn); | 120 | get_phys_to_machine(mfn) == IDENTITY_FRAME(mfn)) |
121 | pfn = mfn; | ||
95 | 122 | ||
96 | return pfn; | 123 | return pfn; |
97 | } | 124 | } |
diff --git a/arch/x86/include/asm/xen/pci.h b/arch/x86/include/asm/xen/pci.h index 2329b3eaf8d3..aa8620989162 100644 --- a/arch/x86/include/asm/xen/pci.h +++ b/arch/x86/include/asm/xen/pci.h | |||
@@ -27,16 +27,16 @@ static inline void __init xen_setup_pirqs(void) | |||
27 | * its own functions. | 27 | * its own functions. |
28 | */ | 28 | */ |
29 | struct xen_pci_frontend_ops { | 29 | struct xen_pci_frontend_ops { |
30 | int (*enable_msi)(struct pci_dev *dev, int **vectors); | 30 | int (*enable_msi)(struct pci_dev *dev, int vectors[]); |
31 | void (*disable_msi)(struct pci_dev *dev); | 31 | void (*disable_msi)(struct pci_dev *dev); |
32 | int (*enable_msix)(struct pci_dev *dev, int **vectors, int nvec); | 32 | int (*enable_msix)(struct pci_dev *dev, int vectors[], int nvec); |
33 | void (*disable_msix)(struct pci_dev *dev); | 33 | void (*disable_msix)(struct pci_dev *dev); |
34 | }; | 34 | }; |
35 | 35 | ||
36 | extern struct xen_pci_frontend_ops *xen_pci_frontend; | 36 | extern struct xen_pci_frontend_ops *xen_pci_frontend; |
37 | 37 | ||
38 | static inline int xen_pci_frontend_enable_msi(struct pci_dev *dev, | 38 | static inline int xen_pci_frontend_enable_msi(struct pci_dev *dev, |
39 | int **vectors) | 39 | int vectors[]) |
40 | { | 40 | { |
41 | if (xen_pci_frontend && xen_pci_frontend->enable_msi) | 41 | if (xen_pci_frontend && xen_pci_frontend->enable_msi) |
42 | return xen_pci_frontend->enable_msi(dev, vectors); | 42 | return xen_pci_frontend->enable_msi(dev, vectors); |
@@ -48,7 +48,7 @@ static inline void xen_pci_frontend_disable_msi(struct pci_dev *dev) | |||
48 | xen_pci_frontend->disable_msi(dev); | 48 | xen_pci_frontend->disable_msi(dev); |
49 | } | 49 | } |
50 | static inline int xen_pci_frontend_enable_msix(struct pci_dev *dev, | 50 | static inline int xen_pci_frontend_enable_msix(struct pci_dev *dev, |
51 | int **vectors, int nvec) | 51 | int vectors[], int nvec) |
52 | { | 52 | { |
53 | if (xen_pci_frontend && xen_pci_frontend->enable_msix) | 53 | if (xen_pci_frontend && xen_pci_frontend->enable_msix) |
54 | return xen_pci_frontend->enable_msix(dev, vectors, nvec); | 54 | return xen_pci_frontend->enable_msix(dev, vectors, nvec); |
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index b3a71137983a..3e6e2d68f761 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
@@ -72,6 +72,7 @@ u8 acpi_sci_flags __initdata; | |||
72 | int acpi_sci_override_gsi __initdata; | 72 | int acpi_sci_override_gsi __initdata; |
73 | int acpi_skip_timer_override __initdata; | 73 | int acpi_skip_timer_override __initdata; |
74 | int acpi_use_timer_override __initdata; | 74 | int acpi_use_timer_override __initdata; |
75 | int acpi_fix_pin2_polarity __initdata; | ||
75 | 76 | ||
76 | #ifdef CONFIG_X86_LOCAL_APIC | 77 | #ifdef CONFIG_X86_LOCAL_APIC |
77 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | 78 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; |
@@ -415,10 +416,15 @@ acpi_parse_int_src_ovr(struct acpi_subtable_header * header, | |||
415 | return 0; | 416 | return 0; |
416 | } | 417 | } |
417 | 418 | ||
418 | if (acpi_skip_timer_override && | 419 | if (intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
419 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { | 420 | if (acpi_skip_timer_override) { |
420 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); | 421 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
421 | return 0; | 422 | return 0; |
423 | } | ||
424 | if (acpi_fix_pin2_polarity && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) { | ||
425 | intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK; | ||
426 | printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n"); | ||
427 | } | ||
422 | } | 428 | } |
423 | 429 | ||
424 | mp_override_legacy_irq(intsrc->source_irq, | 430 | mp_override_legacy_irq(intsrc->source_irq, |
diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c index 51ef31a89be9..51d4e1663066 100644 --- a/arch/x86/kernel/apb_timer.c +++ b/arch/x86/kernel/apb_timer.c | |||
@@ -284,7 +284,7 @@ static int __init apbt_clockevent_register(void) | |||
284 | memcpy(&adev->evt, &apbt_clockevent, sizeof(struct clock_event_device)); | 284 | memcpy(&adev->evt, &apbt_clockevent, sizeof(struct clock_event_device)); |
285 | 285 | ||
286 | if (mrst_timer_options == MRST_TIMER_LAPIC_APBT) { | 286 | if (mrst_timer_options == MRST_TIMER_LAPIC_APBT) { |
287 | apbt_clockevent.rating = APBT_CLOCKEVENT_RATING - 100; | 287 | adev->evt.rating = APBT_CLOCKEVENT_RATING - 100; |
288 | global_clock_event = &adev->evt; | 288 | global_clock_event = &adev->evt; |
289 | printk(KERN_DEBUG "%s clockevent registered as global\n", | 289 | printk(KERN_DEBUG "%s clockevent registered as global\n", |
290 | global_clock_event->name); | 290 | global_clock_event->name); |
diff --git a/arch/x86/kernel/check.c b/arch/x86/kernel/check.c index 13a389179514..452932d34730 100644 --- a/arch/x86/kernel/check.c +++ b/arch/x86/kernel/check.c | |||
@@ -106,8 +106,8 @@ void __init setup_bios_corruption_check(void) | |||
106 | addr += size; | 106 | addr += size; |
107 | } | 107 | } |
108 | 108 | ||
109 | printk(KERN_INFO "Scanning %d areas for low memory corruption\n", | 109 | if (num_scan_areas) |
110 | num_scan_areas); | 110 | printk(KERN_INFO "Scanning %d areas for low memory corruption\n", num_scan_areas); |
111 | } | 111 | } |
112 | 112 | ||
113 | 113 | ||
@@ -143,12 +143,12 @@ static void check_corruption(struct work_struct *dummy) | |||
143 | { | 143 | { |
144 | check_for_bios_corruption(); | 144 | check_for_bios_corruption(); |
145 | schedule_delayed_work(&bios_check_work, | 145 | schedule_delayed_work(&bios_check_work, |
146 | round_jiffies_relative(corruption_check_period*HZ)); | 146 | round_jiffies_relative(corruption_check_period*HZ)); |
147 | } | 147 | } |
148 | 148 | ||
149 | static int start_periodic_check_for_corruption(void) | 149 | static int start_periodic_check_for_corruption(void) |
150 | { | 150 | { |
151 | if (!memory_corruption_check || corruption_check_period == 0) | 151 | if (!num_scan_areas || !memory_corruption_check || corruption_check_period == 0) |
152 | return 0; | 152 | return 0; |
153 | 153 | ||
154 | printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n", | 154 | printk(KERN_INFO "Scanning for low memory corruption every %d seconds\n", |
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c index bd1cac747f67..52c93648e492 100644 --- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c +++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c | |||
@@ -158,9 +158,9 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c) | |||
158 | { | 158 | { |
159 | if (c->x86 == 0x06) { | 159 | if (c->x86 == 0x06) { |
160 | if (cpu_has(c, X86_FEATURE_EST)) | 160 | if (cpu_has(c, X86_FEATURE_EST)) |
161 | printk(KERN_WARNING PFX "Warning: EST-capable CPU " | 161 | printk_once(KERN_WARNING PFX "Warning: EST-capable " |
162 | "detected. The acpi-cpufreq module offers " | 162 | "CPU detected. The acpi-cpufreq module offers " |
163 | "voltage scaling in addition of frequency " | 163 | "voltage scaling in addition to frequency " |
164 | "scaling. You should use that instead of " | 164 | "scaling. You should use that instead of " |
165 | "p4-clockmod, if possible.\n"); | 165 | "p4-clockmod, if possible.\n"); |
166 | switch (c->x86_model) { | 166 | switch (c->x86_model) { |
diff --git a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c index 4f6f679f2799..4a5a42b842ad 100644 --- a/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c +++ b/arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c | |||
@@ -195,7 +195,7 @@ static unsigned int pcc_get_freq(unsigned int cpu) | |||
195 | cmd_incomplete: | 195 | cmd_incomplete: |
196 | iowrite16(0, &pcch_hdr->status); | 196 | iowrite16(0, &pcch_hdr->status); |
197 | spin_unlock(&pcc_lock); | 197 | spin_unlock(&pcc_lock); |
198 | return -EINVAL; | 198 | return 0; |
199 | } | 199 | } |
200 | 200 | ||
201 | static int pcc_cpufreq_target(struct cpufreq_policy *policy, | 201 | static int pcc_cpufreq_target(struct cpufreq_policy *policy, |
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index 35c7e65e59be..c567dec854f6 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c | |||
@@ -1537,6 +1537,7 @@ static struct notifier_block cpb_nb = { | |||
1537 | static int __cpuinit powernowk8_init(void) | 1537 | static int __cpuinit powernowk8_init(void) |
1538 | { | 1538 | { |
1539 | unsigned int i, supported_cpus = 0, cpu; | 1539 | unsigned int i, supported_cpus = 0, cpu; |
1540 | int rv; | ||
1540 | 1541 | ||
1541 | for_each_online_cpu(i) { | 1542 | for_each_online_cpu(i) { |
1542 | int rc; | 1543 | int rc; |
@@ -1555,14 +1556,14 @@ static int __cpuinit powernowk8_init(void) | |||
1555 | 1556 | ||
1556 | cpb_capable = true; | 1557 | cpb_capable = true; |
1557 | 1558 | ||
1558 | register_cpu_notifier(&cpb_nb); | ||
1559 | |||
1560 | msrs = msrs_alloc(); | 1559 | msrs = msrs_alloc(); |
1561 | if (!msrs) { | 1560 | if (!msrs) { |
1562 | printk(KERN_ERR "%s: Error allocating msrs!\n", __func__); | 1561 | printk(KERN_ERR "%s: Error allocating msrs!\n", __func__); |
1563 | return -ENOMEM; | 1562 | return -ENOMEM; |
1564 | } | 1563 | } |
1565 | 1564 | ||
1565 | register_cpu_notifier(&cpb_nb); | ||
1566 | |||
1566 | rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs); | 1567 | rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs); |
1567 | 1568 | ||
1568 | for_each_cpu(cpu, cpu_online_mask) { | 1569 | for_each_cpu(cpu, cpu_online_mask) { |
@@ -1574,7 +1575,13 @@ static int __cpuinit powernowk8_init(void) | |||
1574 | (cpb_enabled ? "on" : "off")); | 1575 | (cpb_enabled ? "on" : "off")); |
1575 | } | 1576 | } |
1576 | 1577 | ||
1577 | return cpufreq_register_driver(&cpufreq_amd64_driver); | 1578 | rv = cpufreq_register_driver(&cpufreq_amd64_driver); |
1579 | if (rv < 0 && boot_cpu_has(X86_FEATURE_CPB)) { | ||
1580 | unregister_cpu_notifier(&cpb_nb); | ||
1581 | msrs_free(msrs); | ||
1582 | msrs = NULL; | ||
1583 | } | ||
1584 | return rv; | ||
1578 | } | 1585 | } |
1579 | 1586 | ||
1580 | /* driver entry point for term */ | 1587 | /* driver entry point for term */ |
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index f7a0993c1e7c..ff751a9f182b 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c | |||
@@ -770,9 +770,14 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) | |||
770 | return 1; | 770 | return 1; |
771 | } | 771 | } |
772 | 772 | ||
773 | /* it might be unflagged overflow */ | 773 | /* |
774 | rdmsrl(hwc->event_base + hwc->idx, v); | 774 | * In some circumstances the overflow might issue an NMI but did |
775 | if (!(v & ARCH_P4_CNTRVAL_MASK)) | 775 | * not set P4_CCCR_OVF bit. Because a counter holds a negative value |
776 | * we simply check for high bit being set, if it's cleared it means | ||
777 | * the counter has reached zero value and continued counting before | ||
778 | * real NMI signal was received: | ||
779 | */ | ||
780 | if (!(v & ARCH_P4_UNFLAGGED_BIT)) | ||
776 | return 1; | 781 | return 1; |
777 | 782 | ||
778 | return 0; | 783 | return 0; |
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 76b8cd953dee..9efbdcc56425 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c | |||
@@ -143,15 +143,10 @@ static void __init ati_bugs(int num, int slot, int func) | |||
143 | 143 | ||
144 | static u32 __init ati_sbx00_rev(int num, int slot, int func) | 144 | static u32 __init ati_sbx00_rev(int num, int slot, int func) |
145 | { | 145 | { |
146 | u32 old, d; | 146 | u32 d; |
147 | 147 | ||
148 | d = read_pci_config(num, slot, func, 0x70); | ||
149 | old = d; | ||
150 | d &= ~(1<<8); | ||
151 | write_pci_config(num, slot, func, 0x70, d); | ||
152 | d = read_pci_config(num, slot, func, 0x8); | 148 | d = read_pci_config(num, slot, func, 0x8); |
153 | d &= 0xff; | 149 | d &= 0xff; |
154 | write_pci_config(num, slot, func, 0x70, old); | ||
155 | 150 | ||
156 | return d; | 151 | return d; |
157 | } | 152 | } |
@@ -160,13 +155,16 @@ static void __init ati_bugs_contd(int num, int slot, int func) | |||
160 | { | 155 | { |
161 | u32 d, rev; | 156 | u32 d, rev; |
162 | 157 | ||
163 | if (acpi_use_timer_override) | ||
164 | return; | ||
165 | |||
166 | rev = ati_sbx00_rev(num, slot, func); | 158 | rev = ati_sbx00_rev(num, slot, func); |
159 | if (rev >= 0x40) | ||
160 | acpi_fix_pin2_polarity = 1; | ||
161 | |||
167 | if (rev > 0x13) | 162 | if (rev > 0x13) |
168 | return; | 163 | return; |
169 | 164 | ||
165 | if (acpi_use_timer_override) | ||
166 | return; | ||
167 | |||
170 | /* check for IRQ0 interrupt swap */ | 168 | /* check for IRQ0 interrupt swap */ |
171 | d = read_pci_config(num, slot, func, 0x64); | 169 | d = read_pci_config(num, slot, func, 0x64); |
172 | if (!(d & (1<<14))) | 170 | if (!(d & (1<<14))) |
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index fc7aae1e2bc7..715037caeb43 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c | |||
@@ -285,6 +285,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { | |||
285 | DMI_MATCH(DMI_BOARD_NAME, "P4S800"), | 285 | DMI_MATCH(DMI_BOARD_NAME, "P4S800"), |
286 | }, | 286 | }, |
287 | }, | 287 | }, |
288 | { /* Handle problems with rebooting on VersaLogic Menlow boards */ | ||
289 | .callback = set_bios_reboot, | ||
290 | .ident = "VersaLogic Menlow based board", | ||
291 | .matches = { | ||
292 | DMI_MATCH(DMI_BOARD_VENDOR, "VersaLogic Corporation"), | ||
293 | DMI_MATCH(DMI_BOARD_NAME, "VersaLogic Menlow board"), | ||
294 | }, | ||
295 | }, | ||
288 | { } | 296 | { } |
289 | }; | 297 | }; |
290 | 298 | ||
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 54ce246a383e..63fec1531e89 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c | |||
@@ -2777,6 +2777,8 @@ static int dr_interception(struct vcpu_svm *svm) | |||
2777 | kvm_register_write(&svm->vcpu, reg, val); | 2777 | kvm_register_write(&svm->vcpu, reg, val); |
2778 | } | 2778 | } |
2779 | 2779 | ||
2780 | skip_emulated_instruction(&svm->vcpu); | ||
2781 | |||
2780 | return 1; | 2782 | return 1; |
2781 | } | 2783 | } |
2782 | 2784 | ||
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 7d90ceb882a4..20e3f8702d1e 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c | |||
@@ -229,15 +229,14 @@ void vmalloc_sync_all(void) | |||
229 | for (address = VMALLOC_START & PMD_MASK; | 229 | for (address = VMALLOC_START & PMD_MASK; |
230 | address >= TASK_SIZE && address < FIXADDR_TOP; | 230 | address >= TASK_SIZE && address < FIXADDR_TOP; |
231 | address += PMD_SIZE) { | 231 | address += PMD_SIZE) { |
232 | |||
233 | unsigned long flags; | ||
234 | struct page *page; | 232 | struct page *page; |
235 | 233 | ||
236 | spin_lock_irqsave(&pgd_lock, flags); | 234 | spin_lock(&pgd_lock); |
237 | list_for_each_entry(page, &pgd_list, lru) { | 235 | list_for_each_entry(page, &pgd_list, lru) { |
238 | spinlock_t *pgt_lock; | 236 | spinlock_t *pgt_lock; |
239 | pmd_t *ret; | 237 | pmd_t *ret; |
240 | 238 | ||
239 | /* the pgt_lock only for Xen */ | ||
241 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; | 240 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; |
242 | 241 | ||
243 | spin_lock(pgt_lock); | 242 | spin_lock(pgt_lock); |
@@ -247,7 +246,7 @@ void vmalloc_sync_all(void) | |||
247 | if (!ret) | 246 | if (!ret) |
248 | break; | 247 | break; |
249 | } | 248 | } |
250 | spin_unlock_irqrestore(&pgd_lock, flags); | 249 | spin_unlock(&pgd_lock); |
251 | } | 250 | } |
252 | } | 251 | } |
253 | 252 | ||
@@ -828,6 +827,13 @@ mm_fault_error(struct pt_regs *regs, unsigned long error_code, | |||
828 | unsigned long address, unsigned int fault) | 827 | unsigned long address, unsigned int fault) |
829 | { | 828 | { |
830 | if (fault & VM_FAULT_OOM) { | 829 | if (fault & VM_FAULT_OOM) { |
830 | /* Kernel mode? Handle exceptions or die: */ | ||
831 | if (!(error_code & PF_USER)) { | ||
832 | up_read(¤t->mm->mmap_sem); | ||
833 | no_context(regs, error_code, address); | ||
834 | return; | ||
835 | } | ||
836 | |||
831 | out_of_memory(regs, error_code, address); | 837 | out_of_memory(regs, error_code, address); |
832 | } else { | 838 | } else { |
833 | if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON| | 839 | if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON| |
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index 71a59296af80..c14a5422e152 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c | |||
@@ -105,18 +105,18 @@ void sync_global_pgds(unsigned long start, unsigned long end) | |||
105 | 105 | ||
106 | for (address = start; address <= end; address += PGDIR_SIZE) { | 106 | for (address = start; address <= end; address += PGDIR_SIZE) { |
107 | const pgd_t *pgd_ref = pgd_offset_k(address); | 107 | const pgd_t *pgd_ref = pgd_offset_k(address); |
108 | unsigned long flags; | ||
109 | struct page *page; | 108 | struct page *page; |
110 | 109 | ||
111 | if (pgd_none(*pgd_ref)) | 110 | if (pgd_none(*pgd_ref)) |
112 | continue; | 111 | continue; |
113 | 112 | ||
114 | spin_lock_irqsave(&pgd_lock, flags); | 113 | spin_lock(&pgd_lock); |
115 | list_for_each_entry(page, &pgd_list, lru) { | 114 | list_for_each_entry(page, &pgd_list, lru) { |
116 | pgd_t *pgd; | 115 | pgd_t *pgd; |
117 | spinlock_t *pgt_lock; | 116 | spinlock_t *pgt_lock; |
118 | 117 | ||
119 | pgd = (pgd_t *)page_address(page) + pgd_index(address); | 118 | pgd = (pgd_t *)page_address(page) + pgd_index(address); |
119 | /* the pgt_lock only for Xen */ | ||
120 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; | 120 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; |
121 | spin_lock(pgt_lock); | 121 | spin_lock(pgt_lock); |
122 | 122 | ||
@@ -128,7 +128,7 @@ void sync_global_pgds(unsigned long start, unsigned long end) | |||
128 | 128 | ||
129 | spin_unlock(pgt_lock); | 129 | spin_unlock(pgt_lock); |
130 | } | 130 | } |
131 | spin_unlock_irqrestore(&pgd_lock, flags); | 131 | spin_unlock(&pgd_lock); |
132 | } | 132 | } |
133 | } | 133 | } |
134 | 134 | ||
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c index 95ea1551eebc..1337c51b07d7 100644 --- a/arch/x86/mm/numa_64.c +++ b/arch/x86/mm/numa_64.c | |||
@@ -780,11 +780,7 @@ void __cpuinit numa_add_cpu(int cpu) | |||
780 | int physnid; | 780 | int physnid; |
781 | int nid = NUMA_NO_NODE; | 781 | int nid = NUMA_NO_NODE; |
782 | 782 | ||
783 | apicid = early_per_cpu(x86_cpu_to_apicid, cpu); | 783 | nid = early_cpu_to_node(cpu); |
784 | if (apicid != BAD_APICID) | ||
785 | nid = apicid_to_node[apicid]; | ||
786 | if (nid == NUMA_NO_NODE) | ||
787 | nid = early_cpu_to_node(cpu); | ||
788 | BUG_ON(nid == NUMA_NO_NODE || !node_online(nid)); | 784 | BUG_ON(nid == NUMA_NO_NODE || !node_online(nid)); |
789 | 785 | ||
790 | /* | 786 | /* |
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index d343b3c81f3c..90825f2eb0f4 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
@@ -57,12 +57,10 @@ static unsigned long direct_pages_count[PG_LEVEL_NUM]; | |||
57 | 57 | ||
58 | void update_page_count(int level, unsigned long pages) | 58 | void update_page_count(int level, unsigned long pages) |
59 | { | 59 | { |
60 | unsigned long flags; | ||
61 | |||
62 | /* Protect against CPA */ | 60 | /* Protect against CPA */ |
63 | spin_lock_irqsave(&pgd_lock, flags); | 61 | spin_lock(&pgd_lock); |
64 | direct_pages_count[level] += pages; | 62 | direct_pages_count[level] += pages; |
65 | spin_unlock_irqrestore(&pgd_lock, flags); | 63 | spin_unlock(&pgd_lock); |
66 | } | 64 | } |
67 | 65 | ||
68 | static void split_page_count(int level) | 66 | static void split_page_count(int level) |
@@ -394,7 +392,7 @@ static int | |||
394 | try_preserve_large_page(pte_t *kpte, unsigned long address, | 392 | try_preserve_large_page(pte_t *kpte, unsigned long address, |
395 | struct cpa_data *cpa) | 393 | struct cpa_data *cpa) |
396 | { | 394 | { |
397 | unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn; | 395 | unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn; |
398 | pte_t new_pte, old_pte, *tmp; | 396 | pte_t new_pte, old_pte, *tmp; |
399 | pgprot_t old_prot, new_prot, req_prot; | 397 | pgprot_t old_prot, new_prot, req_prot; |
400 | int i, do_split = 1; | 398 | int i, do_split = 1; |
@@ -403,7 +401,7 @@ try_preserve_large_page(pte_t *kpte, unsigned long address, | |||
403 | if (cpa->force_split) | 401 | if (cpa->force_split) |
404 | return 1; | 402 | return 1; |
405 | 403 | ||
406 | spin_lock_irqsave(&pgd_lock, flags); | 404 | spin_lock(&pgd_lock); |
407 | /* | 405 | /* |
408 | * Check for races, another CPU might have split this page | 406 | * Check for races, another CPU might have split this page |
409 | * up already: | 407 | * up already: |
@@ -498,14 +496,14 @@ try_preserve_large_page(pte_t *kpte, unsigned long address, | |||
498 | } | 496 | } |
499 | 497 | ||
500 | out_unlock: | 498 | out_unlock: |
501 | spin_unlock_irqrestore(&pgd_lock, flags); | 499 | spin_unlock(&pgd_lock); |
502 | 500 | ||
503 | return do_split; | 501 | return do_split; |
504 | } | 502 | } |
505 | 503 | ||
506 | static int split_large_page(pte_t *kpte, unsigned long address) | 504 | static int split_large_page(pte_t *kpte, unsigned long address) |
507 | { | 505 | { |
508 | unsigned long flags, pfn, pfninc = 1; | 506 | unsigned long pfn, pfninc = 1; |
509 | unsigned int i, level; | 507 | unsigned int i, level; |
510 | pte_t *pbase, *tmp; | 508 | pte_t *pbase, *tmp; |
511 | pgprot_t ref_prot; | 509 | pgprot_t ref_prot; |
@@ -519,7 +517,7 @@ static int split_large_page(pte_t *kpte, unsigned long address) | |||
519 | if (!base) | 517 | if (!base) |
520 | return -ENOMEM; | 518 | return -ENOMEM; |
521 | 519 | ||
522 | spin_lock_irqsave(&pgd_lock, flags); | 520 | spin_lock(&pgd_lock); |
523 | /* | 521 | /* |
524 | * Check for races, another CPU might have split this page | 522 | * Check for races, another CPU might have split this page |
525 | * up for us already: | 523 | * up for us already: |
@@ -591,7 +589,7 @@ out_unlock: | |||
591 | */ | 589 | */ |
592 | if (base) | 590 | if (base) |
593 | __free_page(base); | 591 | __free_page(base); |
594 | spin_unlock_irqrestore(&pgd_lock, flags); | 592 | spin_unlock(&pgd_lock); |
595 | 593 | ||
596 | return 0; | 594 | return 0; |
597 | } | 595 | } |
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c index 500242d3c96d..0113d19c8aa6 100644 --- a/arch/x86/mm/pgtable.c +++ b/arch/x86/mm/pgtable.c | |||
@@ -121,14 +121,12 @@ static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd) | |||
121 | 121 | ||
122 | static void pgd_dtor(pgd_t *pgd) | 122 | static void pgd_dtor(pgd_t *pgd) |
123 | { | 123 | { |
124 | unsigned long flags; /* can be called from interrupt context */ | ||
125 | |||
126 | if (SHARED_KERNEL_PMD) | 124 | if (SHARED_KERNEL_PMD) |
127 | return; | 125 | return; |
128 | 126 | ||
129 | spin_lock_irqsave(&pgd_lock, flags); | 127 | spin_lock(&pgd_lock); |
130 | pgd_list_del(pgd); | 128 | pgd_list_del(pgd); |
131 | spin_unlock_irqrestore(&pgd_lock, flags); | 129 | spin_unlock(&pgd_lock); |
132 | } | 130 | } |
133 | 131 | ||
134 | /* | 132 | /* |
@@ -260,7 +258,6 @@ pgd_t *pgd_alloc(struct mm_struct *mm) | |||
260 | { | 258 | { |
261 | pgd_t *pgd; | 259 | pgd_t *pgd; |
262 | pmd_t *pmds[PREALLOCATED_PMDS]; | 260 | pmd_t *pmds[PREALLOCATED_PMDS]; |
263 | unsigned long flags; | ||
264 | 261 | ||
265 | pgd = (pgd_t *)__get_free_page(PGALLOC_GFP); | 262 | pgd = (pgd_t *)__get_free_page(PGALLOC_GFP); |
266 | 263 | ||
@@ -280,12 +277,12 @@ pgd_t *pgd_alloc(struct mm_struct *mm) | |||
280 | * respect to anything walking the pgd_list, so that they | 277 | * respect to anything walking the pgd_list, so that they |
281 | * never see a partially populated pgd. | 278 | * never see a partially populated pgd. |
282 | */ | 279 | */ |
283 | spin_lock_irqsave(&pgd_lock, flags); | 280 | spin_lock(&pgd_lock); |
284 | 281 | ||
285 | pgd_ctor(mm, pgd); | 282 | pgd_ctor(mm, pgd); |
286 | pgd_prepopulate_pmd(mm, pgd, pmds); | 283 | pgd_prepopulate_pmd(mm, pgd, pmds); |
287 | 284 | ||
288 | spin_unlock_irqrestore(&pgd_lock, flags); | 285 | spin_unlock(&pgd_lock); |
289 | 286 | ||
290 | return pgd; | 287 | return pgd; |
291 | 288 | ||
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c index 85b68ef5e809..9260b3eb18d4 100644 --- a/arch/x86/pci/ce4100.c +++ b/arch/x86/pci/ce4100.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <linux/pci.h> | 34 | #include <linux/pci.h> |
35 | #include <linux/init.h> | 35 | #include <linux/init.h> |
36 | 36 | ||
37 | #include <asm/ce4100.h> | ||
37 | #include <asm/pci_x86.h> | 38 | #include <asm/pci_x86.h> |
38 | 39 | ||
39 | struct sim_reg { | 40 | struct sim_reg { |
@@ -306,10 +307,10 @@ struct pci_raw_ops ce4100_pci_conf = { | |||
306 | .write = ce4100_conf_write, | 307 | .write = ce4100_conf_write, |
307 | }; | 308 | }; |
308 | 309 | ||
309 | static int __init ce4100_pci_init(void) | 310 | int __init ce4100_pci_init(void) |
310 | { | 311 | { |
311 | init_sim_regs(); | 312 | init_sim_regs(); |
312 | raw_pci_ops = &ce4100_pci_conf; | 313 | raw_pci_ops = &ce4100_pci_conf; |
313 | return 0; | 314 | /* Indicate caller that it should invoke pci_legacy_init() */ |
315 | return 1; | ||
314 | } | 316 | } |
315 | subsys_initcall(ce4100_pci_init); | ||
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c index 25cd4a07d09f..8c4085a95ef1 100644 --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c | |||
@@ -20,7 +20,8 @@ | |||
20 | #include <asm/xen/pci.h> | 20 | #include <asm/xen/pci.h> |
21 | 21 | ||
22 | #ifdef CONFIG_ACPI | 22 | #ifdef CONFIG_ACPI |
23 | static int xen_hvm_register_pirq(u32 gsi, int triggering) | 23 | static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, |
24 | int trigger, int polarity) | ||
24 | { | 25 | { |
25 | int rc, irq; | 26 | int rc, irq; |
26 | struct physdev_map_pirq map_irq; | 27 | struct physdev_map_pirq map_irq; |
@@ -41,7 +42,7 @@ static int xen_hvm_register_pirq(u32 gsi, int triggering) | |||
41 | return -1; | 42 | return -1; |
42 | } | 43 | } |
43 | 44 | ||
44 | if (triggering == ACPI_EDGE_SENSITIVE) { | 45 | if (trigger == ACPI_EDGE_SENSITIVE) { |
45 | shareable = 0; | 46 | shareable = 0; |
46 | name = "ioapic-edge"; | 47 | name = "ioapic-edge"; |
47 | } else { | 48 | } else { |
@@ -55,12 +56,6 @@ static int xen_hvm_register_pirq(u32 gsi, int triggering) | |||
55 | 56 | ||
56 | return irq; | 57 | return irq; |
57 | } | 58 | } |
58 | |||
59 | static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, | ||
60 | int trigger, int polarity) | ||
61 | { | ||
62 | return xen_hvm_register_pirq(gsi, trigger); | ||
63 | } | ||
64 | #endif | 59 | #endif |
65 | 60 | ||
66 | #if defined(CONFIG_PCI_MSI) | 61 | #if defined(CONFIG_PCI_MSI) |
@@ -91,7 +86,7 @@ static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, | |||
91 | 86 | ||
92 | static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | 87 | static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
93 | { | 88 | { |
94 | int irq, pirq, ret = 0; | 89 | int irq, pirq; |
95 | struct msi_desc *msidesc; | 90 | struct msi_desc *msidesc; |
96 | struct msi_msg msg; | 91 | struct msi_msg msg; |
97 | 92 | ||
@@ -99,39 +94,32 @@ static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |||
99 | __read_msi_msg(msidesc, &msg); | 94 | __read_msi_msg(msidesc, &msg); |
100 | pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) | | 95 | pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) | |
101 | ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff); | 96 | ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff); |
102 | if (xen_irq_from_pirq(pirq) >= 0 && msg.data == XEN_PIRQ_MSI_DATA) { | 97 | if (msg.data != XEN_PIRQ_MSI_DATA || |
103 | xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ? | 98 | xen_irq_from_pirq(pirq) < 0) { |
104 | "msi-x" : "msi", &irq, &pirq, XEN_ALLOC_IRQ); | 99 | pirq = xen_allocate_pirq_msi(dev, msidesc); |
105 | if (irq < 0) | 100 | if (pirq < 0) |
106 | goto error; | 101 | goto error; |
107 | ret = set_irq_msi(irq, msidesc); | 102 | xen_msi_compose_msg(dev, pirq, &msg); |
108 | if (ret < 0) | 103 | __write_msi_msg(msidesc, &msg); |
109 | goto error_while; | 104 | dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq); |
110 | printk(KERN_DEBUG "xen: msi already setup: msi --> irq=%d" | 105 | } else { |
111 | " pirq=%d\n", irq, pirq); | 106 | dev_dbg(&dev->dev, |
112 | return 0; | 107 | "xen: msi already bound to pirq=%d\n", pirq); |
113 | } | 108 | } |
114 | xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ? | 109 | irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0, |
115 | "msi-x" : "msi", &irq, &pirq, (XEN_ALLOC_IRQ | XEN_ALLOC_PIRQ)); | 110 | (type == PCI_CAP_ID_MSIX) ? |
116 | if (irq < 0 || pirq < 0) | 111 | "msi-x" : "msi"); |
112 | if (irq < 0) | ||
117 | goto error; | 113 | goto error; |
118 | printk(KERN_DEBUG "xen: msi --> irq=%d, pirq=%d\n", irq, pirq); | 114 | dev_dbg(&dev->dev, |
119 | xen_msi_compose_msg(dev, pirq, &msg); | 115 | "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq); |
120 | ret = set_irq_msi(irq, msidesc); | ||
121 | if (ret < 0) | ||
122 | goto error_while; | ||
123 | write_msi_msg(irq, &msg); | ||
124 | } | 116 | } |
125 | return 0; | 117 | return 0; |
126 | 118 | ||
127 | error_while: | ||
128 | unbind_from_irqhandler(irq, NULL); | ||
129 | error: | 119 | error: |
130 | if (ret == -ENODEV) | 120 | dev_err(&dev->dev, |
131 | dev_err(&dev->dev, "Xen PCI frontend has not registered" \ | 121 | "Xen PCI frontend has not registered MSI/MSI-X support!\n"); |
132 | " MSI/MSI-X support!\n"); | 122 | return -ENODEV; |
133 | |||
134 | return ret; | ||
135 | } | 123 | } |
136 | 124 | ||
137 | /* | 125 | /* |
@@ -150,35 +138,26 @@ static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |||
150 | return -ENOMEM; | 138 | return -ENOMEM; |
151 | 139 | ||
152 | if (type == PCI_CAP_ID_MSIX) | 140 | if (type == PCI_CAP_ID_MSIX) |
153 | ret = xen_pci_frontend_enable_msix(dev, &v, nvec); | 141 | ret = xen_pci_frontend_enable_msix(dev, v, nvec); |
154 | else | 142 | else |
155 | ret = xen_pci_frontend_enable_msi(dev, &v); | 143 | ret = xen_pci_frontend_enable_msi(dev, v); |
156 | if (ret) | 144 | if (ret) |
157 | goto error; | 145 | goto error; |
158 | i = 0; | 146 | i = 0; |
159 | list_for_each_entry(msidesc, &dev->msi_list, list) { | 147 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
160 | irq = xen_allocate_pirq(v[i], 0, /* not sharable */ | 148 | irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0, |
161 | (type == PCI_CAP_ID_MSIX) ? | 149 | (type == PCI_CAP_ID_MSIX) ? |
162 | "pcifront-msi-x" : "pcifront-msi"); | 150 | "pcifront-msi-x" : |
163 | if (irq < 0) { | 151 | "pcifront-msi"); |
164 | ret = -1; | 152 | if (irq < 0) |
165 | goto free; | 153 | goto free; |
166 | } | ||
167 | |||
168 | ret = set_irq_msi(irq, msidesc); | ||
169 | if (ret) | ||
170 | goto error_while; | ||
171 | i++; | 154 | i++; |
172 | } | 155 | } |
173 | kfree(v); | 156 | kfree(v); |
174 | return 0; | 157 | return 0; |
175 | 158 | ||
176 | error_while: | ||
177 | unbind_from_irqhandler(irq, NULL); | ||
178 | error: | 159 | error: |
179 | if (ret == -ENODEV) | 160 | dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n"); |
180 | dev_err(&dev->dev, "Xen PCI frontend has not registered" \ | ||
181 | " MSI/MSI-X support!\n"); | ||
182 | free: | 161 | free: |
183 | kfree(v); | 162 | kfree(v); |
184 | return ret; | 163 | return ret; |
@@ -193,6 +172,9 @@ static void xen_teardown_msi_irqs(struct pci_dev *dev) | |||
193 | xen_pci_frontend_disable_msix(dev); | 172 | xen_pci_frontend_disable_msix(dev); |
194 | else | 173 | else |
195 | xen_pci_frontend_disable_msi(dev); | 174 | xen_pci_frontend_disable_msi(dev); |
175 | |||
176 | /* Free the IRQ's and the msidesc using the generic code. */ | ||
177 | default_teardown_msi_irqs(dev); | ||
196 | } | 178 | } |
197 | 179 | ||
198 | static void xen_teardown_msi_irq(unsigned int irq) | 180 | static void xen_teardown_msi_irq(unsigned int irq) |
@@ -200,47 +182,82 @@ static void xen_teardown_msi_irq(unsigned int irq) | |||
200 | xen_destroy_irq(irq); | 182 | xen_destroy_irq(irq); |
201 | } | 183 | } |
202 | 184 | ||
185 | #ifdef CONFIG_XEN_DOM0 | ||
203 | static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | 186 | static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
204 | { | 187 | { |
205 | int irq, ret; | 188 | int ret = 0; |
206 | struct msi_desc *msidesc; | 189 | struct msi_desc *msidesc; |
207 | 190 | ||
208 | list_for_each_entry(msidesc, &dev->msi_list, list) { | 191 | list_for_each_entry(msidesc, &dev->msi_list, list) { |
209 | irq = xen_create_msi_irq(dev, msidesc, type); | 192 | struct physdev_map_pirq map_irq; |
210 | if (irq < 0) | ||
211 | return -1; | ||
212 | 193 | ||
213 | ret = set_irq_msi(irq, msidesc); | 194 | memset(&map_irq, 0, sizeof(map_irq)); |
214 | if (ret) | 195 | map_irq.domid = DOMID_SELF; |
215 | goto error; | 196 | map_irq.type = MAP_PIRQ_TYPE_MSI; |
216 | } | 197 | map_irq.index = -1; |
217 | return 0; | 198 | map_irq.pirq = -1; |
199 | map_irq.bus = dev->bus->number; | ||
200 | map_irq.devfn = dev->devfn; | ||
218 | 201 | ||
219 | error: | 202 | if (type == PCI_CAP_ID_MSIX) { |
220 | xen_destroy_irq(irq); | 203 | int pos; |
204 | u32 table_offset, bir; | ||
205 | |||
206 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); | ||
207 | |||
208 | pci_read_config_dword(dev, pos + PCI_MSIX_TABLE, | ||
209 | &table_offset); | ||
210 | bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); | ||
211 | |||
212 | map_irq.table_base = pci_resource_start(dev, bir); | ||
213 | map_irq.entry_nr = msidesc->msi_attrib.entry_nr; | ||
214 | } | ||
215 | |||
216 | ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); | ||
217 | if (ret) { | ||
218 | dev_warn(&dev->dev, "xen map irq failed %d\n", ret); | ||
219 | goto out; | ||
220 | } | ||
221 | |||
222 | ret = xen_bind_pirq_msi_to_irq(dev, msidesc, | ||
223 | map_irq.pirq, map_irq.index, | ||
224 | (type == PCI_CAP_ID_MSIX) ? | ||
225 | "msi-x" : "msi"); | ||
226 | if (ret < 0) | ||
227 | goto out; | ||
228 | } | ||
229 | ret = 0; | ||
230 | out: | ||
221 | return ret; | 231 | return ret; |
222 | } | 232 | } |
223 | #endif | 233 | #endif |
234 | #endif | ||
224 | 235 | ||
225 | static int xen_pcifront_enable_irq(struct pci_dev *dev) | 236 | static int xen_pcifront_enable_irq(struct pci_dev *dev) |
226 | { | 237 | { |
227 | int rc; | 238 | int rc; |
228 | int share = 1; | 239 | int share = 1; |
240 | u8 gsi; | ||
229 | 241 | ||
230 | dev_info(&dev->dev, "Xen PCI enabling IRQ: %d\n", dev->irq); | 242 | rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); |
231 | 243 | if (rc < 0) { | |
232 | if (dev->irq < 0) | 244 | dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", |
233 | return -EINVAL; | 245 | rc); |
246 | return rc; | ||
247 | } | ||
234 | 248 | ||
235 | if (dev->irq < NR_IRQS_LEGACY) | 249 | if (gsi < NR_IRQS_LEGACY) |
236 | share = 0; | 250 | share = 0; |
237 | 251 | ||
238 | rc = xen_allocate_pirq(dev->irq, share, "pcifront"); | 252 | rc = xen_allocate_pirq(gsi, share, "pcifront"); |
239 | if (rc < 0) { | 253 | if (rc < 0) { |
240 | dev_warn(&dev->dev, "Xen PCI IRQ: %d, failed to register:%d\n", | 254 | dev_warn(&dev->dev, "Xen PCI: failed to register GSI%d: %d\n", |
241 | dev->irq, rc); | 255 | gsi, rc); |
242 | return rc; | 256 | return rc; |
243 | } | 257 | } |
258 | |||
259 | dev->irq = rc; | ||
260 | dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq); | ||
244 | return 0; | 261 | return 0; |
245 | } | 262 | } |
246 | 263 | ||
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c index d2c0d51a7178..cd6f184c3b3f 100644 --- a/arch/x86/platform/ce4100/ce4100.c +++ b/arch/x86/platform/ce4100/ce4100.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/serial_reg.h> | 15 | #include <linux/serial_reg.h> |
16 | #include <linux/serial_8250.h> | 16 | #include <linux/serial_8250.h> |
17 | 17 | ||
18 | #include <asm/ce4100.h> | ||
18 | #include <asm/setup.h> | 19 | #include <asm/setup.h> |
19 | #include <asm/io.h> | 20 | #include <asm/io.h> |
20 | 21 | ||
@@ -129,4 +130,5 @@ void __init x86_ce4100_early_setup(void) | |||
129 | x86_init.resources.probe_roms = x86_init_noop; | 130 | x86_init.resources.probe_roms = x86_init_noop; |
130 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; | 131 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; |
131 | x86_init.mpparse.find_smp_config = sdv_find_smp_config; | 132 | x86_init.mpparse.find_smp_config = sdv_find_smp_config; |
133 | x86_init.pci.init = ce4100_pci_init; | ||
132 | } | 134 | } |
diff --git a/arch/x86/platform/olpc/olpc_dt.c b/arch/x86/platform/olpc/olpc_dt.c index dab874647530..044bda5b3174 100644 --- a/arch/x86/platform/olpc/olpc_dt.c +++ b/arch/x86/platform/olpc/olpc_dt.c | |||
@@ -140,8 +140,7 @@ void * __init prom_early_alloc(unsigned long size) | |||
140 | * wasted bootmem) and hand off chunks of it to callers. | 140 | * wasted bootmem) and hand off chunks of it to callers. |
141 | */ | 141 | */ |
142 | res = alloc_bootmem(chunk_size); | 142 | res = alloc_bootmem(chunk_size); |
143 | if (!res) | 143 | BUG_ON(!res); |
144 | return NULL; | ||
145 | prom_early_allocated += chunk_size; | 144 | prom_early_allocated += chunk_size; |
146 | memset(res, 0, chunk_size); | 145 | memset(res, 0, chunk_size); |
147 | free_mem = chunk_size; | 146 | free_mem = chunk_size; |
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c index df58e9cad96a..a7b38d35c29a 100644 --- a/arch/x86/platform/uv/tlb_uv.c +++ b/arch/x86/platform/uv/tlb_uv.c | |||
@@ -1364,11 +1364,11 @@ uv_activation_descriptor_init(int node, int pnode) | |||
1364 | memset(bd2, 0, sizeof(struct bau_desc)); | 1364 | memset(bd2, 0, sizeof(struct bau_desc)); |
1365 | bd2->header.sw_ack_flag = 1; | 1365 | bd2->header.sw_ack_flag = 1; |
1366 | /* | 1366 | /* |
1367 | * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub | 1367 | * base_dest_nodeid is the nasid of the first uvhub |
1368 | * in the partition. The bit map will indicate uvhub numbers, | 1368 | * in the partition. The bit map will indicate uvhub numbers, |
1369 | * which are 0-N in a partition. Pnodes are unique system-wide. | 1369 | * which are 0-N in a partition. Pnodes are unique system-wide. |
1370 | */ | 1370 | */ |
1371 | bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1; | 1371 | bd2->header.base_dest_nodeid = UV_PNODE_TO_NASID(uv_partition_base_pnode); |
1372 | bd2->header.dest_subnodeid = 0x10; /* the LB */ | 1372 | bd2->header.dest_subnodeid = 0x10; /* the LB */ |
1373 | bd2->header.command = UV_NET_ENDPOINT_INTD; | 1373 | bd2->header.command = UV_NET_ENDPOINT_INTD; |
1374 | bd2->header.int_both = 1; | 1374 | bd2->header.int_both = 1; |
diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig index 5b54892e4bc3..e4343fe488ed 100644 --- a/arch/x86/xen/Kconfig +++ b/arch/x86/xen/Kconfig | |||
@@ -48,3 +48,11 @@ config XEN_DEBUG_FS | |||
48 | help | 48 | help |
49 | Enable statistics output and various tuning options in debugfs. | 49 | Enable statistics output and various tuning options in debugfs. |
50 | Enabling this option may incur a significant performance overhead. | 50 | Enabling this option may incur a significant performance overhead. |
51 | |||
52 | config XEN_DEBUG | ||
53 | bool "Enable Xen debug checks" | ||
54 | depends on XEN | ||
55 | default n | ||
56 | help | ||
57 | Enable various WARN_ON checks in the Xen MMU code. | ||
58 | Enabling this option WILL incur a significant performance overhead. | ||
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index fe02574789c5..49dbd78ec3cb 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c | |||
@@ -1291,7 +1291,7 @@ static int init_hvm_pv_info(int *major, int *minor) | |||
1291 | return 0; | 1291 | return 0; |
1292 | } | 1292 | } |
1293 | 1293 | ||
1294 | void xen_hvm_init_shared_info(void) | 1294 | void __ref xen_hvm_init_shared_info(void) |
1295 | { | 1295 | { |
1296 | int cpu; | 1296 | int cpu; |
1297 | struct xen_add_to_physmap xatp; | 1297 | struct xen_add_to_physmap xatp; |
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index 5e92b61ad574..832765c0fb8c 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c | |||
@@ -46,6 +46,7 @@ | |||
46 | #include <linux/module.h> | 46 | #include <linux/module.h> |
47 | #include <linux/gfp.h> | 47 | #include <linux/gfp.h> |
48 | #include <linux/memblock.h> | 48 | #include <linux/memblock.h> |
49 | #include <linux/seq_file.h> | ||
49 | 50 | ||
50 | #include <asm/pgtable.h> | 51 | #include <asm/pgtable.h> |
51 | #include <asm/tlbflush.h> | 52 | #include <asm/tlbflush.h> |
@@ -416,8 +417,12 @@ static pteval_t pte_pfn_to_mfn(pteval_t val) | |||
416 | if (val & _PAGE_PRESENT) { | 417 | if (val & _PAGE_PRESENT) { |
417 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; | 418 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
418 | pteval_t flags = val & PTE_FLAGS_MASK; | 419 | pteval_t flags = val & PTE_FLAGS_MASK; |
419 | unsigned long mfn = pfn_to_mfn(pfn); | 420 | unsigned long mfn; |
420 | 421 | ||
422 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | ||
423 | mfn = get_phys_to_machine(pfn); | ||
424 | else | ||
425 | mfn = pfn; | ||
421 | /* | 426 | /* |
422 | * If there's no mfn for the pfn, then just create an | 427 | * If there's no mfn for the pfn, then just create an |
423 | * empty non-present pte. Unfortunately this loses | 428 | * empty non-present pte. Unfortunately this loses |
@@ -427,8 +432,18 @@ static pteval_t pte_pfn_to_mfn(pteval_t val) | |||
427 | if (unlikely(mfn == INVALID_P2M_ENTRY)) { | 432 | if (unlikely(mfn == INVALID_P2M_ENTRY)) { |
428 | mfn = 0; | 433 | mfn = 0; |
429 | flags = 0; | 434 | flags = 0; |
435 | } else { | ||
436 | /* | ||
437 | * Paramount to do this test _after_ the | ||
438 | * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY & | ||
439 | * IDENTITY_FRAME_BIT resolves to true. | ||
440 | */ | ||
441 | mfn &= ~FOREIGN_FRAME_BIT; | ||
442 | if (mfn & IDENTITY_FRAME_BIT) { | ||
443 | mfn &= ~IDENTITY_FRAME_BIT; | ||
444 | flags |= _PAGE_IOMAP; | ||
445 | } | ||
430 | } | 446 | } |
431 | |||
432 | val = ((pteval_t)mfn << PAGE_SHIFT) | flags; | 447 | val = ((pteval_t)mfn << PAGE_SHIFT) | flags; |
433 | } | 448 | } |
434 | 449 | ||
@@ -532,6 +547,41 @@ pte_t xen_make_pte(pteval_t pte) | |||
532 | } | 547 | } |
533 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); | 548 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); |
534 | 549 | ||
550 | #ifdef CONFIG_XEN_DEBUG | ||
551 | pte_t xen_make_pte_debug(pteval_t pte) | ||
552 | { | ||
553 | phys_addr_t addr = (pte & PTE_PFN_MASK); | ||
554 | phys_addr_t other_addr; | ||
555 | bool io_page = false; | ||
556 | pte_t _pte; | ||
557 | |||
558 | if (pte & _PAGE_IOMAP) | ||
559 | io_page = true; | ||
560 | |||
561 | _pte = xen_make_pte(pte); | ||
562 | |||
563 | if (!addr) | ||
564 | return _pte; | ||
565 | |||
566 | if (io_page && | ||
567 | (xen_initial_domain() || addr >= ISA_END_ADDRESS)) { | ||
568 | other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT; | ||
569 | WARN(addr != other_addr, | ||
570 | "0x%lx is using VM_IO, but it is 0x%lx!\n", | ||
571 | (unsigned long)addr, (unsigned long)other_addr); | ||
572 | } else { | ||
573 | pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP; | ||
574 | other_addr = (_pte.pte & PTE_PFN_MASK); | ||
575 | WARN((addr == other_addr) && (!io_page) && (!iomap_set), | ||
576 | "0x%lx is missing VM_IO (and wasn't fixed)!\n", | ||
577 | (unsigned long)addr); | ||
578 | } | ||
579 | |||
580 | return _pte; | ||
581 | } | ||
582 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug); | ||
583 | #endif | ||
584 | |||
535 | pgd_t xen_make_pgd(pgdval_t pgd) | 585 | pgd_t xen_make_pgd(pgdval_t pgd) |
536 | { | 586 | { |
537 | pgd = pte_pfn_to_mfn(pgd); | 587 | pgd = pte_pfn_to_mfn(pgd); |
@@ -986,10 +1036,9 @@ static void xen_pgd_pin(struct mm_struct *mm) | |||
986 | */ | 1036 | */ |
987 | void xen_mm_pin_all(void) | 1037 | void xen_mm_pin_all(void) |
988 | { | 1038 | { |
989 | unsigned long flags; | ||
990 | struct page *page; | 1039 | struct page *page; |
991 | 1040 | ||
992 | spin_lock_irqsave(&pgd_lock, flags); | 1041 | spin_lock(&pgd_lock); |
993 | 1042 | ||
994 | list_for_each_entry(page, &pgd_list, lru) { | 1043 | list_for_each_entry(page, &pgd_list, lru) { |
995 | if (!PagePinned(page)) { | 1044 | if (!PagePinned(page)) { |
@@ -998,7 +1047,7 @@ void xen_mm_pin_all(void) | |||
998 | } | 1047 | } |
999 | } | 1048 | } |
1000 | 1049 | ||
1001 | spin_unlock_irqrestore(&pgd_lock, flags); | 1050 | spin_unlock(&pgd_lock); |
1002 | } | 1051 | } |
1003 | 1052 | ||
1004 | /* | 1053 | /* |
@@ -1099,10 +1148,9 @@ static void xen_pgd_unpin(struct mm_struct *mm) | |||
1099 | */ | 1148 | */ |
1100 | void xen_mm_unpin_all(void) | 1149 | void xen_mm_unpin_all(void) |
1101 | { | 1150 | { |
1102 | unsigned long flags; | ||
1103 | struct page *page; | 1151 | struct page *page; |
1104 | 1152 | ||
1105 | spin_lock_irqsave(&pgd_lock, flags); | 1153 | spin_lock(&pgd_lock); |
1106 | 1154 | ||
1107 | list_for_each_entry(page, &pgd_list, lru) { | 1155 | list_for_each_entry(page, &pgd_list, lru) { |
1108 | if (PageSavePinned(page)) { | 1156 | if (PageSavePinned(page)) { |
@@ -1112,7 +1160,7 @@ void xen_mm_unpin_all(void) | |||
1112 | } | 1160 | } |
1113 | } | 1161 | } |
1114 | 1162 | ||
1115 | spin_unlock_irqrestore(&pgd_lock, flags); | 1163 | spin_unlock(&pgd_lock); |
1116 | } | 1164 | } |
1117 | 1165 | ||
1118 | void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) | 1166 | void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) |
@@ -1942,6 +1990,9 @@ __init void xen_ident_map_ISA(void) | |||
1942 | 1990 | ||
1943 | static __init void xen_post_allocator_init(void) | 1991 | static __init void xen_post_allocator_init(void) |
1944 | { | 1992 | { |
1993 | #ifdef CONFIG_XEN_DEBUG | ||
1994 | pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug); | ||
1995 | #endif | ||
1945 | pv_mmu_ops.set_pte = xen_set_pte; | 1996 | pv_mmu_ops.set_pte = xen_set_pte; |
1946 | pv_mmu_ops.set_pmd = xen_set_pmd; | 1997 | pv_mmu_ops.set_pmd = xen_set_pmd; |
1947 | pv_mmu_ops.set_pud = xen_set_pud; | 1998 | pv_mmu_ops.set_pud = xen_set_pud; |
@@ -2074,7 +2125,7 @@ static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, | |||
2074 | in_frames[i] = virt_to_mfn(vaddr); | 2125 | in_frames[i] = virt_to_mfn(vaddr); |
2075 | 2126 | ||
2076 | MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); | 2127 | MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); |
2077 | set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); | 2128 | __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); |
2078 | 2129 | ||
2079 | if (out_frames) | 2130 | if (out_frames) |
2080 | out_frames[i] = virt_to_pfn(vaddr); | 2131 | out_frames[i] = virt_to_pfn(vaddr); |
@@ -2353,6 +2404,18 @@ EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range); | |||
2353 | 2404 | ||
2354 | #ifdef CONFIG_XEN_DEBUG_FS | 2405 | #ifdef CONFIG_XEN_DEBUG_FS |
2355 | 2406 | ||
2407 | static int p2m_dump_open(struct inode *inode, struct file *filp) | ||
2408 | { | ||
2409 | return single_open(filp, p2m_dump_show, NULL); | ||
2410 | } | ||
2411 | |||
2412 | static const struct file_operations p2m_dump_fops = { | ||
2413 | .open = p2m_dump_open, | ||
2414 | .read = seq_read, | ||
2415 | .llseek = seq_lseek, | ||
2416 | .release = single_release, | ||
2417 | }; | ||
2418 | |||
2356 | static struct dentry *d_mmu_debug; | 2419 | static struct dentry *d_mmu_debug; |
2357 | 2420 | ||
2358 | static int __init xen_mmu_debugfs(void) | 2421 | static int __init xen_mmu_debugfs(void) |
@@ -2408,6 +2471,7 @@ static int __init xen_mmu_debugfs(void) | |||
2408 | debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug, | 2471 | debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug, |
2409 | &mmu_stats.prot_commit_batched); | 2472 | &mmu_stats.prot_commit_batched); |
2410 | 2473 | ||
2474 | debugfs_create_file("p2m", 0600, d_mmu_debug, NULL, &p2m_dump_fops); | ||
2411 | return 0; | 2475 | return 0; |
2412 | } | 2476 | } |
2413 | fs_initcall(xen_mmu_debugfs); | 2477 | fs_initcall(xen_mmu_debugfs); |
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c index fd12d7ce7ff9..215a3ce61068 100644 --- a/arch/x86/xen/p2m.c +++ b/arch/x86/xen/p2m.c | |||
@@ -23,6 +23,129 @@ | |||
23 | * P2M_PER_PAGE depends on the architecture, as a mfn is always | 23 | * P2M_PER_PAGE depends on the architecture, as a mfn is always |
24 | * unsigned long (8 bytes on 64-bit, 4 bytes on 32), leading to | 24 | * unsigned long (8 bytes on 64-bit, 4 bytes on 32), leading to |
25 | * 512 and 1024 entries respectively. | 25 | * 512 and 1024 entries respectively. |
26 | * | ||
27 | * In short, these structures contain the Machine Frame Number (MFN) of the PFN. | ||
28 | * | ||
29 | * However not all entries are filled with MFNs. Specifically for all other | ||
30 | * leaf entries, or for the top root, or middle one, for which there is a void | ||
31 | * entry, we assume it is "missing". So (for example) | ||
32 | * pfn_to_mfn(0x90909090)=INVALID_P2M_ENTRY. | ||
33 | * | ||
34 | * We also have the possibility of setting 1-1 mappings on certain regions, so | ||
35 | * that: | ||
36 | * pfn_to_mfn(0xc0000)=0xc0000 | ||
37 | * | ||
38 | * The benefit of this is, that we can assume for non-RAM regions (think | ||
39 | * PCI BARs, or ACPI spaces), we can create mappings easily b/c we | ||
40 | * get the PFN value to match the MFN. | ||
41 | * | ||
42 | * For this to work efficiently we have one new page p2m_identity and | ||
43 | * allocate (via reserved_brk) any other pages we need to cover the sides | ||
44 | * (1GB or 4MB boundary violations). All entries in p2m_identity are set to | ||
45 | * INVALID_P2M_ENTRY type (Xen toolstack only recognizes that and MFNs, | ||
46 | * no other fancy value). | ||
47 | * | ||
48 | * On lookup we spot that the entry points to p2m_identity and return the | ||
49 | * identity value instead of dereferencing and returning INVALID_P2M_ENTRY. | ||
50 | * If the entry points to an allocated page, we just proceed as before and | ||
51 | * return the PFN. If the PFN has IDENTITY_FRAME_BIT set we unmask that in | ||
52 | * appropriate functions (pfn_to_mfn). | ||
53 | * | ||
54 | * The reason for having the IDENTITY_FRAME_BIT instead of just returning the | ||
55 | * PFN is that we could find ourselves where pfn_to_mfn(pfn)==pfn for a | ||
56 | * non-identity pfn. To protect ourselves against we elect to set (and get) the | ||
57 | * IDENTITY_FRAME_BIT on all identity mapped PFNs. | ||
58 | * | ||
59 | * This simplistic diagram is used to explain the more subtle piece of code. | ||
60 | * There is also a digram of the P2M at the end that can help. | ||
61 | * Imagine your E820 looking as so: | ||
62 | * | ||
63 | * 1GB 2GB | ||
64 | * /-------------------+---------\/----\ /----------\ /---+-----\ | ||
65 | * | System RAM | Sys RAM ||ACPI| | reserved | | Sys RAM | | ||
66 | * \-------------------+---------/\----/ \----------/ \---+-----/ | ||
67 | * ^- 1029MB ^- 2001MB | ||
68 | * | ||
69 | * [1029MB = 263424 (0x40500), 2001MB = 512256 (0x7D100), | ||
70 | * 2048MB = 524288 (0x80000)] | ||
71 | * | ||
72 | * And dom0_mem=max:3GB,1GB is passed in to the guest, meaning memory past 1GB | ||
73 | * is actually not present (would have to kick the balloon driver to put it in). | ||
74 | * | ||
75 | * When we are told to set the PFNs for identity mapping (see patch: "xen/setup: | ||
76 | * Set identity mapping for non-RAM E820 and E820 gaps.") we pass in the start | ||
77 | * of the PFN and the end PFN (263424 and 512256 respectively). The first step | ||
78 | * is to reserve_brk a top leaf page if the p2m[1] is missing. The top leaf page | ||
79 | * covers 512^2 of page estate (1GB) and in case the start or end PFN is not | ||
80 | * aligned on 512^2*PAGE_SIZE (1GB) we loop on aligned 1GB PFNs from start pfn | ||
81 | * to end pfn. We reserve_brk top leaf pages if they are missing (means they | ||
82 | * point to p2m_mid_missing). | ||
83 | * | ||
84 | * With the E820 example above, 263424 is not 1GB aligned so we allocate a | ||
85 | * reserve_brk page which will cover the PFNs estate from 0x40000 to 0x80000. | ||
86 | * Each entry in the allocate page is "missing" (points to p2m_missing). | ||
87 | * | ||
88 | * Next stage is to determine if we need to do a more granular boundary check | ||
89 | * on the 4MB (or 2MB depending on architecture) off the start and end pfn's. | ||
90 | * We check if the start pfn and end pfn violate that boundary check, and if | ||
91 | * so reserve_brk a middle (p2m[x][y]) leaf page. This way we have a much finer | ||
92 | * granularity of setting which PFNs are missing and which ones are identity. | ||
93 | * In our example 263424 and 512256 both fail the check so we reserve_brk two | ||
94 | * pages. Populate them with INVALID_P2M_ENTRY (so they both have "missing" | ||
95 | * values) and assign them to p2m[1][2] and p2m[1][488] respectively. | ||
96 | * | ||
97 | * At this point we would at minimum reserve_brk one page, but could be up to | ||
98 | * three. Each call to set_phys_range_identity has at maximum a three page | ||
99 | * cost. If we were to query the P2M at this stage, all those entries from | ||
100 | * start PFN through end PFN (so 1029MB -> 2001MB) would return | ||
101 | * INVALID_P2M_ENTRY ("missing"). | ||
102 | * | ||
103 | * The next step is to walk from the start pfn to the end pfn setting | ||
104 | * the IDENTITY_FRAME_BIT on each PFN. This is done in set_phys_range_identity. | ||
105 | * If we find that the middle leaf is pointing to p2m_missing we can swap it | ||
106 | * over to p2m_identity - this way covering 4MB (or 2MB) PFN space. At this | ||
107 | * point we do not need to worry about boundary aligment (so no need to | ||
108 | * reserve_brk a middle page, figure out which PFNs are "missing" and which | ||
109 | * ones are identity), as that has been done earlier. If we find that the | ||
110 | * middle leaf is not occupied by p2m_identity or p2m_missing, we dereference | ||
111 | * that page (which covers 512 PFNs) and set the appropriate PFN with | ||
112 | * IDENTITY_FRAME_BIT. In our example 263424 and 512256 end up there, and we | ||
113 | * set from p2m[1][2][256->511] and p2m[1][488][0->256] with | ||
114 | * IDENTITY_FRAME_BIT set. | ||
115 | * | ||
116 | * All other regions that are void (or not filled) either point to p2m_missing | ||
117 | * (considered missing) or have the default value of INVALID_P2M_ENTRY (also | ||
118 | * considered missing). In our case, p2m[1][2][0->255] and p2m[1][488][257->511] | ||
119 | * contain the INVALID_P2M_ENTRY value and are considered "missing." | ||
120 | * | ||
121 | * This is what the p2m ends up looking (for the E820 above) with this | ||
122 | * fabulous drawing: | ||
123 | * | ||
124 | * p2m /--------------\ | ||
125 | * /-----\ | &mfn_list[0],| /-----------------\ | ||
126 | * | 0 |------>| &mfn_list[1],| /---------------\ | ~0, ~0, .. | | ||
127 | * |-----| | ..., ~0, ~0 | | ~0, ~0, [x]---+----->| IDENTITY [@256] | | ||
128 | * | 1 |---\ \--------------/ | [p2m_identity]+\ | IDENTITY [@257] | | ||
129 | * |-----| \ | [p2m_identity]+\\ | .... | | ||
130 | * | 2 |--\ \-------------------->| ... | \\ \----------------/ | ||
131 | * |-----| \ \---------------/ \\ | ||
132 | * | 3 |\ \ \\ p2m_identity | ||
133 | * |-----| \ \-------------------->/---------------\ /-----------------\ | ||
134 | * | .. +->+ | [p2m_identity]+-->| ~0, ~0, ~0, ... | | ||
135 | * \-----/ / | [p2m_identity]+-->| ..., ~0 | | ||
136 | * / /---------------\ | .... | \-----------------/ | ||
137 | * / | IDENTITY[@0] | /-+-[x], ~0, ~0.. | | ||
138 | * / | IDENTITY[@256]|<----/ \---------------/ | ||
139 | * / | ~0, ~0, .... | | ||
140 | * | \---------------/ | ||
141 | * | | ||
142 | * p2m_missing p2m_missing | ||
143 | * /------------------\ /------------\ | ||
144 | * | [p2m_mid_missing]+---->| ~0, ~0, ~0 | | ||
145 | * | [p2m_mid_missing]+---->| ..., ~0 | | ||
146 | * \------------------/ \------------/ | ||
147 | * | ||
148 | * where ~0 is INVALID_P2M_ENTRY. IDENTITY is (PFN | IDENTITY_BIT) | ||
26 | */ | 149 | */ |
27 | 150 | ||
28 | #include <linux/init.h> | 151 | #include <linux/init.h> |
@@ -30,6 +153,7 @@ | |||
30 | #include <linux/list.h> | 153 | #include <linux/list.h> |
31 | #include <linux/hash.h> | 154 | #include <linux/hash.h> |
32 | #include <linux/sched.h> | 155 | #include <linux/sched.h> |
156 | #include <linux/seq_file.h> | ||
33 | 157 | ||
34 | #include <asm/cache.h> | 158 | #include <asm/cache.h> |
35 | #include <asm/setup.h> | 159 | #include <asm/setup.h> |
@@ -59,9 +183,15 @@ static RESERVE_BRK_ARRAY(unsigned long **, p2m_top, P2M_TOP_PER_PAGE); | |||
59 | static RESERVE_BRK_ARRAY(unsigned long, p2m_top_mfn, P2M_TOP_PER_PAGE); | 183 | static RESERVE_BRK_ARRAY(unsigned long, p2m_top_mfn, P2M_TOP_PER_PAGE); |
60 | static RESERVE_BRK_ARRAY(unsigned long *, p2m_top_mfn_p, P2M_TOP_PER_PAGE); | 184 | static RESERVE_BRK_ARRAY(unsigned long *, p2m_top_mfn_p, P2M_TOP_PER_PAGE); |
61 | 185 | ||
186 | static RESERVE_BRK_ARRAY(unsigned long, p2m_identity, P2M_PER_PAGE); | ||
187 | |||
62 | RESERVE_BRK(p2m_mid, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE))); | 188 | RESERVE_BRK(p2m_mid, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE))); |
63 | RESERVE_BRK(p2m_mid_mfn, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE))); | 189 | RESERVE_BRK(p2m_mid_mfn, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID_PER_PAGE))); |
64 | 190 | ||
191 | /* We might hit two boundary violations at the start and end, at max each | ||
192 | * boundary violation will require three middle nodes. */ | ||
193 | RESERVE_BRK(p2m_mid_identity, PAGE_SIZE * 2 * 3); | ||
194 | |||
65 | static inline unsigned p2m_top_index(unsigned long pfn) | 195 | static inline unsigned p2m_top_index(unsigned long pfn) |
66 | { | 196 | { |
67 | BUG_ON(pfn >= MAX_P2M_PFN); | 197 | BUG_ON(pfn >= MAX_P2M_PFN); |
@@ -136,7 +266,7 @@ static void p2m_init(unsigned long *p2m) | |||
136 | * - After resume we're called from within stop_machine, but the mfn | 266 | * - After resume we're called from within stop_machine, but the mfn |
137 | * tree should alreay be completely allocated. | 267 | * tree should alreay be completely allocated. |
138 | */ | 268 | */ |
139 | void xen_build_mfn_list_list(void) | 269 | void __ref xen_build_mfn_list_list(void) |
140 | { | 270 | { |
141 | unsigned long pfn; | 271 | unsigned long pfn; |
142 | 272 | ||
@@ -221,6 +351,9 @@ void __init xen_build_dynamic_phys_to_machine(void) | |||
221 | p2m_top = extend_brk(PAGE_SIZE, PAGE_SIZE); | 351 | p2m_top = extend_brk(PAGE_SIZE, PAGE_SIZE); |
222 | p2m_top_init(p2m_top); | 352 | p2m_top_init(p2m_top); |
223 | 353 | ||
354 | p2m_identity = extend_brk(PAGE_SIZE, PAGE_SIZE); | ||
355 | p2m_init(p2m_identity); | ||
356 | |||
224 | /* | 357 | /* |
225 | * The domain builder gives us a pre-constructed p2m array in | 358 | * The domain builder gives us a pre-constructed p2m array in |
226 | * mfn_list for all the pages initially given to us, so we just | 359 | * mfn_list for all the pages initially given to us, so we just |
@@ -266,6 +399,14 @@ unsigned long get_phys_to_machine(unsigned long pfn) | |||
266 | mididx = p2m_mid_index(pfn); | 399 | mididx = p2m_mid_index(pfn); |
267 | idx = p2m_index(pfn); | 400 | idx = p2m_index(pfn); |
268 | 401 | ||
402 | /* | ||
403 | * The INVALID_P2M_ENTRY is filled in both p2m_*identity | ||
404 | * and in p2m_*missing, so returning the INVALID_P2M_ENTRY | ||
405 | * would be wrong. | ||
406 | */ | ||
407 | if (p2m_top[topidx][mididx] == p2m_identity) | ||
408 | return IDENTITY_FRAME(pfn); | ||
409 | |||
269 | return p2m_top[topidx][mididx][idx]; | 410 | return p2m_top[topidx][mididx][idx]; |
270 | } | 411 | } |
271 | EXPORT_SYMBOL_GPL(get_phys_to_machine); | 412 | EXPORT_SYMBOL_GPL(get_phys_to_machine); |
@@ -335,9 +476,11 @@ static bool alloc_p2m(unsigned long pfn) | |||
335 | p2m_top_mfn_p[topidx] = mid_mfn; | 476 | p2m_top_mfn_p[topidx] = mid_mfn; |
336 | } | 477 | } |
337 | 478 | ||
338 | if (p2m_top[topidx][mididx] == p2m_missing) { | 479 | if (p2m_top[topidx][mididx] == p2m_identity || |
480 | p2m_top[topidx][mididx] == p2m_missing) { | ||
339 | /* p2m leaf page is missing */ | 481 | /* p2m leaf page is missing */ |
340 | unsigned long *p2m; | 482 | unsigned long *p2m; |
483 | unsigned long *p2m_orig = p2m_top[topidx][mididx]; | ||
341 | 484 | ||
342 | p2m = alloc_p2m_page(); | 485 | p2m = alloc_p2m_page(); |
343 | if (!p2m) | 486 | if (!p2m) |
@@ -345,7 +488,7 @@ static bool alloc_p2m(unsigned long pfn) | |||
345 | 488 | ||
346 | p2m_init(p2m); | 489 | p2m_init(p2m); |
347 | 490 | ||
348 | if (cmpxchg(&mid[mididx], p2m_missing, p2m) != p2m_missing) | 491 | if (cmpxchg(&mid[mididx], p2m_orig, p2m) != p2m_orig) |
349 | free_p2m_page(p2m); | 492 | free_p2m_page(p2m); |
350 | else | 493 | else |
351 | mid_mfn[mididx] = virt_to_mfn(p2m); | 494 | mid_mfn[mididx] = virt_to_mfn(p2m); |
@@ -354,11 +497,91 @@ static bool alloc_p2m(unsigned long pfn) | |||
354 | return true; | 497 | return true; |
355 | } | 498 | } |
356 | 499 | ||
500 | bool __early_alloc_p2m(unsigned long pfn) | ||
501 | { | ||
502 | unsigned topidx, mididx, idx; | ||
503 | |||
504 | topidx = p2m_top_index(pfn); | ||
505 | mididx = p2m_mid_index(pfn); | ||
506 | idx = p2m_index(pfn); | ||
507 | |||
508 | /* Pfff.. No boundary cross-over, lets get out. */ | ||
509 | if (!idx) | ||
510 | return false; | ||
511 | |||
512 | WARN(p2m_top[topidx][mididx] == p2m_identity, | ||
513 | "P2M[%d][%d] == IDENTITY, should be MISSING (or alloced)!\n", | ||
514 | topidx, mididx); | ||
515 | |||
516 | /* | ||
517 | * Could be done by xen_build_dynamic_phys_to_machine.. | ||
518 | */ | ||
519 | if (p2m_top[topidx][mididx] != p2m_missing) | ||
520 | return false; | ||
521 | |||
522 | /* Boundary cross-over for the edges: */ | ||
523 | if (idx) { | ||
524 | unsigned long *p2m = extend_brk(PAGE_SIZE, PAGE_SIZE); | ||
525 | |||
526 | p2m_init(p2m); | ||
527 | |||
528 | p2m_top[topidx][mididx] = p2m; | ||
529 | |||
530 | } | ||
531 | return idx != 0; | ||
532 | } | ||
533 | unsigned long set_phys_range_identity(unsigned long pfn_s, | ||
534 | unsigned long pfn_e) | ||
535 | { | ||
536 | unsigned long pfn; | ||
537 | |||
538 | if (unlikely(pfn_s >= MAX_P2M_PFN || pfn_e >= MAX_P2M_PFN)) | ||
539 | return 0; | ||
540 | |||
541 | if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) | ||
542 | return pfn_e - pfn_s; | ||
543 | |||
544 | if (pfn_s > pfn_e) | ||
545 | return 0; | ||
546 | |||
547 | for (pfn = (pfn_s & ~(P2M_MID_PER_PAGE * P2M_PER_PAGE - 1)); | ||
548 | pfn < ALIGN(pfn_e, (P2M_MID_PER_PAGE * P2M_PER_PAGE)); | ||
549 | pfn += P2M_MID_PER_PAGE * P2M_PER_PAGE) | ||
550 | { | ||
551 | unsigned topidx = p2m_top_index(pfn); | ||
552 | if (p2m_top[topidx] == p2m_mid_missing) { | ||
553 | unsigned long **mid = extend_brk(PAGE_SIZE, PAGE_SIZE); | ||
554 | |||
555 | p2m_mid_init(mid); | ||
556 | |||
557 | p2m_top[topidx] = mid; | ||
558 | } | ||
559 | } | ||
560 | |||
561 | __early_alloc_p2m(pfn_s); | ||
562 | __early_alloc_p2m(pfn_e); | ||
563 | |||
564 | for (pfn = pfn_s; pfn < pfn_e; pfn++) | ||
565 | if (!__set_phys_to_machine(pfn, IDENTITY_FRAME(pfn))) | ||
566 | break; | ||
567 | |||
568 | if (!WARN((pfn - pfn_s) != (pfn_e - pfn_s), | ||
569 | "Identity mapping failed. We are %ld short of 1-1 mappings!\n", | ||
570 | (pfn_e - pfn_s) - (pfn - pfn_s))) | ||
571 | printk(KERN_DEBUG "1-1 mapping on %lx->%lx\n", pfn_s, pfn); | ||
572 | |||
573 | return pfn - pfn_s; | ||
574 | } | ||
575 | |||
357 | /* Try to install p2m mapping; fail if intermediate bits missing */ | 576 | /* Try to install p2m mapping; fail if intermediate bits missing */ |
358 | bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn) | 577 | bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn) |
359 | { | 578 | { |
360 | unsigned topidx, mididx, idx; | 579 | unsigned topidx, mididx, idx; |
361 | 580 | ||
581 | if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) { | ||
582 | BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY); | ||
583 | return true; | ||
584 | } | ||
362 | if (unlikely(pfn >= MAX_P2M_PFN)) { | 585 | if (unlikely(pfn >= MAX_P2M_PFN)) { |
363 | BUG_ON(mfn != INVALID_P2M_ENTRY); | 586 | BUG_ON(mfn != INVALID_P2M_ENTRY); |
364 | return true; | 587 | return true; |
@@ -368,6 +591,21 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn) | |||
368 | mididx = p2m_mid_index(pfn); | 591 | mididx = p2m_mid_index(pfn); |
369 | idx = p2m_index(pfn); | 592 | idx = p2m_index(pfn); |
370 | 593 | ||
594 | /* For sparse holes were the p2m leaf has real PFN along with | ||
595 | * PCI holes, stick in the PFN as the MFN value. | ||
596 | */ | ||
597 | if (mfn != INVALID_P2M_ENTRY && (mfn & IDENTITY_FRAME_BIT)) { | ||
598 | if (p2m_top[topidx][mididx] == p2m_identity) | ||
599 | return true; | ||
600 | |||
601 | /* Swap over from MISSING to IDENTITY if needed. */ | ||
602 | if (p2m_top[topidx][mididx] == p2m_missing) { | ||
603 | WARN_ON(cmpxchg(&p2m_top[topidx][mididx], p2m_missing, | ||
604 | p2m_identity) != p2m_missing); | ||
605 | return true; | ||
606 | } | ||
607 | } | ||
608 | |||
371 | if (p2m_top[topidx][mididx] == p2m_missing) | 609 | if (p2m_top[topidx][mididx] == p2m_missing) |
372 | return mfn == INVALID_P2M_ENTRY; | 610 | return mfn == INVALID_P2M_ENTRY; |
373 | 611 | ||
@@ -378,11 +616,6 @@ bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn) | |||
378 | 616 | ||
379 | bool set_phys_to_machine(unsigned long pfn, unsigned long mfn) | 617 | bool set_phys_to_machine(unsigned long pfn, unsigned long mfn) |
380 | { | 618 | { |
381 | if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) { | ||
382 | BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY); | ||
383 | return true; | ||
384 | } | ||
385 | |||
386 | if (unlikely(!__set_phys_to_machine(pfn, mfn))) { | 619 | if (unlikely(!__set_phys_to_machine(pfn, mfn))) { |
387 | if (!alloc_p2m(pfn)) | 620 | if (!alloc_p2m(pfn)) |
388 | return false; | 621 | return false; |
@@ -421,7 +654,7 @@ int m2p_add_override(unsigned long mfn, struct page *page) | |||
421 | { | 654 | { |
422 | unsigned long flags; | 655 | unsigned long flags; |
423 | unsigned long pfn; | 656 | unsigned long pfn; |
424 | unsigned long address; | 657 | unsigned long uninitialized_var(address); |
425 | unsigned level; | 658 | unsigned level; |
426 | pte_t *ptep = NULL; | 659 | pte_t *ptep = NULL; |
427 | 660 | ||
@@ -455,7 +688,7 @@ int m2p_remove_override(struct page *page) | |||
455 | unsigned long flags; | 688 | unsigned long flags; |
456 | unsigned long mfn; | 689 | unsigned long mfn; |
457 | unsigned long pfn; | 690 | unsigned long pfn; |
458 | unsigned long address; | 691 | unsigned long uninitialized_var(address); |
459 | unsigned level; | 692 | unsigned level; |
460 | pte_t *ptep = NULL; | 693 | pte_t *ptep = NULL; |
461 | 694 | ||
@@ -520,3 +753,80 @@ unsigned long m2p_find_override_pfn(unsigned long mfn, unsigned long pfn) | |||
520 | return ret; | 753 | return ret; |
521 | } | 754 | } |
522 | EXPORT_SYMBOL_GPL(m2p_find_override_pfn); | 755 | EXPORT_SYMBOL_GPL(m2p_find_override_pfn); |
756 | |||
757 | #ifdef CONFIG_XEN_DEBUG_FS | ||
758 | |||
759 | int p2m_dump_show(struct seq_file *m, void *v) | ||
760 | { | ||
761 | static const char * const level_name[] = { "top", "middle", | ||
762 | "entry", "abnormal" }; | ||
763 | static const char * const type_name[] = { "identity", "missing", | ||
764 | "pfn", "abnormal"}; | ||
765 | #define TYPE_IDENTITY 0 | ||
766 | #define TYPE_MISSING 1 | ||
767 | #define TYPE_PFN 2 | ||
768 | #define TYPE_UNKNOWN 3 | ||
769 | unsigned long pfn, prev_pfn_type = 0, prev_pfn_level = 0; | ||
770 | unsigned int uninitialized_var(prev_level); | ||
771 | unsigned int uninitialized_var(prev_type); | ||
772 | |||
773 | if (!p2m_top) | ||
774 | return 0; | ||
775 | |||
776 | for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn++) { | ||
777 | unsigned topidx = p2m_top_index(pfn); | ||
778 | unsigned mididx = p2m_mid_index(pfn); | ||
779 | unsigned idx = p2m_index(pfn); | ||
780 | unsigned lvl, type; | ||
781 | |||
782 | lvl = 4; | ||
783 | type = TYPE_UNKNOWN; | ||
784 | if (p2m_top[topidx] == p2m_mid_missing) { | ||
785 | lvl = 0; type = TYPE_MISSING; | ||
786 | } else if (p2m_top[topidx] == NULL) { | ||
787 | lvl = 0; type = TYPE_UNKNOWN; | ||
788 | } else if (p2m_top[topidx][mididx] == NULL) { | ||
789 | lvl = 1; type = TYPE_UNKNOWN; | ||
790 | } else if (p2m_top[topidx][mididx] == p2m_identity) { | ||
791 | lvl = 1; type = TYPE_IDENTITY; | ||
792 | } else if (p2m_top[topidx][mididx] == p2m_missing) { | ||
793 | lvl = 1; type = TYPE_MISSING; | ||
794 | } else if (p2m_top[topidx][mididx][idx] == 0) { | ||
795 | lvl = 2; type = TYPE_UNKNOWN; | ||
796 | } else if (p2m_top[topidx][mididx][idx] == IDENTITY_FRAME(pfn)) { | ||
797 | lvl = 2; type = TYPE_IDENTITY; | ||
798 | } else if (p2m_top[topidx][mididx][idx] == INVALID_P2M_ENTRY) { | ||
799 | lvl = 2; type = TYPE_MISSING; | ||
800 | } else if (p2m_top[topidx][mididx][idx] == pfn) { | ||
801 | lvl = 2; type = TYPE_PFN; | ||
802 | } else if (p2m_top[topidx][mididx][idx] != pfn) { | ||
803 | lvl = 2; type = TYPE_PFN; | ||
804 | } | ||
805 | if (pfn == 0) { | ||
806 | prev_level = lvl; | ||
807 | prev_type = type; | ||
808 | } | ||
809 | if (pfn == MAX_DOMAIN_PAGES-1) { | ||
810 | lvl = 3; | ||
811 | type = TYPE_UNKNOWN; | ||
812 | } | ||
813 | if (prev_type != type) { | ||
814 | seq_printf(m, " [0x%lx->0x%lx] %s\n", | ||
815 | prev_pfn_type, pfn, type_name[prev_type]); | ||
816 | prev_pfn_type = pfn; | ||
817 | prev_type = type; | ||
818 | } | ||
819 | if (prev_level != lvl) { | ||
820 | seq_printf(m, " [0x%lx->0x%lx] level %s\n", | ||
821 | prev_pfn_level, pfn, level_name[prev_level]); | ||
822 | prev_pfn_level = pfn; | ||
823 | prev_level = lvl; | ||
824 | } | ||
825 | } | ||
826 | return 0; | ||
827 | #undef TYPE_IDENTITY | ||
828 | #undef TYPE_MISSING | ||
829 | #undef TYPE_PFN | ||
830 | #undef TYPE_UNKNOWN | ||
831 | } | ||
832 | #endif | ||
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index a8a66a50d446..fa0269a99377 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c | |||
@@ -52,6 +52,8 @@ phys_addr_t xen_extra_mem_start, xen_extra_mem_size; | |||
52 | 52 | ||
53 | static __init void xen_add_extra_mem(unsigned long pages) | 53 | static __init void xen_add_extra_mem(unsigned long pages) |
54 | { | 54 | { |
55 | unsigned long pfn; | ||
56 | |||
55 | u64 size = (u64)pages * PAGE_SIZE; | 57 | u64 size = (u64)pages * PAGE_SIZE; |
56 | u64 extra_start = xen_extra_mem_start + xen_extra_mem_size; | 58 | u64 extra_start = xen_extra_mem_start + xen_extra_mem_size; |
57 | 59 | ||
@@ -66,6 +68,9 @@ static __init void xen_add_extra_mem(unsigned long pages) | |||
66 | xen_extra_mem_size += size; | 68 | xen_extra_mem_size += size; |
67 | 69 | ||
68 | xen_max_p2m_pfn = PFN_DOWN(extra_start + size); | 70 | xen_max_p2m_pfn = PFN_DOWN(extra_start + size); |
71 | |||
72 | for (pfn = PFN_DOWN(extra_start); pfn <= xen_max_p2m_pfn; pfn++) | ||
73 | __set_phys_to_machine(pfn, INVALID_P2M_ENTRY); | ||
69 | } | 74 | } |
70 | 75 | ||
71 | static unsigned long __init xen_release_chunk(phys_addr_t start_addr, | 76 | static unsigned long __init xen_release_chunk(phys_addr_t start_addr, |
@@ -104,7 +109,7 @@ static unsigned long __init xen_release_chunk(phys_addr_t start_addr, | |||
104 | WARN(ret != 1, "Failed to release memory %lx-%lx err=%d\n", | 109 | WARN(ret != 1, "Failed to release memory %lx-%lx err=%d\n", |
105 | start, end, ret); | 110 | start, end, ret); |
106 | if (ret == 1) { | 111 | if (ret == 1) { |
107 | set_phys_to_machine(pfn, INVALID_P2M_ENTRY); | 112 | __set_phys_to_machine(pfn, INVALID_P2M_ENTRY); |
108 | len++; | 113 | len++; |
109 | } | 114 | } |
110 | } | 115 | } |
@@ -138,12 +143,55 @@ static unsigned long __init xen_return_unused_memory(unsigned long max_pfn, | |||
138 | return released; | 143 | return released; |
139 | } | 144 | } |
140 | 145 | ||
146 | static unsigned long __init xen_set_identity(const struct e820entry *list, | ||
147 | ssize_t map_size) | ||
148 | { | ||
149 | phys_addr_t last = xen_initial_domain() ? 0 : ISA_END_ADDRESS; | ||
150 | phys_addr_t start_pci = last; | ||
151 | const struct e820entry *entry; | ||
152 | unsigned long identity = 0; | ||
153 | int i; | ||
154 | |||
155 | for (i = 0, entry = list; i < map_size; i++, entry++) { | ||
156 | phys_addr_t start = entry->addr; | ||
157 | phys_addr_t end = start + entry->size; | ||
158 | |||
159 | if (start < last) | ||
160 | start = last; | ||
161 | |||
162 | if (end <= start) | ||
163 | continue; | ||
164 | |||
165 | /* Skip over the 1MB region. */ | ||
166 | if (last > end) | ||
167 | continue; | ||
168 | |||
169 | if (entry->type == E820_RAM) { | ||
170 | if (start > start_pci) | ||
171 | identity += set_phys_range_identity( | ||
172 | PFN_UP(start_pci), PFN_DOWN(start)); | ||
173 | |||
174 | /* Without saving 'last' we would gooble RAM too | ||
175 | * at the end of the loop. */ | ||
176 | last = end; | ||
177 | start_pci = end; | ||
178 | continue; | ||
179 | } | ||
180 | start_pci = min(start, start_pci); | ||
181 | last = end; | ||
182 | } | ||
183 | if (last > start_pci) | ||
184 | identity += set_phys_range_identity( | ||
185 | PFN_UP(start_pci), PFN_DOWN(last)); | ||
186 | return identity; | ||
187 | } | ||
141 | /** | 188 | /** |
142 | * machine_specific_memory_setup - Hook for machine specific memory setup. | 189 | * machine_specific_memory_setup - Hook for machine specific memory setup. |
143 | **/ | 190 | **/ |
144 | char * __init xen_memory_setup(void) | 191 | char * __init xen_memory_setup(void) |
145 | { | 192 | { |
146 | static struct e820entry map[E820MAX] __initdata; | 193 | static struct e820entry map[E820MAX] __initdata; |
194 | static struct e820entry map_raw[E820MAX] __initdata; | ||
147 | 195 | ||
148 | unsigned long max_pfn = xen_start_info->nr_pages; | 196 | unsigned long max_pfn = xen_start_info->nr_pages; |
149 | unsigned long long mem_end; | 197 | unsigned long long mem_end; |
@@ -151,6 +199,7 @@ char * __init xen_memory_setup(void) | |||
151 | struct xen_memory_map memmap; | 199 | struct xen_memory_map memmap; |
152 | unsigned long extra_pages = 0; | 200 | unsigned long extra_pages = 0; |
153 | unsigned long extra_limit; | 201 | unsigned long extra_limit; |
202 | unsigned long identity_pages = 0; | ||
154 | int i; | 203 | int i; |
155 | int op; | 204 | int op; |
156 | 205 | ||
@@ -176,6 +225,7 @@ char * __init xen_memory_setup(void) | |||
176 | } | 225 | } |
177 | BUG_ON(rc); | 226 | BUG_ON(rc); |
178 | 227 | ||
228 | memcpy(map_raw, map, sizeof(map)); | ||
179 | e820.nr_map = 0; | 229 | e820.nr_map = 0; |
180 | xen_extra_mem_start = mem_end; | 230 | xen_extra_mem_start = mem_end; |
181 | for (i = 0; i < memmap.nr_entries; i++) { | 231 | for (i = 0; i < memmap.nr_entries; i++) { |
@@ -194,6 +244,15 @@ char * __init xen_memory_setup(void) | |||
194 | end -= delta; | 244 | end -= delta; |
195 | 245 | ||
196 | extra_pages += PFN_DOWN(delta); | 246 | extra_pages += PFN_DOWN(delta); |
247 | /* | ||
248 | * Set RAM below 4GB that is not for us to be unusable. | ||
249 | * This prevents "System RAM" address space from being | ||
250 | * used as potential resource for I/O address (happens | ||
251 | * when 'allocate_resource' is called). | ||
252 | */ | ||
253 | if (delta && | ||
254 | (xen_initial_domain() && end < 0x100000000ULL)) | ||
255 | e820_add_region(end, delta, E820_UNUSABLE); | ||
197 | } | 256 | } |
198 | 257 | ||
199 | if (map[i].size > 0 && end > xen_extra_mem_start) | 258 | if (map[i].size > 0 && end > xen_extra_mem_start) |
@@ -251,6 +310,13 @@ char * __init xen_memory_setup(void) | |||
251 | 310 | ||
252 | xen_add_extra_mem(extra_pages); | 311 | xen_add_extra_mem(extra_pages); |
253 | 312 | ||
313 | /* | ||
314 | * Set P2M for all non-RAM pages and E820 gaps to be identity | ||
315 | * type PFNs. We supply it with the non-sanitized version | ||
316 | * of the E820. | ||
317 | */ | ||
318 | identity_pages = xen_set_identity(map_raw, memmap.nr_entries); | ||
319 | printk(KERN_INFO "Set %ld page(s) to 1-1 mapping.\n", identity_pages); | ||
254 | return "Xen"; | 320 | return "Xen"; |
255 | } | 321 | } |
256 | 322 | ||
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 067759e3d6a5..2e2d370a47b1 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c | |||
@@ -397,7 +397,9 @@ void xen_setup_timer(int cpu) | |||
397 | name = "<timer kasprintf failed>"; | 397 | name = "<timer kasprintf failed>"; |
398 | 398 | ||
399 | irq = bind_virq_to_irqhandler(VIRQ_TIMER, cpu, xen_timer_interrupt, | 399 | irq = bind_virq_to_irqhandler(VIRQ_TIMER, cpu, xen_timer_interrupt, |
400 | IRQF_DISABLED|IRQF_PERCPU|IRQF_NOBALANCING|IRQF_TIMER, | 400 | IRQF_DISABLED|IRQF_PERCPU| |
401 | IRQF_NOBALANCING|IRQF_TIMER| | ||
402 | IRQF_FORCE_RESUME, | ||
401 | name, NULL); | 403 | name, NULL); |
402 | 404 | ||
403 | evt = &per_cpu(xen_clock_events, cpu); | 405 | evt = &per_cpu(xen_clock_events, cpu); |