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-rw-r--r--arch/arm/kernel/bios32.c4
-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mm/cache-l2x0.c12
-rw-r--r--arch/i386/boot/header.S2
-rw-r--r--arch/i386/boot/memory.c39
-rw-r--r--arch/i386/boot/video.c14
-rw-r--r--arch/i386/kernel/acpi/wakeup.S41
-rw-r--r--arch/i386/xen/mmu.c5
-rw-r--r--arch/mips/kernel/i8259.c5
-rw-r--r--arch/mips/kernel/irq-msc01.c10
-rw-r--r--arch/mips/kernel/irq.c10
-rw-r--r--arch/mips/kernel/scall64-o32.S2
-rw-r--r--arch/mips/kernel/smtc.c5
-rw-r--r--arch/mips/kernel/vmlinux.lds.S2
-rw-r--r--arch/mips/sgi-ip32/ip32-platform.c4
-rw-r--r--arch/mips/sibyte/bcm1480/setup.c2
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts1
-rw-r--r--arch/powerpc/kernel/process.c7
-rw-r--r--arch/powerpc/platforms/83xx/usb.c4
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c4
-rw-r--r--arch/powerpc/platforms/pseries/xics.c2
-rw-r--r--arch/powerpc/sysdev/commproc.c2
-rw-r--r--arch/ppc/8xx_io/commproc.c2
-rw-r--r--arch/sparc/kernel/ebus.c2
-rw-r--r--arch/sparc64/kernel/binfmt_aout32.c4
-rw-r--r--arch/sparc64/kernel/ebus.c5
-rw-r--r--arch/sparc64/lib/NGcopy_from_user.S8
-rw-r--r--arch/sparc64/lib/NGcopy_to_user.S8
-rw-r--r--arch/sparc64/lib/NGmemcpy.S371
-rw-r--r--arch/x86_64/Kconfig8
-rw-r--r--arch/x86_64/ia32/ia32entry.S18
-rw-r--r--arch/x86_64/kernel/acpi/wakeup.S47
-rw-r--r--arch/x86_64/kernel/process.c1
-rw-r--r--arch/x86_64/kernel/ptrace.c4
-rw-r--r--arch/x86_64/kernel/smp.c2
-rw-r--r--arch/x86_64/vdso/voffset.h2
36 files changed, 357 insertions, 304 deletions
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 240c448ec31c..a2dd930d11ef 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -338,7 +338,7 @@ pbus_assign_bus_resources(struct pci_bus *bus, struct pci_sys_data *root)
338 * pcibios_fixup_bus - Called after each bus is probed, 338 * pcibios_fixup_bus - Called after each bus is probed,
339 * but before its children are examined. 339 * but before its children are examined.
340 */ 340 */
341void __devinit pcibios_fixup_bus(struct pci_bus *bus) 341void pcibios_fixup_bus(struct pci_bus *bus)
342{ 342{
343 struct pci_sys_data *root = bus->sysdata; 343 struct pci_sys_data *root = bus->sysdata;
344 struct pci_dev *dev; 344 struct pci_dev *dev;
@@ -419,7 +419,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
419/* 419/*
420 * Convert from Linux-centric to bus-centric addresses for bridge devices. 420 * Convert from Linux-centric to bus-centric addresses for bridge devices.
421 */ 421 */
422void __devinit 422void
423pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 423pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
424 struct resource *res) 424 struct resource *res)
425{ 425{
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 851cc7158ca3..70b2c7801110 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -336,7 +336,7 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
336 if (line >= 0 && line < 16) { 336 if (line >= 0 && line < 16) {
337 gpio_line_config(line, GPIO_IN); 337 gpio_line_config(line, GPIO_IN);
338 } else { 338 } else {
339 gpio_line_config(EP93XX_GPIO_LINE_F(line), GPIO_IN); 339 gpio_line_config(EP93XX_GPIO_LINE_F(line-16), GPIO_IN);
340 } 340 }
341 341
342 port = line >> 3; 342 port = line >> 3;
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index b4e9b734e0bd..76b800a95191 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -57,7 +57,17 @@ static void l2x0_inv_range(unsigned long start, unsigned long end)
57{ 57{
58 unsigned long addr; 58 unsigned long addr;
59 59
60 start &= ~(CACHE_LINE_SIZE - 1); 60 if (start & (CACHE_LINE_SIZE - 1)) {
61 start &= ~(CACHE_LINE_SIZE - 1);
62 sync_writel(start, L2X0_CLEAN_INV_LINE_PA, 1);
63 start += CACHE_LINE_SIZE;
64 }
65
66 if (end & (CACHE_LINE_SIZE - 1)) {
67 end &= ~(CACHE_LINE_SIZE - 1);
68 sync_writel(end, L2X0_CLEAN_INV_LINE_PA, 1);
69 }
70
61 for (addr = start; addr < end; addr += CACHE_LINE_SIZE) 71 for (addr = start; addr < end; addr += CACHE_LINE_SIZE)
62 sync_writel(addr, L2X0_INV_LINE_PA, 1); 72 sync_writel(addr, L2X0_INV_LINE_PA, 1);
63 cache_sync(); 73 cache_sync();
diff --git a/arch/i386/boot/header.S b/arch/i386/boot/header.S
index 7f4a2c53bd76..f3140e596d40 100644
--- a/arch/i386/boot/header.S
+++ b/arch/i386/boot/header.S
@@ -275,7 +275,7 @@ die:
275 hlt 275 hlt
276 jmp die 276 jmp die
277 277
278 .size die, .-due 278 .size die, .-die
279 279
280 .section ".initdata", "a" 280 .section ".initdata", "a"
281setup_corrupt: 281setup_corrupt:
diff --git a/arch/i386/boot/memory.c b/arch/i386/boot/memory.c
index 1a2e62db8bed..378353956b5d 100644
--- a/arch/i386/boot/memory.c
+++ b/arch/i386/boot/memory.c
@@ -20,6 +20,7 @@
20 20
21static int detect_memory_e820(void) 21static int detect_memory_e820(void)
22{ 22{
23 int count = 0;
23 u32 next = 0; 24 u32 next = 0;
24 u32 size, id; 25 u32 size, id;
25 u8 err; 26 u8 err;
@@ -27,20 +28,33 @@ static int detect_memory_e820(void)
27 28
28 do { 29 do {
29 size = sizeof(struct e820entry); 30 size = sizeof(struct e820entry);
30 id = SMAP; 31
32 /* Important: %edx is clobbered by some BIOSes,
33 so it must be either used for the error output
34 or explicitly marked clobbered. */
31 asm("int $0x15; setc %0" 35 asm("int $0x15; setc %0"
32 : "=am" (err), "+b" (next), "+d" (id), "+c" (size), 36 : "=d" (err), "+b" (next), "=a" (id), "+c" (size),
33 "=m" (*desc) 37 "=m" (*desc)
34 : "D" (desc), "a" (0xe820)); 38 : "D" (desc), "d" (SMAP), "a" (0xe820));
39
40 /* Some BIOSes stop returning SMAP in the middle of
41 the search loop. We don't know exactly how the BIOS
42 screwed up the map at that point, we might have a
43 partial map, the full map, or complete garbage, so
44 just return failure. */
45 if (id != SMAP) {
46 count = 0;
47 break;
48 }
35 49
36 if (err || id != SMAP) 50 if (err)
37 break; 51 break;
38 52
39 boot_params.e820_entries++; 53 count++;
40 desc++; 54 desc++;
41 } while (next && boot_params.e820_entries < E820MAX); 55 } while (next && count < E820MAX);
42 56
43 return boot_params.e820_entries; 57 return boot_params.e820_entries = count;
44} 58}
45 59
46static int detect_memory_e801(void) 60static int detect_memory_e801(void)
@@ -89,11 +103,16 @@ static int detect_memory_88(void)
89 103
90int detect_memory(void) 104int detect_memory(void)
91{ 105{
106 int err = -1;
107
92 if (detect_memory_e820() > 0) 108 if (detect_memory_e820() > 0)
93 return 0; 109 err = 0;
94 110
95 if (!detect_memory_e801()) 111 if (!detect_memory_e801())
96 return 0; 112 err = 0;
113
114 if (!detect_memory_88())
115 err = 0;
97 116
98 return detect_memory_88(); 117 return err;
99} 118}
diff --git a/arch/i386/boot/video.c b/arch/i386/boot/video.c
index 693f20d3102e..e4ba897bf9a3 100644
--- a/arch/i386/boot/video.c
+++ b/arch/i386/boot/video.c
@@ -147,7 +147,7 @@ int mode_defined(u16 mode)
147} 147}
148 148
149/* Set mode (without recalc) */ 149/* Set mode (without recalc) */
150static int raw_set_mode(u16 mode) 150static int raw_set_mode(u16 mode, u16 *real_mode)
151{ 151{
152 int nmode, i; 152 int nmode, i;
153 struct card_info *card; 153 struct card_info *card;
@@ -165,8 +165,10 @@ static int raw_set_mode(u16 mode)
165 165
166 if ((mode == nmode && visible) || 166 if ((mode == nmode && visible) ||
167 mode == mi->mode || 167 mode == mi->mode ||
168 mode == (mi->y << 8)+mi->x) 168 mode == (mi->y << 8)+mi->x) {
169 *real_mode = mi->mode;
169 return card->set_mode(mi); 170 return card->set_mode(mi);
171 }
170 172
171 if (visible) 173 if (visible)
172 nmode++; 174 nmode++;
@@ -178,7 +180,7 @@ static int raw_set_mode(u16 mode)
178 if (mode >= card->xmode_first && 180 if (mode >= card->xmode_first &&
179 mode < card->xmode_first+card->xmode_n) { 181 mode < card->xmode_first+card->xmode_n) {
180 struct mode_info mix; 182 struct mode_info mix;
181 mix.mode = mode; 183 *real_mode = mix.mode = mode;
182 mix.x = mix.y = 0; 184 mix.x = mix.y = 0;
183 return card->set_mode(&mix); 185 return card->set_mode(&mix);
184 } 186 }
@@ -223,6 +225,7 @@ static void vga_recalc_vertical(void)
223static int set_mode(u16 mode) 225static int set_mode(u16 mode)
224{ 226{
225 int rv; 227 int rv;
228 u16 real_mode;
226 229
227 /* Very special mode numbers... */ 230 /* Very special mode numbers... */
228 if (mode == VIDEO_CURRENT_MODE) 231 if (mode == VIDEO_CURRENT_MODE)
@@ -232,13 +235,16 @@ static int set_mode(u16 mode)
232 else if (mode == EXTENDED_VGA) 235 else if (mode == EXTENDED_VGA)
233 mode = VIDEO_8POINT; 236 mode = VIDEO_8POINT;
234 237
235 rv = raw_set_mode(mode); 238 rv = raw_set_mode(mode, &real_mode);
236 if (rv) 239 if (rv)
237 return rv; 240 return rv;
238 241
239 if (mode & VIDEO_RECALC) 242 if (mode & VIDEO_RECALC)
240 vga_recalc_vertical(); 243 vga_recalc_vertical();
241 244
245 /* Save the canonical mode number for the kernel, not
246 an alias, size specification or menu position */
247 boot_params.hdr.vid_mode = real_mode;
242 return 0; 248 return 0;
243} 249}
244 250
diff --git a/arch/i386/kernel/acpi/wakeup.S b/arch/i386/kernel/acpi/wakeup.S
index ed0a0f2c1597..f22ba8534d26 100644
--- a/arch/i386/kernel/acpi/wakeup.S
+++ b/arch/i386/kernel/acpi/wakeup.S
@@ -151,51 +151,30 @@ bogus_real_magic:
151#define VIDEO_FIRST_V7 0x0900 151#define VIDEO_FIRST_V7 0x0900
152 152
153# Setting of user mode (AX=mode ID) => CF=success 153# Setting of user mode (AX=mode ID) => CF=success
154
155# For now, we only handle VESA modes (0x0200..0x03ff). To handle other
156# modes, we should probably compile in the video code from the boot
157# directory.
154mode_set: 158mode_set:
155 movw %ax, %bx 159 movw %ax, %bx
156#if 0 160 subb $VIDEO_FIRST_VESA>>8, %bh
157 cmpb $0xff, %ah 161 cmpb $2, %bh
158 jz setalias 162 jb check_vesa
159
160 testb $VIDEO_RECALC>>8, %ah
161 jnz _setrec
162
163 cmpb $VIDEO_FIRST_RESOLUTION>>8, %ah
164 jnc setres
165
166 cmpb $VIDEO_FIRST_SPECIAL>>8, %ah
167 jz setspc
168
169 cmpb $VIDEO_FIRST_V7>>8, %ah
170 jz setv7
171#endif
172
173 cmpb $VIDEO_FIRST_VESA>>8, %ah
174 jnc check_vesa
175#if 0
176 orb %ah, %ah
177 jz setmenu
178#endif
179
180 decb %ah
181# jz setbios Add bios modes later
182 163
183setbad: clc 164setbad:
165 clc
184 ret 166 ret
185 167
186check_vesa: 168check_vesa:
187 subb $VIDEO_FIRST_VESA>>8, %bh
188 orw $0x4000, %bx # Use linear frame buffer 169 orw $0x4000, %bx # Use linear frame buffer
189 movw $0x4f02, %ax # VESA BIOS mode set call 170 movw $0x4f02, %ax # VESA BIOS mode set call
190 int $0x10 171 int $0x10
191 cmpw $0x004f, %ax # AL=4f if implemented 172 cmpw $0x004f, %ax # AL=4f if implemented
192 jnz _setbad # AH=0 if OK 173 jnz setbad # AH=0 if OK
193 174
194 stc 175 stc
195 ret 176 ret
196 177
197_setbad: jmp setbad
198
199 .code32 178 .code32
200 ALIGN 179 ALIGN
201 180
diff --git a/arch/i386/xen/mmu.c b/arch/i386/xen/mmu.c
index 4ae038aa6c24..874db0cd1d2a 100644
--- a/arch/i386/xen/mmu.c
+++ b/arch/i386/xen/mmu.c
@@ -559,6 +559,9 @@ void xen_exit_mmap(struct mm_struct *mm)
559 put_cpu(); 559 put_cpu();
560 560
561 spin_lock(&mm->page_table_lock); 561 spin_lock(&mm->page_table_lock);
562 xen_pgd_unpin(mm->pgd); 562
563 /* pgd may not be pinned in the error exit path of execve */
564 if (PagePinned(virt_to_page(mm->pgd)))
565 xen_pgd_unpin(mm->pgd);
563 spin_unlock(&mm->page_table_lock); 566 spin_unlock(&mm->page_table_lock);
564} 567}
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index b6c30800c667..3a2d255361bc 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -177,10 +177,7 @@ handle_real_irq:
177 outb(cached_master_mask, PIC_MASTER_IMR); 177 outb(cached_master_mask, PIC_MASTER_IMR);
178 outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ 178 outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */
179 } 179 }
180#ifdef CONFIG_MIPS_MT_SMTC 180 smtc_im_ack_irq(irq);
181 if (irq_hwmask[irq] & ST0_IM)
182 set_c0_status(irq_hwmask[irq] & ST0_IM);
183#endif /* CONFIG_MIPS_MT_SMTC */
184 spin_unlock_irqrestore(&i8259A_lock, flags); 181 spin_unlock_irqrestore(&i8259A_lock, flags);
185 return; 182 return;
186 183
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 410868b5ea5f..1ecdd50bfc60 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -52,11 +52,8 @@ static void level_mask_and_ack_msc_irq(unsigned int irq)
52 mask_msc_irq(irq); 52 mask_msc_irq(irq);
53 if (!cpu_has_veic) 53 if (!cpu_has_veic)
54 MSCIC_WRITE(MSC01_IC_EOI, 0); 54 MSCIC_WRITE(MSC01_IC_EOI, 0);
55#ifdef CONFIG_MIPS_MT_SMTC
56 /* This actually needs to be a call into platform code */ 55 /* This actually needs to be a call into platform code */
57 if (irq_hwmask[irq] & ST0_IM) 56 smtc_im_ack_irq(irq);
58 set_c0_status(irq_hwmask[irq] & ST0_IM);
59#endif /* CONFIG_MIPS_MT_SMTC */
60} 57}
61 58
62/* 59/*
@@ -73,10 +70,7 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq)
73 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT); 70 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
74 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r); 71 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
75 } 72 }
76#ifdef CONFIG_MIPS_MT_SMTC 73 smtc_im_ack_irq(irq);
77 if (irq_hwmask[irq] & ST0_IM)
78 set_c0_status(irq_hwmask[irq] & ST0_IM);
79#endif /* CONFIG_MIPS_MT_SMTC */
80} 74}
81 75
82/* 76/*
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index aeded6c17de5..a990aad2f049 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -74,20 +74,12 @@ EXPORT_SYMBOL_GPL(free_irqno);
74 */ 74 */
75void ack_bad_irq(unsigned int irq) 75void ack_bad_irq(unsigned int irq)
76{ 76{
77 smtc_im_ack_irq(irq);
77 printk("unexpected IRQ # %d\n", irq); 78 printk("unexpected IRQ # %d\n", irq);
78} 79}
79 80
80atomic_t irq_err_count; 81atomic_t irq_err_count;
81 82
82#ifdef CONFIG_MIPS_MT_SMTC
83/*
84 * SMTC Kernel needs to manipulate low-level CPU interrupt mask
85 * in do_IRQ. These are passed in setup_irq_smtc() and stored
86 * in this table.
87 */
88unsigned long irq_hwmask[NR_IRQS];
89#endif /* CONFIG_MIPS_MT_SMTC */
90
91/* 83/*
92 * Generic, controller-independent functions: 84 * Generic, controller-independent functions:
93 */ 85 */
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index b3ed731a24c6..dd68afce7da5 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -525,5 +525,5 @@ sys_call_table:
525 PTR compat_sys_signalfd 525 PTR compat_sys_signalfd
526 PTR compat_sys_timerfd 526 PTR compat_sys_timerfd
527 PTR sys_eventfd 527 PTR sys_eventfd
528 PTR sys_fallocate /* 4320 */ 528 PTR sys32_fallocate /* 4320 */
529 .size sys_call_table,.-sys_call_table 529 .size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 43826c16101d..f09404377ef1 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -25,8 +25,11 @@
25#include <asm/smtc_proc.h> 25#include <asm/smtc_proc.h>
26 26
27/* 27/*
28 * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set. 28 * SMTC Kernel needs to manipulate low-level CPU interrupt mask
29 * in do_IRQ. These are passed in setup_irq_smtc() and stored
30 * in this table.
29 */ 31 */
32unsigned long irq_hwmask[NR_IRQS];
30 33
31#define LOCK_MT_PRA() \ 34#define LOCK_MT_PRA() \
32 local_irq_save(flags); \ 35 local_irq_save(flags); \
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 60bbaecde187..087ab997487d 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -45,6 +45,8 @@ SECTIONS
45 __dbe_table : { *(__dbe_table) } 45 __dbe_table : { *(__dbe_table) }
46 __stop___dbe_table = .; 46 __stop___dbe_table = .;
47 47
48 NOTES
49
48 RODATA 50 RODATA
49 51
50 /* writeable */ 52 /* writeable */
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index ba3697ee7ff6..7309e48d163d 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -41,8 +41,8 @@ static struct platform_device uart8250_device = {
41 41
42static int __init uart8250_init(void) 42static int __init uart8250_init(void)
43{ 43{
44 uart8250_data[0].iobase = (unsigned long) &mace->isa.serial1; 44 uart8250_data[0].membase = (void __iomem *) &mace->isa.serial1;
45 uart8250_data[1].iobase = (unsigned long) &mace->isa.serial1; 45 uart8250_data[1].membase = (void __iomem *) &mace->isa.serial1;
46 46
47 return platform_device_register(&uart8250_device); 47 return platform_device_register(&uart8250_device);
48} 48}
diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c
index bb28f28e8042..7e1aa348b8e0 100644
--- a/arch/mips/sibyte/bcm1480/setup.c
+++ b/arch/mips/sibyte/bcm1480/setup.c
@@ -15,6 +15,7 @@
15 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */ 17 */
18#include <linux/init.h>
18#include <linux/kernel.h> 19#include <linux/kernel.h>
19#include <linux/module.h> 20#include <linux/module.h>
20#include <linux/reboot.h> 21#include <linux/reboot.h>
@@ -35,6 +36,7 @@ unsigned int soc_type;
35EXPORT_SYMBOL(soc_type); 36EXPORT_SYMBOL(soc_type);
36unsigned int periph_rev; 37unsigned int periph_rev;
37unsigned int zbbus_mhz; 38unsigned int zbbus_mhz;
39EXPORT_SYMBOL(zbbus_mhz);
38 40
39static unsigned int part_type; 41static unsigned int part_type;
40 42
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index f5c3086bcb5d..3bc32029ca5b 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -97,6 +97,7 @@
97 #size-cells = <0>; 97 #size-cells = <0>;
98 interrupt-parent = < &ipic >; 98 interrupt-parent = < &ipic >;
99 interrupts = <26 8>; 99 interrupts = <26 8>;
100 dr_mode = "peripheral";
100 phy_type = "ulpi"; 101 phy_type = "ulpi";
101 }; 102 };
102 103
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 588c0cb8115e..15998b57767c 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -613,6 +613,13 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
613 regs->ccr = 0; 613 regs->ccr = 0;
614 regs->gpr[1] = sp; 614 regs->gpr[1] = sp;
615 615
616 /*
617 * We have just cleared all the nonvolatile GPRs, so make
618 * FULL_REGS(regs) return true. This is necessary to allow
619 * ptrace to examine the thread immediately after exec.
620 */
621 regs->trap &= ~1UL;
622
616#ifdef CONFIG_PPC32 623#ifdef CONFIG_PPC32
617 regs->mq = 0; 624 regs->mq = 0;
618 regs->nip = start; 625 regs->nip = start;
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index e7fdf013cd39..eafe7605cdac 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -76,14 +76,14 @@ int mpc834x_usb_cfg(void)
76 if (port0_is_dr) 76 if (port0_is_dr)
77 printk(KERN_WARNING 77 printk(KERN_WARNING
78 "834x USB port0 can't be used by both DR and MPH!\n"); 78 "834x USB port0 can't be used by both DR and MPH!\n");
79 sicrl |= MPC834X_SICRL_USB0; 79 sicrl &= ~MPC834X_SICRL_USB0;
80 } 80 }
81 prop = of_get_property(np, "port1", NULL); 81 prop = of_get_property(np, "port1", NULL);
82 if (prop) { 82 if (prop) {
83 if (port1_is_dr) 83 if (port1_is_dr)
84 printk(KERN_WARNING 84 printk(KERN_WARNING
85 "834x USB port1 can't be used by both DR and MPH!\n"); 85 "834x USB port1 can't be used by both DR and MPH!\n");
86 sicrl |= MPC834X_SICRL_USB1; 86 sicrl &= ~MPC834X_SICRL_USB1;
87 } 87 }
88 of_node_put(np); 88 of_node_put(np);
89 } 89 }
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index b93a0275a217..d72b16d6816e 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -2110,8 +2110,8 @@ struct tree_descr spufs_dir_contents[] = {
2110 { "mbox_stat", &spufs_mbox_stat_fops, 0444, }, 2110 { "mbox_stat", &spufs_mbox_stat_fops, 0444, },
2111 { "ibox_stat", &spufs_ibox_stat_fops, 0444, }, 2111 { "ibox_stat", &spufs_ibox_stat_fops, 0444, },
2112 { "wbox_stat", &spufs_wbox_stat_fops, 0444, }, 2112 { "wbox_stat", &spufs_wbox_stat_fops, 0444, },
2113 { "signal1", &spufs_signal1_nosched_fops, 0222, }, 2113 { "signal1", &spufs_signal1_fops, 0666, },
2114 { "signal2", &spufs_signal2_nosched_fops, 0222, }, 2114 { "signal2", &spufs_signal2_fops, 0666, },
2115 { "signal1_type", &spufs_signal1_type, 0666, }, 2115 { "signal1_type", &spufs_signal1_type, 0666, },
2116 { "signal2_type", &spufs_signal2_type, 0666, }, 2116 { "signal2_type", &spufs_signal2_type, 0666, },
2117 { "cntl", &spufs_cntl_fops, 0666, }, 2117 { "cntl", &spufs_cntl_fops, 0666, },
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 5ddb0259b1fb..66e7d68ffeb1 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -419,7 +419,7 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
419 * For the moment only implement delivery to all cpus or one cpu. 419 * For the moment only implement delivery to all cpus or one cpu.
420 * Get current irq_server for the given irq 420 * Get current irq_server for the given irq
421 */ 421 */
422 irq_server = get_irq_server(irq, 1); 422 irq_server = get_irq_server(virq, 1);
423 if (irq_server == -1) { 423 if (irq_server == -1) {
424 char cpulist[128]; 424 char cpulist[128];
425 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask); 425 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index b562afc4e50c..160a8b49bdea 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -387,4 +387,4 @@ uint cpm_dpram_phys(u8* addr)
387{ 387{
388 return (dpram_pbase + (uint)(addr - dpram_vbase)); 388 return (dpram_pbase + (uint)(addr - dpram_vbase));
389} 389}
390EXPORT_SYMBOL(cpm_dpram_addr); 390EXPORT_SYMBOL(cpm_dpram_phys);
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 7088428e1fe2..9da880be4dc0 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -459,7 +459,7 @@ EXPORT_SYMBOL(cpm_dpdump);
459 459
460void *cpm_dpram_addr(unsigned long offset) 460void *cpm_dpram_addr(unsigned long offset)
461{ 461{
462 return ((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem + offset; 462 return (void *)(dpram_vbase + offset);
463} 463}
464EXPORT_SYMBOL(cpm_dpram_addr); 464EXPORT_SYMBOL(cpm_dpram_addr);
465 465
diff --git a/arch/sparc/kernel/ebus.c b/arch/sparc/kernel/ebus.c
index e2d02fd13f35..d850785b2080 100644
--- a/arch/sparc/kernel/ebus.c
+++ b/arch/sparc/kernel/ebus.c
@@ -156,6 +156,8 @@ void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *d
156 dev->prom_node = dp; 156 dev->prom_node = dp;
157 157
158 regs = of_get_property(dp, "reg", &len); 158 regs = of_get_property(dp, "reg", &len);
159 if (!regs)
160 len = 0;
159 if (len % sizeof(struct linux_prom_registers)) { 161 if (len % sizeof(struct linux_prom_registers)) {
160 prom_printf("UGH: proplen for %s was %d, need multiple of %d\n", 162 prom_printf("UGH: proplen for %s was %d, need multiple of %d\n",
161 dev->prom_node->name, len, 163 dev->prom_node->name, len,
diff --git a/arch/sparc64/kernel/binfmt_aout32.c b/arch/sparc64/kernel/binfmt_aout32.c
index f205fc7cbcd0..d208cc7804f2 100644
--- a/arch/sparc64/kernel/binfmt_aout32.c
+++ b/arch/sparc64/kernel/binfmt_aout32.c
@@ -177,7 +177,7 @@ static u32 __user *create_aout32_tables(char __user *p, struct linux_binprm *bpr
177 get_user(c,p++); 177 get_user(c,p++);
178 } while (c); 178 } while (c);
179 } 179 }
180 put_user(NULL,argv); 180 put_user(0,argv);
181 current->mm->arg_end = current->mm->env_start = (unsigned long) p; 181 current->mm->arg_end = current->mm->env_start = (unsigned long) p;
182 while (envc-->0) { 182 while (envc-->0) {
183 char c; 183 char c;
@@ -186,7 +186,7 @@ static u32 __user *create_aout32_tables(char __user *p, struct linux_binprm *bpr
186 get_user(c,p++); 186 get_user(c,p++);
187 } while (c); 187 } while (c);
188 } 188 }
189 put_user(NULL,envp); 189 put_user(0,envp);
190 current->mm->env_end = (unsigned long) p; 190 current->mm->env_end = (unsigned long) p;
191 return sp; 191 return sp;
192} 192}
diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc64/kernel/ebus.c
index bc9ae36f7a43..04ab81cb4f48 100644
--- a/arch/sparc64/kernel/ebus.c
+++ b/arch/sparc64/kernel/ebus.c
@@ -375,7 +375,10 @@ static void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_de
375 dev->num_addrs = 0; 375 dev->num_addrs = 0;
376 dev->num_irqs = 0; 376 dev->num_irqs = 0;
377 } else { 377 } else {
378 (void) of_get_property(dp, "reg", &len); 378 const int *regs = of_get_property(dp, "reg", &len);
379
380 if (!regs)
381 len = 0;
379 dev->num_addrs = len / sizeof(struct linux_prom_registers); 382 dev->num_addrs = len / sizeof(struct linux_prom_registers);
380 383
381 for (i = 0; i < dev->num_addrs; i++) 384 for (i = 0; i < dev->num_addrs; i++)
diff --git a/arch/sparc64/lib/NGcopy_from_user.S b/arch/sparc64/lib/NGcopy_from_user.S
index 2d93456f76dd..e7f433f71b42 100644
--- a/arch/sparc64/lib/NGcopy_from_user.S
+++ b/arch/sparc64/lib/NGcopy_from_user.S
@@ -1,6 +1,6 @@
1/* NGcopy_from_user.S: Niagara optimized copy from userspace. 1/* NGcopy_from_user.S: Niagara optimized copy from userspace.
2 * 2 *
3 * Copyright (C) 2006 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 2006, 2007 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#define EX_LD(x) \ 6#define EX_LD(x) \
@@ -8,8 +8,8 @@
8 .section .fixup; \ 8 .section .fixup; \
9 .align 4; \ 9 .align 4; \
1099: wr %g0, ASI_AIUS, %asi;\ 1099: wr %g0, ASI_AIUS, %asi;\
11 retl; \ 11 ret; \
12 mov 1, %o0; \ 12 restore %g0, 1, %o0; \
13 .section __ex_table,"a";\ 13 .section __ex_table,"a";\
14 .align 4; \ 14 .align 4; \
15 .word 98b, 99b; \ 15 .word 98b, 99b; \
@@ -24,7 +24,7 @@
24#define LOAD(type,addr,dest) type##a [addr] ASI_AIUS, dest 24#define LOAD(type,addr,dest) type##a [addr] ASI_AIUS, dest
25#define LOAD_TWIN(addr_reg,dest0,dest1) \ 25#define LOAD_TWIN(addr_reg,dest0,dest1) \
26 ldda [addr_reg] ASI_BLK_INIT_QUAD_LDD_AIUS, dest0 26 ldda [addr_reg] ASI_BLK_INIT_QUAD_LDD_AIUS, dest0
27#define EX_RETVAL(x) 0 27#define EX_RETVAL(x) %g0
28 28
29#ifdef __KERNEL__ 29#ifdef __KERNEL__
30#define PREAMBLE \ 30#define PREAMBLE \
diff --git a/arch/sparc64/lib/NGcopy_to_user.S b/arch/sparc64/lib/NGcopy_to_user.S
index 34112d5054ef..6ea01c5532a0 100644
--- a/arch/sparc64/lib/NGcopy_to_user.S
+++ b/arch/sparc64/lib/NGcopy_to_user.S
@@ -1,6 +1,6 @@
1/* NGcopy_to_user.S: Niagara optimized copy to userspace. 1/* NGcopy_to_user.S: Niagara optimized copy to userspace.
2 * 2 *
3 * Copyright (C) 2006 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 2006, 2007 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#define EX_ST(x) \ 6#define EX_ST(x) \
@@ -8,8 +8,8 @@
8 .section .fixup; \ 8 .section .fixup; \
9 .align 4; \ 9 .align 4; \
1099: wr %g0, ASI_AIUS, %asi;\ 1099: wr %g0, ASI_AIUS, %asi;\
11 retl; \ 11 ret; \
12 mov 1, %o0; \ 12 restore %g0, 1, %o0; \
13 .section __ex_table,"a";\ 13 .section __ex_table,"a";\
14 .align 4; \ 14 .align 4; \
15 .word 98b, 99b; \ 15 .word 98b, 99b; \
@@ -23,7 +23,7 @@
23#define FUNC_NAME NGcopy_to_user 23#define FUNC_NAME NGcopy_to_user
24#define STORE(type,src,addr) type##a src, [addr] ASI_AIUS 24#define STORE(type,src,addr) type##a src, [addr] ASI_AIUS
25#define STORE_ASI ASI_BLK_INIT_QUAD_LDD_AIUS 25#define STORE_ASI ASI_BLK_INIT_QUAD_LDD_AIUS
26#define EX_RETVAL(x) 0 26#define EX_RETVAL(x) %g0
27 27
28#ifdef __KERNEL__ 28#ifdef __KERNEL__
29 /* Writing to %asi is _expensive_ so we hardcode it. 29 /* Writing to %asi is _expensive_ so we hardcode it.
diff --git a/arch/sparc64/lib/NGmemcpy.S b/arch/sparc64/lib/NGmemcpy.S
index 66063a9a66b8..605cb3f09900 100644
--- a/arch/sparc64/lib/NGmemcpy.S
+++ b/arch/sparc64/lib/NGmemcpy.S
@@ -1,6 +1,6 @@
1/* NGmemcpy.S: Niagara optimized memcpy. 1/* NGmemcpy.S: Niagara optimized memcpy.
2 * 2 *
3 * Copyright (C) 2006 David S. Miller (davem@davemloft.net) 3 * Copyright (C) 2006, 2007 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#ifdef __KERNEL__ 6#ifdef __KERNEL__
@@ -16,6 +16,12 @@
16 wr %g0, ASI_PNF, %asi 16 wr %g0, ASI_PNF, %asi
17#endif 17#endif
18 18
19#ifdef __sparc_v9__
20#define SAVE_AMOUNT 128
21#else
22#define SAVE_AMOUNT 64
23#endif
24
19#ifndef STORE_ASI 25#ifndef STORE_ASI
20#define STORE_ASI ASI_BLK_INIT_QUAD_LDD_P 26#define STORE_ASI ASI_BLK_INIT_QUAD_LDD_P
21#endif 27#endif
@@ -50,7 +56,11 @@
50#endif 56#endif
51 57
52#ifndef STORE_INIT 58#ifndef STORE_INIT
59#ifndef SIMULATE_NIAGARA_ON_NON_NIAGARA
53#define STORE_INIT(src,addr) stxa src, [addr] %asi 60#define STORE_INIT(src,addr) stxa src, [addr] %asi
61#else
62#define STORE_INIT(src,addr) stx src, [addr + 0x00]
63#endif
54#endif 64#endif
55 65
56#ifndef FUNC_NAME 66#ifndef FUNC_NAME
@@ -73,18 +83,19 @@
73 83
74 .globl FUNC_NAME 84 .globl FUNC_NAME
75 .type FUNC_NAME,#function 85 .type FUNC_NAME,#function
76FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */ 86FUNC_NAME: /* %i0=dst, %i1=src, %i2=len */
77 srlx %o2, 31, %g2 87 PREAMBLE
88 save %sp, -SAVE_AMOUNT, %sp
89 srlx %i2, 31, %g2
78 cmp %g2, 0 90 cmp %g2, 0
79 tne %xcc, 5 91 tne %xcc, 5
80 PREAMBLE 92 mov %i0, %o0
81 mov %o0, GLOBAL_SPARE 93 cmp %i2, 0
82 cmp %o2, 0
83 be,pn %XCC, 85f 94 be,pn %XCC, 85f
84 or %o0, %o1, %o3 95 or %o0, %i1, %i3
85 cmp %o2, 16 96 cmp %i2, 16
86 blu,a,pn %XCC, 80f 97 blu,a,pn %XCC, 80f
87 or %o3, %o2, %o3 98 or %i3, %i2, %i3
88 99
89 /* 2 blocks (128 bytes) is the minimum we can do the block 100 /* 2 blocks (128 bytes) is the minimum we can do the block
90 * copy with. We need to ensure that we'll iterate at least 101 * copy with. We need to ensure that we'll iterate at least
@@ -93,31 +104,31 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
93 * to (64 - 1) bytes from the length before we perform the 104 * to (64 - 1) bytes from the length before we perform the
94 * block copy loop. 105 * block copy loop.
95 */ 106 */
96 cmp %o2, (2 * 64) 107 cmp %i2, (2 * 64)
97 blu,pt %XCC, 70f 108 blu,pt %XCC, 70f
98 andcc %o3, 0x7, %g0 109 andcc %i3, 0x7, %g0
99 110
100 /* %o0: dst 111 /* %o0: dst
101 * %o1: src 112 * %i1: src
102 * %o2: len (known to be >= 128) 113 * %i2: len (known to be >= 128)
103 * 114 *
104 * The block copy loops will use %o4/%o5,%g2/%g3 as 115 * The block copy loops will use %i4/%i5,%g2/%g3 as
105 * temporaries while copying the data. 116 * temporaries while copying the data.
106 */ 117 */
107 118
108 LOAD(prefetch, %o1, #one_read) 119 LOAD(prefetch, %i1, #one_read)
109 wr %g0, STORE_ASI, %asi 120 wr %g0, STORE_ASI, %asi
110 121
111 /* Align destination on 64-byte boundary. */ 122 /* Align destination on 64-byte boundary. */
112 andcc %o0, (64 - 1), %o4 123 andcc %o0, (64 - 1), %i4
113 be,pt %XCC, 2f 124 be,pt %XCC, 2f
114 sub %o4, 64, %o4 125 sub %i4, 64, %i4
115 sub %g0, %o4, %o4 ! bytes to align dst 126 sub %g0, %i4, %i4 ! bytes to align dst
116 sub %o2, %o4, %o2 127 sub %i2, %i4, %i2
1171: subcc %o4, 1, %o4 1281: subcc %i4, 1, %i4
118 EX_LD(LOAD(ldub, %o1, %g1)) 129 EX_LD(LOAD(ldub, %i1, %g1))
119 EX_ST(STORE(stb, %g1, %o0)) 130 EX_ST(STORE(stb, %g1, %o0))
120 add %o1, 1, %o1 131 add %i1, 1, %i1
121 bne,pt %XCC, 1b 132 bne,pt %XCC, 1b
122 add %o0, 1, %o0 133 add %o0, 1, %o0
123 134
@@ -136,111 +147,155 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
136 * aligned store data at a time, this is easy to ensure. 147 * aligned store data at a time, this is easy to ensure.
137 */ 148 */
1382: 1492:
139 andcc %o1, (16 - 1), %o4 150 andcc %i1, (16 - 1), %i4
140 andn %o2, (64 - 1), %g1 ! block copy loop iterator 151 andn %i2, (64 - 1), %g1 ! block copy loop iterator
141 sub %o2, %g1, %o2 ! final sub-block copy bytes
142 be,pt %XCC, 50f 152 be,pt %XCC, 50f
143 cmp %o4, 8 153 sub %i2, %g1, %i2 ! final sub-block copy bytes
144 be,a,pt %XCC, 10f 154
145 sub %o1, 0x8, %o1 155 cmp %i4, 8
156 be,pt %XCC, 10f
157 sub %i1, %i4, %i1
146 158
147 /* Neither 8-byte nor 16-byte aligned, shift and mask. */ 159 /* Neither 8-byte nor 16-byte aligned, shift and mask. */
148 mov %g1, %o4 160 and %i4, 0x7, GLOBAL_SPARE
149 and %o1, 0x7, %g1 161 sll GLOBAL_SPARE, 3, GLOBAL_SPARE
150 sll %g1, 3, %g1 162 mov 64, %i5
151 mov 64, %o3 163 EX_LD(LOAD_TWIN(%i1, %g2, %g3))
152 andn %o1, 0x7, %o1 164 sub %i5, GLOBAL_SPARE, %i5
153 EX_LD(LOAD(ldx, %o1, %g2)) 165 mov 16, %o4
154 sub %o3, %g1, %o3 166 mov 32, %o5
155 sllx %g2, %g1, %g2 167 mov 48, %o7
168 mov 64, %i3
169
170 bg,pn %XCC, 9f
171 nop
156 172
157#define SWIVEL_ONE_DWORD(SRC, TMP1, TMP2, PRE_VAL, PRE_SHIFT, POST_SHIFT, DST)\ 173#define MIX_THREE_WORDS(WORD1, WORD2, WORD3, PRE_SHIFT, POST_SHIFT, TMP) \
158 EX_LD(LOAD(ldx, SRC, TMP1)); \ 174 sllx WORD1, POST_SHIFT, WORD1; \
159 srlx TMP1, PRE_SHIFT, TMP2; \ 175 srlx WORD2, PRE_SHIFT, TMP; \
160 or TMP2, PRE_VAL, TMP2; \ 176 sllx WORD2, POST_SHIFT, WORD2; \
161 EX_ST(STORE_INIT(TMP2, DST)); \ 177 or WORD1, TMP, WORD1; \
162 sllx TMP1, POST_SHIFT, PRE_VAL; 178 srlx WORD3, PRE_SHIFT, TMP; \
163 179 or WORD2, TMP, WORD2;
1641: add %o1, 0x8, %o1 180
165 SWIVEL_ONE_DWORD(%o1, %g3, %o5, %g2, %o3, %g1, %o0 + 0x00) 1818: EX_LD(LOAD_TWIN(%i1 + %o4, %o2, %o3))
166 add %o1, 0x8, %o1 182 MIX_THREE_WORDS(%g2, %g3, %o2, %i5, GLOBAL_SPARE, %o1)
167 SWIVEL_ONE_DWORD(%o1, %g3, %o5, %g2, %o3, %g1, %o0 + 0x08) 183 LOAD(prefetch, %i1 + %i3, #one_read)
168 add %o1, 0x8, %o1 184
169 SWIVEL_ONE_DWORD(%o1, %g3, %o5, %g2, %o3, %g1, %o0 + 0x10) 185 EX_ST(STORE_INIT(%g2, %o0 + 0x00))
170 add %o1, 0x8, %o1 186 EX_ST(STORE_INIT(%g3, %o0 + 0x08))
171 SWIVEL_ONE_DWORD(%o1, %g3, %o5, %g2, %o3, %g1, %o0 + 0x18) 187
172 add %o1, 32, %o1 188 EX_LD(LOAD_TWIN(%i1 + %o5, %g2, %g3))
173 LOAD(prefetch, %o1, #one_read) 189 MIX_THREE_WORDS(%o2, %o3, %g2, %i5, GLOBAL_SPARE, %o1)
174 sub %o1, 32 - 8, %o1 190
175 SWIVEL_ONE_DWORD(%o1, %g3, %o5, %g2, %o3, %g1, %o0 + 0x20) 191 EX_ST(STORE_INIT(%o2, %o0 + 0x10))
176 add %o1, 8, %o1 192 EX_ST(STORE_INIT(%o3, %o0 + 0x18))
177 SWIVEL_ONE_DWORD(%o1, %g3, %o5, %g2, %o3, %g1, %o0 + 0x28) 193
178 add %o1, 8, %o1 194 EX_LD(LOAD_TWIN(%i1 + %o7, %o2, %o3))
179 SWIVEL_ONE_DWORD(%o1, %g3, %o5, %g2, %o3, %g1, %o0 + 0x30) 195 MIX_THREE_WORDS(%g2, %g3, %o2, %i5, GLOBAL_SPARE, %o1)
180 add %o1, 8, %o1 196
181 SWIVEL_ONE_DWORD(%o1, %g3, %o5, %g2, %o3, %g1, %o0 + 0x38) 197 EX_ST(STORE_INIT(%g2, %o0 + 0x20))
182 subcc %o4, 64, %o4 198 EX_ST(STORE_INIT(%g3, %o0 + 0x28))
183 bne,pt %XCC, 1b 199
200 EX_LD(LOAD_TWIN(%i1 + %i3, %g2, %g3))
201 add %i1, 64, %i1
202 MIX_THREE_WORDS(%o2, %o3, %g2, %i5, GLOBAL_SPARE, %o1)
203
204 EX_ST(STORE_INIT(%o2, %o0 + 0x30))
205 EX_ST(STORE_INIT(%o3, %o0 + 0x38))
206
207 subcc %g1, 64, %g1
208 bne,pt %XCC, 8b
184 add %o0, 64, %o0 209 add %o0, 64, %o0
185 210
186#undef SWIVEL_ONE_DWORD 211 ba,pt %XCC, 60f
212 add %i1, %i4, %i1
213
2149: EX_LD(LOAD_TWIN(%i1 + %o4, %o2, %o3))
215 MIX_THREE_WORDS(%g3, %o2, %o3, %i5, GLOBAL_SPARE, %o1)
216 LOAD(prefetch, %i1 + %i3, #one_read)
217
218 EX_ST(STORE_INIT(%g3, %o0 + 0x00))
219 EX_ST(STORE_INIT(%o2, %o0 + 0x08))
220
221 EX_LD(LOAD_TWIN(%i1 + %o5, %g2, %g3))
222 MIX_THREE_WORDS(%o3, %g2, %g3, %i5, GLOBAL_SPARE, %o1)
223
224 EX_ST(STORE_INIT(%o3, %o0 + 0x10))
225 EX_ST(STORE_INIT(%g2, %o0 + 0x18))
226
227 EX_LD(LOAD_TWIN(%i1 + %o7, %o2, %o3))
228 MIX_THREE_WORDS(%g3, %o2, %o3, %i5, GLOBAL_SPARE, %o1)
229
230 EX_ST(STORE_INIT(%g3, %o0 + 0x20))
231 EX_ST(STORE_INIT(%o2, %o0 + 0x28))
232
233 EX_LD(LOAD_TWIN(%i1 + %i3, %g2, %g3))
234 add %i1, 64, %i1
235 MIX_THREE_WORDS(%o3, %g2, %g3, %i5, GLOBAL_SPARE, %o1)
236
237 EX_ST(STORE_INIT(%o3, %o0 + 0x30))
238 EX_ST(STORE_INIT(%g2, %o0 + 0x38))
239
240 subcc %g1, 64, %g1
241 bne,pt %XCC, 9b
242 add %o0, 64, %o0
187 243
188 srl %g1, 3, %g1
189 ba,pt %XCC, 60f 244 ba,pt %XCC, 60f
190 add %o1, %g1, %o1 245 add %i1, %i4, %i1
191 246
19210: /* Destination is 64-byte aligned, source was only 8-byte 24710: /* Destination is 64-byte aligned, source was only 8-byte
193 * aligned but it has been subtracted by 8 and we perform 248 * aligned but it has been subtracted by 8 and we perform
194 * one twin load ahead, then add 8 back into source when 249 * one twin load ahead, then add 8 back into source when
195 * we finish the loop. 250 * we finish the loop.
196 */ 251 */
197 EX_LD(LOAD_TWIN(%o1, %o4, %o5)) 252 EX_LD(LOAD_TWIN(%i1, %o4, %o5))
1981: add %o1, 16, %o1 253 mov 16, %o7
199 EX_LD(LOAD_TWIN(%o1, %g2, %g3)) 254 mov 32, %g2
200 add %o1, 16 + 32, %o1 255 mov 48, %g3
201 LOAD(prefetch, %o1, #one_read) 256 mov 64, %o1
202 sub %o1, 32, %o1 2571: EX_LD(LOAD_TWIN(%i1 + %o7, %o2, %o3))
258 LOAD(prefetch, %i1 + %o1, #one_read)
203 EX_ST(STORE_INIT(%o5, %o0 + 0x00)) ! initializes cache line 259 EX_ST(STORE_INIT(%o5, %o0 + 0x00)) ! initializes cache line
204 EX_ST(STORE_INIT(%g2, %o0 + 0x08)) 260 EX_ST(STORE_INIT(%o2, %o0 + 0x08))
205 EX_LD(LOAD_TWIN(%o1, %o4, %o5)) 261 EX_LD(LOAD_TWIN(%i1 + %g2, %o4, %o5))
206 add %o1, 16, %o1 262 EX_ST(STORE_INIT(%o3, %o0 + 0x10))
207 EX_ST(STORE_INIT(%g3, %o0 + 0x10))
208 EX_ST(STORE_INIT(%o4, %o0 + 0x18)) 263 EX_ST(STORE_INIT(%o4, %o0 + 0x18))
209 EX_LD(LOAD_TWIN(%o1, %g2, %g3)) 264 EX_LD(LOAD_TWIN(%i1 + %g3, %o2, %o3))
210 add %o1, 16, %o1
211 EX_ST(STORE_INIT(%o5, %o0 + 0x20)) 265 EX_ST(STORE_INIT(%o5, %o0 + 0x20))
212 EX_ST(STORE_INIT(%g2, %o0 + 0x28)) 266 EX_ST(STORE_INIT(%o2, %o0 + 0x28))
213 EX_LD(LOAD_TWIN(%o1, %o4, %o5)) 267 EX_LD(LOAD_TWIN(%i1 + %o1, %o4, %o5))
214 EX_ST(STORE_INIT(%g3, %o0 + 0x30)) 268 add %i1, 64, %i1
269 EX_ST(STORE_INIT(%o3, %o0 + 0x30))
215 EX_ST(STORE_INIT(%o4, %o0 + 0x38)) 270 EX_ST(STORE_INIT(%o4, %o0 + 0x38))
216 subcc %g1, 64, %g1 271 subcc %g1, 64, %g1
217 bne,pt %XCC, 1b 272 bne,pt %XCC, 1b
218 add %o0, 64, %o0 273 add %o0, 64, %o0
219 274
220 ba,pt %XCC, 60f 275 ba,pt %XCC, 60f
221 add %o1, 0x8, %o1 276 add %i1, 0x8, %i1
222 277
22350: /* Destination is 64-byte aligned, and source is 16-byte 27850: /* Destination is 64-byte aligned, and source is 16-byte
224 * aligned. 279 * aligned.
225 */ 280 */
2261: EX_LD(LOAD_TWIN(%o1, %o4, %o5)) 281 mov 16, %o7
227 add %o1, 16, %o1 282 mov 32, %g2
228 EX_LD(LOAD_TWIN(%o1, %g2, %g3)) 283 mov 48, %g3
229 add %o1, 16 + 32, %o1 284 mov 64, %o1
230 LOAD(prefetch, %o1, #one_read) 2851: EX_LD(LOAD_TWIN(%i1 + %g0, %o4, %o5))
231 sub %o1, 32, %o1 286 EX_LD(LOAD_TWIN(%i1 + %o7, %o2, %o3))
287 LOAD(prefetch, %i1 + %o1, #one_read)
232 EX_ST(STORE_INIT(%o4, %o0 + 0x00)) ! initializes cache line 288 EX_ST(STORE_INIT(%o4, %o0 + 0x00)) ! initializes cache line
233 EX_ST(STORE_INIT(%o5, %o0 + 0x08)) 289 EX_ST(STORE_INIT(%o5, %o0 + 0x08))
234 EX_LD(LOAD_TWIN(%o1, %o4, %o5)) 290 EX_LD(LOAD_TWIN(%i1 + %g2, %o4, %o5))
235 add %o1, 16, %o1 291 EX_ST(STORE_INIT(%o2, %o0 + 0x10))
236 EX_ST(STORE_INIT(%g2, %o0 + 0x10)) 292 EX_ST(STORE_INIT(%o3, %o0 + 0x18))
237 EX_ST(STORE_INIT(%g3, %o0 + 0x18)) 293 EX_LD(LOAD_TWIN(%i1 + %g3, %o2, %o3))
238 EX_LD(LOAD_TWIN(%o1, %g2, %g3)) 294 add %i1, 64, %i1
239 add %o1, 16, %o1
240 EX_ST(STORE_INIT(%o4, %o0 + 0x20)) 295 EX_ST(STORE_INIT(%o4, %o0 + 0x20))
241 EX_ST(STORE_INIT(%o5, %o0 + 0x28)) 296 EX_ST(STORE_INIT(%o5, %o0 + 0x28))
242 EX_ST(STORE_INIT(%g2, %o0 + 0x30)) 297 EX_ST(STORE_INIT(%o2, %o0 + 0x30))
243 EX_ST(STORE_INIT(%g3, %o0 + 0x38)) 298 EX_ST(STORE_INIT(%o3, %o0 + 0x38))
244 subcc %g1, 64, %g1 299 subcc %g1, 64, %g1
245 bne,pt %XCC, 1b 300 bne,pt %XCC, 1b
246 add %o0, 64, %o0 301 add %o0, 64, %o0
@@ -249,47 +304,47 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
24960: 30460:
250 membar #Sync 305 membar #Sync
251 306
252 /* %o2 contains any final bytes still needed to be copied 307 /* %i2 contains any final bytes still needed to be copied
253 * over. If anything is left, we copy it one byte at a time. 308 * over. If anything is left, we copy it one byte at a time.
254 */ 309 */
255 RESTORE_ASI(%o3) 310 RESTORE_ASI(%i3)
256 brz,pt %o2, 85f 311 brz,pt %i2, 85f
257 sub %o0, %o1, %o3 312 sub %o0, %i1, %i3
258 ba,a,pt %XCC, 90f 313 ba,a,pt %XCC, 90f
259 314
260 .align 64 315 .align 64
26170: /* 16 < len <= 64 */ 31670: /* 16 < len <= 64 */
262 bne,pn %XCC, 75f 317 bne,pn %XCC, 75f
263 sub %o0, %o1, %o3 318 sub %o0, %i1, %i3
264 319
26572: 32072:
266 andn %o2, 0xf, %o4 321 andn %i2, 0xf, %i4
267 and %o2, 0xf, %o2 322 and %i2, 0xf, %i2
2681: subcc %o4, 0x10, %o4 3231: subcc %i4, 0x10, %i4
269 EX_LD(LOAD(ldx, %o1, %o5)) 324 EX_LD(LOAD(ldx, %i1, %i5))
270 add %o1, 0x08, %o1 325 add %i1, 0x08, %i1
271 EX_LD(LOAD(ldx, %o1, %g1)) 326 EX_LD(LOAD(ldx, %i1, %g1))
272 sub %o1, 0x08, %o1 327 sub %i1, 0x08, %i1
273 EX_ST(STORE(stx, %o5, %o1 + %o3)) 328 EX_ST(STORE(stx, %i5, %i1 + %i3))
274 add %o1, 0x8, %o1 329 add %i1, 0x8, %i1
275 EX_ST(STORE(stx, %g1, %o1 + %o3)) 330 EX_ST(STORE(stx, %g1, %i1 + %i3))
276 bgu,pt %XCC, 1b 331 bgu,pt %XCC, 1b
277 add %o1, 0x8, %o1 332 add %i1, 0x8, %i1
27873: andcc %o2, 0x8, %g0 33373: andcc %i2, 0x8, %g0
279 be,pt %XCC, 1f 334 be,pt %XCC, 1f
280 nop 335 nop
281 sub %o2, 0x8, %o2 336 sub %i2, 0x8, %i2
282 EX_LD(LOAD(ldx, %o1, %o5)) 337 EX_LD(LOAD(ldx, %i1, %i5))
283 EX_ST(STORE(stx, %o5, %o1 + %o3)) 338 EX_ST(STORE(stx, %i5, %i1 + %i3))
284 add %o1, 0x8, %o1 339 add %i1, 0x8, %i1
2851: andcc %o2, 0x4, %g0 3401: andcc %i2, 0x4, %g0
286 be,pt %XCC, 1f 341 be,pt %XCC, 1f
287 nop 342 nop
288 sub %o2, 0x4, %o2 343 sub %i2, 0x4, %i2
289 EX_LD(LOAD(lduw, %o1, %o5)) 344 EX_LD(LOAD(lduw, %i1, %i5))
290 EX_ST(STORE(stw, %o5, %o1 + %o3)) 345 EX_ST(STORE(stw, %i5, %i1 + %i3))
291 add %o1, 0x4, %o1 346 add %i1, 0x4, %i1
2921: cmp %o2, 0 3471: cmp %i2, 0
293 be,pt %XCC, 85f 348 be,pt %XCC, 85f
294 nop 349 nop
295 ba,pt %xcc, 90f 350 ba,pt %xcc, 90f
@@ -300,71 +355,71 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
300 sub %g1, 0x8, %g1 355 sub %g1, 0x8, %g1
301 be,pn %icc, 2f 356 be,pn %icc, 2f
302 sub %g0, %g1, %g1 357 sub %g0, %g1, %g1
303 sub %o2, %g1, %o2 358 sub %i2, %g1, %i2
304 359
3051: subcc %g1, 1, %g1 3601: subcc %g1, 1, %g1
306 EX_LD(LOAD(ldub, %o1, %o5)) 361 EX_LD(LOAD(ldub, %i1, %i5))
307 EX_ST(STORE(stb, %o5, %o1 + %o3)) 362 EX_ST(STORE(stb, %i5, %i1 + %i3))
308 bgu,pt %icc, 1b 363 bgu,pt %icc, 1b
309 add %o1, 1, %o1 364 add %i1, 1, %i1
310 365
3112: add %o1, %o3, %o0 3662: add %i1, %i3, %o0
312 andcc %o1, 0x7, %g1 367 andcc %i1, 0x7, %g1
313 bne,pt %icc, 8f 368 bne,pt %icc, 8f
314 sll %g1, 3, %g1 369 sll %g1, 3, %g1
315 370
316 cmp %o2, 16 371 cmp %i2, 16
317 bgeu,pt %icc, 72b 372 bgeu,pt %icc, 72b
318 nop 373 nop
319 ba,a,pt %xcc, 73b 374 ba,a,pt %xcc, 73b
320 375
3218: mov 64, %o3 3768: mov 64, %i3
322 andn %o1, 0x7, %o1 377 andn %i1, 0x7, %i1
323 EX_LD(LOAD(ldx, %o1, %g2)) 378 EX_LD(LOAD(ldx, %i1, %g2))
324 sub %o3, %g1, %o3 379 sub %i3, %g1, %i3
325 andn %o2, 0x7, %o4 380 andn %i2, 0x7, %i4
326 sllx %g2, %g1, %g2 381 sllx %g2, %g1, %g2
3271: add %o1, 0x8, %o1 3821: add %i1, 0x8, %i1
328 EX_LD(LOAD(ldx, %o1, %g3)) 383 EX_LD(LOAD(ldx, %i1, %g3))
329 subcc %o4, 0x8, %o4 384 subcc %i4, 0x8, %i4
330 srlx %g3, %o3, %o5 385 srlx %g3, %i3, %i5
331 or %o5, %g2, %o5 386 or %i5, %g2, %i5
332 EX_ST(STORE(stx, %o5, %o0)) 387 EX_ST(STORE(stx, %i5, %o0))
333 add %o0, 0x8, %o0 388 add %o0, 0x8, %o0
334 bgu,pt %icc, 1b 389 bgu,pt %icc, 1b
335 sllx %g3, %g1, %g2 390 sllx %g3, %g1, %g2
336 391
337 srl %g1, 3, %g1 392 srl %g1, 3, %g1
338 andcc %o2, 0x7, %o2 393 andcc %i2, 0x7, %i2
339 be,pn %icc, 85f 394 be,pn %icc, 85f
340 add %o1, %g1, %o1 395 add %i1, %g1, %i1
341 ba,pt %xcc, 90f 396 ba,pt %xcc, 90f
342 sub %o0, %o1, %o3 397 sub %o0, %i1, %i3
343 398
344 .align 64 399 .align 64
34580: /* 0 < len <= 16 */ 40080: /* 0 < len <= 16 */
346 andcc %o3, 0x3, %g0 401 andcc %i3, 0x3, %g0
347 bne,pn %XCC, 90f 402 bne,pn %XCC, 90f
348 sub %o0, %o1, %o3 403 sub %o0, %i1, %i3
349 404
3501: 4051:
351 subcc %o2, 4, %o2 406 subcc %i2, 4, %i2
352 EX_LD(LOAD(lduw, %o1, %g1)) 407 EX_LD(LOAD(lduw, %i1, %g1))
353 EX_ST(STORE(stw, %g1, %o1 + %o3)) 408 EX_ST(STORE(stw, %g1, %i1 + %i3))
354 bgu,pt %XCC, 1b 409 bgu,pt %XCC, 1b
355 add %o1, 4, %o1 410 add %i1, 4, %i1
356 411
35785: retl 41285: ret
358 mov EX_RETVAL(GLOBAL_SPARE), %o0 413 restore EX_RETVAL(%i0), %g0, %o0
359 414
360 .align 32 415 .align 32
36190: 41690:
362 subcc %o2, 1, %o2 417 subcc %i2, 1, %i2
363 EX_LD(LOAD(ldub, %o1, %g1)) 418 EX_LD(LOAD(ldub, %i1, %g1))
364 EX_ST(STORE(stb, %g1, %o1 + %o3)) 419 EX_ST(STORE(stb, %g1, %i1 + %i3))
365 bgu,pt %XCC, 90b 420 bgu,pt %XCC, 90b
366 add %o1, 1, %o1 421 add %i1, 1, %i1
367 retl 422 ret
368 mov EX_RETVAL(GLOBAL_SPARE), %o0 423 restore EX_RETVAL(%i0), %g0, %o0
369 424
370 .size FUNC_NAME, .-FUNC_NAME 425 .size FUNC_NAME, .-FUNC_NAME
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index ffa036406289..b4d9089a6a06 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -60,14 +60,6 @@ config ZONE_DMA
60 bool 60 bool
61 default y 61 default y
62 62
63config QUICKLIST
64 bool
65 default y
66
67config NR_QUICK
68 int
69 default 2
70
71config ISA 63config ISA
72 bool 64 bool
73 65
diff --git a/arch/x86_64/ia32/ia32entry.S b/arch/x86_64/ia32/ia32entry.S
index 938278697e20..18b231810908 100644
--- a/arch/x86_64/ia32/ia32entry.S
+++ b/arch/x86_64/ia32/ia32entry.S
@@ -38,6 +38,18 @@
38 movq %rax,R8(%rsp) 38 movq %rax,R8(%rsp)
39 .endm 39 .endm
40 40
41 .macro LOAD_ARGS32 offset
42 movl \offset(%rsp),%r11d
43 movl \offset+8(%rsp),%r10d
44 movl \offset+16(%rsp),%r9d
45 movl \offset+24(%rsp),%r8d
46 movl \offset+40(%rsp),%ecx
47 movl \offset+48(%rsp),%edx
48 movl \offset+56(%rsp),%esi
49 movl \offset+64(%rsp),%edi
50 movl \offset+72(%rsp),%eax
51 .endm
52
41 .macro CFI_STARTPROC32 simple 53 .macro CFI_STARTPROC32 simple
42 CFI_STARTPROC \simple 54 CFI_STARTPROC \simple
43 CFI_UNDEFINED r8 55 CFI_UNDEFINED r8
@@ -152,7 +164,7 @@ sysenter_tracesys:
152 movq $-ENOSYS,RAX(%rsp) /* really needed? */ 164 movq $-ENOSYS,RAX(%rsp) /* really needed? */
153 movq %rsp,%rdi /* &pt_regs -> arg1 */ 165 movq %rsp,%rdi /* &pt_regs -> arg1 */
154 call syscall_trace_enter 166 call syscall_trace_enter
155 LOAD_ARGS ARGOFFSET /* reload args from stack in case ptrace changed it */ 167 LOAD_ARGS32 ARGOFFSET /* reload args from stack in case ptrace changed it */
156 RESTORE_REST 168 RESTORE_REST
157 movl %ebp, %ebp 169 movl %ebp, %ebp
158 /* no need to do an access_ok check here because rbp has been 170 /* no need to do an access_ok check here because rbp has been
@@ -255,7 +267,7 @@ cstar_tracesys:
255 movq $-ENOSYS,RAX(%rsp) /* really needed? */ 267 movq $-ENOSYS,RAX(%rsp) /* really needed? */
256 movq %rsp,%rdi /* &pt_regs -> arg1 */ 268 movq %rsp,%rdi /* &pt_regs -> arg1 */
257 call syscall_trace_enter 269 call syscall_trace_enter
258 LOAD_ARGS ARGOFFSET /* reload args from stack in case ptrace changed it */ 270 LOAD_ARGS32 ARGOFFSET /* reload args from stack in case ptrace changed it */
259 RESTORE_REST 271 RESTORE_REST
260 movl RSP-ARGOFFSET(%rsp), %r8d 272 movl RSP-ARGOFFSET(%rsp), %r8d
261 /* no need to do an access_ok check here because r8 has been 273 /* no need to do an access_ok check here because r8 has been
@@ -334,7 +346,7 @@ ia32_tracesys:
334 movq $-ENOSYS,RAX(%rsp) /* really needed? */ 346 movq $-ENOSYS,RAX(%rsp) /* really needed? */
335 movq %rsp,%rdi /* &pt_regs -> arg1 */ 347 movq %rsp,%rdi /* &pt_regs -> arg1 */
336 call syscall_trace_enter 348 call syscall_trace_enter
337 LOAD_ARGS ARGOFFSET /* reload args from stack in case ptrace changed it */ 349 LOAD_ARGS32 ARGOFFSET /* reload args from stack in case ptrace changed it */
338 RESTORE_REST 350 RESTORE_REST
339 jmp ia32_do_syscall 351 jmp ia32_do_syscall
340END(ia32_syscall) 352END(ia32_syscall)
diff --git a/arch/x86_64/kernel/acpi/wakeup.S b/arch/x86_64/kernel/acpi/wakeup.S
index 13f1480cbec9..a06f2bcabef9 100644
--- a/arch/x86_64/kernel/acpi/wakeup.S
+++ b/arch/x86_64/kernel/acpi/wakeup.S
@@ -81,7 +81,7 @@ wakeup_code:
81 testl $2, realmode_flags - wakeup_code 81 testl $2, realmode_flags - wakeup_code
82 jz 1f 82 jz 1f
83 mov video_mode - wakeup_code, %ax 83 mov video_mode - wakeup_code, %ax
84 call mode_seta 84 call mode_set
851: 851:
86 86
87 movw $0xb800, %ax 87 movw $0xb800, %ax
@@ -291,52 +291,31 @@ no_longmode:
291#define VIDEO_FIRST_V7 0x0900 291#define VIDEO_FIRST_V7 0x0900
292 292
293# Setting of user mode (AX=mode ID) => CF=success 293# Setting of user mode (AX=mode ID) => CF=success
294
295# For now, we only handle VESA modes (0x0200..0x03ff). To handle other
296# modes, we should probably compile in the video code from the boot
297# directory.
294.code16 298.code16
295mode_seta: 299mode_set:
296 movw %ax, %bx 300 movw %ax, %bx
297#if 0 301 subb $VIDEO_FIRST_VESA>>8, %bh
298 cmpb $0xff, %ah 302 cmpb $2, %bh
299 jz setalias 303 jb check_vesa
300
301 testb $VIDEO_RECALC>>8, %ah
302 jnz _setrec
303
304 cmpb $VIDEO_FIRST_RESOLUTION>>8, %ah
305 jnc setres
306
307 cmpb $VIDEO_FIRST_SPECIAL>>8, %ah
308 jz setspc
309
310 cmpb $VIDEO_FIRST_V7>>8, %ah
311 jz setv7
312#endif
313
314 cmpb $VIDEO_FIRST_VESA>>8, %ah
315 jnc check_vesaa
316#if 0
317 orb %ah, %ah
318 jz setmenu
319#endif
320
321 decb %ah
322# jz setbios Add bios modes later
323 304
324setbada: clc 305setbad:
306 clc
325 ret 307 ret
326 308
327check_vesaa: 309check_vesa:
328 subb $VIDEO_FIRST_VESA>>8, %bh
329 orw $0x4000, %bx # Use linear frame buffer 310 orw $0x4000, %bx # Use linear frame buffer
330 movw $0x4f02, %ax # VESA BIOS mode set call 311 movw $0x4f02, %ax # VESA BIOS mode set call
331 int $0x10 312 int $0x10
332 cmpw $0x004f, %ax # AL=4f if implemented 313 cmpw $0x004f, %ax # AL=4f if implemented
333 jnz _setbada # AH=0 if OK 314 jnz setbad # AH=0 if OK
334 315
335 stc 316 stc
336 ret 317 ret
337 318
338_setbada: jmp setbada
339
340wakeup_stack_begin: # Stack grows down 319wakeup_stack_begin: # Stack grows down
341 320
342.org 0xff0 321.org 0xff0
diff --git a/arch/x86_64/kernel/process.c b/arch/x86_64/kernel/process.c
index 2842f50cbe3f..98956555450b 100644
--- a/arch/x86_64/kernel/process.c
+++ b/arch/x86_64/kernel/process.c
@@ -208,7 +208,6 @@ void cpu_idle (void)
208 if (__get_cpu_var(cpu_idle_state)) 208 if (__get_cpu_var(cpu_idle_state))
209 __get_cpu_var(cpu_idle_state) = 0; 209 __get_cpu_var(cpu_idle_state) = 0;
210 210
211 check_pgt_cache();
212 rmb(); 211 rmb();
213 idle = pm_idle; 212 idle = pm_idle;
214 if (!idle) 213 if (!idle)
diff --git a/arch/x86_64/kernel/ptrace.c b/arch/x86_64/kernel/ptrace.c
index e83cc67155ac..eea3702427b4 100644
--- a/arch/x86_64/kernel/ptrace.c
+++ b/arch/x86_64/kernel/ptrace.c
@@ -232,10 +232,6 @@ static int putreg(struct task_struct *child,
232{ 232{
233 unsigned long tmp; 233 unsigned long tmp;
234 234
235 /* Some code in the 64bit emulation may not be 64bit clean.
236 Don't take any chances. */
237 if (test_tsk_thread_flag(child, TIF_IA32))
238 value &= 0xffffffff;
239 switch (regno) { 235 switch (regno) {
240 case offsetof(struct user_regs_struct,fs): 236 case offsetof(struct user_regs_struct,fs):
241 if (value && (value & 3) != 3) 237 if (value && (value & 3) != 3)
diff --git a/arch/x86_64/kernel/smp.c b/arch/x86_64/kernel/smp.c
index 673a300b5944..df4a82812adb 100644
--- a/arch/x86_64/kernel/smp.c
+++ b/arch/x86_64/kernel/smp.c
@@ -241,7 +241,7 @@ void flush_tlb_mm (struct mm_struct * mm)
241 } 241 }
242 if (!cpus_empty(cpu_mask)) 242 if (!cpus_empty(cpu_mask))
243 flush_tlb_others(cpu_mask, mm, FLUSH_ALL); 243 flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
244 check_pgt_cache(); 244
245 preempt_enable(); 245 preempt_enable();
246} 246}
247EXPORT_SYMBOL(flush_tlb_mm); 247EXPORT_SYMBOL(flush_tlb_mm);
diff --git a/arch/x86_64/vdso/voffset.h b/arch/x86_64/vdso/voffset.h
index 5304204911f2..4af67c79085f 100644
--- a/arch/x86_64/vdso/voffset.h
+++ b/arch/x86_64/vdso/voffset.h
@@ -1 +1 @@
#define VDSO_TEXT_OFFSET 0x500 #define VDSO_TEXT_OFFSET 0x600
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 09:21:02 -0500