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-rw-r--r--arch/powerpc/mm/pgtable_32.c5
-rw-r--r--arch/ppc/mm/pgtable.c5
-rw-r--r--arch/ppc/syslib/ppc85xx_rio.c2
3 files changed, 2 insertions, 10 deletions
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 1891dbeeb8e9..bd02272bcb0f 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -294,11 +294,8 @@ void __init mapin_ram(void)
294 } 294 }
295} 295}
296 296
297/* is x a power of 2? */
298#define is_power_of_2(x) ((x) != 0 && (((x) & ((x) - 1)) == 0))
299
300/* is x a power of 4? */ 297/* is x a power of 4? */
301#define is_power_of_4(x) ((x) != 0 && (((x) & (x-1)) == 0) && (ffs(x) & 1)) 298#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1))
302 299
303/* 300/*
304 * Set up a mapping for a block of I/O. 301 * Set up a mapping for a block of I/O.
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c
index 354a9408f024..82b06a1ef95d 100644
--- a/arch/ppc/mm/pgtable.c
+++ b/arch/ppc/mm/pgtable.c
@@ -313,11 +313,8 @@ void __init mapin_ram(void)
313 } 313 }
314} 314}
315 315
316/* is x a power of 2? */
317#define is_power_of_2(x) ((x) != 0 && (((x) & ((x) - 1)) == 0))
318
319/* is x a power of 4? */ 316/* is x a power of 4? */
320#define is_power_of_4(x) ((x) != 0 && (((x) & (x-1)) == 0) && (ffs(x) & 1)) 317#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1))
321 318
322/* 319/*
323 * Set up a mapping for a block of I/O. 320 * Set up a mapping for a block of I/O.
diff --git a/arch/ppc/syslib/ppc85xx_rio.c b/arch/ppc/syslib/ppc85xx_rio.c
index 05b0e9415085..2b097800cdd9 100644
--- a/arch/ppc/syslib/ppc85xx_rio.c
+++ b/arch/ppc/syslib/ppc85xx_rio.c
@@ -59,8 +59,6 @@
59#define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET)) 59#define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET))
60#define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET)) 60#define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
61 61
62#define is_power_of_2(x) (((x) & ((x) - 1)) == 0)
63
64struct rio_atmu_regs { 62struct rio_atmu_regs {
65 u32 rowtar; 63 u32 rowtar;
66 u32 pad1; 64 u32 pad1;