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-rw-r--r--arch/avr32/mach-at32ap/clock.c2
-rw-r--r--arch/avr32/mach-at32ap/include/mach/at32ap700x.h8
-rw-r--r--arch/avr32/mach-at32ap/pm.c4
-rw-r--r--arch/avr32/mach-at32ap/pm.h12
4 files changed, 13 insertions, 13 deletions
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index 4642117cc9ab..6c27ddac5adf 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -16,6 +16,8 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/string.h> 17#include <linux/string.h>
18 18
19#include <mach/chip.h>
20
19#include "clock.h" 21#include "clock.h"
20 22
21static DEFINE_SPINLOCK(clk_lock); 23static DEFINE_SPINLOCK(clk_lock);
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
index d18a3053be0d..31b44e13ec32 100644
--- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
+++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
@@ -46,4 +46,12 @@
46#define DMAC_DMAREQ_2 9 46#define DMAC_DMAREQ_2 9
47#define DMAC_DMAREQ_3 10 47#define DMAC_DMAREQ_3 10
48 48
49/*
50 * Base addresses of controllers that may be accessed early by
51 * platform code.
52 */
53#define PM_BASE 0xfff00000
54#define HMATRIX_BASE 0xfff00800
55#define SDRAMC_BASE 0xfff03800
56
49#endif /* __ASM_ARCH_AT32AP700X_H__ */ 57#endif /* __ASM_ARCH_AT32AP700X_H__ */
diff --git a/arch/avr32/mach-at32ap/pm.c b/arch/avr32/mach-at32ap/pm.c
index a0cbef54fc2a..f021edfeaab0 100644
--- a/arch/avr32/mach-at32ap/pm.c
+++ b/arch/avr32/mach-at32ap/pm.c
@@ -14,12 +14,10 @@
14#include <asm/cacheflush.h> 14#include <asm/cacheflush.h>
15#include <asm/sysreg.h> 15#include <asm/sysreg.h>
16 16
17#include <mach/chip.h>
17#include <mach/pm.h> 18#include <mach/pm.h>
18#include <mach/sram.h> 19#include <mach/sram.h>
19 20
20/* FIXME: This is only valid for AP7000 */
21#define SDRAMC_BASE 0xfff03800
22
23#include "sdramc.h" 21#include "sdramc.h"
24 22
25#define SRAM_PAGE_FLAGS (SYSREG_BIT(TLBELO_D) | SYSREG_BF(SZ, 1) \ 23#define SRAM_PAGE_FLAGS (SYSREG_BIT(TLBELO_D) | SYSREG_BF(SZ, 1) \
diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
index 694d521edc2f..532a3732c214 100644
--- a/arch/avr32/mach-at32ap/pm.h
+++ b/arch/avr32/mach-at32ap/pm.h
@@ -4,14 +4,6 @@
4#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__ 4#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
5#define __ARCH_AVR32_MACH_AT32AP_PM_H__ 5#define __ARCH_AVR32_MACH_AT32AP_PM_H__
6 6
7/*
8 * We can reduce the code size a bit by using a constant here. Since
9 * this file is only used on AVR32 AP CPUs with segmentation enabled,
10 * it's safe to not use ioremap. Generic drivers should of course
11 * never do this.
12 */
13#define AT32_PM_BASE 0xfff00000
14
15/* PM register offsets */ 7/* PM register offsets */
16#define PM_MCCTRL 0x0000 8#define PM_MCCTRL 0x0000
17#define PM_CKSEL 0x0004 9#define PM_CKSEL 0x0004
@@ -113,8 +105,8 @@
113 105
114/* Register access macros */ 106/* Register access macros */
115#define pm_readl(reg) \ 107#define pm_readl(reg) \
116 __raw_readl((void __iomem __force *)AT32_PM_BASE + PM_##reg) 108 __raw_readl((void __iomem __force *)PM_BASE + PM_##reg)
117#define pm_writel(reg,value) \ 109#define pm_writel(reg,value) \
118 __raw_writel((value), (void __iomem __force *)AT32_PM_BASE + PM_##reg) 110 __raw_writel((value), (void __iomem __force *)PM_BASE + PM_##reg)
119 111
120#endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */ 112#endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */