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-rw-r--r--arch/arm/mach-mx3/devices.c20
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h2
-rw-r--r--arch/arm/plat-mxc/include/mach/mx35.h1
3 files changed, 16 insertions, 7 deletions
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index cde1b0792421..8a577f367250 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -366,8 +366,8 @@ struct platform_device mx3_camera = {
366 366
367static struct resource otg_resources[] = { 367static struct resource otg_resources[] = {
368 { 368 {
369 .start = OTG_BASE_ADDR, 369 .start = MX31_OTG_BASE_ADDR,
370 .end = OTG_BASE_ADDR + 0x1ff, 370 .end = MX31_OTG_BASE_ADDR + 0x1ff,
371 .flags = IORESOURCE_MEM, 371 .flags = IORESOURCE_MEM,
372 }, { 372 }, {
373 .start = MXC_INT_USB3, 373 .start = MXC_INT_USB3,
@@ -408,8 +408,8 @@ static u64 usbh1_dmamask = ~(u32)0;
408 408
409static struct resource mxc_usbh1_resources[] = { 409static struct resource mxc_usbh1_resources[] = {
410 { 410 {
411 .start = OTG_BASE_ADDR + 0x200, 411 .start = MX31_OTG_BASE_ADDR + 0x200,
412 .end = OTG_BASE_ADDR + 0x3ff, 412 .end = MX31_OTG_BASE_ADDR + 0x3ff,
413 .flags = IORESOURCE_MEM, 413 .flags = IORESOURCE_MEM,
414 }, { 414 }, {
415 .start = MXC_INT_USB1, 415 .start = MXC_INT_USB1,
@@ -434,8 +434,8 @@ static u64 usbh2_dmamask = ~(u32)0;
434 434
435static struct resource mxc_usbh2_resources[] = { 435static struct resource mxc_usbh2_resources[] = {
436 { 436 {
437 .start = OTG_BASE_ADDR + 0x400, 437 .start = MX31_OTG_BASE_ADDR + 0x400,
438 .end = OTG_BASE_ADDR + 0x5ff, 438 .end = MX31_OTG_BASE_ADDR + 0x5ff,
439 .flags = IORESOURCE_MEM, 439 .flags = IORESOURCE_MEM,
440 }, { 440 }, {
441 .start = MXC_INT_USB2, 441 .start = MXC_INT_USB2,
@@ -547,6 +547,14 @@ static int mx3_devices_init(void)
547 if (cpu_is_mx35()) { 547 if (cpu_is_mx35()) {
548 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; 548 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
549 mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; 549 mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff;
550 otg_resources[0].start = MX35_OTG_BASE_ADDR;
551 otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
552 otg_resources[1].start = MXC_INT_USBOTG;
553 otg_resources[1].end = MXC_INT_USBOTG;
554 mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400;
555 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
556 mxc_usbh1_resources[1].start = MXC_INT_USBHS;
557 mxc_usbh1_resources[1].end = MXC_INT_USBHS;
550 } 558 }
551 559
552 return 0; 560 return 0;
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 0b06941b6139..14ac0dcc82f4 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -4,7 +4,7 @@
4#define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */ 4#define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */
5#define MX31_IRAM_SIZE SZ_16K 5#define MX31_IRAM_SIZE SZ_16K
6 6
7#define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) 7#define MX31_OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000)
8#define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) 8#define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000)
9#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) 9#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000)
10#define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) 10#define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000)
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h
index 6465fefb42e3..ab4cfec6c8ab 100644
--- a/arch/arm/plat-mxc/include/mach/mx35.h
+++ b/arch/arm/plat-mxc/include/mach/mx35.h
@@ -5,6 +5,7 @@
5#define MX35_IRAM_SIZE SZ_128K 5#define MX35_IRAM_SIZE SZ_128K
6 6
7#define MXC_FEC_BASE_ADDR 0x50038000 7#define MXC_FEC_BASE_ADDR 0x50038000
8#define MX35_OTG_BASE_ADDR 0x53ff4000
8#define MX35_NFC_BASE_ADDR 0xBB000000 9#define MX35_NFC_BASE_ADDR 0xBB000000
9 10
10/* 11/*