diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/mm/pageattr.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 7be47d1a97e4..7233bd7e357b 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c | |||
@@ -515,6 +515,17 @@ static int split_large_page(pte_t *kpte, unsigned long address) | |||
515 | * primary protection behavior: | 515 | * primary protection behavior: |
516 | */ | 516 | */ |
517 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); | 517 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); |
518 | |||
519 | /* | ||
520 | * Intel Atom errata AAH41 workaround. | ||
521 | * | ||
522 | * The real fix should be in hw or in a microcode update, but | ||
523 | * we also probabilistically try to reduce the window of having | ||
524 | * a large TLB mixed with 4K TLBs while instruction fetches are | ||
525 | * going on. | ||
526 | */ | ||
527 | __flush_tlb_all(); | ||
528 | |||
518 | base = NULL; | 529 | base = NULL; |
519 | 530 | ||
520 | out_unlock: | 531 | out_unlock: |