diff options
Diffstat (limited to 'arch')
342 files changed, 9993 insertions, 5507 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index b7193986cbf9..3e2e540a0f2a 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig | |||
| @@ -51,10 +51,6 @@ config GENERIC_TIME | |||
| 51 | bool | 51 | bool |
| 52 | default y | 52 | default y |
| 53 | 53 | ||
| 54 | config ARCH_USES_GETTIMEOFFSET | ||
| 55 | bool | ||
| 56 | default y | ||
| 57 | |||
| 58 | config GENERIC_CMOS_UPDATE | 54 | config GENERIC_CMOS_UPDATE |
| 59 | def_bool y | 55 | def_bool y |
| 60 | 56 | ||
| @@ -65,6 +61,9 @@ config ZONE_DMA | |||
| 65 | config NEED_DMA_MAP_STATE | 61 | config NEED_DMA_MAP_STATE |
| 66 | def_bool y | 62 | def_bool y |
| 67 | 63 | ||
| 64 | config NEED_SG_DMA_LENGTH | ||
| 65 | def_bool y | ||
| 66 | |||
| 68 | config GENERIC_ISA_DMA | 67 | config GENERIC_ISA_DMA |
| 69 | bool | 68 | bool |
| 70 | default y | 69 | default y |
diff --git a/arch/alpha/include/asm/bitops.h b/arch/alpha/include/asm/bitops.h index 296da1d5ed57..1dce24bc455a 100644 --- a/arch/alpha/include/asm/bitops.h +++ b/arch/alpha/include/asm/bitops.h | |||
| @@ -438,22 +438,20 @@ static inline unsigned int __arch_hweight8(unsigned int w) | |||
| 438 | 438 | ||
| 439 | /* | 439 | /* |
| 440 | * Every architecture must define this function. It's the fastest | 440 | * Every architecture must define this function. It's the fastest |
| 441 | * way of searching a 140-bit bitmap where the first 100 bits are | 441 | * way of searching a 100-bit bitmap. It's guaranteed that at least |
| 442 | * unlikely to be set. It's guaranteed that at least one of the 140 | 442 | * one of the 100 bits is cleared. |
| 443 | * bits is set. | ||
| 444 | */ | 443 | */ |
| 445 | static inline unsigned long | 444 | static inline unsigned long |
| 446 | sched_find_first_bit(unsigned long b[3]) | 445 | sched_find_first_bit(const unsigned long b[2]) |
| 447 | { | 446 | { |
| 448 | unsigned long b0 = b[0], b1 = b[1], b2 = b[2]; | 447 | unsigned long b0, b1, ofs, tmp; |
| 449 | unsigned long ofs; | ||
| 450 | 448 | ||
| 451 | ofs = (b1 ? 64 : 128); | 449 | b0 = b[0]; |
| 452 | b1 = (b1 ? b1 : b2); | 450 | b1 = b[1]; |
| 453 | ofs = (b0 ? 0 : ofs); | 451 | ofs = (b0 ? 0 : 64); |
| 454 | b0 = (b0 ? b0 : b1); | 452 | tmp = (b0 ? b0 : b1); |
| 455 | 453 | ||
| 456 | return __ffs(b0) + ofs; | 454 | return __ffs(tmp) + ofs; |
| 457 | } | 455 | } |
| 458 | 456 | ||
| 459 | #include <asm-generic/bitops/ext2-non-atomic.h> | 457 | #include <asm-generic/bitops/ext2-non-atomic.h> |
diff --git a/arch/alpha/include/asm/scatterlist.h b/arch/alpha/include/asm/scatterlist.h index 440747ca6349..5728c52a7412 100644 --- a/arch/alpha/include/asm/scatterlist.h +++ b/arch/alpha/include/asm/scatterlist.h | |||
| @@ -1,24 +1,7 @@ | |||
| 1 | #ifndef _ALPHA_SCATTERLIST_H | 1 | #ifndef _ALPHA_SCATTERLIST_H |
| 2 | #define _ALPHA_SCATTERLIST_H | 2 | #define _ALPHA_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/page.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | #include <asm/types.h> | ||
| 6 | |||
| 7 | struct scatterlist { | ||
| 8 | #ifdef CONFIG_DEBUG_SG | ||
| 9 | unsigned long sg_magic; | ||
| 10 | #endif | ||
| 11 | unsigned long page_link; | ||
| 12 | unsigned int offset; | ||
| 13 | |||
| 14 | unsigned int length; | ||
| 15 | |||
| 16 | dma_addr_t dma_address; | ||
| 17 | __u32 dma_length; | ||
| 18 | }; | ||
| 19 | |||
| 20 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 21 | #define sg_dma_len(sg) ((sg)->dma_length) | ||
| 22 | 5 | ||
| 23 | #define ISA_DMA_THRESHOLD (~0UL) | 6 | #define ISA_DMA_THRESHOLD (~0UL) |
| 24 | 7 | ||
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c index 5465e932e568..1efbed82c0fd 100644 --- a/arch/alpha/kernel/time.c +++ b/arch/alpha/kernel/time.c | |||
| @@ -51,6 +51,7 @@ | |||
| 51 | #include <linux/mc146818rtc.h> | 51 | #include <linux/mc146818rtc.h> |
| 52 | #include <linux/time.h> | 52 | #include <linux/time.h> |
| 53 | #include <linux/timex.h> | 53 | #include <linux/timex.h> |
| 54 | #include <linux/clocksource.h> | ||
| 54 | 55 | ||
| 55 | #include "proto.h" | 56 | #include "proto.h" |
| 56 | #include "irq_impl.h" | 57 | #include "irq_impl.h" |
| @@ -332,6 +333,34 @@ rpcc_after_update_in_progress(void) | |||
| 332 | return rpcc(); | 333 | return rpcc(); |
| 333 | } | 334 | } |
| 334 | 335 | ||
| 336 | #ifndef CONFIG_SMP | ||
| 337 | /* Until and unless we figure out how to get cpu cycle counters | ||
| 338 | in sync and keep them there, we can't use the rpcc. */ | ||
| 339 | static cycle_t read_rpcc(struct clocksource *cs) | ||
| 340 | { | ||
| 341 | cycle_t ret = (cycle_t)rpcc(); | ||
| 342 | return ret; | ||
| 343 | } | ||
| 344 | |||
| 345 | static struct clocksource clocksource_rpcc = { | ||
| 346 | .name = "rpcc", | ||
| 347 | .rating = 300, | ||
| 348 | .read = read_rpcc, | ||
| 349 | .mask = CLOCKSOURCE_MASK(32), | ||
| 350 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | ||
| 351 | }; | ||
| 352 | |||
| 353 | static inline void register_rpcc_clocksource(long cycle_freq) | ||
| 354 | { | ||
| 355 | clocksource_calc_mult_shift(&clocksource_rpcc, cycle_freq, 4); | ||
| 356 | clocksource_register(&clocksource_rpcc); | ||
| 357 | } | ||
| 358 | #else /* !CONFIG_SMP */ | ||
| 359 | static inline void register_rpcc_clocksource(long cycle_freq) | ||
| 360 | { | ||
| 361 | } | ||
| 362 | #endif /* !CONFIG_SMP */ | ||
| 363 | |||
| 335 | void __init | 364 | void __init |
| 336 | time_init(void) | 365 | time_init(void) |
| 337 | { | 366 | { |
| @@ -385,6 +414,8 @@ time_init(void) | |||
| 385 | __you_loose(); | 414 | __you_loose(); |
| 386 | } | 415 | } |
| 387 | 416 | ||
| 417 | register_rpcc_clocksource(cycle_freq); | ||
| 418 | |||
| 388 | state.last_time = cc1; | 419 | state.last_time = cc1; |
| 389 | state.scaled_ticks_per_cycle | 420 | state.scaled_ticks_per_cycle |
| 390 | = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq; | 421 | = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq; |
| @@ -395,44 +426,6 @@ time_init(void) | |||
| 395 | } | 426 | } |
| 396 | 427 | ||
| 397 | /* | 428 | /* |
| 398 | * Use the cycle counter to estimate an displacement from the last time | ||
| 399 | * tick. Unfortunately the Alpha designers made only the low 32-bits of | ||
| 400 | * the cycle counter active, so we overflow on 8.2 seconds on a 500MHz | ||
| 401 | * part. So we can't do the "find absolute time in terms of cycles" thing | ||
| 402 | * that the other ports do. | ||
| 403 | */ | ||
| 404 | u32 arch_gettimeoffset(void) | ||
| 405 | { | ||
| 406 | #ifdef CONFIG_SMP | ||
| 407 | /* Until and unless we figure out how to get cpu cycle counters | ||
| 408 | in sync and keep them there, we can't use the rpcc tricks. */ | ||
| 409 | return 0; | ||
| 410 | #else | ||
| 411 | unsigned long delta_cycles, delta_usec, partial_tick; | ||
| 412 | |||
| 413 | delta_cycles = rpcc() - state.last_time; | ||
| 414 | partial_tick = state.partial_tick; | ||
| 415 | /* | ||
| 416 | * usec = cycles * ticks_per_cycle * 2**48 * 1e6 / (2**48 * ticks) | ||
| 417 | * = cycles * (s_t_p_c) * 1e6 / (2**48 * ticks) | ||
| 418 | * = cycles * (s_t_p_c) * 15625 / (2**42 * ticks) | ||
| 419 | * | ||
| 420 | * which, given a 600MHz cycle and a 1024Hz tick, has a | ||
| 421 | * dynamic range of about 1.7e17, which is less than the | ||
| 422 | * 1.8e19 in an unsigned long, so we are safe from overflow. | ||
| 423 | * | ||
| 424 | * Round, but with .5 up always, since .5 to even is harder | ||
| 425 | * with no clear gain. | ||
| 426 | */ | ||
| 427 | |||
| 428 | delta_usec = (delta_cycles * state.scaled_ticks_per_cycle | ||
| 429 | + partial_tick) * 15625; | ||
| 430 | delta_usec = ((delta_usec / ((1UL << (FIX_SHIFT-6-1)) * HZ)) + 1) / 2; | ||
| 431 | return delta_usec * 1000; | ||
| 432 | #endif | ||
| 433 | } | ||
| 434 | |||
| 435 | /* | ||
| 436 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be | 429 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be |
| 437 | * called 500 ms after the second nowtime has started, because when | 430 | * called 500 ms after the second nowtime has started, because when |
| 438 | * nowtime is written into the registers of the CMOS clock, it will | 431 | * nowtime is written into the registers of the CMOS clock, it will |
diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c index 00a31deaa96e..fadd5f882ff9 100644 --- a/arch/alpha/mm/fault.c +++ b/arch/alpha/mm/fault.c | |||
| @@ -142,7 +142,6 @@ do_page_fault(unsigned long address, unsigned long mmcsr, | |||
| 142 | goto bad_area; | 142 | goto bad_area; |
| 143 | } | 143 | } |
| 144 | 144 | ||
| 145 | survive: | ||
| 146 | /* If for any reason at all we couldn't handle the fault, | 145 | /* If for any reason at all we couldn't handle the fault, |
| 147 | make sure we exit gracefully rather than endlessly redo | 146 | make sure we exit gracefully rather than endlessly redo |
| 148 | the fault. */ | 147 | the fault. */ |
| @@ -188,16 +187,10 @@ do_page_fault(unsigned long address, unsigned long mmcsr, | |||
| 188 | /* We ran out of memory, or some other thing happened to us that | 187 | /* We ran out of memory, or some other thing happened to us that |
| 189 | made us unable to handle the page fault gracefully. */ | 188 | made us unable to handle the page fault gracefully. */ |
| 190 | out_of_memory: | 189 | out_of_memory: |
| 191 | if (is_global_init(current)) { | ||
| 192 | yield(); | ||
| 193 | down_read(&mm->mmap_sem); | ||
| 194 | goto survive; | ||
| 195 | } | ||
| 196 | printk(KERN_ALERT "VM: killing process %s(%d)\n", | ||
| 197 | current->comm, task_pid_nr(current)); | ||
| 198 | if (!user_mode(regs)) | 190 | if (!user_mode(regs)) |
| 199 | goto no_context; | 191 | goto no_context; |
| 200 | do_group_exit(SIGKILL); | 192 | pagefault_out_of_memory(); |
| 193 | return; | ||
| 201 | 194 | ||
| 202 | do_sigbus: | 195 | do_sigbus: |
| 203 | /* Send a sigbus, regardless of whether we were in kernel | 196 | /* Send a sigbus, regardless of whether we were in kernel |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2d70cece2ea2..1f254bd6c937 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
| @@ -671,6 +671,7 @@ config ARCH_S5P6440 | |||
| 671 | select CPU_V6 | 671 | select CPU_V6 |
| 672 | select GENERIC_GPIO | 672 | select GENERIC_GPIO |
| 673 | select HAVE_CLK | 673 | select HAVE_CLK |
| 674 | select ARCH_USES_GETTIMEOFFSET | ||
| 674 | help | 675 | help |
| 675 | Samsung S5P6440 CPU based systems | 676 | Samsung S5P6440 CPU based systems |
| 676 | 677 | ||
| @@ -679,17 +680,19 @@ config ARCH_S5P6442 | |||
| 679 | select CPU_V6 | 680 | select CPU_V6 |
| 680 | select GENERIC_GPIO | 681 | select GENERIC_GPIO |
| 681 | select HAVE_CLK | 682 | select HAVE_CLK |
| 683 | select ARCH_USES_GETTIMEOFFSET | ||
| 682 | help | 684 | help |
| 683 | Samsung S5P6442 CPU based systems | 685 | Samsung S5P6442 CPU based systems |
| 684 | 686 | ||
| 685 | config ARCH_S5PC1XX | 687 | config ARCH_S5PC100 |
| 686 | bool "Samsung S5PC1XX" | 688 | bool "Samsung S5PC100" |
| 687 | select GENERIC_GPIO | 689 | select GENERIC_GPIO |
| 688 | select HAVE_CLK | 690 | select HAVE_CLK |
| 689 | select CPU_V7 | 691 | select CPU_V7 |
| 690 | select ARM_L1_CACHE_SHIFT_6 | 692 | select ARM_L1_CACHE_SHIFT_6 |
| 693 | select ARCH_USES_GETTIMEOFFSET | ||
| 691 | help | 694 | help |
| 692 | Samsung S5PC1XX series based systems | 695 | Samsung S5PC100 series based systems |
| 693 | 696 | ||
| 694 | config ARCH_S5PV210 | 697 | config ARCH_S5PV210 |
| 695 | bool "Samsung S5PV210/S5PC110" | 698 | bool "Samsung S5PV210/S5PC110" |
| @@ -697,6 +700,7 @@ config ARCH_S5PV210 | |||
| 697 | select GENERIC_GPIO | 700 | select GENERIC_GPIO |
| 698 | select HAVE_CLK | 701 | select HAVE_CLK |
| 699 | select ARM_L1_CACHE_SHIFT_6 | 702 | select ARM_L1_CACHE_SHIFT_6 |
| 703 | select ARCH_USES_GETTIMEOFFSET | ||
| 700 | help | 704 | help |
| 701 | Samsung S5PV210/S5PC110 series based systems | 705 | Samsung S5PV210/S5PC110 series based systems |
| 702 | 706 | ||
| @@ -876,7 +880,7 @@ source "arch/arm/mach-sa1100/Kconfig" | |||
| 876 | source "arch/arm/plat-samsung/Kconfig" | 880 | source "arch/arm/plat-samsung/Kconfig" |
| 877 | source "arch/arm/plat-s3c24xx/Kconfig" | 881 | source "arch/arm/plat-s3c24xx/Kconfig" |
| 878 | source "arch/arm/plat-s5p/Kconfig" | 882 | source "arch/arm/plat-s5p/Kconfig" |
| 879 | source "arch/arm/plat-s5pc1xx/Kconfig" | 883 | |
| 880 | source "arch/arm/plat-spear/Kconfig" | 884 | source "arch/arm/plat-spear/Kconfig" |
| 881 | 885 | ||
| 882 | if ARCH_S3C2410 | 886 | if ARCH_S3C2410 |
| @@ -896,9 +900,7 @@ source "arch/arm/mach-s5p6440/Kconfig" | |||
| 896 | 900 | ||
| 897 | source "arch/arm/mach-s5p6442/Kconfig" | 901 | source "arch/arm/mach-s5p6442/Kconfig" |
| 898 | 902 | ||
| 899 | if ARCH_S5PC1XX | ||
| 900 | source "arch/arm/mach-s5pc100/Kconfig" | 903 | source "arch/arm/mach-s5pc100/Kconfig" |
| 901 | endif | ||
| 902 | 904 | ||
| 903 | source "arch/arm/mach-s5pv210/Kconfig" | 905 | source "arch/arm/mach-s5pv210/Kconfig" |
| 904 | 906 | ||
| @@ -1419,6 +1421,17 @@ config CMDLINE | |||
| 1419 | time by entering them here. As a minimum, you should specify the | 1421 | time by entering them here. As a minimum, you should specify the |
| 1420 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | 1422 | memory size and the root device (e.g., mem=64M root=/dev/nfs). |
| 1421 | 1423 | ||
| 1424 | config CMDLINE_FORCE | ||
| 1425 | bool "Always use the default kernel command string" | ||
| 1426 | depends on CMDLINE != "" | ||
| 1427 | help | ||
| 1428 | Always use the default kernel command string, even if the boot | ||
| 1429 | loader passes other arguments to the kernel. | ||
| 1430 | This is useful if you cannot or don't want to change the | ||
| 1431 | command-line options your boot loader passes to the kernel. | ||
| 1432 | |||
| 1433 | If unsure, say N. | ||
| 1434 | |||
| 1422 | config XIP_KERNEL | 1435 | config XIP_KERNEL |
| 1423 | bool "Kernel Execute-In-Place from ROM" | 1436 | bool "Kernel Execute-In-Place from ROM" |
| 1424 | depends on !ZBOOT_ROM | 1437 | depends on !ZBOOT_ROM |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4b857fbe4314..64ba313724d2 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
| @@ -168,7 +168,7 @@ machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0 | |||
| 168 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx | 168 | machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx |
| 169 | machine-$(CONFIG_ARCH_S5P6440) := s5p6440 | 169 | machine-$(CONFIG_ARCH_S5P6440) := s5p6440 |
| 170 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 | 170 | machine-$(CONFIG_ARCH_S5P6442) := s5p6442 |
| 171 | machine-$(CONFIG_ARCH_S5PC1XX) := s5pc100 | 171 | machine-$(CONFIG_ARCH_S5PC100) := s5pc100 |
| 172 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 | 172 | machine-$(CONFIG_ARCH_S5PV210) := s5pv210 |
| 173 | machine-$(CONFIG_ARCH_SA1100) := sa1100 | 173 | machine-$(CONFIG_ARCH_SA1100) := sa1100 |
| 174 | machine-$(CONFIG_ARCH_SHARK) := shark | 174 | machine-$(CONFIG_ARCH_SHARK) := shark |
| @@ -198,7 +198,6 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik | |||
| 198 | plat-$(CONFIG_PLAT_ORION) := orion | 198 | plat-$(CONFIG_PLAT_ORION) := orion |
| 199 | plat-$(CONFIG_PLAT_PXA) := pxa | 199 | plat-$(CONFIG_PLAT_PXA) := pxa |
| 200 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung | 200 | plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung |
| 201 | plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx samsung | ||
| 202 | plat-$(CONFIG_PLAT_S5P) := s5p samsung | 201 | plat-$(CONFIG_PLAT_S5P) := s5p samsung |
| 203 | plat-$(CONFIG_PLAT_SPEAR) := spear | 202 | plat-$(CONFIG_PLAT_SPEAR) := spear |
| 204 | plat-$(CONFIG_PLAT_VERSATILE) := versatile | 203 | plat-$(CONFIG_PLAT_VERSATILE) := versatile |
diff --git a/arch/arm/boot/bootp/bootp.lds b/arch/arm/boot/bootp/bootp.lds index 8e3d81ce695e..fc54394f4340 100644 --- a/arch/arm/boot/bootp/bootp.lds +++ b/arch/arm/boot/bootp/bootp.lds | |||
| @@ -19,7 +19,7 @@ SECTIONS | |||
| 19 | initrd_size = initrd_end - initrd_start; | 19 | initrd_size = initrd_end - initrd_start; |
| 20 | _etext = .; | 20 | _etext = .; |
| 21 | } | 21 | } |
| 22 | 22 | ||
| 23 | .stab 0 : { *(.stab) } | 23 | .stab 0 : { *(.stab) } |
| 24 | .stabstr 0 : { *(.stabstr) } | 24 | .stabstr 0 : { *(.stabstr) } |
| 25 | .stab.excl 0 : { *(.stab.excl) } | 25 | .stab.excl 0 : { *(.stab.excl) } |
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig index c88e9527a8ec..a708fd6d6ffe 100644 --- a/arch/arm/configs/mx51_defconfig +++ b/arch/arm/configs/mx51_defconfig | |||
| @@ -809,7 +809,22 @@ CONFIG_SSB_POSSIBLE=y | |||
| 809 | CONFIG_DUMMY_CONSOLE=y | 809 | CONFIG_DUMMY_CONSOLE=y |
| 810 | # CONFIG_SOUND is not set | 810 | # CONFIG_SOUND is not set |
| 811 | # CONFIG_HID_SUPPORT is not set | 811 | # CONFIG_HID_SUPPORT is not set |
| 812 | # CONFIG_USB_SUPPORT is not set | 812 | CONFIG_USB_SUPPORT=y |
| 813 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 814 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
| 815 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 816 | CONFIG_USB=y | ||
| 817 | |||
| 818 | # | ||
| 819 | # USB Host Controller Drivers | ||
| 820 | # | ||
| 821 | # CONFIG_USB_C67X00_HCD is not set | ||
| 822 | CONFIG_USB_EHCI_HCD=y | ||
| 823 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
| 824 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
| 825 | CONFIG_USB_EHCI_MXC=y | ||
| 826 | |||
| 827 | |||
| 813 | CONFIG_MMC=y | 828 | CONFIG_MMC=y |
| 814 | # CONFIG_MMC_DEBUG is not set | 829 | # CONFIG_MMC_DEBUG is not set |
| 815 | # CONFIG_MMC_UNSAFE_RESUME is not set | 830 | # CONFIG_MMC_UNSAFE_RESUME is not set |
diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig index 8e94c3caeb8c..44cea2ddd22b 100644 --- a/arch/arm/configs/s3c2410_defconfig +++ b/arch/arm/configs/s3c2410_defconfig | |||
| @@ -1,14 +1,15 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30-rc2 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Fri May 28 19:15:48 2010 | ||
| 4 | # | 5 | # |
| 5 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 6 | CONFIG_HAVE_PWM=y | 7 | CONFIG_HAVE_PWM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 9 | CONFIG_GENERIC_GPIO=y |
| 9 | # CONFIG_GENERIC_TIME is not set | 10 | CONFIG_GENERIC_TIME=y |
| 10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | 11 | CONFIG_ARCH_USES_GETTIMEOFFSET=y |
| 11 | CONFIG_MMU=y | 12 | CONFIG_HAVE_PROC_CPU=y |
| 12 | CONFIG_NO_IOPORT=y | 13 | CONFIG_NO_IOPORT=y |
| 13 | CONFIG_GENERIC_HARDIRQS=y | 14 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | CONFIG_STACKTRACE_SUPPORT=y | 15 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -18,13 +19,14 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | 19 | CONFIG_HARDIRQS_SW_RESEND=y |
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | 20 | CONFIG_GENERIC_IRQ_PROBE=y |
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 21 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | 22 | CONFIG_ARCH_HAS_CPUFREQ=y |
| 22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | 23 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 25 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 26 | CONFIG_VECTORS_BASE=0xffff0000 | 27 | CONFIG_VECTORS_BASE=0xffff0000 |
| 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 29 | CONFIG_CONSTRUCTORS=y | ||
| 28 | 30 | ||
| 29 | # | 31 | # |
| 30 | # General setup | 32 | # General setup |
| @@ -34,6 +36,13 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 36 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 35 | CONFIG_LOCALVERSION="" | 37 | CONFIG_LOCALVERSION="" |
| 36 | CONFIG_LOCALVERSION_AUTO=y | 38 | CONFIG_LOCALVERSION_AUTO=y |
| 39 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 40 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 41 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 42 | CONFIG_KERNEL_GZIP=y | ||
| 43 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 44 | # CONFIG_KERNEL_LZMA is not set | ||
| 45 | # CONFIG_KERNEL_LZO is not set | ||
| 37 | CONFIG_SWAP=y | 46 | CONFIG_SWAP=y |
| 38 | CONFIG_SYSVIPC=y | 47 | CONFIG_SYSVIPC=y |
| 39 | CONFIG_SYSVIPC_SYSCTL=y | 48 | CONFIG_SYSVIPC_SYSCTL=y |
| @@ -45,15 +54,16 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
| 45 | # | 54 | # |
| 46 | # RCU Subsystem | 55 | # RCU Subsystem |
| 47 | # | 56 | # |
| 48 | CONFIG_CLASSIC_RCU=y | 57 | CONFIG_TREE_RCU=y |
| 49 | # CONFIG_TREE_RCU is not set | 58 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 50 | # CONFIG_PREEMPT_RCU is not set | 59 | # CONFIG_TINY_RCU is not set |
| 60 | # CONFIG_RCU_TRACE is not set | ||
| 61 | CONFIG_RCU_FANOUT=32 | ||
| 62 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 51 | # CONFIG_TREE_RCU_TRACE is not set | 63 | # CONFIG_TREE_RCU_TRACE is not set |
| 52 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 53 | CONFIG_IKCONFIG=m | 64 | CONFIG_IKCONFIG=m |
| 54 | CONFIG_IKCONFIG_PROC=y | 65 | CONFIG_IKCONFIG_PROC=y |
| 55 | CONFIG_LOG_BUF_SHIFT=16 | 66 | CONFIG_LOG_BUF_SHIFT=16 |
| 56 | # CONFIG_GROUP_SCHED is not set | ||
| 57 | # CONFIG_CGROUPS is not set | 67 | # CONFIG_CGROUPS is not set |
| 58 | CONFIG_SYSFS_DEPRECATED=y | 68 | CONFIG_SYSFS_DEPRECATED=y |
| 59 | CONFIG_SYSFS_DEPRECATED_V2=y | 69 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -69,6 +79,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 69 | CONFIG_RD_GZIP=y | 79 | CONFIG_RD_GZIP=y |
| 70 | CONFIG_RD_BZIP2=y | 80 | CONFIG_RD_BZIP2=y |
| 71 | CONFIG_RD_LZMA=y | 81 | CONFIG_RD_LZMA=y |
| 82 | CONFIG_RD_LZO=y | ||
| 72 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 83 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 73 | CONFIG_SYSCTL=y | 84 | CONFIG_SYSCTL=y |
| 74 | CONFIG_ANON_INODES=y | 85 | CONFIG_ANON_INODES=y |
| @@ -78,7 +89,6 @@ CONFIG_SYSCTL_SYSCALL=y | |||
| 78 | CONFIG_KALLSYMS=y | 89 | CONFIG_KALLSYMS=y |
| 79 | # CONFIG_KALLSYMS_ALL is not set | 90 | # CONFIG_KALLSYMS_ALL is not set |
| 80 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 91 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
| 81 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 82 | CONFIG_HOTPLUG=y | 92 | CONFIG_HOTPLUG=y |
| 83 | CONFIG_PRINTK=y | 93 | CONFIG_PRINTK=y |
| 84 | CONFIG_BUG=y | 94 | CONFIG_BUG=y |
| @@ -91,19 +101,30 @@ CONFIG_TIMERFD=y | |||
| 91 | CONFIG_EVENTFD=y | 101 | CONFIG_EVENTFD=y |
| 92 | CONFIG_SHMEM=y | 102 | CONFIG_SHMEM=y |
| 93 | CONFIG_AIO=y | 103 | CONFIG_AIO=y |
| 104 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 105 | CONFIG_PERF_USE_VMALLOC=y | ||
| 106 | |||
| 107 | # | ||
| 108 | # Kernel Performance Events And Counters | ||
| 109 | # | ||
| 110 | # CONFIG_PERF_EVENTS is not set | ||
| 111 | # CONFIG_PERF_COUNTERS is not set | ||
| 94 | CONFIG_VM_EVENT_COUNTERS=y | 112 | CONFIG_VM_EVENT_COUNTERS=y |
| 95 | CONFIG_COMPAT_BRK=y | 113 | CONFIG_COMPAT_BRK=y |
| 96 | CONFIG_SLAB=y | 114 | CONFIG_SLAB=y |
| 97 | # CONFIG_SLUB is not set | 115 | # CONFIG_SLUB is not set |
| 98 | # CONFIG_SLOB is not set | 116 | # CONFIG_SLOB is not set |
| 99 | # CONFIG_PROFILING is not set | 117 | # CONFIG_PROFILING is not set |
| 100 | # CONFIG_MARKERS is not set | ||
| 101 | CONFIG_HAVE_OPROFILE=y | 118 | CONFIG_HAVE_OPROFILE=y |
| 102 | # CONFIG_KPROBES is not set | 119 | # CONFIG_KPROBES is not set |
| 103 | CONFIG_HAVE_KPROBES=y | 120 | CONFIG_HAVE_KPROBES=y |
| 104 | CONFIG_HAVE_KRETPROBES=y | 121 | CONFIG_HAVE_KRETPROBES=y |
| 105 | CONFIG_HAVE_CLK=y | 122 | CONFIG_HAVE_CLK=y |
| 106 | # CONFIG_SLOW_WORK is not set | 123 | |
| 124 | # | ||
| 125 | # GCOV-based kernel profiling | ||
| 126 | # | ||
| 127 | CONFIG_SLOW_WORK=y | ||
| 107 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 128 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 108 | CONFIG_SLABINFO=y | 129 | CONFIG_SLABINFO=y |
| 109 | CONFIG_RT_MUTEXES=y | 130 | CONFIG_RT_MUTEXES=y |
| @@ -115,7 +136,7 @@ CONFIG_MODULE_UNLOAD=y | |||
| 115 | # CONFIG_MODVERSIONS is not set | 136 | # CONFIG_MODVERSIONS is not set |
| 116 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 137 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
| 117 | CONFIG_BLOCK=y | 138 | CONFIG_BLOCK=y |
| 118 | # CONFIG_LBD is not set | 139 | CONFIG_LBDAF=y |
| 119 | # CONFIG_BLK_DEV_BSG is not set | 140 | # CONFIG_BLK_DEV_BSG is not set |
| 120 | # CONFIG_BLK_DEV_INTEGRITY is not set | 141 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 121 | 142 | ||
| @@ -123,32 +144,64 @@ CONFIG_BLOCK=y | |||
| 123 | # IO Schedulers | 144 | # IO Schedulers |
| 124 | # | 145 | # |
| 125 | CONFIG_IOSCHED_NOOP=y | 146 | CONFIG_IOSCHED_NOOP=y |
| 126 | CONFIG_IOSCHED_AS=y | ||
| 127 | CONFIG_IOSCHED_DEADLINE=y | 147 | CONFIG_IOSCHED_DEADLINE=y |
| 128 | CONFIG_IOSCHED_CFQ=y | 148 | CONFIG_IOSCHED_CFQ=y |
| 129 | CONFIG_DEFAULT_AS=y | ||
| 130 | # CONFIG_DEFAULT_DEADLINE is not set | 149 | # CONFIG_DEFAULT_DEADLINE is not set |
| 131 | # CONFIG_DEFAULT_CFQ is not set | 150 | CONFIG_DEFAULT_CFQ=y |
| 132 | # CONFIG_DEFAULT_NOOP is not set | 151 | # CONFIG_DEFAULT_NOOP is not set |
| 133 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 152 | CONFIG_DEFAULT_IOSCHED="cfq" |
| 153 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 154 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 155 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 156 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 157 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 158 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 159 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 160 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 161 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 162 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 163 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 164 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 165 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 166 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 167 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 168 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 169 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 170 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 171 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 172 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 173 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 174 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 175 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 176 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 177 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 178 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 179 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 180 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 181 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 134 | CONFIG_FREEZER=y | 182 | CONFIG_FREEZER=y |
| 135 | 183 | ||
| 136 | # | 184 | # |
| 137 | # System Type | 185 | # System Type |
| 138 | # | 186 | # |
| 187 | CONFIG_MMU=y | ||
| 139 | # CONFIG_ARCH_AAEC2000 is not set | 188 | # CONFIG_ARCH_AAEC2000 is not set |
| 140 | # CONFIG_ARCH_INTEGRATOR is not set | 189 | # CONFIG_ARCH_INTEGRATOR is not set |
| 141 | # CONFIG_ARCH_REALVIEW is not set | 190 | # CONFIG_ARCH_REALVIEW is not set |
| 142 | # CONFIG_ARCH_VERSATILE is not set | 191 | # CONFIG_ARCH_VERSATILE is not set |
| 192 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 143 | # CONFIG_ARCH_AT91 is not set | 193 | # CONFIG_ARCH_AT91 is not set |
| 194 | # CONFIG_ARCH_BCMRING is not set | ||
| 144 | # CONFIG_ARCH_CLPS711X is not set | 195 | # CONFIG_ARCH_CLPS711X is not set |
| 196 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 197 | # CONFIG_ARCH_GEMINI is not set | ||
| 145 | # CONFIG_ARCH_EBSA110 is not set | 198 | # CONFIG_ARCH_EBSA110 is not set |
| 146 | # CONFIG_ARCH_EP93XX is not set | 199 | # CONFIG_ARCH_EP93XX is not set |
| 147 | # CONFIG_ARCH_GEMINI is not set | ||
| 148 | # CONFIG_ARCH_FOOTBRIDGE is not set | 200 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 201 | # CONFIG_ARCH_MXC is not set | ||
| 202 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 149 | # CONFIG_ARCH_NETX is not set | 203 | # CONFIG_ARCH_NETX is not set |
| 150 | # CONFIG_ARCH_H720X is not set | 204 | # CONFIG_ARCH_H720X is not set |
| 151 | # CONFIG_ARCH_IMX is not set | ||
| 152 | # CONFIG_ARCH_IOP13XX is not set | 205 | # CONFIG_ARCH_IOP13XX is not set |
| 153 | # CONFIG_ARCH_IOP32X is not set | 206 | # CONFIG_ARCH_IOP32X is not set |
| 154 | # CONFIG_ARCH_IOP33X is not set | 207 | # CONFIG_ARCH_IOP33X is not set |
| @@ -156,42 +209,37 @@ CONFIG_FREEZER=y | |||
| 156 | # CONFIG_ARCH_IXP2000 is not set | 209 | # CONFIG_ARCH_IXP2000 is not set |
| 157 | # CONFIG_ARCH_IXP4XX is not set | 210 | # CONFIG_ARCH_IXP4XX is not set |
| 158 | # CONFIG_ARCH_L7200 is not set | 211 | # CONFIG_ARCH_L7200 is not set |
| 212 | # CONFIG_ARCH_DOVE is not set | ||
| 159 | # CONFIG_ARCH_KIRKWOOD is not set | 213 | # CONFIG_ARCH_KIRKWOOD is not set |
| 160 | # CONFIG_ARCH_KS8695 is not set | ||
| 161 | # CONFIG_ARCH_NS9XXX is not set | ||
| 162 | # CONFIG_ARCH_LOKI is not set | 214 | # CONFIG_ARCH_LOKI is not set |
| 163 | # CONFIG_ARCH_MV78XX0 is not set | 215 | # CONFIG_ARCH_MV78XX0 is not set |
| 164 | # CONFIG_ARCH_MXC is not set | ||
| 165 | # CONFIG_ARCH_ORION5X is not set | 216 | # CONFIG_ARCH_ORION5X is not set |
| 217 | # CONFIG_ARCH_MMP is not set | ||
| 218 | # CONFIG_ARCH_KS8695 is not set | ||
| 219 | # CONFIG_ARCH_NS9XXX is not set | ||
| 220 | # CONFIG_ARCH_W90X900 is not set | ||
| 221 | # CONFIG_ARCH_NUC93X is not set | ||
| 166 | # CONFIG_ARCH_PNX4008 is not set | 222 | # CONFIG_ARCH_PNX4008 is not set |
| 167 | # CONFIG_ARCH_PXA is not set | 223 | # CONFIG_ARCH_PXA is not set |
| 168 | # CONFIG_ARCH_MMP is not set | 224 | # CONFIG_ARCH_MSM is not set |
| 225 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 169 | # CONFIG_ARCH_RPC is not set | 226 | # CONFIG_ARCH_RPC is not set |
| 170 | # CONFIG_ARCH_SA1100 is not set | 227 | # CONFIG_ARCH_SA1100 is not set |
| 171 | CONFIG_ARCH_S3C2410=y | 228 | CONFIG_ARCH_S3C2410=y |
| 172 | # CONFIG_ARCH_S3C64XX is not set | 229 | # CONFIG_ARCH_S3C64XX is not set |
| 230 | # CONFIG_ARCH_S5P6440 is not set | ||
| 231 | # CONFIG_ARCH_S5P6442 is not set | ||
| 232 | # CONFIG_ARCH_S5PC100 is not set | ||
| 233 | # CONFIG_ARCH_S5PV210 is not set | ||
| 173 | # CONFIG_ARCH_SHARK is not set | 234 | # CONFIG_ARCH_SHARK is not set |
| 174 | # CONFIG_ARCH_LH7A40X is not set | 235 | # CONFIG_ARCH_LH7A40X is not set |
| 236 | # CONFIG_ARCH_U300 is not set | ||
| 237 | # CONFIG_ARCH_U8500 is not set | ||
| 238 | # CONFIG_ARCH_NOMADIK is not set | ||
| 175 | # CONFIG_ARCH_DAVINCI is not set | 239 | # CONFIG_ARCH_DAVINCI is not set |
| 176 | # CONFIG_ARCH_OMAP is not set | 240 | # CONFIG_ARCH_OMAP is not set |
| 177 | # CONFIG_ARCH_MSM is not set | 241 | # CONFIG_PLAT_SPEAR is not set |
| 178 | # CONFIG_ARCH_W90X900 is not set | 242 | CONFIG_PLAT_SAMSUNG=y |
| 179 | CONFIG_PLAT_S3C24XX=y | ||
| 180 | CONFIG_S3C2410_CLOCK=y | ||
| 181 | CONFIG_S3C24XX_DCLK=y | ||
| 182 | CONFIG_CPU_S3C244X=y | ||
| 183 | CONFIG_S3C24XX_PWM=y | ||
| 184 | CONFIG_S3C24XX_GPIO_EXTRA=128 | ||
| 185 | CONFIG_S3C24XX_GPIO_EXTRA64=y | ||
| 186 | CONFIG_S3C24XX_GPIO_EXTRA128=y | ||
| 187 | CONFIG_PM_SIMTEC=y | ||
| 188 | CONFIG_S3C2410_DMA=y | ||
| 189 | # CONFIG_S3C2410_DMA_DEBUG is not set | ||
| 190 | CONFIG_S3C_ADC=y | ||
| 191 | CONFIG_MACH_SMDK=y | ||
| 192 | CONFIG_PLAT_S3C=y | ||
| 193 | CONFIG_CPU_LLSERIAL_S3C2410=y | ||
| 194 | CONFIG_CPU_LLSERIAL_S3C2440=y | ||
| 195 | 243 | ||
| 196 | # | 244 | # |
| 197 | # Boot options | 245 | # Boot options |
| @@ -199,15 +247,44 @@ CONFIG_CPU_LLSERIAL_S3C2440=y | |||
| 199 | # CONFIG_S3C_BOOT_WATCHDOG is not set | 247 | # CONFIG_S3C_BOOT_WATCHDOG is not set |
| 200 | CONFIG_S3C_BOOT_ERROR_RESET=y | 248 | CONFIG_S3C_BOOT_ERROR_RESET=y |
| 201 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | 249 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y |
| 250 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | ||
| 251 | CONFIG_SAMSUNG_CLKSRC=y | ||
| 252 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | ||
| 253 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | ||
| 254 | CONFIG_S3C_GPIO_PULL_UP=y | ||
| 255 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | ||
| 256 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 257 | CONFIG_S3C_ADC=y | ||
| 258 | CONFIG_S3C_DEV_HSMMC=y | ||
| 259 | CONFIG_S3C_DEV_HSMMC1=y | ||
| 260 | CONFIG_S3C_DEV_HWMON=y | ||
| 261 | CONFIG_S3C_DEV_FB=y | ||
| 262 | CONFIG_S3C_DEV_USB_HOST=y | ||
| 263 | CONFIG_S3C_DEV_WDT=y | ||
| 264 | CONFIG_S3C_DEV_NAND=y | ||
| 265 | CONFIG_S3C_DMA=y | ||
| 202 | 266 | ||
| 203 | # | 267 | # |
| 204 | # Power management | 268 | # Power management |
| 205 | # | 269 | # |
| 206 | # CONFIG_SAMSUNG_PM_DEBUG is not set | 270 | # CONFIG_SAMSUNG_PM_DEBUG is not set |
| 207 | # CONFIG_SAMSUNG_PM_CHECK is not set | 271 | # CONFIG_SAMSUNG_PM_CHECK is not set |
| 208 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | 272 | CONFIG_PLAT_S3C24XX=y |
| 209 | CONFIG_S3C_GPIO_SPACE=0 | 273 | CONFIG_CPU_LLSERIAL_S3C2410=y |
| 210 | CONFIG_S3C_DEV_HSMMC=y | 274 | CONFIG_CPU_LLSERIAL_S3C2440=y |
| 275 | CONFIG_S3C2410_CLOCK=y | ||
| 276 | CONFIG_S3C2443_CLOCK=y | ||
| 277 | CONFIG_S3C24XX_DCLK=y | ||
| 278 | CONFIG_S3C24XX_PWM=y | ||
| 279 | CONFIG_S3C24XX_GPIO_EXTRA=128 | ||
| 280 | CONFIG_S3C24XX_GPIO_EXTRA64=y | ||
| 281 | CONFIG_S3C24XX_GPIO_EXTRA128=y | ||
| 282 | CONFIG_PM_SIMTEC=y | ||
| 283 | CONFIG_S3C2410_DMA=y | ||
| 284 | # CONFIG_S3C2410_DMA_DEBUG is not set | ||
| 285 | CONFIG_MACH_SMDK=y | ||
| 286 | CONFIG_S3C24XX_SIMTEC_AUDIO=y | ||
| 287 | CONFIG_S3C2410_SETUP_TS=y | ||
| 211 | 288 | ||
| 212 | # | 289 | # |
| 213 | # S3C2400 Machines | 290 | # S3C2400 Machines |
| @@ -224,8 +301,10 @@ CONFIG_MACH_BAST_IDE=y | |||
| 224 | # | 301 | # |
| 225 | CONFIG_ARCH_SMDK2410=y | 302 | CONFIG_ARCH_SMDK2410=y |
| 226 | CONFIG_ARCH_H1940=y | 303 | CONFIG_ARCH_H1940=y |
| 304 | # CONFIG_H1940BT is not set | ||
| 227 | CONFIG_PM_H1940=y | 305 | CONFIG_PM_H1940=y |
| 228 | CONFIG_MACH_N30=y | 306 | CONFIG_MACH_N30=y |
| 307 | CONFIG_MACH_N35=y | ||
| 229 | CONFIG_ARCH_BAST=y | 308 | CONFIG_ARCH_BAST=y |
| 230 | CONFIG_MACH_OTOM=y | 309 | CONFIG_MACH_OTOM=y |
| 231 | CONFIG_MACH_AML_M5900=y | 310 | CONFIG_MACH_AML_M5900=y |
| @@ -246,26 +325,35 @@ CONFIG_MACH_SMDK2413=y | |||
| 246 | CONFIG_MACH_S3C2413=y | 325 | CONFIG_MACH_S3C2413=y |
| 247 | CONFIG_MACH_SMDK2412=y | 326 | CONFIG_MACH_SMDK2412=y |
| 248 | CONFIG_MACH_VSTMS=y | 327 | CONFIG_MACH_VSTMS=y |
| 328 | CONFIG_CPU_S3C2416=y | ||
| 329 | CONFIG_S3C2416_DMA=y | ||
| 330 | |||
| 331 | # | ||
| 332 | # S3C2416 Machines | ||
| 333 | # | ||
| 334 | CONFIG_MACH_SMDK2416=y | ||
| 249 | CONFIG_CPU_S3C2440=y | 335 | CONFIG_CPU_S3C2440=y |
| 336 | CONFIG_CPU_S3C2442=y | ||
| 337 | CONFIG_CPU_S3C244X=y | ||
| 338 | CONFIG_S3C2440_XTAL_12000000=y | ||
| 339 | CONFIG_S3C2440_XTAL_16934400=y | ||
| 250 | CONFIG_S3C2440_DMA=y | 340 | CONFIG_S3C2440_DMA=y |
| 251 | 341 | ||
| 252 | # | 342 | # |
| 253 | # S3C2440 Machines | 343 | # S3C2440 and S3C2442 Machines |
| 254 | # | 344 | # |
| 255 | CONFIG_MACH_ANUBIS=y | 345 | CONFIG_MACH_ANUBIS=y |
| 346 | CONFIG_MACH_NEO1973_GTA02=y | ||
| 256 | CONFIG_MACH_OSIRIS=y | 347 | CONFIG_MACH_OSIRIS=y |
| 348 | CONFIG_MACH_OSIRIS_DVS=m | ||
| 257 | CONFIG_MACH_RX3715=y | 349 | CONFIG_MACH_RX3715=y |
| 258 | CONFIG_ARCH_S3C2440=y | 350 | CONFIG_ARCH_S3C2440=y |
| 259 | CONFIG_MACH_NEXCODER_2440=y | 351 | CONFIG_MACH_NEXCODER_2440=y |
| 260 | CONFIG_SMDK2440_CPU2440=y | 352 | CONFIG_SMDK2440_CPU2440=y |
| 353 | CONFIG_SMDK2440_CPU2442=y | ||
| 261 | CONFIG_MACH_AT2440EVB=y | 354 | CONFIG_MACH_AT2440EVB=y |
| 262 | CONFIG_CPU_S3C2442=y | ||
| 263 | CONFIG_MACH_MINI2440=y | 355 | CONFIG_MACH_MINI2440=y |
| 264 | 356 | CONFIG_MACH_RX1950=y | |
| 265 | # | ||
| 266 | # S3C2442 Machines | ||
| 267 | # | ||
| 268 | CONFIG_SMDK2440_CPU2442=y | ||
| 269 | CONFIG_CPU_S3C2443=y | 357 | CONFIG_CPU_S3C2443=y |
| 270 | CONFIG_S3C2443_DMA=y | 358 | CONFIG_S3C2443_DMA=y |
| 271 | 359 | ||
| @@ -283,7 +371,7 @@ CONFIG_CPU_32v4T=y | |||
| 283 | CONFIG_CPU_32v5=y | 371 | CONFIG_CPU_32v5=y |
| 284 | CONFIG_CPU_ABRT_EV4T=y | 372 | CONFIG_CPU_ABRT_EV4T=y |
| 285 | CONFIG_CPU_ABRT_EV5TJ=y | 373 | CONFIG_CPU_ABRT_EV5TJ=y |
| 286 | CONFIG_CPU_PABRT_NOIFAR=y | 374 | CONFIG_CPU_PABRT_LEGACY=y |
| 287 | CONFIG_CPU_CACHE_V4WT=y | 375 | CONFIG_CPU_CACHE_V4WT=y |
| 288 | CONFIG_CPU_CACHE_VIVT=y | 376 | CONFIG_CPU_CACHE_VIVT=y |
| 289 | CONFIG_CPU_COPY_V4WB=y | 377 | CONFIG_CPU_COPY_V4WB=y |
| @@ -299,7 +387,7 @@ CONFIG_CPU_CP15_MMU=y | |||
| 299 | # CONFIG_CPU_DCACHE_DISABLE is not set | 387 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 300 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | 388 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set |
| 301 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | 389 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set |
| 302 | # CONFIG_OUTER_CACHE is not set | 390 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 303 | 391 | ||
| 304 | # | 392 | # |
| 305 | # Bus support | 393 | # Bus support |
| @@ -316,10 +404,11 @@ CONFIG_VMSPLIT_3G=y | |||
| 316 | # CONFIG_VMSPLIT_2G is not set | 404 | # CONFIG_VMSPLIT_2G is not set |
| 317 | # CONFIG_VMSPLIT_1G is not set | 405 | # CONFIG_VMSPLIT_1G is not set |
| 318 | CONFIG_PAGE_OFFSET=0xC0000000 | 406 | CONFIG_PAGE_OFFSET=0xC0000000 |
| 407 | CONFIG_PREEMPT_NONE=y | ||
| 408 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 319 | # CONFIG_PREEMPT is not set | 409 | # CONFIG_PREEMPT is not set |
| 320 | CONFIG_HZ=200 | 410 | CONFIG_HZ=200 |
| 321 | # CONFIG_AEABI is not set | 411 | # CONFIG_AEABI is not set |
| 322 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
| 323 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | 412 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 324 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | 413 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set |
| 325 | # CONFIG_HIGHMEM is not set | 414 | # CONFIG_HIGHMEM is not set |
| @@ -330,14 +419,14 @@ CONFIG_FLATMEM_MANUAL=y | |||
| 330 | CONFIG_FLATMEM=y | 419 | CONFIG_FLATMEM=y |
| 331 | CONFIG_FLAT_NODE_MEM_MAP=y | 420 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 332 | CONFIG_PAGEFLAGS_EXTENDED=y | 421 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 333 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 422 | CONFIG_SPLIT_PTLOCK_CPUS=999999 |
| 334 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 423 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 335 | CONFIG_ZONE_DMA_FLAG=0 | 424 | CONFIG_ZONE_DMA_FLAG=0 |
| 336 | CONFIG_VIRT_TO_BUS=y | 425 | CONFIG_VIRT_TO_BUS=y |
| 337 | CONFIG_UNEVICTABLE_LRU=y | 426 | # CONFIG_KSM is not set |
| 338 | CONFIG_HAVE_MLOCK=y | 427 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
| 339 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 340 | CONFIG_ALIGNMENT_TRAP=y | 428 | CONFIG_ALIGNMENT_TRAP=y |
| 429 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 341 | 430 | ||
| 342 | # | 431 | # |
| 343 | # Boot options | 432 | # Boot options |
| @@ -345,12 +434,14 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 345 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 434 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
| 346 | CONFIG_ZBOOT_ROM_BSS=0x0 | 435 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 347 | CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" | 436 | CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" |
| 437 | # CONFIG_CMDLINE_FORCE is not set | ||
| 348 | # CONFIG_XIP_KERNEL is not set | 438 | # CONFIG_XIP_KERNEL is not set |
| 349 | # CONFIG_KEXEC is not set | 439 | # CONFIG_KEXEC is not set |
| 350 | 440 | ||
| 351 | # | 441 | # |
| 352 | # CPU Power Management | 442 | # CPU Power Management |
| 353 | # | 443 | # |
| 444 | # CONFIG_CPU_FREQ is not set | ||
| 354 | # CONFIG_CPU_IDLE is not set | 445 | # CONFIG_CPU_IDLE is not set |
| 355 | 446 | ||
| 356 | # | 447 | # |
| @@ -384,6 +475,8 @@ CONFIG_PM_SLEEP=y | |||
| 384 | CONFIG_SUSPEND=y | 475 | CONFIG_SUSPEND=y |
| 385 | CONFIG_SUSPEND_FREEZER=y | 476 | CONFIG_SUSPEND_FREEZER=y |
| 386 | CONFIG_APM_EMULATION=m | 477 | CONFIG_APM_EMULATION=m |
| 478 | # CONFIG_PM_RUNTIME is not set | ||
| 479 | CONFIG_PM_OPS=y | ||
| 387 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 480 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 388 | CONFIG_NET=y | 481 | CONFIG_NET=y |
| 389 | 482 | ||
| @@ -391,7 +484,6 @@ CONFIG_NET=y | |||
| 391 | # Networking options | 484 | # Networking options |
| 392 | # | 485 | # |
| 393 | CONFIG_PACKET=y | 486 | CONFIG_PACKET=y |
| 394 | # CONFIG_PACKET_MMAP is not set | ||
| 395 | CONFIG_UNIX=y | 487 | CONFIG_UNIX=y |
| 396 | CONFIG_XFRM=y | 488 | CONFIG_XFRM=y |
| 397 | CONFIG_XFRM_USER=m | 489 | CONFIG_XFRM_USER=m |
| @@ -442,7 +534,9 @@ CONFIG_TCP_CONG_ILLINOIS=m | |||
| 442 | # CONFIG_DEFAULT_BIC is not set | 534 | # CONFIG_DEFAULT_BIC is not set |
| 443 | CONFIG_DEFAULT_CUBIC=y | 535 | CONFIG_DEFAULT_CUBIC=y |
| 444 | # CONFIG_DEFAULT_HTCP is not set | 536 | # CONFIG_DEFAULT_HTCP is not set |
| 537 | # CONFIG_DEFAULT_HYBLA is not set | ||
| 445 | # CONFIG_DEFAULT_VEGAS is not set | 538 | # CONFIG_DEFAULT_VEGAS is not set |
| 539 | # CONFIG_DEFAULT_VENO is not set | ||
| 446 | # CONFIG_DEFAULT_WESTWOOD is not set | 540 | # CONFIG_DEFAULT_WESTWOOD is not set |
| 447 | # CONFIG_DEFAULT_RENO is not set | 541 | # CONFIG_DEFAULT_RENO is not set |
| 448 | CONFIG_DEFAULT_TCP_CONG="cubic" | 542 | CONFIG_DEFAULT_TCP_CONG="cubic" |
| @@ -463,6 +557,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m | |||
| 463 | CONFIG_INET6_XFRM_MODE_BEET=m | 557 | CONFIG_INET6_XFRM_MODE_BEET=m |
| 464 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | 558 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m |
| 465 | CONFIG_IPV6_SIT=m | 559 | CONFIG_IPV6_SIT=m |
| 560 | # CONFIG_IPV6_SIT_6RD is not set | ||
| 466 | CONFIG_IPV6_NDISC_NODETYPE=y | 561 | CONFIG_IPV6_NDISC_NODETYPE=y |
| 467 | CONFIG_IPV6_TUNNEL=m | 562 | CONFIG_IPV6_TUNNEL=m |
| 468 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | 563 | # CONFIG_IPV6_MULTIPLE_TABLES is not set |
| @@ -498,8 +593,19 @@ CONFIG_NF_CONNTRACK_TFTP=m | |||
| 498 | CONFIG_NF_CT_NETLINK=m | 593 | CONFIG_NF_CT_NETLINK=m |
| 499 | # CONFIG_NETFILTER_TPROXY is not set | 594 | # CONFIG_NETFILTER_TPROXY is not set |
| 500 | CONFIG_NETFILTER_XTABLES=m | 595 | CONFIG_NETFILTER_XTABLES=m |
| 596 | |||
| 597 | # | ||
| 598 | # Xtables combined modules | ||
| 599 | # | ||
| 600 | CONFIG_NETFILTER_XT_MARK=m | ||
| 601 | CONFIG_NETFILTER_XT_CONNMARK=m | ||
| 602 | |||
| 603 | # | ||
| 604 | # Xtables targets | ||
| 605 | # | ||
| 501 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | 606 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m |
| 502 | CONFIG_NETFILTER_XT_TARGET_CONNMARK=m | 607 | CONFIG_NETFILTER_XT_TARGET_CONNMARK=m |
| 608 | # CONFIG_NETFILTER_XT_TARGET_CT is not set | ||
| 503 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | 609 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set |
| 504 | CONFIG_NETFILTER_XT_TARGET_HL=m | 610 | CONFIG_NETFILTER_XT_TARGET_HL=m |
| 505 | CONFIG_NETFILTER_XT_TARGET_LED=m | 611 | CONFIG_NETFILTER_XT_TARGET_LED=m |
| @@ -508,9 +614,14 @@ CONFIG_NETFILTER_XT_TARGET_NFLOG=m | |||
| 508 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | 614 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m |
| 509 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set | 615 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set |
| 510 | CONFIG_NETFILTER_XT_TARGET_RATEEST=m | 616 | CONFIG_NETFILTER_XT_TARGET_RATEEST=m |
| 617 | # CONFIG_NETFILTER_XT_TARGET_TEE is not set | ||
| 511 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | 618 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set |
| 512 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m | 619 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m |
| 513 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | 620 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set |
| 621 | |||
| 622 | # | ||
| 623 | # Xtables matches | ||
| 624 | # | ||
| 514 | CONFIG_NETFILTER_XT_MATCH_CLUSTER=m | 625 | CONFIG_NETFILTER_XT_MATCH_CLUSTER=m |
| 515 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | 626 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m |
| 516 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m | 627 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m |
| @@ -529,6 +640,7 @@ CONFIG_NETFILTER_XT_MATCH_LIMIT=m | |||
| 529 | CONFIG_NETFILTER_XT_MATCH_MAC=m | 640 | CONFIG_NETFILTER_XT_MATCH_MAC=m |
| 530 | CONFIG_NETFILTER_XT_MATCH_MARK=m | 641 | CONFIG_NETFILTER_XT_MATCH_MARK=m |
| 531 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | 642 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m |
| 643 | # CONFIG_NETFILTER_XT_MATCH_OSF is not set | ||
| 532 | CONFIG_NETFILTER_XT_MATCH_OWNER=m | 644 | CONFIG_NETFILTER_XT_MATCH_OWNER=m |
| 533 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | 645 | CONFIG_NETFILTER_XT_MATCH_POLICY=m |
| 534 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 646 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
| @@ -536,7 +648,6 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m | |||
| 536 | CONFIG_NETFILTER_XT_MATCH_RATEEST=m | 648 | CONFIG_NETFILTER_XT_MATCH_RATEEST=m |
| 537 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 649 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
| 538 | CONFIG_NETFILTER_XT_MATCH_RECENT=m | 650 | CONFIG_NETFILTER_XT_MATCH_RECENT=m |
| 539 | # CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set | ||
| 540 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 651 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
| 541 | CONFIG_NETFILTER_XT_MATCH_STATE=m | 652 | CONFIG_NETFILTER_XT_MATCH_STATE=m |
| 542 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m | 653 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m |
| @@ -556,6 +667,7 @@ CONFIG_IP_VS_TAB_BITS=12 | |||
| 556 | # CONFIG_IP_VS_PROTO_UDP is not set | 667 | # CONFIG_IP_VS_PROTO_UDP is not set |
| 557 | # CONFIG_IP_VS_PROTO_ESP is not set | 668 | # CONFIG_IP_VS_PROTO_ESP is not set |
| 558 | # CONFIG_IP_VS_PROTO_AH is not set | 669 | # CONFIG_IP_VS_PROTO_AH is not set |
| 670 | # CONFIG_IP_VS_PROTO_SCTP is not set | ||
| 559 | 671 | ||
| 560 | # | 672 | # |
| 561 | # IPVS scheduler | 673 | # IPVS scheduler |
| @@ -639,8 +751,10 @@ CONFIG_IP6_NF_MANGLE=m | |||
| 639 | CONFIG_IP6_NF_RAW=m | 751 | CONFIG_IP6_NF_RAW=m |
| 640 | # CONFIG_IP_DCCP is not set | 752 | # CONFIG_IP_DCCP is not set |
| 641 | # CONFIG_IP_SCTP is not set | 753 | # CONFIG_IP_SCTP is not set |
| 754 | # CONFIG_RDS is not set | ||
| 642 | # CONFIG_TIPC is not set | 755 | # CONFIG_TIPC is not set |
| 643 | # CONFIG_ATM is not set | 756 | # CONFIG_ATM is not set |
| 757 | # CONFIG_L2TP is not set | ||
| 644 | # CONFIG_BRIDGE is not set | 758 | # CONFIG_BRIDGE is not set |
| 645 | # CONFIG_NET_DSA is not set | 759 | # CONFIG_NET_DSA is not set |
| 646 | # CONFIG_VLAN_8021Q is not set | 760 | # CONFIG_VLAN_8021Q is not set |
| @@ -653,6 +767,7 @@ CONFIG_IP6_NF_RAW=m | |||
| 653 | # CONFIG_ECONET is not set | 767 | # CONFIG_ECONET is not set |
| 654 | # CONFIG_WAN_ROUTER is not set | 768 | # CONFIG_WAN_ROUTER is not set |
| 655 | # CONFIG_PHONET is not set | 769 | # CONFIG_PHONET is not set |
| 770 | # CONFIG_IEEE802154 is not set | ||
| 656 | # CONFIG_NET_SCHED is not set | 771 | # CONFIG_NET_SCHED is not set |
| 657 | CONFIG_NET_CLS_ROUTE=y | 772 | CONFIG_NET_CLS_ROUTE=y |
| 658 | # CONFIG_DCB is not set | 773 | # CONFIG_DCB is not set |
| @@ -666,6 +781,7 @@ CONFIG_NET_CLS_ROUTE=y | |||
| 666 | # CONFIG_IRDA is not set | 781 | # CONFIG_IRDA is not set |
| 667 | CONFIG_BT=m | 782 | CONFIG_BT=m |
| 668 | CONFIG_BT_L2CAP=m | 783 | CONFIG_BT_L2CAP=m |
| 784 | # CONFIG_BT_L2CAP_EXT_FEATURES is not set | ||
| 669 | CONFIG_BT_SCO=m | 785 | CONFIG_BT_SCO=m |
| 670 | CONFIG_BT_RFCOMM=m | 786 | CONFIG_BT_RFCOMM=m |
| 671 | CONFIG_BT_RFCOMM_TTY=y | 787 | CONFIG_BT_RFCOMM_TTY=y |
| @@ -687,19 +803,22 @@ CONFIG_BT_HCIBCM203X=m | |||
| 687 | CONFIG_BT_HCIBPA10X=m | 803 | CONFIG_BT_HCIBPA10X=m |
| 688 | CONFIG_BT_HCIBFUSB=m | 804 | CONFIG_BT_HCIBFUSB=m |
| 689 | CONFIG_BT_HCIVHCI=m | 805 | CONFIG_BT_HCIVHCI=m |
| 806 | # CONFIG_BT_MRVL is not set | ||
| 690 | # CONFIG_AF_RXRPC is not set | 807 | # CONFIG_AF_RXRPC is not set |
| 691 | CONFIG_WIRELESS=y | 808 | CONFIG_WIRELESS=y |
| 809 | CONFIG_WEXT_CORE=y | ||
| 810 | CONFIG_WEXT_PROC=y | ||
| 692 | CONFIG_CFG80211=m | 811 | CONFIG_CFG80211=m |
| 812 | # CONFIG_NL80211_TESTMODE is not set | ||
| 813 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
| 693 | # CONFIG_CFG80211_REG_DEBUG is not set | 814 | # CONFIG_CFG80211_REG_DEBUG is not set |
| 694 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | 815 | CONFIG_CFG80211_DEFAULT_PS=y |
| 695 | CONFIG_WIRELESS_EXT=y | 816 | # CONFIG_CFG80211_INTERNAL_REGDB is not set |
| 817 | CONFIG_CFG80211_WEXT=y | ||
| 696 | CONFIG_WIRELESS_EXT_SYSFS=y | 818 | CONFIG_WIRELESS_EXT_SYSFS=y |
| 697 | # CONFIG_LIB80211 is not set | 819 | # CONFIG_LIB80211 is not set |
| 698 | CONFIG_MAC80211=m | 820 | CONFIG_MAC80211=m |
| 699 | 821 | CONFIG_MAC80211_HAS_RC=y | |
| 700 | # | ||
| 701 | # Rate control algorithm selection | ||
| 702 | # | ||
| 703 | CONFIG_MAC80211_RC_MINSTREL=y | 822 | CONFIG_MAC80211_RC_MINSTREL=y |
| 704 | # CONFIG_MAC80211_RC_DEFAULT_PID is not set | 823 | # CONFIG_MAC80211_RC_DEFAULT_PID is not set |
| 705 | CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y | 824 | CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y |
| @@ -710,6 +829,7 @@ CONFIG_MAC80211_LEDS=y | |||
| 710 | # CONFIG_WIMAX is not set | 829 | # CONFIG_WIMAX is not set |
| 711 | # CONFIG_RFKILL is not set | 830 | # CONFIG_RFKILL is not set |
| 712 | # CONFIG_NET_9P is not set | 831 | # CONFIG_NET_9P is not set |
| 832 | # CONFIG_CAIF is not set | ||
| 713 | 833 | ||
| 714 | # | 834 | # |
| 715 | # Device Drivers | 835 | # Device Drivers |
| @@ -719,6 +839,7 @@ CONFIG_MAC80211_LEDS=y | |||
| 719 | # Generic Driver Options | 839 | # Generic Driver Options |
| 720 | # | 840 | # |
| 721 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 841 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 842 | # CONFIG_DEVTMPFS is not set | ||
| 722 | CONFIG_STANDALONE=y | 843 | CONFIG_STANDALONE=y |
| 723 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 844 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 724 | CONFIG_FW_LOADER=y | 845 | CONFIG_FW_LOADER=y |
| @@ -730,9 +851,9 @@ CONFIG_EXTRA_FIRMWARE="" | |||
| 730 | # CONFIG_CONNECTOR is not set | 851 | # CONFIG_CONNECTOR is not set |
| 731 | CONFIG_MTD=y | 852 | CONFIG_MTD=y |
| 732 | # CONFIG_MTD_DEBUG is not set | 853 | # CONFIG_MTD_DEBUG is not set |
| 854 | # CONFIG_MTD_TESTS is not set | ||
| 733 | # CONFIG_MTD_CONCAT is not set | 855 | # CONFIG_MTD_CONCAT is not set |
| 734 | CONFIG_MTD_PARTITIONS=y | 856 | CONFIG_MTD_PARTITIONS=y |
| 735 | # CONFIG_MTD_TESTS is not set | ||
| 736 | CONFIG_MTD_REDBOOT_PARTS=y | 857 | CONFIG_MTD_REDBOOT_PARTS=y |
| 737 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | 858 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 |
| 738 | CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y | 859 | CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y |
| @@ -752,6 +873,7 @@ CONFIG_MTD_BLOCK=y | |||
| 752 | # CONFIG_INFTL is not set | 873 | # CONFIG_INFTL is not set |
| 753 | # CONFIG_RFD_FTL is not set | 874 | # CONFIG_RFD_FTL is not set |
| 754 | # CONFIG_SSFDC is not set | 875 | # CONFIG_SSFDC is not set |
| 876 | # CONFIG_SM_FTL is not set | ||
| 755 | # CONFIG_MTD_OOPS is not set | 877 | # CONFIG_MTD_OOPS is not set |
| 756 | 878 | ||
| 757 | # | 879 | # |
| @@ -793,6 +915,7 @@ CONFIG_MTD_ROM=y | |||
| 793 | # | 915 | # |
| 794 | # CONFIG_MTD_DATAFLASH is not set | 916 | # CONFIG_MTD_DATAFLASH is not set |
| 795 | # CONFIG_MTD_M25P80 is not set | 917 | # CONFIG_MTD_M25P80 is not set |
| 918 | # CONFIG_MTD_SST25L is not set | ||
| 796 | # CONFIG_MTD_SLRAM is not set | 919 | # CONFIG_MTD_SLRAM is not set |
| 797 | # CONFIG_MTD_PHRAM is not set | 920 | # CONFIG_MTD_PHRAM is not set |
| 798 | # CONFIG_MTD_MTDRAM is not set | 921 | # CONFIG_MTD_MTDRAM is not set |
| @@ -805,9 +928,12 @@ CONFIG_MTD_ROM=y | |||
| 805 | # CONFIG_MTD_DOC2001 is not set | 928 | # CONFIG_MTD_DOC2001 is not set |
| 806 | # CONFIG_MTD_DOC2001PLUS is not set | 929 | # CONFIG_MTD_DOC2001PLUS is not set |
| 807 | CONFIG_MTD_NAND=y | 930 | CONFIG_MTD_NAND=y |
| 808 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | 931 | CONFIG_MTD_NAND_ECC=y |
| 809 | # CONFIG_MTD_NAND_ECC_SMC is not set | 932 | # CONFIG_MTD_NAND_ECC_SMC is not set |
| 933 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 934 | # CONFIG_MTD_SM_COMMON is not set | ||
| 810 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | 935 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set |
| 936 | CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018 | ||
| 811 | # CONFIG_MTD_NAND_GPIO is not set | 937 | # CONFIG_MTD_NAND_GPIO is not set |
| 812 | CONFIG_MTD_NAND_IDS=y | 938 | CONFIG_MTD_NAND_IDS=y |
| 813 | CONFIG_MTD_NAND_S3C2410=y | 939 | CONFIG_MTD_NAND_S3C2410=y |
| @@ -843,6 +969,10 @@ CONFIG_BLK_DEV=y | |||
| 843 | # CONFIG_BLK_DEV_COW_COMMON is not set | 969 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 844 | CONFIG_BLK_DEV_LOOP=y | 970 | CONFIG_BLK_DEV_LOOP=y |
| 845 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 971 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 972 | |||
| 973 | # | ||
| 974 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
| 975 | # | ||
| 846 | CONFIG_BLK_DEV_NBD=m | 976 | CONFIG_BLK_DEV_NBD=m |
| 847 | CONFIG_BLK_DEV_UB=m | 977 | CONFIG_BLK_DEV_UB=m |
| 848 | CONFIG_BLK_DEV_RAM=y | 978 | CONFIG_BLK_DEV_RAM=y |
| @@ -851,19 +981,26 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 | |||
| 851 | # CONFIG_BLK_DEV_XIP is not set | 981 | # CONFIG_BLK_DEV_XIP is not set |
| 852 | # CONFIG_CDROM_PKTCDVD is not set | 982 | # CONFIG_CDROM_PKTCDVD is not set |
| 853 | CONFIG_ATA_OVER_ETH=m | 983 | CONFIG_ATA_OVER_ETH=m |
| 984 | # CONFIG_MG_DISK is not set | ||
| 854 | CONFIG_MISC_DEVICES=y | 985 | CONFIG_MISC_DEVICES=y |
| 986 | # CONFIG_AD525X_DPOT is not set | ||
| 855 | # CONFIG_ICS932S401 is not set | 987 | # CONFIG_ICS932S401 is not set |
| 856 | # CONFIG_ENCLOSURE_SERVICES is not set | 988 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 857 | # CONFIG_ISL29003 is not set | 989 | # CONFIG_ISL29003 is not set |
| 990 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 991 | # CONFIG_DS1682 is not set | ||
| 992 | # CONFIG_TI_DAC7512 is not set | ||
| 858 | # CONFIG_C2PORT is not set | 993 | # CONFIG_C2PORT is not set |
| 859 | 994 | ||
| 860 | # | 995 | # |
| 861 | # EEPROM support | 996 | # EEPROM support |
| 862 | # | 997 | # |
| 863 | CONFIG_EEPROM_AT24=m | 998 | CONFIG_EEPROM_AT24=y |
| 864 | CONFIG_EEPROM_AT25=m | 999 | CONFIG_EEPROM_AT25=m |
| 865 | CONFIG_EEPROM_LEGACY=m | 1000 | CONFIG_EEPROM_LEGACY=m |
| 1001 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 866 | CONFIG_EEPROM_93CX6=m | 1002 | CONFIG_EEPROM_93CX6=m |
| 1003 | # CONFIG_IWMC3200TOP is not set | ||
| 867 | CONFIG_HAVE_IDE=y | 1004 | CONFIG_HAVE_IDE=y |
| 868 | CONFIG_IDE=y | 1005 | CONFIG_IDE=y |
| 869 | 1006 | ||
| @@ -890,6 +1027,7 @@ CONFIG_BLK_DEV_PLATFORM=y | |||
| 890 | # | 1027 | # |
| 891 | # SCSI device support | 1028 | # SCSI device support |
| 892 | # | 1029 | # |
| 1030 | CONFIG_SCSI_MOD=y | ||
| 893 | # CONFIG_RAID_ATTRS is not set | 1031 | # CONFIG_RAID_ATTRS is not set |
| 894 | CONFIG_SCSI=y | 1032 | CONFIG_SCSI=y |
| 895 | CONFIG_SCSI_DMA=y | 1033 | CONFIG_SCSI_DMA=y |
| @@ -907,10 +1045,6 @@ CONFIG_BLK_DEV_SR=m | |||
| 907 | CONFIG_BLK_DEV_SR_VENDOR=y | 1045 | CONFIG_BLK_DEV_SR_VENDOR=y |
| 908 | CONFIG_CHR_DEV_SG=y | 1046 | CONFIG_CHR_DEV_SG=y |
| 909 | CONFIG_CHR_DEV_SCH=m | 1047 | CONFIG_CHR_DEV_SCH=m |
| 910 | |||
| 911 | # | ||
| 912 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
| 913 | # | ||
| 914 | CONFIG_SCSI_MULTI_LUN=y | 1048 | CONFIG_SCSI_MULTI_LUN=y |
| 915 | CONFIG_SCSI_CONSTANTS=y | 1049 | CONFIG_SCSI_CONSTANTS=y |
| 916 | # CONFIG_SCSI_LOGGING is not set | 1050 | # CONFIG_SCSI_LOGGING is not set |
| @@ -951,7 +1085,6 @@ CONFIG_SCSI_LOWLEVEL=y | |||
| 951 | CONFIG_HAVE_PATA_PLATFORM=y | 1085 | CONFIG_HAVE_PATA_PLATFORM=y |
| 952 | # CONFIG_MD is not set | 1086 | # CONFIG_MD is not set |
| 953 | CONFIG_NETDEVICES=y | 1087 | CONFIG_NETDEVICES=y |
| 954 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
| 955 | # CONFIG_DUMMY is not set | 1088 | # CONFIG_DUMMY is not set |
| 956 | # CONFIG_BONDING is not set | 1089 | # CONFIG_BONDING is not set |
| 957 | # CONFIG_MACVLAN is not set | 1090 | # CONFIG_MACVLAN is not set |
| @@ -989,16 +1122,30 @@ CONFIG_DM9000_DEBUGLEVEL=4 | |||
| 989 | # CONFIG_NET_PCI is not set | 1122 | # CONFIG_NET_PCI is not set |
| 990 | # CONFIG_B44 is not set | 1123 | # CONFIG_B44 is not set |
| 991 | # CONFIG_CS89x0 is not set | 1124 | # CONFIG_CS89x0 is not set |
| 1125 | # CONFIG_KS8842 is not set | ||
| 1126 | # CONFIG_KS8851 is not set | ||
| 1127 | # CONFIG_KS8851_MLL is not set | ||
| 992 | # CONFIG_NET_POCKET is not set | 1128 | # CONFIG_NET_POCKET is not set |
| 993 | CONFIG_NETDEV_1000=y | 1129 | CONFIG_NETDEV_1000=y |
| 994 | CONFIG_NETDEV_10000=y | 1130 | CONFIG_NETDEV_10000=y |
| 995 | # CONFIG_TR is not set | 1131 | # CONFIG_TR is not set |
| 996 | 1132 | CONFIG_WLAN=y | |
| 997 | # | 1133 | # CONFIG_LIBERTAS_THINFIRM is not set |
| 998 | # Wireless LAN | 1134 | # CONFIG_AT76C50X_USB is not set |
| 999 | # | 1135 | # CONFIG_USB_ZD1201 is not set |
| 1000 | # CONFIG_WLAN_PRE80211 is not set | 1136 | # CONFIG_USB_NET_RNDIS_WLAN is not set |
| 1001 | # CONFIG_WLAN_80211 is not set | 1137 | # CONFIG_RTL8187 is not set |
| 1138 | # CONFIG_MAC80211_HWSIM is not set | ||
| 1139 | # CONFIG_ATH_COMMON is not set | ||
| 1140 | # CONFIG_B43 is not set | ||
| 1141 | # CONFIG_B43LEGACY is not set | ||
| 1142 | # CONFIG_HOSTAP is not set | ||
| 1143 | # CONFIG_IWM is not set | ||
| 1144 | # CONFIG_LIBERTAS is not set | ||
| 1145 | # CONFIG_P54_COMMON is not set | ||
| 1146 | # CONFIG_RT2X00 is not set | ||
| 1147 | # CONFIG_WL12XX is not set | ||
| 1148 | # CONFIG_ZD1211RW is not set | ||
| 1002 | 1149 | ||
| 1003 | # | 1150 | # |
| 1004 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 1151 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| @@ -1012,6 +1159,7 @@ CONFIG_NETDEV_10000=y | |||
| 1012 | # CONFIG_USB_PEGASUS is not set | 1159 | # CONFIG_USB_PEGASUS is not set |
| 1013 | # CONFIG_USB_RTL8150 is not set | 1160 | # CONFIG_USB_RTL8150 is not set |
| 1014 | # CONFIG_USB_USBNET is not set | 1161 | # CONFIG_USB_USBNET is not set |
| 1162 | # CONFIG_USB_IPHETH is not set | ||
| 1015 | # CONFIG_WAN is not set | 1163 | # CONFIG_WAN is not set |
| 1016 | # CONFIG_PLIP is not set | 1164 | # CONFIG_PLIP is not set |
| 1017 | # CONFIG_PPP is not set | 1165 | # CONFIG_PPP is not set |
| @@ -1020,6 +1168,7 @@ CONFIG_NETDEV_10000=y | |||
| 1020 | # CONFIG_NETPOLL is not set | 1168 | # CONFIG_NETPOLL is not set |
| 1021 | # CONFIG_NET_POLL_CONTROLLER is not set | 1169 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 1022 | # CONFIG_ISDN is not set | 1170 | # CONFIG_ISDN is not set |
| 1171 | # CONFIG_PHONE is not set | ||
| 1023 | 1172 | ||
| 1024 | # | 1173 | # |
| 1025 | # Input device support | 1174 | # Input device support |
| @@ -1027,6 +1176,7 @@ CONFIG_NETDEV_10000=y | |||
| 1027 | CONFIG_INPUT=y | 1176 | CONFIG_INPUT=y |
| 1028 | CONFIG_INPUT_FF_MEMLESS=m | 1177 | CONFIG_INPUT_FF_MEMLESS=m |
| 1029 | # CONFIG_INPUT_POLLDEV is not set | 1178 | # CONFIG_INPUT_POLLDEV is not set |
| 1179 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 1030 | 1180 | ||
| 1031 | # | 1181 | # |
| 1032 | # Userland interfaces | 1182 | # Userland interfaces |
| @@ -1043,13 +1193,20 @@ CONFIG_INPUT_EVDEV=y | |||
| 1043 | # Input Device Drivers | 1193 | # Input Device Drivers |
| 1044 | # | 1194 | # |
| 1045 | CONFIG_INPUT_KEYBOARD=y | 1195 | CONFIG_INPUT_KEYBOARD=y |
| 1196 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 1046 | CONFIG_KEYBOARD_ATKBD=y | 1197 | CONFIG_KEYBOARD_ATKBD=y |
| 1047 | # CONFIG_KEYBOARD_SUNKBD is not set | 1198 | # CONFIG_QT2160 is not set |
| 1048 | # CONFIG_KEYBOARD_LKKBD is not set | 1199 | # CONFIG_KEYBOARD_LKKBD is not set |
| 1049 | # CONFIG_KEYBOARD_XTKBD is not set | 1200 | # CONFIG_KEYBOARD_GPIO is not set |
| 1201 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 1202 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 1203 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 1204 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 1050 | # CONFIG_KEYBOARD_NEWTON is not set | 1205 | # CONFIG_KEYBOARD_NEWTON is not set |
| 1206 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 1051 | # CONFIG_KEYBOARD_STOWAWAY is not set | 1207 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 1052 | # CONFIG_KEYBOARD_GPIO is not set | 1208 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 1209 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 1053 | CONFIG_INPUT_MOUSE=y | 1210 | CONFIG_INPUT_MOUSE=y |
| 1054 | CONFIG_MOUSE_PS2=y | 1211 | CONFIG_MOUSE_PS2=y |
| 1055 | CONFIG_MOUSE_PS2_ALPS=y | 1212 | CONFIG_MOUSE_PS2_ALPS=y |
| @@ -1057,6 +1214,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y | |||
| 1057 | CONFIG_MOUSE_PS2_SYNAPTICS=y | 1214 | CONFIG_MOUSE_PS2_SYNAPTICS=y |
| 1058 | CONFIG_MOUSE_PS2_TRACKPOINT=y | 1215 | CONFIG_MOUSE_PS2_TRACKPOINT=y |
| 1059 | # CONFIG_MOUSE_PS2_ELANTECH is not set | 1216 | # CONFIG_MOUSE_PS2_ELANTECH is not set |
| 1217 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
| 1060 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | 1218 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set |
| 1061 | # CONFIG_MOUSE_SERIAL is not set | 1219 | # CONFIG_MOUSE_SERIAL is not set |
| 1062 | CONFIG_MOUSE_APPLETOUCH=m | 1220 | CONFIG_MOUSE_APPLETOUCH=m |
| @@ -1066,6 +1224,7 @@ CONFIG_MOUSE_BCM5974=m | |||
| 1066 | # CONFIG_MOUSE_PC110PAD is not set | 1224 | # CONFIG_MOUSE_PC110PAD is not set |
| 1067 | # CONFIG_MOUSE_VSXXXAA is not set | 1225 | # CONFIG_MOUSE_VSXXXAA is not set |
| 1068 | # CONFIG_MOUSE_GPIO is not set | 1226 | # CONFIG_MOUSE_GPIO is not set |
| 1227 | # CONFIG_MOUSE_SYNAPTICS_I2C is not set | ||
| 1069 | CONFIG_INPUT_JOYSTICK=y | 1228 | CONFIG_INPUT_JOYSTICK=y |
| 1070 | CONFIG_JOYSTICK_ANALOG=m | 1229 | CONFIG_JOYSTICK_ANALOG=m |
| 1071 | CONFIG_JOYSTICK_A3D=m | 1230 | CONFIG_JOYSTICK_A3D=m |
| @@ -1102,10 +1261,15 @@ CONFIG_INPUT_TOUCHSCREEN=y | |||
| 1102 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | 1261 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set |
| 1103 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set | 1262 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set |
| 1104 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 1263 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 1264 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | ||
| 1265 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 1266 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 1105 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 1267 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 1268 | # CONFIG_TOUCHSCREEN_S3C2410 is not set | ||
| 1106 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 1269 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 1107 | # CONFIG_TOUCHSCREEN_ELO is not set | 1270 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 1108 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | 1271 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set |
| 1272 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 1109 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | 1273 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
| 1110 | # CONFIG_TOUCHSCREEN_INEXIO is not set | 1274 | # CONFIG_TOUCHSCREEN_INEXIO is not set |
| 1111 | # CONFIG_TOUCHSCREEN_MK712 is not set | 1275 | # CONFIG_TOUCHSCREEN_MK712 is not set |
| @@ -1126,9 +1290,16 @@ CONFIG_TOUCHSCREEN_USB_IRTOUCH=y | |||
| 1126 | CONFIG_TOUCHSCREEN_USB_IDEALTEK=y | 1290 | CONFIG_TOUCHSCREEN_USB_IDEALTEK=y |
| 1127 | CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y | 1291 | CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y |
| 1128 | CONFIG_TOUCHSCREEN_USB_GOTOP=y | 1292 | CONFIG_TOUCHSCREEN_USB_GOTOP=y |
| 1293 | CONFIG_TOUCHSCREEN_USB_JASTEC=y | ||
| 1294 | CONFIG_TOUCHSCREEN_USB_E2I=y | ||
| 1295 | CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y | ||
| 1296 | CONFIG_TOUCHSCREEN_USB_ETT_TC5UH=y | ||
| 1297 | CONFIG_TOUCHSCREEN_USB_NEXIO=y | ||
| 1129 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | 1298 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
| 1130 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | 1299 | # CONFIG_TOUCHSCREEN_TSC2007 is not set |
| 1300 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 1131 | CONFIG_INPUT_MISC=y | 1301 | CONFIG_INPUT_MISC=y |
| 1302 | # CONFIG_INPUT_AD714X is not set | ||
| 1132 | CONFIG_INPUT_ATI_REMOTE=m | 1303 | CONFIG_INPUT_ATI_REMOTE=m |
| 1133 | CONFIG_INPUT_ATI_REMOTE2=m | 1304 | CONFIG_INPUT_ATI_REMOTE2=m |
| 1134 | CONFIG_INPUT_KEYSPAN_REMOTE=m | 1305 | CONFIG_INPUT_KEYSPAN_REMOTE=m |
| @@ -1136,6 +1307,8 @@ CONFIG_INPUT_POWERMATE=m | |||
| 1136 | CONFIG_INPUT_YEALINK=m | 1307 | CONFIG_INPUT_YEALINK=m |
| 1137 | CONFIG_INPUT_CM109=m | 1308 | CONFIG_INPUT_CM109=m |
| 1138 | CONFIG_INPUT_UINPUT=m | 1309 | CONFIG_INPUT_UINPUT=m |
| 1310 | # CONFIG_INPUT_PCF50633_PMU is not set | ||
| 1311 | # CONFIG_INPUT_PCF8574 is not set | ||
| 1139 | CONFIG_INPUT_GPIO_ROTARY_ENCODER=m | 1312 | CONFIG_INPUT_GPIO_ROTARY_ENCODER=m |
| 1140 | 1313 | ||
| 1141 | # | 1314 | # |
| @@ -1146,6 +1319,7 @@ CONFIG_SERIO_SERPORT=y | |||
| 1146 | # CONFIG_SERIO_PARKBD is not set | 1319 | # CONFIG_SERIO_PARKBD is not set |
| 1147 | CONFIG_SERIO_LIBPS2=y | 1320 | CONFIG_SERIO_LIBPS2=y |
| 1148 | # CONFIG_SERIO_RAW is not set | 1321 | # CONFIG_SERIO_RAW is not set |
| 1322 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
| 1149 | CONFIG_GAMEPORT=m | 1323 | CONFIG_GAMEPORT=m |
| 1150 | # CONFIG_GAMEPORT_NS558 is not set | 1324 | # CONFIG_GAMEPORT_NS558 is not set |
| 1151 | # CONFIG_GAMEPORT_L4 is not set | 1325 | # CONFIG_GAMEPORT_L4 is not set |
| @@ -1167,10 +1341,9 @@ CONFIG_SERIAL_NONSTANDARD=y | |||
| 1167 | # CONFIG_MOXA_INTELLIO is not set | 1341 | # CONFIG_MOXA_INTELLIO is not set |
| 1168 | # CONFIG_MOXA_SMARTIO is not set | 1342 | # CONFIG_MOXA_SMARTIO is not set |
| 1169 | # CONFIG_N_HDLC is not set | 1343 | # CONFIG_N_HDLC is not set |
| 1344 | # CONFIG_N_GSM is not set | ||
| 1170 | # CONFIG_RISCOM8 is not set | 1345 | # CONFIG_RISCOM8 is not set |
| 1171 | # CONFIG_SPECIALIX is not set | 1346 | # CONFIG_SPECIALIX is not set |
| 1172 | # CONFIG_SX is not set | ||
| 1173 | # CONFIG_RIO is not set | ||
| 1174 | # CONFIG_STALDRV is not set | 1347 | # CONFIG_STALDRV is not set |
| 1175 | 1348 | ||
| 1176 | # | 1349 | # |
| @@ -1195,6 +1368,7 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y | |||
| 1195 | # Non-8250 serial port support | 1368 | # Non-8250 serial port support |
| 1196 | # | 1369 | # |
| 1197 | CONFIG_SERIAL_SAMSUNG=y | 1370 | CONFIG_SERIAL_SAMSUNG=y |
| 1371 | CONFIG_SERIAL_SAMSUNG_UARTS_4=y | ||
| 1198 | CONFIG_SERIAL_SAMSUNG_UARTS=4 | 1372 | CONFIG_SERIAL_SAMSUNG_UARTS=4 |
| 1199 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set | 1373 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set |
| 1200 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | 1374 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
| @@ -1204,6 +1378,9 @@ CONFIG_SERIAL_S3C2440=y | |||
| 1204 | # CONFIG_SERIAL_MAX3100 is not set | 1378 | # CONFIG_SERIAL_MAX3100 is not set |
| 1205 | CONFIG_SERIAL_CORE=y | 1379 | CONFIG_SERIAL_CORE=y |
| 1206 | CONFIG_SERIAL_CORE_CONSOLE=y | 1380 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 1381 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 1382 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 1383 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 1207 | CONFIG_UNIX98_PTYS=y | 1384 | CONFIG_UNIX98_PTYS=y |
| 1208 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 1385 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 1209 | CONFIG_LEGACY_PTYS=y | 1386 | CONFIG_LEGACY_PTYS=y |
| @@ -1221,6 +1398,7 @@ CONFIG_HW_RANDOM=y | |||
| 1221 | CONFIG_DEVPORT=y | 1398 | CONFIG_DEVPORT=y |
| 1222 | CONFIG_I2C=y | 1399 | CONFIG_I2C=y |
| 1223 | CONFIG_I2C_BOARDINFO=y | 1400 | CONFIG_I2C_BOARDINFO=y |
| 1401 | CONFIG_I2C_COMPAT=y | ||
| 1224 | CONFIG_I2C_CHARDEV=m | 1402 | CONFIG_I2C_CHARDEV=m |
| 1225 | CONFIG_I2C_HELPER_AUTO=y | 1403 | CONFIG_I2C_HELPER_AUTO=y |
| 1226 | CONFIG_I2C_ALGOBIT=y | 1404 | CONFIG_I2C_ALGOBIT=y |
| @@ -1232,10 +1410,12 @@ CONFIG_I2C_ALGOBIT=y | |||
| 1232 | # | 1410 | # |
| 1233 | # I2C system bus drivers (mostly embedded / system-on-chip) | 1411 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 1234 | # | 1412 | # |
| 1413 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 1235 | # CONFIG_I2C_GPIO is not set | 1414 | # CONFIG_I2C_GPIO is not set |
| 1236 | # CONFIG_I2C_OCORES is not set | 1415 | # CONFIG_I2C_OCORES is not set |
| 1237 | CONFIG_I2C_S3C2410=y | 1416 | CONFIG_I2C_S3C2410=y |
| 1238 | CONFIG_I2C_SIMTEC=y | 1417 | CONFIG_I2C_SIMTEC=y |
| 1418 | # CONFIG_I2C_XILINX is not set | ||
| 1239 | 1419 | ||
| 1240 | # | 1420 | # |
| 1241 | # External I2C/SMBus adapter drivers | 1421 | # External I2C/SMBus adapter drivers |
| @@ -1252,20 +1432,9 @@ CONFIG_I2C_SIMTEC=y | |||
| 1252 | # CONFIG_I2C_PCA_ISA is not set | 1432 | # CONFIG_I2C_PCA_ISA is not set |
| 1253 | # CONFIG_I2C_PCA_PLATFORM is not set | 1433 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 1254 | # CONFIG_I2C_STUB is not set | 1434 | # CONFIG_I2C_STUB is not set |
| 1255 | |||
| 1256 | # | ||
| 1257 | # Miscellaneous I2C Chip support | ||
| 1258 | # | ||
| 1259 | # CONFIG_DS1682 is not set | ||
| 1260 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 1261 | # CONFIG_PCF8575 is not set | ||
| 1262 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 1263 | # CONFIG_SENSORS_MAX6875 is not set | ||
| 1264 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 1265 | # CONFIG_I2C_DEBUG_CORE is not set | 1435 | # CONFIG_I2C_DEBUG_CORE is not set |
| 1266 | # CONFIG_I2C_DEBUG_ALGO is not set | 1436 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 1267 | # CONFIG_I2C_DEBUG_BUS is not set | 1437 | # CONFIG_I2C_DEBUG_BUS is not set |
| 1268 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 1269 | CONFIG_SPI=y | 1438 | CONFIG_SPI=y |
| 1270 | # CONFIG_SPI_DEBUG is not set | 1439 | # CONFIG_SPI_DEBUG is not set |
| 1271 | CONFIG_SPI_MASTER=y | 1440 | CONFIG_SPI_MASTER=y |
| @@ -1278,13 +1447,21 @@ CONFIG_SPI_BITBANG=m | |||
| 1278 | CONFIG_SPI_GPIO=m | 1447 | CONFIG_SPI_GPIO=m |
| 1279 | # CONFIG_SPI_LM70_LLP is not set | 1448 | # CONFIG_SPI_LM70_LLP is not set |
| 1280 | CONFIG_SPI_S3C24XX=m | 1449 | CONFIG_SPI_S3C24XX=m |
| 1450 | # CONFIG_SPI_S3C24XX_FIQ is not set | ||
| 1281 | CONFIG_SPI_S3C24XX_GPIO=m | 1451 | CONFIG_SPI_S3C24XX_GPIO=m |
| 1452 | # CONFIG_SPI_XILINX is not set | ||
| 1453 | # CONFIG_SPI_DESIGNWARE is not set | ||
| 1282 | 1454 | ||
| 1283 | # | 1455 | # |
| 1284 | # SPI Protocol Masters | 1456 | # SPI Protocol Masters |
| 1285 | # | 1457 | # |
| 1286 | CONFIG_SPI_SPIDEV=m | 1458 | CONFIG_SPI_SPIDEV=m |
| 1287 | CONFIG_SPI_TLE62X0=m | 1459 | CONFIG_SPI_TLE62X0=m |
| 1460 | |||
| 1461 | # | ||
| 1462 | # PPS support | ||
| 1463 | # | ||
| 1464 | # CONFIG_PPS is not set | ||
| 1288 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 1465 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 1289 | CONFIG_GPIOLIB=y | 1466 | CONFIG_GPIOLIB=y |
| 1290 | # CONFIG_DEBUG_GPIO is not set | 1467 | # CONFIG_DEBUG_GPIO is not set |
| @@ -1293,13 +1470,16 @@ CONFIG_GPIOLIB=y | |||
| 1293 | # | 1470 | # |
| 1294 | # Memory mapped GPIO expanders: | 1471 | # Memory mapped GPIO expanders: |
| 1295 | # | 1472 | # |
| 1473 | # CONFIG_GPIO_IT8761E is not set | ||
| 1296 | 1474 | ||
| 1297 | # | 1475 | # |
| 1298 | # I2C GPIO expanders: | 1476 | # I2C GPIO expanders: |
| 1299 | # | 1477 | # |
| 1478 | # CONFIG_GPIO_MAX7300 is not set | ||
| 1300 | # CONFIG_GPIO_MAX732X is not set | 1479 | # CONFIG_GPIO_MAX732X is not set |
| 1301 | # CONFIG_GPIO_PCA953X is not set | 1480 | # CONFIG_GPIO_PCA953X is not set |
| 1302 | # CONFIG_GPIO_PCF857X is not set | 1481 | # CONFIG_GPIO_PCF857X is not set |
| 1482 | # CONFIG_GPIO_ADP5588 is not set | ||
| 1303 | 1483 | ||
| 1304 | # | 1484 | # |
| 1305 | # PCI GPIO expanders: | 1485 | # PCI GPIO expanders: |
| @@ -1310,10 +1490,29 @@ CONFIG_GPIOLIB=y | |||
| 1310 | # | 1490 | # |
| 1311 | # CONFIG_GPIO_MAX7301 is not set | 1491 | # CONFIG_GPIO_MAX7301 is not set |
| 1312 | # CONFIG_GPIO_MCP23S08 is not set | 1492 | # CONFIG_GPIO_MCP23S08 is not set |
| 1493 | # CONFIG_GPIO_MC33880 is not set | ||
| 1494 | |||
| 1495 | # | ||
| 1496 | # AC97 GPIO expanders: | ||
| 1497 | # | ||
| 1313 | # CONFIG_W1 is not set | 1498 | # CONFIG_W1 is not set |
| 1314 | # CONFIG_POWER_SUPPLY is not set | 1499 | CONFIG_POWER_SUPPLY=y |
| 1500 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 1501 | # CONFIG_PDA_POWER is not set | ||
| 1502 | # CONFIG_APM_POWER is not set | ||
| 1503 | # CONFIG_TEST_POWER is not set | ||
| 1504 | # CONFIG_BATTERY_DS2760 is not set | ||
| 1505 | # CONFIG_BATTERY_DS2782 is not set | ||
| 1506 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 1507 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 1508 | # CONFIG_CHARGER_PCF50633 is not set | ||
| 1315 | CONFIG_HWMON=y | 1509 | CONFIG_HWMON=y |
| 1316 | CONFIG_HWMON_VID=m | 1510 | CONFIG_HWMON_VID=m |
| 1511 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 1512 | |||
| 1513 | # | ||
| 1514 | # Native drivers | ||
| 1515 | # | ||
| 1317 | # CONFIG_SENSORS_AD7414 is not set | 1516 | # CONFIG_SENSORS_AD7414 is not set |
| 1318 | # CONFIG_SENSORS_AD7418 is not set | 1517 | # CONFIG_SENSORS_AD7418 is not set |
| 1319 | # CONFIG_SENSORS_ADCXX is not set | 1518 | # CONFIG_SENSORS_ADCXX is not set |
| @@ -1323,10 +1522,11 @@ CONFIG_HWMON_VID=m | |||
| 1323 | # CONFIG_SENSORS_ADM1029 is not set | 1522 | # CONFIG_SENSORS_ADM1029 is not set |
| 1324 | # CONFIG_SENSORS_ADM1031 is not set | 1523 | # CONFIG_SENSORS_ADM1031 is not set |
| 1325 | # CONFIG_SENSORS_ADM9240 is not set | 1524 | # CONFIG_SENSORS_ADM9240 is not set |
| 1525 | # CONFIG_SENSORS_ADT7411 is not set | ||
| 1326 | # CONFIG_SENSORS_ADT7462 is not set | 1526 | # CONFIG_SENSORS_ADT7462 is not set |
| 1327 | # CONFIG_SENSORS_ADT7470 is not set | 1527 | # CONFIG_SENSORS_ADT7470 is not set |
| 1328 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 1329 | # CONFIG_SENSORS_ADT7475 is not set | 1528 | # CONFIG_SENSORS_ADT7475 is not set |
| 1529 | # CONFIG_SENSORS_ASC7621 is not set | ||
| 1330 | # CONFIG_SENSORS_ATXP1 is not set | 1530 | # CONFIG_SENSORS_ATXP1 is not set |
| 1331 | # CONFIG_SENSORS_DS1621 is not set | 1531 | # CONFIG_SENSORS_DS1621 is not set |
| 1332 | # CONFIG_SENSORS_F71805F is not set | 1532 | # CONFIG_SENSORS_F71805F is not set |
| @@ -1338,6 +1538,7 @@ CONFIG_HWMON_VID=m | |||
| 1338 | # CONFIG_SENSORS_IT87 is not set | 1538 | # CONFIG_SENSORS_IT87 is not set |
| 1339 | # CONFIG_SENSORS_LM63 is not set | 1539 | # CONFIG_SENSORS_LM63 is not set |
| 1340 | # CONFIG_SENSORS_LM70 is not set | 1540 | # CONFIG_SENSORS_LM70 is not set |
| 1541 | # CONFIG_SENSORS_LM73 is not set | ||
| 1341 | CONFIG_SENSORS_LM75=m | 1542 | CONFIG_SENSORS_LM75=m |
| 1342 | # CONFIG_SENSORS_LM77 is not set | 1543 | # CONFIG_SENSORS_LM77 is not set |
| 1343 | CONFIG_SENSORS_LM78=m | 1544 | CONFIG_SENSORS_LM78=m |
| @@ -1358,12 +1559,17 @@ CONFIG_SENSORS_LM85=m | |||
| 1358 | # CONFIG_SENSORS_PC87427 is not set | 1559 | # CONFIG_SENSORS_PC87427 is not set |
| 1359 | # CONFIG_SENSORS_PCF8591 is not set | 1560 | # CONFIG_SENSORS_PCF8591 is not set |
| 1360 | # CONFIG_SENSORS_SHT15 is not set | 1561 | # CONFIG_SENSORS_SHT15 is not set |
| 1562 | # CONFIG_SENSORS_S3C is not set | ||
| 1361 | # CONFIG_SENSORS_DME1737 is not set | 1563 | # CONFIG_SENSORS_DME1737 is not set |
| 1362 | # CONFIG_SENSORS_SMSC47M1 is not set | 1564 | # CONFIG_SENSORS_SMSC47M1 is not set |
| 1363 | # CONFIG_SENSORS_SMSC47M192 is not set | 1565 | # CONFIG_SENSORS_SMSC47M192 is not set |
| 1364 | # CONFIG_SENSORS_SMSC47B397 is not set | 1566 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 1365 | # CONFIG_SENSORS_ADS7828 is not set | 1567 | # CONFIG_SENSORS_ADS7828 is not set |
| 1568 | # CONFIG_SENSORS_ADS7871 is not set | ||
| 1569 | # CONFIG_SENSORS_AMC6821 is not set | ||
| 1366 | # CONFIG_SENSORS_THMC50 is not set | 1570 | # CONFIG_SENSORS_THMC50 is not set |
| 1571 | # CONFIG_SENSORS_TMP401 is not set | ||
| 1572 | # CONFIG_SENSORS_TMP421 is not set | ||
| 1367 | # CONFIG_SENSORS_VT1211 is not set | 1573 | # CONFIG_SENSORS_VT1211 is not set |
| 1368 | # CONFIG_SENSORS_W83781D is not set | 1574 | # CONFIG_SENSORS_W83781D is not set |
| 1369 | # CONFIG_SENSORS_W83791D is not set | 1575 | # CONFIG_SENSORS_W83791D is not set |
| @@ -1374,9 +1580,8 @@ CONFIG_SENSORS_LM85=m | |||
| 1374 | # CONFIG_SENSORS_W83627HF is not set | 1580 | # CONFIG_SENSORS_W83627HF is not set |
| 1375 | # CONFIG_SENSORS_W83627EHF is not set | 1581 | # CONFIG_SENSORS_W83627EHF is not set |
| 1376 | # CONFIG_SENSORS_LIS3_SPI is not set | 1582 | # CONFIG_SENSORS_LIS3_SPI is not set |
| 1377 | # CONFIG_HWMON_DEBUG_CHIP is not set | 1583 | # CONFIG_SENSORS_LIS3_I2C is not set |
| 1378 | # CONFIG_THERMAL is not set | 1584 | # CONFIG_THERMAL is not set |
| 1379 | # CONFIG_THERMAL_HWMON is not set | ||
| 1380 | CONFIG_WATCHDOG=y | 1585 | CONFIG_WATCHDOG=y |
| 1381 | # CONFIG_WATCHDOG_NOWAYOUT is not set | 1586 | # CONFIG_WATCHDOG_NOWAYOUT is not set |
| 1382 | 1587 | ||
| @@ -1385,6 +1590,7 @@ CONFIG_WATCHDOG=y | |||
| 1385 | # | 1590 | # |
| 1386 | # CONFIG_SOFT_WATCHDOG is not set | 1591 | # CONFIG_SOFT_WATCHDOG is not set |
| 1387 | CONFIG_S3C2410_WATCHDOG=y | 1592 | CONFIG_S3C2410_WATCHDOG=y |
| 1593 | # CONFIG_MAX63XX_WATCHDOG is not set | ||
| 1388 | 1594 | ||
| 1389 | # | 1595 | # |
| 1390 | # ISA-based Watchdog Cards | 1596 | # ISA-based Watchdog Cards |
| @@ -1408,213 +1614,36 @@ CONFIG_SSB_POSSIBLE=y | |||
| 1408 | # Multifunction device drivers | 1614 | # Multifunction device drivers |
| 1409 | # | 1615 | # |
| 1410 | # CONFIG_MFD_CORE is not set | 1616 | # CONFIG_MFD_CORE is not set |
| 1617 | # CONFIG_MFD_88PM860X is not set | ||
| 1411 | CONFIG_MFD_SM501=y | 1618 | CONFIG_MFD_SM501=y |
| 1412 | # CONFIG_MFD_SM501_GPIO is not set | 1619 | # CONFIG_MFD_SM501_GPIO is not set |
| 1413 | # CONFIG_MFD_ASIC3 is not set | 1620 | # CONFIG_MFD_ASIC3 is not set |
| 1414 | # CONFIG_HTC_EGPIO is not set | 1621 | # CONFIG_HTC_EGPIO is not set |
| 1415 | # CONFIG_HTC_PASIC3 is not set | 1622 | # CONFIG_HTC_PASIC3 is not set |
| 1623 | # CONFIG_HTC_I2CPLD is not set | ||
| 1416 | # CONFIG_UCB1400_CORE is not set | 1624 | # CONFIG_UCB1400_CORE is not set |
| 1417 | # CONFIG_TPS65010 is not set | 1625 | CONFIG_TPS65010=m |
| 1418 | # CONFIG_TWL4030_CORE is not set | 1626 | # CONFIG_TWL4030_CORE is not set |
| 1419 | # CONFIG_MFD_TMIO is not set | 1627 | # CONFIG_MFD_TMIO is not set |
| 1420 | # CONFIG_MFD_T7L66XB is not set | 1628 | # CONFIG_MFD_T7L66XB is not set |
| 1421 | # CONFIG_MFD_TC6387XB is not set | 1629 | # CONFIG_MFD_TC6387XB is not set |
| 1422 | # CONFIG_MFD_TC6393XB is not set | 1630 | # CONFIG_MFD_TC6393XB is not set |
| 1423 | # CONFIG_PMIC_DA903X is not set | 1631 | # CONFIG_PMIC_DA903X is not set |
| 1632 | # CONFIG_PMIC_ADP5520 is not set | ||
| 1633 | # CONFIG_MFD_MAX8925 is not set | ||
| 1424 | # CONFIG_MFD_WM8400 is not set | 1634 | # CONFIG_MFD_WM8400 is not set |
| 1635 | # CONFIG_MFD_WM831X is not set | ||
| 1425 | # CONFIG_MFD_WM8350_I2C is not set | 1636 | # CONFIG_MFD_WM8350_I2C is not set |
| 1426 | # CONFIG_MFD_PCF50633 is not set | 1637 | # CONFIG_MFD_WM8994 is not set |
| 1427 | 1638 | CONFIG_MFD_PCF50633=y | |
| 1428 | # | 1639 | # CONFIG_MFD_MC13783 is not set |
| 1429 | # Multimedia devices | 1640 | # CONFIG_PCF50633_ADC is not set |
| 1430 | # | 1641 | CONFIG_PCF50633_GPIO=y |
| 1431 | 1642 | # CONFIG_AB3100_CORE is not set | |
| 1432 | # | 1643 | # CONFIG_EZX_PCAP is not set |
| 1433 | # Multimedia core support | 1644 | # CONFIG_AB4500_CORE is not set |
| 1434 | # | 1645 | # CONFIG_REGULATOR is not set |
| 1435 | CONFIG_VIDEO_DEV=m | 1646 | # CONFIG_MEDIA_SUPPORT is not set |
| 1436 | CONFIG_VIDEO_V4L2_COMMON=m | ||
| 1437 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
| 1438 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
| 1439 | CONFIG_DVB_CORE=m | ||
| 1440 | CONFIG_VIDEO_MEDIA=m | ||
| 1441 | |||
| 1442 | # | ||
| 1443 | # Multimedia drivers | ||
| 1444 | # | ||
| 1445 | CONFIG_MEDIA_ATTACH=y | ||
| 1446 | CONFIG_MEDIA_TUNER=m | ||
| 1447 | # CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
| 1448 | CONFIG_MEDIA_TUNER_SIMPLE=m | ||
| 1449 | CONFIG_MEDIA_TUNER_TDA8290=m | ||
| 1450 | CONFIG_MEDIA_TUNER_TDA827X=m | ||
| 1451 | CONFIG_MEDIA_TUNER_TDA18271=m | ||
| 1452 | CONFIG_MEDIA_TUNER_TDA9887=m | ||
| 1453 | CONFIG_MEDIA_TUNER_TEA5761=m | ||
| 1454 | CONFIG_MEDIA_TUNER_TEA5767=m | ||
| 1455 | CONFIG_MEDIA_TUNER_MT20XX=m | ||
| 1456 | CONFIG_MEDIA_TUNER_MT2060=m | ||
| 1457 | CONFIG_MEDIA_TUNER_MT2266=m | ||
| 1458 | CONFIG_MEDIA_TUNER_QT1010=m | ||
| 1459 | CONFIG_MEDIA_TUNER_XC2028=m | ||
| 1460 | CONFIG_MEDIA_TUNER_XC5000=m | ||
| 1461 | CONFIG_MEDIA_TUNER_MXL5005S=m | ||
| 1462 | CONFIG_MEDIA_TUNER_MXL5007T=m | ||
| 1463 | CONFIG_MEDIA_TUNER_MC44S803=m | ||
| 1464 | CONFIG_VIDEO_V4L2=m | ||
| 1465 | CONFIG_VIDEO_V4L1=m | ||
| 1466 | CONFIG_VIDEOBUF_GEN=m | ||
| 1467 | CONFIG_VIDEOBUF_VMALLOC=m | ||
| 1468 | CONFIG_VIDEO_TVEEPROM=m | ||
| 1469 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 1470 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 1471 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 1472 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
| 1473 | CONFIG_VIDEO_VIVI=m | ||
| 1474 | CONFIG_VIDEO_PMS=m | ||
| 1475 | CONFIG_VIDEO_BWQCAM=m | ||
| 1476 | CONFIG_VIDEO_CQCAM=m | ||
| 1477 | CONFIG_VIDEO_W9966=m | ||
| 1478 | CONFIG_VIDEO_CPIA=m | ||
| 1479 | CONFIG_VIDEO_CPIA_PP=m | ||
| 1480 | CONFIG_VIDEO_CPIA_USB=m | ||
| 1481 | CONFIG_VIDEO_CPIA2=m | ||
| 1482 | CONFIG_VIDEO_SAA5246A=m | ||
| 1483 | CONFIG_VIDEO_SAA5249=m | ||
| 1484 | CONFIG_VIDEO_AU0828=m | ||
| 1485 | # CONFIG_SOC_CAMERA is not set | ||
| 1486 | CONFIG_V4L_USB_DRIVERS=y | ||
| 1487 | # CONFIG_USB_VIDEO_CLASS is not set | ||
| 1488 | CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | ||
| 1489 | CONFIG_USB_GSPCA=m | ||
| 1490 | # CONFIG_USB_M5602 is not set | ||
| 1491 | # CONFIG_USB_STV06XX is not set | ||
| 1492 | # CONFIG_USB_GSPCA_CONEX is not set | ||
| 1493 | # CONFIG_USB_GSPCA_ETOMS is not set | ||
| 1494 | # CONFIG_USB_GSPCA_FINEPIX is not set | ||
| 1495 | # CONFIG_USB_GSPCA_MARS is not set | ||
| 1496 | # CONFIG_USB_GSPCA_MR97310A is not set | ||
| 1497 | # CONFIG_USB_GSPCA_OV519 is not set | ||
| 1498 | # CONFIG_USB_GSPCA_OV534 is not set | ||
| 1499 | # CONFIG_USB_GSPCA_PAC207 is not set | ||
| 1500 | # CONFIG_USB_GSPCA_PAC7311 is not set | ||
| 1501 | # CONFIG_USB_GSPCA_SONIXB is not set | ||
| 1502 | # CONFIG_USB_GSPCA_SONIXJ is not set | ||
| 1503 | # CONFIG_USB_GSPCA_SPCA500 is not set | ||
| 1504 | # CONFIG_USB_GSPCA_SPCA501 is not set | ||
| 1505 | # CONFIG_USB_GSPCA_SPCA505 is not set | ||
| 1506 | # CONFIG_USB_GSPCA_SPCA506 is not set | ||
| 1507 | # CONFIG_USB_GSPCA_SPCA508 is not set | ||
| 1508 | # CONFIG_USB_GSPCA_SPCA561 is not set | ||
| 1509 | # CONFIG_USB_GSPCA_SQ905 is not set | ||
| 1510 | # CONFIG_USB_GSPCA_SQ905C is not set | ||
| 1511 | # CONFIG_USB_GSPCA_STK014 is not set | ||
| 1512 | # CONFIG_USB_GSPCA_SUNPLUS is not set | ||
| 1513 | # CONFIG_USB_GSPCA_T613 is not set | ||
| 1514 | # CONFIG_USB_GSPCA_TV8532 is not set | ||
| 1515 | # CONFIG_USB_GSPCA_VC032X is not set | ||
| 1516 | # CONFIG_USB_GSPCA_ZC3XX is not set | ||
| 1517 | # CONFIG_VIDEO_PVRUSB2 is not set | ||
| 1518 | # CONFIG_VIDEO_HDPVR is not set | ||
| 1519 | # CONFIG_VIDEO_EM28XX is not set | ||
| 1520 | # CONFIG_VIDEO_CX231XX is not set | ||
| 1521 | # CONFIG_VIDEO_USBVISION is not set | ||
| 1522 | # CONFIG_USB_VICAM is not set | ||
| 1523 | # CONFIG_USB_IBMCAM is not set | ||
| 1524 | # CONFIG_USB_KONICAWC is not set | ||
| 1525 | # CONFIG_USB_QUICKCAM_MESSENGER is not set | ||
| 1526 | # CONFIG_USB_ET61X251 is not set | ||
| 1527 | # CONFIG_VIDEO_OVCAMCHIP is not set | ||
| 1528 | # CONFIG_USB_OV511 is not set | ||
| 1529 | # CONFIG_USB_SE401 is not set | ||
| 1530 | # CONFIG_USB_SN9C102 is not set | ||
| 1531 | # CONFIG_USB_STV680 is not set | ||
| 1532 | # CONFIG_USB_ZC0301 is not set | ||
| 1533 | # CONFIG_USB_PWC is not set | ||
| 1534 | CONFIG_USB_PWC_INPUT_EVDEV=y | ||
| 1535 | # CONFIG_USB_ZR364XX is not set | ||
| 1536 | # CONFIG_USB_STKWEBCAM is not set | ||
| 1537 | # CONFIG_USB_S2255 is not set | ||
| 1538 | CONFIG_RADIO_ADAPTERS=y | ||
| 1539 | CONFIG_RADIO_CADET=m | ||
| 1540 | CONFIG_RADIO_RTRACK=m | ||
| 1541 | CONFIG_RADIO_RTRACK2=m | ||
| 1542 | CONFIG_RADIO_AZTECH=m | ||
| 1543 | CONFIG_RADIO_GEMTEK=m | ||
| 1544 | CONFIG_RADIO_SF16FMI=m | ||
| 1545 | CONFIG_RADIO_SF16FMR2=m | ||
| 1546 | CONFIG_RADIO_TERRATEC=m | ||
| 1547 | CONFIG_RADIO_TRUST=m | ||
| 1548 | CONFIG_RADIO_TYPHOON=m | ||
| 1549 | CONFIG_RADIO_TYPHOON_PROC_FS=y | ||
| 1550 | CONFIG_RADIO_ZOLTRIX=m | ||
| 1551 | CONFIG_USB_DSBR=m | ||
| 1552 | CONFIG_USB_SI470X=m | ||
| 1553 | CONFIG_USB_MR800=m | ||
| 1554 | CONFIG_RADIO_TEA5764=m | ||
| 1555 | CONFIG_DVB_DYNAMIC_MINORS=y | ||
| 1556 | CONFIG_DVB_CAPTURE_DRIVERS=y | ||
| 1557 | # CONFIG_TTPCI_EEPROM is not set | ||
| 1558 | |||
| 1559 | # | ||
| 1560 | # Supported USB Adapters | ||
| 1561 | # | ||
| 1562 | CONFIG_DVB_USB=m | ||
| 1563 | # CONFIG_DVB_USB_DEBUG is not set | ||
| 1564 | # CONFIG_DVB_USB_A800 is not set | ||
| 1565 | CONFIG_DVB_USB_DIBUSB_MB=m | ||
| 1566 | # CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set | ||
| 1567 | CONFIG_DVB_USB_DIBUSB_MC=m | ||
| 1568 | CONFIG_DVB_USB_DIB0700=m | ||
| 1569 | CONFIG_DVB_USB_UMT_010=m | ||
| 1570 | CONFIG_DVB_USB_CXUSB=m | ||
| 1571 | CONFIG_DVB_USB_M920X=m | ||
| 1572 | # CONFIG_DVB_USB_GL861 is not set | ||
| 1573 | # CONFIG_DVB_USB_AU6610 is not set | ||
| 1574 | # CONFIG_DVB_USB_DIGITV is not set | ||
| 1575 | # CONFIG_DVB_USB_VP7045 is not set | ||
| 1576 | # CONFIG_DVB_USB_VP702X is not set | ||
| 1577 | # CONFIG_DVB_USB_GP8PSK is not set | ||
| 1578 | # CONFIG_DVB_USB_NOVA_T_USB2 is not set | ||
| 1579 | # CONFIG_DVB_USB_TTUSB2 is not set | ||
| 1580 | # CONFIG_DVB_USB_DTT200U is not set | ||
| 1581 | # CONFIG_DVB_USB_OPERA1 is not set | ||
| 1582 | CONFIG_DVB_USB_AF9005=m | ||
| 1583 | # CONFIG_DVB_USB_AF9005_REMOTE is not set | ||
| 1584 | # CONFIG_DVB_USB_DW2102 is not set | ||
| 1585 | # CONFIG_DVB_USB_CINERGY_T2 is not set | ||
| 1586 | # CONFIG_DVB_USB_ANYSEE is not set | ||
| 1587 | # CONFIG_DVB_USB_DTV5100 is not set | ||
| 1588 | # CONFIG_DVB_USB_AF9015 is not set | ||
| 1589 | # CONFIG_DVB_USB_CE6230 is not set | ||
| 1590 | # CONFIG_DVB_SIANO_SMS1XXX is not set | ||
| 1591 | |||
| 1592 | # | ||
| 1593 | # Supported FlexCopII (B2C2) Adapters | ||
| 1594 | # | ||
| 1595 | # CONFIG_DVB_B2C2_FLEXCOP is not set | ||
| 1596 | |||
| 1597 | # | ||
| 1598 | # Supported DVB Frontends | ||
| 1599 | # | ||
| 1600 | # CONFIG_DVB_FE_CUSTOMISE is not set | ||
| 1601 | CONFIG_DVB_CX22702=m | ||
| 1602 | CONFIG_DVB_TDA1004X=m | ||
| 1603 | CONFIG_DVB_MT352=m | ||
| 1604 | CONFIG_DVB_ZL10353=m | ||
| 1605 | CONFIG_DVB_DIB3000MB=m | ||
| 1606 | CONFIG_DVB_DIB3000MC=m | ||
| 1607 | CONFIG_DVB_DIB7000M=m | ||
| 1608 | CONFIG_DVB_DIB7000P=m | ||
| 1609 | CONFIG_DVB_LGDT330X=m | ||
| 1610 | CONFIG_DVB_LGDT3305=m | ||
| 1611 | CONFIG_DVB_AU8522=m | ||
| 1612 | CONFIG_DVB_S5H1411=m | ||
| 1613 | CONFIG_DVB_PLL=m | ||
| 1614 | CONFIG_DVB_TUNER_DIB0070=m | ||
| 1615 | CONFIG_DVB_LGS8GL5=m | ||
| 1616 | CONFIG_DAB=y | ||
| 1617 | CONFIG_USB_DABUSB=m | ||
| 1618 | 1647 | ||
| 1619 | # | 1648 | # |
| 1620 | # Graphics support | 1649 | # Graphics support |
| @@ -1653,6 +1682,8 @@ CONFIG_FB_SM501=y | |||
| 1653 | # CONFIG_FB_BROADSHEET is not set | 1682 | # CONFIG_FB_BROADSHEET is not set |
| 1654 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | 1683 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
| 1655 | CONFIG_LCD_CLASS_DEVICE=m | 1684 | CONFIG_LCD_CLASS_DEVICE=m |
| 1685 | # CONFIG_LCD_L4F00242T03 is not set | ||
| 1686 | # CONFIG_LCD_LMS283GF05 is not set | ||
| 1656 | # CONFIG_LCD_LTV350QV is not set | 1687 | # CONFIG_LCD_LTV350QV is not set |
| 1657 | # CONFIG_LCD_ILI9320 is not set | 1688 | # CONFIG_LCD_ILI9320 is not set |
| 1658 | # CONFIG_LCD_TDO24M is not set | 1689 | # CONFIG_LCD_TDO24M is not set |
| @@ -1682,6 +1713,7 @@ CONFIG_FONT_8x16=y | |||
| 1682 | # CONFIG_LOGO is not set | 1713 | # CONFIG_LOGO is not set |
| 1683 | CONFIG_SOUND=y | 1714 | CONFIG_SOUND=y |
| 1684 | CONFIG_SOUND_OSS_CORE=y | 1715 | CONFIG_SOUND_OSS_CORE=y |
| 1716 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
| 1685 | CONFIG_SND=y | 1717 | CONFIG_SND=y |
| 1686 | CONFIG_SND_TIMER=y | 1718 | CONFIG_SND_TIMER=y |
| 1687 | CONFIG_SND_PCM=y | 1719 | CONFIG_SND_PCM=y |
| @@ -1701,36 +1733,44 @@ CONFIG_SND_VERBOSE_PROCFS=y | |||
| 1701 | CONFIG_SND_VERBOSE_PRINTK=y | 1733 | CONFIG_SND_VERBOSE_PRINTK=y |
| 1702 | # CONFIG_SND_DEBUG is not set | 1734 | # CONFIG_SND_DEBUG is not set |
| 1703 | CONFIG_SND_VMASTER=y | 1735 | CONFIG_SND_VMASTER=y |
| 1736 | CONFIG_SND_RAWMIDI_SEQ=m | ||
| 1737 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 1738 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 1739 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 1740 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 1704 | CONFIG_SND_AC97_CODEC=m | 1741 | CONFIG_SND_AC97_CODEC=m |
| 1705 | # CONFIG_SND_DRIVERS is not set | 1742 | # CONFIG_SND_DRIVERS is not set |
| 1706 | # CONFIG_SND_ARM is not set | 1743 | # CONFIG_SND_ARM is not set |
| 1707 | # CONFIG_SND_SPI is not set | 1744 | # CONFIG_SND_SPI is not set |
| 1708 | CONFIG_SND_USB=y | 1745 | CONFIG_SND_USB=y |
| 1709 | CONFIG_SND_USB_AUDIO=m | 1746 | CONFIG_SND_USB_AUDIO=m |
| 1747 | # CONFIG_SND_USB_UA101 is not set | ||
| 1710 | CONFIG_SND_USB_CAIAQ=m | 1748 | CONFIG_SND_USB_CAIAQ=m |
| 1711 | # CONFIG_SND_USB_CAIAQ_INPUT is not set | 1749 | # CONFIG_SND_USB_CAIAQ_INPUT is not set |
| 1712 | CONFIG_SND_SOC=y | 1750 | CONFIG_SND_SOC=y |
| 1713 | CONFIG_SND_SOC_AC97_BUS=y | 1751 | CONFIG_SND_SOC_AC97_BUS=y |
| 1714 | CONFIG_SND_S3C24XX_SOC=y | 1752 | CONFIG_SND_S3C24XX_SOC=y |
| 1715 | CONFIG_SND_S3C24XX_SOC_I2S=m | 1753 | CONFIG_SND_S3C24XX_SOC_I2S=y |
| 1716 | CONFIG_SND_S3C_I2SV2_SOC=m | 1754 | CONFIG_SND_S3C_I2SV2_SOC=m |
| 1717 | CONFIG_SND_S3C2412_SOC_I2S=m | 1755 | CONFIG_SND_S3C2412_SOC_I2S=m |
| 1718 | CONFIG_SND_S3C2443_SOC_AC97=m | 1756 | CONFIG_SND_S3C_SOC_AC97=m |
| 1757 | # CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753 is not set | ||
| 1719 | CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m | 1758 | CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m |
| 1720 | CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m | 1759 | CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m |
| 1721 | CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m | 1760 | CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m |
| 1722 | CONFIG_SND_S3C24XX_SOC_S3C24XX_UDA134X=m | 1761 | CONFIG_SND_S3C24XX_SOC_S3C24XX_UDA134X=y |
| 1762 | # CONFIG_SND_S3C24XX_SOC_SIMTEC_TLV320AIC23 is not set | ||
| 1763 | # CONFIG_SND_S3C24XX_SOC_SIMTEC_HERMES is not set | ||
| 1723 | CONFIG_SND_SOC_I2C_AND_SPI=y | 1764 | CONFIG_SND_SOC_I2C_AND_SPI=y |
| 1724 | # CONFIG_SND_SOC_ALL_CODECS is not set | 1765 | # CONFIG_SND_SOC_ALL_CODECS is not set |
| 1725 | CONFIG_SND_SOC_AC97_CODEC=m | 1766 | CONFIG_SND_SOC_AC97_CODEC=m |
| 1726 | CONFIG_SND_SOC_L3=m | 1767 | CONFIG_SND_SOC_L3=y |
| 1727 | CONFIG_SND_SOC_UDA134X=m | 1768 | CONFIG_SND_SOC_UDA134X=y |
| 1728 | CONFIG_SND_SOC_WM8750=m | 1769 | CONFIG_SND_SOC_WM8750=m |
| 1729 | # CONFIG_SOUND_PRIME is not set | 1770 | # CONFIG_SOUND_PRIME is not set |
| 1730 | CONFIG_AC97_BUS=y | 1771 | CONFIG_AC97_BUS=y |
| 1731 | CONFIG_HID_SUPPORT=y | 1772 | CONFIG_HID_SUPPORT=y |
| 1732 | CONFIG_HID=y | 1773 | CONFIG_HID=y |
| 1733 | # CONFIG_HID_DEBUG is not set | ||
| 1734 | # CONFIG_HIDRAW is not set | 1774 | # CONFIG_HIDRAW is not set |
| 1735 | 1775 | ||
| 1736 | # | 1776 | # |
| @@ -1743,6 +1783,8 @@ CONFIG_HID=y | |||
| 1743 | # Special HID drivers | 1783 | # Special HID drivers |
| 1744 | # | 1784 | # |
| 1745 | CONFIG_HID_APPLE=m | 1785 | CONFIG_HID_APPLE=m |
| 1786 | # CONFIG_HID_MAGICMOUSE is not set | ||
| 1787 | # CONFIG_HID_WACOM is not set | ||
| 1746 | CONFIG_USB_SUPPORT=y | 1788 | CONFIG_USB_SUPPORT=y |
| 1747 | CONFIG_USB_ARCH_HAS_HCD=y | 1789 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1748 | CONFIG_USB_ARCH_HAS_OHCI=y | 1790 | CONFIG_USB_ARCH_HAS_OHCI=y |
| @@ -1757,8 +1799,6 @@ CONFIG_USB=y | |||
| 1757 | CONFIG_USB_DEVICEFS=y | 1799 | CONFIG_USB_DEVICEFS=y |
| 1758 | CONFIG_USB_DEVICE_CLASS=y | 1800 | CONFIG_USB_DEVICE_CLASS=y |
| 1759 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1801 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1760 | # CONFIG_USB_SUSPEND is not set | ||
| 1761 | # CONFIG_USB_OTG is not set | ||
| 1762 | CONFIG_USB_MON=y | 1802 | CONFIG_USB_MON=y |
| 1763 | # CONFIG_USB_WUSB is not set | 1803 | # CONFIG_USB_WUSB is not set |
| 1764 | # CONFIG_USB_WUSB_CBAF is not set | 1804 | # CONFIG_USB_WUSB_CBAF is not set |
| @@ -1770,6 +1810,7 @@ CONFIG_USB_MON=y | |||
| 1770 | # CONFIG_USB_OXU210HP_HCD is not set | 1810 | # CONFIG_USB_OXU210HP_HCD is not set |
| 1771 | # CONFIG_USB_ISP116X_HCD is not set | 1811 | # CONFIG_USB_ISP116X_HCD is not set |
| 1772 | # CONFIG_USB_ISP1760_HCD is not set | 1812 | # CONFIG_USB_ISP1760_HCD is not set |
| 1813 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1773 | CONFIG_USB_OHCI_HCD=y | 1814 | CONFIG_USB_OHCI_HCD=y |
| 1774 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1815 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
| 1775 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | 1816 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set |
| @@ -1854,6 +1895,7 @@ CONFIG_USB_SERIAL_FTDI_SIO=y | |||
| 1854 | CONFIG_USB_SERIAL_NAVMAN=m | 1895 | CONFIG_USB_SERIAL_NAVMAN=m |
| 1855 | CONFIG_USB_SERIAL_PL2303=y | 1896 | CONFIG_USB_SERIAL_PL2303=y |
| 1856 | # CONFIG_USB_SERIAL_OTI6858 is not set | 1897 | # CONFIG_USB_SERIAL_OTI6858 is not set |
| 1898 | # CONFIG_USB_SERIAL_QCAUX is not set | ||
| 1857 | # CONFIG_USB_SERIAL_QUALCOMM is not set | 1899 | # CONFIG_USB_SERIAL_QUALCOMM is not set |
| 1858 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | 1900 | # CONFIG_USB_SERIAL_SPCP8X5 is not set |
| 1859 | # CONFIG_USB_SERIAL_HP4X is not set | 1901 | # CONFIG_USB_SERIAL_HP4X is not set |
| @@ -1864,9 +1906,12 @@ CONFIG_USB_SERIAL_PL2303=y | |||
| 1864 | # CONFIG_USB_SERIAL_TI is not set | 1906 | # CONFIG_USB_SERIAL_TI is not set |
| 1865 | # CONFIG_USB_SERIAL_CYBERJACK is not set | 1907 | # CONFIG_USB_SERIAL_CYBERJACK is not set |
| 1866 | # CONFIG_USB_SERIAL_XIRCOM is not set | 1908 | # CONFIG_USB_SERIAL_XIRCOM is not set |
| 1909 | CONFIG_USB_SERIAL_WWAN=m | ||
| 1867 | CONFIG_USB_SERIAL_OPTION=m | 1910 | CONFIG_USB_SERIAL_OPTION=m |
| 1868 | # CONFIG_USB_SERIAL_OMNINET is not set | 1911 | # CONFIG_USB_SERIAL_OMNINET is not set |
| 1869 | # CONFIG_USB_SERIAL_OPTICON is not set | 1912 | # CONFIG_USB_SERIAL_OPTICON is not set |
| 1913 | # CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set | ||
| 1914 | # CONFIG_USB_SERIAL_ZIO is not set | ||
| 1870 | # CONFIG_USB_SERIAL_DEBUG is not set | 1915 | # CONFIG_USB_SERIAL_DEBUG is not set |
| 1871 | 1916 | ||
| 1872 | # | 1917 | # |
| @@ -1879,7 +1924,6 @@ CONFIG_USB_SEVSEG=m | |||
| 1879 | CONFIG_USB_RIO500=m | 1924 | CONFIG_USB_RIO500=m |
| 1880 | CONFIG_USB_LEGOTOWER=m | 1925 | CONFIG_USB_LEGOTOWER=m |
| 1881 | CONFIG_USB_LCD=m | 1926 | CONFIG_USB_LCD=m |
| 1882 | CONFIG_USB_BERRY_CHARGE=m | ||
| 1883 | CONFIG_USB_LED=m | 1927 | CONFIG_USB_LED=m |
| 1884 | CONFIG_USB_CYPRESS_CY7C63=m | 1928 | CONFIG_USB_CYPRESS_CY7C63=m |
| 1885 | CONFIG_USB_CYTHERM=m | 1929 | CONFIG_USB_CYTHERM=m |
| @@ -1891,13 +1935,13 @@ CONFIG_USB_TRANCEVIBRATOR=m | |||
| 1891 | CONFIG_USB_IOWARRIOR=m | 1935 | CONFIG_USB_IOWARRIOR=m |
| 1892 | CONFIG_USB_TEST=m | 1936 | CONFIG_USB_TEST=m |
| 1893 | # CONFIG_USB_ISIGHTFW is not set | 1937 | # CONFIG_USB_ISIGHTFW is not set |
| 1894 | # CONFIG_USB_VST is not set | ||
| 1895 | # CONFIG_USB_GADGET is not set | 1938 | # CONFIG_USB_GADGET is not set |
| 1896 | 1939 | ||
| 1897 | # | 1940 | # |
| 1898 | # OTG and related infrastructure | 1941 | # OTG and related infrastructure |
| 1899 | # | 1942 | # |
| 1900 | # CONFIG_USB_GPIO_VBUS is not set | 1943 | # CONFIG_USB_GPIO_VBUS is not set |
| 1944 | # CONFIG_USB_ULPI is not set | ||
| 1901 | # CONFIG_NOP_USB_XCEIV is not set | 1945 | # CONFIG_NOP_USB_XCEIV is not set |
| 1902 | CONFIG_MMC=y | 1946 | CONFIG_MMC=y |
| 1903 | # CONFIG_MMC_DEBUG is not set | 1947 | # CONFIG_MMC_DEBUG is not set |
| @@ -1915,10 +1959,15 @@ CONFIG_MMC_TEST=m | |||
| 1915 | # MMC/SD/SDIO Host Controller Drivers | 1959 | # MMC/SD/SDIO Host Controller Drivers |
| 1916 | # | 1960 | # |
| 1917 | CONFIG_MMC_SDHCI=m | 1961 | CONFIG_MMC_SDHCI=m |
| 1962 | # CONFIG_MMC_SDHCI_PLTFM is not set | ||
| 1963 | # CONFIG_MMC_SDHCI_S3C is not set | ||
| 1918 | CONFIG_MMC_SPI=m | 1964 | CONFIG_MMC_SPI=m |
| 1919 | CONFIG_MMC_S3C=y | 1965 | CONFIG_MMC_S3C=y |
| 1966 | # CONFIG_MMC_S3C_HW_SDIO_IRQ is not set | ||
| 1967 | CONFIG_MMC_S3C_PIO=y | ||
| 1968 | # CONFIG_MMC_S3C_DMA is not set | ||
| 1969 | # CONFIG_MMC_S3C_PIODMA is not set | ||
| 1920 | # CONFIG_MEMSTICK is not set | 1970 | # CONFIG_MEMSTICK is not set |
| 1921 | # CONFIG_ACCESSIBILITY is not set | ||
| 1922 | CONFIG_NEW_LEDS=y | 1971 | CONFIG_NEW_LEDS=y |
| 1923 | CONFIG_LEDS_CLASS=m | 1972 | CONFIG_LEDS_CLASS=m |
| 1924 | 1973 | ||
| @@ -1930,26 +1979,28 @@ CONFIG_LEDS_H1940=m | |||
| 1930 | CONFIG_LEDS_PCA9532=m | 1979 | CONFIG_LEDS_PCA9532=m |
| 1931 | CONFIG_LEDS_GPIO=m | 1980 | CONFIG_LEDS_GPIO=m |
| 1932 | CONFIG_LEDS_GPIO_PLATFORM=y | 1981 | CONFIG_LEDS_GPIO_PLATFORM=y |
| 1933 | CONFIG_LEDS_LP5521=m | 1982 | # CONFIG_LEDS_LP3944 is not set |
| 1934 | CONFIG_LEDS_PCA955X=m | 1983 | CONFIG_LEDS_PCA955X=m |
| 1935 | CONFIG_LEDS_DAC124S085=m | 1984 | CONFIG_LEDS_DAC124S085=m |
| 1936 | CONFIG_LEDS_PWM=m | 1985 | CONFIG_LEDS_PWM=m |
| 1937 | CONFIG_LEDS_BD2802=m | 1986 | CONFIG_LEDS_BD2802=m |
| 1987 | # CONFIG_LEDS_LT3593 is not set | ||
| 1988 | CONFIG_LEDS_TRIGGERS=y | ||
| 1938 | 1989 | ||
| 1939 | # | 1990 | # |
| 1940 | # LED Triggers | 1991 | # LED Triggers |
| 1941 | # | 1992 | # |
| 1942 | CONFIG_LEDS_TRIGGERS=y | ||
| 1943 | CONFIG_LEDS_TRIGGER_TIMER=m | 1993 | CONFIG_LEDS_TRIGGER_TIMER=m |
| 1944 | # CONFIG_LEDS_TRIGGER_IDE_DISK is not set | 1994 | # CONFIG_LEDS_TRIGGER_IDE_DISK is not set |
| 1945 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m | 1995 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m |
| 1946 | CONFIG_LEDS_TRIGGER_BACKLIGHT=m | 1996 | CONFIG_LEDS_TRIGGER_BACKLIGHT=y |
| 1947 | CONFIG_LEDS_TRIGGER_GPIO=m | 1997 | CONFIG_LEDS_TRIGGER_GPIO=m |
| 1948 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m | 1998 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m |
| 1949 | 1999 | ||
| 1950 | # | 2000 | # |
| 1951 | # iptables trigger is under Netfilter config (LED target) | 2001 | # iptables trigger is under Netfilter config (LED target) |
| 1952 | # | 2002 | # |
| 2003 | # CONFIG_ACCESSIBILITY is not set | ||
| 1953 | CONFIG_RTC_LIB=y | 2004 | CONFIG_RTC_LIB=y |
| 1954 | CONFIG_RTC_CLASS=y | 2005 | CONFIG_RTC_CLASS=y |
| 1955 | CONFIG_RTC_HCTOSYS=y | 2006 | CONFIG_RTC_HCTOSYS=y |
| @@ -1978,9 +2029,11 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1978 | # CONFIG_RTC_DRV_PCF8563 is not set | 2029 | # CONFIG_RTC_DRV_PCF8563 is not set |
| 1979 | # CONFIG_RTC_DRV_PCF8583 is not set | 2030 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 1980 | # CONFIG_RTC_DRV_M41T80 is not set | 2031 | # CONFIG_RTC_DRV_M41T80 is not set |
| 2032 | # CONFIG_RTC_DRV_BQ32K is not set | ||
| 1981 | # CONFIG_RTC_DRV_S35390A is not set | 2033 | # CONFIG_RTC_DRV_S35390A is not set |
| 1982 | # CONFIG_RTC_DRV_FM3130 is not set | 2034 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1983 | # CONFIG_RTC_DRV_RX8581 is not set | 2035 | # CONFIG_RTC_DRV_RX8581 is not set |
| 2036 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1984 | 2037 | ||
| 1985 | # | 2038 | # |
| 1986 | # SPI RTC drivers | 2039 | # SPI RTC drivers |
| @@ -1992,6 +2045,7 @@ CONFIG_RTC_INTF_DEV=y | |||
| 1992 | # CONFIG_RTC_DRV_R9701 is not set | 2045 | # CONFIG_RTC_DRV_R9701 is not set |
| 1993 | # CONFIG_RTC_DRV_RS5C348 is not set | 2046 | # CONFIG_RTC_DRV_RS5C348 is not set |
| 1994 | # CONFIG_RTC_DRV_DS3234 is not set | 2047 | # CONFIG_RTC_DRV_DS3234 is not set |
| 2048 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1995 | 2049 | ||
| 1996 | # | 2050 | # |
| 1997 | # Platform RTC drivers | 2051 | # Platform RTC drivers |
| @@ -2005,8 +2059,11 @@ CONFIG_RTC_INTF_DEV=y | |||
| 2005 | # CONFIG_RTC_DRV_M48T86 is not set | 2059 | # CONFIG_RTC_DRV_M48T86 is not set |
| 2006 | # CONFIG_RTC_DRV_M48T35 is not set | 2060 | # CONFIG_RTC_DRV_M48T35 is not set |
| 2007 | # CONFIG_RTC_DRV_M48T59 is not set | 2061 | # CONFIG_RTC_DRV_M48T59 is not set |
| 2062 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
| 2008 | # CONFIG_RTC_DRV_BQ4802 is not set | 2063 | # CONFIG_RTC_DRV_BQ4802 is not set |
| 2064 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
| 2009 | # CONFIG_RTC_DRV_V3020 is not set | 2065 | # CONFIG_RTC_DRV_V3020 is not set |
| 2066 | # CONFIG_RTC_DRV_PCF50633 is not set | ||
| 2010 | 2067 | ||
| 2011 | # | 2068 | # |
| 2012 | # on-CPU RTC drivers | 2069 | # on-CPU RTC drivers |
| @@ -2014,7 +2071,6 @@ CONFIG_RTC_INTF_DEV=y | |||
| 2014 | CONFIG_RTC_DRV_S3C=y | 2071 | CONFIG_RTC_DRV_S3C=y |
| 2015 | # CONFIG_DMADEVICES is not set | 2072 | # CONFIG_DMADEVICES is not set |
| 2016 | # CONFIG_AUXDISPLAY is not set | 2073 | # CONFIG_AUXDISPLAY is not set |
| 2017 | # CONFIG_REGULATOR is not set | ||
| 2018 | # CONFIG_UIO is not set | 2074 | # CONFIG_UIO is not set |
| 2019 | # CONFIG_STAGING is not set | 2075 | # CONFIG_STAGING is not set |
| 2020 | 2076 | ||
| @@ -2032,20 +2088,23 @@ CONFIG_EXT3_FS_XATTR=y | |||
| 2032 | CONFIG_EXT3_FS_POSIX_ACL=y | 2088 | CONFIG_EXT3_FS_POSIX_ACL=y |
| 2033 | # CONFIG_EXT3_FS_SECURITY is not set | 2089 | # CONFIG_EXT3_FS_SECURITY is not set |
| 2034 | CONFIG_EXT4_FS=m | 2090 | CONFIG_EXT4_FS=m |
| 2035 | # CONFIG_EXT4DEV_COMPAT is not set | ||
| 2036 | CONFIG_EXT4_FS_XATTR=y | 2091 | CONFIG_EXT4_FS_XATTR=y |
| 2037 | CONFIG_EXT4_FS_POSIX_ACL=y | 2092 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 2038 | # CONFIG_EXT4_FS_SECURITY is not set | 2093 | # CONFIG_EXT4_FS_SECURITY is not set |
| 2094 | # CONFIG_EXT4_DEBUG is not set | ||
| 2039 | CONFIG_JBD=y | 2095 | CONFIG_JBD=y |
| 2040 | CONFIG_JBD2=m | 2096 | CONFIG_JBD2=m |
| 2041 | CONFIG_FS_MBCACHE=y | 2097 | CONFIG_FS_MBCACHE=y |
| 2042 | # CONFIG_REISERFS_FS is not set | 2098 | # CONFIG_REISERFS_FS is not set |
| 2043 | # CONFIG_JFS_FS is not set | 2099 | # CONFIG_JFS_FS is not set |
| 2044 | CONFIG_FS_POSIX_ACL=y | 2100 | CONFIG_FS_POSIX_ACL=y |
| 2045 | CONFIG_FILE_LOCKING=y | ||
| 2046 | # CONFIG_XFS_FS is not set | 2101 | # CONFIG_XFS_FS is not set |
| 2102 | # CONFIG_GFS2_FS is not set | ||
| 2047 | # CONFIG_OCFS2_FS is not set | 2103 | # CONFIG_OCFS2_FS is not set |
| 2048 | # CONFIG_BTRFS_FS is not set | 2104 | # CONFIG_BTRFS_FS is not set |
| 2105 | # CONFIG_NILFS2_FS is not set | ||
| 2106 | CONFIG_FILE_LOCKING=y | ||
| 2107 | CONFIG_FSNOTIFY=y | ||
| 2049 | CONFIG_DNOTIFY=y | 2108 | CONFIG_DNOTIFY=y |
| 2050 | CONFIG_INOTIFY=y | 2109 | CONFIG_INOTIFY=y |
| 2051 | CONFIG_INOTIFY_USER=y | 2110 | CONFIG_INOTIFY_USER=y |
| @@ -2053,6 +2112,7 @@ CONFIG_INOTIFY_USER=y | |||
| 2053 | CONFIG_AUTOFS_FS=m | 2112 | CONFIG_AUTOFS_FS=m |
| 2054 | CONFIG_AUTOFS4_FS=m | 2113 | CONFIG_AUTOFS4_FS=m |
| 2055 | CONFIG_FUSE_FS=m | 2114 | CONFIG_FUSE_FS=m |
| 2115 | # CONFIG_CUSE is not set | ||
| 2056 | CONFIG_GENERIC_ACL=y | 2116 | CONFIG_GENERIC_ACL=y |
| 2057 | 2117 | ||
| 2058 | # | 2118 | # |
| @@ -2111,6 +2171,7 @@ CONFIG_JFFS2_ZLIB=y | |||
| 2111 | # CONFIG_JFFS2_LZO is not set | 2171 | # CONFIG_JFFS2_LZO is not set |
| 2112 | CONFIG_JFFS2_RTIME=y | 2172 | CONFIG_JFFS2_RTIME=y |
| 2113 | # CONFIG_JFFS2_RUBIN is not set | 2173 | # CONFIG_JFFS2_RUBIN is not set |
| 2174 | # CONFIG_LOGFS is not set | ||
| 2114 | CONFIG_CRAMFS=y | 2175 | CONFIG_CRAMFS=y |
| 2115 | CONFIG_SQUASHFS=m | 2176 | CONFIG_SQUASHFS=m |
| 2116 | # CONFIG_SQUASHFS_EMBEDDED is not set | 2177 | # CONFIG_SQUASHFS_EMBEDDED is not set |
| @@ -2127,7 +2188,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y | |||
| 2127 | CONFIG_ROMFS_ON_BLOCK=y | 2188 | CONFIG_ROMFS_ON_BLOCK=y |
| 2128 | # CONFIG_SYSV_FS is not set | 2189 | # CONFIG_SYSV_FS is not set |
| 2129 | # CONFIG_UFS_FS is not set | 2190 | # CONFIG_UFS_FS is not set |
| 2130 | # CONFIG_NILFS2_FS is not set | ||
| 2131 | CONFIG_NETWORK_FILESYSTEMS=y | 2191 | CONFIG_NETWORK_FILESYSTEMS=y |
| 2132 | CONFIG_NFS_FS=y | 2192 | CONFIG_NFS_FS=y |
| 2133 | CONFIG_NFS_V3=y | 2193 | CONFIG_NFS_V3=y |
| @@ -2149,6 +2209,7 @@ CONFIG_SUNRPC_GSS=m | |||
| 2149 | CONFIG_RPCSEC_GSS_KRB5=m | 2209 | CONFIG_RPCSEC_GSS_KRB5=m |
| 2150 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 2210 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
| 2151 | # CONFIG_SMB_FS is not set | 2211 | # CONFIG_SMB_FS is not set |
| 2212 | # CONFIG_CEPH_FS is not set | ||
| 2152 | CONFIG_CIFS=m | 2213 | CONFIG_CIFS=m |
| 2153 | # CONFIG_CIFS_STATS is not set | 2214 | # CONFIG_CIFS_STATS is not set |
| 2154 | # CONFIG_CIFS_WEAK_PW_HASH is not set | 2215 | # CONFIG_CIFS_WEAK_PW_HASH is not set |
| @@ -2230,6 +2291,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
| 2230 | CONFIG_ENABLE_MUST_CHECK=y | 2291 | CONFIG_ENABLE_MUST_CHECK=y |
| 2231 | CONFIG_FRAME_WARN=1024 | 2292 | CONFIG_FRAME_WARN=1024 |
| 2232 | CONFIG_MAGIC_SYSRQ=y | 2293 | CONFIG_MAGIC_SYSRQ=y |
| 2294 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 2233 | # CONFIG_UNUSED_SYMBOLS is not set | 2295 | # CONFIG_UNUSED_SYMBOLS is not set |
| 2234 | # CONFIG_DEBUG_FS is not set | 2296 | # CONFIG_DEBUG_FS is not set |
| 2235 | # CONFIG_HEADERS_CHECK is not set | 2297 | # CONFIG_HEADERS_CHECK is not set |
| @@ -2246,6 +2308,7 @@ CONFIG_SCHED_DEBUG=y | |||
| 2246 | # CONFIG_TIMER_STATS is not set | 2308 | # CONFIG_TIMER_STATS is not set |
| 2247 | # CONFIG_DEBUG_OBJECTS is not set | 2309 | # CONFIG_DEBUG_OBJECTS is not set |
| 2248 | # CONFIG_DEBUG_SLAB is not set | 2310 | # CONFIG_DEBUG_SLAB is not set |
| 2311 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 2249 | # CONFIG_DEBUG_RT_MUTEXES is not set | 2312 | # CONFIG_DEBUG_RT_MUTEXES is not set |
| 2250 | # CONFIG_RT_MUTEX_TESTER is not set | 2313 | # CONFIG_RT_MUTEX_TESTER is not set |
| 2251 | # CONFIG_DEBUG_SPINLOCK is not set | 2314 | # CONFIG_DEBUG_SPINLOCK is not set |
| @@ -2264,32 +2327,34 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
| 2264 | # CONFIG_DEBUG_LIST is not set | 2327 | # CONFIG_DEBUG_LIST is not set |
| 2265 | # CONFIG_DEBUG_SG is not set | 2328 | # CONFIG_DEBUG_SG is not set |
| 2266 | # CONFIG_DEBUG_NOTIFIERS is not set | 2329 | # CONFIG_DEBUG_NOTIFIERS is not set |
| 2330 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 2267 | CONFIG_FRAME_POINTER=y | 2331 | CONFIG_FRAME_POINTER=y |
| 2268 | # CONFIG_BOOT_PRINTK_DELAY is not set | 2332 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 2269 | # CONFIG_RCU_TORTURE_TEST is not set | 2333 | # CONFIG_RCU_TORTURE_TEST is not set |
| 2270 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 2334 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 2271 | # CONFIG_BACKTRACE_SELF_TEST is not set | 2335 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 2272 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 2336 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 2337 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 2273 | # CONFIG_FAULT_INJECTION is not set | 2338 | # CONFIG_FAULT_INJECTION is not set |
| 2274 | # CONFIG_LATENCYTOP is not set | 2339 | # CONFIG_LATENCYTOP is not set |
| 2275 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 2340 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| 2276 | # CONFIG_PAGE_POISONING is not set | 2341 | # CONFIG_PAGE_POISONING is not set |
| 2277 | CONFIG_HAVE_FUNCTION_TRACER=y | 2342 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 2278 | CONFIG_TRACING_SUPPORT=y | 2343 | CONFIG_TRACING_SUPPORT=y |
| 2279 | 2344 | CONFIG_FTRACE=y | |
| 2280 | # | ||
| 2281 | # Tracers | ||
| 2282 | # | ||
| 2283 | # CONFIG_FUNCTION_TRACER is not set | 2345 | # CONFIG_FUNCTION_TRACER is not set |
| 2346 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 2284 | # CONFIG_SCHED_TRACER is not set | 2347 | # CONFIG_SCHED_TRACER is not set |
| 2285 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 2348 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 2286 | # CONFIG_EVENT_TRACER is not set | ||
| 2287 | # CONFIG_BOOT_TRACER is not set | 2349 | # CONFIG_BOOT_TRACER is not set |
| 2288 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 2350 | CONFIG_BRANCH_PROFILE_NONE=y |
| 2351 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 2352 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 2289 | # CONFIG_STACK_TRACER is not set | 2353 | # CONFIG_STACK_TRACER is not set |
| 2290 | # CONFIG_KMEMTRACE is not set | 2354 | # CONFIG_KMEMTRACE is not set |
| 2291 | # CONFIG_WORKQUEUE_TRACER is not set | 2355 | # CONFIG_WORKQUEUE_TRACER is not set |
| 2292 | # CONFIG_BLK_DEV_IO_TRACE is not set | 2356 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 2357 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 2293 | # CONFIG_SAMPLES is not set | 2358 | # CONFIG_SAMPLES is not set |
| 2294 | CONFIG_HAVE_ARCH_KGDB=y | 2359 | CONFIG_HAVE_ARCH_KGDB=y |
| 2295 | # CONFIG_KGDB is not set | 2360 | # CONFIG_KGDB is not set |
| @@ -2297,7 +2362,9 @@ CONFIG_DEBUG_USER=y | |||
| 2297 | CONFIG_DEBUG_ERRORS=y | 2362 | CONFIG_DEBUG_ERRORS=y |
| 2298 | # CONFIG_DEBUG_STACK_USAGE is not set | 2363 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 2299 | CONFIG_DEBUG_LL=y | 2364 | CONFIG_DEBUG_LL=y |
| 2365 | # CONFIG_EARLY_PRINTK is not set | ||
| 2300 | # CONFIG_DEBUG_ICEDCC is not set | 2366 | # CONFIG_DEBUG_ICEDCC is not set |
| 2367 | # CONFIG_OC_ETM is not set | ||
| 2301 | CONFIG_DEBUG_S3C_UART=0 | 2368 | CONFIG_DEBUG_S3C_UART=0 |
| 2302 | 2369 | ||
| 2303 | # | 2370 | # |
| @@ -2306,13 +2373,16 @@ CONFIG_DEBUG_S3C_UART=0 | |||
| 2306 | # CONFIG_KEYS is not set | 2373 | # CONFIG_KEYS is not set |
| 2307 | # CONFIG_SECURITY is not set | 2374 | # CONFIG_SECURITY is not set |
| 2308 | # CONFIG_SECURITYFS is not set | 2375 | # CONFIG_SECURITYFS is not set |
| 2309 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 2376 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
| 2377 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
| 2378 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
| 2379 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 2380 | CONFIG_DEFAULT_SECURITY="" | ||
| 2310 | CONFIG_CRYPTO=y | 2381 | CONFIG_CRYPTO=y |
| 2311 | 2382 | ||
| 2312 | # | 2383 | # |
| 2313 | # Crypto core or helper | 2384 | # Crypto core or helper |
| 2314 | # | 2385 | # |
| 2315 | # CONFIG_CRYPTO_FIPS is not set | ||
| 2316 | CONFIG_CRYPTO_ALGAPI=m | 2386 | CONFIG_CRYPTO_ALGAPI=m |
| 2317 | CONFIG_CRYPTO_ALGAPI2=m | 2387 | CONFIG_CRYPTO_ALGAPI2=m |
| 2318 | CONFIG_CRYPTO_AEAD=m | 2388 | CONFIG_CRYPTO_AEAD=m |
| @@ -2355,11 +2425,13 @@ CONFIG_CRYPTO_ECB=m | |||
| 2355 | # | 2425 | # |
| 2356 | CONFIG_CRYPTO_HMAC=m | 2426 | CONFIG_CRYPTO_HMAC=m |
| 2357 | # CONFIG_CRYPTO_XCBC is not set | 2427 | # CONFIG_CRYPTO_XCBC is not set |
| 2428 | # CONFIG_CRYPTO_VMAC is not set | ||
| 2358 | 2429 | ||
| 2359 | # | 2430 | # |
| 2360 | # Digest | 2431 | # Digest |
| 2361 | # | 2432 | # |
| 2362 | CONFIG_CRYPTO_CRC32C=m | 2433 | CONFIG_CRYPTO_CRC32C=m |
| 2434 | # CONFIG_CRYPTO_GHASH is not set | ||
| 2363 | # CONFIG_CRYPTO_MD4 is not set | 2435 | # CONFIG_CRYPTO_MD4 is not set |
| 2364 | CONFIG_CRYPTO_MD5=m | 2436 | CONFIG_CRYPTO_MD5=m |
| 2365 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 2437 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
| @@ -2420,9 +2492,11 @@ CONFIG_CRC7=m | |||
| 2420 | CONFIG_LIBCRC32C=m | 2492 | CONFIG_LIBCRC32C=m |
| 2421 | CONFIG_ZLIB_INFLATE=y | 2493 | CONFIG_ZLIB_INFLATE=y |
| 2422 | CONFIG_ZLIB_DEFLATE=y | 2494 | CONFIG_ZLIB_DEFLATE=y |
| 2495 | CONFIG_LZO_DECOMPRESS=y | ||
| 2423 | CONFIG_DECOMPRESS_GZIP=y | 2496 | CONFIG_DECOMPRESS_GZIP=y |
| 2424 | CONFIG_DECOMPRESS_BZIP2=y | 2497 | CONFIG_DECOMPRESS_BZIP2=y |
| 2425 | CONFIG_DECOMPRESS_LZMA=y | 2498 | CONFIG_DECOMPRESS_LZMA=y |
| 2499 | CONFIG_DECOMPRESS_LZO=y | ||
| 2426 | CONFIG_TEXTSEARCH=y | 2500 | CONFIG_TEXTSEARCH=y |
| 2427 | CONFIG_TEXTSEARCH_KMP=m | 2501 | CONFIG_TEXTSEARCH_KMP=m |
| 2428 | CONFIG_TEXTSEARCH_BM=m | 2502 | CONFIG_TEXTSEARCH_BM=m |
| @@ -2430,3 +2504,4 @@ CONFIG_TEXTSEARCH_FSM=m | |||
| 2430 | CONFIG_HAS_IOMEM=y | 2504 | CONFIG_HAS_IOMEM=y |
| 2431 | CONFIG_HAS_DMA=y | 2505 | CONFIG_HAS_DMA=y |
| 2432 | CONFIG_NLATTR=y | 2506 | CONFIG_NLATTR=y |
| 2507 | CONFIG_GENERIC_ATOMIC64=y | ||
diff --git a/arch/arm/configs/s3c6400_defconfig b/arch/arm/configs/s3c6400_defconfig index 5e7d4c1b8fc1..2b642386f030 100644 --- a/arch/arm/configs/s3c6400_defconfig +++ b/arch/arm/configs/s3c6400_defconfig | |||
| @@ -1,11 +1,15 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc4 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Tue Jan 19 13:12:40 2010 | 4 | # Fri May 28 19:05:39 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_HAVE_PWM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 9 | CONFIG_GENERIC_GPIO=y |
| 10 | CONFIG_GENERIC_TIME=y | ||
| 11 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 12 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 13 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 14 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 15 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -18,6 +22,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
| 18 | CONFIG_ARCH_HAS_CPUFREQ=y | 22 | CONFIG_ARCH_HAS_CPUFREQ=y |
| 19 | CONFIG_GENERIC_HWEIGHT=y | 23 | CONFIG_GENERIC_HWEIGHT=y |
| 20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 21 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | 27 | CONFIG_VECTORS_BASE=0xffff0000 |
| 23 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| @@ -32,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
| 32 | CONFIG_LOCALVERSION="" | 37 | CONFIG_LOCALVERSION="" |
| 33 | CONFIG_LOCALVERSION_AUTO=y | 38 | CONFIG_LOCALVERSION_AUTO=y |
| 34 | CONFIG_HAVE_KERNEL_GZIP=y | 39 | CONFIG_HAVE_KERNEL_GZIP=y |
| 40 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 35 | CONFIG_HAVE_KERNEL_LZO=y | 41 | CONFIG_HAVE_KERNEL_LZO=y |
| 36 | CONFIG_KERNEL_GZIP=y | 42 | CONFIG_KERNEL_GZIP=y |
| 37 | # CONFIG_KERNEL_BZIP2 is not set | 43 | # CONFIG_KERNEL_BZIP2 is not set |
| @@ -53,7 +59,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 53 | # CONFIG_TREE_RCU_TRACE is not set | 59 | # CONFIG_TREE_RCU_TRACE is not set |
| 54 | # CONFIG_IKCONFIG is not set | 60 | # CONFIG_IKCONFIG is not set |
| 55 | CONFIG_LOG_BUF_SHIFT=17 | 61 | CONFIG_LOG_BUF_SHIFT=17 |
| 56 | # CONFIG_GROUP_SCHED is not set | ||
| 57 | # CONFIG_CGROUPS is not set | 62 | # CONFIG_CGROUPS is not set |
| 58 | CONFIG_SYSFS_DEPRECATED=y | 63 | CONFIG_SYSFS_DEPRECATED=y |
| 59 | CONFIG_SYSFS_DEPRECATED_V2=y | 64 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -89,10 +94,14 @@ CONFIG_TIMERFD=y | |||
| 89 | CONFIG_EVENTFD=y | 94 | CONFIG_EVENTFD=y |
| 90 | CONFIG_SHMEM=y | 95 | CONFIG_SHMEM=y |
| 91 | CONFIG_AIO=y | 96 | CONFIG_AIO=y |
| 97 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 98 | CONFIG_PERF_USE_VMALLOC=y | ||
| 92 | 99 | ||
| 93 | # | 100 | # |
| 94 | # Kernel Performance Events And Counters | 101 | # Kernel Performance Events And Counters |
| 95 | # | 102 | # |
| 103 | # CONFIG_PERF_EVENTS is not set | ||
| 104 | # CONFIG_PERF_COUNTERS is not set | ||
| 96 | CONFIG_VM_EVENT_COUNTERS=y | 105 | CONFIG_VM_EVENT_COUNTERS=y |
| 97 | CONFIG_SLUB_DEBUG=y | 106 | CONFIG_SLUB_DEBUG=y |
| 98 | CONFIG_COMPAT_BRK=y | 107 | CONFIG_COMPAT_BRK=y |
| @@ -164,7 +173,7 @@ CONFIG_DEFAULT_IOSCHED="cfq" | |||
| 164 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | 173 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set |
| 165 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | 174 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set |
| 166 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | 175 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set |
| 167 | # CONFIG_FREEZER is not set | 176 | CONFIG_FREEZER=y |
| 168 | 177 | ||
| 169 | # | 178 | # |
| 170 | # System Type | 179 | # System Type |
| @@ -174,8 +183,11 @@ CONFIG_MMU=y | |||
| 174 | # CONFIG_ARCH_INTEGRATOR is not set | 183 | # CONFIG_ARCH_INTEGRATOR is not set |
| 175 | # CONFIG_ARCH_REALVIEW is not set | 184 | # CONFIG_ARCH_REALVIEW is not set |
| 176 | # CONFIG_ARCH_VERSATILE is not set | 185 | # CONFIG_ARCH_VERSATILE is not set |
| 186 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 177 | # CONFIG_ARCH_AT91 is not set | 187 | # CONFIG_ARCH_AT91 is not set |
| 188 | # CONFIG_ARCH_BCMRING is not set | ||
| 178 | # CONFIG_ARCH_CLPS711X is not set | 189 | # CONFIG_ARCH_CLPS711X is not set |
| 190 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 179 | # CONFIG_ARCH_GEMINI is not set | 191 | # CONFIG_ARCH_GEMINI is not set |
| 180 | # CONFIG_ARCH_EBSA110 is not set | 192 | # CONFIG_ARCH_EBSA110 is not set |
| 181 | # CONFIG_ARCH_EP93XX is not set | 193 | # CONFIG_ARCH_EP93XX is not set |
| @@ -184,7 +196,6 @@ CONFIG_MMU=y | |||
| 184 | # CONFIG_ARCH_STMP3XXX is not set | 196 | # CONFIG_ARCH_STMP3XXX is not set |
| 185 | # CONFIG_ARCH_NETX is not set | 197 | # CONFIG_ARCH_NETX is not set |
| 186 | # CONFIG_ARCH_H720X is not set | 198 | # CONFIG_ARCH_H720X is not set |
| 187 | # CONFIG_ARCH_NOMADIK is not set | ||
| 188 | # CONFIG_ARCH_IOP13XX is not set | 199 | # CONFIG_ARCH_IOP13XX is not set |
| 189 | # CONFIG_ARCH_IOP32X is not set | 200 | # CONFIG_ARCH_IOP32X is not set |
| 190 | # CONFIG_ARCH_IOP33X is not set | 201 | # CONFIG_ARCH_IOP33X is not set |
| @@ -201,70 +212,89 @@ CONFIG_MMU=y | |||
| 201 | # CONFIG_ARCH_KS8695 is not set | 212 | # CONFIG_ARCH_KS8695 is not set |
| 202 | # CONFIG_ARCH_NS9XXX is not set | 213 | # CONFIG_ARCH_NS9XXX is not set |
| 203 | # CONFIG_ARCH_W90X900 is not set | 214 | # CONFIG_ARCH_W90X900 is not set |
| 215 | # CONFIG_ARCH_NUC93X is not set | ||
| 204 | # CONFIG_ARCH_PNX4008 is not set | 216 | # CONFIG_ARCH_PNX4008 is not set |
| 205 | # CONFIG_ARCH_PXA is not set | 217 | # CONFIG_ARCH_PXA is not set |
| 206 | # CONFIG_ARCH_MSM is not set | 218 | # CONFIG_ARCH_MSM is not set |
| 219 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 207 | # CONFIG_ARCH_RPC is not set | 220 | # CONFIG_ARCH_RPC is not set |
| 208 | # CONFIG_ARCH_SA1100 is not set | 221 | # CONFIG_ARCH_SA1100 is not set |
| 209 | # CONFIG_ARCH_S3C2410 is not set | 222 | # CONFIG_ARCH_S3C2410 is not set |
| 210 | CONFIG_ARCH_S3C64XX=y | 223 | CONFIG_ARCH_S3C64XX=y |
| 211 | # CONFIG_ARCH_S5P6440 is not set | 224 | # CONFIG_ARCH_S5P6440 is not set |
| 212 | # CONFIG_ARCH_S5PC1XX is not set | 225 | # CONFIG_ARCH_S5P6442 is not set |
| 226 | # CONFIG_ARCH_S5PC100 is not set | ||
| 227 | # CONFIG_ARCH_S5PV210 is not set | ||
| 213 | # CONFIG_ARCH_SHARK is not set | 228 | # CONFIG_ARCH_SHARK is not set |
| 214 | # CONFIG_ARCH_LH7A40X is not set | 229 | # CONFIG_ARCH_LH7A40X is not set |
| 215 | # CONFIG_ARCH_U300 is not set | 230 | # CONFIG_ARCH_U300 is not set |
| 231 | # CONFIG_ARCH_U8500 is not set | ||
| 232 | # CONFIG_ARCH_NOMADIK is not set | ||
| 216 | # CONFIG_ARCH_DAVINCI is not set | 233 | # CONFIG_ARCH_DAVINCI is not set |
| 217 | # CONFIG_ARCH_OMAP is not set | 234 | # CONFIG_ARCH_OMAP is not set |
| 218 | # CONFIG_ARCH_BCMRING is not set | 235 | # CONFIG_PLAT_SPEAR is not set |
| 219 | # CONFIG_ARCH_U8500 is not set | ||
| 220 | CONFIG_PLAT_SAMSUNG=y | 236 | CONFIG_PLAT_SAMSUNG=y |
| 237 | |||
| 238 | # | ||
| 239 | # Boot options | ||
| 240 | # | ||
| 241 | CONFIG_S3C_BOOT_ERROR_RESET=y | ||
| 242 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | ||
| 243 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | ||
| 221 | CONFIG_SAMSUNG_CLKSRC=y | 244 | CONFIG_SAMSUNG_CLKSRC=y |
| 222 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | 245 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y |
| 223 | CONFIG_SAMSUNG_IRQ_UART=y | 246 | CONFIG_SAMSUNG_IRQ_UART=y |
| 247 | CONFIG_SAMSUNG_GPIOLIB_4BIT=y | ||
| 224 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | 248 | CONFIG_S3C_GPIO_CFG_S3C24XX=y |
| 225 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | 249 | CONFIG_S3C_GPIO_CFG_S3C64XX=y |
| 226 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | 250 | CONFIG_S3C_GPIO_PULL_UPDOWN=y |
| 227 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | 251 | CONFIG_SAMSUNG_GPIO_EXTRA=0 |
| 252 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 253 | CONFIG_S3C_GPIO_TRACK=y | ||
| 228 | # CONFIG_S3C_ADC is not set | 254 | # CONFIG_S3C_ADC is not set |
| 229 | CONFIG_S3C_DEV_HSMMC=y | 255 | CONFIG_S3C_DEV_HSMMC=y |
| 230 | CONFIG_S3C_DEV_HSMMC1=y | 256 | CONFIG_S3C_DEV_HSMMC1=y |
| 257 | CONFIG_S3C_DEV_HSMMC2=y | ||
| 258 | CONFIG_S3C_DEV_HWMON=y | ||
| 231 | CONFIG_S3C_DEV_I2C1=y | 259 | CONFIG_S3C_DEV_I2C1=y |
| 232 | CONFIG_S3C_DEV_FB=y | 260 | CONFIG_S3C_DEV_FB=y |
| 233 | CONFIG_S3C_DEV_USB_HOST=y | 261 | CONFIG_S3C_DEV_USB_HOST=y |
| 234 | CONFIG_S3C_DEV_USB_HSOTG=y | 262 | CONFIG_S3C_DEV_USB_HSOTG=y |
| 263 | CONFIG_S3C_DEV_WDT=y | ||
| 235 | CONFIG_S3C_DEV_NAND=y | 264 | CONFIG_S3C_DEV_NAND=y |
| 236 | CONFIG_PLAT_S3C64XX=y | 265 | CONFIG_S3C_DEV_RTC=y |
| 237 | CONFIG_CPU_S3C6400_INIT=y | 266 | CONFIG_SAMSUNG_DEV_ADC=y |
| 238 | CONFIG_CPU_S3C6400_CLOCK=y | 267 | CONFIG_SAMSUNG_DEV_TS=y |
| 239 | # CONFIG_S3C64XX_DMA is not set | 268 | CONFIG_S3C_DMA=y |
| 240 | CONFIG_S3C64XX_SETUP_I2C0=y | ||
| 241 | CONFIG_S3C64XX_SETUP_I2C1=y | ||
| 242 | CONFIG_S3C64XX_SETUP_FB_24BPP=y | ||
| 243 | CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y | ||
| 244 | CONFIG_PLAT_S3C=y | ||
| 245 | |||
| 246 | # | ||
| 247 | # Boot options | ||
| 248 | # | ||
| 249 | CONFIG_S3C_BOOT_ERROR_RESET=y | ||
| 250 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | ||
| 251 | 269 | ||
| 252 | # | 270 | # |
| 253 | # Power management | 271 | # Power management |
| 254 | # | 272 | # |
| 255 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | 273 | # CONFIG_SAMSUNG_PM_DEBUG is not set |
| 256 | CONFIG_S3C_GPIO_SPACE=0 | 274 | # CONFIG_S3C_PM_DEBUG_LED_SMDK is not set |
| 257 | CONFIG_S3C_GPIO_TRACK=y | 275 | # CONFIG_SAMSUNG_PM_CHECK is not set |
| 258 | # CONFIG_MACH_SMDK6400 is not set | 276 | CONFIG_SAMSUNG_WAKEMASK=y |
| 277 | CONFIG_PLAT_S3C64XX=y | ||
| 278 | CONFIG_CPU_S3C6400=y | ||
| 259 | CONFIG_CPU_S3C6410=y | 279 | CONFIG_CPU_S3C6410=y |
| 260 | CONFIG_S3C6410_SETUP_SDHCI=y | 280 | CONFIG_S3C64XX_DMA=y |
| 261 | # CONFIG_MACH_ANW6410 is not set | 281 | CONFIG_S3C64XX_SETUP_SDHCI=y |
| 282 | CONFIG_S3C64XX_SETUP_I2C0=y | ||
| 283 | CONFIG_S3C64XX_SETUP_I2C1=y | ||
| 284 | CONFIG_S3C64XX_SETUP_FB_24BPP=y | ||
| 285 | CONFIG_S3C64XX_SETUP_SDHCI_GPIO=y | ||
| 286 | CONFIG_MACH_SMDK6400=y | ||
| 287 | CONFIG_MACH_ANW6410=y | ||
| 262 | CONFIG_MACH_SMDK6410=y | 288 | CONFIG_MACH_SMDK6410=y |
| 263 | CONFIG_SMDK6410_SD_CH0=y | 289 | CONFIG_SMDK6410_SD_CH0=y |
| 264 | # CONFIG_SMDK6410_SD_CH1 is not set | 290 | # CONFIG_SMDK6410_SD_CH1 is not set |
| 265 | # CONFIG_SMDK6410_WM1190_EV1 is not set | 291 | # CONFIG_SMDK6410_WM1190_EV1 is not set |
| 266 | # CONFIG_MACH_NCP is not set | 292 | # CONFIG_SMDK6410_WM1192_EV1 is not set |
| 267 | # CONFIG_MACH_HMT is not set | 293 | CONFIG_MACH_NCP=y |
| 294 | CONFIG_MACH_HMT=y | ||
| 295 | CONFIG_MACH_SMARTQ=y | ||
| 296 | CONFIG_MACH_SMARTQ5=y | ||
| 297 | CONFIG_MACH_SMARTQ7=y | ||
| 268 | 298 | ||
| 269 | # | 299 | # |
| 270 | # Processor Type | 300 | # Processor Type |
| @@ -290,6 +320,8 @@ CONFIG_ARM_THUMB=y | |||
| 290 | # CONFIG_CPU_DCACHE_DISABLE is not set | 320 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 291 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 321 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 292 | CONFIG_ARM_L1_CACHE_SHIFT=5 | 322 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 323 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 324 | CONFIG_CPU_HAS_PMU=y | ||
| 293 | # CONFIG_ARM_ERRATA_411920 is not set | 325 | # CONFIG_ARM_ERRATA_411920 is not set |
| 294 | CONFIG_ARM_VIC=y | 326 | CONFIG_ARM_VIC=y |
| 295 | CONFIG_ARM_VIC_NR=2 | 327 | CONFIG_ARM_VIC_NR=2 |
| @@ -339,6 +371,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 339 | CONFIG_ZBOOT_ROM_TEXT=0 | 371 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 340 | CONFIG_ZBOOT_ROM_BSS=0 | 372 | CONFIG_ZBOOT_ROM_BSS=0 |
| 341 | CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144" | 373 | CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/linuxrc initrd=0x51000000,6M ramdisk_size=6144" |
| 374 | # CONFIG_CMDLINE_FORCE is not set | ||
| 342 | # CONFIG_XIP_KERNEL is not set | 375 | # CONFIG_XIP_KERNEL is not set |
| 343 | # CONFIG_KEXEC is not set | 376 | # CONFIG_KEXEC is not set |
| 344 | 377 | ||
| @@ -371,7 +404,14 @@ CONFIG_HAVE_AOUT=y | |||
| 371 | # | 404 | # |
| 372 | # Power management options | 405 | # Power management options |
| 373 | # | 406 | # |
| 374 | # CONFIG_PM is not set | 407 | CONFIG_PM=y |
| 408 | # CONFIG_PM_DEBUG is not set | ||
| 409 | CONFIG_PM_SLEEP=y | ||
| 410 | CONFIG_SUSPEND=y | ||
| 411 | CONFIG_SUSPEND_FREEZER=y | ||
| 412 | # CONFIG_APM_EMULATION is not set | ||
| 413 | # CONFIG_PM_RUNTIME is not set | ||
| 414 | CONFIG_PM_OPS=y | ||
| 375 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 415 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
| 376 | # CONFIG_NET is not set | 416 | # CONFIG_NET is not set |
| 377 | 417 | ||
| @@ -392,7 +432,96 @@ CONFIG_EXTRA_FIRMWARE="" | |||
| 392 | # CONFIG_DEBUG_DRIVER is not set | 432 | # CONFIG_DEBUG_DRIVER is not set |
| 393 | # CONFIG_DEBUG_DEVRES is not set | 433 | # CONFIG_DEBUG_DEVRES is not set |
| 394 | # CONFIG_SYS_HYPERVISOR is not set | 434 | # CONFIG_SYS_HYPERVISOR is not set |
| 395 | # CONFIG_MTD is not set | 435 | CONFIG_MTD=y |
| 436 | # CONFIG_MTD_DEBUG is not set | ||
| 437 | # CONFIG_MTD_TESTS is not set | ||
| 438 | # CONFIG_MTD_CONCAT is not set | ||
| 439 | # CONFIG_MTD_PARTITIONS is not set | ||
| 440 | |||
| 441 | # | ||
| 442 | # User Modules And Translation Layers | ||
| 443 | # | ||
| 444 | # CONFIG_MTD_CHAR is not set | ||
| 445 | # CONFIG_MTD_BLKDEVS is not set | ||
| 446 | # CONFIG_MTD_BLOCK is not set | ||
| 447 | # CONFIG_MTD_BLOCK_RO is not set | ||
| 448 | # CONFIG_FTL is not set | ||
| 449 | # CONFIG_NFTL is not set | ||
| 450 | # CONFIG_INFTL is not set | ||
| 451 | # CONFIG_RFD_FTL is not set | ||
| 452 | # CONFIG_SSFDC is not set | ||
| 453 | # CONFIG_SM_FTL is not set | ||
| 454 | # CONFIG_MTD_OOPS is not set | ||
| 455 | |||
| 456 | # | ||
| 457 | # RAM/ROM/Flash chip drivers | ||
| 458 | # | ||
| 459 | # CONFIG_MTD_CFI is not set | ||
| 460 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 461 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 462 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 463 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 464 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 465 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 466 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 467 | CONFIG_MTD_CFI_I1=y | ||
| 468 | CONFIG_MTD_CFI_I2=y | ||
| 469 | # CONFIG_MTD_CFI_I4 is not set | ||
| 470 | # CONFIG_MTD_CFI_I8 is not set | ||
| 471 | # CONFIG_MTD_RAM is not set | ||
| 472 | # CONFIG_MTD_ROM is not set | ||
| 473 | # CONFIG_MTD_ABSENT is not set | ||
| 474 | |||
| 475 | # | ||
| 476 | # Mapping drivers for chip access | ||
| 477 | # | ||
| 478 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 479 | # CONFIG_MTD_PLATRAM is not set | ||
| 480 | |||
| 481 | # | ||
| 482 | # Self-contained MTD device drivers | ||
| 483 | # | ||
| 484 | # CONFIG_MTD_DATAFLASH is not set | ||
| 485 | # CONFIG_MTD_M25P80 is not set | ||
| 486 | # CONFIG_MTD_SST25L is not set | ||
| 487 | # CONFIG_MTD_SLRAM is not set | ||
| 488 | # CONFIG_MTD_PHRAM is not set | ||
| 489 | # CONFIG_MTD_MTDRAM is not set | ||
| 490 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 491 | |||
| 492 | # | ||
| 493 | # Disk-On-Chip Device Drivers | ||
| 494 | # | ||
| 495 | # CONFIG_MTD_DOC2000 is not set | ||
| 496 | # CONFIG_MTD_DOC2001 is not set | ||
| 497 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 498 | CONFIG_MTD_NAND=y | ||
| 499 | CONFIG_MTD_NAND_ECC=y | ||
| 500 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 501 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 502 | # CONFIG_MTD_SM_COMMON is not set | ||
| 503 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 504 | CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR=0xFF108018 | ||
| 505 | # CONFIG_MTD_NAND_GPIO is not set | ||
| 506 | CONFIG_MTD_NAND_IDS=y | ||
| 507 | CONFIG_MTD_NAND_S3C2410=y | ||
| 508 | # CONFIG_MTD_NAND_S3C2410_DEBUG is not set | ||
| 509 | # CONFIG_MTD_NAND_S3C2410_HWECC is not set | ||
| 510 | # CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set | ||
| 511 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 512 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
| 513 | # CONFIG_MTD_ALAUDA is not set | ||
| 514 | # CONFIG_MTD_ONENAND is not set | ||
| 515 | |||
| 516 | # | ||
| 517 | # LPDDR flash memory drivers | ||
| 518 | # | ||
| 519 | # CONFIG_MTD_LPDDR is not set | ||
| 520 | |||
| 521 | # | ||
| 522 | # UBI - Unsorted block images | ||
| 523 | # | ||
| 524 | # CONFIG_MTD_UBI is not set | ||
| 396 | # CONFIG_PARPORT is not set | 525 | # CONFIG_PARPORT is not set |
| 397 | CONFIG_BLK_DEV=y | 526 | CONFIG_BLK_DEV=y |
| 398 | # CONFIG_BLK_DEV_COW_COMMON is not set | 527 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| @@ -402,6 +531,7 @@ CONFIG_BLK_DEV_LOOP=y | |||
| 402 | # | 531 | # |
| 403 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | 532 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected |
| 404 | # | 533 | # |
| 534 | # CONFIG_BLK_DEV_UB is not set | ||
| 405 | CONFIG_BLK_DEV_RAM=y | 535 | CONFIG_BLK_DEV_RAM=y |
| 406 | CONFIG_BLK_DEV_RAM_COUNT=16 | 536 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 407 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 537 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
| @@ -413,13 +543,16 @@ CONFIG_MISC_DEVICES=y | |||
| 413 | # CONFIG_ICS932S401 is not set | 543 | # CONFIG_ICS932S401 is not set |
| 414 | # CONFIG_ENCLOSURE_SERVICES is not set | 544 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 415 | # CONFIG_ISL29003 is not set | 545 | # CONFIG_ISL29003 is not set |
| 546 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 416 | # CONFIG_DS1682 is not set | 547 | # CONFIG_DS1682 is not set |
| 548 | # CONFIG_TI_DAC7512 is not set | ||
| 417 | # CONFIG_C2PORT is not set | 549 | # CONFIG_C2PORT is not set |
| 418 | 550 | ||
| 419 | # | 551 | # |
| 420 | # EEPROM support | 552 | # EEPROM support |
| 421 | # | 553 | # |
| 422 | CONFIG_EEPROM_AT24=y | 554 | CONFIG_EEPROM_AT24=y |
| 555 | # CONFIG_EEPROM_AT25 is not set | ||
| 423 | # CONFIG_EEPROM_LEGACY is not set | 556 | # CONFIG_EEPROM_LEGACY is not set |
| 424 | # CONFIG_EEPROM_MAX6875 is not set | 557 | # CONFIG_EEPROM_MAX6875 is not set |
| 425 | # CONFIG_EEPROM_93CX6 is not set | 558 | # CONFIG_EEPROM_93CX6 is not set |
| @@ -430,6 +563,7 @@ CONFIG_HAVE_IDE=y | |||
| 430 | # | 563 | # |
| 431 | # SCSI device support | 564 | # SCSI device support |
| 432 | # | 565 | # |
| 566 | CONFIG_SCSI_MOD=y | ||
| 433 | # CONFIG_RAID_ATTRS is not set | 567 | # CONFIG_RAID_ATTRS is not set |
| 434 | # CONFIG_SCSI is not set | 568 | # CONFIG_SCSI is not set |
| 435 | # CONFIG_SCSI_DMA is not set | 569 | # CONFIG_SCSI_DMA is not set |
| @@ -466,6 +600,7 @@ CONFIG_KEYBOARD_ATKBD=y | |||
| 466 | # CONFIG_QT2160 is not set | 600 | # CONFIG_QT2160 is not set |
| 467 | # CONFIG_KEYBOARD_LKKBD is not set | 601 | # CONFIG_KEYBOARD_LKKBD is not set |
| 468 | # CONFIG_KEYBOARD_GPIO is not set | 602 | # CONFIG_KEYBOARD_GPIO is not set |
| 603 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 469 | # CONFIG_KEYBOARD_MATRIX is not set | 604 | # CONFIG_KEYBOARD_MATRIX is not set |
| 470 | # CONFIG_KEYBOARD_MAX7359 is not set | 605 | # CONFIG_KEYBOARD_MAX7359 is not set |
| 471 | # CONFIG_KEYBOARD_NEWTON is not set | 606 | # CONFIG_KEYBOARD_NEWTON is not set |
| @@ -527,12 +662,17 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | |||
| 527 | # Non-8250 serial port support | 662 | # Non-8250 serial port support |
| 528 | # | 663 | # |
| 529 | CONFIG_SERIAL_SAMSUNG=y | 664 | CONFIG_SERIAL_SAMSUNG=y |
| 665 | CONFIG_SERIAL_SAMSUNG_UARTS_4=y | ||
| 530 | CONFIG_SERIAL_SAMSUNG_UARTS=4 | 666 | CONFIG_SERIAL_SAMSUNG_UARTS=4 |
| 531 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set | 667 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set |
| 532 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | 668 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
| 533 | CONFIG_SERIAL_S3C6400=y | 669 | CONFIG_SERIAL_S3C6400=y |
| 670 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 534 | CONFIG_SERIAL_CORE=y | 671 | CONFIG_SERIAL_CORE=y |
| 535 | CONFIG_SERIAL_CORE_CONSOLE=y | 672 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 673 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 674 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 675 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 536 | CONFIG_UNIX98_PTYS=y | 676 | CONFIG_UNIX98_PTYS=y |
| 537 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 677 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 538 | CONFIG_LEGACY_PTYS=y | 678 | CONFIG_LEGACY_PTYS=y |
| @@ -561,28 +701,41 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 561 | # CONFIG_I2C_OCORES is not set | 701 | # CONFIG_I2C_OCORES is not set |
| 562 | CONFIG_I2C_S3C2410=y | 702 | CONFIG_I2C_S3C2410=y |
| 563 | # CONFIG_I2C_SIMTEC is not set | 703 | # CONFIG_I2C_SIMTEC is not set |
| 704 | # CONFIG_I2C_XILINX is not set | ||
| 564 | 705 | ||
| 565 | # | 706 | # |
| 566 | # External I2C/SMBus adapter drivers | 707 | # External I2C/SMBus adapter drivers |
| 567 | # | 708 | # |
| 568 | # CONFIG_I2C_PARPORT_LIGHT is not set | 709 | # CONFIG_I2C_PARPORT_LIGHT is not set |
| 569 | # CONFIG_I2C_TAOS_EVM is not set | 710 | # CONFIG_I2C_TAOS_EVM is not set |
| 711 | # CONFIG_I2C_TINY_USB is not set | ||
| 570 | 712 | ||
| 571 | # | 713 | # |
| 572 | # Other I2C/SMBus bus drivers | 714 | # Other I2C/SMBus bus drivers |
| 573 | # | 715 | # |
| 574 | # CONFIG_I2C_PCA_PLATFORM is not set | 716 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 575 | # CONFIG_I2C_STUB is not set | 717 | # CONFIG_I2C_STUB is not set |
| 576 | |||
| 577 | # | ||
| 578 | # Miscellaneous I2C Chip support | ||
| 579 | # | ||
| 580 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 581 | # CONFIG_I2C_DEBUG_CORE is not set | 718 | # CONFIG_I2C_DEBUG_CORE is not set |
| 582 | # CONFIG_I2C_DEBUG_ALGO is not set | 719 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 583 | # CONFIG_I2C_DEBUG_BUS is not set | 720 | # CONFIG_I2C_DEBUG_BUS is not set |
| 584 | # CONFIG_I2C_DEBUG_CHIP is not set | 721 | CONFIG_SPI=y |
| 585 | # CONFIG_SPI is not set | 722 | # CONFIG_SPI_DEBUG is not set |
| 723 | CONFIG_SPI_MASTER=y | ||
| 724 | |||
| 725 | # | ||
| 726 | # SPI Master Controller Drivers | ||
| 727 | # | ||
| 728 | CONFIG_SPI_BITBANG=m | ||
| 729 | CONFIG_SPI_GPIO=m | ||
| 730 | CONFIG_SPI_S3C64XX=m | ||
| 731 | # CONFIG_SPI_XILINX is not set | ||
| 732 | # CONFIG_SPI_DESIGNWARE is not set | ||
| 733 | |||
| 734 | # | ||
| 735 | # SPI Protocol Masters | ||
| 736 | # | ||
| 737 | # CONFIG_SPI_SPIDEV is not set | ||
| 738 | # CONFIG_SPI_TLE62X0 is not set | ||
| 586 | 739 | ||
| 587 | # | 740 | # |
| 588 | # PPS support | 741 | # PPS support |
| @@ -596,10 +749,12 @@ CONFIG_GPIOLIB=y | |||
| 596 | # | 749 | # |
| 597 | # Memory mapped GPIO expanders: | 750 | # Memory mapped GPIO expanders: |
| 598 | # | 751 | # |
| 752 | # CONFIG_GPIO_IT8761E is not set | ||
| 599 | 753 | ||
| 600 | # | 754 | # |
| 601 | # I2C GPIO expanders: | 755 | # I2C GPIO expanders: |
| 602 | # | 756 | # |
| 757 | # CONFIG_GPIO_MAX7300 is not set | ||
| 603 | # CONFIG_GPIO_MAX732X is not set | 758 | # CONFIG_GPIO_MAX732X is not set |
| 604 | # CONFIG_GPIO_PCA953X is not set | 759 | # CONFIG_GPIO_PCA953X is not set |
| 605 | # CONFIG_GPIO_PCF857X is not set | 760 | # CONFIG_GPIO_PCF857X is not set |
| @@ -612,6 +767,9 @@ CONFIG_GPIOLIB=y | |||
| 612 | # | 767 | # |
| 613 | # SPI GPIO expanders: | 768 | # SPI GPIO expanders: |
| 614 | # | 769 | # |
| 770 | # CONFIG_GPIO_MAX7301 is not set | ||
| 771 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 772 | # CONFIG_GPIO_MC33880 is not set | ||
| 615 | 773 | ||
| 616 | # | 774 | # |
| 617 | # AC97 GPIO expanders: | 775 | # AC97 GPIO expanders: |
| @@ -627,16 +785,18 @@ CONFIG_HWMON=y | |||
| 627 | # | 785 | # |
| 628 | # CONFIG_SENSORS_AD7414 is not set | 786 | # CONFIG_SENSORS_AD7414 is not set |
| 629 | # CONFIG_SENSORS_AD7418 is not set | 787 | # CONFIG_SENSORS_AD7418 is not set |
| 788 | # CONFIG_SENSORS_ADCXX is not set | ||
| 630 | # CONFIG_SENSORS_ADM1021 is not set | 789 | # CONFIG_SENSORS_ADM1021 is not set |
| 631 | # CONFIG_SENSORS_ADM1025 is not set | 790 | # CONFIG_SENSORS_ADM1025 is not set |
| 632 | # CONFIG_SENSORS_ADM1026 is not set | 791 | # CONFIG_SENSORS_ADM1026 is not set |
| 633 | # CONFIG_SENSORS_ADM1029 is not set | 792 | # CONFIG_SENSORS_ADM1029 is not set |
| 634 | # CONFIG_SENSORS_ADM1031 is not set | 793 | # CONFIG_SENSORS_ADM1031 is not set |
| 635 | # CONFIG_SENSORS_ADM9240 is not set | 794 | # CONFIG_SENSORS_ADM9240 is not set |
| 795 | # CONFIG_SENSORS_ADT7411 is not set | ||
| 636 | # CONFIG_SENSORS_ADT7462 is not set | 796 | # CONFIG_SENSORS_ADT7462 is not set |
| 637 | # CONFIG_SENSORS_ADT7470 is not set | 797 | # CONFIG_SENSORS_ADT7470 is not set |
| 638 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 639 | # CONFIG_SENSORS_ADT7475 is not set | 798 | # CONFIG_SENSORS_ADT7475 is not set |
| 799 | # CONFIG_SENSORS_ASC7621 is not set | ||
| 640 | # CONFIG_SENSORS_ATXP1 is not set | 800 | # CONFIG_SENSORS_ATXP1 is not set |
| 641 | # CONFIG_SENSORS_DS1621 is not set | 801 | # CONFIG_SENSORS_DS1621 is not set |
| 642 | # CONFIG_SENSORS_F71805F is not set | 802 | # CONFIG_SENSORS_F71805F is not set |
| @@ -647,6 +807,7 @@ CONFIG_HWMON=y | |||
| 647 | # CONFIG_SENSORS_GL520SM is not set | 807 | # CONFIG_SENSORS_GL520SM is not set |
| 648 | # CONFIG_SENSORS_IT87 is not set | 808 | # CONFIG_SENSORS_IT87 is not set |
| 649 | # CONFIG_SENSORS_LM63 is not set | 809 | # CONFIG_SENSORS_LM63 is not set |
| 810 | # CONFIG_SENSORS_LM70 is not set | ||
| 650 | # CONFIG_SENSORS_LM73 is not set | 811 | # CONFIG_SENSORS_LM73 is not set |
| 651 | # CONFIG_SENSORS_LM75 is not set | 812 | # CONFIG_SENSORS_LM75 is not set |
| 652 | # CONFIG_SENSORS_LM77 is not set | 813 | # CONFIG_SENSORS_LM77 is not set |
| @@ -661,6 +822,7 @@ CONFIG_HWMON=y | |||
| 661 | # CONFIG_SENSORS_LTC4215 is not set | 822 | # CONFIG_SENSORS_LTC4215 is not set |
| 662 | # CONFIG_SENSORS_LTC4245 is not set | 823 | # CONFIG_SENSORS_LTC4245 is not set |
| 663 | # CONFIG_SENSORS_LM95241 is not set | 824 | # CONFIG_SENSORS_LM95241 is not set |
| 825 | # CONFIG_SENSORS_MAX1111 is not set | ||
| 664 | # CONFIG_SENSORS_MAX1619 is not set | 826 | # CONFIG_SENSORS_MAX1619 is not set |
| 665 | # CONFIG_SENSORS_MAX6650 is not set | 827 | # CONFIG_SENSORS_MAX6650 is not set |
| 666 | # CONFIG_SENSORS_PC87360 is not set | 828 | # CONFIG_SENSORS_PC87360 is not set |
| @@ -672,6 +834,7 @@ CONFIG_HWMON=y | |||
| 672 | # CONFIG_SENSORS_SMSC47M192 is not set | 834 | # CONFIG_SENSORS_SMSC47M192 is not set |
| 673 | # CONFIG_SENSORS_SMSC47B397 is not set | 835 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 674 | # CONFIG_SENSORS_ADS7828 is not set | 836 | # CONFIG_SENSORS_ADS7828 is not set |
| 837 | # CONFIG_SENSORS_ADS7871 is not set | ||
| 675 | # CONFIG_SENSORS_AMC6821 is not set | 838 | # CONFIG_SENSORS_AMC6821 is not set |
| 676 | # CONFIG_SENSORS_THMC50 is not set | 839 | # CONFIG_SENSORS_THMC50 is not set |
| 677 | # CONFIG_SENSORS_TMP401 is not set | 840 | # CONFIG_SENSORS_TMP401 is not set |
| @@ -685,9 +848,11 @@ CONFIG_HWMON=y | |||
| 685 | # CONFIG_SENSORS_W83L786NG is not set | 848 | # CONFIG_SENSORS_W83L786NG is not set |
| 686 | # CONFIG_SENSORS_W83627HF is not set | 849 | # CONFIG_SENSORS_W83627HF is not set |
| 687 | # CONFIG_SENSORS_W83627EHF is not set | 850 | # CONFIG_SENSORS_W83627EHF is not set |
| 851 | # CONFIG_SENSORS_LIS3_SPI is not set | ||
| 688 | # CONFIG_SENSORS_LIS3_I2C is not set | 852 | # CONFIG_SENSORS_LIS3_I2C is not set |
| 689 | # CONFIG_THERMAL is not set | 853 | # CONFIG_THERMAL is not set |
| 690 | # CONFIG_WATCHDOG is not set | 854 | # CONFIG_WATCHDOG is not set |
| 855 | CONFIG_HAVE_S3C2410_WATCHDOG=y | ||
| 691 | CONFIG_SSB_POSSIBLE=y | 856 | CONFIG_SSB_POSSIBLE=y |
| 692 | 857 | ||
| 693 | # | 858 | # |
| @@ -699,10 +864,13 @@ CONFIG_SSB_POSSIBLE=y | |||
| 699 | # Multifunction device drivers | 864 | # Multifunction device drivers |
| 700 | # | 865 | # |
| 701 | # CONFIG_MFD_CORE is not set | 866 | # CONFIG_MFD_CORE is not set |
| 867 | # CONFIG_MFD_88PM860X is not set | ||
| 702 | # CONFIG_MFD_SM501 is not set | 868 | # CONFIG_MFD_SM501 is not set |
| 703 | # CONFIG_MFD_ASIC3 is not set | 869 | # CONFIG_MFD_ASIC3 is not set |
| 704 | # CONFIG_HTC_EGPIO is not set | 870 | # CONFIG_HTC_EGPIO is not set |
| 705 | # CONFIG_HTC_PASIC3 is not set | 871 | # CONFIG_HTC_PASIC3 is not set |
| 872 | # CONFIG_HTC_I2CPLD is not set | ||
| 873 | # CONFIG_UCB1400_CORE is not set | ||
| 706 | # CONFIG_TPS65010 is not set | 874 | # CONFIG_TPS65010 is not set |
| 707 | # CONFIG_TWL4030_CORE is not set | 875 | # CONFIG_TWL4030_CORE is not set |
| 708 | # CONFIG_MFD_TMIO is not set | 876 | # CONFIG_MFD_TMIO is not set |
| @@ -711,12 +879,16 @@ CONFIG_SSB_POSSIBLE=y | |||
| 711 | # CONFIG_MFD_TC6393XB is not set | 879 | # CONFIG_MFD_TC6393XB is not set |
| 712 | # CONFIG_PMIC_DA903X is not set | 880 | # CONFIG_PMIC_DA903X is not set |
| 713 | # CONFIG_PMIC_ADP5520 is not set | 881 | # CONFIG_PMIC_ADP5520 is not set |
| 882 | # CONFIG_MFD_MAX8925 is not set | ||
| 714 | # CONFIG_MFD_WM8400 is not set | 883 | # CONFIG_MFD_WM8400 is not set |
| 715 | # CONFIG_MFD_WM831X is not set | 884 | # CONFIG_MFD_WM831X is not set |
| 716 | # CONFIG_MFD_WM8350_I2C is not set | 885 | # CONFIG_MFD_WM8350_I2C is not set |
| 886 | # CONFIG_MFD_WM8994 is not set | ||
| 717 | # CONFIG_MFD_PCF50633 is not set | 887 | # CONFIG_MFD_PCF50633 is not set |
| 888 | # CONFIG_MFD_MC13783 is not set | ||
| 718 | # CONFIG_AB3100_CORE is not set | 889 | # CONFIG_AB3100_CORE is not set |
| 719 | # CONFIG_MFD_88PM8607 is not set | 890 | # CONFIG_EZX_PCAP is not set |
| 891 | # CONFIG_AB4500_CORE is not set | ||
| 720 | # CONFIG_REGULATOR is not set | 892 | # CONFIG_REGULATOR is not set |
| 721 | # CONFIG_MEDIA_SUPPORT is not set | 893 | # CONFIG_MEDIA_SUPPORT is not set |
| 722 | 894 | ||
| @@ -725,8 +897,47 @@ CONFIG_SSB_POSSIBLE=y | |||
| 725 | # | 897 | # |
| 726 | # CONFIG_VGASTATE is not set | 898 | # CONFIG_VGASTATE is not set |
| 727 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 899 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
| 728 | # CONFIG_FB is not set | 900 | CONFIG_FB=y |
| 729 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 901 | # CONFIG_FIRMWARE_EDID is not set |
| 902 | # CONFIG_FB_DDC is not set | ||
| 903 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 904 | CONFIG_FB_CFB_FILLRECT=y | ||
| 905 | CONFIG_FB_CFB_COPYAREA=y | ||
| 906 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 907 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 908 | # CONFIG_FB_SYS_FILLRECT is not set | ||
| 909 | # CONFIG_FB_SYS_COPYAREA is not set | ||
| 910 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
| 911 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 912 | # CONFIG_FB_SYS_FOPS is not set | ||
| 913 | # CONFIG_FB_SVGALIB is not set | ||
| 914 | # CONFIG_FB_MACMODES is not set | ||
| 915 | # CONFIG_FB_BACKLIGHT is not set | ||
| 916 | # CONFIG_FB_MODE_HELPERS is not set | ||
| 917 | # CONFIG_FB_TILEBLITTING is not set | ||
| 918 | |||
| 919 | # | ||
| 920 | # Frame buffer hardware drivers | ||
| 921 | # | ||
| 922 | # CONFIG_FB_S1D13XXX is not set | ||
| 923 | CONFIG_FB_S3C=y | ||
| 924 | # CONFIG_FB_S3C_DEBUG_REGWRITE is not set | ||
| 925 | # CONFIG_FB_VIRTUAL is not set | ||
| 926 | # CONFIG_FB_METRONOME is not set | ||
| 927 | # CONFIG_FB_MB862XX is not set | ||
| 928 | # CONFIG_FB_BROADSHEET is not set | ||
| 929 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 930 | CONFIG_LCD_CLASS_DEVICE=y | ||
| 931 | # CONFIG_LCD_L4F00242T03 is not set | ||
| 932 | # CONFIG_LCD_LMS283GF05 is not set | ||
| 933 | CONFIG_LCD_LTV350QV=y | ||
| 934 | # CONFIG_LCD_ILI9320 is not set | ||
| 935 | # CONFIG_LCD_TDO24M is not set | ||
| 936 | # CONFIG_LCD_VGG2432A4 is not set | ||
| 937 | # CONFIG_LCD_PLATFORM is not set | ||
| 938 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
| 939 | CONFIG_BACKLIGHT_GENERIC=y | ||
| 940 | CONFIG_BACKLIGHT_PWM=y | ||
| 730 | 941 | ||
| 731 | # | 942 | # |
| 732 | # Display device support | 943 | # Display device support |
| @@ -738,33 +949,246 @@ CONFIG_SSB_POSSIBLE=y | |||
| 738 | # | 949 | # |
| 739 | # CONFIG_VGA_CONSOLE is not set | 950 | # CONFIG_VGA_CONSOLE is not set |
| 740 | CONFIG_DUMMY_CONSOLE=y | 951 | CONFIG_DUMMY_CONSOLE=y |
| 741 | # CONFIG_SOUND is not set | 952 | # CONFIG_FRAMEBUFFER_CONSOLE is not set |
| 953 | # CONFIG_LOGO is not set | ||
| 954 | CONFIG_SOUND=y | ||
| 955 | CONFIG_SOUND_OSS_CORE=y | ||
| 956 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
| 957 | CONFIG_SND=m | ||
| 958 | CONFIG_SND_TIMER=m | ||
| 959 | CONFIG_SND_PCM=m | ||
| 960 | CONFIG_SND_JACK=y | ||
| 961 | # CONFIG_SND_SEQUENCER is not set | ||
| 962 | CONFIG_SND_OSSEMUL=y | ||
| 963 | CONFIG_SND_MIXER_OSS=m | ||
| 964 | CONFIG_SND_PCM_OSS=m | ||
| 965 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 966 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
| 967 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 968 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 969 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 970 | # CONFIG_SND_DEBUG is not set | ||
| 971 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
| 972 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 973 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 974 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 975 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 976 | CONFIG_SND_DRIVERS=y | ||
| 977 | # CONFIG_SND_DUMMY is not set | ||
| 978 | # CONFIG_SND_MTPAV is not set | ||
| 979 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 980 | # CONFIG_SND_MPU401 is not set | ||
| 981 | CONFIG_SND_ARM=y | ||
| 982 | CONFIG_SND_SPI=y | ||
| 983 | CONFIG_SND_USB=y | ||
| 984 | # CONFIG_SND_USB_AUDIO is not set | ||
| 985 | # CONFIG_SND_USB_UA101 is not set | ||
| 986 | # CONFIG_SND_USB_CAIAQ is not set | ||
| 987 | CONFIG_SND_SOC=m | ||
| 988 | CONFIG_SND_SOC_AC97_BUS=y | ||
| 989 | CONFIG_SND_S3C24XX_SOC=m | ||
| 990 | CONFIG_SND_S3C_SOC_AC97=m | ||
| 991 | # CONFIG_SND_S3C64XX_SOC_WM8580 is not set | ||
| 992 | CONFIG_SND_SOC_SMDK_WM9713=m | ||
| 993 | CONFIG_SND_SOC_I2C_AND_SPI=m | ||
| 994 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 995 | CONFIG_SND_SOC_WM9713=m | ||
| 996 | # CONFIG_SOUND_PRIME is not set | ||
| 997 | CONFIG_AC97_BUS=m | ||
| 742 | CONFIG_HID_SUPPORT=y | 998 | CONFIG_HID_SUPPORT=y |
| 743 | CONFIG_HID=y | 999 | CONFIG_HID=y |
| 744 | # CONFIG_HIDRAW is not set | 1000 | # CONFIG_HIDRAW is not set |
| 1001 | |||
| 1002 | # | ||
| 1003 | # USB Input Devices | ||
| 1004 | # | ||
| 1005 | CONFIG_USB_HID=y | ||
| 745 | # CONFIG_HID_PID is not set | 1006 | # CONFIG_HID_PID is not set |
| 1007 | # CONFIG_USB_HIDDEV is not set | ||
| 746 | 1008 | ||
| 747 | # | 1009 | # |
| 748 | # Special HID drivers | 1010 | # Special HID drivers |
| 749 | # | 1011 | # |
| 1012 | # CONFIG_HID_3M_PCT is not set | ||
| 1013 | CONFIG_HID_A4TECH=y | ||
| 1014 | CONFIG_HID_APPLE=y | ||
| 1015 | CONFIG_HID_BELKIN=y | ||
| 1016 | # CONFIG_HID_CANDO is not set | ||
| 1017 | CONFIG_HID_CHERRY=y | ||
| 1018 | CONFIG_HID_CHICONY=y | ||
| 1019 | # CONFIG_HID_PRODIKEYS is not set | ||
| 1020 | CONFIG_HID_CYPRESS=y | ||
| 1021 | # CONFIG_HID_DRAGONRISE is not set | ||
| 1022 | # CONFIG_HID_EGALAX is not set | ||
| 1023 | CONFIG_HID_EZKEY=y | ||
| 1024 | CONFIG_HID_KYE=y | ||
| 1025 | # CONFIG_HID_GYRATION is not set | ||
| 1026 | # CONFIG_HID_TWINHAN is not set | ||
| 1027 | CONFIG_HID_KENSINGTON=y | ||
| 1028 | CONFIG_HID_LOGITECH=y | ||
| 1029 | # CONFIG_LOGITECH_FF is not set | ||
| 1030 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
| 1031 | # CONFIG_LOGIG940_FF is not set | ||
| 1032 | CONFIG_HID_MICROSOFT=y | ||
| 1033 | # CONFIG_HID_MOSART is not set | ||
| 1034 | CONFIG_HID_MONTEREY=y | ||
| 1035 | # CONFIG_HID_NTRIG is not set | ||
| 1036 | # CONFIG_HID_ORTEK is not set | ||
| 1037 | # CONFIG_HID_PANTHERLORD is not set | ||
| 1038 | # CONFIG_HID_PETALYNX is not set | ||
| 1039 | # CONFIG_HID_PICOLCD is not set | ||
| 1040 | # CONFIG_HID_QUANTA is not set | ||
| 1041 | # CONFIG_HID_ROCCAT_KONE is not set | ||
| 1042 | # CONFIG_HID_SAMSUNG is not set | ||
| 1043 | # CONFIG_HID_SONY is not set | ||
| 1044 | # CONFIG_HID_STANTUM is not set | ||
| 1045 | # CONFIG_HID_SUNPLUS is not set | ||
| 1046 | # CONFIG_HID_GREENASIA is not set | ||
| 1047 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 1048 | # CONFIG_HID_TOPSEED is not set | ||
| 1049 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 1050 | # CONFIG_HID_ZEROPLUS is not set | ||
| 1051 | # CONFIG_HID_ZYDACRON is not set | ||
| 750 | CONFIG_USB_SUPPORT=y | 1052 | CONFIG_USB_SUPPORT=y |
| 751 | CONFIG_USB_ARCH_HAS_HCD=y | 1053 | CONFIG_USB_ARCH_HAS_HCD=y |
| 752 | CONFIG_USB_ARCH_HAS_OHCI=y | 1054 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 753 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 1055 | # CONFIG_USB_ARCH_HAS_EHCI is not set |
| 754 | # CONFIG_USB is not set | 1056 | CONFIG_USB=y |
| 1057 | # CONFIG_USB_DEBUG is not set | ||
| 1058 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 1059 | |||
| 1060 | # | ||
| 1061 | # Miscellaneous USB options | ||
| 1062 | # | ||
| 1063 | CONFIG_USB_DEVICEFS=y | ||
| 1064 | CONFIG_USB_DEVICE_CLASS=y | ||
| 1065 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 1066 | # CONFIG_USB_MON is not set | ||
| 1067 | # CONFIG_USB_WUSB is not set | ||
| 1068 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 1069 | |||
| 1070 | # | ||
| 1071 | # USB Host Controller Drivers | ||
| 1072 | # | ||
| 1073 | # CONFIG_USB_C67X00_HCD is not set | ||
| 1074 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 1075 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 1076 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 1077 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 1078 | CONFIG_USB_OHCI_HCD=y | ||
| 1079 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
| 1080 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
| 1081 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
| 1082 | # CONFIG_USB_SL811_HCD is not set | ||
| 1083 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 1084 | # CONFIG_USB_HWA_HCD is not set | ||
| 1085 | # CONFIG_USB_MUSB_HDRC is not set | ||
| 755 | 1086 | ||
| 756 | # | 1087 | # |
| 757 | # Enable Host or Gadget support to see Inventra options | 1088 | # USB Device Class drivers |
| 758 | # | 1089 | # |
| 1090 | CONFIG_USB_ACM=m | ||
| 1091 | CONFIG_USB_PRINTER=m | ||
| 1092 | # CONFIG_USB_WDM is not set | ||
| 1093 | # CONFIG_USB_TMC is not set | ||
| 759 | 1094 | ||
| 760 | # | 1095 | # |
| 761 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | 1096 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may |
| 762 | # | 1097 | # |
| 1098 | |||
| 1099 | # | ||
| 1100 | # also be needed; see USB_STORAGE Help for more info | ||
| 1101 | # | ||
| 1102 | # CONFIG_USB_LIBUSUAL is not set | ||
| 1103 | |||
| 1104 | # | ||
| 1105 | # USB Imaging devices | ||
| 1106 | # | ||
| 1107 | # CONFIG_USB_MDC800 is not set | ||
| 1108 | |||
| 1109 | # | ||
| 1110 | # USB port drivers | ||
| 1111 | # | ||
| 1112 | CONFIG_USB_SERIAL=m | ||
| 1113 | # CONFIG_USB_EZUSB is not set | ||
| 1114 | CONFIG_USB_SERIAL_GENERIC=y | ||
| 1115 | # CONFIG_USB_SERIAL_AIRCABLE is not set | ||
| 1116 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
| 1117 | # CONFIG_USB_SERIAL_BELKIN is not set | ||
| 1118 | # CONFIG_USB_SERIAL_CH341 is not set | ||
| 1119 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
| 1120 | # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | ||
| 1121 | # CONFIG_USB_SERIAL_CP210X is not set | ||
| 1122 | # CONFIG_USB_SERIAL_CYPRESS_M8 is not set | ||
| 1123 | CONFIG_USB_SERIAL_EMPEG=m | ||
| 1124 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
| 1125 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
| 1126 | # CONFIG_USB_SERIAL_VISOR is not set | ||
| 1127 | # CONFIG_USB_SERIAL_IPAQ is not set | ||
| 1128 | # CONFIG_USB_SERIAL_IR is not set | ||
| 1129 | # CONFIG_USB_SERIAL_EDGEPORT is not set | ||
| 1130 | # CONFIG_USB_SERIAL_EDGEPORT_TI is not set | ||
| 1131 | # CONFIG_USB_SERIAL_GARMIN is not set | ||
| 1132 | # CONFIG_USB_SERIAL_IPW is not set | ||
| 1133 | # CONFIG_USB_SERIAL_IUU is not set | ||
| 1134 | # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | ||
| 1135 | # CONFIG_USB_SERIAL_KEYSPAN is not set | ||
| 1136 | # CONFIG_USB_SERIAL_KLSI is not set | ||
| 1137 | # CONFIG_USB_SERIAL_KOBIL_SCT is not set | ||
| 1138 | # CONFIG_USB_SERIAL_MCT_U232 is not set | ||
| 1139 | # CONFIG_USB_SERIAL_MOS7720 is not set | ||
| 1140 | # CONFIG_USB_SERIAL_MOS7840 is not set | ||
| 1141 | # CONFIG_USB_SERIAL_MOTOROLA is not set | ||
| 1142 | # CONFIG_USB_SERIAL_NAVMAN is not set | ||
| 1143 | CONFIG_USB_SERIAL_PL2303=m | ||
| 1144 | # CONFIG_USB_SERIAL_OTI6858 is not set | ||
| 1145 | # CONFIG_USB_SERIAL_QCAUX is not set | ||
| 1146 | # CONFIG_USB_SERIAL_QUALCOMM is not set | ||
| 1147 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | ||
| 1148 | # CONFIG_USB_SERIAL_HP4X is not set | ||
| 1149 | # CONFIG_USB_SERIAL_SAFE is not set | ||
| 1150 | # CONFIG_USB_SERIAL_SIEMENS_MPI is not set | ||
| 1151 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
| 1152 | # CONFIG_USB_SERIAL_SYMBOL is not set | ||
| 1153 | # CONFIG_USB_SERIAL_TI is not set | ||
| 1154 | # CONFIG_USB_SERIAL_CYBERJACK is not set | ||
| 1155 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
| 1156 | # CONFIG_USB_SERIAL_OPTION is not set | ||
| 1157 | # CONFIG_USB_SERIAL_OMNINET is not set | ||
| 1158 | # CONFIG_USB_SERIAL_OPTICON is not set | ||
| 1159 | # CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set | ||
| 1160 | # CONFIG_USB_SERIAL_ZIO is not set | ||
| 1161 | # CONFIG_USB_SERIAL_DEBUG is not set | ||
| 1162 | |||
| 1163 | # | ||
| 1164 | # USB Miscellaneous drivers | ||
| 1165 | # | ||
| 1166 | # CONFIG_USB_EMI62 is not set | ||
| 1167 | # CONFIG_USB_EMI26 is not set | ||
| 1168 | # CONFIG_USB_ADUTUX is not set | ||
| 1169 | # CONFIG_USB_SEVSEG is not set | ||
| 1170 | # CONFIG_USB_RIO500 is not set | ||
| 1171 | # CONFIG_USB_LEGOTOWER is not set | ||
| 1172 | # CONFIG_USB_LCD is not set | ||
| 1173 | # CONFIG_USB_LED is not set | ||
| 1174 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
| 1175 | # CONFIG_USB_CYTHERM is not set | ||
| 1176 | # CONFIG_USB_IDMOUSE is not set | ||
| 1177 | # CONFIG_USB_FTDI_ELAN is not set | ||
| 1178 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 1179 | # CONFIG_USB_LD is not set | ||
| 1180 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
| 1181 | # CONFIG_USB_IOWARRIOR is not set | ||
| 1182 | # CONFIG_USB_TEST is not set | ||
| 1183 | # CONFIG_USB_ISIGHTFW is not set | ||
| 763 | # CONFIG_USB_GADGET is not set | 1184 | # CONFIG_USB_GADGET is not set |
| 764 | 1185 | ||
| 765 | # | 1186 | # |
| 766 | # OTG and related infrastructure | 1187 | # OTG and related infrastructure |
| 767 | # | 1188 | # |
| 1189 | # CONFIG_USB_GPIO_VBUS is not set | ||
| 1190 | # CONFIG_USB_ULPI is not set | ||
| 1191 | # CONFIG_NOP_USB_XCEIV is not set | ||
| 768 | CONFIG_MMC=y | 1192 | CONFIG_MMC=y |
| 769 | CONFIG_MMC_DEBUG=y | 1193 | CONFIG_MMC_DEBUG=y |
| 770 | CONFIG_MMC_UNSAFE_RESUME=y | 1194 | CONFIG_MMC_UNSAFE_RESUME=y |
| @@ -784,20 +1208,80 @@ CONFIG_MMC_SDHCI=y | |||
| 784 | # CONFIG_MMC_SDHCI_PLTFM is not set | 1208 | # CONFIG_MMC_SDHCI_PLTFM is not set |
| 785 | CONFIG_MMC_SDHCI_S3C=y | 1209 | CONFIG_MMC_SDHCI_S3C=y |
| 786 | # CONFIG_MMC_SDHCI_S3C_DMA is not set | 1210 | # CONFIG_MMC_SDHCI_S3C_DMA is not set |
| 787 | # CONFIG_MMC_AT91 is not set | 1211 | # CONFIG_MMC_SPI is not set |
| 788 | # CONFIG_MMC_ATMELMCI is not set | ||
| 789 | # CONFIG_MEMSTICK is not set | 1212 | # CONFIG_MEMSTICK is not set |
| 790 | # CONFIG_NEW_LEDS is not set | 1213 | # CONFIG_NEW_LEDS is not set |
| 791 | # CONFIG_ACCESSIBILITY is not set | 1214 | # CONFIG_ACCESSIBILITY is not set |
| 792 | CONFIG_RTC_LIB=y | 1215 | CONFIG_RTC_LIB=y |
| 793 | # CONFIG_RTC_CLASS is not set | 1216 | CONFIG_RTC_CLASS=y |
| 794 | # CONFIG_DMADEVICES is not set | 1217 | CONFIG_RTC_HCTOSYS=y |
| 795 | # CONFIG_AUXDISPLAY is not set | 1218 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" |
| 796 | # CONFIG_UIO is not set | 1219 | # CONFIG_RTC_DEBUG is not set |
| 1220 | |||
| 1221 | # | ||
| 1222 | # RTC interfaces | ||
| 1223 | # | ||
| 1224 | CONFIG_RTC_INTF_SYSFS=y | ||
| 1225 | CONFIG_RTC_INTF_PROC=y | ||
| 1226 | CONFIG_RTC_INTF_DEV=y | ||
| 1227 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 1228 | # CONFIG_RTC_DRV_TEST is not set | ||
| 1229 | |||
| 1230 | # | ||
| 1231 | # I2C RTC drivers | ||
| 1232 | # | ||
| 1233 | # CONFIG_RTC_DRV_DS1307 is not set | ||
| 1234 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 1235 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 1236 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 1237 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 1238 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 1239 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 1240 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 1241 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 1242 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 1243 | # CONFIG_RTC_DRV_BQ32K is not set | ||
| 1244 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 1245 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 1246 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 1247 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 1248 | |||
| 1249 | # | ||
| 1250 | # SPI RTC drivers | ||
| 1251 | # | ||
| 1252 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 1253 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 1254 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 1255 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 1256 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 1257 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 1258 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 1259 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 1260 | |||
| 1261 | # | ||
| 1262 | # Platform RTC drivers | ||
| 1263 | # | ||
| 1264 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 1265 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 1266 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 1267 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 1268 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 1269 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 1270 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 1271 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 1272 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 1273 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
| 1274 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 1275 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
| 1276 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 797 | 1277 | ||
| 798 | # | 1278 | # |
| 799 | # TI VLYNQ | 1279 | # on-CPU RTC drivers |
| 800 | # | 1280 | # |
| 1281 | CONFIG_RTC_DRV_S3C=y | ||
| 1282 | # CONFIG_DMADEVICES is not set | ||
| 1283 | # CONFIG_AUXDISPLAY is not set | ||
| 1284 | # CONFIG_UIO is not set | ||
| 801 | # CONFIG_STAGING is not set | 1285 | # CONFIG_STAGING is not set |
| 802 | 1286 | ||
| 803 | # | 1287 | # |
| @@ -869,6 +1353,8 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 869 | # CONFIG_BEFS_FS is not set | 1353 | # CONFIG_BEFS_FS is not set |
| 870 | # CONFIG_BFS_FS is not set | 1354 | # CONFIG_BFS_FS is not set |
| 871 | # CONFIG_EFS_FS is not set | 1355 | # CONFIG_EFS_FS is not set |
| 1356 | # CONFIG_JFFS2_FS is not set | ||
| 1357 | # CONFIG_LOGFS is not set | ||
| 872 | CONFIG_CRAMFS=y | 1358 | CONFIG_CRAMFS=y |
| 873 | # CONFIG_SQUASHFS is not set | 1359 | # CONFIG_SQUASHFS is not set |
| 874 | # CONFIG_VXFS_FS is not set | 1360 | # CONFIG_VXFS_FS is not set |
| @@ -889,7 +1375,46 @@ CONFIG_ROMFS_ON_BLOCK=y | |||
| 889 | # | 1375 | # |
| 890 | # CONFIG_PARTITION_ADVANCED is not set | 1376 | # CONFIG_PARTITION_ADVANCED is not set |
| 891 | CONFIG_MSDOS_PARTITION=y | 1377 | CONFIG_MSDOS_PARTITION=y |
| 892 | # CONFIG_NLS is not set | 1378 | CONFIG_NLS=y |
| 1379 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 1380 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
| 1381 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
| 1382 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
| 1383 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
| 1384 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
| 1385 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
| 1386 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
| 1387 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
| 1388 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
| 1389 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
| 1390 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
| 1391 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
| 1392 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
| 1393 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
| 1394 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
| 1395 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
| 1396 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
| 1397 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
| 1398 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
| 1399 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
| 1400 | # CONFIG_NLS_ISO8859_8 is not set | ||
| 1401 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
| 1402 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
| 1403 | # CONFIG_NLS_ASCII is not set | ||
| 1404 | # CONFIG_NLS_ISO8859_1 is not set | ||
| 1405 | # CONFIG_NLS_ISO8859_2 is not set | ||
| 1406 | # CONFIG_NLS_ISO8859_3 is not set | ||
| 1407 | # CONFIG_NLS_ISO8859_4 is not set | ||
| 1408 | # CONFIG_NLS_ISO8859_5 is not set | ||
| 1409 | # CONFIG_NLS_ISO8859_6 is not set | ||
| 1410 | # CONFIG_NLS_ISO8859_7 is not set | ||
| 1411 | # CONFIG_NLS_ISO8859_9 is not set | ||
| 1412 | # CONFIG_NLS_ISO8859_13 is not set | ||
| 1413 | # CONFIG_NLS_ISO8859_14 is not set | ||
| 1414 | # CONFIG_NLS_ISO8859_15 is not set | ||
| 1415 | # CONFIG_NLS_KOI8_R is not set | ||
| 1416 | # CONFIG_NLS_KOI8_U is not set | ||
| 1417 | # CONFIG_NLS_UTF8 is not set | ||
| 893 | 1418 | ||
| 894 | # | 1419 | # |
| 895 | # Kernel hacking | 1420 | # Kernel hacking |
| @@ -952,6 +1477,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 952 | CONFIG_TRACING_SUPPORT=y | 1477 | CONFIG_TRACING_SUPPORT=y |
| 953 | CONFIG_FTRACE=y | 1478 | CONFIG_FTRACE=y |
| 954 | # CONFIG_FUNCTION_TRACER is not set | 1479 | # CONFIG_FUNCTION_TRACER is not set |
| 1480 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 955 | # CONFIG_SCHED_TRACER is not set | 1481 | # CONFIG_SCHED_TRACER is not set |
| 956 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 1482 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 957 | # CONFIG_BOOT_TRACER is not set | 1483 | # CONFIG_BOOT_TRACER is not set |
| @@ -962,6 +1488,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 962 | # CONFIG_KMEMTRACE is not set | 1488 | # CONFIG_KMEMTRACE is not set |
| 963 | # CONFIG_WORKQUEUE_TRACER is not set | 1489 | # CONFIG_WORKQUEUE_TRACER is not set |
| 964 | # CONFIG_BLK_DEV_IO_TRACE is not set | 1490 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 1491 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 965 | # CONFIG_SAMPLES is not set | 1492 | # CONFIG_SAMPLES is not set |
| 966 | CONFIG_HAVE_ARCH_KGDB=y | 1493 | CONFIG_HAVE_ARCH_KGDB=y |
| 967 | # CONFIG_KGDB is not set | 1494 | # CONFIG_KGDB is not set |
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p6440_defconfig index 279a15e53114..532e987beb4d 100644 --- a/arch/arm/configs/s5p6440_defconfig +++ b/arch/arm/configs/s5p6440_defconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc2 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Sat Jan 9 16:33:55 2010 | 4 | # Wed May 26 19:04:32 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -17,6 +20,7 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 18 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 21 | CONFIG_VECTORS_BASE=0xffff0000 | 25 | CONFIG_VECTORS_BASE=0xffff0000 |
| 22 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| @@ -30,6 +34,13 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 30 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 34 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 31 | CONFIG_LOCALVERSION="" | 35 | CONFIG_LOCALVERSION="" |
| 32 | CONFIG_LOCALVERSION_AUTO=y | 36 | CONFIG_LOCALVERSION_AUTO=y |
| 37 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 38 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 39 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 40 | CONFIG_KERNEL_GZIP=y | ||
| 41 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 42 | # CONFIG_KERNEL_LZMA is not set | ||
| 43 | # CONFIG_KERNEL_LZO is not set | ||
| 33 | CONFIG_SWAP=y | 44 | CONFIG_SWAP=y |
| 34 | # CONFIG_SYSVIPC is not set | 45 | # CONFIG_SYSVIPC is not set |
| 35 | # CONFIG_BSD_PROCESS_ACCT is not set | 46 | # CONFIG_BSD_PROCESS_ACCT is not set |
| @@ -46,7 +57,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 46 | # CONFIG_TREE_RCU_TRACE is not set | 57 | # CONFIG_TREE_RCU_TRACE is not set |
| 47 | # CONFIG_IKCONFIG is not set | 58 | # CONFIG_IKCONFIG is not set |
| 48 | CONFIG_LOG_BUF_SHIFT=17 | 59 | CONFIG_LOG_BUF_SHIFT=17 |
| 49 | # CONFIG_GROUP_SCHED is not set | ||
| 50 | # CONFIG_CGROUPS is not set | 60 | # CONFIG_CGROUPS is not set |
| 51 | CONFIG_SYSFS_DEPRECATED=y | 61 | CONFIG_SYSFS_DEPRECATED=y |
| 52 | CONFIG_SYSFS_DEPRECATED_V2=y | 62 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -60,6 +70,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 60 | CONFIG_RD_GZIP=y | 70 | CONFIG_RD_GZIP=y |
| 61 | CONFIG_RD_BZIP2=y | 71 | CONFIG_RD_BZIP2=y |
| 62 | CONFIG_RD_LZMA=y | 72 | CONFIG_RD_LZMA=y |
| 73 | CONFIG_RD_LZO=y | ||
| 63 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 74 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 64 | CONFIG_SYSCTL=y | 75 | CONFIG_SYSCTL=y |
| 65 | CONFIG_ANON_INODES=y | 76 | CONFIG_ANON_INODES=y |
| @@ -81,10 +92,14 @@ CONFIG_TIMERFD=y | |||
| 81 | CONFIG_EVENTFD=y | 92 | CONFIG_EVENTFD=y |
| 82 | CONFIG_SHMEM=y | 93 | CONFIG_SHMEM=y |
| 83 | CONFIG_AIO=y | 94 | CONFIG_AIO=y |
| 95 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 96 | CONFIG_PERF_USE_VMALLOC=y | ||
| 84 | 97 | ||
| 85 | # | 98 | # |
| 86 | # Kernel Performance Events And Counters | 99 | # Kernel Performance Events And Counters |
| 87 | # | 100 | # |
| 101 | # CONFIG_PERF_EVENTS is not set | ||
| 102 | # CONFIG_PERF_COUNTERS is not set | ||
| 88 | CONFIG_VM_EVENT_COUNTERS=y | 103 | CONFIG_VM_EVENT_COUNTERS=y |
| 89 | CONFIG_SLUB_DEBUG=y | 104 | CONFIG_SLUB_DEBUG=y |
| 90 | CONFIG_COMPAT_BRK=y | 105 | CONFIG_COMPAT_BRK=y |
| @@ -166,8 +181,11 @@ CONFIG_MMU=y | |||
| 166 | # CONFIG_ARCH_INTEGRATOR is not set | 181 | # CONFIG_ARCH_INTEGRATOR is not set |
| 167 | # CONFIG_ARCH_REALVIEW is not set | 182 | # CONFIG_ARCH_REALVIEW is not set |
| 168 | # CONFIG_ARCH_VERSATILE is not set | 183 | # CONFIG_ARCH_VERSATILE is not set |
| 184 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 169 | # CONFIG_ARCH_AT91 is not set | 185 | # CONFIG_ARCH_AT91 is not set |
| 186 | # CONFIG_ARCH_BCMRING is not set | ||
| 170 | # CONFIG_ARCH_CLPS711X is not set | 187 | # CONFIG_ARCH_CLPS711X is not set |
| 188 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 171 | # CONFIG_ARCH_GEMINI is not set | 189 | # CONFIG_ARCH_GEMINI is not set |
| 172 | # CONFIG_ARCH_EBSA110 is not set | 190 | # CONFIG_ARCH_EBSA110 is not set |
| 173 | # CONFIG_ARCH_EP93XX is not set | 191 | # CONFIG_ARCH_EP93XX is not set |
| @@ -176,7 +194,6 @@ CONFIG_MMU=y | |||
| 176 | # CONFIG_ARCH_STMP3XXX is not set | 194 | # CONFIG_ARCH_STMP3XXX is not set |
| 177 | # CONFIG_ARCH_NETX is not set | 195 | # CONFIG_ARCH_NETX is not set |
| 178 | # CONFIG_ARCH_H720X is not set | 196 | # CONFIG_ARCH_H720X is not set |
| 179 | # CONFIG_ARCH_NOMADIK is not set | ||
| 180 | # CONFIG_ARCH_IOP13XX is not set | 197 | # CONFIG_ARCH_IOP13XX is not set |
| 181 | # CONFIG_ARCH_IOP32X is not set | 198 | # CONFIG_ARCH_IOP32X is not set |
| 182 | # CONFIG_ARCH_IOP33X is not set | 199 | # CONFIG_ARCH_IOP33X is not set |
| @@ -193,44 +210,56 @@ CONFIG_MMU=y | |||
| 193 | # CONFIG_ARCH_KS8695 is not set | 210 | # CONFIG_ARCH_KS8695 is not set |
| 194 | # CONFIG_ARCH_NS9XXX is not set | 211 | # CONFIG_ARCH_NS9XXX is not set |
| 195 | # CONFIG_ARCH_W90X900 is not set | 212 | # CONFIG_ARCH_W90X900 is not set |
| 213 | # CONFIG_ARCH_NUC93X is not set | ||
| 196 | # CONFIG_ARCH_PNX4008 is not set | 214 | # CONFIG_ARCH_PNX4008 is not set |
| 197 | # CONFIG_ARCH_PXA is not set | 215 | # CONFIG_ARCH_PXA is not set |
| 198 | # CONFIG_ARCH_MSM is not set | 216 | # CONFIG_ARCH_MSM is not set |
| 217 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 199 | # CONFIG_ARCH_RPC is not set | 218 | # CONFIG_ARCH_RPC is not set |
| 200 | # CONFIG_ARCH_SA1100 is not set | 219 | # CONFIG_ARCH_SA1100 is not set |
| 201 | # CONFIG_ARCH_S3C2410 is not set | 220 | # CONFIG_ARCH_S3C2410 is not set |
| 202 | # CONFIG_ARCH_S3C64XX is not set | 221 | # CONFIG_ARCH_S3C64XX is not set |
| 203 | CONFIG_ARCH_S5P6440=y | 222 | CONFIG_ARCH_S5P6440=y |
| 204 | # CONFIG_ARCH_S5PC1XX is not set | 223 | # CONFIG_ARCH_S5P6442 is not set |
| 224 | # CONFIG_ARCH_S5PC100 is not set | ||
| 225 | # CONFIG_ARCH_S5PV210 is not set | ||
| 205 | # CONFIG_ARCH_SHARK is not set | 226 | # CONFIG_ARCH_SHARK is not set |
| 206 | # CONFIG_ARCH_LH7A40X is not set | 227 | # CONFIG_ARCH_LH7A40X is not set |
| 207 | # CONFIG_ARCH_U300 is not set | 228 | # CONFIG_ARCH_U300 is not set |
| 229 | # CONFIG_ARCH_U8500 is not set | ||
| 230 | # CONFIG_ARCH_NOMADIK is not set | ||
| 208 | # CONFIG_ARCH_DAVINCI is not set | 231 | # CONFIG_ARCH_DAVINCI is not set |
| 209 | # CONFIG_ARCH_OMAP is not set | 232 | # CONFIG_ARCH_OMAP is not set |
| 210 | # CONFIG_ARCH_BCMRING is not set | 233 | # CONFIG_PLAT_SPEAR is not set |
| 211 | # CONFIG_ARCH_U8500 is not set | ||
| 212 | CONFIG_PLAT_SAMSUNG=y | 234 | CONFIG_PLAT_SAMSUNG=y |
| 213 | CONFIG_SAMSUNG_CLKSRC=y | ||
| 214 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | ||
| 215 | CONFIG_SAMSUNG_IRQ_UART=y | ||
| 216 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | ||
| 217 | CONFIG_PLAT_S3C=y | ||
| 218 | 235 | ||
| 219 | # | 236 | # |
| 220 | # Boot options | 237 | # Boot options |
| 221 | # | 238 | # |
| 222 | CONFIG_S3C_BOOT_ERROR_RESET=y | 239 | CONFIG_S3C_BOOT_ERROR_RESET=y |
| 223 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | 240 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y |
| 241 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
| 242 | CONFIG_SAMSUNG_CLKSRC=y | ||
| 243 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | ||
| 244 | CONFIG_SAMSUNG_IRQ_UART=y | ||
| 245 | CONFIG_SAMSUNG_GPIOLIB_4BIT=y | ||
| 246 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | ||
| 247 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | ||
| 248 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | ||
| 249 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 250 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | ||
| 251 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 252 | CONFIG_S3C_GPIO_TRACK=y | ||
| 253 | # CONFIG_S3C_ADC is not set | ||
| 254 | CONFIG_S3C_DEV_WDT=y | ||
| 255 | CONFIG_SAMSUNG_DEV_ADC=y | ||
| 256 | CONFIG_SAMSUNG_DEV_TS=y | ||
| 257 | CONFIG_S3C_PL330_DMA=y | ||
| 224 | 258 | ||
| 225 | # | 259 | # |
| 226 | # Power management | 260 | # Power management |
| 227 | # | 261 | # |
| 228 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
| 229 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 230 | CONFIG_S3C_GPIO_TRACK=y | ||
| 231 | CONFIG_PLAT_S5P=y | 262 | CONFIG_PLAT_S5P=y |
| 232 | CONFIG_CPU_S5P6440_INIT=y | ||
| 233 | CONFIG_CPU_S5P6440_CLOCK=y | ||
| 234 | CONFIG_CPU_S5P6440=y | 263 | CONFIG_CPU_S5P6440=y |
| 235 | CONFIG_MACH_SMDK6440=y | 264 | CONFIG_MACH_SMDK6440=y |
| 236 | 265 | ||
| @@ -258,9 +287,12 @@ CONFIG_ARM_THUMB=y | |||
| 258 | # CONFIG_CPU_DCACHE_DISABLE is not set | 287 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 259 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 288 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 260 | CONFIG_ARM_L1_CACHE_SHIFT=5 | 289 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 290 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 291 | CONFIG_CPU_HAS_PMU=y | ||
| 261 | # CONFIG_ARM_ERRATA_411920 is not set | 292 | # CONFIG_ARM_ERRATA_411920 is not set |
| 262 | CONFIG_ARM_VIC=y | 293 | CONFIG_ARM_VIC=y |
| 263 | CONFIG_ARM_VIC_NR=2 | 294 | CONFIG_ARM_VIC_NR=2 |
| 295 | CONFIG_PL330=y | ||
| 264 | 296 | ||
| 265 | # | 297 | # |
| 266 | # Bus support | 298 | # Bus support |
| @@ -307,6 +339,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 307 | CONFIG_ZBOOT_ROM_TEXT=0 | 339 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 308 | CONFIG_ZBOOT_ROM_BSS=0 | 340 | CONFIG_ZBOOT_ROM_BSS=0 |
| 309 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 341 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
| 342 | # CONFIG_CMDLINE_FORCE is not set | ||
| 310 | # CONFIG_XIP_KERNEL is not set | 343 | # CONFIG_XIP_KERNEL is not set |
| 311 | # CONFIG_KEXEC is not set | 344 | # CONFIG_KEXEC is not set |
| 312 | 345 | ||
| @@ -382,6 +415,7 @@ CONFIG_HAVE_IDE=y | |||
| 382 | # | 415 | # |
| 383 | # SCSI device support | 416 | # SCSI device support |
| 384 | # | 417 | # |
| 418 | CONFIG_SCSI_MOD=y | ||
| 385 | # CONFIG_RAID_ATTRS is not set | 419 | # CONFIG_RAID_ATTRS is not set |
| 386 | CONFIG_SCSI=y | 420 | CONFIG_SCSI=y |
| 387 | CONFIG_SCSI_DMA=y | 421 | CONFIG_SCSI_DMA=y |
| @@ -470,7 +504,9 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y | |||
| 470 | CONFIG_INPUT_TOUCHSCREEN=y | 504 | CONFIG_INPUT_TOUCHSCREEN=y |
| 471 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 505 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 472 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | 506 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set |
| 507 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 473 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 508 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 509 | # CONFIG_TOUCHSCREEN_S3C2410 is not set | ||
| 474 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 510 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 475 | # CONFIG_TOUCHSCREEN_ELO is not set | 511 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 476 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | 512 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set |
| @@ -518,12 +554,16 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=3 | |||
| 518 | # Non-8250 serial port support | 554 | # Non-8250 serial port support |
| 519 | # | 555 | # |
| 520 | CONFIG_SERIAL_SAMSUNG=y | 556 | CONFIG_SERIAL_SAMSUNG=y |
| 557 | CONFIG_SERIAL_SAMSUNG_UARTS_4=y | ||
| 521 | CONFIG_SERIAL_SAMSUNG_UARTS=4 | 558 | CONFIG_SERIAL_SAMSUNG_UARTS=4 |
| 522 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set | 559 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set |
| 523 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | 560 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
| 524 | CONFIG_SERIAL_S5P6440=y | 561 | CONFIG_SERIAL_S3C6400=y |
| 525 | CONFIG_SERIAL_CORE=y | 562 | CONFIG_SERIAL_CORE=y |
| 526 | CONFIG_SERIAL_CORE_CONSOLE=y | 563 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 564 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 565 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 566 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 527 | CONFIG_UNIX98_PTYS=y | 567 | CONFIG_UNIX98_PTYS=y |
| 528 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 568 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 529 | CONFIG_LEGACY_PTYS=y | 569 | CONFIG_LEGACY_PTYS=y |
| @@ -549,6 +589,7 @@ CONFIG_GPIOLIB=y | |||
| 549 | # | 589 | # |
| 550 | # Memory mapped GPIO expanders: | 590 | # Memory mapped GPIO expanders: |
| 551 | # | 591 | # |
| 592 | # CONFIG_GPIO_IT8761E is not set | ||
| 552 | 593 | ||
| 553 | # | 594 | # |
| 554 | # I2C GPIO expanders: | 595 | # I2C GPIO expanders: |
| @@ -570,6 +611,7 @@ CONFIG_GPIOLIB=y | |||
| 570 | # CONFIG_HWMON is not set | 611 | # CONFIG_HWMON is not set |
| 571 | # CONFIG_THERMAL is not set | 612 | # CONFIG_THERMAL is not set |
| 572 | # CONFIG_WATCHDOG is not set | 613 | # CONFIG_WATCHDOG is not set |
| 614 | CONFIG_HAVE_S3C2410_WATCHDOG=y | ||
| 573 | CONFIG_SSB_POSSIBLE=y | 615 | CONFIG_SSB_POSSIBLE=y |
| 574 | 616 | ||
| 575 | # | 617 | # |
| @@ -626,10 +668,6 @@ CONFIG_RTC_LIB=y | |||
| 626 | # CONFIG_DMADEVICES is not set | 668 | # CONFIG_DMADEVICES is not set |
| 627 | # CONFIG_AUXDISPLAY is not set | 669 | # CONFIG_AUXDISPLAY is not set |
| 628 | # CONFIG_UIO is not set | 670 | # CONFIG_UIO is not set |
| 629 | |||
| 630 | # | ||
| 631 | # TI VLYNQ | ||
| 632 | # | ||
| 633 | # CONFIG_STAGING is not set | 671 | # CONFIG_STAGING is not set |
| 634 | 672 | ||
| 635 | # | 673 | # |
| @@ -704,6 +742,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 704 | # CONFIG_BEFS_FS is not set | 742 | # CONFIG_BEFS_FS is not set |
| 705 | # CONFIG_BFS_FS is not set | 743 | # CONFIG_BFS_FS is not set |
| 706 | # CONFIG_EFS_FS is not set | 744 | # CONFIG_EFS_FS is not set |
| 745 | # CONFIG_LOGFS is not set | ||
| 707 | CONFIG_CRAMFS=y | 746 | CONFIG_CRAMFS=y |
| 708 | # CONFIG_SQUASHFS is not set | 747 | # CONFIG_SQUASHFS is not set |
| 709 | # CONFIG_VXFS_FS is not set | 748 | # CONFIG_VXFS_FS is not set |
| @@ -826,6 +865,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 826 | CONFIG_TRACING_SUPPORT=y | 865 | CONFIG_TRACING_SUPPORT=y |
| 827 | CONFIG_FTRACE=y | 866 | CONFIG_FTRACE=y |
| 828 | # CONFIG_FUNCTION_TRACER is not set | 867 | # CONFIG_FUNCTION_TRACER is not set |
| 868 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 829 | # CONFIG_SCHED_TRACER is not set | 869 | # CONFIG_SCHED_TRACER is not set |
| 830 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 870 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 831 | # CONFIG_BOOT_TRACER is not set | 871 | # CONFIG_BOOT_TRACER is not set |
| @@ -836,6 +876,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 836 | # CONFIG_KMEMTRACE is not set | 876 | # CONFIG_KMEMTRACE is not set |
| 837 | # CONFIG_WORKQUEUE_TRACER is not set | 877 | # CONFIG_WORKQUEUE_TRACER is not set |
| 838 | # CONFIG_BLK_DEV_IO_TRACE is not set | 878 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 879 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 839 | # CONFIG_SAMPLES is not set | 880 | # CONFIG_SAMPLES is not set |
| 840 | CONFIG_HAVE_ARCH_KGDB=y | 881 | CONFIG_HAVE_ARCH_KGDB=y |
| 841 | # CONFIG_KGDB is not set | 882 | # CONFIG_KGDB is not set |
| @@ -962,8 +1003,10 @@ CONFIG_CRC32=y | |||
| 962 | # CONFIG_CRC7 is not set | 1003 | # CONFIG_CRC7 is not set |
| 963 | # CONFIG_LIBCRC32C is not set | 1004 | # CONFIG_LIBCRC32C is not set |
| 964 | CONFIG_ZLIB_INFLATE=y | 1005 | CONFIG_ZLIB_INFLATE=y |
| 1006 | CONFIG_LZO_DECOMPRESS=y | ||
| 965 | CONFIG_DECOMPRESS_GZIP=y | 1007 | CONFIG_DECOMPRESS_GZIP=y |
| 966 | CONFIG_DECOMPRESS_BZIP2=y | 1008 | CONFIG_DECOMPRESS_BZIP2=y |
| 967 | CONFIG_DECOMPRESS_LZMA=y | 1009 | CONFIG_DECOMPRESS_LZMA=y |
| 1010 | CONFIG_DECOMPRESS_LZO=y | ||
| 968 | CONFIG_HAS_IOMEM=y | 1011 | CONFIG_HAS_IOMEM=y |
| 969 | CONFIG_HAS_DMA=y | 1012 | CONFIG_HAS_DMA=y |
diff --git a/arch/arm/configs/s5p6442_defconfig b/arch/arm/configs/s5p6442_defconfig index 74e20bfc0487..068219b360f5 100644 --- a/arch/arm/configs/s5p6442_defconfig +++ b/arch/arm/configs/s5p6442_defconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc4 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Mon Jan 25 08:50:28 2010 | 4 | # Wed May 26 19:04:34 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -17,6 +20,7 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 18 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 21 | CONFIG_VECTORS_BASE=0xffff0000 | 25 | CONFIG_VECTORS_BASE=0xffff0000 |
| 22 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| @@ -31,6 +35,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
| 31 | CONFIG_LOCALVERSION="" | 35 | CONFIG_LOCALVERSION="" |
| 32 | CONFIG_LOCALVERSION_AUTO=y | 36 | CONFIG_LOCALVERSION_AUTO=y |
| 33 | CONFIG_HAVE_KERNEL_GZIP=y | 37 | CONFIG_HAVE_KERNEL_GZIP=y |
| 38 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 34 | CONFIG_HAVE_KERNEL_LZO=y | 39 | CONFIG_HAVE_KERNEL_LZO=y |
| 35 | CONFIG_KERNEL_GZIP=y | 40 | CONFIG_KERNEL_GZIP=y |
| 36 | # CONFIG_KERNEL_BZIP2 is not set | 41 | # CONFIG_KERNEL_BZIP2 is not set |
| @@ -52,7 +57,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 52 | # CONFIG_TREE_RCU_TRACE is not set | 57 | # CONFIG_TREE_RCU_TRACE is not set |
| 53 | # CONFIG_IKCONFIG is not set | 58 | # CONFIG_IKCONFIG is not set |
| 54 | CONFIG_LOG_BUF_SHIFT=17 | 59 | CONFIG_LOG_BUF_SHIFT=17 |
| 55 | # CONFIG_GROUP_SCHED is not set | ||
| 56 | # CONFIG_CGROUPS is not set | 60 | # CONFIG_CGROUPS is not set |
| 57 | CONFIG_SYSFS_DEPRECATED=y | 61 | CONFIG_SYSFS_DEPRECATED=y |
| 58 | CONFIG_SYSFS_DEPRECATED_V2=y | 62 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -88,10 +92,14 @@ CONFIG_TIMERFD=y | |||
| 88 | CONFIG_EVENTFD=y | 92 | CONFIG_EVENTFD=y |
| 89 | CONFIG_SHMEM=y | 93 | CONFIG_SHMEM=y |
| 90 | CONFIG_AIO=y | 94 | CONFIG_AIO=y |
| 95 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 96 | CONFIG_PERF_USE_VMALLOC=y | ||
| 91 | 97 | ||
| 92 | # | 98 | # |
| 93 | # Kernel Performance Events And Counters | 99 | # Kernel Performance Events And Counters |
| 94 | # | 100 | # |
| 101 | # CONFIG_PERF_EVENTS is not set | ||
| 102 | # CONFIG_PERF_COUNTERS is not set | ||
| 95 | CONFIG_VM_EVENT_COUNTERS=y | 103 | CONFIG_VM_EVENT_COUNTERS=y |
| 96 | CONFIG_SLUB_DEBUG=y | 104 | CONFIG_SLUB_DEBUG=y |
| 97 | CONFIG_COMPAT_BRK=y | 105 | CONFIG_COMPAT_BRK=y |
| @@ -173,8 +181,11 @@ CONFIG_MMU=y | |||
| 173 | # CONFIG_ARCH_INTEGRATOR is not set | 181 | # CONFIG_ARCH_INTEGRATOR is not set |
| 174 | # CONFIG_ARCH_REALVIEW is not set | 182 | # CONFIG_ARCH_REALVIEW is not set |
| 175 | # CONFIG_ARCH_VERSATILE is not set | 183 | # CONFIG_ARCH_VERSATILE is not set |
| 184 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 176 | # CONFIG_ARCH_AT91 is not set | 185 | # CONFIG_ARCH_AT91 is not set |
| 186 | # CONFIG_ARCH_BCMRING is not set | ||
| 177 | # CONFIG_ARCH_CLPS711X is not set | 187 | # CONFIG_ARCH_CLPS711X is not set |
| 188 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 178 | # CONFIG_ARCH_GEMINI is not set | 189 | # CONFIG_ARCH_GEMINI is not set |
| 179 | # CONFIG_ARCH_EBSA110 is not set | 190 | # CONFIG_ARCH_EBSA110 is not set |
| 180 | # CONFIG_ARCH_EP93XX is not set | 191 | # CONFIG_ARCH_EP93XX is not set |
| @@ -183,7 +194,6 @@ CONFIG_MMU=y | |||
| 183 | # CONFIG_ARCH_STMP3XXX is not set | 194 | # CONFIG_ARCH_STMP3XXX is not set |
| 184 | # CONFIG_ARCH_NETX is not set | 195 | # CONFIG_ARCH_NETX is not set |
| 185 | # CONFIG_ARCH_H720X is not set | 196 | # CONFIG_ARCH_H720X is not set |
| 186 | # CONFIG_ARCH_NOMADIK is not set | ||
| 187 | # CONFIG_ARCH_IOP13XX is not set | 197 | # CONFIG_ARCH_IOP13XX is not set |
| 188 | # CONFIG_ARCH_IOP32X is not set | 198 | # CONFIG_ARCH_IOP32X is not set |
| 189 | # CONFIG_ARCH_IOP33X is not set | 199 | # CONFIG_ARCH_IOP33X is not set |
| @@ -200,24 +210,35 @@ CONFIG_MMU=y | |||
| 200 | # CONFIG_ARCH_KS8695 is not set | 210 | # CONFIG_ARCH_KS8695 is not set |
| 201 | # CONFIG_ARCH_NS9XXX is not set | 211 | # CONFIG_ARCH_NS9XXX is not set |
| 202 | # CONFIG_ARCH_W90X900 is not set | 212 | # CONFIG_ARCH_W90X900 is not set |
| 213 | # CONFIG_ARCH_NUC93X is not set | ||
| 203 | # CONFIG_ARCH_PNX4008 is not set | 214 | # CONFIG_ARCH_PNX4008 is not set |
| 204 | # CONFIG_ARCH_PXA is not set | 215 | # CONFIG_ARCH_PXA is not set |
| 205 | # CONFIG_ARCH_MSM is not set | 216 | # CONFIG_ARCH_MSM is not set |
| 217 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 206 | # CONFIG_ARCH_RPC is not set | 218 | # CONFIG_ARCH_RPC is not set |
| 207 | # CONFIG_ARCH_SA1100 is not set | 219 | # CONFIG_ARCH_SA1100 is not set |
| 208 | # CONFIG_ARCH_S3C2410 is not set | 220 | # CONFIG_ARCH_S3C2410 is not set |
| 209 | # CONFIG_ARCH_S3C64XX is not set | 221 | # CONFIG_ARCH_S3C64XX is not set |
| 210 | # CONFIG_ARCH_S5P6440 is not set | 222 | # CONFIG_ARCH_S5P6440 is not set |
| 211 | CONFIG_ARCH_S5P6442=y | 223 | CONFIG_ARCH_S5P6442=y |
| 212 | # CONFIG_ARCH_S5PC1XX is not set | 224 | # CONFIG_ARCH_S5PC100 is not set |
| 225 | # CONFIG_ARCH_S5PV210 is not set | ||
| 213 | # CONFIG_ARCH_SHARK is not set | 226 | # CONFIG_ARCH_SHARK is not set |
| 214 | # CONFIG_ARCH_LH7A40X is not set | 227 | # CONFIG_ARCH_LH7A40X is not set |
| 215 | # CONFIG_ARCH_U300 is not set | 228 | # CONFIG_ARCH_U300 is not set |
| 229 | # CONFIG_ARCH_U8500 is not set | ||
| 230 | # CONFIG_ARCH_NOMADIK is not set | ||
| 216 | # CONFIG_ARCH_DAVINCI is not set | 231 | # CONFIG_ARCH_DAVINCI is not set |
| 217 | # CONFIG_ARCH_OMAP is not set | 232 | # CONFIG_ARCH_OMAP is not set |
| 218 | # CONFIG_ARCH_BCMRING is not set | 233 | # CONFIG_PLAT_SPEAR is not set |
| 219 | # CONFIG_ARCH_U8500 is not set | ||
| 220 | CONFIG_PLAT_SAMSUNG=y | 234 | CONFIG_PLAT_SAMSUNG=y |
| 235 | |||
| 236 | # | ||
| 237 | # Boot options | ||
| 238 | # | ||
| 239 | # CONFIG_S3C_BOOT_ERROR_RESET is not set | ||
| 240 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | ||
| 241 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
| 221 | CONFIG_SAMSUNG_CLKSRC=y | 242 | CONFIG_SAMSUNG_CLKSRC=y |
| 222 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | 243 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y |
| 223 | CONFIG_SAMSUNG_IRQ_UART=y | 244 | CONFIG_SAMSUNG_IRQ_UART=y |
| @@ -225,22 +246,16 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y | |||
| 225 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | 246 | CONFIG_S3C_GPIO_CFG_S3C24XX=y |
| 226 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | 247 | CONFIG_S3C_GPIO_CFG_S3C64XX=y |
| 227 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | 248 | CONFIG_S3C_GPIO_PULL_UPDOWN=y |
| 249 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 228 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | 250 | CONFIG_SAMSUNG_GPIO_EXTRA=0 |
| 251 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 252 | CONFIG_S3C_GPIO_TRACK=y | ||
| 229 | # CONFIG_S3C_ADC is not set | 253 | # CONFIG_S3C_ADC is not set |
| 254 | CONFIG_S3C_PL330_DMA=y | ||
| 230 | 255 | ||
| 231 | # | 256 | # |
| 232 | # Power management | 257 | # Power management |
| 233 | # | 258 | # |
| 234 | CONFIG_PLAT_S3C=y | ||
| 235 | |||
| 236 | # | ||
| 237 | # Boot options | ||
| 238 | # | ||
| 239 | # CONFIG_S3C_BOOT_ERROR_RESET is not set | ||
| 240 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | ||
| 241 | CONFIG_S3C_LOWLEVEL_UART_PORT=1 | ||
| 242 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 243 | CONFIG_S3C_GPIO_TRACK=y | ||
| 244 | CONFIG_PLAT_S5P=y | 259 | CONFIG_PLAT_S5P=y |
| 245 | CONFIG_CPU_S5P6442=y | 260 | CONFIG_CPU_S5P6442=y |
| 246 | CONFIG_MACH_SMDK6442=y | 261 | CONFIG_MACH_SMDK6442=y |
| @@ -269,9 +284,12 @@ CONFIG_ARM_THUMB=y | |||
| 269 | # CONFIG_CPU_DCACHE_DISABLE is not set | 284 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 270 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 285 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 271 | CONFIG_ARM_L1_CACHE_SHIFT=5 | 286 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 287 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 288 | CONFIG_CPU_HAS_PMU=y | ||
| 272 | # CONFIG_ARM_ERRATA_411920 is not set | 289 | # CONFIG_ARM_ERRATA_411920 is not set |
| 273 | CONFIG_ARM_VIC=y | 290 | CONFIG_ARM_VIC=y |
| 274 | CONFIG_ARM_VIC_NR=2 | 291 | CONFIG_ARM_VIC_NR=2 |
| 292 | CONFIG_PL330=y | ||
| 275 | 293 | ||
| 276 | # | 294 | # |
| 277 | # Bus support | 295 | # Bus support |
| @@ -318,6 +336,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 318 | CONFIG_ZBOOT_ROM_TEXT=0 | 336 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 319 | CONFIG_ZBOOT_ROM_BSS=0 | 337 | CONFIG_ZBOOT_ROM_BSS=0 |
| 320 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 338 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
| 339 | # CONFIG_CMDLINE_FORCE is not set | ||
| 321 | # CONFIG_XIP_KERNEL is not set | 340 | # CONFIG_XIP_KERNEL is not set |
| 322 | # CONFIG_KEXEC is not set | 341 | # CONFIG_KEXEC is not set |
| 323 | 342 | ||
| @@ -394,6 +413,7 @@ CONFIG_HAVE_IDE=y | |||
| 394 | # | 413 | # |
| 395 | # SCSI device support | 414 | # SCSI device support |
| 396 | # | 415 | # |
| 416 | CONFIG_SCSI_MOD=y | ||
| 397 | # CONFIG_RAID_ATTRS is not set | 417 | # CONFIG_RAID_ATTRS is not set |
| 398 | CONFIG_SCSI=y | 418 | CONFIG_SCSI=y |
| 399 | CONFIG_SCSI_DMA=y | 419 | CONFIG_SCSI_DMA=y |
| @@ -462,6 +482,7 @@ CONFIG_INPUT_EVDEV=y | |||
| 462 | CONFIG_INPUT_TOUCHSCREEN=y | 482 | CONFIG_INPUT_TOUCHSCREEN=y |
| 463 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 483 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 464 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | 484 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set |
| 485 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 465 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 486 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 466 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 487 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 467 | # CONFIG_TOUCHSCREEN_ELO is not set | 488 | # CONFIG_TOUCHSCREEN_ELO is not set |
| @@ -515,6 +536,9 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y | |||
| 515 | CONFIG_SERIAL_S5PV210=y | 536 | CONFIG_SERIAL_S5PV210=y |
| 516 | CONFIG_SERIAL_CORE=y | 537 | CONFIG_SERIAL_CORE=y |
| 517 | CONFIG_SERIAL_CORE_CONSOLE=y | 538 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 539 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 540 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 541 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 518 | CONFIG_UNIX98_PTYS=y | 542 | CONFIG_UNIX98_PTYS=y |
| 519 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 543 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 520 | CONFIG_LEGACY_PTYS=y | 544 | CONFIG_LEGACY_PTYS=y |
| @@ -540,6 +564,7 @@ CONFIG_GPIOLIB=y | |||
| 540 | # | 564 | # |
| 541 | # Memory mapped GPIO expanders: | 565 | # Memory mapped GPIO expanders: |
| 542 | # | 566 | # |
| 567 | # CONFIG_GPIO_IT8761E is not set | ||
| 543 | 568 | ||
| 544 | # | 569 | # |
| 545 | # I2C GPIO expanders: | 570 | # I2C GPIO expanders: |
| @@ -613,10 +638,6 @@ CONFIG_RTC_LIB=y | |||
| 613 | # CONFIG_DMADEVICES is not set | 638 | # CONFIG_DMADEVICES is not set |
| 614 | # CONFIG_AUXDISPLAY is not set | 639 | # CONFIG_AUXDISPLAY is not set |
| 615 | # CONFIG_UIO is not set | 640 | # CONFIG_UIO is not set |
| 616 | |||
| 617 | # | ||
| 618 | # TI VLYNQ | ||
| 619 | # | ||
| 620 | # CONFIG_STAGING is not set | 641 | # CONFIG_STAGING is not set |
| 621 | 642 | ||
| 622 | # | 643 | # |
| @@ -685,6 +706,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 685 | # CONFIG_BEFS_FS is not set | 706 | # CONFIG_BEFS_FS is not set |
| 686 | # CONFIG_BFS_FS is not set | 707 | # CONFIG_BFS_FS is not set |
| 687 | # CONFIG_EFS_FS is not set | 708 | # CONFIG_EFS_FS is not set |
| 709 | # CONFIG_LOGFS is not set | ||
| 688 | CONFIG_CRAMFS=y | 710 | CONFIG_CRAMFS=y |
| 689 | # CONFIG_SQUASHFS is not set | 711 | # CONFIG_SQUASHFS is not set |
| 690 | # CONFIG_VXFS_FS is not set | 712 | # CONFIG_VXFS_FS is not set |
| @@ -824,6 +846,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 824 | CONFIG_TRACING_SUPPORT=y | 846 | CONFIG_TRACING_SUPPORT=y |
| 825 | CONFIG_FTRACE=y | 847 | CONFIG_FTRACE=y |
| 826 | # CONFIG_FUNCTION_TRACER is not set | 848 | # CONFIG_FUNCTION_TRACER is not set |
| 849 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 827 | # CONFIG_SCHED_TRACER is not set | 850 | # CONFIG_SCHED_TRACER is not set |
| 828 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 851 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 829 | # CONFIG_BOOT_TRACER is not set | 852 | # CONFIG_BOOT_TRACER is not set |
| @@ -834,6 +857,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 834 | # CONFIG_KMEMTRACE is not set | 857 | # CONFIG_KMEMTRACE is not set |
| 835 | # CONFIG_WORKQUEUE_TRACER is not set | 858 | # CONFIG_WORKQUEUE_TRACER is not set |
| 836 | # CONFIG_BLK_DEV_IO_TRACE is not set | 859 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 860 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 837 | # CONFIG_SAMPLES is not set | 861 | # CONFIG_SAMPLES is not set |
| 838 | CONFIG_HAVE_ARCH_KGDB=y | 862 | CONFIG_HAVE_ARCH_KGDB=y |
| 839 | # CONFIG_KGDB is not set | 863 | # CONFIG_KGDB is not set |
diff --git a/arch/arm/configs/s5pc100_defconfig b/arch/arm/configs/s5pc100_defconfig index dc108afc060c..ebc6245b9fca 100644 --- a/arch/arm/configs/s5pc100_defconfig +++ b/arch/arm/configs/s5pc100_defconfig | |||
| @@ -1,12 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.30 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Wed Jul 1 15:53:07 2009 | 4 | # Wed May 26 19:04:35 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_MMU=y | 9 | CONFIG_GENERIC_TIME=y |
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 10 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 11 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 12 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -18,7 +20,9 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 18 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 19 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 21 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 25 | CONFIG_ARM_L1_CACHE_SHIFT_6=y | ||
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | 26 | CONFIG_VECTORS_BASE=0xffff0000 |
| 23 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 24 | CONFIG_CONSTRUCTORS=y | 28 | CONFIG_CONSTRUCTORS=y |
| @@ -31,6 +35,13 @@ CONFIG_BROKEN_ON_SMP=y | |||
| 31 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 35 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 32 | CONFIG_LOCALVERSION="" | 36 | CONFIG_LOCALVERSION="" |
| 33 | CONFIG_LOCALVERSION_AUTO=y | 37 | CONFIG_LOCALVERSION_AUTO=y |
| 38 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 39 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 40 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 41 | CONFIG_KERNEL_GZIP=y | ||
| 42 | # CONFIG_KERNEL_BZIP2 is not set | ||
| 43 | # CONFIG_KERNEL_LZMA is not set | ||
| 44 | # CONFIG_KERNEL_LZO is not set | ||
| 34 | CONFIG_SWAP=y | 45 | CONFIG_SWAP=y |
| 35 | # CONFIG_SYSVIPC is not set | 46 | # CONFIG_SYSVIPC is not set |
| 36 | # CONFIG_BSD_PROCESS_ACCT is not set | 47 | # CONFIG_BSD_PROCESS_ACCT is not set |
| @@ -38,14 +49,15 @@ CONFIG_SWAP=y | |||
| 38 | # | 49 | # |
| 39 | # RCU Subsystem | 50 | # RCU Subsystem |
| 40 | # | 51 | # |
| 41 | CONFIG_CLASSIC_RCU=y | 52 | CONFIG_TREE_RCU=y |
| 42 | # CONFIG_TREE_RCU is not set | 53 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 43 | # CONFIG_PREEMPT_RCU is not set | 54 | # CONFIG_TINY_RCU is not set |
| 55 | # CONFIG_RCU_TRACE is not set | ||
| 56 | CONFIG_RCU_FANOUT=32 | ||
| 57 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
| 44 | # CONFIG_TREE_RCU_TRACE is not set | 58 | # CONFIG_TREE_RCU_TRACE is not set |
| 45 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
| 46 | # CONFIG_IKCONFIG is not set | 59 | # CONFIG_IKCONFIG is not set |
| 47 | CONFIG_LOG_BUF_SHIFT=17 | 60 | CONFIG_LOG_BUF_SHIFT=17 |
| 48 | # CONFIG_GROUP_SCHED is not set | ||
| 49 | # CONFIG_CGROUPS is not set | 61 | # CONFIG_CGROUPS is not set |
| 50 | CONFIG_SYSFS_DEPRECATED=y | 62 | CONFIG_SYSFS_DEPRECATED=y |
| 51 | CONFIG_SYSFS_DEPRECATED_V2=y | 63 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -59,6 +71,7 @@ CONFIG_INITRAMFS_SOURCE="" | |||
| 59 | CONFIG_RD_GZIP=y | 71 | CONFIG_RD_GZIP=y |
| 60 | CONFIG_RD_BZIP2=y | 72 | CONFIG_RD_BZIP2=y |
| 61 | CONFIG_RD_LZMA=y | 73 | CONFIG_RD_LZMA=y |
| 74 | CONFIG_RD_LZO=y | ||
| 62 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 75 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 63 | CONFIG_SYSCTL=y | 76 | CONFIG_SYSCTL=y |
| 64 | CONFIG_ANON_INODES=y | 77 | CONFIG_ANON_INODES=y |
| @@ -80,19 +93,21 @@ CONFIG_TIMERFD=y | |||
| 80 | CONFIG_EVENTFD=y | 93 | CONFIG_EVENTFD=y |
| 81 | CONFIG_SHMEM=y | 94 | CONFIG_SHMEM=y |
| 82 | CONFIG_AIO=y | 95 | CONFIG_AIO=y |
| 96 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 97 | CONFIG_PERF_USE_VMALLOC=y | ||
| 83 | 98 | ||
| 84 | # | 99 | # |
| 85 | # Performance Counters | 100 | # Kernel Performance Events And Counters |
| 86 | # | 101 | # |
| 102 | # CONFIG_PERF_EVENTS is not set | ||
| 103 | # CONFIG_PERF_COUNTERS is not set | ||
| 87 | CONFIG_VM_EVENT_COUNTERS=y | 104 | CONFIG_VM_EVENT_COUNTERS=y |
| 88 | CONFIG_SLUB_DEBUG=y | 105 | CONFIG_SLUB_DEBUG=y |
| 89 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 90 | CONFIG_COMPAT_BRK=y | 106 | CONFIG_COMPAT_BRK=y |
| 91 | # CONFIG_SLAB is not set | 107 | # CONFIG_SLAB is not set |
| 92 | CONFIG_SLUB=y | 108 | CONFIG_SLUB=y |
| 93 | # CONFIG_SLOB is not set | 109 | # CONFIG_SLOB is not set |
| 94 | # CONFIG_PROFILING is not set | 110 | # CONFIG_PROFILING is not set |
| 95 | # CONFIG_MARKERS is not set | ||
| 96 | CONFIG_HAVE_OPROFILE=y | 111 | CONFIG_HAVE_OPROFILE=y |
| 97 | # CONFIG_KPROBES is not set | 112 | # CONFIG_KPROBES is not set |
| 98 | CONFIG_HAVE_KPROBES=y | 113 | CONFIG_HAVE_KPROBES=y |
| @@ -122,25 +137,56 @@ CONFIG_LBDAF=y | |||
| 122 | # IO Schedulers | 137 | # IO Schedulers |
| 123 | # | 138 | # |
| 124 | CONFIG_IOSCHED_NOOP=y | 139 | CONFIG_IOSCHED_NOOP=y |
| 125 | CONFIG_IOSCHED_AS=y | ||
| 126 | CONFIG_IOSCHED_DEADLINE=y | 140 | CONFIG_IOSCHED_DEADLINE=y |
| 127 | CONFIG_IOSCHED_CFQ=y | 141 | CONFIG_IOSCHED_CFQ=y |
| 128 | # CONFIG_DEFAULT_AS is not set | ||
| 129 | # CONFIG_DEFAULT_DEADLINE is not set | 142 | # CONFIG_DEFAULT_DEADLINE is not set |
| 130 | CONFIG_DEFAULT_CFQ=y | 143 | CONFIG_DEFAULT_CFQ=y |
| 131 | # CONFIG_DEFAULT_NOOP is not set | 144 | # CONFIG_DEFAULT_NOOP is not set |
| 132 | CONFIG_DEFAULT_IOSCHED="cfq" | 145 | CONFIG_DEFAULT_IOSCHED="cfq" |
| 146 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 147 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 148 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 149 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 150 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 151 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 152 | # CONFIG_INLINE_SPIN_UNLOCK is not set | ||
| 153 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 154 | # CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | ||
| 155 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 156 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 157 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 158 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 159 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 160 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 161 | # CONFIG_INLINE_READ_UNLOCK is not set | ||
| 162 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 163 | # CONFIG_INLINE_READ_UNLOCK_IRQ is not set | ||
| 164 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 165 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 166 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 167 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 168 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 169 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 170 | # CONFIG_INLINE_WRITE_UNLOCK is not set | ||
| 171 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 172 | # CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | ||
| 173 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 174 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 133 | # CONFIG_FREEZER is not set | 175 | # CONFIG_FREEZER is not set |
| 134 | 176 | ||
| 135 | # | 177 | # |
| 136 | # System Type | 178 | # System Type |
| 137 | # | 179 | # |
| 180 | CONFIG_MMU=y | ||
| 138 | # CONFIG_ARCH_AAEC2000 is not set | 181 | # CONFIG_ARCH_AAEC2000 is not set |
| 139 | # CONFIG_ARCH_INTEGRATOR is not set | 182 | # CONFIG_ARCH_INTEGRATOR is not set |
| 140 | # CONFIG_ARCH_REALVIEW is not set | 183 | # CONFIG_ARCH_REALVIEW is not set |
| 141 | # CONFIG_ARCH_VERSATILE is not set | 184 | # CONFIG_ARCH_VERSATILE is not set |
| 185 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 142 | # CONFIG_ARCH_AT91 is not set | 186 | # CONFIG_ARCH_AT91 is not set |
| 187 | # CONFIG_ARCH_BCMRING is not set | ||
| 143 | # CONFIG_ARCH_CLPS711X is not set | 188 | # CONFIG_ARCH_CLPS711X is not set |
| 189 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 144 | # CONFIG_ARCH_GEMINI is not set | 190 | # CONFIG_ARCH_GEMINI is not set |
| 145 | # CONFIG_ARCH_EBSA110 is not set | 191 | # CONFIG_ARCH_EBSA110 is not set |
| 146 | # CONFIG_ARCH_EP93XX is not set | 192 | # CONFIG_ARCH_EP93XX is not set |
| @@ -156,6 +202,7 @@ CONFIG_DEFAULT_IOSCHED="cfq" | |||
| 156 | # CONFIG_ARCH_IXP2000 is not set | 202 | # CONFIG_ARCH_IXP2000 is not set |
| 157 | # CONFIG_ARCH_IXP4XX is not set | 203 | # CONFIG_ARCH_IXP4XX is not set |
| 158 | # CONFIG_ARCH_L7200 is not set | 204 | # CONFIG_ARCH_L7200 is not set |
| 205 | # CONFIG_ARCH_DOVE is not set | ||
| 159 | # CONFIG_ARCH_KIRKWOOD is not set | 206 | # CONFIG_ARCH_KIRKWOOD is not set |
| 160 | # CONFIG_ARCH_LOKI is not set | 207 | # CONFIG_ARCH_LOKI is not set |
| 161 | # CONFIG_ARCH_MV78XX0 is not set | 208 | # CONFIG_ARCH_MV78XX0 is not set |
| @@ -164,39 +211,64 @@ CONFIG_DEFAULT_IOSCHED="cfq" | |||
| 164 | # CONFIG_ARCH_KS8695 is not set | 211 | # CONFIG_ARCH_KS8695 is not set |
| 165 | # CONFIG_ARCH_NS9XXX is not set | 212 | # CONFIG_ARCH_NS9XXX is not set |
| 166 | # CONFIG_ARCH_W90X900 is not set | 213 | # CONFIG_ARCH_W90X900 is not set |
| 214 | # CONFIG_ARCH_NUC93X is not set | ||
| 167 | # CONFIG_ARCH_PNX4008 is not set | 215 | # CONFIG_ARCH_PNX4008 is not set |
| 168 | # CONFIG_ARCH_PXA is not set | 216 | # CONFIG_ARCH_PXA is not set |
| 169 | # CONFIG_ARCH_MSM is not set | 217 | # CONFIG_ARCH_MSM is not set |
| 218 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 170 | # CONFIG_ARCH_RPC is not set | 219 | # CONFIG_ARCH_RPC is not set |
| 171 | # CONFIG_ARCH_SA1100 is not set | 220 | # CONFIG_ARCH_SA1100 is not set |
| 172 | # CONFIG_ARCH_S3C2410 is not set | 221 | # CONFIG_ARCH_S3C2410 is not set |
| 173 | # CONFIG_ARCH_S3C64XX is not set | 222 | # CONFIG_ARCH_S3C64XX is not set |
| 174 | CONFIG_ARCH_S5PC1XX=y | 223 | # CONFIG_ARCH_S5P6440 is not set |
| 224 | # CONFIG_ARCH_S5P6442 is not set | ||
| 225 | CONFIG_ARCH_S5PC100=y | ||
| 226 | # CONFIG_ARCH_S5PV210 is not set | ||
| 175 | # CONFIG_ARCH_SHARK is not set | 227 | # CONFIG_ARCH_SHARK is not set |
| 176 | # CONFIG_ARCH_LH7A40X is not set | 228 | # CONFIG_ARCH_LH7A40X is not set |
| 177 | # CONFIG_ARCH_U300 is not set | 229 | # CONFIG_ARCH_U300 is not set |
| 230 | # CONFIG_ARCH_U8500 is not set | ||
| 231 | # CONFIG_ARCH_NOMADIK is not set | ||
| 178 | # CONFIG_ARCH_DAVINCI is not set | 232 | # CONFIG_ARCH_DAVINCI is not set |
| 179 | # CONFIG_ARCH_OMAP is not set | 233 | # CONFIG_ARCH_OMAP is not set |
| 180 | CONFIG_PLAT_S3C=y | 234 | # CONFIG_PLAT_SPEAR is not set |
| 235 | CONFIG_PLAT_SAMSUNG=y | ||
| 181 | 236 | ||
| 182 | # | 237 | # |
| 183 | # Boot options | 238 | # Boot options |
| 184 | # | 239 | # |
| 185 | # CONFIG_S3C_BOOT_ERROR_RESET is not set | 240 | # CONFIG_S3C_BOOT_ERROR_RESET is not set |
| 186 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y | 241 | CONFIG_S3C_BOOT_UART_FORCE_FIFO=y |
| 242 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | ||
| 243 | CONFIG_SAMSUNG_CLKSRC=y | ||
| 244 | CONFIG_SAMSUNG_IRQ_VIC_TIMER=y | ||
| 245 | CONFIG_SAMSUNG_IRQ_UART=y | ||
| 246 | CONFIG_SAMSUNG_GPIOLIB_4BIT=y | ||
| 247 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | ||
| 248 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | ||
| 249 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | ||
| 250 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 251 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | ||
| 252 | CONFIG_S3C_GPIO_SPACE=0 | ||
| 253 | CONFIG_S3C_GPIO_TRACK=y | ||
| 254 | # CONFIG_S3C_ADC is not set | ||
| 255 | CONFIG_S3C_DEV_HSMMC=y | ||
| 256 | CONFIG_S3C_DEV_HSMMC1=y | ||
| 257 | CONFIG_S3C_DEV_HSMMC2=y | ||
| 258 | CONFIG_S3C_DEV_I2C1=y | ||
| 259 | CONFIG_S3C_DEV_FB=y | ||
| 260 | CONFIG_S3C_PL330_DMA=y | ||
| 187 | 261 | ||
| 188 | # | 262 | # |
| 189 | # Power management | 263 | # Power management |
| 190 | # | 264 | # |
| 191 | CONFIG_S3C_LOWLEVEL_UART_PORT=0 | 265 | CONFIG_PLAT_S5P=y |
| 192 | CONFIG_S3C_GPIO_SPACE=0 | 266 | CONFIG_S5P_EXT_INT=y |
| 193 | CONFIG_S3C_GPIO_TRACK=y | ||
| 194 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | ||
| 195 | CONFIG_PLAT_S5PC1XX=y | ||
| 196 | CONFIG_CPU_S5PC100_INIT=y | ||
| 197 | CONFIG_CPU_S5PC100_CLOCK=y | ||
| 198 | CONFIG_S5PC100_SETUP_I2C0=y | ||
| 199 | CONFIG_CPU_S5PC100=y | 267 | CONFIG_CPU_S5PC100=y |
| 268 | CONFIG_S5PC100_SETUP_FB_24BPP=y | ||
| 269 | CONFIG_S5PC100_SETUP_I2C1=y | ||
| 270 | CONFIG_S5PC100_SETUP_SDHCI=y | ||
| 271 | CONFIG_S5PC100_SETUP_SDHCI_GPIO=y | ||
| 200 | CONFIG_MACH_SMDKC100=y | 272 | CONFIG_MACH_SMDKC100=y |
| 201 | 273 | ||
| 202 | # | 274 | # |
| @@ -206,7 +278,7 @@ CONFIG_CPU_32v6K=y | |||
| 206 | CONFIG_CPU_V7=y | 278 | CONFIG_CPU_V7=y |
| 207 | CONFIG_CPU_32v7=y | 279 | CONFIG_CPU_32v7=y |
| 208 | CONFIG_CPU_ABRT_EV7=y | 280 | CONFIG_CPU_ABRT_EV7=y |
| 209 | CONFIG_CPU_PABRT_IFAR=y | 281 | CONFIG_CPU_PABRT_V7=y |
| 210 | CONFIG_CPU_CACHE_V7=y | 282 | CONFIG_CPU_CACHE_V7=y |
| 211 | CONFIG_CPU_CACHE_VIPT=y | 283 | CONFIG_CPU_CACHE_VIPT=y |
| 212 | CONFIG_CPU_COPY_V6=y | 284 | CONFIG_CPU_COPY_V6=y |
| @@ -224,11 +296,15 @@ CONFIG_ARM_THUMB=y | |||
| 224 | # CONFIG_CPU_DCACHE_DISABLE is not set | 296 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 225 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 297 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 226 | CONFIG_HAS_TLS_REG=y | 298 | CONFIG_HAS_TLS_REG=y |
| 299 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 300 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 301 | CONFIG_CPU_HAS_PMU=y | ||
| 227 | # CONFIG_ARM_ERRATA_430973 is not set | 302 | # CONFIG_ARM_ERRATA_430973 is not set |
| 228 | # CONFIG_ARM_ERRATA_458693 is not set | 303 | # CONFIG_ARM_ERRATA_458693 is not set |
| 229 | # CONFIG_ARM_ERRATA_460075 is not set | 304 | # CONFIG_ARM_ERRATA_460075 is not set |
| 230 | CONFIG_ARM_VIC=y | 305 | CONFIG_ARM_VIC=y |
| 231 | CONFIG_ARM_VIC_NR=2 | 306 | CONFIG_ARM_VIC_NR=2 |
| 307 | CONFIG_PL330=y | ||
| 232 | 308 | ||
| 233 | # | 309 | # |
| 234 | # Bus support | 310 | # Bus support |
| @@ -244,8 +320,11 @@ CONFIG_VMSPLIT_3G=y | |||
| 244 | # CONFIG_VMSPLIT_2G is not set | 320 | # CONFIG_VMSPLIT_2G is not set |
| 245 | # CONFIG_VMSPLIT_1G is not set | 321 | # CONFIG_VMSPLIT_1G is not set |
| 246 | CONFIG_PAGE_OFFSET=0xC0000000 | 322 | CONFIG_PAGE_OFFSET=0xC0000000 |
| 323 | CONFIG_PREEMPT_NONE=y | ||
| 324 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 247 | # CONFIG_PREEMPT is not set | 325 | # CONFIG_PREEMPT is not set |
| 248 | CONFIG_HZ=100 | 326 | CONFIG_HZ=100 |
| 327 | # CONFIG_THUMB2_KERNEL is not set | ||
| 249 | CONFIG_AEABI=y | 328 | CONFIG_AEABI=y |
| 250 | CONFIG_OABI_COMPAT=y | 329 | CONFIG_OABI_COMPAT=y |
| 251 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | 330 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| @@ -258,12 +337,11 @@ CONFIG_FLATMEM_MANUAL=y | |||
| 258 | CONFIG_FLATMEM=y | 337 | CONFIG_FLATMEM=y |
| 259 | CONFIG_FLAT_NODE_MEM_MAP=y | 338 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 260 | CONFIG_PAGEFLAGS_EXTENDED=y | 339 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 261 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 340 | CONFIG_SPLIT_PTLOCK_CPUS=999999 |
| 262 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 341 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 263 | CONFIG_ZONE_DMA_FLAG=0 | 342 | CONFIG_ZONE_DMA_FLAG=0 |
| 264 | CONFIG_VIRT_TO_BUS=y | 343 | CONFIG_VIRT_TO_BUS=y |
| 265 | CONFIG_HAVE_MLOCK=y | 344 | # CONFIG_KSM is not set |
| 266 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
| 267 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | 345 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
| 268 | CONFIG_ALIGNMENT_TRAP=y | 346 | CONFIG_ALIGNMENT_TRAP=y |
| 269 | # CONFIG_UACCESS_WITH_MEMCPY is not set | 347 | # CONFIG_UACCESS_WITH_MEMCPY is not set |
| @@ -274,6 +352,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 274 | CONFIG_ZBOOT_ROM_TEXT=0 | 352 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 275 | CONFIG_ZBOOT_ROM_BSS=0 | 353 | CONFIG_ZBOOT_ROM_BSS=0 |
| 276 | CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=cramfs init=/linuxrc console=ttySAC2,115200 mem=128M" | 354 | CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=cramfs init=/linuxrc console=ttySAC2,115200 mem=128M" |
| 355 | # CONFIG_CMDLINE_FORCE is not set | ||
| 277 | # CONFIG_XIP_KERNEL is not set | 356 | # CONFIG_XIP_KERNEL is not set |
| 278 | # CONFIG_KEXEC is not set | 357 | # CONFIG_KEXEC is not set |
| 279 | 358 | ||
| @@ -317,6 +396,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y | |||
| 317 | # Generic Driver Options | 396 | # Generic Driver Options |
| 318 | # | 397 | # |
| 319 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 398 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 399 | # CONFIG_DEVTMPFS is not set | ||
| 320 | CONFIG_STANDALONE=y | 400 | CONFIG_STANDALONE=y |
| 321 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 401 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 322 | CONFIG_FW_LOADER=y | 402 | CONFIG_FW_LOADER=y |
| @@ -331,6 +411,10 @@ CONFIG_BLK_DEV=y | |||
| 331 | # CONFIG_BLK_DEV_COW_COMMON is not set | 411 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 332 | CONFIG_BLK_DEV_LOOP=y | 412 | CONFIG_BLK_DEV_LOOP=y |
| 333 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | 413 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 414 | |||
| 415 | # | ||
| 416 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
| 417 | # | ||
| 334 | CONFIG_BLK_DEV_RAM=y | 418 | CONFIG_BLK_DEV_RAM=y |
| 335 | CONFIG_BLK_DEV_RAM_COUNT=16 | 419 | CONFIG_BLK_DEV_RAM_COUNT=16 |
| 336 | CONFIG_BLK_DEV_RAM_SIZE=8192 | 420 | CONFIG_BLK_DEV_RAM_SIZE=8192 |
| @@ -338,9 +422,12 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 | |||
| 338 | # CONFIG_CDROM_PKTCDVD is not set | 422 | # CONFIG_CDROM_PKTCDVD is not set |
| 339 | # CONFIG_MG_DISK is not set | 423 | # CONFIG_MG_DISK is not set |
| 340 | CONFIG_MISC_DEVICES=y | 424 | CONFIG_MISC_DEVICES=y |
| 425 | # CONFIG_AD525X_DPOT is not set | ||
| 341 | # CONFIG_ICS932S401 is not set | 426 | # CONFIG_ICS932S401 is not set |
| 342 | # CONFIG_ENCLOSURE_SERVICES is not set | 427 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 343 | # CONFIG_ISL29003 is not set | 428 | # CONFIG_ISL29003 is not set |
| 429 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 430 | # CONFIG_DS1682 is not set | ||
| 344 | # CONFIG_C2PORT is not set | 431 | # CONFIG_C2PORT is not set |
| 345 | 432 | ||
| 346 | # | 433 | # |
| @@ -350,18 +437,21 @@ CONFIG_EEPROM_AT24=y | |||
| 350 | # CONFIG_EEPROM_LEGACY is not set | 437 | # CONFIG_EEPROM_LEGACY is not set |
| 351 | # CONFIG_EEPROM_MAX6875 is not set | 438 | # CONFIG_EEPROM_MAX6875 is not set |
| 352 | # CONFIG_EEPROM_93CX6 is not set | 439 | # CONFIG_EEPROM_93CX6 is not set |
| 440 | # CONFIG_IWMC3200TOP is not set | ||
| 353 | CONFIG_HAVE_IDE=y | 441 | CONFIG_HAVE_IDE=y |
| 354 | # CONFIG_IDE is not set | 442 | # CONFIG_IDE is not set |
| 355 | 443 | ||
| 356 | # | 444 | # |
| 357 | # SCSI device support | 445 | # SCSI device support |
| 358 | # | 446 | # |
| 447 | CONFIG_SCSI_MOD=y | ||
| 359 | # CONFIG_RAID_ATTRS is not set | 448 | # CONFIG_RAID_ATTRS is not set |
| 360 | # CONFIG_SCSI is not set | 449 | # CONFIG_SCSI is not set |
| 361 | # CONFIG_SCSI_DMA is not set | 450 | # CONFIG_SCSI_DMA is not set |
| 362 | # CONFIG_SCSI_NETLINK is not set | 451 | # CONFIG_SCSI_NETLINK is not set |
| 363 | # CONFIG_ATA is not set | 452 | # CONFIG_ATA is not set |
| 364 | # CONFIG_MD is not set | 453 | # CONFIG_MD is not set |
| 454 | # CONFIG_PHONE is not set | ||
| 365 | 455 | ||
| 366 | # | 456 | # |
| 367 | # Input device support | 457 | # Input device support |
| @@ -369,6 +459,7 @@ CONFIG_HAVE_IDE=y | |||
| 369 | CONFIG_INPUT=y | 459 | CONFIG_INPUT=y |
| 370 | # CONFIG_INPUT_FF_MEMLESS is not set | 460 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 371 | # CONFIG_INPUT_POLLDEV is not set | 461 | # CONFIG_INPUT_POLLDEV is not set |
| 462 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 372 | 463 | ||
| 373 | # | 464 | # |
| 374 | # Userland interfaces | 465 | # Userland interfaces |
| @@ -385,13 +476,19 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |||
| 385 | # Input Device Drivers | 476 | # Input Device Drivers |
| 386 | # | 477 | # |
| 387 | CONFIG_INPUT_KEYBOARD=y | 478 | CONFIG_INPUT_KEYBOARD=y |
| 479 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 388 | CONFIG_KEYBOARD_ATKBD=y | 480 | CONFIG_KEYBOARD_ATKBD=y |
| 389 | # CONFIG_KEYBOARD_SUNKBD is not set | 481 | # CONFIG_QT2160 is not set |
| 390 | # CONFIG_KEYBOARD_LKKBD is not set | 482 | # CONFIG_KEYBOARD_LKKBD is not set |
| 391 | # CONFIG_KEYBOARD_XTKBD is not set | 483 | # CONFIG_KEYBOARD_GPIO is not set |
| 484 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 485 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 486 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 392 | # CONFIG_KEYBOARD_NEWTON is not set | 487 | # CONFIG_KEYBOARD_NEWTON is not set |
| 488 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 393 | # CONFIG_KEYBOARD_STOWAWAY is not set | 489 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 394 | # CONFIG_KEYBOARD_GPIO is not set | 490 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 491 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 395 | CONFIG_INPUT_MOUSE=y | 492 | CONFIG_INPUT_MOUSE=y |
| 396 | CONFIG_MOUSE_PS2=y | 493 | CONFIG_MOUSE_PS2=y |
| 397 | CONFIG_MOUSE_PS2_ALPS=y | 494 | CONFIG_MOUSE_PS2_ALPS=y |
| @@ -399,6 +496,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y | |||
| 399 | CONFIG_MOUSE_PS2_SYNAPTICS=y | 496 | CONFIG_MOUSE_PS2_SYNAPTICS=y |
| 400 | CONFIG_MOUSE_PS2_TRACKPOINT=y | 497 | CONFIG_MOUSE_PS2_TRACKPOINT=y |
| 401 | # CONFIG_MOUSE_PS2_ELANTECH is not set | 498 | # CONFIG_MOUSE_PS2_ELANTECH is not set |
| 499 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
| 402 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | 500 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set |
| 403 | # CONFIG_MOUSE_SERIAL is not set | 501 | # CONFIG_MOUSE_SERIAL is not set |
| 404 | # CONFIG_MOUSE_APPLETOUCH is not set | 502 | # CONFIG_MOUSE_APPLETOUCH is not set |
| @@ -418,6 +516,7 @@ CONFIG_SERIO=y | |||
| 418 | CONFIG_SERIO_SERPORT=y | 516 | CONFIG_SERIO_SERPORT=y |
| 419 | CONFIG_SERIO_LIBPS2=y | 517 | CONFIG_SERIO_LIBPS2=y |
| 420 | # CONFIG_SERIO_RAW is not set | 518 | # CONFIG_SERIO_RAW is not set |
| 519 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
| 421 | # CONFIG_GAMEPORT is not set | 520 | # CONFIG_GAMEPORT is not set |
| 422 | 521 | ||
| 423 | # | 522 | # |
| @@ -444,11 +543,16 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | |||
| 444 | # Non-8250 serial port support | 543 | # Non-8250 serial port support |
| 445 | # | 544 | # |
| 446 | CONFIG_SERIAL_SAMSUNG=y | 545 | CONFIG_SERIAL_SAMSUNG=y |
| 447 | CONFIG_SERIAL_SAMSUNG_UARTS=3 | 546 | CONFIG_SERIAL_SAMSUNG_UARTS_4=y |
| 547 | CONFIG_SERIAL_SAMSUNG_UARTS=4 | ||
| 448 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set | 548 | # CONFIG_SERIAL_SAMSUNG_DEBUG is not set |
| 449 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y | 549 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
| 550 | CONFIG_SERIAL_S3C6400=y | ||
| 450 | CONFIG_SERIAL_CORE=y | 551 | CONFIG_SERIAL_CORE=y |
| 451 | CONFIG_SERIAL_CORE_CONSOLE=y | 552 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 553 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 554 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 555 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 452 | CONFIG_UNIX98_PTYS=y | 556 | CONFIG_UNIX98_PTYS=y |
| 453 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 557 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 454 | CONFIG_LEGACY_PTYS=y | 558 | CONFIG_LEGACY_PTYS=y |
| @@ -461,6 +565,7 @@ CONFIG_HW_RANDOM=y | |||
| 461 | # CONFIG_TCG_TPM is not set | 565 | # CONFIG_TCG_TPM is not set |
| 462 | CONFIG_I2C=y | 566 | CONFIG_I2C=y |
| 463 | CONFIG_I2C_BOARDINFO=y | 567 | CONFIG_I2C_BOARDINFO=y |
| 568 | CONFIG_I2C_COMPAT=y | ||
| 464 | CONFIG_I2C_CHARDEV=y | 569 | CONFIG_I2C_CHARDEV=y |
| 465 | CONFIG_I2C_HELPER_AUTO=y | 570 | CONFIG_I2C_HELPER_AUTO=y |
| 466 | 571 | ||
| @@ -471,9 +576,11 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 471 | # | 576 | # |
| 472 | # I2C system bus drivers (mostly embedded / system-on-chip) | 577 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 473 | # | 578 | # |
| 579 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 474 | # CONFIG_I2C_GPIO is not set | 580 | # CONFIG_I2C_GPIO is not set |
| 475 | # CONFIG_I2C_OCORES is not set | 581 | # CONFIG_I2C_OCORES is not set |
| 476 | # CONFIG_I2C_SIMTEC is not set | 582 | # CONFIG_I2C_SIMTEC is not set |
| 583 | # CONFIG_I2C_XILINX is not set | ||
| 477 | 584 | ||
| 478 | # | 585 | # |
| 479 | # External I2C/SMBus adapter drivers | 586 | # External I2C/SMBus adapter drivers |
| @@ -486,20 +593,15 @@ CONFIG_I2C_HELPER_AUTO=y | |||
| 486 | # | 593 | # |
| 487 | # CONFIG_I2C_PCA_PLATFORM is not set | 594 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 488 | # CONFIG_I2C_STUB is not set | 595 | # CONFIG_I2C_STUB is not set |
| 489 | |||
| 490 | # | ||
| 491 | # Miscellaneous I2C Chip support | ||
| 492 | # | ||
| 493 | # CONFIG_DS1682 is not set | ||
| 494 | # CONFIG_SENSORS_PCF8574 is not set | ||
| 495 | # CONFIG_PCF8575 is not set | ||
| 496 | # CONFIG_SENSORS_PCA9539 is not set | ||
| 497 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 498 | # CONFIG_I2C_DEBUG_CORE is not set | 596 | # CONFIG_I2C_DEBUG_CORE is not set |
| 499 | # CONFIG_I2C_DEBUG_ALGO is not set | 597 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 500 | # CONFIG_I2C_DEBUG_BUS is not set | 598 | # CONFIG_I2C_DEBUG_BUS is not set |
| 501 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
| 502 | # CONFIG_SPI is not set | 599 | # CONFIG_SPI is not set |
| 600 | |||
| 601 | # | ||
| 602 | # PPS support | ||
| 603 | # | ||
| 604 | # CONFIG_PPS is not set | ||
| 503 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 605 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 504 | CONFIG_GPIOLIB=y | 606 | CONFIG_GPIOLIB=y |
| 505 | # CONFIG_DEBUG_GPIO is not set | 607 | # CONFIG_DEBUG_GPIO is not set |
| @@ -508,13 +610,16 @@ CONFIG_GPIOLIB=y | |||
| 508 | # | 610 | # |
| 509 | # Memory mapped GPIO expanders: | 611 | # Memory mapped GPIO expanders: |
| 510 | # | 612 | # |
| 613 | # CONFIG_GPIO_IT8761E is not set | ||
| 511 | 614 | ||
| 512 | # | 615 | # |
| 513 | # I2C GPIO expanders: | 616 | # I2C GPIO expanders: |
| 514 | # | 617 | # |
| 618 | # CONFIG_GPIO_MAX7300 is not set | ||
| 515 | # CONFIG_GPIO_MAX732X is not set | 619 | # CONFIG_GPIO_MAX732X is not set |
| 516 | # CONFIG_GPIO_PCA953X is not set | 620 | # CONFIG_GPIO_PCA953X is not set |
| 517 | # CONFIG_GPIO_PCF857X is not set | 621 | # CONFIG_GPIO_PCF857X is not set |
| 622 | # CONFIG_GPIO_ADP5588 is not set | ||
| 518 | 623 | ||
| 519 | # | 624 | # |
| 520 | # PCI GPIO expanders: | 625 | # PCI GPIO expanders: |
| @@ -523,10 +628,19 @@ CONFIG_GPIOLIB=y | |||
| 523 | # | 628 | # |
| 524 | # SPI GPIO expanders: | 629 | # SPI GPIO expanders: |
| 525 | # | 630 | # |
| 631 | |||
| 632 | # | ||
| 633 | # AC97 GPIO expanders: | ||
| 634 | # | ||
| 526 | # CONFIG_W1 is not set | 635 | # CONFIG_W1 is not set |
| 527 | # CONFIG_POWER_SUPPLY is not set | 636 | # CONFIG_POWER_SUPPLY is not set |
| 528 | CONFIG_HWMON=y | 637 | CONFIG_HWMON=y |
| 529 | # CONFIG_HWMON_VID is not set | 638 | # CONFIG_HWMON_VID is not set |
| 639 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 640 | |||
| 641 | # | ||
| 642 | # Native drivers | ||
| 643 | # | ||
| 530 | # CONFIG_SENSORS_AD7414 is not set | 644 | # CONFIG_SENSORS_AD7414 is not set |
| 531 | # CONFIG_SENSORS_AD7418 is not set | 645 | # CONFIG_SENSORS_AD7418 is not set |
| 532 | # CONFIG_SENSORS_ADM1021 is not set | 646 | # CONFIG_SENSORS_ADM1021 is not set |
| @@ -535,10 +649,11 @@ CONFIG_HWMON=y | |||
| 535 | # CONFIG_SENSORS_ADM1029 is not set | 649 | # CONFIG_SENSORS_ADM1029 is not set |
| 536 | # CONFIG_SENSORS_ADM1031 is not set | 650 | # CONFIG_SENSORS_ADM1031 is not set |
| 537 | # CONFIG_SENSORS_ADM9240 is not set | 651 | # CONFIG_SENSORS_ADM9240 is not set |
| 652 | # CONFIG_SENSORS_ADT7411 is not set | ||
| 538 | # CONFIG_SENSORS_ADT7462 is not set | 653 | # CONFIG_SENSORS_ADT7462 is not set |
| 539 | # CONFIG_SENSORS_ADT7470 is not set | 654 | # CONFIG_SENSORS_ADT7470 is not set |
| 540 | # CONFIG_SENSORS_ADT7473 is not set | ||
| 541 | # CONFIG_SENSORS_ADT7475 is not set | 655 | # CONFIG_SENSORS_ADT7475 is not set |
| 656 | # CONFIG_SENSORS_ASC7621 is not set | ||
| 542 | # CONFIG_SENSORS_ATXP1 is not set | 657 | # CONFIG_SENSORS_ATXP1 is not set |
| 543 | # CONFIG_SENSORS_DS1621 is not set | 658 | # CONFIG_SENSORS_DS1621 is not set |
| 544 | # CONFIG_SENSORS_F71805F is not set | 659 | # CONFIG_SENSORS_F71805F is not set |
| @@ -549,6 +664,7 @@ CONFIG_HWMON=y | |||
| 549 | # CONFIG_SENSORS_GL520SM is not set | 664 | # CONFIG_SENSORS_GL520SM is not set |
| 550 | # CONFIG_SENSORS_IT87 is not set | 665 | # CONFIG_SENSORS_IT87 is not set |
| 551 | # CONFIG_SENSORS_LM63 is not set | 666 | # CONFIG_SENSORS_LM63 is not set |
| 667 | # CONFIG_SENSORS_LM73 is not set | ||
| 552 | # CONFIG_SENSORS_LM75 is not set | 668 | # CONFIG_SENSORS_LM75 is not set |
| 553 | # CONFIG_SENSORS_LM77 is not set | 669 | # CONFIG_SENSORS_LM77 is not set |
| 554 | # CONFIG_SENSORS_LM78 is not set | 670 | # CONFIG_SENSORS_LM78 is not set |
| @@ -573,8 +689,10 @@ CONFIG_HWMON=y | |||
| 573 | # CONFIG_SENSORS_SMSC47M192 is not set | 689 | # CONFIG_SENSORS_SMSC47M192 is not set |
| 574 | # CONFIG_SENSORS_SMSC47B397 is not set | 690 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 575 | # CONFIG_SENSORS_ADS7828 is not set | 691 | # CONFIG_SENSORS_ADS7828 is not set |
| 692 | # CONFIG_SENSORS_AMC6821 is not set | ||
| 576 | # CONFIG_SENSORS_THMC50 is not set | 693 | # CONFIG_SENSORS_THMC50 is not set |
| 577 | # CONFIG_SENSORS_TMP401 is not set | 694 | # CONFIG_SENSORS_TMP401 is not set |
| 695 | # CONFIG_SENSORS_TMP421 is not set | ||
| 578 | # CONFIG_SENSORS_VT1211 is not set | 696 | # CONFIG_SENSORS_VT1211 is not set |
| 579 | # CONFIG_SENSORS_W83781D is not set | 697 | # CONFIG_SENSORS_W83781D is not set |
| 580 | # CONFIG_SENSORS_W83791D is not set | 698 | # CONFIG_SENSORS_W83791D is not set |
| @@ -584,9 +702,8 @@ CONFIG_HWMON=y | |||
| 584 | # CONFIG_SENSORS_W83L786NG is not set | 702 | # CONFIG_SENSORS_W83L786NG is not set |
| 585 | # CONFIG_SENSORS_W83627HF is not set | 703 | # CONFIG_SENSORS_W83627HF is not set |
| 586 | # CONFIG_SENSORS_W83627EHF is not set | 704 | # CONFIG_SENSORS_W83627EHF is not set |
| 587 | # CONFIG_HWMON_DEBUG_CHIP is not set | 705 | # CONFIG_SENSORS_LIS3_I2C is not set |
| 588 | # CONFIG_THERMAL is not set | 706 | # CONFIG_THERMAL is not set |
| 589 | # CONFIG_THERMAL_HWMON is not set | ||
| 590 | # CONFIG_WATCHDOG is not set | 707 | # CONFIG_WATCHDOG is not set |
| 591 | CONFIG_SSB_POSSIBLE=y | 708 | CONFIG_SSB_POSSIBLE=y |
| 592 | 709 | ||
| @@ -599,10 +716,12 @@ CONFIG_SSB_POSSIBLE=y | |||
| 599 | # Multifunction device drivers | 716 | # Multifunction device drivers |
| 600 | # | 717 | # |
| 601 | # CONFIG_MFD_CORE is not set | 718 | # CONFIG_MFD_CORE is not set |
| 719 | # CONFIG_MFD_88PM860X is not set | ||
| 602 | # CONFIG_MFD_SM501 is not set | 720 | # CONFIG_MFD_SM501 is not set |
| 603 | # CONFIG_MFD_ASIC3 is not set | 721 | # CONFIG_MFD_ASIC3 is not set |
| 604 | # CONFIG_HTC_EGPIO is not set | 722 | # CONFIG_HTC_EGPIO is not set |
| 605 | # CONFIG_HTC_PASIC3 is not set | 723 | # CONFIG_HTC_PASIC3 is not set |
| 724 | # CONFIG_HTC_I2CPLD is not set | ||
| 606 | # CONFIG_TPS65010 is not set | 725 | # CONFIG_TPS65010 is not set |
| 607 | # CONFIG_TWL4030_CORE is not set | 726 | # CONFIG_TWL4030_CORE is not set |
| 608 | # CONFIG_MFD_TMIO is not set | 727 | # CONFIG_MFD_TMIO is not set |
| @@ -610,10 +729,15 @@ CONFIG_SSB_POSSIBLE=y | |||
| 610 | # CONFIG_MFD_TC6387XB is not set | 729 | # CONFIG_MFD_TC6387XB is not set |
| 611 | # CONFIG_MFD_TC6393XB is not set | 730 | # CONFIG_MFD_TC6393XB is not set |
| 612 | # CONFIG_PMIC_DA903X is not set | 731 | # CONFIG_PMIC_DA903X is not set |
| 732 | # CONFIG_PMIC_ADP5520 is not set | ||
| 733 | # CONFIG_MFD_MAX8925 is not set | ||
| 613 | # CONFIG_MFD_WM8400 is not set | 734 | # CONFIG_MFD_WM8400 is not set |
| 735 | # CONFIG_MFD_WM831X is not set | ||
| 614 | # CONFIG_MFD_WM8350_I2C is not set | 736 | # CONFIG_MFD_WM8350_I2C is not set |
| 737 | # CONFIG_MFD_WM8994 is not set | ||
| 615 | # CONFIG_MFD_PCF50633 is not set | 738 | # CONFIG_MFD_PCF50633 is not set |
| 616 | # CONFIG_AB3100_CORE is not set | 739 | # CONFIG_AB3100_CORE is not set |
| 740 | # CONFIG_REGULATOR is not set | ||
| 617 | # CONFIG_MEDIA_SUPPORT is not set | 741 | # CONFIG_MEDIA_SUPPORT is not set |
| 618 | 742 | ||
| 619 | # | 743 | # |
| @@ -637,7 +761,6 @@ CONFIG_DUMMY_CONSOLE=y | |||
| 637 | # CONFIG_SOUND is not set | 761 | # CONFIG_SOUND is not set |
| 638 | CONFIG_HID_SUPPORT=y | 762 | CONFIG_HID_SUPPORT=y |
| 639 | CONFIG_HID=y | 763 | CONFIG_HID=y |
| 640 | CONFIG_HID_DEBUG=y | ||
| 641 | # CONFIG_HIDRAW is not set | 764 | # CONFIG_HIDRAW is not set |
| 642 | # CONFIG_HID_PID is not set | 765 | # CONFIG_HID_PID is not set |
| 643 | 766 | ||
| @@ -680,13 +803,12 @@ CONFIG_SDIO_UART=y | |||
| 680 | CONFIG_MMC_SDHCI=y | 803 | CONFIG_MMC_SDHCI=y |
| 681 | # CONFIG_MMC_SDHCI_PLTFM is not set | 804 | # CONFIG_MMC_SDHCI_PLTFM is not set |
| 682 | # CONFIG_MEMSTICK is not set | 805 | # CONFIG_MEMSTICK is not set |
| 683 | # CONFIG_ACCESSIBILITY is not set | ||
| 684 | # CONFIG_NEW_LEDS is not set | 806 | # CONFIG_NEW_LEDS is not set |
| 807 | # CONFIG_ACCESSIBILITY is not set | ||
| 685 | CONFIG_RTC_LIB=y | 808 | CONFIG_RTC_LIB=y |
| 686 | # CONFIG_RTC_CLASS is not set | 809 | # CONFIG_RTC_CLASS is not set |
| 687 | # CONFIG_DMADEVICES is not set | 810 | # CONFIG_DMADEVICES is not set |
| 688 | # CONFIG_AUXDISPLAY is not set | 811 | # CONFIG_AUXDISPLAY is not set |
| 689 | # CONFIG_REGULATOR is not set | ||
| 690 | # CONFIG_UIO is not set | 812 | # CONFIG_UIO is not set |
| 691 | # CONFIG_STAGING is not set | 813 | # CONFIG_STAGING is not set |
| 692 | 814 | ||
| @@ -710,6 +832,7 @@ CONFIG_FS_POSIX_ACL=y | |||
| 710 | # CONFIG_XFS_FS is not set | 832 | # CONFIG_XFS_FS is not set |
| 711 | # CONFIG_GFS2_FS is not set | 833 | # CONFIG_GFS2_FS is not set |
| 712 | # CONFIG_BTRFS_FS is not set | 834 | # CONFIG_BTRFS_FS is not set |
| 835 | # CONFIG_NILFS2_FS is not set | ||
| 713 | CONFIG_FILE_LOCKING=y | 836 | CONFIG_FILE_LOCKING=y |
| 714 | CONFIG_FSNOTIFY=y | 837 | CONFIG_FSNOTIFY=y |
| 715 | CONFIG_DNOTIFY=y | 838 | CONFIG_DNOTIFY=y |
| @@ -758,6 +881,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 758 | # CONFIG_BEFS_FS is not set | 881 | # CONFIG_BEFS_FS is not set |
| 759 | # CONFIG_BFS_FS is not set | 882 | # CONFIG_BFS_FS is not set |
| 760 | # CONFIG_EFS_FS is not set | 883 | # CONFIG_EFS_FS is not set |
| 884 | # CONFIG_LOGFS is not set | ||
| 761 | CONFIG_CRAMFS=y | 885 | CONFIG_CRAMFS=y |
| 762 | # CONFIG_SQUASHFS is not set | 886 | # CONFIG_SQUASHFS is not set |
| 763 | # CONFIG_VXFS_FS is not set | 887 | # CONFIG_VXFS_FS is not set |
| @@ -772,7 +896,6 @@ CONFIG_ROMFS_BACKED_BY_BLOCK=y | |||
| 772 | CONFIG_ROMFS_ON_BLOCK=y | 896 | CONFIG_ROMFS_ON_BLOCK=y |
| 773 | # CONFIG_SYSV_FS is not set | 897 | # CONFIG_SYSV_FS is not set |
| 774 | # CONFIG_UFS_FS is not set | 898 | # CONFIG_UFS_FS is not set |
| 775 | # CONFIG_NILFS2_FS is not set | ||
| 776 | 899 | ||
| 777 | # | 900 | # |
| 778 | # Partition Types | 901 | # Partition Types |
| @@ -789,6 +912,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
| 789 | CONFIG_ENABLE_MUST_CHECK=y | 912 | CONFIG_ENABLE_MUST_CHECK=y |
| 790 | CONFIG_FRAME_WARN=1024 | 913 | CONFIG_FRAME_WARN=1024 |
| 791 | CONFIG_MAGIC_SYSRQ=y | 914 | CONFIG_MAGIC_SYSRQ=y |
| 915 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 792 | # CONFIG_UNUSED_SYMBOLS is not set | 916 | # CONFIG_UNUSED_SYMBOLS is not set |
| 793 | # CONFIG_DEBUG_FS is not set | 917 | # CONFIG_DEBUG_FS is not set |
| 794 | # CONFIG_HEADERS_CHECK is not set | 918 | # CONFIG_HEADERS_CHECK is not set |
| @@ -826,11 +950,13 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
| 826 | # CONFIG_DEBUG_LIST is not set | 950 | # CONFIG_DEBUG_LIST is not set |
| 827 | # CONFIG_DEBUG_SG is not set | 951 | # CONFIG_DEBUG_SG is not set |
| 828 | # CONFIG_DEBUG_NOTIFIERS is not set | 952 | # CONFIG_DEBUG_NOTIFIERS is not set |
| 953 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 829 | # CONFIG_BOOT_PRINTK_DELAY is not set | 954 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 830 | # CONFIG_RCU_TORTURE_TEST is not set | 955 | # CONFIG_RCU_TORTURE_TEST is not set |
| 831 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | 956 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 832 | # CONFIG_BACKTRACE_SELF_TEST is not set | 957 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 833 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | 958 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 959 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 834 | # CONFIG_FAULT_INJECTION is not set | 960 | # CONFIG_FAULT_INJECTION is not set |
| 835 | # CONFIG_LATENCYTOP is not set | 961 | # CONFIG_LATENCYTOP is not set |
| 836 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 962 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
| @@ -839,6 +965,7 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 839 | CONFIG_TRACING_SUPPORT=y | 965 | CONFIG_TRACING_SUPPORT=y |
| 840 | CONFIG_FTRACE=y | 966 | CONFIG_FTRACE=y |
| 841 | # CONFIG_FUNCTION_TRACER is not set | 967 | # CONFIG_FUNCTION_TRACER is not set |
| 968 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 842 | # CONFIG_SCHED_TRACER is not set | 969 | # CONFIG_SCHED_TRACER is not set |
| 843 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 970 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 844 | # CONFIG_BOOT_TRACER is not set | 971 | # CONFIG_BOOT_TRACER is not set |
| @@ -849,6 +976,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 849 | # CONFIG_KMEMTRACE is not set | 976 | # CONFIG_KMEMTRACE is not set |
| 850 | # CONFIG_WORKQUEUE_TRACER is not set | 977 | # CONFIG_WORKQUEUE_TRACER is not set |
| 851 | # CONFIG_BLK_DEV_IO_TRACE is not set | 978 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 979 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 852 | # CONFIG_SAMPLES is not set | 980 | # CONFIG_SAMPLES is not set |
| 853 | CONFIG_HAVE_ARCH_KGDB=y | 981 | CONFIG_HAVE_ARCH_KGDB=y |
| 854 | # CONFIG_KGDB is not set | 982 | # CONFIG_KGDB is not set |
| @@ -857,8 +985,9 @@ CONFIG_DEBUG_USER=y | |||
| 857 | CONFIG_DEBUG_ERRORS=y | 985 | CONFIG_DEBUG_ERRORS=y |
| 858 | # CONFIG_DEBUG_STACK_USAGE is not set | 986 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 859 | CONFIG_DEBUG_LL=y | 987 | CONFIG_DEBUG_LL=y |
| 988 | # CONFIG_EARLY_PRINTK is not set | ||
| 860 | # CONFIG_DEBUG_ICEDCC is not set | 989 | # CONFIG_DEBUG_ICEDCC is not set |
| 861 | CONFIG_DEBUG_S3C_PORT=y | 990 | # CONFIG_OC_ETM is not set |
| 862 | CONFIG_DEBUG_S3C_UART=0 | 991 | CONFIG_DEBUG_S3C_UART=0 |
| 863 | 992 | ||
| 864 | # | 993 | # |
| @@ -867,7 +996,11 @@ CONFIG_DEBUG_S3C_UART=0 | |||
| 867 | # CONFIG_KEYS is not set | 996 | # CONFIG_KEYS is not set |
| 868 | # CONFIG_SECURITY is not set | 997 | # CONFIG_SECURITY is not set |
| 869 | # CONFIG_SECURITYFS is not set | 998 | # CONFIG_SECURITYFS is not set |
| 870 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 999 | # CONFIG_DEFAULT_SECURITY_SELINUX is not set |
| 1000 | # CONFIG_DEFAULT_SECURITY_SMACK is not set | ||
| 1001 | # CONFIG_DEFAULT_SECURITY_TOMOYO is not set | ||
| 1002 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 1003 | CONFIG_DEFAULT_SECURITY="" | ||
| 871 | # CONFIG_CRYPTO is not set | 1004 | # CONFIG_CRYPTO is not set |
| 872 | # CONFIG_BINARY_PRINTF is not set | 1005 | # CONFIG_BINARY_PRINTF is not set |
| 873 | 1006 | ||
| @@ -884,8 +1017,10 @@ CONFIG_CRC32=y | |||
| 884 | # CONFIG_CRC7 is not set | 1017 | # CONFIG_CRC7 is not set |
| 885 | # CONFIG_LIBCRC32C is not set | 1018 | # CONFIG_LIBCRC32C is not set |
| 886 | CONFIG_ZLIB_INFLATE=y | 1019 | CONFIG_ZLIB_INFLATE=y |
| 1020 | CONFIG_LZO_DECOMPRESS=y | ||
| 887 | CONFIG_DECOMPRESS_GZIP=y | 1021 | CONFIG_DECOMPRESS_GZIP=y |
| 888 | CONFIG_DECOMPRESS_BZIP2=y | 1022 | CONFIG_DECOMPRESS_BZIP2=y |
| 889 | CONFIG_DECOMPRESS_LZMA=y | 1023 | CONFIG_DECOMPRESS_LZMA=y |
| 1024 | CONFIG_DECOMPRESS_LZO=y | ||
| 890 | CONFIG_HAS_IOMEM=y | 1025 | CONFIG_HAS_IOMEM=y |
| 891 | CONFIG_HAS_DMA=y | 1026 | CONFIG_HAS_DMA=y |
diff --git a/arch/arm/configs/s5pc110_defconfig b/arch/arm/configs/s5pc110_defconfig index 6ea636131ac8..c4de360b0f69 100644 --- a/arch/arm/configs/s5pc110_defconfig +++ b/arch/arm/configs/s5pc110_defconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc4 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Wed Feb 24 15:36:54 2010 | 4 | # Wed May 26 19:04:37 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -17,6 +20,7 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 18 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 21 | CONFIG_ARM_L1_CACHE_SHIFT_6=y | 25 | CONFIG_ARM_L1_CACHE_SHIFT_6=y |
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | 26 | CONFIG_VECTORS_BASE=0xffff0000 |
| @@ -33,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
| 33 | CONFIG_LOCALVERSION="" | 37 | CONFIG_LOCALVERSION="" |
| 34 | CONFIG_LOCALVERSION_AUTO=y | 38 | CONFIG_LOCALVERSION_AUTO=y |
| 35 | CONFIG_HAVE_KERNEL_GZIP=y | 39 | CONFIG_HAVE_KERNEL_GZIP=y |
| 40 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 36 | CONFIG_HAVE_KERNEL_LZO=y | 41 | CONFIG_HAVE_KERNEL_LZO=y |
| 37 | CONFIG_KERNEL_GZIP=y | 42 | CONFIG_KERNEL_GZIP=y |
| 38 | # CONFIG_KERNEL_BZIP2 is not set | 43 | # CONFIG_KERNEL_BZIP2 is not set |
| @@ -54,7 +59,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | 59 | # CONFIG_TREE_RCU_TRACE is not set |
| 55 | # CONFIG_IKCONFIG is not set | 60 | # CONFIG_IKCONFIG is not set |
| 56 | CONFIG_LOG_BUF_SHIFT=17 | 61 | CONFIG_LOG_BUF_SHIFT=17 |
| 57 | # CONFIG_GROUP_SCHED is not set | ||
| 58 | # CONFIG_CGROUPS is not set | 62 | # CONFIG_CGROUPS is not set |
| 59 | CONFIG_SYSFS_DEPRECATED=y | 63 | CONFIG_SYSFS_DEPRECATED=y |
| 60 | CONFIG_SYSFS_DEPRECATED_V2=y | 64 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -90,10 +94,14 @@ CONFIG_TIMERFD=y | |||
| 90 | CONFIG_EVENTFD=y | 94 | CONFIG_EVENTFD=y |
| 91 | CONFIG_SHMEM=y | 95 | CONFIG_SHMEM=y |
| 92 | CONFIG_AIO=y | 96 | CONFIG_AIO=y |
| 97 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 98 | CONFIG_PERF_USE_VMALLOC=y | ||
| 93 | 99 | ||
| 94 | # | 100 | # |
| 95 | # Kernel Performance Events And Counters | 101 | # Kernel Performance Events And Counters |
| 96 | # | 102 | # |
| 103 | # CONFIG_PERF_EVENTS is not set | ||
| 104 | # CONFIG_PERF_COUNTERS is not set | ||
| 97 | CONFIG_VM_EVENT_COUNTERS=y | 105 | CONFIG_VM_EVENT_COUNTERS=y |
| 98 | CONFIG_SLUB_DEBUG=y | 106 | CONFIG_SLUB_DEBUG=y |
| 99 | CONFIG_COMPAT_BRK=y | 107 | CONFIG_COMPAT_BRK=y |
| @@ -175,8 +183,11 @@ CONFIG_MMU=y | |||
| 175 | # CONFIG_ARCH_INTEGRATOR is not set | 183 | # CONFIG_ARCH_INTEGRATOR is not set |
| 176 | # CONFIG_ARCH_REALVIEW is not set | 184 | # CONFIG_ARCH_REALVIEW is not set |
| 177 | # CONFIG_ARCH_VERSATILE is not set | 185 | # CONFIG_ARCH_VERSATILE is not set |
| 186 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 178 | # CONFIG_ARCH_AT91 is not set | 187 | # CONFIG_ARCH_AT91 is not set |
| 188 | # CONFIG_ARCH_BCMRING is not set | ||
| 179 | # CONFIG_ARCH_CLPS711X is not set | 189 | # CONFIG_ARCH_CLPS711X is not set |
| 190 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 180 | # CONFIG_ARCH_GEMINI is not set | 191 | # CONFIG_ARCH_GEMINI is not set |
| 181 | # CONFIG_ARCH_EBSA110 is not set | 192 | # CONFIG_ARCH_EBSA110 is not set |
| 182 | # CONFIG_ARCH_EP93XX is not set | 193 | # CONFIG_ARCH_EP93XX is not set |
| @@ -185,7 +196,6 @@ CONFIG_MMU=y | |||
| 185 | # CONFIG_ARCH_STMP3XXX is not set | 196 | # CONFIG_ARCH_STMP3XXX is not set |
| 186 | # CONFIG_ARCH_NETX is not set | 197 | # CONFIG_ARCH_NETX is not set |
| 187 | # CONFIG_ARCH_H720X is not set | 198 | # CONFIG_ARCH_H720X is not set |
| 188 | # CONFIG_ARCH_NOMADIK is not set | ||
| 189 | # CONFIG_ARCH_IOP13XX is not set | 199 | # CONFIG_ARCH_IOP13XX is not set |
| 190 | # CONFIG_ARCH_IOP32X is not set | 200 | # CONFIG_ARCH_IOP32X is not set |
| 191 | # CONFIG_ARCH_IOP33X is not set | 201 | # CONFIG_ARCH_IOP33X is not set |
| @@ -202,24 +212,27 @@ CONFIG_MMU=y | |||
| 202 | # CONFIG_ARCH_KS8695 is not set | 212 | # CONFIG_ARCH_KS8695 is not set |
| 203 | # CONFIG_ARCH_NS9XXX is not set | 213 | # CONFIG_ARCH_NS9XXX is not set |
| 204 | # CONFIG_ARCH_W90X900 is not set | 214 | # CONFIG_ARCH_W90X900 is not set |
| 215 | # CONFIG_ARCH_NUC93X is not set | ||
| 205 | # CONFIG_ARCH_PNX4008 is not set | 216 | # CONFIG_ARCH_PNX4008 is not set |
| 206 | # CONFIG_ARCH_PXA is not set | 217 | # CONFIG_ARCH_PXA is not set |
| 207 | # CONFIG_ARCH_MSM is not set | 218 | # CONFIG_ARCH_MSM is not set |
| 219 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 208 | # CONFIG_ARCH_RPC is not set | 220 | # CONFIG_ARCH_RPC is not set |
| 209 | # CONFIG_ARCH_SA1100 is not set | 221 | # CONFIG_ARCH_SA1100 is not set |
| 210 | # CONFIG_ARCH_S3C2410 is not set | 222 | # CONFIG_ARCH_S3C2410 is not set |
| 211 | # CONFIG_ARCH_S3C64XX is not set | 223 | # CONFIG_ARCH_S3C64XX is not set |
| 212 | # CONFIG_ARCH_S5P6440 is not set | 224 | # CONFIG_ARCH_S5P6440 is not set |
| 213 | # CONFIG_ARCH_S5P6442 is not set | 225 | # CONFIG_ARCH_S5P6442 is not set |
| 214 | # CONFIG_ARCH_S5PC1XX is not set | 226 | # CONFIG_ARCH_S5PC100 is not set |
| 215 | CONFIG_ARCH_S5PV210=y | 227 | CONFIG_ARCH_S5PV210=y |
| 216 | # CONFIG_ARCH_SHARK is not set | 228 | # CONFIG_ARCH_SHARK is not set |
| 217 | # CONFIG_ARCH_LH7A40X is not set | 229 | # CONFIG_ARCH_LH7A40X is not set |
| 218 | # CONFIG_ARCH_U300 is not set | 230 | # CONFIG_ARCH_U300 is not set |
| 231 | # CONFIG_ARCH_U8500 is not set | ||
| 232 | # CONFIG_ARCH_NOMADIK is not set | ||
| 219 | # CONFIG_ARCH_DAVINCI is not set | 233 | # CONFIG_ARCH_DAVINCI is not set |
| 220 | # CONFIG_ARCH_OMAP is not set | 234 | # CONFIG_ARCH_OMAP is not set |
| 221 | # CONFIG_ARCH_BCMRING is not set | 235 | # CONFIG_PLAT_SPEAR is not set |
| 222 | # CONFIG_ARCH_U8500 is not set | ||
| 223 | CONFIG_PLAT_SAMSUNG=y | 236 | CONFIG_PLAT_SAMSUNG=y |
| 224 | 237 | ||
| 225 | # | 238 | # |
| @@ -235,16 +248,22 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y | |||
| 235 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | 248 | CONFIG_S3C_GPIO_CFG_S3C24XX=y |
| 236 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | 249 | CONFIG_S3C_GPIO_CFG_S3C64XX=y |
| 237 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | 250 | CONFIG_S3C_GPIO_PULL_UPDOWN=y |
| 251 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 238 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | 252 | CONFIG_SAMSUNG_GPIO_EXTRA=0 |
| 239 | CONFIG_S3C_GPIO_SPACE=0 | 253 | CONFIG_S3C_GPIO_SPACE=0 |
| 240 | CONFIG_S3C_GPIO_TRACK=y | 254 | CONFIG_S3C_GPIO_TRACK=y |
| 241 | # CONFIG_S3C_ADC is not set | 255 | # CONFIG_S3C_ADC is not set |
| 256 | CONFIG_S3C_DEV_WDT=y | ||
| 257 | CONFIG_S3C_PL330_DMA=y | ||
| 242 | 258 | ||
| 243 | # | 259 | # |
| 244 | # Power management | 260 | # Power management |
| 245 | # | 261 | # |
| 246 | CONFIG_PLAT_S5P=y | 262 | CONFIG_PLAT_S5P=y |
| 263 | CONFIG_S5P_EXT_INT=y | ||
| 247 | CONFIG_CPU_S5PV210=y | 264 | CONFIG_CPU_S5PV210=y |
| 265 | # CONFIG_MACH_AQUILA is not set | ||
| 266 | # CONFIG_MACH_GONI is not set | ||
| 248 | # CONFIG_MACH_SMDKV210 is not set | 267 | # CONFIG_MACH_SMDKV210 is not set |
| 249 | CONFIG_MACH_SMDKC110=y | 268 | CONFIG_MACH_SMDKC110=y |
| 250 | 269 | ||
| @@ -274,11 +293,14 @@ CONFIG_ARM_THUMB=y | |||
| 274 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 293 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 275 | CONFIG_HAS_TLS_REG=y | 294 | CONFIG_HAS_TLS_REG=y |
| 276 | CONFIG_ARM_L1_CACHE_SHIFT=6 | 295 | CONFIG_ARM_L1_CACHE_SHIFT=6 |
| 296 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 297 | CONFIG_CPU_HAS_PMU=y | ||
| 277 | # CONFIG_ARM_ERRATA_430973 is not set | 298 | # CONFIG_ARM_ERRATA_430973 is not set |
| 278 | # CONFIG_ARM_ERRATA_458693 is not set | 299 | # CONFIG_ARM_ERRATA_458693 is not set |
| 279 | # CONFIG_ARM_ERRATA_460075 is not set | 300 | # CONFIG_ARM_ERRATA_460075 is not set |
| 280 | CONFIG_ARM_VIC=y | 301 | CONFIG_ARM_VIC=y |
| 281 | CONFIG_ARM_VIC_NR=2 | 302 | CONFIG_ARM_VIC_NR=2 |
| 303 | CONFIG_PL330=y | ||
| 282 | 304 | ||
| 283 | # | 305 | # |
| 284 | # Bus support | 306 | # Bus support |
| @@ -327,6 +349,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 327 | CONFIG_ZBOOT_ROM_TEXT=0 | 349 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 328 | CONFIG_ZBOOT_ROM_BSS=0 | 350 | CONFIG_ZBOOT_ROM_BSS=0 |
| 329 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 351 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
| 352 | # CONFIG_CMDLINE_FORCE is not set | ||
| 330 | # CONFIG_XIP_KERNEL is not set | 353 | # CONFIG_XIP_KERNEL is not set |
| 331 | # CONFIG_KEXEC is not set | 354 | # CONFIG_KEXEC is not set |
| 332 | 355 | ||
| @@ -404,6 +427,7 @@ CONFIG_HAVE_IDE=y | |||
| 404 | # | 427 | # |
| 405 | # SCSI device support | 428 | # SCSI device support |
| 406 | # | 429 | # |
| 430 | CONFIG_SCSI_MOD=y | ||
| 407 | # CONFIG_RAID_ATTRS is not set | 431 | # CONFIG_RAID_ATTRS is not set |
| 408 | CONFIG_SCSI=y | 432 | CONFIG_SCSI=y |
| 409 | CONFIG_SCSI_DMA=y | 433 | CONFIG_SCSI_DMA=y |
| @@ -472,6 +496,7 @@ CONFIG_INPUT_EVDEV=y | |||
| 472 | CONFIG_INPUT_TOUCHSCREEN=y | 496 | CONFIG_INPUT_TOUCHSCREEN=y |
| 473 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 497 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 474 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | 498 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set |
| 499 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 475 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 500 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 476 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 501 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 477 | # CONFIG_TOUCHSCREEN_ELO is not set | 502 | # CONFIG_TOUCHSCREEN_ELO is not set |
| @@ -526,6 +551,9 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y | |||
| 526 | CONFIG_SERIAL_S5PV210=y | 551 | CONFIG_SERIAL_S5PV210=y |
| 527 | CONFIG_SERIAL_CORE=y | 552 | CONFIG_SERIAL_CORE=y |
| 528 | CONFIG_SERIAL_CORE_CONSOLE=y | 553 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 554 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 555 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 556 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 529 | CONFIG_UNIX98_PTYS=y | 557 | CONFIG_UNIX98_PTYS=y |
| 530 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 558 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 531 | CONFIG_LEGACY_PTYS=y | 559 | CONFIG_LEGACY_PTYS=y |
| @@ -551,6 +579,7 @@ CONFIG_GPIOLIB=y | |||
| 551 | # | 579 | # |
| 552 | # Memory mapped GPIO expanders: | 580 | # Memory mapped GPIO expanders: |
| 553 | # | 581 | # |
| 582 | # CONFIG_GPIO_IT8761E is not set | ||
| 554 | 583 | ||
| 555 | # | 584 | # |
| 556 | # I2C GPIO expanders: | 585 | # I2C GPIO expanders: |
| @@ -572,6 +601,7 @@ CONFIG_GPIOLIB=y | |||
| 572 | # CONFIG_HWMON is not set | 601 | # CONFIG_HWMON is not set |
| 573 | # CONFIG_THERMAL is not set | 602 | # CONFIG_THERMAL is not set |
| 574 | # CONFIG_WATCHDOG is not set | 603 | # CONFIG_WATCHDOG is not set |
| 604 | CONFIG_HAVE_S3C2410_WATCHDOG=y | ||
| 575 | CONFIG_SSB_POSSIBLE=y | 605 | CONFIG_SSB_POSSIBLE=y |
| 576 | 606 | ||
| 577 | # | 607 | # |
| @@ -624,10 +654,6 @@ CONFIG_RTC_LIB=y | |||
| 624 | # CONFIG_DMADEVICES is not set | 654 | # CONFIG_DMADEVICES is not set |
| 625 | # CONFIG_AUXDISPLAY is not set | 655 | # CONFIG_AUXDISPLAY is not set |
| 626 | # CONFIG_UIO is not set | 656 | # CONFIG_UIO is not set |
| 627 | |||
| 628 | # | ||
| 629 | # TI VLYNQ | ||
| 630 | # | ||
| 631 | # CONFIG_STAGING is not set | 657 | # CONFIG_STAGING is not set |
| 632 | 658 | ||
| 633 | # | 659 | # |
| @@ -696,6 +722,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 696 | # CONFIG_BEFS_FS is not set | 722 | # CONFIG_BEFS_FS is not set |
| 697 | # CONFIG_BFS_FS is not set | 723 | # CONFIG_BFS_FS is not set |
| 698 | # CONFIG_EFS_FS is not set | 724 | # CONFIG_EFS_FS is not set |
| 725 | # CONFIG_LOGFS is not set | ||
| 699 | CONFIG_CRAMFS=y | 726 | CONFIG_CRAMFS=y |
| 700 | # CONFIG_SQUASHFS is not set | 727 | # CONFIG_SQUASHFS is not set |
| 701 | # CONFIG_VXFS_FS is not set | 728 | # CONFIG_VXFS_FS is not set |
| @@ -835,6 +862,8 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 835 | CONFIG_TRACING_SUPPORT=y | 862 | CONFIG_TRACING_SUPPORT=y |
| 836 | CONFIG_FTRACE=y | 863 | CONFIG_FTRACE=y |
| 837 | # CONFIG_FUNCTION_TRACER is not set | 864 | # CONFIG_FUNCTION_TRACER is not set |
| 865 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 866 | # CONFIG_PREEMPT_TRACER is not set | ||
| 838 | # CONFIG_SCHED_TRACER is not set | 867 | # CONFIG_SCHED_TRACER is not set |
| 839 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 868 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 840 | # CONFIG_BOOT_TRACER is not set | 869 | # CONFIG_BOOT_TRACER is not set |
| @@ -845,6 +874,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 845 | # CONFIG_KMEMTRACE is not set | 874 | # CONFIG_KMEMTRACE is not set |
| 846 | # CONFIG_WORKQUEUE_TRACER is not set | 875 | # CONFIG_WORKQUEUE_TRACER is not set |
| 847 | # CONFIG_BLK_DEV_IO_TRACE is not set | 876 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 877 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 848 | # CONFIG_SAMPLES is not set | 878 | # CONFIG_SAMPLES is not set |
| 849 | CONFIG_HAVE_ARCH_KGDB=y | 879 | CONFIG_HAVE_ARCH_KGDB=y |
| 850 | # CONFIG_KGDB is not set | 880 | # CONFIG_KGDB is not set |
diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig index 3f7d47491b54..e2f5bce29828 100644 --- a/arch/arm/configs/s5pv210_defconfig +++ b/arch/arm/configs/s5pv210_defconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | # | 1 | # |
| 2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
| 3 | # Linux kernel version: 2.6.33-rc4 | 3 | # Linux kernel version: 2.6.34 |
| 4 | # Wed Feb 24 15:36:16 2010 | 4 | # Wed May 26 19:04:39 2010 |
| 5 | # | 5 | # |
| 6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | CONFIG_GENERIC_GPIO=y | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | CONFIG_GENERIC_TIME=y | ||
| 10 | CONFIG_ARCH_USES_GETTIMEOFFSET=y | ||
| 11 | CONFIG_HAVE_PROC_CPU=y | ||
| 9 | CONFIG_NO_IOPORT=y | 12 | CONFIG_NO_IOPORT=y |
| 10 | CONFIG_GENERIC_HARDIRQS=y | 13 | CONFIG_GENERIC_HARDIRQS=y |
| 11 | CONFIG_STACKTRACE_SUPPORT=y | 14 | CONFIG_STACKTRACE_SUPPORT=y |
| @@ -17,6 +20,7 @@ CONFIG_GENERIC_IRQ_PROBE=y | |||
| 17 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 18 | CONFIG_GENERIC_HWEIGHT=y | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 19 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 23 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 20 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 24 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 21 | CONFIG_ARM_L1_CACHE_SHIFT_6=y | 25 | CONFIG_ARM_L1_CACHE_SHIFT_6=y |
| 22 | CONFIG_VECTORS_BASE=0xffff0000 | 26 | CONFIG_VECTORS_BASE=0xffff0000 |
| @@ -33,6 +37,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
| 33 | CONFIG_LOCALVERSION="" | 37 | CONFIG_LOCALVERSION="" |
| 34 | CONFIG_LOCALVERSION_AUTO=y | 38 | CONFIG_LOCALVERSION_AUTO=y |
| 35 | CONFIG_HAVE_KERNEL_GZIP=y | 39 | CONFIG_HAVE_KERNEL_GZIP=y |
| 40 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 36 | CONFIG_HAVE_KERNEL_LZO=y | 41 | CONFIG_HAVE_KERNEL_LZO=y |
| 37 | CONFIG_KERNEL_GZIP=y | 42 | CONFIG_KERNEL_GZIP=y |
| 38 | # CONFIG_KERNEL_BZIP2 is not set | 43 | # CONFIG_KERNEL_BZIP2 is not set |
| @@ -54,7 +59,6 @@ CONFIG_RCU_FANOUT=32 | |||
| 54 | # CONFIG_TREE_RCU_TRACE is not set | 59 | # CONFIG_TREE_RCU_TRACE is not set |
| 55 | # CONFIG_IKCONFIG is not set | 60 | # CONFIG_IKCONFIG is not set |
| 56 | CONFIG_LOG_BUF_SHIFT=17 | 61 | CONFIG_LOG_BUF_SHIFT=17 |
| 57 | # CONFIG_GROUP_SCHED is not set | ||
| 58 | # CONFIG_CGROUPS is not set | 62 | # CONFIG_CGROUPS is not set |
| 59 | CONFIG_SYSFS_DEPRECATED=y | 63 | CONFIG_SYSFS_DEPRECATED=y |
| 60 | CONFIG_SYSFS_DEPRECATED_V2=y | 64 | CONFIG_SYSFS_DEPRECATED_V2=y |
| @@ -90,10 +94,14 @@ CONFIG_TIMERFD=y | |||
| 90 | CONFIG_EVENTFD=y | 94 | CONFIG_EVENTFD=y |
| 91 | CONFIG_SHMEM=y | 95 | CONFIG_SHMEM=y |
| 92 | CONFIG_AIO=y | 96 | CONFIG_AIO=y |
| 97 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 98 | CONFIG_PERF_USE_VMALLOC=y | ||
| 93 | 99 | ||
| 94 | # | 100 | # |
| 95 | # Kernel Performance Events And Counters | 101 | # Kernel Performance Events And Counters |
| 96 | # | 102 | # |
| 103 | # CONFIG_PERF_EVENTS is not set | ||
| 104 | # CONFIG_PERF_COUNTERS is not set | ||
| 97 | CONFIG_VM_EVENT_COUNTERS=y | 105 | CONFIG_VM_EVENT_COUNTERS=y |
| 98 | CONFIG_SLUB_DEBUG=y | 106 | CONFIG_SLUB_DEBUG=y |
| 99 | CONFIG_COMPAT_BRK=y | 107 | CONFIG_COMPAT_BRK=y |
| @@ -175,8 +183,11 @@ CONFIG_MMU=y | |||
| 175 | # CONFIG_ARCH_INTEGRATOR is not set | 183 | # CONFIG_ARCH_INTEGRATOR is not set |
| 176 | # CONFIG_ARCH_REALVIEW is not set | 184 | # CONFIG_ARCH_REALVIEW is not set |
| 177 | # CONFIG_ARCH_VERSATILE is not set | 185 | # CONFIG_ARCH_VERSATILE is not set |
| 186 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 178 | # CONFIG_ARCH_AT91 is not set | 187 | # CONFIG_ARCH_AT91 is not set |
| 188 | # CONFIG_ARCH_BCMRING is not set | ||
| 179 | # CONFIG_ARCH_CLPS711X is not set | 189 | # CONFIG_ARCH_CLPS711X is not set |
| 190 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 180 | # CONFIG_ARCH_GEMINI is not set | 191 | # CONFIG_ARCH_GEMINI is not set |
| 181 | # CONFIG_ARCH_EBSA110 is not set | 192 | # CONFIG_ARCH_EBSA110 is not set |
| 182 | # CONFIG_ARCH_EP93XX is not set | 193 | # CONFIG_ARCH_EP93XX is not set |
| @@ -185,7 +196,6 @@ CONFIG_MMU=y | |||
| 185 | # CONFIG_ARCH_STMP3XXX is not set | 196 | # CONFIG_ARCH_STMP3XXX is not set |
| 186 | # CONFIG_ARCH_NETX is not set | 197 | # CONFIG_ARCH_NETX is not set |
| 187 | # CONFIG_ARCH_H720X is not set | 198 | # CONFIG_ARCH_H720X is not set |
| 188 | # CONFIG_ARCH_NOMADIK is not set | ||
| 189 | # CONFIG_ARCH_IOP13XX is not set | 199 | # CONFIG_ARCH_IOP13XX is not set |
| 190 | # CONFIG_ARCH_IOP32X is not set | 200 | # CONFIG_ARCH_IOP32X is not set |
| 191 | # CONFIG_ARCH_IOP33X is not set | 201 | # CONFIG_ARCH_IOP33X is not set |
| @@ -202,24 +212,27 @@ CONFIG_MMU=y | |||
| 202 | # CONFIG_ARCH_KS8695 is not set | 212 | # CONFIG_ARCH_KS8695 is not set |
| 203 | # CONFIG_ARCH_NS9XXX is not set | 213 | # CONFIG_ARCH_NS9XXX is not set |
| 204 | # CONFIG_ARCH_W90X900 is not set | 214 | # CONFIG_ARCH_W90X900 is not set |
| 215 | # CONFIG_ARCH_NUC93X is not set | ||
| 205 | # CONFIG_ARCH_PNX4008 is not set | 216 | # CONFIG_ARCH_PNX4008 is not set |
| 206 | # CONFIG_ARCH_PXA is not set | 217 | # CONFIG_ARCH_PXA is not set |
| 207 | # CONFIG_ARCH_MSM is not set | 218 | # CONFIG_ARCH_MSM is not set |
| 219 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 208 | # CONFIG_ARCH_RPC is not set | 220 | # CONFIG_ARCH_RPC is not set |
| 209 | # CONFIG_ARCH_SA1100 is not set | 221 | # CONFIG_ARCH_SA1100 is not set |
| 210 | # CONFIG_ARCH_S3C2410 is not set | 222 | # CONFIG_ARCH_S3C2410 is not set |
| 211 | # CONFIG_ARCH_S3C64XX is not set | 223 | # CONFIG_ARCH_S3C64XX is not set |
| 212 | # CONFIG_ARCH_S5P6440 is not set | 224 | # CONFIG_ARCH_S5P6440 is not set |
| 213 | # CONFIG_ARCH_S5P6442 is not set | 225 | # CONFIG_ARCH_S5P6442 is not set |
| 214 | # CONFIG_ARCH_S5PC1XX is not set | 226 | # CONFIG_ARCH_S5PC100 is not set |
| 215 | CONFIG_ARCH_S5PV210=y | 227 | CONFIG_ARCH_S5PV210=y |
| 216 | # CONFIG_ARCH_SHARK is not set | 228 | # CONFIG_ARCH_SHARK is not set |
| 217 | # CONFIG_ARCH_LH7A40X is not set | 229 | # CONFIG_ARCH_LH7A40X is not set |
| 218 | # CONFIG_ARCH_U300 is not set | 230 | # CONFIG_ARCH_U300 is not set |
| 231 | # CONFIG_ARCH_U8500 is not set | ||
| 232 | # CONFIG_ARCH_NOMADIK is not set | ||
| 219 | # CONFIG_ARCH_DAVINCI is not set | 233 | # CONFIG_ARCH_DAVINCI is not set |
| 220 | # CONFIG_ARCH_OMAP is not set | 234 | # CONFIG_ARCH_OMAP is not set |
| 221 | # CONFIG_ARCH_BCMRING is not set | 235 | # CONFIG_PLAT_SPEAR is not set |
| 222 | # CONFIG_ARCH_U8500 is not set | ||
| 223 | CONFIG_PLAT_SAMSUNG=y | 236 | CONFIG_PLAT_SAMSUNG=y |
| 224 | 237 | ||
| 225 | # | 238 | # |
| @@ -235,16 +248,24 @@ CONFIG_SAMSUNG_GPIOLIB_4BIT=y | |||
| 235 | CONFIG_S3C_GPIO_CFG_S3C24XX=y | 248 | CONFIG_S3C_GPIO_CFG_S3C24XX=y |
| 236 | CONFIG_S3C_GPIO_CFG_S3C64XX=y | 249 | CONFIG_S3C_GPIO_CFG_S3C64XX=y |
| 237 | CONFIG_S3C_GPIO_PULL_UPDOWN=y | 250 | CONFIG_S3C_GPIO_PULL_UPDOWN=y |
| 251 | CONFIG_S5P_GPIO_DRVSTR=y | ||
| 238 | CONFIG_SAMSUNG_GPIO_EXTRA=0 | 252 | CONFIG_SAMSUNG_GPIO_EXTRA=0 |
| 239 | CONFIG_S3C_GPIO_SPACE=0 | 253 | CONFIG_S3C_GPIO_SPACE=0 |
| 240 | CONFIG_S3C_GPIO_TRACK=y | 254 | CONFIG_S3C_GPIO_TRACK=y |
| 241 | # CONFIG_S3C_ADC is not set | 255 | # CONFIG_S3C_ADC is not set |
| 256 | CONFIG_S3C_DEV_WDT=y | ||
| 257 | CONFIG_SAMSUNG_DEV_ADC=y | ||
| 258 | CONFIG_SAMSUNG_DEV_TS=y | ||
| 259 | CONFIG_S3C_PL330_DMA=y | ||
| 242 | 260 | ||
| 243 | # | 261 | # |
| 244 | # Power management | 262 | # Power management |
| 245 | # | 263 | # |
| 246 | CONFIG_PLAT_S5P=y | 264 | CONFIG_PLAT_S5P=y |
| 265 | CONFIG_S5P_EXT_INT=y | ||
| 247 | CONFIG_CPU_S5PV210=y | 266 | CONFIG_CPU_S5PV210=y |
| 267 | # CONFIG_MACH_AQUILA is not set | ||
| 268 | # CONFIG_MACH_GONI is not set | ||
| 248 | CONFIG_MACH_SMDKV210=y | 269 | CONFIG_MACH_SMDKV210=y |
| 249 | # CONFIG_MACH_SMDKC110 is not set | 270 | # CONFIG_MACH_SMDKC110 is not set |
| 250 | 271 | ||
| @@ -274,11 +295,14 @@ CONFIG_ARM_THUMB=y | |||
| 274 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 295 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 275 | CONFIG_HAS_TLS_REG=y | 296 | CONFIG_HAS_TLS_REG=y |
| 276 | CONFIG_ARM_L1_CACHE_SHIFT=6 | 297 | CONFIG_ARM_L1_CACHE_SHIFT=6 |
| 298 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 299 | CONFIG_CPU_HAS_PMU=y | ||
| 277 | # CONFIG_ARM_ERRATA_430973 is not set | 300 | # CONFIG_ARM_ERRATA_430973 is not set |
| 278 | # CONFIG_ARM_ERRATA_458693 is not set | 301 | # CONFIG_ARM_ERRATA_458693 is not set |
| 279 | # CONFIG_ARM_ERRATA_460075 is not set | 302 | # CONFIG_ARM_ERRATA_460075 is not set |
| 280 | CONFIG_ARM_VIC=y | 303 | CONFIG_ARM_VIC=y |
| 281 | CONFIG_ARM_VIC_NR=2 | 304 | CONFIG_ARM_VIC_NR=2 |
| 305 | CONFIG_PL330=y | ||
| 282 | 306 | ||
| 283 | # | 307 | # |
| 284 | # Bus support | 308 | # Bus support |
| @@ -327,6 +351,7 @@ CONFIG_ALIGNMENT_TRAP=y | |||
| 327 | CONFIG_ZBOOT_ROM_TEXT=0 | 351 | CONFIG_ZBOOT_ROM_TEXT=0 |
| 328 | CONFIG_ZBOOT_ROM_BSS=0 | 352 | CONFIG_ZBOOT_ROM_BSS=0 |
| 329 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" | 353 | CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" |
| 354 | # CONFIG_CMDLINE_FORCE is not set | ||
| 330 | # CONFIG_XIP_KERNEL is not set | 355 | # CONFIG_XIP_KERNEL is not set |
| 331 | # CONFIG_KEXEC is not set | 356 | # CONFIG_KEXEC is not set |
| 332 | 357 | ||
| @@ -404,6 +429,7 @@ CONFIG_HAVE_IDE=y | |||
| 404 | # | 429 | # |
| 405 | # SCSI device support | 430 | # SCSI device support |
| 406 | # | 431 | # |
| 432 | CONFIG_SCSI_MOD=y | ||
| 407 | # CONFIG_RAID_ATTRS is not set | 433 | # CONFIG_RAID_ATTRS is not set |
| 408 | CONFIG_SCSI=y | 434 | CONFIG_SCSI=y |
| 409 | CONFIG_SCSI_DMA=y | 435 | CONFIG_SCSI_DMA=y |
| @@ -472,7 +498,9 @@ CONFIG_INPUT_EVDEV=y | |||
| 472 | CONFIG_INPUT_TOUCHSCREEN=y | 498 | CONFIG_INPUT_TOUCHSCREEN=y |
| 473 | # CONFIG_TOUCHSCREEN_AD7879 is not set | 499 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 474 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | 500 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set |
| 501 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 475 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | 502 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 503 | # CONFIG_TOUCHSCREEN_S3C2410 is not set | ||
| 476 | # CONFIG_TOUCHSCREEN_GUNZE is not set | 504 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 477 | # CONFIG_TOUCHSCREEN_ELO is not set | 505 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 478 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | 506 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set |
| @@ -526,6 +554,9 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y | |||
| 526 | CONFIG_SERIAL_S5PV210=y | 554 | CONFIG_SERIAL_S5PV210=y |
| 527 | CONFIG_SERIAL_CORE=y | 555 | CONFIG_SERIAL_CORE=y |
| 528 | CONFIG_SERIAL_CORE_CONSOLE=y | 556 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 557 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 558 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 559 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 529 | CONFIG_UNIX98_PTYS=y | 560 | CONFIG_UNIX98_PTYS=y |
| 530 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | 561 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set |
| 531 | CONFIG_LEGACY_PTYS=y | 562 | CONFIG_LEGACY_PTYS=y |
| @@ -551,6 +582,7 @@ CONFIG_GPIOLIB=y | |||
| 551 | # | 582 | # |
| 552 | # Memory mapped GPIO expanders: | 583 | # Memory mapped GPIO expanders: |
| 553 | # | 584 | # |
| 585 | # CONFIG_GPIO_IT8761E is not set | ||
| 554 | 586 | ||
| 555 | # | 587 | # |
| 556 | # I2C GPIO expanders: | 588 | # I2C GPIO expanders: |
| @@ -572,6 +604,7 @@ CONFIG_GPIOLIB=y | |||
| 572 | # CONFIG_HWMON is not set | 604 | # CONFIG_HWMON is not set |
| 573 | # CONFIG_THERMAL is not set | 605 | # CONFIG_THERMAL is not set |
| 574 | # CONFIG_WATCHDOG is not set | 606 | # CONFIG_WATCHDOG is not set |
| 607 | CONFIG_HAVE_S3C2410_WATCHDOG=y | ||
| 575 | CONFIG_SSB_POSSIBLE=y | 608 | CONFIG_SSB_POSSIBLE=y |
| 576 | 609 | ||
| 577 | # | 610 | # |
| @@ -624,10 +657,6 @@ CONFIG_RTC_LIB=y | |||
| 624 | # CONFIG_DMADEVICES is not set | 657 | # CONFIG_DMADEVICES is not set |
| 625 | # CONFIG_AUXDISPLAY is not set | 658 | # CONFIG_AUXDISPLAY is not set |
| 626 | # CONFIG_UIO is not set | 659 | # CONFIG_UIO is not set |
| 627 | |||
| 628 | # | ||
| 629 | # TI VLYNQ | ||
| 630 | # | ||
| 631 | # CONFIG_STAGING is not set | 660 | # CONFIG_STAGING is not set |
| 632 | 661 | ||
| 633 | # | 662 | # |
| @@ -696,6 +725,7 @@ CONFIG_MISC_FILESYSTEMS=y | |||
| 696 | # CONFIG_BEFS_FS is not set | 725 | # CONFIG_BEFS_FS is not set |
| 697 | # CONFIG_BFS_FS is not set | 726 | # CONFIG_BFS_FS is not set |
| 698 | # CONFIG_EFS_FS is not set | 727 | # CONFIG_EFS_FS is not set |
| 728 | # CONFIG_LOGFS is not set | ||
| 699 | CONFIG_CRAMFS=y | 729 | CONFIG_CRAMFS=y |
| 700 | # CONFIG_SQUASHFS is not set | 730 | # CONFIG_SQUASHFS is not set |
| 701 | # CONFIG_VXFS_FS is not set | 731 | # CONFIG_VXFS_FS is not set |
| @@ -835,6 +865,8 @@ CONFIG_HAVE_FUNCTION_TRACER=y | |||
| 835 | CONFIG_TRACING_SUPPORT=y | 865 | CONFIG_TRACING_SUPPORT=y |
| 836 | CONFIG_FTRACE=y | 866 | CONFIG_FTRACE=y |
| 837 | # CONFIG_FUNCTION_TRACER is not set | 867 | # CONFIG_FUNCTION_TRACER is not set |
| 868 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 869 | # CONFIG_PREEMPT_TRACER is not set | ||
| 838 | # CONFIG_SCHED_TRACER is not set | 870 | # CONFIG_SCHED_TRACER is not set |
| 839 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | 871 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set |
| 840 | # CONFIG_BOOT_TRACER is not set | 872 | # CONFIG_BOOT_TRACER is not set |
| @@ -845,6 +877,7 @@ CONFIG_BRANCH_PROFILE_NONE=y | |||
| 845 | # CONFIG_KMEMTRACE is not set | 877 | # CONFIG_KMEMTRACE is not set |
| 846 | # CONFIG_WORKQUEUE_TRACER is not set | 878 | # CONFIG_WORKQUEUE_TRACER is not set |
| 847 | # CONFIG_BLK_DEV_IO_TRACE is not set | 879 | # CONFIG_BLK_DEV_IO_TRACE is not set |
| 880 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 848 | # CONFIG_SAMPLES is not set | 881 | # CONFIG_SAMPLES is not set |
| 849 | CONFIG_HAVE_ARCH_KGDB=y | 882 | CONFIG_HAVE_ARCH_KGDB=y |
| 850 | # CONFIG_KGDB is not set | 883 | # CONFIG_KGDB is not set |
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h index 182310b99195..6d7485aff955 100644 --- a/arch/arm/include/asm/hardirq.h +++ b/arch/arm/include/asm/hardirq.h | |||
| @@ -12,7 +12,9 @@ typedef struct { | |||
| 12 | 12 | ||
| 13 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | 13 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ |
| 14 | 14 | ||
| 15 | #if NR_IRQS > 256 | 15 | #if NR_IRQS > 512 |
| 16 | #define HARDIRQ_BITS 10 | ||
| 17 | #elif NR_IRQS > 256 | ||
| 16 | #define HARDIRQ_BITS 9 | 18 | #define HARDIRQ_BITS 9 |
| 17 | #else | 19 | #else |
| 18 | #define HARDIRQ_BITS 8 | 20 | #define HARDIRQ_BITS 8 |
diff --git a/arch/arm/include/asm/scatterlist.h b/arch/arm/include/asm/scatterlist.h index bcda59f39941..2f87870d9347 100644 --- a/arch/arm/include/asm/scatterlist.h +++ b/arch/arm/include/asm/scatterlist.h | |||
| @@ -3,9 +3,6 @@ | |||
| 3 | 3 | ||
| 4 | #include <asm/memory.h> | 4 | #include <asm/memory.h> |
| 5 | #include <asm/types.h> | 5 | #include <asm/types.h> |
| 6 | |||
| 7 | #include <asm-generic/scatterlist.h> | 6 | #include <asm-generic/scatterlist.h> |
| 8 | 7 | ||
| 9 | #undef ARCH_HAS_SG_CHAIN | ||
| 10 | |||
| 11 | #endif /* _ASMARM_SCATTERLIST_H */ | 8 | #endif /* _ASMARM_SCATTERLIST_H */ |
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index c91c77b54dea..122d999bdc7c 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
| @@ -593,6 +593,7 @@ static int __init parse_tag_revision(const struct tag *tag) | |||
| 593 | 593 | ||
| 594 | __tagtable(ATAG_REVISION, parse_tag_revision); | 594 | __tagtable(ATAG_REVISION, parse_tag_revision); |
| 595 | 595 | ||
| 596 | #ifndef CONFIG_CMDLINE_FORCE | ||
| 596 | static int __init parse_tag_cmdline(const struct tag *tag) | 597 | static int __init parse_tag_cmdline(const struct tag *tag) |
| 597 | { | 598 | { |
| 598 | strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE); | 599 | strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE); |
| @@ -600,6 +601,7 @@ static int __init parse_tag_cmdline(const struct tag *tag) | |||
| 600 | } | 601 | } |
| 601 | 602 | ||
| 602 | __tagtable(ATAG_CMDLINE, parse_tag_cmdline); | 603 | __tagtable(ATAG_CMDLINE, parse_tag_cmdline); |
| 604 | #endif /* CONFIG_CMDLINE_FORCE */ | ||
| 603 | 605 | ||
| 604 | /* | 606 | /* |
| 605 | * Scan the tag table for this tag, and call its parse function. | 607 | * Scan the tag table for this tag, and call its parse function. |
diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c index 50292cd9c120..dd81a918c106 100644 --- a/arch/arm/kernel/unwind.c +++ b/arch/arm/kernel/unwind.c | |||
| @@ -26,6 +26,7 @@ | |||
| 26 | * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html | 26 | * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html |
| 27 | */ | 27 | */ |
| 28 | 28 | ||
| 29 | #ifndef __CHECKER__ | ||
| 29 | #if !defined (__ARM_EABI__) | 30 | #if !defined (__ARM_EABI__) |
| 30 | #warning Your compiler does not have EABI support. | 31 | #warning Your compiler does not have EABI support. |
| 31 | #warning ARM unwind is known to compile only with EABI compilers. | 32 | #warning ARM unwind is known to compile only with EABI compilers. |
| @@ -34,6 +35,7 @@ | |||
| 34 | #warning Your compiler is too buggy; it is known to not compile ARM unwind support. | 35 | #warning Your compiler is too buggy; it is known to not compile ARM unwind support. |
| 35 | #warning Change compiler or disable ARM_UNWIND option. | 36 | #warning Change compiler or disable ARM_UNWIND option. |
| 36 | #endif | 37 | #endif |
| 38 | #endif /* __CHECKER__ */ | ||
| 37 | 39 | ||
| 38 | #include <linux/kernel.h> | 40 | #include <linux/kernel.h> |
| 39 | #include <linux/init.h> | 41 | #include <linux/init.h> |
diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 98f9f4bc9396..ee800595594d 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c | |||
| @@ -25,7 +25,6 @@ | |||
| 25 | #include <linux/leds.h> | 25 | #include <linux/leds.h> |
| 26 | #include <linux/clk.h> | 26 | #include <linux/clk.h> |
| 27 | 27 | ||
| 28 | #include <mach/hardware.h> | ||
| 29 | #include <video/atmel_lcdc.h> | 28 | #include <video/atmel_lcdc.h> |
| 30 | 29 | ||
| 31 | #include <asm/setup.h> | 30 | #include <asm/setup.h> |
diff --git a/arch/arm/mach-clps711x/Makefile.boot b/arch/arm/mach-clps711x/Makefile.boot index d3d29339e149..a51fcef64fe0 100644 --- a/arch/arm/mach-clps711x/Makefile.boot +++ b/arch/arm/mach-clps711x/Makefile.boot | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | # The standard locations for stuff on CLPS711x type processors | 1 | # The standard locations for stuff on CLPS711x type processors |
| 2 | zreladdr-y := 0xc0028000 | 2 | zreladdr-y := 0xc0028000 |
| 3 | params_phys-y := 0xc0000100 | 3 | params_phys-y := 0xc0000100 |
| 4 | # Should probably have some agreement on these... | 4 | # Should probably have some agreement on these... |
| 5 | initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000 | 5 | initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000 |
| 6 | initrd_phys-$(CONFIG_ARCH_CDB89712) := 0x00700000 | 6 | initrd_phys-$(CONFIG_ARCH_CDB89712) := 0x00700000 |
| 7 | |||
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index abd04932917b..2ec3095ffb7b 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include <linux/i2c.h> | 17 | #include <linux/i2c.h> |
| 18 | #include <linux/i2c/at24.h> | 18 | #include <linux/i2c/at24.h> |
| 19 | #include <linux/i2c/pca953x.h> | 19 | #include <linux/i2c/pca953x.h> |
| 20 | #include <linux/mfd/tps6507x.h> | ||
| 20 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
| 21 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
| 22 | #include <linux/mtd/mtd.h> | 23 | #include <linux/mtd/mtd.h> |
| @@ -24,6 +25,8 @@ | |||
| 24 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
| 25 | #include <linux/mtd/physmap.h> | 26 | #include <linux/mtd/physmap.h> |
| 26 | #include <linux/regulator/machine.h> | 27 | #include <linux/regulator/machine.h> |
| 28 | #include <linux/mfd/tps6507x.h> | ||
| 29 | #include <linux/input/tps6507x-ts.h> | ||
| 27 | 30 | ||
| 28 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
| 29 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
| @@ -533,10 +536,24 @@ struct regulator_init_data tps65070_regulator_data[] = { | |||
| 533 | }, | 536 | }, |
| 534 | }; | 537 | }; |
| 535 | 538 | ||
| 539 | static struct touchscreen_init_data tps6507x_touchscreen_data = { | ||
| 540 | .poll_period = 30, /* ms between touch samples */ | ||
| 541 | .min_pressure = 0x30, /* minimum pressure to trigger touch */ | ||
| 542 | .vref = 0, /* turn off vref when not using A/D */ | ||
| 543 | .vendor = 0, /* /sys/class/input/input?/id/vendor */ | ||
| 544 | .product = 65070, /* /sys/class/input/input?/id/product */ | ||
| 545 | .version = 0x100, /* /sys/class/input/input?/id/version */ | ||
| 546 | }; | ||
| 547 | |||
| 548 | static struct tps6507x_board tps_board = { | ||
| 549 | .tps6507x_pmic_init_data = &tps65070_regulator_data[0], | ||
| 550 | .tps6507x_ts_init_data = &tps6507x_touchscreen_data, | ||
| 551 | }; | ||
| 552 | |||
| 536 | static struct i2c_board_info __initdata da850evm_tps65070_info[] = { | 553 | static struct i2c_board_info __initdata da850evm_tps65070_info[] = { |
| 537 | { | 554 | { |
| 538 | I2C_BOARD_INFO("tps6507x", 0x48), | 555 | I2C_BOARD_INFO("tps6507x", 0x48), |
| 539 | .platform_data = &tps65070_regulator_data[0], | 556 | .platform_data = &tps_board, |
| 540 | }, | 557 | }, |
| 541 | }; | 558 | }; |
| 542 | 559 | ||
diff --git a/arch/arm/mach-davinci/include/mach/mmc.h b/arch/arm/mach-davinci/include/mach/mmc.h index 5a85e24f3673..d4f1e9675069 100644 --- a/arch/arm/mach-davinci/include/mach/mmc.h +++ b/arch/arm/mach-davinci/include/mach/mmc.h | |||
| @@ -22,6 +22,9 @@ struct davinci_mmc_config { | |||
| 22 | 22 | ||
| 23 | /* Version of the MMC/SD controller */ | 23 | /* Version of the MMC/SD controller */ |
| 24 | u8 version; | 24 | u8 version; |
| 25 | |||
| 26 | /* Number of sg segments */ | ||
| 27 | u8 nr_sg; | ||
| 25 | }; | 28 | }; |
| 26 | void davinci_setup_mmc(int module, struct davinci_mmc_config *config); | 29 | void davinci_setup_mmc(int module, struct davinci_mmc_config *config); |
| 27 | 30 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h b/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h new file mode 100644 index 000000000000..0a37961b3453 --- /dev/null +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx_spi.h | |||
| @@ -0,0 +1,27 @@ | |||
| 1 | #ifndef __ASM_MACH_EP93XX_SPI_H | ||
| 2 | #define __ASM_MACH_EP93XX_SPI_H | ||
| 3 | |||
| 4 | struct spi_device; | ||
| 5 | |||
| 6 | /** | ||
| 7 | * struct ep93xx_spi_info - EP93xx specific SPI descriptor | ||
| 8 | * @num_chipselect: number of chip selects on this board, must be | ||
| 9 | * at least one | ||
| 10 | */ | ||
| 11 | struct ep93xx_spi_info { | ||
| 12 | int num_chipselect; | ||
| 13 | }; | ||
| 14 | |||
| 15 | /** | ||
| 16 | * struct ep93xx_spi_chip_ops - operation callbacks for SPI slave device | ||
| 17 | * @setup: setup the chip select mechanism | ||
| 18 | * @cleanup: cleanup the chip select mechanism | ||
| 19 | * @cs_control: control the device chip select | ||
| 20 | */ | ||
| 21 | struct ep93xx_spi_chip_ops { | ||
| 22 | int (*setup)(struct spi_device *spi); | ||
| 23 | void (*cleanup)(struct spi_device *spi); | ||
| 24 | void (*cs_control)(struct spi_device *spi, int value); | ||
| 25 | }; | ||
| 26 | |||
| 27 | #endif /* __ASM_MACH_EP93XX_SPI_H */ | ||
diff --git a/arch/arm/mach-footbridge/ebsa285-pci.c b/arch/arm/mach-footbridge/ebsa285-pci.c index 720c0bac1702..e5ab5bddbc8c 100644 --- a/arch/arm/mach-footbridge/ebsa285-pci.c +++ b/arch/arm/mach-footbridge/ebsa285-pci.c | |||
| @@ -20,9 +20,9 @@ static int __init ebsa285_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | |||
| 20 | if (dev->vendor == PCI_VENDOR_ID_CONTAQ && | 20 | if (dev->vendor == PCI_VENDOR_ID_CONTAQ && |
| 21 | dev->device == PCI_DEVICE_ID_CONTAQ_82C693) | 21 | dev->device == PCI_DEVICE_ID_CONTAQ_82C693) |
| 22 | switch (PCI_FUNC(dev->devfn)) { | 22 | switch (PCI_FUNC(dev->devfn)) { |
| 23 | case 1: return 14; | 23 | case 1: return 14; |
| 24 | case 2: return 15; | 24 | case 2: return 15; |
| 25 | case 3: return 12; | 25 | case 3: return 12; |
| 26 | } | 26 | } |
| 27 | 27 | ||
| 28 | return irqmap_ebsa285[(slot + pin) & 3]; | 28 | return irqmap_ebsa285[(slot + pin) & 3]; |
diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h index d8798dbc44f8..7dd5fa604efc 100644 --- a/arch/arm/mach-h720x/common.h +++ b/arch/arm/mach-h720x/common.h | |||
| @@ -14,13 +14,13 @@ | |||
| 14 | */ | 14 | */ |
| 15 | 15 | ||
| 16 | extern unsigned long h720x_gettimeoffset(void); | 16 | extern unsigned long h720x_gettimeoffset(void); |
| 17 | extern void __init h720x_init_irq (void); | 17 | extern void __init h720x_init_irq(void); |
| 18 | extern void __init h720x_map_io(void); | 18 | extern void __init h720x_map_io(void); |
| 19 | 19 | ||
| 20 | #ifdef CONFIG_ARCH_H7202 | 20 | #ifdef CONFIG_ARCH_H7202 |
| 21 | extern struct sys_timer h7202_timer; | 21 | extern struct sys_timer h7202_timer; |
| 22 | extern void __init init_hw_h7202(void); | 22 | extern void __init init_hw_h7202(void); |
| 23 | extern void __init h7202_init_irq (void); | 23 | extern void __init h7202_init_irq(void); |
| 24 | extern void __init h7202_init_time(void); | 24 | extern void __init h7202_init_time(void); |
| 25 | #endif | 25 | #endif |
| 26 | 26 | ||
diff --git a/arch/arm/mach-msm/board-msm7x27.c b/arch/arm/mach-msm/board-msm7x27.c index cccb9f3c9d01..db9381b85bf0 100644 --- a/arch/arm/mach-msm/board-msm7x27.c +++ b/arch/arm/mach-msm/board-msm7x27.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | #include <linux/input.h> | 20 | #include <linux/input.h> |
| 21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
| 22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
| 23 | #include <linux/bootmem.h> | ||
| 24 | #include <linux/power_supply.h> | 23 | #include <linux/power_supply.h> |
| 25 | 24 | ||
| 26 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c index bac1f3c38a3b..e32981928c77 100644 --- a/arch/arm/mach-msm/board-msm7x30.c +++ b/arch/arm/mach-msm/board-msm7x30.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
| 21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
| 23 | #include <linux/bootmem.h> | ||
| 24 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 25 | #include <linux/smsc911x.h> | 24 | #include <linux/smsc911x.h> |
| 26 | 25 | ||
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c index ec4606643d2c..e3cc80792d6c 100644 --- a/arch/arm/mach-msm/board-qsd8x50.c +++ b/arch/arm/mach-msm/board-qsd8x50.c | |||
| @@ -19,7 +19,6 @@ | |||
| 19 | #include <linux/irq.h> | 19 | #include <linux/irq.h> |
| 20 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
| 21 | #include <linux/platform_device.h> | 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/bootmem.h> | ||
| 23 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
| 24 | 23 | ||
| 25 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c index b91e412f7b3e..a0aeb8a4adc1 100644 --- a/arch/arm/mach-mx2/devices.c +++ b/arch/arm/mach-mx2/devices.c | |||
| @@ -109,12 +109,7 @@ DEFINE_IMX_GPT_DEVICE(4, MX27_GPT5_BASE_ADDR, MX27_INT_GPT5); | |||
| 109 | DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6); | 109 | DEFINE_IMX_GPT_DEVICE(5, MX27_GPT6_BASE_ADDR, MX27_INT_GPT6); |
| 110 | #endif | 110 | #endif |
| 111 | 111 | ||
| 112 | /* | 112 | /* Watchdog: i.MX1 has seperate driver, i.MX21 and i.MX27 are equal */ |
| 113 | * Watchdog: | ||
| 114 | * - i.MX1 | ||
| 115 | * - i.MX21 | ||
| 116 | * - i.MX27 | ||
| 117 | */ | ||
| 118 | static struct resource mxc_wdt_resources[] = { | 113 | static struct resource mxc_wdt_resources[] = { |
| 119 | { | 114 | { |
| 120 | .start = MX2x_WDOG_BASE_ADDR, | 115 | .start = MX2x_WDOG_BASE_ADDR, |
| @@ -124,7 +119,7 @@ static struct resource mxc_wdt_resources[] = { | |||
| 124 | }; | 119 | }; |
| 125 | 120 | ||
| 126 | struct platform_device mxc_wdt = { | 121 | struct platform_device mxc_wdt = { |
| 127 | .name = "mxc_wdt", | 122 | .name = "imx2-wdt", |
| 128 | .id = 0, | 123 | .id = 0, |
| 129 | .num_resources = ARRAY_SIZE(mxc_wdt_resources), | 124 | .num_resources = ARRAY_SIZE(mxc_wdt_resources), |
| 130 | .resource = mxc_wdt_resources, | 125 | .resource = mxc_wdt_resources, |
| @@ -483,8 +478,8 @@ int __init mxc_register_gpios(void) | |||
| 483 | #ifdef CONFIG_MACH_MX21 | 478 | #ifdef CONFIG_MACH_MX21 |
| 484 | static struct resource mx21_usbhc_resources[] = { | 479 | static struct resource mx21_usbhc_resources[] = { |
| 485 | { | 480 | { |
| 486 | .start = MX21_BASE_ADDR, | 481 | .start = MX21_USBOTG_BASE_ADDR, |
| 487 | .end = MX21_BASE_ADDR + 0x1FFF, | 482 | .end = MX21_USBOTG_BASE_ADDR + SZ_8K - 1, |
| 488 | .flags = IORESOURCE_MEM, | 483 | .flags = IORESOURCE_MEM, |
| 489 | }, | 484 | }, |
| 490 | { | 485 | { |
diff --git a/arch/arm/mach-mx2/mach-pca100.c b/arch/arm/mach-mx2/mach-pca100.c index 778fff230918..a87422ed4ff5 100644 --- a/arch/arm/mach-mx2/mach-pca100.c +++ b/arch/arm/mach-mx2/mach-pca100.c | |||
| @@ -145,6 +145,7 @@ static struct mxc_nand_platform_data pca100_nand_board_info = { | |||
| 145 | static struct platform_device *platform_devices[] __initdata = { | 145 | static struct platform_device *platform_devices[] __initdata = { |
| 146 | &mxc_w1_master_device, | 146 | &mxc_w1_master_device, |
| 147 | &mxc_fec_device, | 147 | &mxc_fec_device, |
| 148 | &mxc_wdt, | ||
| 148 | }; | 149 | }; |
| 149 | 150 | ||
| 150 | static struct imxi2c_platform_data pca100_i2c_1_data = { | 151 | static struct imxi2c_platform_data pca100_i2c_1_data = { |
diff --git a/arch/arm/mach-mx2/mach-pcm038.c b/arch/arm/mach-mx2/mach-pcm038.c index 035fbe046ec0..36c89431679a 100644 --- a/arch/arm/mach-mx2/mach-pcm038.c +++ b/arch/arm/mach-mx2/mach-pcm038.c | |||
| @@ -182,6 +182,7 @@ static struct platform_device *platform_devices[] __initdata = { | |||
| 182 | &mxc_w1_master_device, | 182 | &mxc_w1_master_device, |
| 183 | &mxc_fec_device, | 183 | &mxc_fec_device, |
| 184 | &pcm038_sram_mtd_device, | 184 | &pcm038_sram_mtd_device, |
| 185 | &mxc_wdt, | ||
| 185 | }; | 186 | }; |
| 186 | 187 | ||
| 187 | /* On pcm038 there's a sram attached to CS1, we enable the chipselect here and | 188 | /* On pcm038 there's a sram attached to CS1, we enable the chipselect here and |
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c index 3f4b8a0b5fac..3a405fa400eb 100644 --- a/arch/arm/mach-mx25/devices.c +++ b/arch/arm/mach-mx25/devices.c | |||
| @@ -500,3 +500,18 @@ struct platform_device mx25_fb_device = { | |||
| 500 | .coherent_dma_mask = 0xFFFFFFFF, | 500 | .coherent_dma_mask = 0xFFFFFFFF, |
| 501 | }, | 501 | }, |
| 502 | }; | 502 | }; |
| 503 | |||
| 504 | static struct resource mxc_wdt_resources[] = { | ||
| 505 | { | ||
| 506 | .start = MX25_WDOG_BASE_ADDR, | ||
| 507 | .end = MX25_WDOG_BASE_ADDR + SZ_16K - 1, | ||
| 508 | .flags = IORESOURCE_MEM, | ||
| 509 | }, | ||
| 510 | }; | ||
| 511 | |||
| 512 | struct platform_device mxc_wdt = { | ||
| 513 | .name = "imx2-wdt", | ||
| 514 | .id = 0, | ||
| 515 | .num_resources = ARRAY_SIZE(mxc_wdt_resources), | ||
| 516 | .resource = mxc_wdt_resources, | ||
| 517 | }; | ||
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h index 39560e13bc0d..cee12c0a0be6 100644 --- a/arch/arm/mach-mx25/devices.h +++ b/arch/arm/mach-mx25/devices.h | |||
| @@ -21,3 +21,4 @@ extern struct platform_device mx25_fec_device; | |||
| 21 | extern struct platform_device mxc_nand_device; | 21 | extern struct platform_device mxc_nand_device; |
| 22 | extern struct platform_device mx25_rtc_device; | 22 | extern struct platform_device mx25_rtc_device; |
| 23 | extern struct platform_device mx25_fb_device; | 23 | extern struct platform_device mx25_fb_device; |
| 24 | extern struct platform_device mxc_wdt; | ||
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 170f68e46dd5..344753fdf25e 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig | |||
| @@ -82,6 +82,7 @@ config MACH_MX31MOBOARD | |||
| 82 | config MACH_MX31LILLY | 82 | config MACH_MX31LILLY |
| 83 | bool "Support MX31 LILLY-1131 platforms (INCO startec)" | 83 | bool "Support MX31 LILLY-1131 platforms (INCO startec)" |
| 84 | select ARCH_MX31 | 84 | select ARCH_MX31 |
| 85 | select MXC_ULPI if USB_ULPI | ||
| 85 | help | 86 | help |
| 86 | Include support for mx31 based LILLY1131 modules. This includes | 87 | Include support for mx31 based LILLY1131 modules. This includes |
| 87 | specific configurations for the board and its peripherals. | 88 | specific configurations for the board and its peripherals. |
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index f8911154a9fa..db7acd6e9101 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c | |||
| @@ -582,12 +582,50 @@ static struct resource imx_wdt_resources[] = { | |||
| 582 | }; | 582 | }; |
| 583 | 583 | ||
| 584 | struct platform_device imx_wdt_device0 = { | 584 | struct platform_device imx_wdt_device0 = { |
| 585 | .name = "imx-wdt", | 585 | .name = "imx2-wdt", |
| 586 | .id = 0, | 586 | .id = 0, |
| 587 | .num_resources = ARRAY_SIZE(imx_wdt_resources), | 587 | .num_resources = ARRAY_SIZE(imx_wdt_resources), |
| 588 | .resource = imx_wdt_resources, | 588 | .resource = imx_wdt_resources, |
| 589 | }; | 589 | }; |
| 590 | 590 | ||
| 591 | static struct resource imx_rtc_resources[] = { | ||
| 592 | { | ||
| 593 | .start = MX31_RTC_BASE_ADDR, | ||
| 594 | .end = MX31_RTC_BASE_ADDR + 0x3fff, | ||
| 595 | .flags = IORESOURCE_MEM, | ||
| 596 | }, | ||
| 597 | { | ||
| 598 | .start = MX31_INT_RTC, | ||
| 599 | .flags = IORESOURCE_IRQ, | ||
| 600 | }, | ||
| 601 | }; | ||
| 602 | |||
| 603 | struct platform_device imx_rtc_device0 = { | ||
| 604 | .name = "mxc_rtc", | ||
| 605 | .id = -1, | ||
| 606 | .num_resources = ARRAY_SIZE(imx_rtc_resources), | ||
| 607 | .resource = imx_rtc_resources, | ||
| 608 | }; | ||
| 609 | |||
| 610 | static struct resource imx_kpp_resources[] = { | ||
| 611 | { | ||
| 612 | .start = MX3x_KPP_BASE_ADDR, | ||
| 613 | .end = MX3x_KPP_BASE_ADDR + 0xf, | ||
| 614 | .flags = IORESOURCE_MEM | ||
| 615 | }, { | ||
| 616 | .start = MX3x_INT_KPP, | ||
| 617 | .end = MX3x_INT_KPP, | ||
| 618 | .flags = IORESOURCE_IRQ, | ||
| 619 | }, | ||
| 620 | }; | ||
| 621 | |||
| 622 | struct platform_device imx_kpp_device = { | ||
| 623 | .name = "imx-keypad", | ||
| 624 | .id = -1, | ||
| 625 | .num_resources = ARRAY_SIZE(imx_kpp_resources), | ||
| 626 | .resource = imx_kpp_resources, | ||
| 627 | }; | ||
| 628 | |||
| 591 | static int __init mx3_devices_init(void) | 629 | static int __init mx3_devices_init(void) |
| 592 | { | 630 | { |
| 593 | if (cpu_is_mx31()) { | 631 | if (cpu_is_mx31()) { |
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index 4f77eb501274..2c3c8646a29e 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h | |||
| @@ -27,3 +27,5 @@ extern struct platform_device imx_ssi_device0; | |||
| 27 | extern struct platform_device imx_ssi_device1; | 27 | extern struct platform_device imx_ssi_device1; |
| 28 | extern struct platform_device imx_ssi_device1; | 28 | extern struct platform_device imx_ssi_device1; |
| 29 | extern struct platform_device imx_wdt_device0; | 29 | extern struct platform_device imx_wdt_device0; |
| 30 | extern struct platform_device imx_rtc_device0; | ||
| 31 | extern struct platform_device imx_kpp_device; | ||
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c index f54af1e29ca4..58e57291b79d 100644 --- a/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/arch/arm/mach-mx3/mach-mx31_3ds.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #include <linux/delay.h> | ||
| 19 | #include <linux/types.h> | 20 | #include <linux/types.h> |
| 20 | #include <linux/init.h> | 21 | #include <linux/init.h> |
| 21 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
| @@ -26,6 +27,8 @@ | |||
| 26 | #include <linux/mfd/mc13783.h> | 27 | #include <linux/mfd/mc13783.h> |
| 27 | #include <linux/spi/spi.h> | 28 | #include <linux/spi/spi.h> |
| 28 | #include <linux/regulator/machine.h> | 29 | #include <linux/regulator/machine.h> |
| 30 | #include <linux/fsl_devices.h> | ||
| 31 | #include <linux/input/matrix_keypad.h> | ||
| 29 | 32 | ||
| 30 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
| 31 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
| @@ -65,6 +68,50 @@ static int mx31_3ds_pins[] = { | |||
| 65 | MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */ | 68 | MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */ |
| 66 | /* MC13783 IRQ */ | 69 | /* MC13783 IRQ */ |
| 67 | IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), | 70 | IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), |
| 71 | /* USB OTG reset */ | ||
| 72 | IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO), | ||
| 73 | /* USB OTG */ | ||
| 74 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
| 75 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
| 76 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
| 77 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
| 78 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
| 79 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
| 80 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
| 81 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
| 82 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, | ||
| 83 | MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
| 84 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, | ||
| 85 | MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
| 86 | /*Keyboard*/ | ||
| 87 | MX31_PIN_KEY_ROW0_KEY_ROW0, | ||
| 88 | MX31_PIN_KEY_ROW1_KEY_ROW1, | ||
| 89 | MX31_PIN_KEY_ROW2_KEY_ROW2, | ||
| 90 | MX31_PIN_KEY_COL0_KEY_COL0, | ||
| 91 | MX31_PIN_KEY_COL1_KEY_COL1, | ||
| 92 | MX31_PIN_KEY_COL2_KEY_COL2, | ||
| 93 | MX31_PIN_KEY_COL3_KEY_COL3, | ||
| 94 | }; | ||
| 95 | |||
| 96 | /* | ||
| 97 | * Matrix keyboard | ||
| 98 | */ | ||
| 99 | |||
| 100 | static const uint32_t mx31_3ds_keymap[] = { | ||
| 101 | KEY(0, 0, KEY_UP), | ||
| 102 | KEY(0, 1, KEY_DOWN), | ||
| 103 | KEY(1, 0, KEY_RIGHT), | ||
| 104 | KEY(1, 1, KEY_LEFT), | ||
| 105 | KEY(1, 2, KEY_ENTER), | ||
| 106 | KEY(2, 0, KEY_F6), | ||
| 107 | KEY(2, 1, KEY_F8), | ||
| 108 | KEY(2, 2, KEY_F9), | ||
| 109 | KEY(2, 3, KEY_F10), | ||
| 110 | }; | ||
| 111 | |||
| 112 | static struct matrix_keymap_data mx31_3ds_keymap_data = { | ||
| 113 | .keymap = mx31_3ds_keymap, | ||
| 114 | .keymap_size = ARRAY_SIZE(mx31_3ds_keymap), | ||
| 68 | }; | 115 | }; |
| 69 | 116 | ||
| 70 | /* Regulators */ | 117 | /* Regulators */ |
| @@ -126,6 +173,41 @@ static struct mxc_nand_platform_data imx31_3ds_nand_flash_pdata = { | |||
| 126 | #endif | 173 | #endif |
| 127 | }; | 174 | }; |
| 128 | 175 | ||
| 176 | /* | ||
| 177 | * USB OTG | ||
| 178 | */ | ||
| 179 | |||
| 180 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 181 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 182 | |||
| 183 | #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR) | ||
| 184 | |||
| 185 | static void mx31_3ds_usbotg_init(void) | ||
| 186 | { | ||
| 187 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | ||
| 188 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | ||
| 189 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | ||
| 190 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | ||
| 191 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | ||
| 192 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | ||
| 193 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | ||
| 194 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | ||
| 195 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | ||
| 196 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | ||
| 197 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | ||
| 198 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | ||
| 199 | |||
| 200 | gpio_request(USBOTG_RST_B, "otgusb-reset"); | ||
| 201 | gpio_direction_output(USBOTG_RST_B, 0); | ||
| 202 | mdelay(1); | ||
| 203 | gpio_set_value(USBOTG_RST_B, 1); | ||
| 204 | } | ||
| 205 | |||
| 206 | static struct fsl_usb2_platform_data usbotg_pdata = { | ||
| 207 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 208 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 209 | }; | ||
| 210 | |||
| 129 | static struct imxuart_platform_data uart_pdata = { | 211 | static struct imxuart_platform_data uart_pdata = { |
| 130 | .flags = IMXUART_HAVE_RTSCTS, | 212 | .flags = IMXUART_HAVE_RTSCTS, |
| 131 | }; | 213 | }; |
| @@ -315,6 +397,11 @@ static void __init mxc_board_init(void) | |||
| 315 | spi_register_board_info(mx31_3ds_spi_devs, | 397 | spi_register_board_info(mx31_3ds_spi_devs, |
| 316 | ARRAY_SIZE(mx31_3ds_spi_devs)); | 398 | ARRAY_SIZE(mx31_3ds_spi_devs)); |
| 317 | 399 | ||
| 400 | mxc_register_device(&imx_kpp_device, &mx31_3ds_keymap_data); | ||
| 401 | |||
| 402 | mx31_3ds_usbotg_init(); | ||
| 403 | mxc_register_device(&mxc_otg_udc_device, &usbotg_pdata); | ||
| 404 | |||
| 318 | if (!mx31_3ds_init_expio()) | 405 | if (!mx31_3ds_init_expio()) |
| 319 | platform_device_register(&smsc911x_device); | 406 | platform_device_register(&smsc911x_device); |
| 320 | } | 407 | } |
diff --git a/arch/arm/mach-mx3/mach-mx31lilly.c b/arch/arm/mach-mx3/mach-mx31lilly.c index 80847b04c063..d3d5877c750e 100644 --- a/arch/arm/mach-mx3/mach-mx31lilly.c +++ b/arch/arm/mach-mx3/mach-mx31lilly.c | |||
| @@ -27,12 +27,15 @@ | |||
| 27 | #include <linux/types.h> | 27 | #include <linux/types.h> |
| 28 | #include <linux/init.h> | 28 | #include <linux/init.h> |
| 29 | #include <linux/clk.h> | 29 | #include <linux/clk.h> |
| 30 | #include <linux/gpio.h> | ||
| 30 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
| 31 | #include <linux/interrupt.h> | 32 | #include <linux/interrupt.h> |
| 32 | #include <linux/smsc911x.h> | 33 | #include <linux/smsc911x.h> |
| 33 | #include <linux/mtd/physmap.h> | 34 | #include <linux/mtd/physmap.h> |
| 34 | #include <linux/spi/spi.h> | 35 | #include <linux/spi/spi.h> |
| 35 | #include <linux/mfd/mc13783.h> | 36 | #include <linux/mfd/mc13783.h> |
| 37 | #include <linux/usb/otg.h> | ||
| 38 | #include <linux/usb/ulpi.h> | ||
| 36 | 39 | ||
| 37 | #include <asm/mach-types.h> | 40 | #include <asm/mach-types.h> |
| 38 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
| @@ -44,6 +47,8 @@ | |||
| 44 | #include <mach/iomux-mx3.h> | 47 | #include <mach/iomux-mx3.h> |
| 45 | #include <mach/board-mx31lilly.h> | 48 | #include <mach/board-mx31lilly.h> |
| 46 | #include <mach/spi.h> | 49 | #include <mach/spi.h> |
| 50 | #include <mach/mxc_ehci.h> | ||
| 51 | #include <mach/ulpi.h> | ||
| 47 | 52 | ||
| 48 | #include "devices.h" | 53 | #include "devices.h" |
| 49 | 54 | ||
| @@ -108,6 +113,137 @@ static struct platform_device physmap_flash_device = { | |||
| 108 | .num_resources = 1, | 113 | .num_resources = 1, |
| 109 | }; | 114 | }; |
| 110 | 115 | ||
| 116 | /* USB */ | ||
| 117 | |||
| 118 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | ||
| 119 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | ||
| 120 | |||
| 121 | static int usbotg_init(struct platform_device *pdev) | ||
| 122 | { | ||
| 123 | unsigned int pins[] = { | ||
| 124 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
| 125 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
| 126 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
| 127 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
| 128 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
| 129 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
| 130 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
| 131 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
| 132 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, | ||
| 133 | MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
| 134 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, | ||
| 135 | MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
| 136 | }; | ||
| 137 | |||
| 138 | mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG"); | ||
| 139 | |||
| 140 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | ||
| 141 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | ||
| 142 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | ||
| 143 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | ||
| 144 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | ||
| 145 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | ||
| 146 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | ||
| 147 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | ||
| 148 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | ||
| 149 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | ||
| 150 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | ||
| 151 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | ||
| 152 | |||
| 153 | mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true); | ||
| 154 | mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true); | ||
| 155 | |||
| 156 | /* chip select */ | ||
| 157 | mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO), | ||
| 158 | "USBOTG_CS"); | ||
| 159 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS"); | ||
| 160 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0); | ||
| 161 | |||
| 162 | return 0; | ||
| 163 | } | ||
| 164 | |||
| 165 | static int usbh1_init(struct platform_device *pdev) | ||
| 166 | { | ||
| 167 | int pins[] = { | ||
| 168 | MX31_PIN_CSPI1_MOSI__USBH1_RXDM, | ||
| 169 | MX31_PIN_CSPI1_MISO__USBH1_RXDP, | ||
| 170 | MX31_PIN_CSPI1_SS0__USBH1_TXDM, | ||
| 171 | MX31_PIN_CSPI1_SS1__USBH1_TXDP, | ||
| 172 | MX31_PIN_CSPI1_SS2__USBH1_RCV, | ||
| 173 | MX31_PIN_CSPI1_SCLK__USBH1_OEB, | ||
| 174 | MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, | ||
| 175 | }; | ||
| 176 | |||
| 177 | mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1"); | ||
| 178 | |||
| 179 | mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG); | ||
| 180 | mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG); | ||
| 181 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG); | ||
| 182 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG); | ||
| 183 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG); | ||
| 184 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG); | ||
| 185 | mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG); | ||
| 186 | |||
| 187 | mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true); | ||
| 188 | |||
| 189 | return 0; | ||
| 190 | } | ||
| 191 | |||
| 192 | static int usbh2_init(struct platform_device *pdev) | ||
| 193 | { | ||
| 194 | int pins[] = { | ||
| 195 | MX31_PIN_USBH2_DATA0__USBH2_DATA0, | ||
| 196 | MX31_PIN_USBH2_DATA1__USBH2_DATA1, | ||
| 197 | MX31_PIN_USBH2_CLK__USBH2_CLK, | ||
| 198 | MX31_PIN_USBH2_DIR__USBH2_DIR, | ||
| 199 | MX31_PIN_USBH2_NXT__USBH2_NXT, | ||
| 200 | MX31_PIN_USBH2_STP__USBH2_STP, | ||
| 201 | }; | ||
| 202 | |||
| 203 | mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2"); | ||
| 204 | |||
| 205 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); | ||
| 206 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); | ||
| 207 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); | ||
| 208 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); | ||
| 209 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); | ||
| 210 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); | ||
| 211 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); | ||
| 212 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); | ||
| 213 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); | ||
| 214 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); | ||
| 215 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); | ||
| 216 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); | ||
| 217 | |||
| 218 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | ||
| 219 | |||
| 220 | /* chip select */ | ||
| 221 | mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO), | ||
| 222 | "USBH2_CS"); | ||
| 223 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS"); | ||
| 224 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0); | ||
| 225 | |||
| 226 | return 0; | ||
| 227 | } | ||
| 228 | |||
| 229 | static struct mxc_usbh_platform_data usbotg_pdata = { | ||
| 230 | .init = usbotg_init, | ||
| 231 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
| 232 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
| 233 | }; | ||
| 234 | |||
| 235 | static struct mxc_usbh_platform_data usbh1_pdata = { | ||
| 236 | .init = usbh1_init, | ||
| 237 | .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL, | ||
| 238 | .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI, | ||
| 239 | }; | ||
| 240 | |||
| 241 | static struct mxc_usbh_platform_data usbh2_pdata = { | ||
| 242 | .init = usbh2_init, | ||
| 243 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
| 244 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
| 245 | }; | ||
| 246 | |||
| 111 | static struct platform_device *devices[] __initdata = { | 247 | static struct platform_device *devices[] __initdata = { |
| 112 | &smsc91x_device, | 248 | &smsc91x_device, |
| 113 | &physmap_flash_device, | 249 | &physmap_flash_device, |
| @@ -183,6 +319,15 @@ static void __init mx31lilly_board_init(void) | |||
| 183 | spi_register_board_info(&mc13783_dev, 1); | 319 | spi_register_board_info(&mc13783_dev, 1); |
| 184 | 320 | ||
| 185 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 321 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 322 | |||
| 323 | /* USB */ | ||
| 324 | usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
| 325 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
| 326 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
| 327 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
| 328 | |||
| 329 | mxc_register_device(&mxc_usbh1, &usbh1_pdata); | ||
| 330 | mxc_register_device(&mxc_usbh2, &usbh2_pdata); | ||
| 186 | } | 331 | } |
| 187 | 332 | ||
| 188 | static void __init mx31lilly_timer_init(void) | 333 | static void __init mx31lilly_timer_init(void) |
diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c index fccb9207b78d..62b5e40165df 100644 --- a/arch/arm/mach-mx3/mach-mx31moboard.c +++ b/arch/arm/mach-mx3/mach-mx31moboard.c | |||
| @@ -18,7 +18,6 @@ | |||
| 18 | 18 | ||
| 19 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
| 20 | #include <linux/dma-mapping.h> | 20 | #include <linux/dma-mapping.h> |
| 21 | #include <linux/fsl_devices.h> | ||
| 22 | #include <linux/gfp.h> | 21 | #include <linux/gfp.h> |
| 23 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
| 24 | #include <linux/init.h> | 23 | #include <linux/init.h> |
| @@ -221,11 +220,54 @@ static struct mc13783_regulator_init_data moboard_regulators[] = { | |||
| 221 | }, | 220 | }, |
| 222 | }; | 221 | }; |
| 223 | 222 | ||
| 223 | static struct mc13783_led_platform_data moboard_led[] = { | ||
| 224 | { | ||
| 225 | .id = MC13783_LED_R1, | ||
| 226 | .name = "coreboard-led-4:red", | ||
| 227 | .max_current = 2, | ||
| 228 | }, | ||
| 229 | { | ||
| 230 | .id = MC13783_LED_G1, | ||
| 231 | .name = "coreboard-led-4:green", | ||
| 232 | .max_current = 2, | ||
| 233 | }, | ||
| 234 | { | ||
| 235 | .id = MC13783_LED_B1, | ||
| 236 | .name = "coreboard-led-4:blue", | ||
| 237 | .max_current = 2, | ||
| 238 | }, | ||
| 239 | { | ||
| 240 | .id = MC13783_LED_R2, | ||
| 241 | .name = "coreboard-led-5:red", | ||
| 242 | .max_current = 3, | ||
| 243 | }, | ||
| 244 | { | ||
| 245 | .id = MC13783_LED_G2, | ||
| 246 | .name = "coreboard-led-5:green", | ||
| 247 | .max_current = 3, | ||
| 248 | }, | ||
| 249 | { | ||
| 250 | .id = MC13783_LED_B2, | ||
| 251 | .name = "coreboard-led-5:blue", | ||
| 252 | .max_current = 3, | ||
| 253 | }, | ||
| 254 | }; | ||
| 255 | |||
| 256 | static struct mc13783_leds_platform_data moboard_leds = { | ||
| 257 | .num_leds = ARRAY_SIZE(moboard_led), | ||
| 258 | .led = moboard_led, | ||
| 259 | .flags = MC13783_LED_SLEWLIMTC, | ||
| 260 | .abmode = MC13783_LED_AB_DISABLED, | ||
| 261 | .tc1_period = MC13783_LED_PERIOD_10MS, | ||
| 262 | .tc2_period = MC13783_LED_PERIOD_10MS, | ||
| 263 | }; | ||
| 264 | |||
| 224 | static struct mc13783_platform_data moboard_pmic = { | 265 | static struct mc13783_platform_data moboard_pmic = { |
| 225 | .regulators = moboard_regulators, | 266 | .regulators = moboard_regulators, |
| 226 | .num_regulators = ARRAY_SIZE(moboard_regulators), | 267 | .num_regulators = ARRAY_SIZE(moboard_regulators), |
| 268 | .leds = &moboard_leds, | ||
| 227 | .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC | | 269 | .flags = MC13783_USE_REGULATOR | MC13783_USE_RTC | |
| 228 | MC13783_USE_ADC, | 270 | MC13783_USE_ADC | MC13783_USE_LED, |
| 229 | }; | 271 | }; |
| 230 | 272 | ||
| 231 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | 273 | static struct spi_board_info moboard_spi_board_info[] __initdata = { |
| @@ -306,84 +348,56 @@ static struct imxmmc_platform_data sdhc1_pdata = { | |||
| 306 | * this pin is dedicated for all mx31moboard systems, so we do it here | 348 | * this pin is dedicated for all mx31moboard systems, so we do it here |
| 307 | */ | 349 | */ |
| 308 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | 350 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) |
| 309 | |||
| 310 | static void usb_xcvr_reset(void) | ||
| 311 | { | ||
| 312 | gpio_request(USB_RESET_B, "usb-reset"); | ||
| 313 | gpio_direction_output(USB_RESET_B, 0); | ||
| 314 | mdelay(1); | ||
| 315 | gpio_set_value(USB_RESET_B, 1); | ||
| 316 | } | ||
| 317 | |||
| 318 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | 351 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
| 319 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | 352 | PAD_CTL_ODE_CMOS) |
| 320 | 353 | ||
| 321 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | 354 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) |
| 322 | |||
| 323 | static void moboard_usbotg_init(void) | ||
| 324 | { | ||
| 325 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | ||
| 326 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | ||
| 327 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | ||
| 328 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | ||
| 329 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | ||
| 330 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | ||
| 331 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | ||
| 332 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | ||
| 333 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | ||
| 334 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | ||
| 335 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | ||
| 336 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | ||
| 337 | |||
| 338 | gpio_request(OTG_EN_B, "usb-udc-en"); | ||
| 339 | gpio_direction_output(OTG_EN_B, 0); | ||
| 340 | } | ||
| 341 | |||
| 342 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 343 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 344 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 345 | }; | ||
| 346 | |||
| 347 | #if defined(CONFIG_USB_ULPI) | ||
| 348 | |||
| 349 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) | 355 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) |
| 350 | 356 | ||
| 351 | static int moboard_usbh2_hw_init(struct platform_device *pdev) | 357 | static void usb_xcvr_reset(void) |
| 352 | { | 358 | { |
| 353 | int ret; | 359 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); |
| 360 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 361 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 362 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 363 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 364 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 365 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 366 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 367 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 368 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 369 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 370 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 354 | 371 | ||
| 355 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | 372 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); |
| 373 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 374 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 375 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 376 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | ||
| 377 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 378 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 379 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 380 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 381 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 382 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 383 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 384 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | ||
| 356 | 385 | ||
| 357 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); | 386 | gpio_request(OTG_EN_B, "usb-udc-en"); |
| 358 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); | 387 | gpio_direction_output(OTG_EN_B, 0); |
| 359 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); | 388 | gpio_request(USBH2_EN_B, "usbh2-en"); |
| 360 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); | ||
| 361 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); | ||
| 362 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); | ||
| 363 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); | ||
| 364 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); | ||
| 365 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); | ||
| 366 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); | ||
| 367 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); | ||
| 368 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); | ||
| 369 | |||
| 370 | ret = gpio_request(USBH2_EN_B, "usbh2-en"); | ||
| 371 | if (ret) | ||
| 372 | return ret; | ||
| 373 | gpio_direction_output(USBH2_EN_B, 0); | 389 | gpio_direction_output(USBH2_EN_B, 0); |
| 374 | 390 | ||
| 375 | return 0; | 391 | gpio_request(USB_RESET_B, "usb-reset"); |
| 392 | gpio_direction_output(USB_RESET_B, 0); | ||
| 393 | mdelay(1); | ||
| 394 | gpio_set_value(USB_RESET_B, 1); | ||
| 395 | mdelay(1); | ||
| 376 | } | 396 | } |
| 377 | 397 | ||
| 378 | static int moboard_usbh2_hw_exit(struct platform_device *pdev) | 398 | #if defined(CONFIG_USB_ULPI) |
| 379 | { | ||
| 380 | gpio_free(USBH2_EN_B); | ||
| 381 | return 0; | ||
| 382 | } | ||
| 383 | 399 | ||
| 384 | static struct mxc_usbh_platform_data usbh2_pdata = { | 400 | static struct mxc_usbh_platform_data usbh2_pdata = { |
| 385 | .init = moboard_usbh2_hw_init, | ||
| 386 | .exit = moboard_usbh2_hw_exit, | ||
| 387 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | 401 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, |
| 388 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | 402 | .flags = MXC_EHCI_POWER_PINS_ENABLED, |
| 389 | }; | 403 | }; |
| @@ -508,8 +522,6 @@ static void __init mxc_board_init(void) | |||
| 508 | 522 | ||
| 509 | usb_xcvr_reset(); | 523 | usb_xcvr_reset(); |
| 510 | 524 | ||
| 511 | moboard_usbotg_init(); | ||
| 512 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 513 | moboard_usbh2_init(); | 525 | moboard_usbh2_init(); |
| 514 | 526 | ||
| 515 | switch (mx31moboard_baseboard) { | 527 | switch (mx31moboard_baseboard) { |
| @@ -522,7 +534,8 @@ static void __init mxc_board_init(void) | |||
| 522 | mx31moboard_marxbot_init(); | 534 | mx31moboard_marxbot_init(); |
| 523 | break; | 535 | break; |
| 524 | case MX31SMARTBOT: | 536 | case MX31SMARTBOT: |
| 525 | mx31moboard_smartbot_init(); | 537 | case MX31EYEBOT: |
| 538 | mx31moboard_smartbot_init(mx31moboard_baseboard); | ||
| 526 | break; | 539 | break; |
| 527 | default: | 540 | default: |
| 528 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", | 541 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", |
diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c index 78ecd751549b..cce410662383 100644 --- a/arch/arm/mach-mx3/mach-pcm037.c +++ b/arch/arm/mach-mx3/mach-pcm037.c | |||
| @@ -449,6 +449,7 @@ static int __init pcm037_camera_alloc_dma(const size_t buf_size) | |||
| 449 | static struct platform_device *devices[] __initdata = { | 449 | static struct platform_device *devices[] __initdata = { |
| 450 | &pcm037_flash, | 450 | &pcm037_flash, |
| 451 | &pcm037_sram_device, | 451 | &pcm037_sram_device, |
| 452 | &imx_wdt_device0, | ||
| 452 | &pcm037_mt9t031, | 453 | &pcm037_mt9t031, |
| 453 | &pcm037_mt9v022, | 454 | &pcm037_mt9v022, |
| 454 | }; | 455 | }; |
diff --git a/arch/arm/mach-mx3/mach-pcm043.c b/arch/arm/mach-mx3/mach-pcm043.c index 1bf1ec2eef5e..78d9185a9d4b 100644 --- a/arch/arm/mach-mx3/mach-pcm043.c +++ b/arch/arm/mach-mx3/mach-pcm043.c | |||
| @@ -150,6 +150,7 @@ static struct i2c_board_info pcm043_i2c_devices[] = { | |||
| 150 | static struct platform_device *devices[] __initdata = { | 150 | static struct platform_device *devices[] __initdata = { |
| 151 | &pcm043_flash, | 151 | &pcm043_flash, |
| 152 | &mxc_fec_device, | 152 | &mxc_fec_device, |
| 153 | &imx_wdt_device0, | ||
| 153 | }; | 154 | }; |
| 154 | 155 | ||
| 155 | static struct pad_desc pcm043_pads[] = { | 156 | static struct pad_desc pcm043_pads[] = { |
diff --git a/arch/arm/mach-mx3/mx31lite-db.c b/arch/arm/mach-mx3/mx31lite-db.c index 093c595ca581..5f05bfbec380 100644 --- a/arch/arm/mach-mx3/mx31lite-db.c +++ b/arch/arm/mach-mx3/mx31lite-db.c | |||
| @@ -206,5 +206,6 @@ void __init mx31lite_db_init(void) | |||
| 206 | mxc_register_device(&mxc_spi_device0, &spi0_pdata); | 206 | mxc_register_device(&mxc_spi_device0, &spi0_pdata); |
| 207 | platform_device_register(&litekit_led_device); | 207 | platform_device_register(&litekit_led_device); |
| 208 | mxc_register_device(&imx_wdt_device0, NULL); | 208 | mxc_register_device(&imx_wdt_device0, NULL); |
| 209 | mxc_register_device(&imx_rtc_device0, NULL); | ||
| 209 | } | 210 | } |
| 210 | 211 | ||
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index 11b906ce7eae..582299cb2c08 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
| 24 | #include <linux/types.h> | 24 | #include <linux/types.h> |
| 25 | #include <linux/fsl_devices.h> | ||
| 25 | 26 | ||
| 26 | #include <linux/usb/otg.h> | 27 | #include <linux/usb/otg.h> |
| 27 | 28 | ||
| @@ -213,6 +214,12 @@ static int __init devboard_usbh1_init(void) | |||
| 213 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); | 214 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); |
| 214 | } | 215 | } |
| 215 | 216 | ||
| 217 | |||
| 218 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 219 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 220 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 221 | }; | ||
| 222 | |||
| 216 | /* | 223 | /* |
| 217 | * system init for baseboard usage. Will be called by mx31moboard init. | 224 | * system init for baseboard usage. Will be called by mx31moboard init. |
| 218 | */ | 225 | */ |
| @@ -229,5 +236,7 @@ void __init mx31moboard_devboard_init(void) | |||
| 229 | 236 | ||
| 230 | devboard_init_sel_gpios(); | 237 | devboard_init_sel_gpios(); |
| 231 | 238 | ||
| 239 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 240 | |||
| 232 | devboard_usbh1_init(); | 241 | devboard_usbh1_init(); |
| 233 | } | 242 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index ffb105e14d88..4930f8c27e66 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
| @@ -25,6 +25,7 @@ | |||
| 25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
| 26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
| 27 | #include <linux/types.h> | 27 | #include <linux/types.h> |
| 28 | #include <linux/fsl_devices.h> | ||
| 28 | 29 | ||
| 29 | #include <linux/usb/otg.h> | 30 | #include <linux/usb/otg.h> |
| 30 | 31 | ||
| @@ -329,6 +330,11 @@ static int __init marxbot_usbh1_init(void) | |||
| 329 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); | 330 | return mxc_register_device(&mxc_usbh1, &usbh1_pdata); |
| 330 | } | 331 | } |
| 331 | 332 | ||
| 333 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 334 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 335 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 336 | }; | ||
| 337 | |||
| 332 | /* | 338 | /* |
| 333 | * system init for baseboard usage. Will be called by mx31moboard init. | 339 | * system init for baseboard usage. Will be called by mx31moboard init. |
| 334 | */ | 340 | */ |
| @@ -356,5 +362,7 @@ void __init mx31moboard_marxbot_init(void) | |||
| 356 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0)); | 362 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_LCS0)); |
| 357 | gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false); | 363 | gpio_export(IOMUX_TO_GPIO(MX31_PIN_LCS0), false); |
| 358 | 364 | ||
| 365 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 366 | |||
| 359 | marxbot_usbh1_init(); | 367 | marxbot_usbh1_init(); |
| 360 | } | 368 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c index 52a69fc8b14f..293eea6d9d97 100644 --- a/arch/arm/mach-mx3/mx31moboard-smartbot.c +++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c | |||
| @@ -23,11 +23,18 @@ | |||
| 23 | #include <linux/i2c.h> | 23 | #include <linux/i2c.h> |
| 24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/types.h> | 25 | #include <linux/types.h> |
| 26 | #include <linux/fsl_devices.h> | ||
| 27 | |||
| 28 | #include <linux/usb/otg.h> | ||
| 29 | #include <linux/usb/ulpi.h> | ||
| 26 | 30 | ||
| 27 | #include <mach/common.h> | 31 | #include <mach/common.h> |
| 28 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
| 29 | #include <mach/imx-uart.h> | 33 | #include <mach/imx-uart.h> |
| 30 | #include <mach/iomux-mx3.h> | 34 | #include <mach/iomux-mx3.h> |
| 35 | #include <mach/board-mx31moboard.h> | ||
| 36 | #include <mach/mxc_ehci.h> | ||
| 37 | #include <mach/ulpi.h> | ||
| 31 | 38 | ||
| 32 | #include <media/soc_camera.h> | 39 | #include <media/soc_camera.h> |
| 33 | 40 | ||
| @@ -116,10 +123,33 @@ static int __init smartbot_cam_init(void) | |||
| 116 | return 0; | 123 | return 0; |
| 117 | } | 124 | } |
| 118 | 125 | ||
| 126 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 127 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 128 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
| 129 | }; | ||
| 130 | |||
| 131 | #if defined(CONFIG_USB_ULPI) | ||
| 132 | |||
| 133 | static struct mxc_usbh_platform_data otg_host_pdata = { | ||
| 134 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | ||
| 135 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static int __init smartbot_otg_host_init(void) | ||
| 139 | { | ||
| 140 | otg_host_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | ||
| 141 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | ||
| 142 | |||
| 143 | return mxc_register_device(&mxc_otg_host, &otg_host_pdata); | ||
| 144 | } | ||
| 145 | #else | ||
| 146 | static inline int smartbot_otg_host_init(void) { return 0; } | ||
| 147 | #endif | ||
| 148 | |||
| 119 | #define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1) | 149 | #define POWER_EN IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1) |
| 120 | #define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1) | 150 | #define DSPIC_RST_B IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1) |
| 121 | #define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1) | 151 | #define TRSLAT_RST_B IOMUX_TO_GPIO(MX31_PIN_RI_DCE1) |
| 122 | #define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1) | 152 | #define TRSLAT_SRC_CHOICE IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1) |
| 123 | 153 | ||
| 124 | static void smartbot_resets_init(void) | 154 | static void smartbot_resets_init(void) |
| 125 | { | 155 | { |
| @@ -138,15 +168,15 @@ static void smartbot_resets_init(void) | |||
| 138 | gpio_export(TRSLAT_RST_B, false); | 168 | gpio_export(TRSLAT_RST_B, false); |
| 139 | } | 169 | } |
| 140 | 170 | ||
| 141 | if (!gpio_request(SEL3, "sel3")) { | 171 | if (!gpio_request(TRSLAT_SRC_CHOICE, "translator-src-choice")) { |
| 142 | gpio_direction_input(SEL3); | 172 | gpio_direction_output(TRSLAT_SRC_CHOICE, 0); |
| 143 | gpio_export(SEL3, true); | 173 | gpio_export(TRSLAT_SRC_CHOICE, false); |
| 144 | } | 174 | } |
| 145 | } | 175 | } |
| 146 | /* | 176 | /* |
| 147 | * system init for baseboard usage. Will be called by mx31moboard init. | 177 | * system init for baseboard usage. Will be called by mx31moboard init. |
| 148 | */ | 178 | */ |
| 149 | void __init mx31moboard_smartbot_init(void) | 179 | void __init mx31moboard_smartbot_init(int board) |
| 150 | { | 180 | { |
| 151 | printk(KERN_INFO "Initializing mx31smartbot peripherals\n"); | 181 | printk(KERN_INFO "Initializing mx31smartbot peripherals\n"); |
| 152 | 182 | ||
| @@ -155,6 +185,19 @@ void __init mx31moboard_smartbot_init(void) | |||
| 155 | 185 | ||
| 156 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | 186 | mxc_register_device(&mxc_uart_device1, &uart_pdata); |
| 157 | 187 | ||
| 188 | |||
| 189 | switch (board) { | ||
| 190 | case MX31SMARTBOT: | ||
| 191 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
| 192 | break; | ||
| 193 | case MX31EYEBOT: | ||
| 194 | smartbot_otg_host_init(); | ||
| 195 | break; | ||
| 196 | default: | ||
| 197 | printk(KERN_WARNING "Unknown board %d, USB OTG not initialized", | ||
| 198 | board); | ||
| 199 | } | ||
| 200 | |||
| 158 | smartbot_resets_init(); | 201 | smartbot_resets_init(); |
| 159 | 202 | ||
| 160 | smartbot_cam_init(); | 203 | smartbot_cam_init(); |
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index ee67a71db80d..ed885f9d7b73 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c | |||
| @@ -12,11 +12,16 @@ | |||
| 12 | 12 | ||
| 13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/gpio.h> | ||
| 16 | #include <linux/delay.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/fsl_devices.h> | ||
| 15 | 19 | ||
| 16 | #include <mach/common.h> | 20 | #include <mach/common.h> |
| 17 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
| 18 | #include <mach/imx-uart.h> | 22 | #include <mach/imx-uart.h> |
| 19 | #include <mach/iomux-mx51.h> | 23 | #include <mach/iomux-mx51.h> |
| 24 | #include <mach/mxc_ehci.h> | ||
| 20 | 25 | ||
| 21 | #include <asm/irq.h> | 26 | #include <asm/irq.h> |
| 22 | #include <asm/setup.h> | 27 | #include <asm/setup.h> |
| @@ -26,6 +31,18 @@ | |||
| 26 | 31 | ||
| 27 | #include "devices.h" | 32 | #include "devices.h" |
| 28 | 33 | ||
| 34 | #define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */ | ||
| 35 | #define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */ | ||
| 36 | #define BABBAGE_PHY_RESET (1*32 +5) /* GPIO_2_5 */ | ||
| 37 | |||
| 38 | /* USB_CTRL_1 */ | ||
| 39 | #define MX51_USB_CTRL_1_OFFSET 0x10 | ||
| 40 | #define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25) | ||
| 41 | |||
| 42 | #define MX51_USB_PLLDIV_12_MHZ 0x00 | ||
| 43 | #define MX51_USB_PLL_DIV_19_2_MHZ 0x01 | ||
| 44 | #define MX51_USB_PLL_DIV_24_MHZ 0x02 | ||
| 45 | |||
| 29 | static struct platform_device *devices[] __initdata = { | 46 | static struct platform_device *devices[] __initdata = { |
| 30 | &mxc_fec_device, | 47 | &mxc_fec_device, |
| 31 | }; | 48 | }; |
| @@ -46,6 +63,22 @@ static struct pad_desc mx51babbage_pads[] = { | |||
| 46 | MX51_PAD_EIM_D26__UART3_TXD, | 63 | MX51_PAD_EIM_D26__UART3_TXD, |
| 47 | MX51_PAD_EIM_D27__UART3_RTS, | 64 | MX51_PAD_EIM_D27__UART3_RTS, |
| 48 | MX51_PAD_EIM_D24__UART3_CTS, | 65 | MX51_PAD_EIM_D24__UART3_CTS, |
| 66 | |||
| 67 | /* USB HOST1 */ | ||
| 68 | MX51_PAD_USBH1_CLK__USBH1_CLK, | ||
| 69 | MX51_PAD_USBH1_DIR__USBH1_DIR, | ||
| 70 | MX51_PAD_USBH1_NXT__USBH1_NXT, | ||
| 71 | MX51_PAD_USBH1_DATA0__USBH1_DATA0, | ||
| 72 | MX51_PAD_USBH1_DATA1__USBH1_DATA1, | ||
| 73 | MX51_PAD_USBH1_DATA2__USBH1_DATA2, | ||
| 74 | MX51_PAD_USBH1_DATA3__USBH1_DATA3, | ||
| 75 | MX51_PAD_USBH1_DATA4__USBH1_DATA4, | ||
| 76 | MX51_PAD_USBH1_DATA5__USBH1_DATA5, | ||
| 77 | MX51_PAD_USBH1_DATA6__USBH1_DATA6, | ||
| 78 | MX51_PAD_USBH1_DATA7__USBH1_DATA7, | ||
| 79 | |||
| 80 | /* USB HUB reset line*/ | ||
| 81 | MX51_PAD_GPIO_1_7__GPIO1_7, | ||
| 49 | }; | 82 | }; |
| 50 | 83 | ||
| 51 | /* Serial ports */ | 84 | /* Serial ports */ |
| @@ -66,15 +99,149 @@ static inline void mxc_init_imx_uart(void) | |||
| 66 | } | 99 | } |
| 67 | #endif /* SERIAL_IMX */ | 100 | #endif /* SERIAL_IMX */ |
| 68 | 101 | ||
| 102 | static int gpio_usbh1_active(void) | ||
| 103 | { | ||
| 104 | struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27; | ||
| 105 | struct pad_desc phyreset_gpio = MX51_PAD_EIM_D21__GPIO_2_5; | ||
| 106 | int ret; | ||
| 107 | |||
| 108 | /* Set USBH1_STP to GPIO and toggle it */ | ||
| 109 | mxc_iomux_v3_setup_pad(&usbh1stp_gpio); | ||
| 110 | ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp"); | ||
| 111 | |||
| 112 | if (ret) { | ||
| 113 | pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret); | ||
| 114 | return ret; | ||
| 115 | } | ||
| 116 | gpio_direction_output(BABBAGE_USBH1_STP, 0); | ||
| 117 | gpio_set_value(BABBAGE_USBH1_STP, 1); | ||
| 118 | msleep(100); | ||
| 119 | gpio_free(BABBAGE_USBH1_STP); | ||
| 120 | |||
| 121 | /* De-assert USB PHY RESETB */ | ||
| 122 | mxc_iomux_v3_setup_pad(&phyreset_gpio); | ||
| 123 | ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset"); | ||
| 124 | |||
| 125 | if (ret) { | ||
| 126 | pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret); | ||
| 127 | return ret; | ||
| 128 | } | ||
| 129 | gpio_direction_output(BABBAGE_PHY_RESET, 1); | ||
| 130 | return 0; | ||
| 131 | } | ||
| 132 | |||
| 133 | static inline void babbage_usbhub_reset(void) | ||
| 134 | { | ||
| 135 | int ret; | ||
| 136 | |||
| 137 | /* Bring USB hub out of reset */ | ||
| 138 | ret = gpio_request(BABBAGE_USB_HUB_RESET, "GPIO1_7"); | ||
| 139 | if (ret) { | ||
| 140 | printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret); | ||
| 141 | return; | ||
| 142 | } | ||
| 143 | gpio_direction_output(BABBAGE_USB_HUB_RESET, 0); | ||
| 144 | |||
| 145 | /* USB HUB RESET - De-assert USB HUB RESET_N */ | ||
| 146 | msleep(1); | ||
| 147 | gpio_set_value(BABBAGE_USB_HUB_RESET, 0); | ||
| 148 | msleep(1); | ||
| 149 | gpio_set_value(BABBAGE_USB_HUB_RESET, 1); | ||
| 150 | } | ||
| 151 | |||
| 152 | /* This function is board specific as the bit mask for the plldiv will also | ||
| 153 | be different for other Freescale SoCs, thus a common bitmask is not | ||
| 154 | possible and cannot get place in /plat-mxc/ehci.c.*/ | ||
| 155 | static int initialize_otg_port(struct platform_device *pdev) | ||
| 156 | { | ||
| 157 | u32 v; | ||
| 158 | void __iomem *usb_base; | ||
| 159 | u32 usbother_base; | ||
| 160 | |||
| 161 | usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); | ||
| 162 | usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; | ||
| 163 | |||
| 164 | /* Set the PHY clock to 19.2MHz */ | ||
| 165 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); | ||
| 166 | v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK; | ||
| 167 | v |= MX51_USB_PLL_DIV_19_2_MHZ; | ||
| 168 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); | ||
| 169 | iounmap(usb_base); | ||
| 170 | return 0; | ||
| 171 | } | ||
| 172 | |||
| 173 | static int initialize_usbh1_port(struct platform_device *pdev) | ||
| 174 | { | ||
| 175 | u32 v; | ||
| 176 | void __iomem *usb_base; | ||
| 177 | u32 usbother_base; | ||
| 178 | |||
| 179 | usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); | ||
| 180 | usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; | ||
| 181 | |||
| 182 | /* The clock for the USBH1 ULPI port will come externally from the PHY. */ | ||
| 183 | v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET); | ||
| 184 | __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET); | ||
| 185 | iounmap(usb_base); | ||
| 186 | return 0; | ||
| 187 | } | ||
| 188 | |||
| 189 | static struct mxc_usbh_platform_data dr_utmi_config = { | ||
| 190 | .init = initialize_otg_port, | ||
| 191 | .portsc = MXC_EHCI_UTMI_16BIT, | ||
| 192 | .flags = MXC_EHCI_INTERNAL_PHY, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct fsl_usb2_platform_data usb_pdata = { | ||
| 196 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
| 197 | .phy_mode = FSL_USB2_PHY_UTMI_WIDE, | ||
| 198 | }; | ||
| 199 | |||
| 200 | static struct mxc_usbh_platform_data usbh1_config = { | ||
| 201 | .init = initialize_usbh1_port, | ||
| 202 | .portsc = MXC_EHCI_MODE_ULPI, | ||
| 203 | .flags = (MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_ITC_NO_THRESHOLD), | ||
| 204 | }; | ||
| 205 | |||
| 206 | static int otg_mode_host; | ||
| 207 | |||
| 208 | static int __init babbage_otg_mode(char *options) | ||
| 209 | { | ||
| 210 | if (!strcmp(options, "host")) | ||
| 211 | otg_mode_host = 1; | ||
| 212 | else if (!strcmp(options, "device")) | ||
| 213 | otg_mode_host = 0; | ||
| 214 | else | ||
| 215 | pr_info("otg_mode neither \"host\" nor \"device\". " | ||
| 216 | "Defaulting to device\n"); | ||
| 217 | return 0; | ||
| 218 | } | ||
| 219 | __setup("otg_mode=", babbage_otg_mode); | ||
| 220 | |||
| 69 | /* | 221 | /* |
| 70 | * Board specific initialization. | 222 | * Board specific initialization. |
| 71 | */ | 223 | */ |
| 72 | static void __init mxc_board_init(void) | 224 | static void __init mxc_board_init(void) |
| 73 | { | 225 | { |
| 226 | struct pad_desc usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; | ||
| 227 | |||
| 74 | mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, | 228 | mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, |
| 75 | ARRAY_SIZE(mx51babbage_pads)); | 229 | ARRAY_SIZE(mx51babbage_pads)); |
| 76 | mxc_init_imx_uart(); | 230 | mxc_init_imx_uart(); |
| 77 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 231 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 232 | |||
| 233 | if (otg_mode_host) | ||
| 234 | mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config); | ||
| 235 | else { | ||
| 236 | initialize_otg_port(NULL); | ||
| 237 | mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata); | ||
| 238 | } | ||
| 239 | |||
| 240 | gpio_usbh1_active(); | ||
| 241 | mxc_register_device(&mxc_usbh1_device, &usbh1_config); | ||
| 242 | /* setback USBH1_STP to be function */ | ||
| 243 | mxc_iomux_v3_setup_pad(&usbh1stp); | ||
| 244 | babbage_usbhub_reset(); | ||
| 78 | } | 245 | } |
| 79 | 246 | ||
| 80 | static void __init mx51_babbage_timer_init(void) | 247 | static void __init mx51_babbage_timer_init(void) |
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c index 1ee6ce4087b8..d9f612d3370e 100644 --- a/arch/arm/mach-mx5/clock-mx51.c +++ b/arch/arm/mach-mx5/clock-mx51.c | |||
| @@ -37,6 +37,7 @@ static struct clk lp_apm_clk; | |||
| 37 | static struct clk periph_apm_clk; | 37 | static struct clk periph_apm_clk; |
| 38 | static struct clk ahb_clk; | 38 | static struct clk ahb_clk; |
| 39 | static struct clk ipg_clk; | 39 | static struct clk ipg_clk; |
| 40 | static struct clk usboh3_clk; | ||
| 40 | 41 | ||
| 41 | #define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */ | 42 | #define MAX_DPLL_WAIT_TRIES 1000 /* 1000 * udelay(1) = 1ms */ |
| 42 | 43 | ||
| @@ -570,6 +571,35 @@ static int _clk_uart_set_parent(struct clk *clk, struct clk *parent) | |||
| 570 | return 0; | 571 | return 0; |
| 571 | } | 572 | } |
| 572 | 573 | ||
| 574 | static unsigned long clk_usboh3_get_rate(struct clk *clk) | ||
| 575 | { | ||
| 576 | u32 reg, prediv, podf; | ||
| 577 | unsigned long parent_rate; | ||
| 578 | |||
| 579 | parent_rate = clk_get_rate(clk->parent); | ||
| 580 | |||
| 581 | reg = __raw_readl(MXC_CCM_CSCDR1); | ||
| 582 | prediv = ((reg & MXC_CCM_CSCDR1_USBOH3_CLK_PRED_MASK) >> | ||
| 583 | MXC_CCM_CSCDR1_USBOH3_CLK_PRED_OFFSET) + 1; | ||
| 584 | podf = ((reg & MXC_CCM_CSCDR1_USBOH3_CLK_PODF_MASK) >> | ||
| 585 | MXC_CCM_CSCDR1_USBOH3_CLK_PODF_OFFSET) + 1; | ||
| 586 | |||
| 587 | return parent_rate / (prediv * podf); | ||
| 588 | } | ||
| 589 | |||
| 590 | static int _clk_usboh3_set_parent(struct clk *clk, struct clk *parent) | ||
| 591 | { | ||
| 592 | u32 reg, mux; | ||
| 593 | |||
| 594 | mux = _get_mux(parent, &pll1_sw_clk, &pll2_sw_clk, &pll3_sw_clk, | ||
| 595 | &lp_apm_clk); | ||
| 596 | reg = __raw_readl(MXC_CCM_CSCMR1) & ~MXC_CCM_CSCMR1_USBOH3_CLK_SEL_MASK; | ||
| 597 | reg |= mux << MXC_CCM_CSCMR1_USBOH3_CLK_SEL_OFFSET; | ||
| 598 | __raw_writel(reg, MXC_CCM_CSCMR1); | ||
| 599 | |||
| 600 | return 0; | ||
| 601 | } | ||
| 602 | |||
| 573 | static unsigned long get_high_reference_clock_rate(struct clk *clk) | 603 | static unsigned long get_high_reference_clock_rate(struct clk *clk) |
| 574 | { | 604 | { |
| 575 | return external_high_reference; | 605 | return external_high_reference; |
| @@ -691,6 +721,12 @@ static struct clk uart_root_clk = { | |||
| 691 | .set_parent = _clk_uart_set_parent, | 721 | .set_parent = _clk_uart_set_parent, |
| 692 | }; | 722 | }; |
| 693 | 723 | ||
| 724 | static struct clk usboh3_clk = { | ||
| 725 | .parent = &pll2_sw_clk, | ||
| 726 | .get_rate = clk_usboh3_get_rate, | ||
| 727 | .set_parent = _clk_usboh3_set_parent, | ||
| 728 | }; | ||
| 729 | |||
| 694 | static struct clk ahb_max_clk = { | 730 | static struct clk ahb_max_clk = { |
| 695 | .parent = &ahb_clk, | 731 | .parent = &ahb_clk, |
| 696 | .enable_reg = MXC_CCM_CCGR0, | 732 | .enable_reg = MXC_CCM_CCGR0, |
| @@ -779,6 +815,12 @@ static struct clk_lookup lookups[] = { | |||
| 779 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) | 815 | _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) |
| 780 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) | 816 | _REGISTER_CLOCK(NULL, "gpt", gpt_clk) |
| 781 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) | 817 | _REGISTER_CLOCK("fec.0", NULL, fec_clk) |
| 818 | _REGISTER_CLOCK("mxc-ehci.0", "usb", usboh3_clk) | ||
| 819 | _REGISTER_CLOCK("mxc-ehci.0", "usb_ahb", ahb_clk) | ||
| 820 | _REGISTER_CLOCK("mxc-ehci.1", "usb", usboh3_clk) | ||
| 821 | _REGISTER_CLOCK("mxc-ehci.1", "usb_ahb", ahb_clk) | ||
| 822 | _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk) | ||
| 823 | _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk) | ||
| 782 | }; | 824 | }; |
| 783 | 825 | ||
| 784 | static void clk_tree_init(void) | 826 | static void clk_tree_init(void) |
| @@ -819,6 +861,9 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, | |||
| 819 | clk_enable(&cpu_clk); | 861 | clk_enable(&cpu_clk); |
| 820 | clk_enable(&main_bus_clk); | 862 | clk_enable(&main_bus_clk); |
| 821 | 863 | ||
| 864 | /* set the usboh3_clk parent to pll2_sw_clk */ | ||
| 865 | clk_set_parent(&usboh3_clk, &pll2_sw_clk); | ||
| 866 | |||
| 822 | /* System timer */ | 867 | /* System timer */ |
| 823 | mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), | 868 | mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), |
| 824 | MX51_MXC_INT_GPT); | 869 | MX51_MXC_INT_GPT); |
diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index d6fd3961ade9..7130449aacdc 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com> | 2 | * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com> |
| 3 | * Copyright (C) 2010 Freescale Semiconductor, Inc. | ||
| 3 | * | 4 | * |
| 4 | * The code contained herein is licensed under the GNU General Public | 5 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License | 6 | * License. You may obtain a copy of the GNU General Public License |
| @@ -10,8 +11,11 @@ | |||
| 10 | */ | 11 | */ |
| 11 | 12 | ||
| 12 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/dma-mapping.h> | ||
| 15 | #include <linux/gpio.h> | ||
| 13 | #include <mach/hardware.h> | 16 | #include <mach/hardware.h> |
| 14 | #include <mach/imx-uart.h> | 17 | #include <mach/imx-uart.h> |
| 18 | #include <mach/irqs.h> | ||
| 15 | 19 | ||
| 16 | static struct resource uart0[] = { | 20 | static struct resource uart0[] = { |
| 17 | { | 21 | { |
| @@ -89,8 +93,109 @@ struct platform_device mxc_fec_device = { | |||
| 89 | .resource = mxc_fec_resources, | 93 | .resource = mxc_fec_resources, |
| 90 | }; | 94 | }; |
| 91 | 95 | ||
| 92 | /* Dummy definition to allow compiling in AVIC and TZIC simultaneously */ | 96 | static u64 usb_dma_mask = DMA_BIT_MASK(32); |
| 97 | |||
| 98 | static struct resource usbotg_resources[] = { | ||
| 99 | { | ||
| 100 | .start = MX51_OTG_BASE_ADDR, | ||
| 101 | .end = MX51_OTG_BASE_ADDR + 0x1ff, | ||
| 102 | .flags = IORESOURCE_MEM, | ||
| 103 | }, | ||
| 104 | { | ||
| 105 | .start = MX51_MXC_INT_USB_OTG, | ||
| 106 | .flags = IORESOURCE_IRQ, | ||
| 107 | }, | ||
| 108 | }; | ||
| 109 | |||
| 110 | /* OTG gadget device */ | ||
| 111 | struct platform_device mxc_usbdr_udc_device = { | ||
| 112 | .name = "fsl-usb2-udc", | ||
| 113 | .id = -1, | ||
| 114 | .num_resources = ARRAY_SIZE(usbotg_resources), | ||
| 115 | .resource = usbotg_resources, | ||
| 116 | .dev = { | ||
| 117 | .dma_mask = &usb_dma_mask, | ||
| 118 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 119 | }, | ||
| 120 | }; | ||
| 121 | |||
| 122 | struct platform_device mxc_usbdr_host_device = { | ||
| 123 | .name = "mxc-ehci", | ||
| 124 | .id = 0, | ||
| 125 | .num_resources = ARRAY_SIZE(usbotg_resources), | ||
| 126 | .resource = usbotg_resources, | ||
| 127 | .dev = { | ||
| 128 | .dma_mask = &usb_dma_mask, | ||
| 129 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 130 | }, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static struct resource usbh1_resources[] = { | ||
| 134 | { | ||
| 135 | .start = MX51_OTG_BASE_ADDR + 0x200, | ||
| 136 | .end = MX51_OTG_BASE_ADDR + 0x200 + 0x1ff, | ||
| 137 | .flags = IORESOURCE_MEM, | ||
| 138 | }, | ||
| 139 | { | ||
| 140 | .start = MX51_MXC_INT_USB_H1, | ||
| 141 | .flags = IORESOURCE_IRQ, | ||
| 142 | }, | ||
| 143 | }; | ||
| 144 | |||
| 145 | struct platform_device mxc_usbh1_device = { | ||
| 146 | .name = "mxc-ehci", | ||
| 147 | .id = 1, | ||
| 148 | .num_resources = ARRAY_SIZE(usbh1_resources), | ||
| 149 | .resource = usbh1_resources, | ||
| 150 | .dev = { | ||
| 151 | .dma_mask = &usb_dma_mask, | ||
| 152 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 153 | }, | ||
| 154 | }; | ||
| 155 | |||
| 156 | static struct resource mxc_wdt_resources[] = { | ||
| 157 | { | ||
| 158 | .start = MX51_WDOG_BASE_ADDR, | ||
| 159 | .end = MX51_WDOG_BASE_ADDR + SZ_16K - 1, | ||
| 160 | .flags = IORESOURCE_MEM, | ||
| 161 | }, | ||
| 162 | }; | ||
| 163 | |||
| 164 | struct platform_device mxc_wdt = { | ||
| 165 | .name = "imx2-wdt", | ||
| 166 | .id = 0, | ||
| 167 | .num_resources = ARRAY_SIZE(mxc_wdt_resources), | ||
| 168 | .resource = mxc_wdt_resources, | ||
| 169 | }; | ||
| 170 | |||
| 171 | static struct mxc_gpio_port mxc_gpio_ports[] = { | ||
| 172 | { | ||
| 173 | .chip.label = "gpio-0", | ||
| 174 | .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR), | ||
| 175 | .irq = MX51_MXC_INT_GPIO1_LOW, | ||
| 176 | .virtual_irq_start = MXC_GPIO_IRQ_START | ||
| 177 | }, | ||
| 178 | { | ||
| 179 | .chip.label = "gpio-1", | ||
| 180 | .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR), | ||
| 181 | .irq = MX51_MXC_INT_GPIO2_LOW, | ||
| 182 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1 | ||
| 183 | }, | ||
| 184 | { | ||
| 185 | .chip.label = "gpio-2", | ||
| 186 | .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR), | ||
| 187 | .irq = MX51_MXC_INT_GPIO3_LOW, | ||
| 188 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2 | ||
| 189 | }, | ||
| 190 | { | ||
| 191 | .chip.label = "gpio-3", | ||
| 192 | .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR), | ||
| 193 | .irq = MX51_MXC_INT_GPIO4_LOW, | ||
| 194 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3 | ||
| 195 | }, | ||
| 196 | }; | ||
| 197 | |||
| 93 | int __init mxc_register_gpios(void) | 198 | int __init mxc_register_gpios(void) |
| 94 | { | 199 | { |
| 95 | return 0; | 200 | return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports)); |
| 96 | } | 201 | } |
diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h index f339ab8c19be..c879ae71cd5b 100644 --- a/arch/arm/mach-mx5/devices.h +++ b/arch/arm/mach-mx5/devices.h | |||
| @@ -2,3 +2,7 @@ extern struct platform_device mxc_uart_device0; | |||
| 2 | extern struct platform_device mxc_uart_device1; | 2 | extern struct platform_device mxc_uart_device1; |
| 3 | extern struct platform_device mxc_uart_device2; | 3 | extern struct platform_device mxc_uart_device2; |
| 4 | extern struct platform_device mxc_fec_device; | 4 | extern struct platform_device mxc_fec_device; |
| 5 | extern struct platform_device mxc_usbdr_host_device; | ||
| 6 | extern struct platform_device mxc_usbh1_device; | ||
| 7 | extern struct platform_device mxc_usbdr_udc_device; | ||
| 8 | extern struct platform_device mxc_wdt; | ||
diff --git a/arch/arm/mach-nomadik/clock.c b/arch/arm/mach-nomadik/clock.c index 60f5bee09f2e..2c471fc451d7 100644 --- a/arch/arm/mach-nomadik/clock.c +++ b/arch/arm/mach-nomadik/clock.c | |||
| @@ -56,6 +56,7 @@ static struct clk_lookup lookups[] = { | |||
| 56 | CLK(&clk_default, "gpio.1"), | 56 | CLK(&clk_default, "gpio.1"), |
| 57 | CLK(&clk_default, "gpio.2"), | 57 | CLK(&clk_default, "gpio.2"), |
| 58 | CLK(&clk_default, "gpio.3"), | 58 | CLK(&clk_default, "gpio.3"), |
| 59 | CLK(&clk_default, "rng"), | ||
| 59 | }; | 60 | }; |
| 60 | 61 | ||
| 61 | static int __init clk_init(void) | 62 | static int __init clk_init(void) |
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index e7d629b3c76a..f474a80b8867 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c | |||
| @@ -137,9 +137,7 @@ static void ads7846_dev_init(void) | |||
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | gpio_direction_input(ts_gpio); | 139 | gpio_direction_input(ts_gpio); |
| 140 | 140 | gpio_set_debounce(ts_gpio, 310); | |
| 141 | omap_set_gpio_debounce(ts_gpio, 1); | ||
| 142 | omap_set_gpio_debounce_time(ts_gpio, 0xa); | ||
| 143 | } | 141 | } |
| 144 | 142 | ||
| 145 | static int ads7846_get_pendown_state(void) | 143 | static int ads7846_get_pendown_state(void) |
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index 5fcb52e71298..fefd7e6e9779 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c | |||
| @@ -209,8 +209,7 @@ static void ads7846_dev_init(void) | |||
| 209 | } | 209 | } |
| 210 | 210 | ||
| 211 | gpio_direction_input(ts_gpio); | 211 | gpio_direction_input(ts_gpio); |
| 212 | omap_set_gpio_debounce(ts_gpio, 1); | 212 | gpio_set_debounce(ts_gpio, 310); |
| 213 | omap_set_gpio_debounce_time(ts_gpio, 0xa); | ||
| 214 | } | 213 | } |
| 215 | 214 | ||
| 216 | static int ads7846_get_pendown_state(void) | 215 | static int ads7846_get_pendown_state(void) |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 81bba194b030..b95261013812 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
| @@ -579,9 +579,7 @@ static void ads7846_dev_init(void) | |||
| 579 | printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); | 579 | printk(KERN_ERR "can't get ads7846 pen down GPIO\n"); |
| 580 | 580 | ||
| 581 | gpio_direction_input(OMAP3_EVM_TS_GPIO); | 581 | gpio_direction_input(OMAP3_EVM_TS_GPIO); |
| 582 | 582 | gpio_set_debounce(OMAP3_EVM_TS_GPIO, 310); | |
| 583 | omap_set_gpio_debounce(OMAP3_EVM_TS_GPIO, 1); | ||
| 584 | omap_set_gpio_debounce_time(OMAP3_EVM_TS_GPIO, 0xa); | ||
| 585 | } | 583 | } |
| 586 | 584 | ||
| 587 | static int ads7846_get_pendown_state(void) | 585 | static int ads7846_get_pendown_state(void) |
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 395d049bf010..db06dc910ba7 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c | |||
| @@ -130,8 +130,8 @@ static struct platform_device pandora_keys_gpio = { | |||
| 130 | static void __init pandora_keys_gpio_init(void) | 130 | static void __init pandora_keys_gpio_init(void) |
| 131 | { | 131 | { |
| 132 | /* set debounce time for GPIO banks 4 and 6 */ | 132 | /* set debounce time for GPIO banks 4 and 6 */ |
| 133 | omap_set_gpio_debounce_time(32 * 3, GPIO_DEBOUNCE_TIME); | 133 | gpio_set_debounce(32 * 3, GPIO_DEBOUNCE_TIME); |
| 134 | omap_set_gpio_debounce_time(32 * 5, GPIO_DEBOUNCE_TIME); | 134 | gpio_set_debounce(32 * 5, GPIO_DEBOUNCE_TIME); |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | static int board_keymap[] = { | 137 | static int board_keymap[] = { |
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index 2504d41f923e..2f5f8233dd5b 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | |||
| @@ -328,8 +328,7 @@ static void __init omap3_ads7846_init(void) | |||
| 328 | } | 328 | } |
| 329 | 329 | ||
| 330 | gpio_direction_input(OMAP3_TS_GPIO); | 330 | gpio_direction_input(OMAP3_TS_GPIO); |
| 331 | omap_set_gpio_debounce(OMAP3_TS_GPIO, 1); | 331 | gpio_set_debounce(OMAP3_TS_GPIO, 310); |
| 332 | omap_set_gpio_debounce_time(OMAP3_TS_GPIO, 0xa); | ||
| 333 | } | 332 | } |
| 334 | 333 | ||
| 335 | static struct ads7846_platform_data ads7846_config = { | 334 | static struct ads7846_platform_data ads7846_config = { |
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 685f34a9634b..fe0de1698edc 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c | |||
| @@ -240,22 +240,23 @@ error_fail: | |||
| 240 | 240 | ||
| 241 | #define ORION_BLINK_HALF_PERIOD 100 /* ms */ | 241 | #define ORION_BLINK_HALF_PERIOD 100 /* ms */ |
| 242 | 242 | ||
| 243 | static int dns323_gpio_blink_set(unsigned gpio, | 243 | static int dns323_gpio_blink_set(unsigned gpio, int state, |
| 244 | unsigned long *delay_on, unsigned long *delay_off) | 244 | unsigned long *delay_on, unsigned long *delay_off) |
| 245 | { | 245 | { |
| 246 | static int value = 0; | ||
| 247 | 246 | ||
| 248 | if (!*delay_on && !*delay_off) | 247 | if (delay_on && delay_off && !*delay_on && !*delay_off) |
| 249 | *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD; | 248 | *delay_on = *delay_off = ORION_BLINK_HALF_PERIOD; |
| 250 | 249 | ||
| 251 | if (ORION_BLINK_HALF_PERIOD == *delay_on | 250 | switch(state) { |
| 252 | && ORION_BLINK_HALF_PERIOD == *delay_off) { | 251 | case GPIO_LED_NO_BLINK_LOW: |
| 253 | value = !value; | 252 | case GPIO_LED_NO_BLINK_HIGH: |
| 254 | orion_gpio_set_blink(gpio, value); | 253 | orion_gpio_set_blink(gpio, 0); |
| 255 | return 0; | 254 | gpio_set_value(gpio, state); |
| 255 | break; | ||
| 256 | case GPIO_LED_BLINK: | ||
| 257 | orion_gpio_set_blink(gpio, 1); | ||
| 256 | } | 258 | } |
| 257 | 259 | return 0; | |
| 258 | return -EINVAL; | ||
| 259 | } | 260 | } |
| 260 | 261 | ||
| 261 | static struct gpio_led dns323_leds[] = { | 262 | static struct gpio_led dns323_leds[] = { |
| @@ -263,6 +264,7 @@ static struct gpio_led dns323_leds[] = { | |||
| 263 | .name = "power:blue", | 264 | .name = "power:blue", |
| 264 | .gpio = DNS323_GPIO_LED_POWER2, | 265 | .gpio = DNS323_GPIO_LED_POWER2, |
| 265 | .default_trigger = "timer", | 266 | .default_trigger = "timer", |
| 267 | .active_low = 1, | ||
| 266 | }, { | 268 | }, { |
| 267 | .name = "right:amber", | 269 | .name = "right:amber", |
| 268 | .gpio = DNS323_GPIO_LED_RIGHT_AMBER, | 270 | .gpio = DNS323_GPIO_LED_RIGHT_AMBER, |
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index 091c98a639d9..cd3983ad4160 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h | |||
| @@ -114,6 +114,7 @@ | |||
| 114 | #define S3C_PA_USBHOST S3C2410_PA_USBHOST | 114 | #define S3C_PA_USBHOST S3C2410_PA_USBHOST |
| 115 | #define S3C_PA_HSMMC0 S3C2443_PA_HSMMC | 115 | #define S3C_PA_HSMMC0 S3C2443_PA_HSMMC |
| 116 | #define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0 | 116 | #define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0 |
| 117 | #define S3C_PA_WDT S3C2410_PA_WATCHDOG | ||
| 117 | #define S3C_PA_NAND S3C24XX_PA_NAND | 118 | #define S3C_PA_NAND S3C24XX_PA_NAND |
| 118 | 119 | ||
| 119 | #endif /* __ASM_ARCH_MAP_H */ | 120 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c index 45799c608d8f..9e39faa283b9 100644 --- a/arch/arm/mach-s3c2440/mach-gta02.c +++ b/arch/arm/mach-s3c2440/mach-gta02.c | |||
| @@ -49,7 +49,6 @@ | |||
| 49 | #include <linux/io.h> | 49 | #include <linux/io.h> |
| 50 | 50 | ||
| 51 | #include <linux/i2c.h> | 51 | #include <linux/i2c.h> |
| 52 | #include <linux/backlight.h> | ||
| 53 | #include <linux/regulator/machine.h> | 52 | #include <linux/regulator/machine.h> |
| 54 | 53 | ||
| 55 | #include <linux/mfd/pcf50633/core.h> | 54 | #include <linux/mfd/pcf50633/core.h> |
| @@ -57,6 +56,7 @@ | |||
| 57 | #include <linux/mfd/pcf50633/adc.h> | 56 | #include <linux/mfd/pcf50633/adc.h> |
| 58 | #include <linux/mfd/pcf50633/gpio.h> | 57 | #include <linux/mfd/pcf50633/gpio.h> |
| 59 | #include <linux/mfd/pcf50633/pmic.h> | 58 | #include <linux/mfd/pcf50633/pmic.h> |
| 59 | #include <linux/mfd/pcf50633/backlight.h> | ||
| 60 | 60 | ||
| 61 | #include <asm/mach/arch.h> | 61 | #include <asm/mach/arch.h> |
| 62 | #include <asm/mach/map.h> | 62 | #include <asm/mach/map.h> |
| @@ -254,6 +254,12 @@ static char *gta02_batteries[] = { | |||
| 254 | "battery", | 254 | "battery", |
| 255 | }; | 255 | }; |
| 256 | 256 | ||
| 257 | static struct pcf50633_bl_platform_data gta02_backlight_data = { | ||
| 258 | .default_brightness = 0x3f, | ||
| 259 | .default_brightness_limit = 0, | ||
| 260 | .ramp_time = 5, | ||
| 261 | }; | ||
| 262 | |||
| 257 | struct pcf50633_platform_data gta02_pcf_pdata = { | 263 | struct pcf50633_platform_data gta02_pcf_pdata = { |
| 258 | .resumers = { | 264 | .resumers = { |
| 259 | [0] = PCF50633_INT1_USBINS | | 265 | [0] = PCF50633_INT1_USBINS | |
| @@ -271,6 +277,8 @@ struct pcf50633_platform_data gta02_pcf_pdata = { | |||
| 271 | 277 | ||
| 272 | .charger_reference_current_ma = 1000, | 278 | .charger_reference_current_ma = 1000, |
| 273 | 279 | ||
| 280 | .backlight_data = >a02_backlight_data, | ||
| 281 | |||
| 274 | .reg_init_data = { | 282 | .reg_init_data = { |
| 275 | [PCF50633_REGULATOR_AUTO] = { | 283 | [PCF50633_REGULATOR_AUTO] = { |
| 276 | .constraints = { | 284 | .constraints = { |
| @@ -478,71 +486,6 @@ static struct s3c2410_udc_mach_info gta02_udc_cfg = { | |||
| 478 | 486 | ||
| 479 | }; | 487 | }; |
| 480 | 488 | ||
| 481 | |||
| 482 | |||
| 483 | static void gta02_bl_set_intensity(int intensity) | ||
| 484 | { | ||
| 485 | struct pcf50633 *pcf = gta02_pcf; | ||
| 486 | int old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT); | ||
| 487 | |||
| 488 | /* We map 8-bit intensity to 6-bit intensity in hardware. */ | ||
| 489 | intensity >>= 2; | ||
| 490 | |||
| 491 | /* | ||
| 492 | * This can happen during, eg, print of panic on blanked console, | ||
| 493 | * but we can't service i2c without interrupts active, so abort. | ||
| 494 | */ | ||
| 495 | if (in_atomic()) { | ||
| 496 | printk(KERN_ERR "gta02_bl_set_intensity called while atomic\n"); | ||
| 497 | return; | ||
| 498 | } | ||
| 499 | |||
| 500 | old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT); | ||
| 501 | if (intensity == old_intensity) | ||
| 502 | return; | ||
| 503 | |||
| 504 | /* We can't do this anywhere else. */ | ||
| 505 | pcf50633_reg_write(pcf, PCF50633_REG_LEDDIM, 5); | ||
| 506 | |||
| 507 | if (!(pcf50633_reg_read(pcf, PCF50633_REG_LEDENA) & 3)) | ||
| 508 | old_intensity = 0; | ||
| 509 | |||
| 510 | /* | ||
| 511 | * The PCF50633 cannot handle LEDOUT = 0 (datasheet p60) | ||
| 512 | * if seen, you have to re-enable the LED unit. | ||
| 513 | */ | ||
| 514 | if (!intensity || !old_intensity) | ||
| 515 | pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 0); | ||
| 516 | |||
| 517 | /* Illegal to set LEDOUT to 0. */ | ||
| 518 | if (!intensity) | ||
| 519 | pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, 2); | ||
| 520 | else | ||
| 521 | pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, | ||
| 522 | intensity); | ||
| 523 | |||
| 524 | if (intensity) | ||
| 525 | pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 2); | ||
| 526 | |||
| 527 | } | ||
| 528 | |||
| 529 | static struct generic_bl_info gta02_bl_info = { | ||
| 530 | .name = "gta02-bl", | ||
| 531 | .max_intensity = 0xff, | ||
| 532 | .default_intensity = 0xff, | ||
| 533 | .set_bl_intensity = gta02_bl_set_intensity, | ||
| 534 | }; | ||
| 535 | |||
| 536 | static struct platform_device gta02_bl_dev = { | ||
| 537 | .name = "generic-bl", | ||
| 538 | .id = 1, | ||
| 539 | .dev = { | ||
| 540 | .platform_data = >a02_bl_info, | ||
| 541 | }, | ||
| 542 | }; | ||
| 543 | |||
| 544 | |||
| 545 | |||
| 546 | /* USB */ | 489 | /* USB */ |
| 547 | static struct s3c2410_hcd_info gta02_usb_info __initdata = { | 490 | static struct s3c2410_hcd_info gta02_usb_info __initdata = { |
| 548 | .port[0] = { | 491 | .port[0] = { |
| @@ -579,7 +522,6 @@ static struct platform_device *gta02_devices[] __initdata = { | |||
| 579 | /* These guys DO need to be children of PMU. */ | 522 | /* These guys DO need to be children of PMU. */ |
| 580 | 523 | ||
| 581 | static struct platform_device *gta02_devices_pmu_children[] = { | 524 | static struct platform_device *gta02_devices_pmu_children[] = { |
| 582 | >a02_bl_dev, | ||
| 583 | }; | 525 | }; |
| 584 | 526 | ||
| 585 | 527 | ||
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 69e9fbfea917..f5a59727949f 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig | |||
| @@ -7,6 +7,7 @@ | |||
| 7 | config PLAT_S3C64XX | 7 | config PLAT_S3C64XX |
| 8 | bool | 8 | bool |
| 9 | depends on ARCH_S3C64XX | 9 | depends on ARCH_S3C64XX |
| 10 | select SAMSUNG_WAKEMASK | ||
| 10 | default y | 11 | default y |
| 11 | help | 12 | help |
| 12 | Base platform code for any Samsung S3C64XX device | 13 | Base platform code for any Samsung S3C64XX device |
| @@ -35,6 +36,11 @@ config S3C64XX_SETUP_SDHCI | |||
| 35 | Internal configuration for default SDHCI setup for S3C6400 and | 36 | Internal configuration for default SDHCI setup for S3C6400 and |
| 36 | S3C6410 SoCs. | 37 | S3C6410 SoCs. |
| 37 | 38 | ||
| 39 | config S3C64XX_DEV_ONENAND1 | ||
| 40 | bool | ||
| 41 | help | ||
| 42 | Compile in platform device definition for OneNAND1 controller | ||
| 43 | |||
| 38 | # platform specific device setup | 44 | # platform specific device setup |
| 39 | 45 | ||
| 40 | config S3C64XX_SETUP_I2C0 | 46 | config S3C64XX_SETUP_I2C0 |
| @@ -90,8 +96,11 @@ config MACH_SMDK6410 | |||
| 90 | select S3C_DEV_HSMMC1 | 96 | select S3C_DEV_HSMMC1 |
| 91 | select S3C_DEV_I2C1 | 97 | select S3C_DEV_I2C1 |
| 92 | select S3C_DEV_FB | 98 | select S3C_DEV_FB |
| 99 | select SAMSUNG_DEV_TS | ||
| 93 | select S3C_DEV_USB_HOST | 100 | select S3C_DEV_USB_HOST |
| 94 | select S3C_DEV_USB_HSOTG | 101 | select S3C_DEV_USB_HSOTG |
| 102 | select S3C_DEV_WDT | ||
| 103 | select HAVE_S3C2410_WATCHDOG | ||
| 95 | select S3C64XX_SETUP_SDHCI | 104 | select S3C64XX_SETUP_SDHCI |
| 96 | select S3C64XX_SETUP_I2C1 | 105 | select S3C64XX_SETUP_I2C1 |
| 97 | select S3C64XX_SETUP_FB_24BPP | 106 | select S3C64XX_SETUP_FB_24BPP |
| @@ -179,3 +188,34 @@ config MACH_HMT | |||
| 179 | select HAVE_PWM | 188 | select HAVE_PWM |
| 180 | help | 189 | help |
| 181 | Machine support for the Airgoo HMT | 190 | Machine support for the Airgoo HMT |
| 191 | |||
| 192 | config MACH_SMARTQ | ||
| 193 | bool | ||
| 194 | select CPU_S3C6410 | ||
| 195 | select S3C_DEV_HSMMC | ||
| 196 | select S3C_DEV_HSMMC1 | ||
| 197 | select S3C_DEV_HSMMC2 | ||
| 198 | select S3C_DEV_FB | ||
| 199 | select S3C_DEV_HWMON | ||
| 200 | select S3C_DEV_RTC | ||
| 201 | select S3C_DEV_USB_HSOTG | ||
| 202 | select S3C_DEV_USB_HOST | ||
| 203 | select S3C64XX_SETUP_SDHCI | ||
| 204 | select S3C64XX_SETUP_FB_24BPP | ||
| 205 | select SAMSUNG_DEV_ADC | ||
| 206 | select SAMSUNG_DEV_TS | ||
| 207 | select HAVE_PWM | ||
| 208 | help | ||
| 209 | Shared machine support for SmartQ 5/7 | ||
| 210 | |||
| 211 | config MACH_SMARTQ5 | ||
| 212 | bool "SmartQ 5" | ||
| 213 | select MACH_SMARTQ | ||
| 214 | help | ||
| 215 | Machine support for the SmartQ 5 | ||
| 216 | |||
| 217 | config MACH_SMARTQ7 | ||
| 218 | bool "SmartQ 7" | ||
| 219 | select MACH_SMARTQ | ||
| 220 | help | ||
| 221 | Machine support for the SmartQ 7 | ||
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index a10f1fc6b023..9d1006938f5c 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile | |||
| @@ -52,6 +52,9 @@ obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o | |||
| 52 | obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o | 52 | obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o |
| 53 | obj-$(CONFIG_MACH_NCP) += mach-ncp.o | 53 | obj-$(CONFIG_MACH_NCP) += mach-ncp.o |
| 54 | obj-$(CONFIG_MACH_HMT) += mach-hmt.o | 54 | obj-$(CONFIG_MACH_HMT) += mach-hmt.o |
| 55 | obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o | ||
| 56 | obj-$(CONFIG_MACH_SMARTQ5) += mach-smartq5.o | ||
| 57 | obj-$(CONFIG_MACH_SMARTQ7) += mach-smartq7.o | ||
| 55 | 58 | ||
| 56 | # device support | 59 | # device support |
| 57 | 60 | ||
| @@ -59,3 +62,4 @@ obj-y += dev-uart.o | |||
| 59 | obj-y += dev-audio.o | 62 | obj-y += dev-audio.o |
| 60 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | 63 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o |
| 61 | obj-$(CONFIG_S3C64XX_DEV_TS) += dev-ts.o | 64 | obj-$(CONFIG_S3C64XX_DEV_TS) += dev-ts.o |
| 65 | obj-$(CONFIG_S3C64XX_DEV_ONENAND1) += dev-onenand1.o | ||
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 7a4138beb665..fbd85a9b7bbf 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
| @@ -259,6 +259,12 @@ static struct clk init_clocks[] = { | |||
| 259 | .enable = s3c64xx_hclk_ctrl, | 259 | .enable = s3c64xx_hclk_ctrl, |
| 260 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, | 260 | .ctrlbit = S3C_CLKCON_HCLK_HSMMC2, |
| 261 | }, { | 261 | }, { |
| 262 | .name = "otg", | ||
| 263 | .id = -1, | ||
| 264 | .parent = &clk_h, | ||
| 265 | .enable = s3c64xx_hclk_ctrl, | ||
| 266 | .ctrlbit = S3C_CLKCON_HCLK_USB, | ||
| 267 | }, { | ||
| 262 | .name = "timers", | 268 | .name = "timers", |
| 263 | .id = -1, | 269 | .id = -1, |
| 264 | .parent = &clk_p, | 270 | .parent = &clk_p, |
diff --git a/arch/arm/mach-s3c64xx/dev-onenand1.c b/arch/arm/mach-s3c64xx/dev-onenand1.c new file mode 100644 index 000000000000..92ffd5bac104 --- /dev/null +++ b/arch/arm/mach-s3c64xx/dev-onenand1.c | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/dev-onenand1.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008-2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * S3C64XX series device definition for OneNAND devices | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/mtd/mtd.h> | ||
| 17 | #include <linux/mtd/onenand.h> | ||
| 18 | |||
| 19 | #include <mach/irqs.h> | ||
| 20 | #include <mach/map.h> | ||
| 21 | |||
| 22 | static struct resource s3c64xx_onenand1_resources[] = { | ||
| 23 | [0] = { | ||
| 24 | .start = S3C64XX_PA_ONENAND1, | ||
| 25 | .end = S3C64XX_PA_ONENAND1 + 0x400 - 1, | ||
| 26 | .flags = IORESOURCE_MEM, | ||
| 27 | }, | ||
| 28 | [1] = { | ||
| 29 | .start = S3C64XX_PA_ONENAND1_BUF, | ||
| 30 | .end = S3C64XX_PA_ONENAND1_BUF + S3C64XX_SZ_ONENAND1_BUF - 1, | ||
| 31 | .flags = IORESOURCE_MEM, | ||
| 32 | }, | ||
| 33 | [2] = { | ||
| 34 | .start = IRQ_ONENAND1, | ||
| 35 | .end = IRQ_ONENAND1, | ||
| 36 | .flags = IORESOURCE_IRQ, | ||
| 37 | }, | ||
| 38 | }; | ||
| 39 | |||
| 40 | struct platform_device s3c64xx_device_onenand1 = { | ||
| 41 | .name = "samsung-onenand", | ||
| 42 | .id = 1, | ||
| 43 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | ||
| 44 | .resource = s3c64xx_onenand1_resources, | ||
| 45 | }; | ||
| 46 | |||
| 47 | void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) | ||
| 48 | { | ||
| 49 | struct onenand_platform_data *pd; | ||
| 50 | |||
| 51 | pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); | ||
| 52 | if (!pd) | ||
| 53 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | ||
| 54 | s3c64xx_device_onenand1.dev.platform_data = pd; | ||
| 55 | } | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h index e9ab4ac0b9a8..8e2df26cf14a 100644 --- a/arch/arm/mach-s3c64xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h | |||
| @@ -212,5 +212,9 @@ | |||
| 212 | 212 | ||
| 213 | #define NR_IRQS (IRQ_BOARD_END + 1) | 213 | #define NR_IRQS (IRQ_BOARD_END + 1) |
| 214 | 214 | ||
| 215 | /* Compatibility */ | ||
| 216 | |||
| 217 | #define IRQ_ONENAND IRQ_ONENAND0 | ||
| 218 | |||
| 215 | #endif /* __ASM_MACH_S3C64XX_IRQS_H */ | 219 | #endif /* __ASM_MACH_S3C64XX_IRQS_H */ |
| 216 | 220 | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index 9fdd50c8c767..e1eab3c94aea 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h | |||
| @@ -52,6 +52,16 @@ | |||
| 52 | 52 | ||
| 53 | #define S3C64XX_PA_SROM (0x70000000) | 53 | #define S3C64XX_PA_SROM (0x70000000) |
| 54 | 54 | ||
| 55 | #define S3C64XX_PA_ONENAND0 (0x70100000) | ||
| 56 | #define S3C64XX_PA_ONENAND0_BUF (0x20000000) | ||
| 57 | #define S3C64XX_SZ_ONENAND0_BUF (SZ_64M) | ||
| 58 | |||
| 59 | /* NAND and OneNAND1 controllers occupy the same register region | ||
| 60 | (depending on SoC POP version) */ | ||
| 61 | #define S3C64XX_PA_ONENAND1 (0x70200000) | ||
| 62 | #define S3C64XX_PA_ONENAND1_BUF (0x28000000) | ||
| 63 | #define S3C64XX_SZ_ONENAND1_BUF (SZ_64M) | ||
| 64 | |||
| 55 | #define S3C64XX_PA_NAND (0x70200000) | 65 | #define S3C64XX_PA_NAND (0x70200000) |
| 56 | #define S3C64XX_PA_FB (0x77100000) | 66 | #define S3C64XX_PA_FB (0x77100000) |
| 57 | #define S3C64XX_PA_USB_HSOTG (0x7C000000) | 67 | #define S3C64XX_PA_USB_HSOTG (0x7C000000) |
| @@ -99,11 +109,15 @@ | |||
| 99 | #define S3C_PA_IIC S3C64XX_PA_IIC0 | 109 | #define S3C_PA_IIC S3C64XX_PA_IIC0 |
| 100 | #define S3C_PA_IIC1 S3C64XX_PA_IIC1 | 110 | #define S3C_PA_IIC1 S3C64XX_PA_IIC1 |
| 101 | #define S3C_PA_NAND S3C64XX_PA_NAND | 111 | #define S3C_PA_NAND S3C64XX_PA_NAND |
| 112 | #define S3C_PA_ONENAND S3C64XX_PA_ONENAND0 | ||
| 113 | #define S3C_PA_ONENAND_BUF S3C64XX_PA_ONENAND0_BUF | ||
| 114 | #define S3C_SZ_ONENAND_BUF S3C64XX_SZ_ONENAND0_BUF | ||
| 102 | #define S3C_PA_FB S3C64XX_PA_FB | 115 | #define S3C_PA_FB S3C64XX_PA_FB |
| 103 | #define S3C_PA_USBHOST S3C64XX_PA_USBHOST | 116 | #define S3C_PA_USBHOST S3C64XX_PA_USBHOST |
| 104 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG | 117 | #define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG |
| 105 | #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY | 118 | #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY |
| 106 | #define S3C_PA_RTC S3C64XX_PA_RTC | 119 | #define S3C_PA_RTC S3C64XX_PA_RTC |
| 120 | #define S3C_PA_WDT S3C64XX_PA_WATCHDOG | ||
| 107 | 121 | ||
| 108 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC | 122 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC |
| 109 | 123 | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c new file mode 100644 index 000000000000..028d080dcd35 --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-smartq.c | |||
| @@ -0,0 +1,363 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/mach-smartq.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/delay.h> | ||
| 13 | #include <linux/fb.h> | ||
| 14 | #include <linux/gpio.h> | ||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/pwm_backlight.h> | ||
| 18 | #include <linux/serial_core.h> | ||
| 19 | #include <linux/usb/gpio_vbus.h> | ||
| 20 | |||
| 21 | #include <asm/mach-types.h> | ||
| 22 | #include <asm/mach/map.h> | ||
| 23 | |||
| 24 | #include <mach/map.h> | ||
| 25 | #include <mach/regs-gpio.h> | ||
| 26 | #include <mach/regs-modem.h> | ||
| 27 | |||
| 28 | #include <plat/clock.h> | ||
| 29 | #include <plat/cpu.h> | ||
| 30 | #include <plat/devs.h> | ||
| 31 | #include <plat/iic.h> | ||
| 32 | #include <plat/gpio-cfg.h> | ||
| 33 | #include <plat/hwmon.h> | ||
| 34 | #include <plat/regs-serial.h> | ||
| 35 | #include <plat/udc-hs.h> | ||
| 36 | #include <plat/usb-control.h> | ||
| 37 | #include <plat/sdhci.h> | ||
| 38 | #include <plat/ts.h> | ||
| 39 | |||
| 40 | #include <video/platform_lcd.h> | ||
| 41 | |||
| 42 | #define UCON S3C2410_UCON_DEFAULT | ||
| 43 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) | ||
| 44 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | ||
| 45 | |||
| 46 | static struct s3c2410_uartcfg smartq_uartcfgs[] __initdata = { | ||
| 47 | [0] = { | ||
| 48 | .hwport = 0, | ||
| 49 | .flags = 0, | ||
| 50 | .ucon = UCON, | ||
| 51 | .ulcon = ULCON, | ||
| 52 | .ufcon = UFCON, | ||
| 53 | }, | ||
| 54 | [1] = { | ||
| 55 | .hwport = 1, | ||
| 56 | .flags = 0, | ||
| 57 | .ucon = UCON, | ||
| 58 | .ulcon = ULCON, | ||
| 59 | .ufcon = UFCON, | ||
| 60 | }, | ||
| 61 | [2] = { | ||
| 62 | .hwport = 2, | ||
| 63 | .flags = 0, | ||
| 64 | .ucon = UCON, | ||
| 65 | .ulcon = ULCON, | ||
| 66 | .ufcon = UFCON, | ||
| 67 | }, | ||
| 68 | }; | ||
| 69 | |||
| 70 | static void smartq_usb_host_powercontrol(int port, int to) | ||
| 71 | { | ||
| 72 | pr_debug("%s(%d, %d)\n", __func__, port, to); | ||
| 73 | |||
| 74 | if (port == 0) { | ||
| 75 | gpio_set_value(S3C64XX_GPL(0), to); | ||
| 76 | gpio_set_value(S3C64XX_GPL(1), to); | ||
| 77 | } | ||
| 78 | } | ||
| 79 | |||
| 80 | static irqreturn_t smartq_usb_host_ocirq(int irq, void *pw) | ||
| 81 | { | ||
| 82 | struct s3c2410_hcd_info *info = pw; | ||
| 83 | |||
| 84 | if (gpio_get_value(S3C64XX_GPL(10)) == 0) { | ||
| 85 | pr_debug("%s: over-current irq (oc detected)\n", __func__); | ||
| 86 | s3c2410_usb_report_oc(info, 3); | ||
| 87 | } else { | ||
| 88 | pr_debug("%s: over-current irq (oc cleared)\n", __func__); | ||
| 89 | s3c2410_usb_report_oc(info, 0); | ||
| 90 | } | ||
| 91 | |||
| 92 | return IRQ_HANDLED; | ||
| 93 | } | ||
| 94 | |||
| 95 | static void smartq_usb_host_enableoc(struct s3c2410_hcd_info *info, int on) | ||
| 96 | { | ||
| 97 | int ret; | ||
| 98 | |||
| 99 | /* This isn't present on a SmartQ 5 board */ | ||
| 100 | if (machine_is_smartq5()) | ||
| 101 | return; | ||
| 102 | |||
| 103 | if (on) { | ||
| 104 | ret = request_irq(gpio_to_irq(S3C64XX_GPL(10)), | ||
| 105 | smartq_usb_host_ocirq, IRQF_DISABLED | | ||
| 106 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
| 107 | "USB host overcurrent", info); | ||
| 108 | if (ret != 0) | ||
| 109 | pr_err("failed to request usb oc irq: %d\n", ret); | ||
| 110 | } else { | ||
| 111 | free_irq(gpio_to_irq(S3C64XX_GPL(10)), info); | ||
| 112 | } | ||
| 113 | } | ||
| 114 | |||
| 115 | static struct s3c2410_hcd_info smartq_usb_host_info = { | ||
| 116 | .port[0] = { | ||
| 117 | .flags = S3C_HCDFLG_USED | ||
| 118 | }, | ||
| 119 | .port[1] = { | ||
| 120 | .flags = 0 | ||
| 121 | }, | ||
| 122 | |||
| 123 | .power_control = smartq_usb_host_powercontrol, | ||
| 124 | .enable_oc = smartq_usb_host_enableoc, | ||
| 125 | }; | ||
| 126 | |||
| 127 | static struct gpio_vbus_mach_info smartq_usb_otg_vbus_pdata = { | ||
| 128 | .gpio_vbus = S3C64XX_GPL(9), | ||
| 129 | .gpio_pullup = -1, | ||
| 130 | .gpio_vbus_inverted = true, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static struct platform_device smartq_usb_otg_vbus_dev = { | ||
| 134 | .name = "gpio-vbus", | ||
| 135 | .dev.platform_data = &smartq_usb_otg_vbus_pdata, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static int __init smartq_bl_init(struct device *dev) | ||
| 139 | { | ||
| 140 | s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2)); | ||
| 141 | |||
| 142 | return 0; | ||
| 143 | } | ||
| 144 | |||
| 145 | static struct platform_pwm_backlight_data smartq_backlight_data = { | ||
| 146 | .pwm_id = 1, | ||
| 147 | .max_brightness = 1000, | ||
| 148 | .dft_brightness = 600, | ||
| 149 | .pwm_period_ns = 1000000000 / (1000 * 20), | ||
| 150 | .init = smartq_bl_init, | ||
| 151 | }; | ||
| 152 | |||
| 153 | static struct platform_device smartq_backlight_device = { | ||
| 154 | .name = "pwm-backlight", | ||
| 155 | .dev = { | ||
| 156 | .parent = &s3c_device_timer[1].dev, | ||
| 157 | .platform_data = &smartq_backlight_data, | ||
| 158 | }, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct s3c2410_ts_mach_info smartq_touchscreen_pdata __initdata = { | ||
| 162 | .delay = 65535, | ||
| 163 | .presc = 99, | ||
| 164 | .oversampling_shift = 4, | ||
| 165 | }; | ||
| 166 | |||
| 167 | static struct s3c_sdhci_platdata smartq_internal_hsmmc_pdata = { | ||
| 168 | .max_width = 4, | ||
| 169 | /*.broken_card_detection = true,*/ | ||
| 170 | }; | ||
| 171 | |||
| 172 | static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = { | ||
| 173 | /* Battery voltage (?-4.2V) */ | ||
| 174 | .in[0] = &(struct s3c_hwmon_chcfg) { | ||
| 175 | .name = "smartq:battery-voltage", | ||
| 176 | .mult = 3300, | ||
| 177 | .div = 2048, | ||
| 178 | }, | ||
| 179 | /* Reference voltage (1.2V) */ | ||
| 180 | .in[1] = &(struct s3c_hwmon_chcfg) { | ||
| 181 | .name = "smartq:reference-voltage", | ||
| 182 | .mult = 3300, | ||
| 183 | .div = 4096, | ||
| 184 | }, | ||
| 185 | }; | ||
| 186 | |||
| 187 | static void smartq_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) | ||
| 188 | { | ||
| 189 | gpio_direction_output(S3C64XX_GPM(3), power); | ||
| 190 | } | ||
| 191 | |||
| 192 | static struct plat_lcd_data smartq_lcd_power_data = { | ||
| 193 | .set_power = smartq_lcd_power_set, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static struct platform_device smartq_lcd_power_device = { | ||
| 197 | .name = "platform-lcd", | ||
| 198 | .dev.parent = &s3c_device_fb.dev, | ||
| 199 | .dev.platform_data = &smartq_lcd_power_data, | ||
| 200 | }; | ||
| 201 | |||
| 202 | |||
| 203 | static struct platform_device *smartq_devices[] __initdata = { | ||
| 204 | &s3c_device_hsmmc1, /* Init iNAND first, ... */ | ||
| 205 | &s3c_device_hsmmc0, /* ... then the external SD card */ | ||
| 206 | &s3c_device_hsmmc2, | ||
| 207 | &s3c_device_adc, | ||
| 208 | &s3c_device_fb, | ||
| 209 | &s3c_device_hwmon, | ||
| 210 | &s3c_device_i2c0, | ||
| 211 | &s3c_device_ohci, | ||
| 212 | &s3c_device_rtc, | ||
| 213 | &s3c_device_timer[1], | ||
| 214 | &s3c_device_ts, | ||
| 215 | &s3c_device_usb_hsotg, | ||
| 216 | &smartq_backlight_device, | ||
| 217 | &smartq_lcd_power_device, | ||
| 218 | &smartq_usb_otg_vbus_dev, | ||
| 219 | }; | ||
| 220 | |||
| 221 | static void __init smartq_lcd_mode_set(void) | ||
| 222 | { | ||
| 223 | u32 tmp; | ||
| 224 | |||
| 225 | /* set the LCD type */ | ||
| 226 | tmp = __raw_readl(S3C64XX_SPCON); | ||
| 227 | tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; | ||
| 228 | tmp |= S3C64XX_SPCON_LCD_SEL_RGB; | ||
| 229 | __raw_writel(tmp, S3C64XX_SPCON); | ||
| 230 | |||
| 231 | /* remove the LCD bypass */ | ||
| 232 | tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); | ||
| 233 | tmp &= ~MIFPCON_LCD_BYPASS; | ||
| 234 | __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); | ||
| 235 | } | ||
| 236 | |||
| 237 | static void smartq_power_off(void) | ||
| 238 | { | ||
| 239 | gpio_direction_output(S3C64XX_GPK(15), 1); | ||
| 240 | } | ||
| 241 | |||
| 242 | static int __init smartq_power_off_init(void) | ||
| 243 | { | ||
| 244 | int ret; | ||
| 245 | |||
| 246 | ret = gpio_request(S3C64XX_GPK(15), "Power control"); | ||
| 247 | if (ret < 0) { | ||
| 248 | pr_err("%s: failed to get GPK15\n", __func__); | ||
| 249 | return ret; | ||
| 250 | } | ||
| 251 | |||
| 252 | /* leave power on */ | ||
| 253 | gpio_direction_output(S3C64XX_GPK(15), 0); | ||
| 254 | |||
| 255 | |||
| 256 | pm_power_off = smartq_power_off; | ||
| 257 | |||
| 258 | return ret; | ||
| 259 | } | ||
| 260 | |||
| 261 | static int __init smartq_usb_host_init(void) | ||
| 262 | { | ||
| 263 | int ret; | ||
| 264 | |||
| 265 | ret = gpio_request(S3C64XX_GPL(0), "USB power control"); | ||
| 266 | if (ret < 0) { | ||
| 267 | pr_err("%s: failed to get GPL0\n", __func__); | ||
| 268 | return ret; | ||
| 269 | } | ||
| 270 | |||
| 271 | ret = gpio_request(S3C64XX_GPL(1), "USB host power control"); | ||
| 272 | if (ret < 0) { | ||
| 273 | pr_err("%s: failed to get GPL1\n", __func__); | ||
| 274 | goto err; | ||
| 275 | } | ||
| 276 | |||
| 277 | if (!machine_is_smartq5()) { | ||
| 278 | /* This isn't present on a SmartQ 5 board */ | ||
| 279 | ret = gpio_request(S3C64XX_GPL(10), "USB host overcurrent"); | ||
| 280 | if (ret < 0) { | ||
| 281 | pr_err("%s: failed to get GPL10\n", __func__); | ||
| 282 | goto err2; | ||
| 283 | } | ||
| 284 | } | ||
| 285 | |||
| 286 | /* turn power off */ | ||
| 287 | gpio_direction_output(S3C64XX_GPL(0), 0); | ||
| 288 | gpio_direction_output(S3C64XX_GPL(1), 0); | ||
| 289 | if (!machine_is_smartq5()) | ||
| 290 | gpio_direction_input(S3C64XX_GPL(10)); | ||
| 291 | |||
| 292 | s3c_device_ohci.dev.platform_data = &smartq_usb_host_info; | ||
| 293 | |||
| 294 | return 0; | ||
| 295 | |||
| 296 | err2: | ||
| 297 | gpio_free(S3C64XX_GPL(1)); | ||
| 298 | err: | ||
| 299 | gpio_free(S3C64XX_GPL(0)); | ||
| 300 | return ret; | ||
| 301 | } | ||
| 302 | |||
| 303 | static int __init smartq_usb_otg_init(void) | ||
| 304 | { | ||
| 305 | clk_xusbxti.rate = 12000000; | ||
| 306 | |||
| 307 | return 0; | ||
| 308 | } | ||
| 309 | |||
| 310 | static int __init smartq_wifi_init(void) | ||
| 311 | { | ||
| 312 | int ret; | ||
| 313 | |||
| 314 | ret = gpio_request(S3C64XX_GPK(1), "wifi control"); | ||
| 315 | if (ret < 0) { | ||
| 316 | pr_err("%s: failed to get GPK1\n", __func__); | ||
| 317 | return ret; | ||
| 318 | } | ||
| 319 | |||
| 320 | ret = gpio_request(S3C64XX_GPK(2), "wifi reset"); | ||
| 321 | if (ret < 0) { | ||
| 322 | pr_err("%s: failed to get GPK2\n", __func__); | ||
| 323 | gpio_free(S3C64XX_GPK(1)); | ||
| 324 | return ret; | ||
| 325 | } | ||
| 326 | |||
| 327 | /* turn power on */ | ||
| 328 | gpio_direction_output(S3C64XX_GPK(1), 1); | ||
| 329 | |||
| 330 | /* reset device */ | ||
| 331 | gpio_direction_output(S3C64XX_GPK(2), 0); | ||
| 332 | mdelay(100); | ||
| 333 | gpio_set_value(S3C64XX_GPK(2), 1); | ||
| 334 | gpio_direction_input(S3C64XX_GPK(2)); | ||
| 335 | |||
| 336 | return 0; | ||
| 337 | } | ||
| 338 | |||
| 339 | static struct map_desc smartq_iodesc[] __initdata = {}; | ||
| 340 | void __init smartq_map_io(void) | ||
| 341 | { | ||
| 342 | s3c64xx_init_io(smartq_iodesc, ARRAY_SIZE(smartq_iodesc)); | ||
| 343 | s3c24xx_init_clocks(12000000); | ||
| 344 | s3c24xx_init_uarts(smartq_uartcfgs, ARRAY_SIZE(smartq_uartcfgs)); | ||
| 345 | |||
| 346 | smartq_lcd_mode_set(); | ||
| 347 | } | ||
| 348 | |||
| 349 | void __init smartq_machine_init(void) | ||
| 350 | { | ||
| 351 | s3c_i2c0_set_platdata(NULL); | ||
| 352 | s3c_hwmon_set_platdata(&smartq_hwmon_pdata); | ||
| 353 | s3c_sdhci1_set_platdata(&smartq_internal_hsmmc_pdata); | ||
| 354 | s3c_sdhci2_set_platdata(&smartq_internal_hsmmc_pdata); | ||
| 355 | s3c24xx_ts_set_platdata(&smartq_touchscreen_pdata); | ||
| 356 | |||
| 357 | WARN_ON(smartq_power_off_init()); | ||
| 358 | WARN_ON(smartq_usb_host_init()); | ||
| 359 | WARN_ON(smartq_usb_otg_init()); | ||
| 360 | WARN_ON(smartq_wifi_init()); | ||
| 361 | |||
| 362 | platform_add_devices(smartq_devices, ARRAY_SIZE(smartq_devices)); | ||
| 363 | } | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.h b/arch/arm/mach-s3c64xx/mach-smartq.h new file mode 100644 index 000000000000..8e8b693db3af --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-smartq.h | |||
| @@ -0,0 +1,20 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/mach-smartq.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef __MACH_SMARTQ_H | ||
| 13 | #define __MACH_SMARTQ_H __FILE__ | ||
| 14 | |||
| 15 | #include <linux/init.h> | ||
| 16 | |||
| 17 | extern void __init smartq_map_io(void); | ||
| 18 | extern void __init smartq_machine_init(void); | ||
| 19 | |||
| 20 | #endif /* __MACH_SMARTQ_H */ | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c new file mode 100644 index 000000000000..1d0326ead90f --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c | |||
| @@ -0,0 +1,185 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/mach-smartq5.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/fb.h> | ||
| 13 | #include <linux/gpio.h> | ||
| 14 | #include <linux/gpio_keys.h> | ||
| 15 | #include <linux/i2c-gpio.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/input.h> | ||
| 18 | #include <linux/leds.h> | ||
| 19 | #include <linux/platform_device.h> | ||
| 20 | |||
| 21 | #include <asm/mach-types.h> | ||
| 22 | #include <asm/mach/arch.h> | ||
| 23 | |||
| 24 | #include <mach/map.h> | ||
| 25 | #include <mach/regs-fb.h> | ||
| 26 | #include <mach/regs-gpio.h> | ||
| 27 | #include <mach/s3c6410.h> | ||
| 28 | |||
| 29 | #include <plat/cpu.h> | ||
| 30 | #include <plat/devs.h> | ||
| 31 | #include <plat/fb.h> | ||
| 32 | #include <plat/gpio-cfg.h> | ||
| 33 | |||
| 34 | #include "mach-smartq.h" | ||
| 35 | |||
| 36 | static void __init smartq5_lcd_setup_gpio(void) | ||
| 37 | { | ||
| 38 | gpio_request(S3C64XX_GPM(0), "LCD SCEN pin"); | ||
| 39 | gpio_request(S3C64XX_GPM(1), "LCD SCL pin"); | ||
| 40 | gpio_request(S3C64XX_GPM(2), "LCD SDA pin"); | ||
| 41 | gpio_request(S3C64XX_GPM(3), "LCD power"); | ||
| 42 | |||
| 43 | /* turn power off */ | ||
| 44 | gpio_direction_output(S3C64XX_GPM(0), 1); | ||
| 45 | gpio_direction_input(S3C64XX_GPM(1)); | ||
| 46 | gpio_direction_input(S3C64XX_GPM(2)); | ||
| 47 | gpio_direction_output(S3C64XX_GPM(3), 0); | ||
| 48 | } | ||
| 49 | |||
| 50 | static struct i2c_gpio_platform_data smartq5_lcd_control = { | ||
| 51 | .sda_pin = S3C64XX_GPM(2), | ||
| 52 | .scl_pin = S3C64XX_GPM(1), | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct platform_device smartq5_lcd_control_device = { | ||
| 56 | .name = "i2c-gpio", | ||
| 57 | .id = 1, | ||
| 58 | .dev.platform_data = &smartq5_lcd_control, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct gpio_led smartq5_leds[] __initdata = { | ||
| 62 | { | ||
| 63 | .name = "smartq5:green", | ||
| 64 | .active_low = 1, | ||
| 65 | .gpio = S3C64XX_GPN(8), | ||
| 66 | }, | ||
| 67 | { | ||
| 68 | .name = "smartq5:red", | ||
| 69 | .active_low = 1, | ||
| 70 | .gpio = S3C64XX_GPN(9), | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct gpio_led_platform_data smartq5_led_data = { | ||
| 75 | .num_leds = ARRAY_SIZE(smartq5_leds), | ||
| 76 | .leds = smartq5_leds, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct platform_device smartq5_leds_device = { | ||
| 80 | .name = "leds-gpio", | ||
| 81 | .id = -1, | ||
| 82 | .dev.platform_data = &smartq5_led_data, | ||
| 83 | }; | ||
| 84 | |||
| 85 | /* Labels according to the SmartQ manual */ | ||
| 86 | static struct gpio_keys_button smartq5_buttons[] = { | ||
| 87 | { | ||
| 88 | .gpio = S3C64XX_GPL(14), | ||
| 89 | .code = KEY_POWER, | ||
| 90 | .desc = "Power", | ||
| 91 | .active_low = 1, | ||
| 92 | .debounce_interval = 5, | ||
| 93 | .type = EV_KEY, | ||
| 94 | }, | ||
| 95 | { | ||
| 96 | .gpio = S3C64XX_GPN(2), | ||
| 97 | .code = KEY_KPMINUS, | ||
| 98 | .desc = "Minus", | ||
| 99 | .active_low = 1, | ||
| 100 | .debounce_interval = 5, | ||
| 101 | .type = EV_KEY, | ||
| 102 | }, | ||
| 103 | { | ||
| 104 | .gpio = S3C64XX_GPN(12), | ||
| 105 | .code = KEY_KPPLUS, | ||
| 106 | .desc = "Plus", | ||
| 107 | .active_low = 1, | ||
| 108 | .debounce_interval = 5, | ||
| 109 | .type = EV_KEY, | ||
| 110 | }, | ||
| 111 | { | ||
| 112 | .gpio = S3C64XX_GPN(15), | ||
| 113 | .code = KEY_ENTER, | ||
| 114 | .desc = "Move", | ||
| 115 | .active_low = 1, | ||
| 116 | .debounce_interval = 5, | ||
| 117 | .type = EV_KEY, | ||
| 118 | }, | ||
| 119 | }; | ||
| 120 | |||
| 121 | static struct gpio_keys_platform_data smartq5_buttons_data = { | ||
| 122 | .buttons = smartq5_buttons, | ||
| 123 | .nbuttons = ARRAY_SIZE(smartq5_buttons), | ||
| 124 | }; | ||
| 125 | |||
| 126 | static struct platform_device smartq5_buttons_device = { | ||
| 127 | .name = "gpio-keys", | ||
| 128 | .id = 0, | ||
| 129 | .num_resources = 0, | ||
| 130 | .dev = { | ||
| 131 | .platform_data = &smartq5_buttons_data, | ||
| 132 | } | ||
| 133 | }; | ||
| 134 | |||
| 135 | static struct s3c_fb_pd_win smartq5_fb_win0 = { | ||
| 136 | .win_mode = { | ||
| 137 | .pixclock = 1000000000000ULL / | ||
| 138 | ((40+1+216+800)*(10+1+35+480)*80), | ||
| 139 | .left_margin = 40, | ||
| 140 | .right_margin = 216, | ||
| 141 | .upper_margin = 10, | ||
| 142 | .lower_margin = 35, | ||
| 143 | .hsync_len = 1, | ||
| 144 | .vsync_len = 1, | ||
| 145 | .xres = 800, | ||
| 146 | .yres = 480, | ||
| 147 | }, | ||
| 148 | .max_bpp = 32, | ||
| 149 | .default_bpp = 16, | ||
| 150 | }; | ||
| 151 | |||
| 152 | static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = { | ||
| 153 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, | ||
| 154 | .win[0] = &smartq5_fb_win0, | ||
| 155 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
| 156 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | ||
| 157 | VIDCON1_INV_VDEN, | ||
| 158 | }; | ||
| 159 | |||
| 160 | static struct platform_device *smartq5_devices[] __initdata = { | ||
| 161 | &smartq5_leds_device, | ||
| 162 | &smartq5_buttons_device, | ||
| 163 | &smartq5_lcd_control_device, | ||
| 164 | }; | ||
| 165 | |||
| 166 | static void __init smartq5_machine_init(void) | ||
| 167 | { | ||
| 168 | s3c_fb_set_platdata(&smartq5_lcd_pdata); | ||
| 169 | |||
| 170 | smartq_machine_init(); | ||
| 171 | smartq5_lcd_setup_gpio(); | ||
| 172 | |||
| 173 | platform_add_devices(smartq5_devices, ARRAY_SIZE(smartq5_devices)); | ||
| 174 | } | ||
| 175 | |||
| 176 | MACHINE_START(SMARTQ5, "SmartQ 5") | ||
| 177 | /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ | ||
| 178 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
| 179 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
| 180 | .boot_params = S3C64XX_PA_SDRAM + 0x100, | ||
| 181 | .init_irq = s3c6410_init_irq, | ||
| 182 | .map_io = smartq_map_io, | ||
| 183 | .init_machine = smartq5_machine_init, | ||
| 184 | .timer = &s3c24xx_timer, | ||
| 185 | MACHINE_END | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c new file mode 100644 index 000000000000..e0bc78ecb156 --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c | |||
| @@ -0,0 +1,201 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s3c64xx/mach-smartq7.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Maurus Cuelenaere | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/fb.h> | ||
| 13 | #include <linux/gpio.h> | ||
| 14 | #include <linux/gpio_keys.h> | ||
| 15 | #include <linux/i2c-gpio.h> | ||
| 16 | #include <linux/init.h> | ||
| 17 | #include <linux/input.h> | ||
| 18 | #include <linux/leds.h> | ||
| 19 | #include <linux/platform_device.h> | ||
| 20 | |||
| 21 | #include <asm/mach-types.h> | ||
| 22 | #include <asm/mach/arch.h> | ||
| 23 | |||
| 24 | #include <mach/map.h> | ||
| 25 | #include <mach/regs-fb.h> | ||
| 26 | #include <mach/regs-gpio.h> | ||
| 27 | #include <mach/s3c6410.h> | ||
| 28 | |||
| 29 | #include <plat/cpu.h> | ||
| 30 | #include <plat/devs.h> | ||
| 31 | #include <plat/fb.h> | ||
| 32 | #include <plat/gpio-cfg.h> | ||
| 33 | |||
| 34 | #include "mach-smartq.h" | ||
| 35 | |||
| 36 | static void __init smartq7_lcd_setup_gpio(void) | ||
| 37 | { | ||
| 38 | gpio_request(S3C64XX_GPM(0), "LCD CSB pin"); | ||
| 39 | gpio_request(S3C64XX_GPM(3), "LCD power"); | ||
| 40 | gpio_request(S3C64XX_GPM(4), "LCD power status"); | ||
| 41 | |||
| 42 | /* turn power off */ | ||
| 43 | gpio_direction_output(S3C64XX_GPM(0), 1); | ||
| 44 | gpio_direction_output(S3C64XX_GPM(3), 0); | ||
| 45 | gpio_direction_input(S3C64XX_GPM(4)); | ||
| 46 | } | ||
| 47 | |||
| 48 | static struct i2c_gpio_platform_data smartq7_lcd_control = { | ||
| 49 | .sda_pin = S3C64XX_GPM(2), | ||
| 50 | .scl_pin = S3C64XX_GPM(1), | ||
| 51 | .sda_is_open_drain = 1, | ||
| 52 | .scl_is_open_drain = 1, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct platform_device smartq7_lcd_control_device = { | ||
| 56 | .name = "i2c-gpio", | ||
| 57 | .id = 1, | ||
| 58 | .dev.platform_data = &smartq7_lcd_control, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct gpio_led smartq7_leds[] __initdata = { | ||
| 62 | { | ||
| 63 | .name = "smartq7:red", | ||
| 64 | .active_low = 1, | ||
| 65 | .gpio = S3C64XX_GPN(8), | ||
| 66 | }, | ||
| 67 | { | ||
| 68 | .name = "smartq7:green", | ||
| 69 | .active_low = 1, | ||
| 70 | .gpio = S3C64XX_GPN(9), | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct gpio_led_platform_data smartq7_led_data = { | ||
| 75 | .num_leds = ARRAY_SIZE(smartq7_leds), | ||
| 76 | .leds = smartq7_leds, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct platform_device smartq7_leds_device = { | ||
| 80 | .name = "leds-gpio", | ||
| 81 | .id = -1, | ||
| 82 | .dev.platform_data = &smartq7_led_data, | ||
| 83 | }; | ||
| 84 | |||
| 85 | /* Labels according to the SmartQ manual */ | ||
| 86 | static struct gpio_keys_button smartq7_buttons[] = { | ||
| 87 | { | ||
| 88 | .gpio = S3C64XX_GPL(14), | ||
| 89 | .code = KEY_POWER, | ||
| 90 | .desc = "Power", | ||
| 91 | .active_low = 1, | ||
| 92 | .debounce_interval = 5, | ||
| 93 | .type = EV_KEY, | ||
| 94 | }, | ||
| 95 | { | ||
| 96 | .gpio = S3C64XX_GPN(2), | ||
| 97 | .code = KEY_FN, | ||
| 98 | .desc = "Function", | ||
| 99 | .active_low = 1, | ||
| 100 | .debounce_interval = 5, | ||
| 101 | .type = EV_KEY, | ||
| 102 | }, | ||
| 103 | { | ||
| 104 | .gpio = S3C64XX_GPN(3), | ||
| 105 | .code = KEY_KPMINUS, | ||
| 106 | .desc = "Minus", | ||
| 107 | .active_low = 1, | ||
| 108 | .debounce_interval = 5, | ||
| 109 | .type = EV_KEY, | ||
| 110 | }, | ||
| 111 | { | ||
| 112 | .gpio = S3C64XX_GPN(4), | ||
| 113 | .code = KEY_KPPLUS, | ||
| 114 | .desc = "Plus", | ||
| 115 | .active_low = 1, | ||
| 116 | .debounce_interval = 5, | ||
| 117 | .type = EV_KEY, | ||
| 118 | }, | ||
| 119 | { | ||
| 120 | .gpio = S3C64XX_GPN(12), | ||
| 121 | .code = KEY_ENTER, | ||
| 122 | .desc = "Enter", | ||
| 123 | .active_low = 1, | ||
| 124 | .debounce_interval = 5, | ||
| 125 | .type = EV_KEY, | ||
| 126 | }, | ||
| 127 | { | ||
| 128 | .gpio = S3C64XX_GPN(15), | ||
| 129 | .code = KEY_ESC, | ||
| 130 | .desc = "Cancel", | ||
| 131 | .active_low = 1, | ||
| 132 | .debounce_interval = 5, | ||
| 133 | .type = EV_KEY, | ||
| 134 | }, | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct gpio_keys_platform_data smartq7_buttons_data = { | ||
| 138 | .buttons = smartq7_buttons, | ||
| 139 | .nbuttons = ARRAY_SIZE(smartq7_buttons), | ||
| 140 | }; | ||
| 141 | |||
| 142 | static struct platform_device smartq7_buttons_device = { | ||
| 143 | .name = "gpio-keys", | ||
| 144 | .id = 0, | ||
| 145 | .num_resources = 0, | ||
| 146 | .dev = { | ||
| 147 | .platform_data = &smartq7_buttons_data, | ||
| 148 | } | ||
| 149 | }; | ||
| 150 | |||
| 151 | static struct s3c_fb_pd_win smartq7_fb_win0 = { | ||
| 152 | .win_mode = { | ||
| 153 | .pixclock = 1000000000000ULL / | ||
| 154 | ((3+10+5+800)*(1+3+20+480)*80), | ||
| 155 | .left_margin = 3, | ||
| 156 | .right_margin = 5, | ||
| 157 | .upper_margin = 1, | ||
| 158 | .lower_margin = 20, | ||
| 159 | .hsync_len = 10, | ||
| 160 | .vsync_len = 3, | ||
| 161 | .xres = 800, | ||
| 162 | .yres = 480, | ||
| 163 | }, | ||
| 164 | .max_bpp = 32, | ||
| 165 | .default_bpp = 16, | ||
| 166 | }; | ||
| 167 | |||
| 168 | static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = { | ||
| 169 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, | ||
| 170 | .win[0] = &smartq7_fb_win0, | ||
| 171 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
| 172 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | ||
| 173 | VIDCON1_INV_VCLK, | ||
| 174 | }; | ||
| 175 | |||
| 176 | static struct platform_device *smartq7_devices[] __initdata = { | ||
| 177 | &smartq7_leds_device, | ||
| 178 | &smartq7_buttons_device, | ||
| 179 | &smartq7_lcd_control_device, | ||
| 180 | }; | ||
| 181 | |||
| 182 | static void __init smartq7_machine_init(void) | ||
| 183 | { | ||
| 184 | s3c_fb_set_platdata(&smartq7_lcd_pdata); | ||
| 185 | |||
| 186 | smartq_machine_init(); | ||
| 187 | smartq7_lcd_setup_gpio(); | ||
| 188 | |||
| 189 | platform_add_devices(smartq7_devices, ARRAY_SIZE(smartq7_devices)); | ||
| 190 | } | ||
| 191 | |||
| 192 | MACHINE_START(SMARTQ7, "SmartQ 7") | ||
| 193 | /* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */ | ||
| 194 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
| 195 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
| 196 | .boot_params = S3C64XX_PA_SDRAM + 0x100, | ||
| 197 | .init_irq = s3c6410_init_irq, | ||
| 198 | .map_io = smartq_map_io, | ||
| 199 | .init_machine = smartq7_machine_init, | ||
| 200 | .timer = &s3c24xx_timer, | ||
| 201 | MACHINE_END | ||
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 9d51455feb31..d9a03555f88b 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
| @@ -64,6 +64,8 @@ | |||
| 64 | #include <plat/clock.h> | 64 | #include <plat/clock.h> |
| 65 | #include <plat/devs.h> | 65 | #include <plat/devs.h> |
| 66 | #include <plat/cpu.h> | 66 | #include <plat/cpu.h> |
| 67 | #include <plat/adc.h> | ||
| 68 | #include <plat/ts.h> | ||
| 67 | 69 | ||
| 68 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | 70 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
| 69 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 71 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
| @@ -262,6 +264,9 @@ static struct platform_device *smdk6410_devices[] __initdata = { | |||
| 262 | &smdk6410_lcd_powerdev, | 264 | &smdk6410_lcd_powerdev, |
| 263 | 265 | ||
| 264 | &smdk6410_smsc911x, | 266 | &smdk6410_smsc911x, |
| 267 | &s3c_device_adc, | ||
| 268 | &s3c_device_ts, | ||
| 269 | &s3c_device_wdt, | ||
| 265 | }; | 270 | }; |
| 266 | 271 | ||
| 267 | #ifdef CONFIG_REGULATOR | 272 | #ifdef CONFIG_REGULATOR |
| @@ -596,6 +601,12 @@ static struct i2c_board_info i2c_devs1[] __initdata = { | |||
| 596 | { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ | 601 | { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ |
| 597 | }; | 602 | }; |
| 598 | 603 | ||
| 604 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | ||
| 605 | .delay = 10000, | ||
| 606 | .presc = 49, | ||
| 607 | .oversampling_shift = 2, | ||
| 608 | }; | ||
| 609 | |||
| 599 | static void __init smdk6410_map_io(void) | 610 | static void __init smdk6410_map_io(void) |
| 600 | { | 611 | { |
| 601 | u32 tmp; | 612 | u32 tmp; |
| @@ -625,6 +636,8 @@ static void __init smdk6410_machine_init(void) | |||
| 625 | s3c_i2c1_set_platdata(NULL); | 636 | s3c_i2c1_set_platdata(NULL); |
| 626 | s3c_fb_set_platdata(&smdk6410_lcd_pdata); | 637 | s3c_fb_set_platdata(&smdk6410_lcd_pdata); |
| 627 | 638 | ||
| 639 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | ||
| 640 | |||
| 628 | /* configure nCS1 width to 16 bits */ | 641 | /* configure nCS1 width to 16 bits */ |
| 629 | 642 | ||
| 630 | cs1 = __raw_readl(S3C64XX_SROM_BW) & | 643 | cs1 = __raw_readl(S3C64XX_SROM_BW) & |
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index b8ac4597fad7..79412f735a8d 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c | |||
| @@ -18,8 +18,11 @@ | |||
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | 19 | ||
| 20 | #include <mach/map.h> | 20 | #include <mach/map.h> |
| 21 | #include <mach/irqs.h> | ||
| 21 | 22 | ||
| 22 | #include <plat/pm.h> | 23 | #include <plat/pm.h> |
| 24 | #include <plat/wakeup-mask.h> | ||
| 25 | |||
| 23 | #include <mach/regs-sys.h> | 26 | #include <mach/regs-sys.h> |
| 24 | #include <mach/regs-gpio.h> | 27 | #include <mach/regs-gpio.h> |
| 25 | #include <mach/regs-clock.h> | 28 | #include <mach/regs-clock.h> |
| @@ -153,8 +156,25 @@ static void s3c64xx_cpu_suspend(void) | |||
| 153 | panic("sleep resumed to originator?"); | 156 | panic("sleep resumed to originator?"); |
| 154 | } | 157 | } |
| 155 | 158 | ||
| 159 | /* mapping of interrupts to parts of the wakeup mask */ | ||
| 160 | static struct samsung_wakeup_mask wake_irqs[] = { | ||
| 161 | { .irq = IRQ_RTC_ALARM, .bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, }, | ||
| 162 | { .irq = IRQ_RTC_TIC, .bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, }, | ||
| 163 | { .irq = IRQ_PENDN, .bit = S3C64XX_PWRCFG_TS_DISABLE, }, | ||
| 164 | { .irq = IRQ_HSMMC0, .bit = S3C64XX_PWRCFG_MMC0_DISABLE, }, | ||
| 165 | { .irq = IRQ_HSMMC1, .bit = S3C64XX_PWRCFG_MMC1_DISABLE, }, | ||
| 166 | { .irq = IRQ_HSMMC2, .bit = S3C64XX_PWRCFG_MMC2_DISABLE, }, | ||
| 167 | { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_BATF_DISABLE}, | ||
| 168 | { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE }, | ||
| 169 | { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_HSI_DISABLE }, | ||
| 170 | { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE }, | ||
| 171 | }; | ||
| 172 | |||
| 156 | static void s3c64xx_pm_prepare(void) | 173 | static void s3c64xx_pm_prepare(void) |
| 157 | { | 174 | { |
| 175 | samsung_sync_wakemask(S3C64XX_PWR_CFG, | ||
| 176 | wake_irqs, ARRAY_SIZE(wake_irqs)); | ||
| 177 | |||
| 158 | /* store address of resume. */ | 178 | /* store address of resume. */ |
| 159 | __raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0); | 179 | __raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0); |
| 160 | 180 | ||
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c index 707e34e3afd1..5e93fe3f3f40 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c64xx/s3c6400.c | |||
| @@ -37,6 +37,7 @@ | |||
| 37 | #include <plat/clock.h> | 37 | #include <plat/clock.h> |
| 38 | #include <plat/sdhci.h> | 38 | #include <plat/sdhci.h> |
| 39 | #include <plat/iic-core.h> | 39 | #include <plat/iic-core.h> |
| 40 | #include <plat/onenand-core.h> | ||
| 40 | #include <mach/s3c6400.h> | 41 | #include <mach/s3c6400.h> |
| 41 | 42 | ||
| 42 | void __init s3c6400_map_io(void) | 43 | void __init s3c6400_map_io(void) |
| @@ -51,6 +52,9 @@ void __init s3c6400_map_io(void) | |||
| 51 | s3c_i2c0_setname("s3c2440-i2c"); | 52 | s3c_i2c0_setname("s3c2440-i2c"); |
| 52 | 53 | ||
| 53 | s3c_device_nand.name = "s3c6400-nand"; | 54 | s3c_device_nand.name = "s3c6400-nand"; |
| 55 | |||
| 56 | s3c_onenand_setname("s3c6400-onenand"); | ||
| 57 | s3c64xx_onenand1_setname("s3c6400-onenand"); | ||
| 54 | } | 58 | } |
| 55 | 59 | ||
| 56 | void __init s3c6400_init_clocks(int xtal) | 60 | void __init s3c6400_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 3ab695c691ee..014401c39f36 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c | |||
| @@ -39,6 +39,7 @@ | |||
| 39 | #include <plat/sdhci.h> | 39 | #include <plat/sdhci.h> |
| 40 | #include <plat/iic-core.h> | 40 | #include <plat/iic-core.h> |
| 41 | #include <plat/adc.h> | 41 | #include <plat/adc.h> |
| 42 | #include <plat/onenand-core.h> | ||
| 42 | #include <mach/s3c6400.h> | 43 | #include <mach/s3c6400.h> |
| 43 | #include <mach/s3c6410.h> | 44 | #include <mach/s3c6410.h> |
| 44 | 45 | ||
| @@ -55,6 +56,8 @@ void __init s3c6410_map_io(void) | |||
| 55 | 56 | ||
| 56 | s3c_device_adc.name = "s3c64xx-adc"; | 57 | s3c_device_adc.name = "s3c64xx-adc"; |
| 57 | s3c_device_nand.name = "s3c6400-nand"; | 58 | s3c_device_nand.name = "s3c6400-nand"; |
| 59 | s3c_onenand_setname("s3c6410-onenand"); | ||
| 60 | s3c64xx_onenand1_setname("s3c6410-onenand"); | ||
| 58 | } | 61 | } |
| 59 | 62 | ||
| 60 | void __init s3c6410_init_clocks(int xtal) | 63 | void __init s3c6410_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig index 77aeffd17330..f066fae07c57 100644 --- a/arch/arm/mach-s5p6440/Kconfig +++ b/arch/arm/mach-s5p6440/Kconfig | |||
| @@ -16,6 +16,10 @@ config CPU_S5P6440 | |||
| 16 | config MACH_SMDK6440 | 16 | config MACH_SMDK6440 |
| 17 | bool "SMDK6440" | 17 | bool "SMDK6440" |
| 18 | select CPU_S5P6440 | 18 | select CPU_S5P6440 |
| 19 | select SAMSUNG_DEV_TS | ||
| 20 | select SAMSUNG_DEV_ADC | ||
| 21 | select S3C_DEV_WDT | ||
| 22 | select HAVE_S3C2410_WATCHDOG | ||
| 19 | help | 23 | help |
| 20 | Machine support for the Samsung SMDK6440 | 24 | Machine support for the Samsung SMDK6440 |
| 21 | 25 | ||
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile index 44facf43d59f..be3c53aab23f 100644 --- a/arch/arm/mach-s5p6440/Makefile +++ b/arch/arm/mach-s5p6440/Makefile | |||
| @@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o | |||
| 21 | 21 | ||
| 22 | # device support | 22 | # device support |
| 23 | obj-y += dev-audio.o | 23 | obj-y += dev-audio.o |
| 24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c index ca3b3206e6f8..b2fe6a58155a 100644 --- a/arch/arm/mach-s5p6440/cpu.c +++ b/arch/arm/mach-s5p6440/cpu.c | |||
| @@ -61,6 +61,7 @@ static void s5p6440_idle(void) | |||
| 61 | void __init s5p6440_map_io(void) | 61 | void __init s5p6440_map_io(void) |
| 62 | { | 62 | { |
| 63 | /* initialize any device information early */ | 63 | /* initialize any device information early */ |
| 64 | s3c_device_adc.name = "s3c64xx-adc"; | ||
| 64 | } | 65 | } |
| 65 | 66 | ||
| 66 | void __init s5p6440_init_clocks(int xtal) | 67 | void __init s5p6440_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c new file mode 100644 index 000000000000..0a30280019c0 --- /dev/null +++ b/arch/arm/mach-s5p6440/dev-spi.c | |||
| @@ -0,0 +1,176 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p6440/dev-spi.c | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <mach/dma.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <mach/irqs.h> | ||
| 17 | #include <mach/gpio.h> | ||
| 18 | #include <mach/spi-clocks.h> | ||
| 19 | |||
| 20 | #include <plat/s3c64xx-spi.h> | ||
| 21 | #include <plat/gpio-cfg.h> | ||
| 22 | |||
| 23 | static char *spi_src_clks[] = { | ||
| 24 | [S5P6440_SPI_SRCCLK_PCLK] = "pclk", | ||
| 25 | [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll", | ||
| 26 | }; | ||
| 27 | |||
| 28 | /* SPI Controller platform_devices */ | ||
| 29 | |||
| 30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
| 31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
| 32 | * be either some immediate GPIO or some signal out of some other | ||
| 33 | * chip in between ... or some yet another way. | ||
| 34 | * We simply do not assume anything about CS. | ||
| 35 | */ | ||
| 36 | static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | ||
| 37 | { | ||
| 38 | switch (pdev->id) { | ||
| 39 | case 0: | ||
| 40 | s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); | ||
| 41 | s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); | ||
| 43 | s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); | ||
| 44 | s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); | ||
| 45 | s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); | ||
| 46 | break; | ||
| 47 | |||
| 48 | case 1: | ||
| 49 | s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); | ||
| 50 | s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); | ||
| 51 | s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); | ||
| 52 | s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); | ||
| 53 | s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); | ||
| 54 | s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); | ||
| 55 | break; | ||
| 56 | |||
| 57 | default: | ||
| 58 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
| 59 | return -EINVAL; | ||
| 60 | } | ||
| 61 | |||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | static struct resource s5p6440_spi0_resource[] = { | ||
| 66 | [0] = { | ||
| 67 | .start = S5P6440_PA_SPI0, | ||
| 68 | .end = S5P6440_PA_SPI0 + 0x100 - 1, | ||
| 69 | .flags = IORESOURCE_MEM, | ||
| 70 | }, | ||
| 71 | [1] = { | ||
| 72 | .start = DMACH_SPI0_TX, | ||
| 73 | .end = DMACH_SPI0_TX, | ||
| 74 | .flags = IORESOURCE_DMA, | ||
| 75 | }, | ||
| 76 | [2] = { | ||
| 77 | .start = DMACH_SPI0_RX, | ||
| 78 | .end = DMACH_SPI0_RX, | ||
| 79 | .flags = IORESOURCE_DMA, | ||
| 80 | }, | ||
| 81 | [3] = { | ||
| 82 | .start = IRQ_SPI0, | ||
| 83 | .end = IRQ_SPI0, | ||
| 84 | .flags = IORESOURCE_IRQ, | ||
| 85 | }, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | ||
| 89 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
| 90 | .fifo_lvl_mask = 0x1ff, | ||
| 91 | .rx_lvl_offset = 15, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
| 95 | |||
| 96 | struct platform_device s5p6440_device_spi0 = { | ||
| 97 | .name = "s3c64xx-spi", | ||
| 98 | .id = 0, | ||
| 99 | .num_resources = ARRAY_SIZE(s5p6440_spi0_resource), | ||
| 100 | .resource = s5p6440_spi0_resource, | ||
| 101 | .dev = { | ||
| 102 | .dma_mask = &spi_dmamask, | ||
| 103 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 104 | .platform_data = &s5p6440_spi0_pdata, | ||
| 105 | }, | ||
| 106 | }; | ||
| 107 | |||
| 108 | static struct resource s5p6440_spi1_resource[] = { | ||
| 109 | [0] = { | ||
| 110 | .start = S5P6440_PA_SPI1, | ||
| 111 | .end = S5P6440_PA_SPI1 + 0x100 - 1, | ||
| 112 | .flags = IORESOURCE_MEM, | ||
| 113 | }, | ||
| 114 | [1] = { | ||
| 115 | .start = DMACH_SPI1_TX, | ||
| 116 | .end = DMACH_SPI1_TX, | ||
| 117 | .flags = IORESOURCE_DMA, | ||
| 118 | }, | ||
| 119 | [2] = { | ||
| 120 | .start = DMACH_SPI1_RX, | ||
| 121 | .end = DMACH_SPI1_RX, | ||
| 122 | .flags = IORESOURCE_DMA, | ||
| 123 | }, | ||
| 124 | [3] = { | ||
| 125 | .start = IRQ_SPI1, | ||
| 126 | .end = IRQ_SPI1, | ||
| 127 | .flags = IORESOURCE_IRQ, | ||
| 128 | }, | ||
| 129 | }; | ||
| 130 | |||
| 131 | static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | ||
| 132 | .cfg_gpio = s5p6440_spi_cfg_gpio, | ||
| 133 | .fifo_lvl_mask = 0x7f, | ||
| 134 | .rx_lvl_offset = 15, | ||
| 135 | }; | ||
| 136 | |||
| 137 | struct platform_device s5p6440_device_spi1 = { | ||
| 138 | .name = "s3c64xx-spi", | ||
| 139 | .id = 1, | ||
| 140 | .num_resources = ARRAY_SIZE(s5p6440_spi1_resource), | ||
| 141 | .resource = s5p6440_spi1_resource, | ||
| 142 | .dev = { | ||
| 143 | .dma_mask = &spi_dmamask, | ||
| 144 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 145 | .platform_data = &s5p6440_spi1_pdata, | ||
| 146 | }, | ||
| 147 | }; | ||
| 148 | |||
| 149 | void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
| 150 | { | ||
| 151 | struct s3c64xx_spi_info *pd; | ||
| 152 | |||
| 153 | /* Reject invalid configuration */ | ||
| 154 | if (!num_cs || src_clk_nr < 0 | ||
| 155 | || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) { | ||
| 156 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
| 157 | return; | ||
| 158 | } | ||
| 159 | |||
| 160 | switch (cntrlr) { | ||
| 161 | case 0: | ||
| 162 | pd = &s5p6440_spi0_pdata; | ||
| 163 | break; | ||
| 164 | case 1: | ||
| 165 | pd = &s5p6440_spi1_pdata; | ||
| 166 | break; | ||
| 167 | default: | ||
| 168 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
| 169 | __func__, cntrlr); | ||
| 170 | return; | ||
| 171 | } | ||
| 172 | |||
| 173 | pd->num_cs = num_cs; | ||
| 174 | pd->src_clk_nr = src_clk_nr; | ||
| 175 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
| 176 | } | ||
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c index 262dc75d5bea..92efc05b1ba2 100644 --- a/arch/arm/mach-s5p6440/gpio.c +++ b/arch/arm/mach-s5p6440/gpio.c | |||
| @@ -46,6 +46,7 @@ static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, | |||
| 46 | void __iomem *base = ourchip->base; | 46 | void __iomem *base = ourchip->base; |
| 47 | void __iomem *regcon = base; | 47 | void __iomem *regcon = base; |
| 48 | unsigned long con; | 48 | unsigned long con; |
| 49 | unsigned long flags; | ||
| 49 | 50 | ||
| 50 | switch (offset) { | 51 | switch (offset) { |
| 51 | case 6: | 52 | case 6: |
| @@ -63,10 +64,14 @@ static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip, | |||
| 63 | break; | 64 | break; |
| 64 | } | 65 | } |
| 65 | 66 | ||
| 67 | s3c_gpio_lock(ourchip, flags); | ||
| 68 | |||
| 66 | con = __raw_readl(regcon); | 69 | con = __raw_readl(regcon); |
| 67 | con &= ~(0xf << con_4bit_shift(offset)); | 70 | con &= ~(0xf << con_4bit_shift(offset)); |
| 68 | __raw_writel(con, regcon); | 71 | __raw_writel(con, regcon); |
| 69 | 72 | ||
| 73 | s3c_gpio_unlock(ourchip, flags); | ||
| 74 | |||
| 70 | return 0; | 75 | return 0; |
| 71 | } | 76 | } |
| 72 | 77 | ||
| @@ -78,6 +83,7 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, | |||
| 78 | void __iomem *regcon = base; | 83 | void __iomem *regcon = base; |
| 79 | unsigned long con; | 84 | unsigned long con; |
| 80 | unsigned long dat; | 85 | unsigned long dat; |
| 86 | unsigned long flags; | ||
| 81 | unsigned con_offset = offset; | 87 | unsigned con_offset = offset; |
| 82 | 88 | ||
| 83 | switch (con_offset) { | 89 | switch (con_offset) { |
| @@ -96,6 +102,8 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, | |||
| 96 | break; | 102 | break; |
| 97 | } | 103 | } |
| 98 | 104 | ||
| 105 | s3c_gpio_lock(ourchip, flags); | ||
| 106 | |||
| 99 | con = __raw_readl(regcon); | 107 | con = __raw_readl(regcon); |
| 100 | con &= ~(0xf << con_4bit_shift(con_offset)); | 108 | con &= ~(0xf << con_4bit_shift(con_offset)); |
| 101 | con |= 0x1 << con_4bit_shift(con_offset); | 109 | con |= 0x1 << con_4bit_shift(con_offset); |
| @@ -109,6 +117,8 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip, | |||
| 109 | __raw_writel(con, regcon); | 117 | __raw_writel(con, regcon); |
| 110 | __raw_writel(dat, base + GPIODAT_OFF); | 118 | __raw_writel(dat, base + GPIODAT_OFF); |
| 111 | 119 | ||
| 120 | s3c_gpio_unlock(ourchip, flags); | ||
| 121 | |||
| 112 | return 0; | 122 | return 0; |
| 113 | } | 123 | } |
| 114 | 124 | ||
| @@ -117,6 +127,7 @@ int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, | |||
| 117 | { | 127 | { |
| 118 | void __iomem *reg = chip->base; | 128 | void __iomem *reg = chip->base; |
| 119 | unsigned int shift; | 129 | unsigned int shift; |
| 130 | unsigned long flags; | ||
| 120 | u32 con; | 131 | u32 con; |
| 121 | 132 | ||
| 122 | switch (off) { | 133 | switch (off) { |
| @@ -142,11 +153,15 @@ int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, | |||
| 142 | cfg <<= shift; | 153 | cfg <<= shift; |
| 143 | } | 154 | } |
| 144 | 155 | ||
| 156 | s3c_gpio_lock(chip, flags); | ||
| 157 | |||
| 145 | con = __raw_readl(reg); | 158 | con = __raw_readl(reg); |
| 146 | con &= ~(0xf << shift); | 159 | con &= ~(0xf << shift); |
| 147 | con |= cfg; | 160 | con |= cfg; |
| 148 | __raw_writel(con, reg); | 161 | __raw_writel(con, reg); |
| 149 | 162 | ||
| 163 | s3c_gpio_unlock(chip, flags); | ||
| 164 | |||
| 150 | return 0; | 165 | return 0; |
| 151 | } | 166 | } |
| 152 | 167 | ||
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p6440/include/mach/irqs.h index a4b9b40d18f2..911854d9ad42 100644 --- a/arch/arm/mach-s5p6440/include/mach/irqs.h +++ b/arch/arm/mach-s5p6440/include/mach/irqs.h | |||
| @@ -72,7 +72,14 @@ | |||
| 72 | #define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6) | 72 | #define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6) |
| 73 | 73 | ||
| 74 | #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) | 74 | #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) |
| 75 | #define IRQ_EINT(x) S5P_EINT(x) | 75 | |
| 76 | #define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE) | ||
| 77 | /* | ||
| 78 | * S5P6440 has 0-15 external interrupts in group 0. Only these can be used | ||
| 79 | * to wake up from sleep. If request is beyond this range, by mistake, a large | ||
| 80 | * return value for an irq number should be indication of something amiss. | ||
| 81 | */ | ||
| 82 | #define S5P_EINT_BASE2 (0xf0000000) | ||
| 76 | 83 | ||
| 77 | /* | 84 | /* |
| 78 | * Next the external interrupt groups. These are similar to the IRQ_EINT(x) | 85 | * Next the external interrupt groups. These are similar to the IRQ_EINT(x) |
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h index 72aedadd412c..44011b91fbd1 100644 --- a/arch/arm/mach-s5p6440/include/mach/map.h +++ b/arch/arm/mach-s5p6440/include/mach/map.h | |||
| @@ -54,6 +54,9 @@ | |||
| 54 | 54 | ||
| 55 | #define S5P6440_PA_IIC0 (0xEC104000) | 55 | #define S5P6440_PA_IIC0 (0xEC104000) |
| 56 | 56 | ||
| 57 | #define S5P6440_PA_SPI0 0xEC400000 | ||
| 58 | #define S5P6440_PA_SPI1 0xEC500000 | ||
| 59 | |||
| 57 | #define S5P6440_PA_HSOTG (0xED100000) | 60 | #define S5P6440_PA_HSOTG (0xED100000) |
| 58 | 61 | ||
| 59 | #define S5P6440_PA_HSMMC0 (0xED800000) | 62 | #define S5P6440_PA_HSMMC0 (0xED800000) |
| @@ -69,8 +72,13 @@ | |||
| 69 | /* PCM */ | 72 | /* PCM */ |
| 70 | #define S5P6440_PA_PCM 0xF2100000 | 73 | #define S5P6440_PA_PCM 0xF2100000 |
| 71 | 74 | ||
| 75 | #define S5P6440_PA_ADC (0xF3000000) | ||
| 76 | |||
| 72 | /* compatibiltiy defines. */ | 77 | /* compatibiltiy defines. */ |
| 73 | #define S3C_PA_UART S5P6440_PA_UART | 78 | #define S3C_PA_UART S5P6440_PA_UART |
| 74 | #define S3C_PA_IIC S5P6440_PA_IIC0 | 79 | #define S3C_PA_IIC S5P6440_PA_IIC0 |
| 80 | #define S3C_PA_WDT S5P6440_PA_WDT | ||
| 81 | |||
| 82 | #define SAMSUNG_PA_ADC S5P6440_PA_ADC | ||
| 75 | 83 | ||
| 76 | #endif /* __ASM_ARCH_MAP_H */ | 84 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h new file mode 100644 index 000000000000..5fbca50d1cfb --- /dev/null +++ b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __S5P6440_PLAT_SPI_CLKS_H | ||
| 12 | #define __S5P6440_PLAT_SPI_CLKS_H __FILE__ | ||
| 13 | |||
| 14 | #define S5P6440_SPI_SRCCLK_PCLK 0 | ||
| 15 | #define S5P6440_SPI_SRCCLK_SCLK 1 | ||
| 16 | |||
| 17 | #endif /* __S5P6440_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c index d7fede971ca6..8291fecc701a 100644 --- a/arch/arm/mach-s5p6440/mach-smdk6440.c +++ b/arch/arm/mach-s5p6440/mach-smdk6440.c | |||
| @@ -38,6 +38,8 @@ | |||
| 38 | #include <plat/devs.h> | 38 | #include <plat/devs.h> |
| 39 | #include <plat/cpu.h> | 39 | #include <plat/cpu.h> |
| 40 | #include <plat/pll.h> | 40 | #include <plat/pll.h> |
| 41 | #include <plat/adc.h> | ||
| 42 | #include <plat/ts.h> | ||
| 41 | 43 | ||
| 42 | #define S5P6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 44 | #define S5P6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| 43 | S3C2410_UCON_RXILEVEL | \ | 45 | S3C2410_UCON_RXILEVEL | \ |
| @@ -85,6 +87,15 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { | |||
| 85 | 87 | ||
| 86 | static struct platform_device *smdk6440_devices[] __initdata = { | 88 | static struct platform_device *smdk6440_devices[] __initdata = { |
| 87 | &s5p6440_device_iis, | 89 | &s5p6440_device_iis, |
| 90 | &s3c_device_adc, | ||
| 91 | &s3c_device_ts, | ||
| 92 | &s3c_device_wdt, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | ||
| 96 | .delay = 10000, | ||
| 97 | .presc = 49, | ||
| 98 | .oversampling_shift = 2, | ||
| 88 | }; | 99 | }; |
| 89 | 100 | ||
| 90 | static void __init smdk6440_map_io(void) | 101 | static void __init smdk6440_map_io(void) |
| @@ -96,6 +107,8 @@ static void __init smdk6440_map_io(void) | |||
| 96 | 107 | ||
| 97 | static void __init smdk6440_machine_init(void) | 108 | static void __init smdk6440_machine_init(void) |
| 98 | { | 109 | { |
| 110 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | ||
| 111 | |||
| 99 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); | 112 | platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); |
| 100 | } | 113 | } |
| 101 | 114 | ||
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile index e30a7f76aee6..90a3d8373416 100644 --- a/arch/arm/mach-s5p6442/Makefile +++ b/arch/arm/mach-s5p6442/Makefile | |||
| @@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o | |||
| 21 | 21 | ||
| 22 | # device support | 22 | # device support |
| 23 | obj-y += dev-audio.o | 23 | obj-y += dev-audio.o |
| 24 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c new file mode 100644 index 000000000000..30199525daca --- /dev/null +++ b/arch/arm/mach-s5p6442/dev-spi.c | |||
| @@ -0,0 +1,123 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p6442/dev-spi.c | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <mach/dma.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <mach/irqs.h> | ||
| 17 | #include <mach/gpio.h> | ||
| 18 | #include <mach/spi-clocks.h> | ||
| 19 | |||
| 20 | #include <plat/s3c64xx-spi.h> | ||
| 21 | #include <plat/gpio-cfg.h> | ||
| 22 | |||
| 23 | static char *spi_src_clks[] = { | ||
| 24 | [S5P6442_SPI_SRCCLK_PCLK] = "pclk", | ||
| 25 | [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll", | ||
| 26 | }; | ||
| 27 | |||
| 28 | /* SPI Controller platform_devices */ | ||
| 29 | |||
| 30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
| 31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
| 32 | * be either some immediate GPIO or some signal out of some other | ||
| 33 | * chip in between ... or some yet another way. | ||
| 34 | * We simply do not assume anything about CS. | ||
| 35 | */ | ||
| 36 | static int s5p6442_spi_cfg_gpio(struct platform_device *pdev) | ||
| 37 | { | ||
| 38 | switch (pdev->id) { | ||
| 39 | case 0: | ||
| 40 | s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2)); | ||
| 41 | s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2)); | ||
| 43 | s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP); | ||
| 44 | s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP); | ||
| 45 | s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP); | ||
| 46 | break; | ||
| 47 | |||
| 48 | default: | ||
| 49 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
| 50 | return -EINVAL; | ||
| 51 | } | ||
| 52 | |||
| 53 | return 0; | ||
| 54 | } | ||
| 55 | |||
| 56 | static struct resource s5p6442_spi0_resource[] = { | ||
| 57 | [0] = { | ||
| 58 | .start = S5P6442_PA_SPI, | ||
| 59 | .end = S5P6442_PA_SPI + 0x100 - 1, | ||
| 60 | .flags = IORESOURCE_MEM, | ||
| 61 | }, | ||
| 62 | [1] = { | ||
| 63 | .start = DMACH_SPI0_TX, | ||
| 64 | .end = DMACH_SPI0_TX, | ||
| 65 | .flags = IORESOURCE_DMA, | ||
| 66 | }, | ||
| 67 | [2] = { | ||
| 68 | .start = DMACH_SPI0_RX, | ||
| 69 | .end = DMACH_SPI0_RX, | ||
| 70 | .flags = IORESOURCE_DMA, | ||
| 71 | }, | ||
| 72 | [3] = { | ||
| 73 | .start = IRQ_SPI0, | ||
| 74 | .end = IRQ_SPI0, | ||
| 75 | .flags = IORESOURCE_IRQ, | ||
| 76 | }, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct s3c64xx_spi_info s5p6442_spi0_pdata = { | ||
| 80 | .cfg_gpio = s5p6442_spi_cfg_gpio, | ||
| 81 | .fifo_lvl_mask = 0x1ff, | ||
| 82 | .rx_lvl_offset = 15, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
| 86 | |||
| 87 | struct platform_device s5p6442_device_spi = { | ||
| 88 | .name = "s3c64xx-spi", | ||
| 89 | .id = 0, | ||
| 90 | .num_resources = ARRAY_SIZE(s5p6442_spi0_resource), | ||
| 91 | .resource = s5p6442_spi0_resource, | ||
| 92 | .dev = { | ||
| 93 | .dma_mask = &spi_dmamask, | ||
| 94 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 95 | .platform_data = &s5p6442_spi0_pdata, | ||
| 96 | }, | ||
| 97 | }; | ||
| 98 | |||
| 99 | void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
| 100 | { | ||
| 101 | struct s3c64xx_spi_info *pd; | ||
| 102 | |||
| 103 | /* Reject invalid configuration */ | ||
| 104 | if (!num_cs || src_clk_nr < 0 | ||
| 105 | || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) { | ||
| 106 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
| 107 | return; | ||
| 108 | } | ||
| 109 | |||
| 110 | switch (cntrlr) { | ||
| 111 | case 0: | ||
| 112 | pd = &s5p6442_spi0_pdata; | ||
| 113 | break; | ||
| 114 | default: | ||
| 115 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
| 116 | __func__, cntrlr); | ||
| 117 | return; | ||
| 118 | } | ||
| 119 | |||
| 120 | pd->num_cs = num_cs; | ||
| 121 | pd->src_clk_nr = src_clk_nr; | ||
| 122 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
| 123 | } | ||
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h index da665809f6e4..02c23749c023 100644 --- a/arch/arm/mach-s5p6442/include/mach/irqs.h +++ b/arch/arm/mach-s5p6442/include/mach/irqs.h | |||
| @@ -77,8 +77,9 @@ | |||
| 77 | 77 | ||
| 78 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) | 78 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) |
| 79 | 79 | ||
| 80 | #define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \ | 80 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) |
| 81 | (S5P_IRQ_EINT_BASE + (x)-16)) | 81 | #define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE) |
| 82 | |||
| 82 | /* Set the default NR_IRQS */ | 83 | /* Set the default NR_IRQS */ |
| 83 | 84 | ||
| 84 | #define NR_IRQS (IRQ_EINT(31) + 1) | 85 | #define NR_IRQS (IRQ_EINT(31) + 1) |
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 7568dc0d6be0..32ca424ef7f9 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h | |||
| @@ -54,6 +54,8 @@ | |||
| 54 | #define S5P6442_PA_SDRAM (0x20000000) | 54 | #define S5P6442_PA_SDRAM (0x20000000) |
| 55 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM | 55 | #define S5P_PA_SDRAM S5P6442_PA_SDRAM |
| 56 | 56 | ||
| 57 | #define S5P6442_PA_SPI 0xEC300000 | ||
| 58 | |||
| 57 | /* I2S */ | 59 | /* I2S */ |
| 58 | #define S5P6442_PA_I2S0 0xC0B00000 | 60 | #define S5P6442_PA_I2S0 0xC0B00000 |
| 59 | #define S5P6442_PA_I2S1 0xF2200000 | 61 | #define S5P6442_PA_I2S1 0xF2200000 |
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h new file mode 100644 index 000000000000..7fd88205a97c --- /dev/null +++ b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | /* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __S5P6442_PLAT_SPI_CLKS_H | ||
| 12 | #define __S5P6442_PLAT_SPI_CLKS_H __FILE__ | ||
| 13 | |||
| 14 | #define S5P6442_SPI_SRCCLK_PCLK 0 | ||
| 15 | #define S5P6442_SPI_SRCCLK_SCLK 1 | ||
| 16 | |||
| 17 | #endif /* __S5P6442_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index 8593337784e1..b2a11dfa3399 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig | |||
| @@ -5,10 +5,13 @@ | |||
| 5 | 5 | ||
| 6 | # Configuration options for the S5PC100 CPU | 6 | # Configuration options for the S5PC100 CPU |
| 7 | 7 | ||
| 8 | if ARCH_S5PC100 | ||
| 9 | |||
| 8 | config CPU_S5PC100 | 10 | config CPU_S5PC100 |
| 9 | bool | 11 | bool |
| 10 | select CPU_S5PC100_INIT | 12 | select PLAT_S5P |
| 11 | select CPU_S5PC100_CLOCK | 13 | select S5P_EXT_INT |
| 14 | select S3C_PL330_DMA | ||
| 12 | help | 15 | help |
| 13 | Enable S5PC100 CPU support | 16 | Enable S5PC100 CPU support |
| 14 | 17 | ||
| @@ -17,17 +20,22 @@ config S5PC100_SETUP_FB_24BPP | |||
| 17 | help | 20 | help |
| 18 | Common setup code for S5PC1XX with an 24bpp RGB display helper. | 21 | Common setup code for S5PC1XX with an 24bpp RGB display helper. |
| 19 | 22 | ||
| 20 | config S5PC100_SETUP_SDHCI | ||
| 21 | bool | ||
| 22 | select S5PC1XX_SETUP_SDHCI_GPIO | ||
| 23 | help | ||
| 24 | Internal helper functions for S5PC100 based SDHCI systems | ||
| 25 | |||
| 26 | config S5PC100_SETUP_I2C1 | 23 | config S5PC100_SETUP_I2C1 |
| 27 | bool | 24 | bool |
| 28 | help | 25 | help |
| 29 | Common setup code for i2c bus 1. | 26 | Common setup code for i2c bus 1. |
| 30 | 27 | ||
| 28 | config S5PC100_SETUP_SDHCI | ||
| 29 | bool | ||
| 30 | select S5PC100_SETUP_SDHCI_GPIO | ||
| 31 | help | ||
| 32 | Internal helper functions for S5PC100 based SDHCI systems | ||
| 33 | |||
| 34 | config S5PC100_SETUP_SDHCI_GPIO | ||
| 35 | bool | ||
| 36 | help | ||
| 37 | Common setup code for SDHCI gpio. | ||
| 38 | |||
| 31 | config MACH_SMDKC100 | 39 | config MACH_SMDKC100 |
| 32 | bool "SMDKC100" | 40 | bool "SMDKC100" |
| 33 | select CPU_S5PC100 | 41 | select CPU_S5PC100 |
| @@ -41,3 +49,5 @@ config MACH_SMDKC100 | |||
| 41 | select S5PC100_SETUP_SDHCI | 49 | select S5PC100_SETUP_SDHCI |
| 42 | help | 50 | help |
| 43 | Machine support for the Samsung SMDKC100 | 51 | Machine support for the Samsung SMDKC100 |
| 52 | |||
| 53 | endif | ||
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index 373bc546eae8..543f3de5131e 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile | |||
| @@ -11,14 +11,24 @@ obj- := | |||
| 11 | 11 | ||
| 12 | # Core support for S5PC100 system | 12 | # Core support for S5PC100 system |
| 13 | 13 | ||
| 14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o gpiolib.o | 14 | obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o irq-gpio.o |
| 15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o | 15 | obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o |
| 16 | obj-$(CONFIG_CPU_S5PC100) += dma.o | ||
| 16 | 17 | ||
| 17 | # Helper and device support | 18 | # Helper and device support |
| 18 | 19 | ||
| 19 | obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o | 20 | obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o |
| 20 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o | 21 | obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o |
| 21 | obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o | 22 | obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o |
| 23 | obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
| 24 | |||
| 25 | # device support | ||
| 26 | obj-y += dev-audio.o | ||
| 27 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
| 22 | 28 | ||
| 23 | # machine support | 29 | # machine support |
| 30 | |||
| 24 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o | 31 | obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o |
| 32 | |||
| 33 | # device support | ||
| 34 | obj-y += dev-audio.o | ||
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c index d79e7574a852..7b5bdbc9a5df 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c | |||
| @@ -22,47 +22,55 @@ | |||
| 22 | #include <linux/serial_core.h> | 22 | #include <linux/serial_core.h> |
| 23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
| 24 | 24 | ||
| 25 | #include <asm/proc-fns.h> | ||
| 26 | |||
| 27 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
| 28 | #include <asm/mach/map.h> | 26 | #include <asm/mach/map.h> |
| 29 | #include <asm/mach/irq.h> | 27 | #include <asm/mach/irq.h> |
| 30 | 28 | ||
| 29 | #include <asm/proc-fns.h> | ||
| 30 | |||
| 31 | #include <mach/hardware.h> | 31 | #include <mach/hardware.h> |
| 32 | #include <mach/map.h> | 32 | #include <mach/map.h> |
| 33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
| 34 | 34 | ||
| 35 | #include <plat/cpu-freq.h> | ||
| 36 | #include <plat/regs-serial.h> | 35 | #include <plat/regs-serial.h> |
| 37 | #include <plat/regs-power.h> | 36 | #include <mach/regs-clock.h> |
| 38 | 37 | ||
| 39 | #include <plat/cpu.h> | 38 | #include <plat/cpu.h> |
| 40 | #include <plat/devs.h> | 39 | #include <plat/devs.h> |
| 41 | #include <plat/clock.h> | 40 | #include <plat/clock.h> |
| 42 | #include <plat/sdhci.h> | ||
| 43 | #include <plat/iic-core.h> | 41 | #include <plat/iic-core.h> |
| 42 | #include <plat/sdhci.h> | ||
| 43 | #include <plat/onenand-core.h> | ||
| 44 | |||
| 44 | #include <plat/s5pc100.h> | 45 | #include <plat/s5pc100.h> |
| 45 | 46 | ||
| 46 | /* Initial IO mappings */ | 47 | /* Initial IO mappings */ |
| 47 | 48 | ||
| 48 | static struct map_desc s5pc100_iodesc[] __initdata = { | 49 | static struct map_desc s5pc100_iodesc[] __initdata = { |
| 50 | { | ||
| 51 | .virtual = (unsigned long)S5P_VA_SYSTIMER, | ||
| 52 | .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), | ||
| 53 | .length = SZ_16K, | ||
| 54 | .type = MT_DEVICE, | ||
| 55 | }, { | ||
| 56 | .virtual = (unsigned long)VA_VIC2, | ||
| 57 | .pfn = __phys_to_pfn(S5P_PA_VIC2), | ||
| 58 | .length = SZ_16K, | ||
| 59 | .type = MT_DEVICE, | ||
| 60 | }, { | ||
| 61 | .virtual = (unsigned long)S5PC100_VA_OTHERS, | ||
| 62 | .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), | ||
| 63 | .length = SZ_4K, | ||
| 64 | .type = MT_DEVICE, | ||
| 65 | } | ||
| 49 | }; | 66 | }; |
| 50 | 67 | ||
| 51 | static void s5pc100_idle(void) | 68 | static void s5pc100_idle(void) |
| 52 | { | 69 | { |
| 53 | unsigned long tmp; | 70 | if (!need_resched()) |
| 54 | 71 | cpu_do_idle(); | |
| 55 | tmp = __raw_readl(S5PC100_PWR_CFG); | ||
| 56 | tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE; | ||
| 57 | tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK; | ||
| 58 | tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE; | ||
| 59 | __raw_writel(tmp, S5PC100_PWR_CFG); | ||
| 60 | |||
| 61 | tmp = __raw_readl(S5PC100_OTHERS); | ||
| 62 | tmp |= S5PC100_PMU_INT_DISABLE; | ||
| 63 | __raw_writel(tmp, S5PC100_OTHERS); | ||
| 64 | 72 | ||
| 65 | cpu_do_idle(); | 73 | local_irq_enable(); |
| 66 | } | 74 | } |
| 67 | 75 | ||
| 68 | /* s5pc100_map_io | 76 | /* s5pc100_map_io |
| @@ -82,26 +90,29 @@ void __init s5pc100_map_io(void) | |||
| 82 | /* the i2c devices are directly compatible with s3c2440 */ | 90 | /* the i2c devices are directly compatible with s3c2440 */ |
| 83 | s3c_i2c0_setname("s3c2440-i2c"); | 91 | s3c_i2c0_setname("s3c2440-i2c"); |
| 84 | s3c_i2c1_setname("s3c2440-i2c"); | 92 | s3c_i2c1_setname("s3c2440-i2c"); |
| 93 | |||
| 94 | s3c_onenand_setname("s5pc100-onenand"); | ||
| 85 | } | 95 | } |
| 86 | 96 | ||
| 87 | void __init s5pc100_init_clocks(int xtal) | 97 | void __init s5pc100_init_clocks(int xtal) |
| 88 | { | 98 | { |
| 89 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); | 99 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
| 100 | |||
| 90 | s3c24xx_register_baseclocks(xtal); | 101 | s3c24xx_register_baseclocks(xtal); |
| 91 | s5pc1xx_register_clocks(); | 102 | s5p_register_clocks(xtal); |
| 92 | s5pc100_register_clocks(); | 103 | s5pc100_register_clocks(); |
| 93 | s5pc100_setup_clocks(); | 104 | s5pc100_setup_clocks(); |
| 94 | } | 105 | } |
| 95 | 106 | ||
| 96 | void __init s5pc100_init_irq(void) | 107 | void __init s5pc100_init_irq(void) |
| 97 | { | 108 | { |
| 98 | u32 vic_valid[] = {~0, ~0, ~0}; | 109 | u32 vic[] = {~0, ~0, ~0}; |
| 99 | 110 | ||
| 100 | /* VIC0, VIC1, and VIC2 are fully populated. */ | 111 | /* VIC0, VIC1, and VIC2 are fully populated. */ |
| 101 | s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid)); | 112 | s5p_init_irq(vic, ARRAY_SIZE(vic)); |
| 102 | } | 113 | } |
| 103 | 114 | ||
| 104 | struct sysdev_class s5pc100_sysclass = { | 115 | static struct sysdev_class s5pc100_sysclass = { |
| 105 | .name = "s5pc100-core", | 116 | .name = "s5pc100-core", |
| 106 | }; | 117 | }; |
| 107 | 118 | ||
| @@ -118,9 +129,10 @@ core_initcall(s5pc100_core_init); | |||
| 118 | 129 | ||
| 119 | int __init s5pc100_init(void) | 130 | int __init s5pc100_init(void) |
| 120 | { | 131 | { |
| 121 | printk(KERN_DEBUG "S5PC100: Initialising architecture\n"); | 132 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
| 122 | 133 | ||
| 123 | s5pc1xx_idle = s5pc100_idle; | 134 | /* set idle function */ |
| 135 | pm_idle = s5pc100_idle; | ||
| 124 | 136 | ||
| 125 | return sysdev_register(&s5pc100_sysdev); | 137 | return sysdev_register(&s5pc100_sysdev); |
| 126 | } | 138 | } |
diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c new file mode 100644 index 000000000000..18cfe9ae1936 --- /dev/null +++ b/arch/arm/mach-s5pc100/dev-audio.c | |||
| @@ -0,0 +1,287 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pc100/dev-audio.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co. Ltd | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <plat/gpio-cfg.h> | ||
| 15 | #include <plat/audio.h> | ||
| 16 | |||
| 17 | #include <mach/gpio.h> | ||
| 18 | #include <mach/map.h> | ||
| 19 | #include <mach/dma.h> | ||
| 20 | #include <mach/irqs.h> | ||
| 21 | |||
| 22 | static int s5pc100_cfg_i2s(struct platform_device *pdev) | ||
| 23 | { | ||
| 24 | /* configure GPIO for i2s port */ | ||
| 25 | switch (pdev->id) { | ||
| 26 | case 1: | ||
| 27 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2)); | ||
| 28 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2)); | ||
| 30 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2)); | ||
| 31 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2)); | ||
| 32 | break; | ||
| 33 | |||
| 34 | case 2: | ||
| 35 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4)); | ||
| 36 | s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4)); | ||
| 37 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4)); | ||
| 38 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4)); | ||
| 39 | s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4)); | ||
| 40 | break; | ||
| 41 | |||
| 42 | case -1: /* Dedicated pins */ | ||
| 43 | break; | ||
| 44 | |||
| 45 | default: | ||
| 46 | printk(KERN_ERR "Invalid Device %d\n", pdev->id); | ||
| 47 | return -EINVAL; | ||
| 48 | } | ||
| 49 | |||
| 50 | return 0; | ||
| 51 | } | ||
| 52 | |||
| 53 | static struct s3c_audio_pdata s3c_i2s_pdata = { | ||
| 54 | .cfg_gpio = s5pc100_cfg_i2s, | ||
| 55 | }; | ||
| 56 | |||
| 57 | static struct resource s5pc100_iis0_resource[] = { | ||
| 58 | [0] = { | ||
| 59 | .start = S5PC100_PA_I2S0, | ||
| 60 | .end = S5PC100_PA_I2S0 + 0x100 - 1, | ||
| 61 | .flags = IORESOURCE_MEM, | ||
| 62 | }, | ||
| 63 | [1] = { | ||
| 64 | .start = DMACH_I2S0_TX, | ||
| 65 | .end = DMACH_I2S0_TX, | ||
| 66 | .flags = IORESOURCE_DMA, | ||
| 67 | }, | ||
| 68 | [2] = { | ||
| 69 | .start = DMACH_I2S0_RX, | ||
| 70 | .end = DMACH_I2S0_RX, | ||
| 71 | .flags = IORESOURCE_DMA, | ||
| 72 | }, | ||
| 73 | }; | ||
| 74 | |||
| 75 | struct platform_device s5pc100_device_iis0 = { | ||
| 76 | .name = "s3c64xx-iis-v4", | ||
| 77 | .id = -1, | ||
| 78 | .num_resources = ARRAY_SIZE(s5pc100_iis0_resource), | ||
| 79 | .resource = s5pc100_iis0_resource, | ||
| 80 | .dev = { | ||
| 81 | .platform_data = &s3c_i2s_pdata, | ||
| 82 | }, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct resource s5pc100_iis1_resource[] = { | ||
| 86 | [0] = { | ||
| 87 | .start = S5PC100_PA_I2S1, | ||
| 88 | .end = S5PC100_PA_I2S1 + 0x100 - 1, | ||
| 89 | .flags = IORESOURCE_MEM, | ||
| 90 | }, | ||
| 91 | [1] = { | ||
| 92 | .start = DMACH_I2S1_TX, | ||
| 93 | .end = DMACH_I2S1_TX, | ||
| 94 | .flags = IORESOURCE_DMA, | ||
| 95 | }, | ||
| 96 | [2] = { | ||
| 97 | .start = DMACH_I2S1_RX, | ||
| 98 | .end = DMACH_I2S1_RX, | ||
| 99 | .flags = IORESOURCE_DMA, | ||
| 100 | }, | ||
| 101 | }; | ||
| 102 | |||
| 103 | struct platform_device s5pc100_device_iis1 = { | ||
| 104 | .name = "s3c64xx-iis", | ||
| 105 | .id = 1, | ||
| 106 | .num_resources = ARRAY_SIZE(s5pc100_iis1_resource), | ||
| 107 | .resource = s5pc100_iis1_resource, | ||
| 108 | .dev = { | ||
| 109 | .platform_data = &s3c_i2s_pdata, | ||
| 110 | }, | ||
| 111 | }; | ||
| 112 | |||
| 113 | static struct resource s5pc100_iis2_resource[] = { | ||
| 114 | [0] = { | ||
| 115 | .start = S5PC100_PA_I2S2, | ||
| 116 | .end = S5PC100_PA_I2S2 + 0x100 - 1, | ||
| 117 | .flags = IORESOURCE_MEM, | ||
| 118 | }, | ||
| 119 | [1] = { | ||
| 120 | .start = DMACH_I2S2_TX, | ||
| 121 | .end = DMACH_I2S2_TX, | ||
| 122 | .flags = IORESOURCE_DMA, | ||
| 123 | }, | ||
| 124 | [2] = { | ||
| 125 | .start = DMACH_I2S2_RX, | ||
| 126 | .end = DMACH_I2S2_RX, | ||
| 127 | .flags = IORESOURCE_DMA, | ||
| 128 | }, | ||
| 129 | }; | ||
| 130 | |||
| 131 | struct platform_device s5pc100_device_iis2 = { | ||
| 132 | .name = "s3c64xx-iis", | ||
| 133 | .id = 2, | ||
| 134 | .num_resources = ARRAY_SIZE(s5pc100_iis2_resource), | ||
| 135 | .resource = s5pc100_iis2_resource, | ||
| 136 | .dev = { | ||
| 137 | .platform_data = &s3c_i2s_pdata, | ||
| 138 | }, | ||
| 139 | }; | ||
| 140 | |||
| 141 | /* PCM Controller platform_devices */ | ||
| 142 | |||
| 143 | static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev) | ||
| 144 | { | ||
| 145 | switch (pdev->id) { | ||
| 146 | case 0: | ||
| 147 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5)); | ||
| 148 | s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5)); | ||
| 149 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5)); | ||
| 150 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5)); | ||
| 151 | s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5)); | ||
| 152 | break; | ||
| 153 | |||
| 154 | case 1: | ||
| 155 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3)); | ||
| 156 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3)); | ||
| 157 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3)); | ||
| 158 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3)); | ||
| 159 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3)); | ||
| 160 | break; | ||
| 161 | |||
| 162 | default: | ||
| 163 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | ||
| 164 | return -EINVAL; | ||
| 165 | } | ||
| 166 | |||
| 167 | return 0; | ||
| 168 | } | ||
| 169 | |||
| 170 | static struct s3c_audio_pdata s3c_pcm_pdata = { | ||
| 171 | .cfg_gpio = s5pc100_pcm_cfg_gpio, | ||
| 172 | }; | ||
| 173 | |||
| 174 | static struct resource s5pc100_pcm0_resource[] = { | ||
| 175 | [0] = { | ||
| 176 | .start = S5PC100_PA_PCM0, | ||
| 177 | .end = S5PC100_PA_PCM0 + 0x100 - 1, | ||
| 178 | .flags = IORESOURCE_MEM, | ||
| 179 | }, | ||
| 180 | [1] = { | ||
| 181 | .start = DMACH_PCM0_TX, | ||
| 182 | .end = DMACH_PCM0_TX, | ||
| 183 | .flags = IORESOURCE_DMA, | ||
| 184 | }, | ||
| 185 | [2] = { | ||
| 186 | .start = DMACH_PCM0_RX, | ||
| 187 | .end = DMACH_PCM0_RX, | ||
| 188 | .flags = IORESOURCE_DMA, | ||
| 189 | }, | ||
| 190 | }; | ||
| 191 | |||
| 192 | struct platform_device s5pc100_device_pcm0 = { | ||
| 193 | .name = "samsung-pcm", | ||
| 194 | .id = 0, | ||
| 195 | .num_resources = ARRAY_SIZE(s5pc100_pcm0_resource), | ||
| 196 | .resource = s5pc100_pcm0_resource, | ||
| 197 | .dev = { | ||
| 198 | .platform_data = &s3c_pcm_pdata, | ||
| 199 | }, | ||
| 200 | }; | ||
| 201 | |||
| 202 | static struct resource s5pc100_pcm1_resource[] = { | ||
| 203 | [0] = { | ||
| 204 | .start = S5PC100_PA_PCM1, | ||
| 205 | .end = S5PC100_PA_PCM1 + 0x100 - 1, | ||
| 206 | .flags = IORESOURCE_MEM, | ||
| 207 | }, | ||
| 208 | [1] = { | ||
| 209 | .start = DMACH_PCM1_TX, | ||
| 210 | .end = DMACH_PCM1_TX, | ||
| 211 | .flags = IORESOURCE_DMA, | ||
| 212 | }, | ||
| 213 | [2] = { | ||
| 214 | .start = DMACH_PCM1_RX, | ||
| 215 | .end = DMACH_PCM1_RX, | ||
| 216 | .flags = IORESOURCE_DMA, | ||
| 217 | }, | ||
| 218 | }; | ||
| 219 | |||
| 220 | struct platform_device s5pc100_device_pcm1 = { | ||
| 221 | .name = "samsung-pcm", | ||
| 222 | .id = 1, | ||
| 223 | .num_resources = ARRAY_SIZE(s5pc100_pcm1_resource), | ||
| 224 | .resource = s5pc100_pcm1_resource, | ||
| 225 | .dev = { | ||
| 226 | .platform_data = &s3c_pcm_pdata, | ||
| 227 | }, | ||
| 228 | }; | ||
| 229 | |||
| 230 | /* AC97 Controller platform devices */ | ||
| 231 | |||
| 232 | static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) | ||
| 233 | { | ||
| 234 | s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4)); | ||
| 235 | s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4)); | ||
| 236 | s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4)); | ||
| 237 | s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4)); | ||
| 238 | s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4)); | ||
| 239 | |||
| 240 | return 0; | ||
| 241 | } | ||
| 242 | |||
| 243 | static struct resource s5pc100_ac97_resource[] = { | ||
| 244 | [0] = { | ||
| 245 | .start = S5PC100_PA_AC97, | ||
| 246 | .end = S5PC100_PA_AC97 + 0x100 - 1, | ||
| 247 | .flags = IORESOURCE_MEM, | ||
| 248 | }, | ||
| 249 | [1] = { | ||
| 250 | .start = DMACH_AC97_PCMOUT, | ||
| 251 | .end = DMACH_AC97_PCMOUT, | ||
| 252 | .flags = IORESOURCE_DMA, | ||
| 253 | }, | ||
| 254 | [2] = { | ||
| 255 | .start = DMACH_AC97_PCMIN, | ||
| 256 | .end = DMACH_AC97_PCMIN, | ||
| 257 | .flags = IORESOURCE_DMA, | ||
| 258 | }, | ||
| 259 | [3] = { | ||
| 260 | .start = DMACH_AC97_MICIN, | ||
| 261 | .end = DMACH_AC97_MICIN, | ||
| 262 | .flags = IORESOURCE_DMA, | ||
| 263 | }, | ||
| 264 | [4] = { | ||
| 265 | .start = IRQ_AC97, | ||
| 266 | .end = IRQ_AC97, | ||
| 267 | .flags = IORESOURCE_IRQ, | ||
| 268 | }, | ||
| 269 | }; | ||
| 270 | |||
| 271 | static struct s3c_audio_pdata s3c_ac97_pdata = { | ||
| 272 | .cfg_gpio = s5pc100_ac97_cfg_gpio, | ||
| 273 | }; | ||
| 274 | |||
| 275 | static u64 s5pc100_ac97_dmamask = DMA_BIT_MASK(32); | ||
| 276 | |||
| 277 | struct platform_device s5pc100_device_ac97 = { | ||
| 278 | .name = "s3c-ac97", | ||
| 279 | .id = -1, | ||
| 280 | .num_resources = ARRAY_SIZE(s5pc100_ac97_resource), | ||
| 281 | .resource = s5pc100_ac97_resource, | ||
| 282 | .dev = { | ||
| 283 | .platform_data = &s3c_ac97_pdata, | ||
| 284 | .dma_mask = &s5pc100_ac97_dmamask, | ||
| 285 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 286 | }, | ||
| 287 | }; | ||
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c new file mode 100644 index 000000000000..14618c346057 --- /dev/null +++ b/arch/arm/mach-s5pc100/dev-spi.c | |||
| @@ -0,0 +1,233 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pc100/dev-spi.c | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <mach/dma.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <mach/gpio.h> | ||
| 17 | #include <mach/spi-clocks.h> | ||
| 18 | |||
| 19 | #include <plat/s3c64xx-spi.h> | ||
| 20 | #include <plat/gpio-cfg.h> | ||
| 21 | #include <plat/irqs.h> | ||
| 22 | |||
| 23 | static char *spi_src_clks[] = { | ||
| 24 | [S5PC100_SPI_SRCCLK_PCLK] = "pclk", | ||
| 25 | [S5PC100_SPI_SRCCLK_48M] = "spi_48m", | ||
| 26 | [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus", | ||
| 27 | }; | ||
| 28 | |||
| 29 | /* SPI Controller platform_devices */ | ||
| 30 | |||
| 31 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
| 32 | * The emulated CS is toggled by board specific mechanism, as it can | ||
| 33 | * be either some immediate GPIO or some signal out of some other | ||
| 34 | * chip in between ... or some yet another way. | ||
| 35 | * We simply do not assume anything about CS. | ||
| 36 | */ | ||
| 37 | static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) | ||
| 38 | { | ||
| 39 | switch (pdev->id) { | ||
| 40 | case 0: | ||
| 41 | s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2)); | ||
| 43 | s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2)); | ||
| 44 | s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP); | ||
| 45 | s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP); | ||
| 46 | s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP); | ||
| 47 | break; | ||
| 48 | |||
| 49 | case 1: | ||
| 50 | s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2)); | ||
| 51 | s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2)); | ||
| 52 | s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2)); | ||
| 53 | s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP); | ||
| 54 | s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP); | ||
| 55 | s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP); | ||
| 56 | break; | ||
| 57 | |||
| 58 | case 2: | ||
| 59 | s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); | ||
| 60 | s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3)); | ||
| 61 | s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3)); | ||
| 62 | s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); | ||
| 63 | s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); | ||
| 64 | s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); | ||
| 65 | break; | ||
| 66 | |||
| 67 | default: | ||
| 68 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
| 69 | return -EINVAL; | ||
| 70 | } | ||
| 71 | |||
| 72 | return 0; | ||
| 73 | } | ||
| 74 | |||
| 75 | static struct resource s5pc100_spi0_resource[] = { | ||
| 76 | [0] = { | ||
| 77 | .start = S5PC100_PA_SPI0, | ||
| 78 | .end = S5PC100_PA_SPI0 + 0x100 - 1, | ||
| 79 | .flags = IORESOURCE_MEM, | ||
| 80 | }, | ||
| 81 | [1] = { | ||
| 82 | .start = DMACH_SPI0_TX, | ||
| 83 | .end = DMACH_SPI0_TX, | ||
| 84 | .flags = IORESOURCE_DMA, | ||
| 85 | }, | ||
| 86 | [2] = { | ||
| 87 | .start = DMACH_SPI0_RX, | ||
| 88 | .end = DMACH_SPI0_RX, | ||
| 89 | .flags = IORESOURCE_DMA, | ||
| 90 | }, | ||
| 91 | [3] = { | ||
| 92 | .start = IRQ_SPI0, | ||
| 93 | .end = IRQ_SPI0, | ||
| 94 | .flags = IORESOURCE_IRQ, | ||
| 95 | }, | ||
| 96 | }; | ||
| 97 | |||
| 98 | static struct s3c64xx_spi_info s5pc100_spi0_pdata = { | ||
| 99 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
| 100 | .fifo_lvl_mask = 0x7f, | ||
| 101 | .rx_lvl_offset = 13, | ||
| 102 | .high_speed = 1, | ||
| 103 | }; | ||
| 104 | |||
| 105 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
| 106 | |||
| 107 | struct platform_device s5pc100_device_spi0 = { | ||
| 108 | .name = "s3c64xx-spi", | ||
| 109 | .id = 0, | ||
| 110 | .num_resources = ARRAY_SIZE(s5pc100_spi0_resource), | ||
| 111 | .resource = s5pc100_spi0_resource, | ||
| 112 | .dev = { | ||
| 113 | .dma_mask = &spi_dmamask, | ||
| 114 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 115 | .platform_data = &s5pc100_spi0_pdata, | ||
| 116 | }, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static struct resource s5pc100_spi1_resource[] = { | ||
| 120 | [0] = { | ||
| 121 | .start = S5PC100_PA_SPI1, | ||
| 122 | .end = S5PC100_PA_SPI1 + 0x100 - 1, | ||
| 123 | .flags = IORESOURCE_MEM, | ||
| 124 | }, | ||
| 125 | [1] = { | ||
| 126 | .start = DMACH_SPI1_TX, | ||
| 127 | .end = DMACH_SPI1_TX, | ||
| 128 | .flags = IORESOURCE_DMA, | ||
| 129 | }, | ||
| 130 | [2] = { | ||
| 131 | .start = DMACH_SPI1_RX, | ||
| 132 | .end = DMACH_SPI1_RX, | ||
| 133 | .flags = IORESOURCE_DMA, | ||
| 134 | }, | ||
| 135 | [3] = { | ||
| 136 | .start = IRQ_SPI1, | ||
| 137 | .end = IRQ_SPI1, | ||
| 138 | .flags = IORESOURCE_IRQ, | ||
| 139 | }, | ||
| 140 | }; | ||
| 141 | |||
| 142 | static struct s3c64xx_spi_info s5pc100_spi1_pdata = { | ||
| 143 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
| 144 | .fifo_lvl_mask = 0x7f, | ||
| 145 | .rx_lvl_offset = 13, | ||
| 146 | .high_speed = 1, | ||
| 147 | }; | ||
| 148 | |||
| 149 | struct platform_device s5pc100_device_spi1 = { | ||
| 150 | .name = "s3c64xx-spi", | ||
| 151 | .id = 1, | ||
| 152 | .num_resources = ARRAY_SIZE(s5pc100_spi1_resource), | ||
| 153 | .resource = s5pc100_spi1_resource, | ||
| 154 | .dev = { | ||
| 155 | .dma_mask = &spi_dmamask, | ||
| 156 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 157 | .platform_data = &s5pc100_spi1_pdata, | ||
| 158 | }, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static struct resource s5pc100_spi2_resource[] = { | ||
| 162 | [0] = { | ||
| 163 | .start = S5PC100_PA_SPI2, | ||
| 164 | .end = S5PC100_PA_SPI2 + 0x100 - 1, | ||
| 165 | .flags = IORESOURCE_MEM, | ||
| 166 | }, | ||
| 167 | [1] = { | ||
| 168 | .start = DMACH_SPI2_TX, | ||
| 169 | .end = DMACH_SPI2_TX, | ||
| 170 | .flags = IORESOURCE_DMA, | ||
| 171 | }, | ||
| 172 | [2] = { | ||
| 173 | .start = DMACH_SPI2_RX, | ||
| 174 | .end = DMACH_SPI2_RX, | ||
| 175 | .flags = IORESOURCE_DMA, | ||
| 176 | }, | ||
| 177 | [3] = { | ||
| 178 | .start = IRQ_SPI2, | ||
| 179 | .end = IRQ_SPI2, | ||
| 180 | .flags = IORESOURCE_IRQ, | ||
| 181 | }, | ||
| 182 | }; | ||
| 183 | |||
| 184 | static struct s3c64xx_spi_info s5pc100_spi2_pdata = { | ||
| 185 | .cfg_gpio = s5pc100_spi_cfg_gpio, | ||
| 186 | .fifo_lvl_mask = 0x7f, | ||
| 187 | .rx_lvl_offset = 13, | ||
| 188 | .high_speed = 1, | ||
| 189 | }; | ||
| 190 | |||
| 191 | struct platform_device s5pc100_device_spi2 = { | ||
| 192 | .name = "s3c64xx-spi", | ||
| 193 | .id = 2, | ||
| 194 | .num_resources = ARRAY_SIZE(s5pc100_spi2_resource), | ||
| 195 | .resource = s5pc100_spi2_resource, | ||
| 196 | .dev = { | ||
| 197 | .dma_mask = &spi_dmamask, | ||
| 198 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 199 | .platform_data = &s5pc100_spi2_pdata, | ||
| 200 | }, | ||
| 201 | }; | ||
| 202 | |||
| 203 | void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
| 204 | { | ||
| 205 | struct s3c64xx_spi_info *pd; | ||
| 206 | |||
| 207 | /* Reject invalid configuration */ | ||
| 208 | if (!num_cs || src_clk_nr < 0 | ||
| 209 | || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) { | ||
| 210 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
| 211 | return; | ||
| 212 | } | ||
| 213 | |||
| 214 | switch (cntrlr) { | ||
| 215 | case 0: | ||
| 216 | pd = &s5pc100_spi0_pdata; | ||
| 217 | break; | ||
| 218 | case 1: | ||
| 219 | pd = &s5pc100_spi1_pdata; | ||
| 220 | break; | ||
| 221 | case 2: | ||
| 222 | pd = &s5pc100_spi2_pdata; | ||
| 223 | break; | ||
| 224 | default: | ||
| 225 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
| 226 | __func__, cntrlr); | ||
| 227 | return; | ||
| 228 | } | ||
| 229 | |||
| 230 | pd->num_cs = num_cs; | ||
| 231 | pd->src_clk_nr = src_clk_nr; | ||
| 232 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
| 233 | } | ||
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c new file mode 100644 index 000000000000..0f5517571e2c --- /dev/null +++ b/arch/arm/mach-s5pc100/dma.c | |||
| @@ -0,0 +1,167 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 3 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License as published by | ||
| 7 | * the Free Software Foundation; either version 2 of the License, or | ||
| 8 | * (at your option) any later version. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/dma-mapping.h> | ||
| 22 | |||
| 23 | #include <plat/devs.h> | ||
| 24 | |||
| 25 | #include <mach/map.h> | ||
| 26 | #include <mach/irqs.h> | ||
| 27 | |||
| 28 | #include <plat/s3c-pl330-pdata.h> | ||
| 29 | |||
| 30 | static u64 dma_dmamask = DMA_BIT_MASK(32); | ||
| 31 | |||
| 32 | static struct resource s5pc100_pdma0_resource[] = { | ||
| 33 | [0] = { | ||
| 34 | .start = S5PC100_PA_PDMA0, | ||
| 35 | .end = S5PC100_PA_PDMA0 + SZ_4K, | ||
| 36 | .flags = IORESOURCE_MEM, | ||
| 37 | }, | ||
| 38 | [1] = { | ||
| 39 | .start = IRQ_PDMA0, | ||
| 40 | .end = IRQ_PDMA0, | ||
| 41 | .flags = IORESOURCE_IRQ, | ||
| 42 | }, | ||
| 43 | }; | ||
| 44 | |||
| 45 | static struct s3c_pl330_platdata s5pc100_pdma0_pdata = { | ||
| 46 | .peri = { | ||
| 47 | [0] = DMACH_UART0_RX, | ||
| 48 | [1] = DMACH_UART0_TX, | ||
| 49 | [2] = DMACH_UART1_RX, | ||
| 50 | [3] = DMACH_UART1_TX, | ||
| 51 | [4] = DMACH_UART2_RX, | ||
| 52 | [5] = DMACH_UART2_TX, | ||
| 53 | [6] = DMACH_UART3_RX, | ||
| 54 | [7] = DMACH_UART3_TX, | ||
| 55 | [8] = DMACH_IRDA, | ||
| 56 | [9] = DMACH_I2S0_RX, | ||
| 57 | [10] = DMACH_I2S0_TX, | ||
| 58 | [11] = DMACH_I2S0S_TX, | ||
| 59 | [12] = DMACH_I2S1_RX, | ||
| 60 | [13] = DMACH_I2S1_TX, | ||
| 61 | [14] = DMACH_I2S2_RX, | ||
| 62 | [15] = DMACH_I2S2_TX, | ||
| 63 | [16] = DMACH_SPI0_RX, | ||
| 64 | [17] = DMACH_SPI0_TX, | ||
| 65 | [18] = DMACH_SPI1_RX, | ||
| 66 | [19] = DMACH_SPI1_TX, | ||
| 67 | [20] = DMACH_SPI2_RX, | ||
| 68 | [21] = DMACH_SPI2_TX, | ||
| 69 | [22] = DMACH_AC97_MICIN, | ||
| 70 | [23] = DMACH_AC97_PCMIN, | ||
| 71 | [24] = DMACH_AC97_PCMOUT, | ||
| 72 | [25] = DMACH_EXTERNAL, | ||
| 73 | [26] = DMACH_PWM, | ||
| 74 | [27] = DMACH_SPDIF, | ||
| 75 | [28] = DMACH_HSI_RX, | ||
| 76 | [29] = DMACH_HSI_TX, | ||
| 77 | [30] = DMACH_MAX, | ||
| 78 | [31] = DMACH_MAX, | ||
| 79 | }, | ||
| 80 | }; | ||
| 81 | |||
| 82 | static struct platform_device s5pc100_device_pdma0 = { | ||
| 83 | .name = "s3c-pl330", | ||
| 84 | .id = 1, | ||
| 85 | .num_resources = ARRAY_SIZE(s5pc100_pdma0_resource), | ||
| 86 | .resource = s5pc100_pdma0_resource, | ||
| 87 | .dev = { | ||
| 88 | .dma_mask = &dma_dmamask, | ||
| 89 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 90 | .platform_data = &s5pc100_pdma0_pdata, | ||
| 91 | }, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct resource s5pc100_pdma1_resource[] = { | ||
| 95 | [0] = { | ||
| 96 | .start = S5PC100_PA_PDMA1, | ||
| 97 | .end = S5PC100_PA_PDMA1 + SZ_4K, | ||
| 98 | .flags = IORESOURCE_MEM, | ||
| 99 | }, | ||
| 100 | [1] = { | ||
| 101 | .start = IRQ_PDMA1, | ||
| 102 | .end = IRQ_PDMA1, | ||
| 103 | .flags = IORESOURCE_IRQ, | ||
| 104 | }, | ||
| 105 | }; | ||
| 106 | |||
| 107 | static struct s3c_pl330_platdata s5pc100_pdma1_pdata = { | ||
| 108 | .peri = { | ||
| 109 | [0] = DMACH_UART0_RX, | ||
| 110 | [1] = DMACH_UART0_TX, | ||
| 111 | [2] = DMACH_UART1_RX, | ||
| 112 | [3] = DMACH_UART1_TX, | ||
| 113 | [4] = DMACH_UART2_RX, | ||
| 114 | [5] = DMACH_UART2_TX, | ||
| 115 | [6] = DMACH_UART3_RX, | ||
| 116 | [7] = DMACH_UART3_TX, | ||
| 117 | [8] = DMACH_IRDA, | ||
| 118 | [9] = DMACH_I2S0_RX, | ||
| 119 | [10] = DMACH_I2S0_TX, | ||
| 120 | [11] = DMACH_I2S0S_TX, | ||
| 121 | [12] = DMACH_I2S1_RX, | ||
| 122 | [13] = DMACH_I2S1_TX, | ||
| 123 | [14] = DMACH_I2S2_RX, | ||
| 124 | [15] = DMACH_I2S2_TX, | ||
| 125 | [16] = DMACH_SPI0_RX, | ||
| 126 | [17] = DMACH_SPI0_TX, | ||
| 127 | [18] = DMACH_SPI1_RX, | ||
| 128 | [19] = DMACH_SPI1_TX, | ||
| 129 | [20] = DMACH_SPI2_RX, | ||
| 130 | [21] = DMACH_SPI2_TX, | ||
| 131 | [22] = DMACH_PCM0_RX, | ||
| 132 | [23] = DMACH_PCM0_TX, | ||
| 133 | [24] = DMACH_PCM1_RX, | ||
| 134 | [25] = DMACH_PCM1_TX, | ||
| 135 | [26] = DMACH_MSM_REQ0, | ||
| 136 | [27] = DMACH_MSM_REQ1, | ||
| 137 | [28] = DMACH_MSM_REQ2, | ||
| 138 | [29] = DMACH_MSM_REQ3, | ||
| 139 | [30] = DMACH_MAX, | ||
| 140 | [31] = DMACH_MAX, | ||
| 141 | }, | ||
| 142 | }; | ||
| 143 | |||
| 144 | static struct platform_device s5pc100_device_pdma1 = { | ||
| 145 | .name = "s3c-pl330", | ||
| 146 | .id = 2, | ||
| 147 | .num_resources = ARRAY_SIZE(s5pc100_pdma1_resource), | ||
| 148 | .resource = s5pc100_pdma1_resource, | ||
| 149 | .dev = { | ||
| 150 | .dma_mask = &dma_dmamask, | ||
| 151 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 152 | .platform_data = &s5pc100_pdma1_pdata, | ||
| 153 | }, | ||
| 154 | }; | ||
| 155 | |||
| 156 | static struct platform_device *s5pc100_dmacs[] __initdata = { | ||
| 157 | &s5pc100_device_pdma0, | ||
| 158 | &s5pc100_device_pdma1, | ||
| 159 | }; | ||
| 160 | |||
| 161 | static int __init s5pc100_dma_init(void) | ||
| 162 | { | ||
| 163 | platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs)); | ||
| 164 | |||
| 165 | return 0; | ||
| 166 | } | ||
| 167 | arch_initcall(s5pc100_dma_init); | ||
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c index c8e8336a3a12..0fab7f2cd8bf 100644 --- a/arch/arm/mach-s5pc100/gpiolib.c +++ b/arch/arm/mach-s5pc100/gpiolib.c | |||
| @@ -1,10 +1,10 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/arm/plat-s5pc1xx/gpiolib.c | 2 | * arch/arm/plat-s5pc100/gpiolib.c |
| 3 | * | 3 | * |
| 4 | * Copyright 2009 Samsung Electronics Co | 4 | * Copyright 2009 Samsung Electronics Co |
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | 5 | * Kyungmin Park <kyungmin.park@samsung.com> |
| 6 | * | 6 | * |
| 7 | * S5PC1XX - GPIOlib support | 7 | * S5PC100 - GPIOlib support |
| 8 | * | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as | 10 | * it under the terms of the GNU General Public License version 2 as |
| @@ -61,13 +61,12 @@ | |||
| 61 | * L3 8 4Bit None | 61 | * L3 8 4Bit None |
| 62 | */ | 62 | */ |
| 63 | 63 | ||
| 64 | #if 0 | 64 | static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) |
| 65 | static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) | ||
| 66 | { | 65 | { |
| 67 | return S3C_IRQ_GPIO(chip->base + offset); | 66 | return S3C_IRQ_GPIO(chip->base + offset); |
| 68 | } | 67 | } |
| 69 | 68 | ||
| 70 | static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) | 69 | static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) |
| 71 | { | 70 | { |
| 72 | int base; | 71 | int base; |
| 73 | 72 | ||
| @@ -85,7 +84,7 @@ static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) | |||
| 85 | return IRQ_EINT(24 + offset); | 84 | return IRQ_EINT(24 + offset); |
| 86 | return -EINVAL; | 85 | return -EINVAL; |
| 87 | } | 86 | } |
| 88 | #endif | 87 | |
| 89 | static struct s3c_gpio_cfg gpio_cfg = { | 88 | static struct s3c_gpio_cfg gpio_cfg = { |
| 90 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | 89 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, |
| 91 | .set_pull = s3c_gpio_setpull_updown, | 90 | .set_pull = s3c_gpio_setpull_updown, |
| @@ -382,31 +381,30 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = { | |||
| 382 | }; | 381 | }; |
| 383 | 382 | ||
| 384 | /* FIXME move from irq-gpio.c */ | 383 | /* FIXME move from irq-gpio.c */ |
| 385 | extern struct irq_chip s5pc1xx_gpioint; | 384 | extern struct irq_chip s5pc100_gpioint; |
| 386 | extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); | 385 | extern void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); |
| 387 | 386 | ||
| 388 | static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip) | 387 | static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip) |
| 389 | { | 388 | { |
| 390 | #if 0 | ||
| 391 | /* Interrupt */ | 389 | /* Interrupt */ |
| 392 | if (chip->config == &gpio_cfg) { | 390 | if (chip->config == &gpio_cfg) { |
| 393 | int i, irq; | 391 | int i, irq; |
| 394 | 392 | ||
| 395 | chip->chip.to_irq = s5pc1xx_gpiolib_to_irq; | 393 | chip->chip.to_irq = s5pc100_gpiolib_to_irq; |
| 396 | 394 | ||
| 397 | for (i = 0; i < chip->chip.ngpio; i++) { | 395 | for (i = 0; i < chip->chip.ngpio; i++) { |
| 398 | irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i; | 396 | irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i; |
| 399 | set_irq_chip(irq, &s5pc1xx_gpioint); | 397 | set_irq_chip(irq, &s5pc100_gpioint); |
| 400 | set_irq_data(irq, &chip->chip); | 398 | set_irq_data(irq, &chip->chip); |
| 401 | set_irq_handler(irq, handle_level_irq); | 399 | set_irq_handler(irq, handle_level_irq); |
| 402 | set_irq_flags(irq, IRQF_VALID); | 400 | set_irq_flags(irq, IRQF_VALID); |
| 403 | } | 401 | } |
| 404 | } else if (chip->config == &gpio_cfg_eint) | 402 | } else if (chip->config == &gpio_cfg_eint) { |
| 405 | chip->chip.to_irq = s5pc1xx_gpiolib_to_eint; | 403 | chip->chip.to_irq = s5pc100_gpiolib_to_eint; |
| 406 | #endif | 404 | } |
| 407 | } | 405 | } |
| 408 | 406 | ||
| 409 | static __init int s5pc1xx_gpiolib_init(void) | 407 | static __init int s5pc100_gpiolib_init(void) |
| 410 | { | 408 | { |
| 411 | struct s3c_gpio_chip *chip; | 409 | struct s3c_gpio_chip *chip; |
| 412 | int nr_chips; | 410 | int nr_chips; |
| @@ -419,10 +417,10 @@ static __init int s5pc1xx_gpiolib_init(void) | |||
| 419 | 417 | ||
| 420 | samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips, | 418 | samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips, |
| 421 | ARRAY_SIZE(s5pc100_gpio_chips)); | 419 | ARRAY_SIZE(s5pc100_gpio_chips)); |
| 422 | #if 0 | 420 | |
| 423 | /* Interrupt */ | 421 | /* Interrupt */ |
| 424 | set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler); | 422 | set_irq_chained_handler(IRQ_GPIOINT, s5pc100_irq_gpioint_handler); |
| 425 | #endif | 423 | |
| 426 | return 0; | 424 | return 0; |
| 427 | } | 425 | } |
| 428 | core_initcall(s5pc1xx_gpiolib_init); | 426 | core_initcall(s5pc100_gpiolib_init); |
diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S index e181f5789482..70e02e91ee3c 100644 --- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S | |||
| @@ -22,12 +22,14 @@ | |||
| 22 | * aligned and add in the offset when we load the value here. | 22 | * aligned and add in the offset when we load the value here. |
| 23 | */ | 23 | */ |
| 24 | 24 | ||
| 25 | .macro addruart, rx, tmp | 25 | .macro addruart, rx, rtmp |
| 26 | mrc p15, 0, \rx, c1, c0 | 26 | mrc p15, 0, \rx, c1, c0 |
| 27 | tst \rx, #1 | 27 | tst \rx, #1 |
| 28 | ldreq \rx, = S3C_PA_UART | 28 | ldreq \rx, = S3C_PA_UART |
| 29 | ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) | 29 | ldrne \rx, = S3C_VA_UART |
| 30 | #if CONFIG_DEBUG_S3C_UART != 0 | ||
| 30 | add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) | 31 | add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) |
| 32 | #endif | ||
| 31 | .endm | 33 | .endm |
| 32 | 34 | ||
| 33 | /* include the reset of the code which will do the work, we're only | 35 | /* include the reset of the code which will do the work, we're only |
diff --git a/arch/arm/mach-s5pc100/include/mach/dma.h b/arch/arm/mach-s5pc100/include/mach/dma.h new file mode 100644 index 000000000000..81209eb1409b --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/dma.h | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 3 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 4 | * | ||
| 5 | * This program is free software; you can redistribute it and/or modify | ||
| 6 | * it under the terms of the GNU General Public License as published by | ||
| 7 | * the Free Software Foundation; either version 2 of the License, or | ||
| 8 | * (at your option) any later version. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License | ||
| 16 | * along with this program; if not, write to the Free Software | ||
| 17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef __MACH_DMA_H | ||
| 21 | #define __MACH_DMA_H | ||
| 22 | |||
| 23 | /* This platform uses the common S3C DMA API driver for PL330 */ | ||
| 24 | #include <plat/s3c-dma-pl330.h> | ||
| 25 | |||
| 26 | #endif /* __MACH_DMA_H */ | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S index 67131939e626..ba76af052c81 100644 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | .endm | 20 | .endm |
| 21 | 21 | ||
| 22 | .macro get_irqnr_preamble, base, tmp | 22 | .macro get_irqnr_preamble, base, tmp |
| 23 | ldr \base, =S3C_VA_VIC0 | 23 | ldr \base, =VA_VIC0 |
| 24 | .endm | 24 | .endm |
| 25 | 25 | ||
| 26 | .macro arch_ret_to_user, tmp1, tmp2 | 26 | .macro arch_ret_to_user, tmp1, tmp2 |
| @@ -29,18 +29,18 @@ | |||
| 29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
| 30 | 30 | ||
| 31 | @ check the vic0 | 31 | @ check the vic0 |
| 32 | mov \irqnr, # S3C_IRQ_OFFSET + 31 | 32 | mov \irqnr, # S5P_IRQ_OFFSET + 31 |
| 33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | 33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] |
| 34 | teq \irqstat, #0 | 34 | teq \irqstat, #0 |
| 35 | 35 | ||
| 36 | @ otherwise try vic1 | 36 | @ otherwise try vic1 |
| 37 | addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) | 37 | addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) |
| 38 | addeq \irqnr, \irqnr, #32 | 38 | addeq \irqnr, \irqnr, #32 |
| 39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | 39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] |
| 40 | teqeq \irqstat, #0 | 40 | teqeq \irqstat, #0 |
| 41 | 41 | ||
| 42 | @ otherwise try vic2 | 42 | @ otherwise try vic2 |
| 43 | addeq \tmp, \base, #(S3C_VA_VIC2 - S3C_VA_VIC0) | 43 | addeq \tmp, \base, #(VA_VIC2 - VA_VIC0) |
| 44 | addeq \irqnr, \irqnr, #32 | 44 | addeq \irqnr, \irqnr, #32 |
| 45 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | 45 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] |
| 46 | teqeq \irqstat, #0 | 46 | teqeq \irqstat, #0 |
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h index 29a8a12d9b4f..71ae1f52df1d 100644 --- a/arch/arm/mach-s5pc100/include/mach/gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/gpio.h | |||
| @@ -146,6 +146,13 @@ enum s5p_gpio_number { | |||
| 146 | /* define the number of gpios we need to the one after the MP04() range */ | 146 | /* define the number of gpios we need to the one after the MP04() range */ |
| 147 | #define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1) | 147 | #define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1) |
| 148 | 148 | ||
| 149 | #define EINT_MODE S3C_GPIO_SFN(0x2) | ||
| 150 | |||
| 151 | #define EINT_GPIO_0(x) S5PC100_GPH0(x) | ||
| 152 | #define EINT_GPIO_1(x) S5PC100_GPH1(x) | ||
| 153 | #define EINT_GPIO_2(x) S5PC100_GPH2(x) | ||
| 154 | #define EINT_GPIO_3(x) S5PC100_GPH3(x) | ||
| 155 | |||
| 149 | #include <asm-generic/gpio.h> | 156 | #include <asm-generic/gpio.h> |
| 150 | 157 | ||
| 151 | #endif /* __ASM_ARCH_GPIO_H */ | 158 | #endif /* __ASM_ARCH_GPIO_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index b53fa48a52c6..28aa551dc3a8 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h | |||
| @@ -11,9 +11,104 @@ | |||
| 11 | 11 | ||
| 12 | #include <plat/irqs.h> | 12 | #include <plat/irqs.h> |
| 13 | 13 | ||
| 14 | /* LCD */ | 14 | /* VIC0: system, DMA, timer */ |
| 15 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | ||
| 16 | #define IRQ_BATF S5P_IRQ_VIC0(17) | ||
| 17 | #define IRQ_MDMA S5P_IRQ_VIC0(18) | ||
| 18 | #define IRQ_PDMA0 S5P_IRQ_VIC0(19) | ||
| 19 | #define IRQ_PDMA1 S5P_IRQ_VIC0(20) | ||
| 20 | #define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) | ||
| 21 | #define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) | ||
| 22 | #define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) | ||
| 23 | #define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) | ||
| 24 | #define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) | ||
| 25 | #define IRQ_SYSTIMER S5P_IRQ_VIC0(26) | ||
| 26 | #define IRQ_WDT S5P_IRQ_VIC0(27) | ||
| 27 | #define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) | ||
| 28 | #define IRQ_RTC_TIC S5P_IRQ_VIC0(29) | ||
| 29 | #define IRQ_GPIOINT S5P_IRQ_VIC0(30) | ||
| 30 | |||
| 31 | /* VIC1: ARM, power, memory, connectivity */ | ||
| 32 | #define IRQ_CORTEX0 S5P_IRQ_VIC1(0) | ||
| 33 | #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) | ||
| 34 | #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) | ||
| 35 | #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) | ||
| 36 | #define IRQ_CORTEX4 S5P_IRQ_VIC1(4) | ||
| 37 | #define IRQ_IEMAPC S5P_IRQ_VIC1(5) | ||
| 38 | #define IRQ_IEMIEC S5P_IRQ_VIC1(6) | ||
| 39 | #define IRQ_ONENAND S5P_IRQ_VIC1(7) | ||
| 40 | #define IRQ_NFC S5P_IRQ_VIC1(8) | ||
| 41 | #define IRQ_CFC S5P_IRQ_VIC1(9) | ||
| 42 | #define IRQ_UART0 S5P_IRQ_VIC1(10) | ||
| 43 | #define IRQ_UART1 S5P_IRQ_VIC1(11) | ||
| 44 | #define IRQ_UART2 S5P_IRQ_VIC1(12) | ||
| 45 | #define IRQ_UART3 S5P_IRQ_VIC1(13) | ||
| 46 | #define IRQ_IIC S5P_IRQ_VIC1(14) | ||
| 47 | #define IRQ_SPI0 S5P_IRQ_VIC1(15) | ||
| 48 | #define IRQ_SPI1 S5P_IRQ_VIC1(16) | ||
| 49 | #define IRQ_SPI2 S5P_IRQ_VIC1(17) | ||
| 50 | #define IRQ_IRDA S5P_IRQ_VIC1(18) | ||
| 51 | #define IRQ_CAN0 S5P_IRQ_VIC1(19) | ||
| 52 | #define IRQ_CAN1 S5P_IRQ_VIC1(20) | ||
| 53 | #define IRQ_HSIRX S5P_IRQ_VIC1(21) | ||
| 54 | #define IRQ_HSITX S5P_IRQ_VIC1(22) | ||
| 55 | #define IRQ_UHOST S5P_IRQ_VIC1(23) | ||
| 56 | #define IRQ_OTG S5P_IRQ_VIC1(24) | ||
| 57 | #define IRQ_MSM S5P_IRQ_VIC1(25) | ||
| 58 | #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) | ||
| 59 | #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) | ||
| 60 | #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) | ||
| 61 | #define IRQ_MIPICSI S5P_IRQ_VIC1(29) | ||
| 62 | #define IRQ_MIPIDSI S5P_IRQ_VIC1(30) | ||
| 63 | |||
| 64 | /* VIC2: multimedia, audio, security */ | ||
| 65 | #define IRQ_LCD0 S5P_IRQ_VIC2(0) | ||
| 66 | #define IRQ_LCD1 S5P_IRQ_VIC2(1) | ||
| 67 | #define IRQ_LCD2 S5P_IRQ_VIC2(2) | ||
| 68 | #define IRQ_LCD3 S5P_IRQ_VIC2(3) | ||
| 69 | #define IRQ_ROTATOR S5P_IRQ_VIC2(4) | ||
| 70 | #define IRQ_FIMC0 S5P_IRQ_VIC2(5) | ||
| 71 | #define IRQ_FIMC1 S5P_IRQ_VIC2(6) | ||
| 72 | #define IRQ_FIMC2 S5P_IRQ_VIC2(7) | ||
| 73 | #define IRQ_JPEG S5P_IRQ_VIC2(8) | ||
| 74 | #define IRQ_2D S5P_IRQ_VIC2(9) | ||
| 75 | #define IRQ_3D S5P_IRQ_VIC2(10) | ||
| 76 | #define IRQ_MIXER S5P_IRQ_VIC2(11) | ||
| 77 | #define IRQ_HDMI S5P_IRQ_VIC2(12) | ||
| 78 | #define IRQ_IIC1 S5P_IRQ_VIC2(13) | ||
| 79 | #define IRQ_MFC S5P_IRQ_VIC2(14) | ||
| 80 | #define IRQ_TVENC S5P_IRQ_VIC2(15) | ||
| 81 | #define IRQ_I2S0 S5P_IRQ_VIC2(16) | ||
| 82 | #define IRQ_I2S1 S5P_IRQ_VIC2(17) | ||
| 83 | #define IRQ_I2S2 S5P_IRQ_VIC2(18) | ||
| 84 | #define IRQ_AC97 S5P_IRQ_VIC2(19) | ||
| 85 | #define IRQ_PCM0 S5P_IRQ_VIC2(20) | ||
| 86 | #define IRQ_PCM1 S5P_IRQ_VIC2(21) | ||
| 87 | #define IRQ_SPDIF S5P_IRQ_VIC2(22) | ||
| 88 | #define IRQ_ADC S5P_IRQ_VIC2(23) | ||
| 89 | #define IRQ_PENDN S5P_IRQ_VIC2(24) | ||
| 90 | #define IRQ_TC IRQ_PENDN | ||
| 91 | #define IRQ_KEYPAD S5P_IRQ_VIC2(25) | ||
| 92 | #define IRQ_CG S5P_IRQ_VIC2(26) | ||
| 93 | #define IRQ_SEC S5P_IRQ_VIC2(27) | ||
| 94 | #define IRQ_SECRX S5P_IRQ_VIC2(28) | ||
| 95 | #define IRQ_SECTX S5P_IRQ_VIC2(29) | ||
| 96 | #define IRQ_SDMIRQ S5P_IRQ_VIC2(30) | ||
| 97 | #define IRQ_SDMFIQ S5P_IRQ_VIC2(31) | ||
| 98 | #define IRQ_VIC_END S5P_IRQ_VIC2(31) | ||
| 99 | |||
| 100 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) | ||
| 101 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | ||
| 102 | |||
| 103 | #define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1) | ||
| 104 | #define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x)) | ||
| 105 | |||
| 106 | /* Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs */ | ||
| 107 | #define NR_IRQS (S3C_IRQ_GPIO(320) + 1) | ||
| 108 | |||
| 109 | /* Compatibility */ | ||
| 15 | #define IRQ_LCD_FIFO IRQ_LCD0 | 110 | #define IRQ_LCD_FIFO IRQ_LCD0 |
| 16 | #define IRQ_LCD_VSYNC IRQ_LCD1 | 111 | #define IRQ_LCD_VSYNC IRQ_LCD1 |
| 17 | #define IRQ_LCD_SYSTEM IRQ_LCD2 | 112 | #define IRQ_LCD_SYSTEM IRQ_LCD2 |
| 18 | 113 | ||
| 19 | #endif /* __ASM_ARCH_IRQ_H */ | 114 | #endif /* __ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 4681ebe8bef6..cadae4305688 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h | |||
| @@ -3,9 +3,7 @@ | |||
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * | 5 | * |
| 6 | * Based on mach-s3c6400/include/mach/map.h | 6 | * S5PC100 - Memory map definitions |
| 7 | * | ||
| 8 | * S5PC1XX - Memory map definitions | ||
| 9 | * | 7 | * |
| 10 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
| @@ -16,6 +14,7 @@ | |||
| 16 | #define __ASM_ARCH_MAP_H __FILE__ | 14 | #define __ASM_ARCH_MAP_H __FILE__ |
| 17 | 15 | ||
| 18 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
| 17 | #include <plat/map-s5p.h> | ||
| 19 | 18 | ||
| 20 | /* | 19 | /* |
| 21 | * map-base.h has already defined virtual memory address | 20 | * map-base.h has already defined virtual memory address |
| @@ -31,25 +30,21 @@ | |||
| 31 | * | 30 | * |
| 32 | */ | 31 | */ |
| 33 | 32 | ||
| 33 | #define S5PC100_PA_ONENAND_BUF (0xB0000000) | ||
| 34 | #define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M) | ||
| 35 | |||
| 34 | /* Chip ID */ | 36 | /* Chip ID */ |
| 37 | |||
| 35 | #define S5PC100_PA_CHIPID (0xE0000000) | 38 | #define S5PC100_PA_CHIPID (0xE0000000) |
| 36 | #define S5PC1XX_PA_CHIPID S5PC100_PA_CHIPID | 39 | #define S5P_PA_CHIPID S5PC100_PA_CHIPID |
| 37 | #define S5PC1XX_VA_CHIPID S3C_VA_SYS | 40 | |
| 38 | 41 | #define S5PC100_PA_SYSCON (0xE0100000) | |
| 39 | /* System */ | 42 | #define S5P_PA_SYSCON S5PC100_PA_SYSCON |
| 40 | #define S5PC100_PA_CLK (0xE0100000) | 43 | |
| 41 | #define S5PC100_PA_CLK_OTHER (0xE0200000) | 44 | #define S5PC100_PA_OTHERS (0xE0200000) |
| 42 | #define S5PC100_PA_PWR (0xE0108000) | 45 | #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) |
| 43 | #define S5PC1XX_PA_CLK S5PC100_PA_CLK | 46 | |
| 44 | #define S5PC1XX_PA_PWR S5PC100_PA_PWR | 47 | #define S5P_PA_GPIO (0xE0300000) |
| 45 | #define S5PC1XX_PA_CLK_OTHER S5PC100_PA_CLK_OTHER | ||
| 46 | #define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000) | ||
| 47 | #define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000) | ||
| 48 | #define S5PC1XX_VA_CLK_OTHER (S3C_VA_SYS + 0x30000) | ||
| 49 | |||
| 50 | /* GPIO */ | ||
| 51 | #define S5PC100_PA_GPIO (0xE0300000) | ||
| 52 | #define S5PC1XX_PA_GPIO S5PC100_PA_GPIO | ||
| 53 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) | 48 | #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) |
| 54 | 49 | ||
| 55 | /* Interrupt */ | 50 | /* Interrupt */ |
| @@ -59,6 +54,12 @@ | |||
| 59 | #define S5PC100_VA_VIC_OFFSET 0x10000 | 54 | #define S5PC100_VA_VIC_OFFSET 0x10000 |
| 60 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) | 55 | #define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) |
| 61 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) | 56 | #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) |
| 57 | #define S5P_PA_VIC0 S5PC1XX_PA_VIC(0) | ||
| 58 | #define S5P_PA_VIC1 S5PC1XX_PA_VIC(1) | ||
| 59 | #define S5P_PA_VIC2 S5PC1XX_PA_VIC(2) | ||
| 60 | |||
| 61 | |||
| 62 | #define S5PC100_PA_ONENAND (0xE7100000) | ||
| 62 | 63 | ||
| 63 | /* DMA */ | 64 | /* DMA */ |
| 64 | #define S5PC100_PA_MDMA (0xE8100000) | 65 | #define S5PC100_PA_MDMA (0xE8100000) |
| @@ -67,84 +68,71 @@ | |||
| 67 | 68 | ||
| 68 | /* Timer */ | 69 | /* Timer */ |
| 69 | #define S5PC100_PA_TIMER (0xEA000000) | 70 | #define S5PC100_PA_TIMER (0xEA000000) |
| 70 | #define S5PC1XX_PA_TIMER S5PC100_PA_TIMER | 71 | #define S5P_PA_TIMER S5PC100_PA_TIMER |
| 71 | #define S5PC1XX_VA_TIMER S3C_VA_TIMER | ||
| 72 | 72 | ||
| 73 | /* RTC */ | 73 | #define S5PC100_PA_SYSTIMER (0xEA100000) |
| 74 | #define S5PC100_PA_RTC (0xEA300000) | ||
| 75 | 74 | ||
| 76 | /* UART */ | ||
| 77 | #define S5PC100_PA_UART (0xEC000000) | 75 | #define S5PC100_PA_UART (0xEC000000) |
| 78 | #define S5PC1XX_PA_UART S5PC100_PA_UART | ||
| 79 | #define S5PC1XX_VA_UART S3C_VA_UART | ||
| 80 | 76 | ||
| 81 | /* I2C */ | 77 | #define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) |
| 82 | #define S5PC100_PA_I2C (0xEC100000) | 78 | #define S5P_PA_UART1 (S5PC100_PA_UART + 0x400) |
| 83 | #define S5PC100_PA_I2C1 (0xEC200000) | 79 | #define S5P_PA_UART2 (S5PC100_PA_UART + 0x800) |
| 80 | #define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00) | ||
| 81 | #define S5P_SZ_UART SZ_256 | ||
| 82 | |||
| 83 | #define S5PC100_PA_IIC0 (0xEC100000) | ||
| 84 | #define S5PC100_PA_IIC1 (0xEC200000) | ||
| 85 | |||
| 86 | /* SPI */ | ||
| 87 | #define S5PC100_PA_SPI0 0xEC300000 | ||
| 88 | #define S5PC100_PA_SPI1 0xEC400000 | ||
| 89 | #define S5PC100_PA_SPI2 0xEC500000 | ||
| 84 | 90 | ||
| 85 | /* USB HS OTG */ | 91 | /* USB HS OTG */ |
| 86 | #define S5PC100_PA_USB_HSOTG (0xED200000) | 92 | #define S5PC100_PA_USB_HSOTG (0xED200000) |
| 87 | #define S5PC100_PA_USB_HSPHY (0xED300000) | 93 | #define S5PC100_PA_USB_HSPHY (0xED300000) |
| 88 | 94 | ||
| 89 | /* SD/MMC */ | ||
| 90 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) | ||
| 91 | #define S5PC100_PA_HSMMC0 S5PC100_PA_HSMMC(0) | ||
| 92 | #define S5PC100_PA_HSMMC1 S5PC100_PA_HSMMC(1) | ||
| 93 | #define S5PC100_PA_HSMMC2 S5PC100_PA_HSMMC(2) | ||
| 94 | |||
| 95 | /* LCD */ | ||
| 96 | #define S5PC100_PA_FB (0xEE000000) | 95 | #define S5PC100_PA_FB (0xEE000000) |
| 97 | 96 | ||
| 98 | /* Multimedia */ | ||
| 99 | #define S5PC100_PA_G2D (0xEE800000) | ||
| 100 | #define S5PC100_PA_JPEG (0xEE500000) | ||
| 101 | #define S5PC100_PA_ROTATOR (0xEE100000) | ||
| 102 | #define S5PC100_PA_G3D (0xEF000000) | ||
| 103 | |||
| 104 | /* I2S */ | ||
| 105 | #define S5PC100_PA_I2S0 (0xF2000000) | 97 | #define S5PC100_PA_I2S0 (0xF2000000) |
| 106 | #define S5PC100_PA_I2S1 (0xF2100000) | 98 | #define S5PC100_PA_I2S1 (0xF2100000) |
| 107 | #define S5PC100_PA_I2S2 (0xF2200000) | 99 | #define S5PC100_PA_I2S2 (0xF2200000) |
| 108 | 100 | ||
| 101 | #define S5PC100_PA_AC97 0xF2300000 | ||
| 102 | |||
| 103 | /* PCM */ | ||
| 104 | #define S5PC100_PA_PCM0 0xF2400000 | ||
| 105 | #define S5PC100_PA_PCM1 0xF2500000 | ||
| 106 | |||
| 109 | /* KEYPAD */ | 107 | /* KEYPAD */ |
| 110 | #define S5PC100_PA_KEYPAD (0xF3100000) | 108 | #define S5PC100_PA_KEYPAD (0xF3100000) |
| 111 | 109 | ||
| 112 | /* ADC & TouchScreen */ | 110 | #define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) |
| 113 | #define S5PC100_PA_TSADC (0xF3000000) | ||
| 114 | 111 | ||
| 115 | /* ETC */ | ||
| 116 | #define S5PC100_PA_SDRAM (0x20000000) | 112 | #define S5PC100_PA_SDRAM (0x20000000) |
| 117 | #define S5PC1XX_PA_SDRAM S5PC100_PA_SDRAM | 113 | #define S5P_PA_SDRAM S5PC100_PA_SDRAM |
| 118 | 114 | ||
| 119 | /* compatibility defines. */ | 115 | /* compatibiltiy defines. */ |
| 120 | #define S3C_PA_RTC S5PC100_PA_RTC | ||
| 121 | #define S3C_PA_UART S5PC100_PA_UART | 116 | #define S3C_PA_UART S5PC100_PA_UART |
| 122 | #define S3C_PA_UART0 (S5PC100_PA_UART + 0x0) | 117 | #define S3C_PA_IIC S5PC100_PA_IIC0 |
| 123 | #define S3C_PA_UART1 (S5PC100_PA_UART + 0x400) | 118 | #define S3C_PA_IIC1 S5PC100_PA_IIC1 |
| 124 | #define S3C_PA_UART2 (S5PC100_PA_UART + 0x800) | ||
| 125 | #define S3C_PA_UART3 (S5PC100_PA_UART + 0xC00) | ||
| 126 | #define S3C_VA_UART0 (S3C_VA_UART + 0x0) | ||
| 127 | #define S3C_VA_UART1 (S3C_VA_UART + 0x400) | ||
| 128 | #define S3C_VA_UART2 (S3C_VA_UART + 0x800) | ||
| 129 | #define S3C_VA_UART3 (S3C_VA_UART + 0xC00) | ||
| 130 | #define S3C_UART_OFFSET 0x400 | ||
| 131 | #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) | ||
| 132 | #define S3C_PA_FB S5PC100_PA_FB | 119 | #define S3C_PA_FB S5PC100_PA_FB |
| 133 | #define S3C_PA_G2D S5PC100_PA_G2D | 120 | #define S3C_PA_G2D S5PC100_PA_G2D |
| 134 | #define S3C_PA_G3D S5PC100_PA_G3D | 121 | #define S3C_PA_G3D S5PC100_PA_G3D |
| 135 | #define S3C_PA_JPEG S5PC100_PA_JPEG | 122 | #define S3C_PA_JPEG S5PC100_PA_JPEG |
| 136 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR | 123 | #define S3C_PA_ROTATOR S5PC100_PA_ROTATOR |
| 137 | #define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0) | 124 | #define S5P_VA_VIC0 S5PC1XX_VA_VIC(0) |
| 138 | #define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) | 125 | #define S5P_VA_VIC1 S5PC1XX_VA_VIC(1) |
| 139 | #define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000) | 126 | #define S5P_VA_VIC2 S5PC1XX_VA_VIC(2) |
| 140 | #define S3C_PA_IIC S5PC100_PA_I2C | ||
| 141 | #define S3C_PA_IIC1 S5PC100_PA_I2C1 | ||
| 142 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG | 127 | #define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG |
| 143 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY | 128 | #define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY |
| 144 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC0 | 129 | #define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) |
| 145 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC1 | 130 | #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) |
| 146 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2 | 131 | #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) |
| 147 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD | 132 | #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD |
| 148 | #define S3C_PA_TSADC S5PC100_PA_TSADC | 133 | #define S3C_PA_TSADC S5PC100_PA_TSADC |
| 134 | #define S3C_PA_ONENAND S5PC100_PA_ONENAND | ||
| 135 | #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF | ||
| 136 | #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF | ||
| 149 | 137 | ||
| 150 | #endif /* __ASM_ARCH_C100_MAP_H */ | 138 | #endif /* __ASM_ARCH_C100_MAP_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h index f2283bdc941e..5d27d286d504 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h | |||
| @@ -17,6 +17,8 @@ | |||
| 17 | 17 | ||
| 18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) | 18 | #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) |
| 19 | 19 | ||
| 20 | #define S5PC100_REG_OTHERS(x) (S5PC100_VA_OTHERS + (x)) | ||
| 21 | |||
| 20 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) | 22 | #define S5P_APLL_LOCK S5P_CLKREG(0x00) |
| 21 | #define S5P_MPLL_LOCK S5P_CLKREG(0x04) | 23 | #define S5P_MPLL_LOCK S5P_CLKREG(0x04) |
| 22 | #define S5P_EPLL_LOCK S5P_CLKREG(0x08) | 24 | #define S5P_EPLL_LOCK S5P_CLKREG(0x08) |
| @@ -68,4 +70,8 @@ | |||
| 68 | #define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16) | 70 | #define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16) |
| 69 | #define S5P_CLKDIV1_PCLKD1_SHIFT (16) | 71 | #define S5P_CLKDIV1_PCLKD1_SHIFT (16) |
| 70 | 72 | ||
| 73 | #define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000) | ||
| 74 | |||
| 75 | #define S5PC100_SWRESET_RESETVAL 0xc100 | ||
| 76 | |||
| 71 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ | 77 | #endif /* __ASM_ARCH_REGS_CLOCK_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h index 68666913354c..dd6295e1251d 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/regs-gpio.h | 1 | /* linux/arch/arm/plat-s5pc100/include/plat/regs-gpio.h |
| 2 | * | 2 | * |
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| @@ -12,7 +12,7 @@ | |||
| 12 | #include <mach/map.h> | 12 | #include <mach/map.h> |
| 13 | 13 | ||
| 14 | /* S5PC100 */ | 14 | /* S5PC100 */ |
| 15 | #define S5PC100_GPIO_BASE S5PC1XX_VA_GPIO | 15 | #define S5PC100_GPIO_BASE S5P_VA_GPIO |
| 16 | #define S5PC100_GPA0_BASE (S5PC100_GPIO_BASE + 0x0000) | 16 | #define S5PC100_GPA0_BASE (S5PC100_GPIO_BASE + 0x0000) |
| 17 | #define S5PC100_GPA1_BASE (S5PC100_GPIO_BASE + 0x0020) | 17 | #define S5PC100_GPA1_BASE (S5PC100_GPIO_BASE + 0x0020) |
| 18 | #define S5PC100_GPB_BASE (S5PC100_GPIO_BASE + 0x0040) | 18 | #define S5PC100_GPB_BASE (S5PC100_GPIO_BASE + 0x0040) |
| @@ -47,24 +47,29 @@ | |||
| 47 | #define S5PC100_GPL2_BASE (S5PC100_GPIO_BASE + 0x0360) | 47 | #define S5PC100_GPL2_BASE (S5PC100_GPIO_BASE + 0x0360) |
| 48 | #define S5PC100_GPL3_BASE (S5PC100_GPIO_BASE + 0x0380) | 48 | #define S5PC100_GPL3_BASE (S5PC100_GPIO_BASE + 0x0380) |
| 49 | #define S5PC100_GPL4_BASE (S5PC100_GPIO_BASE + 0x03A0) | 49 | #define S5PC100_GPL4_BASE (S5PC100_GPIO_BASE + 0x03A0) |
| 50 | #define S5PC100_EINT_BASE (S5PC100_GPIO_BASE + 0x0E00) | ||
| 51 | 50 | ||
| 52 | #define S5PC100_UHOST (S5PC100_GPIO_BASE + 0x0B68) | 51 | #define S5PC100EINT30CON (S5P_VA_GPIO + 0xE00) |
| 53 | #define S5PC100_PDNEN (S5PC100_GPIO_BASE + 0x0F80) | 52 | #define S5P_EINT_CON(x) (S5PC100EINT30CON + ((x) * 0x4)) |
| 54 | 53 | ||
| 55 | /* PDNEN */ | 54 | #define S5PC100EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) |
| 56 | #define S5PC100_PDNEN_CFG_PDNEN (1 << 1) | 55 | #define S5P_EINT_FLTCON(x) (S5PC100EINT30FLTCON0 + ((x) * 0x4)) |
| 57 | #define S5PC100_PDNEN_CFG_AUTO (0 << 1) | ||
| 58 | #define S5PC100_PDNEN_POWERDOWN (1 << 0) | ||
| 59 | #define S5PC100_PDNEN_NORMAL (0 << 0) | ||
| 60 | 56 | ||
| 61 | /* Common part */ | 57 | #define S5PC100EINT30MASK (S5P_VA_GPIO + 0xF00) |
| 62 | /* External interrupt base is same at both s5pc100 and s5pc110 */ | 58 | #define S5P_EINT_MASK(x) (S5PC100EINT30MASK + ((x) * 0x4)) |
| 63 | #define S5PC1XX_EINT_BASE (S5PC100_EINT_BASE) | ||
| 64 | 59 | ||
| 65 | #define S5PC100_GPx_INPUT(__gpio) (0x0 << ((__gpio) * 4)) | 60 | #define S5PC100EINT30PEND (S5P_VA_GPIO + 0xF40) |
| 66 | #define S5PC100_GPx_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) | 61 | #define S5P_EINT_PEND(x) (S5PC100EINT30PEND + ((x) * 0x4)) |
| 67 | #define S5PC100_GPx_CONMASK(__gpio) (0xf << ((__gpio) * 4)) | 62 | |
| 63 | #define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) | ||
| 64 | |||
| 65 | #define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) | ||
| 66 | |||
| 67 | /* values for S5P_EXTINT0 */ | ||
| 68 | #define S5P_EXTINT_LOWLEV (0x00) | ||
| 69 | #define S5P_EXTINT_HILEV (0x01) | ||
| 70 | #define S5P_EXTINT_FALLEDGE (0x02) | ||
| 71 | #define S5P_EXTINT_RISEEDGE (0x03) | ||
| 72 | #define S5P_EXTINT_BOTHEDGE (0x04) | ||
| 68 | 73 | ||
| 69 | #endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */ | 74 | #endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */ |
| 70 | 75 | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h index 751ac15438c8..4d9036d0f288 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-irq.h | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * | 5 | * |
| 6 | * S5PC1XX - IRQ register definitions | 6 | * S5PC100 - IRQ register definitions |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
| @@ -16,9 +16,4 @@ | |||
| 16 | #include <mach/map.h> | 16 | #include <mach/map.h> |
| 17 | #include <asm/hardware/vic.h> | 17 | #include <asm/hardware/vic.h> |
| 18 | 18 | ||
| 19 | /* interrupt controller */ | ||
| 20 | #define S5PC1XX_VIC0REG(x) ((x) + S5PC1XX_VA_VIC(0)) | ||
| 21 | #define S5PC1XX_VIC1REG(x) ((x) + S5PC1XX_VA_VIC(1)) | ||
| 22 | #define S5PC1XX_VIC2REG(x) ((x) + S5PC1XX_VA_VIC(2)) | ||
| 23 | |||
| 24 | #endif /* __ASM_ARCH_REGS_IRQ_H */ | 19 | #endif /* __ASM_ARCH_REGS_IRQ_H */ |
diff --git a/arch/arm/mach-s5pc100/include/mach/spi-clocks.h b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h new file mode 100644 index 000000000000..65e426370bb2 --- /dev/null +++ b/arch/arm/mach-s5pc100/include/mach/spi-clocks.h | |||
| @@ -0,0 +1,18 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pc100/include/mach/spi-clocks.h | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __S5PC100_PLAT_SPI_CLKS_H | ||
| 12 | #define __S5PC100_PLAT_SPI_CLKS_H __FILE__ | ||
| 13 | |||
| 14 | #define S5PC100_SPI_SRCCLK_PCLK 0 | ||
| 15 | #define S5PC100_SPI_SRCCLK_48M 1 | ||
| 16 | #define S5PC100_SPI_SRCCLK_SPIBUS 2 | ||
| 17 | |||
| 18 | #endif /* __S5PC100_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index f0d31a2a598c..681f626a9ae1 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * | 5 | * |
| 6 | * S5PC1XX - system implementation | 6 | * S5PC100 - system implementation |
| 7 | * | 7 | * |
| 8 | * Based on mach-s3c6400/include/mach/system.h | 8 | * Based on mach-s3c6400/include/mach/system.h |
| 9 | */ | 9 | */ |
| @@ -13,14 +13,11 @@ | |||
| 13 | 13 | ||
| 14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
| 15 | #include <mach/map.h> | 15 | #include <mach/map.h> |
| 16 | #include <plat/regs-clock.h> | 16 | #include <mach/regs-clock.h> |
| 17 | |||
| 18 | void (*s5pc1xx_idle)(void); | ||
| 19 | 17 | ||
| 20 | static void arch_idle(void) | 18 | static void arch_idle(void) |
| 21 | { | 19 | { |
| 22 | if (s5pc1xx_idle) | 20 | /* nothing here yet */ |
| 23 | s5pc1xx_idle(); | ||
| 24 | } | 21 | } |
| 25 | 22 | ||
| 26 | static void arch_reset(char mode, const char *cmd) | 23 | static void arch_reset(char mode, const char *cmd) |
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h index f338c9eec717..20f68730ed18 100644 --- a/arch/arm/mach-s5pc100/include/mach/tick.h +++ b/arch/arm/mach-s5pc100/include/mach/tick.h | |||
| @@ -20,8 +20,8 @@ | |||
| 20 | */ | 20 | */ |
| 21 | static inline u32 s3c24xx_ostimer_pending(void) | 21 | static inline u32 s3c24xx_ostimer_pending(void) |
| 22 | { | 22 | { |
| 23 | u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS); | 23 | u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); |
| 24 | return pend & 1 << (IRQ_TIMER4_VIC - S5PC1XX_IRQ_VIC0(0)); | 24 | return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); |
| 25 | } | 25 | } |
| 26 | 26 | ||
| 27 | #define TICK_MAX (0xffffffff) | 27 | #define TICK_MAX (0xffffffff) |
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-init.c b/arch/arm/mach-s5pc100/init.c index c58710884ceb..19d7b523c137 100644 --- a/arch/arm/plat-s5pc1xx/s5pc100-init.c +++ b/arch/arm/mach-s5pc100/init.c | |||
| @@ -1,9 +1,8 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/s5pc100-init.c | 1 | /* linux/arch/arm/plat-s5pc100/s5pc100-init.c |
| 2 | * | 2 | * |
| 3 | * Copyright 2009 Samsung Electronics Co. | 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> | 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * | 5 | * |
| 6 | * S5PC100 - CPU initialisation (common with other S5PC1XX chips) | ||
| 7 | * | 6 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
| @@ -19,9 +18,7 @@ | |||
| 19 | #include <plat/s5pc100.h> | 18 | #include <plat/s5pc100.h> |
| 20 | 19 | ||
| 21 | /* uart registration process */ | 20 | /* uart registration process */ |
| 22 | |||
| 23 | void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) | 21 | void __init s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) |
| 24 | { | 22 | { |
| 25 | /* The driver name is s3c6400-uart to reuse s3c6400_serial_drv */ | 23 | s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); |
| 26 | s3c24xx_init_uartdevs("s3c6400-uart", s5pc1xx_uart_resources, cfg, no); | ||
| 27 | } | 24 | } |
diff --git a/arch/arm/plat-s5pc1xx/irq-gpio.c b/arch/arm/mach-s5pc100/irq-gpio.c index fecca7a679b0..2bf86c18bc73 100644 --- a/arch/arm/plat-s5pc1xx/irq-gpio.c +++ b/arch/arm/mach-s5pc100/irq-gpio.c | |||
| @@ -1,9 +1,9 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/arm/plat-s5pc1xx/irq-gpio.c | 2 | * arch/arm/mach-s5pc100/irq-gpio.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2009 Samsung Electronics | 4 | * Copyright (C) 2009 Samsung Electronics |
| 5 | * | 5 | * |
| 6 | * S5PC1XX - Interrupt handling for IRQ_GPIO${group}(x) | 6 | * S5PC100 - Interrupt handling for IRQ_GPIO${group}(x) |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as | 9 | * it under the terms of the GNU General Public License version 2 as |
| @@ -19,7 +19,7 @@ | |||
| 19 | #include <mach/map.h> | 19 | #include <mach/map.h> |
| 20 | #include <plat/gpio-cfg.h> | 20 | #include <plat/gpio-cfg.h> |
| 21 | 21 | ||
| 22 | #define S5PC1XX_GPIOREG(x) (S5PC1XX_VA_GPIO + (x)) | 22 | #define S5P_GPIOREG(x) (S5P_VA_GPIO + (x)) |
| 23 | 23 | ||
| 24 | #define CON_OFFSET 0x700 | 24 | #define CON_OFFSET 0x700 |
| 25 | #define MASK_OFFSET 0x900 | 25 | #define MASK_OFFSET 0x900 |
| @@ -49,7 +49,7 @@ static int group_to_pend_offset(int group) | |||
| 49 | return group << 2; | 49 | return group << 2; |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | static int s5pc1xx_get_start(unsigned int group) | 52 | static int s5pc100_get_start(unsigned int group) |
| 53 | { | 53 | { |
| 54 | switch (group) { | 54 | switch (group) { |
| 55 | case 0: return S5PC100_GPIO_A0_START; | 55 | case 0: return S5PC100_GPIO_A0_START; |
| @@ -80,7 +80,7 @@ static int s5pc1xx_get_start(unsigned int group) | |||
| 80 | return -EINVAL; | 80 | return -EINVAL; |
| 81 | } | 81 | } |
| 82 | 82 | ||
| 83 | static int s5pc1xx_get_group(unsigned int irq) | 83 | static int s5pc100_get_group(unsigned int irq) |
| 84 | { | 84 | { |
| 85 | irq -= S3C_IRQ_GPIO(0); | 85 | irq -= S3C_IRQ_GPIO(0); |
| 86 | 86 | ||
| @@ -134,67 +134,67 @@ static int s5pc1xx_get_group(unsigned int irq) | |||
| 134 | return -EINVAL; | 134 | return -EINVAL; |
| 135 | } | 135 | } |
| 136 | 136 | ||
| 137 | static int s5pc1xx_get_offset(unsigned int irq) | 137 | static int s5pc100_get_offset(unsigned int irq) |
| 138 | { | 138 | { |
| 139 | struct gpio_chip *chip = get_irq_data(irq); | 139 | struct gpio_chip *chip = get_irq_data(irq); |
| 140 | return irq - S3C_IRQ_GPIO(chip->base); | 140 | return irq - S3C_IRQ_GPIO(chip->base); |
| 141 | } | 141 | } |
| 142 | 142 | ||
| 143 | static void s5pc1xx_gpioint_ack(unsigned int irq) | 143 | static void s5pc100_gpioint_ack(unsigned int irq) |
| 144 | { | 144 | { |
| 145 | int group, offset, pend_offset; | 145 | int group, offset, pend_offset; |
| 146 | unsigned int value; | 146 | unsigned int value; |
| 147 | 147 | ||
| 148 | group = s5pc1xx_get_group(irq); | 148 | group = s5pc100_get_group(irq); |
| 149 | offset = s5pc1xx_get_offset(irq); | 149 | offset = s5pc100_get_offset(irq); |
| 150 | pend_offset = group_to_pend_offset(group); | 150 | pend_offset = group_to_pend_offset(group); |
| 151 | 151 | ||
| 152 | value = __raw_readl(S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | 152 | value = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset); |
| 153 | value |= 1 << offset; | 153 | value |= 1 << offset; |
| 154 | __raw_writel(value, S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | 154 | __raw_writel(value, S5P_GPIOREG(PEND_OFFSET) + pend_offset); |
| 155 | } | 155 | } |
| 156 | 156 | ||
| 157 | static void s5pc1xx_gpioint_mask(unsigned int irq) | 157 | static void s5pc100_gpioint_mask(unsigned int irq) |
| 158 | { | 158 | { |
| 159 | int group, offset, mask_offset; | 159 | int group, offset, mask_offset; |
| 160 | unsigned int value; | 160 | unsigned int value; |
| 161 | 161 | ||
| 162 | group = s5pc1xx_get_group(irq); | 162 | group = s5pc100_get_group(irq); |
| 163 | offset = s5pc1xx_get_offset(irq); | 163 | offset = s5pc100_get_offset(irq); |
| 164 | mask_offset = group_to_mask_offset(group); | 164 | mask_offset = group_to_mask_offset(group); |
| 165 | 165 | ||
| 166 | value = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 166 | value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 167 | value |= 1 << offset; | 167 | value |= 1 << offset; |
| 168 | __raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 168 | __raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 169 | } | 169 | } |
| 170 | 170 | ||
| 171 | static void s5pc1xx_gpioint_unmask(unsigned int irq) | 171 | static void s5pc100_gpioint_unmask(unsigned int irq) |
| 172 | { | 172 | { |
| 173 | int group, offset, mask_offset; | 173 | int group, offset, mask_offset; |
| 174 | unsigned int value; | 174 | unsigned int value; |
| 175 | 175 | ||
| 176 | group = s5pc1xx_get_group(irq); | 176 | group = s5pc100_get_group(irq); |
| 177 | offset = s5pc1xx_get_offset(irq); | 177 | offset = s5pc100_get_offset(irq); |
| 178 | mask_offset = group_to_mask_offset(group); | 178 | mask_offset = group_to_mask_offset(group); |
| 179 | 179 | ||
| 180 | value = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 180 | value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 181 | value &= ~(1 << offset); | 181 | value &= ~(1 << offset); |
| 182 | __raw_writel(value, S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 182 | __raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 183 | } | 183 | } |
| 184 | 184 | ||
| 185 | static void s5pc1xx_gpioint_mask_ack(unsigned int irq) | 185 | static void s5pc100_gpioint_mask_ack(unsigned int irq) |
| 186 | { | 186 | { |
| 187 | s5pc1xx_gpioint_mask(irq); | 187 | s5pc100_gpioint_mask(irq); |
| 188 | s5pc1xx_gpioint_ack(irq); | 188 | s5pc100_gpioint_ack(irq); |
| 189 | } | 189 | } |
| 190 | 190 | ||
| 191 | static int s5pc1xx_gpioint_set_type(unsigned int irq, unsigned int type) | 191 | static int s5pc100_gpioint_set_type(unsigned int irq, unsigned int type) |
| 192 | { | 192 | { |
| 193 | int group, offset, con_offset; | 193 | int group, offset, con_offset; |
| 194 | unsigned int value; | 194 | unsigned int value; |
| 195 | 195 | ||
| 196 | group = s5pc1xx_get_group(irq); | 196 | group = s5pc100_get_group(irq); |
| 197 | offset = s5pc1xx_get_offset(irq); | 197 | offset = s5pc100_get_offset(irq); |
| 198 | con_offset = group_to_con_offset(group); | 198 | con_offset = group_to_con_offset(group); |
| 199 | 199 | ||
| 200 | switch (type) { | 200 | switch (type) { |
| @@ -221,24 +221,24 @@ static int s5pc1xx_gpioint_set_type(unsigned int irq, unsigned int type) | |||
| 221 | } | 221 | } |
| 222 | 222 | ||
| 223 | 223 | ||
| 224 | value = __raw_readl(S5PC1XX_GPIOREG(CON_OFFSET) + con_offset); | 224 | value = __raw_readl(S5P_GPIOREG(CON_OFFSET) + con_offset); |
| 225 | value &= ~(0xf << (offset * 0x4)); | 225 | value &= ~(0xf << (offset * 0x4)); |
| 226 | value |= (type << (offset * 0x4)); | 226 | value |= (type << (offset * 0x4)); |
| 227 | __raw_writel(value, S5PC1XX_GPIOREG(CON_OFFSET) + con_offset); | 227 | __raw_writel(value, S5P_GPIOREG(CON_OFFSET) + con_offset); |
| 228 | 228 | ||
| 229 | return 0; | 229 | return 0; |
| 230 | } | 230 | } |
| 231 | 231 | ||
| 232 | struct irq_chip s5pc1xx_gpioint = { | 232 | struct irq_chip s5pc100_gpioint = { |
| 233 | .name = "GPIO", | 233 | .name = "GPIO", |
| 234 | .ack = s5pc1xx_gpioint_ack, | 234 | .ack = s5pc100_gpioint_ack, |
| 235 | .mask = s5pc1xx_gpioint_mask, | 235 | .mask = s5pc100_gpioint_mask, |
| 236 | .mask_ack = s5pc1xx_gpioint_mask_ack, | 236 | .mask_ack = s5pc100_gpioint_mask_ack, |
| 237 | .unmask = s5pc1xx_gpioint_unmask, | 237 | .unmask = s5pc100_gpioint_unmask, |
| 238 | .set_type = s5pc1xx_gpioint_set_type, | 238 | .set_type = s5pc100_gpioint_set_type, |
| 239 | }; | 239 | }; |
| 240 | 240 | ||
| 241 | void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc) | 241 | void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc) |
| 242 | { | 242 | { |
| 243 | int group, offset, pend_offset, mask_offset; | 243 | int group, offset, pend_offset, mask_offset; |
| 244 | int real_irq, group_end; | 244 | int real_irq, group_end; |
| @@ -248,17 +248,17 @@ void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc) | |||
| 248 | 248 | ||
| 249 | for (group = 0; group < group_end; group++) { | 249 | for (group = 0; group < group_end; group++) { |
| 250 | pend_offset = group_to_pend_offset(group); | 250 | pend_offset = group_to_pend_offset(group); |
| 251 | pend = __raw_readl(S5PC1XX_GPIOREG(PEND_OFFSET) + pend_offset); | 251 | pend = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset); |
| 252 | if (!pend) | 252 | if (!pend) |
| 253 | continue; | 253 | continue; |
| 254 | 254 | ||
| 255 | mask_offset = group_to_mask_offset(group); | 255 | mask_offset = group_to_mask_offset(group); |
| 256 | mask = __raw_readl(S5PC1XX_GPIOREG(MASK_OFFSET) + mask_offset); | 256 | mask = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset); |
| 257 | pend &= ~mask; | 257 | pend &= ~mask; |
| 258 | 258 | ||
| 259 | for (offset = 0; offset < 8; offset++) { | 259 | for (offset = 0; offset < 8; offset++) { |
| 260 | if (pend & (1 << offset)) { | 260 | if (pend & (1 << offset)) { |
| 261 | real_irq = s5pc1xx_get_start(group) + offset; | 261 | real_irq = s5pc100_get_start(group) + offset; |
| 262 | generic_handle_irq(S3C_IRQ_GPIO(real_irq)); | 262 | generic_handle_irq(S3C_IRQ_GPIO(real_irq)); |
| 263 | } | 263 | } |
| 264 | } | 264 | } |
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c index bfe67db34f04..af22f8202a07 100644 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/arch/arm/mach-s5pc100/mach-smdkc100.c | |||
| @@ -43,38 +43,48 @@ | |||
| 43 | #include <plat/fb.h> | 43 | #include <plat/fb.h> |
| 44 | #include <plat/iic.h> | 44 | #include <plat/iic.h> |
| 45 | 45 | ||
| 46 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) | 46 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
| 47 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) | 47 | #define S5PC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| 48 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) | 48 | S3C2410_UCON_RXILEVEL | \ |
| 49 | S3C2410_UCON_TXIRQMODE | \ | ||
| 50 | S3C2410_UCON_RXIRQMODE | \ | ||
| 51 | S3C2410_UCON_RXFIFO_TOI | \ | ||
| 52 | S3C2443_UCON_RXERR_IRQEN) | ||
| 53 | |||
| 54 | #define S5PC100_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
| 55 | |||
| 56 | #define S5PC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
| 57 | S3C2440_UFCON_RXTRIG8 | \ | ||
| 58 | S3C2440_UFCON_TXTRIG16) | ||
| 49 | 59 | ||
| 50 | static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { | 60 | static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { |
| 51 | [0] = { | 61 | [0] = { |
| 52 | .hwport = 0, | 62 | .hwport = 0, |
| 53 | .flags = 0, | 63 | .flags = 0, |
| 54 | .ucon = 0x3c5, | 64 | .ucon = S5PC100_UCON_DEFAULT, |
| 55 | .ulcon = 0x03, | 65 | .ulcon = S5PC100_ULCON_DEFAULT, |
| 56 | .ufcon = 0x51, | 66 | .ufcon = S5PC100_UFCON_DEFAULT, |
| 57 | }, | 67 | }, |
| 58 | [1] = { | 68 | [1] = { |
| 59 | .hwport = 1, | 69 | .hwport = 1, |
| 60 | .flags = 0, | 70 | .flags = 0, |
| 61 | .ucon = 0x3c5, | 71 | .ucon = S5PC100_UCON_DEFAULT, |
| 62 | .ulcon = 0x03, | 72 | .ulcon = S5PC100_ULCON_DEFAULT, |
| 63 | .ufcon = 0x51, | 73 | .ufcon = S5PC100_UFCON_DEFAULT, |
| 64 | }, | 74 | }, |
| 65 | [2] = { | 75 | [2] = { |
| 66 | .hwport = 2, | 76 | .hwport = 2, |
| 67 | .flags = 0, | 77 | .flags = 0, |
| 68 | .ucon = 0x3c5, | 78 | .ucon = S5PC100_UCON_DEFAULT, |
| 69 | .ulcon = 0x03, | 79 | .ulcon = S5PC100_ULCON_DEFAULT, |
| 70 | .ufcon = 0x51, | 80 | .ufcon = S5PC100_UFCON_DEFAULT, |
| 71 | }, | 81 | }, |
| 72 | [3] = { | 82 | [3] = { |
| 73 | .hwport = 3, | 83 | .hwport = 3, |
| 74 | .flags = 0, | 84 | .flags = 0, |
| 75 | .ucon = 0x3c5, | 85 | .ucon = S5PC100_UCON_DEFAULT, |
| 76 | .ulcon = 0x03, | 86 | .ulcon = S5PC100_ULCON_DEFAULT, |
| 77 | .ufcon = 0x51, | 87 | .ufcon = S5PC100_UFCON_DEFAULT, |
| 78 | }, | 88 | }, |
| 79 | }; | 89 | }; |
| 80 | 90 | ||
| @@ -118,8 +128,7 @@ static struct platform_device smdkc100_lcd_powerdev = { | |||
| 118 | static struct s3c_fb_pd_win smdkc100_fb_win0 = { | 128 | static struct s3c_fb_pd_win smdkc100_fb_win0 = { |
| 119 | /* this is to ensure we use win0 */ | 129 | /* this is to ensure we use win0 */ |
| 120 | .win_mode = { | 130 | .win_mode = { |
| 121 | .refresh = 70, | 131 | .pixclock = 1000000000000ULL / ((8+13+3+800)*(7+5+1+480)*80), |
| 122 | .pixclock = (8+13+3+800)*(7+5+1+480), | ||
| 123 | .left_margin = 8, | 132 | .left_margin = 8, |
| 124 | .right_margin = 13, | 133 | .right_margin = 13, |
| 125 | .upper_margin = 7, | 134 | .upper_margin = 7, |
| @@ -140,8 +149,6 @@ static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = { | |||
| 140 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, | 149 | .setup_gpio = s5pc100_fb_gpio_setup_24bpp, |
| 141 | }; | 150 | }; |
| 142 | 151 | ||
| 143 | static struct map_desc smdkc100_iodesc[] = {}; | ||
| 144 | |||
| 145 | static struct platform_device *smdkc100_devices[] __initdata = { | 152 | static struct platform_device *smdkc100_devices[] __initdata = { |
| 146 | &s3c_device_i2c0, | 153 | &s3c_device_i2c0, |
| 147 | &s3c_device_i2c1, | 154 | &s3c_device_i2c1, |
| @@ -150,11 +157,13 @@ static struct platform_device *smdkc100_devices[] __initdata = { | |||
| 150 | &s3c_device_hsmmc1, | 157 | &s3c_device_hsmmc1, |
| 151 | &s3c_device_hsmmc2, | 158 | &s3c_device_hsmmc2, |
| 152 | &smdkc100_lcd_powerdev, | 159 | &smdkc100_lcd_powerdev, |
| 160 | &s5pc100_device_iis0, | ||
| 161 | &s5pc100_device_ac97, | ||
| 153 | }; | 162 | }; |
| 154 | 163 | ||
| 155 | static void __init smdkc100_map_io(void) | 164 | static void __init smdkc100_map_io(void) |
| 156 | { | 165 | { |
| 157 | s5pc1xx_init_io(smdkc100_iodesc, ARRAY_SIZE(smdkc100_iodesc)); | 166 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
| 158 | s3c24xx_init_clocks(12000000); | 167 | s3c24xx_init_clocks(12000000); |
| 159 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); | 168 | s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); |
| 160 | } | 169 | } |
| @@ -178,10 +187,9 @@ static void __init smdkc100_machine_init(void) | |||
| 178 | 187 | ||
| 179 | MACHINE_START(SMDKC100, "SMDKC100") | 188 | MACHINE_START(SMDKC100, "SMDKC100") |
| 180 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ | 189 | /* Maintainer: Byungho Min <bhmin@samsung.com> */ |
| 181 | .phys_io = S5PC100_PA_UART & 0xfff00000, | 190 | .phys_io = S3C_PA_UART & 0xfff00000, |
| 182 | .io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc, | 191 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, |
| 183 | .boot_params = S5PC100_PA_SDRAM + 0x100, | 192 | .boot_params = S5P_PA_SDRAM + 0x100, |
| 184 | |||
| 185 | .init_irq = s5pc100_init_irq, | 193 | .init_irq = s5pc100_init_irq, |
| 186 | .map_io = smdkc100_map_io, | 194 | .map_io = smdkc100_map_io, |
| 187 | .init_machine = smdkc100_machine_init, | 195 | .init_machine = smdkc100_machine_init, |
diff --git a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c index 185c8941e644..7769c760c9ef 100644 --- a/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c | |||
| @@ -1,8 +1,8 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c | 1 | /* linux/arch/arm/plat-s5pc100/setup-sdhci-gpio.c |
| 2 | * | 2 | * |
| 3 | * Copyright 2009 Samsung Eletronics | 3 | * Copyright 2009 Samsung Eletronics |
| 4 | * | 4 | * |
| 5 | * S5PC1XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) | 5 | * S5PC100 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) |
| 6 | * | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 7601c28e240b..0761eac9aaea 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig | |||
| @@ -13,18 +13,68 @@ config CPU_S5PV210 | |||
| 13 | bool | 13 | bool |
| 14 | select PLAT_S5P | 14 | select PLAT_S5P |
| 15 | select S3C_PL330_DMA | 15 | select S3C_PL330_DMA |
| 16 | select S5P_EXT_INT | ||
| 16 | help | 17 | help |
| 17 | Enable S5PV210 CPU support | 18 | Enable S5PV210 CPU support |
| 18 | 19 | ||
| 19 | choice | 20 | config S5PV210_SETUP_I2C1 |
| 20 | prompt "Select machine type" | 21 | bool |
| 21 | depends on ARCH_S5PV210 | 22 | help |
| 22 | default MACH_SMDKV210 | 23 | Common setup code for i2c bus 1. |
| 24 | |||
| 25 | config S5PV210_SETUP_I2C2 | ||
| 26 | bool | ||
| 27 | help | ||
| 28 | Common setup code for i2c bus 2. | ||
| 29 | |||
| 30 | config S5PV210_SETUP_FB_24BPP | ||
| 31 | bool | ||
| 32 | help | ||
| 33 | Common setup code for S5PV210 with an 24bpp RGB display helper. | ||
| 34 | |||
| 35 | config S5PV210_SETUP_SDHCI | ||
| 36 | bool | ||
| 37 | select S5PV210_SETUP_SDHCI_GPIO | ||
| 38 | help | ||
| 39 | Internal helper functions for S5PV210 based SDHCI systems | ||
| 40 | |||
| 41 | config S5PV210_SETUP_SDHCI_GPIO | ||
| 42 | bool | ||
| 43 | help | ||
| 44 | Common setup code for SDHCI gpio. | ||
| 45 | |||
| 46 | # machine support | ||
| 47 | |||
| 48 | config MACH_AQUILA | ||
| 49 | bool "Samsung Aquila" | ||
| 50 | select CPU_S5PV210 | ||
| 51 | select ARCH_SPARSEMEM_ENABLE | ||
| 52 | select S5PV210_SETUP_FB_24BPP | ||
| 53 | select S3C_DEV_FB | ||
| 54 | help | ||
| 55 | Machine support for the Samsung Aquila target based on S5PC110 SoC | ||
| 56 | |||
| 57 | config MACH_GONI | ||
| 58 | bool "GONI" | ||
| 59 | select CPU_S5PV210 | ||
| 60 | select ARCH_SPARSEMEM_ENABLE | ||
| 61 | help | ||
| 62 | Machine support for Samsung GONI board | ||
| 63 | S5PC110(MCP) is one of package option of S5PV210 | ||
| 64 | |||
| 65 | config S5PC110_DEV_ONENAND | ||
| 66 | bool | ||
| 67 | help | ||
| 68 | Compile in platform device definition for OneNAND1 controller | ||
| 23 | 69 | ||
| 24 | config MACH_SMDKV210 | 70 | config MACH_SMDKV210 |
| 25 | bool "SMDKV210" | 71 | bool "SMDKV210" |
| 26 | select CPU_S5PV210 | 72 | select CPU_S5PV210 |
| 27 | select ARCH_SPARSEMEM_ENABLE | 73 | select ARCH_SPARSEMEM_ENABLE |
| 74 | select SAMSUNG_DEV_ADC | ||
| 75 | select SAMSUNG_DEV_TS | ||
| 76 | select S3C_DEV_WDT | ||
| 77 | select HAVE_S3C2410_WATCHDOG | ||
| 28 | help | 78 | help |
| 29 | Machine support for Samsung SMDKV210 | 79 | Machine support for Samsung SMDKV210 |
| 30 | 80 | ||
| @@ -32,10 +82,10 @@ config MACH_SMDKC110 | |||
| 32 | bool "SMDKC110" | 82 | bool "SMDKC110" |
| 33 | select CPU_S5PV210 | 83 | select CPU_S5PV210 |
| 34 | select ARCH_SPARSEMEM_ENABLE | 84 | select ARCH_SPARSEMEM_ENABLE |
| 85 | select S3C_DEV_WDT | ||
| 86 | select HAVE_S3C2410_WATCHDOG | ||
| 35 | help | 87 | help |
| 36 | Machine support for Samsung SMDKC110 | 88 | Machine support for Samsung SMDKC110 |
| 37 | S5PC110(MCP) is one of package option of S5PV210 | 89 | S5PC110(MCP) is one of package option of S5PV210 |
| 38 | 90 | ||
| 39 | endchoice | ||
| 40 | |||
| 41 | endif | 91 | endif |
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index 99827813d293..30be9a6a4620 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile | |||
| @@ -17,9 +17,19 @@ obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o | |||
| 17 | 17 | ||
| 18 | # machine support | 18 | # machine support |
| 19 | 19 | ||
| 20 | obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o | ||
| 20 | obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o | 21 | obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o |
| 21 | obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o | 22 | obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o |
| 23 | obj-$(CONFIG_MACH_GONI) += mach-goni.o | ||
| 22 | 24 | ||
| 23 | # device support | 25 | # device support |
| 24 | 26 | ||
| 25 | obj-y += dev-audio.o | 27 | obj-y += dev-audio.o |
| 28 | obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o | ||
| 29 | obj-$(CONFIG_S5PC110_DEV_ONENAND) += dev-onenand.o | ||
| 30 | |||
| 31 | obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o | ||
| 32 | obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o | ||
| 33 | obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o | ||
| 34 | obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o | ||
| 35 | obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c index 2b776eb5d150..411a4a9cbfc7 100644 --- a/arch/arm/mach-s5pv210/cpu.c +++ b/arch/arm/mach-s5pv210/cpu.c | |||
| @@ -32,6 +32,8 @@ | |||
| 32 | #include <plat/devs.h> | 32 | #include <plat/devs.h> |
| 33 | #include <plat/clock.h> | 33 | #include <plat/clock.h> |
| 34 | #include <plat/s5pv210.h> | 34 | #include <plat/s5pv210.h> |
| 35 | #include <plat/iic-core.h> | ||
| 36 | #include <plat/sdhci.h> | ||
| 35 | 37 | ||
| 36 | /* Initial IO mappings */ | 38 | /* Initial IO mappings */ |
| 37 | 39 | ||
| @@ -74,7 +76,21 @@ static void s5pv210_idle(void) | |||
| 74 | 76 | ||
| 75 | void __init s5pv210_map_io(void) | 77 | void __init s5pv210_map_io(void) |
| 76 | { | 78 | { |
| 79 | #ifdef CONFIG_S3C_DEV_ADC | ||
| 80 | s3c_device_adc.name = "s3c64xx-adc"; | ||
| 81 | #endif | ||
| 82 | |||
| 77 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); | 83 | iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); |
| 84 | |||
| 85 | /* initialise device information early */ | ||
| 86 | s5pv210_default_sdhci0(); | ||
| 87 | s5pv210_default_sdhci1(); | ||
| 88 | s5pv210_default_sdhci2(); | ||
| 89 | |||
| 90 | /* the i2c devices are directly compatible with s3c2440 */ | ||
| 91 | s3c_i2c0_setname("s3c2440-i2c"); | ||
| 92 | s3c_i2c1_setname("s3c2440-i2c"); | ||
| 93 | s3c_i2c2_setname("s3c2440-i2c"); | ||
| 78 | } | 94 | } |
| 79 | 95 | ||
| 80 | void __init s5pv210_init_clocks(int xtal) | 96 | void __init s5pv210_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s5pv210/dev-onenand.c b/arch/arm/mach-s5pv210/dev-onenand.c new file mode 100644 index 000000000000..34997b752f93 --- /dev/null +++ b/arch/arm/mach-s5pv210/dev-onenand.c | |||
| @@ -0,0 +1,50 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/mach-s5pv210/dev-onenand.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008-2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * S5PC110 series device definition for OneNAND devices | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/mtd/mtd.h> | ||
| 17 | #include <linux/mtd/onenand.h> | ||
| 18 | |||
| 19 | #include <mach/irqs.h> | ||
| 20 | #include <mach/map.h> | ||
| 21 | |||
| 22 | static struct resource s5pc110_onenand_resources[] = { | ||
| 23 | [0] = { | ||
| 24 | .start = S5PC110_PA_ONENAND, | ||
| 25 | .end = S5PC110_PA_ONENAND + SZ_128K - 1, | ||
| 26 | .flags = IORESOURCE_MEM, | ||
| 27 | }, | ||
| 28 | [1] = { | ||
| 29 | .start = S5PC110_PA_ONENAND_DMA, | ||
| 30 | .end = S5PC110_PA_ONENAND_DMA + SZ_2K - 1, | ||
| 31 | .flags = IORESOURCE_MEM, | ||
| 32 | }, | ||
| 33 | }; | ||
| 34 | |||
| 35 | struct platform_device s5pc110_device_onenand = { | ||
| 36 | .name = "s5pc110-onenand", | ||
| 37 | .id = -1, | ||
| 38 | .num_resources = ARRAY_SIZE(s5pc110_onenand_resources), | ||
| 39 | .resource = s5pc110_onenand_resources, | ||
| 40 | }; | ||
| 41 | |||
| 42 | void s5pc110_onenand_set_platdata(struct onenand_platform_data *pdata) | ||
| 43 | { | ||
| 44 | struct onenand_platform_data *pd; | ||
| 45 | |||
| 46 | pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); | ||
| 47 | if (!pd) | ||
| 48 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | ||
| 49 | s5pc110_device_onenand.dev.platform_data = pd; | ||
| 50 | } | ||
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c new file mode 100644 index 000000000000..337a62b57a0b --- /dev/null +++ b/arch/arm/mach-s5pv210/dev-spi.c | |||
| @@ -0,0 +1,178 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/dev-spi.c | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/platform_device.h> | ||
| 12 | #include <linux/dma-mapping.h> | ||
| 13 | |||
| 14 | #include <mach/dma.h> | ||
| 15 | #include <mach/map.h> | ||
| 16 | #include <mach/irqs.h> | ||
| 17 | #include <mach/gpio.h> | ||
| 18 | #include <mach/spi-clocks.h> | ||
| 19 | |||
| 20 | #include <plat/s3c64xx-spi.h> | ||
| 21 | #include <plat/gpio-cfg.h> | ||
| 22 | |||
| 23 | static char *spi_src_clks[] = { | ||
| 24 | [S5PV210_SPI_SRCCLK_PCLK] = "pclk", | ||
| 25 | [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi", | ||
| 26 | }; | ||
| 27 | |||
| 28 | /* SPI Controller platform_devices */ | ||
| 29 | |||
| 30 | /* Since we emulate multi-cs capability, we do not touch the CS. | ||
| 31 | * The emulated CS is toggled by board specific mechanism, as it can | ||
| 32 | * be either some immediate GPIO or some signal out of some other | ||
| 33 | * chip in between ... or some yet another way. | ||
| 34 | * We simply do not assume anything about CS. | ||
| 35 | */ | ||
| 36 | static int s5pv210_spi_cfg_gpio(struct platform_device *pdev) | ||
| 37 | { | ||
| 38 | switch (pdev->id) { | ||
| 39 | case 0: | ||
| 40 | s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2)); | ||
| 41 | s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2)); | ||
| 43 | s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP); | ||
| 44 | s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP); | ||
| 45 | s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP); | ||
| 46 | break; | ||
| 47 | |||
| 48 | case 1: | ||
| 49 | s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2)); | ||
| 50 | s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2)); | ||
| 51 | s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2)); | ||
| 52 | s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP); | ||
| 53 | s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP); | ||
| 54 | s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP); | ||
| 55 | break; | ||
| 56 | |||
| 57 | default: | ||
| 58 | dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
| 59 | return -EINVAL; | ||
| 60 | } | ||
| 61 | |||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | static struct resource s5pv210_spi0_resource[] = { | ||
| 66 | [0] = { | ||
| 67 | .start = S5PV210_PA_SPI0, | ||
| 68 | .end = S5PV210_PA_SPI0 + 0x100 - 1, | ||
| 69 | .flags = IORESOURCE_MEM, | ||
| 70 | }, | ||
| 71 | [1] = { | ||
| 72 | .start = DMACH_SPI0_TX, | ||
| 73 | .end = DMACH_SPI0_TX, | ||
| 74 | .flags = IORESOURCE_DMA, | ||
| 75 | }, | ||
| 76 | [2] = { | ||
| 77 | .start = DMACH_SPI0_RX, | ||
| 78 | .end = DMACH_SPI0_RX, | ||
| 79 | .flags = IORESOURCE_DMA, | ||
| 80 | }, | ||
| 81 | [3] = { | ||
| 82 | .start = IRQ_SPI0, | ||
| 83 | .end = IRQ_SPI0, | ||
| 84 | .flags = IORESOURCE_IRQ, | ||
| 85 | }, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct s3c64xx_spi_info s5pv210_spi0_pdata = { | ||
| 89 | .cfg_gpio = s5pv210_spi_cfg_gpio, | ||
| 90 | .fifo_lvl_mask = 0x1ff, | ||
| 91 | .rx_lvl_offset = 15, | ||
| 92 | .high_speed = 1, | ||
| 93 | }; | ||
| 94 | |||
| 95 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
| 96 | |||
| 97 | struct platform_device s5pv210_device_spi0 = { | ||
| 98 | .name = "s3c64xx-spi", | ||
| 99 | .id = 0, | ||
| 100 | .num_resources = ARRAY_SIZE(s5pv210_spi0_resource), | ||
| 101 | .resource = s5pv210_spi0_resource, | ||
| 102 | .dev = { | ||
| 103 | .dma_mask = &spi_dmamask, | ||
| 104 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 105 | .platform_data = &s5pv210_spi0_pdata, | ||
| 106 | }, | ||
| 107 | }; | ||
| 108 | |||
| 109 | static struct resource s5pv210_spi1_resource[] = { | ||
| 110 | [0] = { | ||
| 111 | .start = S5PV210_PA_SPI1, | ||
| 112 | .end = S5PV210_PA_SPI1 + 0x100 - 1, | ||
| 113 | .flags = IORESOURCE_MEM, | ||
| 114 | }, | ||
| 115 | [1] = { | ||
| 116 | .start = DMACH_SPI1_TX, | ||
| 117 | .end = DMACH_SPI1_TX, | ||
| 118 | .flags = IORESOURCE_DMA, | ||
| 119 | }, | ||
| 120 | [2] = { | ||
| 121 | .start = DMACH_SPI1_RX, | ||
| 122 | .end = DMACH_SPI1_RX, | ||
| 123 | .flags = IORESOURCE_DMA, | ||
| 124 | }, | ||
| 125 | [3] = { | ||
| 126 | .start = IRQ_SPI1, | ||
| 127 | .end = IRQ_SPI1, | ||
| 128 | .flags = IORESOURCE_IRQ, | ||
| 129 | }, | ||
| 130 | }; | ||
| 131 | |||
| 132 | static struct s3c64xx_spi_info s5pv210_spi1_pdata = { | ||
| 133 | .cfg_gpio = s5pv210_spi_cfg_gpio, | ||
| 134 | .fifo_lvl_mask = 0x7f, | ||
| 135 | .rx_lvl_offset = 15, | ||
| 136 | .high_speed = 1, | ||
| 137 | }; | ||
| 138 | |||
| 139 | struct platform_device s5pv210_device_spi1 = { | ||
| 140 | .name = "s3c64xx-spi", | ||
| 141 | .id = 1, | ||
| 142 | .num_resources = ARRAY_SIZE(s5pv210_spi1_resource), | ||
| 143 | .resource = s5pv210_spi1_resource, | ||
| 144 | .dev = { | ||
| 145 | .dma_mask = &spi_dmamask, | ||
| 146 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
| 147 | .platform_data = &s5pv210_spi1_pdata, | ||
| 148 | }, | ||
| 149 | }; | ||
| 150 | |||
| 151 | void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
| 152 | { | ||
| 153 | struct s3c64xx_spi_info *pd; | ||
| 154 | |||
| 155 | /* Reject invalid configuration */ | ||
| 156 | if (!num_cs || src_clk_nr < 0 | ||
| 157 | || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) { | ||
| 158 | printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
| 159 | return; | ||
| 160 | } | ||
| 161 | |||
| 162 | switch (cntrlr) { | ||
| 163 | case 0: | ||
| 164 | pd = &s5pv210_spi0_pdata; | ||
| 165 | break; | ||
| 166 | case 1: | ||
| 167 | pd = &s5pv210_spi1_pdata; | ||
| 168 | break; | ||
| 169 | default: | ||
| 170 | printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
| 171 | __func__, cntrlr); | ||
| 172 | return; | ||
| 173 | } | ||
| 174 | |||
| 175 | pd->num_cs = num_cs; | ||
| 176 | pd->src_clk_nr = src_clk_nr; | ||
| 177 | pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
| 178 | } | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index 62c5175ef291..96895378ea27 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h | |||
| @@ -17,22 +17,6 @@ | |||
| 17 | 17 | ||
| 18 | /* VIC0: System, DMA, Timer */ | 18 | /* VIC0: System, DMA, Timer */ |
| 19 | 19 | ||
| 20 | #define IRQ_EINT0 S5P_IRQ_VIC0(0) | ||
| 21 | #define IRQ_EINT1 S5P_IRQ_VIC0(1) | ||
| 22 | #define IRQ_EINT2 S5P_IRQ_VIC0(2) | ||
| 23 | #define IRQ_EINT3 S5P_IRQ_VIC0(3) | ||
| 24 | #define IRQ_EINT4 S5P_IRQ_VIC0(4) | ||
| 25 | #define IRQ_EINT5 S5P_IRQ_VIC0(5) | ||
| 26 | #define IRQ_EINT6 S5P_IRQ_VIC0(6) | ||
| 27 | #define IRQ_EINT7 S5P_IRQ_VIC0(7) | ||
| 28 | #define IRQ_EINT8 S5P_IRQ_VIC0(8) | ||
| 29 | #define IRQ_EINT9 S5P_IRQ_VIC0(9) | ||
| 30 | #define IRQ_EINT10 S5P_IRQ_VIC0(10) | ||
| 31 | #define IRQ_EINT11 S5P_IRQ_VIC0(11) | ||
| 32 | #define IRQ_EINT12 S5P_IRQ_VIC0(12) | ||
| 33 | #define IRQ_EINT13 S5P_IRQ_VIC0(13) | ||
| 34 | #define IRQ_EINT14 S5P_IRQ_VIC0(14) | ||
| 35 | #define IRQ_EINT15 S5P_IRQ_VIC0(15) | ||
| 36 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) | 20 | #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) |
| 37 | #define IRQ_BATF S5P_IRQ_VIC0(17) | 21 | #define IRQ_BATF S5P_IRQ_VIC0(17) |
| 38 | #define IRQ_MDMA S5P_IRQ_VIC0(18) | 22 | #define IRQ_MDMA S5P_IRQ_VIC0(18) |
| @@ -134,13 +118,15 @@ | |||
| 134 | #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) | 118 | #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) |
| 135 | #define IRQ_VIC_END S5P_IRQ_VIC3(31) | 119 | #define IRQ_VIC_END S5P_IRQ_VIC3(31) |
| 136 | 120 | ||
| 137 | #define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) | 121 | #define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) |
| 138 | 122 | #define S5P_EINT_BASE2 (IRQ_VIC_END + 1) | |
| 139 | #define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) | ||
| 140 | #define IRQ_EINT(x) S5P_EINT(x) | ||
| 141 | 123 | ||
| 142 | /* Set the default NR_IRQS */ | 124 | /* Set the default NR_IRQS */ |
| 125 | #define NR_IRQS (IRQ_EINT(31) + 1) | ||
| 143 | 126 | ||
| 144 | #define NR_IRQS (IRQ_EINT(31) + 1) | 127 | /* Compatibility */ |
| 128 | #define IRQ_LCD_FIFO IRQ_LCD0 | ||
| 129 | #define IRQ_LCD_VSYNC IRQ_LCD1 | ||
| 130 | #define IRQ_LCD_SYSTEM IRQ_LCD2 | ||
| 145 | 131 | ||
| 146 | #endif /* ASM_ARCH_IRQS_H */ | 132 | #endif /* ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 5adcb9f26e44..34eb168ec950 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h | |||
| @@ -16,6 +16,9 @@ | |||
| 16 | #include <plat/map-base.h> | 16 | #include <plat/map-base.h> |
| 17 | #include <plat/map-s5p.h> | 17 | #include <plat/map-s5p.h> |
| 18 | 18 | ||
| 19 | #define S5PC110_PA_ONENAND (0xB0000000) | ||
| 20 | #define S5PC110_PA_ONENAND_DMA (0xB0600000) | ||
| 21 | |||
| 19 | #define S5PV210_PA_CHIPID (0xE0000000) | 22 | #define S5PV210_PA_CHIPID (0xE0000000) |
| 20 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID | 23 | #define S5P_PA_CHIPID S5PV210_PA_CHIPID |
| 21 | 24 | ||
| @@ -25,13 +28,21 @@ | |||
| 25 | #define S5PV210_PA_GPIO (0xE0200000) | 28 | #define S5PV210_PA_GPIO (0xE0200000) |
| 26 | #define S5P_PA_GPIO S5PV210_PA_GPIO | 29 | #define S5P_PA_GPIO S5PV210_PA_GPIO |
| 27 | 30 | ||
| 31 | /* SPI */ | ||
| 32 | #define S5PV210_PA_SPI0 0xE1300000 | ||
| 33 | #define S5PV210_PA_SPI1 0xE1400000 | ||
| 34 | |||
| 28 | #define S5PV210_PA_IIC0 (0xE1800000) | 35 | #define S5PV210_PA_IIC0 (0xE1800000) |
| 36 | #define S5PV210_PA_IIC1 (0xFAB00000) | ||
| 37 | #define S5PV210_PA_IIC2 (0xE1A00000) | ||
| 29 | 38 | ||
| 30 | #define S5PV210_PA_TIMER (0xE2500000) | 39 | #define S5PV210_PA_TIMER (0xE2500000) |
| 31 | #define S5P_PA_TIMER S5PV210_PA_TIMER | 40 | #define S5P_PA_TIMER S5PV210_PA_TIMER |
| 32 | 41 | ||
| 33 | #define S5PV210_PA_SYSTIMER (0xE2600000) | 42 | #define S5PV210_PA_SYSTIMER (0xE2600000) |
| 34 | 43 | ||
| 44 | #define S5PV210_PA_WATCHDOG (0xE2700000) | ||
| 45 | |||
| 35 | #define S5PV210_PA_UART (0xE2900000) | 46 | #define S5PV210_PA_UART (0xE2900000) |
| 36 | 47 | ||
| 37 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) | 48 | #define S5P_PA_UART0 (S5PV210_PA_UART + 0x0) |
| @@ -47,6 +58,10 @@ | |||
| 47 | #define S5PV210_PA_PDMA0 0xE0900000 | 58 | #define S5PV210_PA_PDMA0 0xE0900000 |
| 48 | #define S5PV210_PA_PDMA1 0xE0A00000 | 59 | #define S5PV210_PA_PDMA1 0xE0A00000 |
| 49 | 60 | ||
| 61 | #define S5PV210_PA_FB (0xF8000000) | ||
| 62 | |||
| 63 | #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) | ||
| 64 | |||
| 50 | #define S5PV210_PA_VIC0 (0xF2000000) | 65 | #define S5PV210_PA_VIC0 (0xF2000000) |
| 51 | #define S5P_PA_VIC0 S5PV210_PA_VIC0 | 66 | #define S5P_PA_VIC0 S5PV210_PA_VIC0 |
| 52 | 67 | ||
| @@ -75,8 +90,19 @@ | |||
| 75 | /* AC97 */ | 90 | /* AC97 */ |
| 76 | #define S5PV210_PA_AC97 0xE2200000 | 91 | #define S5PV210_PA_AC97 0xE2200000 |
| 77 | 92 | ||
| 93 | #define S5PV210_PA_ADC (0xE1700000) | ||
| 94 | |||
| 78 | /* compatibiltiy defines. */ | 95 | /* compatibiltiy defines. */ |
| 79 | #define S3C_PA_UART S5PV210_PA_UART | 96 | #define S3C_PA_UART S5PV210_PA_UART |
| 97 | #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) | ||
| 98 | #define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) | ||
| 99 | #define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) | ||
| 80 | #define S3C_PA_IIC S5PV210_PA_IIC0 | 100 | #define S3C_PA_IIC S5PV210_PA_IIC0 |
| 101 | #define S3C_PA_IIC1 S5PV210_PA_IIC1 | ||
| 102 | #define S3C_PA_IIC2 S5PV210_PA_IIC2 | ||
| 103 | #define S3C_PA_FB S5PV210_PA_FB | ||
| 104 | #define S3C_PA_WDT S5PV210_PA_WATCHDOG | ||
| 105 | |||
| 106 | #define SAMSUNG_PA_ADC S5PV210_PA_ADC | ||
| 81 | 107 | ||
| 82 | #endif /* __ASM_ARCH_MAP_H */ | 108 | #endif /* __ASM_ARCH_MAP_H */ |
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index e56e0e4673ed..2a25ab40c863 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h | |||
| @@ -126,6 +126,7 @@ | |||
| 126 | 126 | ||
| 127 | #define S5P_RST_STAT S5P_CLKREG(0xA000) | 127 | #define S5P_RST_STAT S5P_CLKREG(0xA000) |
| 128 | #define S5P_OSC_CON S5P_CLKREG(0x8000) | 128 | #define S5P_OSC_CON S5P_CLKREG(0x8000) |
| 129 | #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) | ||
| 129 | #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) | 130 | #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) |
| 130 | #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) | 131 | #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) |
| 131 | #define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) | 132 | #define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) |
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-fb.h b/arch/arm/mach-s5pv210/include/mach/regs-fb.h new file mode 100644 index 000000000000..60d992989bdc --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-fb.h | |||
| @@ -0,0 +1,21 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
| 3 | * | ||
| 4 | * Dummy framebuffer to allow build for the moment. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_ARCH_MACH_REGS_FB_H | ||
| 12 | #define __ASM_ARCH_MACH_REGS_FB_H __FILE__ | ||
| 13 | |||
| 14 | #include <plat/regs-fb-v4.h> | ||
| 15 | |||
| 16 | static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) | ||
| 17 | { | ||
| 18 | return 0x2400 + (window * 256 *4 ) + reg; | ||
| 19 | } | ||
| 20 | |||
| 21 | #endif /* __ASM_ARCH_MACH_REGS_FB_H */ | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h new file mode 100644 index 000000000000..49e029b4978a --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h | |||
| @@ -0,0 +1,48 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/include/mach/regs-gpio.h | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * S5PV210 - GPIO (including EINT) register definitions | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __ASM_ARCH_REGS_GPIO_H | ||
| 14 | #define __ASM_ARCH_REGS_GPIO_H __FILE__ | ||
| 15 | |||
| 16 | #include <mach/map.h> | ||
| 17 | |||
| 18 | #define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00) | ||
| 19 | #define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4)) | ||
| 20 | |||
| 21 | #define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) | ||
| 22 | #define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4)) | ||
| 23 | |||
| 24 | #define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00) | ||
| 25 | #define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4)) | ||
| 26 | |||
| 27 | #define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40) | ||
| 28 | #define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4)) | ||
| 29 | |||
| 30 | #define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) | ||
| 31 | |||
| 32 | #define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) | ||
| 33 | |||
| 34 | /* values for S5P_EXTINT0 */ | ||
| 35 | #define S5P_EXTINT_LOWLEV (0x00) | ||
| 36 | #define S5P_EXTINT_HILEV (0x01) | ||
| 37 | #define S5P_EXTINT_FALLEDGE (0x02) | ||
| 38 | #define S5P_EXTINT_RISEEDGE (0x03) | ||
| 39 | #define S5P_EXTINT_BOTHEDGE (0x04) | ||
| 40 | |||
| 41 | #define EINT_MODE S3C_GPIO_SFN(0xf) | ||
| 42 | |||
| 43 | #define EINT_GPIO_0(x) S5PV210_GPH0(x) | ||
| 44 | #define EINT_GPIO_1(x) S5PV210_GPH1(x) | ||
| 45 | #define EINT_GPIO_2(x) S5PV210_GPH2(x) | ||
| 46 | #define EINT_GPIO_3(x) S5PV210_GPH3(x) | ||
| 47 | |||
| 48 | #endif /* __ASM_ARCH_REGS_GPIO_H */ | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h new file mode 100644 index 000000000000..02acded5f73d --- /dev/null +++ b/arch/arm/mach-s5pv210/include/mach/spi-clocks.h | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/include/mach/spi-clocks.h | ||
| 2 | * | ||
| 3 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
| 4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __S5PV210_PLAT_SPI_CLKS_H | ||
| 12 | #define __S5PV210_PLAT_SPI_CLKS_H __FILE__ | ||
| 13 | |||
| 14 | #define S5PV210_SPI_SRCCLK_PCLK 0 | ||
| 15 | #define S5PV210_SPI_SRCCLK_SCLK 1 | ||
| 16 | |||
| 17 | #endif /* __S5PV210_PLAT_SPI_CLKS_H */ | ||
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c new file mode 100644 index 000000000000..10bc76ec4025 --- /dev/null +++ b/arch/arm/mach-s5pv210/mach-aquila.c | |||
| @@ -0,0 +1,149 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/mach-aquila.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/types.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/serial_core.h> | ||
| 15 | #include <linux/fb.h> | ||
| 16 | |||
| 17 | #include <asm/mach/arch.h> | ||
| 18 | #include <asm/mach/map.h> | ||
| 19 | #include <asm/setup.h> | ||
| 20 | #include <asm/mach-types.h> | ||
| 21 | |||
| 22 | #include <mach/map.h> | ||
| 23 | #include <mach/regs-clock.h> | ||
| 24 | #include <mach/regs-fb.h> | ||
| 25 | |||
| 26 | #include <plat/regs-serial.h> | ||
| 27 | #include <plat/s5pv210.h> | ||
| 28 | #include <plat/devs.h> | ||
| 29 | #include <plat/cpu.h> | ||
| 30 | #include <plat/fb.h> | ||
| 31 | |||
| 32 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
| 33 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
| 34 | S3C2410_UCON_RXILEVEL | \ | ||
| 35 | S3C2410_UCON_TXIRQMODE | \ | ||
| 36 | S3C2410_UCON_RXIRQMODE | \ | ||
| 37 | S3C2410_UCON_RXFIFO_TOI | \ | ||
| 38 | S3C2443_UCON_RXERR_IRQEN) | ||
| 39 | |||
| 40 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
| 41 | |||
| 42 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
| 43 | S5PV210_UFCON_TXTRIG4 | \ | ||
| 44 | S5PV210_UFCON_RXTRIG4) | ||
| 45 | |||
| 46 | static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | ||
| 47 | [0] = { | ||
| 48 | .hwport = 0, | ||
| 49 | .flags = 0, | ||
| 50 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 51 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 52 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 53 | }, | ||
| 54 | [1] = { | ||
| 55 | .hwport = 1, | ||
| 56 | .flags = 0, | ||
| 57 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 58 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 59 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 60 | }, | ||
| 61 | [2] = { | ||
| 62 | .hwport = 2, | ||
| 63 | .flags = 0, | ||
| 64 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 65 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 66 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 67 | }, | ||
| 68 | [3] = { | ||
| 69 | .hwport = 3, | ||
| 70 | .flags = 0, | ||
| 71 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 72 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 73 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 74 | }, | ||
| 75 | }; | ||
| 76 | |||
| 77 | /* Frame Buffer */ | ||
| 78 | static struct s3c_fb_pd_win aquila_fb_win0 = { | ||
| 79 | .win_mode = { | ||
| 80 | .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60), | ||
| 81 | .left_margin = 16, | ||
| 82 | .right_margin = 16, | ||
| 83 | .upper_margin = 3, | ||
| 84 | .lower_margin = 28, | ||
| 85 | .hsync_len = 2, | ||
| 86 | .vsync_len = 2, | ||
| 87 | .xres = 480, | ||
| 88 | .yres = 800, | ||
| 89 | }, | ||
| 90 | .max_bpp = 32, | ||
| 91 | .default_bpp = 16, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct s3c_fb_pd_win aquila_fb_win1 = { | ||
| 95 | .win_mode = { | ||
| 96 | .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60), | ||
| 97 | .left_margin = 16, | ||
| 98 | .right_margin = 16, | ||
| 99 | .upper_margin = 3, | ||
| 100 | .lower_margin = 28, | ||
| 101 | .hsync_len = 2, | ||
| 102 | .vsync_len = 2, | ||
| 103 | .xres = 480, | ||
| 104 | .yres = 800, | ||
| 105 | }, | ||
| 106 | .max_bpp = 32, | ||
| 107 | .default_bpp = 16, | ||
| 108 | }; | ||
| 109 | |||
| 110 | static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { | ||
| 111 | .win[0] = &aquila_fb_win0, | ||
| 112 | .win[1] = &aquila_fb_win1, | ||
| 113 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, | ||
| 114 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | | ||
| 115 | VIDCON1_INV_VCLK | VIDCON1_INV_VDEN, | ||
| 116 | .setup_gpio = s5pv210_fb_gpio_setup_24bpp, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static struct platform_device *aquila_devices[] __initdata = { | ||
| 120 | &s3c_device_fb, | ||
| 121 | }; | ||
| 122 | |||
| 123 | static void __init aquila_map_io(void) | ||
| 124 | { | ||
| 125 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
| 126 | s3c24xx_init_clocks(24000000); | ||
| 127 | s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); | ||
| 128 | } | ||
| 129 | |||
| 130 | static void __init aquila_machine_init(void) | ||
| 131 | { | ||
| 132 | /* FB */ | ||
| 133 | s3c_fb_set_platdata(&aquila_lcd_pdata); | ||
| 134 | |||
| 135 | platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices)); | ||
| 136 | } | ||
| 137 | |||
| 138 | MACHINE_START(AQUILA, "Aquila") | ||
| 139 | /* Maintainers: | ||
| 140 | Marek Szyprowski <m.szyprowski@samsung.com> | ||
| 141 | Kyungmin Park <kyungmin.park@samsung.com> */ | ||
| 142 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
| 143 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
| 144 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
| 145 | .init_irq = s5pv210_init_irq, | ||
| 146 | .map_io = aquila_map_io, | ||
| 147 | .init_machine = aquila_machine_init, | ||
| 148 | .timer = &s3c24xx_timer, | ||
| 149 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c new file mode 100644 index 000000000000..4863b13824e4 --- /dev/null +++ b/arch/arm/mach-s5pv210/mach-goni.c | |||
| @@ -0,0 +1,98 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/mach-goni.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/types.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/serial_core.h> | ||
| 15 | |||
| 16 | #include <asm/mach/arch.h> | ||
| 17 | #include <asm/mach/map.h> | ||
| 18 | #include <asm/setup.h> | ||
| 19 | #include <asm/mach-types.h> | ||
| 20 | |||
| 21 | #include <mach/map.h> | ||
| 22 | #include <mach/regs-clock.h> | ||
| 23 | |||
| 24 | #include <plat/regs-serial.h> | ||
| 25 | #include <plat/s5pv210.h> | ||
| 26 | #include <plat/devs.h> | ||
| 27 | #include <plat/cpu.h> | ||
| 28 | |||
| 29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
| 30 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
| 31 | S3C2410_UCON_RXILEVEL | \ | ||
| 32 | S3C2410_UCON_TXIRQMODE | \ | ||
| 33 | S3C2410_UCON_RXIRQMODE | \ | ||
| 34 | S3C2410_UCON_RXFIFO_TOI | \ | ||
| 35 | S3C2443_UCON_RXERR_IRQEN) | ||
| 36 | |||
| 37 | #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
| 38 | |||
| 39 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
| 40 | S5PV210_UFCON_TXTRIG4 | \ | ||
| 41 | S5PV210_UFCON_RXTRIG4) | ||
| 42 | |||
| 43 | static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = { | ||
| 44 | [0] = { | ||
| 45 | .hwport = 0, | ||
| 46 | .flags = 0, | ||
| 47 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 48 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 49 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 50 | }, | ||
| 51 | [1] = { | ||
| 52 | .hwport = 1, | ||
| 53 | .flags = 0, | ||
| 54 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 55 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 56 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 57 | }, | ||
| 58 | [2] = { | ||
| 59 | .hwport = 2, | ||
| 60 | .flags = 0, | ||
| 61 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 62 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 63 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 64 | }, | ||
| 65 | [3] = { | ||
| 66 | .hwport = 3, | ||
| 67 | .flags = 0, | ||
| 68 | .ucon = S5PV210_UCON_DEFAULT, | ||
| 69 | .ulcon = S5PV210_ULCON_DEFAULT, | ||
| 70 | .ufcon = S5PV210_UFCON_DEFAULT, | ||
| 71 | }, | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct platform_device *goni_devices[] __initdata = { | ||
| 75 | }; | ||
| 76 | |||
| 77 | static void __init goni_map_io(void) | ||
| 78 | { | ||
| 79 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
| 80 | s3c24xx_init_clocks(24000000); | ||
| 81 | s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); | ||
| 82 | } | ||
| 83 | |||
| 84 | static void __init goni_machine_init(void) | ||
| 85 | { | ||
| 86 | platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices)); | ||
| 87 | } | ||
| 88 | |||
| 89 | MACHINE_START(GONI, "GONI") | ||
| 90 | /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ | ||
| 91 | .phys_io = S3C_PA_UART & 0xfff00000, | ||
| 92 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, | ||
| 93 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
| 94 | .init_irq = s5pv210_init_irq, | ||
| 95 | .map_io = goni_map_io, | ||
| 96 | .init_machine = goni_machine_init, | ||
| 97 | .timer = &s3c24xx_timer, | ||
| 98 | MACHINE_END | ||
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index 6f9fd3274e2e..4c8903c6d104 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c | |||
| @@ -74,6 +74,7 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | |||
| 74 | static struct platform_device *smdkc110_devices[] __initdata = { | 74 | static struct platform_device *smdkc110_devices[] __initdata = { |
| 75 | &s5pv210_device_iis0, | 75 | &s5pv210_device_iis0, |
| 76 | &s5pv210_device_ac97, | 76 | &s5pv210_device_ac97, |
| 77 | &s3c_device_wdt, | ||
| 77 | }; | 78 | }; |
| 78 | 79 | ||
| 79 | static void __init smdkc110_map_io(void) | 80 | static void __init smdkc110_map_io(void) |
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index 3c29e18528a5..0d4627948040 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c | |||
| @@ -25,6 +25,8 @@ | |||
| 25 | #include <plat/s5pv210.h> | 25 | #include <plat/s5pv210.h> |
| 26 | #include <plat/devs.h> | 26 | #include <plat/devs.h> |
| 27 | #include <plat/cpu.h> | 27 | #include <plat/cpu.h> |
| 28 | #include <plat/adc.h> | ||
| 29 | #include <plat/ts.h> | ||
| 28 | 30 | ||
| 29 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 31 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
| 30 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 32 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| @@ -74,6 +76,15 @@ static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { | |||
| 74 | static struct platform_device *smdkv210_devices[] __initdata = { | 76 | static struct platform_device *smdkv210_devices[] __initdata = { |
| 75 | &s5pv210_device_iis0, | 77 | &s5pv210_device_iis0, |
| 76 | &s5pv210_device_ac97, | 78 | &s5pv210_device_ac97, |
| 79 | &s3c_device_adc, | ||
| 80 | &s3c_device_ts, | ||
| 81 | &s3c_device_wdt, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = { | ||
| 85 | .delay = 10000, | ||
| 86 | .presc = 49, | ||
| 87 | .oversampling_shift = 2, | ||
| 77 | }; | 88 | }; |
| 78 | 89 | ||
| 79 | static void __init smdkv210_map_io(void) | 90 | static void __init smdkv210_map_io(void) |
| @@ -85,6 +96,7 @@ static void __init smdkv210_map_io(void) | |||
| 85 | 96 | ||
| 86 | static void __init smdkv210_machine_init(void) | 97 | static void __init smdkv210_machine_init(void) |
| 87 | { | 98 | { |
| 99 | s3c24xx_ts_set_platdata(&s3c_ts_platform); | ||
| 88 | platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); | 100 | platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); |
| 89 | } | 101 | } |
| 90 | 102 | ||
diff --git a/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/arch/arm/mach-s5pv210/setup-fb-24bpp.c new file mode 100644 index 000000000000..a50cbac8720d --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-fb-24bpp.c | |||
| @@ -0,0 +1,62 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pv210/setup-fb-24bpp.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * Base s5pv210 setup information for 24bpp LCD framebuffer | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/fb.h> | ||
| 16 | |||
| 17 | #include <mach/regs-fb.h> | ||
| 18 | #include <mach/gpio.h> | ||
| 19 | #include <mach/map.h> | ||
| 20 | #include <plat/fb.h> | ||
| 21 | #include <mach/regs-clock.h> | ||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | |||
| 24 | void s5pv210_fb_gpio_setup_24bpp(void) | ||
| 25 | { | ||
| 26 | unsigned int gpio = 0; | ||
| 27 | |||
| 28 | for (gpio = S5PV210_GPF0(0); gpio <= S5PV210_GPF0(7); gpio++) { | ||
| 29 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 30 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 31 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
| 32 | } | ||
| 33 | |||
| 34 | for (gpio = S5PV210_GPF1(0); gpio <= S5PV210_GPF1(7); gpio++) { | ||
| 35 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 36 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 37 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
| 38 | } | ||
| 39 | |||
| 40 | for (gpio = S5PV210_GPF2(0); gpio <= S5PV210_GPF2(7); gpio++) { | ||
| 41 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 42 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 43 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
| 44 | } | ||
| 45 | |||
| 46 | for (gpio = S5PV210_GPF3(0); gpio <= S5PV210_GPF3(3); gpio++) { | ||
| 47 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 48 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 49 | s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); | ||
| 50 | } | ||
| 51 | |||
| 52 | /* Set DISPLAY_CONTROL register for Display path selection. | ||
| 53 | * | ||
| 54 | * ouput | RGB | I80 | ITU | ||
| 55 | * ----------------------------------- | ||
| 56 | * 00 | MIE | FIMD | FIMD | ||
| 57 | * 01 | MDNIE | MDNIE | FIMD | ||
| 58 | * 10 | FIMD | FIMD | FIMD | ||
| 59 | * 11 | FIMD | FIMD | FIMD | ||
| 60 | */ | ||
| 61 | writel(0x2, S5P_MDNIE_SEL); | ||
| 62 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-i2c0.c b/arch/arm/mach-s5pv210/setup-i2c0.c index 9ec6845840e5..c718253c70b8 100644 --- a/arch/arm/mach-s5pv210/setup-i2c0.c +++ b/arch/arm/mach-s5pv210/setup-i2c0.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-i2c0.c | 1 | /* linux/arch/arm/mach-s5pv210/setup-i2c0.c |
| 2 | * | 2 | * |
| 3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com/ | 4 | * http://www.samsung.com/ |
| 5 | * | 5 | * |
| 6 | * I2C0 GPIO configuration. | 6 | * I2C0 GPIO configuration. |
| @@ -17,9 +17,14 @@ | |||
| 17 | 17 | ||
| 18 | struct platform_device; /* don't need the contents */ | 18 | struct platform_device; /* don't need the contents */ |
| 19 | 19 | ||
| 20 | #include <mach/gpio.h> | ||
| 20 | #include <plat/iic.h> | 21 | #include <plat/iic.h> |
| 22 | #include <plat/gpio-cfg.h> | ||
| 21 | 23 | ||
| 22 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) | 24 | void s3c_i2c0_cfg_gpio(struct platform_device *dev) |
| 23 | { | 25 | { |
| 24 | /* Will be populated later */ | 26 | s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2)); |
| 27 | s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_UP); | ||
| 28 | s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_UP); | ||
| 25 | } | 30 | } |
diff --git a/arch/arm/mach-s5pv210/setup-i2c1.c b/arch/arm/mach-s5pv210/setup-i2c1.c new file mode 100644 index 000000000000..45e0e6ed2ed0 --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-i2c1.c | |||
| @@ -0,0 +1,30 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-i2c1.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * I2C1 GPIO configuration. | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/setup-i2c1.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | |||
| 18 | struct platform_device; /* don't need the contents */ | ||
| 19 | |||
| 20 | #include <mach/gpio.h> | ||
| 21 | #include <plat/iic.h> | ||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | |||
| 24 | void s3c_i2c1_cfg_gpio(struct platform_device *dev) | ||
| 25 | { | ||
| 26 | s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2)); | ||
| 27 | s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_UP); | ||
| 28 | s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_UP); | ||
| 30 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-i2c2.c b/arch/arm/mach-s5pv210/setup-i2c2.c new file mode 100644 index 000000000000..b11b4bff69ac --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-i2c2.c | |||
| @@ -0,0 +1,30 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-i2c2.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * I2C2 GPIO configuration. | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/setup-i2c0.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/types.h> | ||
| 17 | |||
| 18 | struct platform_device; /* don't need the contents */ | ||
| 19 | |||
| 20 | #include <mach/gpio.h> | ||
| 21 | #include <plat/iic.h> | ||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | |||
| 24 | void s3c_i2c2_cfg_gpio(struct platform_device *dev) | ||
| 25 | { | ||
| 26 | s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2)); | ||
| 27 | s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_UP); | ||
| 28 | s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2)); | ||
| 29 | s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_UP); | ||
| 30 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c new file mode 100644 index 000000000000..fe7d86dad14c --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c | |||
| @@ -0,0 +1,104 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * S5PV210 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/mmc/host.h> | ||
| 19 | #include <linux/mmc/card.h> | ||
| 20 | |||
| 21 | #include <mach/gpio.h> | ||
| 22 | #include <plat/gpio-cfg.h> | ||
| 23 | #include <plat/regs-sdhci.h> | ||
| 24 | |||
| 25 | void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | ||
| 26 | { | ||
| 27 | unsigned int gpio; | ||
| 28 | |||
| 29 | /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ | ||
| 30 | for (gpio = S5PV210_GPG0(0); gpio < S5PV210_GPG0(2); gpio++) { | ||
| 31 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 32 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 33 | } | ||
| 34 | switch (width) { | ||
| 35 | case 8: | ||
| 36 | /* GPG1[3:6] special-funtion 3 */ | ||
| 37 | for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { | ||
| 38 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
| 39 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 40 | } | ||
| 41 | case 4: | ||
| 42 | /* GPG0[3:6] special-funtion 2 */ | ||
| 43 | for (gpio = S5PV210_GPG0(3); gpio <= S5PV210_GPG0(6); gpio++) { | ||
| 44 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 45 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 46 | } | ||
| 47 | default: | ||
| 48 | break; | ||
| 49 | } | ||
| 50 | |||
| 51 | s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP); | ||
| 52 | s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2)); | ||
| 53 | } | ||
| 54 | |||
| 55 | void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | ||
| 56 | { | ||
| 57 | unsigned int gpio; | ||
| 58 | |||
| 59 | /* Set all the necessary GPG1[0:1] pins to special-function 2 */ | ||
| 60 | for (gpio = S5PV210_GPG1(0); gpio < S5PV210_GPG1(2); gpio++) { | ||
| 61 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 62 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 63 | } | ||
| 64 | |||
| 65 | /* Data pin GPG1[3:6] to special-function 2 */ | ||
| 66 | for (gpio = S5PV210_GPG1(3); gpio <= S5PV210_GPG1(6); gpio++) { | ||
| 67 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 68 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 69 | } | ||
| 70 | |||
| 71 | s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); | ||
| 72 | s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2)); | ||
| 73 | } | ||
| 74 | |||
| 75 | void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) | ||
| 76 | { | ||
| 77 | unsigned int gpio; | ||
| 78 | |||
| 79 | /* Set all the necessary GPG2[0:1] pins to special-function 2 */ | ||
| 80 | for (gpio = S5PV210_GPG2(0); gpio < S5PV210_GPG2(2); gpio++) { | ||
| 81 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 82 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 83 | } | ||
| 84 | |||
| 85 | switch (width) { | ||
| 86 | case 8: | ||
| 87 | /* Data pin GPG3[3:6] to special-function 3 */ | ||
| 88 | for (gpio = S5PV210_GPG3(3); gpio <= S5PV210_GPG3(6); gpio++) { | ||
| 89 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); | ||
| 90 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 91 | } | ||
| 92 | case 4: | ||
| 93 | /* Data pin GPG2[3:6] to special-function 2 */ | ||
| 94 | for (gpio = S5PV210_GPG2(3); gpio <= S5PV210_GPG2(6); gpio++) { | ||
| 95 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 96 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
| 97 | } | ||
| 98 | default: | ||
| 99 | break; | ||
| 100 | } | ||
| 101 | |||
| 102 | s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP); | ||
| 103 | s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2)); | ||
| 104 | } | ||
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c new file mode 100644 index 000000000000..51815ec60c2a --- /dev/null +++ b/arch/arm/mach-s5pv210/setup-sdhci.c | |||
| @@ -0,0 +1,63 @@ | |||
| 1 | /* linux/arch/arm/mach-s5pv210/setup-sdhci.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC) | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/types.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | |||
| 19 | #include <linux/mmc/card.h> | ||
| 20 | #include <linux/mmc/host.h> | ||
| 21 | |||
| 22 | #include <plat/regs-sdhci.h> | ||
| 23 | #include <plat/sdhci.h> | ||
| 24 | |||
| 25 | /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ | ||
| 26 | |||
| 27 | char *s5pv210_hsmmc_clksrcs[4] = { | ||
| 28 | [0] = "hsmmc", /* HCLK */ | ||
| 29 | [1] = "hsmmc", /* HCLK */ | ||
| 30 | [2] = "sclk_mmc", /* mmc_bus */ | ||
| 31 | /*[4] = reserved */ | ||
| 32 | }; | ||
| 33 | |||
| 34 | void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | ||
| 35 | void __iomem *r, | ||
| 36 | struct mmc_ios *ios, | ||
| 37 | struct mmc_card *card) | ||
| 38 | { | ||
| 39 | u32 ctrl2, ctrl3; | ||
| 40 | |||
| 41 | /* don't need to alter anything acording to card-type */ | ||
| 42 | |||
| 43 | writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4); | ||
| 44 | |||
| 45 | ctrl2 = readl(r + S3C_SDHCI_CONTROL2); | ||
| 46 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; | ||
| 47 | ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | | ||
| 48 | S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | | ||
| 49 | S3C_SDHCI_CTRL2_ENFBCLKRX | | ||
| 50 | S3C_SDHCI_CTRL2_DFCNT_NONE | | ||
| 51 | S3C_SDHCI_CTRL2_ENCLKOUTHOLD); | ||
| 52 | |||
| 53 | if (ios->clock < 25 * 1000000) | ||
| 54 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | | ||
| 55 | S3C_SDHCI_CTRL3_FCSEL2 | | ||
| 56 | S3C_SDHCI_CTRL3_FCSEL1 | | ||
| 57 | S3C_SDHCI_CTRL3_FCSEL0); | ||
| 58 | else | ||
| 59 | ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); | ||
| 60 | |||
| 61 | writel(ctrl2, r + S3C_SDHCI_CONTROL2); | ||
| 62 | writel(ctrl3, r + S3C_SDHCI_CONTROL3); | ||
| 63 | } | ||
diff --git a/arch/arm/mach-sa1100/leds.c b/arch/arm/mach-sa1100/leds.c index 4cf7c565aaed..bbfe197fb4d6 100644 --- a/arch/arm/mach-sa1100/leds.c +++ b/arch/arm/mach-sa1100/leds.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * linux/arch/arm/mach-sa1100/leds.c | 2 | * linux/arch/arm/mach-sa1100/leds.c |
| 3 | * | 3 | * |
| 4 | * SA1100 LEDs dispatcher | 4 | * SA1100 LEDs dispatcher |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2001 Nicolas Pitre | 6 | * Copyright (C) 2001 Nicolas Pitre |
| 7 | */ | 7 | */ |
| 8 | #include <linux/compiler.h> | 8 | #include <linux/compiler.h> |
| @@ -18,10 +18,10 @@ sa1100_leds_init(void) | |||
| 18 | { | 18 | { |
| 19 | if (machine_is_assabet()) | 19 | if (machine_is_assabet()) |
| 20 | leds_event = assabet_leds_event; | 20 | leds_event = assabet_leds_event; |
| 21 | if (machine_is_consus()) | 21 | if (machine_is_consus()) |
| 22 | leds_event = consus_leds_event; | 22 | leds_event = consus_leds_event; |
| 23 | if (machine_is_badge4()) | 23 | if (machine_is_badge4()) |
| 24 | leds_event = badge4_leds_event; | 24 | leds_event = badge4_leds_event; |
| 25 | if (machine_is_brutus()) | 25 | if (machine_is_brutus()) |
| 26 | leds_event = brutus_leds_event; | 26 | leds_event = brutus_leds_event; |
| 27 | if (machine_is_cerf()) | 27 | if (machine_is_cerf()) |
diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c index 37a7112d4117..89d175ce74d2 100644 --- a/arch/arm/mach-shark/pci.c +++ b/arch/arm/mach-shark/pci.c | |||
| @@ -16,16 +16,19 @@ | |||
| 16 | static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | 16 | static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
| 17 | { | 17 | { |
| 18 | if (dev->bus->number == 0) | 18 | if (dev->bus->number == 0) |
| 19 | if (dev->devfn == 0) return 255; | 19 | if (dev->devfn == 0) |
| 20 | else return 11; | 20 | return 255; |
| 21 | else return 255; | 21 | else |
| 22 | return 11; | ||
| 23 | else | ||
| 24 | return 255; | ||
| 22 | } | 25 | } |
| 23 | 26 | ||
| 24 | extern void __init via82c505_preinit(void); | 27 | extern void __init via82c505_preinit(void); |
| 25 | 28 | ||
| 26 | static struct hw_pci shark_pci __initdata = { | 29 | static struct hw_pci shark_pci __initdata = { |
| 27 | .setup = via82c505_setup, | 30 | .setup = via82c505_setup, |
| 28 | .swizzle = pci_std_swizzle, | 31 | .swizzle = pci_std_swizzle, |
| 29 | .map_irq = shark_map_irq, | 32 | .map_irq = shark_map_irq, |
| 30 | .nr_controllers = 1, | 33 | .nr_controllers = 1, |
| 31 | .scan = via82c505_scan_bus, | 34 | .scan = via82c505_scan_bus, |
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index b67e571d4bf7..baf6bcc3169c 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c | |||
| @@ -13,7 +13,6 @@ | |||
| 13 | 13 | ||
| 14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
| 15 | #include <linux/amba/pl061.h> | 15 | #include <linux/amba/pl061.h> |
| 16 | #include <linux/types.h> | ||
| 17 | #include <linux/ptrace.h> | 16 | #include <linux/ptrace.h> |
| 18 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 19 | #include <asm/hardware/vic.h> | 18 | #include <asm/hardware/vic.h> |
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c index c73ed06b6065..f0394baa11fa 100644 --- a/arch/arm/mach-u300/i2c.c +++ b/arch/arm/mach-u300/i2c.c | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | */ | 9 | */ |
| 10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
| 11 | #include <linux/i2c.h> | 11 | #include <linux/i2c.h> |
| 12 | #include <linux/mfd/ab3100.h> | 12 | #include <linux/mfd/abx500.h> |
| 13 | #include <linux/regulator/machine.h> | 13 | #include <linux/regulator/machine.h> |
| 14 | #include <linux/amba/bus.h> | 14 | #include <linux/amba/bus.h> |
| 15 | #include <mach/irqs.h> | 15 | #include <mach/irqs.h> |
| @@ -46,6 +46,7 @@ | |||
| 46 | /* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */ | 46 | /* BUCK SLEEP 0xAC: 1.05V, Not used, SLEEP_A and B, Not used */ |
| 47 | #define BUCK_SLEEP_SETTING 0xAC | 47 | #define BUCK_SLEEP_SETTING 0xAC |
| 48 | 48 | ||
| 49 | #ifdef CONFIG_AB3100_CORE | ||
| 49 | static struct regulator_consumer_supply supply_ldo_c[] = { | 50 | static struct regulator_consumer_supply supply_ldo_c[] = { |
| 50 | { | 51 | { |
| 51 | .dev_name = "ab3100-codec", | 52 | .dev_name = "ab3100-codec", |
| @@ -253,14 +254,68 @@ static struct ab3100_platform_data ab3100_plf_data = { | |||
| 253 | LDO_D_SETTING, | 254 | LDO_D_SETTING, |
| 254 | }, | 255 | }, |
| 255 | }; | 256 | }; |
| 257 | #endif | ||
| 258 | |||
| 259 | #ifdef CONFIG_AB3550_CORE | ||
| 260 | static struct abx500_init_settings ab3550_init_settings[] = { | ||
| 261 | { | ||
| 262 | .bank = 0, | ||
| 263 | .reg = AB3550_IMR1, | ||
| 264 | .setting = 0xff | ||
| 265 | }, | ||
| 266 | { | ||
| 267 | .bank = 0, | ||
| 268 | .reg = AB3550_IMR2, | ||
| 269 | .setting = 0xff | ||
| 270 | }, | ||
| 271 | { | ||
| 272 | .bank = 0, | ||
| 273 | .reg = AB3550_IMR3, | ||
| 274 | .setting = 0xff | ||
| 275 | }, | ||
| 276 | { | ||
| 277 | .bank = 0, | ||
| 278 | .reg = AB3550_IMR4, | ||
| 279 | .setting = 0xff | ||
| 280 | }, | ||
| 281 | { | ||
| 282 | .bank = 0, | ||
| 283 | .reg = AB3550_IMR5, | ||
| 284 | /* The two most significant bits are not used */ | ||
| 285 | .setting = 0x3f | ||
| 286 | }, | ||
| 287 | }; | ||
| 288 | |||
| 289 | static struct ab3550_platform_data ab3550_plf_data = { | ||
| 290 | .irq = { | ||
| 291 | .base = IRQ_AB3550_BASE, | ||
| 292 | .count = (IRQ_AB3550_END - IRQ_AB3550_BASE + 1), | ||
| 293 | }, | ||
| 294 | .dev_data = { | ||
| 295 | }, | ||
| 296 | .init_settings = ab3550_init_settings, | ||
| 297 | .init_settings_sz = ARRAY_SIZE(ab3550_init_settings), | ||
| 298 | }; | ||
| 299 | #endif | ||
| 256 | 300 | ||
| 257 | static struct i2c_board_info __initdata bus0_i2c_board_info[] = { | 301 | static struct i2c_board_info __initdata bus0_i2c_board_info[] = { |
| 302 | #if defined(CONFIG_AB3550_CORE) | ||
| 303 | { | ||
| 304 | .type = "ab3550", | ||
| 305 | .addr = 0x4A, | ||
| 306 | .irq = IRQ_U300_IRQ0_EXT, | ||
| 307 | .platform_data = &ab3550_plf_data, | ||
| 308 | }, | ||
| 309 | #elif defined(CONFIG_AB3100_CORE) | ||
| 258 | { | 310 | { |
| 259 | .type = "ab3100", | 311 | .type = "ab3100", |
| 260 | .addr = 0x48, | 312 | .addr = 0x48, |
| 261 | .irq = IRQ_U300_IRQ0_EXT, | 313 | .irq = IRQ_U300_IRQ0_EXT, |
| 262 | .platform_data = &ab3100_plf_data, | 314 | .platform_data = &ab3100_plf_data, |
| 263 | }, | 315 | }, |
| 316 | #else | ||
| 317 | { }, | ||
| 318 | #endif | ||
| 264 | }; | 319 | }; |
| 265 | 320 | ||
| 266 | static struct i2c_board_info __initdata bus1_i2c_board_info[] = { | 321 | static struct i2c_board_info __initdata bus1_i2c_board_info[] = { |
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h index a6867b12773e..09b1b28fa8fd 100644 --- a/arch/arm/mach-u300/include/mach/irqs.h +++ b/arch/arm/mach-u300/include/mach/irqs.h | |||
| @@ -109,6 +109,13 @@ | |||
| 109 | #define U300_NR_IRQS 48 | 109 | #define U300_NR_IRQS 48 |
| 110 | #endif | 110 | #endif |
| 111 | 111 | ||
| 112 | #ifdef CONFIG_AB3550_CORE | ||
| 113 | #define IRQ_AB3550_BASE (U300_NR_IRQS) | ||
| 114 | #define IRQ_AB3550_END (IRQ_AB3550_BASE + 37) | ||
| 115 | |||
| 116 | #define NR_IRQS (IRQ_AB3550_END + 1) | ||
| 117 | #else | ||
| 112 | #define NR_IRQS U300_NR_IRQS | 118 | #define NR_IRQS U300_NR_IRQS |
| 119 | #endif | ||
| 113 | 120 | ||
| 114 | #endif | 121 | #endif |
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index 072196c57263..bb8d7b771817 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
| @@ -50,7 +50,7 @@ struct pl022_config_chip ab4500_chip_info = { | |||
| 50 | 50 | ||
| 51 | static struct spi_board_info u8500_spi_devices[] = { | 51 | static struct spi_board_info u8500_spi_devices[] = { |
| 52 | { | 52 | { |
| 53 | .modalias = "ab4500", | 53 | .modalias = "ab8500", |
| 54 | .controller_data = &ab4500_chip_info, | 54 | .controller_data = &ab4500_chip_info, |
| 55 | .max_speed_hz = 12000000, | 55 | .max_speed_hz = 12000000, |
| 56 | .bus_num = 0, | 56 | .bus_num = 0, |
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c index 1b2c9890e8b4..6544855af2f1 100644 --- a/arch/arm/mach-ux500/clock.c +++ b/arch/arm/mach-ux500/clock.c | |||
| @@ -411,7 +411,7 @@ static struct clk_lookup u8500_common_clks[] = { | |||
| 411 | CLK(apetraceclk, "apetrace", NULL), | 411 | CLK(apetraceclk, "apetrace", NULL), |
| 412 | CLK(mcdeclk, "mcde", NULL), | 412 | CLK(mcdeclk, "mcde", NULL), |
| 413 | CLK(ipi2clk, "ipi2", NULL), | 413 | CLK(ipi2clk, "ipi2", NULL), |
| 414 | CLK(dmaclk, "dma40", NULL), | 414 | CLK(dmaclk, "dma40.0", NULL), |
| 415 | CLK(b2r2clk, "b2r2", NULL), | 415 | CLK(b2r2clk, "b2r2", NULL), |
| 416 | CLK(tvclk, "tv", NULL), | 416 | CLK(tvclk, "tv", NULL), |
| 417 | }; | 417 | }; |
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index d04299f3b6b5..f21c444edd99 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c | |||
| @@ -32,6 +32,7 @@ static struct platform_device *platform_devs[] __initdata = { | |||
| 32 | &u8500_gpio_devs[6], | 32 | &u8500_gpio_devs[6], |
| 33 | &u8500_gpio_devs[7], | 33 | &u8500_gpio_devs[7], |
| 34 | &u8500_gpio_devs[8], | 34 | &u8500_gpio_devs[8], |
| 35 | &u8500_dma40_device, | ||
| 35 | }; | 36 | }; |
| 36 | 37 | ||
| 37 | /* minimum static i/o mapping required to boot U8500 platforms */ | 38 | /* minimum static i/o mapping required to boot U8500 platforms */ |
| @@ -71,6 +72,9 @@ void __init u8500_init_devices(void) | |||
| 71 | { | 72 | { |
| 72 | ux500_init_devices(); | 73 | ux500_init_devices(); |
| 73 | 74 | ||
| 75 | if (cpu_is_u8500ed()) | ||
| 76 | dma40_u8500ed_fixup(); | ||
| 77 | |||
| 74 | /* Register the platform devices */ | 78 | /* Register the platform devices */ |
| 75 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); | 79 | platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); |
| 76 | 80 | ||
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index 20334236afce..822903421943 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c | |||
| @@ -12,9 +12,13 @@ | |||
| 12 | #include <linux/gpio.h> | 12 | #include <linux/gpio.h> |
| 13 | #include <linux/amba/bus.h> | 13 | #include <linux/amba/bus.h> |
| 14 | 14 | ||
| 15 | #include <plat/ste_dma40.h> | ||
| 16 | |||
| 15 | #include <mach/hardware.h> | 17 | #include <mach/hardware.h> |
| 16 | #include <mach/setup.h> | 18 | #include <mach/setup.h> |
| 17 | 19 | ||
| 20 | #include "ste-dma40-db8500.h" | ||
| 21 | |||
| 18 | static struct nmk_gpio_platform_data u8500_gpio_data[] = { | 22 | static struct nmk_gpio_platform_data u8500_gpio_data[] = { |
| 19 | GPIO_DATA("GPIO-0-31", 0), | 23 | GPIO_DATA("GPIO-0-31", 0), |
| 20 | GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */ | 24 | GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */ |
| @@ -105,3 +109,108 @@ struct platform_device u8500_i2c4_device = { | |||
| 105 | .resource = u8500_i2c4_resources, | 109 | .resource = u8500_i2c4_resources, |
| 106 | .num_resources = ARRAY_SIZE(u8500_i2c4_resources), | 110 | .num_resources = ARRAY_SIZE(u8500_i2c4_resources), |
| 107 | }; | 111 | }; |
| 112 | |||
| 113 | static struct resource dma40_resources[] = { | ||
| 114 | [0] = { | ||
| 115 | .start = U8500_DMA_BASE, | ||
| 116 | .end = U8500_DMA_BASE + SZ_4K - 1, | ||
| 117 | .flags = IORESOURCE_MEM, | ||
| 118 | .name = "base", | ||
| 119 | }, | ||
| 120 | [1] = { | ||
| 121 | .start = U8500_DMA_LCPA_BASE, | ||
| 122 | .end = U8500_DMA_LCPA_BASE + SZ_4K - 1, | ||
| 123 | .flags = IORESOURCE_MEM, | ||
| 124 | .name = "lcpa", | ||
| 125 | }, | ||
| 126 | [2] = { | ||
| 127 | .start = U8500_DMA_LCLA_BASE, | ||
| 128 | .end = U8500_DMA_LCLA_BASE + 16 * 1024 - 1, | ||
| 129 | .flags = IORESOURCE_MEM, | ||
| 130 | .name = "lcla", | ||
| 131 | }, | ||
| 132 | [3] = { | ||
| 133 | .start = IRQ_DMA, | ||
| 134 | .end = IRQ_DMA, | ||
| 135 | .flags = IORESOURCE_IRQ} | ||
| 136 | }; | ||
| 137 | |||
| 138 | /* Default configuration for physcial memcpy */ | ||
| 139 | struct stedma40_chan_cfg dma40_memcpy_conf_phy = { | ||
| 140 | .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE | | ||
| 141 | STEDMA40_LOW_PRIORITY_CHANNEL | | ||
| 142 | STEDMA40_PCHAN_BASIC_MODE), | ||
| 143 | .dir = STEDMA40_MEM_TO_MEM, | ||
| 144 | |||
| 145 | .src_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
| 146 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
| 147 | .src_info.psize = STEDMA40_PSIZE_PHY_1, | ||
| 148 | |||
| 149 | .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
| 150 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
| 151 | .dst_info.psize = STEDMA40_PSIZE_PHY_1, | ||
| 152 | |||
| 153 | }; | ||
| 154 | /* Default configuration for logical memcpy */ | ||
| 155 | struct stedma40_chan_cfg dma40_memcpy_conf_log = { | ||
| 156 | .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE | | ||
| 157 | STEDMA40_LOW_PRIORITY_CHANNEL | | ||
| 158 | STEDMA40_LCHAN_SRC_LOG_DST_LOG | | ||
| 159 | STEDMA40_NO_TIM_FOR_LINK), | ||
| 160 | .dir = STEDMA40_MEM_TO_MEM, | ||
| 161 | |||
| 162 | .src_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
| 163 | .src_info.data_width = STEDMA40_BYTE_WIDTH, | ||
| 164 | .src_info.psize = STEDMA40_PSIZE_LOG_1, | ||
| 165 | |||
| 166 | .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, | ||
| 167 | .dst_info.data_width = STEDMA40_BYTE_WIDTH, | ||
| 168 | .dst_info.psize = STEDMA40_PSIZE_LOG_1, | ||
| 169 | |||
| 170 | }; | ||
| 171 | |||
| 172 | /* | ||
| 173 | * Mapping between destination event lines and physical device address. | ||
| 174 | * The event line is tied to a device and therefor the address is constant. | ||
| 175 | */ | ||
| 176 | static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV]; | ||
| 177 | |||
| 178 | /* Mapping between source event lines and physical device address */ | ||
| 179 | static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV]; | ||
| 180 | |||
| 181 | /* Reserved event lines for memcpy only */ | ||
| 182 | static int dma40_memcpy_event[] = { | ||
| 183 | STEDMA40_MEMCPY_TX_1, | ||
| 184 | STEDMA40_MEMCPY_TX_2, | ||
| 185 | STEDMA40_MEMCPY_TX_3, | ||
| 186 | STEDMA40_MEMCPY_TX_4, | ||
| 187 | }; | ||
| 188 | |||
| 189 | static struct stedma40_platform_data dma40_plat_data = { | ||
| 190 | .dev_len = STEDMA40_NR_DEV, | ||
| 191 | .dev_rx = dma40_rx_map, | ||
| 192 | .dev_tx = dma40_tx_map, | ||
| 193 | .memcpy = dma40_memcpy_event, | ||
| 194 | .memcpy_len = ARRAY_SIZE(dma40_memcpy_event), | ||
| 195 | .memcpy_conf_phy = &dma40_memcpy_conf_phy, | ||
| 196 | .memcpy_conf_log = &dma40_memcpy_conf_log, | ||
| 197 | .llis_per_log = 8, | ||
| 198 | }; | ||
| 199 | |||
| 200 | struct platform_device u8500_dma40_device = { | ||
| 201 | .dev = { | ||
| 202 | .platform_data = &dma40_plat_data, | ||
| 203 | }, | ||
| 204 | .name = "dma40", | ||
| 205 | .id = 0, | ||
| 206 | .num_resources = ARRAY_SIZE(dma40_resources), | ||
| 207 | .resource = dma40_resources | ||
| 208 | }; | ||
| 209 | |||
| 210 | void dma40_u8500ed_fixup(void) | ||
| 211 | { | ||
| 212 | dma40_plat_data.memcpy = NULL; | ||
| 213 | dma40_plat_data.memcpy_len = 0; | ||
| 214 | dma40_resources[0].start = U8500_DMA_BASE_ED; | ||
| 215 | dma40_resources[0].end = U8500_DMA_BASE_ED + SZ_4K - 1; | ||
| 216 | } | ||
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h index 9169e1e382a3..85fc6a80b386 100644 --- a/arch/arm/mach-ux500/include/mach/db8500-regs.h +++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h | |||
| @@ -7,6 +7,18 @@ | |||
| 7 | #ifndef __MACH_DB8500_REGS_H | 7 | #ifndef __MACH_DB8500_REGS_H |
| 8 | #define __MACH_DB8500_REGS_H | 8 | #define __MACH_DB8500_REGS_H |
| 9 | 9 | ||
| 10 | /* Base address and bank offsets for ESRAM */ | ||
| 11 | #define U8500_ESRAM_BASE 0x40000000 | ||
| 12 | #define U8500_ESRAM_BANK_SIZE 0x00020000 | ||
| 13 | #define U8500_ESRAM_BANK0 U8500_ESRAM_BASE | ||
| 14 | #define U8500_ESRAM_BANK1 (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE) | ||
| 15 | #define U8500_ESRAM_BANK2 (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE) | ||
| 16 | #define U8500_ESRAM_BANK3 (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE) | ||
| 17 | #define U8500_ESRAM_BANK4 (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE) | ||
| 18 | /* Use bank 4 for DMA LCLA and LCPA */ | ||
| 19 | #define U8500_DMA_LCLA_BASE U8500_ESRAM_BANK4 | ||
| 20 | #define U8500_DMA_LCPA_BASE (U8500_ESRAM_BANK4 + 0x4000) | ||
| 21 | |||
| 10 | #define U8500_PER3_BASE 0x80000000 | 22 | #define U8500_PER3_BASE 0x80000000 |
| 11 | #define U8500_STM_BASE 0x80100000 | 23 | #define U8500_STM_BASE 0x80100000 |
| 12 | #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) | 24 | #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) |
diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h index 0422af00a56e..c2b2f2574947 100644 --- a/arch/arm/mach-ux500/include/mach/devices.h +++ b/arch/arm/mach-ux500/include/mach/devices.h | |||
| @@ -25,5 +25,8 @@ extern struct platform_device ux500_i2c3_device; | |||
| 25 | 25 | ||
| 26 | extern struct platform_device u8500_i2c0_device; | 26 | extern struct platform_device u8500_i2c0_device; |
| 27 | extern struct platform_device u8500_i2c4_device; | 27 | extern struct platform_device u8500_i2c4_device; |
| 28 | extern struct platform_device u8500_dma40_device; | ||
| 29 | |||
| 30 | void dma40_u8500ed_fixup(void); | ||
| 28 | 31 | ||
| 29 | #endif | 32 | #endif |
diff --git a/arch/arm/mach-ux500/ste-dma40-db8500.h b/arch/arm/mach-ux500/ste-dma40-db8500.h new file mode 100644 index 000000000000..e7016278dfa9 --- /dev/null +++ b/arch/arm/mach-ux500/ste-dma40-db8500.h | |||
| @@ -0,0 +1,154 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-ux500/ste_dma40_db8500.h | ||
| 3 | * DB8500-SoC-specific configuration for DMA40 | ||
| 4 | * | ||
| 5 | * Copyright (C) ST-Ericsson 2007-2010 | ||
| 6 | * License terms: GNU General Public License (GPL) version 2 | ||
| 7 | * Author: Per Friden <per.friden@stericsson.com> | ||
| 8 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> | ||
| 9 | */ | ||
| 10 | #ifndef STE_DMA40_DB8500_H | ||
| 11 | #define STE_DMA40_DB8500_H | ||
| 12 | |||
| 13 | #define STEDMA40_NR_DEV 64 | ||
| 14 | |||
| 15 | enum dma_src_dev_type { | ||
| 16 | STEDMA40_DEV_SPI0_RX = 0, | ||
| 17 | STEDMA40_DEV_SD_MMC0_RX = 1, | ||
| 18 | STEDMA40_DEV_SD_MMC1_RX = 2, | ||
| 19 | STEDMA40_DEV_SD_MMC2_RX = 3, | ||
| 20 | STEDMA40_DEV_I2C1_RX = 4, | ||
| 21 | STEDMA40_DEV_I2C3_RX = 5, | ||
| 22 | STEDMA40_DEV_I2C2_RX = 6, | ||
| 23 | STEDMA40_DEV_I2C4_RX = 7, /* Only on V1 */ | ||
| 24 | STEDMA40_DEV_SSP0_RX = 8, | ||
| 25 | STEDMA40_DEV_SSP1_RX = 9, | ||
| 26 | STEDMA40_DEV_MCDE_RX = 10, | ||
| 27 | STEDMA40_DEV_UART2_RX = 11, | ||
| 28 | STEDMA40_DEV_UART1_RX = 12, | ||
| 29 | STEDMA40_DEV_UART0_RX = 13, | ||
| 30 | STEDMA40_DEV_MSP2_RX = 14, | ||
| 31 | STEDMA40_DEV_I2C0_RX = 15, | ||
| 32 | STEDMA40_DEV_USB_OTG_IEP_8 = 16, | ||
| 33 | STEDMA40_DEV_USB_OTG_IEP_1_9 = 17, | ||
| 34 | STEDMA40_DEV_USB_OTG_IEP_2_10 = 18, | ||
| 35 | STEDMA40_DEV_USB_OTG_IEP_3_11 = 19, | ||
| 36 | STEDMA40_DEV_SLIM0_CH0_RX_HSI_RX_CH0 = 20, | ||
| 37 | STEDMA40_DEV_SLIM0_CH1_RX_HSI_RX_CH1 = 21, | ||
| 38 | STEDMA40_DEV_SLIM0_CH2_RX_HSI_RX_CH2 = 22, | ||
| 39 | STEDMA40_DEV_SLIM0_CH3_RX_HSI_RX_CH3 = 23, | ||
| 40 | STEDMA40_DEV_SRC_SXA0_RX_TX = 24, | ||
| 41 | STEDMA40_DEV_SRC_SXA1_RX_TX = 25, | ||
| 42 | STEDMA40_DEV_SRC_SXA2_RX_TX = 26, | ||
| 43 | STEDMA40_DEV_SRC_SXA3_RX_TX = 27, | ||
| 44 | STEDMA40_DEV_SD_MM2_RX = 28, | ||
| 45 | STEDMA40_DEV_SD_MM0_RX = 29, | ||
| 46 | STEDMA40_DEV_MSP1_RX = 30, | ||
| 47 | /* | ||
| 48 | * This channel is either SlimBus or MSP, | ||
| 49 | * never both at the same time. | ||
| 50 | */ | ||
| 51 | STEDMA40_SLIM0_CH0_RX = 31, | ||
| 52 | STEDMA40_DEV_MSP0_RX = 31, | ||
| 53 | STEDMA40_DEV_SD_MM1_RX = 32, | ||
| 54 | STEDMA40_DEV_SPI2_RX = 33, | ||
| 55 | STEDMA40_DEV_I2C3_RX2 = 34, | ||
| 56 | STEDMA40_DEV_SPI1_RX = 35, | ||
| 57 | STEDMA40_DEV_USB_OTG_IEP_4_12 = 36, | ||
| 58 | STEDMA40_DEV_USB_OTG_IEP_5_13 = 37, | ||
| 59 | STEDMA40_DEV_USB_OTG_IEP_6_14 = 38, | ||
| 60 | STEDMA40_DEV_USB_OTG_IEP_7_15 = 39, | ||
| 61 | STEDMA40_DEV_SPI3_RX = 40, | ||
| 62 | STEDMA40_DEV_SD_MM3_RX = 41, | ||
| 63 | STEDMA40_DEV_SD_MM4_RX = 42, | ||
| 64 | STEDMA40_DEV_SD_MM5_RX = 43, | ||
| 65 | STEDMA40_DEV_SRC_SXA4_RX_TX = 44, | ||
| 66 | STEDMA40_DEV_SRC_SXA5_RX_TX = 45, | ||
| 67 | STEDMA40_DEV_SRC_SXA6_RX_TX = 46, | ||
| 68 | STEDMA40_DEV_SRC_SXA7_RX_TX = 47, | ||
| 69 | STEDMA40_DEV_CAC1_RX = 48, | ||
| 70 | /* RX channels 49 and 50 are unused */ | ||
| 71 | STEDMA40_DEV_MSHC_RX = 51, | ||
| 72 | STEDMA40_DEV_SLIM1_CH0_RX_HSI_RX_CH4 = 52, | ||
| 73 | STEDMA40_DEV_SLIM1_CH1_RX_HSI_RX_CH5 = 53, | ||
| 74 | STEDMA40_DEV_SLIM1_CH2_RX_HSI_RX_CH6 = 54, | ||
| 75 | STEDMA40_DEV_SLIM1_CH3_RX_HSI_RX_CH7 = 55, | ||
| 76 | /* RX channels 56 thru 60 are unused */ | ||
| 77 | STEDMA40_DEV_CAC0_RX = 61, | ||
| 78 | /* RX channels 62 and 63 are unused */ | ||
| 79 | }; | ||
| 80 | |||
| 81 | enum dma_dest_dev_type { | ||
| 82 | STEDMA40_DEV_SPI0_TX = 0, | ||
| 83 | STEDMA40_DEV_SD_MMC0_TX = 1, | ||
| 84 | STEDMA40_DEV_SD_MMC1_TX = 2, | ||
| 85 | STEDMA40_DEV_SD_MMC2_TX = 3, | ||
| 86 | STEDMA40_DEV_I2C1_TX = 4, | ||
| 87 | STEDMA40_DEV_I2C3_TX = 5, | ||
| 88 | STEDMA40_DEV_I2C2_TX = 6, | ||
| 89 | STEDMA50_DEV_I2C4_TX = 7, /* Only on V1 */ | ||
| 90 | STEDMA40_DEV_SSP0_TX = 8, | ||
| 91 | STEDMA40_DEV_SSP1_TX = 9, | ||
| 92 | /* TX channel 10 is unused */ | ||
| 93 | STEDMA40_DEV_UART2_TX = 11, | ||
| 94 | STEDMA40_DEV_UART1_TX = 12, | ||
| 95 | STEDMA40_DEV_UART0_TX= 13, | ||
| 96 | STEDMA40_DEV_MSP2_TX = 14, | ||
| 97 | STEDMA40_DEV_I2C0_TX = 15, | ||
| 98 | STEDMA40_DEV_USB_OTG_OEP_8 = 16, | ||
| 99 | STEDMA40_DEV_USB_OTG_OEP_1_9 = 17, | ||
| 100 | STEDMA40_DEV_USB_OTG_OEP_2_10= 18, | ||
| 101 | STEDMA40_DEV_USB_OTG_OEP_3_11 = 19, | ||
| 102 | STEDMA40_DEV_SLIM0_CH0_TX_HSI_TX_CH0 = 20, | ||
| 103 | STEDMA40_DEV_SLIM0_CH1_TX_HSI_TX_CH1 = 21, | ||
| 104 | STEDMA40_DEV_SLIM0_CH2_TX_HSI_TX_CH2 = 22, | ||
| 105 | STEDMA40_DEV_SLIM0_CH3_TX_HSI_TX_CH3 = 23, | ||
| 106 | STEDMA40_DEV_DST_SXA0_RX_TX = 24, | ||
| 107 | STEDMA40_DEV_DST_SXA1_RX_TX = 25, | ||
| 108 | STEDMA40_DEV_DST_SXA2_RX_TX = 26, | ||
| 109 | STEDMA40_DEV_DST_SXA3_RX_TX = 27, | ||
| 110 | STEDMA40_DEV_SD_MM2_TX = 28, | ||
| 111 | STEDMA40_DEV_SD_MM0_TX = 29, | ||
| 112 | STEDMA40_DEV_MSP1_TX = 30, | ||
| 113 | /* | ||
| 114 | * This channel is either SlimBus or MSP, | ||
| 115 | * never both at the same time. | ||
| 116 | */ | ||
| 117 | STEDMA40_SLIM0_CH0_TX = 31, | ||
| 118 | STEDMA40_DEV_MSP0_TX = 31, | ||
| 119 | STEDMA40_DEV_SD_MM1_TX = 32, | ||
| 120 | STEDMA40_DEV_SPI2_TX = 33, | ||
| 121 | /* Secondary I2C3 channel */ | ||
| 122 | STEDMA40_DEV_I2C3_TX2 = 34, | ||
| 123 | STEDMA40_DEV_SPI1_TX = 35, | ||
| 124 | STEDMA40_DEV_USB_OTG_OEP_4_12 = 36, | ||
| 125 | STEDMA40_DEV_USB_OTG_OEP_5_13 = 37, | ||
| 126 | STEDMA40_DEV_USB_OTG_OEP_6_14 = 38, | ||
| 127 | STEDMA40_DEV_USB_OTG_OEP_7_15 = 39, | ||
| 128 | STEDMA40_DEV_SPI3_TX = 40, | ||
| 129 | STEDMA40_DEV_SD_MM3_TX = 41, | ||
| 130 | STEDMA40_DEV_SD_MM4_TX = 42, | ||
| 131 | STEDMA40_DEV_SD_MM5_TX = 43, | ||
| 132 | STEDMA40_DEV_DST_SXA4_RX_TX = 44, | ||
| 133 | STEDMA40_DEV_DST_SXA5_RX_TX = 45, | ||
| 134 | STEDMA40_DEV_DST_SXA6_RX_TX = 46, | ||
| 135 | STEDMA40_DEV_DST_SXA7_RX_TX = 47, | ||
| 136 | STEDMA40_DEV_CAC1_TX = 48, | ||
| 137 | STEDMA40_DEV_CAC1_TX_HAC1_TX = 49, | ||
| 138 | STEDMA40_DEV_HAC1_TX = 50, | ||
| 139 | STEDMA40_MEMXCPY_TX_0 = 51, | ||
| 140 | STEDMA40_DEV_SLIM1_CH0_TX_HSI_TX_CH4 = 52, | ||
| 141 | STEDMA40_DEV_SLIM1_CH1_TX_HSI_TX_CH5 = 53, | ||
| 142 | STEDMA40_DEV_SLIM1_CH2_TX_HSI_TX_CH6 = 54, | ||
| 143 | STEDMA40_DEV_SLIM1_CH3_TX_HSI_TX_CH7 = 55, | ||
| 144 | STEDMA40_MEMCPY_TX_1 = 56, | ||
| 145 | STEDMA40_MEMCPY_TX_2 = 57, | ||
| 146 | STEDMA40_MEMCPY_TX_3 = 58, | ||
| 147 | STEDMA40_MEMCPY_TX_4 = 59, | ||
| 148 | STEDMA40_MEMCPY_TX_5 = 60, | ||
| 149 | STEDMA40_DEV_CAC0_TX = 61, | ||
| 150 | STEDMA40_DEV_CAC0_TX_HAC0_TX = 62, | ||
| 151 | STEDMA40_DEV_HAC0_TX = 63, | ||
| 152 | }; | ||
| 153 | |||
| 154 | #endif | ||
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c index e2958eb567f9..b2eda4dc1c34 100644 --- a/arch/arm/mach-w90x900/dev.c +++ b/arch/arm/mach-w90x900/dev.c | |||
| @@ -423,6 +423,33 @@ void nuc900_fb_set_platdata(struct nuc900fb_mach_info *pd) | |||
| 423 | } | 423 | } |
| 424 | #endif | 424 | #endif |
| 425 | 425 | ||
| 426 | /* AUDIO controller*/ | ||
| 427 | static u64 nuc900_device_audio_dmamask = -1; | ||
| 428 | static struct resource nuc900_ac97_resource[] = { | ||
| 429 | [0] = { | ||
| 430 | .start = W90X900_PA_ACTL, | ||
| 431 | .end = W90X900_PA_ACTL + W90X900_SZ_ACTL - 1, | ||
| 432 | .flags = IORESOURCE_MEM, | ||
| 433 | }, | ||
| 434 | [1] = { | ||
| 435 | .start = IRQ_ACTL, | ||
| 436 | .end = IRQ_ACTL, | ||
| 437 | .flags = IORESOURCE_IRQ, | ||
| 438 | } | ||
| 439 | |||
| 440 | }; | ||
| 441 | |||
| 442 | struct platform_device nuc900_device_audio = { | ||
| 443 | .name = "nuc900-audio", | ||
| 444 | .id = -1, | ||
| 445 | .num_resources = ARRAY_SIZE(nuc900_ac97_resource), | ||
| 446 | .resource = nuc900_ac97_resource, | ||
| 447 | .dev = { | ||
| 448 | .dma_mask = &nuc900_device_audio_dmamask, | ||
| 449 | .coherent_dma_mask = -1, | ||
| 450 | } | ||
| 451 | }; | ||
| 452 | |||
| 426 | /*Here should be your evb resourse,such as LCD*/ | 453 | /*Here should be your evb resourse,such as LCD*/ |
| 427 | 454 | ||
| 428 | static struct platform_device *nuc900_public_dev[] __initdata = { | 455 | static struct platform_device *nuc900_public_dev[] __initdata = { |
| @@ -434,6 +461,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = { | |||
| 434 | &nuc900_device_emc, | 461 | &nuc900_device_emc, |
| 435 | &nuc900_device_spi, | 462 | &nuc900_device_spi, |
| 436 | &nuc900_device_wdt, | 463 | &nuc900_device_wdt, |
| 464 | &nuc900_device_audio, | ||
| 437 | }; | 465 | }; |
| 438 | 466 | ||
| 439 | /* Provide adding specific CPU platform devices API */ | 467 | /* Provide adding specific CPU platform devices API */ |
diff --git a/arch/arm/mach-w90x900/include/mach/mfp.h b/arch/arm/mach-w90x900/include/mach/mfp.h new file mode 100644 index 000000000000..94c0e71617c6 --- /dev/null +++ b/arch/arm/mach-w90x900/include/mach/mfp.h | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | /* | ||
| 2 | * arch/arm/mach-w90x900/include/mach/mfp.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Nuvoton technology corporation. | ||
| 5 | * | ||
| 6 | * Wan ZongShun <mcuos.com@gmail.com> | ||
| 7 | * | ||
| 8 | * Based on arch/arm/mach-s3c2410/include/mach/map.h | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation;version 2 of the License. | ||
| 13 | * | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef __ASM_ARCH_MFP_H | ||
| 17 | #define __ASM_ARCH_MFP_H | ||
| 18 | |||
| 19 | extern void mfp_set_groupf(struct device *dev); | ||
| 20 | extern void mfp_set_groupc(struct device *dev); | ||
| 21 | extern void mfp_set_groupi(struct device *dev); | ||
| 22 | extern void mfp_set_groupg(struct device *dev); | ||
| 23 | |||
| 24 | #endif /* __ASM_ARCH_MFP_H */ | ||
diff --git a/arch/arm/mach-w90x900/mfp.c b/arch/arm/mach-w90x900/mfp.c index a47dc9a708ee..fb7fb627b1a5 100644 --- a/arch/arm/mach-w90x900/mfp.c +++ b/arch/arm/mach-w90x900/mfp.c | |||
| @@ -36,9 +36,12 @@ | |||
| 36 | 36 | ||
| 37 | #define GPIOG0TO1 (0x03 << 14) | 37 | #define GPIOG0TO1 (0x03 << 14) |
| 38 | #define GPIOG2TO3 (0x03 << 16) | 38 | #define GPIOG2TO3 (0x03 << 16) |
| 39 | #define GPIOG22TO23 (0x03 << 22) | ||
| 40 | |||
| 39 | #define ENSPI (0x0a << 14) | 41 | #define ENSPI (0x0a << 14) |
| 40 | #define ENI2C0 (0x01 << 14) | 42 | #define ENI2C0 (0x01 << 14) |
| 41 | #define ENI2C1 (0x01 << 16) | 43 | #define ENI2C1 (0x01 << 16) |
| 44 | #define ENAC97 (0x02 << 22) | ||
| 42 | 45 | ||
| 43 | static DEFINE_MUTEX(mfp_mutex); | 46 | static DEFINE_MUTEX(mfp_mutex); |
| 44 | 47 | ||
| @@ -146,6 +149,9 @@ void mfp_set_groupg(struct device *dev) | |||
| 146 | } else if (strcmp(dev_id, "nuc900-i2c1") == 0) { | 149 | } else if (strcmp(dev_id, "nuc900-i2c1") == 0) { |
| 147 | mfpen &= ~(GPIOG2TO3); | 150 | mfpen &= ~(GPIOG2TO3); |
| 148 | mfpen |= ENI2C1;/*enable i2c1*/ | 151 | mfpen |= ENI2C1;/*enable i2c1*/ |
| 152 | } else if (strcmp(dev_id, "nuc900-audio") == 0) { | ||
| 153 | mfpen &= ~(GPIOG22TO23); | ||
| 154 | mfpen |= ENAC97;/*enable AC97*/ | ||
| 149 | } else { | 155 | } else { |
| 150 | mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/ | 156 | mfpen &= ~(GPIOG0TO1 | GPIOG2TO3);/*GPIOG[3:0]*/ |
| 151 | } | 157 | } |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 06a90dcfc60a..37c8157e116e 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
| @@ -91,7 +91,11 @@ ENTRY(v7_flush_kern_cache_all) | |||
| 91 | THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) | 91 | THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) |
| 92 | bl v7_flush_dcache_all | 92 | bl v7_flush_dcache_all |
| 93 | mov r0, #0 | 93 | mov r0, #0 |
| 94 | #ifdef CONFIG_SMP | ||
| 95 | mcr p15, 0, r0, c7, c1, 0 @ invalidate I-cache inner shareable | ||
| 96 | #else | ||
| 94 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate | 97 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate |
| 98 | #endif | ||
| 95 | ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) | 99 | ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) |
| 96 | THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) | 100 | THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) |
| 97 | mov pc, lr | 101 | mov pc, lr |
diff --git a/arch/arm/nwfpe/ChangeLog b/arch/arm/nwfpe/ChangeLog index eeb5a7c5ff09..fa8028b1e1cf 100644 --- a/arch/arm/nwfpe/ChangeLog +++ b/arch/arm/nwfpe/ChangeLog | |||
| @@ -72,7 +72,7 @@ | |||
| 72 | 1998-11-23 Scott Bambrough <scottb@netwinder.org> | 72 | 1998-11-23 Scott Bambrough <scottb@netwinder.org> |
| 73 | 73 | ||
| 74 | * README.FPE - fix typo in description of lfm/sfm instructions | 74 | * README.FPE - fix typo in description of lfm/sfm instructions |
| 75 | * NOTES - Added file to describe known bugs/problems | 75 | * NOTES - Added file to describe known bugs/problems |
| 76 | * fpmodule.c - Changed version number to 0.94 | 76 | * fpmodule.c - Changed version number to 0.94 |
| 77 | 77 | ||
| 78 | 1998-11-20 Scott Bambrough <scottb@netwinder.org> | 78 | 1998-11-20 Scott Bambrough <scottb@netwinder.org> |
diff --git a/arch/arm/nwfpe/fpsr.h b/arch/arm/nwfpe/fpsr.h index 859b300d89fd..bd425dc13b61 100644 --- a/arch/arm/nwfpe/fpsr.h +++ b/arch/arm/nwfpe/fpsr.h | |||
| @@ -30,7 +30,7 @@ one byte. | |||
| 30 | EXCEPTION TRAP ENABLE BYTE | 30 | EXCEPTION TRAP ENABLE BYTE |
| 31 | SYSTEM CONTROL BYTE | 31 | SYSTEM CONTROL BYTE |
| 32 | CUMULATIVE EXCEPTION FLAGS BYTE | 32 | CUMULATIVE EXCEPTION FLAGS BYTE |
| 33 | 33 | ||
| 34 | The FPCR is a 32 bit register consisting of bit flags. | 34 | The FPCR is a 32 bit register consisting of bit flags. |
| 35 | */ | 35 | */ |
| 36 | 36 | ||
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c index cb0b63874482..2a8646173c2f 100644 --- a/arch/arm/plat-mxc/ehci.c +++ b/arch/arm/plat-mxc/ehci.c | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> | 2 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> |
| 3 | * Copyright (C) 2010 Freescale Semiconductor, Inc. | ||
| 3 | * | 4 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the | 6 | * under the terms of the GNU General Public License as published by the |
| @@ -50,7 +51,26 @@ | |||
| 50 | #define MX35_H1_TLL_BIT (1 << 5) | 51 | #define MX35_H1_TLL_BIT (1 << 5) |
| 51 | #define MX35_H1_USBTE_BIT (1 << 4) | 52 | #define MX35_H1_USBTE_BIT (1 << 4) |
| 52 | 53 | ||
| 53 | int mxc_set_usbcontrol(int port, unsigned int flags) | 54 | #define MXC_OTG_OFFSET 0 |
| 55 | #define MXC_H1_OFFSET 0x200 | ||
| 56 | |||
| 57 | /* USB_CTRL */ | ||
| 58 | #define MXC_OTG_UCTRL_OWIE_BIT (1 << 27) /* OTG wakeup intr enable */ | ||
| 59 | #define MXC_OTG_UCTRL_OPM_BIT (1 << 24) /* OTG power mask */ | ||
| 60 | #define MXC_H1_UCTRL_H1UIE_BIT (1 << 12) /* Host1 ULPI interrupt enable */ | ||
| 61 | #define MXC_H1_UCTRL_H1WIE_BIT (1 << 11) /* HOST1 wakeup intr enable */ | ||
| 62 | #define MXC_H1_UCTRL_H1PM_BIT (1 << 8) /* HOST1 power mask */ | ||
| 63 | |||
| 64 | /* USB_PHY_CTRL_FUNC */ | ||
| 65 | #define MXC_OTG_PHYCTRL_OC_DIS_BIT (1 << 8) /* OTG Disable Overcurrent Event */ | ||
| 66 | #define MXC_H1_OC_DIS_BIT (1 << 5) /* UH1 Disable Overcurrent Event */ | ||
| 67 | |||
| 68 | #define MXC_USBCMD_OFFSET 0x140 | ||
| 69 | |||
| 70 | /* USBCMD */ | ||
| 71 | #define MXC_UCMD_ITC_NO_THRESHOLD_MASK (~(0xff << 16)) /* Interrupt Threshold Control */ | ||
| 72 | |||
| 73 | int mxc_initialize_usb_hw(int port, unsigned int flags) | ||
| 54 | { | 74 | { |
| 55 | unsigned int v; | 75 | unsigned int v; |
| 56 | #ifdef CONFIG_ARCH_MX3 | 76 | #ifdef CONFIG_ARCH_MX3 |
| @@ -186,9 +206,85 @@ int mxc_set_usbcontrol(int port, unsigned int flags) | |||
| 186 | return 0; | 206 | return 0; |
| 187 | } | 207 | } |
| 188 | #endif /* CONFIG_MACH_MX27 */ | 208 | #endif /* CONFIG_MACH_MX27 */ |
| 209 | #ifdef CONFIG_ARCH_MX51 | ||
| 210 | if (cpu_is_mx51()) { | ||
| 211 | void __iomem *usb_base; | ||
| 212 | u32 usbotg_base; | ||
| 213 | u32 usbother_base; | ||
| 214 | int ret = 0; | ||
| 215 | |||
| 216 | usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K); | ||
| 217 | |||
| 218 | switch (port) { | ||
| 219 | case 0: /* OTG port */ | ||
| 220 | usbotg_base = usb_base + MXC_OTG_OFFSET; | ||
| 221 | break; | ||
| 222 | case 1: /* Host 1 port */ | ||
| 223 | usbotg_base = usb_base + MXC_H1_OFFSET; | ||
| 224 | break; | ||
| 225 | default: | ||
| 226 | printk(KERN_ERR"%s no such port %d\n", __func__, port); | ||
| 227 | ret = -ENOENT; | ||
| 228 | goto error; | ||
| 229 | } | ||
| 230 | usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET; | ||
| 231 | |||
| 232 | switch (port) { | ||
| 233 | case 0: /*OTG port */ | ||
| 234 | if (flags & MXC_EHCI_INTERNAL_PHY) { | ||
| 235 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | ||
| 236 | |||
| 237 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | ||
| 238 | v |= (MXC_OTG_PHYCTRL_OC_DIS_BIT | MXC_OTG_UCTRL_OPM_BIT); /* OC/USBPWR is not used */ | ||
| 239 | else | ||
| 240 | v &= ~(MXC_OTG_PHYCTRL_OC_DIS_BIT | MXC_OTG_UCTRL_OPM_BIT); /* OC/USBPWR is used */ | ||
| 241 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | ||
| 242 | |||
| 243 | v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); | ||
| 244 | if (flags & MXC_EHCI_WAKEUP_ENABLED) | ||
| 245 | v |= MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup enable */ | ||
| 246 | else | ||
| 247 | v &= ~MXC_OTG_UCTRL_OWIE_BIT;/* OTG wakeup disable */ | ||
| 248 | __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET); | ||
| 249 | } | ||
| 250 | break; | ||
| 251 | case 1: /* Host 1 */ | ||
| 252 | /*Host ULPI */ | ||
| 253 | v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET); | ||
| 254 | if (flags & MXC_EHCI_WAKEUP_ENABLED) | ||
| 255 | v &= ~(MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT);/* HOST1 wakeup/ULPI intr disable */ | ||
| 256 | else | ||
| 257 | v &= ~(MXC_H1_UCTRL_H1WIE_BIT | MXC_H1_UCTRL_H1UIE_BIT);/* HOST1 wakeup/ULPI intr disable */ | ||
| 258 | |||
| 259 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | ||
| 260 | v &= ~MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/ | ||
| 261 | else | ||
| 262 | v |= MXC_H1_UCTRL_H1PM_BIT; /* HOST1 power mask used*/ | ||
| 263 | __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET); | ||
| 264 | |||
| 265 | v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | ||
| 266 | if (flags & MXC_EHCI_POWER_PINS_ENABLED) | ||
| 267 | v &= ~MXC_H1_OC_DIS_BIT; /* OC is used */ | ||
| 268 | else | ||
| 269 | v |= MXC_H1_OC_DIS_BIT; /* OC is not used */ | ||
| 270 | __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); | ||
| 271 | |||
| 272 | v = __raw_readl(usbotg_base + MXC_USBCMD_OFFSET); | ||
| 273 | if (flags & MXC_EHCI_ITC_NO_THRESHOLD) | ||
| 274 | /* Interrupt Threshold Control:Immediate (no threshold) */ | ||
| 275 | v &= MXC_UCMD_ITC_NO_THRESHOLD_MASK; | ||
| 276 | __raw_writel(v, usbotg_base + MXC_USBCMD_OFFSET); | ||
| 277 | break; | ||
| 278 | } | ||
| 279 | |||
| 280 | error: | ||
| 281 | iounmap(usb_base); | ||
| 282 | return ret; | ||
| 283 | } | ||
| 284 | #endif | ||
| 189 | printk(KERN_WARNING | 285 | printk(KERN_WARNING |
| 190 | "%s() unable to setup USBCONTROL for this CPU\n", __func__); | 286 | "%s() unable to setup USBCONTROL for this CPU\n", __func__); |
| 191 | return -EINVAL; | 287 | return -EINVAL; |
| 192 | } | 288 | } |
| 193 | EXPORT_SYMBOL(mxc_set_usbcontrol); | 289 | EXPORT_SYMBOL(mxc_initialize_usb_hw); |
| 194 | 290 | ||
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 70b23893f094..71437c61cfd7 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c | |||
| @@ -3,7 +3,7 @@ | |||
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * | 4 | * |
| 5 | * Based on code from Freescale, | 5 | * Based on code from Freescale, |
| 6 | * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. | 6 | * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. |
| 7 | * | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or | 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License | 9 | * modify it under the terms of the GNU General Public License |
| @@ -38,7 +38,6 @@ static int gpio_table_size; | |||
| 38 | #define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10) | 38 | #define GPIO_ICR2 (cpu_is_mx1_mx2() ? 0x2C : 0x10) |
| 39 | #define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14) | 39 | #define GPIO_IMR (cpu_is_mx1_mx2() ? 0x30 : 0x14) |
| 40 | #define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) | 40 | #define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) |
| 41 | #define GPIO_ISR (cpu_is_mx1_mx2() ? 0x34 : 0x18) | ||
| 42 | 41 | ||
| 43 | #define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0) | 42 | #define GPIO_INT_LOW_LEV (cpu_is_mx1_mx2() ? 0x3 : 0x0) |
| 44 | #define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1) | 43 | #define GPIO_INT_HIGH_LEV (cpu_is_mx1_mx2() ? 0x2 : 0x1) |
| @@ -289,7 +288,7 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt) | |||
| 289 | /* its a serious configuration bug when it fails */ | 288 | /* its a serious configuration bug when it fails */ |
| 290 | BUG_ON( gpiochip_add(&port[i].chip) < 0 ); | 289 | BUG_ON( gpiochip_add(&port[i].chip) < 0 ); |
| 291 | 290 | ||
| 292 | if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25()) { | 291 | if (cpu_is_mx1() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { |
| 293 | /* setup one handler for each entry */ | 292 | /* setup one handler for each entry */ |
| 294 | set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler); | 293 | set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler); |
| 295 | set_irq_data(port[i].irq, &port[i]); | 294 | set_irq_data(port[i].irq, &port[i]); |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h index fc5fec9b55f0..36ff3cedee1a 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h | |||
| @@ -26,6 +26,7 @@ enum mx31moboard_boards { | |||
| 26 | MX31DEVBOARD = 1, | 26 | MX31DEVBOARD = 1, |
| 27 | MX31MARXBOT = 2, | 27 | MX31MARXBOT = 2, |
| 28 | MX31SMARTBOT = 3, | 28 | MX31SMARTBOT = 3, |
| 29 | MX31EYEBOT = 4, | ||
| 29 | }; | 30 | }; |
| 30 | 31 | ||
| 31 | /* | 32 | /* |
| @@ -35,7 +36,7 @@ enum mx31moboard_boards { | |||
| 35 | 36 | ||
| 36 | extern void mx31moboard_devboard_init(void); | 37 | extern void mx31moboard_devboard_init(void); |
| 37 | extern void mx31moboard_marxbot_init(void); | 38 | extern void mx31moboard_marxbot_init(void); |
| 38 | extern void mx31moboard_smartbot_init(void); | 39 | extern void mx31moboard_smartbot_init(int board); |
| 39 | 40 | ||
| 40 | #endif | 41 | #endif |
| 41 | 42 | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index e51465d7b224..cbaed295a2bf 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h | |||
| @@ -719,6 +719,23 @@ enum iomux_pins { | |||
| 719 | #define MX31_PIN_SRXD5__SRXD5 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_FUNC) | 719 | #define MX31_PIN_SRXD5__SRXD5 IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_FUNC) |
| 720 | #define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC) | 720 | #define MX31_PIN_SCK5__SCK5 IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC) |
| 721 | #define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC) | 721 | #define MX31_PIN_SFS5__SFS5 IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC) |
| 722 | #define MX31_PIN_KEY_ROW0_KEY_ROW0 IOMUX_MODE(MX31_PIN_KEY_ROW0, IOMUX_CONFIG_FUNC) | ||
| 723 | #define MX31_PIN_KEY_ROW1_KEY_ROW1 IOMUX_MODE(MX31_PIN_KEY_ROW1, IOMUX_CONFIG_FUNC) | ||
| 724 | #define MX31_PIN_KEY_ROW2_KEY_ROW2 IOMUX_MODE(MX31_PIN_KEY_ROW2, IOMUX_CONFIG_FUNC) | ||
| 725 | #define MX31_PIN_KEY_ROW3_KEY_ROW3 IOMUX_MODE(MX31_PIN_KEY_ROW3, IOMUX_CONFIG_FUNC) | ||
| 726 | #define MX31_PIN_KEY_ROW4_KEY_ROW4 IOMUX_MODE(MX31_PIN_KEY_ROW4, IOMUX_CONFIG_FUNC) | ||
| 727 | #define MX31_PIN_KEY_ROW5_KEY_ROW5 IOMUX_MODE(MX31_PIN_KEY_ROW5, IOMUX_CONFIG_FUNC) | ||
| 728 | #define MX31_PIN_KEY_ROW6_KEY_ROW6 IOMUX_MODE(MX31_PIN_KEY_ROW6, IOMUX_CONFIG_FUNC) | ||
| 729 | #define MX31_PIN_KEY_ROW7_KEY_ROW7 IOMUX_MODE(MX31_PIN_KEY_ROW7, IOMUX_CONFIG_FUNC) | ||
| 730 | #define MX31_PIN_KEY_COL0_KEY_COL0 IOMUX_MODE(MX31_PIN_KEY_COL0, IOMUX_CONFIG_FUNC) | ||
| 731 | #define MX31_PIN_KEY_COL1_KEY_COL1 IOMUX_MODE(MX31_PIN_KEY_COL1, IOMUX_CONFIG_FUNC) | ||
| 732 | #define MX31_PIN_KEY_COL2_KEY_COL2 IOMUX_MODE(MX31_PIN_KEY_COL2, IOMUX_CONFIG_FUNC) | ||
| 733 | #define MX31_PIN_KEY_COL3_KEY_COL3 IOMUX_MODE(MX31_PIN_KEY_COL3, IOMUX_CONFIG_FUNC) | ||
| 734 | #define MX31_PIN_KEY_COL4_KEY_COL4 IOMUX_MODE(MX31_PIN_KEY_COL4, IOMUX_CONFIG_FUNC) | ||
| 735 | #define MX31_PIN_KEY_COL5_KEY_COL5 IOMUX_MODE(MX31_PIN_KEY_COL5, IOMUX_CONFIG_FUNC) | ||
| 736 | #define MX31_PIN_KEY_COL6_KEY_COL6 IOMUX_MODE(MX31_PIN_KEY_COL6, IOMUX_CONFIG_FUNC) | ||
| 737 | #define MX31_PIN_KEY_COL7_KEY_COL7 IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_FUNC) | ||
| 738 | |||
| 722 | 739 | ||
| 723 | /* | 740 | /* |
| 724 | * XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed with cspi2_ss0, | 741 | * XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed with cspi2_ss0, |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index b4f975e6a665..ab0f95d953d0 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h | |||
| @@ -1,5 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com> | 2 | * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com> |
| 3 | * Copyright (C) 2010 Freescale Semiconductor, Inc. | ||
| 3 | * | 4 | * |
| 4 | * The code contained herein is licensed under the GNU General Public | 5 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License | 6 | * License. You may obtain a copy of the GNU General Public License |
| @@ -37,6 +38,11 @@ typedef enum iomux_config { | |||
| 37 | PAD_CTL_SRE_FAST) | 38 | PAD_CTL_SRE_FAST) |
| 38 | #define MX51_UART3_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ | 39 | #define MX51_UART3_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \ |
| 39 | PAD_CTL_SRE_FAST) | 40 | PAD_CTL_SRE_FAST) |
| 41 | #define MX51_USBH1_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ | ||
| 42 | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ | ||
| 43 | PAD_CTL_PKE | PAD_CTL_HYS) | ||
| 44 | #define MX51_GPIO_PAD_CTRL (PAD_CTL_DSE_HIGH | PAD_CTL_PKE | \ | ||
| 45 | PAD_CTL_SRE_FAST) | ||
| 40 | 46 | ||
| 41 | /* | 47 | /* |
| 42 | * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode> | 48 | * The naming convention for the pad modes is MX51_PAD_<padname>__<padmode> |
| @@ -57,6 +63,7 @@ typedef enum iomux_config { | |||
| 57 | #define MX51_PAD_GPIO_2_3__EIM_D19 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL) | 63 | #define MX51_PAD_GPIO_2_3__EIM_D19 IOMUX_PAD(0x3fc, 0x068, 1, 0x0, 0, NO_PAD_CTRL) |
| 58 | #define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL) | 64 | #define MX51_PAD_GPIO_2_4__EIM_D20 IOMUX_PAD(0x400, 0x06c, 1, 0x0, 0, NO_PAD_CTRL) |
| 59 | #define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL) | 65 | #define MX51_PAD_GPIO_2_5__EIM_D21 IOMUX_PAD(0x404, 0x070, 1, 0x0, 0, NO_PAD_CTRL) |
| 66 | #define MX51_PAD_EIM_D21__GPIO_2_5 IOMUX_PAD(0x404, 0x070, IOMUX_CONFIG_ALT1, 0x0, 0, MX51_GPIO_PAD_CTRL) | ||
| 60 | #define MX51_PAD_GPIO_2_6__EIM_D22 IOMUX_PAD(0x408, 0x074, 1, 0x0, 0, NO_PAD_CTRL) | 67 | #define MX51_PAD_GPIO_2_6__EIM_D22 IOMUX_PAD(0x408, 0x074, 1, 0x0, 0, NO_PAD_CTRL) |
| 61 | #define MX51_PAD_GPIO_2_7__EIM_D23 IOMUX_PAD(0x40c, 0x078, 1, 0x0, 0, NO_PAD_CTRL) | 68 | #define MX51_PAD_GPIO_2_7__EIM_D23 IOMUX_PAD(0x40c, 0x078, 1, 0x0, 0, NO_PAD_CTRL) |
| 62 | 69 | ||
| @@ -208,18 +215,19 @@ typedef enum iomux_config { | |||
| 208 | #define MX51_PAD_KEY_COL3__KEY_COL3 IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL) | 215 | #define MX51_PAD_KEY_COL3__KEY_COL3 IOMUX_PAD(0x658, 0x268, 0, 0x0, 0, NO_PAD_CTRL) |
| 209 | #define MX51_PAD_KEY_COL4__KEY_COL4 IOMUX_PAD(0x65C, 0x26C, 0, 0x0, 0, NO_PAD_CTRL) | 216 | #define MX51_PAD_KEY_COL4__KEY_COL4 IOMUX_PAD(0x65C, 0x26C, 0, 0x0, 0, NO_PAD_CTRL) |
| 210 | #define MX51_PAD_KEY_COL5__KEY_COL5 IOMUX_PAD(0x660, 0x270, 0, 0x0, 0, NO_PAD_CTRL) | 217 | #define MX51_PAD_KEY_COL5__KEY_COL5 IOMUX_PAD(0x660, 0x270, 0, 0x0, 0, NO_PAD_CTRL) |
| 211 | #define MX51_PAD_GPIO_1_25__USBH1_CLK IOMUX_PAD(0x678, 0x278, 2, 0x0, 0, NO_PAD_CTRL) | 218 | #define MX51_PAD_USBH1_CLK__USBH1_CLK IOMUX_PAD(0x678, 0x278, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 212 | #define MX51_PAD_GPIO_1_26__USBH1_DIR IOMUX_PAD(0x67C, 0x27C, 2, 0x0, 0, NO_PAD_CTRL) | 219 | #define MX51_PAD_USBH1_DIR__USBH1_DIR IOMUX_PAD(0x67C, 0x27C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 213 | #define MX51_PAD_GPIO_1_27__USBH1_STP IOMUX_PAD(0x680, 0x280, 2, 0x0, 0, NO_PAD_CTRL) | 220 | #define MX51_PAD_USBH1_STP__USBH1_STP IOMUX_PAD(0x680, 0x280, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 214 | #define MX51_PAD_GPIO_1_28__USBH1_NXT IOMUX_PAD(0x684, 0x284, 2, 0x0, 0, NO_PAD_CTRL) | 221 | #define MX51_PAD_USBH1_STP__GPIO_1_27 IOMUX_PAD(0x680, 0x280, IOMUX_CONFIG_GPIO, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 215 | #define MX51_PAD_GPIO_1_11__USBH1_DATA0 IOMUX_PAD(0x688, 0x288, 2, 0x0, 0, NO_PAD_CTRL) | 222 | #define MX51_PAD_USBH1_NXT__USBH1_NXT IOMUX_PAD(0x684, 0x284, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 216 | #define MX51_PAD_GPIO_1_12__USBH1_DATA1 IOMUX_PAD(0x68C, 0x28C, 2, 0x0, 0, NO_PAD_CTRL) | 223 | #define MX51_PAD_USBH1_DATA0__USBH1_DATA0 IOMUX_PAD(0x688, 0x288, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 217 | #define MX51_PAD_GPIO_1_13__USBH1_DATA2 IOMUX_PAD(0x690, 0x290, 2, 0x0, 0, NO_PAD_CTRL) | 224 | #define MX51_PAD_USBH1_DATA1__USBH1_DATA1 IOMUX_PAD(0x68C, 0x28C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 218 | #define MX51_PAD_GPIO_1_14__USBH1_DATA3 IOMUX_PAD(0x694, 0x294, 2, 0x0, 0, NO_PAD_CTRL) | 225 | #define MX51_PAD_USBH1_DATA2__USBH1_DATA2 IOMUX_PAD(0x690, 0x290, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 219 | #define MX51_PAD_GPIO_1_15__USBH1_DATA4 IOMUX_PAD(0x698, 0x298, 2, 0x0, 0, NO_PAD_CTRL) | 226 | #define MX51_PAD_USBH1_DATA3__USBH1_DATA3 IOMUX_PAD(0x694, 0x294, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 220 | #define MX51_PAD_GPIO_1_16__USBH1_DATA5 IOMUX_PAD(0x69C, 0x29C, 2, 0x0, 0, NO_PAD_CTRL) | 227 | #define MX51_PAD_USBH1_DATA4__USBH1_DATA4 IOMUX_PAD(0x698, 0x298, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 221 | #define MX51_PAD_GPIO_1_17__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, 2, 0x0, 0, NO_PAD_CTRL) | 228 | #define MX51_PAD_USBH1_DATA5__USBH1_DATA5 IOMUX_PAD(0x69C, 0x29C, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 222 | #define MX51_PAD_GPIO_1_18__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, 2, 0x0, 0, NO_PAD_CTRL) | 229 | #define MX51_PAD_USBH1_DATA6__USBH1_DATA6 IOMUX_PAD(0x6A0, 0x2A0, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) |
| 230 | #define MX51_PAD_USBH1_DATA7__USBH1_DATA7 IOMUX_PAD(0x6A4, 0x2A4, IOMUX_CONFIG_ALT0, 0x0, 0, MX51_USBH1_PAD_CTRL) | ||
| 223 | #define MX51_PAD_GPIO_3_0__DI1_PIN11 IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL) | 231 | #define MX51_PAD_GPIO_3_0__DI1_PIN11 IOMUX_PAD(0x6A8, 0x2A8, 4, 0x0, 0, NO_PAD_CTRL) |
| 224 | #define MX51_PAD_GPIO_3_1__DI1_PIN12 IOMUX_PAD(0x6AC, 0x2AC, 4, 0x0, 0, NO_PAD_CTRL) | 232 | #define MX51_PAD_GPIO_3_1__DI1_PIN12 IOMUX_PAD(0x6AC, 0x2AC, 4, 0x0, 0, NO_PAD_CTRL) |
| 225 | #define MX51_PAD_GPIO_3_2__DI1_PIN13 IOMUX_PAD(0x6B0, 0x2B0, 4, 0x0, 0, NO_PAD_CTRL) | 233 | #define MX51_PAD_GPIO_3_2__DI1_PIN13 IOMUX_PAD(0x6B0, 0x2B0, 4, 0x0, 0, NO_PAD_CTRL) |
| @@ -299,7 +307,7 @@ typedef enum iomux_config { | |||
| 299 | #define MX51_PAD_GPIO_1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL) | 307 | #define MX51_PAD_GPIO_1_4__GPIO1_4 IOMUX_PAD(0x804, 0x3D8, 0, 0x0, 0, NO_PAD_CTRL) |
| 300 | #define MX51_PAD_GPIO_1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL) | 308 | #define MX51_PAD_GPIO_1_5__GPIO1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, NO_PAD_CTRL) |
| 301 | #define MX51_PAD_GPIO_1_6__GPIO1_6 IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, NO_PAD_CTRL) | 309 | #define MX51_PAD_GPIO_1_6__GPIO1_6 IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, NO_PAD_CTRL) |
| 302 | #define MX51_PAD_GPIO_1_7__GPIO1_7 IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, NO_PAD_CTRL) | 310 | #define MX51_PAD_GPIO_1_7__GPIO1_7 IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 303 | #define MX51_PAD_GPIO_1_8__GPIO1_8 IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 1, \ | 311 | #define MX51_PAD_GPIO_1_8__GPIO1_8 IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 1, \ |
| 304 | (PAD_CTL_SRE_SLOW | PAD_CTL_DSE_MED | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS)) | 312 | (PAD_CTL_SRE_SLOW | PAD_CTL_DSE_MED | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS)) |
| 305 | #define MX51_PAD_GPIO_1_9__GPIO1_9 IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, NO_PAD_CTRL) | 313 | #define MX51_PAD_GPIO_1_9__GPIO1_9 IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, NO_PAD_CTRL) |
diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h index 4b9b8368c0c0..7fc5f9946199 100644 --- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h +++ b/arch/arm/plat-mxc/include/mach/mxc_ehci.h | |||
| @@ -25,6 +25,18 @@ | |||
| 25 | #define MXC_EHCI_INTERNAL_PHY (1 << 7) | 25 | #define MXC_EHCI_INTERNAL_PHY (1 << 7) |
| 26 | #define MXC_EHCI_IPPUE_DOWN (1 << 8) | 26 | #define MXC_EHCI_IPPUE_DOWN (1 << 8) |
| 27 | #define MXC_EHCI_IPPUE_UP (1 << 9) | 27 | #define MXC_EHCI_IPPUE_UP (1 << 9) |
| 28 | #define MXC_EHCI_WAKEUP_ENABLED (1 << 10) | ||
| 29 | #define MXC_EHCI_ITC_NO_THRESHOLD (1 << 11) | ||
| 30 | |||
| 31 | #define MXC_USBCTRL_OFFSET 0 | ||
| 32 | #define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8 | ||
| 33 | #define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc | ||
| 34 | |||
| 35 | #define MX5_USBOTHER_REGS_OFFSET 0x800 | ||
| 36 | |||
| 37 | /* USB_PHY_CTRL_FUNC2*/ | ||
| 38 | #define MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK 0x3 | ||
| 39 | #define MX5_USB_UTMI_PHYCTRL1_PLLDIV_SHIFT 0 | ||
| 28 | 40 | ||
| 29 | struct mxc_usbh_platform_data { | 41 | struct mxc_usbh_platform_data { |
| 30 | int (*init)(struct platform_device *pdev); | 42 | int (*init)(struct platform_device *pdev); |
| @@ -35,7 +47,7 @@ struct mxc_usbh_platform_data { | |||
| 35 | struct otg_transceiver *otg; | 47 | struct otg_transceiver *otg; |
| 36 | }; | 48 | }; |
| 37 | 49 | ||
| 38 | int mxc_set_usbcontrol(int port, unsigned int flags); | 50 | int mxc_initialize_usb_hw(int port, unsigned int flags); |
| 39 | 51 | ||
| 40 | #endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */ | 52 | #endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */ |
| 41 | 53 | ||
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index c1ce51abdba6..f9a1b059a76c 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c | |||
| @@ -54,14 +54,14 @@ | |||
| 54 | #define MX2_TSTAT_COMP (1 << 0) | 54 | #define MX2_TSTAT_COMP (1 << 0) |
| 55 | 55 | ||
| 56 | /* MX31, MX35, MX25, MXC91231, MX5 */ | 56 | /* MX31, MX35, MX25, MXC91231, MX5 */ |
| 57 | #define MX3_TCTL_WAITEN (1 << 3) /* Wait enable mode */ | 57 | #define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */ |
| 58 | #define MX3_TCTL_CLK_IPG (1 << 6) | 58 | #define V2_TCTL_CLK_IPG (1 << 6) |
| 59 | #define MX3_TCTL_FRR (1 << 9) | 59 | #define V2_TCTL_FRR (1 << 9) |
| 60 | #define MX3_IR 0x0c | 60 | #define V2_IR 0x0c |
| 61 | #define MX3_TSTAT 0x08 | 61 | #define V2_TSTAT 0x08 |
| 62 | #define MX3_TSTAT_OF1 (1 << 0) | 62 | #define V2_TSTAT_OF1 (1 << 0) |
| 63 | #define MX3_TCN 0x24 | 63 | #define V2_TCN 0x24 |
| 64 | #define MX3_TCMP 0x10 | 64 | #define V2_TCMP 0x10 |
| 65 | 65 | ||
| 66 | #define timer_is_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) | 66 | #define timer_is_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) |
| 67 | #define timer_is_v2() (!timer_is_v1()) | 67 | #define timer_is_v2() (!timer_is_v1()) |
| @@ -76,7 +76,7 @@ static inline void gpt_irq_disable(void) | |||
| 76 | unsigned int tmp; | 76 | unsigned int tmp; |
| 77 | 77 | ||
| 78 | if (timer_is_v2()) | 78 | if (timer_is_v2()) |
| 79 | __raw_writel(0, timer_base + MX3_IR); | 79 | __raw_writel(0, timer_base + V2_IR); |
| 80 | else { | 80 | else { |
| 81 | tmp = __raw_readl(timer_base + MXC_TCTL); | 81 | tmp = __raw_readl(timer_base + MXC_TCTL); |
| 82 | __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL); | 82 | __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL); |
| @@ -86,7 +86,7 @@ static inline void gpt_irq_disable(void) | |||
| 86 | static inline void gpt_irq_enable(void) | 86 | static inline void gpt_irq_enable(void) |
| 87 | { | 87 | { |
| 88 | if (timer_is_v2()) | 88 | if (timer_is_v2()) |
| 89 | __raw_writel(1<<0, timer_base + MX3_IR); | 89 | __raw_writel(1<<0, timer_base + V2_IR); |
| 90 | else { | 90 | else { |
| 91 | __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN, | 91 | __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN, |
| 92 | timer_base + MXC_TCTL); | 92 | timer_base + MXC_TCTL); |
| @@ -102,7 +102,7 @@ static void gpt_irq_acknowledge(void) | |||
| 102 | __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, | 102 | __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, |
| 103 | timer_base + MX1_2_TSTAT); | 103 | timer_base + MX1_2_TSTAT); |
| 104 | } else if (timer_is_v2()) | 104 | } else if (timer_is_v2()) |
| 105 | __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT); | 105 | __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT); |
| 106 | } | 106 | } |
| 107 | 107 | ||
| 108 | static cycle_t mx1_2_get_cycles(struct clocksource *cs) | 108 | static cycle_t mx1_2_get_cycles(struct clocksource *cs) |
| @@ -110,9 +110,9 @@ static cycle_t mx1_2_get_cycles(struct clocksource *cs) | |||
| 110 | return __raw_readl(timer_base + MX1_2_TCN); | 110 | return __raw_readl(timer_base + MX1_2_TCN); |
| 111 | } | 111 | } |
| 112 | 112 | ||
| 113 | static cycle_t mx3_get_cycles(struct clocksource *cs) | 113 | static cycle_t v2_get_cycles(struct clocksource *cs) |
| 114 | { | 114 | { |
| 115 | return __raw_readl(timer_base + MX3_TCN); | 115 | return __raw_readl(timer_base + V2_TCN); |
| 116 | } | 116 | } |
| 117 | 117 | ||
| 118 | static struct clocksource clocksource_mxc = { | 118 | static struct clocksource clocksource_mxc = { |
| @@ -129,7 +129,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk) | |||
| 129 | unsigned int c = clk_get_rate(timer_clk); | 129 | unsigned int c = clk_get_rate(timer_clk); |
| 130 | 130 | ||
| 131 | if (timer_is_v2()) | 131 | if (timer_is_v2()) |
| 132 | clocksource_mxc.read = mx3_get_cycles; | 132 | clocksource_mxc.read = v2_get_cycles; |
| 133 | 133 | ||
| 134 | clocksource_mxc.mult = clocksource_hz2mult(c, | 134 | clocksource_mxc.mult = clocksource_hz2mult(c, |
| 135 | clocksource_mxc.shift); | 135 | clocksource_mxc.shift); |
| @@ -153,16 +153,16 @@ static int mx1_2_set_next_event(unsigned long evt, | |||
| 153 | -ETIME : 0; | 153 | -ETIME : 0; |
| 154 | } | 154 | } |
| 155 | 155 | ||
| 156 | static int mx3_set_next_event(unsigned long evt, | 156 | static int v2_set_next_event(unsigned long evt, |
| 157 | struct clock_event_device *unused) | 157 | struct clock_event_device *unused) |
| 158 | { | 158 | { |
| 159 | unsigned long tcmp; | 159 | unsigned long tcmp; |
| 160 | 160 | ||
| 161 | tcmp = __raw_readl(timer_base + MX3_TCN) + evt; | 161 | tcmp = __raw_readl(timer_base + V2_TCN) + evt; |
| 162 | 162 | ||
| 163 | __raw_writel(tcmp, timer_base + MX3_TCMP); | 163 | __raw_writel(tcmp, timer_base + V2_TCMP); |
| 164 | 164 | ||
| 165 | return (int)(tcmp - __raw_readl(timer_base + MX3_TCN)) < 0 ? | 165 | return (int)(tcmp - __raw_readl(timer_base + V2_TCN)) < 0 ? |
| 166 | -ETIME : 0; | 166 | -ETIME : 0; |
| 167 | } | 167 | } |
| 168 | 168 | ||
| @@ -192,8 +192,8 @@ static void mxc_set_mode(enum clock_event_mode mode, | |||
| 192 | if (mode != clockevent_mode) { | 192 | if (mode != clockevent_mode) { |
| 193 | /* Set event time into far-far future */ | 193 | /* Set event time into far-far future */ |
| 194 | if (timer_is_v2()) | 194 | if (timer_is_v2()) |
| 195 | __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3, | 195 | __raw_writel(__raw_readl(timer_base + V2_TCN) - 3, |
| 196 | timer_base + MX3_TCMP); | 196 | timer_base + V2_TCMP); |
| 197 | else | 197 | else |
| 198 | __raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3, | 198 | __raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3, |
| 199 | timer_base + MX1_2_TCMP); | 199 | timer_base + MX1_2_TCMP); |
| @@ -245,7 +245,7 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) | |||
| 245 | uint32_t tstat; | 245 | uint32_t tstat; |
| 246 | 246 | ||
| 247 | if (timer_is_v2()) | 247 | if (timer_is_v2()) |
| 248 | tstat = __raw_readl(timer_base + MX3_TSTAT); | 248 | tstat = __raw_readl(timer_base + V2_TSTAT); |
| 249 | else | 249 | else |
| 250 | tstat = __raw_readl(timer_base + MX1_2_TSTAT); | 250 | tstat = __raw_readl(timer_base + MX1_2_TSTAT); |
| 251 | 251 | ||
| @@ -276,7 +276,7 @@ static int __init mxc_clockevent_init(struct clk *timer_clk) | |||
| 276 | unsigned int c = clk_get_rate(timer_clk); | 276 | unsigned int c = clk_get_rate(timer_clk); |
| 277 | 277 | ||
| 278 | if (timer_is_v2()) | 278 | if (timer_is_v2()) |
| 279 | clockevent_mxc.set_next_event = mx3_set_next_event; | 279 | clockevent_mxc.set_next_event = v2_set_next_event; |
| 280 | 280 | ||
| 281 | clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, | 281 | clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, |
| 282 | clockevent_mxc.shift); | 282 | clockevent_mxc.shift); |
| @@ -308,7 +308,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq) | |||
| 308 | __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ | 308 | __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ |
| 309 | 309 | ||
| 310 | if (timer_is_v2()) | 310 | if (timer_is_v2()) |
| 311 | tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN; | 311 | tctl_val = V2_TCTL_CLK_IPG | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN; |
| 312 | else | 312 | else |
| 313 | tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; | 313 | tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; |
| 314 | 314 | ||
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index afa6709db0b3..9b86d2a60d43 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. | 2 | * Copyright (C)2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | * | 3 | * |
| 4 | * The code contained herein is licensed under the GNU General Public | 4 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License | 5 | * License. You may obtain a copy of the GNU General Public License |
| @@ -19,6 +19,7 @@ | |||
| 19 | #include <asm/mach/irq.h> | 19 | #include <asm/mach/irq.h> |
| 20 | 20 | ||
| 21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
| 22 | #include <mach/common.h> | ||
| 22 | 23 | ||
| 23 | /* | 24 | /* |
| 24 | ***************************************** | 25 | ***************************************** |
| @@ -144,6 +145,7 @@ void __init tzic_init_irq(void __iomem *irqbase) | |||
| 144 | set_irq_handler(i, handle_level_irq); | 145 | set_irq_handler(i, handle_level_irq); |
| 145 | set_irq_flags(i, IRQF_VALID); | 146 | set_irq_flags(i, IRQF_VALID); |
| 146 | } | 147 | } |
| 148 | mxc_register_gpios(); | ||
| 147 | 149 | ||
| 148 | pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); | 150 | pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); |
| 149 | } | 151 | } |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index dc2ac42d6319..393e9219a5b6 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
| @@ -624,79 +624,58 @@ do { \ | |||
| 624 | __raw_writel(l, base + reg); \ | 624 | __raw_writel(l, base + reg); \ |
| 625 | } while(0) | 625 | } while(0) |
| 626 | 626 | ||
| 627 | void omap_set_gpio_debounce(int gpio, int enable) | 627 | /** |
| 628 | * _set_gpio_debounce - low level gpio debounce time | ||
| 629 | * @bank: the gpio bank we're acting upon | ||
| 630 | * @gpio: the gpio number on this @gpio | ||
| 631 | * @debounce: debounce time to use | ||
| 632 | * | ||
| 633 | * OMAP's debounce time is in 31us steps so we need | ||
| 634 | * to convert and round up to the closest unit. | ||
| 635 | */ | ||
| 636 | static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, | ||
| 637 | unsigned debounce) | ||
| 628 | { | 638 | { |
| 629 | struct gpio_bank *bank; | 639 | void __iomem *reg = bank->base; |
| 630 | void __iomem *reg; | 640 | u32 val; |
| 631 | unsigned long flags; | 641 | u32 l; |
| 632 | u32 val, l = 1 << get_gpio_index(gpio); | 642 | |
| 643 | if (debounce < 32) | ||
| 644 | debounce = 0x01; | ||
| 645 | else if (debounce > 7936) | ||
| 646 | debounce = 0xff; | ||
| 647 | else | ||
| 648 | debounce = (debounce / 0x1f) - 1; | ||
| 633 | 649 | ||
| 634 | if (cpu_class_is_omap1()) | 650 | l = 1 << get_gpio_index(gpio); |
| 635 | return; | ||
| 636 | 651 | ||
| 637 | bank = get_gpio_bank(gpio); | 652 | if (cpu_is_omap44xx()) |
| 638 | reg = bank->base; | 653 | reg += OMAP4_GPIO_DEBOUNCINGTIME; |
| 654 | else | ||
| 655 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; | ||
| 656 | |||
| 657 | __raw_writel(debounce, reg); | ||
| 639 | 658 | ||
| 659 | reg = bank->base; | ||
| 640 | if (cpu_is_omap44xx()) | 660 | if (cpu_is_omap44xx()) |
| 641 | reg += OMAP4_GPIO_DEBOUNCENABLE; | 661 | reg += OMAP4_GPIO_DEBOUNCENABLE; |
| 642 | else | 662 | else |
| 643 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; | 663 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; |
| 644 | 664 | ||
| 645 | if (!(bank->mod_usage & l)) { | ||
| 646 | printk(KERN_ERR "GPIO %d not requested\n", gpio); | ||
| 647 | return; | ||
| 648 | } | ||
| 649 | |||
| 650 | spin_lock_irqsave(&bank->lock, flags); | ||
| 651 | val = __raw_readl(reg); | 665 | val = __raw_readl(reg); |
| 652 | 666 | ||
| 653 | if (enable && !(val & l)) | 667 | if (debounce) { |
| 654 | val |= l; | 668 | val |= l; |
| 655 | else if (!enable && (val & l)) | 669 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) |
| 656 | val &= ~l; | ||
| 657 | else | ||
| 658 | goto done; | ||
| 659 | |||
| 660 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
| 661 | bank->dbck_enable_mask = val; | ||
| 662 | if (enable) | ||
| 663 | clk_enable(bank->dbck); | 670 | clk_enable(bank->dbck); |
| 664 | else | 671 | } else { |
| 672 | val &= ~l; | ||
| 673 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) | ||
| 665 | clk_disable(bank->dbck); | 674 | clk_disable(bank->dbck); |
| 666 | } | 675 | } |
| 667 | 676 | ||
| 668 | __raw_writel(val, reg); | 677 | __raw_writel(val, reg); |
| 669 | done: | ||
| 670 | spin_unlock_irqrestore(&bank->lock, flags); | ||
| 671 | } | 678 | } |
| 672 | EXPORT_SYMBOL(omap_set_gpio_debounce); | ||
| 673 | |||
| 674 | void omap_set_gpio_debounce_time(int gpio, int enc_time) | ||
| 675 | { | ||
| 676 | struct gpio_bank *bank; | ||
| 677 | void __iomem *reg; | ||
| 678 | |||
| 679 | if (cpu_class_is_omap1()) | ||
| 680 | return; | ||
| 681 | |||
| 682 | bank = get_gpio_bank(gpio); | ||
| 683 | reg = bank->base; | ||
| 684 | |||
| 685 | if (!bank->mod_usage) { | ||
| 686 | printk(KERN_ERR "GPIO not requested\n"); | ||
| 687 | return; | ||
| 688 | } | ||
| 689 | |||
| 690 | enc_time &= 0xff; | ||
| 691 | |||
| 692 | if (cpu_is_omap44xx()) | ||
| 693 | reg += OMAP4_GPIO_DEBOUNCINGTIME; | ||
| 694 | else | ||
| 695 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; | ||
| 696 | |||
| 697 | __raw_writel(enc_time, reg); | ||
| 698 | } | ||
| 699 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); | ||
| 700 | 679 | ||
| 701 | #ifdef CONFIG_ARCH_OMAP2PLUS | 680 | #ifdef CONFIG_ARCH_OMAP2PLUS |
| 702 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | 681 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, |
| @@ -1656,6 +1635,20 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) | |||
| 1656 | return 0; | 1635 | return 0; |
| 1657 | } | 1636 | } |
| 1658 | 1637 | ||
| 1638 | static int gpio_debounce(struct gpio_chip *chip, unsigned offset, | ||
| 1639 | unsigned debounce) | ||
| 1640 | { | ||
| 1641 | struct gpio_bank *bank; | ||
| 1642 | unsigned long flags; | ||
| 1643 | |||
| 1644 | bank = container_of(chip, struct gpio_bank, chip); | ||
| 1645 | spin_lock_irqsave(&bank->lock, flags); | ||
| 1646 | _set_gpio_debounce(bank, offset, debounce); | ||
| 1647 | spin_unlock_irqrestore(&bank->lock, flags); | ||
| 1648 | |||
| 1649 | return 0; | ||
| 1650 | } | ||
| 1651 | |||
| 1659 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 1652 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 1660 | { | 1653 | { |
| 1661 | struct gpio_bank *bank; | 1654 | struct gpio_bank *bank; |
| @@ -1909,6 +1902,7 @@ static int __init _omap_gpio_init(void) | |||
| 1909 | bank->chip.direction_input = gpio_input; | 1902 | bank->chip.direction_input = gpio_input; |
| 1910 | bank->chip.get = gpio_get; | 1903 | bank->chip.get = gpio_get; |
| 1911 | bank->chip.direction_output = gpio_output; | 1904 | bank->chip.direction_output = gpio_output; |
| 1905 | bank->chip.set_debounce = gpio_debounce; | ||
| 1912 | bank->chip.set = gpio_set; | 1906 | bank->chip.set = gpio_set; |
| 1913 | bank->chip.to_irq = gpio_2irq; | 1907 | bank->chip.to_irq = gpio_2irq; |
| 1914 | if (bank_is_mpuio(bank)) { | 1908 | if (bank_is_mpuio(bank)) { |
diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index 58583732b29a..452e18438b41 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c | |||
| @@ -234,32 +234,6 @@ void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | |||
| 234 | } | 234 | } |
| 235 | } | 235 | } |
| 236 | 236 | ||
| 237 | |||
| 238 | /* Watchdog */ | ||
| 239 | |||
| 240 | static struct resource s3c_wdt_resource[] = { | ||
| 241 | [0] = { | ||
| 242 | .start = S3C24XX_PA_WATCHDOG, | ||
| 243 | .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1, | ||
| 244 | .flags = IORESOURCE_MEM, | ||
| 245 | }, | ||
| 246 | [1] = { | ||
| 247 | .start = IRQ_WDT, | ||
| 248 | .end = IRQ_WDT, | ||
| 249 | .flags = IORESOURCE_IRQ, | ||
| 250 | } | ||
| 251 | |||
| 252 | }; | ||
| 253 | |||
| 254 | struct platform_device s3c_device_wdt = { | ||
| 255 | .name = "s3c2410-wdt", | ||
| 256 | .id = -1, | ||
| 257 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | ||
| 258 | .resource = s3c_wdt_resource, | ||
| 259 | }; | ||
| 260 | |||
| 261 | EXPORT_SYMBOL(s3c_device_wdt); | ||
| 262 | |||
| 263 | /* IIS */ | 237 | /* IIS */ |
| 264 | 238 | ||
| 265 | static struct resource s3c_iis_resource[] = { | 239 | static struct resource s3c_iis_resource[] = { |
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 92bd75607b43..11d6a1bbd90d 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | 7 | ||
| 8 | config PLAT_S5P | 8 | config PLAT_S5P |
| 9 | bool | 9 | bool |
| 10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210) | 10 | depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210) |
| 11 | default y | 11 | default y |
| 12 | select ARM_VIC | 12 | select ARM_VIC |
| 13 | select NO_IOPORT | 13 | select NO_IOPORT |
| @@ -24,3 +24,9 @@ config PLAT_S5P | |||
| 24 | select SAMSUNG_IRQ_UART | 24 | select SAMSUNG_IRQ_UART |
| 25 | help | 25 | help |
| 26 | Base platform code for Samsung's S5P series SoC. | 26 | Base platform code for Samsung's S5P series SoC. |
| 27 | |||
| 28 | config S5P_EXT_INT | ||
| 29 | bool | ||
| 30 | help | ||
| 31 | Use the external interrupts (other than GPIO interrupts.) | ||
| 32 | Note: Do not choose this for S5P6440. | ||
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index 0ec09a9c36bd..39c242bb9d58 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile | |||
| @@ -16,3 +16,5 @@ obj-y += dev-uart.o | |||
| 16 | obj-y += cpu.o | 16 | obj-y += cpu.o |
| 17 | obj-y += clock.o | 17 | obj-y += clock.o |
| 18 | obj-y += irq.o | 18 | obj-y += irq.o |
| 19 | obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o | ||
| 20 | |||
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c index 24a931fd8d3b..b5e255265f20 100644 --- a/arch/arm/plat-s5p/clock.c +++ b/arch/arm/plat-s5p/clock.c | |||
| @@ -148,6 +148,7 @@ static struct clk *s5p_clks[] __initdata = { | |||
| 148 | &clk_fout_vpll, | 148 | &clk_fout_vpll, |
| 149 | &clk_arm, | 149 | &clk_arm, |
| 150 | &clk_vpll, | 150 | &clk_vpll, |
| 151 | &clk_xusbxti, | ||
| 151 | }; | 152 | }; |
| 152 | 153 | ||
| 153 | void __init s5p_register_clocks(unsigned long xtal_freq) | 154 | void __init s5p_register_clocks(unsigned long xtal_freq) |
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index f92e5de3a755..75cb8c37ca2c 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c | |||
| @@ -19,12 +19,14 @@ | |||
| 19 | #include <plat/cpu.h> | 19 | #include <plat/cpu.h> |
| 20 | #include <plat/s5p6440.h> | 20 | #include <plat/s5p6440.h> |
| 21 | #include <plat/s5p6442.h> | 21 | #include <plat/s5p6442.h> |
| 22 | #include <plat/s5pc100.h> | ||
| 22 | #include <plat/s5pv210.h> | 23 | #include <plat/s5pv210.h> |
| 23 | 24 | ||
| 24 | /* table of supported CPUs */ | 25 | /* table of supported CPUs */ |
| 25 | 26 | ||
| 26 | static const char name_s5p6440[] = "S5P6440"; | 27 | static const char name_s5p6440[] = "S5P6440"; |
| 27 | static const char name_s5p6442[] = "S5P6442"; | 28 | static const char name_s5p6442[] = "S5P6442"; |
| 29 | static const char name_s5pc100[] = "S5PC100"; | ||
| 28 | static const char name_s5pv210[] = "S5PV210/S5PC110"; | 30 | static const char name_s5pv210[] = "S5PV210/S5PC110"; |
| 29 | 31 | ||
| 30 | static struct cpu_table cpu_ids[] __initdata = { | 32 | static struct cpu_table cpu_ids[] __initdata = { |
| @@ -45,6 +47,14 @@ static struct cpu_table cpu_ids[] __initdata = { | |||
| 45 | .init = s5p6442_init, | 47 | .init = s5p6442_init, |
| 46 | .name = name_s5p6442, | 48 | .name = name_s5p6442, |
| 47 | }, { | 49 | }, { |
| 50 | .idcode = 0x43100000, | ||
| 51 | .idmask = 0xfffff000, | ||
| 52 | .map_io = s5pc100_map_io, | ||
| 53 | .init_clocks = s5pc100_init_clocks, | ||
| 54 | .init_uarts = s5pc100_init_uarts, | ||
| 55 | .init = s5pc100_init, | ||
| 56 | .name = name_s5pc100, | ||
| 57 | }, { | ||
| 48 | .idcode = 0x43110000, | 58 | .idcode = 0x43110000, |
| 49 | .idmask = 0xfffff000, | 59 | .idmask = 0xfffff000, |
| 50 | .map_io = s5pv210_map_io, | 60 | .map_io = s5pv210_map_io, |
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h index 9ff3d718be39..3fb3a3a17465 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-s5p/include/plat/irqs.h | |||
| @@ -87,4 +87,11 @@ | |||
| 87 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) | 87 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) |
| 88 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) | 88 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) |
| 89 | 89 | ||
| 90 | #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ | ||
| 91 | : ((x) - 16 + S5P_EINT_BASE2)) | ||
| 92 | |||
| 93 | #define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \ | ||
| 94 | ((irq) - S5P_EINT_BASE1) : \ | ||
| 95 | ((irq) + 16 - S5P_EINT_BASE2)) | ||
| 96 | |||
| 90 | #endif /* __ASM_PLAT_S5P_IRQS_H */ | 97 | #endif /* __ASM_PLAT_S5P_IRQS_H */ |
diff --git a/arch/arm/plat-s5p/include/plat/s5pc100.h b/arch/arm/plat-s5p/include/plat/s5pc100.h new file mode 100644 index 000000000000..5f6099dd7cad --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/s5pc100.h | |||
| @@ -0,0 +1,33 @@ | |||
| 1 | /* arch/arm/plat-s5p/include/plat/s5pc100.h | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * Header file for s5pc100 cpu support | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | /* Common init code for S5PC100 related SoCs */ | ||
| 14 | |||
| 15 | extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
| 16 | extern void s5pc100_register_clocks(void); | ||
| 17 | extern void s5pc100_setup_clocks(void); | ||
| 18 | |||
| 19 | #ifdef CONFIG_CPU_S5PC100 | ||
| 20 | |||
| 21 | extern int s5pc100_init(void); | ||
| 22 | extern void s5pc100_init_irq(void); | ||
| 23 | extern void s5pc100_map_io(void); | ||
| 24 | extern void s5pc100_init_clocks(int xtal); | ||
| 25 | |||
| 26 | #define s5pc100_init_uarts s5pc100_common_init_uarts | ||
| 27 | |||
| 28 | #else | ||
| 29 | #define s5pc100_init_clocks NULL | ||
| 30 | #define s5pc100_init_uarts NULL | ||
| 31 | #define s5pc100_map_io NULL | ||
| 32 | #define s5pc100_init NULL | ||
| 33 | #endif | ||
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c new file mode 100644 index 000000000000..e56c8075df97 --- /dev/null +++ b/arch/arm/plat-s5p/irq-eint.c | |||
| @@ -0,0 +1,218 @@ | |||
| 1 | /* linux/arch/arm/plat-s5p/irq-eint.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * S5P - IRQ EINT support | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/interrupt.h> | ||
| 15 | #include <linux/irq.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/sysdev.h> | ||
| 18 | #include <linux/gpio.h> | ||
| 19 | |||
| 20 | #include <asm/hardware/vic.h> | ||
| 21 | |||
| 22 | #include <plat/regs-irqtype.h> | ||
| 23 | |||
| 24 | #include <mach/map.h> | ||
| 25 | #include <plat/cpu.h> | ||
| 26 | #include <plat/pm.h> | ||
| 27 | |||
| 28 | #include <plat/gpio-cfg.h> | ||
| 29 | #include <mach/regs-gpio.h> | ||
| 30 | |||
| 31 | static inline void s5p_irq_eint_mask(unsigned int irq) | ||
| 32 | { | ||
| 33 | u32 mask; | ||
| 34 | |||
| 35 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); | ||
| 36 | mask |= eint_irq_to_bit(irq); | ||
| 37 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | ||
| 38 | } | ||
| 39 | |||
| 40 | static void s5p_irq_eint_unmask(unsigned int irq) | ||
| 41 | { | ||
| 42 | u32 mask; | ||
| 43 | |||
| 44 | mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); | ||
| 45 | mask &= ~(eint_irq_to_bit(irq)); | ||
| 46 | __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); | ||
| 47 | } | ||
| 48 | |||
| 49 | static inline void s5p_irq_eint_ack(unsigned int irq) | ||
| 50 | { | ||
| 51 | __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); | ||
| 52 | } | ||
| 53 | |||
| 54 | static void s5p_irq_eint_maskack(unsigned int irq) | ||
| 55 | { | ||
| 56 | /* compiler should in-line these */ | ||
| 57 | s5p_irq_eint_mask(irq); | ||
| 58 | s5p_irq_eint_ack(irq); | ||
| 59 | } | ||
| 60 | |||
| 61 | static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) | ||
| 62 | { | ||
| 63 | int offs = EINT_OFFSET(irq); | ||
| 64 | int shift; | ||
| 65 | u32 ctrl, mask; | ||
| 66 | u32 newvalue = 0; | ||
| 67 | |||
| 68 | switch (type) { | ||
| 69 | case IRQ_TYPE_EDGE_RISING: | ||
| 70 | newvalue = S5P_EXTINT_RISEEDGE; | ||
| 71 | break; | ||
| 72 | |||
| 73 | case IRQ_TYPE_EDGE_FALLING: | ||
| 74 | newvalue = S5P_EXTINT_RISEEDGE; | ||
| 75 | break; | ||
| 76 | |||
| 77 | case IRQ_TYPE_EDGE_BOTH: | ||
| 78 | newvalue = S5P_EXTINT_BOTHEDGE; | ||
| 79 | break; | ||
| 80 | |||
| 81 | case IRQ_TYPE_LEVEL_LOW: | ||
| 82 | newvalue = S5P_EXTINT_LOWLEV; | ||
| 83 | break; | ||
| 84 | |||
| 85 | case IRQ_TYPE_LEVEL_HIGH: | ||
| 86 | newvalue = S5P_EXTINT_HILEV; | ||
| 87 | break; | ||
| 88 | |||
| 89 | default: | ||
| 90 | printk(KERN_ERR "No such irq type %d", type); | ||
| 91 | return -EINVAL; | ||
| 92 | } | ||
| 93 | |||
| 94 | shift = (offs & 0x7) * 4; | ||
| 95 | mask = 0x7 << shift; | ||
| 96 | |||
| 97 | ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq))); | ||
| 98 | ctrl &= ~mask; | ||
| 99 | ctrl |= newvalue << shift; | ||
| 100 | __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq))); | ||
| 101 | |||
| 102 | if ((0 <= offs) && (offs < 8)) | ||
| 103 | s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); | ||
| 104 | |||
| 105 | else if ((8 <= offs) && (offs < 16)) | ||
| 106 | s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE); | ||
| 107 | |||
| 108 | else if ((16 <= offs) && (offs < 24)) | ||
| 109 | s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE); | ||
| 110 | |||
| 111 | else if ((24 <= offs) && (offs < 32)) | ||
| 112 | s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE); | ||
| 113 | |||
| 114 | else | ||
| 115 | printk(KERN_ERR "No such irq number %d", offs); | ||
| 116 | |||
| 117 | return 0; | ||
| 118 | } | ||
| 119 | |||
| 120 | static struct irq_chip s5p_irq_eint = { | ||
| 121 | .name = "s5p-eint", | ||
| 122 | .mask = s5p_irq_eint_mask, | ||
| 123 | .unmask = s5p_irq_eint_unmask, | ||
| 124 | .mask_ack = s5p_irq_eint_maskack, | ||
| 125 | .ack = s5p_irq_eint_ack, | ||
| 126 | .set_type = s5p_irq_eint_set_type, | ||
| 127 | #ifdef CONFIG_PM | ||
| 128 | .set_wake = s3c_irqext_wake, | ||
| 129 | #endif | ||
| 130 | }; | ||
| 131 | |||
| 132 | /* s5p_irq_demux_eint | ||
| 133 | * | ||
| 134 | * This function demuxes the IRQ from the group0 external interrupts, | ||
| 135 | * from EINTs 16 to 31. It is designed to be inlined into the specific | ||
| 136 | * handler s5p_irq_demux_eintX_Y. | ||
| 137 | * | ||
| 138 | * Each EINT pend/mask registers handle eight of them. | ||
| 139 | */ | ||
| 140 | static inline void s5p_irq_demux_eint(unsigned int start) | ||
| 141 | { | ||
| 142 | u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); | ||
| 143 | u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); | ||
| 144 | unsigned int irq; | ||
| 145 | |||
| 146 | status &= ~mask; | ||
| 147 | status &= 0xff; | ||
| 148 | |||
| 149 | while (status) { | ||
| 150 | irq = fls(status) - 1; | ||
| 151 | generic_handle_irq(irq + start); | ||
| 152 | status &= ~(1 << irq); | ||
| 153 | } | ||
| 154 | } | ||
| 155 | |||
| 156 | static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) | ||
| 157 | { | ||
| 158 | s5p_irq_demux_eint(IRQ_EINT(16)); | ||
| 159 | s5p_irq_demux_eint(IRQ_EINT(24)); | ||
| 160 | } | ||
| 161 | |||
| 162 | static inline void s5p_irq_vic_eint_mask(unsigned int irq) | ||
| 163 | { | ||
| 164 | void __iomem *base = get_irq_chip_data(irq); | ||
| 165 | |||
| 166 | s5p_irq_eint_mask(irq); | ||
| 167 | writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE_CLEAR); | ||
| 168 | } | ||
| 169 | |||
| 170 | static void s5p_irq_vic_eint_unmask(unsigned int irq) | ||
| 171 | { | ||
| 172 | void __iomem *base = get_irq_chip_data(irq); | ||
| 173 | |||
| 174 | s5p_irq_eint_unmask(irq); | ||
| 175 | writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE); | ||
| 176 | } | ||
| 177 | |||
| 178 | static inline void s5p_irq_vic_eint_ack(unsigned int irq) | ||
| 179 | { | ||
| 180 | __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); | ||
| 181 | } | ||
| 182 | |||
| 183 | static void s5p_irq_vic_eint_maskack(unsigned int irq) | ||
| 184 | { | ||
| 185 | s5p_irq_vic_eint_mask(irq); | ||
| 186 | s5p_irq_vic_eint_ack(irq); | ||
| 187 | } | ||
| 188 | |||
| 189 | static struct irq_chip s5p_irq_vic_eint = { | ||
| 190 | .name = "s5p_vic_eint", | ||
| 191 | .mask = s5p_irq_vic_eint_mask, | ||
| 192 | .unmask = s5p_irq_vic_eint_unmask, | ||
| 193 | .mask_ack = s5p_irq_vic_eint_maskack, | ||
| 194 | .ack = s5p_irq_vic_eint_ack, | ||
| 195 | .set_type = s5p_irq_eint_set_type, | ||
| 196 | #ifdef CONFIG_PM | ||
| 197 | .set_wake = s3c_irqext_wake, | ||
| 198 | #endif | ||
| 199 | }; | ||
| 200 | |||
| 201 | int __init s5p_init_irq_eint(void) | ||
| 202 | { | ||
| 203 | int irq; | ||
| 204 | |||
| 205 | for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++) | ||
| 206 | set_irq_chip(irq, &s5p_irq_vic_eint); | ||
| 207 | |||
| 208 | for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { | ||
| 209 | set_irq_chip(irq, &s5p_irq_eint); | ||
| 210 | set_irq_handler(irq, handle_level_irq); | ||
| 211 | set_irq_flags(irq, IRQF_VALID); | ||
| 212 | } | ||
| 213 | |||
| 214 | set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31); | ||
| 215 | return 0; | ||
| 216 | } | ||
| 217 | |||
| 218 | arch_initcall(s5p_init_irq_eint); | ||
diff --git a/arch/arm/plat-s5pc1xx/Kconfig b/arch/arm/plat-s5pc1xx/Kconfig deleted file mode 100644 index c7bd2bbda239..000000000000 --- a/arch/arm/plat-s5pc1xx/Kconfig +++ /dev/null | |||
| @@ -1,47 +0,0 @@ | |||
| 1 | # Copyright 2009 Samsung Electronics Co. | ||
| 2 | # Byungho Min <bhmin@samsung.com> | ||
| 3 | # | ||
| 4 | # Licensed under GPLv2 | ||
| 5 | |||
| 6 | config PLAT_S5PC1XX | ||
| 7 | bool | ||
| 8 | depends on ARCH_S5PC1XX | ||
| 9 | default y | ||
| 10 | select PLAT_S3C | ||
| 11 | select ARM_VIC | ||
| 12 | select NO_IOPORT | ||
| 13 | select ARCH_REQUIRE_GPIOLIB | ||
| 14 | select SAMSUNG_CLKSRC | ||
| 15 | select SAMSUNG_IRQ_UART | ||
| 16 | select SAMSUNG_IRQ_VIC_TIMER | ||
| 17 | select S3C_GPIO_TRACK | ||
| 18 | select S3C_GPIO_PULL_UPDOWN | ||
| 19 | select S5P_GPIO_DRVSTR | ||
| 20 | select S3C_GPIO_CFG_S3C24XX | ||
| 21 | select S3C_GPIO_CFG_S3C64XX | ||
| 22 | select SAMSUNG_GPIOLIB_4BIT | ||
| 23 | help | ||
| 24 | Base platform code for any Samsung S5PC1XX device | ||
| 25 | |||
| 26 | if PLAT_S5PC1XX | ||
| 27 | |||
| 28 | # Configuration options shared by all S3C64XX implementations | ||
| 29 | |||
| 30 | config CPU_S5PC100_INIT | ||
| 31 | bool | ||
| 32 | help | ||
| 33 | Common initialisation code for the S5PC1XX | ||
| 34 | |||
| 35 | config CPU_S5PC100_CLOCK | ||
| 36 | bool | ||
| 37 | help | ||
| 38 | Common clock support code for the S5PC1XX | ||
| 39 | |||
| 40 | # platform specific device setup | ||
| 41 | |||
| 42 | config S5PC1XX_SETUP_SDHCI_GPIO | ||
| 43 | bool | ||
| 44 | help | ||
| 45 | Common setup code for SDHCI gpio. | ||
| 46 | |||
| 47 | endif | ||
diff --git a/arch/arm/plat-s5pc1xx/Makefile b/arch/arm/plat-s5pc1xx/Makefile deleted file mode 100644 index 9ce6409a9e02..000000000000 --- a/arch/arm/plat-s5pc1xx/Makefile +++ /dev/null | |||
| @@ -1,26 +0,0 @@ | |||
| 1 | # arch/arm/plat-s5pc1xx/Makefile | ||
| 2 | # | ||
| 3 | # Copyright 2009 Samsung Electronics Co. | ||
| 4 | # | ||
| 5 | # Licensed under GPLv2 | ||
| 6 | |||
| 7 | obj-y := | ||
| 8 | obj-m := | ||
| 9 | obj-n := dummy.o | ||
| 10 | obj- := | ||
| 11 | |||
| 12 | # Core files | ||
| 13 | |||
| 14 | obj-y += dev-uart.o | ||
| 15 | obj-y += cpu.o | ||
| 16 | obj-y += irq.o | ||
| 17 | obj-y += clock.o | ||
| 18 | |||
| 19 | # CPU support | ||
| 20 | |||
| 21 | obj-$(CONFIG_CPU_S5PC100_INIT) += s5pc100-init.o | ||
| 22 | obj-$(CONFIG_CPU_S5PC100_CLOCK) += s5pc100-clock.o | ||
| 23 | |||
| 24 | # Device setup | ||
| 25 | |||
| 26 | obj-$(CONFIG_S5PC1XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | ||
diff --git a/arch/arm/plat-s5pc1xx/clock.c b/arch/arm/plat-s5pc1xx/clock.c deleted file mode 100644 index 387f23190c3c..000000000000 --- a/arch/arm/plat-s5pc1xx/clock.c +++ /dev/null | |||
| @@ -1,709 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/clock.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * | ||
| 5 | * S5PC1XX Base clock support | ||
| 6 | * | ||
| 7 | * Based on plat-s3c64xx/clock.c | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/ioport.h> | ||
| 18 | #include <linux/clk.h> | ||
| 19 | #include <linux/io.h> | ||
| 20 | |||
| 21 | #include <mach/hardware.h> | ||
| 22 | #include <mach/map.h> | ||
| 23 | |||
| 24 | #include <plat/regs-clock.h> | ||
| 25 | #include <plat/devs.h> | ||
| 26 | #include <plat/clock.h> | ||
| 27 | |||
| 28 | struct clk clk_27m = { | ||
| 29 | .name = "clk_27m", | ||
| 30 | .id = -1, | ||
| 31 | .rate = 27000000, | ||
| 32 | }; | ||
| 33 | |||
| 34 | static int clk_48m_ctrl(struct clk *clk, int enable) | ||
| 35 | { | ||
| 36 | unsigned long flags; | ||
| 37 | u32 val; | ||
| 38 | |||
| 39 | /* can't rely on clock lock, this register has other usages */ | ||
| 40 | local_irq_save(flags); | ||
| 41 | |||
| 42 | val = __raw_readl(S5PC100_CLKSRC1); | ||
| 43 | if (enable) | ||
| 44 | val |= S5PC100_CLKSRC1_CLK48M_MASK; | ||
| 45 | else | ||
| 46 | val &= ~S5PC100_CLKSRC1_CLK48M_MASK; | ||
| 47 | |||
| 48 | __raw_writel(val, S5PC100_CLKSRC1); | ||
| 49 | local_irq_restore(flags); | ||
| 50 | |||
| 51 | return 0; | ||
| 52 | } | ||
| 53 | |||
| 54 | struct clk clk_48m = { | ||
| 55 | .name = "clk_48m", | ||
| 56 | .id = -1, | ||
| 57 | .rate = 48000000, | ||
| 58 | .enable = clk_48m_ctrl, | ||
| 59 | }; | ||
| 60 | |||
| 61 | struct clk clk_54m = { | ||
| 62 | .name = "clk_54m", | ||
| 63 | .id = -1, | ||
| 64 | .rate = 54000000, | ||
| 65 | }; | ||
| 66 | |||
| 67 | struct clk clk_hd0 = { | ||
| 68 | .name = "hclkd0", | ||
| 69 | .id = -1, | ||
| 70 | .rate = 0, | ||
| 71 | .parent = NULL, | ||
| 72 | .ctrlbit = 0, | ||
| 73 | .ops = &clk_ops_def_setrate, | ||
| 74 | }; | ||
| 75 | |||
| 76 | struct clk clk_pd0 = { | ||
| 77 | .name = "pclkd0", | ||
| 78 | .id = -1, | ||
| 79 | .rate = 0, | ||
| 80 | .parent = NULL, | ||
| 81 | .ctrlbit = 0, | ||
| 82 | .ops = &clk_ops_def_setrate, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static int s5pc1xx_clk_gate(void __iomem *reg, struct clk *clk, int enable) | ||
| 86 | { | ||
| 87 | unsigned int ctrlbit = clk->ctrlbit; | ||
| 88 | u32 con; | ||
| 89 | |||
| 90 | con = __raw_readl(reg); | ||
| 91 | if (enable) | ||
| 92 | con |= ctrlbit; | ||
| 93 | else | ||
| 94 | con &= ~ctrlbit; | ||
| 95 | __raw_writel(con, reg); | ||
| 96 | |||
| 97 | return 0; | ||
| 98 | } | ||
| 99 | |||
| 100 | static int s5pc100_clk_d00_ctrl(struct clk *clk, int enable) | ||
| 101 | { | ||
| 102 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D00, clk, enable); | ||
| 103 | } | ||
| 104 | |||
| 105 | static int s5pc100_clk_d01_ctrl(struct clk *clk, int enable) | ||
| 106 | { | ||
| 107 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D01, clk, enable); | ||
| 108 | } | ||
| 109 | |||
| 110 | static int s5pc100_clk_d02_ctrl(struct clk *clk, int enable) | ||
| 111 | { | ||
| 112 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D02, clk, enable); | ||
| 113 | } | ||
| 114 | |||
| 115 | static int s5pc100_clk_d10_ctrl(struct clk *clk, int enable) | ||
| 116 | { | ||
| 117 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D10, clk, enable); | ||
| 118 | } | ||
| 119 | |||
| 120 | static int s5pc100_clk_d11_ctrl(struct clk *clk, int enable) | ||
| 121 | { | ||
| 122 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D11, clk, enable); | ||
| 123 | } | ||
| 124 | |||
| 125 | static int s5pc100_clk_d12_ctrl(struct clk *clk, int enable) | ||
| 126 | { | ||
| 127 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D12, clk, enable); | ||
| 128 | } | ||
| 129 | |||
| 130 | static int s5pc100_clk_d13_ctrl(struct clk *clk, int enable) | ||
| 131 | { | ||
| 132 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D13, clk, enable); | ||
| 133 | } | ||
| 134 | |||
| 135 | static int s5pc100_clk_d14_ctrl(struct clk *clk, int enable) | ||
| 136 | { | ||
| 137 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D14, clk, enable); | ||
| 138 | } | ||
| 139 | |||
| 140 | static int s5pc100_clk_d15_ctrl(struct clk *clk, int enable) | ||
| 141 | { | ||
| 142 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D15, clk, enable); | ||
| 143 | } | ||
| 144 | |||
| 145 | static int s5pc100_clk_d20_ctrl(struct clk *clk, int enable) | ||
| 146 | { | ||
| 147 | return s5pc1xx_clk_gate(S5PC100_CLKGATE_D20, clk, enable); | ||
| 148 | } | ||
| 149 | |||
| 150 | int s5pc100_sclk0_ctrl(struct clk *clk, int enable) | ||
| 151 | { | ||
| 152 | return s5pc1xx_clk_gate(S5PC100_SCLKGATE0, clk, enable); | ||
| 153 | } | ||
| 154 | |||
| 155 | int s5pc100_sclk1_ctrl(struct clk *clk, int enable) | ||
| 156 | { | ||
| 157 | return s5pc1xx_clk_gate(S5PC100_SCLKGATE1, clk, enable); | ||
| 158 | } | ||
| 159 | |||
| 160 | static struct clk s5pc100_init_clocks_disable[] = { | ||
| 161 | { | ||
| 162 | .name = "dsi", | ||
| 163 | .id = -1, | ||
| 164 | .parent = &clk_p, | ||
| 165 | .enable = s5pc100_clk_d11_ctrl, | ||
| 166 | .ctrlbit = S5PC100_CLKGATE_D11_DSI, | ||
| 167 | }, { | ||
| 168 | .name = "csi", | ||
| 169 | .id = -1, | ||
| 170 | .parent = &clk_h, | ||
| 171 | .enable = s5pc100_clk_d11_ctrl, | ||
| 172 | .ctrlbit = S5PC100_CLKGATE_D11_CSI, | ||
| 173 | }, { | ||
| 174 | .name = "ccan", | ||
| 175 | .id = 0, | ||
| 176 | .parent = &clk_p, | ||
| 177 | .enable = s5pc100_clk_d14_ctrl, | ||
| 178 | .ctrlbit = S5PC100_CLKGATE_D14_CCAN0, | ||
| 179 | }, { | ||
| 180 | .name = "ccan", | ||
| 181 | .id = 1, | ||
| 182 | .parent = &clk_p, | ||
| 183 | .enable = s5pc100_clk_d14_ctrl, | ||
| 184 | .ctrlbit = S5PC100_CLKGATE_D14_CCAN1, | ||
| 185 | }, { | ||
| 186 | .name = "keypad", | ||
| 187 | .id = -1, | ||
| 188 | .parent = &clk_p, | ||
| 189 | .enable = s5pc100_clk_d15_ctrl, | ||
| 190 | .ctrlbit = S5PC100_CLKGATE_D15_KEYIF, | ||
| 191 | }, { | ||
| 192 | .name = "hclkd2", | ||
| 193 | .id = -1, | ||
| 194 | .parent = NULL, | ||
| 195 | .enable = s5pc100_clk_d20_ctrl, | ||
| 196 | .ctrlbit = S5PC100_CLKGATE_D20_HCLKD2, | ||
| 197 | }, { | ||
| 198 | .name = "iis-d2", | ||
| 199 | .id = -1, | ||
| 200 | .parent = NULL, | ||
| 201 | .enable = s5pc100_clk_d20_ctrl, | ||
| 202 | .ctrlbit = S5PC100_CLKGATE_D20_I2SD2, | ||
| 203 | }, | ||
| 204 | }; | ||
| 205 | |||
| 206 | static struct clk s5pc100_init_clocks[] = { | ||
| 207 | /* System1 (D0_0) devices */ | ||
| 208 | { | ||
| 209 | .name = "intc", | ||
| 210 | .id = -1, | ||
| 211 | .parent = &clk_hd0, | ||
| 212 | .enable = s5pc100_clk_d00_ctrl, | ||
| 213 | .ctrlbit = S5PC100_CLKGATE_D00_INTC, | ||
| 214 | }, { | ||
| 215 | .name = "tzic", | ||
| 216 | .id = -1, | ||
| 217 | .parent = &clk_hd0, | ||
| 218 | .enable = s5pc100_clk_d00_ctrl, | ||
| 219 | .ctrlbit = S5PC100_CLKGATE_D00_TZIC, | ||
| 220 | }, { | ||
| 221 | .name = "cf-ata", | ||
| 222 | .id = -1, | ||
| 223 | .parent = &clk_hd0, | ||
| 224 | .enable = s5pc100_clk_d00_ctrl, | ||
| 225 | .ctrlbit = S5PC100_CLKGATE_D00_CFCON, | ||
| 226 | }, { | ||
| 227 | .name = "mdma", | ||
| 228 | .id = -1, | ||
| 229 | .parent = &clk_hd0, | ||
| 230 | .enable = s5pc100_clk_d00_ctrl, | ||
| 231 | .ctrlbit = S5PC100_CLKGATE_D00_MDMA, | ||
| 232 | }, { | ||
| 233 | .name = "g2d", | ||
| 234 | .id = -1, | ||
| 235 | .parent = &clk_hd0, | ||
| 236 | .enable = s5pc100_clk_d00_ctrl, | ||
| 237 | .ctrlbit = S5PC100_CLKGATE_D00_G2D, | ||
| 238 | }, { | ||
| 239 | .name = "secss", | ||
| 240 | .id = -1, | ||
| 241 | .parent = &clk_hd0, | ||
| 242 | .enable = s5pc100_clk_d00_ctrl, | ||
| 243 | .ctrlbit = S5PC100_CLKGATE_D00_SECSS, | ||
| 244 | }, { | ||
| 245 | .name = "cssys", | ||
| 246 | .id = -1, | ||
| 247 | .parent = &clk_hd0, | ||
| 248 | .enable = s5pc100_clk_d00_ctrl, | ||
| 249 | .ctrlbit = S5PC100_CLKGATE_D00_CSSYS, | ||
| 250 | }, | ||
| 251 | |||
| 252 | /* Memory (D0_1) devices */ | ||
| 253 | { | ||
| 254 | .name = "dmc", | ||
| 255 | .id = -1, | ||
| 256 | .parent = &clk_hd0, | ||
| 257 | .enable = s5pc100_clk_d01_ctrl, | ||
| 258 | .ctrlbit = S5PC100_CLKGATE_D01_DMC, | ||
| 259 | }, { | ||
| 260 | .name = "sromc", | ||
| 261 | .id = -1, | ||
| 262 | .parent = &clk_hd0, | ||
| 263 | .enable = s5pc100_clk_d01_ctrl, | ||
| 264 | .ctrlbit = S5PC100_CLKGATE_D01_SROMC, | ||
| 265 | }, { | ||
| 266 | .name = "onenand", | ||
| 267 | .id = -1, | ||
| 268 | .parent = &clk_hd0, | ||
| 269 | .enable = s5pc100_clk_d01_ctrl, | ||
| 270 | .ctrlbit = S5PC100_CLKGATE_D01_ONENAND, | ||
| 271 | }, { | ||
| 272 | .name = "nand", | ||
| 273 | .id = -1, | ||
| 274 | .parent = &clk_hd0, | ||
| 275 | .enable = s5pc100_clk_d01_ctrl, | ||
| 276 | .ctrlbit = S5PC100_CLKGATE_D01_NFCON, | ||
| 277 | }, { | ||
| 278 | .name = "intmem", | ||
| 279 | .id = -1, | ||
| 280 | .parent = &clk_hd0, | ||
| 281 | .enable = s5pc100_clk_d01_ctrl, | ||
| 282 | .ctrlbit = S5PC100_CLKGATE_D01_INTMEM, | ||
| 283 | }, { | ||
| 284 | .name = "ebi", | ||
| 285 | .id = -1, | ||
| 286 | .parent = &clk_hd0, | ||
| 287 | .enable = s5pc100_clk_d01_ctrl, | ||
| 288 | .ctrlbit = S5PC100_CLKGATE_D01_EBI, | ||
| 289 | }, | ||
| 290 | |||
| 291 | /* System2 (D0_2) devices */ | ||
| 292 | { | ||
| 293 | .name = "seckey", | ||
| 294 | .id = -1, | ||
| 295 | .parent = &clk_pd0, | ||
| 296 | .enable = s5pc100_clk_d02_ctrl, | ||
| 297 | .ctrlbit = S5PC100_CLKGATE_D02_SECKEY, | ||
| 298 | }, { | ||
| 299 | .name = "sdm", | ||
| 300 | .id = -1, | ||
| 301 | .parent = &clk_hd0, | ||
| 302 | .enable = s5pc100_clk_d02_ctrl, | ||
| 303 | .ctrlbit = S5PC100_CLKGATE_D02_SDM, | ||
| 304 | }, | ||
| 305 | |||
| 306 | /* File (D1_0) devices */ | ||
| 307 | { | ||
| 308 | .name = "pdma", | ||
| 309 | .id = 0, | ||
| 310 | .parent = &clk_h, | ||
| 311 | .enable = s5pc100_clk_d10_ctrl, | ||
| 312 | .ctrlbit = S5PC100_CLKGATE_D10_PDMA0, | ||
| 313 | }, { | ||
| 314 | .name = "pdma", | ||
| 315 | .id = 1, | ||
| 316 | .parent = &clk_h, | ||
| 317 | .enable = s5pc100_clk_d10_ctrl, | ||
| 318 | .ctrlbit = S5PC100_CLKGATE_D10_PDMA1, | ||
| 319 | }, { | ||
| 320 | .name = "usb-host", | ||
| 321 | .id = -1, | ||
| 322 | .parent = &clk_h, | ||
| 323 | .enable = s5pc100_clk_d10_ctrl, | ||
| 324 | .ctrlbit = S5PC100_CLKGATE_D10_USBHOST, | ||
| 325 | }, { | ||
| 326 | .name = "otg", | ||
| 327 | .id = -1, | ||
| 328 | .parent = &clk_h, | ||
| 329 | .enable = s5pc100_clk_d10_ctrl, | ||
| 330 | .ctrlbit = S5PC100_CLKGATE_D10_USBOTG, | ||
| 331 | }, { | ||
| 332 | .name = "modem", | ||
| 333 | .id = -1, | ||
| 334 | .parent = &clk_h, | ||
| 335 | .enable = s5pc100_clk_d10_ctrl, | ||
| 336 | .ctrlbit = S5PC100_CLKGATE_D10_MODEMIF, | ||
| 337 | }, { | ||
| 338 | .name = "hsmmc", | ||
| 339 | .id = 0, | ||
| 340 | .parent = &clk_48m, | ||
| 341 | .enable = s5pc100_clk_d10_ctrl, | ||
| 342 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC0, | ||
| 343 | }, { | ||
| 344 | .name = "hsmmc", | ||
| 345 | .id = 1, | ||
| 346 | .parent = &clk_48m, | ||
| 347 | .enable = s5pc100_clk_d10_ctrl, | ||
| 348 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC1, | ||
| 349 | }, { | ||
| 350 | .name = "hsmmc", | ||
| 351 | .id = 2, | ||
| 352 | .parent = &clk_48m, | ||
| 353 | .enable = s5pc100_clk_d10_ctrl, | ||
| 354 | .ctrlbit = S5PC100_CLKGATE_D10_HSMMC2, | ||
| 355 | }, | ||
| 356 | |||
| 357 | /* Multimedia1 (D1_1) devices */ | ||
| 358 | { | ||
| 359 | .name = "lcd", | ||
| 360 | .id = -1, | ||
| 361 | .parent = &clk_p, | ||
| 362 | .enable = s5pc100_clk_d11_ctrl, | ||
| 363 | .ctrlbit = S5PC100_CLKGATE_D11_LCD, | ||
| 364 | }, { | ||
| 365 | .name = "rotator", | ||
| 366 | .id = -1, | ||
| 367 | .parent = &clk_p, | ||
| 368 | .enable = s5pc100_clk_d11_ctrl, | ||
| 369 | .ctrlbit = S5PC100_CLKGATE_D11_ROTATOR, | ||
| 370 | }, { | ||
| 371 | .name = "fimc", | ||
| 372 | .id = -1, | ||
| 373 | .parent = &clk_p, | ||
| 374 | .enable = s5pc100_clk_d11_ctrl, | ||
| 375 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC0, | ||
| 376 | }, { | ||
| 377 | .name = "fimc", | ||
| 378 | .id = -1, | ||
| 379 | .parent = &clk_p, | ||
| 380 | .enable = s5pc100_clk_d11_ctrl, | ||
| 381 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC1, | ||
| 382 | }, { | ||
| 383 | .name = "fimc", | ||
| 384 | .id = -1, | ||
| 385 | .parent = &clk_p, | ||
| 386 | .enable = s5pc100_clk_d11_ctrl, | ||
| 387 | .ctrlbit = S5PC100_CLKGATE_D11_FIMC2, | ||
| 388 | }, { | ||
| 389 | .name = "jpeg", | ||
| 390 | .id = -1, | ||
| 391 | .parent = &clk_p, | ||
| 392 | .enable = s5pc100_clk_d11_ctrl, | ||
| 393 | .ctrlbit = S5PC100_CLKGATE_D11_JPEG, | ||
| 394 | }, { | ||
| 395 | .name = "g3d", | ||
| 396 | .id = -1, | ||
| 397 | .parent = &clk_p, | ||
| 398 | .enable = s5pc100_clk_d11_ctrl, | ||
| 399 | .ctrlbit = S5PC100_CLKGATE_D11_G3D, | ||
| 400 | }, | ||
| 401 | |||
| 402 | /* Multimedia2 (D1_2) devices */ | ||
| 403 | { | ||
| 404 | .name = "tv", | ||
| 405 | .id = -1, | ||
| 406 | .parent = &clk_p, | ||
| 407 | .enable = s5pc100_clk_d12_ctrl, | ||
| 408 | .ctrlbit = S5PC100_CLKGATE_D12_TV, | ||
| 409 | }, { | ||
| 410 | .name = "vp", | ||
| 411 | .id = -1, | ||
| 412 | .parent = &clk_p, | ||
| 413 | .enable = s5pc100_clk_d12_ctrl, | ||
| 414 | .ctrlbit = S5PC100_CLKGATE_D12_VP, | ||
| 415 | }, { | ||
| 416 | .name = "mixer", | ||
| 417 | .id = -1, | ||
| 418 | .parent = &clk_p, | ||
| 419 | .enable = s5pc100_clk_d12_ctrl, | ||
| 420 | .ctrlbit = S5PC100_CLKGATE_D12_MIXER, | ||
| 421 | }, { | ||
| 422 | .name = "hdmi", | ||
| 423 | .id = -1, | ||
| 424 | .parent = &clk_p, | ||
| 425 | .enable = s5pc100_clk_d12_ctrl, | ||
| 426 | .ctrlbit = S5PC100_CLKGATE_D12_HDMI, | ||
| 427 | }, { | ||
| 428 | .name = "mfc", | ||
| 429 | .id = -1, | ||
| 430 | .parent = &clk_p, | ||
| 431 | .enable = s5pc100_clk_d12_ctrl, | ||
| 432 | .ctrlbit = S5PC100_CLKGATE_D12_MFC, | ||
| 433 | }, | ||
| 434 | |||
| 435 | /* System (D1_3) devices */ | ||
| 436 | { | ||
| 437 | .name = "chipid", | ||
| 438 | .id = -1, | ||
| 439 | .parent = &clk_p, | ||
| 440 | .enable = s5pc100_clk_d13_ctrl, | ||
| 441 | .ctrlbit = S5PC100_CLKGATE_D13_CHIPID, | ||
| 442 | }, { | ||
| 443 | .name = "gpio", | ||
| 444 | .id = -1, | ||
| 445 | .parent = &clk_p, | ||
| 446 | .enable = s5pc100_clk_d13_ctrl, | ||
| 447 | .ctrlbit = S5PC100_CLKGATE_D13_GPIO, | ||
| 448 | }, { | ||
| 449 | .name = "apc", | ||
| 450 | .id = -1, | ||
| 451 | .parent = &clk_p, | ||
| 452 | .enable = s5pc100_clk_d13_ctrl, | ||
| 453 | .ctrlbit = S5PC100_CLKGATE_D13_APC, | ||
| 454 | }, { | ||
| 455 | .name = "iec", | ||
| 456 | .id = -1, | ||
| 457 | .parent = &clk_p, | ||
| 458 | .enable = s5pc100_clk_d13_ctrl, | ||
| 459 | .ctrlbit = S5PC100_CLKGATE_D13_IEC, | ||
| 460 | }, { | ||
| 461 | .name = "timers", | ||
| 462 | .id = -1, | ||
| 463 | .parent = &clk_p, | ||
| 464 | .enable = s5pc100_clk_d13_ctrl, | ||
| 465 | .ctrlbit = S5PC100_CLKGATE_D13_PWM, | ||
| 466 | }, { | ||
| 467 | .name = "systimer", | ||
| 468 | .id = -1, | ||
| 469 | .parent = &clk_p, | ||
| 470 | .enable = s5pc100_clk_d13_ctrl, | ||
| 471 | .ctrlbit = S5PC100_CLKGATE_D13_SYSTIMER, | ||
| 472 | }, { | ||
| 473 | .name = "watchdog", | ||
| 474 | .id = -1, | ||
| 475 | .parent = &clk_p, | ||
| 476 | .enable = s5pc100_clk_d13_ctrl, | ||
| 477 | .ctrlbit = S5PC100_CLKGATE_D13_WDT, | ||
| 478 | }, { | ||
| 479 | .name = "rtc", | ||
| 480 | .id = -1, | ||
| 481 | .parent = &clk_p, | ||
| 482 | .enable = s5pc100_clk_d13_ctrl, | ||
| 483 | .ctrlbit = S5PC100_CLKGATE_D13_RTC, | ||
| 484 | }, | ||
| 485 | |||
| 486 | /* Connectivity (D1_4) devices */ | ||
| 487 | { | ||
| 488 | .name = "uart", | ||
| 489 | .id = 0, | ||
| 490 | .parent = &clk_p, | ||
| 491 | .enable = s5pc100_clk_d14_ctrl, | ||
| 492 | .ctrlbit = S5PC100_CLKGATE_D14_UART0, | ||
| 493 | }, { | ||
| 494 | .name = "uart", | ||
| 495 | .id = 1, | ||
| 496 | .parent = &clk_p, | ||
| 497 | .enable = s5pc100_clk_d14_ctrl, | ||
| 498 | .ctrlbit = S5PC100_CLKGATE_D14_UART1, | ||
| 499 | }, { | ||
| 500 | .name = "uart", | ||
| 501 | .id = 2, | ||
| 502 | .parent = &clk_p, | ||
| 503 | .enable = s5pc100_clk_d14_ctrl, | ||
| 504 | .ctrlbit = S5PC100_CLKGATE_D14_UART2, | ||
| 505 | }, { | ||
| 506 | .name = "uart", | ||
| 507 | .id = 3, | ||
| 508 | .parent = &clk_p, | ||
| 509 | .enable = s5pc100_clk_d14_ctrl, | ||
| 510 | .ctrlbit = S5PC100_CLKGATE_D14_UART3, | ||
| 511 | }, { | ||
| 512 | .name = "i2c", | ||
| 513 | .id = -1, | ||
| 514 | .parent = &clk_p, | ||
| 515 | .enable = s5pc100_clk_d14_ctrl, | ||
| 516 | .ctrlbit = S5PC100_CLKGATE_D14_IIC, | ||
| 517 | }, { | ||
| 518 | .name = "hdmi-i2c", | ||
| 519 | .id = -1, | ||
| 520 | .parent = &clk_p, | ||
| 521 | .enable = s5pc100_clk_d14_ctrl, | ||
| 522 | .ctrlbit = S5PC100_CLKGATE_D14_HDMI_IIC, | ||
| 523 | }, { | ||
| 524 | .name = "spi", | ||
| 525 | .id = 0, | ||
| 526 | .parent = &clk_p, | ||
| 527 | .enable = s5pc100_clk_d14_ctrl, | ||
| 528 | .ctrlbit = S5PC100_CLKGATE_D14_SPI0, | ||
| 529 | }, { | ||
| 530 | .name = "spi", | ||
| 531 | .id = 1, | ||
| 532 | .parent = &clk_p, | ||
| 533 | .enable = s5pc100_clk_d14_ctrl, | ||
| 534 | .ctrlbit = S5PC100_CLKGATE_D14_SPI1, | ||
| 535 | }, { | ||
| 536 | .name = "spi", | ||
| 537 | .id = 2, | ||
| 538 | .parent = &clk_p, | ||
| 539 | .enable = s5pc100_clk_d14_ctrl, | ||
| 540 | .ctrlbit = S5PC100_CLKGATE_D14_SPI2, | ||
| 541 | }, { | ||
| 542 | .name = "irda", | ||
| 543 | .id = -1, | ||
| 544 | .parent = &clk_p, | ||
| 545 | .enable = s5pc100_clk_d14_ctrl, | ||
| 546 | .ctrlbit = S5PC100_CLKGATE_D14_IRDA, | ||
| 547 | }, { | ||
| 548 | .name = "hsitx", | ||
| 549 | .id = -1, | ||
| 550 | .parent = &clk_p, | ||
| 551 | .enable = s5pc100_clk_d14_ctrl, | ||
| 552 | .ctrlbit = S5PC100_CLKGATE_D14_HSITX, | ||
| 553 | }, { | ||
| 554 | .name = "hsirx", | ||
| 555 | .id = -1, | ||
| 556 | .parent = &clk_p, | ||
| 557 | .enable = s5pc100_clk_d14_ctrl, | ||
| 558 | .ctrlbit = S5PC100_CLKGATE_D14_HSIRX, | ||
| 559 | }, | ||
| 560 | |||
| 561 | /* Audio (D1_5) devices */ | ||
| 562 | { | ||
| 563 | .name = "iis", | ||
| 564 | .id = 0, | ||
| 565 | .parent = &clk_p, | ||
| 566 | .enable = s5pc100_clk_d15_ctrl, | ||
| 567 | .ctrlbit = S5PC100_CLKGATE_D15_IIS0, | ||
| 568 | }, { | ||
| 569 | .name = "iis", | ||
| 570 | .id = 1, | ||
| 571 | .parent = &clk_p, | ||
| 572 | .enable = s5pc100_clk_d15_ctrl, | ||
| 573 | .ctrlbit = S5PC100_CLKGATE_D15_IIS1, | ||
| 574 | }, { | ||
| 575 | .name = "iis", | ||
| 576 | .id = 2, | ||
| 577 | .parent = &clk_p, | ||
| 578 | .enable = s5pc100_clk_d15_ctrl, | ||
| 579 | .ctrlbit = S5PC100_CLKGATE_D15_IIS2, | ||
| 580 | }, { | ||
| 581 | .name = "ac97", | ||
| 582 | .id = -1, | ||
| 583 | .parent = &clk_p, | ||
| 584 | .enable = s5pc100_clk_d15_ctrl, | ||
| 585 | .ctrlbit = S5PC100_CLKGATE_D15_AC97, | ||
| 586 | }, { | ||
| 587 | .name = "pcm", | ||
| 588 | .id = 0, | ||
| 589 | .parent = &clk_p, | ||
| 590 | .enable = s5pc100_clk_d15_ctrl, | ||
| 591 | .ctrlbit = S5PC100_CLKGATE_D15_PCM0, | ||
| 592 | }, { | ||
| 593 | .name = "pcm", | ||
| 594 | .id = 1, | ||
| 595 | .parent = &clk_p, | ||
| 596 | .enable = s5pc100_clk_d15_ctrl, | ||
| 597 | .ctrlbit = S5PC100_CLKGATE_D15_PCM1, | ||
| 598 | }, { | ||
| 599 | .name = "spdif", | ||
| 600 | .id = -1, | ||
| 601 | .parent = &clk_p, | ||
| 602 | .enable = s5pc100_clk_d15_ctrl, | ||
| 603 | .ctrlbit = S5PC100_CLKGATE_D15_SPDIF, | ||
| 604 | }, { | ||
| 605 | .name = "adc", | ||
| 606 | .id = -1, | ||
| 607 | .parent = &clk_p, | ||
| 608 | .enable = s5pc100_clk_d15_ctrl, | ||
| 609 | .ctrlbit = S5PC100_CLKGATE_D15_TSADC, | ||
| 610 | }, { | ||
| 611 | .name = "cg", | ||
| 612 | .id = -1, | ||
| 613 | .parent = &clk_p, | ||
| 614 | .enable = s5pc100_clk_d15_ctrl, | ||
| 615 | .ctrlbit = S5PC100_CLKGATE_D15_CG, | ||
| 616 | }, | ||
| 617 | |||
| 618 | /* Audio (D2_0) devices: all disabled */ | ||
| 619 | |||
| 620 | /* Special Clocks 0 */ | ||
| 621 | { | ||
| 622 | .name = "sclk_hpm", | ||
| 623 | .id = -1, | ||
| 624 | .parent = NULL, | ||
| 625 | .enable = s5pc100_sclk0_ctrl, | ||
| 626 | .ctrlbit = S5PC100_CLKGATE_SCLK0_HPM, | ||
| 627 | }, { | ||
| 628 | .name = "sclk_onenand", | ||
| 629 | .id = -1, | ||
| 630 | .parent = NULL, | ||
| 631 | .enable = s5pc100_sclk0_ctrl, | ||
| 632 | .ctrlbit = S5PC100_CLKGATE_SCLK0_ONENAND, | ||
| 633 | }, { | ||
| 634 | .name = "spi_48", | ||
| 635 | .id = 0, | ||
| 636 | .parent = &clk_48m, | ||
| 637 | .enable = s5pc100_sclk0_ctrl, | ||
| 638 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0_48, | ||
| 639 | }, { | ||
| 640 | .name = "spi_48", | ||
| 641 | .id = 1, | ||
| 642 | .parent = &clk_48m, | ||
| 643 | .enable = s5pc100_sclk0_ctrl, | ||
| 644 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1_48, | ||
| 645 | }, { | ||
| 646 | .name = "spi_48", | ||
| 647 | .id = 2, | ||
| 648 | .parent = &clk_48m, | ||
| 649 | .enable = s5pc100_sclk0_ctrl, | ||
| 650 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2_48, | ||
| 651 | }, { | ||
| 652 | .name = "mmc_48", | ||
| 653 | .id = 0, | ||
| 654 | .parent = &clk_48m, | ||
| 655 | .enable = s5pc100_sclk0_ctrl, | ||
| 656 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0_48, | ||
| 657 | }, { | ||
| 658 | .name = "mmc_48", | ||
| 659 | .id = 1, | ||
| 660 | .parent = &clk_48m, | ||
| 661 | .enable = s5pc100_sclk0_ctrl, | ||
| 662 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1_48, | ||
| 663 | }, { | ||
| 664 | .name = "mmc_48", | ||
| 665 | .id = 2, | ||
| 666 | .parent = &clk_48m, | ||
| 667 | .enable = s5pc100_sclk0_ctrl, | ||
| 668 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2_48, | ||
| 669 | }, | ||
| 670 | /* Special Clocks 1 */ | ||
| 671 | }; | ||
| 672 | |||
| 673 | static struct clk *clks[] __initdata = { | ||
| 674 | &clk_ext, | ||
| 675 | &clk_epll, | ||
| 676 | &clk_pd0, | ||
| 677 | &clk_hd0, | ||
| 678 | &clk_27m, | ||
| 679 | &clk_48m, | ||
| 680 | &clk_54m, | ||
| 681 | }; | ||
| 682 | |||
| 683 | void __init s5pc1xx_register_clocks(void) | ||
| 684 | { | ||
| 685 | struct clk *clkp; | ||
| 686 | int ret; | ||
| 687 | int ptr; | ||
| 688 | int size; | ||
| 689 | |||
| 690 | s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); | ||
| 691 | |||
| 692 | s3c_register_clocks(s5pc100_init_clocks, | ||
| 693 | ARRAY_SIZE(s5pc100_init_clocks)); | ||
| 694 | |||
| 695 | clkp = s5pc100_init_clocks_disable; | ||
| 696 | size = ARRAY_SIZE(s5pc100_init_clocks_disable); | ||
| 697 | |||
| 698 | for (ptr = 0; ptr < size; ptr++, clkp++) { | ||
| 699 | ret = s3c24xx_register_clock(clkp); | ||
| 700 | if (ret < 0) { | ||
| 701 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 702 | clkp->name, ret); | ||
| 703 | } | ||
| 704 | |||
| 705 | (clkp->enable)(clkp, 0); | ||
| 706 | } | ||
| 707 | |||
| 708 | s3c_pwmclk_init(); | ||
| 709 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/cpu.c b/arch/arm/plat-s5pc1xx/cpu.c deleted file mode 100644 index 02baeaa2a121..000000000000 --- a/arch/arm/plat-s5pc1xx/cpu.c +++ /dev/null | |||
| @@ -1,122 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/cpu.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX CPU Support | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/cpu.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/interrupt.h> | ||
| 18 | #include <linux/ioport.h> | ||
| 19 | #include <linux/serial_core.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/io.h> | ||
| 22 | |||
| 23 | #include <mach/hardware.h> | ||
| 24 | #include <mach/map.h> | ||
| 25 | |||
| 26 | #include <asm/mach/map.h> | ||
| 27 | |||
| 28 | #include <plat/regs-serial.h> | ||
| 29 | |||
| 30 | #include <plat/cpu.h> | ||
| 31 | #include <plat/devs.h> | ||
| 32 | #include <plat/clock.h> | ||
| 33 | |||
| 34 | #include <plat/s5pc100.h> | ||
| 35 | |||
| 36 | /* table of supported CPUs */ | ||
| 37 | |||
| 38 | static const char name_s5pc100[] = "S5PC100"; | ||
| 39 | |||
| 40 | static struct cpu_table cpu_ids[] __initdata = { | ||
| 41 | { | ||
| 42 | .idcode = 0x43100000, | ||
| 43 | .idmask = 0xfffff000, | ||
| 44 | .map_io = s5pc100_map_io, | ||
| 45 | .init_clocks = s5pc100_init_clocks, | ||
| 46 | .init_uarts = s5pc100_init_uarts, | ||
| 47 | .init = s5pc100_init, | ||
| 48 | .name = name_s5pc100, | ||
| 49 | }, | ||
| 50 | }; | ||
| 51 | /* minimal IO mapping */ | ||
| 52 | |||
| 53 | /* see notes on uart map in arch/arm/mach-s5pc100/include/mach/debug-macro.S */ | ||
| 54 | #define UART_OFFS (S3C_PA_UART & 0xffff) | ||
| 55 | |||
| 56 | static struct map_desc s5pc1xx_iodesc[] __initdata = { | ||
| 57 | { | ||
| 58 | .virtual = (unsigned long)S5PC1XX_VA_CLK_OTHER, | ||
| 59 | .pfn = __phys_to_pfn(S5PC1XX_PA_CLK_OTHER), | ||
| 60 | .length = SZ_4K, | ||
| 61 | .type = MT_DEVICE, | ||
| 62 | }, { | ||
| 63 | .virtual = (unsigned long)S5PC1XX_VA_GPIO, | ||
| 64 | .pfn = __phys_to_pfn(S5PC100_PA_GPIO), | ||
| 65 | .length = SZ_4K, | ||
| 66 | .type = MT_DEVICE, | ||
| 67 | }, { | ||
| 68 | .virtual = (unsigned long)S5PC1XX_VA_CHIPID, | ||
| 69 | .pfn = __phys_to_pfn(S5PC1XX_PA_CHIPID), | ||
| 70 | .length = SZ_16, | ||
| 71 | .type = MT_DEVICE, | ||
| 72 | }, { | ||
| 73 | .virtual = (unsigned long)S5PC1XX_VA_CLK, | ||
| 74 | .pfn = __phys_to_pfn(S5PC1XX_PA_CLK), | ||
| 75 | .length = SZ_4K, | ||
| 76 | .type = MT_DEVICE, | ||
| 77 | }, { | ||
| 78 | .virtual = (unsigned long)S5PC1XX_VA_PWR, | ||
| 79 | .pfn = __phys_to_pfn(S5PC1XX_PA_PWR), | ||
| 80 | .length = SZ_4K, | ||
| 81 | .type = MT_DEVICE, | ||
| 82 | }, { | ||
| 83 | .virtual = (unsigned long)(S5PC1XX_VA_UART), | ||
| 84 | .pfn = __phys_to_pfn(S5PC1XX_PA_UART), | ||
| 85 | .length = SZ_4K, | ||
| 86 | .type = MT_DEVICE, | ||
| 87 | }, { | ||
| 88 | .virtual = (unsigned long)S5PC1XX_VA_VIC(0), | ||
| 89 | .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(0)), | ||
| 90 | .length = SZ_4K, | ||
| 91 | .type = MT_DEVICE, | ||
| 92 | }, { | ||
| 93 | .virtual = (unsigned long)S5PC1XX_VA_VIC(1), | ||
| 94 | .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(1)), | ||
| 95 | .length = SZ_4K, | ||
| 96 | .type = MT_DEVICE, | ||
| 97 | }, { | ||
| 98 | .virtual = (unsigned long)S5PC1XX_VA_VIC(2), | ||
| 99 | .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(2)), | ||
| 100 | .length = SZ_4K, | ||
| 101 | .type = MT_DEVICE, | ||
| 102 | }, { | ||
| 103 | .virtual = (unsigned long)S5PC1XX_VA_TIMER, | ||
| 104 | .pfn = __phys_to_pfn(S5PC1XX_PA_TIMER), | ||
| 105 | .length = SZ_256, | ||
| 106 | .type = MT_DEVICE, | ||
| 107 | }, | ||
| 108 | }; | ||
| 109 | |||
| 110 | /* read cpu identification code */ | ||
| 111 | |||
| 112 | void __init s5pc1xx_init_io(struct map_desc *mach_desc, int size) | ||
| 113 | { | ||
| 114 | unsigned long idcode; | ||
| 115 | |||
| 116 | /* initialise the io descriptors we need for initialisation */ | ||
| 117 | iotable_init(s5pc1xx_iodesc, ARRAY_SIZE(s5pc1xx_iodesc)); | ||
| 118 | iotable_init(mach_desc, size); | ||
| 119 | |||
| 120 | idcode = __raw_readl(S5PC1XX_VA_CHIPID); | ||
| 121 | s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids)); | ||
| 122 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/dev-uart.c b/arch/arm/plat-s5pc1xx/dev-uart.c deleted file mode 100644 index 586c95c60bfe..000000000000 --- a/arch/arm/plat-s5pc1xx/dev-uart.c +++ /dev/null | |||
| @@ -1,145 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/dev-uart.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * Based on plat-s3c64xx/dev-uart.c | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | * | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/types.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/list.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | |||
| 20 | #include <asm/mach/arch.h> | ||
| 21 | #include <asm/mach/irq.h> | ||
| 22 | #include <mach/hardware.h> | ||
| 23 | #include <mach/map.h> | ||
| 24 | |||
| 25 | #include <plat/devs.h> | ||
| 26 | |||
| 27 | /* Serial port registrations */ | ||
| 28 | |||
| 29 | /* 64xx uarts are closer together */ | ||
| 30 | |||
| 31 | static struct resource s5pc1xx_uart0_resource[] = { | ||
| 32 | [0] = { | ||
| 33 | .start = S3C_PA_UART0, | ||
| 34 | .end = S3C_PA_UART0 + 0x100, | ||
| 35 | .flags = IORESOURCE_MEM, | ||
| 36 | }, | ||
| 37 | [1] = { | ||
| 38 | .start = IRQ_S3CUART_RX0, | ||
| 39 | .end = IRQ_S3CUART_RX0, | ||
| 40 | .flags = IORESOURCE_IRQ, | ||
| 41 | }, | ||
| 42 | [2] = { | ||
| 43 | .start = IRQ_S3CUART_TX0, | ||
| 44 | .end = IRQ_S3CUART_TX0, | ||
| 45 | .flags = IORESOURCE_IRQ, | ||
| 46 | |||
| 47 | }, | ||
| 48 | [3] = { | ||
| 49 | .start = IRQ_S3CUART_ERR0, | ||
| 50 | .end = IRQ_S3CUART_ERR0, | ||
| 51 | .flags = IORESOURCE_IRQ, | ||
| 52 | } | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct resource s5pc1xx_uart1_resource[] = { | ||
| 56 | [0] = { | ||
| 57 | .start = S3C_PA_UART1, | ||
| 58 | .end = S3C_PA_UART1 + 0x100, | ||
| 59 | .flags = IORESOURCE_MEM, | ||
| 60 | }, | ||
| 61 | [1] = { | ||
| 62 | .start = IRQ_S3CUART_RX1, | ||
| 63 | .end = IRQ_S3CUART_RX1, | ||
| 64 | .flags = IORESOURCE_IRQ, | ||
| 65 | }, | ||
| 66 | [2] = { | ||
| 67 | .start = IRQ_S3CUART_TX1, | ||
| 68 | .end = IRQ_S3CUART_TX1, | ||
| 69 | .flags = IORESOURCE_IRQ, | ||
| 70 | |||
| 71 | }, | ||
| 72 | [3] = { | ||
| 73 | .start = IRQ_S3CUART_ERR1, | ||
| 74 | .end = IRQ_S3CUART_ERR1, | ||
| 75 | .flags = IORESOURCE_IRQ, | ||
| 76 | }, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct resource s5pc1xx_uart2_resource[] = { | ||
| 80 | [0] = { | ||
| 81 | .start = S3C_PA_UART2, | ||
| 82 | .end = S3C_PA_UART2 + 0x100, | ||
| 83 | .flags = IORESOURCE_MEM, | ||
| 84 | }, | ||
| 85 | [1] = { | ||
| 86 | .start = IRQ_S3CUART_RX2, | ||
| 87 | .end = IRQ_S3CUART_RX2, | ||
| 88 | .flags = IORESOURCE_IRQ, | ||
| 89 | }, | ||
| 90 | [2] = { | ||
| 91 | .start = IRQ_S3CUART_TX2, | ||
| 92 | .end = IRQ_S3CUART_TX2, | ||
| 93 | .flags = IORESOURCE_IRQ, | ||
| 94 | |||
| 95 | }, | ||
| 96 | [3] = { | ||
| 97 | .start = IRQ_S3CUART_ERR2, | ||
| 98 | .end = IRQ_S3CUART_ERR2, | ||
| 99 | .flags = IORESOURCE_IRQ, | ||
| 100 | }, | ||
| 101 | }; | ||
| 102 | |||
| 103 | static struct resource s5pc1xx_uart3_resource[] = { | ||
| 104 | [0] = { | ||
| 105 | .start = S3C_PA_UART3, | ||
| 106 | .end = S3C_PA_UART3 + 0x100, | ||
| 107 | .flags = IORESOURCE_MEM, | ||
| 108 | }, | ||
| 109 | [1] = { | ||
| 110 | .start = IRQ_S3CUART_RX3, | ||
| 111 | .end = IRQ_S3CUART_RX3, | ||
| 112 | .flags = IORESOURCE_IRQ, | ||
| 113 | }, | ||
| 114 | [2] = { | ||
| 115 | .start = IRQ_S3CUART_TX3, | ||
| 116 | .end = IRQ_S3CUART_TX3, | ||
| 117 | .flags = IORESOURCE_IRQ, | ||
| 118 | |||
| 119 | }, | ||
| 120 | [3] = { | ||
| 121 | .start = IRQ_S3CUART_ERR3, | ||
| 122 | .end = IRQ_S3CUART_ERR3, | ||
| 123 | .flags = IORESOURCE_IRQ, | ||
| 124 | }, | ||
| 125 | }; | ||
| 126 | |||
| 127 | |||
| 128 | struct s3c24xx_uart_resources s5pc1xx_uart_resources[] __initdata = { | ||
| 129 | [0] = { | ||
| 130 | .resources = s5pc1xx_uart0_resource, | ||
| 131 | .nr_resources = ARRAY_SIZE(s5pc1xx_uart0_resource), | ||
| 132 | }, | ||
| 133 | [1] = { | ||
| 134 | .resources = s5pc1xx_uart1_resource, | ||
| 135 | .nr_resources = ARRAY_SIZE(s5pc1xx_uart1_resource), | ||
| 136 | }, | ||
| 137 | [2] = { | ||
| 138 | .resources = s5pc1xx_uart2_resource, | ||
| 139 | .nr_resources = ARRAY_SIZE(s5pc1xx_uart2_resource), | ||
| 140 | }, | ||
| 141 | [3] = { | ||
| 142 | .resources = s5pc1xx_uart3_resource, | ||
| 143 | .nr_resources = ARRAY_SIZE(s5pc1xx_uart3_resource), | ||
| 144 | }, | ||
| 145 | }; | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h b/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h deleted file mode 100644 index 33ad267e8477..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/gpio-ext.h +++ /dev/null | |||
| @@ -1,44 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/gpio-eint.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * | ||
| 5 | * External Interrupt (GPH0 ~ GPH3) control register definitions | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #define S5PC1XX_WKUP_INT_CON0_7 (S5PC1XX_EINT_BASE + 0x0) | ||
| 13 | #define S5PC1XX_WKUP_INT_CON8_15 (S5PC1XX_EINT_BASE + 0x4) | ||
| 14 | #define S5PC1XX_WKUP_INT_CON16_23 (S5PC1XX_EINT_BASE + 0x8) | ||
| 15 | #define S5PC1XX_WKUP_INT_CON24_31 (S5PC1XX_EINT_BASE + 0xC) | ||
| 16 | #define S5PC1XX_WKUP_INT_CON(x) (S5PC1XX_WKUP_INT_CON0_7 + (x * 0x4)) | ||
| 17 | |||
| 18 | #define S5PC1XX_WKUP_INT_FLTCON0_3 (S5PC1XX_EINT_BASE + 0x80) | ||
| 19 | #define S5PC1XX_WKUP_INT_FLTCON4_7 (S5PC1XX_EINT_BASE + 0x84) | ||
| 20 | #define S5PC1XX_WKUP_INT_FLTCON8_11 (S5PC1XX_EINT_BASE + 0x88) | ||
| 21 | #define S5PC1XX_WKUP_INT_FLTCON12_15 (S5PC1XX_EINT_BASE + 0x8C) | ||
| 22 | #define S5PC1XX_WKUP_INT_FLTCON16_19 (S5PC1XX_EINT_BASE + 0x90) | ||
| 23 | #define S5PC1XX_WKUP_INT_FLTCON20_23 (S5PC1XX_EINT_BASE + 0x94) | ||
| 24 | #define S5PC1XX_WKUP_INT_FLTCON24_27 (S5PC1XX_EINT_BASE + 0x98) | ||
| 25 | #define S5PC1XX_WKUP_INT_FLTCON28_31 (S5PC1XX_EINT_BASE + 0x9C) | ||
| 26 | #define S5PC1XX_WKUP_INT_FLTCON(x) (S5PC1XX_WKUP_INT_FLTCON0_3 + (x * 0x4)) | ||
| 27 | |||
| 28 | #define S5PC1XX_WKUP_INT_MASK0_7 (S5PC1XX_EINT_BASE + 0x100) | ||
| 29 | #define S5PC1XX_WKUP_INT_MASK8_15 (S5PC1XX_EINT_BASE + 0x104) | ||
| 30 | #define S5PC1XX_WKUP_INT_MASK16_23 (S5PC1XX_EINT_BASE + 0x108) | ||
| 31 | #define S5PC1XX_WKUP_INT_MASK24_31 (S5PC1XX_EINT_BASE + 0x10C) | ||
| 32 | #define S5PC1XX_WKUP_INT_MASK(x) (S5PC1XX_WKUP_INT_MASK0_7 + (x * 0x4)) | ||
| 33 | |||
| 34 | #define S5PC1XX_WKUP_INT_PEND0_7 (S5PC1XX_EINT_BASE + 0x140) | ||
| 35 | #define S5PC1XX_WKUP_INT_PEND8_15 (S5PC1XX_EINT_BASE + 0x144) | ||
| 36 | #define S5PC1XX_WKUP_INT_PEND16_23 (S5PC1XX_EINT_BASE + 0x148) | ||
| 37 | #define S5PC1XX_WKUP_INT_PEND24_31 (S5PC1XX_EINT_BASE + 0x14C) | ||
| 38 | #define S5PC1XX_WKUP_INT_PEND(x) (S5PC1XX_WKUP_INT_PEND0_7 + (x * 0x4)) | ||
| 39 | |||
| 40 | #define S5PC1XX_WKUP_INT_LOWLEV (0x00) | ||
| 41 | #define S5PC1XX_WKUP_INT_HILEV (0x01) | ||
| 42 | #define S5PC1XX_WKUP_INT_FALLEDGE (0x02) | ||
| 43 | #define S5PC1XX_WKUP_INT_RISEEDGE (0x03) | ||
| 44 | #define S5PC1XX_WKUP_INT_BOTHEDGE (0x04) | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h deleted file mode 100644 index 409c804315e8..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h +++ /dev/null | |||
| @@ -1,198 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/include/plat/irqs.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX - Common IRQ support | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/include/plat/irqs.h | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __ASM_PLAT_S5PC1XX_IRQS_H | ||
| 12 | #define __ASM_PLAT_S5PC1XX_IRQS_H __FILE__ | ||
| 13 | |||
| 14 | /* we keep the first set of CPU IRQs out of the range of | ||
| 15 | * the ISA space, so that the PC104 has them to itself | ||
| 16 | * and we don't end up having to do horrible things to the | ||
| 17 | * standard ISA drivers.... | ||
| 18 | * | ||
| 19 | * note, since we're using the VICs, our start must be a | ||
| 20 | * mulitple of 32 to allow the common code to work | ||
| 21 | */ | ||
| 22 | |||
| 23 | #define S3C_IRQ_OFFSET (32) | ||
| 24 | |||
| 25 | #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) | ||
| 26 | |||
| 27 | #define S3C_VIC0_BASE S3C_IRQ(0) | ||
| 28 | #define S3C_VIC1_BASE S3C_IRQ(32) | ||
| 29 | #define S3C_VIC2_BASE S3C_IRQ(64) | ||
| 30 | |||
| 31 | /* UART interrupts, each UART has 4 intterupts per channel so | ||
| 32 | * use the space between the ISA and S3C main interrupts. Note, these | ||
| 33 | * are not in the same order as the S3C24XX series! */ | ||
| 34 | |||
| 35 | #define IRQ_S3CUART_BASE0 (16) | ||
| 36 | #define IRQ_S3CUART_BASE1 (20) | ||
| 37 | #define IRQ_S3CUART_BASE2 (24) | ||
| 38 | #define IRQ_S3CUART_BASE3 (28) | ||
| 39 | |||
| 40 | #define UART_IRQ_RXD (0) | ||
| 41 | #define UART_IRQ_ERR (1) | ||
| 42 | #define UART_IRQ_TXD (2) | ||
| 43 | #define UART_IRQ_MODEM (3) | ||
| 44 | |||
| 45 | #define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD) | ||
| 46 | #define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD) | ||
| 47 | #define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR) | ||
| 48 | |||
| 49 | #define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD) | ||
| 50 | #define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD) | ||
| 51 | #define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR) | ||
| 52 | |||
| 53 | #define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD) | ||
| 54 | #define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD) | ||
| 55 | #define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR) | ||
| 56 | |||
| 57 | #define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD) | ||
| 58 | #define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD) | ||
| 59 | #define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR) | ||
| 60 | |||
| 61 | /* VIC based IRQs */ | ||
| 62 | |||
| 63 | #define S5PC1XX_IRQ_VIC0(x) (S3C_VIC0_BASE + (x)) | ||
| 64 | #define S5PC1XX_IRQ_VIC1(x) (S3C_VIC1_BASE + (x)) | ||
| 65 | #define S5PC1XX_IRQ_VIC2(x) (S3C_VIC2_BASE + (x)) | ||
| 66 | |||
| 67 | /* | ||
| 68 | * VIC0: system, DMA, timer | ||
| 69 | */ | ||
| 70 | #define IRQ_EINT0 S5PC1XX_IRQ_VIC0(0) | ||
| 71 | #define IRQ_EINT1 S5PC1XX_IRQ_VIC0(1) | ||
| 72 | #define IRQ_EINT2 S5PC1XX_IRQ_VIC0(2) | ||
| 73 | #define IRQ_EINT3 S5PC1XX_IRQ_VIC0(3) | ||
| 74 | #define IRQ_EINT4 S5PC1XX_IRQ_VIC0(4) | ||
| 75 | #define IRQ_EINT5 S5PC1XX_IRQ_VIC0(5) | ||
| 76 | #define IRQ_EINT6 S5PC1XX_IRQ_VIC0(6) | ||
| 77 | #define IRQ_EINT7 S5PC1XX_IRQ_VIC0(7) | ||
| 78 | #define IRQ_EINT8 S5PC1XX_IRQ_VIC0(8) | ||
| 79 | #define IRQ_EINT9 S5PC1XX_IRQ_VIC0(9) | ||
| 80 | #define IRQ_EINT10 S5PC1XX_IRQ_VIC0(10) | ||
| 81 | #define IRQ_EINT11 S5PC1XX_IRQ_VIC0(11) | ||
| 82 | #define IRQ_EINT12 S5PC1XX_IRQ_VIC0(12) | ||
| 83 | #define IRQ_EINT13 S5PC1XX_IRQ_VIC0(13) | ||
| 84 | #define IRQ_EINT14 S5PC1XX_IRQ_VIC0(14) | ||
| 85 | #define IRQ_EINT15 S5PC1XX_IRQ_VIC0(15) | ||
| 86 | #define IRQ_EINT16_31 S5PC1XX_IRQ_VIC0(16) | ||
| 87 | #define IRQ_BATF S5PC1XX_IRQ_VIC0(17) | ||
| 88 | #define IRQ_MDMA S5PC1XX_IRQ_VIC0(18) | ||
| 89 | #define IRQ_PDMA0 S5PC1XX_IRQ_VIC0(19) | ||
| 90 | #define IRQ_PDMA1 S5PC1XX_IRQ_VIC0(20) | ||
| 91 | #define IRQ_TIMER0_VIC S5PC1XX_IRQ_VIC0(21) | ||
| 92 | #define IRQ_TIMER1_VIC S5PC1XX_IRQ_VIC0(22) | ||
| 93 | #define IRQ_TIMER2_VIC S5PC1XX_IRQ_VIC0(23) | ||
| 94 | #define IRQ_TIMER3_VIC S5PC1XX_IRQ_VIC0(24) | ||
| 95 | #define IRQ_TIMER4_VIC S5PC1XX_IRQ_VIC0(25) | ||
| 96 | #define IRQ_SYSTIMER S5PC1XX_IRQ_VIC0(26) | ||
| 97 | #define IRQ_WDT S5PC1XX_IRQ_VIC0(27) | ||
| 98 | #define IRQ_RTC_ALARM S5PC1XX_IRQ_VIC0(28) | ||
| 99 | #define IRQ_RTC_TIC S5PC1XX_IRQ_VIC0(29) | ||
| 100 | #define IRQ_GPIOINT S5PC1XX_IRQ_VIC0(30) | ||
| 101 | |||
| 102 | /* | ||
| 103 | * VIC1: ARM, power, memory, connectivity | ||
| 104 | */ | ||
| 105 | #define IRQ_CORTEX0 S5PC1XX_IRQ_VIC1(0) | ||
| 106 | #define IRQ_CORTEX1 S5PC1XX_IRQ_VIC1(1) | ||
| 107 | #define IRQ_CORTEX2 S5PC1XX_IRQ_VIC1(2) | ||
| 108 | #define IRQ_CORTEX3 S5PC1XX_IRQ_VIC1(3) | ||
| 109 | #define IRQ_CORTEX4 S5PC1XX_IRQ_VIC1(4) | ||
| 110 | #define IRQ_IEMAPC S5PC1XX_IRQ_VIC1(5) | ||
| 111 | #define IRQ_IEMIEC S5PC1XX_IRQ_VIC1(6) | ||
| 112 | #define IRQ_ONENAND S5PC1XX_IRQ_VIC1(7) | ||
| 113 | #define IRQ_NFC S5PC1XX_IRQ_VIC1(8) | ||
| 114 | #define IRQ_CFC S5PC1XX_IRQ_VIC1(9) | ||
| 115 | #define IRQ_UART0 S5PC1XX_IRQ_VIC1(10) | ||
| 116 | #define IRQ_UART1 S5PC1XX_IRQ_VIC1(11) | ||
| 117 | #define IRQ_UART2 S5PC1XX_IRQ_VIC1(12) | ||
| 118 | #define IRQ_UART3 S5PC1XX_IRQ_VIC1(13) | ||
| 119 | #define IRQ_IIC S5PC1XX_IRQ_VIC1(14) | ||
| 120 | #define IRQ_SPI0 S5PC1XX_IRQ_VIC1(15) | ||
| 121 | #define IRQ_SPI1 S5PC1XX_IRQ_VIC1(16) | ||
| 122 | #define IRQ_SPI2 S5PC1XX_IRQ_VIC1(17) | ||
| 123 | #define IRQ_IRDA S5PC1XX_IRQ_VIC1(18) | ||
| 124 | #define IRQ_CAN0 S5PC1XX_IRQ_VIC1(19) | ||
| 125 | #define IRQ_CAN1 S5PC1XX_IRQ_VIC1(20) | ||
| 126 | #define IRQ_HSIRX S5PC1XX_IRQ_VIC1(21) | ||
| 127 | #define IRQ_HSITX S5PC1XX_IRQ_VIC1(22) | ||
| 128 | #define IRQ_UHOST S5PC1XX_IRQ_VIC1(23) | ||
| 129 | #define IRQ_OTG S5PC1XX_IRQ_VIC1(24) | ||
| 130 | #define IRQ_MSM S5PC1XX_IRQ_VIC1(25) | ||
| 131 | #define IRQ_HSMMC0 S5PC1XX_IRQ_VIC1(26) | ||
| 132 | #define IRQ_HSMMC1 S5PC1XX_IRQ_VIC1(27) | ||
| 133 | #define IRQ_HSMMC2 S5PC1XX_IRQ_VIC1(28) | ||
| 134 | #define IRQ_MIPICSI S5PC1XX_IRQ_VIC1(29) | ||
| 135 | #define IRQ_MIPIDSI S5PC1XX_IRQ_VIC1(30) | ||
| 136 | |||
| 137 | /* | ||
| 138 | * VIC2: multimedia, audio, security | ||
| 139 | */ | ||
| 140 | #define IRQ_LCD0 S5PC1XX_IRQ_VIC2(0) | ||
| 141 | #define IRQ_LCD1 S5PC1XX_IRQ_VIC2(1) | ||
| 142 | #define IRQ_LCD2 S5PC1XX_IRQ_VIC2(2) | ||
| 143 | #define IRQ_LCD3 S5PC1XX_IRQ_VIC2(3) | ||
| 144 | #define IRQ_ROTATOR S5PC1XX_IRQ_VIC2(4) | ||
| 145 | #define IRQ_FIMC0 S5PC1XX_IRQ_VIC2(5) | ||
| 146 | #define IRQ_FIMC1 S5PC1XX_IRQ_VIC2(6) | ||
| 147 | #define IRQ_FIMC2 S5PC1XX_IRQ_VIC2(7) | ||
| 148 | #define IRQ_JPEG S5PC1XX_IRQ_VIC2(8) | ||
| 149 | #define IRQ_2D S5PC1XX_IRQ_VIC2(9) | ||
| 150 | #define IRQ_3D S5PC1XX_IRQ_VIC2(10) | ||
| 151 | #define IRQ_MIXER S5PC1XX_IRQ_VIC2(11) | ||
| 152 | #define IRQ_HDMI S5PC1XX_IRQ_VIC2(12) | ||
| 153 | #define IRQ_IIC1 S5PC1XX_IRQ_VIC2(13) | ||
| 154 | #define IRQ_MFC S5PC1XX_IRQ_VIC2(14) | ||
| 155 | #define IRQ_TVENC S5PC1XX_IRQ_VIC2(15) | ||
| 156 | #define IRQ_I2S0 S5PC1XX_IRQ_VIC2(16) | ||
| 157 | #define IRQ_I2S1 S5PC1XX_IRQ_VIC2(17) | ||
| 158 | #define IRQ_I2S2 S5PC1XX_IRQ_VIC2(18) | ||
| 159 | #define IRQ_AC97 S5PC1XX_IRQ_VIC2(19) | ||
| 160 | #define IRQ_PCM0 S5PC1XX_IRQ_VIC2(20) | ||
| 161 | #define IRQ_PCM1 S5PC1XX_IRQ_VIC2(21) | ||
| 162 | #define IRQ_SPDIF S5PC1XX_IRQ_VIC2(22) | ||
| 163 | #define IRQ_ADC S5PC1XX_IRQ_VIC2(23) | ||
| 164 | #define IRQ_PENDN S5PC1XX_IRQ_VIC2(24) | ||
| 165 | #define IRQ_TC IRQ_PENDN | ||
| 166 | #define IRQ_KEYPAD S5PC1XX_IRQ_VIC2(25) | ||
| 167 | #define IRQ_CG S5PC1XX_IRQ_VIC2(26) | ||
| 168 | #define IRQ_SEC S5PC1XX_IRQ_VIC2(27) | ||
| 169 | #define IRQ_SECRX S5PC1XX_IRQ_VIC2(28) | ||
| 170 | #define IRQ_SECTX S5PC1XX_IRQ_VIC2(29) | ||
| 171 | #define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30) | ||
| 172 | #define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31) | ||
| 173 | |||
| 174 | #define IRQ_TIMER(x) (IRQ_SDMFIQ + 1 + (x)) | ||
| 175 | #define IRQ_TIMER0 IRQ_TIMER(0) | ||
| 176 | #define IRQ_TIMER1 IRQ_TIMER(1) | ||
| 177 | #define IRQ_TIMER2 IRQ_TIMER(2) | ||
| 178 | #define IRQ_TIMER3 IRQ_TIMER(3) | ||
| 179 | #define IRQ_TIMER4 IRQ_TIMER(4) | ||
| 180 | |||
| 181 | /* External interrupt */ | ||
| 182 | #define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 6) | ||
| 183 | |||
| 184 | #define S3C_EINT(x) (S3C_IRQ_EINT_BASE + (x - 16)) | ||
| 185 | #define IRQ_EINT(x) (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x)) | ||
| 186 | #define IRQ_EINT_BIT(x) (x < IRQ_EINT16_31 ? x - IRQ_EINT0 : x - S3C_EINT(0)) | ||
| 187 | |||
| 188 | /* GPIO interrupt */ | ||
| 189 | #define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1) | ||
| 190 | #define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x)) | ||
| 191 | |||
| 192 | /* | ||
| 193 | * Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs | ||
| 194 | */ | ||
| 195 | #define NR_IRQS (S3C_IRQ_GPIO(320) + 1) | ||
| 196 | |||
| 197 | #endif /* __ASM_PLAT_S5PC1XX_IRQS_H */ | ||
| 198 | |||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/pll.h b/arch/arm/plat-s5pc1xx/include/plat/pll.h deleted file mode 100644 index 21afef1573e7..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/pll.h +++ /dev/null | |||
| @@ -1,38 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/pll.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX PLL code | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/include/plat/pll.h | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #define S5P_PLL_MDIV_MASK ((1 << (25-16+1)) - 1) | ||
| 16 | #define S5P_PLL_PDIV_MASK ((1 << (13-8+1)) - 1) | ||
| 17 | #define S5P_PLL_SDIV_MASK ((1 << (2-0+1)) - 1) | ||
| 18 | #define S5P_PLL_MDIV_SHIFT (16) | ||
| 19 | #define S5P_PLL_PDIV_SHIFT (8) | ||
| 20 | #define S5P_PLL_SDIV_SHIFT (0) | ||
| 21 | |||
| 22 | #include <asm/div64.h> | ||
| 23 | |||
| 24 | static inline unsigned long s5pc1xx_get_pll(unsigned long baseclk, | ||
| 25 | u32 pllcon) | ||
| 26 | { | ||
| 27 | u32 mdiv, pdiv, sdiv; | ||
| 28 | u64 fvco = baseclk; | ||
| 29 | |||
| 30 | mdiv = (pllcon >> S5P_PLL_MDIV_SHIFT) & S5P_PLL_MDIV_MASK; | ||
| 31 | pdiv = (pllcon >> S5P_PLL_PDIV_SHIFT) & S5P_PLL_PDIV_MASK; | ||
| 32 | sdiv = (pllcon >> S5P_PLL_SDIV_SHIFT) & S5P_PLL_SDIV_MASK; | ||
| 33 | |||
| 34 | fvco *= mdiv; | ||
| 35 | do_div(fvco, (pdiv << sdiv)); | ||
| 36 | |||
| 37 | return (unsigned long)fvco; | ||
| 38 | } | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h b/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h deleted file mode 100644 index 24dec4e52538..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/regs-clock.h +++ /dev/null | |||
| @@ -1,252 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/regs-clock.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX clock register definitions | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __PLAT_REGS_CLOCK_H | ||
| 14 | #define __PLAT_REGS_CLOCK_H __FILE__ | ||
| 15 | |||
| 16 | #define S5PC100_CLKREG(x) (S5PC1XX_VA_CLK + (x)) | ||
| 17 | #define S5PC100_CLKREG_OTHER(x) (S5PC1XX_VA_CLK_OTHER + (x)) | ||
| 18 | |||
| 19 | /* s5pc100 register for clock */ | ||
| 20 | #define S5PC100_APLL_LOCK S5PC100_CLKREG(0x00) | ||
| 21 | #define S5PC100_MPLL_LOCK S5PC100_CLKREG(0x04) | ||
| 22 | #define S5PC100_EPLL_LOCK S5PC100_CLKREG(0x08) | ||
| 23 | #define S5PC100_HPLL_LOCK S5PC100_CLKREG(0x0C) | ||
| 24 | |||
| 25 | #define S5PC100_APLL_CON S5PC100_CLKREG(0x100) | ||
| 26 | #define S5PC100_MPLL_CON S5PC100_CLKREG(0x104) | ||
| 27 | #define S5PC100_EPLL_CON S5PC100_CLKREG(0x108) | ||
| 28 | #define S5PC100_HPLL_CON S5PC100_CLKREG(0x10C) | ||
| 29 | |||
| 30 | #define S5PC100_CLKSRC0 S5PC100_CLKREG(0x200) | ||
| 31 | #define S5PC100_CLKSRC1 S5PC100_CLKREG(0x204) | ||
| 32 | #define S5PC100_CLKSRC2 S5PC100_CLKREG(0x208) | ||
| 33 | #define S5PC100_CLKSRC3 S5PC100_CLKREG(0x20C) | ||
| 34 | |||
| 35 | #define S5PC100_CLKDIV0 S5PC100_CLKREG(0x300) | ||
| 36 | #define S5PC100_CLKDIV1 S5PC100_CLKREG(0x304) | ||
| 37 | #define S5PC100_CLKDIV2 S5PC100_CLKREG(0x308) | ||
| 38 | #define S5PC100_CLKDIV3 S5PC100_CLKREG(0x30C) | ||
| 39 | #define S5PC100_CLKDIV4 S5PC100_CLKREG(0x310) | ||
| 40 | |||
| 41 | #define S5PC100_CLK_OUT S5PC100_CLKREG(0x400) | ||
| 42 | |||
| 43 | #define S5PC100_CLKGATE_D00 S5PC100_CLKREG(0x500) | ||
| 44 | #define S5PC100_CLKGATE_D01 S5PC100_CLKREG(0x504) | ||
| 45 | #define S5PC100_CLKGATE_D02 S5PC100_CLKREG(0x508) | ||
| 46 | |||
| 47 | #define S5PC100_CLKGATE_D10 S5PC100_CLKREG(0x520) | ||
| 48 | #define S5PC100_CLKGATE_D11 S5PC100_CLKREG(0x524) | ||
| 49 | #define S5PC100_CLKGATE_D12 S5PC100_CLKREG(0x528) | ||
| 50 | #define S5PC100_CLKGATE_D13 S5PC100_CLKREG(0x52C) | ||
| 51 | #define S5PC100_CLKGATE_D14 S5PC100_CLKREG(0x530) | ||
| 52 | #define S5PC100_CLKGATE_D15 S5PC100_CLKREG(0x534) | ||
| 53 | |||
| 54 | #define S5PC100_CLKGATE_D20 S5PC100_CLKREG(0x540) | ||
| 55 | |||
| 56 | #define S5PC100_SCLKGATE0 S5PC100_CLKREG(0x560) | ||
| 57 | #define S5PC100_SCLKGATE1 S5PC100_CLKREG(0x564) | ||
| 58 | |||
| 59 | /* EPLL_CON */ | ||
| 60 | #define S5PC100_EPLL_EN (1<<31) | ||
| 61 | #define S5PC100_EPLL_MASK 0xffffffff | ||
| 62 | #define S5PC100_EPLLVAL(_m, _p, _s) ((_m) << 16 | ((_p) << 8) | ((_s))) | ||
| 63 | |||
| 64 | /* CLKSRC0..CLKSRC3 -> mostly removed due to clksrc updates */ | ||
| 65 | #define S5PC100_CLKSRC1_CLK48M_MASK (0x1<<24) | ||
| 66 | #define S5PC100_CLKSRC1_CLK48M_SHIFT (24) | ||
| 67 | |||
| 68 | /* CLKDIV0 */ | ||
| 69 | #define S5PC100_CLKDIV0_APLL_MASK (0x1<<0) | ||
| 70 | #define S5PC100_CLKDIV0_APLL_SHIFT (0) | ||
| 71 | #define S5PC100_CLKDIV0_ARM_MASK (0x7<<4) | ||
| 72 | #define S5PC100_CLKDIV0_ARM_SHIFT (4) | ||
| 73 | #define S5PC100_CLKDIV0_D0_MASK (0x7<<8) | ||
| 74 | #define S5PC100_CLKDIV0_D0_SHIFT (8) | ||
| 75 | #define S5PC100_CLKDIV0_PCLKD0_MASK (0x7<<12) | ||
| 76 | #define S5PC100_CLKDIV0_PCLKD0_SHIFT (12) | ||
| 77 | #define S5PC100_CLKDIV0_SECSS_MASK (0x7<<16) | ||
| 78 | #define S5PC100_CLKDIV0_SECSS_SHIFT (16) | ||
| 79 | |||
| 80 | /* CLKDIV1 (OneNAND clock only used in one place, removed) */ | ||
| 81 | #define S5PC100_CLKDIV1_APLL2_MASK (0x7<<0) | ||
| 82 | #define S5PC100_CLKDIV1_APLL2_SHIFT (0) | ||
| 83 | #define S5PC100_CLKDIV1_MPLL_MASK (0x3<<4) | ||
| 84 | #define S5PC100_CLKDIV1_MPLL_SHIFT (4) | ||
| 85 | #define S5PC100_CLKDIV1_MPLL2_MASK (0x1<<8) | ||
| 86 | #define S5PC100_CLKDIV1_MPLL2_SHIFT (8) | ||
| 87 | #define S5PC100_CLKDIV1_D1_MASK (0x7<<12) | ||
| 88 | #define S5PC100_CLKDIV1_D1_SHIFT (12) | ||
| 89 | #define S5PC100_CLKDIV1_PCLKD1_MASK (0x7<<16) | ||
| 90 | #define S5PC100_CLKDIV1_PCLKD1_SHIFT (16) | ||
| 91 | #define S5PC100_CLKDIV1_CAM_MASK (0x1F<<24) | ||
| 92 | #define S5PC100_CLKDIV1_CAM_SHIFT (24) | ||
| 93 | |||
| 94 | /* CLKDIV2 => removed in clksrc update */ | ||
| 95 | /* CLKDIV3 => removed in clksrc update, or not needed */ | ||
| 96 | /* CLKDIV4 => removed in clksrc update, or not needed */ | ||
| 97 | |||
| 98 | /* HCLKD0/PCLKD0 Clock Gate 0 Registers */ | ||
| 99 | #define S5PC100_CLKGATE_D00_INTC (1<<0) | ||
| 100 | #define S5PC100_CLKGATE_D00_TZIC (1<<1) | ||
| 101 | #define S5PC100_CLKGATE_D00_CFCON (1<<2) | ||
| 102 | #define S5PC100_CLKGATE_D00_MDMA (1<<3) | ||
| 103 | #define S5PC100_CLKGATE_D00_G2D (1<<4) | ||
| 104 | #define S5PC100_CLKGATE_D00_SECSS (1<<5) | ||
| 105 | #define S5PC100_CLKGATE_D00_CSSYS (1<<6) | ||
| 106 | |||
| 107 | /* HCLKD0/PCLKD0 Clock Gate 1 Registers */ | ||
| 108 | #define S5PC100_CLKGATE_D01_DMC (1<<0) | ||
| 109 | #define S5PC100_CLKGATE_D01_SROMC (1<<1) | ||
| 110 | #define S5PC100_CLKGATE_D01_ONENAND (1<<2) | ||
| 111 | #define S5PC100_CLKGATE_D01_NFCON (1<<3) | ||
| 112 | #define S5PC100_CLKGATE_D01_INTMEM (1<<4) | ||
| 113 | #define S5PC100_CLKGATE_D01_EBI (1<<5) | ||
| 114 | |||
| 115 | /* PCLKD0 Clock Gate 2 Registers */ | ||
| 116 | #define S5PC100_CLKGATE_D02_SECKEY (1<<1) | ||
| 117 | #define S5PC100_CLKGATE_D02_SDM (1<<2) | ||
| 118 | |||
| 119 | /* HCLKD1/PCLKD1 Clock Gate 0 Registers */ | ||
| 120 | #define S5PC100_CLKGATE_D10_PDMA0 (1<<0) | ||
| 121 | #define S5PC100_CLKGATE_D10_PDMA1 (1<<1) | ||
| 122 | #define S5PC100_CLKGATE_D10_USBHOST (1<<2) | ||
| 123 | #define S5PC100_CLKGATE_D10_USBOTG (1<<3) | ||
| 124 | #define S5PC100_CLKGATE_D10_MODEMIF (1<<4) | ||
| 125 | #define S5PC100_CLKGATE_D10_HSMMC0 (1<<5) | ||
| 126 | #define S5PC100_CLKGATE_D10_HSMMC1 (1<<6) | ||
| 127 | #define S5PC100_CLKGATE_D10_HSMMC2 (1<<7) | ||
| 128 | |||
| 129 | /* HCLKD1/PCLKD1 Clock Gate 1 Registers */ | ||
| 130 | #define S5PC100_CLKGATE_D11_LCD (1<<0) | ||
| 131 | #define S5PC100_CLKGATE_D11_ROTATOR (1<<1) | ||
| 132 | #define S5PC100_CLKGATE_D11_FIMC0 (1<<2) | ||
| 133 | #define S5PC100_CLKGATE_D11_FIMC1 (1<<3) | ||
| 134 | #define S5PC100_CLKGATE_D11_FIMC2 (1<<4) | ||
| 135 | #define S5PC100_CLKGATE_D11_JPEG (1<<5) | ||
| 136 | #define S5PC100_CLKGATE_D11_DSI (1<<6) | ||
| 137 | #define S5PC100_CLKGATE_D11_CSI (1<<7) | ||
| 138 | #define S5PC100_CLKGATE_D11_G3D (1<<8) | ||
| 139 | |||
| 140 | /* HCLKD1/PCLKD1 Clock Gate 2 Registers */ | ||
| 141 | #define S5PC100_CLKGATE_D12_TV (1<<0) | ||
| 142 | #define S5PC100_CLKGATE_D12_VP (1<<1) | ||
| 143 | #define S5PC100_CLKGATE_D12_MIXER (1<<2) | ||
| 144 | #define S5PC100_CLKGATE_D12_HDMI (1<<3) | ||
| 145 | #define S5PC100_CLKGATE_D12_MFC (1<<4) | ||
| 146 | |||
| 147 | /* HCLKD1/PCLKD1 Clock Gate 3 Registers */ | ||
| 148 | #define S5PC100_CLKGATE_D13_CHIPID (1<<0) | ||
| 149 | #define S5PC100_CLKGATE_D13_GPIO (1<<1) | ||
| 150 | #define S5PC100_CLKGATE_D13_APC (1<<2) | ||
| 151 | #define S5PC100_CLKGATE_D13_IEC (1<<3) | ||
| 152 | #define S5PC100_CLKGATE_D13_PWM (1<<6) | ||
| 153 | #define S5PC100_CLKGATE_D13_SYSTIMER (1<<7) | ||
| 154 | #define S5PC100_CLKGATE_D13_WDT (1<<8) | ||
| 155 | #define S5PC100_CLKGATE_D13_RTC (1<<9) | ||
| 156 | |||
| 157 | /* HCLKD1/PCLKD1 Clock Gate 4 Registers */ | ||
| 158 | #define S5PC100_CLKGATE_D14_UART0 (1<<0) | ||
| 159 | #define S5PC100_CLKGATE_D14_UART1 (1<<1) | ||
| 160 | #define S5PC100_CLKGATE_D14_UART2 (1<<2) | ||
| 161 | #define S5PC100_CLKGATE_D14_UART3 (1<<3) | ||
| 162 | #define S5PC100_CLKGATE_D14_IIC (1<<4) | ||
| 163 | #define S5PC100_CLKGATE_D14_HDMI_IIC (1<<5) | ||
| 164 | #define S5PC100_CLKGATE_D14_SPI0 (1<<6) | ||
| 165 | #define S5PC100_CLKGATE_D14_SPI1 (1<<7) | ||
| 166 | #define S5PC100_CLKGATE_D14_SPI2 (1<<8) | ||
| 167 | #define S5PC100_CLKGATE_D14_IRDA (1<<9) | ||
| 168 | #define S5PC100_CLKGATE_D14_CCAN0 (1<<10) | ||
| 169 | #define S5PC100_CLKGATE_D14_CCAN1 (1<<11) | ||
| 170 | #define S5PC100_CLKGATE_D14_HSITX (1<<12) | ||
| 171 | #define S5PC100_CLKGATE_D14_HSIRX (1<<13) | ||
| 172 | |||
| 173 | /* HCLKD1/PCLKD1 Clock Gate 5 Registers */ | ||
| 174 | #define S5PC100_CLKGATE_D15_IIS0 (1<<0) | ||
| 175 | #define S5PC100_CLKGATE_D15_IIS1 (1<<1) | ||
| 176 | #define S5PC100_CLKGATE_D15_IIS2 (1<<2) | ||
| 177 | #define S5PC100_CLKGATE_D15_AC97 (1<<3) | ||
| 178 | #define S5PC100_CLKGATE_D15_PCM0 (1<<4) | ||
| 179 | #define S5PC100_CLKGATE_D15_PCM1 (1<<5) | ||
| 180 | #define S5PC100_CLKGATE_D15_SPDIF (1<<6) | ||
| 181 | #define S5PC100_CLKGATE_D15_TSADC (1<<7) | ||
| 182 | #define S5PC100_CLKGATE_D15_KEYIF (1<<8) | ||
| 183 | #define S5PC100_CLKGATE_D15_CG (1<<9) | ||
| 184 | |||
| 185 | /* HCLKD2 Clock Gate 0 Registers */ | ||
| 186 | #define S5PC100_CLKGATE_D20_HCLKD2 (1<<0) | ||
| 187 | #define S5PC100_CLKGATE_D20_I2SD2 (1<<1) | ||
| 188 | |||
| 189 | /* Special Clock Gate 0 Registers */ | ||
| 190 | #define S5PC100_CLKGATE_SCLK0_HPM (1<<0) | ||
| 191 | #define S5PC100_CLKGATE_SCLK0_PWI (1<<1) | ||
| 192 | #define S5PC100_CLKGATE_SCLK0_ONENAND (1<<2) | ||
| 193 | #define S5PC100_CLKGATE_SCLK0_UART (1<<3) | ||
| 194 | #define S5PC100_CLKGATE_SCLK0_SPI0 (1<<4) | ||
| 195 | #define S5PC100_CLKGATE_SCLK0_SPI1 (1<<5) | ||
| 196 | #define S5PC100_CLKGATE_SCLK0_SPI2 (1<<6) | ||
| 197 | #define S5PC100_CLKGATE_SCLK0_SPI0_48 (1<<7) | ||
| 198 | #define S5PC100_CLKGATE_SCLK0_SPI1_48 (1<<8) | ||
| 199 | #define S5PC100_CLKGATE_SCLK0_SPI2_48 (1<<9) | ||
| 200 | #define S5PC100_CLKGATE_SCLK0_IRDA (1<<10) | ||
| 201 | #define S5PC100_CLKGATE_SCLK0_USBHOST (1<<11) | ||
| 202 | #define S5PC100_CLKGATE_SCLK0_MMC0 (1<<12) | ||
| 203 | #define S5PC100_CLKGATE_SCLK0_MMC1 (1<<13) | ||
| 204 | #define S5PC100_CLKGATE_SCLK0_MMC2 (1<<14) | ||
| 205 | #define S5PC100_CLKGATE_SCLK0_MMC0_48 (1<<15) | ||
| 206 | #define S5PC100_CLKGATE_SCLK0_MMC1_48 (1<<16) | ||
| 207 | #define S5PC100_CLKGATE_SCLK0_MMC2_48 (1<<17) | ||
| 208 | |||
| 209 | /* Special Clock Gate 1 Registers */ | ||
| 210 | #define S5PC100_CLKGATE_SCLK1_LCD (1<<0) | ||
| 211 | #define S5PC100_CLKGATE_SCLK1_FIMC0 (1<<1) | ||
| 212 | #define S5PC100_CLKGATE_SCLK1_FIMC1 (1<<2) | ||
| 213 | #define S5PC100_CLKGATE_SCLK1_FIMC2 (1<<3) | ||
| 214 | #define S5PC100_CLKGATE_SCLK1_TV54 (1<<4) | ||
| 215 | #define S5PC100_CLKGATE_SCLK1_VDAC54 (1<<5) | ||
| 216 | #define S5PC100_CLKGATE_SCLK1_MIXER (1<<6) | ||
| 217 | #define S5PC100_CLKGATE_SCLK1_HDMI (1<<7) | ||
| 218 | #define S5PC100_CLKGATE_SCLK1_AUDIO0 (1<<8) | ||
| 219 | #define S5PC100_CLKGATE_SCLK1_AUDIO1 (1<<9) | ||
| 220 | #define S5PC100_CLKGATE_SCLK1_AUDIO2 (1<<10) | ||
| 221 | #define S5PC100_CLKGATE_SCLK1_SPDIF (1<<11) | ||
| 222 | #define S5PC100_CLKGATE_SCLK1_CAM (1<<12) | ||
| 223 | |||
| 224 | #define S5PC100_SWRESET S5PC100_CLKREG_OTHER(0x000) | ||
| 225 | #define S5PC100_OND_SWRESET S5PC100_CLKREG_OTHER(0x008) | ||
| 226 | #define S5PC100_GEN_CTRL S5PC100_CLKREG_OTHER(0x100) | ||
| 227 | #define S5PC100_GEN_STATUS S5PC100_CLKREG_OTHER(0x104) | ||
| 228 | #define S5PC100_MEM_SYS_CFG S5PC100_CLKREG_OTHER(0x200) | ||
| 229 | #define S5PC100_CAM_MUX_SEL S5PC100_CLKREG_OTHER(0x300) | ||
| 230 | #define S5PC100_MIXER_OUT_SEL S5PC100_CLKREG_OTHER(0x304) | ||
| 231 | #define S5PC100_LPMP_MODE_SEL S5PC100_CLKREG_OTHER(0x308) | ||
| 232 | #define S5PC100_MIPI_PHY_CON0 S5PC100_CLKREG_OTHER(0x400) | ||
| 233 | #define S5PC100_MIPI_PHY_CON1 S5PC100_CLKREG_OTHER(0x414) | ||
| 234 | #define S5PC100_HDMI_PHY_CON0 S5PC100_CLKREG_OTHER(0x420) | ||
| 235 | |||
| 236 | #define S5PC100_SWRESET_RESETVAL 0xc100 | ||
| 237 | #define S5PC100_OTHER_SYS_INT 24 | ||
| 238 | #define S5PC100_OTHER_STA_TYPE 23 | ||
| 239 | #define STA_TYPE_EXPON 0 | ||
| 240 | #define STA_TYPE_SFR 1 | ||
| 241 | |||
| 242 | #define S5PC100_SLEEP_CFG_OSC_EN 0 | ||
| 243 | |||
| 244 | /* OTHERS Resgister */ | ||
| 245 | #define S5PC100_OTHERS_USB_SIG_MASK (1 << 16) | ||
| 246 | #define S5PC100_OTHERS_MIPI_DPHY_EN (1 << 28) | ||
| 247 | |||
| 248 | /* MIPI D-PHY Control Register 0 */ | ||
| 249 | #define S5PC100_MIPI_PHY_CON0_M_RESETN (1 << 1) | ||
| 250 | #define S5PC100_MIPI_PHY_CON0_S_RESETN (1 << 0) | ||
| 251 | |||
| 252 | #endif /* _PLAT_REGS_CLOCK_H */ | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/regs-power.h b/arch/arm/plat-s5pc1xx/include/plat/regs-power.h deleted file mode 100644 index 02ffa491b53a..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/regs-power.h +++ /dev/null | |||
| @@ -1,84 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/regs-clock.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Jongse Won <jongse.won@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX clock register definitions | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __ASM_ARM_REGS_PWR | ||
| 14 | #define __ASM_ARM_REGS_PWR __FILE__ | ||
| 15 | |||
| 16 | #define S5PC1XX_PWRREG(x) (S5PC1XX_VA_PWR + (x)) | ||
| 17 | |||
| 18 | /* s5pc100 (0xE0108000) register for power management */ | ||
| 19 | #define S5PC100_PWR_CFG S5PC1XX_PWRREG(0x0) | ||
| 20 | #define S5PC100_EINT_WAKEUP_MASK S5PC1XX_PWRREG(0x4) | ||
| 21 | #define S5PC100_NORMAL_CFG S5PC1XX_PWRREG(0x10) | ||
| 22 | #define S5PC100_STOP_CFG S5PC1XX_PWRREG(0x14) | ||
| 23 | #define S5PC100_SLEEP_CFG S5PC1XX_PWRREG(0x18) | ||
| 24 | #define S5PC100_STOP_MEM_CFG S5PC1XX_PWRREG(0x1C) | ||
| 25 | #define S5PC100_OSC_FREQ S5PC1XX_PWRREG(0x100) | ||
| 26 | #define S5PC100_OSC_STABLE S5PC1XX_PWRREG(0x104) | ||
| 27 | #define S5PC100_PWR_STABLE S5PC1XX_PWRREG(0x108) | ||
| 28 | #define S5PC100_MTC_STABLE S5PC1XX_PWRREG(0x110) | ||
| 29 | #define S5PC100_CLAMP_STABLE S5PC1XX_PWRREG(0x114) | ||
| 30 | #define S5PC100_OTHERS S5PC1XX_PWRREG(0x200) | ||
| 31 | #define S5PC100_RST_STAT S5PC1XX_PWRREG(0x300) | ||
| 32 | #define S5PC100_WAKEUP_STAT S5PC1XX_PWRREG(0x304) | ||
| 33 | #define S5PC100_BLK_PWR_STAT S5PC1XX_PWRREG(0x308) | ||
| 34 | #define S5PC100_INFORM0 S5PC1XX_PWRREG(0x400) | ||
| 35 | #define S5PC100_INFORM1 S5PC1XX_PWRREG(0x404) | ||
| 36 | #define S5PC100_INFORM2 S5PC1XX_PWRREG(0x408) | ||
| 37 | #define S5PC100_INFORM3 S5PC1XX_PWRREG(0x40C) | ||
| 38 | #define S5PC100_INFORM4 S5PC1XX_PWRREG(0x410) | ||
| 39 | #define S5PC100_INFORM5 S5PC1XX_PWRREG(0x414) | ||
| 40 | #define S5PC100_INFORM6 S5PC1XX_PWRREG(0x418) | ||
| 41 | #define S5PC100_INFORM7 S5PC1XX_PWRREG(0x41C) | ||
| 42 | #define S5PC100_DCGIDX_MAP0 S5PC1XX_PWRREG(0x500) | ||
| 43 | #define S5PC100_DCGIDX_MAP1 S5PC1XX_PWRREG(0x504) | ||
| 44 | #define S5PC100_DCGIDX_MAP2 S5PC1XX_PWRREG(0x508) | ||
| 45 | #define S5PC100_DCGPERF_MAP0 S5PC1XX_PWRREG(0x50C) | ||
| 46 | #define S5PC100_DCGPERF_MAP1 S5PC1XX_PWRREG(0x510) | ||
| 47 | #define S5PC100_DVCIDX_MAP S5PC1XX_PWRREG(0x514) | ||
| 48 | #define S5PC100_FREQ_CPU S5PC1XX_PWRREG(0x518) | ||
| 49 | #define S5PC100_FREQ_DPM S5PC1XX_PWRREG(0x51C) | ||
| 50 | #define S5PC100_DVSEMCLK_EN S5PC1XX_PWRREG(0x520) | ||
| 51 | #define S5PC100_APLL_CON_L8 S5PC1XX_PWRREG(0x600) | ||
| 52 | #define S5PC100_APLL_CON_L7 S5PC1XX_PWRREG(0x604) | ||
| 53 | #define S5PC100_APLL_CON_L6 S5PC1XX_PWRREG(0x608) | ||
| 54 | #define S5PC100_APLL_CON_L5 S5PC1XX_PWRREG(0x60C) | ||
| 55 | #define S5PC100_APLL_CON_L4 S5PC1XX_PWRREG(0x610) | ||
| 56 | #define S5PC100_APLL_CON_L3 S5PC1XX_PWRREG(0x614) | ||
| 57 | #define S5PC100_APLL_CON_L2 S5PC1XX_PWRREG(0x618) | ||
| 58 | #define S5PC100_APLL_CON_L1 S5PC1XX_PWRREG(0x61C) | ||
| 59 | #define S5PC100_IEM_CONTROL S5PC1XX_PWRREG(0x620) | ||
| 60 | #define S5PC100_CLKDIV_IEM_L8 S5PC1XX_PWRREG(0x700) | ||
| 61 | #define S5PC100_CLKDIV_IEM_L7 S5PC1XX_PWRREG(0x704) | ||
| 62 | #define S5PC100_CLKDIV_IEM_L6 S5PC1XX_PWRREG(0x708) | ||
| 63 | #define S5PC100_CLKDIV_IEM_L5 S5PC1XX_PWRREG(0x70C) | ||
| 64 | #define S5PC100_CLKDIV_IEM_L4 S5PC1XX_PWRREG(0x710) | ||
| 65 | #define S5PC100_CLKDIV_IEM_L3 S5PC1XX_PWRREG(0x714) | ||
| 66 | #define S5PC100_CLKDIV_IEM_L2 S5PC1XX_PWRREG(0x718) | ||
| 67 | #define S5PC100_CLKDIV_IEM_L1 S5PC1XX_PWRREG(0x71C) | ||
| 68 | #define S5PC100_IEM_HPMCLK_DIV S5PC1XX_PWRREG(0x724) | ||
| 69 | |||
| 70 | /* PWR_CFG */ | ||
| 71 | #define S5PC100_PWRCFG_CFG_DEEP_IDLE (1 << 31) | ||
| 72 | #define S5PC100_PWRCFG_CFG_WFI_MASK (3 << 5) | ||
| 73 | #define S5PC100_PWRCFG_CFG_WFI_IDLE (0 << 5) | ||
| 74 | #define S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE (1 << 5) | ||
| 75 | #define S5PC100_PWRCFG_CFG_WFI_STOP (2 << 5) | ||
| 76 | #define S5PC100_PWRCFG_CFG_WFI_SLEEP (3 << 5) | ||
| 77 | |||
| 78 | /* SLEEP_CFG */ | ||
| 79 | #define S5PC100_SLEEP_OSC_EN_SLEEP (1 << 0) | ||
| 80 | |||
| 81 | /* OTHERS */ | ||
| 82 | #define S5PC100_PMU_INT_DISABLE (1 << 24) | ||
| 83 | |||
| 84 | #endif /* __ASM_ARM_REGS_PWR */ | ||
diff --git a/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h b/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h deleted file mode 100644 index 2531f34a56f3..000000000000 --- a/arch/arm/plat-s5pc1xx/include/plat/s5pc100.h +++ /dev/null | |||
| @@ -1,64 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/include/plat/s5pc100.h | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * Header file for s5pc100 cpu support | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/include/plat/s3c6400.h | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | /* Common init code for S5PC100 related SoCs */ | ||
| 16 | extern int s5pc100_init(void); | ||
| 17 | extern void s5pc100_map_io(void); | ||
| 18 | extern void s5pc100_init_clocks(int xtal); | ||
| 19 | extern int s5pc100_register_baseclocks(unsigned long xtal); | ||
| 20 | extern void s5pc100_init_irq(void); | ||
| 21 | extern void s5pc100_init_io(struct map_desc *mach_desc, int size); | ||
| 22 | extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
| 23 | extern void s5pc100_register_clocks(void); | ||
| 24 | extern void s5pc100_setup_clocks(void); | ||
| 25 | extern struct sysdev_class s5pc100_sysclass; | ||
| 26 | |||
| 27 | #define s5pc100_init_uarts s5pc100_common_init_uarts | ||
| 28 | |||
| 29 | /* Some day, belows will be moved to plat-s5pc/include/plat/cpu.h */ | ||
| 30 | extern void s5pc1xx_init_irq(u32 *vic_valid, int num); | ||
| 31 | extern void s5pc1xx_init_io(struct map_desc *mach_desc, int size); | ||
| 32 | |||
| 33 | /* Some day, belows will be moved to plat-s5pc/include/plat/clock.h */ | ||
| 34 | extern struct clk clk_hpll; | ||
| 35 | extern struct clk clk_hd0; | ||
| 36 | extern struct clk clk_pd0; | ||
| 37 | extern struct clk clk_54m; | ||
| 38 | extern void s5pc1xx_register_clocks(void); | ||
| 39 | extern int s5pc100_sclk0_ctrl(struct clk *clk, int enable); | ||
| 40 | extern int s5pc100_sclk1_ctrl(struct clk *clk, int enable); | ||
| 41 | |||
| 42 | /* Some day, belows will be moved to plat-s5pc/include/plat/devs.h */ | ||
| 43 | extern struct s3c24xx_uart_resources s5pc1xx_uart_resources[]; | ||
| 44 | extern struct platform_device s3c_device_g2d; | ||
| 45 | extern struct platform_device s3c_device_g3d; | ||
| 46 | extern struct platform_device s3c_device_vpp; | ||
| 47 | extern struct platform_device s3c_device_tvenc; | ||
| 48 | extern struct platform_device s3c_device_tvscaler; | ||
| 49 | extern struct platform_device s3c_device_rotator; | ||
| 50 | extern struct platform_device s3c_device_jpeg; | ||
| 51 | extern struct platform_device s3c_device_onenand; | ||
| 52 | extern struct platform_device s3c_device_usb_otghcd; | ||
| 53 | extern struct platform_device s3c_device_keypad; | ||
| 54 | extern struct platform_device s3c_device_ts; | ||
| 55 | extern struct platform_device s3c_device_g3d; | ||
| 56 | extern struct platform_device s3c_device_smc911x; | ||
| 57 | extern struct platform_device s3c_device_fimc0; | ||
| 58 | extern struct platform_device s3c_device_fimc1; | ||
| 59 | extern struct platform_device s3c_device_mfc; | ||
| 60 | extern struct platform_device s3c_device_ac97; | ||
| 61 | extern struct platform_device s3c_device_fimc0; | ||
| 62 | extern struct platform_device s3c_device_fimc1; | ||
| 63 | extern struct platform_device s3c_device_fimc2; | ||
| 64 | |||
diff --git a/arch/arm/plat-s5pc1xx/irq-eint.c b/arch/arm/plat-s5pc1xx/irq-eint.c deleted file mode 100644 index 373122f57d56..000000000000 --- a/arch/arm/plat-s5pc1xx/irq-eint.c +++ /dev/null | |||
| @@ -1,281 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-s5pc1xx/irq-eint.c | ||
| 3 | * | ||
| 4 | * Copyright 2009 Samsung Electronics Co. | ||
| 5 | * Byungho Min <bhmin@samsung.com> | ||
| 6 | * Kyungin Park <kyungmin.park@samsung.com> | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/irq-eint.c | ||
| 9 | * | ||
| 10 | * S5PC1XX - Interrupt handling for IRQ_EINT(x) | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/interrupt.h> | ||
| 19 | #include <linux/irq.h> | ||
| 20 | #include <linux/io.h> | ||
| 21 | #include <linux/sysdev.h> | ||
| 22 | #include <linux/pm.h> | ||
| 23 | #include <linux/gpio.h> | ||
| 24 | |||
| 25 | #include <asm/hardware/vic.h> | ||
| 26 | |||
| 27 | #include <mach/map.h> | ||
| 28 | |||
| 29 | #include <plat/gpio-cfg.h> | ||
| 30 | #include <plat/gpio-ext.h> | ||
| 31 | #include <plat/pm.h> | ||
| 32 | #include <plat/regs-gpio.h> | ||
| 33 | #include <plat/regs-irqtype.h> | ||
| 34 | |||
| 35 | /* | ||
| 36 | * bank is a group of external interrupt | ||
| 37 | * bank0 means EINT0 ... EINT7 | ||
| 38 | * bank1 means EINT8 ... EINT15 | ||
| 39 | * bank2 means EINT16 ... EINT23 | ||
| 40 | * bank3 means EINT24 ... EINT31 | ||
| 41 | */ | ||
| 42 | |||
| 43 | static inline int s3c_get_eint(unsigned int irq) | ||
| 44 | { | ||
| 45 | int real; | ||
| 46 | |||
| 47 | if (irq < IRQ_EINT16_31) | ||
| 48 | real = (irq - IRQ_EINT0); | ||
| 49 | else | ||
| 50 | real = (irq - S3C_IRQ_EINT_BASE) + IRQ_EINT16_31 - IRQ_EINT0; | ||
| 51 | |||
| 52 | return real; | ||
| 53 | } | ||
| 54 | |||
| 55 | static inline int s3c_get_bank(unsigned int irq) | ||
| 56 | { | ||
| 57 | return s3c_get_eint(irq) >> 3; | ||
| 58 | } | ||
| 59 | |||
| 60 | static inline int s3c_eint_to_bit(unsigned int irq) | ||
| 61 | { | ||
| 62 | int real, bit; | ||
| 63 | |||
| 64 | real = s3c_get_eint(irq); | ||
| 65 | bit = 1 << (real & (8 - 1)); | ||
| 66 | |||
| 67 | return bit; | ||
| 68 | } | ||
| 69 | |||
| 70 | static inline void s3c_irq_eint_mask(unsigned int irq) | ||
| 71 | { | ||
| 72 | u32 mask; | ||
| 73 | u32 bank = s3c_get_bank(irq); | ||
| 74 | |||
| 75 | mask = __raw_readl(S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 76 | mask |= s3c_eint_to_bit(irq); | ||
| 77 | __raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 78 | } | ||
| 79 | |||
| 80 | static void s3c_irq_eint_unmask(unsigned int irq) | ||
| 81 | { | ||
| 82 | u32 mask; | ||
| 83 | u32 bank = s3c_get_bank(irq); | ||
| 84 | |||
| 85 | mask = __raw_readl(S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 86 | mask &= ~(s3c_eint_to_bit(irq)); | ||
| 87 | __raw_writel(mask, S5PC1XX_WKUP_INT_MASK(bank)); | ||
| 88 | } | ||
| 89 | |||
| 90 | static inline void s3c_irq_eint_ack(unsigned int irq) | ||
| 91 | { | ||
| 92 | u32 bank = s3c_get_bank(irq); | ||
| 93 | |||
| 94 | __raw_writel(s3c_eint_to_bit(irq), S5PC1XX_WKUP_INT_PEND(bank)); | ||
| 95 | } | ||
| 96 | |||
| 97 | static void s3c_irq_eint_maskack(unsigned int irq) | ||
| 98 | { | ||
| 99 | /* compiler should in-line these */ | ||
| 100 | s3c_irq_eint_mask(irq); | ||
| 101 | s3c_irq_eint_ack(irq); | ||
| 102 | } | ||
| 103 | |||
| 104 | static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) | ||
| 105 | { | ||
| 106 | u32 bank = s3c_get_bank(irq); | ||
| 107 | int real = s3c_get_eint(irq); | ||
| 108 | int gpio, shift, sfn; | ||
| 109 | u32 ctrl, con = 0; | ||
| 110 | |||
| 111 | switch (type) { | ||
| 112 | case IRQ_TYPE_NONE: | ||
| 113 | printk(KERN_WARNING "No edge setting!\n"); | ||
| 114 | break; | ||
| 115 | |||
| 116 | case IRQ_TYPE_EDGE_RISING: | ||
| 117 | con = S5PC1XX_WKUP_INT_RISEEDGE; | ||
| 118 | break; | ||
| 119 | |||
| 120 | case IRQ_TYPE_EDGE_FALLING: | ||
| 121 | con = S5PC1XX_WKUP_INT_FALLEDGE; | ||
| 122 | break; | ||
| 123 | |||
| 124 | case IRQ_TYPE_EDGE_BOTH: | ||
| 125 | con = S5PC1XX_WKUP_INT_BOTHEDGE; | ||
| 126 | break; | ||
| 127 | |||
| 128 | case IRQ_TYPE_LEVEL_LOW: | ||
| 129 | con = S5PC1XX_WKUP_INT_LOWLEV; | ||
| 130 | break; | ||
| 131 | |||
| 132 | case IRQ_TYPE_LEVEL_HIGH: | ||
| 133 | con = S5PC1XX_WKUP_INT_HILEV; | ||
| 134 | break; | ||
| 135 | |||
| 136 | default: | ||
| 137 | printk(KERN_ERR "No such irq type %d", type); | ||
| 138 | return -EINVAL; | ||
| 139 | } | ||
| 140 | |||
| 141 | gpio = real & (8 - 1); | ||
| 142 | shift = gpio << 2; | ||
| 143 | |||
| 144 | ctrl = __raw_readl(S5PC1XX_WKUP_INT_CON(bank)); | ||
| 145 | ctrl &= ~(0x7 << shift); | ||
| 146 | ctrl |= con << shift; | ||
| 147 | __raw_writel(ctrl, S5PC1XX_WKUP_INT_CON(bank)); | ||
| 148 | |||
| 149 | switch (real) { | ||
| 150 | case 0 ... 7: | ||
| 151 | gpio = S5PC100_GPH0(gpio); | ||
| 152 | break; | ||
| 153 | case 8 ... 15: | ||
| 154 | gpio = S5PC100_GPH1(gpio); | ||
| 155 | break; | ||
| 156 | case 16 ... 23: | ||
| 157 | gpio = S5PC100_GPH2(gpio); | ||
| 158 | break; | ||
| 159 | case 24 ... 31: | ||
| 160 | gpio = S5PC100_GPH3(gpio); | ||
| 161 | break; | ||
| 162 | default: | ||
| 163 | return -EINVAL; | ||
| 164 | } | ||
| 165 | |||
| 166 | sfn = S3C_GPIO_SFN(0x2); | ||
| 167 | s3c_gpio_cfgpin(gpio, sfn); | ||
| 168 | |||
| 169 | return 0; | ||
| 170 | } | ||
| 171 | |||
| 172 | static struct irq_chip s3c_irq_eint = { | ||
| 173 | .name = "EINT", | ||
| 174 | .mask = s3c_irq_eint_mask, | ||
| 175 | .unmask = s3c_irq_eint_unmask, | ||
| 176 | .mask_ack = s3c_irq_eint_maskack, | ||
| 177 | .ack = s3c_irq_eint_ack, | ||
| 178 | .set_type = s3c_irq_eint_set_type, | ||
| 179 | .set_wake = s3c_irqext_wake, | ||
| 180 | }; | ||
| 181 | |||
| 182 | /* s3c_irq_demux_eint | ||
| 183 | * | ||
| 184 | * This function demuxes the IRQ from external interrupts, | ||
| 185 | * from IRQ_EINT(16) to IRQ_EINT(31). It is designed to be inlined into | ||
| 186 | * the specific handlers s3c_irq_demux_eintX_Y. | ||
| 187 | */ | ||
| 188 | static inline void s3c_irq_demux_eint(unsigned int start, unsigned int end) | ||
| 189 | { | ||
| 190 | u32 status = __raw_readl(S5PC1XX_WKUP_INT_PEND((start >> 3))); | ||
| 191 | u32 mask = __raw_readl(S5PC1XX_WKUP_INT_MASK((start >> 3))); | ||
| 192 | unsigned int irq; | ||
| 193 | |||
| 194 | status &= ~mask; | ||
| 195 | status &= (1 << (end - start + 1)) - 1; | ||
| 196 | |||
| 197 | for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { | ||
| 198 | if (status & 1) | ||
| 199 | generic_handle_irq(irq); | ||
| 200 | |||
| 201 | status >>= 1; | ||
| 202 | } | ||
| 203 | } | ||
| 204 | |||
| 205 | static void s3c_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) | ||
| 206 | { | ||
| 207 | s3c_irq_demux_eint(16, 23); | ||
| 208 | s3c_irq_demux_eint(24, 31); | ||
| 209 | } | ||
| 210 | |||
| 211 | /* | ||
| 212 | * Handle EINT0 ... EINT15 at VIC directly | ||
| 213 | */ | ||
| 214 | static void s3c_irq_vic_eint_mask(unsigned int irq) | ||
| 215 | { | ||
| 216 | void __iomem *base = get_irq_chip_data(irq); | ||
| 217 | unsigned int real; | ||
| 218 | |||
| 219 | s3c_irq_eint_mask(irq); | ||
| 220 | real = s3c_get_eint(irq); | ||
| 221 | writel(1 << real, base + VIC_INT_ENABLE_CLEAR); | ||
| 222 | } | ||
| 223 | |||
| 224 | static void s3c_irq_vic_eint_unmask(unsigned int irq) | ||
| 225 | { | ||
| 226 | void __iomem *base = get_irq_chip_data(irq); | ||
| 227 | unsigned int real; | ||
| 228 | |||
| 229 | s3c_irq_eint_unmask(irq); | ||
| 230 | real = s3c_get_eint(irq); | ||
| 231 | writel(1 << real, base + VIC_INT_ENABLE); | ||
| 232 | } | ||
| 233 | |||
| 234 | static inline void s3c_irq_vic_eint_ack(unsigned int irq) | ||
| 235 | { | ||
| 236 | u32 bit; | ||
| 237 | u32 bank = s3c_get_bank(irq); | ||
| 238 | |||
| 239 | bit = s3c_eint_to_bit(irq); | ||
| 240 | __raw_writel(bit, S5PC1XX_WKUP_INT_PEND(bank)); | ||
| 241 | } | ||
| 242 | |||
| 243 | static void s3c_irq_vic_eint_maskack(unsigned int irq) | ||
| 244 | { | ||
| 245 | /* compiler should in-line these */ | ||
| 246 | s3c_irq_vic_eint_mask(irq); | ||
| 247 | s3c_irq_vic_eint_ack(irq); | ||
| 248 | } | ||
| 249 | |||
| 250 | static struct irq_chip s3c_irq_vic_eint = { | ||
| 251 | .name = "EINT", | ||
| 252 | .mask = s3c_irq_vic_eint_mask, | ||
| 253 | .unmask = s3c_irq_vic_eint_unmask, | ||
| 254 | .mask_ack = s3c_irq_vic_eint_maskack, | ||
| 255 | .ack = s3c_irq_vic_eint_ack, | ||
| 256 | .set_type = s3c_irq_eint_set_type, | ||
| 257 | .set_wake = s3c_irqext_wake, | ||
| 258 | }; | ||
| 259 | |||
| 260 | static int __init s5pc1xx_init_irq_eint(void) | ||
| 261 | { | ||
| 262 | int irq; | ||
| 263 | |||
| 264 | for (irq = IRQ_EINT0; irq <= IRQ_EINT15; irq++) { | ||
| 265 | set_irq_chip(irq, &s3c_irq_vic_eint); | ||
| 266 | set_irq_handler(irq, handle_level_irq); | ||
| 267 | set_irq_flags(irq, IRQF_VALID); | ||
| 268 | } | ||
| 269 | |||
| 270 | for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { | ||
| 271 | set_irq_chip(irq, &s3c_irq_eint); | ||
| 272 | set_irq_handler(irq, handle_level_irq); | ||
| 273 | set_irq_flags(irq, IRQF_VALID); | ||
| 274 | } | ||
| 275 | |||
| 276 | set_irq_chained_handler(IRQ_EINT16_31, s3c_irq_demux_eint16_31); | ||
| 277 | |||
| 278 | return 0; | ||
| 279 | } | ||
| 280 | |||
| 281 | arch_initcall(s5pc1xx_init_irq_eint); | ||
diff --git a/arch/arm/plat-s5pc1xx/irq.c b/arch/arm/plat-s5pc1xx/irq.c deleted file mode 100644 index bfc524827819..000000000000 --- a/arch/arm/plat-s5pc1xx/irq.c +++ /dev/null | |||
| @@ -1,75 +0,0 @@ | |||
| 1 | /* arch/arm/plat-s5pc1xx/irq.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC1XX - Interrupt handling | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/irq.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/kernel.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/irq.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | |||
| 20 | #include <asm/hardware/vic.h> | ||
| 21 | |||
| 22 | #include <mach/map.h> | ||
| 23 | #include <plat/irq-vic-timer.h> | ||
| 24 | #include <plat/irq-uart.h> | ||
| 25 | #include <plat/cpu.h> | ||
| 26 | |||
| 27 | /* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] | ||
| 28 | * are consecutive when looking up the interrupt in the demux routines. | ||
| 29 | */ | ||
| 30 | static struct s3c_uart_irq uart_irqs[] = { | ||
| 31 | [0] = { | ||
| 32 | .regs = (void *)S3C_VA_UART0, | ||
| 33 | .base_irq = IRQ_S3CUART_BASE0, | ||
| 34 | .parent_irq = IRQ_UART0, | ||
| 35 | }, | ||
| 36 | [1] = { | ||
| 37 | .regs = (void *)S3C_VA_UART1, | ||
| 38 | .base_irq = IRQ_S3CUART_BASE1, | ||
| 39 | .parent_irq = IRQ_UART1, | ||
| 40 | }, | ||
| 41 | [2] = { | ||
| 42 | .regs = (void *)S3C_VA_UART2, | ||
| 43 | .base_irq = IRQ_S3CUART_BASE2, | ||
| 44 | .parent_irq = IRQ_UART2, | ||
| 45 | }, | ||
| 46 | [3] = { | ||
| 47 | .regs = (void *)S3C_VA_UART3, | ||
| 48 | .base_irq = IRQ_S3CUART_BASE3, | ||
| 49 | .parent_irq = IRQ_UART3, | ||
| 50 | }, | ||
| 51 | }; | ||
| 52 | |||
| 53 | void __init s5pc1xx_init_irq(u32 *vic_valid, int num) | ||
| 54 | { | ||
| 55 | int i; | ||
| 56 | |||
| 57 | printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); | ||
| 58 | |||
| 59 | /* initialise the pair of VICs */ | ||
| 60 | for (i = 0; i < num; i++) | ||
| 61 | vic_init((void *)S5PC1XX_VA_VIC(i), S3C_IRQ(i * S3C_IRQ_OFFSET), | ||
| 62 | vic_valid[i], 0); | ||
| 63 | |||
| 64 | /* add the timer sub-irqs */ | ||
| 65 | |||
| 66 | s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); | ||
| 67 | s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); | ||
| 68 | s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2); | ||
| 69 | s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3); | ||
| 70 | s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4); | ||
| 71 | |||
| 72 | s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); | ||
| 73 | } | ||
| 74 | |||
| 75 | |||
diff --git a/arch/arm/plat-s5pc1xx/s5pc100-clock.c b/arch/arm/plat-s5pc1xx/s5pc100-clock.c deleted file mode 100644 index 2bf6c57a96a2..000000000000 --- a/arch/arm/plat-s5pc1xx/s5pc100-clock.c +++ /dev/null | |||
| @@ -1,876 +0,0 @@ | |||
| 1 | /* linux/arch/arm/plat-s5pc1xx/s5pc100-clock.c | ||
| 2 | * | ||
| 3 | * Copyright 2009 Samsung Electronics, Co. | ||
| 4 | * Byungho Min <bhmin@samsung.com> | ||
| 5 | * | ||
| 6 | * S5PC100 based common clock support | ||
| 7 | * | ||
| 8 | * Based on plat-s3c64xx/s3c6400-clock.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/init.h> | ||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/list.h> | ||
| 19 | #include <linux/errno.h> | ||
| 20 | #include <linux/err.h> | ||
| 21 | #include <linux/clk.h> | ||
| 22 | #include <linux/sysdev.h> | ||
| 23 | #include <linux/io.h> | ||
| 24 | |||
| 25 | #include <mach/hardware.h> | ||
| 26 | #include <mach/map.h> | ||
| 27 | |||
| 28 | #include <plat/cpu-freq.h> | ||
| 29 | |||
| 30 | #include <plat/regs-clock.h> | ||
| 31 | #include <plat/clock.h> | ||
| 32 | #include <plat/clock-clksrc.h> | ||
| 33 | #include <plat/cpu.h> | ||
| 34 | #include <plat/pll.h> | ||
| 35 | #include <plat/devs.h> | ||
| 36 | #include <plat/s5pc100.h> | ||
| 37 | |||
| 38 | /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call | ||
| 39 | * ext_xtal_mux for want of an actual name from the manual. | ||
| 40 | */ | ||
| 41 | |||
| 42 | static struct clk clk_ext_xtal_mux = { | ||
| 43 | .name = "ext_xtal", | ||
| 44 | .id = -1, | ||
| 45 | }; | ||
| 46 | |||
| 47 | #define clk_fin_apll clk_ext_xtal_mux | ||
| 48 | #define clk_fin_mpll clk_ext_xtal_mux | ||
| 49 | #define clk_fin_epll clk_ext_xtal_mux | ||
| 50 | #define clk_fin_hpll clk_ext_xtal_mux | ||
| 51 | |||
| 52 | #define clk_fout_mpll clk_mpll | ||
| 53 | #define clk_vclk_54m clk_54m | ||
| 54 | |||
| 55 | /* APLL */ | ||
| 56 | static struct clk clk_fout_apll = { | ||
| 57 | .name = "fout_apll", | ||
| 58 | .id = -1, | ||
| 59 | .rate = 27000000, | ||
| 60 | }; | ||
| 61 | |||
| 62 | static struct clk *clk_src_apll_list[] = { | ||
| 63 | [0] = &clk_fin_apll, | ||
| 64 | [1] = &clk_fout_apll, | ||
| 65 | }; | ||
| 66 | |||
| 67 | static struct clksrc_sources clk_src_apll = { | ||
| 68 | .sources = clk_src_apll_list, | ||
| 69 | .nr_sources = ARRAY_SIZE(clk_src_apll_list), | ||
| 70 | }; | ||
| 71 | |||
| 72 | static struct clksrc_clk clk_mout_apll = { | ||
| 73 | .clk = { | ||
| 74 | .name = "mout_apll", | ||
| 75 | .id = -1, | ||
| 76 | }, | ||
| 77 | .sources = &clk_src_apll, | ||
| 78 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 0, .size = 1, }, | ||
| 79 | }; | ||
| 80 | |||
| 81 | static unsigned long s5pc100_clk_dout_apll_get_rate(struct clk *clk) | ||
| 82 | { | ||
| 83 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 84 | unsigned int ratio; | ||
| 85 | |||
| 86 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_APLL_MASK; | ||
| 87 | ratio >>= S5PC100_CLKDIV0_APLL_SHIFT; | ||
| 88 | |||
| 89 | return rate / (ratio + 1); | ||
| 90 | } | ||
| 91 | |||
| 92 | static struct clk clk_dout_apll = { | ||
| 93 | .name = "dout_apll", | ||
| 94 | .id = -1, | ||
| 95 | .parent = &clk_mout_apll.clk, | ||
| 96 | .ops = &(struct clk_ops) { | ||
| 97 | .get_rate = s5pc100_clk_dout_apll_get_rate, | ||
| 98 | }, | ||
| 99 | }; | ||
| 100 | |||
| 101 | static unsigned long s5pc100_clk_arm_get_rate(struct clk *clk) | ||
| 102 | { | ||
| 103 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 104 | unsigned int ratio; | ||
| 105 | |||
| 106 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_ARM_MASK; | ||
| 107 | ratio >>= S5PC100_CLKDIV0_ARM_SHIFT; | ||
| 108 | |||
| 109 | return rate / (ratio + 1); | ||
| 110 | } | ||
| 111 | |||
| 112 | static unsigned long s5pc100_clk_arm_round_rate(struct clk *clk, | ||
| 113 | unsigned long rate) | ||
| 114 | { | ||
| 115 | unsigned long parent = clk_get_rate(clk->parent); | ||
| 116 | u32 div; | ||
| 117 | |||
| 118 | if (parent < rate) | ||
| 119 | return rate; | ||
| 120 | |||
| 121 | div = (parent / rate) - 1; | ||
| 122 | if (div > S5PC100_CLKDIV0_ARM_MASK) | ||
| 123 | div = S5PC100_CLKDIV0_ARM_MASK; | ||
| 124 | |||
| 125 | return parent / (div + 1); | ||
| 126 | } | ||
| 127 | |||
| 128 | static int s5pc100_clk_arm_set_rate(struct clk *clk, unsigned long rate) | ||
| 129 | { | ||
| 130 | unsigned long parent = clk_get_rate(clk->parent); | ||
| 131 | u32 div; | ||
| 132 | u32 val; | ||
| 133 | |||
| 134 | if (rate < parent / (S5PC100_CLKDIV0_ARM_MASK + 1)) | ||
| 135 | return -EINVAL; | ||
| 136 | |||
| 137 | rate = clk_round_rate(clk, rate); | ||
| 138 | div = clk_get_rate(clk->parent) / rate; | ||
| 139 | |||
| 140 | val = __raw_readl(S5PC100_CLKDIV0); | ||
| 141 | val &= S5PC100_CLKDIV0_ARM_MASK; | ||
| 142 | val |= (div - 1); | ||
| 143 | __raw_writel(val, S5PC100_CLKDIV0); | ||
| 144 | |||
| 145 | return 0; | ||
| 146 | } | ||
| 147 | |||
| 148 | static struct clk clk_arm = { | ||
| 149 | .name = "armclk", | ||
| 150 | .id = -1, | ||
| 151 | .parent = &clk_dout_apll, | ||
| 152 | .ops = &(struct clk_ops) { | ||
| 153 | .get_rate = s5pc100_clk_arm_get_rate, | ||
| 154 | .set_rate = s5pc100_clk_arm_set_rate, | ||
| 155 | .round_rate = s5pc100_clk_arm_round_rate, | ||
| 156 | }, | ||
| 157 | }; | ||
| 158 | |||
| 159 | static unsigned long s5pc100_clk_dout_d0_bus_get_rate(struct clk *clk) | ||
| 160 | { | ||
| 161 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 162 | unsigned int ratio; | ||
| 163 | |||
| 164 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_D0_MASK; | ||
| 165 | ratio >>= S5PC100_CLKDIV0_D0_SHIFT; | ||
| 166 | |||
| 167 | return rate / (ratio + 1); | ||
| 168 | } | ||
| 169 | |||
| 170 | static struct clk clk_dout_d0_bus = { | ||
| 171 | .name = "dout_d0_bus", | ||
| 172 | .id = -1, | ||
| 173 | .parent = &clk_arm, | ||
| 174 | .ops = &(struct clk_ops) { | ||
| 175 | .get_rate = s5pc100_clk_dout_d0_bus_get_rate, | ||
| 176 | }, | ||
| 177 | }; | ||
| 178 | |||
| 179 | static unsigned long s5pc100_clk_dout_pclkd0_get_rate(struct clk *clk) | ||
| 180 | { | ||
| 181 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 182 | unsigned int ratio; | ||
| 183 | |||
| 184 | ratio = __raw_readl(S5PC100_CLKDIV0) & S5PC100_CLKDIV0_PCLKD0_MASK; | ||
| 185 | ratio >>= S5PC100_CLKDIV0_PCLKD0_SHIFT; | ||
| 186 | |||
| 187 | return rate / (ratio + 1); | ||
| 188 | } | ||
| 189 | |||
| 190 | static struct clk clk_dout_pclkd0 = { | ||
| 191 | .name = "dout_pclkd0", | ||
| 192 | .id = -1, | ||
| 193 | .parent = &clk_dout_d0_bus, | ||
| 194 | .ops = &(struct clk_ops) { | ||
| 195 | .get_rate = s5pc100_clk_dout_pclkd0_get_rate, | ||
| 196 | }, | ||
| 197 | }; | ||
| 198 | |||
| 199 | static unsigned long s5pc100_clk_dout_apll2_get_rate(struct clk *clk) | ||
| 200 | { | ||
| 201 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 202 | unsigned int ratio; | ||
| 203 | |||
| 204 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_APLL2_MASK; | ||
| 205 | ratio >>= S5PC100_CLKDIV1_APLL2_SHIFT; | ||
| 206 | |||
| 207 | return rate / (ratio + 1); | ||
| 208 | } | ||
| 209 | |||
| 210 | static struct clk clk_dout_apll2 = { | ||
| 211 | .name = "dout_apll2", | ||
| 212 | .id = -1, | ||
| 213 | .parent = &clk_mout_apll.clk, | ||
| 214 | .ops = &(struct clk_ops) { | ||
| 215 | .get_rate = s5pc100_clk_dout_apll2_get_rate, | ||
| 216 | }, | ||
| 217 | }; | ||
| 218 | |||
| 219 | /* MPLL */ | ||
| 220 | static struct clk *clk_src_mpll_list[] = { | ||
| 221 | [0] = &clk_fin_mpll, | ||
| 222 | [1] = &clk_fout_mpll, | ||
| 223 | }; | ||
| 224 | |||
| 225 | static struct clksrc_sources clk_src_mpll = { | ||
| 226 | .sources = clk_src_mpll_list, | ||
| 227 | .nr_sources = ARRAY_SIZE(clk_src_mpll_list), | ||
| 228 | }; | ||
| 229 | |||
| 230 | static struct clksrc_clk clk_mout_mpll = { | ||
| 231 | .clk = { | ||
| 232 | .name = "mout_mpll", | ||
| 233 | .id = -1, | ||
| 234 | }, | ||
| 235 | .sources = &clk_src_mpll, | ||
| 236 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 4, .size = 1, }, | ||
| 237 | }; | ||
| 238 | |||
| 239 | static struct clk *clkset_am_list[] = { | ||
| 240 | [0] = &clk_mout_mpll.clk, | ||
| 241 | [1] = &clk_dout_apll2, | ||
| 242 | }; | ||
| 243 | |||
| 244 | static struct clksrc_sources clk_src_am = { | ||
| 245 | .sources = clkset_am_list, | ||
| 246 | .nr_sources = ARRAY_SIZE(clkset_am_list), | ||
| 247 | }; | ||
| 248 | |||
| 249 | static struct clksrc_clk clk_mout_am = { | ||
| 250 | .clk = { | ||
| 251 | .name = "mout_am", | ||
| 252 | .id = -1, | ||
| 253 | }, | ||
| 254 | .sources = &clk_src_am, | ||
| 255 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 16, .size = 1, }, | ||
| 256 | }; | ||
| 257 | |||
| 258 | static unsigned long s5pc100_clk_dout_d1_bus_get_rate(struct clk *clk) | ||
| 259 | { | ||
| 260 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 261 | unsigned int ratio; | ||
| 262 | |||
| 263 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 264 | |||
| 265 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_D1_MASK; | ||
| 266 | ratio >>= S5PC100_CLKDIV1_D1_SHIFT; | ||
| 267 | |||
| 268 | return rate / (ratio + 1); | ||
| 269 | } | ||
| 270 | |||
| 271 | static struct clk clk_dout_d1_bus = { | ||
| 272 | .name = "dout_d1_bus", | ||
| 273 | .id = -1, | ||
| 274 | .parent = &clk_mout_am.clk, | ||
| 275 | .ops = &(struct clk_ops) { | ||
| 276 | .get_rate = s5pc100_clk_dout_d1_bus_get_rate, | ||
| 277 | }, | ||
| 278 | }; | ||
| 279 | |||
| 280 | static struct clk *clkset_onenand_list[] = { | ||
| 281 | [0] = &clk_dout_d0_bus, | ||
| 282 | [1] = &clk_dout_d1_bus, | ||
| 283 | }; | ||
| 284 | |||
| 285 | static struct clksrc_sources clk_src_onenand = { | ||
| 286 | .sources = clkset_onenand_list, | ||
| 287 | .nr_sources = ARRAY_SIZE(clkset_onenand_list), | ||
| 288 | }; | ||
| 289 | |||
| 290 | static struct clksrc_clk clk_mout_onenand = { | ||
| 291 | .clk = { | ||
| 292 | .name = "mout_onenand", | ||
| 293 | .id = -1, | ||
| 294 | }, | ||
| 295 | .sources = &clk_src_onenand, | ||
| 296 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 24, .size = 1, }, | ||
| 297 | }; | ||
| 298 | |||
| 299 | static unsigned long s5pc100_clk_dout_pclkd1_get_rate(struct clk *clk) | ||
| 300 | { | ||
| 301 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 302 | unsigned int ratio; | ||
| 303 | |||
| 304 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 305 | |||
| 306 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_PCLKD1_MASK; | ||
| 307 | ratio >>= S5PC100_CLKDIV1_PCLKD1_SHIFT; | ||
| 308 | |||
| 309 | return rate / (ratio + 1); | ||
| 310 | } | ||
| 311 | |||
| 312 | static struct clk clk_dout_pclkd1 = { | ||
| 313 | .name = "dout_pclkd1", | ||
| 314 | .id = -1, | ||
| 315 | .parent = &clk_dout_d1_bus, | ||
| 316 | .ops = &(struct clk_ops) { | ||
| 317 | .get_rate = s5pc100_clk_dout_pclkd1_get_rate, | ||
| 318 | }, | ||
| 319 | }; | ||
| 320 | |||
| 321 | static unsigned long s5pc100_clk_dout_mpll2_get_rate(struct clk *clk) | ||
| 322 | { | ||
| 323 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 324 | unsigned int ratio; | ||
| 325 | |||
| 326 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 327 | |||
| 328 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_MPLL2_MASK; | ||
| 329 | ratio >>= S5PC100_CLKDIV1_MPLL2_SHIFT; | ||
| 330 | |||
| 331 | return rate / (ratio + 1); | ||
| 332 | } | ||
| 333 | |||
| 334 | static struct clk clk_dout_mpll2 = { | ||
| 335 | .name = "dout_mpll2", | ||
| 336 | .id = -1, | ||
| 337 | .parent = &clk_mout_am.clk, | ||
| 338 | .ops = &(struct clk_ops) { | ||
| 339 | .get_rate = s5pc100_clk_dout_mpll2_get_rate, | ||
| 340 | }, | ||
| 341 | }; | ||
| 342 | |||
| 343 | static unsigned long s5pc100_clk_dout_cam_get_rate(struct clk *clk) | ||
| 344 | { | ||
| 345 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 346 | unsigned int ratio; | ||
| 347 | |||
| 348 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 349 | |||
| 350 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_CAM_MASK; | ||
| 351 | ratio >>= S5PC100_CLKDIV1_CAM_SHIFT; | ||
| 352 | |||
| 353 | return rate / (ratio + 1); | ||
| 354 | } | ||
| 355 | |||
| 356 | static struct clk clk_dout_cam = { | ||
| 357 | .name = "dout_cam", | ||
| 358 | .id = -1, | ||
| 359 | .parent = &clk_dout_mpll2, | ||
| 360 | .ops = &(struct clk_ops) { | ||
| 361 | .get_rate = s5pc100_clk_dout_cam_get_rate, | ||
| 362 | }, | ||
| 363 | }; | ||
| 364 | |||
| 365 | static unsigned long s5pc100_clk_dout_mpll_get_rate(struct clk *clk) | ||
| 366 | { | ||
| 367 | unsigned long rate = clk_get_rate(clk->parent); | ||
| 368 | unsigned int ratio; | ||
| 369 | |||
| 370 | printk(KERN_DEBUG "%s: parent is %ld\n", __func__, rate); | ||
| 371 | |||
| 372 | ratio = __raw_readl(S5PC100_CLKDIV1) & S5PC100_CLKDIV1_MPLL_MASK; | ||
| 373 | ratio >>= S5PC100_CLKDIV1_MPLL_SHIFT; | ||
| 374 | |||
| 375 | return rate / (ratio + 1); | ||
| 376 | } | ||
| 377 | |||
| 378 | static struct clk clk_dout_mpll = { | ||
| 379 | .name = "dout_mpll", | ||
| 380 | .id = -1, | ||
| 381 | .parent = &clk_mout_am.clk, | ||
| 382 | .ops = &(struct clk_ops) { | ||
| 383 | .get_rate = s5pc100_clk_dout_mpll_get_rate, | ||
| 384 | }, | ||
| 385 | }; | ||
| 386 | |||
| 387 | /* EPLL */ | ||
| 388 | static struct clk clk_fout_epll = { | ||
| 389 | .name = "fout_epll", | ||
| 390 | .id = -1, | ||
| 391 | }; | ||
| 392 | |||
| 393 | static struct clk *clk_src_epll_list[] = { | ||
| 394 | [0] = &clk_fin_epll, | ||
| 395 | [1] = &clk_fout_epll, | ||
| 396 | }; | ||
| 397 | |||
| 398 | static struct clksrc_sources clk_src_epll = { | ||
| 399 | .sources = clk_src_epll_list, | ||
| 400 | .nr_sources = ARRAY_SIZE(clk_src_epll_list), | ||
| 401 | }; | ||
| 402 | |||
| 403 | static struct clksrc_clk clk_mout_epll = { | ||
| 404 | .clk = { | ||
| 405 | .name = "mout_epll", | ||
| 406 | .id = -1, | ||
| 407 | }, | ||
| 408 | .sources = &clk_src_epll, | ||
| 409 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 8, .size = 1, }, | ||
| 410 | }; | ||
| 411 | |||
| 412 | /* HPLL */ | ||
| 413 | static struct clk clk_fout_hpll = { | ||
| 414 | .name = "fout_hpll", | ||
| 415 | .id = -1, | ||
| 416 | }; | ||
| 417 | |||
| 418 | static struct clk *clk_src_hpll_list[] = { | ||
| 419 | [0] = &clk_27m, | ||
| 420 | [1] = &clk_fout_hpll, | ||
| 421 | }; | ||
| 422 | |||
| 423 | static struct clksrc_sources clk_src_hpll = { | ||
| 424 | .sources = clk_src_hpll_list, | ||
| 425 | .nr_sources = ARRAY_SIZE(clk_src_hpll_list), | ||
| 426 | }; | ||
| 427 | |||
| 428 | static struct clksrc_clk clk_mout_hpll = { | ||
| 429 | .clk = { | ||
| 430 | .name = "mout_hpll", | ||
| 431 | .id = -1, | ||
| 432 | }, | ||
| 433 | .sources = &clk_src_hpll, | ||
| 434 | .reg_src = { .reg = S5PC100_CLKSRC0, .shift = 12, .size = 1, }, | ||
| 435 | }; | ||
| 436 | |||
| 437 | /* Peripherals */ | ||
| 438 | /* | ||
| 439 | * The peripheral clocks are all controlled via clocksource followed | ||
| 440 | * by an optional divider and gate stage. We currently roll this into | ||
| 441 | * one clock which hides the intermediate clock from the mux. | ||
| 442 | * | ||
| 443 | * Note, the JPEG clock can only be an even divider... | ||
| 444 | * | ||
| 445 | * The scaler and LCD clocks depend on the S5PC100 version, and also | ||
| 446 | * have a common parent divisor so are not included here. | ||
| 447 | */ | ||
| 448 | |||
| 449 | static struct clk clk_iis_cd0 = { | ||
| 450 | .name = "iis_cdclk0", | ||
| 451 | .id = -1, | ||
| 452 | }; | ||
| 453 | |||
| 454 | static struct clk clk_iis_cd1 = { | ||
| 455 | .name = "iis_cdclk1", | ||
| 456 | .id = -1, | ||
| 457 | }; | ||
| 458 | |||
| 459 | static struct clk clk_iis_cd2 = { | ||
| 460 | .name = "iis_cdclk2", | ||
| 461 | .id = -1, | ||
| 462 | }; | ||
| 463 | |||
| 464 | static struct clk clk_pcm_cd0 = { | ||
| 465 | .name = "pcm_cdclk0", | ||
| 466 | .id = -1, | ||
| 467 | }; | ||
| 468 | |||
| 469 | static struct clk clk_pcm_cd1 = { | ||
| 470 | .name = "pcm_cdclk1", | ||
| 471 | .id = -1, | ||
| 472 | }; | ||
| 473 | |||
| 474 | static struct clk *clkset_audio0_list[] = { | ||
| 475 | &clk_mout_epll.clk, | ||
| 476 | &clk_dout_mpll, | ||
| 477 | &clk_fin_epll, | ||
| 478 | &clk_iis_cd0, | ||
| 479 | &clk_pcm_cd0, | ||
| 480 | &clk_mout_hpll.clk, | ||
| 481 | }; | ||
| 482 | |||
| 483 | static struct clksrc_sources clkset_audio0 = { | ||
| 484 | .sources = clkset_audio0_list, | ||
| 485 | .nr_sources = ARRAY_SIZE(clkset_audio0_list), | ||
| 486 | }; | ||
| 487 | |||
| 488 | static struct clk *clkset_spi_list[] = { | ||
| 489 | &clk_mout_epll.clk, | ||
| 490 | &clk_dout_mpll2, | ||
| 491 | &clk_fin_epll, | ||
| 492 | &clk_mout_hpll.clk, | ||
| 493 | }; | ||
| 494 | |||
| 495 | static struct clksrc_sources clkset_spi = { | ||
| 496 | .sources = clkset_spi_list, | ||
| 497 | .nr_sources = ARRAY_SIZE(clkset_spi_list), | ||
| 498 | }; | ||
| 499 | |||
| 500 | static struct clk *clkset_uart_list[] = { | ||
| 501 | &clk_mout_epll.clk, | ||
| 502 | &clk_dout_mpll, | ||
| 503 | }; | ||
| 504 | |||
| 505 | static struct clksrc_sources clkset_uart = { | ||
| 506 | .sources = clkset_uart_list, | ||
| 507 | .nr_sources = ARRAY_SIZE(clkset_uart_list), | ||
| 508 | }; | ||
| 509 | |||
| 510 | static struct clk *clkset_audio1_list[] = { | ||
| 511 | &clk_mout_epll.clk, | ||
| 512 | &clk_dout_mpll, | ||
| 513 | &clk_fin_epll, | ||
| 514 | &clk_iis_cd1, | ||
| 515 | &clk_pcm_cd1, | ||
| 516 | &clk_mout_hpll.clk, | ||
| 517 | }; | ||
| 518 | |||
| 519 | static struct clksrc_sources clkset_audio1 = { | ||
| 520 | .sources = clkset_audio1_list, | ||
| 521 | .nr_sources = ARRAY_SIZE(clkset_audio1_list), | ||
| 522 | }; | ||
| 523 | |||
| 524 | static struct clk *clkset_audio2_list[] = { | ||
| 525 | &clk_mout_epll.clk, | ||
| 526 | &clk_dout_mpll, | ||
| 527 | &clk_fin_epll, | ||
| 528 | &clk_iis_cd2, | ||
| 529 | &clk_mout_hpll.clk, | ||
| 530 | }; | ||
| 531 | |||
| 532 | static struct clksrc_sources clkset_audio2 = { | ||
| 533 | .sources = clkset_audio2_list, | ||
| 534 | .nr_sources = ARRAY_SIZE(clkset_audio2_list), | ||
| 535 | }; | ||
| 536 | |||
| 537 | static struct clksrc_clk clksrc_audio[] = { | ||
| 538 | { | ||
| 539 | .clk = { | ||
| 540 | .name = "audio-bus", | ||
| 541 | .id = 0, | ||
| 542 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO0, | ||
| 543 | .enable = s5pc100_sclk1_ctrl, | ||
| 544 | }, | ||
| 545 | .sources = &clkset_audio0, | ||
| 546 | .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 12, .size = 4, }, | ||
| 547 | .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 12, .size = 3, }, | ||
| 548 | }, { | ||
| 549 | .clk = { | ||
| 550 | .name = "audio-bus", | ||
| 551 | .id = 1, | ||
| 552 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO1, | ||
| 553 | .enable = s5pc100_sclk1_ctrl, | ||
| 554 | }, | ||
| 555 | .sources = &clkset_audio1, | ||
| 556 | .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 16, .size = 4, }, | ||
| 557 | .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 16, .size = 3, }, | ||
| 558 | }, { | ||
| 559 | .clk = { | ||
| 560 | .name = "audio-bus", | ||
| 561 | .id = 2, | ||
| 562 | .ctrlbit = S5PC100_CLKGATE_SCLK1_AUDIO2, | ||
| 563 | .enable = s5pc100_sclk1_ctrl, | ||
| 564 | }, | ||
| 565 | .sources = &clkset_audio2, | ||
| 566 | .reg_div = { .reg = S5PC100_CLKDIV4, .shift = 20, .size = 4, }, | ||
| 567 | .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 20, .size = 3, }, | ||
| 568 | }, | ||
| 569 | }; | ||
| 570 | |||
| 571 | static struct clk *clkset_spdif_list[] = { | ||
| 572 | &clksrc_audio[0].clk, | ||
| 573 | &clksrc_audio[1].clk, | ||
| 574 | &clksrc_audio[2].clk, | ||
| 575 | }; | ||
| 576 | |||
| 577 | static struct clksrc_sources clkset_spdif = { | ||
| 578 | .sources = clkset_spdif_list, | ||
| 579 | .nr_sources = ARRAY_SIZE(clkset_spdif_list), | ||
| 580 | }; | ||
| 581 | |||
| 582 | static struct clk *clkset_lcd_fimc_list[] = { | ||
| 583 | &clk_mout_epll.clk, | ||
| 584 | &clk_dout_mpll, | ||
| 585 | &clk_mout_hpll.clk, | ||
| 586 | &clk_vclk_54m, | ||
| 587 | }; | ||
| 588 | |||
| 589 | static struct clksrc_sources clkset_lcd_fimc = { | ||
| 590 | .sources = clkset_lcd_fimc_list, | ||
| 591 | .nr_sources = ARRAY_SIZE(clkset_lcd_fimc_list), | ||
| 592 | }; | ||
| 593 | |||
| 594 | static struct clk *clkset_mmc_list[] = { | ||
| 595 | &clk_mout_epll.clk, | ||
| 596 | &clk_dout_mpll, | ||
| 597 | &clk_fin_epll, | ||
| 598 | &clk_mout_hpll.clk , | ||
| 599 | }; | ||
| 600 | |||
| 601 | static struct clksrc_sources clkset_mmc = { | ||
| 602 | .sources = clkset_mmc_list, | ||
| 603 | .nr_sources = ARRAY_SIZE(clkset_mmc_list), | ||
| 604 | }; | ||
| 605 | |||
| 606 | static struct clk *clkset_usbhost_list[] = { | ||
| 607 | &clk_mout_epll.clk, | ||
| 608 | &clk_dout_mpll, | ||
| 609 | &clk_mout_hpll.clk, | ||
| 610 | &clk_48m, | ||
| 611 | }; | ||
| 612 | |||
| 613 | static struct clksrc_sources clkset_usbhost = { | ||
| 614 | .sources = clkset_usbhost_list, | ||
| 615 | .nr_sources = ARRAY_SIZE(clkset_usbhost_list), | ||
| 616 | }; | ||
| 617 | |||
| 618 | static struct clksrc_clk clksrc_clks[] = { | ||
| 619 | { | ||
| 620 | .clk = { | ||
| 621 | .name = "spi_bus", | ||
| 622 | .id = 0, | ||
| 623 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI0, | ||
| 624 | .enable = s5pc100_sclk0_ctrl, | ||
| 625 | |||
| 626 | }, | ||
| 627 | .sources = &clkset_spi, | ||
| 628 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 4, .size = 4, }, | ||
| 629 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 4, .size = 2, }, | ||
| 630 | }, { | ||
| 631 | .clk = { | ||
| 632 | .name = "spi_bus", | ||
| 633 | .id = 1, | ||
| 634 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI1, | ||
| 635 | .enable = s5pc100_sclk0_ctrl, | ||
| 636 | }, | ||
| 637 | .sources = &clkset_spi, | ||
| 638 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 8, .size = 4, }, | ||
| 639 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 8, .size = 2, }, | ||
| 640 | }, { | ||
| 641 | .clk = { | ||
| 642 | .name = "spi_bus", | ||
| 643 | .id = 2, | ||
| 644 | .ctrlbit = S5PC100_CLKGATE_SCLK0_SPI2, | ||
| 645 | .enable = s5pc100_sclk0_ctrl, | ||
| 646 | }, | ||
| 647 | .sources = &clkset_spi, | ||
| 648 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 12, .size = 4, }, | ||
| 649 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 12, .size = 2, }, | ||
| 650 | }, { | ||
| 651 | .clk = { | ||
| 652 | .name = "uclk1", | ||
| 653 | .id = -1, | ||
| 654 | .ctrlbit = S5PC100_CLKGATE_SCLK0_UART, | ||
| 655 | .enable = s5pc100_sclk0_ctrl, | ||
| 656 | }, | ||
| 657 | .sources = &clkset_uart, | ||
| 658 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 0, .size = 3, }, | ||
| 659 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 0, .size = 1, }, | ||
| 660 | }, { | ||
| 661 | .clk = { | ||
| 662 | .name = "spdif", | ||
| 663 | .id = -1, | ||
| 664 | }, | ||
| 665 | .sources = &clkset_spdif, | ||
| 666 | .reg_src = { .reg = S5PC100_CLKSRC3, .shift = 24, .size = 2, }, | ||
| 667 | }, { | ||
| 668 | .clk = { | ||
| 669 | .name = "lcd", | ||
| 670 | .id = -1, | ||
| 671 | .ctrlbit = S5PC100_CLKGATE_SCLK1_LCD, | ||
| 672 | .enable = s5pc100_sclk1_ctrl, | ||
| 673 | }, | ||
| 674 | .sources = &clkset_lcd_fimc, | ||
| 675 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 12, .size = 4, }, | ||
| 676 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 12, .size = 2, }, | ||
| 677 | }, { | ||
| 678 | .clk = { | ||
| 679 | .name = "fimc", | ||
| 680 | .id = 0, | ||
| 681 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC0, | ||
| 682 | .enable = s5pc100_sclk1_ctrl, | ||
| 683 | }, | ||
| 684 | .sources = &clkset_lcd_fimc, | ||
| 685 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 16, .size = 4, }, | ||
| 686 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 16, .size = 2, }, | ||
| 687 | }, { | ||
| 688 | .clk = { | ||
| 689 | .name = "fimc", | ||
| 690 | .id = 1, | ||
| 691 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC1, | ||
| 692 | .enable = s5pc100_sclk1_ctrl, | ||
| 693 | }, | ||
| 694 | .sources = &clkset_lcd_fimc, | ||
| 695 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 20, .size = 4, }, | ||
| 696 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 20, .size = 2, }, | ||
| 697 | }, { | ||
| 698 | .clk = { | ||
| 699 | .name = "fimc", | ||
| 700 | .id = 2, | ||
| 701 | .ctrlbit = S5PC100_CLKGATE_SCLK1_FIMC2, | ||
| 702 | .enable = s5pc100_sclk1_ctrl, | ||
| 703 | }, | ||
| 704 | .sources = &clkset_lcd_fimc, | ||
| 705 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 24, .size = 4, }, | ||
| 706 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 24, .size = 2, }, | ||
| 707 | }, { | ||
| 708 | .clk = { | ||
| 709 | .name = "mmc_bus", | ||
| 710 | .id = 0, | ||
| 711 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC0, | ||
| 712 | .enable = s5pc100_sclk0_ctrl, | ||
| 713 | }, | ||
| 714 | .sources = &clkset_mmc, | ||
| 715 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 0, .size = 4, }, | ||
| 716 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 0, .size = 2, }, | ||
| 717 | }, { | ||
| 718 | .clk = { | ||
| 719 | .name = "mmc_bus", | ||
| 720 | .id = 1, | ||
| 721 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC1, | ||
| 722 | .enable = s5pc100_sclk0_ctrl, | ||
| 723 | }, | ||
| 724 | .sources = &clkset_mmc, | ||
| 725 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 4, .size = 4, }, | ||
| 726 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 4, .size = 2, }, | ||
| 727 | }, { | ||
| 728 | .clk = { | ||
| 729 | .name = "mmc_bus", | ||
| 730 | .id = 2, | ||
| 731 | .ctrlbit = S5PC100_CLKGATE_SCLK0_MMC2, | ||
| 732 | .enable = s5pc100_sclk0_ctrl, | ||
| 733 | }, | ||
| 734 | .sources = &clkset_mmc, | ||
| 735 | .reg_div = { .reg = S5PC100_CLKDIV3, .shift = 8, .size = 4, }, | ||
| 736 | .reg_src = { .reg = S5PC100_CLKSRC2, .shift = 8, .size = 2, }, | ||
| 737 | }, { | ||
| 738 | .clk = { | ||
| 739 | .name = "usbhost", | ||
| 740 | .id = -1, | ||
| 741 | .ctrlbit = S5PC100_CLKGATE_SCLK0_USBHOST, | ||
| 742 | .enable = s5pc100_sclk0_ctrl, | ||
| 743 | }, | ||
| 744 | .sources = &clkset_usbhost, | ||
| 745 | .reg_div = { .reg = S5PC100_CLKDIV2, .shift = 20, .size = 4, }, | ||
| 746 | .reg_src = { .reg = S5PC100_CLKSRC1, .shift = 20, .size = 2, }, | ||
| 747 | } | ||
| 748 | }; | ||
| 749 | |||
| 750 | /* Clock initialisation code */ | ||
| 751 | |||
| 752 | static struct clksrc_clk *init_parents[] = { | ||
| 753 | &clk_mout_apll, | ||
| 754 | &clk_mout_mpll, | ||
| 755 | &clk_mout_am, | ||
| 756 | &clk_mout_onenand, | ||
| 757 | &clk_mout_epll, | ||
| 758 | &clk_mout_hpll, | ||
| 759 | }; | ||
| 760 | |||
| 761 | #define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) | ||
| 762 | |||
| 763 | void __init_or_cpufreq s5pc100_setup_clocks(void) | ||
| 764 | { | ||
| 765 | struct clk *xtal_clk; | ||
| 766 | unsigned long xtal; | ||
| 767 | unsigned long armclk; | ||
| 768 | unsigned long hclkd0; | ||
| 769 | unsigned long hclk; | ||
| 770 | unsigned long pclkd0; | ||
| 771 | unsigned long pclk; | ||
| 772 | unsigned long apll, mpll, epll, hpll; | ||
| 773 | unsigned int ptr; | ||
| 774 | u32 clkdiv0, clkdiv1; | ||
| 775 | |||
| 776 | printk(KERN_DEBUG "%s: registering clocks\n", __func__); | ||
| 777 | |||
| 778 | clkdiv0 = __raw_readl(S5PC100_CLKDIV0); | ||
| 779 | clkdiv1 = __raw_readl(S5PC100_CLKDIV1); | ||
| 780 | |||
| 781 | printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n", __func__, clkdiv0, clkdiv1); | ||
| 782 | |||
| 783 | xtal_clk = clk_get(NULL, "xtal"); | ||
| 784 | BUG_ON(IS_ERR(xtal_clk)); | ||
| 785 | |||
| 786 | xtal = clk_get_rate(xtal_clk); | ||
| 787 | clk_put(xtal_clk); | ||
| 788 | |||
| 789 | printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); | ||
| 790 | |||
| 791 | apll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_APLL_CON)); | ||
| 792 | mpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_MPLL_CON)); | ||
| 793 | epll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_EPLL_CON)); | ||
| 794 | hpll = s5pc1xx_get_pll(xtal, __raw_readl(S5PC100_HPLL_CON)); | ||
| 795 | |||
| 796 | printk(KERN_INFO "S5PC100: Apll=%ld.%03ld Mhz, Mpll=%ld.%03ld Mhz" | ||
| 797 | ", Epll=%ld.%03ld Mhz, Hpll=%ld.%03ld Mhz\n", | ||
| 798 | print_mhz(apll), print_mhz(mpll), | ||
| 799 | print_mhz(epll), print_mhz(hpll)); | ||
| 800 | |||
| 801 | armclk = apll / GET_DIV(clkdiv0, S5PC100_CLKDIV0_APLL); | ||
| 802 | armclk = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_ARM); | ||
| 803 | hclkd0 = armclk / GET_DIV(clkdiv0, S5PC100_CLKDIV0_D0); | ||
| 804 | pclkd0 = hclkd0 / GET_DIV(clkdiv0, S5PC100_CLKDIV0_PCLKD0); | ||
| 805 | hclk = mpll / GET_DIV(clkdiv1, S5PC100_CLKDIV1_D1); | ||
| 806 | pclk = hclk / GET_DIV(clkdiv1, S5PC100_CLKDIV1_PCLKD1); | ||
| 807 | |||
| 808 | printk(KERN_INFO "S5PC100: ARMCLK=%ld.%03ld MHz, HCLKD0=%ld.%03ld MHz," | ||
| 809 | " PCLKD0=%ld.%03ld MHz\n, HCLK=%ld.%03ld MHz," | ||
| 810 | " PCLK=%ld.%03ld MHz\n", | ||
| 811 | print_mhz(armclk), print_mhz(hclkd0), | ||
| 812 | print_mhz(pclkd0), print_mhz(hclk), print_mhz(pclk)); | ||
| 813 | |||
| 814 | clk_fout_apll.rate = apll; | ||
| 815 | clk_fout_mpll.rate = mpll; | ||
| 816 | clk_fout_epll.rate = epll; | ||
| 817 | clk_fout_hpll.rate = hpll; | ||
| 818 | |||
| 819 | clk_h.rate = hclk; | ||
| 820 | clk_p.rate = pclk; | ||
| 821 | clk_f.rate = armclk; | ||
| 822 | |||
| 823 | for (ptr = 0; ptr < ARRAY_SIZE(init_parents); ptr++) | ||
| 824 | s3c_set_clksrc(init_parents[ptr], true); | ||
| 825 | |||
| 826 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_audio); ptr++) | ||
| 827 | s3c_set_clksrc(clksrc_audio + ptr, true); | ||
| 828 | |||
| 829 | for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++) | ||
| 830 | s3c_set_clksrc(clksrc_clks + ptr, true); | ||
| 831 | } | ||
| 832 | |||
| 833 | static struct clk *clks[] __initdata = { | ||
| 834 | &clk_ext_xtal_mux, | ||
| 835 | &clk_dout_apll, | ||
| 836 | &clk_dout_d0_bus, | ||
| 837 | &clk_dout_pclkd0, | ||
| 838 | &clk_dout_apll2, | ||
| 839 | &clk_mout_apll.clk, | ||
| 840 | &clk_mout_mpll.clk, | ||
| 841 | &clk_mout_epll.clk, | ||
| 842 | &clk_mout_hpll.clk, | ||
| 843 | &clk_mout_am.clk, | ||
| 844 | &clk_dout_d1_bus, | ||
| 845 | &clk_mout_onenand.clk, | ||
| 846 | &clk_dout_pclkd1, | ||
| 847 | &clk_dout_mpll2, | ||
| 848 | &clk_dout_cam, | ||
| 849 | &clk_dout_mpll, | ||
| 850 | &clk_fout_epll, | ||
| 851 | &clk_iis_cd0, | ||
| 852 | &clk_iis_cd1, | ||
| 853 | &clk_iis_cd2, | ||
| 854 | &clk_pcm_cd0, | ||
| 855 | &clk_pcm_cd1, | ||
| 856 | &clk_arm, | ||
| 857 | }; | ||
| 858 | |||
| 859 | void __init s5pc100_register_clocks(void) | ||
| 860 | { | ||
| 861 | struct clk *clkp; | ||
| 862 | int ret; | ||
| 863 | int ptr; | ||
| 864 | |||
| 865 | for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { | ||
| 866 | clkp = clks[ptr]; | ||
| 867 | ret = s3c24xx_register_clock(clkp); | ||
| 868 | if (ret < 0) { | ||
| 869 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 870 | clkp->name, ret); | ||
| 871 | } | ||
| 872 | } | ||
| 873 | |||
| 874 | s3c_register_clksrc(clksrc_audio, ARRAY_SIZE(clksrc_audio)); | ||
| 875 | s3c_register_clksrc(clksrc_clks, ARRAY_SIZE(clksrc_clks)); | ||
| 876 | } | ||
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 229919e9744c..2753fb3e4f73 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig | |||
| @@ -6,7 +6,7 @@ | |||
| 6 | 6 | ||
| 7 | config PLAT_SAMSUNG | 7 | config PLAT_SAMSUNG |
| 8 | bool | 8 | bool |
| 9 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX | 9 | depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX |
| 10 | select NO_IOPORT | 10 | select NO_IOPORT |
| 11 | default y | 11 | default y |
| 12 | help | 12 | help |
| @@ -170,6 +170,11 @@ config S3C_DEV_I2C1 | |||
| 170 | help | 170 | help |
| 171 | Compile in platform device definitions for I2C channel 1 | 171 | Compile in platform device definitions for I2C channel 1 |
| 172 | 172 | ||
| 173 | config S3C_DEV_I2C2 | ||
| 174 | bool | ||
| 175 | help | ||
| 176 | Compile in platform device definitions for I2C channel 2 | ||
| 177 | |||
| 173 | config S3C_DEV_FB | 178 | config S3C_DEV_FB |
| 174 | bool | 179 | bool |
| 175 | help | 180 | help |
| @@ -185,11 +190,22 @@ config S3C_DEV_USB_HSOTG | |||
| 185 | help | 190 | help |
| 186 | Compile in platform device definition for USB high-speed OtG | 191 | Compile in platform device definition for USB high-speed OtG |
| 187 | 192 | ||
| 193 | config S3C_DEV_WDT | ||
| 194 | bool | ||
| 195 | default y if ARCH_S3C2410 | ||
| 196 | help | ||
| 197 | Complie in platform device definition for Watchdog Timer | ||
| 198 | |||
| 188 | config S3C_DEV_NAND | 199 | config S3C_DEV_NAND |
| 189 | bool | 200 | bool |
| 190 | help | 201 | help |
| 191 | Compile in platform device definition for NAND controller | 202 | Compile in platform device definition for NAND controller |
| 192 | 203 | ||
| 204 | config S3C_DEV_ONENAND | ||
| 205 | bool | ||
| 206 | help | ||
| 207 | Compile in platform device definition for OneNAND controller | ||
| 208 | |||
| 193 | config S3C_DEV_RTC | 209 | config S3C_DEV_RTC |
| 194 | bool | 210 | bool |
| 195 | help | 211 | help |
| @@ -269,4 +285,12 @@ config SAMSUNG_PM_CHECK_CHUNKSIZE | |||
| 269 | 285 | ||
| 270 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | 286 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> |
| 271 | 287 | ||
| 288 | config SAMSUNG_WAKEMASK | ||
| 289 | bool | ||
| 290 | depends on PM | ||
| 291 | help | ||
| 292 | Compile support for wakeup-mask controls found on the S3C6400 | ||
| 293 | and above. This code allows a set of interrupt to wakeup-mask | ||
| 294 | mappings. See <plat/wakeup-mask.h> | ||
| 295 | |||
| 272 | endif | 296 | endif |
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 48288499a3b9..b1d82cc5e716 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile | |||
| @@ -36,11 +36,14 @@ obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o | |||
| 36 | obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o | 36 | obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o |
| 37 | obj-y += dev-i2c0.o | 37 | obj-y += dev-i2c0.o |
| 38 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o | 38 | obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o |
| 39 | obj-$(CONFIG_S3C_DEV_I2C2) += dev-i2c2.o | ||
| 39 | obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o | 40 | obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o |
| 40 | obj-y += dev-uart.o | 41 | obj-y += dev-uart.o |
| 41 | obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o | 42 | obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o |
| 42 | obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o | 43 | obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o |
| 44 | obj-$(CONFIG_S3C_DEV_WDT) += dev-wdt.o | ||
| 43 | obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o | 45 | obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o |
| 46 | obj-$(CONFIG_S3C_DEV_ONENAND) += dev-onenand.o | ||
| 44 | obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o | 47 | obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o |
| 45 | 48 | ||
| 46 | obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o | 49 | obj-$(CONFIG_SAMSUNG_DEV_ADC) += dev-adc.o |
| @@ -58,6 +61,8 @@ obj-$(CONFIG_PM) += pm.o | |||
| 58 | obj-$(CONFIG_PM) += pm-gpio.o | 61 | obj-$(CONFIG_PM) += pm-gpio.o |
| 59 | obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o | 62 | obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o |
| 60 | 63 | ||
| 64 | obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o | ||
| 65 | |||
| 61 | # PWM support | 66 | # PWM support |
| 62 | 67 | ||
| 63 | obj-$(CONFIG_HAVE_PWM) += pwm.o | 68 | obj-$(CONFIG_HAVE_PWM) += pwm.o |
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index 210030d5cfe1..04d9521ddc9f 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c | |||
| @@ -66,6 +66,7 @@ struct adc_device { | |||
| 66 | struct s3c_adc_client *cur; | 66 | struct s3c_adc_client *cur; |
| 67 | struct s3c_adc_client *ts_pend; | 67 | struct s3c_adc_client *ts_pend; |
| 68 | void __iomem *regs; | 68 | void __iomem *regs; |
| 69 | spinlock_t lock; | ||
| 69 | 70 | ||
| 70 | unsigned int prescale; | 71 | unsigned int prescale; |
| 71 | 72 | ||
| @@ -74,7 +75,7 @@ struct adc_device { | |||
| 74 | 75 | ||
| 75 | static struct adc_device *adc_dev; | 76 | static struct adc_device *adc_dev; |
| 76 | 77 | ||
| 77 | static LIST_HEAD(adc_pending); | 78 | static LIST_HEAD(adc_pending); /* protected by adc_device.lock */ |
| 78 | 79 | ||
| 79 | #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) | 80 | #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) |
| 80 | 81 | ||
| @@ -145,7 +146,7 @@ int s3c_adc_start(struct s3c_adc_client *client, | |||
| 145 | if (client->is_ts && adc->ts_pend) | 146 | if (client->is_ts && adc->ts_pend) |
| 146 | return -EAGAIN; | 147 | return -EAGAIN; |
| 147 | 148 | ||
| 148 | local_irq_save(flags); | 149 | spin_lock_irqsave(&adc->lock, flags); |
| 149 | 150 | ||
| 150 | client->channel = channel; | 151 | client->channel = channel; |
| 151 | client->nr_samples = nr_samples; | 152 | client->nr_samples = nr_samples; |
| @@ -157,7 +158,8 @@ int s3c_adc_start(struct s3c_adc_client *client, | |||
| 157 | 158 | ||
| 158 | if (!adc->cur) | 159 | if (!adc->cur) |
| 159 | s3c_adc_try(adc); | 160 | s3c_adc_try(adc); |
| 160 | local_irq_restore(flags); | 161 | |
| 162 | spin_unlock_irqrestore(&adc->lock, flags); | ||
| 161 | 163 | ||
| 162 | return 0; | 164 | return 0; |
| 163 | } | 165 | } |
| @@ -237,6 +239,10 @@ EXPORT_SYMBOL_GPL(s3c_adc_register); | |||
| 237 | 239 | ||
| 238 | void s3c_adc_release(struct s3c_adc_client *client) | 240 | void s3c_adc_release(struct s3c_adc_client *client) |
| 239 | { | 241 | { |
| 242 | unsigned long flags; | ||
| 243 | |||
| 244 | spin_lock_irqsave(&adc_dev->lock, flags); | ||
| 245 | |||
| 240 | /* We should really check that nothing is in progress. */ | 246 | /* We should really check that nothing is in progress. */ |
| 241 | if (adc_dev->cur == client) | 247 | if (adc_dev->cur == client) |
| 242 | adc_dev->cur = NULL; | 248 | adc_dev->cur = NULL; |
| @@ -255,6 +261,8 @@ void s3c_adc_release(struct s3c_adc_client *client) | |||
| 255 | 261 | ||
| 256 | if (adc_dev->cur == NULL) | 262 | if (adc_dev->cur == NULL) |
| 257 | s3c_adc_try(adc_dev); | 263 | s3c_adc_try(adc_dev); |
| 264 | |||
| 265 | spin_unlock_irqrestore(&adc_dev->lock, flags); | ||
| 258 | kfree(client); | 266 | kfree(client); |
| 259 | } | 267 | } |
| 260 | EXPORT_SYMBOL_GPL(s3c_adc_release); | 268 | EXPORT_SYMBOL_GPL(s3c_adc_release); |
| @@ -264,7 +272,6 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) | |||
| 264 | struct adc_device *adc = pw; | 272 | struct adc_device *adc = pw; |
| 265 | struct s3c_adc_client *client = adc->cur; | 273 | struct s3c_adc_client *client = adc->cur; |
| 266 | enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; | 274 | enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; |
| 267 | unsigned long flags; | ||
| 268 | unsigned data0, data1; | 275 | unsigned data0, data1; |
| 269 | 276 | ||
| 270 | if (!client) { | 277 | if (!client) { |
| @@ -296,12 +303,12 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) | |||
| 296 | client->select_cb(client, 1); | 303 | client->select_cb(client, 1); |
| 297 | s3c_adc_convert(adc); | 304 | s3c_adc_convert(adc); |
| 298 | } else { | 305 | } else { |
| 299 | local_irq_save(flags); | 306 | spin_lock(&adc->lock); |
| 300 | (client->select_cb)(client, 0); | 307 | (client->select_cb)(client, 0); |
| 301 | adc->cur = NULL; | 308 | adc->cur = NULL; |
| 302 | 309 | ||
| 303 | s3c_adc_try(adc); | 310 | s3c_adc_try(adc); |
| 304 | local_irq_restore(flags); | 311 | spin_unlock(&adc->lock); |
| 305 | } | 312 | } |
| 306 | 313 | ||
| 307 | exit: | 314 | exit: |
| @@ -326,6 +333,8 @@ static int s3c_adc_probe(struct platform_device *pdev) | |||
| 326 | return -ENOMEM; | 333 | return -ENOMEM; |
| 327 | } | 334 | } |
| 328 | 335 | ||
| 336 | spin_lock_init(&adc->lock); | ||
| 337 | |||
| 329 | adc->pdev = pdev; | 338 | adc->pdev = pdev; |
| 330 | adc->prescale = S3C2410_ADCCON_PRSCVL(49); | 339 | adc->prescale = S3C2410_ADCCON_PRSCVL(49); |
| 331 | 340 | ||
| @@ -407,13 +416,17 @@ static int __devexit s3c_adc_remove(struct platform_device *pdev) | |||
| 407 | static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) | 416 | static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) |
| 408 | { | 417 | { |
| 409 | struct adc_device *adc = platform_get_drvdata(pdev); | 418 | struct adc_device *adc = platform_get_drvdata(pdev); |
| 419 | unsigned long flags; | ||
| 410 | u32 con; | 420 | u32 con; |
| 411 | 421 | ||
| 422 | spin_lock_irqsave(&adc->lock, flags); | ||
| 423 | |||
| 412 | con = readl(adc->regs + S3C2410_ADCCON); | 424 | con = readl(adc->regs + S3C2410_ADCCON); |
| 413 | con |= S3C2410_ADCCON_STDBM; | 425 | con |= S3C2410_ADCCON_STDBM; |
| 414 | writel(con, adc->regs + S3C2410_ADCCON); | 426 | writel(con, adc->regs + S3C2410_ADCCON); |
| 415 | 427 | ||
| 416 | disable_irq(adc->irq); | 428 | disable_irq(adc->irq); |
| 429 | spin_unlock_irqrestore(&adc->lock, flags); | ||
| 417 | clk_disable(adc->clk); | 430 | clk_disable(adc->clk); |
| 418 | 431 | ||
| 419 | return 0; | 432 | return 0; |
| @@ -422,6 +435,7 @@ static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) | |||
| 422 | static int s3c_adc_resume(struct platform_device *pdev) | 435 | static int s3c_adc_resume(struct platform_device *pdev) |
| 423 | { | 436 | { |
| 424 | struct adc_device *adc = platform_get_drvdata(pdev); | 437 | struct adc_device *adc = platform_get_drvdata(pdev); |
| 438 | unsigned long flags; | ||
| 425 | 439 | ||
| 426 | clk_enable(adc->clk); | 440 | clk_enable(adc->clk); |
| 427 | enable_irq(adc->irq); | 441 | enable_irq(adc->irq); |
diff --git a/arch/arm/plat-samsung/dev-i2c2.c b/arch/arm/plat-samsung/dev-i2c2.c new file mode 100644 index 000000000000..07036dee09e7 --- /dev/null +++ b/arch/arm/plat-samsung/dev-i2c2.c | |||
| @@ -0,0 +1,70 @@ | |||
| 1 | /* linux/arch/arm/plat-s3c/dev-i2c2.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * S3C series device definition for i2c device 2 | ||
| 7 | * | ||
| 8 | * Based on plat-samsung/dev-i2c0.c | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/gfp.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/string.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | |||
| 20 | #include <mach/irqs.h> | ||
| 21 | #include <mach/map.h> | ||
| 22 | |||
| 23 | #include <plat/regs-iic.h> | ||
| 24 | #include <plat/iic.h> | ||
| 25 | #include <plat/devs.h> | ||
| 26 | #include <plat/cpu.h> | ||
| 27 | |||
| 28 | static struct resource s3c_i2c_resource[] = { | ||
| 29 | [0] = { | ||
| 30 | .start = S3C_PA_IIC2, | ||
| 31 | .end = S3C_PA_IIC2 + SZ_4K - 1, | ||
| 32 | .flags = IORESOURCE_MEM, | ||
| 33 | }, | ||
| 34 | [1] = { | ||
| 35 | .start = IRQ_CAN0, | ||
| 36 | .end = IRQ_CAN0, | ||
| 37 | .flags = IORESOURCE_IRQ, | ||
| 38 | }, | ||
| 39 | }; | ||
| 40 | |||
| 41 | struct platform_device s3c_device_i2c2 = { | ||
| 42 | .name = "s3c2410-i2c", | ||
| 43 | .id = 2, | ||
| 44 | .num_resources = ARRAY_SIZE(s3c_i2c_resource), | ||
| 45 | .resource = s3c_i2c_resource, | ||
| 46 | }; | ||
| 47 | |||
| 48 | static struct s3c2410_platform_i2c default_i2c_data2 __initdata = { | ||
| 49 | .flags = 0, | ||
| 50 | .bus_num = 2, | ||
| 51 | .slave_addr = 0x10, | ||
| 52 | .frequency = 100*1000, | ||
| 53 | .sda_delay = 100, | ||
| 54 | }; | ||
| 55 | |||
| 56 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | ||
| 57 | { | ||
| 58 | struct s3c2410_platform_i2c *npd; | ||
| 59 | |||
| 60 | if (!pd) | ||
| 61 | pd = &default_i2c_data2; | ||
| 62 | |||
| 63 | npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL); | ||
| 64 | if (!npd) | ||
| 65 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | ||
| 66 | else if (!npd->cfg_gpio) | ||
| 67 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | ||
| 68 | |||
| 69 | s3c_device_i2c2.dev.platform_data = npd; | ||
| 70 | } | ||
diff --git a/arch/arm/plat-samsung/dev-onenand.c b/arch/arm/plat-samsung/dev-onenand.c new file mode 100644 index 000000000000..45ec73287d8c --- /dev/null +++ b/arch/arm/plat-samsung/dev-onenand.c | |||
| @@ -0,0 +1,55 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-samsung/dev-onenand.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2008-2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * S3C64XX/S5PC100 series device definition for OneNAND devices | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/kernel.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <linux/mtd/mtd.h> | ||
| 17 | #include <linux/mtd/onenand.h> | ||
| 18 | |||
| 19 | #include <mach/irqs.h> | ||
| 20 | #include <mach/map.h> | ||
| 21 | |||
| 22 | static struct resource s3c_onenand_resources[] = { | ||
| 23 | [0] = { | ||
| 24 | .start = S3C_PA_ONENAND, | ||
| 25 | .end = S3C_PA_ONENAND + 0x400 - 1, | ||
| 26 | .flags = IORESOURCE_MEM, | ||
| 27 | }, | ||
| 28 | [1] = { | ||
| 29 | .start = S3C_PA_ONENAND_BUF, | ||
| 30 | .end = S3C_PA_ONENAND_BUF + S3C_SZ_ONENAND_BUF - 1, | ||
| 31 | .flags = IORESOURCE_MEM, | ||
| 32 | }, | ||
| 33 | [2] = { | ||
| 34 | .start = IRQ_ONENAND, | ||
| 35 | .end = IRQ_ONENAND, | ||
| 36 | .flags = IORESOURCE_IRQ, | ||
| 37 | }, | ||
| 38 | }; | ||
| 39 | |||
| 40 | struct platform_device s3c_device_onenand = { | ||
| 41 | .name = "samsung-onenand", | ||
| 42 | .id = 0, | ||
| 43 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | ||
| 44 | .resource = s3c_onenand_resources, | ||
| 45 | }; | ||
| 46 | |||
| 47 | void s3c_onenand_set_platdata(struct onenand_platform_data *pdata) | ||
| 48 | { | ||
| 49 | struct onenand_platform_data *pd; | ||
| 50 | |||
| 51 | pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL); | ||
| 52 | if (!pd) | ||
| 53 | printk(KERN_ERR "%s: no memory for platform data\n", __func__); | ||
| 54 | s3c_device_onenand.dev.platform_data = pd; | ||
| 55 | } | ||
diff --git a/arch/arm/plat-samsung/dev-wdt.c b/arch/arm/plat-samsung/dev-wdt.c new file mode 100644 index 000000000000..5efca87cddbd --- /dev/null +++ b/arch/arm/plat-samsung/dev-wdt.c | |||
| @@ -0,0 +1,40 @@ | |||
| 1 | /* linux/arch/arm/plat-samsung/dev-wdt.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2004 Simtec Electronics | ||
| 4 | * Ben Dooks <ben@simtec.co.uk> | ||
| 5 | * | ||
| 6 | * S3C series device definition for the watchdog timer | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/platform_device.h> | ||
| 15 | |||
| 16 | #include <mach/irqs.h> | ||
| 17 | #include <mach/map.h> | ||
| 18 | |||
| 19 | #include <plat/devs.h> | ||
| 20 | |||
| 21 | static struct resource s3c_wdt_resource[] = { | ||
| 22 | [0] = { | ||
| 23 | .start = S3C_PA_WDT, | ||
| 24 | .end = S3C_PA_WDT + SZ_1M - 1, | ||
| 25 | .flags = IORESOURCE_MEM, | ||
| 26 | }, | ||
| 27 | [1] = { | ||
| 28 | .start = IRQ_WDT, | ||
| 29 | .end = IRQ_WDT, | ||
| 30 | .flags = IORESOURCE_IRQ, | ||
| 31 | } | ||
| 32 | }; | ||
| 33 | |||
| 34 | struct platform_device s3c_device_wdt = { | ||
| 35 | .name = "s3c2410-wdt", | ||
| 36 | .id = -1, | ||
| 37 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | ||
| 38 | .resource = s3c_wdt_resource, | ||
| 39 | }; | ||
| 40 | EXPORT_SYMBOL(s3c_device_wdt); | ||
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index ef69e56b2885..e6144e4b9118 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h | |||
| @@ -45,6 +45,7 @@ extern struct platform_device s3c_device_lcd; | |||
| 45 | extern struct platform_device s3c_device_wdt; | 45 | extern struct platform_device s3c_device_wdt; |
| 46 | extern struct platform_device s3c_device_i2c0; | 46 | extern struct platform_device s3c_device_i2c0; |
| 47 | extern struct platform_device s3c_device_i2c1; | 47 | extern struct platform_device s3c_device_i2c1; |
| 48 | extern struct platform_device s3c_device_i2c2; | ||
| 48 | extern struct platform_device s3c_device_rtc; | 49 | extern struct platform_device s3c_device_rtc; |
| 49 | extern struct platform_device s3c_device_adc; | 50 | extern struct platform_device s3c_device_adc; |
| 50 | extern struct platform_device s3c_device_sdi; | 51 | extern struct platform_device s3c_device_sdi; |
| @@ -57,9 +58,20 @@ extern struct platform_device s3c_device_hsmmc2; | |||
| 57 | extern struct platform_device s3c_device_spi0; | 58 | extern struct platform_device s3c_device_spi0; |
| 58 | extern struct platform_device s3c_device_spi1; | 59 | extern struct platform_device s3c_device_spi1; |
| 59 | 60 | ||
| 61 | extern struct platform_device s5pc100_device_spi0; | ||
| 62 | extern struct platform_device s5pc100_device_spi1; | ||
| 63 | extern struct platform_device s5pc100_device_spi2; | ||
| 64 | extern struct platform_device s5pv210_device_spi0; | ||
| 65 | extern struct platform_device s5pv210_device_spi1; | ||
| 66 | extern struct platform_device s5p6440_device_spi0; | ||
| 67 | extern struct platform_device s5p6440_device_spi1; | ||
| 68 | |||
| 60 | extern struct platform_device s3c_device_hwmon; | 69 | extern struct platform_device s3c_device_hwmon; |
| 61 | 70 | ||
| 62 | extern struct platform_device s3c_device_nand; | 71 | extern struct platform_device s3c_device_nand; |
| 72 | extern struct platform_device s3c_device_onenand; | ||
| 73 | extern struct platform_device s3c64xx_device_onenand1; | ||
| 74 | extern struct platform_device s5pc110_device_onenand; | ||
| 63 | 75 | ||
| 64 | extern struct platform_device s3c_device_usbgadget; | 76 | extern struct platform_device s3c_device_usbgadget; |
| 65 | extern struct platform_device s3c_device_usb_hsotg; | 77 | extern struct platform_device s3c_device_usb_hsotg; |
| @@ -76,10 +88,18 @@ extern struct platform_device s5p6442_device_pcm0; | |||
| 76 | extern struct platform_device s5p6442_device_pcm1; | 88 | extern struct platform_device s5p6442_device_pcm1; |
| 77 | extern struct platform_device s5p6442_device_iis0; | 89 | extern struct platform_device s5p6442_device_iis0; |
| 78 | extern struct platform_device s5p6442_device_iis1; | 90 | extern struct platform_device s5p6442_device_iis1; |
| 91 | extern struct platform_device s5p6442_device_spi; | ||
| 79 | 92 | ||
| 80 | extern struct platform_device s5p6440_device_pcm; | 93 | extern struct platform_device s5p6440_device_pcm; |
| 81 | extern struct platform_device s5p6440_device_iis; | 94 | extern struct platform_device s5p6440_device_iis; |
| 82 | 95 | ||
| 96 | extern struct platform_device s5pc100_device_ac97; | ||
| 97 | extern struct platform_device s5pc100_device_pcm0; | ||
| 98 | extern struct platform_device s5pc100_device_pcm1; | ||
| 99 | extern struct platform_device s5pc100_device_iis0; | ||
| 100 | extern struct platform_device s5pc100_device_iis1; | ||
| 101 | extern struct platform_device s5pc100_device_iis2; | ||
| 102 | |||
| 83 | /* s3c2440 specific devices */ | 103 | /* s3c2440 specific devices */ |
| 84 | 104 | ||
| 85 | #ifdef CONFIG_CPU_S3C2440 | 105 | #ifdef CONFIG_CPU_S3C2440 |
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index 1f85649d8c18..27d3b497b55b 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h | |||
| @@ -84,4 +84,11 @@ extern void s3c64xx_fb_gpio_setup_24bpp(void); | |||
| 84 | */ | 84 | */ |
| 85 | extern void s5pc100_fb_gpio_setup_24bpp(void); | 85 | extern void s5pc100_fb_gpio_setup_24bpp(void); |
| 86 | 86 | ||
| 87 | /** | ||
| 88 | * s5pv210_fb_gpio_setup_24bpp() - S5PV210/S5PC110 setup function for 24bpp LCD | ||
| 89 | * | ||
| 90 | * Initialise the GPIO for an 24bpp LCD display on the RGB interface. | ||
| 91 | */ | ||
| 92 | extern void s5pv210_fb_gpio_setup_24bpp(void); | ||
| 93 | |||
| 87 | #endif /* __PLAT_S3C_FB_H */ | 94 | #endif /* __PLAT_S3C_FB_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 34efdd2b032c..db4112c6f2be 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h | |||
| @@ -43,6 +43,11 @@ struct s3c_gpio_chip; | |||
| 43 | * layouts. Provide an point to vector control routine and provide any | 43 | * layouts. Provide an point to vector control routine and provide any |
| 44 | * per-bank configuration information that other systems such as the | 44 | * per-bank configuration information that other systems such as the |
| 45 | * external interrupt code will need. | 45 | * external interrupt code will need. |
| 46 | * | ||
| 47 | * @sa s3c_gpio_cfgpin | ||
| 48 | * @sa s3c_gpio_getcfg | ||
| 49 | * @sa s3c_gpio_setpull | ||
| 50 | * @sa s3c_gpio_getpull | ||
| 46 | */ | 51 | */ |
| 47 | struct s3c_gpio_cfg { | 52 | struct s3c_gpio_cfg { |
| 48 | unsigned int cfg_eint; | 53 | unsigned int cfg_eint; |
| @@ -70,11 +75,25 @@ struct s3c_gpio_cfg { | |||
| 70 | /** | 75 | /** |
| 71 | * s3c_gpio_cfgpin() - Change the GPIO function of a pin. | 76 | * s3c_gpio_cfgpin() - Change the GPIO function of a pin. |
| 72 | * @pin pin The pin number to configure. | 77 | * @pin pin The pin number to configure. |
| 73 | * @pin to The configuration for the pin's function. | 78 | * @to to The configuration for the pin's function. |
| 74 | * | 79 | * |
| 75 | * Configure which function is actually connected to the external | 80 | * Configure which function is actually connected to the external |
| 76 | * pin, such as an gpio input, output or some form of special function | 81 | * pin, such as an gpio input, output or some form of special function |
| 77 | * connected to an internal peripheral block. | 82 | * connected to an internal peripheral block. |
| 83 | * | ||
| 84 | * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT | ||
| 85 | * or S3C_GPIO_SFN() to indicate one of the possible values that the helper | ||
| 86 | * will then generate the correct bit mask and shift for the configuration. | ||
| 87 | * | ||
| 88 | * If a bank of GPIOs all needs to be set to special-function 2, then | ||
| 89 | * the following code will work: | ||
| 90 | * | ||
| 91 | * for (gpio = start; gpio < end; gpio++) | ||
| 92 | * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
| 93 | * | ||
| 94 | * The @to parameter can also be a specific value already shifted to the | ||
| 95 | * correct position in the control register, although these are discouraged | ||
| 96 | * in newer kernels and are only being kept for compatibility. | ||
| 78 | */ | 97 | */ |
| 79 | extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); | 98 | extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); |
| 80 | 99 | ||
| @@ -108,6 +127,8 @@ extern unsigned s3c_gpio_getcfg(unsigned int pin); | |||
| 108 | * This function sets the state of the pull-{up,down} resistor for the | 127 | * This function sets the state of the pull-{up,down} resistor for the |
| 109 | * specified pin. It will return 0 if successfull, or a negative error | 128 | * specified pin. It will return 0 if successfull, or a negative error |
| 110 | * code if the pin cannot support the requested pull setting. | 129 | * code if the pin cannot support the requested pull setting. |
| 130 | * | ||
| 131 | * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. | ||
| 111 | */ | 132 | */ |
| 112 | extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); | 133 | extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); |
| 113 | 134 | ||
diff --git a/arch/arm/plat-samsung/include/plat/iic-core.h b/arch/arm/plat-samsung/include/plat/iic-core.h index 36397ca20962..f182669b8e8e 100644 --- a/arch/arm/plat-samsung/include/plat/iic-core.h +++ b/arch/arm/plat-samsung/include/plat/iic-core.h | |||
| @@ -32,4 +32,11 @@ static inline void s3c_i2c1_setname(char *name) | |||
| 32 | #endif | 32 | #endif |
| 33 | } | 33 | } |
| 34 | 34 | ||
| 35 | static inline void s3c_i2c2_setname(char *name) | ||
| 36 | { | ||
| 37 | #ifdef CONFIG_S3C_DEV_I2C2 | ||
| 38 | s3c_device_i2c2.name = name; | ||
| 39 | #endif | ||
| 40 | } | ||
| 41 | |||
| 35 | #endif /* __ASM_ARCH_IIC_H */ | 42 | #endif /* __ASM_ARCH_IIC_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/iic.h b/arch/arm/plat-samsung/include/plat/iic.h index 3083df00dee6..133308bf595d 100644 --- a/arch/arm/plat-samsung/include/plat/iic.h +++ b/arch/arm/plat-samsung/include/plat/iic.h | |||
| @@ -54,9 +54,11 @@ struct s3c2410_platform_i2c { | |||
| 54 | */ | 54 | */ |
| 55 | extern void s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *i2c); | 55 | extern void s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *i2c); |
| 56 | extern void s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *i2c); | 56 | extern void s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *i2c); |
| 57 | extern void s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *i2c); | ||
| 57 | 58 | ||
| 58 | /* defined by architecture to configure gpio */ | 59 | /* defined by architecture to configure gpio */ |
| 59 | extern void s3c_i2c0_cfg_gpio(struct platform_device *dev); | 60 | extern void s3c_i2c0_cfg_gpio(struct platform_device *dev); |
| 60 | extern void s3c_i2c1_cfg_gpio(struct platform_device *dev); | 61 | extern void s3c_i2c1_cfg_gpio(struct platform_device *dev); |
| 62 | extern void s3c_i2c2_cfg_gpio(struct platform_device *dev); | ||
| 61 | 63 | ||
| 62 | #endif /* __ASM_ARCH_IIC_H */ | 64 | #endif /* __ASM_ARCH_IIC_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/onenand-core.h b/arch/arm/plat-samsung/include/plat/onenand-core.h new file mode 100644 index 000000000000..7701cb7020c8 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/onenand-core.h | |||
| @@ -0,0 +1,37 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-samsung/onenand-core.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * Marek Szyprowski <m.szyprowski@samsung.com> | ||
| 7 | * | ||
| 8 | * Samsung OneNAD Controller core functions | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef __ASM_ARCH_ONENAND_CORE_H | ||
| 16 | #define __ASM_ARCH_ONENAND_CORE_H __FILE__ | ||
| 17 | |||
| 18 | /* These functions are only for use with the core support code, such as | ||
| 19 | * the cpu specific initialisation code | ||
| 20 | */ | ||
| 21 | |||
| 22 | /* re-define device name depending on support. */ | ||
| 23 | static inline void s3c_onenand_setname(char *name) | ||
| 24 | { | ||
| 25 | #ifdef CONFIG_S3C_DEV_ONENAND | ||
| 26 | s3c_device_onenand.name = name; | ||
| 27 | #endif | ||
| 28 | } | ||
| 29 | |||
| 30 | static inline void s3c64xx_onenand1_setname(char *name) | ||
| 31 | { | ||
| 32 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 | ||
| 33 | s3c64xx_device_onenand1.name = name; | ||
| 34 | #endif | ||
| 35 | } | ||
| 36 | |||
| 37 | #endif /* __ASM_ARCH_ONENAND_CORE_H */ | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-onenand.h b/arch/arm/plat-samsung/include/plat/regs-onenand.h new file mode 100644 index 000000000000..930ea8b88ed3 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/regs-onenand.h | |||
| @@ -0,0 +1,63 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/arm/plat-s3c/include/plat/regs-onenand.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008-2010 Samsung Electronics | ||
| 5 | * Kyungmin Park <kyungmin.park@samsung.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | #ifndef __SAMSUNG_ONENAND_H__ | ||
| 12 | #define __SAMSUNG_ONENAND_H__ | ||
| 13 | |||
| 14 | #include <mach/hardware.h> | ||
| 15 | |||
| 16 | /* | ||
| 17 | * OneNAND Controller | ||
| 18 | */ | ||
| 19 | #define MEM_CFG_OFFSET 0x0000 | ||
| 20 | #define BURST_LEN_OFFSET 0x0010 | ||
| 21 | #define MEM_RESET_OFFSET 0x0020 | ||
| 22 | #define INT_ERR_STAT_OFFSET 0x0030 | ||
| 23 | #define INT_ERR_MASK_OFFSET 0x0040 | ||
| 24 | #define INT_ERR_ACK_OFFSET 0x0050 | ||
| 25 | #define ECC_ERR_STAT_OFFSET 0x0060 | ||
| 26 | #define MANUFACT_ID_OFFSET 0x0070 | ||
| 27 | #define DEVICE_ID_OFFSET 0x0080 | ||
| 28 | #define DATA_BUF_SIZE_OFFSET 0x0090 | ||
| 29 | #define BOOT_BUF_SIZE_OFFSET 0x00A0 | ||
| 30 | #define BUF_AMOUNT_OFFSET 0x00B0 | ||
| 31 | #define TECH_OFFSET 0x00C0 | ||
| 32 | #define FBA_WIDTH_OFFSET 0x00D0 | ||
| 33 | #define FPA_WIDTH_OFFSET 0x00E0 | ||
| 34 | #define FSA_WIDTH_OFFSET 0x00F0 | ||
| 35 | #define TRANS_SPARE_OFFSET 0x0140 | ||
| 36 | #define DBS_DFS_WIDTH_OFFSET 0x0160 | ||
| 37 | #define INT_PIN_ENABLE_OFFSET 0x01A0 | ||
| 38 | #define ACC_CLOCK_OFFSET 0x01C0 | ||
| 39 | #define FLASH_VER_ID_OFFSET 0x01F0 | ||
| 40 | #define FLASH_AUX_CNTRL_OFFSET 0x0300 /* s3c64xx only */ | ||
| 41 | |||
| 42 | #define ONENAND_MEM_RESET_HOT 0x3 | ||
| 43 | #define ONENAND_MEM_RESET_COLD 0x2 | ||
| 44 | #define ONENAND_MEM_RESET_WARM 0x1 | ||
| 45 | |||
| 46 | #define CACHE_OP_ERR (1 << 13) | ||
| 47 | #define RST_CMP (1 << 12) | ||
| 48 | #define RDY_ACT (1 << 11) | ||
| 49 | #define INT_ACT (1 << 10) | ||
| 50 | #define UNSUP_CMD (1 << 9) | ||
| 51 | #define LOCKED_BLK (1 << 8) | ||
| 52 | #define BLK_RW_CMP (1 << 7) | ||
| 53 | #define ERS_CMP (1 << 6) | ||
| 54 | #define PGM_CMP (1 << 5) | ||
| 55 | #define LOAD_CMP (1 << 4) | ||
| 56 | #define ERS_FAIL (1 << 3) | ||
| 57 | #define PGM_FAIL (1 << 2) | ||
| 58 | #define INT_TO (1 << 1) | ||
| 59 | #define LD_FAIL_ECC_ERR (1 << 0) | ||
| 60 | |||
| 61 | #define TSRF (1 << 0) | ||
| 62 | |||
| 63 | #endif | ||
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h index d5837cf8e402..65c190d142dd 100644 --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h | |||
| @@ -20,6 +20,10 @@ | |||
| 20 | #define S3C2410_RTCCON_CLKSEL (1<<1) | 20 | #define S3C2410_RTCCON_CLKSEL (1<<1) |
| 21 | #define S3C2410_RTCCON_CNTSEL (1<<2) | 21 | #define S3C2410_RTCCON_CNTSEL (1<<2) |
| 22 | #define S3C2410_RTCCON_CLKRST (1<<3) | 22 | #define S3C2410_RTCCON_CLKRST (1<<3) |
| 23 | #define S3C64XX_RTCCON_TICEN (1<<8) | ||
| 24 | |||
| 25 | #define S3C64XX_RTCCON_TICMSK (0xF<<7) | ||
| 26 | #define S3C64XX_RTCCON_TICSHT (7) | ||
| 23 | 27 | ||
| 24 | #define S3C2410_TICNT S3C2410_RTCREG(0x44) | 28 | #define S3C2410_TICNT S3C2410_RTCREG(0x44) |
| 25 | #define S3C2410_TICNT_ENABLE (1<<7) | 29 | #define S3C2410_TICNT_ENABLE (1<<7) |
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index d17724149315..e5aba8f95b79 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
| @@ -63,5 +63,9 @@ struct s3c64xx_spi_info { | |||
| 63 | * has some chips attached to it. | 63 | * has some chips attached to it. |
| 64 | */ | 64 | */ |
| 65 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | 65 | extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); |
| 66 | extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
| 67 | extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
| 68 | extern void s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
| 69 | extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); | ||
| 66 | 70 | ||
| 67 | #endif /* __S3C64XX_PLAT_SPI_H */ | 71 | #endif /* __S3C64XX_PLAT_SPI_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 7d07cd7aa4f2..13f9fb20900a 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h | |||
| @@ -75,6 +75,9 @@ extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | |||
| 75 | extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | 75 | extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); |
| 76 | extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | 76 | extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); |
| 77 | extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | 77 | extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); |
| 78 | extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); | ||
| 79 | extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); | ||
| 80 | extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); | ||
| 78 | 81 | ||
| 79 | /* S3C6400 SDHCI setup */ | 82 | /* S3C6400 SDHCI setup */ |
| 80 | 83 | ||
| @@ -218,4 +221,56 @@ static inline void s5pc100_default_sdhci1(void) { } | |||
| 218 | static inline void s5pc100_default_sdhci2(void) { } | 221 | static inline void s5pc100_default_sdhci2(void) { } |
| 219 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | 222 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ |
| 220 | 223 | ||
| 224 | |||
| 225 | /* S5PC110 SDHCI setup */ | ||
| 226 | #ifdef CONFIG_S5PV210_SETUP_SDHCI | ||
| 227 | extern char *s5pv210_hsmmc_clksrcs[4]; | ||
| 228 | |||
| 229 | extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, | ||
| 230 | void __iomem *r, | ||
| 231 | struct mmc_ios *ios, | ||
| 232 | struct mmc_card *card); | ||
| 233 | |||
| 234 | #ifdef CONFIG_S3C_DEV_HSMMC | ||
| 235 | static inline void s5pv210_default_sdhci0(void) | ||
| 236 | { | ||
| 237 | s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
| 238 | s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; | ||
| 239 | s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
| 240 | } | ||
| 241 | #else | ||
| 242 | static inline void s5pc100_default_sdhci0(void) { } | ||
| 243 | #endif /* CONFIG_S3C_DEV_HSMMC */ | ||
| 244 | |||
| 245 | #ifdef CONFIG_S3C_DEV_HSMMC1 | ||
| 246 | static inline void s5pv210_default_sdhci1(void) | ||
| 247 | { | ||
| 248 | s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
| 249 | s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; | ||
| 250 | s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
| 251 | } | ||
| 252 | #else | ||
| 253 | static inline void s5pv210_default_sdhci1(void) { } | ||
| 254 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | ||
| 255 | |||
| 256 | #ifdef CONFIG_S3C_DEV_HSMMC2 | ||
| 257 | static inline void s5pv210_default_sdhci2(void) | ||
| 258 | { | ||
| 259 | s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; | ||
| 260 | s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; | ||
| 261 | s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; | ||
| 262 | } | ||
| 263 | #else | ||
| 264 | static inline void s5pv210_default_sdhci2(void) { } | ||
| 265 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | ||
| 266 | |||
| 267 | #else | ||
| 268 | static inline void s5pv210_default_sdhci0(void) { } | ||
| 269 | static inline void s5pv210_default_sdhci1(void) { } | ||
| 270 | static inline void s5pv210_default_sdhci2(void) { } | ||
| 271 | #endif /* CONFIG_S5PC100_SETUP_SDHCI */ | ||
| 272 | |||
| 273 | |||
| 274 | |||
| 275 | |||
| 221 | #endif /* __PLAT_S3C_SDHCI_H */ | 276 | #endif /* __PLAT_S3C_SDHCI_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/wakeup-mask.h b/arch/arm/plat-samsung/include/plat/wakeup-mask.h new file mode 100644 index 000000000000..43e4acd2e1c6 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/wakeup-mask.h | |||
| @@ -0,0 +1,44 @@ | |||
| 1 | /* arch/arm/plat-samsung/include/plat/wakeup-mask.h | ||
| 2 | * | ||
| 3 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
| 4 | * | ||
| 5 | * Support for wakeup mask interrupts on newer SoCs | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef __PLAT_WAKEUP_MASK_H | ||
| 14 | #define __PLAT_WAKEUP_MASK_H __file__ | ||
| 15 | |||
| 16 | /* if no irq yet defined, but still want to mask */ | ||
| 17 | #define NO_WAKEUP_IRQ (0x90000000) | ||
| 18 | |||
| 19 | /** | ||
| 20 | * struct samsung_wakeup_mask - wakeup mask information | ||
| 21 | * @irq: The interrupt associated with this wakeup. | ||
| 22 | * @bit: The bit, as a (1 << bitno) controlling this source. | ||
| 23 | */ | ||
| 24 | struct samsung_wakeup_mask { | ||
| 25 | unsigned int irq; | ||
| 26 | u32 bit; | ||
| 27 | }; | ||
| 28 | |||
| 29 | /** | ||
| 30 | * samsung_sync_wakemask - sync wakeup mask information for pm | ||
| 31 | * @reg: The register that is used. | ||
| 32 | * @masks: The list of masks to use. | ||
| 33 | * @nr_masks: The number of entries pointed to buy @masks. | ||
| 34 | * | ||
| 35 | * Synchronise the wakeup mask information at suspend time from the list | ||
| 36 | * of interrupts and control bits in @masks. We do this at suspend time | ||
| 37 | * as overriding the relevant irq chips is harder and the register is only | ||
| 38 | * required to be correct before we enter sleep. | ||
| 39 | */ | ||
| 40 | extern void samsung_sync_wakemask(void __iomem *reg, | ||
| 41 | struct samsung_wakeup_mask *masks, | ||
| 42 | int nr_masks); | ||
| 43 | |||
| 44 | #endif /* __PLAT_WAKEUP_MASK_H */ | ||
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c index d50ab9d2af53..7df03f87fbfa 100644 --- a/arch/arm/plat-samsung/pm-gpio.c +++ b/arch/arm/plat-samsung/pm-gpio.c | |||
| @@ -331,8 +331,10 @@ void s3c_pm_save_gpios(void) | |||
| 331 | 331 | ||
| 332 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { | 332 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { |
| 333 | ourchip = s3c_gpiolib_getchip(gpio_nr); | 333 | ourchip = s3c_gpiolib_getchip(gpio_nr); |
| 334 | if (!ourchip) | 334 | if (!ourchip) { |
| 335 | gpio_nr++; | ||
| 335 | continue; | 336 | continue; |
| 337 | } | ||
| 336 | 338 | ||
| 337 | s3c_pm_save_gpio(ourchip); | 339 | s3c_pm_save_gpio(ourchip); |
| 338 | 340 | ||
| @@ -369,8 +371,10 @@ void s3c_pm_restore_gpios(void) | |||
| 369 | 371 | ||
| 370 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { | 372 | for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { |
| 371 | ourchip = s3c_gpiolib_getchip(gpio_nr); | 373 | ourchip = s3c_gpiolib_getchip(gpio_nr); |
| 372 | if (!ourchip) | 374 | if (!ourchip) { |
| 375 | gpio_nr++; | ||
| 373 | continue; | 376 | continue; |
| 377 | } | ||
| 374 | 378 | ||
| 375 | s3c_pm_resume_gpio(ourchip); | 379 | s3c_pm_resume_gpio(ourchip); |
| 376 | 380 | ||
diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/plat-samsung/wakeup-mask.c new file mode 100644 index 000000000000..2e09b6ad84ca --- /dev/null +++ b/arch/arm/plat-samsung/wakeup-mask.c | |||
| @@ -0,0 +1,47 @@ | |||
| 1 | /* arch/arm/plat-samsung/wakeup-mask.c | ||
| 2 | * | ||
| 3 | * Copyright 2010 Ben Dooks <ben-linux@fluff.org> | ||
| 4 | * | ||
| 5 | * Support for wakeup mask interrupts on newer SoCs | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/spinlock.h> | ||
| 14 | #include <linux/sysdev.h> | ||
| 15 | #include <linux/types.h> | ||
| 16 | #include <linux/irq.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | |||
| 19 | #include <plat/wakeup-mask.h> | ||
| 20 | #include <plat/pm.h> | ||
| 21 | |||
| 22 | void samsung_sync_wakemask(void __iomem *reg, | ||
| 23 | struct samsung_wakeup_mask *mask, int nr_mask) | ||
| 24 | { | ||
| 25 | struct irq_desc *desc; | ||
| 26 | u32 val; | ||
| 27 | |||
| 28 | val = __raw_readl(reg); | ||
| 29 | |||
| 30 | for (; nr_mask > 0; nr_mask--, mask++) { | ||
| 31 | if (mask->irq == NO_WAKEUP_IRQ) { | ||
| 32 | val |= mask->bit; | ||
| 33 | continue; | ||
| 34 | } | ||
| 35 | |||
| 36 | desc = irq_to_desc(mask->irq); | ||
| 37 | |||
| 38 | /* bit of a liberty to read this directly from irq_desc. */ | ||
| 39 | if (desc->wake_depth > 0) | ||
| 40 | val &= ~mask->bit; | ||
| 41 | else | ||
| 42 | val |= mask->bit; | ||
| 43 | } | ||
| 44 | |||
| 45 | printk(KERN_INFO "wakemask %08x => %08x\n", __raw_readl(reg), val); | ||
| 46 | __raw_writel(val, reg); | ||
| 47 | } | ||
diff --git a/arch/avr32/include/asm/scatterlist.h b/arch/avr32/include/asm/scatterlist.h index 377320e3bd17..06394e5ead6c 100644 --- a/arch/avr32/include/asm/scatterlist.h +++ b/arch/avr32/include/asm/scatterlist.h | |||
| @@ -1,25 +1,7 @@ | |||
| 1 | #ifndef __ASM_AVR32_SCATTERLIST_H | 1 | #ifndef __ASM_AVR32_SCATTERLIST_H |
| 2 | #define __ASM_AVR32_SCATTERLIST_H | 2 | #define __ASM_AVR32_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | dma_addr_t dma_address; | ||
| 13 | unsigned int length; | ||
| 14 | }; | ||
| 15 | |||
| 16 | /* These macros should be used after a pci_map_sg call has been done | ||
| 17 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 18 | * You should only work with the number of sg entries pci_map_sg | ||
| 19 | * returns. | ||
| 20 | */ | ||
| 21 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 22 | #define sg_dma_len(sg) ((sg)->length) | ||
| 23 | 5 | ||
| 24 | #define ISA_DMA_THRESHOLD (0xffffffff) | 6 | #define ISA_DMA_THRESHOLD (0xffffffff) |
| 25 | 7 | ||
diff --git a/arch/blackfin/include/asm/scatterlist.h b/arch/blackfin/include/asm/scatterlist.h index 04f448711cd0..64d41d34ab0b 100644 --- a/arch/blackfin/include/asm/scatterlist.h +++ b/arch/blackfin/include/asm/scatterlist.h | |||
| @@ -1,27 +1,7 @@ | |||
| 1 | #ifndef _BLACKFIN_SCATTERLIST_H | 1 | #ifndef _BLACKFIN_SCATTERLIST_H |
| 2 | #define _BLACKFIN_SCATTERLIST_H | 2 | #define _BLACKFIN_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <linux/mm.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | dma_addr_t dma_address; | ||
| 13 | unsigned int length; | ||
| 14 | }; | ||
| 15 | |||
| 16 | /* | ||
| 17 | * These macros should be used after a pci_map_sg call has been done | ||
| 18 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 19 | * You should only work with the number of sg entries pci_map_sg | ||
| 20 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 21 | * is 0. | ||
| 22 | */ | ||
| 23 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 24 | #define sg_dma_len(sg) ((sg)->length) | ||
| 25 | 5 | ||
| 26 | #define ISA_DMA_THRESHOLD (0xffffffff) | 6 | #define ISA_DMA_THRESHOLD (0xffffffff) |
| 27 | 7 | ||
diff --git a/arch/blackfin/kernel/ptrace.c b/arch/blackfin/kernel/ptrace.c index 43eb969405d1..6ec77685df52 100644 --- a/arch/blackfin/kernel/ptrace.c +++ b/arch/blackfin/kernel/ptrace.c | |||
| @@ -292,28 +292,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 292 | break; | 292 | break; |
| 293 | } | 293 | } |
| 294 | 294 | ||
| 295 | #ifdef CONFIG_BINFMT_ELF_FDPIC | ||
| 296 | case PTRACE_GETFDPIC: { | ||
| 297 | unsigned long tmp = 0; | ||
| 298 | |||
| 299 | switch (addr) { | ||
| 300 | case_PTRACE_GETFDPIC_EXEC: | ||
| 301 | case PTRACE_GETFDPIC_EXEC: | ||
| 302 | tmp = child->mm->context.exec_fdpic_loadmap; | ||
| 303 | break; | ||
| 304 | case_PTRACE_GETFDPIC_INTERP: | ||
| 305 | case PTRACE_GETFDPIC_INTERP: | ||
| 306 | tmp = child->mm->context.interp_fdpic_loadmap; | ||
| 307 | break; | ||
| 308 | default: | ||
| 309 | break; | ||
| 310 | } | ||
| 311 | |||
| 312 | ret = put_user(tmp, datap); | ||
| 313 | break; | ||
| 314 | } | ||
| 315 | #endif | ||
| 316 | |||
| 317 | /* when I and D space are separate, this will have to be fixed. */ | 295 | /* when I and D space are separate, this will have to be fixed. */ |
| 318 | case PTRACE_POKEDATA: | 296 | case PTRACE_POKEDATA: |
| 319 | pr_debug("ptrace: PTRACE_PEEKDATA\n"); | 297 | pr_debug("ptrace: PTRACE_PEEKDATA\n"); |
| @@ -357,8 +335,14 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 357 | case PTRACE_PEEKUSR: | 335 | case PTRACE_PEEKUSR: |
| 358 | switch (addr) { | 336 | switch (addr) { |
| 359 | #ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */ | 337 | #ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */ |
| 360 | case PT_FDPIC_EXEC: goto case_PTRACE_GETFDPIC_EXEC; | 338 | case PT_FDPIC_EXEC: |
| 361 | case PT_FDPIC_INTERP: goto case_PTRACE_GETFDPIC_INTERP; | 339 | request = PTRACE_GETFDPIC; |
| 340 | addr = PTRACE_GETFDPIC_EXEC; | ||
| 341 | goto case_default; | ||
| 342 | case PT_FDPIC_INTERP: | ||
| 343 | request = PTRACE_GETFDPIC; | ||
| 344 | addr = PTRACE_GETFDPIC_INTERP; | ||
| 345 | goto case_default; | ||
| 362 | #endif | 346 | #endif |
| 363 | default: | 347 | default: |
| 364 | ret = get_reg(child, addr, datap); | 348 | ret = get_reg(child, addr, datap); |
| @@ -385,6 +369,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 385 | 0, sizeof(struct pt_regs), | 369 | 0, sizeof(struct pt_regs), |
| 386 | (const void __user *)data); | 370 | (const void __user *)data); |
| 387 | 371 | ||
| 372 | case_default: | ||
| 388 | default: | 373 | default: |
| 389 | ret = ptrace_request(child, request, addr, data); | 374 | ret = ptrace_request(child, request, addr, data); |
| 390 | break; | 375 | break; |
diff --git a/arch/cris/include/asm/scatterlist.h b/arch/cris/include/asm/scatterlist.h index faff53ad1f96..249a7842ff5f 100644 --- a/arch/cris/include/asm/scatterlist.h +++ b/arch/cris/include/asm/scatterlist.h | |||
| @@ -1,22 +1,7 @@ | |||
| 1 | #ifndef __ASM_CRIS_SCATTERLIST_H | 1 | #ifndef __ASM_CRIS_SCATTERLIST_H |
| 2 | #define __ASM_CRIS_SCATTERLIST_H | 2 | #define __ASM_CRIS_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | struct scatterlist { | 4 | #include <asm-generic/scatterlist.h> |
| 5 | #ifdef CONFIG_DEBUG_SG | ||
| 6 | unsigned long sg_magic; | ||
| 7 | #endif | ||
| 8 | char * address; /* Location data is to be transferred to */ | ||
| 9 | unsigned int length; | ||
| 10 | |||
| 11 | /* The following is i386 highmem junk - not used by us */ | ||
| 12 | unsigned long page_link; | ||
| 13 | unsigned int offset;/* for highmem, page offset */ | ||
| 14 | |||
| 15 | }; | ||
| 16 | |||
| 17 | #define sg_dma_address(sg) ((sg)->address) | ||
| 18 | #define sg_dma_len(sg) ((sg)->length) | ||
| 19 | /* i386 junk */ | ||
| 20 | 5 | ||
| 21 | #define ISA_DMA_THRESHOLD (0x1fffffff) | 6 | #define ISA_DMA_THRESHOLD (0x1fffffff) |
| 22 | 7 | ||
diff --git a/arch/frv/include/asm/gdb-stub.h b/arch/frv/include/asm/gdb-stub.h index 2da716407ff2..e6bedd0cd9a5 100644 --- a/arch/frv/include/asm/gdb-stub.h +++ b/arch/frv/include/asm/gdb-stub.h | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #ifndef __ASM_GDB_STUB_H | 12 | #ifndef __ASM_GDB_STUB_H |
| 13 | #define __ASM_GDB_STUB_H | 13 | #define __ASM_GDB_STUB_H |
| 14 | 14 | ||
| 15 | #undef GDBSTUB_DEBUG_IO | ||
| 15 | #undef GDBSTUB_DEBUG_PROTOCOL | 16 | #undef GDBSTUB_DEBUG_PROTOCOL |
| 16 | 17 | ||
| 17 | #include <asm/ptrace.h> | 18 | #include <asm/ptrace.h> |
| @@ -108,6 +109,12 @@ extern void gdbstub_printk(const char *fmt, ...); | |||
| 108 | extern void debug_to_serial(const char *p, int n); | 109 | extern void debug_to_serial(const char *p, int n); |
| 109 | extern void console_set_baud(unsigned baud); | 110 | extern void console_set_baud(unsigned baud); |
| 110 | 111 | ||
| 112 | #ifdef GDBSTUB_DEBUG_IO | ||
| 113 | #define gdbstub_io(FMT,...) gdbstub_printk(FMT, ##__VA_ARGS__) | ||
| 114 | #else | ||
| 115 | #define gdbstub_io(FMT,...) ({ 0; }) | ||
| 116 | #endif | ||
| 117 | |||
| 111 | #ifdef GDBSTUB_DEBUG_PROTOCOL | 118 | #ifdef GDBSTUB_DEBUG_PROTOCOL |
| 112 | #define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__) | 119 | #define gdbstub_proto(FMT,...) gdbstub_printk(FMT,##__VA_ARGS__) |
| 113 | #else | 120 | #else |
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h index 2947764fc0e0..ccae981876fa 100644 --- a/arch/frv/include/asm/mem-layout.h +++ b/arch/frv/include/asm/mem-layout.h | |||
| @@ -35,8 +35,8 @@ | |||
| 35 | * the slab must be aligned such that load- and store-double instructions don't | 35 | * the slab must be aligned such that load- and store-double instructions don't |
| 36 | * fault if used | 36 | * fault if used |
| 37 | */ | 37 | */ |
| 38 | #define ARCH_KMALLOC_MINALIGN 8 | 38 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES |
| 39 | #define ARCH_SLAB_MINALIGN 8 | 39 | #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES |
| 40 | 40 | ||
| 41 | /*****************************************************************************/ | 41 | /*****************************************************************************/ |
| 42 | /* | 42 | /* |
diff --git a/arch/frv/include/asm/scatterlist.h b/arch/frv/include/asm/scatterlist.h index 4bca8a28546c..1614bfd7e3a4 100644 --- a/arch/frv/include/asm/scatterlist.h +++ b/arch/frv/include/asm/scatterlist.h | |||
| @@ -1,45 +1,7 @@ | |||
| 1 | #ifndef _ASM_SCATTERLIST_H | 1 | #ifndef _ASM_SCATTERLIST_H |
| 2 | #define _ASM_SCATTERLIST_H | 2 | #define _ASM_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | /* | ||
| 7 | * Drivers must set either ->address or (preferred) page and ->offset | ||
| 8 | * to indicate where data must be transferred to/from. | ||
| 9 | * | ||
| 10 | * Using page is recommended since it handles highmem data as well as | ||
| 11 | * low mem. ->address is restricted to data which has a virtual mapping, and | ||
| 12 | * it will go away in the future. Updating to page can be automated very | ||
| 13 | * easily -- something like | ||
| 14 | * | ||
| 15 | * sg->address = some_ptr; | ||
| 16 | * | ||
| 17 | * can be rewritten as | ||
| 18 | * | ||
| 19 | * sg_set_buf(sg, some_ptr, length); | ||
| 20 | * | ||
| 21 | * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens | ||
| 22 | */ | ||
| 23 | struct scatterlist { | ||
| 24 | #ifdef CONFIG_DEBUG_SG | ||
| 25 | unsigned long sg_magic; | ||
| 26 | #endif | ||
| 27 | unsigned long page_link; | ||
| 28 | unsigned int offset; /* for highmem, page offset */ | ||
| 29 | |||
| 30 | dma_addr_t dma_address; | ||
| 31 | unsigned int length; | ||
| 32 | }; | ||
| 33 | |||
| 34 | /* | ||
| 35 | * These macros should be used after a pci_map_sg call has been done | ||
| 36 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 37 | * You should only work with the number of sg entries pci_map_sg | ||
| 38 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 39 | * is 0. | ||
| 40 | */ | ||
| 41 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 42 | #define sg_dma_len(sg) ((sg)->length) | ||
| 43 | 5 | ||
| 44 | #define ISA_DMA_THRESHOLD (0xffffffffUL) | 6 | #define ISA_DMA_THRESHOLD (0xffffffffUL) |
| 45 | 7 | ||
diff --git a/arch/frv/kernel/gdb-io.c b/arch/frv/kernel/gdb-io.c index c997bccb9221..2ca641d199f8 100644 --- a/arch/frv/kernel/gdb-io.c +++ b/arch/frv/kernel/gdb-io.c | |||
| @@ -171,11 +171,11 @@ int gdbstub_rx_char(unsigned char *_ch, int nonblock) | |||
| 171 | return -EINTR; | 171 | return -EINTR; |
| 172 | } | 172 | } |
| 173 | else if (st & (UART_LSR_FE|UART_LSR_OE|UART_LSR_PE)) { | 173 | else if (st & (UART_LSR_FE|UART_LSR_OE|UART_LSR_PE)) { |
| 174 | gdbstub_proto("### GDB Rx Error (st=%02x) ###\n",st); | 174 | gdbstub_io("### GDB Rx Error (st=%02x) ###\n",st); |
| 175 | return -EIO; | 175 | return -EIO; |
| 176 | } | 176 | } |
| 177 | else { | 177 | else { |
| 178 | gdbstub_proto("### GDB Rx %02x (st=%02x) ###\n",ch,st); | 178 | gdbstub_io("### GDB Rx %02x (st=%02x) ###\n",ch,st); |
| 179 | *_ch = ch & 0x7f; | 179 | *_ch = ch & 0x7f; |
| 180 | return 0; | 180 | return 0; |
| 181 | } | 181 | } |
diff --git a/arch/frv/kernel/gdb-stub.c b/arch/frv/kernel/gdb-stub.c index 7ca8a6b19ac9..84d103c33c9c 100644 --- a/arch/frv/kernel/gdb-stub.c +++ b/arch/frv/kernel/gdb-stub.c | |||
| @@ -1344,6 +1344,44 @@ void gdbstub_get_mmu_state(void) | |||
| 1344 | 1344 | ||
| 1345 | } /* end gdbstub_get_mmu_state() */ | 1345 | } /* end gdbstub_get_mmu_state() */ |
| 1346 | 1346 | ||
| 1347 | /* | ||
| 1348 | * handle general query commands of the form 'qXXXXX' | ||
| 1349 | */ | ||
| 1350 | static void gdbstub_handle_query(void) | ||
| 1351 | { | ||
| 1352 | if (strcmp(input_buffer, "qAttached") == 0) { | ||
| 1353 | /* return current thread ID */ | ||
| 1354 | sprintf(output_buffer, "1"); | ||
| 1355 | return; | ||
| 1356 | } | ||
| 1357 | |||
| 1358 | if (strcmp(input_buffer, "qC") == 0) { | ||
| 1359 | /* return current thread ID */ | ||
| 1360 | sprintf(output_buffer, "QC 0"); | ||
| 1361 | return; | ||
| 1362 | } | ||
| 1363 | |||
| 1364 | if (strcmp(input_buffer, "qOffsets") == 0) { | ||
| 1365 | /* return relocation offset of text and data segments */ | ||
| 1366 | sprintf(output_buffer, "Text=0;Data=0;Bss=0"); | ||
| 1367 | return; | ||
| 1368 | } | ||
| 1369 | |||
| 1370 | if (strcmp(input_buffer, "qSymbol::") == 0) { | ||
| 1371 | sprintf(output_buffer, "OK"); | ||
| 1372 | return; | ||
| 1373 | } | ||
| 1374 | |||
| 1375 | if (strcmp(input_buffer, "qSupported") == 0) { | ||
| 1376 | /* query of supported features */ | ||
| 1377 | sprintf(output_buffer, "PacketSize=%u;ReverseContinue-;ReverseStep-", | ||
| 1378 | sizeof(input_buffer)); | ||
| 1379 | return; | ||
| 1380 | } | ||
| 1381 | |||
| 1382 | gdbstub_strcpy(output_buffer,"E01"); | ||
| 1383 | } | ||
| 1384 | |||
| 1347 | /*****************************************************************************/ | 1385 | /*****************************************************************************/ |
| 1348 | /* | 1386 | /* |
| 1349 | * handle event interception and GDB remote protocol processing | 1387 | * handle event interception and GDB remote protocol processing |
| @@ -1840,6 +1878,10 @@ void gdbstub(int sigval) | |||
| 1840 | case 'k' : | 1878 | case 'k' : |
| 1841 | goto done; /* just continue */ | 1879 | goto done; /* just continue */ |
| 1842 | 1880 | ||
| 1881 | /* detach */ | ||
| 1882 | case 'D': | ||
| 1883 | gdbstub_strcpy(output_buffer, "OK"); | ||
| 1884 | break; | ||
| 1843 | 1885 | ||
| 1844 | /* reset the whole machine (FIXME: system dependent) */ | 1886 | /* reset the whole machine (FIXME: system dependent) */ |
| 1845 | case 'r': | 1887 | case 'r': |
| @@ -1852,6 +1894,14 @@ void gdbstub(int sigval) | |||
| 1852 | __debug_status.dcr |= DCR_SE; | 1894 | __debug_status.dcr |= DCR_SE; |
| 1853 | goto done; | 1895 | goto done; |
| 1854 | 1896 | ||
| 1897 | /* extended command */ | ||
| 1898 | case 'v': | ||
| 1899 | if (strcmp(input_buffer, "vCont?") == 0) { | ||
| 1900 | output_buffer[0] = 0; | ||
| 1901 | break; | ||
| 1902 | } | ||
| 1903 | goto unsupported_cmd; | ||
| 1904 | |||
| 1855 | /* set baud rate (bBB) */ | 1905 | /* set baud rate (bBB) */ |
| 1856 | case 'b': | 1906 | case 'b': |
| 1857 | ptr = &input_buffer[1]; | 1907 | ptr = &input_buffer[1]; |
| @@ -1923,8 +1973,19 @@ void gdbstub(int sigval) | |||
| 1923 | gdbstub_strcpy(output_buffer,"OK"); | 1973 | gdbstub_strcpy(output_buffer,"OK"); |
| 1924 | break; | 1974 | break; |
| 1925 | 1975 | ||
| 1976 | /* Thread-setting packet */ | ||
| 1977 | case 'H': | ||
| 1978 | gdbstub_strcpy(output_buffer, "OK"); | ||
| 1979 | break; | ||
| 1980 | |||
| 1981 | case 'q': | ||
| 1982 | gdbstub_handle_query(); | ||
| 1983 | break; | ||
| 1984 | |||
| 1926 | default: | 1985 | default: |
| 1986 | unsupported_cmd: | ||
| 1927 | gdbstub_proto("### GDB Unsupported Cmd '%s'\n",input_buffer); | 1987 | gdbstub_proto("### GDB Unsupported Cmd '%s'\n",input_buffer); |
| 1988 | gdbstub_strcpy(output_buffer,"E01"); | ||
| 1928 | break; | 1989 | break; |
| 1929 | } | 1990 | } |
| 1930 | 1991 | ||
diff --git a/arch/frv/kernel/ptrace.c b/arch/frv/kernel/ptrace.c index 60eeed3694c0..fac028936a04 100644 --- a/arch/frv/kernel/ptrace.c +++ b/arch/frv/kernel/ptrace.c | |||
| @@ -344,26 +344,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 344 | 0, sizeof(child->thread.user->f), | 344 | 0, sizeof(child->thread.user->f), |
| 345 | (const void __user *)data); | 345 | (const void __user *)data); |
| 346 | 346 | ||
| 347 | case PTRACE_GETFDPIC: | ||
| 348 | tmp = 0; | ||
| 349 | switch (addr) { | ||
| 350 | case PTRACE_GETFDPIC_EXEC: | ||
| 351 | tmp = child->mm->context.exec_fdpic_loadmap; | ||
| 352 | break; | ||
| 353 | case PTRACE_GETFDPIC_INTERP: | ||
| 354 | tmp = child->mm->context.interp_fdpic_loadmap; | ||
| 355 | break; | ||
| 356 | default: | ||
| 357 | break; | ||
| 358 | } | ||
| 359 | |||
| 360 | ret = 0; | ||
| 361 | if (put_user(tmp, (unsigned long *) data)) { | ||
| 362 | ret = -EFAULT; | ||
| 363 | break; | ||
| 364 | } | ||
| 365 | break; | ||
| 366 | |||
| 367 | default: | 347 | default: |
| 368 | ret = ptrace_request(child, request, addr, data); | 348 | ret = ptrace_request(child, request, addr, data); |
| 369 | break; | 349 | break; |
diff --git a/arch/frv/kernel/sysctl.c b/arch/frv/kernel/sysctl.c index 71abd1510a59..6c155d69da29 100644 --- a/arch/frv/kernel/sysctl.c +++ b/arch/frv/kernel/sysctl.c | |||
| @@ -46,8 +46,9 @@ static void frv_change_dcache_mode(unsigned long newmode) | |||
| 46 | /* | 46 | /* |
| 47 | * handle requests to dynamically switch the write caching mode delivered by /proc | 47 | * handle requests to dynamically switch the write caching mode delivered by /proc |
| 48 | */ | 48 | */ |
| 49 | static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, | 49 | static int procctl_frv_cachemode(ctl_table *table, int write, |
| 50 | void __user *buffer, size_t *lenp, loff_t *ppos) | 50 | void __user *buffer, size_t *lenp, |
| 51 | loff_t *ppos) | ||
| 51 | { | 52 | { |
| 52 | unsigned long hsr0; | 53 | unsigned long hsr0; |
| 53 | char buff[8]; | 54 | char buff[8]; |
| @@ -84,7 +85,7 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, | |||
| 84 | } | 85 | } |
| 85 | 86 | ||
| 86 | /* read the state */ | 87 | /* read the state */ |
| 87 | if (filp->f_pos > 0) { | 88 | if (*ppos > 0) { |
| 88 | *lenp = 0; | 89 | *lenp = 0; |
| 89 | return 0; | 90 | return 0; |
| 90 | } | 91 | } |
| @@ -110,7 +111,7 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, | |||
| 110 | return -EFAULT; | 111 | return -EFAULT; |
| 111 | 112 | ||
| 112 | *lenp = len; | 113 | *lenp = len; |
| 113 | filp->f_pos = len; | 114 | *ppos = len; |
| 114 | return 0; | 115 | return 0; |
| 115 | 116 | ||
| 116 | } /* end procctl_frv_cachemode() */ | 117 | } /* end procctl_frv_cachemode() */ |
| @@ -120,8 +121,9 @@ static int procctl_frv_cachemode(ctl_table *table, int write, struct file *filp, | |||
| 120 | * permit the mm_struct the nominated process is using have its MMU context ID pinned | 121 | * permit the mm_struct the nominated process is using have its MMU context ID pinned |
| 121 | */ | 122 | */ |
| 122 | #ifdef CONFIG_MMU | 123 | #ifdef CONFIG_MMU |
| 123 | static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp, | 124 | static int procctl_frv_pin_cxnr(ctl_table *table, int write, |
| 124 | void __user *buffer, size_t *lenp, loff_t *ppos) | 125 | void __user *buffer, size_t *lenp, |
| 126 | loff_t *ppos) | ||
| 125 | { | 127 | { |
| 126 | pid_t pid; | 128 | pid_t pid; |
| 127 | char buff[16], *p; | 129 | char buff[16], *p; |
| @@ -150,7 +152,7 @@ static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp, | |||
| 150 | } | 152 | } |
| 151 | 153 | ||
| 152 | /* read the currently pinned CXN */ | 154 | /* read the currently pinned CXN */ |
| 153 | if (filp->f_pos > 0) { | 155 | if (*ppos > 0) { |
| 154 | *lenp = 0; | 156 | *lenp = 0; |
| 155 | return 0; | 157 | return 0; |
| 156 | } | 158 | } |
| @@ -163,7 +165,7 @@ static int procctl_frv_pin_cxnr(ctl_table *table, int write, struct file *filp, | |||
| 163 | return -EFAULT; | 165 | return -EFAULT; |
| 164 | 166 | ||
| 165 | *lenp = len; | 167 | *lenp = len; |
| 166 | filp->f_pos = len; | 168 | *ppos = len; |
| 167 | return 0; | 169 | return 0; |
| 168 | 170 | ||
| 169 | } /* end procctl_frv_pin_cxnr() */ | 171 | } /* end procctl_frv_pin_cxnr() */ |
diff --git a/arch/h8300/include/asm/scatterlist.h b/arch/h8300/include/asm/scatterlist.h index d3ecdd87ac90..de08a4a2cc1c 100644 --- a/arch/h8300/include/asm/scatterlist.h +++ b/arch/h8300/include/asm/scatterlist.h | |||
| @@ -1,17 +1,7 @@ | |||
| 1 | #ifndef _H8300_SCATTERLIST_H | 1 | #ifndef _H8300_SCATTERLIST_H |
| 2 | #define _H8300_SCATTERLIST_H | 2 | #define _H8300_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | dma_addr_t dma_address; | ||
| 13 | unsigned int length; | ||
| 14 | }; | ||
| 15 | 5 | ||
| 16 | #define ISA_DMA_THRESHOLD (0xffffffff) | 6 | #define ISA_DMA_THRESHOLD (0xffffffff) |
| 17 | 7 | ||
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 9676100b83ee..95610820041e 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
| @@ -56,6 +56,9 @@ config MMU | |||
| 56 | config NEED_DMA_MAP_STATE | 56 | config NEED_DMA_MAP_STATE |
| 57 | def_bool y | 57 | def_bool y |
| 58 | 58 | ||
| 59 | config NEED_SG_DMA_LENGTH | ||
| 60 | def_bool y | ||
| 61 | |||
| 59 | config SWIOTLB | 62 | config SWIOTLB |
| 60 | bool | 63 | bool |
| 61 | 64 | ||
| @@ -495,6 +498,14 @@ config HAVE_ARCH_NODEDATA_EXTENSION | |||
| 495 | def_bool y | 498 | def_bool y |
| 496 | depends on NUMA | 499 | depends on NUMA |
| 497 | 500 | ||
| 501 | config USE_PERCPU_NUMA_NODE_ID | ||
| 502 | def_bool y | ||
| 503 | depends on NUMA | ||
| 504 | |||
| 505 | config HAVE_MEMORYLESS_NODES | ||
| 506 | def_bool y | ||
| 507 | depends on NUMA | ||
| 508 | |||
| 498 | config ARCH_PROC_KCORE_TEXT | 509 | config ARCH_PROC_KCORE_TEXT |
| 499 | def_bool y | 510 | def_bool y |
| 500 | depends on PROC_KCORE | 511 | depends on PROC_KCORE |
diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h index 21adbd7f90f8..837dc82a013e 100644 --- a/arch/ia64/include/asm/acpi.h +++ b/arch/ia64/include/asm/acpi.h | |||
| @@ -94,7 +94,6 @@ ia64_acpi_release_global_lock (unsigned int *lock) | |||
| 94 | #define acpi_noirq 0 /* ACPI always enabled on IA64 */ | 94 | #define acpi_noirq 0 /* ACPI always enabled on IA64 */ |
| 95 | #define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */ | 95 | #define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */ |
| 96 | #define acpi_strict 1 /* no ACPI spec workarounds on IA64 */ | 96 | #define acpi_strict 1 /* no ACPI spec workarounds on IA64 */ |
| 97 | #define acpi_ht 0 /* no HT-only mode on IA64 */ | ||
| 98 | #endif | 97 | #endif |
| 99 | #define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ | 98 | #define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ |
| 100 | static inline void disable_acpi(void) { } | 99 | static inline void disable_acpi(void) { } |
diff --git a/arch/ia64/include/asm/scatterlist.h b/arch/ia64/include/asm/scatterlist.h index d8e98961dec7..f299a4fb25c8 100644 --- a/arch/ia64/include/asm/scatterlist.h +++ b/arch/ia64/include/asm/scatterlist.h | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | #ifndef _ASM_IA64_SCATTERLIST_H | 1 | #ifndef _ASM_IA64_SCATTERLIST_H |
| 2 | #define _ASM_IA64_SCATTERLIST_H | 2 | #define _ASM_IA64_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm-generic/scatterlist.h> | ||
| 4 | /* | 5 | /* |
| 5 | * It used to be that ISA_DMA_THRESHOLD had something to do with the | 6 | * It used to be that ISA_DMA_THRESHOLD had something to do with the |
| 6 | * DMA-limits of ISA-devices. Nowadays, its only remaining use (apart | 7 | * DMA-limits of ISA-devices. Nowadays, its only remaining use (apart |
| @@ -10,7 +11,6 @@ | |||
| 10 | * that's 4GB - 1. | 11 | * that's 4GB - 1. |
| 11 | */ | 12 | */ |
| 12 | #define ISA_DMA_THRESHOLD 0xffffffff | 13 | #define ISA_DMA_THRESHOLD 0xffffffff |
| 13 | 14 | #define ARCH_HAS_SG_CHAIN | |
| 14 | #include <asm-generic/scatterlist.h> | ||
| 15 | 15 | ||
| 16 | #endif /* _ASM_IA64_SCATTERLIST_H */ | 16 | #endif /* _ASM_IA64_SCATTERLIST_H */ |
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h index d323071d0f91..09f646753d1a 100644 --- a/arch/ia64/include/asm/topology.h +++ b/arch/ia64/include/asm/topology.h | |||
| @@ -26,11 +26,6 @@ | |||
| 26 | #define RECLAIM_DISTANCE 15 | 26 | #define RECLAIM_DISTANCE 15 |
| 27 | 27 | ||
| 28 | /* | 28 | /* |
| 29 | * Returns the number of the node containing CPU 'cpu' | ||
| 30 | */ | ||
| 31 | #define cpu_to_node(cpu) (int)(cpu_to_node_map[cpu]) | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Returns a bitmask of CPUs on Node 'node'. | 29 | * Returns a bitmask of CPUs on Node 'node'. |
| 35 | */ | 30 | */ |
| 36 | #define cpumask_of_node(node) ((node) == -1 ? \ | 31 | #define cpumask_of_node(node) ((node) == -1 ? \ |
diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c index 3095654f9ab3..d9485d952ed0 100644 --- a/arch/ia64/kernel/pci-swiotlb.c +++ b/arch/ia64/kernel/pci-swiotlb.c | |||
| @@ -31,8 +31,6 @@ struct dma_map_ops swiotlb_dma_ops = { | |||
| 31 | .unmap_sg = swiotlb_unmap_sg_attrs, | 31 | .unmap_sg = swiotlb_unmap_sg_attrs, |
| 32 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, | 32 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, |
| 33 | .sync_single_for_device = swiotlb_sync_single_for_device, | 33 | .sync_single_for_device = swiotlb_sync_single_for_device, |
| 34 | .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, | ||
| 35 | .sync_single_range_for_device = swiotlb_sync_single_range_for_device, | ||
| 36 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, | 34 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, |
| 37 | .sync_sg_for_device = swiotlb_sync_sg_for_device, | 35 | .sync_sg_for_device = swiotlb_sync_sg_for_device, |
| 38 | .dma_supported = swiotlb_dma_supported, | 36 | .dma_supported = swiotlb_dma_supported, |
diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c index 0dec7f702448..7c7909f9bc93 100644 --- a/arch/ia64/kernel/ptrace.c +++ b/arch/ia64/kernel/ptrace.c | |||
| @@ -638,7 +638,7 @@ ptrace_attach_sync_user_rbs (struct task_struct *child) | |||
| 638 | */ | 638 | */ |
| 639 | 639 | ||
| 640 | read_lock(&tasklist_lock); | 640 | read_lock(&tasklist_lock); |
| 641 | if (child->signal) { | 641 | if (child->sighand) { |
| 642 | spin_lock_irq(&child->sighand->siglock); | 642 | spin_lock_irq(&child->sighand->siglock); |
| 643 | if (child->state == TASK_STOPPED && | 643 | if (child->state == TASK_STOPPED && |
| 644 | !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) { | 644 | !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) { |
| @@ -662,7 +662,7 @@ ptrace_attach_sync_user_rbs (struct task_struct *child) | |||
| 662 | * job control stop, so that SIGCONT can be used to wake it up. | 662 | * job control stop, so that SIGCONT can be used to wake it up. |
| 663 | */ | 663 | */ |
| 664 | read_lock(&tasklist_lock); | 664 | read_lock(&tasklist_lock); |
| 665 | if (child->signal) { | 665 | if (child->sighand) { |
| 666 | spin_lock_irq(&child->sighand->siglock); | 666 | spin_lock_irq(&child->sighand->siglock); |
| 667 | if (child->state == TASK_TRACED && | 667 | if (child->state == TASK_TRACED && |
| 668 | (child->signal->flags & SIGNAL_STOP_STOPPED)) { | 668 | (child->signal->flags & SIGNAL_STOP_STOPPED)) { |
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c index e5230b2ff2c5..6a1380e90f87 100644 --- a/arch/ia64/kernel/smpboot.c +++ b/arch/ia64/kernel/smpboot.c | |||
| @@ -390,6 +390,14 @@ smp_callin (void) | |||
| 390 | 390 | ||
| 391 | fix_b0_for_bsp(); | 391 | fix_b0_for_bsp(); |
| 392 | 392 | ||
| 393 | #ifdef CONFIG_NUMA | ||
| 394 | /* | ||
| 395 | * numa_node_id() works after this. | ||
| 396 | */ | ||
| 397 | set_numa_node(cpu_to_node_map[cpuid]); | ||
| 398 | set_numa_mem(local_memory_node(cpu_to_node_map[cpuid])); | ||
| 399 | #endif | ||
| 400 | |||
| 393 | ipi_call_lock_irq(); | 401 | ipi_call_lock_irq(); |
| 394 | spin_lock(&vector_lock); | 402 | spin_lock(&vector_lock); |
| 395 | /* Setup the per cpu irq handling data structures */ | 403 | /* Setup the per cpu irq handling data structures */ |
| @@ -632,6 +640,9 @@ void __devinit smp_prepare_boot_cpu(void) | |||
| 632 | { | 640 | { |
| 633 | cpu_set(smp_processor_id(), cpu_online_map); | 641 | cpu_set(smp_processor_id(), cpu_online_map); |
| 634 | cpu_set(smp_processor_id(), cpu_callin_map); | 642 | cpu_set(smp_processor_id(), cpu_callin_map); |
| 643 | #ifdef CONFIG_NUMA | ||
| 644 | set_numa_node(cpu_to_node_map[smp_processor_id()]); | ||
| 645 | #endif | ||
| 635 | per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; | 646 | per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; |
| 636 | paravirt_post_smp_prepare_boot_cpu(); | 647 | paravirt_post_smp_prepare_boot_cpu(); |
| 637 | } | 648 | } |
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 64aff520b899..aa2533ae7e9e 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
| @@ -335,8 +335,11 @@ pcibios_setup_root_windows(struct pci_bus *bus, struct pci_controller *ctrl) | |||
| 335 | } | 335 | } |
| 336 | 336 | ||
| 337 | struct pci_bus * __devinit | 337 | struct pci_bus * __devinit |
| 338 | pci_acpi_scan_root(struct acpi_device *device, int domain, int bus) | 338 | pci_acpi_scan_root(struct acpi_pci_root *root) |
| 339 | { | 339 | { |
| 340 | struct acpi_device *device = root->device; | ||
| 341 | int domain = root->segment; | ||
| 342 | int bus = root->secondary.start; | ||
| 340 | struct pci_controller *controller; | 343 | struct pci_controller *controller; |
| 341 | unsigned int windows = 0; | 344 | unsigned int windows = 0; |
| 342 | struct pci_bus *pbus; | 345 | struct pci_bus *pbus; |
diff --git a/arch/m32r/include/asm/scatterlist.h b/arch/m32r/include/asm/scatterlist.h index 1ed372c73d0b..aeeddd8dac17 100644 --- a/arch/m32r/include/asm/scatterlist.h +++ b/arch/m32r/include/asm/scatterlist.h | |||
| @@ -1,20 +1,7 @@ | |||
| 1 | #ifndef _ASM_M32R_SCATTERLIST_H | 1 | #ifndef _ASM_M32R_SCATTERLIST_H |
| 2 | #define _ASM_M32R_SCATTERLIST_H | 2 | #define _ASM_M32R_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | char * address; /* Location data is to be transferred to, NULL for | ||
| 11 | * highmem page */ | ||
| 12 | unsigned long page_link; | ||
| 13 | unsigned int offset;/* for highmem, page offset */ | ||
| 14 | |||
| 15 | dma_addr_t dma_address; | ||
| 16 | unsigned int length; | ||
| 17 | }; | ||
| 18 | 5 | ||
| 19 | #define ISA_DMA_THRESHOLD (0x1fffffff) | 6 | #define ISA_DMA_THRESHOLD (0x1fffffff) |
| 20 | 7 | ||
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index b5da298ba61d..2e3737b92ffc 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig | |||
| @@ -7,6 +7,7 @@ config M68K | |||
| 7 | default y | 7 | default y |
| 8 | select HAVE_AOUT | 8 | select HAVE_AOUT |
| 9 | select HAVE_IDE | 9 | select HAVE_IDE |
| 10 | select GENERIC_ATOMIC64 | ||
| 10 | 11 | ||
| 11 | config MMU | 12 | config MMU |
| 12 | bool | 13 | bool |
diff --git a/arch/m68k/amiga/config.c b/arch/m68k/amiga/config.c index d2cc35d98532..b1577f741fa8 100644 --- a/arch/m68k/amiga/config.c +++ b/arch/m68k/amiga/config.c | |||
| @@ -97,10 +97,6 @@ static void amiga_get_model(char *model); | |||
| 97 | static void amiga_get_hardware_list(struct seq_file *m); | 97 | static void amiga_get_hardware_list(struct seq_file *m); |
| 98 | /* amiga specific timer functions */ | 98 | /* amiga specific timer functions */ |
| 99 | static unsigned long amiga_gettimeoffset(void); | 99 | static unsigned long amiga_gettimeoffset(void); |
| 100 | static int a3000_hwclk(int, struct rtc_time *); | ||
| 101 | static int a2000_hwclk(int, struct rtc_time *); | ||
| 102 | static int amiga_set_clock_mmss(unsigned long); | ||
| 103 | static unsigned int amiga_get_ss(void); | ||
| 104 | extern void amiga_mksound(unsigned int count, unsigned int ticks); | 100 | extern void amiga_mksound(unsigned int count, unsigned int ticks); |
| 105 | static void amiga_reset(void); | 101 | static void amiga_reset(void); |
| 106 | extern void amiga_init_sound(void); | 102 | extern void amiga_init_sound(void); |
| @@ -138,10 +134,6 @@ static struct { | |||
| 138 | } | 134 | } |
| 139 | }; | 135 | }; |
| 140 | 136 | ||
| 141 | static struct resource rtc_resource = { | ||
| 142 | .start = 0x00dc0000, .end = 0x00dcffff | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct resource ram_resource[NUM_MEMINFO]; | 137 | static struct resource ram_resource[NUM_MEMINFO]; |
| 146 | 138 | ||
| 147 | 139 | ||
| @@ -387,15 +379,6 @@ void __init config_amiga(void) | |||
| 387 | mach_get_model = amiga_get_model; | 379 | mach_get_model = amiga_get_model; |
| 388 | mach_get_hardware_list = amiga_get_hardware_list; | 380 | mach_get_hardware_list = amiga_get_hardware_list; |
| 389 | mach_gettimeoffset = amiga_gettimeoffset; | 381 | mach_gettimeoffset = amiga_gettimeoffset; |
| 390 | if (AMIGAHW_PRESENT(A3000_CLK)) { | ||
| 391 | mach_hwclk = a3000_hwclk; | ||
| 392 | rtc_resource.name = "A3000 RTC"; | ||
| 393 | request_resource(&iomem_resource, &rtc_resource); | ||
| 394 | } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ { | ||
| 395 | mach_hwclk = a2000_hwclk; | ||
| 396 | rtc_resource.name = "A2000 RTC"; | ||
| 397 | request_resource(&iomem_resource, &rtc_resource); | ||
| 398 | } | ||
| 399 | 382 | ||
| 400 | /* | 383 | /* |
| 401 | * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI | 384 | * default MAX_DMA=0xffffffff on all machines. If we don't do so, the SCSI |
| @@ -404,8 +387,6 @@ void __init config_amiga(void) | |||
| 404 | */ | 387 | */ |
| 405 | mach_max_dma_address = 0xffffffff; | 388 | mach_max_dma_address = 0xffffffff; |
| 406 | 389 | ||
| 407 | mach_set_clock_mmss = amiga_set_clock_mmss; | ||
| 408 | mach_get_ss = amiga_get_ss; | ||
| 409 | mach_reset = amiga_reset; | 390 | mach_reset = amiga_reset; |
| 410 | #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE) | 391 | #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE) |
| 411 | mach_beep = amiga_mksound; | 392 | mach_beep = amiga_mksound; |
| @@ -530,161 +511,6 @@ static unsigned long amiga_gettimeoffset(void) | |||
| 530 | return ticks + offset; | 511 | return ticks + offset; |
| 531 | } | 512 | } |
| 532 | 513 | ||
| 533 | static int a3000_hwclk(int op, struct rtc_time *t) | ||
| 534 | { | ||
| 535 | tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD; | ||
| 536 | |||
| 537 | if (!op) { /* read */ | ||
| 538 | t->tm_sec = tod_3000.second1 * 10 + tod_3000.second2; | ||
| 539 | t->tm_min = tod_3000.minute1 * 10 + tod_3000.minute2; | ||
| 540 | t->tm_hour = tod_3000.hour1 * 10 + tod_3000.hour2; | ||
| 541 | t->tm_mday = tod_3000.day1 * 10 + tod_3000.day2; | ||
| 542 | t->tm_wday = tod_3000.weekday; | ||
| 543 | t->tm_mon = tod_3000.month1 * 10 + tod_3000.month2 - 1; | ||
| 544 | t->tm_year = tod_3000.year1 * 10 + tod_3000.year2; | ||
| 545 | if (t->tm_year <= 69) | ||
| 546 | t->tm_year += 100; | ||
| 547 | } else { | ||
| 548 | tod_3000.second1 = t->tm_sec / 10; | ||
| 549 | tod_3000.second2 = t->tm_sec % 10; | ||
| 550 | tod_3000.minute1 = t->tm_min / 10; | ||
| 551 | tod_3000.minute2 = t->tm_min % 10; | ||
| 552 | tod_3000.hour1 = t->tm_hour / 10; | ||
| 553 | tod_3000.hour2 = t->tm_hour % 10; | ||
| 554 | tod_3000.day1 = t->tm_mday / 10; | ||
| 555 | tod_3000.day2 = t->tm_mday % 10; | ||
| 556 | if (t->tm_wday != -1) | ||
| 557 | tod_3000.weekday = t->tm_wday; | ||
| 558 | tod_3000.month1 = (t->tm_mon + 1) / 10; | ||
| 559 | tod_3000.month2 = (t->tm_mon + 1) % 10; | ||
| 560 | if (t->tm_year >= 100) | ||
| 561 | t->tm_year -= 100; | ||
| 562 | tod_3000.year1 = t->tm_year / 10; | ||
| 563 | tod_3000.year2 = t->tm_year % 10; | ||
| 564 | } | ||
| 565 | |||
| 566 | tod_3000.cntrl1 = TOD3000_CNTRL1_FREE; | ||
| 567 | |||
| 568 | return 0; | ||
| 569 | } | ||
| 570 | |||
| 571 | static int a2000_hwclk(int op, struct rtc_time *t) | ||
| 572 | { | ||
| 573 | int cnt = 5; | ||
| 574 | |||
| 575 | tod_2000.cntrl1 = TOD2000_CNTRL1_HOLD; | ||
| 576 | |||
| 577 | while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) { | ||
| 578 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | ||
| 579 | udelay(70); | ||
| 580 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | ||
| 581 | --cnt; | ||
| 582 | } | ||
| 583 | |||
| 584 | if (!cnt) | ||
| 585 | printk(KERN_INFO "hwclk: timed out waiting for RTC (0x%x)\n", | ||
| 586 | tod_2000.cntrl1); | ||
| 587 | |||
| 588 | if (!op) { /* read */ | ||
| 589 | t->tm_sec = tod_2000.second1 * 10 + tod_2000.second2; | ||
| 590 | t->tm_min = tod_2000.minute1 * 10 + tod_2000.minute2; | ||
| 591 | t->tm_hour = (tod_2000.hour1 & 3) * 10 + tod_2000.hour2; | ||
| 592 | t->tm_mday = tod_2000.day1 * 10 + tod_2000.day2; | ||
| 593 | t->tm_wday = tod_2000.weekday; | ||
| 594 | t->tm_mon = tod_2000.month1 * 10 + tod_2000.month2 - 1; | ||
| 595 | t->tm_year = tod_2000.year1 * 10 + tod_2000.year2; | ||
| 596 | if (t->tm_year <= 69) | ||
| 597 | t->tm_year += 100; | ||
| 598 | |||
| 599 | if (!(tod_2000.cntrl3 & TOD2000_CNTRL3_24HMODE)) { | ||
| 600 | if (!(tod_2000.hour1 & TOD2000_HOUR1_PM) && t->tm_hour == 12) | ||
| 601 | t->tm_hour = 0; | ||
| 602 | else if ((tod_2000.hour1 & TOD2000_HOUR1_PM) && t->tm_hour != 12) | ||
| 603 | t->tm_hour += 12; | ||
| 604 | } | ||
| 605 | } else { | ||
| 606 | tod_2000.second1 = t->tm_sec / 10; | ||
| 607 | tod_2000.second2 = t->tm_sec % 10; | ||
| 608 | tod_2000.minute1 = t->tm_min / 10; | ||
| 609 | tod_2000.minute2 = t->tm_min % 10; | ||
| 610 | if (tod_2000.cntrl3 & TOD2000_CNTRL3_24HMODE) | ||
| 611 | tod_2000.hour1 = t->tm_hour / 10; | ||
| 612 | else if (t->tm_hour >= 12) | ||
| 613 | tod_2000.hour1 = TOD2000_HOUR1_PM + | ||
| 614 | (t->tm_hour - 12) / 10; | ||
| 615 | else | ||
| 616 | tod_2000.hour1 = t->tm_hour / 10; | ||
| 617 | tod_2000.hour2 = t->tm_hour % 10; | ||
| 618 | tod_2000.day1 = t->tm_mday / 10; | ||
| 619 | tod_2000.day2 = t->tm_mday % 10; | ||
| 620 | if (t->tm_wday != -1) | ||
| 621 | tod_2000.weekday = t->tm_wday; | ||
| 622 | tod_2000.month1 = (t->tm_mon + 1) / 10; | ||
| 623 | tod_2000.month2 = (t->tm_mon + 1) % 10; | ||
| 624 | if (t->tm_year >= 100) | ||
| 625 | t->tm_year -= 100; | ||
| 626 | tod_2000.year1 = t->tm_year / 10; | ||
| 627 | tod_2000.year2 = t->tm_year % 10; | ||
| 628 | } | ||
| 629 | |||
| 630 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | ||
| 631 | |||
| 632 | return 0; | ||
| 633 | } | ||
| 634 | |||
| 635 | static int amiga_set_clock_mmss(unsigned long nowtime) | ||
| 636 | { | ||
| 637 | short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; | ||
| 638 | |||
| 639 | if (AMIGAHW_PRESENT(A3000_CLK)) { | ||
| 640 | tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD; | ||
| 641 | |||
| 642 | tod_3000.second1 = real_seconds / 10; | ||
| 643 | tod_3000.second2 = real_seconds % 10; | ||
| 644 | tod_3000.minute1 = real_minutes / 10; | ||
| 645 | tod_3000.minute2 = real_minutes % 10; | ||
| 646 | |||
| 647 | tod_3000.cntrl1 = TOD3000_CNTRL1_FREE; | ||
| 648 | } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ { | ||
| 649 | int cnt = 5; | ||
| 650 | |||
| 651 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | ||
| 652 | |||
| 653 | while ((tod_2000.cntrl1 & TOD2000_CNTRL1_BUSY) && cnt) { | ||
| 654 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | ||
| 655 | udelay(70); | ||
| 656 | tod_2000.cntrl1 |= TOD2000_CNTRL1_HOLD; | ||
| 657 | --cnt; | ||
| 658 | } | ||
| 659 | |||
| 660 | if (!cnt) | ||
| 661 | printk(KERN_INFO "set_clock_mmss: timed out waiting for RTC (0x%x)\n", tod_2000.cntrl1); | ||
| 662 | |||
| 663 | tod_2000.second1 = real_seconds / 10; | ||
| 664 | tod_2000.second2 = real_seconds % 10; | ||
| 665 | tod_2000.minute1 = real_minutes / 10; | ||
| 666 | tod_2000.minute2 = real_minutes % 10; | ||
| 667 | |||
| 668 | tod_2000.cntrl1 &= ~TOD2000_CNTRL1_HOLD; | ||
| 669 | } | ||
| 670 | |||
| 671 | return 0; | ||
| 672 | } | ||
| 673 | |||
| 674 | static unsigned int amiga_get_ss(void) | ||
| 675 | { | ||
| 676 | unsigned int s; | ||
| 677 | |||
| 678 | if (AMIGAHW_PRESENT(A3000_CLK)) { | ||
| 679 | tod_3000.cntrl1 = TOD3000_CNTRL1_HOLD; | ||
| 680 | s = tod_3000.second1 * 10 + tod_3000.second2; | ||
| 681 | tod_3000.cntrl1 = TOD3000_CNTRL1_FREE; | ||
| 682 | } else /* if (AMIGAHW_PRESENT(A2000_CLK)) */ { | ||
| 683 | s = tod_2000.second1 * 10 + tod_2000.second2; | ||
| 684 | } | ||
| 685 | return s; | ||
| 686 | } | ||
| 687 | |||
| 688 | static NORET_TYPE void amiga_reset(void) | 514 | static NORET_TYPE void amiga_reset(void) |
| 689 | ATTRIB_NORET; | 515 | ATTRIB_NORET; |
| 690 | 516 | ||
diff --git a/arch/m68k/amiga/platform.c b/arch/m68k/amiga/platform.c index 38f18bf14737..7fd8b41723ea 100644 --- a/arch/m68k/amiga/platform.c +++ b/arch/m68k/amiga/platform.c | |||
| @@ -11,6 +11,7 @@ | |||
| 11 | #include <linux/zorro.h> | 11 | #include <linux/zorro.h> |
| 12 | 12 | ||
| 13 | #include <asm/amigahw.h> | 13 | #include <asm/amigahw.h> |
| 14 | #include <asm/amigayle.h> | ||
| 14 | 15 | ||
| 15 | 16 | ||
| 16 | #ifdef CONFIG_ZORRO | 17 | #ifdef CONFIG_ZORRO |
| @@ -55,11 +56,77 @@ static int __init amiga_init_bus(void) | |||
| 55 | 56 | ||
| 56 | subsys_initcall(amiga_init_bus); | 57 | subsys_initcall(amiga_init_bus); |
| 57 | 58 | ||
| 58 | #endif /* CONFIG_ZORRO */ | 59 | |
| 60 | static int z_dev_present(zorro_id id) | ||
| 61 | { | ||
| 62 | unsigned int i; | ||
| 63 | |||
| 64 | for (i = 0; i < zorro_num_autocon; i++) | ||
| 65 | if (zorro_autocon[i].rom.er_Manufacturer == ZORRO_MANUF(id) && | ||
| 66 | zorro_autocon[i].rom.er_Product == ZORRO_PROD(id)) | ||
| 67 | return 1; | ||
| 68 | |||
| 69 | return 0; | ||
| 70 | } | ||
| 71 | |||
| 72 | #else /* !CONFIG_ZORRO */ | ||
| 73 | |||
| 74 | static inline int z_dev_present(zorro_id id) { return 0; } | ||
| 75 | |||
| 76 | #endif /* !CONFIG_ZORRO */ | ||
| 77 | |||
| 78 | |||
| 79 | static const struct resource a3000_scsi_resource __initconst = { | ||
| 80 | .start = 0xdd0000, | ||
| 81 | .end = 0xdd00ff, | ||
| 82 | .flags = IORESOURCE_MEM, | ||
| 83 | }; | ||
| 84 | |||
| 85 | |||
| 86 | static const struct resource a4000t_scsi_resource __initconst = { | ||
| 87 | .start = 0xdd0000, | ||
| 88 | .end = 0xdd0fff, | ||
| 89 | .flags = IORESOURCE_MEM, | ||
| 90 | }; | ||
| 91 | |||
| 92 | |||
| 93 | static const struct resource a1200_ide_resource __initconst = { | ||
| 94 | .start = 0xda0000, | ||
| 95 | .end = 0xda1fff, | ||
| 96 | .flags = IORESOURCE_MEM, | ||
| 97 | }; | ||
| 98 | |||
| 99 | static const struct gayle_ide_platform_data a1200_ide_pdata __initconst = { | ||
| 100 | .base = 0xda0000, | ||
| 101 | .irqport = 0xda9000, | ||
| 102 | .explicit_ack = 1, | ||
| 103 | }; | ||
| 104 | |||
| 105 | |||
| 106 | static const struct resource a4000_ide_resource __initconst = { | ||
| 107 | .start = 0xdd2000, | ||
| 108 | .end = 0xdd3fff, | ||
| 109 | .flags = IORESOURCE_MEM, | ||
| 110 | }; | ||
| 111 | |||
| 112 | static const struct gayle_ide_platform_data a4000_ide_pdata __initconst = { | ||
| 113 | .base = 0xdd2020, | ||
| 114 | .irqport = 0xdd3020, | ||
| 115 | .explicit_ack = 0, | ||
| 116 | }; | ||
| 117 | |||
| 118 | |||
| 119 | static const struct resource amiga_rtc_resource __initconst = { | ||
| 120 | .start = 0x00dc0000, | ||
| 121 | .end = 0x00dcffff, | ||
| 122 | .flags = IORESOURCE_MEM, | ||
| 123 | }; | ||
| 59 | 124 | ||
| 60 | 125 | ||
| 61 | static int __init amiga_init_devices(void) | 126 | static int __init amiga_init_devices(void) |
| 62 | { | 127 | { |
| 128 | struct platform_device *pdev; | ||
| 129 | |||
| 63 | if (!MACH_IS_AMIGA) | 130 | if (!MACH_IS_AMIGA) |
| 64 | return -ENODEV; | 131 | return -ENODEV; |
| 65 | 132 | ||
| @@ -77,6 +144,53 @@ static int __init amiga_init_devices(void) | |||
| 77 | if (AMIGAHW_PRESENT(AMI_FLOPPY)) | 144 | if (AMIGAHW_PRESENT(AMI_FLOPPY)) |
| 78 | platform_device_register_simple("amiga-floppy", -1, NULL, 0); | 145 | platform_device_register_simple("amiga-floppy", -1, NULL, 0); |
| 79 | 146 | ||
| 147 | if (AMIGAHW_PRESENT(A3000_SCSI)) | ||
| 148 | platform_device_register_simple("amiga-a3000-scsi", -1, | ||
| 149 | &a3000_scsi_resource, 1); | ||
| 150 | |||
| 151 | if (AMIGAHW_PRESENT(A4000_SCSI)) | ||
| 152 | platform_device_register_simple("amiga-a4000t-scsi", -1, | ||
| 153 | &a4000t_scsi_resource, 1); | ||
| 154 | |||
| 155 | if (AMIGAHW_PRESENT(A1200_IDE) || | ||
| 156 | z_dev_present(ZORRO_PROD_MTEC_VIPER_MK_V_E_MATRIX_530_SCSI_IDE)) { | ||
| 157 | pdev = platform_device_register_simple("amiga-gayle-ide", -1, | ||
| 158 | &a1200_ide_resource, 1); | ||
| 159 | platform_device_add_data(pdev, &a1200_ide_pdata, | ||
| 160 | sizeof(a1200_ide_pdata)); | ||
| 161 | } | ||
| 162 | |||
| 163 | if (AMIGAHW_PRESENT(A4000_IDE)) { | ||
| 164 | pdev = platform_device_register_simple("amiga-gayle-ide", -1, | ||
| 165 | &a4000_ide_resource, 1); | ||
| 166 | platform_device_add_data(pdev, &a4000_ide_pdata, | ||
| 167 | sizeof(a4000_ide_pdata)); | ||
| 168 | } | ||
| 169 | |||
| 170 | |||
| 171 | /* other I/O hardware */ | ||
| 172 | if (AMIGAHW_PRESENT(AMI_KEYBOARD)) | ||
| 173 | platform_device_register_simple("amiga-keyboard", -1, NULL, 0); | ||
| 174 | |||
| 175 | if (AMIGAHW_PRESENT(AMI_MOUSE)) | ||
| 176 | platform_device_register_simple("amiga-mouse", -1, NULL, 0); | ||
| 177 | |||
| 178 | if (AMIGAHW_PRESENT(AMI_SERIAL)) | ||
| 179 | platform_device_register_simple("amiga-serial", -1, NULL, 0); | ||
| 180 | |||
| 181 | if (AMIGAHW_PRESENT(AMI_PARALLEL)) | ||
| 182 | platform_device_register_simple("amiga-parallel", -1, NULL, 0); | ||
| 183 | |||
| 184 | |||
| 185 | /* real time clocks */ | ||
| 186 | if (AMIGAHW_PRESENT(A2000_CLK)) | ||
| 187 | platform_device_register_simple("rtc-msm6242", -1, | ||
| 188 | &amiga_rtc_resource, 1); | ||
| 189 | |||
| 190 | if (AMIGAHW_PRESENT(A3000_CLK)) | ||
| 191 | platform_device_register_simple("rtc-rp5c01", -1, | ||
| 192 | &amiga_rtc_resource, 1); | ||
| 193 | |||
| 80 | return 0; | 194 | return 0; |
| 81 | } | 195 | } |
| 82 | 196 | ||
diff --git a/arch/m68k/include/asm/amigayle.h b/arch/m68k/include/asm/amigayle.h index bb5a6aa329f3..a01453d9c231 100644 --- a/arch/m68k/include/asm/amigayle.h +++ b/arch/m68k/include/asm/amigayle.h | |||
| @@ -104,4 +104,10 @@ struct GAYLE { | |||
| 104 | #define GAYLE_CFG_250NS 0x00 | 104 | #define GAYLE_CFG_250NS 0x00 |
| 105 | #define GAYLE_CFG_720NS 0x0c | 105 | #define GAYLE_CFG_720NS 0x0c |
| 106 | 106 | ||
| 107 | struct gayle_ide_platform_data { | ||
| 108 | unsigned long base; | ||
| 109 | unsigned long irqport; | ||
| 110 | int explicit_ack; /* A1200 IDE needs explicit ack */ | ||
| 111 | }; | ||
| 112 | |||
| 107 | #endif /* asm-m68k/amigayle.h */ | 113 | #endif /* asm-m68k/amigayle.h */ |
diff --git a/arch/m68k/include/asm/atomic.h b/arch/m68k/include/asm/atomic.h index 8d29145ebb27..eab36dcacf6c 100644 --- a/arch/m68k/include/asm/atomic.h +++ b/arch/m68k/include/asm/atomic.h | |||
| @@ -3,3 +3,5 @@ | |||
| 3 | #else | 3 | #else |
| 4 | #include "atomic_mm.h" | 4 | #include "atomic_mm.h" |
| 5 | #endif | 5 | #endif |
| 6 | |||
| 7 | #include <asm-generic/atomic64.h> | ||
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h index fed3fd30de7e..ecafbe1718c3 100644 --- a/arch/m68k/include/asm/cache.h +++ b/arch/m68k/include/asm/cache.h | |||
| @@ -8,4 +8,6 @@ | |||
| 8 | #define L1_CACHE_SHIFT 4 | 8 | #define L1_CACHE_SHIFT 4 |
| 9 | #define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) | 9 | #define L1_CACHE_BYTES (1<< L1_CACHE_SHIFT) |
| 10 | 10 | ||
| 11 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
| 12 | |||
| 11 | #endif | 13 | #endif |
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index ed2b69b96805..db824a4b136e 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h | |||
| @@ -113,6 +113,7 @@ | |||
| 113 | 113 | ||
| 114 | #define MCF_GPIO_PAR_UART (0xA4036) | 114 | #define MCF_GPIO_PAR_UART (0xA4036) |
| 115 | #define MCF_GPIO_PAR_FECI2C (0xA4033) | 115 | #define MCF_GPIO_PAR_FECI2C (0xA4033) |
| 116 | #define MCF_GPIO_PAR_QSPI (0xA4034) | ||
| 116 | #define MCF_GPIO_PAR_FEC (0xA4038) | 117 | #define MCF_GPIO_PAR_FEC (0xA4038) |
| 117 | 118 | ||
| 118 | #define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001) | 119 | #define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001) |
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index a34894cf8e6f..e8d06b24a48e 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h | |||
| @@ -127,5 +127,10 @@ | |||
| 127 | #define MCFGPIO_IRQ_MAX 8 | 127 | #define MCFGPIO_IRQ_MAX 8 |
| 128 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 128 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
| 129 | 129 | ||
| 130 | /* | ||
| 131 | * Pin Assignment | ||
| 132 | */ | ||
| 133 | #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A) | ||
| 134 | #define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C) | ||
| 130 | /****************************************************************************/ | 135 | /****************************************************************************/ |
| 131 | #endif /* m523xsim_h */ | 136 | #endif /* m523xsim_h */ |
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 14bce877ed88..79b7b402f3c9 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h | |||
| @@ -69,10 +69,12 @@ | |||
| 69 | #define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ | 69 | #define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ |
| 70 | #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ | 70 | #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ |
| 71 | #define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ | 71 | #define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ |
| 72 | #define MCFSIM_QSPIICR MCFSIM_ICR10 /* QSPI ICR */ | ||
| 72 | 73 | ||
| 73 | /* | 74 | /* |
| 74 | * Define system peripheral IRQ usage. | 75 | * Define system peripheral IRQ usage. |
| 75 | */ | 76 | */ |
| 77 | #define MCF_IRQ_QSPI 28 /* QSPI, Level 4 */ | ||
| 76 | #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ | 78 | #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ |
| 77 | #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ | 79 | #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ |
| 78 | 80 | ||
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 453356d72d80..1feb46f108ce 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ | 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ |
| 32 | #define MCFINT_UART1 14 /* Interrupt number for UART1 */ | 32 | #define MCFINT_UART1 14 /* Interrupt number for UART1 */ |
| 33 | #define MCFINT_UART2 15 /* Interrupt number for UART2 */ | 33 | #define MCFINT_UART2 15 /* Interrupt number for UART2 */ |
| 34 | #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ | ||
| 34 | #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ | 35 | #define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ |
| 35 | 36 | ||
| 36 | /* | 37 | /* |
| @@ -120,6 +121,9 @@ | |||
| 120 | #define MCFGPIO_PIN_MAX 100 | 121 | #define MCFGPIO_PIN_MAX 100 |
| 121 | #define MCFGPIO_IRQ_MAX 8 | 122 | #define MCFGPIO_IRQ_MAX 8 |
| 122 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 123 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
| 124 | |||
| 125 | #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A) | ||
| 126 | #define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C) | ||
| 123 | #endif | 127 | #endif |
| 124 | 128 | ||
| 125 | #ifdef CONFIG_M5275 | 129 | #ifdef CONFIG_M5275 |
| @@ -212,6 +216,8 @@ | |||
| 212 | #define MCFGPIO_PIN_MAX 148 | 216 | #define MCFGPIO_PIN_MAX 148 |
| 213 | #define MCFGPIO_IRQ_MAX 8 | 217 | #define MCFGPIO_IRQ_MAX 8 |
| 214 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE | 218 | #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE |
| 219 | |||
| 220 | #define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10007E) | ||
| 215 | #endif | 221 | #endif |
| 216 | 222 | ||
| 217 | /* | 223 | /* |
| @@ -223,6 +229,7 @@ | |||
| 223 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) | 229 | #define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005) |
| 224 | 230 | ||
| 225 | 231 | ||
| 232 | |||
| 226 | /* | 233 | /* |
| 227 | * GPIO pins setups to enable the UARTs. | 234 | * GPIO pins setups to enable the UARTs. |
| 228 | */ | 235 | */ |
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index e2ad1f42b657..891cbedad972 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | 29 | ||
| 30 | #define MCFINT_VECBASE 64 /* Vector base number */ | 30 | #define MCFINT_VECBASE 64 /* Vector base number */ |
| 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ | 31 | #define MCFINT_UART0 13 /* Interrupt number for UART0 */ |
| 32 | #define MCFINT_QSPI 18 /* Interrupt number for QSPI */ | ||
| 32 | #define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ | 33 | #define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ |
| 33 | 34 | ||
| 34 | /* | 35 | /* |
| @@ -249,70 +250,4 @@ | |||
| 249 | #define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge | 250 | #define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge |
| 250 | 251 | ||
| 251 | 252 | ||
| 252 | |||
| 253 | /********************************************************************* | ||
| 254 | * | ||
| 255 | * Queued Serial Peripheral Interface (QSPI) Module | ||
| 256 | * | ||
| 257 | *********************************************************************/ | ||
| 258 | /* Derek - 21 Feb 2005 */ | ||
| 259 | /* change to the format used in I2C */ | ||
| 260 | /* Read/Write access macros for general use */ | ||
| 261 | #define MCF5282_QSPI_QMR MCF_IPSBAR + 0x0340 | ||
| 262 | #define MCF5282_QSPI_QDLYR MCF_IPSBAR + 0x0344 | ||
| 263 | #define MCF5282_QSPI_QWR MCF_IPSBAR + 0x0348 | ||
| 264 | #define MCF5282_QSPI_QIR MCF_IPSBAR + 0x034C | ||
| 265 | #define MCF5282_QSPI_QAR MCF_IPSBAR + 0x0350 | ||
| 266 | #define MCF5282_QSPI_QDR MCF_IPSBAR + 0x0354 | ||
| 267 | #define MCF5282_QSPI_QCR MCF_IPSBAR + 0x0354 | ||
| 268 | |||
| 269 | /* Bit level definitions and macros */ | ||
| 270 | #define MCF5282_QSPI_QMR_MSTR (0x8000) | ||
| 271 | #define MCF5282_QSPI_QMR_DOHIE (0x4000) | ||
| 272 | #define MCF5282_QSPI_QMR_BITS_16 (0x0000) | ||
| 273 | #define MCF5282_QSPI_QMR_BITS_8 (0x2000) | ||
| 274 | #define MCF5282_QSPI_QMR_BITS_9 (0x2400) | ||
| 275 | #define MCF5282_QSPI_QMR_BITS_10 (0x2800) | ||
| 276 | #define MCF5282_QSPI_QMR_BITS_11 (0x2C00) | ||
| 277 | #define MCF5282_QSPI_QMR_BITS_12 (0x3000) | ||
| 278 | #define MCF5282_QSPI_QMR_BITS_13 (0x3400) | ||
| 279 | #define MCF5282_QSPI_QMR_BITS_14 (0x3800) | ||
| 280 | #define MCF5282_QSPI_QMR_BITS_15 (0x3C00) | ||
| 281 | #define MCF5282_QSPI_QMR_CPOL (0x0200) | ||
| 282 | #define MCF5282_QSPI_QMR_CPHA (0x0100) | ||
| 283 | #define MCF5282_QSPI_QMR_BAUD(x) (((x)&0x00FF)) | ||
| 284 | |||
| 285 | #define MCF5282_QSPI_QDLYR_SPE (0x80) | ||
| 286 | #define MCF5282_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) | ||
| 287 | #define MCF5282_QSPI_QDLYR_DTL(x) (((x)&0x00FF)) | ||
| 288 | |||
| 289 | #define MCF5282_QSPI_QWR_HALT (0x8000) | ||
| 290 | #define MCF5282_QSPI_QWR_WREN (0x4000) | ||
| 291 | #define MCF5282_QSPI_QWR_WRTO (0x2000) | ||
| 292 | #define MCF5282_QSPI_QWR_CSIV (0x1000) | ||
| 293 | #define MCF5282_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) | ||
| 294 | #define MCF5282_QSPI_QWR_CPTQP(x) (((x)&0x000F)<<4) | ||
| 295 | #define MCF5282_QSPI_QWR_NEWQP(x) (((x)&0x000F)) | ||
| 296 | |||
| 297 | #define MCF5282_QSPI_QIR_WCEFB (0x8000) | ||
| 298 | #define MCF5282_QSPI_QIR_ABRTB (0x4000) | ||
| 299 | #define MCF5282_QSPI_QIR_ABRTL (0x1000) | ||
| 300 | #define MCF5282_QSPI_QIR_WCEFE (0x0800) | ||
| 301 | #define MCF5282_QSPI_QIR_ABRTE (0x0400) | ||
| 302 | #define MCF5282_QSPI_QIR_SPIFE (0x0100) | ||
| 303 | #define MCF5282_QSPI_QIR_WCEF (0x0008) | ||
| 304 | #define MCF5282_QSPI_QIR_ABRT (0x0004) | ||
| 305 | #define MCF5282_QSPI_QIR_SPIF (0x0001) | ||
| 306 | |||
| 307 | #define MCF5282_QSPI_QAR_ADDR(x) (((x)&0x003F)) | ||
| 308 | |||
| 309 | #define MCF5282_QSPI_QDR_COMMAND(x) (((x)&0xFF00)) | ||
| 310 | #define MCF5282_QSPI_QCR_DATA(x) (((x)&0x00FF)<<8) | ||
| 311 | #define MCF5282_QSPI_QCR_CONT (0x8000) | ||
| 312 | #define MCF5282_QSPI_QCR_BITSE (0x4000) | ||
| 313 | #define MCF5282_QSPI_QCR_DT (0x2000) | ||
| 314 | #define MCF5282_QSPI_QCR_DSCK (0x1000) | ||
| 315 | #define MCF5282_QSPI_QCR_CS (((x)&0x000F)<<8) | ||
| 316 | |||
| 317 | /****************************************************************************/ | ||
| 318 | #endif /* m528xsim_h */ | 253 | #endif /* m528xsim_h */ |
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index 36bf15aec9ae..c4bf1c81e3cf 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #define MCFINT_UART0 26 /* Interrupt number for UART0 */ | 17 | #define MCFINT_UART0 26 /* Interrupt number for UART0 */ |
| 18 | #define MCFINT_UART1 27 /* Interrupt number for UART1 */ | 18 | #define MCFINT_UART1 27 /* Interrupt number for UART1 */ |
| 19 | #define MCFINT_UART2 28 /* Interrupt number for UART2 */ | 19 | #define MCFINT_UART2 28 /* Interrupt number for UART2 */ |
| 20 | #define MCFINT_QSPI 31 /* Interrupt number for QSPI */ | ||
| 20 | 21 | ||
| 21 | #define MCF_WTM_WCR MCF_REG16(0xFC098000) | 22 | #define MCF_WTM_WCR MCF_REG16(0xFC098000) |
| 22 | 23 | ||
diff --git a/arch/m68k/include/asm/mcfqspi.h b/arch/m68k/include/asm/mcfqspi.h new file mode 100644 index 000000000000..39d90d51111d --- /dev/null +++ b/arch/m68k/include/asm/mcfqspi.h | |||
| @@ -0,0 +1,64 @@ | |||
| 1 | /* | ||
| 2 | * Definitions for Freescale Coldfire QSPI module | ||
| 3 | * | ||
| 4 | * Copyright 2010 Steven King <sfking@fdwdc.com> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License version 2 | ||
| 8 | * as published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, | ||
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 13 | * GNU General Public License for more details. | ||
| 14 | * | ||
| 15 | * You should have received a copy of the GNU General Public License along | ||
| 16 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
| 17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
| 18 | * | ||
| 19 | */ | ||
| 20 | |||
| 21 | #ifndef mcfqspi_h | ||
| 22 | #define mcfqspi_h | ||
| 23 | |||
| 24 | #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) | ||
| 25 | #define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) | ||
| 26 | #elif defined(CONFIG_M5249) | ||
| 27 | #define MCFQSPI_IOBASE (MCF_MBAR + 0x300) | ||
| 28 | #elif defined(CONFIG_M520x) || defined(CONFIG_M532x) | ||
| 29 | #define MCFQSPI_IOBASE 0xFC058000 | ||
| 30 | #endif | ||
| 31 | #define MCFQSPI_IOSIZE 0x40 | ||
| 32 | |||
| 33 | /** | ||
| 34 | * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver | ||
| 35 | * @setup: setup the control; allocate gpio's, etc. May be NULL. | ||
| 36 | * @teardown: finish with the control; free gpio's, etc. May be NULL. | ||
| 37 | * @select: output the signals to select the device. Can not be NULL. | ||
| 38 | * @deselect: output the signals to deselect the device. Can not be NULL. | ||
| 39 | * | ||
| 40 | * The QSPI module has 4 hardware chip selects. We don't use them. Instead | ||
| 41 | * platforms are required to supply a mcfqspi_cs_control as a part of the | ||
| 42 | * platform data for each QSPI master controller. Only the select and | ||
| 43 | * deselect functions are required. | ||
| 44 | */ | ||
| 45 | struct mcfqspi_cs_control { | ||
| 46 | int (*setup)(struct mcfqspi_cs_control *); | ||
| 47 | void (*teardown)(struct mcfqspi_cs_control *); | ||
| 48 | void (*select)(struct mcfqspi_cs_control *, u8, bool); | ||
| 49 | void (*deselect)(struct mcfqspi_cs_control *, u8, bool); | ||
| 50 | }; | ||
| 51 | |||
| 52 | /** | ||
| 53 | * struct mcfqspi_platform_data - platform data for the coldfire qspi driver | ||
| 54 | * @bus_num: board specific identifier for this qspi driver. | ||
| 55 | * @num_chipselects: number of chip selects supported by this qspi driver. | ||
| 56 | * @cs_control: platform dependent chip select control. | ||
| 57 | */ | ||
| 58 | struct mcfqspi_platform_data { | ||
| 59 | s16 bus_num; | ||
| 60 | u16 num_chipselect; | ||
| 61 | struct mcfqspi_cs_control *cs_control; | ||
| 62 | }; | ||
| 63 | |||
| 64 | #endif /* mcfqspi_h */ | ||
diff --git a/arch/m68k/include/asm/mcfsmc.h b/arch/m68k/include/asm/mcfsmc.h deleted file mode 100644 index 527bea5d6788..000000000000 --- a/arch/m68k/include/asm/mcfsmc.h +++ /dev/null | |||
| @@ -1,187 +0,0 @@ | |||
| 1 | /****************************************************************************/ | ||
| 2 | |||
| 3 | /* | ||
| 4 | * mcfsmc.h -- SMC ethernet support for ColdFire environments. | ||
| 5 | * | ||
| 6 | * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com) | ||
| 7 | * (C) Copyright 2000, Lineo Inc. (www.lineo.com) | ||
| 8 | */ | ||
| 9 | |||
| 10 | /****************************************************************************/ | ||
| 11 | #ifndef mcfsmc_h | ||
| 12 | #define mcfsmc_h | ||
| 13 | /****************************************************************************/ | ||
| 14 | |||
| 15 | /* | ||
| 16 | * None of the current ColdFire targets that use the SMC91x111 | ||
| 17 | * allow 8 bit accesses. So this code is 16bit access only. | ||
| 18 | */ | ||
| 19 | |||
| 20 | |||
| 21 | #undef outb | ||
| 22 | #undef inb | ||
| 23 | #undef outw | ||
| 24 | #undef outwd | ||
| 25 | #undef inw | ||
| 26 | #undef outl | ||
| 27 | #undef inl | ||
| 28 | |||
| 29 | #undef outsb | ||
| 30 | #undef outsw | ||
| 31 | #undef outsl | ||
| 32 | #undef insb | ||
| 33 | #undef insw | ||
| 34 | #undef insl | ||
| 35 | |||
| 36 | /* | ||
| 37 | * Re-defines for ColdFire environment... The SMC part is | ||
| 38 | * mapped into memory space, so remap the PC-style in/out | ||
| 39 | * routines to handle that. | ||
| 40 | */ | ||
| 41 | #define outb smc_outb | ||
| 42 | #define inb smc_inb | ||
| 43 | #define outw smc_outw | ||
| 44 | #define outwd smc_outwd | ||
| 45 | #define inw smc_inw | ||
| 46 | #define outl smc_outl | ||
| 47 | #define inl smc_inl | ||
| 48 | |||
| 49 | #define outsb smc_outsb | ||
| 50 | #define outsw smc_outsw | ||
| 51 | #define outsl smc_outsl | ||
| 52 | #define insb smc_insb | ||
| 53 | #define insw smc_insw | ||
| 54 | #define insl smc_insl | ||
| 55 | |||
| 56 | |||
| 57 | static inline int smc_inb(unsigned int addr) | ||
| 58 | { | ||
| 59 | register unsigned short w; | ||
| 60 | w = *((volatile unsigned short *) (addr & ~0x1)); | ||
| 61 | return(((addr & 0x1) ? w : (w >> 8)) & 0xff); | ||
| 62 | } | ||
| 63 | |||
| 64 | static inline void smc_outw(unsigned int val, unsigned int addr) | ||
| 65 | { | ||
| 66 | *((volatile unsigned short *) addr) = (val << 8) | (val >> 8); | ||
| 67 | } | ||
| 68 | |||
| 69 | static inline int smc_inw(unsigned int addr) | ||
| 70 | { | ||
| 71 | register unsigned short w; | ||
| 72 | w = *((volatile unsigned short *) addr); | ||
| 73 | return(((w << 8) | (w >> 8)) & 0xffff); | ||
| 74 | } | ||
| 75 | |||
| 76 | static inline void smc_outl(unsigned long val, unsigned int addr) | ||
| 77 | { | ||
| 78 | *((volatile unsigned long *) addr) = | ||
| 79 | ((val << 8) & 0xff000000) | ((val >> 8) & 0x00ff0000) | | ||
| 80 | ((val << 8) & 0x0000ff00) | ((val >> 8) & 0x000000ff); | ||
| 81 | } | ||
| 82 | |||
| 83 | static inline void smc_outwd(unsigned int val, unsigned int addr) | ||
| 84 | { | ||
| 85 | *((volatile unsigned short *) addr) = val; | ||
| 86 | } | ||
| 87 | |||
| 88 | |||
| 89 | /* | ||
| 90 | * The rep* functions are used to feed the data port with | ||
| 91 | * raw data. So we do not byte swap them when copying. | ||
| 92 | */ | ||
| 93 | |||
| 94 | static inline void smc_insb(unsigned int addr, void *vbuf, int unsigned long len) | ||
| 95 | { | ||
| 96 | volatile unsigned short *rp; | ||
| 97 | unsigned short *buf, *ebuf; | ||
| 98 | |||
| 99 | buf = (unsigned short *) vbuf; | ||
| 100 | rp = (volatile unsigned short *) addr; | ||
| 101 | |||
| 102 | /* Copy as words for as long as possible */ | ||
| 103 | for (ebuf = buf + (len >> 1); (buf < ebuf); ) | ||
| 104 | *buf++ = *rp; | ||
| 105 | |||
| 106 | /* Lastly, handle left over byte */ | ||
| 107 | if (len & 0x1) | ||
| 108 | *((unsigned char *) buf) = (*rp >> 8) & 0xff; | ||
| 109 | } | ||
| 110 | |||
| 111 | static inline void smc_insw(unsigned int addr, void *vbuf, unsigned long len) | ||
| 112 | { | ||
| 113 | volatile unsigned short *rp; | ||
| 114 | unsigned short *buf, *ebuf; | ||
| 115 | |||
| 116 | buf = (unsigned short *) vbuf; | ||
| 117 | rp = (volatile unsigned short *) addr; | ||
| 118 | for (ebuf = buf + len; (buf < ebuf); ) | ||
| 119 | *buf++ = *rp; | ||
| 120 | } | ||
| 121 | |||
| 122 | static inline void smc_insl(unsigned int addr, void *vbuf, unsigned long len) | ||
| 123 | { | ||
| 124 | volatile unsigned long *rp; | ||
| 125 | unsigned long *buf, *ebuf; | ||
| 126 | |||
| 127 | buf = (unsigned long *) vbuf; | ||
| 128 | rp = (volatile unsigned long *) addr; | ||
| 129 | for (ebuf = buf + len; (buf < ebuf); ) | ||
| 130 | *buf++ = *rp; | ||
| 131 | } | ||
| 132 | |||
| 133 | static inline void smc_outsw(unsigned int addr, const void *vbuf, unsigned long len) | ||
| 134 | { | ||
| 135 | volatile unsigned short *rp; | ||
| 136 | unsigned short *buf, *ebuf; | ||
| 137 | |||
| 138 | buf = (unsigned short *) vbuf; | ||
| 139 | rp = (volatile unsigned short *) addr; | ||
| 140 | for (ebuf = buf + len; (buf < ebuf); ) | ||
| 141 | *rp = *buf++; | ||
| 142 | } | ||
| 143 | |||
| 144 | static inline void smc_outsl(unsigned int addr, void *vbuf, unsigned long len) | ||
| 145 | { | ||
| 146 | volatile unsigned long *rp; | ||
| 147 | unsigned long *buf, *ebuf; | ||
| 148 | |||
| 149 | buf = (unsigned long *) vbuf; | ||
| 150 | rp = (volatile unsigned long *) addr; | ||
| 151 | for (ebuf = buf + len; (buf < ebuf); ) | ||
| 152 | *rp = *buf++; | ||
| 153 | } | ||
| 154 | |||
| 155 | |||
| 156 | #ifdef CONFIG_NETtel | ||
| 157 | /* | ||
| 158 | * Re-map the address space of at least one of the SMC ethernet | ||
| 159 | * parts. Both parts power up decoding the same address, so we | ||
| 160 | * need to move one of them first, before doing enything else. | ||
| 161 | * | ||
| 162 | * We also increase the number of wait states for this part by one. | ||
| 163 | */ | ||
| 164 | |||
| 165 | void smc_remap(unsigned int ioaddr) | ||
| 166 | { | ||
| 167 | static int once = 0; | ||
| 168 | extern unsigned short ppdata; | ||
| 169 | if (once++ == 0) { | ||
| 170 | *((volatile unsigned short *)MCFSIM_PADDR) = 0x00ec; | ||
| 171 | ppdata |= 0x0080; | ||
| 172 | *((volatile unsigned short *)MCFSIM_PADAT) = ppdata; | ||
| 173 | outw(0x0001, ioaddr + BANK_SELECT); | ||
| 174 | outw(0x0001, ioaddr + BANK_SELECT); | ||
| 175 | outw(0x0067, ioaddr + BASE); | ||
| 176 | |||
| 177 | ppdata &= ~0x0080; | ||
| 178 | *((volatile unsigned short *)MCFSIM_PADAT) = ppdata; | ||
| 179 | } | ||
| 180 | |||
| 181 | *((volatile unsigned short *)(MCF_MBAR+MCFSIM_CSCR3)) = 0x1180; | ||
| 182 | } | ||
| 183 | |||
| 184 | #endif | ||
| 185 | |||
| 186 | /****************************************************************************/ | ||
| 187 | #endif /* mcfsmc_h */ | ||
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h index cbd3d4751dd2..7a6a7590cc02 100644 --- a/arch/m68k/include/asm/processor.h +++ b/arch/m68k/include/asm/processor.h | |||
| @@ -44,11 +44,15 @@ static inline void wrusp(unsigned long usp) | |||
| 44 | * User space process size: 3.75GB. This is hardcoded into a few places, | 44 | * User space process size: 3.75GB. This is hardcoded into a few places, |
| 45 | * so don't change it unless you know what you are doing. | 45 | * so don't change it unless you know what you are doing. |
| 46 | */ | 46 | */ |
| 47 | #ifdef CONFIG_MMU | ||
| 47 | #ifndef CONFIG_SUN3 | 48 | #ifndef CONFIG_SUN3 |
| 48 | #define TASK_SIZE (0xF0000000UL) | 49 | #define TASK_SIZE (0xF0000000UL) |
| 49 | #else | 50 | #else |
| 50 | #define TASK_SIZE (0x0E000000UL) | 51 | #define TASK_SIZE (0x0E000000UL) |
| 51 | #endif | 52 | #endif |
| 53 | #else | ||
| 54 | #define TASK_SIZE (0xFFFFFFFFUL) | ||
| 55 | #endif | ||
| 52 | 56 | ||
| 53 | #ifdef __KERNEL__ | 57 | #ifdef __KERNEL__ |
| 54 | #define STACK_TOP TASK_SIZE | 58 | #define STACK_TOP TASK_SIZE |
diff --git a/arch/m68k/include/asm/scatterlist.h b/arch/m68k/include/asm/scatterlist.h index e27ad902b1cf..175da06c6b95 100644 --- a/arch/m68k/include/asm/scatterlist.h +++ b/arch/m68k/include/asm/scatterlist.h | |||
| @@ -1,23 +1,9 @@ | |||
| 1 | #ifndef _M68K_SCATTERLIST_H | 1 | #ifndef _M68K_SCATTERLIST_H |
| 2 | #define _M68K_SCATTERLIST_H | 2 | #define _M68K_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <linux/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | unsigned int length; | ||
| 13 | |||
| 14 | dma_addr_t dma_address; /* A place to hang host-specific addresses at. */ | ||
| 15 | }; | ||
| 16 | 5 | ||
| 17 | /* This is bogus and should go away. */ | 6 | /* This is bogus and should go away. */ |
| 18 | #define ISA_DMA_THRESHOLD (0x00ffffff) | 7 | #define ISA_DMA_THRESHOLD (0x00ffffff) |
| 19 | 8 | ||
| 20 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 21 | #define sg_dma_len(sg) ((sg)->length) | ||
| 22 | |||
| 23 | #endif /* !(_M68K_SCATTERLIST_H) */ | 9 | #endif /* !(_M68K_SCATTERLIST_H) */ |
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index 064f5913db1a..efeb6033fc17 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig | |||
| @@ -566,7 +566,7 @@ config RAMBASE | |||
| 566 | processor address space. | 566 | processor address space. |
| 567 | 567 | ||
| 568 | config RAMSIZE | 568 | config RAMSIZE |
| 569 | hex "Size of RAM (in bytes)" | 569 | hex "Size of RAM (in bytes), or 0 for automatic" |
| 570 | default "0x400000" | 570 | default "0x400000" |
| 571 | help | 571 | help |
| 572 | Define the size of the system RAM. If you select 0 then the | 572 | Define the size of the system RAM. If you select 0 then the |
diff --git a/arch/m68knommu/mm/fault.c b/arch/m68knommu/mm/fault.c index 6f6673cb5829..bc05cf74d9c0 100644 --- a/arch/m68knommu/mm/fault.c +++ b/arch/m68knommu/mm/fault.c | |||
| @@ -2,7 +2,7 @@ | |||
| 2 | * linux/arch/m68knommu/mm/fault.c | 2 | * linux/arch/m68knommu/mm/fault.c |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>, | 4 | * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>, |
| 5 | * Copyright (C) 2000 Lineo, Inc. (www.lineo.com) | 5 | * Copyright (C) 2000 Lineo, Inc. (www.lineo.com) |
| 6 | * | 6 | * |
| 7 | * Based on: | 7 | * Based on: |
| 8 | * | 8 | * |
| @@ -36,7 +36,7 @@ asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, | |||
| 36 | unsigned long error_code) | 36 | unsigned long error_code) |
| 37 | { | 37 | { |
| 38 | #ifdef DEBUG | 38 | #ifdef DEBUG |
| 39 | printk (KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n", | 39 | printk(KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n", |
| 40 | regs->sr, regs->pc, address, error_code); | 40 | regs->sr, regs->pc, address, error_code); |
| 41 | #endif | 41 | #endif |
| 42 | 42 | ||
| @@ -44,11 +44,11 @@ asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, | |||
| 44 | * Oops. The kernel tried to access some bad page. We'll have to | 44 | * Oops. The kernel tried to access some bad page. We'll have to |
| 45 | * terminate things with extreme prejudice. | 45 | * terminate things with extreme prejudice. |
| 46 | */ | 46 | */ |
| 47 | if ((unsigned long) address < PAGE_SIZE) { | 47 | if ((unsigned long) address < PAGE_SIZE) |
| 48 | printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); | 48 | printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); |
| 49 | } else | 49 | else |
| 50 | printk(KERN_ALERT "Unable to handle kernel access"); | 50 | printk(KERN_ALERT "Unable to handle kernel access"); |
| 51 | printk(KERN_ALERT " at virtual address %08lx\n",address); | 51 | printk(KERN_ALERT " at virtual address %08lx\n", address); |
| 52 | die_if_kernel("Oops", regs, error_code); | 52 | die_if_kernel("Oops", regs, error_code); |
| 53 | do_exit(SIGKILL); | 53 | do_exit(SIGKILL); |
| 54 | 54 | ||
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c index 92614de42cd3..71d2ba474c63 100644 --- a/arch/m68knommu/platform/520x/config.c +++ b/arch/m68knommu/platform/520x/config.c | |||
| @@ -15,10 +15,13 @@ | |||
| 15 | #include <linux/param.h> | 15 | #include <linux/param.h> |
| 16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
| 17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
| 18 | #include <linux/spi/spi.h> | ||
| 19 | #include <linux/gpio.h> | ||
| 18 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
| 19 | #include <asm/coldfire.h> | 21 | #include <asm/coldfire.h> |
| 20 | #include <asm/mcfsim.h> | 22 | #include <asm/mcfsim.h> |
| 21 | #include <asm/mcfuart.h> | 23 | #include <asm/mcfuart.h> |
| 24 | #include <asm/mcfqspi.h> | ||
| 22 | 25 | ||
| 23 | /***************************************************************************/ | 26 | /***************************************************************************/ |
| 24 | 27 | ||
| @@ -74,9 +77,152 @@ static struct platform_device m520x_fec = { | |||
| 74 | .resource = m520x_fec_resources, | 77 | .resource = m520x_fec_resources, |
| 75 | }; | 78 | }; |
| 76 | 79 | ||
| 80 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 81 | static struct resource m520x_qspi_resources[] = { | ||
| 82 | { | ||
| 83 | .start = MCFQSPI_IOBASE, | ||
| 84 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 85 | .flags = IORESOURCE_MEM, | ||
| 86 | }, | ||
| 87 | { | ||
| 88 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 89 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 90 | .flags = IORESOURCE_IRQ, | ||
| 91 | }, | ||
| 92 | }; | ||
| 93 | |||
| 94 | #define MCFQSPI_CS0 62 | ||
| 95 | #define MCFQSPI_CS1 63 | ||
| 96 | #define MCFQSPI_CS2 44 | ||
| 97 | |||
| 98 | static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 99 | { | ||
| 100 | int status; | ||
| 101 | |||
| 102 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 103 | if (status) { | ||
| 104 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 105 | goto fail0; | ||
| 106 | } | ||
| 107 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 108 | if (status) { | ||
| 109 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 110 | goto fail1; | ||
| 111 | } | ||
| 112 | |||
| 113 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 114 | if (status) { | ||
| 115 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 116 | goto fail1; | ||
| 117 | } | ||
| 118 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 119 | if (status) { | ||
| 120 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 121 | goto fail2; | ||
| 122 | } | ||
| 123 | |||
| 124 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 125 | if (status) { | ||
| 126 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 127 | goto fail2; | ||
| 128 | } | ||
| 129 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 130 | if (status) { | ||
| 131 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 132 | goto fail3; | ||
| 133 | } | ||
| 134 | |||
| 135 | return 0; | ||
| 136 | |||
| 137 | fail3: | ||
| 138 | gpio_free(MCFQSPI_CS2); | ||
| 139 | fail2: | ||
| 140 | gpio_free(MCFQSPI_CS1); | ||
| 141 | fail1: | ||
| 142 | gpio_free(MCFQSPI_CS0); | ||
| 143 | fail0: | ||
| 144 | return status; | ||
| 145 | } | ||
| 146 | |||
| 147 | static void m520x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 148 | { | ||
| 149 | gpio_free(MCFQSPI_CS2); | ||
| 150 | gpio_free(MCFQSPI_CS1); | ||
| 151 | gpio_free(MCFQSPI_CS0); | ||
| 152 | } | ||
| 153 | |||
| 154 | static void m520x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 155 | u8 chip_select, bool cs_high) | ||
| 156 | { | ||
| 157 | switch (chip_select) { | ||
| 158 | case 0: | ||
| 159 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
| 160 | break; | ||
| 161 | case 1: | ||
| 162 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
| 163 | break; | ||
| 164 | case 2: | ||
| 165 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
| 166 | break; | ||
| 167 | } | ||
| 168 | } | ||
| 169 | |||
| 170 | static void m520x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 171 | u8 chip_select, bool cs_high) | ||
| 172 | { | ||
| 173 | switch (chip_select) { | ||
| 174 | case 0: | ||
| 175 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
| 176 | break; | ||
| 177 | case 1: | ||
| 178 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
| 179 | break; | ||
| 180 | case 2: | ||
| 181 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
| 182 | break; | ||
| 183 | } | ||
| 184 | } | ||
| 185 | |||
| 186 | static struct mcfqspi_cs_control m520x_cs_control = { | ||
| 187 | .setup = m520x_cs_setup, | ||
| 188 | .teardown = m520x_cs_teardown, | ||
| 189 | .select = m520x_cs_select, | ||
| 190 | .deselect = m520x_cs_deselect, | ||
| 191 | }; | ||
| 192 | |||
| 193 | static struct mcfqspi_platform_data m520x_qspi_data = { | ||
| 194 | .bus_num = 0, | ||
| 195 | .num_chipselect = 3, | ||
| 196 | .cs_control = &m520x_cs_control, | ||
| 197 | }; | ||
| 198 | |||
| 199 | static struct platform_device m520x_qspi = { | ||
| 200 | .name = "mcfqspi", | ||
| 201 | .id = 0, | ||
| 202 | .num_resources = ARRAY_SIZE(m520x_qspi_resources), | ||
| 203 | .resource = m520x_qspi_resources, | ||
| 204 | .dev.platform_data = &m520x_qspi_data, | ||
| 205 | }; | ||
| 206 | |||
| 207 | static void __init m520x_qspi_init(void) | ||
| 208 | { | ||
| 209 | u16 par; | ||
| 210 | /* setup Port QS for QSPI with gpio CS control */ | ||
| 211 | writeb(0x3f, MCF_IPSBAR + MCF_GPIO_PAR_QSPI); | ||
| 212 | /* make U1CTS and U2RTS gpio for cs_control */ | ||
| 213 | par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART); | ||
| 214 | par &= 0x00ff; | ||
| 215 | writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART); | ||
| 216 | } | ||
| 217 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 218 | |||
| 219 | |||
| 77 | static struct platform_device *m520x_devices[] __initdata = { | 220 | static struct platform_device *m520x_devices[] __initdata = { |
| 78 | &m520x_uart, | 221 | &m520x_uart, |
| 79 | &m520x_fec, | 222 | &m520x_fec, |
| 223 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 224 | &m520x_qspi, | ||
| 225 | #endif | ||
| 80 | }; | 226 | }; |
| 81 | 227 | ||
| 82 | /***************************************************************************/ | 228 | /***************************************************************************/ |
| @@ -147,6 +293,9 @@ void __init config_BSP(char *commandp, int size) | |||
| 147 | mach_reset = m520x_cpu_reset; | 293 | mach_reset = m520x_cpu_reset; |
| 148 | m520x_uarts_init(); | 294 | m520x_uarts_init(); |
| 149 | m520x_fec_init(); | 295 | m520x_fec_init(); |
| 296 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 297 | m520x_qspi_init(); | ||
| 298 | #endif | ||
| 150 | } | 299 | } |
| 151 | 300 | ||
| 152 | /***************************************************************************/ | 301 | /***************************************************************************/ |
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c index 6ba84f2aa397..8980f6d7715a 100644 --- a/arch/m68knommu/platform/523x/config.c +++ b/arch/m68knommu/platform/523x/config.c | |||
| @@ -16,10 +16,13 @@ | |||
| 16 | #include <linux/param.h> | 16 | #include <linux/param.h> |
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <linux/spi/spi.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 19 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
| 20 | #include <asm/coldfire.h> | 22 | #include <asm/coldfire.h> |
| 21 | #include <asm/mcfsim.h> | 23 | #include <asm/mcfsim.h> |
| 22 | #include <asm/mcfuart.h> | 24 | #include <asm/mcfuart.h> |
| 25 | #include <asm/mcfqspi.h> | ||
| 23 | 26 | ||
| 24 | /***************************************************************************/ | 27 | /***************************************************************************/ |
| 25 | 28 | ||
| @@ -75,9 +78,173 @@ static struct platform_device m523x_fec = { | |||
| 75 | .resource = m523x_fec_resources, | 78 | .resource = m523x_fec_resources, |
| 76 | }; | 79 | }; |
| 77 | 80 | ||
| 81 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 82 | static struct resource m523x_qspi_resources[] = { | ||
| 83 | { | ||
| 84 | .start = MCFQSPI_IOBASE, | ||
| 85 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 86 | .flags = IORESOURCE_MEM, | ||
| 87 | }, | ||
| 88 | { | ||
| 89 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 90 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 91 | .flags = IORESOURCE_IRQ, | ||
| 92 | }, | ||
| 93 | }; | ||
| 94 | |||
| 95 | #define MCFQSPI_CS0 91 | ||
| 96 | #define MCFQSPI_CS1 92 | ||
| 97 | #define MCFQSPI_CS2 103 | ||
| 98 | #define MCFQSPI_CS3 99 | ||
| 99 | |||
| 100 | static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 101 | { | ||
| 102 | int status; | ||
| 103 | |||
| 104 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 105 | if (status) { | ||
| 106 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 107 | goto fail0; | ||
| 108 | } | ||
| 109 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 110 | if (status) { | ||
| 111 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 112 | goto fail1; | ||
| 113 | } | ||
| 114 | |||
| 115 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 116 | if (status) { | ||
| 117 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 118 | goto fail1; | ||
| 119 | } | ||
| 120 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 121 | if (status) { | ||
| 122 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 123 | goto fail2; | ||
| 124 | } | ||
| 125 | |||
| 126 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 127 | if (status) { | ||
| 128 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 129 | goto fail2; | ||
| 130 | } | ||
| 131 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 132 | if (status) { | ||
| 133 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 134 | goto fail3; | ||
| 135 | } | ||
| 136 | |||
| 137 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
| 138 | if (status) { | ||
| 139 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
| 140 | goto fail3; | ||
| 141 | } | ||
| 142 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
| 143 | if (status) { | ||
| 144 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
| 145 | goto fail4; | ||
| 146 | } | ||
| 147 | |||
| 148 | return 0; | ||
| 149 | |||
| 150 | fail4: | ||
| 151 | gpio_free(MCFQSPI_CS3); | ||
| 152 | fail3: | ||
| 153 | gpio_free(MCFQSPI_CS2); | ||
| 154 | fail2: | ||
| 155 | gpio_free(MCFQSPI_CS1); | ||
| 156 | fail1: | ||
| 157 | gpio_free(MCFQSPI_CS0); | ||
| 158 | fail0: | ||
| 159 | return status; | ||
| 160 | } | ||
| 161 | |||
| 162 | static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 163 | { | ||
| 164 | gpio_free(MCFQSPI_CS3); | ||
| 165 | gpio_free(MCFQSPI_CS2); | ||
| 166 | gpio_free(MCFQSPI_CS1); | ||
| 167 | gpio_free(MCFQSPI_CS0); | ||
| 168 | } | ||
| 169 | |||
| 170 | static void m523x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 171 | u8 chip_select, bool cs_high) | ||
| 172 | { | ||
| 173 | switch (chip_select) { | ||
| 174 | case 0: | ||
| 175 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
| 176 | break; | ||
| 177 | case 1: | ||
| 178 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
| 179 | break; | ||
| 180 | case 2: | ||
| 181 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
| 182 | break; | ||
| 183 | case 3: | ||
| 184 | gpio_set_value(MCFQSPI_CS3, cs_high); | ||
| 185 | break; | ||
| 186 | } | ||
| 187 | } | ||
| 188 | |||
| 189 | static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 190 | u8 chip_select, bool cs_high) | ||
| 191 | { | ||
| 192 | switch (chip_select) { | ||
| 193 | case 0: | ||
| 194 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
| 195 | break; | ||
| 196 | case 1: | ||
| 197 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
| 198 | break; | ||
| 199 | case 2: | ||
| 200 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
| 201 | break; | ||
| 202 | case 3: | ||
| 203 | gpio_set_value(MCFQSPI_CS3, !cs_high); | ||
| 204 | break; | ||
| 205 | } | ||
| 206 | } | ||
| 207 | |||
| 208 | static struct mcfqspi_cs_control m523x_cs_control = { | ||
| 209 | .setup = m523x_cs_setup, | ||
| 210 | .teardown = m523x_cs_teardown, | ||
| 211 | .select = m523x_cs_select, | ||
| 212 | .deselect = m523x_cs_deselect, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static struct mcfqspi_platform_data m523x_qspi_data = { | ||
| 216 | .bus_num = 0, | ||
| 217 | .num_chipselect = 4, | ||
| 218 | .cs_control = &m523x_cs_control, | ||
| 219 | }; | ||
| 220 | |||
| 221 | static struct platform_device m523x_qspi = { | ||
| 222 | .name = "mcfqspi", | ||
| 223 | .id = 0, | ||
| 224 | .num_resources = ARRAY_SIZE(m523x_qspi_resources), | ||
| 225 | .resource = m523x_qspi_resources, | ||
| 226 | .dev.platform_data = &m523x_qspi_data, | ||
| 227 | }; | ||
| 228 | |||
| 229 | static void __init m523x_qspi_init(void) | ||
| 230 | { | ||
| 231 | u16 par; | ||
| 232 | |||
| 233 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
| 234 | writeb(0x1f, MCFGPIO_PAR_QSPI); | ||
| 235 | /* and CS2 & CS3 as gpio */ | ||
| 236 | par = readw(MCFGPIO_PAR_TIMER); | ||
| 237 | par &= 0x3f3f; | ||
| 238 | writew(par, MCFGPIO_PAR_TIMER); | ||
| 239 | } | ||
| 240 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 241 | |||
| 78 | static struct platform_device *m523x_devices[] __initdata = { | 242 | static struct platform_device *m523x_devices[] __initdata = { |
| 79 | &m523x_uart, | 243 | &m523x_uart, |
| 80 | &m523x_fec, | 244 | &m523x_fec, |
| 245 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 246 | &m523x_qspi, | ||
| 247 | #endif | ||
| 81 | }; | 248 | }; |
| 82 | 249 | ||
| 83 | /***************************************************************************/ | 250 | /***************************************************************************/ |
| @@ -114,6 +281,9 @@ void __init config_BSP(char *commandp, int size) | |||
| 114 | static int __init init_BSP(void) | 281 | static int __init init_BSP(void) |
| 115 | { | 282 | { |
| 116 | m523x_fec_init(); | 283 | m523x_fec_init(); |
| 284 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 285 | m523x_qspi_init(); | ||
| 286 | #endif | ||
| 117 | platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices)); | 287 | platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices)); |
| 118 | return 0; | 288 | return 0; |
| 119 | } | 289 | } |
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c index 646f5ba462fc..ceb31e5744a6 100644 --- a/arch/m68knommu/platform/5249/config.c +++ b/arch/m68knommu/platform/5249/config.c | |||
| @@ -12,10 +12,13 @@ | |||
| 12 | #include <linux/param.h> | 12 | #include <linux/param.h> |
| 13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
| 14 | #include <linux/io.h> | 14 | #include <linux/io.h> |
| 15 | #include <linux/spi/spi.h> | ||
| 16 | #include <linux/gpio.h> | ||
| 15 | #include <asm/machdep.h> | 17 | #include <asm/machdep.h> |
| 16 | #include <asm/coldfire.h> | 18 | #include <asm/coldfire.h> |
| 17 | #include <asm/mcfsim.h> | 19 | #include <asm/mcfsim.h> |
| 18 | #include <asm/mcfuart.h> | 20 | #include <asm/mcfuart.h> |
| 21 | #include <asm/mcfqspi.h> | ||
| 19 | 22 | ||
| 20 | /***************************************************************************/ | 23 | /***************************************************************************/ |
| 21 | 24 | ||
| @@ -37,8 +40,196 @@ static struct platform_device m5249_uart = { | |||
| 37 | .dev.platform_data = m5249_uart_platform, | 40 | .dev.platform_data = m5249_uart_platform, |
| 38 | }; | 41 | }; |
| 39 | 42 | ||
| 43 | #ifdef CONFIG_M5249C3 | ||
| 44 | |||
| 45 | static struct resource m5249_smc91x_resources[] = { | ||
| 46 | { | ||
| 47 | .start = 0xe0000300, | ||
| 48 | .end = 0xe0000300 + 0x100, | ||
| 49 | .flags = IORESOURCE_MEM, | ||
| 50 | }, | ||
| 51 | { | ||
| 52 | .start = MCFINTC2_GPIOIRQ6, | ||
| 53 | .end = MCFINTC2_GPIOIRQ6, | ||
| 54 | .flags = IORESOURCE_IRQ, | ||
| 55 | }, | ||
| 56 | }; | ||
| 57 | |||
| 58 | static struct platform_device m5249_smc91x = { | ||
| 59 | .name = "smc91x", | ||
| 60 | .id = 0, | ||
| 61 | .num_resources = ARRAY_SIZE(m5249_smc91x_resources), | ||
| 62 | .resource = m5249_smc91x_resources, | ||
| 63 | }; | ||
| 64 | |||
| 65 | #endif /* CONFIG_M5249C3 */ | ||
| 66 | |||
| 67 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 68 | static struct resource m5249_qspi_resources[] = { | ||
| 69 | { | ||
| 70 | .start = MCFQSPI_IOBASE, | ||
| 71 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 72 | .flags = IORESOURCE_MEM, | ||
| 73 | }, | ||
| 74 | { | ||
| 75 | .start = MCF_IRQ_QSPI, | ||
| 76 | .end = MCF_IRQ_QSPI, | ||
| 77 | .flags = IORESOURCE_IRQ, | ||
| 78 | }, | ||
| 79 | }; | ||
| 80 | |||
| 81 | #define MCFQSPI_CS0 29 | ||
| 82 | #define MCFQSPI_CS1 24 | ||
| 83 | #define MCFQSPI_CS2 21 | ||
| 84 | #define MCFQSPI_CS3 22 | ||
| 85 | |||
| 86 | static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 87 | { | ||
| 88 | int status; | ||
| 89 | |||
| 90 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 91 | if (status) { | ||
| 92 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 93 | goto fail0; | ||
| 94 | } | ||
| 95 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 96 | if (status) { | ||
| 97 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 98 | goto fail1; | ||
| 99 | } | ||
| 100 | |||
| 101 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 102 | if (status) { | ||
| 103 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 104 | goto fail1; | ||
| 105 | } | ||
| 106 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 107 | if (status) { | ||
| 108 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 109 | goto fail2; | ||
| 110 | } | ||
| 111 | |||
| 112 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 113 | if (status) { | ||
| 114 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 115 | goto fail2; | ||
| 116 | } | ||
| 117 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 118 | if (status) { | ||
| 119 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 120 | goto fail3; | ||
| 121 | } | ||
| 122 | |||
| 123 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
| 124 | if (status) { | ||
| 125 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
| 126 | goto fail3; | ||
| 127 | } | ||
| 128 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
| 129 | if (status) { | ||
| 130 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
| 131 | goto fail4; | ||
| 132 | } | ||
| 133 | |||
| 134 | return 0; | ||
| 135 | |||
| 136 | fail4: | ||
| 137 | gpio_free(MCFQSPI_CS3); | ||
| 138 | fail3: | ||
| 139 | gpio_free(MCFQSPI_CS2); | ||
| 140 | fail2: | ||
| 141 | gpio_free(MCFQSPI_CS1); | ||
| 142 | fail1: | ||
| 143 | gpio_free(MCFQSPI_CS0); | ||
| 144 | fail0: | ||
| 145 | return status; | ||
| 146 | } | ||
| 147 | |||
| 148 | static void m5249_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 149 | { | ||
| 150 | gpio_free(MCFQSPI_CS3); | ||
| 151 | gpio_free(MCFQSPI_CS2); | ||
| 152 | gpio_free(MCFQSPI_CS1); | ||
| 153 | gpio_free(MCFQSPI_CS0); | ||
| 154 | } | ||
| 155 | |||
| 156 | static void m5249_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 157 | u8 chip_select, bool cs_high) | ||
| 158 | { | ||
| 159 | switch (chip_select) { | ||
| 160 | case 0: | ||
| 161 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
| 162 | break; | ||
| 163 | case 1: | ||
| 164 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
| 165 | break; | ||
| 166 | case 2: | ||
| 167 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
| 168 | break; | ||
| 169 | case 3: | ||
| 170 | gpio_set_value(MCFQSPI_CS3, cs_high); | ||
| 171 | break; | ||
| 172 | } | ||
| 173 | } | ||
| 174 | |||
| 175 | static void m5249_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 176 | u8 chip_select, bool cs_high) | ||
| 177 | { | ||
| 178 | switch (chip_select) { | ||
| 179 | case 0: | ||
| 180 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
| 181 | break; | ||
| 182 | case 1: | ||
| 183 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
| 184 | break; | ||
| 185 | case 2: | ||
| 186 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
| 187 | break; | ||
| 188 | case 3: | ||
| 189 | gpio_set_value(MCFQSPI_CS3, !cs_high); | ||
| 190 | break; | ||
| 191 | } | ||
| 192 | } | ||
| 193 | |||
| 194 | static struct mcfqspi_cs_control m5249_cs_control = { | ||
| 195 | .setup = m5249_cs_setup, | ||
| 196 | .teardown = m5249_cs_teardown, | ||
| 197 | .select = m5249_cs_select, | ||
| 198 | .deselect = m5249_cs_deselect, | ||
| 199 | }; | ||
| 200 | |||
| 201 | static struct mcfqspi_platform_data m5249_qspi_data = { | ||
| 202 | .bus_num = 0, | ||
| 203 | .num_chipselect = 4, | ||
| 204 | .cs_control = &m5249_cs_control, | ||
| 205 | }; | ||
| 206 | |||
| 207 | static struct platform_device m5249_qspi = { | ||
| 208 | .name = "mcfqspi", | ||
| 209 | .id = 0, | ||
| 210 | .num_resources = ARRAY_SIZE(m5249_qspi_resources), | ||
| 211 | .resource = m5249_qspi_resources, | ||
| 212 | .dev.platform_data = &m5249_qspi_data, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static void __init m5249_qspi_init(void) | ||
| 216 | { | ||
| 217 | /* QSPI irq setup */ | ||
| 218 | writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, | ||
| 219 | MCF_MBAR + MCFSIM_QSPIICR); | ||
| 220 | mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); | ||
| 221 | } | ||
| 222 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 223 | |||
| 224 | |||
| 40 | static struct platform_device *m5249_devices[] __initdata = { | 225 | static struct platform_device *m5249_devices[] __initdata = { |
| 41 | &m5249_uart, | 226 | &m5249_uart, |
| 227 | #ifdef CONFIG_M5249C3 | ||
| 228 | &m5249_smc91x, | ||
| 229 | #endif | ||
| 230 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 231 | &m5249_qspi, | ||
| 232 | #endif | ||
| 42 | }; | 233 | }; |
| 43 | 234 | ||
| 44 | /***************************************************************************/ | 235 | /***************************************************************************/ |
| @@ -67,6 +258,24 @@ static void __init m5249_uarts_init(void) | |||
| 67 | 258 | ||
| 68 | /***************************************************************************/ | 259 | /***************************************************************************/ |
| 69 | 260 | ||
| 261 | #ifdef CONFIG_M5249C3 | ||
| 262 | |||
| 263 | static void __init m5249_smc91x_init(void) | ||
| 264 | { | ||
| 265 | u32 gpio; | ||
| 266 | |||
| 267 | /* Set the GPIO line as interrupt source for smc91x device */ | ||
| 268 | gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | ||
| 269 | writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); | ||
| 270 | |||
| 271 | gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5); | ||
| 272 | writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5); | ||
| 273 | } | ||
| 274 | |||
| 275 | #endif /* CONFIG_M5249C3 */ | ||
| 276 | |||
| 277 | /***************************************************************************/ | ||
| 278 | |||
| 70 | static void __init m5249_timers_init(void) | 279 | static void __init m5249_timers_init(void) |
| 71 | { | 280 | { |
| 72 | /* Timer1 is always used as system timer */ | 281 | /* Timer1 is always used as system timer */ |
| @@ -100,6 +309,12 @@ void __init config_BSP(char *commandp, int size) | |||
| 100 | mach_reset = m5249_cpu_reset; | 309 | mach_reset = m5249_cpu_reset; |
| 101 | m5249_timers_init(); | 310 | m5249_timers_init(); |
| 102 | m5249_uarts_init(); | 311 | m5249_uarts_init(); |
| 312 | #ifdef CONFIG_M5249C3 | ||
| 313 | m5249_smc91x_init(); | ||
| 314 | #endif | ||
| 315 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 316 | m5249_qspi_init(); | ||
| 317 | #endif | ||
| 103 | } | 318 | } |
| 104 | 319 | ||
| 105 | /***************************************************************************/ | 320 | /***************************************************************************/ |
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c index fa51be172830..3d9c35c98b98 100644 --- a/arch/m68knommu/platform/527x/config.c +++ b/arch/m68knommu/platform/527x/config.c | |||
| @@ -16,10 +16,13 @@ | |||
| 16 | #include <linux/param.h> | 16 | #include <linux/param.h> |
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
| 19 | #include <linux/spi/spi.h> | ||
| 20 | #include <linux/gpio.h> | ||
| 19 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
| 20 | #include <asm/coldfire.h> | 22 | #include <asm/coldfire.h> |
| 21 | #include <asm/mcfsim.h> | 23 | #include <asm/mcfsim.h> |
| 22 | #include <asm/mcfuart.h> | 24 | #include <asm/mcfuart.h> |
| 25 | #include <asm/mcfqspi.h> | ||
| 23 | 26 | ||
| 24 | /***************************************************************************/ | 27 | /***************************************************************************/ |
| 25 | 28 | ||
| @@ -106,12 +109,188 @@ static struct platform_device m527x_fec[] = { | |||
| 106 | }, | 109 | }, |
| 107 | }; | 110 | }; |
| 108 | 111 | ||
| 112 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 113 | static struct resource m527x_qspi_resources[] = { | ||
| 114 | { | ||
| 115 | .start = MCFQSPI_IOBASE, | ||
| 116 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 117 | .flags = IORESOURCE_MEM, | ||
| 118 | }, | ||
| 119 | { | ||
| 120 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 121 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 122 | .flags = IORESOURCE_IRQ, | ||
| 123 | }, | ||
| 124 | }; | ||
| 125 | |||
| 126 | #if defined(CONFIG_M5271) | ||
| 127 | #define MCFQSPI_CS0 91 | ||
| 128 | #define MCFQSPI_CS1 92 | ||
| 129 | #define MCFQSPI_CS2 99 | ||
| 130 | #define MCFQSPI_CS3 103 | ||
| 131 | #elif defined(CONFIG_M5275) | ||
| 132 | #define MCFQSPI_CS0 59 | ||
| 133 | #define MCFQSPI_CS1 60 | ||
| 134 | #define MCFQSPI_CS2 61 | ||
| 135 | #define MCFQSPI_CS3 62 | ||
| 136 | #endif | ||
| 137 | |||
| 138 | static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 139 | { | ||
| 140 | int status; | ||
| 141 | |||
| 142 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 143 | if (status) { | ||
| 144 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 145 | goto fail0; | ||
| 146 | } | ||
| 147 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 148 | if (status) { | ||
| 149 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 150 | goto fail1; | ||
| 151 | } | ||
| 152 | |||
| 153 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 154 | if (status) { | ||
| 155 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 156 | goto fail1; | ||
| 157 | } | ||
| 158 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 159 | if (status) { | ||
| 160 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 161 | goto fail2; | ||
| 162 | } | ||
| 163 | |||
| 164 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 165 | if (status) { | ||
| 166 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 167 | goto fail2; | ||
| 168 | } | ||
| 169 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 170 | if (status) { | ||
| 171 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 172 | goto fail3; | ||
| 173 | } | ||
| 174 | |||
| 175 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
| 176 | if (status) { | ||
| 177 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
| 178 | goto fail3; | ||
| 179 | } | ||
| 180 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
| 181 | if (status) { | ||
| 182 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
| 183 | goto fail4; | ||
| 184 | } | ||
| 185 | |||
| 186 | return 0; | ||
| 187 | |||
| 188 | fail4: | ||
| 189 | gpio_free(MCFQSPI_CS3); | ||
| 190 | fail3: | ||
| 191 | gpio_free(MCFQSPI_CS2); | ||
| 192 | fail2: | ||
| 193 | gpio_free(MCFQSPI_CS1); | ||
| 194 | fail1: | ||
| 195 | gpio_free(MCFQSPI_CS0); | ||
| 196 | fail0: | ||
| 197 | return status; | ||
| 198 | } | ||
| 199 | |||
| 200 | static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 201 | { | ||
| 202 | gpio_free(MCFQSPI_CS3); | ||
| 203 | gpio_free(MCFQSPI_CS2); | ||
| 204 | gpio_free(MCFQSPI_CS1); | ||
| 205 | gpio_free(MCFQSPI_CS0); | ||
| 206 | } | ||
| 207 | |||
| 208 | static void m527x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 209 | u8 chip_select, bool cs_high) | ||
| 210 | { | ||
| 211 | switch (chip_select) { | ||
| 212 | case 0: | ||
| 213 | gpio_set_value(MCFQSPI_CS0, cs_high); | ||
| 214 | break; | ||
| 215 | case 1: | ||
| 216 | gpio_set_value(MCFQSPI_CS1, cs_high); | ||
| 217 | break; | ||
| 218 | case 2: | ||
| 219 | gpio_set_value(MCFQSPI_CS2, cs_high); | ||
| 220 | break; | ||
| 221 | case 3: | ||
| 222 | gpio_set_value(MCFQSPI_CS3, cs_high); | ||
| 223 | break; | ||
| 224 | } | ||
| 225 | } | ||
| 226 | |||
| 227 | static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 228 | u8 chip_select, bool cs_high) | ||
| 229 | { | ||
| 230 | switch (chip_select) { | ||
| 231 | case 0: | ||
| 232 | gpio_set_value(MCFQSPI_CS0, !cs_high); | ||
| 233 | break; | ||
| 234 | case 1: | ||
| 235 | gpio_set_value(MCFQSPI_CS1, !cs_high); | ||
| 236 | break; | ||
| 237 | case 2: | ||
| 238 | gpio_set_value(MCFQSPI_CS2, !cs_high); | ||
| 239 | break; | ||
| 240 | case 3: | ||
| 241 | gpio_set_value(MCFQSPI_CS3, !cs_high); | ||
| 242 | break; | ||
| 243 | } | ||
| 244 | } | ||
| 245 | |||
| 246 | static struct mcfqspi_cs_control m527x_cs_control = { | ||
| 247 | .setup = m527x_cs_setup, | ||
| 248 | .teardown = m527x_cs_teardown, | ||
| 249 | .select = m527x_cs_select, | ||
| 250 | .deselect = m527x_cs_deselect, | ||
| 251 | }; | ||
| 252 | |||
| 253 | static struct mcfqspi_platform_data m527x_qspi_data = { | ||
| 254 | .bus_num = 0, | ||
| 255 | .num_chipselect = 4, | ||
| 256 | .cs_control = &m527x_cs_control, | ||
| 257 | }; | ||
| 258 | |||
| 259 | static struct platform_device m527x_qspi = { | ||
| 260 | .name = "mcfqspi", | ||
| 261 | .id = 0, | ||
| 262 | .num_resources = ARRAY_SIZE(m527x_qspi_resources), | ||
| 263 | .resource = m527x_qspi_resources, | ||
| 264 | .dev.platform_data = &m527x_qspi_data, | ||
| 265 | }; | ||
| 266 | |||
| 267 | static void __init m527x_qspi_init(void) | ||
| 268 | { | ||
| 269 | #if defined(CONFIG_M5271) | ||
| 270 | u16 par; | ||
| 271 | |||
| 272 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
| 273 | writeb(0x1f, MCFGPIO_PAR_QSPI); | ||
| 274 | /* and CS2 & CS3 as gpio */ | ||
| 275 | par = readw(MCFGPIO_PAR_TIMER); | ||
| 276 | par &= 0x3f3f; | ||
| 277 | writew(par, MCFGPIO_PAR_TIMER); | ||
| 278 | #elif defined(CONFIG_M5275) | ||
| 279 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
| 280 | writew(0x003e, MCFGPIO_PAR_QSPI); | ||
| 281 | #endif | ||
| 282 | } | ||
| 283 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 284 | |||
| 109 | static struct platform_device *m527x_devices[] __initdata = { | 285 | static struct platform_device *m527x_devices[] __initdata = { |
| 110 | &m527x_uart, | 286 | &m527x_uart, |
| 111 | &m527x_fec[0], | 287 | &m527x_fec[0], |
| 112 | #ifdef CONFIG_FEC2 | 288 | #ifdef CONFIG_FEC2 |
| 113 | &m527x_fec[1], | 289 | &m527x_fec[1], |
| 114 | #endif | 290 | #endif |
| 291 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 292 | &m527x_qspi, | ||
| 293 | #endif | ||
| 115 | }; | 294 | }; |
| 116 | 295 | ||
| 117 | /***************************************************************************/ | 296 | /***************************************************************************/ |
| @@ -187,6 +366,9 @@ void __init config_BSP(char *commandp, int size) | |||
| 187 | mach_reset = m527x_cpu_reset; | 366 | mach_reset = m527x_cpu_reset; |
| 188 | m527x_uarts_init(); | 367 | m527x_uarts_init(); |
| 189 | m527x_fec_init(); | 368 | m527x_fec_init(); |
| 369 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 370 | m527x_qspi_init(); | ||
| 371 | #endif | ||
| 190 | } | 372 | } |
| 191 | 373 | ||
| 192 | /***************************************************************************/ | 374 | /***************************************************************************/ |
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c index 6e608d1836f1..76b743343bfa 100644 --- a/arch/m68knommu/platform/528x/config.c +++ b/arch/m68knommu/platform/528x/config.c | |||
| @@ -17,10 +17,13 @@ | |||
| 17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
| 18 | #include <linux/platform_device.h> | 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
| 20 | #include <linux/spi/spi.h> | ||
| 21 | #include <linux/gpio.h> | ||
| 20 | #include <asm/machdep.h> | 22 | #include <asm/machdep.h> |
| 21 | #include <asm/coldfire.h> | 23 | #include <asm/coldfire.h> |
| 22 | #include <asm/mcfsim.h> | 24 | #include <asm/mcfsim.h> |
| 23 | #include <asm/mcfuart.h> | 25 | #include <asm/mcfuart.h> |
| 26 | #include <asm/mcfqspi.h> | ||
| 24 | 27 | ||
| 25 | /***************************************************************************/ | 28 | /***************************************************************************/ |
| 26 | 29 | ||
| @@ -76,10 +79,141 @@ static struct platform_device m528x_fec = { | |||
| 76 | .resource = m528x_fec_resources, | 79 | .resource = m528x_fec_resources, |
| 77 | }; | 80 | }; |
| 78 | 81 | ||
| 82 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 83 | static struct resource m528x_qspi_resources[] = { | ||
| 84 | { | ||
| 85 | .start = MCFQSPI_IOBASE, | ||
| 86 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 87 | .flags = IORESOURCE_MEM, | ||
| 88 | }, | ||
| 89 | { | ||
| 90 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 91 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 92 | .flags = IORESOURCE_IRQ, | ||
| 93 | }, | ||
| 94 | }; | ||
| 95 | |||
| 96 | #define MCFQSPI_CS0 147 | ||
| 97 | #define MCFQSPI_CS1 148 | ||
| 98 | #define MCFQSPI_CS2 149 | ||
| 99 | #define MCFQSPI_CS3 150 | ||
| 100 | |||
| 101 | static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 102 | { | ||
| 103 | int status; | ||
| 104 | |||
| 105 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 106 | if (status) { | ||
| 107 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 108 | goto fail0; | ||
| 109 | } | ||
| 110 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 111 | if (status) { | ||
| 112 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 113 | goto fail1; | ||
| 114 | } | ||
| 115 | |||
| 116 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 117 | if (status) { | ||
| 118 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 119 | goto fail1; | ||
| 120 | } | ||
| 121 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 122 | if (status) { | ||
| 123 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 124 | goto fail2; | ||
| 125 | } | ||
| 126 | |||
| 127 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 128 | if (status) { | ||
| 129 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 130 | goto fail2; | ||
| 131 | } | ||
| 132 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 133 | if (status) { | ||
| 134 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 135 | goto fail3; | ||
| 136 | } | ||
| 137 | |||
| 138 | status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3"); | ||
| 139 | if (status) { | ||
| 140 | pr_debug("gpio_request for MCFQSPI_CS3 failed\n"); | ||
| 141 | goto fail3; | ||
| 142 | } | ||
| 143 | status = gpio_direction_output(MCFQSPI_CS3, 1); | ||
| 144 | if (status) { | ||
| 145 | pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n"); | ||
| 146 | goto fail4; | ||
| 147 | } | ||
| 148 | |||
| 149 | return 0; | ||
| 150 | |||
| 151 | fail4: | ||
| 152 | gpio_free(MCFQSPI_CS3); | ||
| 153 | fail3: | ||
| 154 | gpio_free(MCFQSPI_CS2); | ||
| 155 | fail2: | ||
| 156 | gpio_free(MCFQSPI_CS1); | ||
| 157 | fail1: | ||
| 158 | gpio_free(MCFQSPI_CS0); | ||
| 159 | fail0: | ||
| 160 | return status; | ||
| 161 | } | ||
| 162 | |||
| 163 | static void m528x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 164 | { | ||
| 165 | gpio_free(MCFQSPI_CS3); | ||
| 166 | gpio_free(MCFQSPI_CS2); | ||
| 167 | gpio_free(MCFQSPI_CS1); | ||
| 168 | gpio_free(MCFQSPI_CS0); | ||
| 169 | } | ||
| 170 | |||
| 171 | static void m528x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 172 | u8 chip_select, bool cs_high) | ||
| 173 | { | ||
| 174 | gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); | ||
| 175 | } | ||
| 176 | |||
| 177 | static void m528x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 178 | u8 chip_select, bool cs_high) | ||
| 179 | { | ||
| 180 | gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); | ||
| 181 | } | ||
| 182 | |||
| 183 | static struct mcfqspi_cs_control m528x_cs_control = { | ||
| 184 | .setup = m528x_cs_setup, | ||
| 185 | .teardown = m528x_cs_teardown, | ||
| 186 | .select = m528x_cs_select, | ||
| 187 | .deselect = m528x_cs_deselect, | ||
| 188 | }; | ||
| 189 | |||
| 190 | static struct mcfqspi_platform_data m528x_qspi_data = { | ||
| 191 | .bus_num = 0, | ||
| 192 | .num_chipselect = 4, | ||
| 193 | .cs_control = &m528x_cs_control, | ||
| 194 | }; | ||
| 195 | |||
| 196 | static struct platform_device m528x_qspi = { | ||
| 197 | .name = "mcfqspi", | ||
| 198 | .id = 0, | ||
| 199 | .num_resources = ARRAY_SIZE(m528x_qspi_resources), | ||
| 200 | .resource = m528x_qspi_resources, | ||
| 201 | .dev.platform_data = &m528x_qspi_data, | ||
| 202 | }; | ||
| 203 | |||
| 204 | static void __init m528x_qspi_init(void) | ||
| 205 | { | ||
| 206 | /* setup Port QS for QSPI with gpio CS control */ | ||
| 207 | __raw_writeb(0x07, MCFGPIO_PQSPAR); | ||
| 208 | } | ||
| 209 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 79 | 210 | ||
| 80 | static struct platform_device *m528x_devices[] __initdata = { | 211 | static struct platform_device *m528x_devices[] __initdata = { |
| 81 | &m528x_uart, | 212 | &m528x_uart, |
| 82 | &m528x_fec, | 213 | &m528x_fec, |
| 214 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 215 | &m528x_qspi, | ||
| 216 | #endif | ||
| 83 | }; | 217 | }; |
| 84 | 218 | ||
| 85 | /***************************************************************************/ | 219 | /***************************************************************************/ |
| @@ -174,6 +308,9 @@ static int __init init_BSP(void) | |||
| 174 | mach_reset = m528x_cpu_reset; | 308 | mach_reset = m528x_cpu_reset; |
| 175 | m528x_uarts_init(); | 309 | m528x_uarts_init(); |
| 176 | m528x_fec_init(); | 310 | m528x_fec_init(); |
| 311 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 312 | m528x_qspi_init(); | ||
| 313 | #endif | ||
| 177 | platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices)); | 314 | platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices)); |
| 178 | return 0; | 315 | return 0; |
| 179 | } | 316 | } |
diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile index 667db6598451..6de526976828 100644 --- a/arch/m68knommu/platform/5307/Makefile +++ b/arch/m68knommu/platform/5307/Makefile | |||
| @@ -14,5 +14,7 @@ | |||
| 14 | 14 | ||
| 15 | asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 | 15 | asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 |
| 16 | 16 | ||
| 17 | obj-y += config.o gpio.o | 17 | obj-y += config.o gpio.o |
| 18 | obj-$(CONFIG_NETtel) += nettel.o | ||
| 19 | obj-$(CONFIG_CLEOPATRA) += nettel.o | ||
| 18 | 20 | ||
diff --git a/arch/m68knommu/platform/5307/nettel.c b/arch/m68knommu/platform/5307/nettel.c new file mode 100644 index 000000000000..e925ea4602f8 --- /dev/null +++ b/arch/m68knommu/platform/5307/nettel.c | |||
| @@ -0,0 +1,153 @@ | |||
| 1 | /***************************************************************************/ | ||
| 2 | |||
| 3 | /* | ||
| 4 | * nettel.c -- startup code support for the NETtel boards | ||
| 5 | * | ||
| 6 | * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com) | ||
| 7 | */ | ||
| 8 | |||
| 9 | /***************************************************************************/ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <linux/param.h> | ||
| 13 | #include <linux/init.h> | ||
| 14 | #include <linux/io.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #include <asm/coldfire.h> | ||
| 17 | #include <asm/mcfsim.h> | ||
| 18 | #include <asm/nettel.h> | ||
| 19 | |||
| 20 | /***************************************************************************/ | ||
| 21 | |||
| 22 | /* | ||
| 23 | * Define the IO and interrupt resources of the 2 SMC9196 interfaces. | ||
| 24 | */ | ||
| 25 | #define NETTEL_SMC0_ADDR 0x30600300 | ||
| 26 | #define NETTEL_SMC0_IRQ 29 | ||
| 27 | |||
| 28 | #define NETTEL_SMC1_ADDR 0x30600000 | ||
| 29 | #define NETTEL_SMC1_IRQ 27 | ||
| 30 | |||
| 31 | /* | ||
| 32 | * We need some access into the SMC9196 registers. Define those registers | ||
| 33 | * we will need here (including the smc91x.h doesn't seem to give us these | ||
| 34 | * in a simple form). | ||
| 35 | */ | ||
| 36 | #define SMC91xx_BANKSELECT 14 | ||
| 37 | #define SMC91xx_BASEADDR 2 | ||
| 38 | #define SMC91xx_BASEMAC 4 | ||
| 39 | |||
| 40 | /***************************************************************************/ | ||
| 41 | |||
| 42 | static struct resource nettel_smc91x_0_resources[] = { | ||
| 43 | { | ||
| 44 | .start = NETTEL_SMC0_ADDR, | ||
| 45 | .end = NETTEL_SMC0_ADDR + 0x20, | ||
| 46 | .flags = IORESOURCE_MEM, | ||
| 47 | }, | ||
| 48 | { | ||
| 49 | .start = NETTEL_SMC0_IRQ, | ||
| 50 | .end = NETTEL_SMC0_IRQ, | ||
| 51 | .flags = IORESOURCE_IRQ, | ||
| 52 | }, | ||
| 53 | }; | ||
| 54 | |||
| 55 | static struct resource nettel_smc91x_1_resources[] = { | ||
| 56 | { | ||
| 57 | .start = NETTEL_SMC1_ADDR, | ||
| 58 | .end = NETTEL_SMC1_ADDR + 0x20, | ||
| 59 | .flags = IORESOURCE_MEM, | ||
| 60 | }, | ||
| 61 | { | ||
| 62 | .start = NETTEL_SMC1_IRQ, | ||
| 63 | .end = NETTEL_SMC1_IRQ, | ||
| 64 | .flags = IORESOURCE_IRQ, | ||
| 65 | }, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct platform_device nettel_smc91x[] = { | ||
| 69 | { | ||
| 70 | .name = "smc91x", | ||
| 71 | .id = 0, | ||
| 72 | .num_resources = ARRAY_SIZE(nettel_smc91x_0_resources), | ||
| 73 | .resource = nettel_smc91x_0_resources, | ||
| 74 | }, | ||
| 75 | { | ||
| 76 | .name = "smc91x", | ||
| 77 | .id = 1, | ||
| 78 | .num_resources = ARRAY_SIZE(nettel_smc91x_1_resources), | ||
| 79 | .resource = nettel_smc91x_1_resources, | ||
| 80 | }, | ||
| 81 | }; | ||
| 82 | |||
| 83 | static struct platform_device *nettel_devices[] __initdata = { | ||
| 84 | &nettel_smc91x[0], | ||
| 85 | &nettel_smc91x[1], | ||
| 86 | }; | ||
| 87 | |||
| 88 | /***************************************************************************/ | ||
| 89 | |||
| 90 | static u8 nettel_macdefault[] __initdata = { | ||
| 91 | 0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01, | ||
| 92 | }; | ||
| 93 | |||
| 94 | /* | ||
| 95 | * Set flash contained MAC address into SMC9196 core. Make sure the flash | ||
| 96 | * MAC address is sane, and not an empty flash. If no good use the Moreton | ||
| 97 | * Bay default MAC address instead. | ||
| 98 | */ | ||
| 99 | |||
| 100 | static void __init nettel_smc91x_setmac(unsigned int ioaddr, unsigned int flashaddr) | ||
| 101 | { | ||
| 102 | u16 *macp; | ||
| 103 | |||
| 104 | macp = (u16 *) flashaddr; | ||
| 105 | if ((macp[0] == 0xffff) && (macp[1] == 0xffff) && (macp[2] == 0xffff)) | ||
| 106 | macp = (u16 *) &nettel_macdefault[0]; | ||
| 107 | |||
| 108 | writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT); | ||
| 109 | writew(macp[0], ioaddr + SMC91xx_BASEMAC); | ||
| 110 | writew(macp[1], ioaddr + SMC91xx_BASEMAC + 2); | ||
| 111 | writew(macp[2], ioaddr + SMC91xx_BASEMAC + 4); | ||
| 112 | } | ||
| 113 | |||
| 114 | /***************************************************************************/ | ||
| 115 | |||
| 116 | /* | ||
| 117 | * Re-map the address space of at least one of the SMC ethernet | ||
| 118 | * parts. Both parts power up decoding the same address, so we | ||
| 119 | * need to move one of them first, before doing anything else. | ||
| 120 | */ | ||
| 121 | |||
| 122 | static void __init nettel_smc91x_init(void) | ||
| 123 | { | ||
| 124 | writew(0x00ec, MCF_MBAR + MCFSIM_PADDR); | ||
| 125 | mcf_setppdata(0, 0x0080); | ||
| 126 | writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT); | ||
| 127 | writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR); | ||
| 128 | mcf_setppdata(0x0080, 0); | ||
| 129 | |||
| 130 | /* Set correct chip select timing for SMC9196 accesses */ | ||
| 131 | writew(0x1180, MCF_MBAR + MCFSIM_CSCR3); | ||
| 132 | |||
| 133 | /* Set the SMC interrupts to be auto-vectored */ | ||
| 134 | mcf_autovector(NETTEL_SMC0_IRQ); | ||
| 135 | mcf_autovector(NETTEL_SMC1_IRQ); | ||
| 136 | |||
| 137 | /* Set MAC addresses from flash for both interfaces */ | ||
| 138 | nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000); | ||
| 139 | nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006); | ||
| 140 | } | ||
| 141 | |||
| 142 | /***************************************************************************/ | ||
| 143 | |||
| 144 | static int __init init_nettel(void) | ||
| 145 | { | ||
| 146 | nettel_smc91x_init(); | ||
| 147 | platform_add_devices(nettel_devices, ARRAY_SIZE(nettel_devices)); | ||
| 148 | return 0; | ||
| 149 | } | ||
| 150 | |||
| 151 | arch_initcall(init_nettel); | ||
| 152 | |||
| 153 | /***************************************************************************/ | ||
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c index d632948e64e5..ca51323f957b 100644 --- a/arch/m68knommu/platform/532x/config.c +++ b/arch/m68knommu/platform/532x/config.c | |||
| @@ -21,12 +21,15 @@ | |||
| 21 | #include <linux/param.h> | 21 | #include <linux/param.h> |
| 22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | #include <linux/spi/spi.h> | ||
| 25 | #include <linux/gpio.h> | ||
| 24 | #include <asm/machdep.h> | 26 | #include <asm/machdep.h> |
| 25 | #include <asm/coldfire.h> | 27 | #include <asm/coldfire.h> |
| 26 | #include <asm/mcfsim.h> | 28 | #include <asm/mcfsim.h> |
| 27 | #include <asm/mcfuart.h> | 29 | #include <asm/mcfuart.h> |
| 28 | #include <asm/mcfdma.h> | 30 | #include <asm/mcfdma.h> |
| 29 | #include <asm/mcfwdebug.h> | 31 | #include <asm/mcfwdebug.h> |
| 32 | #include <asm/mcfqspi.h> | ||
| 30 | 33 | ||
| 31 | /***************************************************************************/ | 34 | /***************************************************************************/ |
| 32 | 35 | ||
| @@ -82,9 +85,127 @@ static struct platform_device m532x_fec = { | |||
| 82 | .resource = m532x_fec_resources, | 85 | .resource = m532x_fec_resources, |
| 83 | }; | 86 | }; |
| 84 | 87 | ||
| 88 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 89 | static struct resource m532x_qspi_resources[] = { | ||
| 90 | { | ||
| 91 | .start = MCFQSPI_IOBASE, | ||
| 92 | .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1, | ||
| 93 | .flags = IORESOURCE_MEM, | ||
| 94 | }, | ||
| 95 | { | ||
| 96 | .start = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 97 | .end = MCFINT_VECBASE + MCFINT_QSPI, | ||
| 98 | .flags = IORESOURCE_IRQ, | ||
| 99 | }, | ||
| 100 | }; | ||
| 101 | |||
| 102 | #define MCFQSPI_CS0 84 | ||
| 103 | #define MCFQSPI_CS1 85 | ||
| 104 | #define MCFQSPI_CS2 86 | ||
| 105 | |||
| 106 | static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control) | ||
| 107 | { | ||
| 108 | int status; | ||
| 109 | |||
| 110 | status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0"); | ||
| 111 | if (status) { | ||
| 112 | pr_debug("gpio_request for MCFQSPI_CS0 failed\n"); | ||
| 113 | goto fail0; | ||
| 114 | } | ||
| 115 | status = gpio_direction_output(MCFQSPI_CS0, 1); | ||
| 116 | if (status) { | ||
| 117 | pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n"); | ||
| 118 | goto fail1; | ||
| 119 | } | ||
| 120 | |||
| 121 | status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1"); | ||
| 122 | if (status) { | ||
| 123 | pr_debug("gpio_request for MCFQSPI_CS1 failed\n"); | ||
| 124 | goto fail1; | ||
| 125 | } | ||
| 126 | status = gpio_direction_output(MCFQSPI_CS1, 1); | ||
| 127 | if (status) { | ||
| 128 | pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n"); | ||
| 129 | goto fail2; | ||
| 130 | } | ||
| 131 | |||
| 132 | status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2"); | ||
| 133 | if (status) { | ||
| 134 | pr_debug("gpio_request for MCFQSPI_CS2 failed\n"); | ||
| 135 | goto fail2; | ||
| 136 | } | ||
| 137 | status = gpio_direction_output(MCFQSPI_CS2, 1); | ||
| 138 | if (status) { | ||
| 139 | pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n"); | ||
| 140 | goto fail3; | ||
| 141 | } | ||
| 142 | |||
| 143 | return 0; | ||
| 144 | |||
| 145 | fail3: | ||
| 146 | gpio_free(MCFQSPI_CS2); | ||
| 147 | fail2: | ||
| 148 | gpio_free(MCFQSPI_CS1); | ||
| 149 | fail1: | ||
| 150 | gpio_free(MCFQSPI_CS0); | ||
| 151 | fail0: | ||
| 152 | return status; | ||
| 153 | } | ||
| 154 | |||
| 155 | static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control) | ||
| 156 | { | ||
| 157 | gpio_free(MCFQSPI_CS2); | ||
| 158 | gpio_free(MCFQSPI_CS1); | ||
| 159 | gpio_free(MCFQSPI_CS0); | ||
| 160 | } | ||
| 161 | |||
| 162 | static void m532x_cs_select(struct mcfqspi_cs_control *cs_control, | ||
| 163 | u8 chip_select, bool cs_high) | ||
| 164 | { | ||
| 165 | gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high); | ||
| 166 | } | ||
| 167 | |||
| 168 | static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control, | ||
| 169 | u8 chip_select, bool cs_high) | ||
| 170 | { | ||
| 171 | gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high); | ||
| 172 | } | ||
| 173 | |||
| 174 | static struct mcfqspi_cs_control m532x_cs_control = { | ||
| 175 | .setup = m532x_cs_setup, | ||
| 176 | .teardown = m532x_cs_teardown, | ||
| 177 | .select = m532x_cs_select, | ||
| 178 | .deselect = m532x_cs_deselect, | ||
| 179 | }; | ||
| 180 | |||
| 181 | static struct mcfqspi_platform_data m532x_qspi_data = { | ||
| 182 | .bus_num = 0, | ||
| 183 | .num_chipselect = 3, | ||
| 184 | .cs_control = &m532x_cs_control, | ||
| 185 | }; | ||
| 186 | |||
| 187 | static struct platform_device m532x_qspi = { | ||
| 188 | .name = "mcfqspi", | ||
| 189 | .id = 0, | ||
| 190 | .num_resources = ARRAY_SIZE(m532x_qspi_resources), | ||
| 191 | .resource = m532x_qspi_resources, | ||
| 192 | .dev.platform_data = &m532x_qspi_data, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static void __init m532x_qspi_init(void) | ||
| 196 | { | ||
| 197 | /* setup QSPS pins for QSPI with gpio CS control */ | ||
| 198 | writew(0x01f0, MCF_GPIO_PAR_QSPI); | ||
| 199 | } | ||
| 200 | #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */ | ||
| 201 | |||
| 202 | |||
| 85 | static struct platform_device *m532x_devices[] __initdata = { | 203 | static struct platform_device *m532x_devices[] __initdata = { |
| 86 | &m532x_uart, | 204 | &m532x_uart, |
| 87 | &m532x_fec, | 205 | &m532x_fec, |
| 206 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 207 | &m532x_qspi, | ||
| 208 | #endif | ||
| 88 | }; | 209 | }; |
| 89 | 210 | ||
| 90 | /***************************************************************************/ | 211 | /***************************************************************************/ |
| @@ -158,6 +279,9 @@ static int __init init_BSP(void) | |||
| 158 | { | 279 | { |
| 159 | m532x_uarts_init(); | 280 | m532x_uarts_init(); |
| 160 | m532x_fec_init(); | 281 | m532x_fec_init(); |
| 282 | #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) | ||
| 283 | m532x_qspi_init(); | ||
| 284 | #endif | ||
| 161 | platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices)); | 285 | platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices)); |
| 162 | return 0; | 286 | return 0; |
| 163 | } | 287 | } |
diff --git a/arch/m68knommu/platform/68360/commproc.c b/arch/m68knommu/platform/68360/commproc.c index 6acb8d294cb6..f27e688c404e 100644 --- a/arch/m68knommu/platform/68360/commproc.c +++ b/arch/m68knommu/platform/68360/commproc.c | |||
| @@ -110,7 +110,7 @@ void m360_cpm_reset() | |||
| 110 | /* pte = find_pte(&init_mm, host_page_addr); */ | 110 | /* pte = find_pte(&init_mm, host_page_addr); */ |
| 111 | /* pte_val(*pte) |= _PAGE_NO_CACHE; */ | 111 | /* pte_val(*pte) |= _PAGE_NO_CACHE; */ |
| 112 | /* flush_tlb_page(current->mm->mmap, host_buffer); */ | 112 | /* flush_tlb_page(current->mm->mmap, host_buffer); */ |
| 113 | 113 | ||
| 114 | /* Tell everyone where the comm processor resides. | 114 | /* Tell everyone where the comm processor resides. |
| 115 | */ | 115 | */ |
| 116 | /* cpmp = (cpm360_t *)commproc; */ | 116 | /* cpmp = (cpm360_t *)commproc; */ |
| @@ -191,7 +191,7 @@ cpm_interrupt(int irq, void * dev, struct pt_regs * regs) | |||
| 191 | */ | 191 | */ |
| 192 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr |= (1 << vec); | 192 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr |= (1 << vec); |
| 193 | #endif | 193 | #endif |
| 194 | 194 | ||
| 195 | } | 195 | } |
| 196 | 196 | ||
| 197 | /* The CPM can generate the error interrupt when there is a race condition | 197 | /* The CPM can generate the error interrupt when there is a race condition |
diff --git a/arch/microblaze/include/asm/scatterlist.h b/arch/microblaze/include/asm/scatterlist.h index 35d786fe93ae..dc4a8900cc80 100644 --- a/arch/microblaze/include/asm/scatterlist.h +++ b/arch/microblaze/include/asm/scatterlist.h | |||
| @@ -1 +1,3 @@ | |||
| 1 | #include <asm-generic/scatterlist.h> | 1 | #include <asm-generic/scatterlist.h> |
| 2 | |||
| 3 | #define ISA_DMA_THRESHOLD (~0UL) | ||
diff --git a/arch/mips/include/asm/scatterlist.h b/arch/mips/include/asm/scatterlist.h index 83d69fe17c9f..9af65e79be36 100644 --- a/arch/mips/include/asm/scatterlist.h +++ b/arch/mips/include/asm/scatterlist.h | |||
| @@ -1,27 +1,7 @@ | |||
| 1 | #ifndef __ASM_SCATTERLIST_H | 1 | #ifndef __ASM_SCATTERLIST_H |
| 2 | #define __ASM_SCATTERLIST_H | 2 | #define __ASM_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #include <asm/types.h> | 4 | #include <asm-generic/scatterlist.h> |
| 5 | |||
| 6 | struct scatterlist { | ||
| 7 | #ifdef CONFIG_DEBUG_SG | ||
| 8 | unsigned long sg_magic; | ||
| 9 | #endif | ||
| 10 | unsigned long page_link; | ||
| 11 | unsigned int offset; | ||
| 12 | dma_addr_t dma_address; | ||
| 13 | unsigned int length; | ||
| 14 | }; | ||
| 15 | |||
| 16 | /* | ||
| 17 | * These macros should be used after a pci_map_sg call has been done | ||
| 18 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 19 | * You should only work with the number of sg entries pci_map_sg | ||
| 20 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 21 | * is 0. | ||
| 22 | */ | ||
| 23 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 24 | #define sg_dma_len(sg) ((sg)->length) | ||
| 25 | 5 | ||
| 26 | #define ISA_DMA_THRESHOLD (0x00ffffffUL) | 6 | #define ISA_DMA_THRESHOLD (0x00ffffffUL) |
| 27 | 7 | ||
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h index e41222d6c2fd..f0cc1f84a72f 100644 --- a/arch/mn10300/include/asm/atomic.h +++ b/arch/mn10300/include/asm/atomic.h | |||
| @@ -1,157 +1 @@ | |||
| 1 | /* MN10300 Atomic counter operations | #include <asm-generic/atomic.h> | |
| 2 | * | ||
| 3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | ||
| 4 | * Written by David Howells (dhowells@redhat.com) | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public Licence | ||
| 8 | * as published by the Free Software Foundation; either version | ||
| 9 | * 2 of the Licence, or (at your option) any later version. | ||
| 10 | */ | ||
| 11 | #ifndef _ASM_ATOMIC_H | ||
| 12 | #define _ASM_ATOMIC_H | ||
| 13 | |||
| 14 | #ifdef CONFIG_SMP | ||
| 15 | #error not SMP safe | ||
| 16 | #endif | ||
| 17 | |||
| 18 | /* | ||
| 19 | * Atomic operations that C can't guarantee us. Useful for | ||
| 20 | * resource counting etc.. | ||
| 21 | */ | ||
| 22 | |||
| 23 | #define ATOMIC_INIT(i) { (i) } | ||
| 24 | |||
| 25 | #ifdef __KERNEL__ | ||
| 26 | |||
| 27 | /** | ||
| 28 | * atomic_read - read atomic variable | ||
| 29 | * @v: pointer of type atomic_t | ||
| 30 | * | ||
| 31 | * Atomically reads the value of @v. Note that the guaranteed | ||
| 32 | * useful range of an atomic_t is only 24 bits. | ||
| 33 | */ | ||
| 34 | #define atomic_read(v) (*(volatile int *)&(v)->counter) | ||
| 35 | |||
| 36 | /** | ||
| 37 | * atomic_set - set atomic variable | ||
| 38 | * @v: pointer of type atomic_t | ||
| 39 | * @i: required value | ||
| 40 | * | ||
| 41 | * Atomically sets the value of @v to @i. Note that the guaranteed | ||
| 42 | * useful range of an atomic_t is only 24 bits. | ||
| 43 | */ | ||
| 44 | #define atomic_set(v, i) (((v)->counter) = (i)) | ||
| 45 | |||
| 46 | #include <asm/system.h> | ||
| 47 | |||
| 48 | /** | ||
| 49 | * atomic_add_return - add integer to atomic variable | ||
| 50 | * @i: integer value to add | ||
| 51 | * @v: pointer of type atomic_t | ||
| 52 | * | ||
| 53 | * Atomically adds @i to @v and returns the result | ||
| 54 | * Note that the guaranteed useful range of an atomic_t is only 24 bits. | ||
| 55 | */ | ||
| 56 | static inline int atomic_add_return(int i, atomic_t *v) | ||
| 57 | { | ||
| 58 | unsigned long flags; | ||
| 59 | int temp; | ||
| 60 | |||
| 61 | local_irq_save(flags); | ||
| 62 | temp = v->counter; | ||
| 63 | temp += i; | ||
| 64 | v->counter = temp; | ||
| 65 | local_irq_restore(flags); | ||
| 66 | |||
| 67 | return temp; | ||
| 68 | } | ||
| 69 | |||
| 70 | /** | ||
| 71 | * atomic_sub_return - subtract integer from atomic variable | ||
| 72 | * @i: integer value to subtract | ||
| 73 | * @v: pointer of type atomic_t | ||
| 74 | * | ||
| 75 | * Atomically subtracts @i from @v and returns the result | ||
| 76 | * Note that the guaranteed useful range of an atomic_t is only 24 bits. | ||
| 77 | */ | ||
| 78 | static inline int atomic_sub_return(int i, atomic_t *v) | ||
| 79 | { | ||
| 80 | unsigned long flags; | ||
| 81 | int temp; | ||
| 82 | |||
| 83 | local_irq_save(flags); | ||
| 84 | temp = v->counter; | ||
| 85 | temp -= i; | ||
| 86 | v->counter = temp; | ||
| 87 | local_irq_restore(flags); | ||
| 88 | |||
| 89 | return temp; | ||
| 90 | } | ||
| 91 | |||
| 92 | static inline int atomic_add_negative(int i, atomic_t *v) | ||
| 93 | { | ||
| 94 | return atomic_add_return(i, v) < 0; | ||
| 95 | } | ||
| 96 | |||
| 97 | static inline void atomic_add(int i, atomic_t *v) | ||
| 98 | { | ||
| 99 | atomic_add_return(i, v); | ||
| 100 | } | ||
| 101 | |||
| 102 | static inline void atomic_sub(int i, atomic_t *v) | ||
| 103 | { | ||
| 104 | atomic_sub_return(i, v); | ||
| 105 | } | ||
| 106 | |||
| 107 | static inline void atomic_inc(atomic_t *v) | ||
| 108 | { | ||
| 109 | atomic_add_return(1, v); | ||
| 110 | } | ||
| 111 | |||
| 112 | static inline void atomic_dec(atomic_t *v) | ||
| 113 | { | ||
| 114 | atomic_sub_return(1, v); | ||
| 115 | } | ||
| 116 | |||
| 117 | #define atomic_dec_return(v) atomic_sub_return(1, (v)) | ||
| 118 | #define atomic_inc_return(v) atomic_add_return(1, (v)) | ||
| 119 | |||
| 120 | #define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0) | ||
| 121 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) | ||
| 122 | #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) | ||
| 123 | |||
| 124 | #define atomic_add_unless(v, a, u) \ | ||
| 125 | ({ \ | ||
| 126 | int c, old; \ | ||
| 127 | c = atomic_read(v); \ | ||
| 128 | while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \ | ||
| 129 | c = old; \ | ||
| 130 | c != (u); \ | ||
| 131 | }) | ||
| 132 | |||
| 133 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | ||
| 134 | |||
| 135 | static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) | ||
| 136 | { | ||
| 137 | unsigned long flags; | ||
| 138 | |||
| 139 | mask = ~mask; | ||
| 140 | local_irq_save(flags); | ||
| 141 | *addr &= mask; | ||
| 142 | local_irq_restore(flags); | ||
| 143 | } | ||
| 144 | |||
| 145 | #define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v))) | ||
| 146 | #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new))) | ||
| 147 | |||
| 148 | /* Atomic operations are already serializing on MN10300??? */ | ||
| 149 | #define smp_mb__before_atomic_dec() barrier() | ||
| 150 | #define smp_mb__after_atomic_dec() barrier() | ||
| 151 | #define smp_mb__before_atomic_inc() barrier() | ||
| 152 | #define smp_mb__after_atomic_inc() barrier() | ||
| 153 | |||
| 154 | #include <asm-generic/atomic-long.h> | ||
| 155 | |||
| 156 | #endif /* __KERNEL__ */ | ||
| 157 | #endif /* _ASM_ATOMIC_H */ | ||
diff --git a/arch/mn10300/include/asm/cache.h b/arch/mn10300/include/asm/cache.h index e03cfa2e997e..6e2fe28dde4e 100644 --- a/arch/mn10300/include/asm/cache.h +++ b/arch/mn10300/include/asm/cache.h | |||
| @@ -21,6 +21,8 @@ | |||
| 21 | #define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES | 21 | #define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES |
| 22 | #endif | 22 | #endif |
| 23 | 23 | ||
| 24 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
| 25 | |||
| 24 | /* data cache purge registers | 26 | /* data cache purge registers |
| 25 | * - read from the register to unconditionally purge that cache line | 27 | * - read from the register to unconditionally purge that cache line |
| 26 | * - write address & 0xffffff00 to conditionally purge that cache line | 28 | * - write address & 0xffffff00 to conditionally purge that cache line |
diff --git a/arch/mn10300/include/asm/scatterlist.h b/arch/mn10300/include/asm/scatterlist.h index 67535901b9ff..7bd00b9e030d 100644 --- a/arch/mn10300/include/asm/scatterlist.h +++ b/arch/mn10300/include/asm/scatterlist.h | |||
| @@ -11,45 +11,8 @@ | |||
| 11 | #ifndef _ASM_SCATTERLIST_H | 11 | #ifndef _ASM_SCATTERLIST_H |
| 12 | #define _ASM_SCATTERLIST_H | 12 | #define _ASM_SCATTERLIST_H |
| 13 | 13 | ||
| 14 | #include <asm/types.h> | 14 | #include <asm-generic/scatterlist.h> |
| 15 | |||
| 16 | /* | ||
| 17 | * Drivers must set either ->address or (preferred) page and ->offset | ||
| 18 | * to indicate where data must be transferred to/from. | ||
| 19 | * | ||
| 20 | * Using page is recommended since it handles highmem data as well as | ||
| 21 | * low mem. ->address is restricted to data which has a virtual mapping, and | ||
| 22 | * it will go away in the future. Updating to page can be automated very | ||
| 23 | * easily -- something like | ||
| 24 | * | ||
| 25 | * sg->address = some_ptr; | ||
| 26 | * | ||
| 27 | * can be rewritten as | ||
| 28 | * | ||
| 29 | * sg_set_page(virt_to_page(some_ptr)); | ||
| 30 | * sg->offset = (unsigned long) some_ptr & ~PAGE_MASK; | ||
| 31 | * | ||
| 32 | * and that's it. There's no excuse for not highmem enabling YOUR driver. /jens | ||
| 33 | */ | ||
| 34 | struct scatterlist { | ||
| 35 | #ifdef CONFIG_DEBUG_SG | ||
| 36 | unsigned long sg_magic; | ||
| 37 | #endif | ||
| 38 | unsigned long page_link; | ||
| 39 | unsigned int offset; /* for highmem, page offset */ | ||
| 40 | dma_addr_t dma_address; | ||
| 41 | unsigned int length; | ||
| 42 | }; | ||
| 43 | 15 | ||
| 44 | #define ISA_DMA_THRESHOLD (0x00ffffff) | 16 | #define ISA_DMA_THRESHOLD (0x00ffffff) |
| 45 | 17 | ||
| 46 | /* | ||
| 47 | * These macros should be used after a pci_map_sg call has been done | ||
| 48 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 49 | * You should only work with the number of sg entries pci_map_sg | ||
| 50 | * returns. | ||
| 51 | */ | ||
| 52 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 53 | #define sg_dma_len(sg) ((sg)->length) | ||
| 54 | |||
| 55 | #endif /* _ASM_SCATTERLIST_H */ | 18 | #endif /* _ASM_SCATTERLIST_H */ |
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 9c4da3d63bfb..05a366a5c4d5 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig | |||
| @@ -98,6 +98,9 @@ config STACKTRACE_SUPPORT | |||
| 98 | config NEED_DMA_MAP_STATE | 98 | config NEED_DMA_MAP_STATE |
| 99 | def_bool y | 99 | def_bool y |
| 100 | 100 | ||
| 101 | config NEED_SG_DMA_LENGTH | ||
| 102 | def_bool y | ||
| 103 | |||
| 101 | config ISA_DMA_API | 104 | config ISA_DMA_API |
| 102 | bool | 105 | bool |
| 103 | 106 | ||
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index 477277739da5..4556d820128a 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | #define _PARISC_CACHEFLUSH_H | 2 | #define _PARISC_CACHEFLUSH_H |
| 3 | 3 | ||
| 4 | #include <linux/mm.h> | 4 | #include <linux/mm.h> |
| 5 | #include <linux/uaccess.h> | ||
| 5 | 6 | ||
| 6 | /* The usual comment is "Caches aren't brain-dead on the <architecture>". | 7 | /* The usual comment is "Caches aren't brain-dead on the <architecture>". |
| 7 | * Unfortunately, that doesn't apply to PA-RISC. */ | 8 | * Unfortunately, that doesn't apply to PA-RISC. */ |
| @@ -125,11 +126,20 @@ static inline void *kmap(struct page *page) | |||
| 125 | 126 | ||
| 126 | #define kunmap(page) kunmap_parisc(page_address(page)) | 127 | #define kunmap(page) kunmap_parisc(page_address(page)) |
| 127 | 128 | ||
| 128 | #define kmap_atomic(page, idx) page_address(page) | 129 | static inline void *kmap_atomic(struct page *page, enum km_type idx) |
| 130 | { | ||
| 131 | pagefault_disable(); | ||
| 132 | return page_address(page); | ||
| 133 | } | ||
| 129 | 134 | ||
| 130 | #define kunmap_atomic(addr, idx) kunmap_parisc(addr) | 135 | static inline void kunmap_atomic(void *addr, enum km_type idx) |
| 136 | { | ||
| 137 | kunmap_parisc(addr); | ||
| 138 | pagefault_enable(); | ||
| 139 | } | ||
| 131 | 140 | ||
| 132 | #define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn)) | 141 | #define kmap_atomic_prot(page, idx, prot) kmap_atomic(page, idx) |
| 142 | #define kmap_atomic_pfn(pfn, idx) kmap_atomic(pfn_to_page(pfn), (idx)) | ||
| 133 | #define kmap_atomic_to_page(ptr) virt_to_page(ptr) | 143 | #define kmap_atomic_to_page(ptr) virt_to_page(ptr) |
| 134 | #endif | 144 | #endif |
| 135 | 145 | ||
diff --git a/arch/parisc/include/asm/scatterlist.h b/arch/parisc/include/asm/scatterlist.h index 62269b31ebf4..2c3b79b54b28 100644 --- a/arch/parisc/include/asm/scatterlist.h +++ b/arch/parisc/include/asm/scatterlist.h | |||
| @@ -3,25 +3,9 @@ | |||
| 3 | 3 | ||
| 4 | #include <asm/page.h> | 4 | #include <asm/page.h> |
| 5 | #include <asm/types.h> | 5 | #include <asm/types.h> |
| 6 | 6 | #include <asm-generic/scatterlist.h> | |
| 7 | struct scatterlist { | ||
| 8 | #ifdef CONFIG_DEBUG_SG | ||
| 9 | unsigned long sg_magic; | ||
| 10 | #endif | ||
| 11 | unsigned long page_link; | ||
| 12 | unsigned int offset; | ||
| 13 | |||
| 14 | unsigned int length; | ||
| 15 | |||
| 16 | /* an IOVA can be 64-bits on some PA-Risc platforms. */ | ||
| 17 | dma_addr_t iova; /* I/O Virtual Address */ | ||
| 18 | __u32 iova_length; /* bytes mapped */ | ||
| 19 | }; | ||
| 20 | |||
| 21 | #define sg_virt_addr(sg) ((unsigned long)sg_virt(sg)) | ||
| 22 | #define sg_dma_address(sg) ((sg)->iova) | ||
| 23 | #define sg_dma_len(sg) ((sg)->iova_length) | ||
| 24 | 7 | ||
| 25 | #define ISA_DMA_THRESHOLD (~0UL) | 8 | #define ISA_DMA_THRESHOLD (~0UL) |
| 9 | #define sg_virt_addr(sg) ((unsigned long)sg_virt(sg)) | ||
| 26 | 10 | ||
| 27 | #endif /* _ASM_PARISC_SCATTERLIST_H */ | 11 | #endif /* _ASM_PARISC_SCATTERLIST_H */ |
diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c index ec787b411e9a..dcd55103a4bb 100644 --- a/arch/parisc/kernel/asm-offsets.c +++ b/arch/parisc/kernel/asm-offsets.c | |||
| @@ -45,8 +45,12 @@ | |||
| 45 | #else | 45 | #else |
| 46 | #define FRAME_SIZE 64 | 46 | #define FRAME_SIZE 64 |
| 47 | #endif | 47 | #endif |
| 48 | #define FRAME_ALIGN 64 | ||
| 48 | 49 | ||
| 49 | #define align(x,y) (((x)+FRAME_SIZE+(y)-1) - (((x)+(y)-1)%(y))) | 50 | /* Add FRAME_SIZE to the size x and align it to y. All definitions |
| 51 | * that use align_frame will include space for a frame. | ||
| 52 | */ | ||
| 53 | #define align_frame(x,y) (((x)+FRAME_SIZE+(y)-1) - (((x)+(y)-1)%(y))) | ||
| 50 | 54 | ||
| 51 | int main(void) | 55 | int main(void) |
| 52 | { | 56 | { |
| @@ -146,7 +150,8 @@ int main(void) | |||
| 146 | DEFINE(TASK_PT_IOR, offsetof(struct task_struct, thread.regs.ior)); | 150 | DEFINE(TASK_PT_IOR, offsetof(struct task_struct, thread.regs.ior)); |
| 147 | BLANK(); | 151 | BLANK(); |
| 148 | DEFINE(TASK_SZ, sizeof(struct task_struct)); | 152 | DEFINE(TASK_SZ, sizeof(struct task_struct)); |
| 149 | DEFINE(TASK_SZ_ALGN, align(sizeof(struct task_struct), 64)); | 153 | /* TASK_SZ_ALGN includes space for a stack frame. */ |
| 154 | DEFINE(TASK_SZ_ALGN, align_frame(sizeof(struct task_struct), FRAME_ALIGN)); | ||
| 150 | BLANK(); | 155 | BLANK(); |
| 151 | DEFINE(PT_PSW, offsetof(struct pt_regs, gr[ 0])); | 156 | DEFINE(PT_PSW, offsetof(struct pt_regs, gr[ 0])); |
| 152 | DEFINE(PT_GR1, offsetof(struct pt_regs, gr[ 1])); | 157 | DEFINE(PT_GR1, offsetof(struct pt_regs, gr[ 1])); |
| @@ -233,7 +238,8 @@ int main(void) | |||
| 233 | DEFINE(PT_ISR, offsetof(struct pt_regs, isr)); | 238 | DEFINE(PT_ISR, offsetof(struct pt_regs, isr)); |
| 234 | DEFINE(PT_IOR, offsetof(struct pt_regs, ior)); | 239 | DEFINE(PT_IOR, offsetof(struct pt_regs, ior)); |
| 235 | DEFINE(PT_SIZE, sizeof(struct pt_regs)); | 240 | DEFINE(PT_SIZE, sizeof(struct pt_regs)); |
| 236 | DEFINE(PT_SZ_ALGN, align(sizeof(struct pt_regs), 64)); | 241 | /* PT_SZ_ALGN includes space for a stack frame. */ |
| 242 | DEFINE(PT_SZ_ALGN, align_frame(sizeof(struct pt_regs), FRAME_ALIGN)); | ||
| 237 | BLANK(); | 243 | BLANK(); |
| 238 | DEFINE(TI_TASK, offsetof(struct thread_info, task)); | 244 | DEFINE(TI_TASK, offsetof(struct thread_info, task)); |
| 239 | DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain)); | 245 | DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain)); |
| @@ -242,7 +248,8 @@ int main(void) | |||
| 242 | DEFINE(TI_SEGMENT, offsetof(struct thread_info, addr_limit)); | 248 | DEFINE(TI_SEGMENT, offsetof(struct thread_info, addr_limit)); |
| 243 | DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); | 249 | DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); |
| 244 | DEFINE(THREAD_SZ, sizeof(struct thread_info)); | 250 | DEFINE(THREAD_SZ, sizeof(struct thread_info)); |
| 245 | DEFINE(THREAD_SZ_ALGN, align(sizeof(struct thread_info), 64)); | 251 | /* THREAD_SZ_ALGN includes space for a stack frame. */ |
| 252 | DEFINE(THREAD_SZ_ALGN, align_frame(sizeof(struct thread_info), FRAME_ALIGN)); | ||
| 246 | BLANK(); | 253 | BLANK(); |
| 247 | DEFINE(ICACHE_BASE, offsetof(struct pdc_cache_info, ic_base)); | 254 | DEFINE(ICACHE_BASE, offsetof(struct pdc_cache_info, ic_base)); |
| 248 | DEFINE(ICACHE_STRIDE, offsetof(struct pdc_cache_info, ic_stride)); | 255 | DEFINE(ICACHE_STRIDE, offsetof(struct pdc_cache_info, ic_stride)); |
diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index 3a44f7f704fa..6337adef30f6 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S | |||
| @@ -364,32 +364,6 @@ | |||
| 364 | .align 32 | 364 | .align 32 |
| 365 | .endm | 365 | .endm |
| 366 | 366 | ||
| 367 | /* The following are simple 32 vs 64 bit instruction | ||
| 368 | * abstractions for the macros */ | ||
| 369 | .macro EXTR reg1,start,length,reg2 | ||
| 370 | #ifdef CONFIG_64BIT | ||
| 371 | extrd,u \reg1,32+(\start),\length,\reg2 | ||
| 372 | #else | ||
| 373 | extrw,u \reg1,\start,\length,\reg2 | ||
| 374 | #endif | ||
| 375 | .endm | ||
| 376 | |||
| 377 | .macro DEP reg1,start,length,reg2 | ||
| 378 | #ifdef CONFIG_64BIT | ||
| 379 | depd \reg1,32+(\start),\length,\reg2 | ||
| 380 | #else | ||
| 381 | depw \reg1,\start,\length,\reg2 | ||
| 382 | #endif | ||
| 383 | .endm | ||
| 384 | |||
| 385 | .macro DEPI val,start,length,reg | ||
| 386 | #ifdef CONFIG_64BIT | ||
| 387 | depdi \val,32+(\start),\length,\reg | ||
| 388 | #else | ||
| 389 | depwi \val,\start,\length,\reg | ||
| 390 | #endif | ||
| 391 | .endm | ||
| 392 | |||
| 393 | /* In LP64, the space contains part of the upper 32 bits of the | 367 | /* In LP64, the space contains part of the upper 32 bits of the |
| 394 | * fault. We have to extract this and place it in the va, | 368 | * fault. We have to extract this and place it in the va, |
| 395 | * zeroing the corresponding bits in the space register */ | 369 | * zeroing the corresponding bits in the space register */ |
| @@ -442,19 +416,19 @@ | |||
| 442 | */ | 416 | */ |
| 443 | .macro L2_ptep pmd,pte,index,va,fault | 417 | .macro L2_ptep pmd,pte,index,va,fault |
| 444 | #if PT_NLEVELS == 3 | 418 | #if PT_NLEVELS == 3 |
| 445 | EXTR \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index | 419 | extru \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index |
| 446 | #else | 420 | #else |
| 447 | EXTR \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index | 421 | extru \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index |
| 448 | #endif | 422 | #endif |
| 449 | DEP %r0,31,PAGE_SHIFT,\pmd /* clear offset */ | 423 | dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */ |
| 450 | copy %r0,\pte | 424 | copy %r0,\pte |
| 451 | ldw,s \index(\pmd),\pmd | 425 | ldw,s \index(\pmd),\pmd |
| 452 | bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault | 426 | bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault |
| 453 | DEP %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */ | 427 | dep %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */ |
| 454 | copy \pmd,%r9 | 428 | copy \pmd,%r9 |
| 455 | SHLREG %r9,PxD_VALUE_SHIFT,\pmd | 429 | SHLREG %r9,PxD_VALUE_SHIFT,\pmd |
| 456 | EXTR \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index | 430 | extru \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index |
| 457 | DEP %r0,31,PAGE_SHIFT,\pmd /* clear offset */ | 431 | dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */ |
| 458 | shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd | 432 | shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd |
| 459 | LDREG %r0(\pmd),\pte /* pmd is now pte */ | 433 | LDREG %r0(\pmd),\pte /* pmd is now pte */ |
| 460 | bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault | 434 | bb,>=,n \pte,_PAGE_PRESENT_BIT,\fault |
| @@ -605,7 +579,7 @@ | |||
| 605 | depdi 0,31,32,\tmp | 579 | depdi 0,31,32,\tmp |
| 606 | #endif | 580 | #endif |
| 607 | copy \va,\tmp1 | 581 | copy \va,\tmp1 |
| 608 | DEPI 0,31,23,\tmp1 | 582 | depi 0,31,23,\tmp1 |
| 609 | cmpb,COND(<>),n \tmp,\tmp1,\fault | 583 | cmpb,COND(<>),n \tmp,\tmp1,\fault |
| 610 | ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot | 584 | ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot |
| 611 | depd,z \prot,8,7,\prot | 585 | depd,z \prot,8,7,\prot |
| @@ -997,13 +971,6 @@ intr_restore: | |||
| 997 | 971 | ||
| 998 | rfi | 972 | rfi |
| 999 | nop | 973 | nop |
| 1000 | nop | ||
| 1001 | nop | ||
| 1002 | nop | ||
| 1003 | nop | ||
| 1004 | nop | ||
| 1005 | nop | ||
| 1006 | nop | ||
| 1007 | 974 | ||
| 1008 | #ifndef CONFIG_PREEMPT | 975 | #ifndef CONFIG_PREEMPT |
| 1009 | # define intr_do_preempt intr_restore | 976 | # define intr_do_preempt intr_restore |
| @@ -2076,9 +2043,10 @@ syscall_restore: | |||
| 2076 | LDREG TASK_PT_GR31(%r1),%r31 /* restore syscall rp */ | 2043 | LDREG TASK_PT_GR31(%r1),%r31 /* restore syscall rp */ |
| 2077 | 2044 | ||
| 2078 | /* NOTE: We use rsm/ssm pair to make this operation atomic */ | 2045 | /* NOTE: We use rsm/ssm pair to make this operation atomic */ |
| 2046 | LDREG TASK_PT_GR30(%r1),%r1 /* Get user sp */ | ||
| 2079 | rsm PSW_SM_I, %r0 | 2047 | rsm PSW_SM_I, %r0 |
| 2080 | LDREG TASK_PT_GR30(%r1),%r30 /* restore user sp */ | 2048 | copy %r1,%r30 /* Restore user sp */ |
| 2081 | mfsp %sr3,%r1 /* Get users space id */ | 2049 | mfsp %sr3,%r1 /* Get user space id */ |
| 2082 | mtsp %r1,%sr7 /* Restore sr7 */ | 2050 | mtsp %r1,%sr7 /* Restore sr7 */ |
| 2083 | ssm PSW_SM_I, %r0 | 2051 | ssm PSW_SM_I, %r0 |
| 2084 | 2052 | ||
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S index f5f96021caa0..68e75ce838d6 100644 --- a/arch/parisc/kernel/syscall.S +++ b/arch/parisc/kernel/syscall.S | |||
| @@ -47,18 +47,17 @@ ENTRY(linux_gateway_page) | |||
| 47 | KILL_INSN | 47 | KILL_INSN |
| 48 | .endr | 48 | .endr |
| 49 | 49 | ||
| 50 | /* ADDRESS 0xb0 to 0xb4, lws uses 1 insns for entry */ | 50 | /* ADDRESS 0xb0 to 0xb8, lws uses two insns for entry */ |
| 51 | /* Light-weight-syscall entry must always be located at 0xb0 */ | 51 | /* Light-weight-syscall entry must always be located at 0xb0 */ |
| 52 | /* WARNING: Keep this number updated with table size changes */ | 52 | /* WARNING: Keep this number updated with table size changes */ |
| 53 | #define __NR_lws_entries (2) | 53 | #define __NR_lws_entries (2) |
| 54 | 54 | ||
| 55 | lws_entry: | 55 | lws_entry: |
| 56 | /* Unconditional branch to lws_start, located on the | 56 | gate lws_start, %r0 /* increase privilege */ |
| 57 | same gateway page */ | 57 | depi 3, 31, 2, %r31 /* Ensure we return into user mode. */ |
| 58 | b,n lws_start | ||
| 59 | 58 | ||
| 60 | /* Fill from 0xb4 to 0xe0 */ | 59 | /* Fill from 0xb8 to 0xe0 */ |
| 61 | .rept 11 | 60 | .rept 10 |
| 62 | KILL_INSN | 61 | KILL_INSN |
| 63 | .endr | 62 | .endr |
| 64 | 63 | ||
| @@ -423,9 +422,6 @@ tracesys_sigexit: | |||
| 423 | 422 | ||
| 424 | *********************************************************/ | 423 | *********************************************************/ |
| 425 | lws_start: | 424 | lws_start: |
| 426 | /* Gate and ensure we return to userspace */ | ||
| 427 | gate .+8, %r0 | ||
| 428 | depi 3, 31, 2, %r31 /* Ensure we return to userspace */ | ||
| 429 | 425 | ||
| 430 | #ifdef CONFIG_64BIT | 426 | #ifdef CONFIG_64BIT |
| 431 | /* FIXME: If we are a 64-bit kernel just | 427 | /* FIXME: If we are a 64-bit kernel just |
| @@ -442,7 +438,7 @@ lws_start: | |||
| 442 | #endif | 438 | #endif |
| 443 | 439 | ||
| 444 | /* Is the lws entry number valid? */ | 440 | /* Is the lws entry number valid? */ |
| 445 | comiclr,>>= __NR_lws_entries, %r20, %r0 | 441 | comiclr,>> __NR_lws_entries, %r20, %r0 |
| 446 | b,n lws_exit_nosys | 442 | b,n lws_exit_nosys |
| 447 | 443 | ||
| 448 | /* WARNING: Trashing sr2 and sr3 */ | 444 | /* WARNING: Trashing sr2 and sr3 */ |
| @@ -473,7 +469,7 @@ lws_exit: | |||
| 473 | /* now reset the lowest bit of sp if it was set */ | 469 | /* now reset the lowest bit of sp if it was set */ |
| 474 | xor %r30,%r1,%r30 | 470 | xor %r30,%r1,%r30 |
| 475 | #endif | 471 | #endif |
| 476 | be,n 0(%sr3, %r31) | 472 | be,n 0(%sr7, %r31) |
| 477 | 473 | ||
| 478 | 474 | ||
| 479 | 475 | ||
| @@ -529,7 +525,6 @@ lws_compare_and_swap32: | |||
| 529 | #endif | 525 | #endif |
| 530 | 526 | ||
| 531 | lws_compare_and_swap: | 527 | lws_compare_and_swap: |
| 532 | #ifdef CONFIG_SMP | ||
| 533 | /* Load start of lock table */ | 528 | /* Load start of lock table */ |
| 534 | ldil L%lws_lock_start, %r20 | 529 | ldil L%lws_lock_start, %r20 |
| 535 | ldo R%lws_lock_start(%r20), %r28 | 530 | ldo R%lws_lock_start(%r20), %r28 |
| @@ -572,8 +567,6 @@ cas_wouldblock: | |||
| 572 | ldo 2(%r0), %r28 /* 2nd case */ | 567 | ldo 2(%r0), %r28 /* 2nd case */ |
| 573 | b lws_exit /* Contended... */ | 568 | b lws_exit /* Contended... */ |
| 574 | ldo -EAGAIN(%r0), %r21 /* Spin in userspace */ | 569 | ldo -EAGAIN(%r0), %r21 /* Spin in userspace */ |
| 575 | #endif | ||
| 576 | /* CONFIG_SMP */ | ||
| 577 | 570 | ||
| 578 | /* | 571 | /* |
| 579 | prev = *addr; | 572 | prev = *addr; |
| @@ -601,13 +594,11 @@ cas_action: | |||
| 601 | 1: ldw 0(%sr3,%r26), %r28 | 594 | 1: ldw 0(%sr3,%r26), %r28 |
| 602 | sub,<> %r28, %r25, %r0 | 595 | sub,<> %r28, %r25, %r0 |
| 603 | 2: stw %r24, 0(%sr3,%r26) | 596 | 2: stw %r24, 0(%sr3,%r26) |
| 604 | #ifdef CONFIG_SMP | ||
| 605 | /* Free lock */ | 597 | /* Free lock */ |
| 606 | stw %r20, 0(%sr2,%r20) | 598 | stw %r20, 0(%sr2,%r20) |
| 607 | # if ENABLE_LWS_DEBUG | 599 | #if ENABLE_LWS_DEBUG |
| 608 | /* Clear thread register indicator */ | 600 | /* Clear thread register indicator */ |
| 609 | stw %r0, 4(%sr2,%r20) | 601 | stw %r0, 4(%sr2,%r20) |
| 610 | # endif | ||
| 611 | #endif | 602 | #endif |
| 612 | /* Return to userspace, set no error */ | 603 | /* Return to userspace, set no error */ |
| 613 | b lws_exit | 604 | b lws_exit |
| @@ -615,12 +606,10 @@ cas_action: | |||
| 615 | 606 | ||
| 616 | 3: | 607 | 3: |
| 617 | /* Error occured on load or store */ | 608 | /* Error occured on load or store */ |
| 618 | #ifdef CONFIG_SMP | ||
| 619 | /* Free lock */ | 609 | /* Free lock */ |
| 620 | stw %r20, 0(%sr2,%r20) | 610 | stw %r20, 0(%sr2,%r20) |
| 621 | # if ENABLE_LWS_DEBUG | 611 | #if ENABLE_LWS_DEBUG |
| 622 | stw %r0, 4(%sr2,%r20) | 612 | stw %r0, 4(%sr2,%r20) |
| 623 | # endif | ||
| 624 | #endif | 613 | #endif |
| 625 | b lws_exit | 614 | b lws_exit |
| 626 | ldo -EFAULT(%r0),%r21 /* set errno */ | 615 | ldo -EFAULT(%r0),%r21 /* set errno */ |
| @@ -672,7 +661,6 @@ ENTRY(sys_call_table64) | |||
| 672 | END(sys_call_table64) | 661 | END(sys_call_table64) |
| 673 | #endif | 662 | #endif |
| 674 | 663 | ||
| 675 | #ifdef CONFIG_SMP | ||
| 676 | /* | 664 | /* |
| 677 | All light-weight-syscall atomic operations | 665 | All light-weight-syscall atomic operations |
| 678 | will use this set of locks | 666 | will use this set of locks |
| @@ -694,8 +682,6 @@ ENTRY(lws_lock_start) | |||
| 694 | .endr | 682 | .endr |
| 695 | END(lws_lock_start) | 683 | END(lws_lock_start) |
| 696 | .previous | 684 | .previous |
| 697 | #endif | ||
| 698 | /* CONFIG_SMP for lws_lock_start */ | ||
| 699 | 685 | ||
| 700 | .end | 686 | .end |
| 701 | 687 | ||
diff --git a/arch/parisc/math-emu/decode_exc.c b/arch/parisc/math-emu/decode_exc.c index 3ca1c6149218..27a7492ddb0d 100644 --- a/arch/parisc/math-emu/decode_exc.c +++ b/arch/parisc/math-emu/decode_exc.c | |||
| @@ -342,6 +342,7 @@ decode_fpu(unsigned int Fpu_register[], unsigned int trap_counts[]) | |||
| 342 | return SIGNALCODE(SIGFPE, FPE_FLTINV); | 342 | return SIGNALCODE(SIGFPE, FPE_FLTINV); |
| 343 | case DIVISIONBYZEROEXCEPTION: | 343 | case DIVISIONBYZEROEXCEPTION: |
| 344 | update_trap_counts(Fpu_register, aflags, bflags, trap_counts); | 344 | update_trap_counts(Fpu_register, aflags, bflags, trap_counts); |
| 345 | Clear_excp_register(exception_index); | ||
| 345 | return SIGNALCODE(SIGFPE, FPE_FLTDIV); | 346 | return SIGNALCODE(SIGFPE, FPE_FLTDIV); |
| 346 | case INEXACTEXCEPTION: | 347 | case INEXACTEXCEPTION: |
| 347 | update_trap_counts(Fpu_register, aflags, bflags, trap_counts); | 348 | update_trap_counts(Fpu_register, aflags, bflags, trap_counts); |
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c index c6afbfc95770..18162ce4261e 100644 --- a/arch/parisc/mm/fault.c +++ b/arch/parisc/mm/fault.c | |||
| @@ -264,8 +264,7 @@ no_context: | |||
| 264 | 264 | ||
| 265 | out_of_memory: | 265 | out_of_memory: |
| 266 | up_read(&mm->mmap_sem); | 266 | up_read(&mm->mmap_sem); |
| 267 | printk(KERN_CRIT "VM: killing process %s\n", current->comm); | 267 | if (!user_mode(regs)) |
| 268 | if (user_mode(regs)) | 268 | goto no_context; |
| 269 | do_group_exit(SIGKILL); | 269 | pagefault_out_of_memory(); |
| 270 | goto no_context; | ||
| 271 | } | 270 | } |
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index c4c4549c22bb..66a315e06dce 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
| @@ -663,6 +663,9 @@ config ZONE_DMA | |||
| 663 | config NEED_DMA_MAP_STATE | 663 | config NEED_DMA_MAP_STATE |
| 664 | def_bool (PPC64 || NOT_COHERENT_CACHE) | 664 | def_bool (PPC64 || NOT_COHERENT_CACHE) |
| 665 | 665 | ||
| 666 | config NEED_SG_DMA_LENGTH | ||
| 667 | def_bool y | ||
| 668 | |||
| 666 | config GENERIC_ISA_DMA | 669 | config GENERIC_ISA_DMA |
| 667 | bool | 670 | bool |
| 668 | depends on PPC64 || POWER4 || 6xx && !CPM2 | 671 | depends on PPC64 || POWER4 || 6xx && !CPM2 |
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h index 42561f4f032d..ecc4fc69ac13 100644 --- a/arch/powerpc/include/asm/mpc52xx_psc.h +++ b/arch/powerpc/include/asm/mpc52xx_psc.h | |||
| @@ -248,6 +248,7 @@ struct mpc52xx_psc_fifo { | |||
| 248 | u16 tflwfptr; /* PSC + 0x9e */ | 248 | u16 tflwfptr; /* PSC + 0x9e */ |
| 249 | }; | 249 | }; |
| 250 | 250 | ||
| 251 | #define MPC512x_PSC_FIFO_EOF 0x100 | ||
| 251 | #define MPC512x_PSC_FIFO_RESET_SLICE 0x80 | 252 | #define MPC512x_PSC_FIFO_RESET_SLICE 0x80 |
| 252 | #define MPC512x_PSC_FIFO_ENABLE_SLICE 0x01 | 253 | #define MPC512x_PSC_FIFO_ENABLE_SLICE 0x01 |
| 253 | #define MPC512x_PSC_FIFO_ENABLE_DMA 0x04 | 254 | #define MPC512x_PSC_FIFO_ENABLE_DMA 0x04 |
diff --git a/arch/powerpc/include/asm/scatterlist.h b/arch/powerpc/include/asm/scatterlist.h index 912bf597870f..34cc78fd0ef4 100644 --- a/arch/powerpc/include/asm/scatterlist.h +++ b/arch/powerpc/include/asm/scatterlist.h | |||
| @@ -9,38 +9,12 @@ | |||
| 9 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ | 10 | */ |
| 11 | 11 | ||
| 12 | #ifdef __KERNEL__ | ||
| 13 | #include <linux/types.h> | ||
| 14 | #include <asm/dma.h> | 12 | #include <asm/dma.h> |
| 15 | 13 | #include <asm-generic/scatterlist.h> | |
| 16 | struct scatterlist { | ||
| 17 | #ifdef CONFIG_DEBUG_SG | ||
| 18 | unsigned long sg_magic; | ||
| 19 | #endif | ||
| 20 | unsigned long page_link; | ||
| 21 | unsigned int offset; | ||
| 22 | unsigned int length; | ||
| 23 | |||
| 24 | /* For TCE or SWIOTLB support */ | ||
| 25 | dma_addr_t dma_address; | ||
| 26 | u32 dma_length; | ||
| 27 | }; | ||
| 28 | |||
| 29 | /* | ||
| 30 | * These macros should be used after a dma_map_sg call has been done | ||
| 31 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 32 | * You should only work with the number of sg entries pci_map_sg | ||
| 33 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 34 | * is 0. | ||
| 35 | */ | ||
| 36 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 37 | #define sg_dma_len(sg) ((sg)->dma_length) | ||
| 38 | 14 | ||
| 39 | #ifdef __powerpc64__ | 15 | #ifdef __powerpc64__ |
| 40 | #define ISA_DMA_THRESHOLD (~0UL) | 16 | #define ISA_DMA_THRESHOLD (~0UL) |
| 41 | #endif | 17 | #endif |
| 42 | |||
| 43 | #define ARCH_HAS_SG_CHAIN | 18 | #define ARCH_HAS_SG_CHAIN |
| 44 | 19 | ||
| 45 | #endif /* __KERNEL__ */ | ||
| 46 | #endif /* _ASM_POWERPC_SCATTERLIST_H */ | 20 | #endif /* _ASM_POWERPC_SCATTERLIST_H */ |
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c index 4ff4da2c238b..e7fe218b8697 100644 --- a/arch/powerpc/kernel/dma-swiotlb.c +++ b/arch/powerpc/kernel/dma-swiotlb.c | |||
| @@ -39,8 +39,8 @@ struct dma_map_ops swiotlb_dma_ops = { | |||
| 39 | .dma_supported = swiotlb_dma_supported, | 39 | .dma_supported = swiotlb_dma_supported, |
| 40 | .map_page = swiotlb_map_page, | 40 | .map_page = swiotlb_map_page, |
| 41 | .unmap_page = swiotlb_unmap_page, | 41 | .unmap_page = swiotlb_unmap_page, |
| 42 | .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, | 42 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, |
| 43 | .sync_single_range_for_device = swiotlb_sync_single_range_for_device, | 43 | .sync_single_for_device = swiotlb_sync_single_for_device, |
| 44 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, | 44 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, |
| 45 | .sync_sg_for_device = swiotlb_sync_sg_for_device, | 45 | .sync_sg_for_device = swiotlb_sync_sg_for_device, |
| 46 | .mapping_error = swiotlb_dma_mapping_error, | 46 | .mapping_error = swiotlb_dma_mapping_error, |
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c index 6c1df5757cd6..8d1de6f31d5a 100644 --- a/arch/powerpc/kernel/dma.c +++ b/arch/powerpc/kernel/dma.c | |||
| @@ -127,11 +127,11 @@ static inline void dma_direct_sync_sg(struct device *dev, | |||
| 127 | __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); | 127 | __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); |
| 128 | } | 128 | } |
| 129 | 129 | ||
| 130 | static inline void dma_direct_sync_single_range(struct device *dev, | 130 | static inline void dma_direct_sync_single(struct device *dev, |
| 131 | dma_addr_t dma_handle, unsigned long offset, size_t size, | 131 | dma_addr_t dma_handle, size_t size, |
| 132 | enum dma_data_direction direction) | 132 | enum dma_data_direction direction) |
| 133 | { | 133 | { |
| 134 | __dma_sync(bus_to_virt(dma_handle+offset), size, direction); | 134 | __dma_sync(bus_to_virt(dma_handle), size, direction); |
| 135 | } | 135 | } |
| 136 | #endif | 136 | #endif |
| 137 | 137 | ||
| @@ -144,8 +144,8 @@ struct dma_map_ops dma_direct_ops = { | |||
| 144 | .map_page = dma_direct_map_page, | 144 | .map_page = dma_direct_map_page, |
| 145 | .unmap_page = dma_direct_unmap_page, | 145 | .unmap_page = dma_direct_unmap_page, |
| 146 | #ifdef CONFIG_NOT_COHERENT_CACHE | 146 | #ifdef CONFIG_NOT_COHERENT_CACHE |
| 147 | .sync_single_range_for_cpu = dma_direct_sync_single_range, | 147 | .sync_single_for_cpu = dma_direct_sync_single, |
| 148 | .sync_single_range_for_device = dma_direct_sync_single_range, | 148 | .sync_single_for_device = dma_direct_sync_single, |
| 149 | .sync_sg_for_cpu = dma_direct_sync_sg, | 149 | .sync_sg_for_cpu = dma_direct_sync_sg, |
| 150 | .sync_sg_for_device = dma_direct_sync_sg, | 150 | .sync_sg_for_device = dma_direct_sync_sg, |
| 151 | #endif | 151 | #endif |
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c index b7f518a60f03..707e572b7c40 100644 --- a/arch/powerpc/platforms/512x/mpc512x_shared.c +++ b/arch/powerpc/platforms/512x/mpc512x_shared.c | |||
| @@ -22,6 +22,7 @@ | |||
| 22 | #include <asm/prom.h> | 22 | #include <asm/prom.h> |
| 23 | #include <asm/time.h> | 23 | #include <asm/time.h> |
| 24 | #include <asm/mpc5121.h> | 24 | #include <asm/mpc5121.h> |
| 25 | #include <asm/mpc52xx_psc.h> | ||
| 25 | 26 | ||
| 26 | #include "mpc512x.h" | 27 | #include "mpc512x.h" |
| 27 | 28 | ||
| @@ -95,9 +96,86 @@ void __init mpc512x_declare_of_platform_devices(void) | |||
| 95 | } | 96 | } |
| 96 | } | 97 | } |
| 97 | 98 | ||
| 99 | #define DEFAULT_FIFO_SIZE 16 | ||
| 100 | |||
| 101 | static unsigned int __init get_fifo_size(struct device_node *np, | ||
| 102 | char *prop_name) | ||
| 103 | { | ||
| 104 | const unsigned int *fp; | ||
| 105 | |||
| 106 | fp = of_get_property(np, prop_name, NULL); | ||
| 107 | if (fp) | ||
| 108 | return *fp; | ||
| 109 | |||
| 110 | pr_warning("no %s property in %s node, defaulting to %d\n", | ||
| 111 | prop_name, np->full_name, DEFAULT_FIFO_SIZE); | ||
| 112 | |||
| 113 | return DEFAULT_FIFO_SIZE; | ||
| 114 | } | ||
| 115 | |||
| 116 | #define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \ | ||
| 117 | ((u32)(_base) + sizeof(struct mpc52xx_psc))) | ||
| 118 | |||
| 119 | /* Init PSC FIFO space for TX and RX slices */ | ||
| 120 | void __init mpc512x_psc_fifo_init(void) | ||
| 121 | { | ||
| 122 | struct device_node *np; | ||
| 123 | void __iomem *psc; | ||
| 124 | unsigned int tx_fifo_size; | ||
| 125 | unsigned int rx_fifo_size; | ||
| 126 | int fifobase = 0; /* current fifo address in 32 bit words */ | ||
| 127 | |||
| 128 | for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") { | ||
| 129 | tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size"); | ||
| 130 | rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size"); | ||
| 131 | |||
| 132 | /* size in register is in 4 byte units */ | ||
| 133 | tx_fifo_size /= 4; | ||
| 134 | rx_fifo_size /= 4; | ||
| 135 | if (!tx_fifo_size) | ||
| 136 | tx_fifo_size = 1; | ||
| 137 | if (!rx_fifo_size) | ||
| 138 | rx_fifo_size = 1; | ||
| 139 | |||
| 140 | psc = of_iomap(np, 0); | ||
| 141 | if (!psc) { | ||
| 142 | pr_err("%s: Can't map %s device\n", | ||
| 143 | __func__, np->full_name); | ||
| 144 | continue; | ||
| 145 | } | ||
| 146 | |||
| 147 | /* FIFO space is 4KiB, check if requested size is available */ | ||
| 148 | if ((fifobase + tx_fifo_size + rx_fifo_size) > 0x1000) { | ||
| 149 | pr_err("%s: no fifo space available for %s\n", | ||
| 150 | __func__, np->full_name); | ||
| 151 | iounmap(psc); | ||
| 152 | /* | ||
| 153 | * chances are that another device requests less | ||
| 154 | * fifo space, so we continue. | ||
| 155 | */ | ||
| 156 | continue; | ||
| 157 | } | ||
| 158 | |||
| 159 | /* set tx and rx fifo size registers */ | ||
| 160 | out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size); | ||
| 161 | fifobase += tx_fifo_size; | ||
| 162 | out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size); | ||
| 163 | fifobase += rx_fifo_size; | ||
| 164 | |||
| 165 | /* reset and enable the slices */ | ||
| 166 | out_be32(&FIFOC(psc)->txcmd, 0x80); | ||
| 167 | out_be32(&FIFOC(psc)->txcmd, 0x01); | ||
| 168 | out_be32(&FIFOC(psc)->rxcmd, 0x80); | ||
| 169 | out_be32(&FIFOC(psc)->rxcmd, 0x01); | ||
| 170 | |||
| 171 | iounmap(psc); | ||
| 172 | } | ||
| 173 | } | ||
| 174 | |||
| 98 | void __init mpc512x_init(void) | 175 | void __init mpc512x_init(void) |
| 99 | { | 176 | { |
| 100 | mpc512x_declare_of_platform_devices(); | 177 | mpc512x_declare_of_platform_devices(); |
| 101 | mpc5121_clk_init(); | 178 | mpc5121_clk_init(); |
| 102 | mpc512x_restart_init(); | 179 | mpc512x_restart_init(); |
| 180 | mpc512x_psc_fifo_init(); | ||
| 103 | } | 181 | } |
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index 5c2808252516..1a40da92154c 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c | |||
| @@ -1849,8 +1849,7 @@ out: | |||
| 1849 | return ret; | 1849 | return ret; |
| 1850 | } | 1850 | } |
| 1851 | 1851 | ||
| 1852 | static int spufs_mfc_fsync(struct file *file, struct dentry *dentry, | 1852 | static int spufs_mfc_fsync(struct file *file, int datasync) |
| 1853 | int datasync) | ||
| 1854 | { | 1853 | { |
| 1855 | return spufs_mfc_flush(file, NULL); | 1854 | return spufs_mfc_flush(file, NULL); |
| 1856 | } | 1855 | } |
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c index fc1b1c42b1dc..e5e5f823d687 100644 --- a/arch/powerpc/platforms/cell/spufs/inode.c +++ b/arch/powerpc/platforms/cell/spufs/inode.c | |||
| @@ -251,7 +251,7 @@ const struct file_operations spufs_context_fops = { | |||
| 251 | .llseek = dcache_dir_lseek, | 251 | .llseek = dcache_dir_lseek, |
| 252 | .read = generic_read_dir, | 252 | .read = generic_read_dir, |
| 253 | .readdir = dcache_readdir, | 253 | .readdir = dcache_readdir, |
| 254 | .fsync = simple_sync_file, | 254 | .fsync = noop_fsync, |
| 255 | }; | 255 | }; |
| 256 | EXPORT_SYMBOL_GPL(spufs_context_fops); | 256 | EXPORT_SYMBOL_GPL(spufs_context_fops); |
| 257 | 257 | ||
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c index 1fefae76e295..e19ff021e711 100644 --- a/arch/powerpc/platforms/pseries/hvCall_inst.c +++ b/arch/powerpc/platforms/pseries/hvCall_inst.c | |||
| @@ -102,7 +102,7 @@ static const struct file_operations hcall_inst_seq_fops = { | |||
| 102 | #define CPU_NAME_BUF_SIZE 32 | 102 | #define CPU_NAME_BUF_SIZE 32 |
| 103 | 103 | ||
| 104 | 104 | ||
| 105 | static void probe_hcall_entry(unsigned long opcode, unsigned long *args) | 105 | static void probe_hcall_entry(void *ignored, unsigned long opcode, unsigned long *args) |
| 106 | { | 106 | { |
| 107 | struct hcall_stats *h; | 107 | struct hcall_stats *h; |
| 108 | 108 | ||
| @@ -114,7 +114,7 @@ static void probe_hcall_entry(unsigned long opcode, unsigned long *args) | |||
| 114 | h->purr_start = mfspr(SPRN_PURR); | 114 | h->purr_start = mfspr(SPRN_PURR); |
| 115 | } | 115 | } |
| 116 | 116 | ||
| 117 | static void probe_hcall_exit(unsigned long opcode, unsigned long retval, | 117 | static void probe_hcall_exit(void *ignored, unsigned long opcode, unsigned long retval, |
| 118 | unsigned long *retbuf) | 118 | unsigned long *retbuf) |
| 119 | { | 119 | { |
| 120 | struct hcall_stats *h; | 120 | struct hcall_stats *h; |
| @@ -140,11 +140,11 @@ static int __init hcall_inst_init(void) | |||
| 140 | if (!firmware_has_feature(FW_FEATURE_LPAR)) | 140 | if (!firmware_has_feature(FW_FEATURE_LPAR)) |
| 141 | return 0; | 141 | return 0; |
| 142 | 142 | ||
| 143 | if (register_trace_hcall_entry(probe_hcall_entry)) | 143 | if (register_trace_hcall_entry(probe_hcall_entry, NULL)) |
| 144 | return -EINVAL; | 144 | return -EINVAL; |
| 145 | 145 | ||
| 146 | if (register_trace_hcall_exit(probe_hcall_exit)) { | 146 | if (register_trace_hcall_exit(probe_hcall_exit, NULL)) { |
| 147 | unregister_trace_hcall_entry(probe_hcall_entry); | 147 | unregister_trace_hcall_entry(probe_hcall_entry, NULL); |
| 148 | return -EINVAL; | 148 | return -EINVAL; |
| 149 | } | 149 | } |
| 150 | 150 | ||
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 6a1fde0d22b0..cd37e49e7034 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c | |||
| @@ -1,6 +1,15 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Freescale MPC85xx/MPC86xx RapidIO support | 2 | * Freescale MPC85xx/MPC86xx RapidIO support |
| 3 | * | 3 | * |
| 4 | * Copyright 2009 Sysgo AG | ||
| 5 | * Thomas Moll <thomas.moll@sysgo.com> | ||
| 6 | * - fixed maintenance access routines, check for aligned access | ||
| 7 | * | ||
| 8 | * Copyright 2009 Integrated Device Technology, Inc. | ||
| 9 | * Alex Bounine <alexandre.bounine@idt.com> | ||
| 10 | * - Added Port-Write message handling | ||
| 11 | * - Added Machine Check exception handling | ||
| 12 | * | ||
| 4 | * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. | 13 | * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. |
| 5 | * Zhang Wei <wei.zhang@freescale.com> | 14 | * Zhang Wei <wei.zhang@freescale.com> |
| 6 | * | 15 | * |
| @@ -24,19 +33,30 @@ | |||
| 24 | #include <linux/of_platform.h> | 33 | #include <linux/of_platform.h> |
| 25 | #include <linux/delay.h> | 34 | #include <linux/delay.h> |
| 26 | #include <linux/slab.h> | 35 | #include <linux/slab.h> |
| 36 | #include <linux/kfifo.h> | ||
| 27 | 37 | ||
| 28 | #include <asm/io.h> | 38 | #include <asm/io.h> |
| 39 | #include <asm/machdep.h> | ||
| 40 | #include <asm/uaccess.h> | ||
| 41 | |||
| 42 | #undef DEBUG_PW /* Port-Write debugging */ | ||
| 29 | 43 | ||
| 30 | /* RapidIO definition irq, which read from OF-tree */ | 44 | /* RapidIO definition irq, which read from OF-tree */ |
| 31 | #define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq) | 45 | #define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq) |
| 32 | #define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq) | 46 | #define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq) |
| 33 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) | 47 | #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq) |
| 48 | #define IRQ_RIO_PW(m) (((struct rio_priv *)(m->priv))->pwirq) | ||
| 34 | 49 | ||
| 35 | #define RIO_ATMU_REGS_OFFSET 0x10c00 | 50 | #define RIO_ATMU_REGS_OFFSET 0x10c00 |
| 36 | #define RIO_P_MSG_REGS_OFFSET 0x11000 | 51 | #define RIO_P_MSG_REGS_OFFSET 0x11000 |
| 37 | #define RIO_S_MSG_REGS_OFFSET 0x13000 | 52 | #define RIO_S_MSG_REGS_OFFSET 0x13000 |
| 38 | #define RIO_ESCSR 0x158 | 53 | #define RIO_ESCSR 0x158 |
| 39 | #define RIO_CCSR 0x15c | 54 | #define RIO_CCSR 0x15c |
| 55 | #define RIO_LTLEDCSR 0x0608 | ||
| 56 | #define RIO_LTLEDCSR_IER 0x80000000 | ||
| 57 | #define RIO_LTLEDCSR_PRT 0x01000000 | ||
| 58 | #define RIO_LTLEECSR 0x060c | ||
| 59 | #define RIO_EPWISR 0x10010 | ||
| 40 | #define RIO_ISR_AACR 0x10120 | 60 | #define RIO_ISR_AACR 0x10120 |
| 41 | #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ | 61 | #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */ |
| 42 | #define RIO_MAINT_WIN_SIZE 0x400000 | 62 | #define RIO_MAINT_WIN_SIZE 0x400000 |
| @@ -55,6 +75,18 @@ | |||
| 55 | #define RIO_MSG_ISR_QFI 0x00000010 | 75 | #define RIO_MSG_ISR_QFI 0x00000010 |
| 56 | #define RIO_MSG_ISR_DIQI 0x00000001 | 76 | #define RIO_MSG_ISR_DIQI 0x00000001 |
| 57 | 77 | ||
| 78 | #define RIO_IPWMR_SEN 0x00100000 | ||
| 79 | #define RIO_IPWMR_QFIE 0x00000100 | ||
| 80 | #define RIO_IPWMR_EIE 0x00000020 | ||
| 81 | #define RIO_IPWMR_CQ 0x00000002 | ||
| 82 | #define RIO_IPWMR_PWE 0x00000001 | ||
| 83 | |||
| 84 | #define RIO_IPWSR_QF 0x00100000 | ||
| 85 | #define RIO_IPWSR_TE 0x00000080 | ||
| 86 | #define RIO_IPWSR_QFI 0x00000010 | ||
| 87 | #define RIO_IPWSR_PWD 0x00000008 | ||
| 88 | #define RIO_IPWSR_PWB 0x00000004 | ||
| 89 | |||
| 58 | #define RIO_MSG_DESC_SIZE 32 | 90 | #define RIO_MSG_DESC_SIZE 32 |
| 59 | #define RIO_MSG_BUFFER_SIZE 4096 | 91 | #define RIO_MSG_BUFFER_SIZE 4096 |
| 60 | #define RIO_MIN_TX_RING_SIZE 2 | 92 | #define RIO_MIN_TX_RING_SIZE 2 |
| @@ -121,7 +153,7 @@ struct rio_msg_regs { | |||
| 121 | u32 pad10[26]; | 153 | u32 pad10[26]; |
| 122 | u32 pwmr; | 154 | u32 pwmr; |
| 123 | u32 pwsr; | 155 | u32 pwsr; |
| 124 | u32 pad11; | 156 | u32 epwqbar; |
| 125 | u32 pwqbar; | 157 | u32 pwqbar; |
| 126 | }; | 158 | }; |
| 127 | 159 | ||
| @@ -160,6 +192,14 @@ struct rio_msg_rx_ring { | |||
| 160 | void *dev_id; | 192 | void *dev_id; |
| 161 | }; | 193 | }; |
| 162 | 194 | ||
| 195 | struct rio_port_write_msg { | ||
| 196 | void *virt; | ||
| 197 | dma_addr_t phys; | ||
| 198 | u32 msg_count; | ||
| 199 | u32 err_count; | ||
| 200 | u32 discard_count; | ||
| 201 | }; | ||
| 202 | |||
| 163 | struct rio_priv { | 203 | struct rio_priv { |
| 164 | struct device *dev; | 204 | struct device *dev; |
| 165 | void __iomem *regs_win; | 205 | void __iomem *regs_win; |
| @@ -172,11 +212,64 @@ struct rio_priv { | |||
| 172 | struct rio_dbell_ring dbell_ring; | 212 | struct rio_dbell_ring dbell_ring; |
| 173 | struct rio_msg_tx_ring msg_tx_ring; | 213 | struct rio_msg_tx_ring msg_tx_ring; |
| 174 | struct rio_msg_rx_ring msg_rx_ring; | 214 | struct rio_msg_rx_ring msg_rx_ring; |
| 215 | struct rio_port_write_msg port_write_msg; | ||
| 175 | int bellirq; | 216 | int bellirq; |
| 176 | int txirq; | 217 | int txirq; |
| 177 | int rxirq; | 218 | int rxirq; |
| 219 | int pwirq; | ||
| 220 | struct work_struct pw_work; | ||
| 221 | struct kfifo pw_fifo; | ||
| 222 | spinlock_t pw_fifo_lock; | ||
| 178 | }; | 223 | }; |
| 179 | 224 | ||
| 225 | #define __fsl_read_rio_config(x, addr, err, op) \ | ||
| 226 | __asm__ __volatile__( \ | ||
| 227 | "1: "op" %1,0(%2)\n" \ | ||
| 228 | " eieio\n" \ | ||
| 229 | "2:\n" \ | ||
| 230 | ".section .fixup,\"ax\"\n" \ | ||
| 231 | "3: li %1,-1\n" \ | ||
| 232 | " li %0,%3\n" \ | ||
| 233 | " b 2b\n" \ | ||
| 234 | ".section __ex_table,\"a\"\n" \ | ||
| 235 | " .align 2\n" \ | ||
| 236 | " .long 1b,3b\n" \ | ||
| 237 | ".text" \ | ||
| 238 | : "=r" (err), "=r" (x) \ | ||
| 239 | : "b" (addr), "i" (-EFAULT), "0" (err)) | ||
| 240 | |||
| 241 | static void __iomem *rio_regs_win; | ||
| 242 | |||
| 243 | static int (*saved_mcheck_exception)(struct pt_regs *regs); | ||
| 244 | |||
| 245 | static int fsl_rio_mcheck_exception(struct pt_regs *regs) | ||
| 246 | { | ||
| 247 | const struct exception_table_entry *entry = NULL; | ||
| 248 | unsigned long reason = (mfspr(SPRN_MCSR) & MCSR_MASK); | ||
| 249 | |||
| 250 | if (reason & MCSR_BUS_RBERR) { | ||
| 251 | reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR)); | ||
| 252 | if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) { | ||
| 253 | /* Check if we are prepared to handle this fault */ | ||
| 254 | entry = search_exception_tables(regs->nip); | ||
| 255 | if (entry) { | ||
| 256 | pr_debug("RIO: %s - MC Exception handled\n", | ||
| 257 | __func__); | ||
| 258 | out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), | ||
| 259 | 0); | ||
| 260 | regs->msr |= MSR_RI; | ||
| 261 | regs->nip = entry->fixup; | ||
| 262 | return 1; | ||
| 263 | } | ||
| 264 | } | ||
| 265 | } | ||
| 266 | |||
| 267 | if (saved_mcheck_exception) | ||
| 268 | return saved_mcheck_exception(regs); | ||
| 269 | else | ||
| 270 | return cur_cpu_spec->machine_check(regs); | ||
| 271 | } | ||
| 272 | |||
| 180 | /** | 273 | /** |
| 181 | * fsl_rio_doorbell_send - Send a MPC85xx doorbell message | 274 | * fsl_rio_doorbell_send - Send a MPC85xx doorbell message |
| 182 | * @mport: RapidIO master port info | 275 | * @mport: RapidIO master port info |
| @@ -277,27 +370,44 @@ fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid, | |||
| 277 | { | 370 | { |
| 278 | struct rio_priv *priv = mport->priv; | 371 | struct rio_priv *priv = mport->priv; |
| 279 | u8 *data; | 372 | u8 *data; |
| 373 | u32 rval, err = 0; | ||
| 280 | 374 | ||
| 281 | pr_debug | 375 | pr_debug |
| 282 | ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", | 376 | ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", |
| 283 | index, destid, hopcount, offset, len); | 377 | index, destid, hopcount, offset, len); |
| 378 | |||
| 379 | /* 16MB maintenance window possible */ | ||
| 380 | /* allow only aligned access to maintenance registers */ | ||
| 381 | if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len)) | ||
| 382 | return -EINVAL; | ||
| 383 | |||
| 284 | out_be32(&priv->maint_atmu_regs->rowtar, | 384 | out_be32(&priv->maint_atmu_regs->rowtar, |
| 285 | (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); | 385 | (destid << 22) | (hopcount << 12) | (offset >> 12)); |
| 386 | out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); | ||
| 286 | 387 | ||
| 287 | data = (u8 *) priv->maint_win + offset; | 388 | data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1)); |
| 288 | switch (len) { | 389 | switch (len) { |
| 289 | case 1: | 390 | case 1: |
| 290 | *val = in_8((u8 *) data); | 391 | __fsl_read_rio_config(rval, data, err, "lbz"); |
| 291 | break; | 392 | break; |
| 292 | case 2: | 393 | case 2: |
| 293 | *val = in_be16((u16 *) data); | 394 | __fsl_read_rio_config(rval, data, err, "lhz"); |
| 294 | break; | 395 | break; |
| 295 | default: | 396 | case 4: |
| 296 | *val = in_be32((u32 *) data); | 397 | __fsl_read_rio_config(rval, data, err, "lwz"); |
| 297 | break; | 398 | break; |
| 399 | default: | ||
| 400 | return -EINVAL; | ||
| 298 | } | 401 | } |
| 299 | 402 | ||
| 300 | return 0; | 403 | if (err) { |
| 404 | pr_debug("RIO: cfg_read error %d for %x:%x:%x\n", | ||
| 405 | err, destid, hopcount, offset); | ||
| 406 | } | ||
| 407 | |||
| 408 | *val = rval; | ||
| 409 | |||
| 410 | return err; | ||
| 301 | } | 411 | } |
| 302 | 412 | ||
| 303 | /** | 413 | /** |
| @@ -322,10 +432,17 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, | |||
| 322 | pr_debug | 432 | pr_debug |
| 323 | ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", | 433 | ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", |
| 324 | index, destid, hopcount, offset, len, val); | 434 | index, destid, hopcount, offset, len, val); |
| 435 | |||
| 436 | /* 16MB maintenance windows possible */ | ||
| 437 | /* allow only aligned access to maintenance registers */ | ||
| 438 | if (offset > (0x1000000 - len) || !IS_ALIGNED(offset, len)) | ||
| 439 | return -EINVAL; | ||
| 440 | |||
| 325 | out_be32(&priv->maint_atmu_regs->rowtar, | 441 | out_be32(&priv->maint_atmu_regs->rowtar, |
| 326 | (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); | 442 | (destid << 22) | (hopcount << 12) | (offset >> 12)); |
| 443 | out_be32(&priv->maint_atmu_regs->rowtear, (destid >> 10)); | ||
| 327 | 444 | ||
| 328 | data = (u8 *) priv->maint_win + offset; | 445 | data = (u8 *) priv->maint_win + (offset & (RIO_MAINT_WIN_SIZE - 1)); |
| 329 | switch (len) { | 446 | switch (len) { |
| 330 | case 1: | 447 | case 1: |
| 331 | out_8((u8 *) data, val); | 448 | out_8((u8 *) data, val); |
| @@ -333,9 +450,11 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, | |||
| 333 | case 2: | 450 | case 2: |
| 334 | out_be16((u16 *) data, val); | 451 | out_be16((u16 *) data, val); |
| 335 | break; | 452 | break; |
| 336 | default: | 453 | case 4: |
| 337 | out_be32((u32 *) data, val); | 454 | out_be32((u32 *) data, val); |
| 338 | break; | 455 | break; |
| 456 | default: | ||
| 457 | return -EINVAL; | ||
| 339 | } | 458 | } |
| 340 | 459 | ||
| 341 | return 0; | 460 | return 0; |
| @@ -930,6 +1049,223 @@ static int fsl_rio_doorbell_init(struct rio_mport *mport) | |||
| 930 | return rc; | 1049 | return rc; |
| 931 | } | 1050 | } |
| 932 | 1051 | ||
| 1052 | /** | ||
| 1053 | * fsl_rio_port_write_handler - MPC85xx port write interrupt handler | ||
| 1054 | * @irq: Linux interrupt number | ||
| 1055 | * @dev_instance: Pointer to interrupt-specific data | ||
| 1056 | * | ||
| 1057 | * Handles port write interrupts. Parses a list of registered | ||
| 1058 | * port write event handlers and executes a matching event handler. | ||
| 1059 | */ | ||
| 1060 | static irqreturn_t | ||
| 1061 | fsl_rio_port_write_handler(int irq, void *dev_instance) | ||
| 1062 | { | ||
| 1063 | u32 ipwmr, ipwsr; | ||
| 1064 | struct rio_mport *port = (struct rio_mport *)dev_instance; | ||
| 1065 | struct rio_priv *priv = port->priv; | ||
| 1066 | u32 epwisr, tmp; | ||
| 1067 | |||
| 1068 | ipwmr = in_be32(&priv->msg_regs->pwmr); | ||
| 1069 | ipwsr = in_be32(&priv->msg_regs->pwsr); | ||
| 1070 | |||
| 1071 | epwisr = in_be32(priv->regs_win + RIO_EPWISR); | ||
| 1072 | if (epwisr & 0x80000000) { | ||
| 1073 | tmp = in_be32(priv->regs_win + RIO_LTLEDCSR); | ||
| 1074 | pr_info("RIO_LTLEDCSR = 0x%x\n", tmp); | ||
| 1075 | out_be32(priv->regs_win + RIO_LTLEDCSR, 0); | ||
| 1076 | } | ||
| 1077 | |||
| 1078 | if (!(epwisr & 0x00000001)) | ||
| 1079 | return IRQ_HANDLED; | ||
| 1080 | |||
| 1081 | #ifdef DEBUG_PW | ||
| 1082 | pr_debug("PW Int->IPWMR: 0x%08x IPWSR: 0x%08x (", ipwmr, ipwsr); | ||
| 1083 | if (ipwsr & RIO_IPWSR_QF) | ||
| 1084 | pr_debug(" QF"); | ||
| 1085 | if (ipwsr & RIO_IPWSR_TE) | ||
| 1086 | pr_debug(" TE"); | ||
| 1087 | if (ipwsr & RIO_IPWSR_QFI) | ||
| 1088 | pr_debug(" QFI"); | ||
| 1089 | if (ipwsr & RIO_IPWSR_PWD) | ||
| 1090 | pr_debug(" PWD"); | ||
| 1091 | if (ipwsr & RIO_IPWSR_PWB) | ||
| 1092 | pr_debug(" PWB"); | ||
| 1093 | pr_debug(" )\n"); | ||
| 1094 | #endif | ||
| 1095 | out_be32(&priv->msg_regs->pwsr, | ||
| 1096 | ipwsr & (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD)); | ||
| 1097 | |||
| 1098 | if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) { | ||
| 1099 | priv->port_write_msg.err_count++; | ||
| 1100 | pr_info("RIO: Port-Write Transaction Err (%d)\n", | ||
| 1101 | priv->port_write_msg.err_count); | ||
| 1102 | } | ||
| 1103 | if (ipwsr & RIO_IPWSR_PWD) { | ||
| 1104 | priv->port_write_msg.discard_count++; | ||
| 1105 | pr_info("RIO: Port Discarded Port-Write Msg(s) (%d)\n", | ||
| 1106 | priv->port_write_msg.discard_count); | ||
| 1107 | } | ||
| 1108 | |||
| 1109 | /* Schedule deferred processing if PW was received */ | ||
| 1110 | if (ipwsr & RIO_IPWSR_QFI) { | ||
| 1111 | /* Save PW message (if there is room in FIFO), | ||
| 1112 | * otherwise discard it. | ||
| 1113 | */ | ||
| 1114 | if (kfifo_avail(&priv->pw_fifo) >= RIO_PW_MSG_SIZE) { | ||
| 1115 | priv->port_write_msg.msg_count++; | ||
| 1116 | kfifo_in(&priv->pw_fifo, priv->port_write_msg.virt, | ||
| 1117 | RIO_PW_MSG_SIZE); | ||
| 1118 | } else { | ||
| 1119 | priv->port_write_msg.discard_count++; | ||
| 1120 | pr_info("RIO: ISR Discarded Port-Write Msg(s) (%d)\n", | ||
| 1121 | priv->port_write_msg.discard_count); | ||
| 1122 | } | ||
| 1123 | schedule_work(&priv->pw_work); | ||
| 1124 | } | ||
| 1125 | |||
| 1126 | /* Issue Clear Queue command. This allows another | ||
| 1127 | * port-write to be received. | ||
| 1128 | */ | ||
| 1129 | out_be32(&priv->msg_regs->pwmr, ipwmr | RIO_IPWMR_CQ); | ||
| 1130 | |||
| 1131 | return IRQ_HANDLED; | ||
| 1132 | } | ||
| 1133 | |||
| 1134 | static void fsl_pw_dpc(struct work_struct *work) | ||
| 1135 | { | ||
| 1136 | struct rio_priv *priv = container_of(work, struct rio_priv, pw_work); | ||
| 1137 | unsigned long flags; | ||
| 1138 | u32 msg_buffer[RIO_PW_MSG_SIZE/sizeof(u32)]; | ||
| 1139 | |||
| 1140 | /* | ||
| 1141 | * Process port-write messages | ||
| 1142 | */ | ||
| 1143 | spin_lock_irqsave(&priv->pw_fifo_lock, flags); | ||
| 1144 | while (kfifo_out(&priv->pw_fifo, (unsigned char *)msg_buffer, | ||
| 1145 | RIO_PW_MSG_SIZE)) { | ||
| 1146 | /* Process one message */ | ||
| 1147 | spin_unlock_irqrestore(&priv->pw_fifo_lock, flags); | ||
| 1148 | #ifdef DEBUG_PW | ||
| 1149 | { | ||
| 1150 | u32 i; | ||
| 1151 | pr_debug("%s : Port-Write Message:", __func__); | ||
| 1152 | for (i = 0; i < RIO_PW_MSG_SIZE/sizeof(u32); i++) { | ||
| 1153 | if ((i%4) == 0) | ||
| 1154 | pr_debug("\n0x%02x: 0x%08x", i*4, | ||
| 1155 | msg_buffer[i]); | ||
| 1156 | else | ||
| 1157 | pr_debug(" 0x%08x", msg_buffer[i]); | ||
| 1158 | } | ||
| 1159 | pr_debug("\n"); | ||
| 1160 | } | ||
| 1161 | #endif | ||
| 1162 | /* Pass the port-write message to RIO core for processing */ | ||
| 1163 | rio_inb_pwrite_handler((union rio_pw_msg *)msg_buffer); | ||
| 1164 | spin_lock_irqsave(&priv->pw_fifo_lock, flags); | ||
| 1165 | } | ||
| 1166 | spin_unlock_irqrestore(&priv->pw_fifo_lock, flags); | ||
| 1167 | } | ||
| 1168 | |||
| 1169 | /** | ||
| 1170 | * fsl_rio_pw_enable - enable/disable port-write interface init | ||
| 1171 | * @mport: Master port implementing the port write unit | ||
| 1172 | * @enable: 1=enable; 0=disable port-write message handling | ||
| 1173 | */ | ||
| 1174 | static int fsl_rio_pw_enable(struct rio_mport *mport, int enable) | ||
| 1175 | { | ||
| 1176 | struct rio_priv *priv = mport->priv; | ||
| 1177 | u32 rval; | ||
| 1178 | |||
| 1179 | rval = in_be32(&priv->msg_regs->pwmr); | ||
| 1180 | |||
| 1181 | if (enable) | ||
| 1182 | rval |= RIO_IPWMR_PWE; | ||
| 1183 | else | ||
| 1184 | rval &= ~RIO_IPWMR_PWE; | ||
| 1185 | |||
| 1186 | out_be32(&priv->msg_regs->pwmr, rval); | ||
| 1187 | |||
| 1188 | return 0; | ||
| 1189 | } | ||
| 1190 | |||
| 1191 | /** | ||
| 1192 | * fsl_rio_port_write_init - MPC85xx port write interface init | ||
| 1193 | * @mport: Master port implementing the port write unit | ||
| 1194 | * | ||
| 1195 | * Initializes port write unit hardware and DMA buffer | ||
| 1196 | * ring. Called from fsl_rio_setup(). Returns %0 on success | ||
| 1197 | * or %-ENOMEM on failure. | ||
| 1198 | */ | ||
| 1199 | static int fsl_rio_port_write_init(struct rio_mport *mport) | ||
| 1200 | { | ||
| 1201 | struct rio_priv *priv = mport->priv; | ||
| 1202 | int rc = 0; | ||
| 1203 | |||
| 1204 | /* Following configurations require a disabled port write controller */ | ||
| 1205 | out_be32(&priv->msg_regs->pwmr, | ||
| 1206 | in_be32(&priv->msg_regs->pwmr) & ~RIO_IPWMR_PWE); | ||
| 1207 | |||
| 1208 | /* Initialize port write */ | ||
| 1209 | priv->port_write_msg.virt = dma_alloc_coherent(priv->dev, | ||
| 1210 | RIO_PW_MSG_SIZE, | ||
| 1211 | &priv->port_write_msg.phys, GFP_KERNEL); | ||
| 1212 | if (!priv->port_write_msg.virt) { | ||
| 1213 | pr_err("RIO: unable allocate port write queue\n"); | ||
| 1214 | return -ENOMEM; | ||
| 1215 | } | ||
| 1216 | |||
| 1217 | priv->port_write_msg.err_count = 0; | ||
| 1218 | priv->port_write_msg.discard_count = 0; | ||
| 1219 | |||
| 1220 | /* Point dequeue/enqueue pointers at first entry */ | ||
| 1221 | out_be32(&priv->msg_regs->epwqbar, 0); | ||
| 1222 | out_be32(&priv->msg_regs->pwqbar, (u32) priv->port_write_msg.phys); | ||
| 1223 | |||
| 1224 | pr_debug("EIPWQBAR: 0x%08x IPWQBAR: 0x%08x\n", | ||
| 1225 | in_be32(&priv->msg_regs->epwqbar), | ||
| 1226 | in_be32(&priv->msg_regs->pwqbar)); | ||
| 1227 | |||
| 1228 | /* Clear interrupt status IPWSR */ | ||
| 1229 | out_be32(&priv->msg_regs->pwsr, | ||
| 1230 | (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD)); | ||
| 1231 | |||
| 1232 | /* Configure port write contoller for snooping enable all reporting, | ||
| 1233 | clear queue full */ | ||
| 1234 | out_be32(&priv->msg_regs->pwmr, | ||
| 1235 | RIO_IPWMR_SEN | RIO_IPWMR_QFIE | RIO_IPWMR_EIE | RIO_IPWMR_CQ); | ||
| 1236 | |||
| 1237 | |||
| 1238 | /* Hook up port-write handler */ | ||
| 1239 | rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler, 0, | ||
| 1240 | "port-write", (void *)mport); | ||
| 1241 | if (rc < 0) { | ||
| 1242 | pr_err("MPC85xx RIO: unable to request inbound doorbell irq"); | ||
| 1243 | goto err_out; | ||
| 1244 | } | ||
| 1245 | |||
| 1246 | INIT_WORK(&priv->pw_work, fsl_pw_dpc); | ||
| 1247 | spin_lock_init(&priv->pw_fifo_lock); | ||
| 1248 | if (kfifo_alloc(&priv->pw_fifo, RIO_PW_MSG_SIZE * 32, GFP_KERNEL)) { | ||
| 1249 | pr_err("FIFO allocation failed\n"); | ||
| 1250 | rc = -ENOMEM; | ||
| 1251 | goto err_out_irq; | ||
| 1252 | } | ||
| 1253 | |||
| 1254 | pr_debug("IPWMR: 0x%08x IPWSR: 0x%08x\n", | ||
| 1255 | in_be32(&priv->msg_regs->pwmr), | ||
| 1256 | in_be32(&priv->msg_regs->pwsr)); | ||
| 1257 | |||
| 1258 | return rc; | ||
| 1259 | |||
| 1260 | err_out_irq: | ||
| 1261 | free_irq(IRQ_RIO_PW(mport), (void *)mport); | ||
| 1262 | err_out: | ||
| 1263 | dma_free_coherent(priv->dev, RIO_PW_MSG_SIZE, | ||
| 1264 | priv->port_write_msg.virt, | ||
| 1265 | priv->port_write_msg.phys); | ||
| 1266 | return rc; | ||
| 1267 | } | ||
| 1268 | |||
| 933 | static char *cmdline = NULL; | 1269 | static char *cmdline = NULL; |
| 934 | 1270 | ||
| 935 | static int fsl_rio_get_hdid(int index) | 1271 | static int fsl_rio_get_hdid(int index) |
| @@ -1057,7 +1393,7 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1057 | dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n", | 1393 | dev_info(&dev->dev, "LAW start 0x%016llx, size 0x%016llx.\n", |
| 1058 | law_start, law_size); | 1394 | law_start, law_size); |
| 1059 | 1395 | ||
| 1060 | ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL); | 1396 | ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL); |
| 1061 | if (!ops) { | 1397 | if (!ops) { |
| 1062 | rc = -ENOMEM; | 1398 | rc = -ENOMEM; |
| 1063 | goto err_ops; | 1399 | goto err_ops; |
| @@ -1067,6 +1403,7 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1067 | ops->cread = fsl_rio_config_read; | 1403 | ops->cread = fsl_rio_config_read; |
| 1068 | ops->cwrite = fsl_rio_config_write; | 1404 | ops->cwrite = fsl_rio_config_write; |
| 1069 | ops->dsend = fsl_rio_doorbell_send; | 1405 | ops->dsend = fsl_rio_doorbell_send; |
| 1406 | ops->pwenable = fsl_rio_pw_enable; | ||
| 1070 | 1407 | ||
| 1071 | port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); | 1408 | port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); |
| 1072 | if (!port) { | 1409 | if (!port) { |
| @@ -1089,11 +1426,12 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1089 | port->iores.flags = IORESOURCE_MEM; | 1426 | port->iores.flags = IORESOURCE_MEM; |
| 1090 | port->iores.name = "rio_io_win"; | 1427 | port->iores.name = "rio_io_win"; |
| 1091 | 1428 | ||
| 1429 | priv->pwirq = irq_of_parse_and_map(dev->node, 0); | ||
| 1092 | priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2); | 1430 | priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2); |
| 1093 | priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3); | 1431 | priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3); |
| 1094 | priv->rxirq = irq_of_parse_and_map(dev->dev.of_node, 4); | 1432 | priv->rxirq = irq_of_parse_and_map(dev->dev.of_node, 4); |
| 1095 | dev_info(&dev->dev, "bellirq: %d, txirq: %d, rxirq %d\n", priv->bellirq, | 1433 | dev_info(&dev->dev, "pwirq: %d, bellirq: %d, txirq: %d, rxirq %d\n", |
| 1096 | priv->txirq, priv->rxirq); | 1434 | priv->pwirq, priv->bellirq, priv->txirq, priv->rxirq); |
| 1097 | 1435 | ||
| 1098 | rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); | 1436 | rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); |
| 1099 | rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); | 1437 | rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); |
| @@ -1109,6 +1447,7 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1109 | rio_register_mport(port); | 1447 | rio_register_mport(port); |
| 1110 | 1448 | ||
| 1111 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); | 1449 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); |
| 1450 | rio_regs_win = priv->regs_win; | ||
| 1112 | 1451 | ||
| 1113 | /* Probe the master port phy type */ | 1452 | /* Probe the master port phy type */ |
| 1114 | ccsr = in_be32(priv->regs_win + RIO_CCSR); | 1453 | ccsr = in_be32(priv->regs_win + RIO_CCSR); |
| @@ -1166,7 +1505,8 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1166 | 1505 | ||
| 1167 | /* Configure maintenance transaction window */ | 1506 | /* Configure maintenance transaction window */ |
| 1168 | out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12); | 1507 | out_be32(&priv->maint_atmu_regs->rowbar, law_start >> 12); |
| 1169 | out_be32(&priv->maint_atmu_regs->rowar, 0x80077015); /* 4M */ | 1508 | out_be32(&priv->maint_atmu_regs->rowar, |
| 1509 | 0x80077000 | (ilog2(RIO_MAINT_WIN_SIZE) - 1)); | ||
| 1170 | 1510 | ||
| 1171 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); | 1511 | priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE); |
| 1172 | 1512 | ||
| @@ -1175,6 +1515,12 @@ int fsl_rio_setup(struct of_device *dev) | |||
| 1175 | (law_start + RIO_MAINT_WIN_SIZE) >> 12); | 1515 | (law_start + RIO_MAINT_WIN_SIZE) >> 12); |
| 1176 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */ | 1516 | out_be32(&priv->dbell_atmu_regs->rowar, 0x8004200b); /* 4k */ |
| 1177 | fsl_rio_doorbell_init(port); | 1517 | fsl_rio_doorbell_init(port); |
| 1518 | fsl_rio_port_write_init(port); | ||
| 1519 | |||
| 1520 | saved_mcheck_exception = ppc_md.machine_check_exception; | ||
| 1521 | ppc_md.machine_check_exception = fsl_rio_mcheck_exception; | ||
| 1522 | /* Ensure that RFXE is set */ | ||
| 1523 | mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000)); | ||
| 1178 | 1524 | ||
| 1179 | return 0; | 1525 | return 0; |
| 1180 | err: | 1526 | err: |
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 79d0ca086820..bee1c0f794cf 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig | |||
| @@ -102,6 +102,7 @@ config S390 | |||
| 102 | select HAVE_KERNEL_GZIP | 102 | select HAVE_KERNEL_GZIP |
| 103 | select HAVE_KERNEL_BZIP2 | 103 | select HAVE_KERNEL_BZIP2 |
| 104 | select HAVE_KERNEL_LZMA | 104 | select HAVE_KERNEL_LZMA |
| 105 | select HAVE_KERNEL_LZO | ||
| 105 | select ARCH_INLINE_SPIN_TRYLOCK | 106 | select ARCH_INLINE_SPIN_TRYLOCK |
| 106 | select ARCH_INLINE_SPIN_TRYLOCK_BH | 107 | select ARCH_INLINE_SPIN_TRYLOCK_BH |
| 107 | select ARCH_INLINE_SPIN_LOCK | 108 | select ARCH_INLINE_SPIN_LOCK |
| @@ -479,13 +480,6 @@ config CMM | |||
| 479 | Everybody who wants to run Linux under VM should select this | 480 | Everybody who wants to run Linux under VM should select this |
| 480 | option. | 481 | option. |
| 481 | 482 | ||
| 482 | config CMM_PROC | ||
| 483 | bool "/proc interface to cooperative memory management" | ||
| 484 | depends on CMM | ||
| 485 | help | ||
| 486 | Select this option to enable the /proc interface to the | ||
| 487 | cooperative memory management. | ||
| 488 | |||
| 489 | config CMM_IUCV | 483 | config CMM_IUCV |
| 490 | bool "IUCV special message interface to cooperative memory management" | 484 | bool "IUCV special message interface to cooperative memory management" |
| 491 | depends on CMM && (SMSGIUCV=y || CMM=SMSGIUCV) | 485 | depends on CMM && (SMSGIUCV=y || CMM=SMSGIUCV) |
diff --git a/arch/s390/boot/compressed/Makefile b/arch/s390/boot/compressed/Makefile index 6e4a67ad07e1..1c999f726a58 100644 --- a/arch/s390/boot/compressed/Makefile +++ b/arch/s390/boot/compressed/Makefile | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | BITS := $(if $(CONFIG_64BIT),64,31) | 7 | BITS := $(if $(CONFIG_64BIT),64,31) |
| 8 | 8 | ||
| 9 | targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \ | 9 | targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \ |
| 10 | vmlinux.bin.lzma misc.o piggy.o sizes.h head$(BITS).o | 10 | vmlinux.bin.lzma vmlinux.bin.lzo misc.o piggy.o sizes.h head$(BITS).o |
| 11 | 11 | ||
| 12 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 | 12 | KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2 |
| 13 | KBUILD_CFLAGS += $(cflags-y) | 13 | KBUILD_CFLAGS += $(cflags-y) |
| @@ -47,6 +47,7 @@ vmlinux.bin.all-y := $(obj)/vmlinux.bin | |||
| 47 | suffix-$(CONFIG_KERNEL_GZIP) := gz | 47 | suffix-$(CONFIG_KERNEL_GZIP) := gz |
| 48 | suffix-$(CONFIG_KERNEL_BZIP2) := bz2 | 48 | suffix-$(CONFIG_KERNEL_BZIP2) := bz2 |
| 49 | suffix-$(CONFIG_KERNEL_LZMA) := lzma | 49 | suffix-$(CONFIG_KERNEL_LZMA) := lzma |
| 50 | suffix-$(CONFIG_KERNEL_LZO) := lzo | ||
| 50 | 51 | ||
| 51 | $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) | 52 | $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) |
| 52 | $(call if_changed,gzip) | 53 | $(call if_changed,gzip) |
| @@ -54,6 +55,8 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) | |||
| 54 | $(call if_changed,bzip2) | 55 | $(call if_changed,bzip2) |
| 55 | $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) | 56 | $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) |
| 56 | $(call if_changed,lzma) | 57 | $(call if_changed,lzma) |
| 58 | $(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) | ||
| 59 | $(call if_changed,lzo) | ||
| 57 | 60 | ||
| 58 | LDFLAGS_piggy.o := -r --format binary --oformat $(LD_BFD) -T | 61 | LDFLAGS_piggy.o := -r --format binary --oformat $(LD_BFD) -T |
| 59 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) | 62 | $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) |
diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c index 14e0479d3888..0851eb1e919e 100644 --- a/arch/s390/boot/compressed/misc.c +++ b/arch/s390/boot/compressed/misc.c | |||
| @@ -50,6 +50,10 @@ static unsigned long free_mem_end_ptr; | |||
| 50 | #include "../../../../lib/decompress_unlzma.c" | 50 | #include "../../../../lib/decompress_unlzma.c" |
| 51 | #endif | 51 | #endif |
| 52 | 52 | ||
| 53 | #ifdef CONFIG_KERNEL_LZO | ||
| 54 | #include "../../../../lib/decompress_unlzo.c" | ||
| 55 | #endif | ||
| 56 | |||
| 53 | extern _sclp_print_early(const char *); | 57 | extern _sclp_print_early(const char *); |
| 54 | 58 | ||
| 55 | int puts(const char *s) | 59 | int puts(const char *s) |
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h index 451bfbb9db3d..76daea117181 100644 --- a/arch/s390/include/asm/atomic.h +++ b/arch/s390/include/asm/atomic.h | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | 15 | ||
| 16 | #include <linux/compiler.h> | 16 | #include <linux/compiler.h> |
| 17 | #include <linux/types.h> | 17 | #include <linux/types.h> |
| 18 | #include <asm/system.h> | ||
| 18 | 19 | ||
| 19 | #define ATOMIC_INIT(i) { (i) } | 20 | #define ATOMIC_INIT(i) { (i) } |
| 20 | 21 | ||
| @@ -274,6 +275,7 @@ static inline void atomic64_clear_mask(unsigned long long mask, atomic64_t *v) | |||
| 274 | static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) | 275 | static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) |
| 275 | { | 276 | { |
| 276 | long long c, old; | 277 | long long c, old; |
| 278 | |||
| 277 | c = atomic64_read(v); | 279 | c = atomic64_read(v); |
| 278 | for (;;) { | 280 | for (;;) { |
| 279 | if (unlikely(c == u)) | 281 | if (unlikely(c == u)) |
| @@ -286,6 +288,23 @@ static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) | |||
| 286 | return c != u; | 288 | return c != u; |
| 287 | } | 289 | } |
| 288 | 290 | ||
| 291 | static inline long long atomic64_dec_if_positive(atomic64_t *v) | ||
| 292 | { | ||
| 293 | long long c, old, dec; | ||
| 294 | |||
| 295 | c = atomic64_read(v); | ||
| 296 | for (;;) { | ||
| 297 | dec = c - 1; | ||
| 298 | if (unlikely(dec < 0)) | ||
| 299 | break; | ||
| 300 | old = atomic64_cmpxchg((v), c, dec); | ||
| 301 | if (likely(old == c)) | ||
| 302 | break; | ||
| 303 | c = old; | ||
| 304 | } | ||
| 305 | return dec; | ||
| 306 | } | ||
| 307 | |||
| 289 | #define atomic64_add(_i, _v) atomic64_add_return(_i, _v) | 308 | #define atomic64_add(_i, _v) atomic64_add_return(_i, _v) |
| 290 | #define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0) | 309 | #define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0) |
| 291 | #define atomic64_inc(_v) atomic64_add_return(1, _v) | 310 | #define atomic64_inc(_v) atomic64_add_return(1, _v) |
diff --git a/arch/s390/include/asm/ccwdev.h b/arch/s390/include/asm/ccwdev.h index f4bd346a52d3..1c0030f9b890 100644 --- a/arch/s390/include/asm/ccwdev.h +++ b/arch/s390/include/asm/ccwdev.h | |||
| @@ -91,6 +91,14 @@ struct ccw_device { | |||
| 91 | void (*handler) (struct ccw_device *, unsigned long, struct irb *); | 91 | void (*handler) (struct ccw_device *, unsigned long, struct irb *); |
| 92 | }; | 92 | }; |
| 93 | 93 | ||
| 94 | /* | ||
| 95 | * Possible CIO actions triggered by the unit check handler. | ||
| 96 | */ | ||
| 97 | enum uc_todo { | ||
| 98 | UC_TODO_RETRY, | ||
| 99 | UC_TODO_RETRY_ON_NEW_PATH, | ||
| 100 | UC_TODO_STOP | ||
| 101 | }; | ||
| 94 | 102 | ||
| 95 | /** | 103 | /** |
| 96 | * struct ccw driver - device driver for channel attached devices | 104 | * struct ccw driver - device driver for channel attached devices |
| @@ -107,6 +115,7 @@ struct ccw_device { | |||
| 107 | * @freeze: callback for freezing during hibernation snapshotting | 115 | * @freeze: callback for freezing during hibernation snapshotting |
| 108 | * @thaw: undo work done in @freeze | 116 | * @thaw: undo work done in @freeze |
| 109 | * @restore: callback for restoring after hibernation | 117 | * @restore: callback for restoring after hibernation |
| 118 | * @uc_handler: callback for unit check handler | ||
| 110 | * @driver: embedded device driver structure | 119 | * @driver: embedded device driver structure |
| 111 | * @name: device driver name | 120 | * @name: device driver name |
| 112 | */ | 121 | */ |
| @@ -124,6 +133,7 @@ struct ccw_driver { | |||
| 124 | int (*freeze)(struct ccw_device *); | 133 | int (*freeze)(struct ccw_device *); |
| 125 | int (*thaw) (struct ccw_device *); | 134 | int (*thaw) (struct ccw_device *); |
| 126 | int (*restore)(struct ccw_device *); | 135 | int (*restore)(struct ccw_device *); |
| 136 | enum uc_todo (*uc_handler) (struct ccw_device *, struct irb *); | ||
| 127 | struct device_driver driver; | 137 | struct device_driver driver; |
| 128 | char *name; | 138 | char *name; |
| 129 | }; | 139 | }; |
diff --git a/arch/s390/include/asm/scatterlist.h b/arch/s390/include/asm/scatterlist.h index 35d786fe93ae..be44d94cba54 100644 --- a/arch/s390/include/asm/scatterlist.h +++ b/arch/s390/include/asm/scatterlist.h | |||
| @@ -1 +1,3 @@ | |||
| 1 | #define ISA_DMA_THRESHOLD (~0UL) | ||
| 2 | |||
| 1 | #include <asm-generic/scatterlist.h> | 3 | #include <asm-generic/scatterlist.h> |
diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c index d9b490a2716e..5232278d79ad 100644 --- a/arch/s390/kernel/asm-offsets.c +++ b/arch/s390/kernel/asm-offsets.c | |||
| @@ -132,8 +132,6 @@ int main(void) | |||
| 132 | DEFINE(__LC_MCCK_CLOCK, offsetof(struct _lowcore, mcck_clock)); | 132 | DEFINE(__LC_MCCK_CLOCK, offsetof(struct _lowcore, mcck_clock)); |
| 133 | DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags)); | 133 | DEFINE(__LC_MACHINE_FLAGS, offsetof(struct _lowcore, machine_flags)); |
| 134 | DEFINE(__LC_FTRACE_FUNC, offsetof(struct _lowcore, ftrace_func)); | 134 | DEFINE(__LC_FTRACE_FUNC, offsetof(struct _lowcore, ftrace_func)); |
| 135 | DEFINE(__LC_SIE_HOOK, offsetof(struct _lowcore, sie_hook)); | ||
| 136 | DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp)); | ||
| 137 | DEFINE(__LC_IRB, offsetof(struct _lowcore, irb)); | 135 | DEFINE(__LC_IRB, offsetof(struct _lowcore, irb)); |
| 138 | DEFINE(__LC_CPU_TIMER_SAVE_AREA, offsetof(struct _lowcore, cpu_timer_save_area)); | 136 | DEFINE(__LC_CPU_TIMER_SAVE_AREA, offsetof(struct _lowcore, cpu_timer_save_area)); |
| 139 | DEFINE(__LC_CLOCK_COMP_SAVE_AREA, offsetof(struct _lowcore, clock_comp_save_area)); | 137 | DEFINE(__LC_CLOCK_COMP_SAVE_AREA, offsetof(struct _lowcore, clock_comp_save_area)); |
| @@ -154,6 +152,8 @@ int main(void) | |||
| 154 | DEFINE(__LC_FP_CREG_SAVE_AREA, offsetof(struct _lowcore, fpt_creg_save_area)); | 152 | DEFINE(__LC_FP_CREG_SAVE_AREA, offsetof(struct _lowcore, fpt_creg_save_area)); |
| 155 | DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr)); | 153 | DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr)); |
| 156 | DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data)); | 154 | DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data)); |
| 155 | DEFINE(__LC_SIE_HOOK, offsetof(struct _lowcore, sie_hook)); | ||
| 156 | DEFINE(__LC_CMF_HPP, offsetof(struct _lowcore, cmf_hpp)); | ||
| 157 | #endif /* CONFIG_32BIT */ | 157 | #endif /* CONFIG_32BIT */ |
| 158 | return 0; | 158 | return 0; |
| 159 | } | 159 | } |
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S index 178d92536d90..e7192e1cb678 100644 --- a/arch/s390/kernel/entry64.S +++ b/arch/s390/kernel/entry64.S | |||
| @@ -65,7 +65,7 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \ | |||
| 65 | ltgr %r3,%r3 | 65 | ltgr %r3,%r3 |
| 66 | jz 0f | 66 | jz 0f |
| 67 | basr %r14,%r3 | 67 | basr %r14,%r3 |
| 68 | 0: | 68 | 0: |
| 69 | #endif | 69 | #endif |
| 70 | .endm | 70 | .endm |
| 71 | 71 | ||
diff --git a/arch/s390/kernel/kprobes.c b/arch/s390/kernel/kprobes.c index 3d34eef5a2c3..2a3d2bf6f083 100644 --- a/arch/s390/kernel/kprobes.c +++ b/arch/s390/kernel/kprobes.c | |||
| @@ -63,6 +63,8 @@ int __kprobes is_prohibited_opcode(kprobe_opcode_t *instruction) | |||
| 63 | case 0x0b: /* bsm */ | 63 | case 0x0b: /* bsm */ |
| 64 | case 0x83: /* diag */ | 64 | case 0x83: /* diag */ |
| 65 | case 0x44: /* ex */ | 65 | case 0x44: /* ex */ |
| 66 | case 0xac: /* stnsm */ | ||
| 67 | case 0xad: /* stosm */ | ||
| 66 | return -EINVAL; | 68 | return -EINVAL; |
| 67 | } | 69 | } |
| 68 | switch (*(__u16 *) instruction) { | 70 | switch (*(__u16 *) instruction) { |
| @@ -72,6 +74,7 @@ int __kprobes is_prohibited_opcode(kprobe_opcode_t *instruction) | |||
| 72 | case 0xb258: /* bsg */ | 74 | case 0xb258: /* bsg */ |
| 73 | case 0xb218: /* pc */ | 75 | case 0xb218: /* pc */ |
| 74 | case 0xb228: /* pt */ | 76 | case 0xb228: /* pt */ |
| 77 | case 0xb98d: /* epsw */ | ||
| 75 | return -EINVAL; | 78 | return -EINVAL; |
| 76 | } | 79 | } |
| 77 | return 0; | 80 | return 0; |
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index 7d893248d265..c8e8e1354e1d 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c | |||
| @@ -401,7 +401,6 @@ setup_lowcore(void) | |||
| 401 | lc->io_new_psw.mask = psw_kernel_bits; | 401 | lc->io_new_psw.mask = psw_kernel_bits; |
| 402 | lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler; | 402 | lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler; |
| 403 | lc->clock_comparator = -1ULL; | 403 | lc->clock_comparator = -1ULL; |
| 404 | lc->cmf_hpp = -1ULL; | ||
| 405 | lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE; | 404 | lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE; |
| 406 | lc->async_stack = (unsigned long) | 405 | lc->async_stack = (unsigned long) |
| 407 | __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE; | 406 | __alloc_bootmem(ASYNC_SIZE, ASYNC_SIZE, 0) + ASYNC_SIZE; |
| @@ -418,6 +417,7 @@ setup_lowcore(void) | |||
| 418 | __ctl_set_bit(14, 29); | 417 | __ctl_set_bit(14, 29); |
| 419 | } | 418 | } |
| 420 | #else | 419 | #else |
| 420 | lc->cmf_hpp = -1ULL; | ||
| 421 | lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0]; | 421 | lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0]; |
| 422 | #endif | 422 | #endif |
| 423 | lc->sync_enter_timer = S390_lowcore.sync_enter_timer; | 423 | lc->sync_enter_timer = S390_lowcore.sync_enter_timer; |
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c index e4d98de83dd8..541053ed234e 100644 --- a/arch/s390/kernel/smp.c +++ b/arch/s390/kernel/smp.c | |||
| @@ -944,21 +944,21 @@ static int __cpuinit smp_cpu_notify(struct notifier_block *self, | |||
| 944 | struct cpu *c = &per_cpu(cpu_devices, cpu); | 944 | struct cpu *c = &per_cpu(cpu_devices, cpu); |
| 945 | struct sys_device *s = &c->sysdev; | 945 | struct sys_device *s = &c->sysdev; |
| 946 | struct s390_idle_data *idle; | 946 | struct s390_idle_data *idle; |
| 947 | int err = 0; | ||
| 947 | 948 | ||
| 948 | switch (action) { | 949 | switch (action) { |
| 949 | case CPU_ONLINE: | 950 | case CPU_ONLINE: |
| 950 | case CPU_ONLINE_FROZEN: | 951 | case CPU_ONLINE_FROZEN: |
| 951 | idle = &per_cpu(s390_idle, cpu); | 952 | idle = &per_cpu(s390_idle, cpu); |
| 952 | memset(idle, 0, sizeof(struct s390_idle_data)); | 953 | memset(idle, 0, sizeof(struct s390_idle_data)); |
| 953 | if (sysfs_create_group(&s->kobj, &cpu_online_attr_group)) | 954 | err = sysfs_create_group(&s->kobj, &cpu_online_attr_group); |
| 954 | return NOTIFY_BAD; | ||
| 955 | break; | 955 | break; |
| 956 | case CPU_DEAD: | 956 | case CPU_DEAD: |
| 957 | case CPU_DEAD_FROZEN: | 957 | case CPU_DEAD_FROZEN: |
| 958 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); | 958 | sysfs_remove_group(&s->kobj, &cpu_online_attr_group); |
| 959 | break; | 959 | break; |
| 960 | } | 960 | } |
| 961 | return NOTIFY_OK; | 961 | return notifier_from_errno(err); |
| 962 | } | 962 | } |
| 963 | 963 | ||
| 964 | static struct notifier_block __cpuinitdata smp_cpu_nb = { | 964 | static struct notifier_block __cpuinitdata smp_cpu_nb = { |
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig index 2f4b687cc7fa..a7251580891c 100644 --- a/arch/s390/kvm/Kconfig +++ b/arch/s390/kvm/Kconfig | |||
| @@ -33,17 +33,6 @@ config KVM | |||
| 33 | 33 | ||
| 34 | If unsure, say N. | 34 | If unsure, say N. |
| 35 | 35 | ||
| 36 | config KVM_AWARE_CMF | ||
| 37 | depends on KVM | ||
| 38 | bool "KVM aware sampling" | ||
| 39 | ---help--- | ||
| 40 | This option enhances the sampling data from the CPU Measurement | ||
| 41 | Facility with additional information, that allows to distinguish | ||
| 42 | guest(s) and host when using the kernel based virtual machine | ||
| 43 | functionality. | ||
| 44 | |||
| 45 | If unsure, say N. | ||
| 46 | |||
| 47 | # OK, it's a little counter-intuitive to do this, but it puts it neatly under | 36 | # OK, it's a little counter-intuitive to do this, but it puts it neatly under |
| 48 | # the virtualization menu. | 37 | # the virtualization menu. |
| 49 | source drivers/vhost/Kconfig | 38 | source drivers/vhost/Kconfig |
diff --git a/arch/s390/kvm/sie64a.S b/arch/s390/kvm/sie64a.S index 31646bd0e469..7e9d30d567b0 100644 --- a/arch/s390/kvm/sie64a.S +++ b/arch/s390/kvm/sie64a.S | |||
| @@ -32,12 +32,10 @@ SPI_PSW = STACK_FRAME_OVERHEAD + __PT_PSW | |||
| 32 | 32 | ||
| 33 | 33 | ||
| 34 | .macro SPP newpp | 34 | .macro SPP newpp |
| 35 | #ifdef CONFIG_KVM_AWARE_CMF | ||
| 36 | tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP | 35 | tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP |
| 37 | jz 0f | 36 | jz 0f |
| 38 | .insn s,0xb2800000,\newpp | 37 | .insn s,0xb2800000,\newpp |
| 39 | 0: | 38 | 0: |
| 40 | #endif | ||
| 41 | .endm | 39 | .endm |
| 42 | 40 | ||
| 43 | sie_irq_handler: | 41 | sie_irq_handler: |
diff --git a/arch/s390/mm/cmm.c b/arch/s390/mm/cmm.c index f87b34731e1d..eb6a2ef5f82e 100644 --- a/arch/s390/mm/cmm.c +++ b/arch/s390/mm/cmm.c | |||
| @@ -1,11 +1,9 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * arch/s390/mm/cmm.c | 2 | * Collaborative memory management interface. |
| 3 | * | 3 | * |
| 4 | * S390 version | 4 | * Copyright IBM Corp 2003,2010 |
| 5 | * Copyright (C) 2003 IBM Deutschland Entwicklung GmbH, IBM Corporation | 5 | * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>, |
| 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) | ||
| 7 | * | 6 | * |
| 8 | * Collaborative memory management interface. | ||
| 9 | */ | 7 | */ |
| 10 | 8 | ||
| 11 | #include <linux/errno.h> | 9 | #include <linux/errno.h> |
| @@ -20,9 +18,9 @@ | |||
| 20 | #include <linux/kthread.h> | 18 | #include <linux/kthread.h> |
| 21 | #include <linux/oom.h> | 19 | #include <linux/oom.h> |
| 22 | #include <linux/suspend.h> | 20 | #include <linux/suspend.h> |
| 21 | #include <linux/uaccess.h> | ||
| 23 | 22 | ||
| 24 | #include <asm/pgalloc.h> | 23 | #include <asm/pgalloc.h> |
| 25 | #include <asm/uaccess.h> | ||
| 26 | #include <asm/diag.h> | 24 | #include <asm/diag.h> |
| 27 | 25 | ||
| 28 | static char *sender = "VMRMSVM"; | 26 | static char *sender = "VMRMSVM"; |
| @@ -53,14 +51,14 @@ static struct cmm_page_array *cmm_timed_page_list; | |||
| 53 | static DEFINE_SPINLOCK(cmm_lock); | 51 | static DEFINE_SPINLOCK(cmm_lock); |
| 54 | 52 | ||
| 55 | static struct task_struct *cmm_thread_ptr; | 53 | static struct task_struct *cmm_thread_ptr; |
| 56 | static wait_queue_head_t cmm_thread_wait; | 54 | static DECLARE_WAIT_QUEUE_HEAD(cmm_thread_wait); |
| 57 | static struct timer_list cmm_timer; | 55 | static DEFINE_TIMER(cmm_timer, NULL, 0, 0); |
| 58 | 56 | ||
| 59 | static void cmm_timer_fn(unsigned long); | 57 | static void cmm_timer_fn(unsigned long); |
| 60 | static void cmm_set_timer(void); | 58 | static void cmm_set_timer(void); |
| 61 | 59 | ||
| 62 | static long | 60 | static long cmm_alloc_pages(long nr, long *counter, |
| 63 | cmm_alloc_pages(long nr, long *counter, struct cmm_page_array **list) | 61 | struct cmm_page_array **list) |
| 64 | { | 62 | { |
| 65 | struct cmm_page_array *pa, *npa; | 63 | struct cmm_page_array *pa, *npa; |
| 66 | unsigned long addr; | 64 | unsigned long addr; |
| @@ -99,8 +97,7 @@ cmm_alloc_pages(long nr, long *counter, struct cmm_page_array **list) | |||
| 99 | return nr; | 97 | return nr; |
| 100 | } | 98 | } |
| 101 | 99 | ||
| 102 | static long | 100 | static long cmm_free_pages(long nr, long *counter, struct cmm_page_array **list) |
| 103 | cmm_free_pages(long nr, long *counter, struct cmm_page_array **list) | ||
| 104 | { | 101 | { |
| 105 | struct cmm_page_array *pa; | 102 | struct cmm_page_array *pa; |
| 106 | unsigned long addr; | 103 | unsigned long addr; |
| @@ -140,11 +137,10 @@ static int cmm_oom_notify(struct notifier_block *self, | |||
| 140 | } | 137 | } |
| 141 | 138 | ||
| 142 | static struct notifier_block cmm_oom_nb = { | 139 | static struct notifier_block cmm_oom_nb = { |
| 143 | .notifier_call = cmm_oom_notify | 140 | .notifier_call = cmm_oom_notify, |
| 144 | }; | 141 | }; |
| 145 | 142 | ||
| 146 | static int | 143 | static int cmm_thread(void *dummy) |
| 147 | cmm_thread(void *dummy) | ||
| 148 | { | 144 | { |
| 149 | int rc; | 145 | int rc; |
| 150 | 146 | ||
| @@ -170,7 +166,7 @@ cmm_thread(void *dummy) | |||
| 170 | cmm_timed_pages_target = cmm_timed_pages; | 166 | cmm_timed_pages_target = cmm_timed_pages; |
| 171 | } else if (cmm_timed_pages_target < cmm_timed_pages) { | 167 | } else if (cmm_timed_pages_target < cmm_timed_pages) { |
| 172 | cmm_free_pages(1, &cmm_timed_pages, | 168 | cmm_free_pages(1, &cmm_timed_pages, |
| 173 | &cmm_timed_page_list); | 169 | &cmm_timed_page_list); |
| 174 | } | 170 | } |
| 175 | if (cmm_timed_pages > 0 && !timer_pending(&cmm_timer)) | 171 | if (cmm_timed_pages > 0 && !timer_pending(&cmm_timer)) |
| 176 | cmm_set_timer(); | 172 | cmm_set_timer(); |
| @@ -178,14 +174,12 @@ cmm_thread(void *dummy) | |||
| 178 | return 0; | 174 | return 0; |
| 179 | } | 175 | } |
| 180 | 176 | ||
| 181 | static void | 177 | static void cmm_kick_thread(void) |
| 182 | cmm_kick_thread(void) | ||
| 183 | { | 178 | { |
| 184 | wake_up(&cmm_thread_wait); | 179 | wake_up(&cmm_thread_wait); |
| 185 | } | 180 | } |
| 186 | 181 | ||
| 187 | static void | 182 | static void cmm_set_timer(void) |
| 188 | cmm_set_timer(void) | ||
| 189 | { | 183 | { |
| 190 | if (cmm_timed_pages_target <= 0 || cmm_timeout_seconds <= 0) { | 184 | if (cmm_timed_pages_target <= 0 || cmm_timeout_seconds <= 0) { |
| 191 | if (timer_pending(&cmm_timer)) | 185 | if (timer_pending(&cmm_timer)) |
| @@ -202,8 +196,7 @@ cmm_set_timer(void) | |||
| 202 | add_timer(&cmm_timer); | 196 | add_timer(&cmm_timer); |
| 203 | } | 197 | } |
| 204 | 198 | ||
| 205 | static void | 199 | static void cmm_timer_fn(unsigned long ignored) |
| 206 | cmm_timer_fn(unsigned long ignored) | ||
| 207 | { | 200 | { |
| 208 | long nr; | 201 | long nr; |
| 209 | 202 | ||
| @@ -216,57 +209,49 @@ cmm_timer_fn(unsigned long ignored) | |||
| 216 | cmm_set_timer(); | 209 | cmm_set_timer(); |
| 217 | } | 210 | } |
| 218 | 211 | ||
| 219 | void | 212 | static void cmm_set_pages(long nr) |
| 220 | cmm_set_pages(long nr) | ||
| 221 | { | 213 | { |
| 222 | cmm_pages_target = nr; | 214 | cmm_pages_target = nr; |
| 223 | cmm_kick_thread(); | 215 | cmm_kick_thread(); |
| 224 | } | 216 | } |
| 225 | 217 | ||
| 226 | long | 218 | static long cmm_get_pages(void) |
| 227 | cmm_get_pages(void) | ||
| 228 | { | 219 | { |
| 229 | return cmm_pages; | 220 | return cmm_pages; |
| 230 | } | 221 | } |
| 231 | 222 | ||
| 232 | void | 223 | static void cmm_add_timed_pages(long nr) |
| 233 | cmm_add_timed_pages(long nr) | ||
| 234 | { | 224 | { |
| 235 | cmm_timed_pages_target += nr; | 225 | cmm_timed_pages_target += nr; |
| 236 | cmm_kick_thread(); | 226 | cmm_kick_thread(); |
| 237 | } | 227 | } |
| 238 | 228 | ||
| 239 | long | 229 | static long cmm_get_timed_pages(void) |
| 240 | cmm_get_timed_pages(void) | ||
| 241 | { | 230 | { |
| 242 | return cmm_timed_pages; | 231 | return cmm_timed_pages; |
| 243 | } | 232 | } |
| 244 | 233 | ||
| 245 | void | 234 | static void cmm_set_timeout(long nr, long seconds) |
| 246 | cmm_set_timeout(long nr, long seconds) | ||
| 247 | { | 235 | { |
| 248 | cmm_timeout_pages = nr; | 236 | cmm_timeout_pages = nr; |
| 249 | cmm_timeout_seconds = seconds; | 237 | cmm_timeout_seconds = seconds; |
| 250 | cmm_set_timer(); | 238 | cmm_set_timer(); |
| 251 | } | 239 | } |
| 252 | 240 | ||
| 253 | static int | 241 | static int cmm_skip_blanks(char *cp, char **endp) |
| 254 | cmm_skip_blanks(char *cp, char **endp) | ||
| 255 | { | 242 | { |
| 256 | char *str; | 243 | char *str; |
| 257 | 244 | ||
| 258 | for (str = cp; *str == ' ' || *str == '\t'; str++); | 245 | for (str = cp; *str == ' ' || *str == '\t'; str++) |
| 246 | ; | ||
| 259 | *endp = str; | 247 | *endp = str; |
| 260 | return str != cp; | 248 | return str != cp; |
| 261 | } | 249 | } |
| 262 | 250 | ||
| 263 | #ifdef CONFIG_CMM_PROC | ||
| 264 | |||
| 265 | static struct ctl_table cmm_table[]; | 251 | static struct ctl_table cmm_table[]; |
| 266 | 252 | ||
| 267 | static int | 253 | static int cmm_pages_handler(ctl_table *ctl, int write, void __user *buffer, |
| 268 | cmm_pages_handler(ctl_table *ctl, int write, | 254 | size_t *lenp, loff_t *ppos) |
| 269 | void __user *buffer, size_t *lenp, loff_t *ppos) | ||
| 270 | { | 255 | { |
| 271 | char buf[16], *p; | 256 | char buf[16], *p; |
| 272 | long nr; | 257 | long nr; |
| @@ -305,9 +290,8 @@ cmm_pages_handler(ctl_table *ctl, int write, | |||
| 305 | return 0; | 290 | return 0; |
| 306 | } | 291 | } |
| 307 | 292 | ||
| 308 | static int | 293 | static int cmm_timeout_handler(ctl_table *ctl, int write, void __user *buffer, |
| 309 | cmm_timeout_handler(ctl_table *ctl, int write, | 294 | size_t *lenp, loff_t *ppos) |
| 310 | void __user *buffer, size_t *lenp, loff_t *ppos) | ||
| 311 | { | 295 | { |
| 312 | char buf[64], *p; | 296 | char buf[64], *p; |
| 313 | long nr, seconds; | 297 | long nr, seconds; |
| @@ -370,12 +354,10 @@ static struct ctl_table cmm_dir_table[] = { | |||
| 370 | }, | 354 | }, |
| 371 | { } | 355 | { } |
| 372 | }; | 356 | }; |
| 373 | #endif | ||
| 374 | 357 | ||
| 375 | #ifdef CONFIG_CMM_IUCV | 358 | #ifdef CONFIG_CMM_IUCV |
| 376 | #define SMSG_PREFIX "CMM" | 359 | #define SMSG_PREFIX "CMM" |
| 377 | static void | 360 | static void cmm_smsg_target(const char *from, char *msg) |
| 378 | cmm_smsg_target(const char *from, char *msg) | ||
| 379 | { | 361 | { |
| 380 | long nr, seconds; | 362 | long nr, seconds; |
| 381 | 363 | ||
| @@ -445,16 +427,13 @@ static struct notifier_block cmm_power_notifier = { | |||
| 445 | .notifier_call = cmm_power_event, | 427 | .notifier_call = cmm_power_event, |
| 446 | }; | 428 | }; |
| 447 | 429 | ||
| 448 | static int | 430 | static int cmm_init(void) |
| 449 | cmm_init (void) | ||
| 450 | { | 431 | { |
| 451 | int rc = -ENOMEM; | 432 | int rc = -ENOMEM; |
| 452 | 433 | ||
| 453 | #ifdef CONFIG_CMM_PROC | ||
| 454 | cmm_sysctl_header = register_sysctl_table(cmm_dir_table); | 434 | cmm_sysctl_header = register_sysctl_table(cmm_dir_table); |
| 455 | if (!cmm_sysctl_header) | 435 | if (!cmm_sysctl_header) |
| 456 | goto out_sysctl; | 436 | goto out_sysctl; |
| 457 | #endif | ||
| 458 | #ifdef CONFIG_CMM_IUCV | 437 | #ifdef CONFIG_CMM_IUCV |
| 459 | rc = smsg_register_callback(SMSG_PREFIX, cmm_smsg_target); | 438 | rc = smsg_register_callback(SMSG_PREFIX, cmm_smsg_target); |
| 460 | if (rc < 0) | 439 | if (rc < 0) |
| @@ -466,8 +445,6 @@ cmm_init (void) | |||
| 466 | rc = register_pm_notifier(&cmm_power_notifier); | 445 | rc = register_pm_notifier(&cmm_power_notifier); |
| 467 | if (rc) | 446 | if (rc) |
| 468 | goto out_pm; | 447 | goto out_pm; |
| 469 | init_waitqueue_head(&cmm_thread_wait); | ||
| 470 | init_timer(&cmm_timer); | ||
| 471 | cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); | 448 | cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); |
| 472 | rc = IS_ERR(cmm_thread_ptr) ? PTR_ERR(cmm_thread_ptr) : 0; | 449 | rc = IS_ERR(cmm_thread_ptr) ? PTR_ERR(cmm_thread_ptr) : 0; |
| 473 | if (rc) | 450 | if (rc) |
| @@ -483,36 +460,26 @@ out_oom_notify: | |||
| 483 | smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); | 460 | smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); |
| 484 | out_smsg: | 461 | out_smsg: |
| 485 | #endif | 462 | #endif |
| 486 | #ifdef CONFIG_CMM_PROC | ||
| 487 | unregister_sysctl_table(cmm_sysctl_header); | 463 | unregister_sysctl_table(cmm_sysctl_header); |
| 488 | out_sysctl: | 464 | out_sysctl: |
| 489 | #endif | 465 | del_timer_sync(&cmm_timer); |
| 490 | return rc; | 466 | return rc; |
| 491 | } | 467 | } |
| 468 | module_init(cmm_init); | ||
| 492 | 469 | ||
| 493 | static void | 470 | static void cmm_exit(void) |
| 494 | cmm_exit(void) | ||
| 495 | { | 471 | { |
| 496 | kthread_stop(cmm_thread_ptr); | ||
| 497 | unregister_pm_notifier(&cmm_power_notifier); | ||
| 498 | unregister_oom_notifier(&cmm_oom_nb); | ||
| 499 | cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list); | ||
| 500 | cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list); | ||
| 501 | #ifdef CONFIG_CMM_PROC | ||
| 502 | unregister_sysctl_table(cmm_sysctl_header); | 472 | unregister_sysctl_table(cmm_sysctl_header); |
| 503 | #endif | ||
| 504 | #ifdef CONFIG_CMM_IUCV | 473 | #ifdef CONFIG_CMM_IUCV |
| 505 | smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); | 474 | smsg_unregister_callback(SMSG_PREFIX, cmm_smsg_target); |
| 506 | #endif | 475 | #endif |
| 476 | unregister_pm_notifier(&cmm_power_notifier); | ||
| 477 | unregister_oom_notifier(&cmm_oom_nb); | ||
| 478 | kthread_stop(cmm_thread_ptr); | ||
| 479 | del_timer_sync(&cmm_timer); | ||
| 480 | cmm_free_pages(cmm_pages, &cmm_pages, &cmm_page_list); | ||
| 481 | cmm_free_pages(cmm_timed_pages, &cmm_timed_pages, &cmm_timed_page_list); | ||
| 507 | } | 482 | } |
| 508 | |||
| 509 | module_init(cmm_init); | ||
| 510 | module_exit(cmm_exit); | 483 | module_exit(cmm_exit); |
| 511 | 484 | ||
| 512 | EXPORT_SYMBOL(cmm_set_pages); | ||
| 513 | EXPORT_SYMBOL(cmm_get_pages); | ||
| 514 | EXPORT_SYMBOL(cmm_add_timed_pages); | ||
| 515 | EXPORT_SYMBOL(cmm_get_timed_pages); | ||
| 516 | EXPORT_SYMBOL(cmm_set_timeout); | ||
| 517 | |||
| 518 | MODULE_LICENSE("GPL"); | 485 | MODULE_LICENSE("GPL"); |
diff --git a/arch/score/include/asm/scatterlist.h b/arch/score/include/asm/scatterlist.h index 9f533b8362c7..4fa1a6658215 100644 --- a/arch/score/include/asm/scatterlist.h +++ b/arch/score/include/asm/scatterlist.h | |||
| @@ -1,6 +1,8 @@ | |||
| 1 | #ifndef _ASM_SCORE_SCATTERLIST_H | 1 | #ifndef _ASM_SCORE_SCATTERLIST_H |
| 2 | #define _ASM_SCORE_SCATTERLIST_H | 2 | #define _ASM_SCORE_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #define ISA_DMA_THRESHOLD (~0UL) | ||
| 5 | |||
| 4 | #include <asm-generic/scatterlist.h> | 6 | #include <asm-generic/scatterlist.h> |
| 5 | 7 | ||
| 6 | #endif /* _ASM_SCORE_SCATTERLIST_H */ | 8 | #endif /* _ASM_SCORE_SCATTERLIST_H */ |
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 1eef24d04bbf..573fca1fbd9b 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
| @@ -189,6 +189,9 @@ config DMA_NONCOHERENT | |||
| 189 | config NEED_DMA_MAP_STATE | 189 | config NEED_DMA_MAP_STATE |
| 190 | def_bool DMA_NONCOHERENT | 190 | def_bool DMA_NONCOHERENT |
| 191 | 191 | ||
| 192 | config NEED_SG_DMA_LENGTH | ||
| 193 | def_bool y | ||
| 194 | |||
| 192 | source "init/Kconfig" | 195 | source "init/Kconfig" |
| 193 | 196 | ||
| 194 | source "kernel/Kconfig.freezer" | 197 | source "kernel/Kconfig.freezer" |
| @@ -776,6 +779,17 @@ config ENTRY_OFFSET | |||
| 776 | default "0x00010000" if PAGE_SIZE_64KB | 779 | default "0x00010000" if PAGE_SIZE_64KB |
| 777 | default "0x00000000" | 780 | default "0x00000000" |
| 778 | 781 | ||
| 782 | config ROMIMAGE_MMCIF | ||
| 783 | bool "Include MMCIF loader in romImage (EXPERIMENTAL)" | ||
| 784 | depends on CPU_SUBTYPE_SH7724 && EXPERIMENTAL | ||
| 785 | help | ||
| 786 | Say Y here to include experimental MMCIF loading code in | ||
| 787 | romImage. With this enabled it is possible to write the romImage | ||
| 788 | kernel image to an MMC card and boot the kernel straight from | ||
| 789 | the reset vector. At reset the processor Mask ROM will load the | ||
| 790 | first part of the romImage which in turn loads the rest the kernel | ||
| 791 | image to RAM using the MMCIF hardware block. | ||
| 792 | |||
| 779 | choice | 793 | choice |
| 780 | prompt "Kernel command line" | 794 | prompt "Kernel command line" |
| 781 | optional | 795 | optional |
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index 49714258732e..778eb7cb9873 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c | |||
| @@ -12,6 +12,8 @@ | |||
| 12 | #include <linux/device.h> | 12 | #include <linux/device.h> |
| 13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/mfd/sh_mobile_sdhi.h> | 14 | #include <linux/mfd/sh_mobile_sdhi.h> |
| 15 | #include <linux/mmc/host.h> | ||
| 16 | #include <linux/mmc/sh_mmcif.h> | ||
| 15 | #include <linux/mtd/physmap.h> | 17 | #include <linux/mtd/physmap.h> |
| 16 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
| 17 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
| @@ -26,7 +28,6 @@ | |||
| 26 | #include <linux/mmc/host.h> | 28 | #include <linux/mmc/host.h> |
| 27 | #include <linux/input.h> | 29 | #include <linux/input.h> |
| 28 | #include <linux/input/sh_keysc.h> | 30 | #include <linux/input/sh_keysc.h> |
| 29 | #include <linux/mfd/sh_mobile_sdhi.h> | ||
| 30 | #include <video/sh_mobile_lcdc.h> | 31 | #include <video/sh_mobile_lcdc.h> |
| 31 | #include <sound/sh_fsi.h> | 32 | #include <sound/sh_fsi.h> |
| 32 | #include <media/sh_mobile_ceu.h> | 33 | #include <media/sh_mobile_ceu.h> |
| @@ -436,7 +437,7 @@ static struct i2c_board_info ts_i2c_clients = { | |||
| 436 | }; | 437 | }; |
| 437 | 438 | ||
| 438 | #ifdef CONFIG_MFD_SH_MOBILE_SDHI | 439 | #ifdef CONFIG_MFD_SH_MOBILE_SDHI |
| 439 | /* SHDI0 */ | 440 | /* SDHI0 */ |
| 440 | static void sdhi0_set_pwr(struct platform_device *pdev, int state) | 441 | static void sdhi0_set_pwr(struct platform_device *pdev, int state) |
| 441 | { | 442 | { |
| 442 | gpio_set_value(GPIO_PTB6, state); | 443 | gpio_set_value(GPIO_PTB6, state); |
| @@ -474,7 +475,8 @@ static struct platform_device sdhi0_device = { | |||
| 474 | }, | 475 | }, |
| 475 | }; | 476 | }; |
| 476 | 477 | ||
| 477 | /* SHDI1 */ | 478 | #if !defined(CONFIG_MMC_SH_MMCIF) |
| 479 | /* SDHI1 */ | ||
| 478 | static void sdhi1_set_pwr(struct platform_device *pdev, int state) | 480 | static void sdhi1_set_pwr(struct platform_device *pdev, int state) |
| 479 | { | 481 | { |
| 480 | gpio_set_value(GPIO_PTB7, state); | 482 | gpio_set_value(GPIO_PTB7, state); |
| @@ -511,6 +513,7 @@ static struct platform_device sdhi1_device = { | |||
| 511 | .hwblk_id = HWBLK_SDHI1, | 513 | .hwblk_id = HWBLK_SDHI1, |
| 512 | }, | 514 | }, |
| 513 | }; | 515 | }; |
| 516 | #endif /* CONFIG_MMC_SH_MMCIF */ | ||
| 514 | 517 | ||
| 515 | #else | 518 | #else |
| 516 | 519 | ||
| @@ -819,6 +822,58 @@ static struct platform_device vou_device = { | |||
| 819 | }, | 822 | }, |
| 820 | }; | 823 | }; |
| 821 | 824 | ||
| 825 | #if defined(CONFIG_MMC_SH_MMCIF) | ||
| 826 | /* SH_MMCIF */ | ||
| 827 | static void mmcif_set_pwr(struct platform_device *pdev, int state) | ||
| 828 | { | ||
| 829 | gpio_set_value(GPIO_PTB7, state); | ||
| 830 | } | ||
| 831 | |||
| 832 | static void mmcif_down_pwr(struct platform_device *pdev) | ||
| 833 | { | ||
| 834 | gpio_set_value(GPIO_PTB7, 0); | ||
| 835 | } | ||
| 836 | |||
| 837 | static struct resource sh_mmcif_resources[] = { | ||
| 838 | [0] = { | ||
| 839 | .name = "SH_MMCIF", | ||
| 840 | .start = 0xA4CA0000, | ||
| 841 | .end = 0xA4CA00FF, | ||
| 842 | .flags = IORESOURCE_MEM, | ||
| 843 | }, | ||
| 844 | [1] = { | ||
| 845 | /* MMC2I */ | ||
| 846 | .start = 29, | ||
| 847 | .flags = IORESOURCE_IRQ, | ||
| 848 | }, | ||
| 849 | [2] = { | ||
| 850 | /* MMC3I */ | ||
| 851 | .start = 30, | ||
| 852 | .flags = IORESOURCE_IRQ, | ||
| 853 | }, | ||
| 854 | }; | ||
| 855 | |||
| 856 | struct sh_mmcif_plat_data sh_mmcif_plat = { | ||
| 857 | .set_pwr = mmcif_set_pwr, | ||
| 858 | .down_pwr = mmcif_down_pwr, | ||
| 859 | .sup_pclk = 0, /* SH7724: Max Pclk/2 */ | ||
| 860 | .caps = MMC_CAP_4_BIT_DATA | | ||
| 861 | MMC_CAP_8_BIT_DATA | | ||
| 862 | MMC_CAP_NEEDS_POLL, | ||
| 863 | .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
| 864 | }; | ||
| 865 | |||
| 866 | static struct platform_device sh_mmcif_device = { | ||
| 867 | .name = "sh_mmcif", | ||
| 868 | .id = 0, | ||
| 869 | .dev = { | ||
| 870 | .platform_data = &sh_mmcif_plat, | ||
| 871 | }, | ||
| 872 | .num_resources = ARRAY_SIZE(sh_mmcif_resources), | ||
| 873 | .resource = sh_mmcif_resources, | ||
| 874 | }; | ||
| 875 | #endif | ||
| 876 | |||
| 822 | static struct platform_device *ecovec_devices[] __initdata = { | 877 | static struct platform_device *ecovec_devices[] __initdata = { |
| 823 | &heartbeat_device, | 878 | &heartbeat_device, |
| 824 | &nor_flash_device, | 879 | &nor_flash_device, |
| @@ -831,7 +886,9 @@ static struct platform_device *ecovec_devices[] __initdata = { | |||
| 831 | &keysc_device, | 886 | &keysc_device, |
| 832 | #ifdef CONFIG_MFD_SH_MOBILE_SDHI | 887 | #ifdef CONFIG_MFD_SH_MOBILE_SDHI |
| 833 | &sdhi0_device, | 888 | &sdhi0_device, |
| 889 | #if !defined(CONFIG_MMC_SH_MMCIF) | ||
| 834 | &sdhi1_device, | 890 | &sdhi1_device, |
| 891 | #endif | ||
| 835 | #else | 892 | #else |
| 836 | &msiof0_device, | 893 | &msiof0_device, |
| 837 | #endif | 894 | #endif |
| @@ -841,6 +898,9 @@ static struct platform_device *ecovec_devices[] __initdata = { | |||
| 841 | &fsi_device, | 898 | &fsi_device, |
| 842 | &irda_device, | 899 | &irda_device, |
| 843 | &vou_device, | 900 | &vou_device, |
| 901 | #if defined(CONFIG_MMC_SH_MMCIF) | ||
| 902 | &sh_mmcif_device, | ||
| 903 | #endif | ||
| 844 | }; | 904 | }; |
| 845 | 905 | ||
| 846 | #ifdef CONFIG_I2C | 906 | #ifdef CONFIG_I2C |
| @@ -1134,6 +1194,7 @@ static int __init arch_setup(void) | |||
| 1134 | gpio_request(GPIO_PTB6, NULL); | 1194 | gpio_request(GPIO_PTB6, NULL); |
| 1135 | gpio_direction_output(GPIO_PTB6, 0); | 1195 | gpio_direction_output(GPIO_PTB6, 0); |
| 1136 | 1196 | ||
| 1197 | #if !defined(CONFIG_MMC_SH_MMCIF) | ||
| 1137 | /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ | 1198 | /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ |
| 1138 | gpio_request(GPIO_FN_SDHI1CD, NULL); | 1199 | gpio_request(GPIO_FN_SDHI1CD, NULL); |
| 1139 | gpio_request(GPIO_FN_SDHI1WP, NULL); | 1200 | gpio_request(GPIO_FN_SDHI1WP, NULL); |
| @@ -1148,6 +1209,7 @@ static int __init arch_setup(void) | |||
| 1148 | 1209 | ||
| 1149 | /* I/O buffer drive ability is high for SDHI1 */ | 1210 | /* I/O buffer drive ability is high for SDHI1 */ |
| 1150 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); | 1211 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); |
| 1212 | #endif /* CONFIG_MMC_SH_MMCIF */ | ||
| 1151 | #else | 1213 | #else |
| 1152 | /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ | 1214 | /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ |
| 1153 | gpio_request(GPIO_FN_MSIOF0_TXD, NULL); | 1215 | gpio_request(GPIO_FN_MSIOF0_TXD, NULL); |
| @@ -1223,6 +1285,25 @@ static int __init arch_setup(void) | |||
| 1223 | gpio_request(GPIO_PTU5, NULL); | 1285 | gpio_request(GPIO_PTU5, NULL); |
| 1224 | gpio_direction_output(GPIO_PTU5, 0); | 1286 | gpio_direction_output(GPIO_PTU5, 0); |
| 1225 | 1287 | ||
| 1288 | #if defined(CONFIG_MMC_SH_MMCIF) | ||
| 1289 | /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ | ||
| 1290 | gpio_request(GPIO_FN_MMC_D7, NULL); | ||
| 1291 | gpio_request(GPIO_FN_MMC_D6, NULL); | ||
| 1292 | gpio_request(GPIO_FN_MMC_D5, NULL); | ||
| 1293 | gpio_request(GPIO_FN_MMC_D4, NULL); | ||
| 1294 | gpio_request(GPIO_FN_MMC_D3, NULL); | ||
| 1295 | gpio_request(GPIO_FN_MMC_D2, NULL); | ||
| 1296 | gpio_request(GPIO_FN_MMC_D1, NULL); | ||
| 1297 | gpio_request(GPIO_FN_MMC_D0, NULL); | ||
| 1298 | gpio_request(GPIO_FN_MMC_CLK, NULL); | ||
| 1299 | gpio_request(GPIO_FN_MMC_CMD, NULL); | ||
| 1300 | gpio_request(GPIO_PTB7, NULL); | ||
| 1301 | gpio_direction_output(GPIO_PTB7, 0); | ||
| 1302 | |||
| 1303 | /* I/O buffer drive ability is high for MMCIF */ | ||
| 1304 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); | ||
| 1305 | #endif | ||
| 1306 | |||
| 1226 | /* enable I2C device */ | 1307 | /* enable I2C device */ |
| 1227 | i2c_register_board_info(0, i2c0_devices, | 1308 | i2c_register_board_info(0, i2c0_devices, |
| 1228 | ARRAY_SIZE(i2c0_devices)); | 1309 | ARRAY_SIZE(i2c0_devices)); |
diff --git a/arch/sh/boot/romimage/Makefile b/arch/sh/boot/romimage/Makefile index f473a24a2d92..2216ee57f251 100644 --- a/arch/sh/boot/romimage/Makefile +++ b/arch/sh/boot/romimage/Makefile | |||
| @@ -1,16 +1,21 @@ | |||
| 1 | # | 1 | # |
| 2 | # linux/arch/sh/boot/romimage/Makefile | 2 | # linux/arch/sh/boot/romimage/Makefile |
| 3 | # | 3 | # |
| 4 | # create an image suitable for burning to flash from zImage | 4 | # create an romImage file suitable for burning to flash/mmc from zImage |
| 5 | # | 5 | # |
| 6 | 6 | ||
| 7 | targets := vmlinux head.o zeropage.bin piggy.o | 7 | targets := vmlinux head.o zeropage.bin piggy.o |
| 8 | load-y := 0 | ||
| 8 | 9 | ||
| 9 | OBJECTS = $(obj)/head.o | 10 | mmcif-load-$(CONFIG_CPU_SUBTYPE_SH7724) := 0xe5200000 # ILRAM |
| 10 | LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart \ | 11 | mmcif-obj-$(CONFIG_CPU_SUBTYPE_SH7724) := $(obj)/mmcif-sh7724.o |
| 12 | load-$(CONFIG_ROMIMAGE_MMCIF) := $(mmcif-load-y) | ||
| 13 | obj-$(CONFIG_ROMIMAGE_MMCIF) := $(mmcif-obj-y) | ||
| 14 | |||
| 15 | LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(load-y) -e romstart \ | ||
| 11 | -T $(obj)/../../kernel/vmlinux.lds | 16 | -T $(obj)/../../kernel/vmlinux.lds |
| 12 | 17 | ||
| 13 | $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE | 18 | $(obj)/vmlinux: $(obj)/head.o $(obj-y) $(obj)/piggy.o FORCE |
| 14 | $(call if_changed,ld) | 19 | $(call if_changed,ld) |
| 15 | @: | 20 | @: |
| 16 | 21 | ||
diff --git a/arch/sh/boot/romimage/head.S b/arch/sh/boot/romimage/head.S index 93e779a405ec..4671d1b82150 100644 --- a/arch/sh/boot/romimage/head.S +++ b/arch/sh/boot/romimage/head.S | |||
| @@ -12,8 +12,40 @@ romstart: | |||
| 12 | /* include board specific setup code */ | 12 | /* include board specific setup code */ |
| 13 | #include <mach/romimage.h> | 13 | #include <mach/romimage.h> |
| 14 | 14 | ||
| 15 | #ifdef CONFIG_ROMIMAGE_MMCIF | ||
| 16 | /* load the romImage to above the empty zero page */ | ||
| 17 | mov.l empty_zero_page_dst, r4 | ||
| 18 | mov.l empty_zero_page_dst_adj, r5 | ||
| 19 | add r5, r4 | ||
| 20 | mov.l bytes_to_load, r5 | ||
| 21 | mov.l loader_function, r7 | ||
| 22 | jsr @r7 | ||
| 23 | mov r4, r15 | ||
| 24 | |||
| 25 | mov.l empty_zero_page_dst, r4 | ||
| 26 | mov.l empty_zero_page_dst_adj, r5 | ||
| 27 | add r5, r4 | ||
| 28 | mov.l loaded_code_offs, r5 | ||
| 29 | add r5, r4 | ||
| 30 | jmp @r4 | ||
| 31 | nop | ||
| 32 | |||
| 33 | .balign 4 | ||
| 34 | empty_zero_page_dst_adj: | ||
| 35 | .long PAGE_SIZE | ||
| 36 | bytes_to_load: | ||
| 37 | .long end_data - romstart | ||
| 38 | loader_function: | ||
| 39 | .long mmcif_loader | ||
| 40 | loaded_code_offs: | ||
| 41 | .long loaded_code - romstart | ||
| 42 | loaded_code: | ||
| 43 | #endif /* CONFIG_ROMIMAGE_MMCIF */ | ||
| 44 | |||
| 15 | /* copy the empty_zero_page contents to where vmlinux expects it */ | 45 | /* copy the empty_zero_page contents to where vmlinux expects it */ |
| 16 | mova empty_zero_page_src, r0 | 46 | mova extra_data_pos, r0 |
| 47 | mov.l extra_data_size, r1 | ||
| 48 | add r1, r0 | ||
| 17 | mov.l empty_zero_page_dst, r1 | 49 | mov.l empty_zero_page_dst, r1 |
| 18 | mov #(PAGE_SHIFT - 4), r4 | 50 | mov #(PAGE_SHIFT - 4), r4 |
| 19 | mov #1, r3 | 51 | mov #1, r3 |
| @@ -37,7 +69,9 @@ romstart: | |||
| 37 | mov #PAGE_SHIFT, r4 | 69 | mov #PAGE_SHIFT, r4 |
| 38 | mov #1, r1 | 70 | mov #1, r1 |
| 39 | shld r4, r1 | 71 | shld r4, r1 |
| 40 | mova empty_zero_page_src, r0 | 72 | mova extra_data_pos, r0 |
| 73 | add r1, r0 | ||
| 74 | mov.l extra_data_size, r1 | ||
| 41 | add r1, r0 | 75 | add r1, r0 |
| 42 | jmp @r0 | 76 | jmp @r0 |
| 43 | nop | 77 | nop |
| @@ -45,4 +79,6 @@ romstart: | |||
| 45 | .align 2 | 79 | .align 2 |
| 46 | empty_zero_page_dst: | 80 | empty_zero_page_dst: |
| 47 | .long _text | 81 | .long _text |
| 48 | empty_zero_page_src: | 82 | extra_data_pos: |
| 83 | extra_data_size: | ||
| 84 | .long zero_page_pos - extra_data_pos | ||
diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c new file mode 100644 index 000000000000..14863d7292cb --- /dev/null +++ b/arch/sh/boot/romimage/mmcif-sh7724.c | |||
| @@ -0,0 +1,72 @@ | |||
| 1 | /* | ||
| 2 | * sh7724 MMCIF loader | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Magnus Damm | ||
| 5 | * | ||
| 6 | * This file is subject to the terms and conditions of the GNU General Public | ||
| 7 | * License. See the file "COPYING" in the main directory of this archive | ||
| 8 | * for more details. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/mmc/sh_mmcif.h> | ||
| 12 | #include <mach/romimage.h> | ||
| 13 | |||
| 14 | #define MMCIF_BASE (void __iomem *)0xa4ca0000 | ||
| 15 | |||
| 16 | #define MSTPCR2 0xa4150038 | ||
| 17 | #define PTWCR 0xa4050146 | ||
| 18 | #define PTXCR 0xa4050148 | ||
| 19 | #define PSELA 0xa405014e | ||
| 20 | #define PSELE 0xa4050156 | ||
| 21 | #define HIZCRC 0xa405015c | ||
| 22 | #define DRVCRA 0xa405018a | ||
| 23 | |||
| 24 | enum { MMCIF_PROGRESS_ENTER, MMCIF_PROGRESS_INIT, | ||
| 25 | MMCIF_PROGRESS_LOAD, MMCIF_PROGRESS_DONE }; | ||
| 26 | |||
| 27 | /* SH7724 specific MMCIF loader | ||
| 28 | * | ||
| 29 | * loads the romImage from an MMC card starting from block 512 | ||
| 30 | * use the following line to write the romImage to an MMC card | ||
| 31 | * # dd if=arch/sh/boot/romImage of=/dev/sdx bs=512 seek=512 | ||
| 32 | */ | ||
| 33 | asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) | ||
| 34 | { | ||
| 35 | mmcif_update_progress(MMCIF_PROGRESS_ENTER); | ||
| 36 | |||
| 37 | /* enable clock to the MMCIF hardware block */ | ||
| 38 | __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2); | ||
| 39 | |||
| 40 | /* setup pins D7-D0 */ | ||
| 41 | __raw_writew(0x0000, PTWCR); | ||
| 42 | |||
| 43 | /* setup pins MMC_CLK, MMC_CMD */ | ||
| 44 | __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR); | ||
| 45 | |||
| 46 | /* select D3-D0 pin function */ | ||
| 47 | __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA); | ||
| 48 | |||
| 49 | /* select D7-D4 pin function */ | ||
| 50 | __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE); | ||
| 51 | |||
| 52 | /* disable Hi-Z for the MMC pins */ | ||
| 53 | __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC); | ||
| 54 | |||
| 55 | /* high drive capability for MMC pins */ | ||
| 56 | __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA); | ||
| 57 | |||
| 58 | mmcif_update_progress(MMCIF_PROGRESS_INIT); | ||
| 59 | |||
| 60 | /* setup MMCIF hardware */ | ||
| 61 | sh_mmcif_boot_init(MMCIF_BASE); | ||
| 62 | |||
| 63 | mmcif_update_progress(MMCIF_PROGRESS_LOAD); | ||
| 64 | |||
| 65 | /* load kernel via MMCIF interface */ | ||
| 66 | sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes); | ||
| 67 | |||
| 68 | /* disable clock to the MMCIF hardware block */ | ||
| 69 | __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2); | ||
| 70 | |||
| 71 | mmcif_update_progress(MMCIF_PROGRESS_DONE); | ||
| 72 | } | ||
diff --git a/arch/sh/boot/romimage/vmlinux.scr b/arch/sh/boot/romimage/vmlinux.scr index 287c08f8b4bb..590394e2f5f2 100644 --- a/arch/sh/boot/romimage/vmlinux.scr +++ b/arch/sh/boot/romimage/vmlinux.scr | |||
| @@ -1,6 +1,8 @@ | |||
| 1 | SECTIONS | 1 | SECTIONS |
| 2 | { | 2 | { |
| 3 | .text : { | 3 | .text : { |
| 4 | zero_page_pos = .; | ||
| 4 | *(.data) | 5 | *(.data) |
| 6 | end_data = .; | ||
| 5 | } | 7 | } |
| 6 | } | 8 | } |
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h index fbbf550cc529..4c27b68789b3 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7724.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10] | 9 | * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10] |
| 10 | * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3] | 10 | * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3] |
| 11 | * MD8: Test Mode | 11 | * MD8: Test Mode |
| 12 | * BOOT: FBR - Boot Mode (L: MMCIF, H: Area0) | ||
| 12 | */ | 13 | */ |
| 13 | 14 | ||
| 14 | /* Pin Function Controller: | 15 | /* Pin Function Controller: |
diff --git a/arch/sh/include/mach-common/mach/romimage.h b/arch/sh/include/mach-common/mach/romimage.h index 267e24112d82..08fb42269ecd 100644 --- a/arch/sh/include/mach-common/mach/romimage.h +++ b/arch/sh/include/mach-common/mach/romimage.h | |||
| @@ -1 +1,11 @@ | |||
| 1 | #ifdef __ASSEMBLY__ | ||
| 2 | |||
| 1 | /* do nothing here by default */ | 3 | /* do nothing here by default */ |
| 4 | |||
| 5 | #else /* __ASSEMBLY__ */ | ||
| 6 | |||
| 7 | extern inline void mmcif_update_progress(int nr) | ||
| 8 | { | ||
| 9 | } | ||
| 10 | |||
| 11 | #endif /* __ASSEMBLY__ */ | ||
diff --git a/arch/sh/include/mach-ecovec24/mach/romimage.h b/arch/sh/include/mach-ecovec24/mach/romimage.h index 1c8787ecb1c1..1dcf5e6c8d83 100644 --- a/arch/sh/include/mach-ecovec24/mach/romimage.h +++ b/arch/sh/include/mach-ecovec24/mach/romimage.h | |||
| @@ -1,3 +1,5 @@ | |||
| 1 | #ifdef __ASSEMBLY__ | ||
| 2 | |||
| 1 | /* EcoVec board specific boot code: | 3 | /* EcoVec board specific boot code: |
| 2 | * converts the "partner-jet-script.txt" script into assembly | 4 | * converts the "partner-jet-script.txt" script into assembly |
| 3 | * the assembly code is the first code to be executed in the romImage | 5 | * the assembly code is the first code to be executed in the romImage |
| @@ -18,3 +20,28 @@ | |||
| 18 | .align 2 | 20 | .align 2 |
| 19 | 1 : .long 0xa8000000 | 21 | 1 : .long 0xa8000000 |
| 20 | 2 : | 22 | 2 : |
| 23 | |||
| 24 | #else /* __ASSEMBLY__ */ | ||
| 25 | |||
| 26 | /* Ecovec board specific information: | ||
| 27 | * | ||
| 28 | * Set the following to enable MMCIF boot from the MMC card in CN12: | ||
| 29 | * | ||
| 30 | * DS1.5 = OFF (SH BOOT pin set to L) | ||
| 31 | * DS2.6 = OFF (Select MMCIF on CN12 instead of SDHI1) | ||
| 32 | * DS2.7 = ON (Select MMCIF on CN12 instead of SDHI1) | ||
| 33 | * | ||
| 34 | */ | ||
| 35 | #define HIZCRA 0xa4050158 | ||
| 36 | #define PGDR 0xa405012c | ||
| 37 | |||
| 38 | extern inline void mmcif_update_progress(int nr) | ||
| 39 | { | ||
| 40 | /* disable Hi-Z for LED pins */ | ||
| 41 | __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA); | ||
| 42 | |||
| 43 | /* update progress on LED4, LED5, LED6 and LED7 */ | ||
| 44 | __raw_writeb(1 << (nr - 1), PGDR); | ||
| 45 | } | ||
| 46 | |||
| 47 | #endif /* __ASSEMBLY__ */ | ||
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h index a110823f2bde..976256a323f2 100644 --- a/arch/sh/include/mach-kfr2r09/mach/romimage.h +++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h | |||
| @@ -1,3 +1,5 @@ | |||
| 1 | #ifdef __ASSEMBLY__ | ||
| 2 | |||
| 1 | /* kfr2r09 board specific boot code: | 3 | /* kfr2r09 board specific boot code: |
| 2 | * converts the "partner-jet-script.txt" script into assembly | 4 | * converts the "partner-jet-script.txt" script into assembly |
| 3 | * the assembly code is the first code to be executed in the romImage | 5 | * the assembly code is the first code to be executed in the romImage |
| @@ -18,3 +20,11 @@ | |||
| 18 | .align 2 | 20 | .align 2 |
| 19 | 1: .long 0xa8000000 | 21 | 1: .long 0xa8000000 |
| 20 | 2: | 22 | 2: |
| 23 | |||
| 24 | #else /* __ASSEMBLY__ */ | ||
| 25 | |||
| 26 | extern inline void mmcif_update_progress(int nr) | ||
| 27 | { | ||
| 28 | } | ||
| 29 | |||
| 30 | #endif /* __ASSEMBLY__ */ | ||
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index d4104ce9fe53..6c4bbba2a675 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c | |||
| @@ -436,29 +436,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
| 436 | 0, sizeof(struct pt_dspregs), | 436 | 0, sizeof(struct pt_dspregs), |
| 437 | (const void __user *)data); | 437 | (const void __user *)data); |
| 438 | #endif | 438 | #endif |
| 439 | #ifdef CONFIG_BINFMT_ELF_FDPIC | ||
| 440 | case PTRACE_GETFDPIC: { | ||
| 441 | unsigned long tmp = 0; | ||
| 442 | |||
| 443 | switch (addr) { | ||
| 444 | case PTRACE_GETFDPIC_EXEC: | ||
| 445 | tmp = child->mm->context.exec_fdpic_loadmap; | ||
| 446 | break; | ||
| 447 | case PTRACE_GETFDPIC_INTERP: | ||
| 448 | tmp = child->mm->context.interp_fdpic_loadmap; | ||
| 449 | break; | ||
| 450 | default: | ||
| 451 | break; | ||
| 452 | } | ||
| 453 | |||
| 454 | ret = 0; | ||
| 455 | if (put_user(tmp, datap)) { | ||
| 456 | ret = -EFAULT; | ||
| 457 | break; | ||
| 458 | } | ||
| 459 | break; | ||
| 460 | } | ||
| 461 | #endif | ||
| 462 | default: | 439 | default: |
| 463 | ret = ptrace_request(child, request, addr, data); | 440 | ret = ptrace_request(child, request, addr, data); |
| 464 | break; | 441 | break; |
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index d6781ce687e2..6f1470baa314 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig | |||
| @@ -133,6 +133,9 @@ config ZONE_DMA | |||
| 133 | config NEED_DMA_MAP_STATE | 133 | config NEED_DMA_MAP_STATE |
| 134 | def_bool y | 134 | def_bool y |
| 135 | 135 | ||
| 136 | config NEED_SG_DMA_LENGTH | ||
| 137 | def_bool y | ||
| 138 | |||
| 136 | config GENERIC_ISA_DMA | 139 | config GENERIC_ISA_DMA |
| 137 | bool | 140 | bool |
| 138 | default y if SPARC32 | 141 | default y if SPARC32 |
diff --git a/arch/sparc/include/asm/scatterlist.h b/arch/sparc/include/asm/scatterlist.h index d1120257b033..433e45f05fd4 100644 --- a/arch/sparc/include/asm/scatterlist.h +++ b/arch/sparc/include/asm/scatterlist.h | |||
| @@ -1,8 +1,9 @@ | |||
| 1 | #ifndef _SPARC_SCATTERLIST_H | 1 | #ifndef _SPARC_SCATTERLIST_H |
| 2 | #define _SPARC_SCATTERLIST_H | 2 | #define _SPARC_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #define sg_dma_len(sg) ((sg)->dma_length) | ||
| 5 | |||
| 6 | #include <asm-generic/scatterlist.h> | 4 | #include <asm-generic/scatterlist.h> |
| 7 | 5 | ||
| 6 | #define ISA_DMA_THRESHOLD (~0UL) | ||
| 7 | #define ARCH_HAS_SG_CHAIN | ||
| 8 | |||
| 8 | #endif /* !(_SPARC_SCATTERLIST_H) */ | 9 | #endif /* !(_SPARC_SCATTERLIST_H) */ |
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 34ce49f80eac..0ec92c8861dd 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c | |||
| @@ -92,6 +92,8 @@ struct cpu_hw_events { | |||
| 92 | 92 | ||
| 93 | /* Enabled/disable state. */ | 93 | /* Enabled/disable state. */ |
| 94 | int enabled; | 94 | int enabled; |
| 95 | |||
| 96 | unsigned int group_flag; | ||
| 95 | }; | 97 | }; |
| 96 | DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, }; | 98 | DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, }; |
| 97 | 99 | ||
| @@ -981,53 +983,6 @@ static int collect_events(struct perf_event *group, int max_count, | |||
| 981 | return n; | 983 | return n; |
| 982 | } | 984 | } |
| 983 | 985 | ||
| 984 | static void event_sched_in(struct perf_event *event) | ||
| 985 | { | ||
| 986 | event->state = PERF_EVENT_STATE_ACTIVE; | ||
| 987 | event->oncpu = smp_processor_id(); | ||
| 988 | event->tstamp_running += event->ctx->time - event->tstamp_stopped; | ||
| 989 | if (is_software_event(event)) | ||
| 990 | event->pmu->enable(event); | ||
| 991 | } | ||
| 992 | |||
| 993 | int hw_perf_group_sched_in(struct perf_event *group_leader, | ||
| 994 | struct perf_cpu_context *cpuctx, | ||
| 995 | struct perf_event_context *ctx) | ||
| 996 | { | ||
| 997 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
| 998 | struct perf_event *sub; | ||
| 999 | int n0, n; | ||
| 1000 | |||
| 1001 | if (!sparc_pmu) | ||
| 1002 | return 0; | ||
| 1003 | |||
| 1004 | n0 = cpuc->n_events; | ||
| 1005 | n = collect_events(group_leader, perf_max_events - n0, | ||
| 1006 | &cpuc->event[n0], &cpuc->events[n0], | ||
| 1007 | &cpuc->current_idx[n0]); | ||
| 1008 | if (n < 0) | ||
| 1009 | return -EAGAIN; | ||
| 1010 | if (check_excludes(cpuc->event, n0, n)) | ||
| 1011 | return -EINVAL; | ||
| 1012 | if (sparc_check_constraints(cpuc->event, cpuc->events, n + n0)) | ||
| 1013 | return -EAGAIN; | ||
| 1014 | cpuc->n_events = n0 + n; | ||
| 1015 | cpuc->n_added += n; | ||
| 1016 | |||
| 1017 | cpuctx->active_oncpu += n; | ||
| 1018 | n = 1; | ||
| 1019 | event_sched_in(group_leader); | ||
| 1020 | list_for_each_entry(sub, &group_leader->sibling_list, group_entry) { | ||
| 1021 | if (sub->state != PERF_EVENT_STATE_OFF) { | ||
| 1022 | event_sched_in(sub); | ||
| 1023 | n++; | ||
| 1024 | } | ||
| 1025 | } | ||
| 1026 | ctx->nr_active += n; | ||
| 1027 | |||
| 1028 | return 1; | ||
| 1029 | } | ||
| 1030 | |||
| 1031 | static int sparc_pmu_enable(struct perf_event *event) | 986 | static int sparc_pmu_enable(struct perf_event *event) |
| 1032 | { | 987 | { |
| 1033 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | 988 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); |
| @@ -1045,11 +1000,20 @@ static int sparc_pmu_enable(struct perf_event *event) | |||
| 1045 | cpuc->events[n0] = event->hw.event_base; | 1000 | cpuc->events[n0] = event->hw.event_base; |
| 1046 | cpuc->current_idx[n0] = PIC_NO_INDEX; | 1001 | cpuc->current_idx[n0] = PIC_NO_INDEX; |
| 1047 | 1002 | ||
| 1003 | /* | ||
| 1004 | * If group events scheduling transaction was started, | ||
| 1005 | * skip the schedulability test here, it will be peformed | ||
| 1006 | * at commit time(->commit_txn) as a whole | ||
| 1007 | */ | ||
| 1008 | if (cpuc->group_flag & PERF_EVENT_TXN_STARTED) | ||
| 1009 | goto nocheck; | ||
| 1010 | |||
| 1048 | if (check_excludes(cpuc->event, n0, 1)) | 1011 | if (check_excludes(cpuc->event, n0, 1)) |
| 1049 | goto out; | 1012 | goto out; |
| 1050 | if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1)) | 1013 | if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1)) |
| 1051 | goto out; | 1014 | goto out; |
| 1052 | 1015 | ||
| 1016 | nocheck: | ||
| 1053 | cpuc->n_events++; | 1017 | cpuc->n_events++; |
| 1054 | cpuc->n_added++; | 1018 | cpuc->n_added++; |
| 1055 | 1019 | ||
| @@ -1129,11 +1093,61 @@ static int __hw_perf_event_init(struct perf_event *event) | |||
| 1129 | return 0; | 1093 | return 0; |
| 1130 | } | 1094 | } |
| 1131 | 1095 | ||
| 1096 | /* | ||
| 1097 | * Start group events scheduling transaction | ||
| 1098 | * Set the flag to make pmu::enable() not perform the | ||
| 1099 | * schedulability test, it will be performed at commit time | ||
| 1100 | */ | ||
| 1101 | static void sparc_pmu_start_txn(const struct pmu *pmu) | ||
| 1102 | { | ||
| 1103 | struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); | ||
| 1104 | |||
| 1105 | cpuhw->group_flag |= PERF_EVENT_TXN_STARTED; | ||
| 1106 | } | ||
| 1107 | |||
| 1108 | /* | ||
| 1109 | * Stop group events scheduling transaction | ||
| 1110 | * Clear the flag and pmu::enable() will perform the | ||
| 1111 | * schedulability test. | ||
| 1112 | */ | ||
| 1113 | static void sparc_pmu_cancel_txn(const struct pmu *pmu) | ||
| 1114 | { | ||
| 1115 | struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events); | ||
| 1116 | |||
| 1117 | cpuhw->group_flag &= ~PERF_EVENT_TXN_STARTED; | ||
| 1118 | } | ||
| 1119 | |||
| 1120 | /* | ||
| 1121 | * Commit group events scheduling transaction | ||
| 1122 | * Perform the group schedulability test as a whole | ||
| 1123 | * Return 0 if success | ||
| 1124 | */ | ||
| 1125 | static int sparc_pmu_commit_txn(const struct pmu *pmu) | ||
| 1126 | { | ||
| 1127 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
| 1128 | int n; | ||
| 1129 | |||
| 1130 | if (!sparc_pmu) | ||
| 1131 | return -EINVAL; | ||
| 1132 | |||
| 1133 | cpuc = &__get_cpu_var(cpu_hw_events); | ||
| 1134 | n = cpuc->n_events; | ||
| 1135 | if (check_excludes(cpuc->event, 0, n)) | ||
| 1136 | return -EINVAL; | ||
| 1137 | if (sparc_check_constraints(cpuc->event, cpuc->events, n)) | ||
| 1138 | return -EAGAIN; | ||
| 1139 | |||
| 1140 | return 0; | ||
| 1141 | } | ||
| 1142 | |||
| 1132 | static const struct pmu pmu = { | 1143 | static const struct pmu pmu = { |
| 1133 | .enable = sparc_pmu_enable, | 1144 | .enable = sparc_pmu_enable, |
| 1134 | .disable = sparc_pmu_disable, | 1145 | .disable = sparc_pmu_disable, |
| 1135 | .read = sparc_pmu_read, | 1146 | .read = sparc_pmu_read, |
| 1136 | .unthrottle = sparc_pmu_unthrottle, | 1147 | .unthrottle = sparc_pmu_unthrottle, |
| 1148 | .start_txn = sparc_pmu_start_txn, | ||
| 1149 | .cancel_txn = sparc_pmu_cancel_txn, | ||
| 1150 | .commit_txn = sparc_pmu_commit_txn, | ||
| 1137 | }; | 1151 | }; |
| 1138 | 1152 | ||
| 1139 | const struct pmu *hw_perf_event_init(struct perf_event *event) | 1153 | const struct pmu *hw_perf_event_init(struct perf_event *event) |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index e0c619c55b4e..dcb0593b4a66 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
| @@ -109,6 +109,9 @@ config SBUS | |||
| 109 | config NEED_DMA_MAP_STATE | 109 | config NEED_DMA_MAP_STATE |
| 110 | def_bool (X86_64 || DMAR || DMA_API_DEBUG) | 110 | def_bool (X86_64 || DMAR || DMA_API_DEBUG) |
| 111 | 111 | ||
| 112 | config NEED_SG_DMA_LENGTH | ||
| 113 | def_bool y | ||
| 114 | |||
| 112 | config GENERIC_ISA_DMA | 115 | config GENERIC_ISA_DMA |
| 113 | def_bool y | 116 | def_bool y |
| 114 | 117 | ||
| @@ -1703,6 +1706,10 @@ config HAVE_ARCH_EARLY_PFN_TO_NID | |||
| 1703 | def_bool X86_64 | 1706 | def_bool X86_64 |
| 1704 | depends on NUMA | 1707 | depends on NUMA |
| 1705 | 1708 | ||
| 1709 | config USE_PERCPU_NUMA_NODE_ID | ||
| 1710 | def_bool X86_64 | ||
| 1711 | depends on NUMA | ||
| 1712 | |||
| 1706 | menu "Power management and ACPI options" | 1713 | menu "Power management and ACPI options" |
| 1707 | 1714 | ||
| 1708 | config ARCH_HIBERNATION_HEADER | 1715 | config ARCH_HIBERNATION_HEADER |
diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h index 56f462cf22d2..aa2c39d968fc 100644 --- a/arch/x86/include/asm/acpi.h +++ b/arch/x86/include/asm/acpi.h | |||
| @@ -85,7 +85,6 @@ extern int acpi_ioapic; | |||
| 85 | extern int acpi_noirq; | 85 | extern int acpi_noirq; |
| 86 | extern int acpi_strict; | 86 | extern int acpi_strict; |
| 87 | extern int acpi_disabled; | 87 | extern int acpi_disabled; |
| 88 | extern int acpi_ht; | ||
| 89 | extern int acpi_pci_disabled; | 88 | extern int acpi_pci_disabled; |
| 90 | extern int acpi_skip_timer_override; | 89 | extern int acpi_skip_timer_override; |
| 91 | extern int acpi_use_timer_override; | 90 | extern int acpi_use_timer_override; |
| @@ -97,7 +96,6 @@ void acpi_pic_sci_set_trigger(unsigned int, u16); | |||
| 97 | static inline void disable_acpi(void) | 96 | static inline void disable_acpi(void) |
| 98 | { | 97 | { |
| 99 | acpi_disabled = 1; | 98 | acpi_disabled = 1; |
| 100 | acpi_ht = 0; | ||
| 101 | acpi_pci_disabled = 1; | 99 | acpi_pci_disabled = 1; |
| 102 | acpi_noirq = 1; | 100 | acpi_noirq = 1; |
| 103 | } | 101 | } |
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index dca9c545f44e..468145914389 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h | |||
| @@ -332,6 +332,7 @@ static __always_inline __pure bool __static_cpu_has(u8 bit) | |||
| 332 | #endif | 332 | #endif |
| 333 | } | 333 | } |
| 334 | 334 | ||
| 335 | #if __GNUC__ >= 4 | ||
| 335 | #define static_cpu_has(bit) \ | 336 | #define static_cpu_has(bit) \ |
| 336 | ( \ | 337 | ( \ |
| 337 | __builtin_constant_p(boot_cpu_has(bit)) ? \ | 338 | __builtin_constant_p(boot_cpu_has(bit)) ? \ |
| @@ -340,6 +341,12 @@ static __always_inline __pure bool __static_cpu_has(u8 bit) | |||
| 340 | __static_cpu_has(bit) : \ | 341 | __static_cpu_has(bit) : \ |
| 341 | boot_cpu_has(bit) \ | 342 | boot_cpu_has(bit) \ |
| 342 | ) | 343 | ) |
| 344 | #else | ||
| 345 | /* | ||
| 346 | * gcc 3.x is too stupid to do the static test; fall back to dynamic. | ||
| 347 | */ | ||
| 348 | #define static_cpu_has(bit) boot_cpu_has(bit) | ||
| 349 | #endif | ||
| 343 | 350 | ||
| 344 | #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ | 351 | #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ |
| 345 | 352 | ||
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 6c3fdd631ed3..f32a4301c4d4 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h | |||
| @@ -225,5 +225,13 @@ extern void mcheck_intel_therm_init(void); | |||
| 225 | static inline void mcheck_intel_therm_init(void) { } | 225 | static inline void mcheck_intel_therm_init(void) { } |
| 226 | #endif | 226 | #endif |
| 227 | 227 | ||
| 228 | /* | ||
| 229 | * Used by APEI to report memory error via /dev/mcelog | ||
| 230 | */ | ||
| 231 | |||
| 232 | struct cper_sec_mem_err; | ||
| 233 | extern void apei_mce_report_mem_error(int corrected, | ||
| 234 | struct cper_sec_mem_err *mem_err); | ||
| 235 | |||
| 228 | #endif /* __KERNEL__ */ | 236 | #endif /* __KERNEL__ */ |
| 229 | #endif /* _ASM_X86_MCE_H */ | 237 | #endif /* _ASM_X86_MCE_H */ |
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index f9324851eba0..b49d8ca228f6 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
| @@ -236,6 +236,8 @@ | |||
| 236 | 236 | ||
| 237 | #define MSR_IA32_MISC_ENABLE 0x000001a0 | 237 | #define MSR_IA32_MISC_ENABLE 0x000001a0 |
| 238 | 238 | ||
| 239 | #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 | ||
| 240 | |||
| 239 | /* MISC_ENABLE bits: architectural */ | 241 | /* MISC_ENABLE bits: architectural */ |
| 240 | #define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0) | 242 | #define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0) |
| 241 | #define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1) | 243 | #define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1) |
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h index b05400a542ff..64a8ebff06fc 100644 --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h | |||
| @@ -89,7 +89,8 @@ | |||
| 89 | P4_CCCR_ENABLE) | 89 | P4_CCCR_ENABLE) |
| 90 | 90 | ||
| 91 | /* HT mask */ | 91 | /* HT mask */ |
| 92 | #define P4_CCCR_MASK_HT (P4_CCCR_MASK | P4_CCCR_THREAD_ANY) | 92 | #define P4_CCCR_MASK_HT \ |
| 93 | (P4_CCCR_MASK | P4_CCCR_OVF_PMI_T1 | P4_CCCR_THREAD_ANY) | ||
| 93 | 94 | ||
| 94 | #define P4_GEN_ESCR_EMASK(class, name, bit) \ | 95 | #define P4_GEN_ESCR_EMASK(class, name, bit) \ |
| 95 | class##__##name = ((1 << bit) << P4_ESCR_EVENTMASK_SHIFT) | 96 | class##__##name = ((1 << bit) << P4_ESCR_EVENTMASK_SHIFT) |
diff --git a/arch/x86/include/asm/rdc321x_defs.h b/arch/x86/include/asm/rdc321x_defs.h deleted file mode 100644 index c8e9c8bed3d0..000000000000 --- a/arch/x86/include/asm/rdc321x_defs.h +++ /dev/null | |||
| @@ -1,12 +0,0 @@ | |||
| 1 | #define PFX "rdc321x: " | ||
| 2 | |||
| 3 | /* General purpose configuration and data registers */ | ||
| 4 | #define RDC3210_CFGREG_ADDR 0x0CF8 | ||
| 5 | #define RDC3210_CFGREG_DATA 0x0CFC | ||
| 6 | |||
| 7 | #define RDC321X_GPIO_CTRL_REG1 0x48 | ||
| 8 | #define RDC321X_GPIO_CTRL_REG2 0x84 | ||
| 9 | #define RDC321X_GPIO_DATA_REG1 0x4c | ||
| 10 | #define RDC321X_GPIO_DATA_REG2 0x88 | ||
| 11 | |||
| 12 | #define RDC321X_MAX_GPIO 58 | ||
diff --git a/arch/x86/include/asm/scatterlist.h b/arch/x86/include/asm/scatterlist.h index 75af592677ec..fb0b1874396f 100644 --- a/arch/x86/include/asm/scatterlist.h +++ b/arch/x86/include/asm/scatterlist.h | |||
| @@ -1,8 +1,9 @@ | |||
| 1 | #ifndef _ASM_X86_SCATTERLIST_H | 1 | #ifndef _ASM_X86_SCATTERLIST_H |
| 2 | #define _ASM_X86_SCATTERLIST_H | 2 | #define _ASM_X86_SCATTERLIST_H |
| 3 | 3 | ||
| 4 | #define ISA_DMA_THRESHOLD (0x00ffffff) | ||
| 5 | |||
| 6 | #include <asm-generic/scatterlist.h> | 4 | #include <asm-generic/scatterlist.h> |
| 7 | 5 | ||
| 6 | #define ISA_DMA_THRESHOLD (0x00ffffff) | ||
| 7 | #define ARCH_HAS_SG_CHAIN | ||
| 8 | |||
| 8 | #endif /* _ASM_X86_SCATTERLIST_H */ | 9 | #endif /* _ASM_X86_SCATTERLIST_H */ |
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index 62ba9400cc43..f0b6e5dbc5a0 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h | |||
| @@ -239,8 +239,8 @@ static inline struct thread_info *current_thread_info(void) | |||
| 239 | #define TS_USEDFPU 0x0001 /* FPU was used by this task | 239 | #define TS_USEDFPU 0x0001 /* FPU was used by this task |
| 240 | this quantum (SMP) */ | 240 | this quantum (SMP) */ |
| 241 | #define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/ | 241 | #define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/ |
| 242 | #define TS_POLLING 0x0004 /* true if in idle loop | 242 | #define TS_POLLING 0x0004 /* idle task polling need_resched, |
| 243 | and not sleeping */ | 243 | skip sending interrupt */ |
| 244 | #define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ | 244 | #define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ |
| 245 | 245 | ||
| 246 | #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) | 246 | #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) |
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index c5087d796587..21899cc31e52 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h | |||
| @@ -53,33 +53,29 @@ | |||
| 53 | extern int cpu_to_node_map[]; | 53 | extern int cpu_to_node_map[]; |
| 54 | 54 | ||
| 55 | /* Returns the number of the node containing CPU 'cpu' */ | 55 | /* Returns the number of the node containing CPU 'cpu' */ |
| 56 | static inline int cpu_to_node(int cpu) | 56 | static inline int __cpu_to_node(int cpu) |
| 57 | { | 57 | { |
| 58 | return cpu_to_node_map[cpu]; | 58 | return cpu_to_node_map[cpu]; |
| 59 | } | 59 | } |
| 60 | #define early_cpu_to_node(cpu) cpu_to_node(cpu) | 60 | #define early_cpu_to_node __cpu_to_node |
| 61 | #define cpu_to_node __cpu_to_node | ||
| 61 | 62 | ||
| 62 | #else /* CONFIG_X86_64 */ | 63 | #else /* CONFIG_X86_64 */ |
| 63 | 64 | ||
| 64 | /* Mappings between logical cpu number and node number */ | 65 | /* Mappings between logical cpu number and node number */ |
| 65 | DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); | 66 | DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); |
| 66 | 67 | ||
| 67 | /* Returns the number of the current Node. */ | ||
| 68 | DECLARE_PER_CPU(int, node_number); | ||
| 69 | #define numa_node_id() percpu_read(node_number) | ||
| 70 | |||
| 71 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | 68 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS |
| 72 | extern int cpu_to_node(int cpu); | 69 | /* |
| 70 | * override generic percpu implementation of cpu_to_node | ||
| 71 | */ | ||
| 72 | extern int __cpu_to_node(int cpu); | ||
| 73 | #define cpu_to_node __cpu_to_node | ||
| 74 | |||
| 73 | extern int early_cpu_to_node(int cpu); | 75 | extern int early_cpu_to_node(int cpu); |
| 74 | 76 | ||
| 75 | #else /* !CONFIG_DEBUG_PER_CPU_MAPS */ | 77 | #else /* !CONFIG_DEBUG_PER_CPU_MAPS */ |
| 76 | 78 | ||
| 77 | /* Returns the number of the node containing CPU 'cpu' */ | ||
| 78 | static inline int cpu_to_node(int cpu) | ||
| 79 | { | ||
| 80 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
| 81 | } | ||
| 82 | |||
| 83 | /* Same function but used if called before per_cpu areas are setup */ | 79 | /* Same function but used if called before per_cpu areas are setup */ |
| 84 | static inline int early_cpu_to_node(int cpu) | 80 | static inline int early_cpu_to_node(int cpu) |
| 85 | { | 81 | { |
| @@ -170,6 +166,10 @@ static inline int numa_node_id(void) | |||
| 170 | { | 166 | { |
| 171 | return 0; | 167 | return 0; |
| 172 | } | 168 | } |
| 169 | /* | ||
| 170 | * indicate override: | ||
| 171 | */ | ||
| 172 | #define numa_node_id numa_node_id | ||
| 173 | 173 | ||
| 174 | static inline int early_cpu_to_node(int cpu) | 174 | static inline int early_cpu_to_node(int cpu) |
| 175 | { | 175 | { |
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 488be461a380..60cc4058ed5f 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
| @@ -63,7 +63,6 @@ EXPORT_SYMBOL(acpi_disabled); | |||
| 63 | int acpi_noirq; /* skip ACPI IRQ initialization */ | 63 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
| 64 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ | 64 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
| 65 | EXPORT_SYMBOL(acpi_pci_disabled); | 65 | EXPORT_SYMBOL(acpi_pci_disabled); |
| 66 | int acpi_ht __initdata = 1; /* enable HT */ | ||
| 67 | 66 | ||
| 68 | int acpi_lapic; | 67 | int acpi_lapic; |
| 69 | int acpi_ioapic; | 68 | int acpi_ioapic; |
| @@ -1501,9 +1500,8 @@ void __init acpi_boot_table_init(void) | |||
| 1501 | 1500 | ||
| 1502 | /* | 1501 | /* |
| 1503 | * If acpi_disabled, bail out | 1502 | * If acpi_disabled, bail out |
| 1504 | * One exception: acpi=ht continues far enough to enumerate LAPICs | ||
| 1505 | */ | 1503 | */ |
| 1506 | if (acpi_disabled && !acpi_ht) | 1504 | if (acpi_disabled) |
| 1507 | return; | 1505 | return; |
| 1508 | 1506 | ||
| 1509 | /* | 1507 | /* |
| @@ -1534,9 +1532,8 @@ int __init early_acpi_boot_init(void) | |||
| 1534 | { | 1532 | { |
| 1535 | /* | 1533 | /* |
| 1536 | * If acpi_disabled, bail out | 1534 | * If acpi_disabled, bail out |
| 1537 | * One exception: acpi=ht continues far enough to enumerate LAPICs | ||
| 1538 | */ | 1535 | */ |
| 1539 | if (acpi_disabled && !acpi_ht) | 1536 | if (acpi_disabled) |
| 1540 | return 1; | 1537 | return 1; |
| 1541 | 1538 | ||
| 1542 | /* | 1539 | /* |
| @@ -1554,9 +1551,8 @@ int __init acpi_boot_init(void) | |||
| 1554 | 1551 | ||
| 1555 | /* | 1552 | /* |
| 1556 | * If acpi_disabled, bail out | 1553 | * If acpi_disabled, bail out |
| 1557 | * One exception: acpi=ht continues far enough to enumerate LAPICs | ||
| 1558 | */ | 1554 | */ |
| 1559 | if (acpi_disabled && !acpi_ht) | 1555 | if (acpi_disabled) |
| 1560 | return 1; | 1556 | return 1; |
| 1561 | 1557 | ||
| 1562 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); | 1558 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
| @@ -1591,21 +1587,12 @@ static int __init parse_acpi(char *arg) | |||
| 1591 | /* acpi=force to over-ride black-list */ | 1587 | /* acpi=force to over-ride black-list */ |
| 1592 | else if (strcmp(arg, "force") == 0) { | 1588 | else if (strcmp(arg, "force") == 0) { |
| 1593 | acpi_force = 1; | 1589 | acpi_force = 1; |
| 1594 | acpi_ht = 1; | ||
| 1595 | acpi_disabled = 0; | 1590 | acpi_disabled = 0; |
| 1596 | } | 1591 | } |
| 1597 | /* acpi=strict disables out-of-spec workarounds */ | 1592 | /* acpi=strict disables out-of-spec workarounds */ |
| 1598 | else if (strcmp(arg, "strict") == 0) { | 1593 | else if (strcmp(arg, "strict") == 0) { |
| 1599 | acpi_strict = 1; | 1594 | acpi_strict = 1; |
| 1600 | } | 1595 | } |
| 1601 | /* Limit ACPI just to boot-time to enable HT */ | ||
| 1602 | else if (strcmp(arg, "ht") == 0) { | ||
| 1603 | if (!acpi_force) { | ||
| 1604 | printk(KERN_WARNING "acpi=ht will be removed in Linux-2.6.35\n"); | ||
| 1605 | disable_acpi(); | ||
| 1606 | } | ||
| 1607 | acpi_ht = 1; | ||
| 1608 | } | ||
| 1609 | /* acpi=rsdt use RSDT instead of XSDT */ | 1596 | /* acpi=rsdt use RSDT instead of XSDT */ |
| 1610 | else if (strcmp(arg, "rsdt") == 0) { | 1597 | else if (strcmp(arg, "rsdt") == 0) { |
| 1611 | acpi_rsdt_forced = 1; | 1598 | acpi_rsdt_forced = 1; |
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index f9961034e557..82e508677b91 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c | |||
| @@ -162,8 +162,6 @@ static int __init acpi_sleep_setup(char *str) | |||
| 162 | #endif | 162 | #endif |
| 163 | if (strncmp(str, "old_ordering", 12) == 0) | 163 | if (strncmp(str, "old_ordering", 12) == 0) |
| 164 | acpi_old_suspend_ordering(); | 164 | acpi_old_suspend_ordering(); |
| 165 | if (strncmp(str, "sci_force_enable", 16) == 0) | ||
| 166 | acpi_set_sci_en_on_resume(); | ||
| 167 | str = strchr(str, ','); | 165 | str = strchr(str, ','); |
| 168 | if (str != NULL) | 166 | if (str != NULL) |
| 169 | str += strspn(str, ", \t"); | 167 | str += strspn(str, ", \t"); |
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index e5a4a1e01618..c02cc692985c 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c | |||
| @@ -51,6 +51,7 @@ | |||
| 51 | #include <asm/smp.h> | 51 | #include <asm/smp.h> |
| 52 | #include <asm/mce.h> | 52 | #include <asm/mce.h> |
| 53 | #include <asm/kvm_para.h> | 53 | #include <asm/kvm_para.h> |
| 54 | #include <asm/tsc.h> | ||
| 54 | 55 | ||
| 55 | unsigned int num_processors; | 56 | unsigned int num_processors; |
| 56 | 57 | ||
| @@ -1151,8 +1152,13 @@ static void __cpuinit lapic_setup_esr(void) | |||
| 1151 | */ | 1152 | */ |
| 1152 | void __cpuinit setup_local_APIC(void) | 1153 | void __cpuinit setup_local_APIC(void) |
| 1153 | { | 1154 | { |
| 1154 | unsigned int value; | 1155 | unsigned int value, queued; |
| 1155 | int i, j; | 1156 | int i, j, acked = 0; |
| 1157 | unsigned long long tsc = 0, ntsc; | ||
| 1158 | long long max_loops = cpu_khz; | ||
| 1159 | |||
| 1160 | if (cpu_has_tsc) | ||
| 1161 | rdtscll(tsc); | ||
| 1156 | 1162 | ||
| 1157 | if (disable_apic) { | 1163 | if (disable_apic) { |
| 1158 | arch_disable_smp_support(); | 1164 | arch_disable_smp_support(); |
| @@ -1204,13 +1210,32 @@ void __cpuinit setup_local_APIC(void) | |||
| 1204 | * the interrupt. Hence a vector might get locked. It was noticed | 1210 | * the interrupt. Hence a vector might get locked. It was noticed |
| 1205 | * for timer irq (vector 0x31). Issue an extra EOI to clear ISR. | 1211 | * for timer irq (vector 0x31). Issue an extra EOI to clear ISR. |
| 1206 | */ | 1212 | */ |
| 1207 | for (i = APIC_ISR_NR - 1; i >= 0; i--) { | 1213 | do { |
| 1208 | value = apic_read(APIC_ISR + i*0x10); | 1214 | queued = 0; |
| 1209 | for (j = 31; j >= 0; j--) { | 1215 | for (i = APIC_ISR_NR - 1; i >= 0; i--) |
| 1210 | if (value & (1<<j)) | 1216 | queued |= apic_read(APIC_IRR + i*0x10); |
| 1211 | ack_APIC_irq(); | 1217 | |
| 1218 | for (i = APIC_ISR_NR - 1; i >= 0; i--) { | ||
| 1219 | value = apic_read(APIC_ISR + i*0x10); | ||
| 1220 | for (j = 31; j >= 0; j--) { | ||
| 1221 | if (value & (1<<j)) { | ||
| 1222 | ack_APIC_irq(); | ||
| 1223 | acked++; | ||
| 1224 | } | ||
| 1225 | } | ||
| 1212 | } | 1226 | } |
| 1213 | } | 1227 | if (acked > 256) { |
| 1228 | printk(KERN_ERR "LAPIC pending interrupts after %d EOI\n", | ||
| 1229 | acked); | ||
| 1230 | break; | ||
| 1231 | } | ||
| 1232 | if (cpu_has_tsc) { | ||
| 1233 | rdtscll(ntsc); | ||
| 1234 | max_loops = (cpu_khz << 10) - (ntsc - tsc); | ||
| 1235 | } else | ||
| 1236 | max_loops--; | ||
| 1237 | } while (queued && max_loops > 0); | ||
| 1238 | WARN_ON(max_loops <= 0); | ||
| 1214 | 1239 | ||
| 1215 | /* | 1240 | /* |
| 1216 | * Now that we are all set up, enable the APIC | 1241 | * Now that we are all set up, enable the APIC |
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index cc83a002786e..68e4a6f2211e 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
| @@ -1121,9 +1121,9 @@ void __cpuinit cpu_init(void) | |||
| 1121 | oist = &per_cpu(orig_ist, cpu); | 1121 | oist = &per_cpu(orig_ist, cpu); |
| 1122 | 1122 | ||
| 1123 | #ifdef CONFIG_NUMA | 1123 | #ifdef CONFIG_NUMA |
| 1124 | if (cpu != 0 && percpu_read(node_number) == 0 && | 1124 | if (cpu != 0 && percpu_read(numa_node) == 0 && |
| 1125 | cpu_to_node(cpu) != NUMA_NO_NODE) | 1125 | early_cpu_to_node(cpu) != NUMA_NO_NODE) |
| 1126 | percpu_write(node_number, cpu_to_node(cpu)); | 1126 | set_numa_node(early_cpu_to_node(cpu)); |
| 1127 | #endif | 1127 | #endif |
| 1128 | 1128 | ||
| 1129 | me = current; | 1129 | me = current; |
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index 6f3dc8fbbfdc..7ec2123838e6 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c | |||
| @@ -1497,8 +1497,8 @@ static struct cpufreq_driver cpufreq_amd64_driver = { | |||
| 1497 | * simply keep the boost-disable flag in sync with the current global | 1497 | * simply keep the boost-disable flag in sync with the current global |
| 1498 | * state. | 1498 | * state. |
| 1499 | */ | 1499 | */ |
| 1500 | static int __cpuinit cpb_notify(struct notifier_block *nb, unsigned long action, | 1500 | static int cpb_notify(struct notifier_block *nb, unsigned long action, |
| 1501 | void *hcpu) | 1501 | void *hcpu) |
| 1502 | { | 1502 | { |
| 1503 | unsigned cpu = (long)hcpu; | 1503 | unsigned cpu = (long)hcpu; |
| 1504 | u32 lo, hi; | 1504 | u32 lo, hi; |
| @@ -1528,7 +1528,7 @@ static int __cpuinit cpb_notify(struct notifier_block *nb, unsigned long action, | |||
| 1528 | return NOTIFY_OK; | 1528 | return NOTIFY_OK; |
| 1529 | } | 1529 | } |
| 1530 | 1530 | ||
| 1531 | static struct notifier_block __cpuinitdata cpb_nb = { | 1531 | static struct notifier_block cpb_nb = { |
| 1532 | .notifier_call = cpb_notify, | 1532 | .notifier_call = cpb_notify, |
| 1533 | }; | 1533 | }; |
| 1534 | 1534 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/Makefile b/arch/x86/kernel/cpu/mcheck/Makefile index 4ac6d48fe11b..bb34b03af252 100644 --- a/arch/x86/kernel/cpu/mcheck/Makefile +++ b/arch/x86/kernel/cpu/mcheck/Makefile | |||
| @@ -7,3 +7,5 @@ obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o | |||
| 7 | obj-$(CONFIG_X86_MCE_INJECT) += mce-inject.o | 7 | obj-$(CONFIG_X86_MCE_INJECT) += mce-inject.o |
| 8 | 8 | ||
| 9 | obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o | 9 | obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o |
| 10 | |||
| 11 | obj-$(CONFIG_ACPI_APEI) += mce-apei.o | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c b/arch/x86/kernel/cpu/mcheck/mce-apei.c new file mode 100644 index 000000000000..745b54f9be89 --- /dev/null +++ b/arch/x86/kernel/cpu/mcheck/mce-apei.c | |||
| @@ -0,0 +1,138 @@ | |||
| 1 | /* | ||
| 2 | * Bridge between MCE and APEI | ||
| 3 | * | ||
| 4 | * On some machine, corrected memory errors are reported via APEI | ||
| 5 | * generic hardware error source (GHES) instead of corrected Machine | ||
| 6 | * Check. These corrected memory errors can be reported to user space | ||
| 7 | * through /dev/mcelog via faking a corrected Machine Check, so that | ||
| 8 | * the error memory page can be offlined by /sbin/mcelog if the error | ||
| 9 | * count for one page is beyond the threshold. | ||
| 10 | * | ||
| 11 | * For fatal MCE, save MCE record into persistent storage via ERST, so | ||
| 12 | * that the MCE record can be logged after reboot via ERST. | ||
| 13 | * | ||
| 14 | * Copyright 2010 Intel Corp. | ||
| 15 | * Author: Huang Ying <ying.huang@intel.com> | ||
| 16 | * | ||
| 17 | * This program is free software; you can redistribute it and/or | ||
| 18 | * modify it under the terms of the GNU General Public License version | ||
| 19 | * 2 as published by the Free Software Foundation. | ||
| 20 | * | ||
| 21 | * This program is distributed in the hope that it will be useful, | ||
| 22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 24 | * GNU General Public License for more details. | ||
| 25 | * | ||
| 26 | * You should have received a copy of the GNU General Public License | ||
| 27 | * along with this program; if not, write to the Free Software | ||
| 28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 29 | */ | ||
| 30 | |||
| 31 | #include <linux/kernel.h> | ||
| 32 | #include <linux/acpi.h> | ||
| 33 | #include <linux/cper.h> | ||
| 34 | #include <acpi/apei.h> | ||
| 35 | #include <asm/mce.h> | ||
| 36 | |||
| 37 | #include "mce-internal.h" | ||
| 38 | |||
| 39 | void apei_mce_report_mem_error(int corrected, struct cper_sec_mem_err *mem_err) | ||
| 40 | { | ||
| 41 | struct mce m; | ||
| 42 | |||
| 43 | /* Only corrected MC is reported */ | ||
| 44 | if (!corrected) | ||
| 45 | return; | ||
| 46 | |||
| 47 | mce_setup(&m); | ||
| 48 | m.bank = 1; | ||
| 49 | /* Fake a memory read corrected error with unknown channel */ | ||
| 50 | m.status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | 0x9f; | ||
| 51 | m.addr = mem_err->physical_addr; | ||
| 52 | mce_log(&m); | ||
| 53 | mce_notify_irq(); | ||
| 54 | } | ||
| 55 | EXPORT_SYMBOL_GPL(apei_mce_report_mem_error); | ||
| 56 | |||
| 57 | #define CPER_CREATOR_MCE \ | ||
| 58 | UUID_LE(0x75a574e3, 0x5052, 0x4b29, 0x8a, 0x8e, 0xbe, 0x2c, \ | ||
| 59 | 0x64, 0x90, 0xb8, 0x9d) | ||
| 60 | #define CPER_SECTION_TYPE_MCE \ | ||
| 61 | UUID_LE(0xfe08ffbe, 0x95e4, 0x4be7, 0xbc, 0x73, 0x40, 0x96, \ | ||
| 62 | 0x04, 0x4a, 0x38, 0xfc) | ||
| 63 | |||
| 64 | /* | ||
| 65 | * CPER specification (in UEFI specification 2.3 appendix N) requires | ||
| 66 | * byte-packed. | ||
| 67 | */ | ||
| 68 | struct cper_mce_record { | ||
| 69 | struct cper_record_header hdr; | ||
| 70 | struct cper_section_descriptor sec_hdr; | ||
| 71 | struct mce mce; | ||
| 72 | } __packed; | ||
| 73 | |||
| 74 | int apei_write_mce(struct mce *m) | ||
| 75 | { | ||
| 76 | struct cper_mce_record rcd; | ||
| 77 | |||
| 78 | memset(&rcd, 0, sizeof(rcd)); | ||
| 79 | memcpy(rcd.hdr.signature, CPER_SIG_RECORD, CPER_SIG_SIZE); | ||
| 80 | rcd.hdr.revision = CPER_RECORD_REV; | ||
| 81 | rcd.hdr.signature_end = CPER_SIG_END; | ||
| 82 | rcd.hdr.section_count = 1; | ||
| 83 | rcd.hdr.error_severity = CPER_SER_FATAL; | ||
| 84 | /* timestamp, platform_id, partition_id are all invalid */ | ||
| 85 | rcd.hdr.validation_bits = 0; | ||
| 86 | rcd.hdr.record_length = sizeof(rcd); | ||
| 87 | rcd.hdr.creator_id = CPER_CREATOR_MCE; | ||
| 88 | rcd.hdr.notification_type = CPER_NOTIFY_MCE; | ||
| 89 | rcd.hdr.record_id = cper_next_record_id(); | ||
| 90 | rcd.hdr.flags = CPER_HW_ERROR_FLAGS_PREVERR; | ||
| 91 | |||
| 92 | rcd.sec_hdr.section_offset = (void *)&rcd.mce - (void *)&rcd; | ||
| 93 | rcd.sec_hdr.section_length = sizeof(rcd.mce); | ||
| 94 | rcd.sec_hdr.revision = CPER_SEC_REV; | ||
| 95 | /* fru_id and fru_text is invalid */ | ||
| 96 | rcd.sec_hdr.validation_bits = 0; | ||
| 97 | rcd.sec_hdr.flags = CPER_SEC_PRIMARY; | ||
| 98 | rcd.sec_hdr.section_type = CPER_SECTION_TYPE_MCE; | ||
| 99 | rcd.sec_hdr.section_severity = CPER_SER_FATAL; | ||
| 100 | |||
| 101 | memcpy(&rcd.mce, m, sizeof(*m)); | ||
| 102 | |||
| 103 | return erst_write(&rcd.hdr); | ||
| 104 | } | ||
| 105 | |||
| 106 | ssize_t apei_read_mce(struct mce *m, u64 *record_id) | ||
| 107 | { | ||
| 108 | struct cper_mce_record rcd; | ||
| 109 | ssize_t len; | ||
| 110 | |||
| 111 | len = erst_read_next(&rcd.hdr, sizeof(rcd)); | ||
| 112 | if (len <= 0) | ||
| 113 | return len; | ||
| 114 | /* Can not skip other records in storage via ERST unless clear them */ | ||
| 115 | else if (len != sizeof(rcd) || | ||
| 116 | uuid_le_cmp(rcd.hdr.creator_id, CPER_CREATOR_MCE)) { | ||
| 117 | if (printk_ratelimit()) | ||
| 118 | pr_warning( | ||
| 119 | "MCE-APEI: Can not skip the unknown record in ERST"); | ||
| 120 | return -EIO; | ||
| 121 | } | ||
| 122 | |||
| 123 | memcpy(m, &rcd.mce, sizeof(*m)); | ||
| 124 | *record_id = rcd.hdr.record_id; | ||
| 125 | |||
| 126 | return sizeof(*m); | ||
| 127 | } | ||
| 128 | |||
| 129 | /* Check whether there is record in ERST */ | ||
| 130 | int apei_check_mce(void) | ||
| 131 | { | ||
| 132 | return erst_get_record_count(); | ||
| 133 | } | ||
| 134 | |||
| 135 | int apei_clear_mce(u64 record_id) | ||
| 136 | { | ||
| 137 | return erst_clear(record_id); | ||
| 138 | } | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h index 32996f9fab67..fefcc69ee8b5 100644 --- a/arch/x86/kernel/cpu/mcheck/mce-internal.h +++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h | |||
| @@ -28,3 +28,26 @@ extern int mce_ser; | |||
| 28 | 28 | ||
| 29 | extern struct mce_bank *mce_banks; | 29 | extern struct mce_bank *mce_banks; |
| 30 | 30 | ||
| 31 | #ifdef CONFIG_ACPI_APEI | ||
| 32 | int apei_write_mce(struct mce *m); | ||
| 33 | ssize_t apei_read_mce(struct mce *m, u64 *record_id); | ||
| 34 | int apei_check_mce(void); | ||
| 35 | int apei_clear_mce(u64 record_id); | ||
| 36 | #else | ||
| 37 | static inline int apei_write_mce(struct mce *m) | ||
| 38 | { | ||
| 39 | return -EINVAL; | ||
| 40 | } | ||
| 41 | static inline ssize_t apei_read_mce(struct mce *m, u64 *record_id) | ||
| 42 | { | ||
| 43 | return 0; | ||
| 44 | } | ||
| 45 | static inline int apei_check_mce(void) | ||
| 46 | { | ||
| 47 | return 0; | ||
| 48 | } | ||
| 49 | static inline int apei_clear_mce(u64 record_id) | ||
| 50 | { | ||
| 51 | return -EINVAL; | ||
| 52 | } | ||
| 53 | #endif | ||
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 7a355ddcc64b..707165dbc203 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c | |||
| @@ -264,7 +264,7 @@ static void wait_for_panic(void) | |||
| 264 | 264 | ||
| 265 | static void mce_panic(char *msg, struct mce *final, char *exp) | 265 | static void mce_panic(char *msg, struct mce *final, char *exp) |
| 266 | { | 266 | { |
| 267 | int i; | 267 | int i, apei_err = 0; |
| 268 | 268 | ||
| 269 | if (!fake_panic) { | 269 | if (!fake_panic) { |
| 270 | /* | 270 | /* |
| @@ -287,8 +287,11 @@ static void mce_panic(char *msg, struct mce *final, char *exp) | |||
| 287 | struct mce *m = &mcelog.entry[i]; | 287 | struct mce *m = &mcelog.entry[i]; |
| 288 | if (!(m->status & MCI_STATUS_VAL)) | 288 | if (!(m->status & MCI_STATUS_VAL)) |
| 289 | continue; | 289 | continue; |
| 290 | if (!(m->status & MCI_STATUS_UC)) | 290 | if (!(m->status & MCI_STATUS_UC)) { |
| 291 | print_mce(m); | 291 | print_mce(m); |
| 292 | if (!apei_err) | ||
| 293 | apei_err = apei_write_mce(m); | ||
| 294 | } | ||
| 292 | } | 295 | } |
| 293 | /* Now print uncorrected but with the final one last */ | 296 | /* Now print uncorrected but with the final one last */ |
| 294 | for (i = 0; i < MCE_LOG_LEN; i++) { | 297 | for (i = 0; i < MCE_LOG_LEN; i++) { |
| @@ -297,11 +300,17 @@ static void mce_panic(char *msg, struct mce *final, char *exp) | |||
| 297 | continue; | 300 | continue; |
| 298 | if (!(m->status & MCI_STATUS_UC)) | 301 | if (!(m->status & MCI_STATUS_UC)) |
| 299 | continue; | 302 | continue; |
| 300 | if (!final || memcmp(m, final, sizeof(struct mce))) | 303 | if (!final || memcmp(m, final, sizeof(struct mce))) { |
| 301 | print_mce(m); | 304 | print_mce(m); |
| 305 | if (!apei_err) | ||
| 306 | apei_err = apei_write_mce(m); | ||
| 307 | } | ||
| 302 | } | 308 | } |
| 303 | if (final) | 309 | if (final) { |
| 304 | print_mce(final); | 310 | print_mce(final); |
| 311 | if (!apei_err) | ||
| 312 | apei_err = apei_write_mce(final); | ||
| 313 | } | ||
| 305 | if (cpu_missing) | 314 | if (cpu_missing) |
| 306 | printk(KERN_EMERG "Some CPUs didn't answer in synchronization\n"); | 315 | printk(KERN_EMERG "Some CPUs didn't answer in synchronization\n"); |
| 307 | print_mce_tail(); | 316 | print_mce_tail(); |
| @@ -1493,6 +1502,43 @@ static void collect_tscs(void *data) | |||
| 1493 | rdtscll(cpu_tsc[smp_processor_id()]); | 1502 | rdtscll(cpu_tsc[smp_processor_id()]); |
| 1494 | } | 1503 | } |
| 1495 | 1504 | ||
| 1505 | static int mce_apei_read_done; | ||
| 1506 | |||
| 1507 | /* Collect MCE record of previous boot in persistent storage via APEI ERST. */ | ||
| 1508 | static int __mce_read_apei(char __user **ubuf, size_t usize) | ||
| 1509 | { | ||
| 1510 | int rc; | ||
| 1511 | u64 record_id; | ||
| 1512 | struct mce m; | ||
| 1513 | |||
| 1514 | if (usize < sizeof(struct mce)) | ||
| 1515 | return -EINVAL; | ||
| 1516 | |||
| 1517 | rc = apei_read_mce(&m, &record_id); | ||
| 1518 | /* Error or no more MCE record */ | ||
| 1519 | if (rc <= 0) { | ||
| 1520 | mce_apei_read_done = 1; | ||
| 1521 | return rc; | ||
| 1522 | } | ||
| 1523 | rc = -EFAULT; | ||
| 1524 | if (copy_to_user(*ubuf, &m, sizeof(struct mce))) | ||
| 1525 | return rc; | ||
| 1526 | /* | ||
| 1527 | * In fact, we should have cleared the record after that has | ||
| 1528 | * been flushed to the disk or sent to network in | ||
| 1529 | * /sbin/mcelog, but we have no interface to support that now, | ||
| 1530 | * so just clear it to avoid duplication. | ||
| 1531 | */ | ||
| 1532 | rc = apei_clear_mce(record_id); | ||
| 1533 | if (rc) { | ||
| 1534 | mce_apei_read_done = 1; | ||
| 1535 | return rc; | ||
| 1536 | } | ||
| 1537 | *ubuf += sizeof(struct mce); | ||
| 1538 | |||
| 1539 | return 0; | ||
| 1540 | } | ||
| 1541 | |||
| 1496 | static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, | 1542 | static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, |
| 1497 | loff_t *off) | 1543 | loff_t *off) |
| 1498 | { | 1544 | { |
| @@ -1506,15 +1552,19 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, | |||
| 1506 | return -ENOMEM; | 1552 | return -ENOMEM; |
| 1507 | 1553 | ||
| 1508 | mutex_lock(&mce_read_mutex); | 1554 | mutex_lock(&mce_read_mutex); |
| 1555 | |||
| 1556 | if (!mce_apei_read_done) { | ||
| 1557 | err = __mce_read_apei(&buf, usize); | ||
| 1558 | if (err || buf != ubuf) | ||
| 1559 | goto out; | ||
| 1560 | } | ||
| 1561 | |||
| 1509 | next = rcu_dereference_check_mce(mcelog.next); | 1562 | next = rcu_dereference_check_mce(mcelog.next); |
| 1510 | 1563 | ||
| 1511 | /* Only supports full reads right now */ | 1564 | /* Only supports full reads right now */ |
| 1512 | if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) { | 1565 | err = -EINVAL; |
| 1513 | mutex_unlock(&mce_read_mutex); | 1566 | if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) |
| 1514 | kfree(cpu_tsc); | 1567 | goto out; |
| 1515 | |||
| 1516 | return -EINVAL; | ||
| 1517 | } | ||
| 1518 | 1568 | ||
| 1519 | err = 0; | 1569 | err = 0; |
| 1520 | prev = 0; | 1570 | prev = 0; |
| @@ -1562,10 +1612,15 @@ timeout: | |||
| 1562 | memset(&mcelog.entry[i], 0, sizeof(struct mce)); | 1612 | memset(&mcelog.entry[i], 0, sizeof(struct mce)); |
| 1563 | } | 1613 | } |
| 1564 | } | 1614 | } |
| 1615 | |||
| 1616 | if (err) | ||
| 1617 | err = -EFAULT; | ||
| 1618 | |||
| 1619 | out: | ||
| 1565 | mutex_unlock(&mce_read_mutex); | 1620 | mutex_unlock(&mce_read_mutex); |
| 1566 | kfree(cpu_tsc); | 1621 | kfree(cpu_tsc); |
| 1567 | 1622 | ||
| 1568 | return err ? -EFAULT : buf - ubuf; | 1623 | return err ? err : buf - ubuf; |
| 1569 | } | 1624 | } |
| 1570 | 1625 | ||
| 1571 | static unsigned int mce_poll(struct file *file, poll_table *wait) | 1626 | static unsigned int mce_poll(struct file *file, poll_table *wait) |
| @@ -1573,6 +1628,8 @@ static unsigned int mce_poll(struct file *file, poll_table *wait) | |||
| 1573 | poll_wait(file, &mce_wait, wait); | 1628 | poll_wait(file, &mce_wait, wait); |
| 1574 | if (rcu_dereference_check_mce(mcelog.next)) | 1629 | if (rcu_dereference_check_mce(mcelog.next)) |
| 1575 | return POLLIN | POLLRDNORM; | 1630 | return POLLIN | POLLRDNORM; |
| 1631 | if (!mce_apei_read_done && apei_check_mce()) | ||
| 1632 | return POLLIN | POLLRDNORM; | ||
| 1576 | return 0; | 1633 | return 0; |
| 1577 | } | 1634 | } |
| 1578 | 1635 | ||
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c index 81c499eceb21..e1a0a3bf9716 100644 --- a/arch/x86/kernel/cpu/mcheck/therm_throt.c +++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c | |||
| @@ -190,7 +190,7 @@ thermal_throttle_cpu_callback(struct notifier_block *nfb, | |||
| 190 | mutex_unlock(&therm_cpu_lock); | 190 | mutex_unlock(&therm_cpu_lock); |
| 191 | break; | 191 | break; |
| 192 | } | 192 | } |
| 193 | return err ? NOTIFY_BAD : NOTIFY_OK; | 193 | return notifier_from_errno(err); |
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata = | 196 | static struct notifier_block thermal_throttle_cpu_notifier __cpuinitdata = |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index fd4db0db3708..c77586061bcb 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
| @@ -1717,7 +1717,11 @@ void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip, int ski | |||
| 1717 | */ | 1717 | */ |
| 1718 | regs->bp = rewind_frame_pointer(skip + 1); | 1718 | regs->bp = rewind_frame_pointer(skip + 1); |
| 1719 | regs->cs = __KERNEL_CS; | 1719 | regs->cs = __KERNEL_CS; |
| 1720 | local_save_flags(regs->flags); | 1720 | /* |
| 1721 | * We abuse bit 3 to pass exact information, see perf_misc_flags | ||
| 1722 | * and the comment with PERF_EFLAGS_EXACT. | ||
| 1723 | */ | ||
| 1724 | regs->flags = 0; | ||
| 1721 | } | 1725 | } |
| 1722 | 1726 | ||
| 1723 | unsigned long perf_instruction_pointer(struct pt_regs *regs) | 1727 | unsigned long perf_instruction_pointer(struct pt_regs *regs) |
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c index 424fc8de68e4..ae85d69644d1 100644 --- a/arch/x86/kernel/cpu/perf_event_p4.c +++ b/arch/x86/kernel/cpu/perf_event_p4.c | |||
| @@ -465,15 +465,21 @@ out: | |||
| 465 | return rc; | 465 | return rc; |
| 466 | } | 466 | } |
| 467 | 467 | ||
| 468 | static inline void p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) | 468 | static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) |
| 469 | { | 469 | { |
| 470 | unsigned long dummy; | 470 | int overflow = 0; |
| 471 | u32 low, high; | ||
| 471 | 472 | ||
| 472 | rdmsrl(hwc->config_base + hwc->idx, dummy); | 473 | rdmsr(hwc->config_base + hwc->idx, low, high); |
| 473 | if (dummy & P4_CCCR_OVF) { | 474 | |
| 475 | /* we need to check high bit for unflagged overflows */ | ||
| 476 | if ((low & P4_CCCR_OVF) || !(high & (1 << 31))) { | ||
| 477 | overflow = 1; | ||
| 474 | (void)checking_wrmsrl(hwc->config_base + hwc->idx, | 478 | (void)checking_wrmsrl(hwc->config_base + hwc->idx, |
| 475 | ((u64)dummy) & ~P4_CCCR_OVF); | 479 | ((u64)low) & ~P4_CCCR_OVF); |
| 476 | } | 480 | } |
| 481 | |||
| 482 | return overflow; | ||
| 477 | } | 483 | } |
| 478 | 484 | ||
| 479 | static inline void p4_pmu_disable_event(struct perf_event *event) | 485 | static inline void p4_pmu_disable_event(struct perf_event *event) |
| @@ -584,21 +590,15 @@ static int p4_pmu_handle_irq(struct pt_regs *regs) | |||
| 584 | 590 | ||
| 585 | WARN_ON_ONCE(hwc->idx != idx); | 591 | WARN_ON_ONCE(hwc->idx != idx); |
| 586 | 592 | ||
| 587 | /* | 593 | /* it might be unflagged overflow */ |
| 588 | * FIXME: Redundant call, actually not needed | 594 | handled = p4_pmu_clear_cccr_ovf(hwc); |
| 589 | * but just to check if we're screwed | ||
| 590 | */ | ||
| 591 | p4_pmu_clear_cccr_ovf(hwc); | ||
| 592 | 595 | ||
| 593 | val = x86_perf_event_update(event); | 596 | val = x86_perf_event_update(event); |
| 594 | if (val & (1ULL << (x86_pmu.cntval_bits - 1))) | 597 | if (!handled && (val & (1ULL << (x86_pmu.cntval_bits - 1)))) |
| 595 | continue; | 598 | continue; |
| 596 | 599 | ||
| 597 | /* | 600 | /* event overflow for sure */ |
| 598 | * event overflow | 601 | data.period = event->hw.last_period; |
| 599 | */ | ||
| 600 | handled = 1; | ||
| 601 | data.period = event->hw.last_period; | ||
| 602 | 602 | ||
| 603 | if (!x86_perf_event_set_period(event)) | 603 | if (!x86_perf_event_set_period(event)) |
| 604 | continue; | 604 | continue; |
| @@ -670,7 +670,7 @@ static void p4_pmu_swap_config_ts(struct hw_perf_event *hwc, int cpu) | |||
| 670 | 670 | ||
| 671 | /* | 671 | /* |
| 672 | * ESCR address hashing is tricky, ESCRs are not sequential | 672 | * ESCR address hashing is tricky, ESCRs are not sequential |
| 673 | * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03e0) and | 673 | * in memory but all starts from MSR_P4_BSU_ESCR0 (0x03a0) and |
| 674 | * the metric between any ESCRs is laid in range [0xa0,0xe1] | 674 | * the metric between any ESCRs is laid in range [0xa0,0xe1] |
| 675 | * | 675 | * |
| 676 | * so we make ~70% filled hashtable | 676 | * so we make ~70% filled hashtable |
| @@ -735,8 +735,9 @@ static int p4_get_escr_idx(unsigned int addr) | |||
| 735 | { | 735 | { |
| 736 | unsigned int idx = P4_ESCR_MSR_IDX(addr); | 736 | unsigned int idx = P4_ESCR_MSR_IDX(addr); |
| 737 | 737 | ||
| 738 | if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE || | 738 | if (unlikely(idx >= P4_ESCR_MSR_TABLE_SIZE || |
| 739 | !p4_escr_table[idx])) { | 739 | !p4_escr_table[idx] || |
| 740 | p4_escr_table[idx] != addr)) { | ||
| 740 | WARN_ONCE(1, "P4 PMU: Wrong address passed: %x\n", addr); | 741 | WARN_ONCE(1, "P4 PMU: Wrong address passed: %x\n", addr); |
| 741 | return -1; | 742 | return -1; |
| 742 | } | 743 | } |
| @@ -762,7 +763,7 @@ static int p4_pmu_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign | |||
| 762 | { | 763 | { |
| 763 | unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; | 764 | unsigned long used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; |
| 764 | unsigned long escr_mask[BITS_TO_LONGS(P4_ESCR_MSR_TABLE_SIZE)]; | 765 | unsigned long escr_mask[BITS_TO_LONGS(P4_ESCR_MSR_TABLE_SIZE)]; |
| 765 | int cpu = raw_smp_processor_id(); | 766 | int cpu = smp_processor_id(); |
| 766 | struct hw_perf_event *hwc; | 767 | struct hw_perf_event *hwc; |
| 767 | struct p4_event_bind *bind; | 768 | struct p4_event_bind *bind; |
| 768 | unsigned int i, thread, num; | 769 | unsigned int i, thread, num; |
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index 8b862d5900fe..1b7b31ab7d86 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c | |||
| @@ -170,7 +170,7 @@ static int __cpuinit cpuid_class_cpu_callback(struct notifier_block *nfb, | |||
| 170 | cpuid_device_destroy(cpu); | 170 | cpuid_device_destroy(cpu); |
| 171 | break; | 171 | break; |
| 172 | } | 172 | } |
| 173 | return err ? NOTIFY_BAD : NOTIFY_OK; | 173 | return notifier_from_errno(err); |
| 174 | } | 174 | } |
| 175 | 175 | ||
| 176 | static struct notifier_block __refdata cpuid_class_cpu_notifier = | 176 | static struct notifier_block __refdata cpuid_class_cpu_notifier = |
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c index 2cd8c544e41a..fa6551d36c10 100644 --- a/arch/x86/kernel/microcode_core.c +++ b/arch/x86/kernel/microcode_core.c | |||
| @@ -260,6 +260,7 @@ static void microcode_dev_exit(void) | |||
| 260 | } | 260 | } |
| 261 | 261 | ||
| 262 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); | 262 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); |
| 263 | MODULE_ALIAS("devname:cpu/microcode"); | ||
| 263 | #else | 264 | #else |
| 264 | #define microcode_dev_init() 0 | 265 | #define microcode_dev_init() 0 |
| 265 | #define microcode_dev_exit() do { } while (0) | 266 | #define microcode_dev_exit() do { } while (0) |
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c index 4d4468e9f47c..7bf2dc4c8f70 100644 --- a/arch/x86/kernel/msr.c +++ b/arch/x86/kernel/msr.c | |||
| @@ -230,7 +230,7 @@ static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb, | |||
| 230 | msr_device_destroy(cpu); | 230 | msr_device_destroy(cpu); |
| 231 | break; | 231 | break; |
| 232 | } | 232 | } |
| 233 | return err ? NOTIFY_BAD : NOTIFY_OK; | 233 | return notifier_from_errno(err); |
| 234 | } | 234 | } |
| 235 | 235 | ||
| 236 | static struct notifier_block __refdata msr_class_cpu_notifier = { | 236 | static struct notifier_block __refdata msr_class_cpu_notifier = { |
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c index 7d2829dde20e..a5bc528d4328 100644 --- a/arch/x86/kernel/pci-swiotlb.c +++ b/arch/x86/kernel/pci-swiotlb.c | |||
| @@ -31,8 +31,6 @@ static struct dma_map_ops swiotlb_dma_ops = { | |||
| 31 | .free_coherent = swiotlb_free_coherent, | 31 | .free_coherent = swiotlb_free_coherent, |
| 32 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, | 32 | .sync_single_for_cpu = swiotlb_sync_single_for_cpu, |
| 33 | .sync_single_for_device = swiotlb_sync_single_for_device, | 33 | .sync_single_for_device = swiotlb_sync_single_for_device, |
| 34 | .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu, | ||
| 35 | .sync_single_range_for_device = swiotlb_sync_single_range_for_device, | ||
| 36 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, | 34 | .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, |
| 37 | .sync_sg_for_device = swiotlb_sync_sg_for_device, | 35 | .sync_sg_for_device = swiotlb_sync_sg_for_device, |
| 38 | .map_sg = swiotlb_map_sg_attrs, | 36 | .map_sg = swiotlb_map_sg_attrs, |
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index e8029896309a..b4ae4acbd031 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
| @@ -676,6 +676,17 @@ static struct dmi_system_id __initdata bad_bios_dmi_table[] = { | |||
| 676 | DMI_MATCH(DMI_BOARD_NAME, "DG45FC"), | 676 | DMI_MATCH(DMI_BOARD_NAME, "DG45FC"), |
| 677 | }, | 677 | }, |
| 678 | }, | 678 | }, |
| 679 | /* | ||
| 680 | * The Dell Inspiron Mini 1012 has DMI_BIOS_VENDOR = "Dell Inc.", so | ||
| 681 | * match on the product name. | ||
| 682 | */ | ||
| 683 | { | ||
| 684 | .callback = dmi_low_memory_corruption, | ||
| 685 | .ident = "Phoenix BIOS", | ||
| 686 | .matches = { | ||
| 687 | DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 1012"), | ||
| 688 | }, | ||
| 689 | }, | ||
| 679 | #endif | 690 | #endif |
| 680 | {} | 691 | {} |
| 681 | }; | 692 | }; |
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c index ef6370b00e70..a867940a6dfc 100644 --- a/arch/x86/kernel/setup_percpu.c +++ b/arch/x86/kernel/setup_percpu.c | |||
| @@ -265,10 +265,10 @@ void __init setup_per_cpu_areas(void) | |||
| 265 | 265 | ||
| 266 | #if defined(CONFIG_X86_64) && defined(CONFIG_NUMA) | 266 | #if defined(CONFIG_X86_64) && defined(CONFIG_NUMA) |
| 267 | /* | 267 | /* |
| 268 | * make sure boot cpu node_number is right, when boot cpu is on the | 268 | * make sure boot cpu numa_node is right, when boot cpu is on the |
| 269 | * node that doesn't have mem installed | 269 | * node that doesn't have mem installed |
| 270 | */ | 270 | */ |
| 271 | per_cpu(node_number, boot_cpu_id) = cpu_to_node(boot_cpu_id); | 271 | set_cpu_numa_node(boot_cpu_id, early_cpu_to_node(boot_cpu_id)); |
| 272 | #endif | 272 | #endif |
| 273 | 273 | ||
| 274 | /* Setup node to cpumask map */ | 274 | /* Setup node to cpumask map */ |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 763d815e27a0..37462f1ddba5 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
| @@ -1215,9 +1215,17 @@ __init void prefill_possible_map(void) | |||
| 1215 | if (!num_processors) | 1215 | if (!num_processors) |
| 1216 | num_processors = 1; | 1216 | num_processors = 1; |
| 1217 | 1217 | ||
| 1218 | if (setup_possible_cpus == -1) | 1218 | i = setup_max_cpus ?: 1; |
| 1219 | possible = num_processors + disabled_cpus; | 1219 | if (setup_possible_cpus == -1) { |
| 1220 | else | 1220 | possible = num_processors; |
| 1221 | #ifdef CONFIG_HOTPLUG_CPU | ||
| 1222 | if (setup_max_cpus) | ||
| 1223 | possible += disabled_cpus; | ||
| 1224 | #else | ||
| 1225 | if (possible > i) | ||
| 1226 | possible = i; | ||
| 1227 | #endif | ||
| 1228 | } else | ||
| 1221 | possible = setup_possible_cpus; | 1229 | possible = setup_possible_cpus; |
| 1222 | 1230 | ||
| 1223 | total_cpus = max_t(int, possible, num_processors + disabled_cpus); | 1231 | total_cpus = max_t(int, possible, num_processors + disabled_cpus); |
| @@ -1230,11 +1238,23 @@ __init void prefill_possible_map(void) | |||
| 1230 | possible = nr_cpu_ids; | 1238 | possible = nr_cpu_ids; |
| 1231 | } | 1239 | } |
| 1232 | 1240 | ||
| 1241 | #ifdef CONFIG_HOTPLUG_CPU | ||
| 1242 | if (!setup_max_cpus) | ||
| 1243 | #endif | ||
| 1244 | if (possible > i) { | ||
| 1245 | printk(KERN_WARNING | ||
| 1246 | "%d Processors exceeds max_cpus limit of %u\n", | ||
| 1247 | possible, setup_max_cpus); | ||
| 1248 | possible = i; | ||
| 1249 | } | ||
| 1250 | |||
| 1233 | printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", | 1251 | printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n", |
| 1234 | possible, max_t(int, possible - num_processors, 0)); | 1252 | possible, max_t(int, possible - num_processors, 0)); |
| 1235 | 1253 | ||
| 1236 | for (i = 0; i < possible; i++) | 1254 | for (i = 0; i < possible; i++) |
| 1237 | set_cpu_possible(i, true); | 1255 | set_cpu_possible(i, true); |
| 1256 | for (; i < NR_CPUS; i++) | ||
| 1257 | set_cpu_possible(i, false); | ||
| 1238 | 1258 | ||
| 1239 | nr_cpu_ids = possible; | 1259 | nr_cpu_ids = possible; |
| 1240 | } | 1260 | } |
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c index 2bdf628066bd..9257510b4836 100644 --- a/arch/x86/lguest/boot.c +++ b/arch/x86/lguest/boot.c | |||
| @@ -1390,7 +1390,6 @@ __init void lguest_init(void) | |||
| 1390 | #endif | 1390 | #endif |
| 1391 | #ifdef CONFIG_ACPI | 1391 | #ifdef CONFIG_ACPI |
| 1392 | acpi_disabled = 1; | 1392 | acpi_disabled = 1; |
| 1393 | acpi_ht = 0; | ||
| 1394 | #endif | 1393 | #endif |
| 1395 | 1394 | ||
| 1396 | /* | 1395 | /* |
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c index 8948f47fde05..a7bcc23ef96c 100644 --- a/arch/x86/mm/numa_64.c +++ b/arch/x86/mm/numa_64.c | |||
| @@ -33,9 +33,6 @@ int numa_off __initdata; | |||
| 33 | static unsigned long __initdata nodemap_addr; | 33 | static unsigned long __initdata nodemap_addr; |
| 34 | static unsigned long __initdata nodemap_size; | 34 | static unsigned long __initdata nodemap_size; |
| 35 | 35 | ||
| 36 | DEFINE_PER_CPU(int, node_number) = 0; | ||
| 37 | EXPORT_PER_CPU_SYMBOL(node_number); | ||
| 38 | |||
| 39 | /* | 36 | /* |
| 40 | * Map cpu index to node index | 37 | * Map cpu index to node index |
| 41 | */ | 38 | */ |
| @@ -809,7 +806,7 @@ void __cpuinit numa_set_node(int cpu, int node) | |||
| 809 | per_cpu(x86_cpu_to_node_map, cpu) = node; | 806 | per_cpu(x86_cpu_to_node_map, cpu) = node; |
| 810 | 807 | ||
| 811 | if (node != NUMA_NO_NODE) | 808 | if (node != NUMA_NO_NODE) |
| 812 | per_cpu(node_number, cpu) = node; | 809 | set_cpu_numa_node(cpu, node); |
| 813 | } | 810 | } |
| 814 | 811 | ||
| 815 | void __cpuinit numa_clear_node(int cpu) | 812 | void __cpuinit numa_clear_node(int cpu) |
| @@ -867,7 +864,7 @@ void __cpuinit numa_remove_cpu(int cpu) | |||
| 867 | numa_set_cpumask(cpu, 0); | 864 | numa_set_cpumask(cpu, 0); |
| 868 | } | 865 | } |
| 869 | 866 | ||
| 870 | int cpu_to_node(int cpu) | 867 | int __cpu_to_node(int cpu) |
| 871 | { | 868 | { |
| 872 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) { | 869 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) { |
| 873 | printk(KERN_WARNING | 870 | printk(KERN_WARNING |
| @@ -877,7 +874,7 @@ int cpu_to_node(int cpu) | |||
| 877 | } | 874 | } |
| 878 | return per_cpu(x86_cpu_to_node_map, cpu); | 875 | return per_cpu(x86_cpu_to_node_map, cpu); |
| 879 | } | 876 | } |
| 880 | EXPORT_SYMBOL(cpu_to_node); | 877 | EXPORT_SYMBOL(__cpu_to_node); |
| 881 | 878 | ||
| 882 | /* | 879 | /* |
| 883 | * Same function as cpu_to_node() but used if called before the | 880 | * Same function as cpu_to_node() but used if called before the |
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index bbe5502ee1cb..acc15b23b743 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c | |||
| @@ -336,6 +336,7 @@ int free_memtype(u64 start, u64 end) | |||
| 336 | { | 336 | { |
| 337 | int err = -EINVAL; | 337 | int err = -EINVAL; |
| 338 | int is_range_ram; | 338 | int is_range_ram; |
| 339 | struct memtype *entry; | ||
| 339 | 340 | ||
| 340 | if (!pat_enabled) | 341 | if (!pat_enabled) |
| 341 | return 0; | 342 | return 0; |
| @@ -355,17 +356,20 @@ int free_memtype(u64 start, u64 end) | |||
| 355 | } | 356 | } |
| 356 | 357 | ||
| 357 | spin_lock(&memtype_lock); | 358 | spin_lock(&memtype_lock); |
| 358 | err = rbt_memtype_erase(start, end); | 359 | entry = rbt_memtype_erase(start, end); |
| 359 | spin_unlock(&memtype_lock); | 360 | spin_unlock(&memtype_lock); |
| 360 | 361 | ||
| 361 | if (err) { | 362 | if (!entry) { |
| 362 | printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", | 363 | printk(KERN_INFO "%s:%d freeing invalid memtype %Lx-%Lx\n", |
| 363 | current->comm, current->pid, start, end); | 364 | current->comm, current->pid, start, end); |
| 365 | return -EINVAL; | ||
| 364 | } | 366 | } |
| 365 | 367 | ||
| 368 | kfree(entry); | ||
| 369 | |||
| 366 | dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end); | 370 | dprintk("free_memtype request 0x%Lx-0x%Lx\n", start, end); |
| 367 | 371 | ||
| 368 | return err; | 372 | return 0; |
| 369 | } | 373 | } |
| 370 | 374 | ||
| 371 | 375 | ||
diff --git a/arch/x86/mm/pat_internal.h b/arch/x86/mm/pat_internal.h index 4f39eefa3e61..77e5ba153fac 100644 --- a/arch/x86/mm/pat_internal.h +++ b/arch/x86/mm/pat_internal.h | |||
| @@ -28,15 +28,15 @@ static inline char *cattr_name(unsigned long flags) | |||
| 28 | #ifdef CONFIG_X86_PAT | 28 | #ifdef CONFIG_X86_PAT |
| 29 | extern int rbt_memtype_check_insert(struct memtype *new, | 29 | extern int rbt_memtype_check_insert(struct memtype *new, |
| 30 | unsigned long *new_type); | 30 | unsigned long *new_type); |
| 31 | extern int rbt_memtype_erase(u64 start, u64 end); | 31 | extern struct memtype *rbt_memtype_erase(u64 start, u64 end); |
| 32 | extern struct memtype *rbt_memtype_lookup(u64 addr); | 32 | extern struct memtype *rbt_memtype_lookup(u64 addr); |
| 33 | extern int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos); | 33 | extern int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos); |
| 34 | #else | 34 | #else |
| 35 | static inline int rbt_memtype_check_insert(struct memtype *new, | 35 | static inline int rbt_memtype_check_insert(struct memtype *new, |
| 36 | unsigned long *new_type) | 36 | unsigned long *new_type) |
| 37 | { return 0; } | 37 | { return 0; } |
| 38 | static inline int rbt_memtype_erase(u64 start, u64 end) | 38 | static inline struct memtype *rbt_memtype_erase(u64 start, u64 end) |
| 39 | { return 0; } | 39 | { return NULL; } |
| 40 | static inline struct memtype *rbt_memtype_lookup(u64 addr) | 40 | static inline struct memtype *rbt_memtype_lookup(u64 addr) |
| 41 | { return NULL; } | 41 | { return NULL; } |
| 42 | static inline int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos) | 42 | static inline int rbt_memtype_copy_nth_element(struct memtype *out, loff_t pos) |
diff --git a/arch/x86/mm/pat_rbtree.c b/arch/x86/mm/pat_rbtree.c index 07de4cb8cc30..f537087bb740 100644 --- a/arch/x86/mm/pat_rbtree.c +++ b/arch/x86/mm/pat_rbtree.c | |||
| @@ -231,16 +231,17 @@ int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type) | |||
| 231 | return err; | 231 | return err; |
| 232 | } | 232 | } |
| 233 | 233 | ||
| 234 | int rbt_memtype_erase(u64 start, u64 end) | 234 | struct memtype *rbt_memtype_erase(u64 start, u64 end) |
| 235 | { | 235 | { |
| 236 | struct memtype *data; | 236 | struct memtype *data; |
| 237 | 237 | ||
| 238 | data = memtype_rb_exact_match(&memtype_rbroot, start, end); | 238 | data = memtype_rb_exact_match(&memtype_rbroot, start, end); |
| 239 | if (!data) | 239 | if (!data) |
| 240 | return -EINVAL; | 240 | goto out; |
| 241 | 241 | ||
| 242 | rb_erase(&data->rb, &memtype_rbroot); | 242 | rb_erase(&data->rb, &memtype_rbroot); |
| 243 | return 0; | 243 | out: |
| 244 | return data; | ||
| 244 | } | 245 | } |
| 245 | 246 | ||
| 246 | struct memtype *rbt_memtype_lookup(u64 addr) | 247 | struct memtype *rbt_memtype_lookup(u64 addr) |
diff --git a/arch/x86/mm/pf_in.c b/arch/x86/mm/pf_in.c index df3d5c861cda..308e32570d84 100644 --- a/arch/x86/mm/pf_in.c +++ b/arch/x86/mm/pf_in.c | |||
| @@ -34,7 +34,7 @@ | |||
| 34 | /* IA32 Manual 3, 2-1 */ | 34 | /* IA32 Manual 3, 2-1 */ |
| 35 | static unsigned char prefix_codes[] = { | 35 | static unsigned char prefix_codes[] = { |
| 36 | 0xF0, 0xF2, 0xF3, 0x2E, 0x36, 0x3E, 0x26, 0x64, | 36 | 0xF0, 0xF2, 0xF3, 0x2E, 0x36, 0x3E, 0x26, 0x64, |
| 37 | 0x65, 0x2E, 0x3E, 0x66, 0x67 | 37 | 0x65, 0x66, 0x67 |
| 38 | }; | 38 | }; |
| 39 | /* IA32 Manual 3, 3-432*/ | 39 | /* IA32 Manual 3, 3-432*/ |
| 40 | static unsigned int reg_rop[] = { | 40 | static unsigned int reg_rop[] = { |
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c index 792854003ed3..cac718499256 100644 --- a/arch/x86/mm/pgtable_32.c +++ b/arch/x86/mm/pgtable_32.c | |||
| @@ -9,7 +9,6 @@ | |||
| 9 | #include <linux/pagemap.h> | 9 | #include <linux/pagemap.h> |
| 10 | #include <linux/spinlock.h> | 10 | #include <linux/spinlock.h> |
| 11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
| 12 | #include <linux/quicklist.h> | ||
| 13 | 12 | ||
| 14 | #include <asm/system.h> | 13 | #include <asm/system.h> |
| 15 | #include <asm/pgtable.h> | 14 | #include <asm/pgtable.h> |
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 31930fd30ea9..2ec04c424a62 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c | |||
| @@ -207,10 +207,9 @@ get_current_resources(struct acpi_device *device, int busnum, | |||
| 207 | if (!info.res) | 207 | if (!info.res) |
| 208 | goto res_alloc_fail; | 208 | goto res_alloc_fail; |
| 209 | 209 | ||
| 210 | info.name = kmalloc(16, GFP_KERNEL); | 210 | info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum); |
| 211 | if (!info.name) | 211 | if (!info.name) |
| 212 | goto name_alloc_fail; | 212 | goto name_alloc_fail; |
| 213 | sprintf(info.name, "PCI Bus %04x:%02x", domain, busnum); | ||
| 214 | 213 | ||
| 215 | info.res_num = 0; | 214 | info.res_num = 0; |
| 216 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, | 215 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, |
| @@ -224,8 +223,11 @@ res_alloc_fail: | |||
| 224 | return; | 223 | return; |
| 225 | } | 224 | } |
| 226 | 225 | ||
| 227 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int domain, int busnum) | 226 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) |
| 228 | { | 227 | { |
| 228 | struct acpi_device *device = root->device; | ||
| 229 | int domain = root->segment; | ||
| 230 | int busnum = root->secondary.start; | ||
| 229 | struct pci_bus *bus; | 231 | struct pci_bus *bus; |
| 230 | struct pci_sysdata *sd; | 232 | struct pci_sysdata *sd; |
| 231 | int node; | 233 | int node; |
diff --git a/arch/xtensa/include/asm/cache.h b/arch/xtensa/include/asm/cache.h index f04c9891142f..ed8cd3cbd499 100644 --- a/arch/xtensa/include/asm/cache.h +++ b/arch/xtensa/include/asm/cache.h | |||
| @@ -29,5 +29,6 @@ | |||
| 29 | # define CACHE_WAY_SIZE ICACHE_WAY_SIZE | 29 | # define CACHE_WAY_SIZE ICACHE_WAY_SIZE |
| 30 | #endif | 30 | #endif |
| 31 | 31 | ||
| 32 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
| 32 | 33 | ||
| 33 | #endif /* _XTENSA_CACHE_H */ | 34 | #endif /* _XTENSA_CACHE_H */ |
diff --git a/arch/xtensa/include/asm/hardirq.h b/arch/xtensa/include/asm/hardirq.h index 87cb19d1b10c..26664cef8f11 100644 --- a/arch/xtensa/include/asm/hardirq.h +++ b/arch/xtensa/include/asm/hardirq.h | |||
| @@ -11,18 +11,9 @@ | |||
| 11 | #ifndef _XTENSA_HARDIRQ_H | 11 | #ifndef _XTENSA_HARDIRQ_H |
| 12 | #define _XTENSA_HARDIRQ_H | 12 | #define _XTENSA_HARDIRQ_H |
| 13 | 13 | ||
| 14 | #include <linux/cache.h> | ||
| 15 | #include <asm/irq.h> | ||
| 16 | |||
| 17 | /* headers.S is sensitive to the offsets of these fields */ | ||
| 18 | typedef struct { | ||
| 19 | unsigned int __softirq_pending; | ||
| 20 | unsigned int __syscall_count; | ||
| 21 | struct task_struct * __ksoftirqd_task; /* waitqueue is too large */ | ||
| 22 | unsigned int __nmi_count; /* arch dependent */ | ||
| 23 | } ____cacheline_aligned irq_cpustat_t; | ||
| 24 | |||
| 25 | void ack_bad_irq(unsigned int irq); | 14 | void ack_bad_irq(unsigned int irq); |
| 26 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | 15 | #define ack_bad_irq ack_bad_irq |
| 16 | |||
| 17 | #include <asm-generic/hardirq.h> | ||
| 27 | 18 | ||
| 28 | #endif /* _XTENSA_HARDIRQ_H */ | 19 | #endif /* _XTENSA_HARDIRQ_H */ |
diff --git a/arch/xtensa/include/asm/scatterlist.h b/arch/xtensa/include/asm/scatterlist.h index 810080bb0a2b..b1f9fdc1d5ba 100644 --- a/arch/xtensa/include/asm/scatterlist.h +++ b/arch/xtensa/include/asm/scatterlist.h | |||
| @@ -11,28 +11,7 @@ | |||
| 11 | #ifndef _XTENSA_SCATTERLIST_H | 11 | #ifndef _XTENSA_SCATTERLIST_H |
| 12 | #define _XTENSA_SCATTERLIST_H | 12 | #define _XTENSA_SCATTERLIST_H |
| 13 | 13 | ||
| 14 | #include <asm/types.h> | 14 | #include <asm-generic/scatterlist.h> |
| 15 | |||
| 16 | struct scatterlist { | ||
| 17 | #ifdef CONFIG_DEBUG_SG | ||
| 18 | unsigned long sg_magic; | ||
| 19 | #endif | ||
| 20 | unsigned long page_link; | ||
| 21 | unsigned int offset; | ||
| 22 | dma_addr_t dma_address; | ||
| 23 | unsigned int length; | ||
| 24 | }; | ||
| 25 | |||
| 26 | /* | ||
| 27 | * These macros should be used after a pci_map_sg call has been done | ||
| 28 | * to get bus addresses of each of the SG entries and their lengths. | ||
| 29 | * You should only work with the number of sg entries pci_map_sg | ||
| 30 | * returns, or alternatively stop on the first sg_dma_len(sg) which | ||
| 31 | * is 0. | ||
| 32 | */ | ||
| 33 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
| 34 | #define sg_dma_len(sg) ((sg)->length) | ||
| 35 | |||
| 36 | 15 | ||
| 37 | #define ISA_DMA_THRESHOLD (~0UL) | 16 | #define ISA_DMA_THRESHOLD (~0UL) |
| 38 | 17 | ||
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c index 8cd38484e130..c64a5d387de5 100644 --- a/arch/xtensa/kernel/irq.c +++ b/arch/xtensa/kernel/irq.c | |||
| @@ -27,15 +27,6 @@ static unsigned int cached_irq_mask; | |||
| 27 | atomic_t irq_err_count; | 27 | atomic_t irq_err_count; |
| 28 | 28 | ||
| 29 | /* | 29 | /* |
| 30 | * 'what should we do if we get a hw irq event on an illegal vector'. | ||
| 31 | * each architecture has to answer this themselves. | ||
| 32 | */ | ||
| 33 | void ack_bad_irq(unsigned int irq) | ||
| 34 | { | ||
| 35 | printk("unexpected IRQ trap at vector %02x\n", irq); | ||
| 36 | } | ||
| 37 | |||
| 38 | /* | ||
| 39 | * do_IRQ handles all normal device IRQ's (the special | 30 | * do_IRQ handles all normal device IRQ's (the special |
| 40 | * SMP cross-CPU interrupts have their own specific | 31 | * SMP cross-CPU interrupts have their own specific |
| 41 | * handlers). | 32 | * handlers). |
diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S index 74a7518faf16..70066e3582d0 100644 --- a/arch/xtensa/kernel/vectors.S +++ b/arch/xtensa/kernel/vectors.S | |||
| @@ -44,14 +44,12 @@ | |||
| 44 | 44 | ||
| 45 | #include <linux/linkage.h> | 45 | #include <linux/linkage.h> |
| 46 | #include <asm/ptrace.h> | 46 | #include <asm/ptrace.h> |
| 47 | #include <asm/ptrace.h> | ||
| 48 | #include <asm/current.h> | 47 | #include <asm/current.h> |
| 49 | #include <asm/asm-offsets.h> | 48 | #include <asm/asm-offsets.h> |
| 50 | #include <asm/pgtable.h> | 49 | #include <asm/pgtable.h> |
| 51 | #include <asm/processor.h> | 50 | #include <asm/processor.h> |
| 52 | #include <asm/page.h> | 51 | #include <asm/page.h> |
| 53 | #include <asm/thread_info.h> | 52 | #include <asm/thread_info.h> |
| 54 | #include <asm/processor.h> | ||
| 55 | 53 | ||
| 56 | #define WINDOW_VECTORS_SIZE 0x180 | 54 | #define WINDOW_VECTORS_SIZE 0x180 |
| 57 | 55 | ||