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-rw-r--r--arch/arm/mm/cache-l2x0.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 2a8e380501e8..97ec2565805a 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -368,14 +368,18 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
368 /* l2x0 controller is disabled */ 368 /* l2x0 controller is disabled */
369 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); 369 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
370 370
371 l2x0_saved_regs.aux_ctrl = aux;
372
373 l2x0_inv_all(); 371 l2x0_inv_all();
374 372
375 /* enable L2X0 */ 373 /* enable L2X0 */
376 writel_relaxed(1, l2x0_base + L2X0_CTRL); 374 writel_relaxed(1, l2x0_base + L2X0_CTRL);
377 } 375 }
378 376
377 /* Re-read it in case some bits are reserved. */
378 aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
379
380 /* Save the value for resuming. */
381 l2x0_saved_regs.aux_ctrl = aux;
382
379 outer_cache.inv_range = l2x0_inv_range; 383 outer_cache.inv_range = l2x0_inv_range;
380 outer_cache.clean_range = l2x0_clean_range; 384 outer_cache.clean_range = l2x0_clean_range;
381 outer_cache.flush_range = l2x0_flush_range; 385 outer_cache.flush_range = l2x0_flush_range;