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-rw-r--r--arch/mips/alchemy/Kconfig14
-rw-r--r--arch/mips/alchemy/Platform14
-rw-r--r--arch/mips/alchemy/devboards/Makefile2
-rw-r--r--arch/mips/alchemy/devboards/db1x00/board_setup.c105
-rw-r--r--arch/mips/alchemy/devboards/db1x00/platform.c68
-rw-r--r--arch/mips/alchemy/devboards/prom.c3
6 files changed, 3 insertions, 203 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 5a48387d0751..36df5e2c8e07 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -22,13 +22,6 @@ config MIPS_MTX1
22 select SYS_SUPPORTS_LITTLE_ENDIAN 22 select SYS_SUPPORTS_LITTLE_ENDIAN
23 select SYS_HAS_EARLY_PRINTK 23 select SYS_HAS_EARLY_PRINTK
24 24
25config MIPS_BOSPORUS
26 bool "Alchemy Bosporus board"
27 select ALCHEMY_GPIOINT_AU1000
28 select DMA_NONCOHERENT
29 select SYS_SUPPORTS_LITTLE_ENDIAN
30 select SYS_HAS_EARLY_PRINTK
31
32config MIPS_DB1000 25config MIPS_DB1000
33 bool "Alchemy DB1000 board" 26 bool "Alchemy DB1000 board"
34 select ALCHEMY_GPIOINT_AU1000 27 select ALCHEMY_GPIOINT_AU1000
@@ -71,13 +64,6 @@ config MIPS_DB1550
71 select SYS_SUPPORTS_LITTLE_ENDIAN 64 select SYS_SUPPORTS_LITTLE_ENDIAN
72 select SYS_HAS_EARLY_PRINTK 65 select SYS_HAS_EARLY_PRINTK
73 66
74config MIPS_MIRAGE
75 bool "Alchemy Mirage board"
76 select DMA_NONCOHERENT
77 select ALCHEMY_GPIOINT_AU1000
78 select SYS_SUPPORTS_LITTLE_ENDIAN
79 select SYS_HAS_EARLY_PRINTK
80
81config MIPS_PB1100 67config MIPS_PB1100
82 bool "Alchemy PB1100 board" 68 bool "Alchemy PB1100 board"
83 select ALCHEMY_GPIOINT_AU1000 69 select ALCHEMY_GPIOINT_AU1000
diff --git a/arch/mips/alchemy/Platform b/arch/mips/alchemy/Platform
index 4e079672f9bf..2920af9c2569 100644
--- a/arch/mips/alchemy/Platform
+++ b/arch/mips/alchemy/Platform
@@ -68,20 +68,6 @@ cflags-$(CONFIG_MIPS_DB1200) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
68load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000 68load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
69 69
70# 70#
71# AMD Alchemy Bosporus eval board
72#
73platform-$(CONFIG_MIPS_BOSPORUS) += alchemy/devboards/
74cflags-$(CONFIG_MIPS_BOSPORUS) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
75load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
76
77#
78# AMD Alchemy Mirage eval board
79#
80platform-$(CONFIG_MIPS_MIRAGE) += alchemy/devboards/
81cflags-$(CONFIG_MIPS_MIRAGE) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
82load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
83
84#
85# 4G-Systems eval board 71# 4G-Systems eval board
86# 72#
87platform-$(CONFIG_MIPS_MTX1) += alchemy/mtx-1/ 73platform-$(CONFIG_MIPS_MTX1) += alchemy/mtx-1/
diff --git a/arch/mips/alchemy/devboards/Makefile b/arch/mips/alchemy/devboards/Makefile
index bea80d787781..5afaf944868f 100644
--- a/arch/mips/alchemy/devboards/Makefile
+++ b/arch/mips/alchemy/devboards/Makefile
@@ -13,5 +13,3 @@ obj-$(CONFIG_MIPS_DB1100) += db1x00/
13obj-$(CONFIG_MIPS_DB1200) += db1200/ 13obj-$(CONFIG_MIPS_DB1200) += db1200/
14obj-$(CONFIG_MIPS_DB1500) += db1x00/ 14obj-$(CONFIG_MIPS_DB1500) += db1x00/
15obj-$(CONFIG_MIPS_DB1550) += db1x00/ 15obj-$(CONFIG_MIPS_DB1550) += db1x00/
16obj-$(CONFIG_MIPS_BOSPORUS) += db1x00/
17obj-$(CONFIG_MIPS_MIRAGE) += db1x00/
diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c
index 7cd36e631f6c..8a222b3eba32 100644
--- a/arch/mips/alchemy/devboards/db1x00/board_setup.c
+++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c
@@ -40,64 +40,10 @@
40 40
41#include <prom.h> 41#include <prom.h>
42 42
43#ifdef CONFIG_MIPS_BOSPORUS
44char irq_tab_alchemy[][5] __initdata = {
45 [11] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 11 - miniPCI */
46 [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - SN1741 */
47 [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */
48};
49
50/*
51 * Micrel/Kendin 5 port switch attached to MAC0,
52 * MAC0 is associated with PHY address 5 (== WAN port)
53 * MAC1 is not associated with any PHY, since it's connected directly
54 * to the switch.
55 * no interrupts are used
56 */
57static struct au1000_eth_platform_data eth0_pdata = {
58 .phy_static_config = 1,
59 .phy_addr = 5,
60};
61
62static void bosporus_power_off(void)
63{
64 while (1)
65 asm volatile (".set mips3 ; wait ; .set mips0");
66}
67
68const char *get_system_type(void)
69{
70 return "Alchemy Bosporus Gateway Reference";
71}
72#endif
73
74
75#ifdef CONFIG_MIPS_MIRAGE
76static void mirage_power_off(void)
77{
78 alchemy_gpio_direction_output(210, 1);
79}
80
81const char *get_system_type(void)
82{
83 return "Alchemy Mirage";
84}
85#endif
86
87
88#if defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE)
89static void mips_softreset(void)
90{
91 asm volatile ("jr\t%0" : : "r"(0xbfc00000));
92}
93
94#else
95
96const char *get_system_type(void) 43const char *get_system_type(void)
97{ 44{
98 return "Alchemy Db1x00"; 45 return "Alchemy Db1x00";
99} 46}
100#endif
101 47
102 48
103void __init board_setup(void) 49void __init board_setup(void)
@@ -116,14 +62,6 @@ void __init board_setup(void)
116#ifdef CONFIG_MIPS_DB1100 62#ifdef CONFIG_MIPS_DB1100
117 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n"); 63 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
118#endif 64#endif
119#ifdef CONFIG_MIPS_BOSPORUS
120 au1xxx_override_eth_cfg(0, &eth0_pdata);
121
122 printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
123#endif
124#ifdef CONFIG_MIPS_MIRAGE
125 printk(KERN_INFO "AMD Alchemy Mirage Board\n");
126#endif
127#ifdef CONFIG_MIPS_DB1550 65#ifdef CONFIG_MIPS_DB1550
128 printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n"); 66 printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
129 67
@@ -150,52 +88,11 @@ void __init board_setup(void)
150 88
151 /* Enable GPIO[31:0] inputs */ 89 /* Enable GPIO[31:0] inputs */
152 alchemy_gpio1_input_enable(); 90 alchemy_gpio1_input_enable();
153
154#ifdef CONFIG_MIPS_MIRAGE
155 {
156 u32 pin_func;
157
158 /* GPIO[20] is output */
159 alchemy_gpio_direction_output(20, 0);
160
161 /* Set GPIO[210:208] instead of SSI_0 */
162 pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;
163
164 /* Set GPIO[215:211] for LEDs */
165 pin_func |= 5 << 2;
166
167 /* Set GPIO[214:213] for more LEDs */
168 pin_func |= 5 << 12;
169
170 /* Set GPIO[207:200] instead of PCMCIA/LCD */
171 pin_func |= SYS_PF_LCD | SYS_PF_PC;
172 au_writel(pin_func, SYS_PINFUNC);
173
174 /*
175 * Enable speaker amplifier. This should
176 * be part of the audio driver.
177 */
178 alchemy_gpio_direction_output(209, 1);
179
180 pm_power_off = mirage_power_off;
181 _machine_halt = mirage_power_off;
182 _machine_restart = (void(*)(char *))mips_softreset;
183 }
184#endif
185
186#ifdef CONFIG_MIPS_BOSPORUS
187 pm_power_off = bosporus_power_off;
188 _machine_halt = bosporus_power_off;
189 _machine_restart = (void(*)(char *))mips_softreset;
190#endif
191 au_sync();
192} 91}
193 92
194static int __init db1x00_init_irq(void) 93static int __init db1x00_init_irq(void)
195{ 94{
196#if defined(CONFIG_MIPS_MIRAGE) 95#if defined(CONFIG_MIPS_DB1550)
197 irq_set_irq_type(AU1500_GPIO7_INT, IRQF_TRIGGER_RISING); /* TS pendown */
198#elif defined(CONFIG_MIPS_DB1550)
199 irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ 96 irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
200 irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); /* CD1# */ 97 irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); /* CD1# */
201 irq_set_irq_type(AU1550_GPIO3_INT, IRQF_TRIGGER_LOW); /* CARD0# */ 98 irq_set_irq_type(AU1550_GPIO3_INT, IRQF_TRIGGER_LOW); /* CARD0# */
diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c
index 9e6b3d442acd..677414d5f5b4 100644
--- a/arch/mips/alchemy/devboards/db1x00/platform.c
+++ b/arch/mips/alchemy/devboards/db1x00/platform.c
@@ -37,7 +37,6 @@ struct pci_dev;
37 * Db1550: 0/1, 21/22, 3/5 37 * Db1550: 0/1, 21/22, 3/5
38 */ 38 */
39 39
40#define DB1XXX_HAS_PCMCIA
41#define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT) 40#define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
42 41
43#if defined(CONFIG_MIPS_DB1000) 42#if defined(CONFIG_MIPS_DB1000)
@@ -48,7 +47,6 @@ struct pci_dev;
48#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT 47#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
49#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT 48#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
50#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ 49#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
51#define BOARD_FLASH_WIDTH 4 /* 32-bits */
52#elif defined(CONFIG_MIPS_DB1100) 50#elif defined(CONFIG_MIPS_DB1100)
53#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT 51#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
54#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT 52#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
@@ -57,7 +55,6 @@ struct pci_dev;
57#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT 55#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
58#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT 56#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
59#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ 57#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
60#define BOARD_FLASH_WIDTH 4 /* 32-bits */
61#elif defined(CONFIG_MIPS_DB1500) 58#elif defined(CONFIG_MIPS_DB1500)
62#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT 59#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
63#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT 60#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
@@ -66,7 +63,6 @@ struct pci_dev;
66#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT 63#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
67#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT 64#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
68#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ 65#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
69#define BOARD_FLASH_WIDTH 4 /* 32-bits */
70#elif defined(CONFIG_MIPS_DB1550) 66#elif defined(CONFIG_MIPS_DB1550)
71#define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT 67#define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT
72#define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT 68#define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT
@@ -75,19 +71,6 @@ struct pci_dev;
75#define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT 71#define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT
76#define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT 72#define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT
77#define BOARD_FLASH_SIZE 0x08000000 /* 128MB */ 73#define BOARD_FLASH_SIZE 0x08000000 /* 128MB */
78#define BOARD_FLASH_WIDTH 4 /* 32-bits */
79#else
80/* other board: no PCMCIA */
81#undef DB1XXX_HAS_PCMCIA
82#undef F_SWAPPED
83#define F_SWAPPED 0
84#if defined(CONFIG_MIPS_BOSPORUS)
85#define BOARD_FLASH_SIZE 0x01000000 /* 16MB */
86#define BOARD_FLASH_WIDTH 2 /* 16-bits */
87#elif defined(CONFIG_MIPS_MIRAGE)
88#define BOARD_FLASH_SIZE 0x04000000 /* 64MB */
89#define BOARD_FLASH_WIDTH 4 /* 32-bits */
90#endif
91#endif 74#endif
92 75
93#ifdef CONFIG_PCI 76#ifdef CONFIG_PCI
@@ -137,52 +120,6 @@ static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
137} 120}
138#endif 121#endif
139 122
140#ifdef CONFIG_MIPS_BOSPORUS
141static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
142{
143 if ((slot < 11) || (slot > 13) || pin == 0)
144 return -1;
145 if (slot == 12)
146 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
147 if (slot == 11) {
148 switch (pin) {
149 case 1: return AU1500_PCI_INTA;
150 case 2: return AU1500_PCI_INTB;
151 default: return 0xff;
152 }
153 }
154 if (slot == 13) {
155 switch (pin) {
156 case 1: return AU1500_PCI_INTA;
157 case 2: return AU1500_PCI_INTB;
158 case 3: return AU1500_PCI_INTC;
159 case 4: return AU1500_PCI_INTD;
160 }
161 }
162 return -1;
163}
164#endif
165
166#ifdef CONFIG_MIPS_MIRAGE
167static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
168{
169 if ((slot < 11) || (slot > 13) || pin == 0)
170 return -1;
171 if (slot == 11)
172 return (pin == 1) ? AU1500_PCI_INTD : 0xff;
173 if (slot == 12)
174 return (pin == 3) ? AU1500_PCI_INTC : 0xff;
175 if (slot == 13) {
176 switch (pin) {
177 case 1: return AU1500_PCI_INTA;
178 case 2: return AU1500_PCI_INTB;
179 default: return 0xff;
180 }
181 }
182 return -1;
183}
184#endif
185
186static struct resource alchemy_pci_host_res[] = { 123static struct resource alchemy_pci_host_res[] = {
187 [0] = { 124 [0] = {
188 .start = AU1500_PCI_PHYS_ADDR, 125 .start = AU1500_PCI_PHYS_ADDR,
@@ -280,7 +217,6 @@ static struct platform_device db1x00_audio_dev = {
280 217
281static int __init db1xxx_dev_init(void) 218static int __init db1xxx_dev_init(void)
282{ 219{
283#ifdef DB1XXX_HAS_PCMCIA
284 db1x_register_pcmcia_socket( 220 db1x_register_pcmcia_socket(
285 AU1000_PCMCIA_ATTR_PHYS_ADDR, 221 AU1000_PCMCIA_ATTR_PHYS_ADDR,
286 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, 222 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
@@ -300,17 +236,15 @@ static int __init db1xxx_dev_init(void)
300 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, 236 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
301 DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1, 237 DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1,
302 /*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1); 238 /*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1);
303#endif
304#ifdef CONFIG_MIPS_DB1100 239#ifdef CONFIG_MIPS_DB1100
305 platform_device_register(&au1100_lcd_device); 240 platform_device_register(&au1100_lcd_device);
306#endif 241#endif
307 db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
308
309 platform_device_register(&db1x00_codec_dev); 242 platform_device_register(&db1x00_codec_dev);
310 platform_device_register(&alchemy_ac97c_dma_dev); 243 platform_device_register(&alchemy_ac97c_dma_dev);
311 platform_device_register(&alchemy_ac97c_dev); 244 platform_device_register(&alchemy_ac97c_dev);
312 platform_device_register(&db1x00_audio_dev); 245 platform_device_register(&db1x00_audio_dev);
313 246
247 db1x_register_norflash(BOARD_FLASH_SIZE, 4 /* 32bit */, F_SWAPPED);
314 return 0; 248 return 0;
315} 249}
316device_initcall(db1xxx_dev_init); 250device_initcall(db1xxx_dev_init);
diff --git a/arch/mips/alchemy/devboards/prom.c b/arch/mips/alchemy/devboards/prom.c
index 56d7ea52fd97..f734833fbdda 100644
--- a/arch/mips/alchemy/devboards/prom.c
+++ b/arch/mips/alchemy/devboards/prom.c
@@ -35,8 +35,7 @@
35 35
36#if defined(CONFIG_MIPS_DB1000) || \ 36#if defined(CONFIG_MIPS_DB1000) || \
37 defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1100) || \ 37 defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1100) || \
38 defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500) || \ 38 defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_DB1500)
39 defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE)
40#define ALCHEMY_BOARD_DEFAULT_MEMSIZE 0x04000000 39#define ALCHEMY_BOARD_DEFAULT_MEMSIZE 0x04000000
41 40
42#else /* Au1550/Au1200-based develboards */ 41#else /* Au1550/Au1200-based develboards */