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-rw-r--r--arch/alpha/include/asm/core_marvel.h1
-rw-r--r--arch/alpha/include/asm/core_mcpcia.h1
-rw-r--r--arch/alpha/include/asm/core_titan.h1
-rw-r--r--arch/alpha/include/asm/core_tsunami.h1
-rw-r--r--arch/alpha/kernel/sys_dp264.c2
-rw-r--r--arch/alpha/kernel/sys_titan.c2
-rw-r--r--arch/alpha/kernel/traps.c10
-rw-r--r--arch/arm/common/locomo.c10
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/memory.h2
-rw-r--r--arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c4
-rw-r--r--arch/arm/mach-mmp/include/mach/uncompress.h5
-rw-r--r--arch/arm/mach-orion5x/wrt350n-v2-setup.c2
-rw-r--r--arch/arm/mach-pxa/Kconfig11
-rw-r--r--arch/arm/mach-pxa/imote2.c4
-rw-r--r--arch/arm/mach-pxa/include/mach/uncompress.h11
-rw-r--r--arch/arm/mach-pxa/raumfeld.c4
-rw-r--r--arch/arm/mach-pxa/stargate2.c5
-rw-r--r--arch/arm/tools/mach-types75
-rw-r--r--arch/powerpc/Kconfig13
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h6
-rw-r--r--arch/powerpc/include/asm/syscall.h6
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S7
-rw-r--r--arch/powerpc/kernel/iommu.c7
-rw-r--r--arch/powerpc/kernel/setup_32.c6
-rw-r--r--arch/powerpc/kernel/setup_64.c6
-rw-r--r--arch/powerpc/mm/mem.c6
-rw-r--r--arch/s390/boot/compressed/misc.c8
-rw-r--r--arch/s390/include/asm/system.h9
-rw-r--r--arch/s390/kernel/head.S3
-rw-r--r--arch/s390/kernel/head64.S2
-rw-r--r--arch/s390/kernel/setup.c4
-rw-r--r--arch/s390/kernel/smp.c6
-rw-r--r--arch/s390/mm/maccess.c26
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c2
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c8
-rw-r--r--arch/sh/configs/ecovec24_defconfig236
-rw-r--r--arch/sh/include/asm/clkdev.h35
-rw-r--r--arch/sh/include/asm/clock.h7
-rw-r--r--arch/sh/include/asm/dmaengine.h63
-rw-r--r--arch/sh/include/asm/elf.h6
-rw-r--r--arch/sh/include/asm/mmu.h7
-rw-r--r--arch/sh/include/asm/siu.h8
-rw-r--r--arch/sh/include/cpu-sh4/cpu/mmu_context.h11
-rw-r--r--arch/sh/include/cpu-sh4/cpu/watchdog.h6
-rw-r--r--arch/sh/kernel/Makefile2
-rw-r--r--arch/sh/kernel/clkdev.c169
-rw-r--r--arch/sh/kernel/cpu/clock-cpg.c5
-rw-r--r--arch/sh/kernel/cpu/clock.c55
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c6
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-mxg.c9
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7201.c9
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7203.c12
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c15
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c9
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c9
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c9
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c24
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh4-202.c9
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c15
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c9
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c58
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c56
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7785.c51
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7786.c80
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c16
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c13
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c15
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c27
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c27
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c18
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c27
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c18
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c24
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c36
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c18
-rw-r--r--arch/sh/kernel/cpu/sh5/setup-sh5.c9
-rw-r--r--arch/sh/kernel/cpufreq.c4
-rw-r--r--arch/sh/kernel/dwarf.c4
-rw-r--r--arch/sh/kernel/idle.c2
-rw-r--r--arch/sh/kernel/perf_event.c2
-rw-r--r--arch/sh/kernel/process_64.c7
-rw-r--r--arch/sh/kernel/smp.c1
-rw-r--r--arch/sh/mm/Makefile8
-rw-r--r--arch/sh/mm/pmb.c4
-rw-r--r--arch/sh/mm/tlb-debugfs.c179
-rw-r--r--arch/sh/mm/tlb-pteaex.c2
-rw-r--r--arch/sh/mm/tlb-urb.c22
-rw-r--r--arch/sh/mm/tlbflush_32.c21
-rw-r--r--arch/sh/mm/uncached.c9
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd.c8
94 files changed, 1083 insertions, 742 deletions
diff --git a/arch/alpha/include/asm/core_marvel.h b/arch/alpha/include/asm/core_marvel.h
index 30d55fe7aaf6..dad300fa14ce 100644
--- a/arch/alpha/include/asm/core_marvel.h
+++ b/arch/alpha/include/asm/core_marvel.h
@@ -12,7 +12,6 @@
12#define __ALPHA_MARVEL__H__ 12#define __ALPHA_MARVEL__H__
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/pci.h>
16#include <linux/spinlock.h> 15#include <linux/spinlock.h>
17 16
18#include <asm/compiler.h> 17#include <asm/compiler.h>
diff --git a/arch/alpha/include/asm/core_mcpcia.h b/arch/alpha/include/asm/core_mcpcia.h
index acf55b483472..21ac53383b37 100644
--- a/arch/alpha/include/asm/core_mcpcia.h
+++ b/arch/alpha/include/asm/core_mcpcia.h
@@ -6,7 +6,6 @@
6#define MCPCIA_ONE_HAE_WINDOW 1 6#define MCPCIA_ONE_HAE_WINDOW 1
7 7
8#include <linux/types.h> 8#include <linux/types.h>
9#include <linux/pci.h>
10#include <asm/compiler.h> 9#include <asm/compiler.h>
11 10
12/* 11/*
diff --git a/arch/alpha/include/asm/core_titan.h b/arch/alpha/include/asm/core_titan.h
index a17f6f33b68e..8cf79d1219e1 100644
--- a/arch/alpha/include/asm/core_titan.h
+++ b/arch/alpha/include/asm/core_titan.h
@@ -2,7 +2,6 @@
2#define __ALPHA_TITAN__H__ 2#define __ALPHA_TITAN__H__
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/pci.h>
6#include <asm/compiler.h> 5#include <asm/compiler.h>
7 6
8/* 7/*
diff --git a/arch/alpha/include/asm/core_tsunami.h b/arch/alpha/include/asm/core_tsunami.h
index 58d4fe48742c..8e39ecf09419 100644
--- a/arch/alpha/include/asm/core_tsunami.h
+++ b/arch/alpha/include/asm/core_tsunami.h
@@ -2,7 +2,6 @@
2#define __ALPHA_TSUNAMI__H__ 2#define __ALPHA_TSUNAMI__H__
3 3
4#include <linux/types.h> 4#include <linux/types.h>
5#include <linux/pci.h>
6#include <asm/compiler.h> 5#include <asm/compiler.h>
7 6
8/* 7/*
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index d64e1e497e76..4026502ab707 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -224,7 +224,7 @@ static void
224dp264_device_interrupt(unsigned long vector) 224dp264_device_interrupt(unsigned long vector)
225{ 225{
226#if 1 226#if 1
227 printk("dp264_device_interrupt: NOT IMPLEMENTED YET!! \n"); 227 printk("dp264_device_interrupt: NOT IMPLEMENTED YET!!\n");
228#else 228#else
229 unsigned long pld; 229 unsigned long pld;
230 unsigned int i; 230 unsigned int i;
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index 288053342c83..9008d0f20c53 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -171,7 +171,7 @@ titan_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
171static void 171static void
172titan_device_interrupt(unsigned long vector) 172titan_device_interrupt(unsigned long vector)
173{ 173{
174 printk("titan_device_interrupt: NOT IMPLEMENTED YET!! \n"); 174 printk("titan_device_interrupt: NOT IMPLEMENTED YET!!\n");
175} 175}
176 176
177static void 177static void
diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c
index 6ee7655b7568..b14f015008ad 100644
--- a/arch/alpha/kernel/traps.c
+++ b/arch/alpha/kernel/traps.c
@@ -17,6 +17,7 @@
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/kallsyms.h> 19#include <linux/kallsyms.h>
20#include <linux/ratelimit.h>
20 21
21#include <asm/gentrap.h> 22#include <asm/gentrap.h>
22#include <asm/uaccess.h> 23#include <asm/uaccess.h>
@@ -771,8 +772,7 @@ asmlinkage void
771do_entUnaUser(void __user * va, unsigned long opcode, 772do_entUnaUser(void __user * va, unsigned long opcode,
772 unsigned long reg, struct pt_regs *regs) 773 unsigned long reg, struct pt_regs *regs)
773{ 774{
774 static int cnt = 0; 775 static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
775 static unsigned long last_time;
776 776
777 unsigned long tmp1, tmp2, tmp3, tmp4; 777 unsigned long tmp1, tmp2, tmp3, tmp4;
778 unsigned long fake_reg, *reg_addr = &fake_reg; 778 unsigned long fake_reg, *reg_addr = &fake_reg;
@@ -783,15 +783,11 @@ do_entUnaUser(void __user * va, unsigned long opcode,
783 with the unaliged access. */ 783 with the unaliged access. */
784 784
785 if (!test_thread_flag (TIF_UAC_NOPRINT)) { 785 if (!test_thread_flag (TIF_UAC_NOPRINT)) {
786 if (cnt >= 5 && time_after(jiffies, last_time + 5 * HZ)) { 786 if (__ratelimit(&ratelimit)) {
787 cnt = 0;
788 }
789 if (++cnt < 5) {
790 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n", 787 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
791 current->comm, task_pid_nr(current), 788 current->comm, task_pid_nr(current),
792 regs->pc - 4, va, opcode, reg); 789 regs->pc - 4, va, opcode, reg);
793 } 790 }
794 last_time = jiffies;
795 } 791 }
796 if (test_thread_flag (TIF_UAC_SIGBUS)) 792 if (test_thread_flag (TIF_UAC_SIGBUS))
797 goto give_sigbus; 793 goto give_sigbus;
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
index 90ae00b631c2..9dff07c80ddb 100644
--- a/arch/arm/common/locomo.c
+++ b/arch/arm/common/locomo.c
@@ -290,7 +290,7 @@ static int locomo_suspend(struct platform_device *dev, pm_message_t state)
290 save->LCM_GPO = locomo_readl(lchip->base + LOCOMO_GPO); /* GPIO */ 290 save->LCM_GPO = locomo_readl(lchip->base + LOCOMO_GPO); /* GPIO */
291 locomo_writel(0x00, lchip->base + LOCOMO_GPO); 291 locomo_writel(0x00, lchip->base + LOCOMO_GPO);
292 save->LCM_SPICT = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPICT); /* SPI */ 292 save->LCM_SPICT = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPICT); /* SPI */
293 locomo_writel(0x40, lchip->base + LOCOMO_SPICT); 293 locomo_writel(0x40, lchip->base + LOCOMO_SPI + LOCOMO_SPICT);
294 save->LCM_GPE = locomo_readl(lchip->base + LOCOMO_GPE); /* GPIO */ 294 save->LCM_GPE = locomo_readl(lchip->base + LOCOMO_GPE); /* GPIO */
295 locomo_writel(0x00, lchip->base + LOCOMO_GPE); 295 locomo_writel(0x00, lchip->base + LOCOMO_GPE);
296 save->LCM_ASD = locomo_readl(lchip->base + LOCOMO_ASD); /* ADSTART */ 296 save->LCM_ASD = locomo_readl(lchip->base + LOCOMO_ASD); /* ADSTART */
@@ -418,7 +418,7 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
418 /* Longtime timer */ 418 /* Longtime timer */
419 locomo_writel(0, lchip->base + LOCOMO_LTINT); 419 locomo_writel(0, lchip->base + LOCOMO_LTINT);
420 /* SPI */ 420 /* SPI */
421 locomo_writel(0, lchip->base + LOCOMO_SPIIE); 421 locomo_writel(0, lchip->base + LOCOMO_SPI + LOCOMO_SPIIE);
422 422
423 locomo_writel(6 + 8 + 320 + 30 - 10, lchip->base + LOCOMO_ASD); 423 locomo_writel(6 + 8 + 320 + 30 - 10, lchip->base + LOCOMO_ASD);
424 r = locomo_readl(lchip->base + LOCOMO_ASD); 424 r = locomo_readl(lchip->base + LOCOMO_ASD);
@@ -707,7 +707,7 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
707 udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */ 707 udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */
708 if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) { /* High is error */ 708 if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) { /* High is error */
709 printk(KERN_WARNING "locomo: m62332_senddata Error 1\n"); 709 printk(KERN_WARNING "locomo: m62332_senddata Error 1\n");
710 return; 710 goto out;
711 } 711 }
712 712
713 /* Send Sub address (LSB is channel select) */ 713 /* Send Sub address (LSB is channel select) */
@@ -735,7 +735,7 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
735 udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */ 735 udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */
736 if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) { /* High is error */ 736 if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) { /* High is error */
737 printk(KERN_WARNING "locomo: m62332_senddata Error 2\n"); 737 printk(KERN_WARNING "locomo: m62332_senddata Error 2\n");
738 return; 738 goto out;
739 } 739 }
740 740
741 /* Send DAC data */ 741 /* Send DAC data */
@@ -760,9 +760,9 @@ void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int
760 udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */ 760 udelay(DAC_SCL_HIGH_HOLD_TIME); /* 4.7 usec */
761 if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) { /* High is error */ 761 if (locomo_readl(mapbase + LOCOMO_DAC) & LOCOMO_DAC_SDAOEB) { /* High is error */
762 printk(KERN_WARNING "locomo: m62332_senddata Error 3\n"); 762 printk(KERN_WARNING "locomo: m62332_senddata Error 3\n");
763 return;
764 } 763 }
765 764
765out:
766 /* stop */ 766 /* stop */
767 r = locomo_readl(mapbase + LOCOMO_DAC); 767 r = locomo_readl(mapbase + LOCOMO_DAC);
768 r &= ~(LOCOMO_DAC_SCLOEB); 768 r &= ~(LOCOMO_DAC_SCLOEB);
diff --git a/arch/arm/mach-ixp23xx/include/mach/memory.h b/arch/arm/mach-ixp23xx/include/mach/memory.h
index 94a3a86cfeb8..6ef65d813f16 100644
--- a/arch/arm/mach-ixp23xx/include/mach/memory.h
+++ b/arch/arm/mach-ixp23xx/include/mach/memory.h
@@ -19,7 +19,7 @@
19 */ 19 */
20#define PHYS_OFFSET (0x00000000) 20#define PHYS_OFFSET (0x00000000)
21 21
22#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0)) 22#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0)
23 23
24#define __phys_to_bus(x) ((x) + (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET)) 24#define __phys_to_bus(x) ((x) + (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET))
25#define __bus_to_phys(x) ((x) - (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET)) 25#define __bus_to_phys(x) ((x) - (IXP23XX_PCI_SDRAM_OFFSET - PHYS_OFFSET))
diff --git a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
index 0358f45766cb..5e6f711b1c67 100644
--- a/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
+++ b/arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
@@ -74,9 +74,9 @@ static struct gpio_keys_button mv88f6281gtw_ge_button_pins[] = {
74 .desc = "SWR Button", 74 .desc = "SWR Button",
75 .active_low = 1, 75 .active_low = 1,
76 }, { 76 }, {
77 .code = KEY_F1, 77 .code = KEY_WPS_BUTTON,
78 .gpio = 46, 78 .gpio = 46,
79 .desc = "WPS Button(F1)", 79 .desc = "WPS Button",
80 .active_low = 1, 80 .active_low = 1,
81 }, 81 },
82}; 82};
diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h
index a7dcc5307216..85bd8a2d84b5 100644
--- a/arch/arm/mach-mmp/include/mach/uncompress.h
+++ b/arch/arm/mach-mmp/include/mach/uncompress.h
@@ -14,7 +14,7 @@
14#define UART2_BASE (APB_PHYS_BASE + 0x17000) 14#define UART2_BASE (APB_PHYS_BASE + 0x17000)
15#define UART3_BASE (APB_PHYS_BASE + 0x18000) 15#define UART3_BASE (APB_PHYS_BASE + 0x18000)
16 16
17static volatile unsigned long *UART = (unsigned long *)UART2_BASE; 17static volatile unsigned long *UART;
18 18
19static inline void putc(char c) 19static inline void putc(char c)
20{ 20{
@@ -37,6 +37,9 @@ static inline void flush(void)
37 37
38static inline void arch_decomp_setup(void) 38static inline void arch_decomp_setup(void)
39{ 39{
40 /* default to UART2 */
41 UART = (unsigned long *)UART2_BASE;
42
40 if (machine_is_avengers_lite()) 43 if (machine_is_avengers_lite())
41 UART = (unsigned long *)UART3_BASE; 44 UART = (unsigned long *)UART3_BASE;
42} 45}
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index cb0feca193d4..f9f222ebb7ed 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -77,7 +77,7 @@ static struct gpio_keys_button wrt350n_v2_buttons[] = {
77 .desc = "Reset Button", 77 .desc = "Reset Button",
78 .active_low = 1, 78 .active_low = 1,
79 }, { 79 }, {
80 .code = KEY_WLAN, 80 .code = KEY_WPS_BUTTON,
81 .gpio = 2, 81 .gpio = 2,
82 .desc = "WPS Button", 82 .desc = "WPS Button",
83 .active_low = 1, 83 .active_low = 1,
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 38fbd0a0e402..5b6ee46fa7f6 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -272,7 +272,6 @@ config MACH_H5000
272config MACH_HIMALAYA 272config MACH_HIMALAYA
273 bool "HTC Himalaya Support" 273 bool "HTC Himalaya Support"
274 select CPU_PXA26x 274 select CPU_PXA26x
275 select FB_W100
276 275
277config MACH_MAGICIAN 276config MACH_MAGICIAN
278 bool "Enable HTC Magician Support" 277 bool "Enable HTC Magician Support"
@@ -454,6 +453,13 @@ config PXA_SHARPSL
454config SHARPSL_PM 453config SHARPSL_PM
455 bool 454 bool
456 select APM_EMULATION 455 select APM_EMULATION
456 select SHARPSL_PM_MAX1111
457
458config SHARPSL_PM_MAX1111
459 bool
460 depends on !CORGI_SSP_DEPRECATED
461 select HWMON
462 select SENSORS_MAX1111
457 463
458config CORGI_SSP_DEPRECATED 464config CORGI_SSP_DEPRECATED
459 bool 465 bool
@@ -547,7 +553,6 @@ config MACH_E740
547 bool "Toshiba e740" 553 bool "Toshiba e740"
548 default y 554 default y
549 depends on ARCH_PXA_ESERIES 555 depends on ARCH_PXA_ESERIES
550 select FB_W100
551 help 556 help
552 Say Y here if you intend to run this kernel on a Toshiba 557 Say Y here if you intend to run this kernel on a Toshiba
553 e740 family PDA. 558 e740 family PDA.
@@ -556,7 +561,6 @@ config MACH_E750
556 bool "Toshiba e750" 561 bool "Toshiba e750"
557 default y 562 default y
558 depends on ARCH_PXA_ESERIES 563 depends on ARCH_PXA_ESERIES
559 select FB_W100
560 help 564 help
561 Say Y here if you intend to run this kernel on a Toshiba 565 Say Y here if you intend to run this kernel on a Toshiba
562 e750 family PDA. 566 e750 family PDA.
@@ -573,7 +577,6 @@ config MACH_E800
573 bool "Toshiba e800" 577 bool "Toshiba e800"
574 default y 578 default y
575 depends on ARCH_PXA_ESERIES 579 depends on ARCH_PXA_ESERIES
576 select FB_W100
577 help 580 help
578 Say Y here if you intend to run this kernel on a Toshiba 581 Say Y here if you intend to run this kernel on a Toshiba
579 e800 family PDA. 582 e800 family PDA.
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
index b2f878bd460b..5161dca8ccc0 100644
--- a/arch/arm/mach-pxa/imote2.c
+++ b/arch/arm/mach-pxa/imote2.c
@@ -559,10 +559,6 @@ static void __init imote2_init(void)
559 pxa_set_btuart_info(NULL); 559 pxa_set_btuart_info(NULL);
560 pxa_set_stuart_info(NULL); 560 pxa_set_stuart_info(NULL);
561 561
562 /* SPI chip select directions - all other directions should
563 * be handled by drivers.*/
564 gpio_direction_output(37, 0);
565
566 platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices)); 562 platform_add_devices(imote2_devices, ARRAY_SIZE(imote2_devices));
567 563
568 pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info); 564 pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
diff --git a/arch/arm/mach-pxa/include/mach/uncompress.h b/arch/arm/mach-pxa/include/mach/uncompress.h
index 5ef91d9d17e4..759b851ec985 100644
--- a/arch/arm/mach-pxa/include/mach/uncompress.h
+++ b/arch/arm/mach-pxa/include/mach/uncompress.h
@@ -16,9 +16,9 @@
16#define BTUART_BASE (0x40200000) 16#define BTUART_BASE (0x40200000)
17#define STUART_BASE (0x40700000) 17#define STUART_BASE (0x40700000)
18 18
19static unsigned long uart_base = FFUART_BASE; 19static unsigned long uart_base;
20static unsigned int uart_shift = 2; 20static unsigned int uart_shift;
21static unsigned int uart_is_pxa = 1; 21static unsigned int uart_is_pxa;
22 22
23static inline unsigned char uart_read(int offset) 23static inline unsigned char uart_read(int offset)
24{ 24{
@@ -56,6 +56,11 @@ static inline void flush(void)
56 56
57static inline void arch_decomp_setup(void) 57static inline void arch_decomp_setup(void)
58{ 58{
59 /* initialize to default */
60 uart_base = FFUART_BASE;
61 uart_shift = 2;
62 uart_is_pxa = 1;
63
59 if (machine_is_littleton() || machine_is_intelmote2() 64 if (machine_is_littleton() || machine_is_intelmote2()
60 || machine_is_csb726() || machine_is_stargate2() 65 || machine_is_csb726() || machine_is_stargate2()
61 || machine_is_cm_x300() || machine_is_balloon3()) 66 || machine_is_cm_x300() || machine_is_balloon3())
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 3184bdc14526..44bb675e47f1 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -37,8 +37,6 @@
37#include <linux/lis3lv02d.h> 37#include <linux/lis3lv02d.h>
38#include <linux/pda_power.h> 38#include <linux/pda_power.h>
39#include <linux/power_supply.h> 39#include <linux/power_supply.h>
40#include <linux/pda_power.h>
41#include <linux/power_supply.h>
42#include <linux/regulator/max8660.h> 40#include <linux/regulator/max8660.h>
43#include <linux/regulator/machine.h> 41#include <linux/regulator/machine.h>
44#include <linux/regulator/fixed.h> 42#include <linux/regulator/fixed.h>
@@ -444,7 +442,7 @@ static struct gpio_keys_button gpio_keys_button[] = {
444 .active_low = 0, 442 .active_low = 0,
445 .wakeup = 0, 443 .wakeup = 0,
446 .debounce_interval = 5, /* ms */ 444 .debounce_interval = 5, /* ms */
447 .desc = "on/off button", 445 .desc = "on_off button",
448 }, 446 },
449}; 447};
450 448
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index a98a434f0111..2041eb1d90ba 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -764,11 +764,6 @@ static void __init stargate2_init(void)
764 pxa_set_btuart_info(NULL); 764 pxa_set_btuart_info(NULL);
765 pxa_set_stuart_info(NULL); 765 pxa_set_stuart_info(NULL);
766 766
767 /* spi chip selects */
768 gpio_direction_output(37, 0);
769 gpio_direction_output(24, 0);
770 gpio_direction_output(39, 0);
771
772 platform_add_devices(ARRAY_AND_SIZE(stargate2_devices)); 767 platform_add_devices(ARRAY_AND_SIZE(stargate2_devices));
773 768
774 pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info); 769 pxa2xx_set_spi_info(1, &pxa_ssp_master_0_info);
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 31c2f4c30a95..1536f1784cac 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Sat Feb 20 14:16:15 2010 15# Last update: Sat Mar 20 15:35:41 2010
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -2663,7 +2663,7 @@ reb01 MACH_REB01 REB01 2675
2663aquila MACH_AQUILA AQUILA 2676 2663aquila MACH_AQUILA AQUILA 2676
2664spark_sls_hw2 MACH_SPARK_SLS_HW2 SPARK_SLS_HW2 2677 2664spark_sls_hw2 MACH_SPARK_SLS_HW2 SPARK_SLS_HW2 2677
2665sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 2665sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678
2666surf7x30 MACH_SURF7X30 SURF7X30 2679 2666msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679
2667micro2440 MACH_MICRO2440 MICRO2440 2680 2667micro2440 MACH_MICRO2440 MICRO2440 2680
2668am2440 MACH_AM2440 AM2440 2681 2668am2440 MACH_AM2440 AM2440 2681
2669tq2440 MACH_TQ2440 TQ2440 2682 2669tq2440 MACH_TQ2440 TQ2440 2682
@@ -2678,3 +2678,74 @@ vc088x MACH_VC088X VC088X 2690
2678mioa702 MACH_MIOA702 MIOA702 2691 2678mioa702 MACH_MIOA702 MIOA702 2691
2679hpmin MACH_HPMIN HPMIN 2692 2679hpmin MACH_HPMIN HPMIN 2692
2680ak880xak MACH_AK880XAK AK880XAK 2693 2680ak880xak MACH_AK880XAK AK880XAK 2693
2681arm926tomap850 MACH_ARM926TOMAP850 ARM926TOMAP850 2694
2682lkevm MACH_LKEVM LKEVM 2695
2683mw6410 MACH_MW6410 MW6410 2696
2684terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697
2685cpu8000e MACH_CPU8000E CPU8000E 2698
2686catania MACH_CATANIA CATANIA 2699
2687tokyo MACH_TOKYO TOKYO 2700
2688msm7201a_surf MACH_MSM7201A_SURF MSM7201A_SURF 2701
2689msm7201a_ffa MACH_MSM7201A_FFA MSM7201A_FFA 2702
2690msm7x25_surf MACH_MSM7X25_SURF MSM7X25_SURF 2703
2691msm7x25_ffa MACH_MSM7X25_FFA MSM7X25_FFA 2704
2692msm7x27_surf MACH_MSM7X27_SURF MSM7X27_SURF 2705
2693msm7x27_ffa MACH_MSM7X27_FFA MSM7X27_FFA 2706
2694msm7x30_ffa MACH_MSM7X30_FFA MSM7X30_FFA 2707
2695qsd8x50_surf MACH_QSD8X50_SURF QSD8X50_SURF 2708
2696qsd8x50_comet MACH_QSD8X50_COMET QSD8X50_COMET 2709
2697qsd8x50_ffa MACH_QSD8X50_FFA QSD8X50_FFA 2710
2698qsd8x50a_surf MACH_QSD8X50A_SURF QSD8X50A_SURF 2711
2699qsd8x50a_ffa MACH_QSD8X50A_FFA QSD8X50A_FFA 2712
2700adx_xgcp10 MACH_ADX_XGCP10 ADX_XGCP10 2713
2701mcgwumts2a MACH_MCGWUMTS2A MCGWUMTS2A 2714
2702mobikt MACH_MOBIKT MOBIKT 2715
2703mx53_evk MACH_MX53_EVK MX53_EVK 2716
2704igep0030 MACH_IGEP0030 IGEP0030 2717
2705axell_h40_h50_ctrl MACH_AXELL_H40_H50_CTRL AXELL_H40_H50_CTRL 2718
2706dtcommod MACH_DTCOMMOD DTCOMMOD 2719
2707gould MACH_GOULD GOULD 2720
2708siberia MACH_SIBERIA SIBERIA 2721
2709sbc3530 MACH_SBC3530 SBC3530 2722
2710qarm MACH_QARM QARM 2723
2711mips MACH_MIPS MIPS 2724
2712mx27grb MACH_MX27GRB MX27GRB 2725
2713sbc8100 MACH_SBC8100 SBC8100 2726
2714saarb MACH_SAARB SAARB 2727
2715omap3mini MACH_OMAP3MINI OMAP3MINI 2728
2716cnmbook7se MACH_CNMBOOK7SE CNMBOOK7SE 2729
2717catan MACH_CATAN CATAN 2730
2718harmony MACH_HARMONY HARMONY 2731
2719tonga MACH_TONGA TONGA 2732
2720cybook_orizon MACH_CYBOOK_ORIZON CYBOOK_ORIZON 2733
2721htcrhodiumcdma MACH_HTCRHODIUMCDMA HTCRHODIUMCDMA 2734
2722epc_g45 MACH_EPC_G45 EPC_G45 2735
2723epc_lpc3250 MACH_EPC_LPC3250 EPC_LPC3250 2736
2724mxc91341evb MACH_MXC91341EVB MXC91341EVB 2737
2725rtw1000 MACH_RTW1000 RTW1000 2738
2726bobcat MACH_BOBCAT BOBCAT 2739
2727trizeps6 MACH_TRIZEPS6 TRIZEPS6 2740
2728msm7x30_fluid MACH_MSM7X30_FLUID MSM7X30_FLUID 2741
2729nedap9263 MACH_NEDAP9263 NEDAP9263 2742
2730netgear_ms2110 MACH_NETGEAR_MS2110 NETGEAR_MS2110 2743
2731bmx MACH_BMX BMX 2744
2732netstream MACH_NETSTREAM NETSTREAM 2745
2733vpnext_rcu MACH_VPNEXT_RCU VPNEXT_RCU 2746
2734vpnext_mpu MACH_VPNEXT_MPU VPNEXT_MPU 2747
2735bcmring_tablet_v1 MACH_BCMRING_TABLET_V1 BCMRING_TABLET_V1 2748
2736sgarm10 MACH_SGARM10 SGARM10 2749
2737cm_t3517 MACH_CM_T3517 CM_T3517 2750
2738omap3_cps MACH_OMAP3_CPS OMAP3_CPS 2751
2739axar1500_receiver MACH_AXAR1500_RECEIVER AXAR1500_RECEIVER 2752
2740wbd222 MACH_WBD222 WBD222 2753
2741mt65xx MACH_MT65XX MT65XX 2754
2742msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755
2743msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756
2744vmc300 MACH_VMC300 VMC300 2757
2745tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758
2746nanos MACH_NANOS NANOS 2759
2747stamp9g10 MACH_STAMP9G10 STAMP9G10 2760
2748stamp9g45 MACH_STAMP9G45 STAMP9G45 2761
2749h6053 MACH_H6053 H6053 2762
2750smint01 MACH_SMINT01 SMINT01 2763
2751prtlvt2 MACH_PRTLVT2 PRTLVT2 2764
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 8a54eb8e3768..2e19500921f9 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -313,19 +313,6 @@ config 8XX_MINIMAL_FPEMU
313 313
314 It is recommended that you build a soft-float userspace instead. 314 It is recommended that you build a soft-float userspace instead.
315 315
316config IOMMU_VMERGE
317 bool "Enable IOMMU virtual merging"
318 depends on PPC64
319 default y
320 help
321 Cause IO segments sent to a device for DMA to be merged virtually
322 by the IOMMU when they happen to have been allocated contiguously.
323 This doesn't add pressure to the IOMMU allocator. However, some
324 drivers don't support getting large merged segments coming back
325 from *_map_sg().
326
327 Most drivers don't have this problem; it is safe to say Y here.
328
329config IOMMU_HELPER 316config IOMMU_HELPER
330 def_bool PPC64 317 def_bool PPC64
331 318
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index aea714797590..d553bbeb726c 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -25,7 +25,7 @@
25#define PPC_INST_LDARX 0x7c0000a8 25#define PPC_INST_LDARX 0x7c0000a8
26#define PPC_INST_LSWI 0x7c0004aa 26#define PPC_INST_LSWI 0x7c0004aa
27#define PPC_INST_LSWX 0x7c00042a 27#define PPC_INST_LSWX 0x7c00042a
28#define PPC_INST_LWARX 0x7c000029 28#define PPC_INST_LWARX 0x7c000028
29#define PPC_INST_LWSYNC 0x7c2004ac 29#define PPC_INST_LWSYNC 0x7c2004ac
30#define PPC_INST_LXVD2X 0x7c000698 30#define PPC_INST_LXVD2X 0x7c000698
31#define PPC_INST_MCRXR 0x7c000400 31#define PPC_INST_MCRXR 0x7c000400
@@ -62,8 +62,8 @@
62#define __PPC_T_TLB(t) (((t) & 0x3) << 21) 62#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
63#define __PPC_WC(w) (((w) & 0x3) << 21) 63#define __PPC_WC(w) (((w) & 0x3) << 21)
64/* 64/*
65 * Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have 65 * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
66 * any side effects on all 32bit processors, we can do this all the time. 66 * larx with EH set as an illegal instruction.
67 */ 67 */
68#ifdef CONFIG_PPC64 68#ifdef CONFIG_PPC64
69#define __PPC_EH(eh) (((eh) & 0x1) << 0) 69#define __PPC_EH(eh) (((eh) & 0x1) << 0)
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
index efa7f0b879f3..23913e902fc3 100644
--- a/arch/powerpc/include/asm/syscall.h
+++ b/arch/powerpc/include/asm/syscall.h
@@ -30,7 +30,7 @@ static inline void syscall_rollback(struct task_struct *task,
30static inline long syscall_get_error(struct task_struct *task, 30static inline long syscall_get_error(struct task_struct *task,
31 struct pt_regs *regs) 31 struct pt_regs *regs)
32{ 32{
33 return (regs->ccr & 0x1000) ? -regs->gpr[3] : 0; 33 return (regs->ccr & 0x10000000) ? -regs->gpr[3] : 0;
34} 34}
35 35
36static inline long syscall_get_return_value(struct task_struct *task, 36static inline long syscall_get_return_value(struct task_struct *task,
@@ -44,10 +44,10 @@ static inline void syscall_set_return_value(struct task_struct *task,
44 int error, long val) 44 int error, long val)
45{ 45{
46 if (error) { 46 if (error) {
47 regs->ccr |= 0x1000L; 47 regs->ccr |= 0x10000000L;
48 regs->gpr[3] = -error; 48 regs->gpr[3] = -error;
49 } else { 49 } else {
50 regs->ccr &= ~0x1000L; 50 regs->ccr &= ~0x10000000L;
51 regs->gpr[3] = val; 51 regs->gpr[3] = val;
52 } 52 }
53} 53}
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 25793bb0e782..725526547994 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -747,9 +747,6 @@ finish_tlb_load:
747#else 747#else
748 rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */ 748 rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */
749#endif 749#endif
750#ifdef CONFIG_SMP
751 ori r12, r12, MAS2_M
752#endif
753 mtspr SPRN_MAS2, r12 750 mtspr SPRN_MAS2, r12
754 751
755#ifdef CONFIG_PTE_64BIT 752#ifdef CONFIG_PTE_64BIT
@@ -887,13 +884,17 @@ KernelSPE:
887 lwz r3,_MSR(r1) 884 lwz r3,_MSR(r1)
888 oris r3,r3,MSR_SPE@h 885 oris r3,r3,MSR_SPE@h
889 stw r3,_MSR(r1) /* enable use of SPE after return */ 886 stw r3,_MSR(r1) /* enable use of SPE after return */
887#ifdef CONFIG_PRINTK
890 lis r3,87f@h 888 lis r3,87f@h
891 ori r3,r3,87f@l 889 ori r3,r3,87f@l
892 mr r4,r2 /* current */ 890 mr r4,r2 /* current */
893 lwz r5,_NIP(r1) 891 lwz r5,_NIP(r1)
894 bl printk 892 bl printk
893#endif
895 b ret_from_except 894 b ret_from_except
895#ifdef CONFIG_PRINTK
89687: .string "SPE used in kernel (task=%p, pc=%x) \n" 89687: .string "SPE used in kernel (task=%p, pc=%x) \n"
897#endif
897 .align 4,0 898 .align 4,0
898 899
899#endif /* CONFIG_SPE */ 900#endif /* CONFIG_SPE */
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index 5547ae6e6b0b..ec94f906ea43 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -42,12 +42,7 @@
42 42
43#define DBG(...) 43#define DBG(...)
44 44
45#ifdef CONFIG_IOMMU_VMERGE 45static int novmerge;
46static int novmerge = 0;
47#else
48static int novmerge = 1;
49#endif
50
51static int protect4gb = 1; 46static int protect4gb = 1;
52 47
53static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int); 48static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int);
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index b152de3e64d4..8f58986c2ad9 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -39,7 +39,6 @@
39#include <asm/serial.h> 39#include <asm/serial.h>
40#include <asm/udbg.h> 40#include <asm/udbg.h>
41#include <asm/mmu_context.h> 41#include <asm/mmu_context.h>
42#include <asm/swiotlb.h>
43 42
44#include "setup.h" 43#include "setup.h"
45 44
@@ -343,11 +342,6 @@ void __init setup_arch(char **cmdline_p)
343 ppc_md.setup_arch(); 342 ppc_md.setup_arch();
344 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 343 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
345 344
346#ifdef CONFIG_SWIOTLB
347 if (ppc_swiotlb_enable)
348 swiotlb_init(1);
349#endif
350
351 paging_init(); 345 paging_init();
352 346
353 /* Initialize the MMU context management stuff */ 347 /* Initialize the MMU context management stuff */
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 63547394048c..914389158a9b 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -61,7 +61,6 @@
61#include <asm/xmon.h> 61#include <asm/xmon.h>
62#include <asm/udbg.h> 62#include <asm/udbg.h>
63#include <asm/kexec.h> 63#include <asm/kexec.h>
64#include <asm/swiotlb.h>
65#include <asm/mmu_context.h> 64#include <asm/mmu_context.h>
66 65
67#include "setup.h" 66#include "setup.h"
@@ -541,11 +540,6 @@ void __init setup_arch(char **cmdline_p)
541 if (ppc_md.setup_arch) 540 if (ppc_md.setup_arch)
542 ppc_md.setup_arch(); 541 ppc_md.setup_arch();
543 542
544#ifdef CONFIG_SWIOTLB
545 if (ppc_swiotlb_enable)
546 swiotlb_init(1);
547#endif
548
549 paging_init(); 543 paging_init();
550 544
551 /* Initialize the MMU context management stuff */ 545 /* Initialize the MMU context management stuff */
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 311224cdb7ad..448f972b22f5 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -48,6 +48,7 @@
48#include <asm/sparsemem.h> 48#include <asm/sparsemem.h>
49#include <asm/vdso.h> 49#include <asm/vdso.h>
50#include <asm/fixmap.h> 50#include <asm/fixmap.h>
51#include <asm/swiotlb.h>
51 52
52#include "mmu_decl.h" 53#include "mmu_decl.h"
53 54
@@ -320,6 +321,11 @@ void __init mem_init(void)
320 struct page *page; 321 struct page *page;
321 unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize; 322 unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize;
322 323
324#ifdef CONFIG_SWIOTLB
325 if (ppc_swiotlb_enable)
326 swiotlb_init(1);
327#endif
328
323 num_physpages = lmb.memory.size >> PAGE_SHIFT; 329 num_physpages = lmb.memory.size >> PAGE_SHIFT;
324 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE); 330 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
325 331
diff --git a/arch/s390/boot/compressed/misc.c b/arch/s390/boot/compressed/misc.c
index a97d69525829..14e0479d3888 100644
--- a/arch/s390/boot/compressed/misc.c
+++ b/arch/s390/boot/compressed/misc.c
@@ -24,8 +24,8 @@
24/* Symbols defined by linker scripts */ 24/* Symbols defined by linker scripts */
25extern char input_data[]; 25extern char input_data[];
26extern int input_len; 26extern int input_len;
27extern int _text; 27extern char _text, _end;
28extern int _end; 28extern char _bss, _ebss;
29 29
30static void error(char *m); 30static void error(char *m);
31 31
@@ -129,12 +129,12 @@ unsigned long decompress_kernel(void)
129 unsigned long output_addr; 129 unsigned long output_addr;
130 unsigned char *output; 130 unsigned char *output;
131 131
132 check_ipl_parmblock((void *) 0, (unsigned long) output + SZ__bss_start);
133 memset(&_bss, 0, &_ebss - &_bss);
132 free_mem_ptr = (unsigned long)&_end; 134 free_mem_ptr = (unsigned long)&_end;
133 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; 135 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
134 output = (unsigned char *) ((free_mem_end_ptr + 4095UL) & -4096UL); 136 output = (unsigned char *) ((free_mem_end_ptr + 4095UL) & -4096UL);
135 137
136 check_ipl_parmblock((void *) 0, (unsigned long) output + SZ__bss_start);
137
138#ifdef CONFIG_BLK_DEV_INITRD 138#ifdef CONFIG_BLK_DEV_INITRD
139 /* 139 /*
140 * Move the initrd right behind the end of the decompressed 140 * Move the initrd right behind the end of the decompressed
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index 67ee6c3c6bb3..1741c1556a4e 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -110,6 +110,7 @@ extern void pfault_fini(void);
110#endif /* CONFIG_PFAULT */ 110#endif /* CONFIG_PFAULT */
111 111
112extern void cmma_init(void); 112extern void cmma_init(void);
113extern int memcpy_real(void *, void *, size_t);
113 114
114#define finish_arch_switch(prev) do { \ 115#define finish_arch_switch(prev) do { \
115 set_fs(current->thread.mm_segment); \ 116 set_fs(current->thread.mm_segment); \
@@ -218,8 +219,8 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
218 " l %0,%2\n" 219 " l %0,%2\n"
219 "0: nr %0,%5\n" 220 "0: nr %0,%5\n"
220 " lr %1,%0\n" 221 " lr %1,%0\n"
221 " or %0,%2\n" 222 " or %0,%3\n"
222 " or %1,%3\n" 223 " or %1,%4\n"
223 " cs %0,%1,%2\n" 224 " cs %0,%1,%2\n"
224 " jnl 1f\n" 225 " jnl 1f\n"
225 " xr %1,%0\n" 226 " xr %1,%0\n"
@@ -239,8 +240,8 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
239 " l %0,%2\n" 240 " l %0,%2\n"
240 "0: nr %0,%5\n" 241 "0: nr %0,%5\n"
241 " lr %1,%0\n" 242 " lr %1,%0\n"
242 " or %0,%2\n" 243 " or %0,%3\n"
243 " or %1,%3\n" 244 " or %1,%4\n"
244 " cs %0,%1,%2\n" 245 " cs %0,%1,%2\n"
245 " jnl 1f\n" 246 " jnl 1f\n"
246 " xr %1,%0\n" 247 " xr %1,%0\n"
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index ca4a62bd862f..9d1f76702d47 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -517,7 +517,10 @@ startup:
517 lhi %r1,2 # mode 2 = esame (dump) 517 lhi %r1,2 # mode 2 = esame (dump)
518 sigp %r1,%r0,0x12 # switch to esame mode 518 sigp %r1,%r0,0x12 # switch to esame mode
519 sam64 # switch to 64 bit mode 519 sam64 # switch to 64 bit mode
520 larl %r13,4f
521 lmh %r0,%r15,0(%r13) # clear high-order half
520 jg startup_continue 522 jg startup_continue
5234: .fill 16,4,0x0
521#else 524#else
522 mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0) 525 mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0)
523 l %r13,4f-.LPG0(%r13) 526 l %r13,4f-.LPG0(%r13)
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 39580e768658..1f70970de0aa 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -21,7 +21,6 @@ startup_continue:
21 larl %r1,sched_clock_base_cc 21 larl %r1,sched_clock_base_cc
22 mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK 22 mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
23 larl %r13,.LPG1 # get base 23 larl %r13,.LPG1 # get base
24 lmh %r0,%r15,.Lzero64-.LPG1(%r13) # clear high-order half
25 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers 24 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
26 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area 25 lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
27 # move IPL device to lowcore 26 # move IPL device to lowcore
@@ -67,7 +66,6 @@ startup_continue:
67.L4malign:.quad 0xffffffffffc00000 66.L4malign:.quad 0xffffffffffc00000
68.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 67.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
69.Lnop: .long 0x07000700 68.Lnop: .long 0x07000700
70.Lzero64:.fill 16,4,0x0
71.Lparmaddr: 69.Lparmaddr:
72 .quad PARMAREA 70 .quad PARMAREA
73 .align 64 71 .align 64
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 77a63ae419f0..ba363d99de43 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -401,7 +401,7 @@ setup_lowcore(void)
401 * Setup lowcore for boot cpu 401 * Setup lowcore for boot cpu
402 */ 402 */
403 BUILD_BUG_ON(sizeof(struct _lowcore) != LC_PAGES * 4096); 403 BUILD_BUG_ON(sizeof(struct _lowcore) != LC_PAGES * 4096);
404 lc = __alloc_bootmem(LC_PAGES * PAGE_SIZE, LC_PAGES * PAGE_SIZE, 0); 404 lc = __alloc_bootmem_low(LC_PAGES * PAGE_SIZE, LC_PAGES * PAGE_SIZE, 0);
405 lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY; 405 lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
406 lc->restart_psw.addr = 406 lc->restart_psw.addr =
407 PSW_ADDR_AMODE | (unsigned long) restart_int_handler; 407 PSW_ADDR_AMODE | (unsigned long) restart_int_handler;
@@ -433,7 +433,7 @@ setup_lowcore(void)
433#ifndef CONFIG_64BIT 433#ifndef CONFIG_64BIT
434 if (MACHINE_HAS_IEEE) { 434 if (MACHINE_HAS_IEEE) {
435 lc->extended_save_area_addr = (__u32) 435 lc->extended_save_area_addr = (__u32)
436 __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, 0); 436 __alloc_bootmem_low(PAGE_SIZE, PAGE_SIZE, 0);
437 /* enable extended save area */ 437 /* enable extended save area */
438 __ctl_set_bit(14, 29); 438 __ctl_set_bit(14, 29);
439 } 439 }
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 29f65bce55e1..d7d24fc3d6b7 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -292,9 +292,9 @@ static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
292 zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL); 292 zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL);
293 while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy) 293 while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy)
294 cpu_relax(); 294 cpu_relax();
295 memcpy(zfcpdump_save_areas[cpu], 295 memcpy_real(zfcpdump_save_areas[cpu],
296 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE, 296 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
297 sizeof(struct save_area)); 297 sizeof(struct save_area));
298} 298}
299 299
300struct save_area *zfcpdump_save_areas[NR_CPUS + 1]; 300struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
index 81756271dc44..a8c2af8c650f 100644
--- a/arch/s390/mm/maccess.c
+++ b/arch/s390/mm/maccess.c
@@ -59,3 +59,29 @@ long probe_kernel_write(void *dst, void *src, size_t size)
59 } 59 }
60 return copied < 0 ? -EFAULT : 0; 60 return copied < 0 ? -EFAULT : 0;
61} 61}
62
63int memcpy_real(void *dest, void *src, size_t count)
64{
65 register unsigned long _dest asm("2") = (unsigned long) dest;
66 register unsigned long _len1 asm("3") = (unsigned long) count;
67 register unsigned long _src asm("4") = (unsigned long) src;
68 register unsigned long _len2 asm("5") = (unsigned long) count;
69 unsigned long flags;
70 int rc = -EFAULT;
71
72 if (!count)
73 return 0;
74 flags = __raw_local_irq_stnsm(0xf8UL);
75 asm volatile (
76 "0: mvcle %1,%2,0x0\n"
77 "1: jo 0b\n"
78 " lhi %0,0x0\n"
79 "2:\n"
80 EX_TABLE(1b,2b)
81 : "+d" (rc), "+d" (_dest), "+d" (_src), "+d" (_len1),
82 "+d" (_len2), "=m" (*((long *) dest))
83 : "m" (*((long *) src))
84 : "cc", "memory");
85 __raw_local_irq_ssm(flags);
86 return rc;
87}
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 39ed8722d11a..6c13b92742e8 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -836,6 +836,8 @@ static void __init sh_eth_init(struct sh_eth_plat_data *pd)
836 pd->mac_addr[i] = mac_read(a, 0x10 + i); 836 pd->mac_addr[i] = mac_read(a, 0x10 + i);
837 msleep(10); 837 msleep(10);
838 } 838 }
839
840 i2c_put_adapter(a);
839} 841}
840#else 842#else
841static void __init sh_eth_init(struct sh_eth_plat_data *pd) 843static void __init sh_eth_init(struct sh_eth_plat_data *pd)
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 66cdbc3c7af9..ccaa290e9aba 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -52,6 +52,13 @@
52 * and change SW41 to use 720p 52 * and change SW41 to use 720p
53 */ 53 */
54 54
55/*
56 * about sound
57 *
58 * This setup.c supports FSI slave mode.
59 * Please change J20, J21, J22 pin to 1-2 connection.
60 */
61
55/* Heartbeat */ 62/* Heartbeat */
56static struct resource heartbeat_resource = { 63static struct resource heartbeat_resource = {
57 .start = PA_LED, 64 .start = PA_LED,
@@ -276,6 +283,7 @@ static struct clk fsimcka_clk = {
276 .rate = 0, /* unknown */ 283 .rate = 0, /* unknown */
277}; 284};
278 285
286/* change J20, J21, J22 pin to 1-2 connection to use slave mode */
279struct sh_fsi_platform_info fsi_info = { 287struct sh_fsi_platform_info fsi_info = {
280 .porta_flags = SH_FSI_BRS_INV | 288 .porta_flags = SH_FSI_BRS_INV |
281 SH_FSI_OUT_SLAVE_MODE | 289 SH_FSI_OUT_SLAVE_MODE |
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
index 18e3356406f3..6041c66dd10e 100644
--- a/arch/sh/configs/ecovec24_defconfig
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc2 3# Linux kernel version: 2.6.34-rc2
4# Mon Jan 4 11:20:36 2010 4# Mon Mar 29 02:21:58 2010
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y 7CONFIG_SUPERH32=y
@@ -13,8 +13,8 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y 13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y 14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y 15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y 16CONFIG_IRQ_PER_CPU=y
17CONFIG_SPARSE_IRQ=y
18CONFIG_GENERIC_GPIO=y 18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y 19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y 20CONFIG_GENERIC_CLOCKEVENTS=y
@@ -32,6 +32,7 @@ CONFIG_ARCH_NO_VIRT_TO_BUS=y
32CONFIG_ARCH_HAS_DEFAULT_IDLE=y 32CONFIG_ARCH_HAS_DEFAULT_IDLE=y
33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y 33CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
34CONFIG_DMA_NONCOHERENT=y 34CONFIG_DMA_NONCOHERENT=y
35CONFIG_NEED_DMA_MAP_STATE=y
35CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 36CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
36CONFIG_CONSTRUCTORS=y 37CONFIG_CONSTRUCTORS=y
37 38
@@ -47,9 +48,11 @@ CONFIG_LOCALVERSION=""
47CONFIG_HAVE_KERNEL_GZIP=y 48CONFIG_HAVE_KERNEL_GZIP=y
48CONFIG_HAVE_KERNEL_BZIP2=y 49CONFIG_HAVE_KERNEL_BZIP2=y
49CONFIG_HAVE_KERNEL_LZMA=y 50CONFIG_HAVE_KERNEL_LZMA=y
51CONFIG_HAVE_KERNEL_LZO=y
50CONFIG_KERNEL_GZIP=y 52CONFIG_KERNEL_GZIP=y
51# CONFIG_KERNEL_BZIP2 is not set 53# CONFIG_KERNEL_BZIP2 is not set
52# CONFIG_KERNEL_LZMA is not set 54# CONFIG_KERNEL_LZMA is not set
55# CONFIG_KERNEL_LZO is not set
53CONFIG_SWAP=y 56CONFIG_SWAP=y
54CONFIG_SYSVIPC=y 57CONFIG_SYSVIPC=y
55CONFIG_SYSVIPC_SYSCTL=y 58CONFIG_SYSVIPC_SYSCTL=y
@@ -71,14 +74,8 @@ CONFIG_RCU_FANOUT=32
71# CONFIG_TREE_RCU_TRACE is not set 74# CONFIG_TREE_RCU_TRACE is not set
72# CONFIG_IKCONFIG is not set 75# CONFIG_IKCONFIG is not set
73CONFIG_LOG_BUF_SHIFT=14 76CONFIG_LOG_BUF_SHIFT=14
74CONFIG_GROUP_SCHED=y
75CONFIG_FAIR_GROUP_SCHED=y
76# CONFIG_RT_GROUP_SCHED is not set
77CONFIG_USER_SCHED=y
78# CONFIG_CGROUP_SCHED is not set
79# CONFIG_CGROUPS is not set 77# CONFIG_CGROUPS is not set
80CONFIG_SYSFS_DEPRECATED=y 78# CONFIG_SYSFS_DEPRECATED_V2 is not set
81CONFIG_SYSFS_DEPRECATED_V2=y
82# CONFIG_RELAY is not set 79# CONFIG_RELAY is not set
83# CONFIG_NAMESPACES is not set 80# CONFIG_NAMESPACES is not set
84# CONFIG_BLK_DEV_INITRD is not set 81# CONFIG_BLK_DEV_INITRD is not set
@@ -107,7 +104,7 @@ CONFIG_PERF_USE_VMALLOC=y
107# 104#
108# Kernel Performance Events And Counters 105# Kernel Performance Events And Counters
109# 106#
110# CONFIG_PERF_EVENTS is not set 107CONFIG_PERF_EVENTS=y
111# CONFIG_PERF_COUNTERS is not set 108# CONFIG_PERF_COUNTERS is not set
112CONFIG_VM_EVENT_COUNTERS=y 109CONFIG_VM_EVENT_COUNTERS=y
113CONFIG_COMPAT_BRK=y 110CONFIG_COMPAT_BRK=y
@@ -116,13 +113,13 @@ CONFIG_SLAB=y
116# CONFIG_SLOB is not set 113# CONFIG_SLOB is not set
117# CONFIG_PROFILING is not set 114# CONFIG_PROFILING is not set
118CONFIG_HAVE_OPROFILE=y 115CONFIG_HAVE_OPROFILE=y
119CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y 116CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y 117CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y 118CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_DMA_ATTRS=y 119CONFIG_HAVE_DMA_ATTRS=y
124CONFIG_HAVE_CLK=y 120CONFIG_HAVE_CLK=y
125CONFIG_HAVE_DMA_API_DEBUG=y 121CONFIG_HAVE_DMA_API_DEBUG=y
122CONFIG_HAVE_HW_BREAKPOINT=y
126 123
127# 124#
128# GCOV-based kernel profiling 125# GCOV-based kernel profiling
@@ -234,12 +231,12 @@ CONFIG_CPU_SUBTYPE_SH7724=y
234CONFIG_QUICKLIST=y 231CONFIG_QUICKLIST=y
235CONFIG_MMU=y 232CONFIG_MMU=y
236CONFIG_PAGE_OFFSET=0x80000000 233CONFIG_PAGE_OFFSET=0x80000000
237CONFIG_FORCE_MAX_ZONEORDER=11 234CONFIG_FORCE_MAX_ZONEORDER=12
238CONFIG_MEMORY_START=0x08000000 235CONFIG_MEMORY_START=0x08000000
239CONFIG_MEMORY_SIZE=0x10000000 236CONFIG_MEMORY_SIZE=0x10000000
240CONFIG_29BIT=y 237CONFIG_29BIT=y
241# CONFIG_PMB_ENABLE is not set 238# CONFIG_PMB is not set
242# CONFIG_X2TLB is not set 239CONFIG_X2TLB=y
243CONFIG_VSYSCALL=y 240CONFIG_VSYSCALL=y
244CONFIG_ARCH_FLATMEM_ENABLE=y 241CONFIG_ARCH_FLATMEM_ENABLE=y
245CONFIG_ARCH_SPARSEMEM_ENABLE=y 242CONFIG_ARCH_SPARSEMEM_ENABLE=y
@@ -247,6 +244,8 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y
247CONFIG_MAX_ACTIVE_REGIONS=1 244CONFIG_MAX_ACTIVE_REGIONS=1
248CONFIG_ARCH_POPULATES_NODE_MAP=y 245CONFIG_ARCH_POPULATES_NODE_MAP=y
249CONFIG_ARCH_SELECT_MEMORY_MODEL=y 246CONFIG_ARCH_SELECT_MEMORY_MODEL=y
247CONFIG_IOREMAP_FIXED=y
248CONFIG_UNCACHED_MAPPING=y
250CONFIG_PAGE_SIZE_4KB=y 249CONFIG_PAGE_SIZE_4KB=y
251# CONFIG_PAGE_SIZE_8KB is not set 250# CONFIG_PAGE_SIZE_8KB is not set
252# CONFIG_PAGE_SIZE_16KB is not set 251# CONFIG_PAGE_SIZE_16KB is not set
@@ -262,7 +261,7 @@ CONFIG_PAGEFLAGS_EXTENDED=y
262CONFIG_SPLIT_PTLOCK_CPUS=4 261CONFIG_SPLIT_PTLOCK_CPUS=4
263# CONFIG_PHYS_ADDR_T_64BIT is not set 262# CONFIG_PHYS_ADDR_T_64BIT is not set
264CONFIG_ZONE_DMA_FLAG=0 263CONFIG_ZONE_DMA_FLAG=0
265CONFIG_NR_QUICK=2 264CONFIG_NR_QUICK=1
266# CONFIG_KSM is not set 265# CONFIG_KSM is not set
267CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 266CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
268 267
@@ -337,7 +336,6 @@ CONFIG_SECCOMP=y
337# CONFIG_PREEMPT_VOLUNTARY is not set 336# CONFIG_PREEMPT_VOLUNTARY is not set
338CONFIG_PREEMPT=y 337CONFIG_PREEMPT=y
339CONFIG_GUSA=y 338CONFIG_GUSA=y
340# CONFIG_SPARSE_IRQ is not set
341 339
342# 340#
343# Boot options 341# Boot options
@@ -347,7 +345,7 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
347CONFIG_ENTRY_OFFSET=0x00001000 345CONFIG_ENTRY_OFFSET=0x00001000
348CONFIG_CMDLINE_OVERWRITE=y 346CONFIG_CMDLINE_OVERWRITE=y
349# CONFIG_CMDLINE_EXTEND is not set 347# CONFIG_CMDLINE_EXTEND is not set
350CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=120M memchunk.vpu=4m" 348CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 root=/dev/nfs ip=dhcp mem=248M memchunk.vpu=8m memchunk.veu0=4m"
351 349
352# 350#
353# Bus options 351# Bus options
@@ -373,6 +371,7 @@ CONFIG_SUSPEND=y
373CONFIG_SUSPEND_FREEZER=y 371CONFIG_SUSPEND_FREEZER=y
374# CONFIG_HIBERNATION is not set 372# CONFIG_HIBERNATION is not set
375CONFIG_PM_RUNTIME=y 373CONFIG_PM_RUNTIME=y
374CONFIG_PM_OPS=y
376# CONFIG_CPU_IDLE is not set 375# CONFIG_CPU_IDLE is not set
377CONFIG_NET=y 376CONFIG_NET=y
378 377
@@ -380,7 +379,6 @@ CONFIG_NET=y
380# Networking options 379# Networking options
381# 380#
382CONFIG_PACKET=y 381CONFIG_PACKET=y
383# CONFIG_PACKET_MMAP is not set
384CONFIG_UNIX=y 382CONFIG_UNIX=y
385# CONFIG_NET_KEY is not set 383# CONFIG_NET_KEY is not set
386CONFIG_INET=y 384CONFIG_INET=y
@@ -445,7 +443,45 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
445# CONFIG_NET_PKTGEN is not set 443# CONFIG_NET_PKTGEN is not set
446# CONFIG_HAMRADIO is not set 444# CONFIG_HAMRADIO is not set
447# CONFIG_CAN is not set 445# CONFIG_CAN is not set
448# CONFIG_IRDA is not set 446CONFIG_IRDA=y
447
448#
449# IrDA protocols
450#
451# CONFIG_IRLAN is not set
452# CONFIG_IRCOMM is not set
453# CONFIG_IRDA_ULTRA is not set
454
455#
456# IrDA options
457#
458# CONFIG_IRDA_CACHE_LAST_LSAP is not set
459# CONFIG_IRDA_FAST_RR is not set
460# CONFIG_IRDA_DEBUG is not set
461
462#
463# Infrared-port device drivers
464#
465
466#
467# SIR device drivers
468#
469# CONFIG_IRTTY_SIR is not set
470
471#
472# Dongle support
473#
474CONFIG_SH_SIR=y
475# CONFIG_KINGSUN_DONGLE is not set
476# CONFIG_KSDAZZLE_DONGLE is not set
477# CONFIG_KS959_DONGLE is not set
478
479#
480# FIR device drivers
481#
482# CONFIG_USB_IRDA is not set
483# CONFIG_SIGMATEL_FIR is not set
484# CONFIG_MCS_FIR is not set
449# CONFIG_BT is not set 485# CONFIG_BT is not set
450# CONFIG_AF_RXRPC is not set 486# CONFIG_AF_RXRPC is not set
451CONFIG_WIRELESS=y 487CONFIG_WIRELESS=y
@@ -556,6 +592,7 @@ CONFIG_MTD_NAND_IDS=y
556# CONFIG_MTD_NAND_NANDSIM is not set 592# CONFIG_MTD_NAND_NANDSIM is not set
557# CONFIG_MTD_NAND_PLATFORM is not set 593# CONFIG_MTD_NAND_PLATFORM is not set
558# CONFIG_MTD_ALAUDA is not set 594# CONFIG_MTD_ALAUDA is not set
595# CONFIG_MTD_NAND_SH_FLCTL is not set
559# CONFIG_MTD_ONENAND is not set 596# CONFIG_MTD_ONENAND is not set
560 597
561# 598#
@@ -597,6 +634,7 @@ CONFIG_MISC_DEVICES=y
597# CONFIG_ICS932S401 is not set 634# CONFIG_ICS932S401 is not set
598# CONFIG_ENCLOSURE_SERVICES is not set 635# CONFIG_ENCLOSURE_SERVICES is not set
599# CONFIG_ISL29003 is not set 636# CONFIG_ISL29003 is not set
637# CONFIG_SENSORS_TSL2550 is not set
600# CONFIG_DS1682 is not set 638# CONFIG_DS1682 is not set
601# CONFIG_TI_DAC7512 is not set 639# CONFIG_TI_DAC7512 is not set
602# CONFIG_C2PORT is not set 640# CONFIG_C2PORT is not set
@@ -616,6 +654,7 @@ CONFIG_HAVE_IDE=y
616# 654#
617# SCSI device support 655# SCSI device support
618# 656#
657CONFIG_SCSI_MOD=y
619# CONFIG_RAID_ATTRS is not set 658# CONFIG_RAID_ATTRS is not set
620CONFIG_SCSI=y 659CONFIG_SCSI=y
621CONFIG_SCSI_DMA=y 660CONFIG_SCSI_DMA=y
@@ -768,7 +807,29 @@ CONFIG_KEYBOARD_SH_KEYSC=y
768# CONFIG_INPUT_MOUSE is not set 807# CONFIG_INPUT_MOUSE is not set
769# CONFIG_INPUT_JOYSTICK is not set 808# CONFIG_INPUT_JOYSTICK is not set
770# CONFIG_INPUT_TABLET is not set 809# CONFIG_INPUT_TABLET is not set
771# CONFIG_INPUT_TOUCHSCREEN is not set 810CONFIG_INPUT_TOUCHSCREEN=y
811# CONFIG_TOUCHSCREEN_ADS7846 is not set
812# CONFIG_TOUCHSCREEN_AD7877 is not set
813# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
814# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
815# CONFIG_TOUCHSCREEN_AD7879 is not set
816# CONFIG_TOUCHSCREEN_DYNAPRO is not set
817# CONFIG_TOUCHSCREEN_EETI is not set
818# CONFIG_TOUCHSCREEN_FUJITSU is not set
819# CONFIG_TOUCHSCREEN_GUNZE is not set
820# CONFIG_TOUCHSCREEN_ELO is not set
821# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
822# CONFIG_TOUCHSCREEN_MCS5000 is not set
823# CONFIG_TOUCHSCREEN_MTOUCH is not set
824# CONFIG_TOUCHSCREEN_INEXIO is not set
825# CONFIG_TOUCHSCREEN_MK712 is not set
826# CONFIG_TOUCHSCREEN_PENMOUNT is not set
827# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
828# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
829# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
830# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
831CONFIG_TOUCHSCREEN_TSC2007=y
832# CONFIG_TOUCHSCREEN_W90X900 is not set
772# CONFIG_INPUT_MISC is not set 833# CONFIG_INPUT_MISC is not set
773 834
774# 835#
@@ -802,10 +863,10 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
802CONFIG_SERIAL_SH_SCI_CONSOLE=y 863CONFIG_SERIAL_SH_SCI_CONSOLE=y
803CONFIG_SERIAL_CORE=y 864CONFIG_SERIAL_CORE=y
804CONFIG_SERIAL_CORE_CONSOLE=y 865CONFIG_SERIAL_CORE_CONSOLE=y
866# CONFIG_SERIAL_TIMBERDALE is not set
805CONFIG_UNIX98_PTYS=y 867CONFIG_UNIX98_PTYS=y
806# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set 868# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
807CONFIG_LEGACY_PTYS=y 869# CONFIG_LEGACY_PTYS is not set
808CONFIG_LEGACY_PTY_COUNT=256
809# CONFIG_IPMI_HANDLER is not set 870# CONFIG_IPMI_HANDLER is not set
810CONFIG_HW_RANDOM=y 871CONFIG_HW_RANDOM=y
811# CONFIG_HW_RANDOM_TIMERIOMEM is not set 872# CONFIG_HW_RANDOM_TIMERIOMEM is not set
@@ -830,6 +891,7 @@ CONFIG_I2C_HELPER_AUTO=y
830# CONFIG_I2C_OCORES is not set 891# CONFIG_I2C_OCORES is not set
831CONFIG_I2C_SH_MOBILE=y 892CONFIG_I2C_SH_MOBILE=y
832# CONFIG_I2C_SIMTEC is not set 893# CONFIG_I2C_SIMTEC is not set
894# CONFIG_I2C_XILINX is not set
833 895
834# 896#
835# External I2C/SMBus adapter drivers 897# External I2C/SMBus adapter drivers
@@ -843,15 +905,9 @@ CONFIG_I2C_SH_MOBILE=y
843# 905#
844# CONFIG_I2C_PCA_PLATFORM is not set 906# CONFIG_I2C_PCA_PLATFORM is not set
845# CONFIG_I2C_STUB is not set 907# CONFIG_I2C_STUB is not set
846
847#
848# Miscellaneous I2C Chip support
849#
850# CONFIG_SENSORS_TSL2550 is not set
851# CONFIG_I2C_DEBUG_CORE is not set 908# CONFIG_I2C_DEBUG_CORE is not set
852# CONFIG_I2C_DEBUG_ALGO is not set 909# CONFIG_I2C_DEBUG_ALGO is not set
853# CONFIG_I2C_DEBUG_BUS is not set 910# CONFIG_I2C_DEBUG_BUS is not set
854# CONFIG_I2C_DEBUG_CHIP is not set
855CONFIG_SPI=y 911CONFIG_SPI=y
856CONFIG_SPI_MASTER=y 912CONFIG_SPI_MASTER=y
857 913
@@ -882,13 +938,16 @@ CONFIG_GPIOLIB=y
882# 938#
883# Memory mapped GPIO expanders: 939# Memory mapped GPIO expanders:
884# 940#
941# CONFIG_GPIO_IT8761E is not set
885 942
886# 943#
887# I2C GPIO expanders: 944# I2C GPIO expanders:
888# 945#
946# CONFIG_GPIO_MAX7300 is not set
889# CONFIG_GPIO_MAX732X is not set 947# CONFIG_GPIO_MAX732X is not set
890# CONFIG_GPIO_PCA953X is not set 948# CONFIG_GPIO_PCA953X is not set
891# CONFIG_GPIO_PCF857X is not set 949# CONFIG_GPIO_PCF857X is not set
950# CONFIG_GPIO_ADP5588 is not set
892 951
893# 952#
894# PCI GPIO expanders: 953# PCI GPIO expanders:
@@ -919,23 +978,26 @@ CONFIG_SSB_POSSIBLE=y
919# 978#
920# Multifunction device drivers 979# Multifunction device drivers
921# 980#
922# CONFIG_MFD_CORE is not set 981CONFIG_MFD_CORE=y
982# CONFIG_MFD_88PM860X is not set
923# CONFIG_MFD_SM501 is not set 983# CONFIG_MFD_SM501 is not set
924# CONFIG_MFD_SH_MOBILE_SDHI is not set 984CONFIG_MFD_SH_MOBILE_SDHI=y
925# CONFIG_HTC_PASIC3 is not set 985# CONFIG_HTC_PASIC3 is not set
986# CONFIG_HTC_I2CPLD is not set
926# CONFIG_TPS65010 is not set 987# CONFIG_TPS65010 is not set
927# CONFIG_TWL4030_CORE is not set 988# CONFIG_TWL4030_CORE is not set
928# CONFIG_MFD_TMIO is not set 989# CONFIG_MFD_TMIO is not set
929# CONFIG_PMIC_DA903X is not set 990# CONFIG_PMIC_DA903X is not set
930# CONFIG_PMIC_ADP5520 is not set 991# CONFIG_PMIC_ADP5520 is not set
992# CONFIG_MFD_MAX8925 is not set
931# CONFIG_MFD_WM8400 is not set 993# CONFIG_MFD_WM8400 is not set
932# CONFIG_MFD_WM831X is not set 994# CONFIG_MFD_WM831X is not set
933# CONFIG_MFD_WM8350_I2C is not set 995# CONFIG_MFD_WM8350_I2C is not set
996# CONFIG_MFD_WM8994 is not set
934# CONFIG_MFD_PCF50633 is not set 997# CONFIG_MFD_PCF50633 is not set
935# CONFIG_MFD_MC13783 is not set 998# CONFIG_MFD_MC13783 is not set
936# CONFIG_AB3100_CORE is not set 999# CONFIG_AB3100_CORE is not set
937# CONFIG_EZX_PCAP is not set 1000# CONFIG_EZX_PCAP is not set
938# CONFIG_MFD_88PM8607 is not set
939# CONFIG_AB4500_CORE is not set 1001# CONFIG_AB4500_CORE is not set
940# CONFIG_REGULATOR is not set 1002# CONFIG_REGULATOR is not set
941CONFIG_MEDIA_SUPPORT=y 1003CONFIG_MEDIA_SUPPORT=y
@@ -985,10 +1047,10 @@ CONFIG_SOC_CAMERA=y
985# CONFIG_SOC_CAMERA_MT9M001 is not set 1047# CONFIG_SOC_CAMERA_MT9M001 is not set
986# CONFIG_SOC_CAMERA_MT9M111 is not set 1048# CONFIG_SOC_CAMERA_MT9M111 is not set
987# CONFIG_SOC_CAMERA_MT9T031 is not set 1049# CONFIG_SOC_CAMERA_MT9T031 is not set
988# CONFIG_SOC_CAMERA_MT9T112 is not set 1050CONFIG_SOC_CAMERA_MT9T112=y
989# CONFIG_SOC_CAMERA_MT9V022 is not set 1051# CONFIG_SOC_CAMERA_MT9V022 is not set
990# CONFIG_SOC_CAMERA_RJ54N1 is not set 1052# CONFIG_SOC_CAMERA_RJ54N1 is not set
991# CONFIG_SOC_CAMERA_TW9910 is not set 1053CONFIG_SOC_CAMERA_TW9910=y
992# CONFIG_SOC_CAMERA_PLATFORM is not set 1054# CONFIG_SOC_CAMERA_PLATFORM is not set
993# CONFIG_SOC_CAMERA_OV772X is not set 1055# CONFIG_SOC_CAMERA_OV772X is not set
994# CONFIG_SOC_CAMERA_OV9640 is not set 1056# CONFIG_SOC_CAMERA_OV9640 is not set
@@ -1001,6 +1063,7 @@ CONFIG_RADIO_ADAPTERS=y
1001# CONFIG_RADIO_SI470X is not set 1063# CONFIG_RADIO_SI470X is not set
1002# CONFIG_USB_MR800 is not set 1064# CONFIG_USB_MR800 is not set
1003# CONFIG_RADIO_TEA5764 is not set 1065# CONFIG_RADIO_TEA5764 is not set
1066# CONFIG_RADIO_SAA7706H is not set
1004# CONFIG_RADIO_TEF6862 is not set 1067# CONFIG_RADIO_TEF6862 is not set
1005# CONFIG_DAB is not set 1068# CONFIG_DAB is not set
1006 1069
@@ -1034,6 +1097,7 @@ CONFIG_FB_DEFERRED_IO=y
1034# 1097#
1035# CONFIG_FB_S1D13XXX is not set 1098# CONFIG_FB_S1D13XXX is not set
1036CONFIG_FB_SH_MOBILE_LCDC=y 1099CONFIG_FB_SH_MOBILE_LCDC=y
1100# CONFIG_FB_TMIO is not set
1037# CONFIG_FB_VIRTUAL is not set 1101# CONFIG_FB_VIRTUAL is not set
1038# CONFIG_FB_METRONOME is not set 1102# CONFIG_FB_METRONOME is not set
1039# CONFIG_FB_MB862XX is not set 1103# CONFIG_FB_MB862XX is not set
@@ -1062,7 +1126,46 @@ CONFIG_LOGO=y
1062# CONFIG_LOGO_SUPERH_MONO is not set 1126# CONFIG_LOGO_SUPERH_MONO is not set
1063# CONFIG_LOGO_SUPERH_VGA16 is not set 1127# CONFIG_LOGO_SUPERH_VGA16 is not set
1064CONFIG_LOGO_SUPERH_CLUT224=y 1128CONFIG_LOGO_SUPERH_CLUT224=y
1065# CONFIG_SOUND is not set 1129CONFIG_SOUND=y
1130CONFIG_SOUND_OSS_CORE=y
1131CONFIG_SOUND_OSS_CORE_PRECLAIM=y
1132CONFIG_SND=y
1133CONFIG_SND_TIMER=y
1134CONFIG_SND_PCM=y
1135CONFIG_SND_JACK=y
1136CONFIG_SND_SEQUENCER=y
1137CONFIG_SND_SEQ_DUMMY=y
1138CONFIG_SND_OSSEMUL=y
1139CONFIG_SND_MIXER_OSS=y
1140CONFIG_SND_PCM_OSS=y
1141CONFIG_SND_PCM_OSS_PLUGINS=y
1142# CONFIG_SND_SEQUENCER_OSS is not set
1143# CONFIG_SND_DYNAMIC_MINORS is not set
1144CONFIG_SND_SUPPORT_OLD_API=y
1145CONFIG_SND_VERBOSE_PROCFS=y
1146# CONFIG_SND_VERBOSE_PRINTK is not set
1147# CONFIG_SND_DEBUG is not set
1148# CONFIG_SND_RAWMIDI_SEQ is not set
1149# CONFIG_SND_OPL3_LIB_SEQ is not set
1150# CONFIG_SND_OPL4_LIB_SEQ is not set
1151# CONFIG_SND_SBAWE_SEQ is not set
1152# CONFIG_SND_EMU10K1_SEQ is not set
1153# CONFIG_SND_DRIVERS is not set
1154# CONFIG_SND_SPI is not set
1155CONFIG_SND_SUPERH=y
1156# CONFIG_SND_USB is not set
1157CONFIG_SND_SOC=y
1158
1159#
1160# SoC Audio support for SuperH
1161#
1162CONFIG_SND_SOC_SH4_FSI=y
1163# CONFIG_SND_FSI_AK4642 is not set
1164CONFIG_SND_FSI_DA7210=y
1165CONFIG_SND_SOC_I2C_AND_SPI=y
1166# CONFIG_SND_SOC_ALL_CODECS is not set
1167CONFIG_SND_SOC_DA7210=y
1168# CONFIG_SOUND_PRIME is not set
1066CONFIG_HID_SUPPORT=y 1169CONFIG_HID_SUPPORT=y
1067CONFIG_HID=y 1170CONFIG_HID=y
1068# CONFIG_HIDRAW is not set 1171# CONFIG_HIDRAW is not set
@@ -1077,6 +1180,7 @@ CONFIG_USB_HID=y
1077# 1180#
1078# Special HID drivers 1181# Special HID drivers
1079# 1182#
1183# CONFIG_HID_3M_PCT is not set
1080# CONFIG_HID_A4TECH is not set 1184# CONFIG_HID_A4TECH is not set
1081# CONFIG_HID_APPLE is not set 1185# CONFIG_HID_APPLE is not set
1082# CONFIG_HID_BELKIN is not set 1186# CONFIG_HID_BELKIN is not set
@@ -1091,12 +1195,16 @@ CONFIG_USB_HID=y
1091# CONFIG_HID_KENSINGTON is not set 1195# CONFIG_HID_KENSINGTON is not set
1092# CONFIG_HID_LOGITECH is not set 1196# CONFIG_HID_LOGITECH is not set
1093# CONFIG_HID_MICROSOFT is not set 1197# CONFIG_HID_MICROSOFT is not set
1198# CONFIG_HID_MOSART is not set
1094# CONFIG_HID_MONTEREY is not set 1199# CONFIG_HID_MONTEREY is not set
1095# CONFIG_HID_NTRIG is not set 1200# CONFIG_HID_NTRIG is not set
1201# CONFIG_HID_ORTEK is not set
1096# CONFIG_HID_PANTHERLORD is not set 1202# CONFIG_HID_PANTHERLORD is not set
1097# CONFIG_HID_PETALYNX is not set 1203# CONFIG_HID_PETALYNX is not set
1204# CONFIG_HID_QUANTA is not set
1098# CONFIG_HID_SAMSUNG is not set 1205# CONFIG_HID_SAMSUNG is not set
1099# CONFIG_HID_SONY is not set 1206# CONFIG_HID_SONY is not set
1207# CONFIG_HID_STANTUM is not set
1100# CONFIG_HID_SUNPLUS is not set 1208# CONFIG_HID_SUNPLUS is not set
1101# CONFIG_HID_GREENASIA is not set 1209# CONFIG_HID_GREENASIA is not set
1102# CONFIG_HID_SMARTJOYPLUS is not set 1210# CONFIG_HID_SMARTJOYPLUS is not set
@@ -1136,6 +1244,7 @@ CONFIG_USB_MON=y
1136# CONFIG_USB_SL811_HCD is not set 1244# CONFIG_USB_SL811_HCD is not set
1137CONFIG_USB_R8A66597_HCD=y 1245CONFIG_USB_R8A66597_HCD=y
1138# CONFIG_USB_HWA_HCD is not set 1246# CONFIG_USB_HWA_HCD is not set
1247# CONFIG_USB_GADGET_MUSB_HDRC is not set
1139 1248
1140# 1249#
1141# USB Device Class drivers 1250# USB Device Class drivers
@@ -1188,7 +1297,6 @@ CONFIG_USB_STORAGE=y
1188# CONFIG_USB_RIO500 is not set 1297# CONFIG_USB_RIO500 is not set
1189# CONFIG_USB_LEGOTOWER is not set 1298# CONFIG_USB_LEGOTOWER is not set
1190# CONFIG_USB_LCD is not set 1299# CONFIG_USB_LCD is not set
1191# CONFIG_USB_BERRY_CHARGE is not set
1192# CONFIG_USB_LED is not set 1300# CONFIG_USB_LED is not set
1193# CONFIG_USB_CYPRESS_CY7C63 is not set 1301# CONFIG_USB_CYPRESS_CY7C63 is not set
1194# CONFIG_USB_CYTHERM is not set 1302# CONFIG_USB_CYTHERM is not set
@@ -1200,8 +1308,45 @@ CONFIG_USB_STORAGE=y
1200# CONFIG_USB_IOWARRIOR is not set 1308# CONFIG_USB_IOWARRIOR is not set
1201# CONFIG_USB_TEST is not set 1309# CONFIG_USB_TEST is not set
1202# CONFIG_USB_ISIGHTFW is not set 1310# CONFIG_USB_ISIGHTFW is not set
1203# CONFIG_USB_VST is not set 1311CONFIG_USB_GADGET=y
1204# CONFIG_USB_GADGET is not set 1312# CONFIG_USB_GADGET_DEBUG_FILES is not set
1313# CONFIG_USB_GADGET_DEBUG_FS is not set
1314CONFIG_USB_GADGET_VBUS_DRAW=2
1315CONFIG_USB_GADGET_SELECTED=y
1316# CONFIG_USB_GADGET_AT91 is not set
1317# CONFIG_USB_GADGET_ATMEL_USBA is not set
1318# CONFIG_USB_GADGET_FSL_USB2 is not set
1319# CONFIG_USB_GADGET_LH7A40X is not set
1320# CONFIG_USB_GADGET_OMAP is not set
1321# CONFIG_USB_GADGET_PXA25X is not set
1322CONFIG_USB_GADGET_R8A66597=y
1323CONFIG_USB_R8A66597=y
1324# CONFIG_USB_GADGET_PXA27X is not set
1325# CONFIG_USB_GADGET_S3C_HSOTG is not set
1326# CONFIG_USB_GADGET_IMX is not set
1327# CONFIG_USB_GADGET_S3C2410 is not set
1328# CONFIG_USB_GADGET_M66592 is not set
1329# CONFIG_USB_GADGET_AMD5536UDC is not set
1330# CONFIG_USB_GADGET_FSL_QE is not set
1331# CONFIG_USB_GADGET_CI13XXX is not set
1332# CONFIG_USB_GADGET_NET2280 is not set
1333# CONFIG_USB_GADGET_GOKU is not set
1334# CONFIG_USB_GADGET_LANGWELL is not set
1335# CONFIG_USB_GADGET_DUMMY_HCD is not set
1336CONFIG_USB_GADGET_DUALSPEED=y
1337# CONFIG_USB_ZERO is not set
1338# CONFIG_USB_AUDIO is not set
1339# CONFIG_USB_ETH is not set
1340# CONFIG_USB_GADGETFS is not set
1341CONFIG_USB_FILE_STORAGE=m
1342# CONFIG_USB_FILE_STORAGE_TEST is not set
1343# CONFIG_USB_MASS_STORAGE is not set
1344# CONFIG_USB_G_SERIAL is not set
1345# CONFIG_USB_MIDI_GADGET is not set
1346# CONFIG_USB_G_PRINTER is not set
1347# CONFIG_USB_CDC_COMPOSITE is not set
1348# CONFIG_USB_G_NOKIA is not set
1349# CONFIG_USB_G_MULTI is not set
1205 1350
1206# 1351#
1207# OTG and related infrastructure 1352# OTG and related infrastructure
@@ -1224,10 +1369,8 @@ CONFIG_MMC_BLOCK_BOUNCE=y
1224# MMC/SD/SDIO Host Controller Drivers 1369# MMC/SD/SDIO Host Controller Drivers
1225# 1370#
1226# CONFIG_MMC_SDHCI is not set 1371# CONFIG_MMC_SDHCI is not set
1227# CONFIG_MMC_AT91 is not set
1228# CONFIG_MMC_ATMELMCI is not set
1229CONFIG_MMC_SPI=y 1372CONFIG_MMC_SPI=y
1230# CONFIG_MMC_TMIO is not set 1373CONFIG_MMC_TMIO=y
1231# CONFIG_MEMSTICK is not set 1374# CONFIG_MEMSTICK is not set
1232# CONFIG_NEW_LEDS is not set 1375# CONFIG_NEW_LEDS is not set
1233# CONFIG_ACCESSIBILITY is not set 1376# CONFIG_ACCESSIBILITY is not set
@@ -1253,10 +1396,10 @@ CONFIG_RTC_INTF_DEV=y
1253# CONFIG_RTC_DRV_DS1374 is not set 1396# CONFIG_RTC_DRV_DS1374 is not set
1254# CONFIG_RTC_DRV_DS1672 is not set 1397# CONFIG_RTC_DRV_DS1672 is not set
1255# CONFIG_RTC_DRV_MAX6900 is not set 1398# CONFIG_RTC_DRV_MAX6900 is not set
1256# CONFIG_RTC_DRV_RS5C372 is not set 1399CONFIG_RTC_DRV_RS5C372=y
1257# CONFIG_RTC_DRV_ISL1208 is not set 1400# CONFIG_RTC_DRV_ISL1208 is not set
1258# CONFIG_RTC_DRV_X1205 is not set 1401# CONFIG_RTC_DRV_X1205 is not set
1259CONFIG_RTC_DRV_PCF8563=y 1402# CONFIG_RTC_DRV_PCF8563 is not set
1260# CONFIG_RTC_DRV_PCF8583 is not set 1403# CONFIG_RTC_DRV_PCF8583 is not set
1261# CONFIG_RTC_DRV_M41T80 is not set 1404# CONFIG_RTC_DRV_M41T80 is not set
1262# CONFIG_RTC_DRV_BQ32K is not set 1405# CONFIG_RTC_DRV_BQ32K is not set
@@ -1303,8 +1446,6 @@ CONFIG_RTC_DRV_PCF8563=y
1303CONFIG_UIO=y 1446CONFIG_UIO=y
1304# CONFIG_UIO_PDRV is not set 1447# CONFIG_UIO_PDRV is not set
1305CONFIG_UIO_PDRV_GENIRQ=y 1448CONFIG_UIO_PDRV_GENIRQ=y
1306# CONFIG_UIO_SMX is not set
1307# CONFIG_UIO_SERCOS3 is not set
1308 1449
1309# 1450#
1310# TI VLYNQ 1451# TI VLYNQ
@@ -1390,6 +1531,7 @@ CONFIG_MISC_FILESYSTEMS=y
1390# CONFIG_EFS_FS is not set 1531# CONFIG_EFS_FS is not set
1391# CONFIG_JFFS2_FS is not set 1532# CONFIG_JFFS2_FS is not set
1392# CONFIG_UBIFS_FS is not set 1533# CONFIG_UBIFS_FS is not set
1534# CONFIG_LOGFS is not set
1393# CONFIG_CRAMFS is not set 1535# CONFIG_CRAMFS is not set
1394# CONFIG_SQUASHFS is not set 1536# CONFIG_SQUASHFS is not set
1395# CONFIG_VXFS_FS is not set 1537# CONFIG_VXFS_FS is not set
@@ -1418,6 +1560,7 @@ CONFIG_SUNRPC=y
1418# CONFIG_RPCSEC_GSS_KRB5 is not set 1560# CONFIG_RPCSEC_GSS_KRB5 is not set
1419# CONFIG_RPCSEC_GSS_SPKM3 is not set 1561# CONFIG_RPCSEC_GSS_SPKM3 is not set
1420# CONFIG_SMB_FS is not set 1562# CONFIG_SMB_FS is not set
1563# CONFIG_CEPH_FS is not set
1421# CONFIG_CIFS is not set 1564# CONFIG_CIFS is not set
1422# CONFIG_NCP_FS is not set 1565# CONFIG_NCP_FS is not set
1423# CONFIG_CODA_FS is not set 1566# CONFIG_CODA_FS is not set
@@ -1487,6 +1630,7 @@ CONFIG_DEBUG_FS=y
1487CONFIG_DEBUG_BUGVERBOSE=y 1630CONFIG_DEBUG_BUGVERBOSE=y
1488# CONFIG_DEBUG_MEMORY_INIT is not set 1631# CONFIG_DEBUG_MEMORY_INIT is not set
1489# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1632# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1633# CONFIG_LKDTM is not set
1490# CONFIG_LATENCYTOP is not set 1634# CONFIG_LATENCYTOP is not set
1491CONFIG_SYSCTL_SYSCALL_CHECK=y 1635CONFIG_SYSCTL_SYSCALL_CHECK=y
1492CONFIG_HAVE_FUNCTION_TRACER=y 1636CONFIG_HAVE_FUNCTION_TRACER=y
@@ -1618,7 +1762,7 @@ CONFIG_CRYPTO_HW=y
1618# 1762#
1619CONFIG_BITREVERSE=y 1763CONFIG_BITREVERSE=y
1620CONFIG_GENERIC_FIND_LAST_BIT=y 1764CONFIG_GENERIC_FIND_LAST_BIT=y
1621# CONFIG_CRC_CCITT is not set 1765CONFIG_CRC_CCITT=y
1622# CONFIG_CRC16 is not set 1766# CONFIG_CRC16 is not set
1623CONFIG_CRC_T10DIF=y 1767CONFIG_CRC_T10DIF=y
1624CONFIG_CRC_ITU_T=y 1768CONFIG_CRC_ITU_T=y
diff --git a/arch/sh/include/asm/clkdev.h b/arch/sh/include/asm/clkdev.h
new file mode 100644
index 000000000000..5645f358128b
--- /dev/null
+++ b/arch/sh/include/asm/clkdev.h
@@ -0,0 +1,35 @@
1/*
2 * arch/sh/include/asm/clkdev.h
3 *
4 * Cloned from arch/arm/include/asm/clkdev.h:
5 *
6 * Copyright (C) 2008 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Helper for the clk API to assist looking up a struct clk.
13 */
14#ifndef __ASM_CLKDEV_H
15#define __ASM_CLKDEV_H
16
17struct clk;
18
19struct clk_lookup {
20 struct list_head node;
21 const char *dev_id;
22 const char *con_id;
23 struct clk *clk;
24};
25
26struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
27 const char *dev_fmt, ...);
28
29void clkdev_add(struct clk_lookup *cl);
30void clkdev_drop(struct clk_lookup *cl);
31
32void clkdev_add_table(struct clk_lookup *, size_t);
33int clk_add_alias(const char *, const char *, char *, struct device *);
34
35#endif
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 11da4c5beb68..4b19179230fe 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -45,13 +45,6 @@ struct clk {
45 struct cpufreq_frequency_table *freq_table; 45 struct cpufreq_frequency_table *freq_table;
46}; 46};
47 47
48struct clk_lookup {
49 struct list_head node;
50 const char *dev_id;
51 const char *con_id;
52 struct clk *clk;
53};
54
55#define CLK_ENABLE_ON_INIT (1 << 0) 48#define CLK_ENABLE_ON_INIT (1 << 0)
56 49
57/* Should be defined by processor-specific code */ 50/* Should be defined by processor-specific code */
diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
index bf2f30cf0a27..2a02b611a9ad 100644
--- a/arch/sh/include/asm/dmaengine.h
+++ b/arch/sh/include/asm/dmaengine.h
@@ -10,14 +10,9 @@
10#ifndef ASM_DMAENGINE_H 10#ifndef ASM_DMAENGINE_H
11#define ASM_DMAENGINE_H 11#define ASM_DMAENGINE_H
12 12
13#include <linux/dmaengine.h> 13#include <linux/sh_dma.h>
14#include <linux/list.h>
15 14
16#include <asm/dma-register.h> 15enum {
17
18#define SH_DMAC_MAX_CHANNELS 6
19
20enum sh_dmae_slave_chan_id {
21 SHDMA_SLAVE_SCIF0_TX, 16 SHDMA_SLAVE_SCIF0_TX,
22 SHDMA_SLAVE_SCIF0_RX, 17 SHDMA_SLAVE_SCIF0_RX,
23 SHDMA_SLAVE_SCIF1_TX, 18 SHDMA_SLAVE_SCIF1_TX,
@@ -34,60 +29,6 @@ enum sh_dmae_slave_chan_id {
34 SHDMA_SLAVE_SIUA_RX, 29 SHDMA_SLAVE_SIUA_RX,
35 SHDMA_SLAVE_SIUB_TX, 30 SHDMA_SLAVE_SIUB_TX,
36 SHDMA_SLAVE_SIUB_RX, 31 SHDMA_SLAVE_SIUB_RX,
37 SHDMA_SLAVE_NUMBER, /* Must stay last */
38};
39
40struct sh_dmae_slave_config {
41 enum sh_dmae_slave_chan_id slave_id;
42 dma_addr_t addr;
43 u32 chcr;
44 char mid_rid;
45};
46
47struct sh_dmae_channel {
48 unsigned int offset;
49 unsigned int dmars;
50 unsigned int dmars_bit;
51};
52
53struct sh_dmae_pdata {
54 struct sh_dmae_slave_config *slave;
55 int slave_num;
56 struct sh_dmae_channel *channel;
57 int channel_num;
58 unsigned int ts_low_shift;
59 unsigned int ts_low_mask;
60 unsigned int ts_high_shift;
61 unsigned int ts_high_mask;
62 unsigned int *ts_shift;
63 int ts_shift_num;
64 u16 dmaor_init;
65};
66
67struct device;
68
69/* Used by slave DMA clients to request DMA to/from a specific peripheral */
70struct sh_dmae_slave {
71 enum sh_dmae_slave_chan_id slave_id; /* Set by the platform */
72 struct device *dma_dev; /* Set by the platform */
73 struct sh_dmae_slave_config *config; /* Set by the driver */
74};
75
76struct sh_dmae_regs {
77 u32 sar; /* SAR / source address */
78 u32 dar; /* DAR / destination address */
79 u32 tcr; /* TCR / transfer count */
80};
81
82struct sh_desc {
83 struct sh_dmae_regs hw;
84 struct list_head node;
85 struct dma_async_tx_descriptor async_tx;
86 enum dma_data_direction direction;
87 dma_cookie_t cookie;
88 size_t partial;
89 int chunks;
90 int mark;
91}; 32};
92 33
93#endif 34#endif
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index ac04255022b6..ce830faeebbf 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -211,7 +211,9 @@ extern void __kernel_vsyscall;
211 211
212#define VSYSCALL_AUX_ENT \ 212#define VSYSCALL_AUX_ENT \
213 if (vdso_enabled) \ 213 if (vdso_enabled) \
214 NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); 214 NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \
215 else \
216 NEW_AUX_ENT(AT_IGNORE, 0);
215#else 217#else
216#define VSYSCALL_AUX_ENT 218#define VSYSCALL_AUX_ENT
217#endif /* CONFIG_VSYSCALL */ 219#endif /* CONFIG_VSYSCALL */
@@ -219,7 +221,7 @@ extern void __kernel_vsyscall;
219#ifdef CONFIG_SH_FPU 221#ifdef CONFIG_SH_FPU
220#define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT) 222#define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT)
221#else 223#else
222#define FPU_AUX_ENT 224#define FPU_AUX_ENT NEW_AUX_ENT(AT_IGNORE, 0)
223#endif 225#endif
224 226
225extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; 227extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
diff --git a/arch/sh/include/asm/mmu.h b/arch/sh/include/asm/mmu.h
index 19fe84550b49..56e4418c19b9 100644
--- a/arch/sh/include/asm/mmu.h
+++ b/arch/sh/include/asm/mmu.h
@@ -66,6 +66,13 @@ int pmb_unmap(void __iomem *addr);
66 66
67#else 67#else
68 68
69static inline int
70pmb_bolt_mapping(unsigned long virt, phys_addr_t phys,
71 unsigned long size, pgprot_t prot)
72{
73 return -EINVAL;
74}
75
69static inline void __iomem * 76static inline void __iomem *
70pmb_remap_caller(phys_addr_t phys, unsigned long size, 77pmb_remap_caller(phys_addr_t phys, unsigned long size,
71 pgprot_t prot, void *caller) 78 pgprot_t prot, void *caller)
diff --git a/arch/sh/include/asm/siu.h b/arch/sh/include/asm/siu.h
index f1b1e6944a5f..e8d4142baf59 100644
--- a/arch/sh/include/asm/siu.h
+++ b/arch/sh/include/asm/siu.h
@@ -17,10 +17,10 @@ struct device;
17 17
18struct siu_platform { 18struct siu_platform {
19 struct device *dma_dev; 19 struct device *dma_dev;
20 enum sh_dmae_slave_chan_id dma_slave_tx_a; 20 unsigned int dma_slave_tx_a;
21 enum sh_dmae_slave_chan_id dma_slave_rx_a; 21 unsigned int dma_slave_rx_a;
22 enum sh_dmae_slave_chan_id dma_slave_tx_b; 22 unsigned int dma_slave_tx_b;
23 enum sh_dmae_slave_chan_id dma_slave_rx_b; 23 unsigned int dma_slave_rx_b;
24}; 24};
25 25
26#endif /* ASM_SIU_H */ 26#endif /* ASM_SIU_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 03ea75c5315d..2941be617a5f 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -19,8 +19,17 @@
19 19
20#define MMUCR 0xFF000010 /* MMU Control Register */ 20#define MMUCR 0xFF000010 /* MMU Control Register */
21 21
22#define MMU_TLB_ENTRY_SHIFT 8
23
24#define MMU_ITLB_ADDRESS_ARRAY 0xF2000000
25#define MMU_ITLB_ADDRESS_ARRAY2 0xF2800000
26#define MMU_ITLB_DATA_ARRAY 0xF3000000
27#define MMU_ITLB_DATA_ARRAY2 0xF3800000
28
22#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 29#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000
23#define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000 30#define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000
31#define MMU_UTLB_DATA_ARRAY 0xF7000000
32#define MMU_UTLB_DATA_ARRAY2 0xF7800000
24#define MMU_PAGE_ASSOC_BIT 0x80 33#define MMU_PAGE_ASSOC_BIT 0x80
25 34
26#define MMUCR_TI (1<<2) 35#define MMUCR_TI (1<<2)
@@ -28,6 +37,8 @@
28#define MMUCR_URB 0x00FC0000 37#define MMUCR_URB 0x00FC0000
29#define MMUCR_URB_SHIFT 18 38#define MMUCR_URB_SHIFT 18
30#define MMUCR_URB_NENTRIES 64 39#define MMUCR_URB_NENTRIES 64
40#define MMUCR_URC 0x0000FC00
41#define MMUCR_URC_SHIFT 10
31 42
32#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) 43#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
33#define MMUCR_SE (1 << 4) 44#define MMUCR_SE (1 << 4)
diff --git a/arch/sh/include/cpu-sh4/cpu/watchdog.h b/arch/sh/include/cpu-sh4/cpu/watchdog.h
index 7672301d0c70..7f62b9380938 100644
--- a/arch/sh/include/cpu-sh4/cpu/watchdog.h
+++ b/arch/sh/include/cpu-sh4/cpu/watchdog.h
@@ -21,6 +21,12 @@
21#define WTCNT 0xffcc0000 /*WDTST*/ 21#define WTCNT 0xffcc0000 /*WDTST*/
22#define WTST WTCNT 22#define WTST WTCNT
23#define WTBST 0xffcc0008 /*WDTBST*/ 23#define WTBST 0xffcc0008 /*WDTBST*/
24/* Register definitions */
25#elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \
26 defined(CONFIG_CPU_SUBTYPE_SH7723) || \
27 defined(CONFIG_CPU_SUBTYPE_SH7724)
28#define WTCNT 0xa4520000
29#define WTCSR 0xa4520004
24#else 30#else
25/* Register definitions */ 31/* Register definitions */
26#define WTCNT 0xffc00008 32#define WTCNT 0xffc00008
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 02fd3ae8b0ee..650b92f00ee5 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -11,7 +11,7 @@ endif
11 11
12CFLAGS_REMOVE_return_address.o = -pg 12CFLAGS_REMOVE_return_address.o = -pg
13 13
14obj-y := debugtraps.o dma-nommu.o dumpstack.o \ 14obj-y := clkdev.o debugtraps.o dma-nommu.o dumpstack.o \
15 idle.o io.o io_generic.o irq.o \ 15 idle.o io.o io_generic.o irq.o \
16 irq_$(BITS).o machvec.o nmi_debug.o process.o \ 16 irq_$(BITS).o machvec.o nmi_debug.o process.o \
17 process_$(BITS).o ptrace_$(BITS).o \ 17 process_$(BITS).o ptrace_$(BITS).o \
diff --git a/arch/sh/kernel/clkdev.c b/arch/sh/kernel/clkdev.c
new file mode 100644
index 000000000000..defdd6e30908
--- /dev/null
+++ b/arch/sh/kernel/clkdev.c
@@ -0,0 +1,169 @@
1/*
2 * arch/sh/kernel/clkdev.c
3 *
4 * Cloned from arch/arm/common/clkdev.c:
5 *
6 * Copyright (C) 2008 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Helper for the clk API to assist looking up a struct clk.
13 */
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/device.h>
17#include <linux/list.h>
18#include <linux/errno.h>
19#include <linux/err.h>
20#include <linux/string.h>
21#include <linux/mutex.h>
22#include <linux/clk.h>
23#include <linux/slab.h>
24#include <linux/bootmem.h>
25#include <linux/mm.h>
26#include <asm/clock.h>
27#include <asm/clkdev.h>
28
29static LIST_HEAD(clocks);
30static DEFINE_MUTEX(clocks_mutex);
31
32/*
33 * Find the correct struct clk for the device and connection ID.
34 * We do slightly fuzzy matching here:
35 * An entry with a NULL ID is assumed to be a wildcard.
36 * If an entry has a device ID, it must match
37 * If an entry has a connection ID, it must match
38 * Then we take the most specific entry - with the following
39 * order of precidence: dev+con > dev only > con only.
40 */
41static struct clk *clk_find(const char *dev_id, const char *con_id)
42{
43 struct clk_lookup *p;
44 struct clk *clk = NULL;
45 int match, best = 0;
46
47 list_for_each_entry(p, &clocks, node) {
48 match = 0;
49 if (p->dev_id) {
50 if (!dev_id || strcmp(p->dev_id, dev_id))
51 continue;
52 match += 2;
53 }
54 if (p->con_id) {
55 if (!con_id || strcmp(p->con_id, con_id))
56 continue;
57 match += 1;
58 }
59 if (match == 0)
60 continue;
61
62 if (match > best) {
63 clk = p->clk;
64 best = match;
65 }
66 }
67 return clk;
68}
69
70struct clk *clk_get_sys(const char *dev_id, const char *con_id)
71{
72 struct clk *clk;
73
74 mutex_lock(&clocks_mutex);
75 clk = clk_find(dev_id, con_id);
76 mutex_unlock(&clocks_mutex);
77
78 return clk ? clk : ERR_PTR(-ENOENT);
79}
80EXPORT_SYMBOL(clk_get_sys);
81
82void clkdev_add(struct clk_lookup *cl)
83{
84 mutex_lock(&clocks_mutex);
85 list_add_tail(&cl->node, &clocks);
86 mutex_unlock(&clocks_mutex);
87}
88EXPORT_SYMBOL(clkdev_add);
89
90void __init clkdev_add_table(struct clk_lookup *cl, size_t num)
91{
92 mutex_lock(&clocks_mutex);
93 while (num--) {
94 list_add_tail(&cl->node, &clocks);
95 cl++;
96 }
97 mutex_unlock(&clocks_mutex);
98}
99
100#define MAX_DEV_ID 20
101#define MAX_CON_ID 16
102
103struct clk_lookup_alloc {
104 struct clk_lookup cl;
105 char dev_id[MAX_DEV_ID];
106 char con_id[MAX_CON_ID];
107};
108
109struct clk_lookup * __init_refok
110clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...)
111{
112 struct clk_lookup_alloc *cla;
113
114 if (!slab_is_available())
115 cla = alloc_bootmem_low_pages(sizeof(*cla));
116 else
117 cla = kzalloc(sizeof(*cla), GFP_KERNEL);
118
119 if (!cla)
120 return NULL;
121
122 cla->cl.clk = clk;
123 if (con_id) {
124 strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
125 cla->cl.con_id = cla->con_id;
126 }
127
128 if (dev_fmt) {
129 va_list ap;
130
131 va_start(ap, dev_fmt);
132 vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
133 cla->cl.dev_id = cla->dev_id;
134 va_end(ap);
135 }
136
137 return &cla->cl;
138}
139EXPORT_SYMBOL(clkdev_alloc);
140
141int clk_add_alias(const char *alias, const char *alias_dev_name, char *id,
142 struct device *dev)
143{
144 struct clk *r = clk_get(dev, id);
145 struct clk_lookup *l;
146
147 if (IS_ERR(r))
148 return PTR_ERR(r);
149
150 l = clkdev_alloc(r, alias, alias_dev_name);
151 clk_put(r);
152 if (!l)
153 return -ENODEV;
154 clkdev_add(l);
155 return 0;
156}
157EXPORT_SYMBOL(clk_add_alias);
158
159/*
160 * clkdev_drop - remove a clock dynamically allocated
161 */
162void clkdev_drop(struct clk_lookup *cl)
163{
164 mutex_lock(&clocks_mutex);
165 list_del(&cl->node);
166 mutex_unlock(&clocks_mutex);
167 kfree(cl);
168}
169EXPORT_SYMBOL(clkdev_drop);
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index eed5eaff96ba..17a73ad7a20d 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -338,6 +338,11 @@ int __init __deprecated cpg_clk_init(void)
338 ret |= clk_register(clk); 338 ret |= clk_register(clk);
339 } 339 }
340 340
341 clk_add_alias("tmu_fck", NULL, "peripheral_clk", NULL);
342 clk_add_alias("mtu2_fck", NULL, "peripheral_clk", NULL);
343 clk_add_alias("cmt_fck", NULL, "peripheral_clk", NULL);
344 clk_add_alias("sci_ick", NULL, "peripheral_clk", NULL);
345
341 return ret; 346 return ret;
342} 347}
343 348
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index e9fa1bfed53e..9ded1bc29260 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -10,10 +10,6 @@
10 * 10 *
11 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> 11 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
12 * 12 *
13 * With clkdev bits:
14 *
15 * Copyright (C) 2008 Russell King.
16 *
17 * This file is subject to the terms and conditions of the GNU General Public 13 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive 14 * License. See the file "COPYING" in the main directory of this archive
19 * for more details. 15 * for more details.
@@ -30,6 +26,7 @@
30#include <linux/platform_device.h> 26#include <linux/platform_device.h>
31#include <linux/debugfs.h> 27#include <linux/debugfs.h>
32#include <linux/cpufreq.h> 28#include <linux/cpufreq.h>
29#include <linux/clk.h>
33#include <asm/clock.h> 30#include <asm/clock.h>
34#include <asm/machvec.h> 31#include <asm/machvec.h>
35 32
@@ -398,56 +395,6 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
398EXPORT_SYMBOL_GPL(clk_round_rate); 395EXPORT_SYMBOL_GPL(clk_round_rate);
399 396
400/* 397/*
401 * Find the correct struct clk for the device and connection ID.
402 * We do slightly fuzzy matching here:
403 * An entry with a NULL ID is assumed to be a wildcard.
404 * If an entry has a device ID, it must match
405 * If an entry has a connection ID, it must match
406 * Then we take the most specific entry - with the following
407 * order of precedence: dev+con > dev only > con only.
408 */
409static struct clk *clk_find(const char *dev_id, const char *con_id)
410{
411 struct clk_lookup *p;
412 struct clk *clk = NULL;
413 int match, best = 0;
414
415 list_for_each_entry(p, &clock_list, node) {
416 match = 0;
417 if (p->dev_id) {
418 if (!dev_id || strcmp(p->dev_id, dev_id))
419 continue;
420 match += 2;
421 }
422 if (p->con_id) {
423 if (!con_id || strcmp(p->con_id, con_id))
424 continue;
425 match += 1;
426 }
427 if (match == 0)
428 continue;
429
430 if (match > best) {
431 clk = p->clk;
432 best = match;
433 }
434 }
435 return clk;
436}
437
438struct clk *clk_get_sys(const char *dev_id, const char *con_id)
439{
440 struct clk *clk;
441
442 mutex_lock(&clock_list_sem);
443 clk = clk_find(dev_id, con_id);
444 mutex_unlock(&clock_list_sem);
445
446 return clk ? clk : ERR_PTR(-ENOENT);
447}
448EXPORT_SYMBOL_GPL(clk_get_sys);
449
450/*
451 * Returns a clock. Note that we first try to use device id on the bus 398 * Returns a clock. Note that we first try to use device id on the bus
452 * and clock name. If this fails, we try to use clock name only. 399 * and clock name. If this fails, we try to use clock name only.
453 */ 400 */
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 114c7cee7184..c3638516bffc 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -128,17 +128,14 @@ static struct platform_device eth_device = {
128}; 128};
129 129
130static struct sh_timer_config cmt0_platform_data = { 130static struct sh_timer_config cmt0_platform_data = {
131 .name = "CMT0",
132 .channel_offset = 0x02, 131 .channel_offset = 0x02,
133 .timer_bit = 0, 132 .timer_bit = 0,
134 .clk = "peripheral_clk",
135 .clockevent_rating = 125, 133 .clockevent_rating = 125,
136 .clocksource_rating = 0, /* disabled due to code generation issues */ 134 .clocksource_rating = 0, /* disabled due to code generation issues */
137}; 135};
138 136
139static struct resource cmt0_resources[] = { 137static struct resource cmt0_resources[] = {
140 [0] = { 138 [0] = {
141 .name = "CMT0",
142 .start = 0xf84a0072, 139 .start = 0xf84a0072,
143 .end = 0xf84a0077, 140 .end = 0xf84a0077,
144 .flags = IORESOURCE_MEM, 141 .flags = IORESOURCE_MEM,
@@ -160,17 +157,14 @@ static struct platform_device cmt0_device = {
160}; 157};
161 158
162static struct sh_timer_config cmt1_platform_data = { 159static struct sh_timer_config cmt1_platform_data = {
163 .name = "CMT1",
164 .channel_offset = 0x08, 160 .channel_offset = 0x08,
165 .timer_bit = 1, 161 .timer_bit = 1,
166 .clk = "peripheral_clk",
167 .clockevent_rating = 125, 162 .clockevent_rating = 125,
168 .clocksource_rating = 0, /* disabled due to code generation issues */ 163 .clocksource_rating = 0, /* disabled due to code generation issues */
169}; 164};
170 165
171static struct resource cmt1_resources[] = { 166static struct resource cmt1_resources[] = {
172 [0] = { 167 [0] = {
173 .name = "CMT1",
174 .start = 0xf84a0078, 168 .start = 0xf84a0078,
175 .end = 0xf84a007d, 169 .end = 0xf84a007d,
176 .flags = IORESOURCE_MEM, 170 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index 8f669dc9b0da..6c96ea02bf8d 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -115,16 +115,13 @@ static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
115 mask_registers, prio_registers, NULL); 115 mask_registers, prio_registers, NULL);
116 116
117static struct sh_timer_config mtu2_0_platform_data = { 117static struct sh_timer_config mtu2_0_platform_data = {
118 .name = "MTU2_0",
119 .channel_offset = -0x80, 118 .channel_offset = -0x80,
120 .timer_bit = 0, 119 .timer_bit = 0,
121 .clk = "peripheral_clk",
122 .clockevent_rating = 200, 120 .clockevent_rating = 200,
123}; 121};
124 122
125static struct resource mtu2_0_resources[] = { 123static struct resource mtu2_0_resources[] = {
126 [0] = { 124 [0] = {
127 .name = "MTU2_0",
128 .start = 0xff801300, 125 .start = 0xff801300,
129 .end = 0xff801326, 126 .end = 0xff801326,
130 .flags = IORESOURCE_MEM, 127 .flags = IORESOURCE_MEM,
@@ -146,16 +143,13 @@ static struct platform_device mtu2_0_device = {
146}; 143};
147 144
148static struct sh_timer_config mtu2_1_platform_data = { 145static struct sh_timer_config mtu2_1_platform_data = {
149 .name = "MTU2_1",
150 .channel_offset = -0x100, 146 .channel_offset = -0x100,
151 .timer_bit = 1, 147 .timer_bit = 1,
152 .clk = "peripheral_clk",
153 .clockevent_rating = 200, 148 .clockevent_rating = 200,
154}; 149};
155 150
156static struct resource mtu2_1_resources[] = { 151static struct resource mtu2_1_resources[] = {
157 [0] = { 152 [0] = {
158 .name = "MTU2_1",
159 .start = 0xff801380, 153 .start = 0xff801380,
160 .end = 0xff801390, 154 .end = 0xff801390,
161 .flags = IORESOURCE_MEM, 155 .flags = IORESOURCE_MEM,
@@ -177,16 +171,13 @@ static struct platform_device mtu2_1_device = {
177}; 171};
178 172
179static struct sh_timer_config mtu2_2_platform_data = { 173static struct sh_timer_config mtu2_2_platform_data = {
180 .name = "MTU2_2",
181 .channel_offset = 0x80, 174 .channel_offset = 0x80,
182 .timer_bit = 2, 175 .timer_bit = 2,
183 .clk = "peripheral_clk",
184 .clockevent_rating = 200, 176 .clockevent_rating = 200,
185}; 177};
186 178
187static struct resource mtu2_2_resources[] = { 179static struct resource mtu2_2_resources[] = {
188 [0] = { 180 [0] = {
189 .name = "MTU2_2",
190 .start = 0xff801000, 181 .start = 0xff801000,
191 .end = 0xff80100a, 182 .end = 0xff80100a,
192 .flags = IORESOURCE_MEM, 183 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index 4ccfeb59eb1a..d08bf4c07d60 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -318,16 +318,13 @@ static struct platform_device rtc_device = {
318}; 318};
319 319
320static struct sh_timer_config mtu2_0_platform_data = { 320static struct sh_timer_config mtu2_0_platform_data = {
321 .name = "MTU2_0",
322 .channel_offset = -0x80, 321 .channel_offset = -0x80,
323 .timer_bit = 0, 322 .timer_bit = 0,
324 .clk = "peripheral_clk",
325 .clockevent_rating = 200, 323 .clockevent_rating = 200,
326}; 324};
327 325
328static struct resource mtu2_0_resources[] = { 326static struct resource mtu2_0_resources[] = {
329 [0] = { 327 [0] = {
330 .name = "MTU2_0",
331 .start = 0xfffe4300, 328 .start = 0xfffe4300,
332 .end = 0xfffe4326, 329 .end = 0xfffe4326,
333 .flags = IORESOURCE_MEM, 330 .flags = IORESOURCE_MEM,
@@ -349,16 +346,13 @@ static struct platform_device mtu2_0_device = {
349}; 346};
350 347
351static struct sh_timer_config mtu2_1_platform_data = { 348static struct sh_timer_config mtu2_1_platform_data = {
352 .name = "MTU2_1",
353 .channel_offset = -0x100, 349 .channel_offset = -0x100,
354 .timer_bit = 1, 350 .timer_bit = 1,
355 .clk = "peripheral_clk",
356 .clockevent_rating = 200, 351 .clockevent_rating = 200,
357}; 352};
358 353
359static struct resource mtu2_1_resources[] = { 354static struct resource mtu2_1_resources[] = {
360 [0] = { 355 [0] = {
361 .name = "MTU2_1",
362 .start = 0xfffe4380, 356 .start = 0xfffe4380,
363 .end = 0xfffe4390, 357 .end = 0xfffe4390,
364 .flags = IORESOURCE_MEM, 358 .flags = IORESOURCE_MEM,
@@ -380,16 +374,13 @@ static struct platform_device mtu2_1_device = {
380}; 374};
381 375
382static struct sh_timer_config mtu2_2_platform_data = { 376static struct sh_timer_config mtu2_2_platform_data = {
383 .name = "MTU2_2",
384 .channel_offset = 0x80, 377 .channel_offset = 0x80,
385 .timer_bit = 2, 378 .timer_bit = 2,
386 .clk = "peripheral_clk",
387 .clockevent_rating = 200, 379 .clockevent_rating = 200,
388}; 380};
389 381
390static struct resource mtu2_2_resources[] = { 382static struct resource mtu2_2_resources[] = {
391 [0] = { 383 [0] = {
392 .name = "MTU2_2",
393 .start = 0xfffe4000, 384 .start = 0xfffe4000,
394 .end = 0xfffe400a, 385 .end = 0xfffe400a,
395 .flags = IORESOURCE_MEM, 386 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index 3136966cc9b3..832f401b5860 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -234,17 +234,14 @@ static struct platform_device scif3_device = {
234}; 234};
235 235
236static struct sh_timer_config cmt0_platform_data = { 236static struct sh_timer_config cmt0_platform_data = {
237 .name = "CMT0",
238 .channel_offset = 0x02, 237 .channel_offset = 0x02,
239 .timer_bit = 0, 238 .timer_bit = 0,
240 .clk = "peripheral_clk",
241 .clockevent_rating = 125, 239 .clockevent_rating = 125,
242 .clocksource_rating = 0, /* disabled due to code generation issues */ 240 .clocksource_rating = 0, /* disabled due to code generation issues */
243}; 241};
244 242
245static struct resource cmt0_resources[] = { 243static struct resource cmt0_resources[] = {
246 [0] = { 244 [0] = {
247 .name = "CMT0",
248 .start = 0xfffec002, 245 .start = 0xfffec002,
249 .end = 0xfffec007, 246 .end = 0xfffec007,
250 .flags = IORESOURCE_MEM, 247 .flags = IORESOURCE_MEM,
@@ -266,17 +263,14 @@ static struct platform_device cmt0_device = {
266}; 263};
267 264
268static struct sh_timer_config cmt1_platform_data = { 265static struct sh_timer_config cmt1_platform_data = {
269 .name = "CMT1",
270 .channel_offset = 0x08, 266 .channel_offset = 0x08,
271 .timer_bit = 1, 267 .timer_bit = 1,
272 .clk = "peripheral_clk",
273 .clockevent_rating = 125, 268 .clockevent_rating = 125,
274 .clocksource_rating = 0, /* disabled due to code generation issues */ 269 .clocksource_rating = 0, /* disabled due to code generation issues */
275}; 270};
276 271
277static struct resource cmt1_resources[] = { 272static struct resource cmt1_resources[] = {
278 [0] = { 273 [0] = {
279 .name = "CMT1",
280 .start = 0xfffec008, 274 .start = 0xfffec008,
281 .end = 0xfffec00d, 275 .end = 0xfffec00d,
282 .flags = IORESOURCE_MEM, 276 .flags = IORESOURCE_MEM,
@@ -298,16 +292,13 @@ static struct platform_device cmt1_device = {
298}; 292};
299 293
300static struct sh_timer_config mtu2_0_platform_data = { 294static struct sh_timer_config mtu2_0_platform_data = {
301 .name = "MTU2_0",
302 .channel_offset = -0x80, 295 .channel_offset = -0x80,
303 .timer_bit = 0, 296 .timer_bit = 0,
304 .clk = "peripheral_clk",
305 .clockevent_rating = 200, 297 .clockevent_rating = 200,
306}; 298};
307 299
308static struct resource mtu2_0_resources[] = { 300static struct resource mtu2_0_resources[] = {
309 [0] = { 301 [0] = {
310 .name = "MTU2_0",
311 .start = 0xfffe4300, 302 .start = 0xfffe4300,
312 .end = 0xfffe4326, 303 .end = 0xfffe4326,
313 .flags = IORESOURCE_MEM, 304 .flags = IORESOURCE_MEM,
@@ -329,16 +320,13 @@ static struct platform_device mtu2_0_device = {
329}; 320};
330 321
331static struct sh_timer_config mtu2_1_platform_data = { 322static struct sh_timer_config mtu2_1_platform_data = {
332 .name = "MTU2_1",
333 .channel_offset = -0x100, 323 .channel_offset = -0x100,
334 .timer_bit = 1, 324 .timer_bit = 1,
335 .clk = "peripheral_clk",
336 .clockevent_rating = 200, 325 .clockevent_rating = 200,
337}; 326};
338 327
339static struct resource mtu2_1_resources[] = { 328static struct resource mtu2_1_resources[] = {
340 [0] = { 329 [0] = {
341 .name = "MTU2_1",
342 .start = 0xfffe4380, 330 .start = 0xfffe4380,
343 .end = 0xfffe4390, 331 .end = 0xfffe4390,
344 .flags = IORESOURCE_MEM, 332 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index 064873585a8b..dc47b04e1049 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -194,17 +194,14 @@ static struct platform_device scif3_device = {
194}; 194};
195 195
196static struct sh_timer_config cmt0_platform_data = { 196static struct sh_timer_config cmt0_platform_data = {
197 .name = "CMT0",
198 .channel_offset = 0x02, 197 .channel_offset = 0x02,
199 .timer_bit = 0, 198 .timer_bit = 0,
200 .clk = "peripheral_clk",
201 .clockevent_rating = 125, 199 .clockevent_rating = 125,
202 .clocksource_rating = 0, /* disabled due to code generation issues */ 200 .clocksource_rating = 0, /* disabled due to code generation issues */
203}; 201};
204 202
205static struct resource cmt0_resources[] = { 203static struct resource cmt0_resources[] = {
206 [0] = { 204 [0] = {
207 .name = "CMT0",
208 .start = 0xfffec002, 205 .start = 0xfffec002,
209 .end = 0xfffec007, 206 .end = 0xfffec007,
210 .flags = IORESOURCE_MEM, 207 .flags = IORESOURCE_MEM,
@@ -226,17 +223,14 @@ static struct platform_device cmt0_device = {
226}; 223};
227 224
228static struct sh_timer_config cmt1_platform_data = { 225static struct sh_timer_config cmt1_platform_data = {
229 .name = "CMT1",
230 .channel_offset = 0x08, 226 .channel_offset = 0x08,
231 .timer_bit = 1, 227 .timer_bit = 1,
232 .clk = "peripheral_clk",
233 .clockevent_rating = 125, 228 .clockevent_rating = 125,
234 .clocksource_rating = 0, /* disabled due to code generation issues */ 229 .clocksource_rating = 0, /* disabled due to code generation issues */
235}; 230};
236 231
237static struct resource cmt1_resources[] = { 232static struct resource cmt1_resources[] = {
238 [0] = { 233 [0] = {
239 .name = "CMT1",
240 .start = 0xfffec008, 234 .start = 0xfffec008,
241 .end = 0xfffec00d, 235 .end = 0xfffec00d,
242 .flags = IORESOURCE_MEM, 236 .flags = IORESOURCE_MEM,
@@ -258,16 +252,13 @@ static struct platform_device cmt1_device = {
258}; 252};
259 253
260static struct sh_timer_config mtu2_0_platform_data = { 254static struct sh_timer_config mtu2_0_platform_data = {
261 .name = "MTU2_0",
262 .channel_offset = -0x80, 255 .channel_offset = -0x80,
263 .timer_bit = 0, 256 .timer_bit = 0,
264 .clk = "peripheral_clk",
265 .clockevent_rating = 200, 257 .clockevent_rating = 200,
266}; 258};
267 259
268static struct resource mtu2_0_resources[] = { 260static struct resource mtu2_0_resources[] = {
269 [0] = { 261 [0] = {
270 .name = "MTU2_0",
271 .start = 0xfffe4300, 262 .start = 0xfffe4300,
272 .end = 0xfffe4326, 263 .end = 0xfffe4326,
273 .flags = IORESOURCE_MEM, 264 .flags = IORESOURCE_MEM,
@@ -289,16 +280,13 @@ static struct platform_device mtu2_0_device = {
289}; 280};
290 281
291static struct sh_timer_config mtu2_1_platform_data = { 282static struct sh_timer_config mtu2_1_platform_data = {
292 .name = "MTU2_1",
293 .channel_offset = -0x100, 283 .channel_offset = -0x100,
294 .timer_bit = 1, 284 .timer_bit = 1,
295 .clk = "peripheral_clk",
296 .clockevent_rating = 200, 285 .clockevent_rating = 200,
297}; 286};
298 287
299static struct resource mtu2_1_resources[] = { 288static struct resource mtu2_1_resources[] = {
300 [0] = { 289 [0] = {
301 .name = "MTU2_1",
302 .start = 0xfffe4380, 290 .start = 0xfffe4380,
303 .end = 0xfffe4390, 291 .end = 0xfffe4390,
304 .flags = IORESOURCE_MEM, 292 .flags = IORESOURCE_MEM,
@@ -320,16 +308,13 @@ static struct platform_device mtu2_1_device = {
320}; 308};
321 309
322static struct sh_timer_config mtu2_2_platform_data = { 310static struct sh_timer_config mtu2_2_platform_data = {
323 .name = "MTU2_2",
324 .channel_offset = 0x80, 311 .channel_offset = 0x80,
325 .timer_bit = 2, 312 .timer_bit = 2,
326 .clk = "peripheral_clk",
327 .clockevent_rating = 200, 313 .clockevent_rating = 200,
328}; 314};
329 315
330static struct resource mtu2_2_resources[] = { 316static struct resource mtu2_2_resources[] = {
331 [0] = { 317 [0] = {
332 .name = "MTU2_2",
333 .start = 0xfffe4000, 318 .start = 0xfffe4000,
334 .end = 0xfffe400a, 319 .end = 0xfffe400a,
335 .flags = IORESOURCE_MEM, 320 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 7b892d60e3a0..baadd7f54d94 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -124,16 +124,13 @@ static struct platform_device rtc_device = {
124}; 124};
125 125
126static struct sh_timer_config tmu0_platform_data = { 126static struct sh_timer_config tmu0_platform_data = {
127 .name = "TMU0",
128 .channel_offset = 0x02, 127 .channel_offset = 0x02,
129 .timer_bit = 0, 128 .timer_bit = 0,
130 .clk = "peripheral_clk",
131 .clockevent_rating = 200, 129 .clockevent_rating = 200,
132}; 130};
133 131
134static struct resource tmu0_resources[] = { 132static struct resource tmu0_resources[] = {
135 [0] = { 133 [0] = {
136 .name = "TMU0",
137 .start = 0xfffffe94, 134 .start = 0xfffffe94,
138 .end = 0xfffffe9f, 135 .end = 0xfffffe9f,
139 .flags = IORESOURCE_MEM, 136 .flags = IORESOURCE_MEM,
@@ -155,16 +152,13 @@ static struct platform_device tmu0_device = {
155}; 152};
156 153
157static struct sh_timer_config tmu1_platform_data = { 154static struct sh_timer_config tmu1_platform_data = {
158 .name = "TMU1",
159 .channel_offset = 0xe, 155 .channel_offset = 0xe,
160 .timer_bit = 1, 156 .timer_bit = 1,
161 .clk = "peripheral_clk",
162 .clocksource_rating = 200, 157 .clocksource_rating = 200,
163}; 158};
164 159
165static struct resource tmu1_resources[] = { 160static struct resource tmu1_resources[] = {
166 [0] = { 161 [0] = {
167 .name = "TMU1",
168 .start = 0xfffffea0, 162 .start = 0xfffffea0,
169 .end = 0xfffffeab, 163 .end = 0xfffffeab,
170 .flags = IORESOURCE_MEM, 164 .flags = IORESOURCE_MEM,
@@ -186,15 +180,12 @@ static struct platform_device tmu1_device = {
186}; 180};
187 181
188static struct sh_timer_config tmu2_platform_data = { 182static struct sh_timer_config tmu2_platform_data = {
189 .name = "TMU2",
190 .channel_offset = 0x1a, 183 .channel_offset = 0x1a,
191 .timer_bit = 2, 184 .timer_bit = 2,
192 .clk = "peripheral_clk",
193}; 185};
194 186
195static struct resource tmu2_resources[] = { 187static struct resource tmu2_resources[] = {
196 [0] = { 188 [0] = {
197 .name = "TMU2",
198 .start = 0xfffffeac, 189 .start = 0xfffffeac,
199 .end = 0xfffffebb, 190 .end = 0xfffffebb,
200 .flags = IORESOURCE_MEM, 191 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index bc0c4f68c7c7..3cf8c8ef7b32 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -157,16 +157,13 @@ static struct platform_device scif2_device = {
157#endif 157#endif
158 158
159static struct sh_timer_config tmu0_platform_data = { 159static struct sh_timer_config tmu0_platform_data = {
160 .name = "TMU0",
161 .channel_offset = 0x02, 160 .channel_offset = 0x02,
162 .timer_bit = 0, 161 .timer_bit = 0,
163 .clk = "peripheral_clk",
164 .clockevent_rating = 200, 162 .clockevent_rating = 200,
165}; 163};
166 164
167static struct resource tmu0_resources[] = { 165static struct resource tmu0_resources[] = {
168 [0] = { 166 [0] = {
169 .name = "TMU0",
170 .start = 0xfffffe94, 167 .start = 0xfffffe94,
171 .end = 0xfffffe9f, 168 .end = 0xfffffe9f,
172 .flags = IORESOURCE_MEM, 169 .flags = IORESOURCE_MEM,
@@ -188,16 +185,13 @@ static struct platform_device tmu0_device = {
188}; 185};
189 186
190static struct sh_timer_config tmu1_platform_data = { 187static struct sh_timer_config tmu1_platform_data = {
191 .name = "TMU1",
192 .channel_offset = 0xe, 188 .channel_offset = 0xe,
193 .timer_bit = 1, 189 .timer_bit = 1,
194 .clk = "peripheral_clk",
195 .clocksource_rating = 200, 190 .clocksource_rating = 200,
196}; 191};
197 192
198static struct resource tmu1_resources[] = { 193static struct resource tmu1_resources[] = {
199 [0] = { 194 [0] = {
200 .name = "TMU1",
201 .start = 0xfffffea0, 195 .start = 0xfffffea0,
202 .end = 0xfffffeab, 196 .end = 0xfffffeab,
203 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
@@ -219,15 +213,12 @@ static struct platform_device tmu1_device = {
219}; 213};
220 214
221static struct sh_timer_config tmu2_platform_data = { 215static struct sh_timer_config tmu2_platform_data = {
222 .name = "TMU2",
223 .channel_offset = 0x1a, 216 .channel_offset = 0x1a,
224 .timer_bit = 2, 217 .timer_bit = 2,
225 .clk = "peripheral_clk",
226}; 218};
227 219
228static struct resource tmu2_resources[] = { 220static struct resource tmu2_resources[] = {
229 [0] = { 221 [0] = {
230 .name = "TMU2",
231 .start = 0xfffffeac, 222 .start = 0xfffffeac,
232 .end = 0xfffffebb, 223 .end = 0xfffffebb,
233 .flags = IORESOURCE_MEM, 224 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 0845a3ad006d..b0c2fb4ab479 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -127,16 +127,13 @@ static struct platform_device scif1_device = {
127}; 127};
128 128
129static struct sh_timer_config tmu0_platform_data = { 129static struct sh_timer_config tmu0_platform_data = {
130 .name = "TMU0",
131 .channel_offset = 0x02, 130 .channel_offset = 0x02,
132 .timer_bit = 0, 131 .timer_bit = 0,
133 .clk = "peripheral_clk",
134 .clockevent_rating = 200, 132 .clockevent_rating = 200,
135}; 133};
136 134
137static struct resource tmu0_resources[] = { 135static struct resource tmu0_resources[] = {
138 [0] = { 136 [0] = {
139 .name = "TMU0",
140 .start = 0xa412fe94, 137 .start = 0xa412fe94,
141 .end = 0xa412fe9f, 138 .end = 0xa412fe9f,
142 .flags = IORESOURCE_MEM, 139 .flags = IORESOURCE_MEM,
@@ -158,16 +155,13 @@ static struct platform_device tmu0_device = {
158}; 155};
159 156
160static struct sh_timer_config tmu1_platform_data = { 157static struct sh_timer_config tmu1_platform_data = {
161 .name = "TMU1",
162 .channel_offset = 0xe, 158 .channel_offset = 0xe,
163 .timer_bit = 1, 159 .timer_bit = 1,
164 .clk = "peripheral_clk",
165 .clocksource_rating = 200, 160 .clocksource_rating = 200,
166}; 161};
167 162
168static struct resource tmu1_resources[] = { 163static struct resource tmu1_resources[] = {
169 [0] = { 164 [0] = {
170 .name = "TMU1",
171 .start = 0xa412fea0, 165 .start = 0xa412fea0,
172 .end = 0xa412feab, 166 .end = 0xa412feab,
173 .flags = IORESOURCE_MEM, 167 .flags = IORESOURCE_MEM,
@@ -189,15 +183,12 @@ static struct platform_device tmu1_device = {
189}; 183};
190 184
191static struct sh_timer_config tmu2_platform_data = { 185static struct sh_timer_config tmu2_platform_data = {
192 .name = "TMU2",
193 .channel_offset = 0x1a, 186 .channel_offset = 0x1a,
194 .timer_bit = 2, 187 .timer_bit = 2,
195 .clk = "peripheral_clk",
196}; 188};
197 189
198static struct resource tmu2_resources[] = { 190static struct resource tmu2_resources[] = {
199 [0] = { 191 [0] = {
200 .name = "TMU2",
201 .start = 0xa412feac, 192 .start = 0xa412feac,
202 .end = 0xa412feb5, 193 .end = 0xa412feb5,
203 .flags = IORESOURCE_MEM, 194 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index a718a6231091..24b17135d5d2 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -130,17 +130,14 @@ static struct platform_device usbf_device = {
130}; 130};
131 131
132static struct sh_timer_config cmt0_platform_data = { 132static struct sh_timer_config cmt0_platform_data = {
133 .name = "CMT0",
134 .channel_offset = 0x10, 133 .channel_offset = 0x10,
135 .timer_bit = 0, 134 .timer_bit = 0,
136 .clk = "peripheral_clk",
137 .clockevent_rating = 125, 135 .clockevent_rating = 125,
138 .clocksource_rating = 125, 136 .clocksource_rating = 125,
139}; 137};
140 138
141static struct resource cmt0_resources[] = { 139static struct resource cmt0_resources[] = {
142 [0] = { 140 [0] = {
143 .name = "CMT0",
144 .start = 0x044a0010, 141 .start = 0x044a0010,
145 .end = 0x044a001b, 142 .end = 0x044a001b,
146 .flags = IORESOURCE_MEM, 143 .flags = IORESOURCE_MEM,
@@ -162,15 +159,12 @@ static struct platform_device cmt0_device = {
162}; 159};
163 160
164static struct sh_timer_config cmt1_platform_data = { 161static struct sh_timer_config cmt1_platform_data = {
165 .name = "CMT1",
166 .channel_offset = 0x20, 162 .channel_offset = 0x20,
167 .timer_bit = 1, 163 .timer_bit = 1,
168 .clk = "peripheral_clk",
169}; 164};
170 165
171static struct resource cmt1_resources[] = { 166static struct resource cmt1_resources[] = {
172 [0] = { 167 [0] = {
173 .name = "CMT1",
174 .start = 0x044a0020, 168 .start = 0x044a0020,
175 .end = 0x044a002b, 169 .end = 0x044a002b,
176 .flags = IORESOURCE_MEM, 170 .flags = IORESOURCE_MEM,
@@ -192,15 +186,12 @@ static struct platform_device cmt1_device = {
192}; 186};
193 187
194static struct sh_timer_config cmt2_platform_data = { 188static struct sh_timer_config cmt2_platform_data = {
195 .name = "CMT2",
196 .channel_offset = 0x30, 189 .channel_offset = 0x30,
197 .timer_bit = 2, 190 .timer_bit = 2,
198 .clk = "peripheral_clk",
199}; 191};
200 192
201static struct resource cmt2_resources[] = { 193static struct resource cmt2_resources[] = {
202 [0] = { 194 [0] = {
203 .name = "CMT2",
204 .start = 0x044a0030, 195 .start = 0x044a0030,
205 .end = 0x044a003b, 196 .end = 0x044a003b,
206 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
@@ -222,15 +213,12 @@ static struct platform_device cmt2_device = {
222}; 213};
223 214
224static struct sh_timer_config cmt3_platform_data = { 215static struct sh_timer_config cmt3_platform_data = {
225 .name = "CMT3",
226 .channel_offset = 0x40, 216 .channel_offset = 0x40,
227 .timer_bit = 3, 217 .timer_bit = 3,
228 .clk = "peripheral_clk",
229}; 218};
230 219
231static struct resource cmt3_resources[] = { 220static struct resource cmt3_resources[] = {
232 [0] = { 221 [0] = {
233 .name = "CMT3",
234 .start = 0x044a0040, 222 .start = 0x044a0040,
235 .end = 0x044a004b, 223 .end = 0x044a004b,
236 .flags = IORESOURCE_MEM, 224 .flags = IORESOURCE_MEM,
@@ -252,15 +240,12 @@ static struct platform_device cmt3_device = {
252}; 240};
253 241
254static struct sh_timer_config cmt4_platform_data = { 242static struct sh_timer_config cmt4_platform_data = {
255 .name = "CMT4",
256 .channel_offset = 0x50, 243 .channel_offset = 0x50,
257 .timer_bit = 4, 244 .timer_bit = 4,
258 .clk = "peripheral_clk",
259}; 245};
260 246
261static struct resource cmt4_resources[] = { 247static struct resource cmt4_resources[] = {
262 [0] = { 248 [0] = {
263 .name = "CMT4",
264 .start = 0x044a0050, 249 .start = 0x044a0050,
265 .end = 0x044a005b, 250 .end = 0x044a005b,
266 .flags = IORESOURCE_MEM, 251 .flags = IORESOURCE_MEM,
@@ -282,16 +267,13 @@ static struct platform_device cmt4_device = {
282}; 267};
283 268
284static struct sh_timer_config tmu0_platform_data = { 269static struct sh_timer_config tmu0_platform_data = {
285 .name = "TMU0",
286 .channel_offset = 0x02, 270 .channel_offset = 0x02,
287 .timer_bit = 0, 271 .timer_bit = 0,
288 .clk = "peripheral_clk",
289 .clockevent_rating = 200, 272 .clockevent_rating = 200,
290}; 273};
291 274
292static struct resource tmu0_resources[] = { 275static struct resource tmu0_resources[] = {
293 [0] = { 276 [0] = {
294 .name = "TMU0",
295 .start = 0xa412fe94, 277 .start = 0xa412fe94,
296 .end = 0xa412fe9f, 278 .end = 0xa412fe9f,
297 .flags = IORESOURCE_MEM, 279 .flags = IORESOURCE_MEM,
@@ -313,16 +295,13 @@ static struct platform_device tmu0_device = {
313}; 295};
314 296
315static struct sh_timer_config tmu1_platform_data = { 297static struct sh_timer_config tmu1_platform_data = {
316 .name = "TMU1",
317 .channel_offset = 0xe, 298 .channel_offset = 0xe,
318 .timer_bit = 1, 299 .timer_bit = 1,
319 .clk = "peripheral_clk",
320 .clocksource_rating = 200, 300 .clocksource_rating = 200,
321}; 301};
322 302
323static struct resource tmu1_resources[] = { 303static struct resource tmu1_resources[] = {
324 [0] = { 304 [0] = {
325 .name = "TMU1",
326 .start = 0xa412fea0, 305 .start = 0xa412fea0,
327 .end = 0xa412feab, 306 .end = 0xa412feab,
328 .flags = IORESOURCE_MEM, 307 .flags = IORESOURCE_MEM,
@@ -344,15 +323,12 @@ static struct platform_device tmu1_device = {
344}; 323};
345 324
346static struct sh_timer_config tmu2_platform_data = { 325static struct sh_timer_config tmu2_platform_data = {
347 .name = "TMU2",
348 .channel_offset = 0x1a, 326 .channel_offset = 0x1a,
349 .timer_bit = 2, 327 .timer_bit = 2,
350 .clk = "peripheral_clk",
351}; 328};
352 329
353static struct resource tmu2_resources[] = { 330static struct resource tmu2_resources[] = {
354 [0] = { 331 [0] = {
355 .name = "TMU2",
356 .start = 0xa412feac, 332 .start = 0xa412feac,
357 .end = 0xa412feb5, 333 .end = 0xa412feb5,
358 .flags = IORESOURCE_MEM, 334 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index b9b7e10ad68f..e916b18e1f7c 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -31,16 +31,13 @@ static struct platform_device scif0_device = {
31}; 31};
32 32
33static struct sh_timer_config tmu0_platform_data = { 33static struct sh_timer_config tmu0_platform_data = {
34 .name = "TMU0",
35 .channel_offset = 0x04, 34 .channel_offset = 0x04,
36 .timer_bit = 0, 35 .timer_bit = 0,
37 .clk = "peripheral_clk",
38 .clockevent_rating = 200, 36 .clockevent_rating = 200,
39}; 37};
40 38
41static struct resource tmu0_resources[] = { 39static struct resource tmu0_resources[] = {
42 [0] = { 40 [0] = {
43 .name = "TMU0",
44 .start = 0xffd80008, 41 .start = 0xffd80008,
45 .end = 0xffd80013, 42 .end = 0xffd80013,
46 .flags = IORESOURCE_MEM, 43 .flags = IORESOURCE_MEM,
@@ -62,16 +59,13 @@ static struct platform_device tmu0_device = {
62}; 59};
63 60
64static struct sh_timer_config tmu1_platform_data = { 61static struct sh_timer_config tmu1_platform_data = {
65 .name = "TMU1",
66 .channel_offset = 0x10, 62 .channel_offset = 0x10,
67 .timer_bit = 1, 63 .timer_bit = 1,
68 .clk = "peripheral_clk",
69 .clocksource_rating = 200, 64 .clocksource_rating = 200,
70}; 65};
71 66
72static struct resource tmu1_resources[] = { 67static struct resource tmu1_resources[] = {
73 [0] = { 68 [0] = {
74 .name = "TMU1",
75 .start = 0xffd80014, 69 .start = 0xffd80014,
76 .end = 0xffd8001f, 70 .end = 0xffd8001f,
77 .flags = IORESOURCE_MEM, 71 .flags = IORESOURCE_MEM,
@@ -93,15 +87,12 @@ static struct platform_device tmu1_device = {
93}; 87};
94 88
95static struct sh_timer_config tmu2_platform_data = { 89static struct sh_timer_config tmu2_platform_data = {
96 .name = "TMU2",
97 .channel_offset = 0x1c, 90 .channel_offset = 0x1c,
98 .timer_bit = 2, 91 .timer_bit = 2,
99 .clk = "peripheral_clk",
100}; 92};
101 93
102static struct resource tmu2_resources[] = { 94static struct resource tmu2_resources[] = {
103 [0] = { 95 [0] = {
104 .name = "TMU2",
105 .start = 0xffd80020, 96 .start = 0xffd80020,
106 .end = 0xffd8002f, 97 .end = 0xffd8002f,
107 .flags = IORESOURCE_MEM, 98 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index ffd79e57254f..911d196e86b5 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -66,16 +66,13 @@ static struct platform_device scif1_device = {
66}; 66};
67 67
68static struct sh_timer_config tmu0_platform_data = { 68static struct sh_timer_config tmu0_platform_data = {
69 .name = "TMU0",
70 .channel_offset = 0x04, 69 .channel_offset = 0x04,
71 .timer_bit = 0, 70 .timer_bit = 0,
72 .clk = "peripheral_clk",
73 .clockevent_rating = 200, 71 .clockevent_rating = 200,
74}; 72};
75 73
76static struct resource tmu0_resources[] = { 74static struct resource tmu0_resources[] = {
77 [0] = { 75 [0] = {
78 .name = "TMU0",
79 .start = 0xffd80008, 76 .start = 0xffd80008,
80 .end = 0xffd80013, 77 .end = 0xffd80013,
81 .flags = IORESOURCE_MEM, 78 .flags = IORESOURCE_MEM,
@@ -97,16 +94,13 @@ static struct platform_device tmu0_device = {
97}; 94};
98 95
99static struct sh_timer_config tmu1_platform_data = { 96static struct sh_timer_config tmu1_platform_data = {
100 .name = "TMU1",
101 .channel_offset = 0x10, 97 .channel_offset = 0x10,
102 .timer_bit = 1, 98 .timer_bit = 1,
103 .clk = "peripheral_clk",
104 .clocksource_rating = 200, 99 .clocksource_rating = 200,
105}; 100};
106 101
107static struct resource tmu1_resources[] = { 102static struct resource tmu1_resources[] = {
108 [0] = { 103 [0] = {
109 .name = "TMU1",
110 .start = 0xffd80014, 104 .start = 0xffd80014,
111 .end = 0xffd8001f, 105 .end = 0xffd8001f,
112 .flags = IORESOURCE_MEM, 106 .flags = IORESOURCE_MEM,
@@ -128,15 +122,12 @@ static struct platform_device tmu1_device = {
128}; 122};
129 123
130static struct sh_timer_config tmu2_platform_data = { 124static struct sh_timer_config tmu2_platform_data = {
131 .name = "TMU2",
132 .channel_offset = 0x1c, 125 .channel_offset = 0x1c,
133 .timer_bit = 2, 126 .timer_bit = 2,
134 .clk = "peripheral_clk",
135}; 127};
136 128
137static struct resource tmu2_resources[] = { 129static struct resource tmu2_resources[] = {
138 [0] = { 130 [0] = {
139 .name = "TMU2",
140 .start = 0xffd80020, 131 .start = 0xffd80020,
141 .end = 0xffd8002f, 132 .end = 0xffd8002f,
142 .flags = IORESOURCE_MEM, 133 .flags = IORESOURCE_MEM,
@@ -163,15 +154,12 @@ static struct platform_device tmu2_device = {
163 defined(CONFIG_CPU_SUBTYPE_SH7751R) 154 defined(CONFIG_CPU_SUBTYPE_SH7751R)
164 155
165static struct sh_timer_config tmu3_platform_data = { 156static struct sh_timer_config tmu3_platform_data = {
166 .name = "TMU3",
167 .channel_offset = 0x04, 157 .channel_offset = 0x04,
168 .timer_bit = 0, 158 .timer_bit = 0,
169 .clk = "peripheral_clk",
170}; 159};
171 160
172static struct resource tmu3_resources[] = { 161static struct resource tmu3_resources[] = {
173 [0] = { 162 [0] = {
174 .name = "TMU3",
175 .start = 0xfe100008, 163 .start = 0xfe100008,
176 .end = 0xfe100013, 164 .end = 0xfe100013,
177 .flags = IORESOURCE_MEM, 165 .flags = IORESOURCE_MEM,
@@ -193,15 +181,12 @@ static struct platform_device tmu3_device = {
193}; 181};
194 182
195static struct sh_timer_config tmu4_platform_data = { 183static struct sh_timer_config tmu4_platform_data = {
196 .name = "TMU4",
197 .channel_offset = 0x10, 184 .channel_offset = 0x10,
198 .timer_bit = 1, 185 .timer_bit = 1,
199 .clk = "peripheral_clk",
200}; 186};
201 187
202static struct resource tmu4_resources[] = { 188static struct resource tmu4_resources[] = {
203 [0] = { 189 [0] = {
204 .name = "TMU4",
205 .start = 0xfe100014, 190 .start = 0xfe100014,
206 .end = 0xfe10001f, 191 .end = 0xfe10001f,
207 .flags = IORESOURCE_MEM, 192 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index a16eb3656f4b..48ea8fe85dc5 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -187,16 +187,13 @@ static struct platform_device scif3_device = {
187}; 187};
188 188
189static struct sh_timer_config tmu0_platform_data = { 189static struct sh_timer_config tmu0_platform_data = {
190 .name = "TMU0",
191 .channel_offset = 0x04, 190 .channel_offset = 0x04,
192 .timer_bit = 0, 191 .timer_bit = 0,
193 .clk = "peripheral_clk",
194 .clockevent_rating = 200, 192 .clockevent_rating = 200,
195}; 193};
196 194
197static struct resource tmu0_resources[] = { 195static struct resource tmu0_resources[] = {
198 [0] = { 196 [0] = {
199 .name = "TMU0",
200 .start = 0xffd80008, 197 .start = 0xffd80008,
201 .end = 0xffd80013, 198 .end = 0xffd80013,
202 .flags = IORESOURCE_MEM, 199 .flags = IORESOURCE_MEM,
@@ -218,16 +215,13 @@ static struct platform_device tmu0_device = {
218}; 215};
219 216
220static struct sh_timer_config tmu1_platform_data = { 217static struct sh_timer_config tmu1_platform_data = {
221 .name = "TMU1",
222 .channel_offset = 0x10, 218 .channel_offset = 0x10,
223 .timer_bit = 1, 219 .timer_bit = 1,
224 .clk = "peripheral_clk",
225 .clocksource_rating = 200, 220 .clocksource_rating = 200,
226}; 221};
227 222
228static struct resource tmu1_resources[] = { 223static struct resource tmu1_resources[] = {
229 [0] = { 224 [0] = {
230 .name = "TMU1",
231 .start = 0xffd80014, 225 .start = 0xffd80014,
232 .end = 0xffd8001f, 226 .end = 0xffd8001f,
233 .flags = IORESOURCE_MEM, 227 .flags = IORESOURCE_MEM,
@@ -249,15 +243,12 @@ static struct platform_device tmu1_device = {
249}; 243};
250 244
251static struct sh_timer_config tmu2_platform_data = { 245static struct sh_timer_config tmu2_platform_data = {
252 .name = "TMU2",
253 .channel_offset = 0x1c, 246 .channel_offset = 0x1c,
254 .timer_bit = 2, 247 .timer_bit = 2,
255 .clk = "peripheral_clk",
256}; 248};
257 249
258static struct resource tmu2_resources[] = { 250static struct resource tmu2_resources[] = {
259 [0] = { 251 [0] = {
260 .name = "TMU2",
261 .start = 0xffd80020, 252 .start = 0xffd80020,
262 .end = 0xffd8002f, 253 .end = 0xffd8002f,
263 .flags = IORESOURCE_MEM, 254 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index 2c16df37eda6..a63cdcaee0b2 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -154,15 +154,15 @@ static struct clk mstp_clks[] = {
154 MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0), 154 MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0),
155 MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0), 155 MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0),
156 MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0), 156 MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0),
157 MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0), 157 MSTP("tmu_fck", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
158 MSTP("cmt0", &r_clk, MSTPCR0, 14, 0), 158 MSTP("cmt_fck", &r_clk, MSTPCR0, 14, 0),
159 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0), 159 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
160 MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0), 160 MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0),
161 MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0), 161 MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
162 MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0), 162 SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 7, 0),
163 MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0), 163 SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 6, 0),
164 MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0), 164 SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 5, 0),
165 MSTP("scif3", &div4_clks[DIV4_P], MSTPCR0, 4, 0), 165 SH_CLK_MSTP32("sci_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 4, 0),
166 MSTP("sio0", &div4_clks[DIV4_P], MSTPCR0, 3, 0), 166 MSTP("sio0", &div4_clks[DIV4_P], MSTPCR0, 3, 0),
167 MSTP("siof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0), 167 MSTP("siof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0),
168 MSTP("siof1", &div4_clks[DIV4_P], MSTPCR0, 1, 0), 168 MSTP("siof1", &div4_clks[DIV4_P], MSTPCR0, 1, 0),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 91588d280cd8..f99db94cf8fb 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -158,14 +158,14 @@ static struct clk mstp_clks[] = {
158 MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0), 158 MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0),
159 MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0), 159 MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0),
160 MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0), 160 MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0),
161 MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0), 161 MSTP("tmu_fck", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
162 MSTP("cmt0", &r_clk, MSTPCR0, 14, 0), 162 MSTP("cmt_fck", &r_clk, MSTPCR0, 14, 0),
163 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0), 163 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
164 MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0), 164 MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0),
165 MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0), 165 MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
166 MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0), 166 SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 7, 0),
167 MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0), 167 SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 6, 0),
168 MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0), 168 SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 5, 0),
169 MSTP("msiof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0), 169 MSTP("msiof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0),
170 MSTP("sbr0", &div4_clks[DIV4_P], MSTPCR0, 1, 0), 170 MSTP("sbr0", &div4_clks[DIV4_P], MSTPCR0, 1, 0),
171 171
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 15db6d521c5c..107b200e78bd 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -160,13 +160,13 @@ struct clk div6_clks[] = {
160static struct clk mstp_clks[] = { 160static struct clk mstp_clks[] = {
161 SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT), 161 SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT),
162 SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT), 162 SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT),
163 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU, 0), 163 SH_HWBLK_CLK("tmu_fck", -1, P_CLK, HWBLK_TMU, 0),
164 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), 164 SH_HWBLK_CLK("cmt_fck", -1, R_CLK, HWBLK_CMT, 0),
165 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), 165 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
166 SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0), 166 SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
167 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), 167 SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0),
168 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), 168 SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0),
169 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), 169 SH_HWBLK_CLK("sci_fck", 2, P_CLK, HWBLK_SCIF2, 0),
170 170
171 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0), 171 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
172 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0), 172 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 50babe01fe44..fc86c88223f4 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -21,6 +21,8 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h>
25#include <asm/clkdev.h>
24#include <asm/clock.h> 26#include <asm/clock.h>
25#include <asm/hwblk.h> 27#include <asm/hwblk.h>
26#include <cpu/sh7723.h> 28#include <cpu/sh7723.h>
@@ -171,18 +173,18 @@ static struct clk mstp_clks[] = {
171 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), 173 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
172 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), 174 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
173 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), 175 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
174 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0), 176 SH_HWBLK_CLK("tmu012_fck", -1, P_CLK, HWBLK_TMU0, 0),
175 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), 177 SH_HWBLK_CLK("cmt_fck", -1, R_CLK, HWBLK_CMT, 0),
176 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), 178 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
177 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), 179 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
178 SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0), 180 SH_HWBLK_CLK("tmu345_fck", -1, P_CLK, HWBLK_TMU1, 0),
179 SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0), 181 SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
180 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), 182 SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0),
181 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), 183 SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0),
182 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), 184 SH_HWBLK_CLK("sci_fck", 2, P_CLK, HWBLK_SCIF2, 0),
183 SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0), 185 SH_HWBLK_CLK("sci_fck", 3, B_CLK, HWBLK_SCIF3, 0),
184 SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0), 186 SH_HWBLK_CLK("sci_fck", 4, B_CLK, HWBLK_SCIF4, 0),
185 SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0), 187 SH_HWBLK_CLK("sci_fck", 5, B_CLK, HWBLK_SCIF5, 0),
186 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0), 188 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
187 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0), 189 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
188 SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0), 190 SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0),
@@ -211,6 +213,40 @@ static struct clk mstp_clks[] = {
211 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), 213 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
212}; 214};
213 215
216static struct clk_lookup lookups[] = {
217 {
218 /* TMU0 */
219 .dev_id = "sh_tmu.0",
220 .con_id = "tmu_fck",
221 .clk = &mstp_clks[11], /* tmu012_fck */
222 }, {
223 /* TMU1 */
224 .dev_id = "sh_tmu.1",
225 .con_id = "tmu_fck",
226 .clk = &mstp_clks[11],
227 }, {
228 /* TMU2 */
229 .dev_id = "sh_tmu.2",
230 .con_id = "tmu_fck",
231 .clk = &mstp_clks[11],
232 }, {
233 /* TMU3 */
234 .dev_id = "sh_tmu.3",
235 .con_id = "tmu_fck",
236 .clk = &mstp_clks[15], /* tmu345_fck */
237 }, {
238 /* TMU4 */
239 .dev_id = "sh_tmu.4",
240 .con_id = "tmu_fck",
241 .clk = &mstp_clks[15],
242 }, {
243 /* TMU5 */
244 .dev_id = "sh_tmu.5",
245 .con_id = "tmu_fck",
246 .clk = &mstp_clks[15],
247 },
248};
249
214int __init arch_clk_init(void) 250int __init arch_clk_init(void)
215{ 251{
216 int k, ret = 0; 252 int k, ret = 0;
@@ -222,7 +258,9 @@ int __init arch_clk_init(void)
222 pll_clk.parent = &extal_clk; 258 pll_clk.parent = &extal_clk;
223 259
224 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 260 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
225 ret = clk_register(main_clks[k]); 261 ret |= clk_register(main_clks[k]);
262
263 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
226 264
227 if (!ret) 265 if (!ret)
228 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 266 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 6707061fbf54..f1583a23b3a5 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -21,6 +21,8 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/clk.h>
25#include <asm/clkdev.h>
24#include <asm/clock.h> 26#include <asm/clock.h>
25#include <asm/hwblk.h> 27#include <asm/hwblk.h>
26#include <cpu/sh7724.h> 28#include <cpu/sh7724.h>
@@ -189,17 +191,17 @@ static struct clk mstp_clks[] = {
189 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT), 191 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
190 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0), 192 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
191 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0), 193 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
192 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0), 194 SH_HWBLK_CLK("tmu012_fck", -1, P_CLK, HWBLK_TMU0, 0),
193 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0), 195 SH_HWBLK_CLK("cmt_fck", -1, R_CLK, HWBLK_CMT, 0),
194 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0), 196 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
195 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0), 197 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
196 SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0), 198 SH_HWBLK_CLK("tmu345_fck", -1, P_CLK, HWBLK_TMU1, 0),
197 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0), 199 SH_HWBLK_CLK("sci_fck", 0, P_CLK, HWBLK_SCIF0, 0),
198 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0), 200 SH_HWBLK_CLK("sci_fck", 1, P_CLK, HWBLK_SCIF1, 0),
199 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0), 201 SH_HWBLK_CLK("sci_fck", 2, P_CLK, HWBLK_SCIF2, 0),
200 SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0), 202 SH_HWBLK_CLK("sci_fck", 3, B_CLK, HWBLK_SCIF3, 0),
201 SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0), 203 SH_HWBLK_CLK("sci_fck", 4, B_CLK, HWBLK_SCIF4, 0),
202 SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0), 204 SH_HWBLK_CLK("sci_fck", 5, B_CLK, HWBLK_SCIF5, 0),
203 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0), 205 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
204 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0), 206 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
205 207
@@ -233,6 +235,40 @@ static struct clk mstp_clks[] = {
233 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0), 235 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
234}; 236};
235 237
238static struct clk_lookup lookups[] = {
239 {
240 /* TMU0 */
241 .dev_id = "sh_tmu.0",
242 .con_id = "tmu_fck",
243 .clk = &mstp_clks[12], /* tmu012_fck */
244 }, {
245 /* TMU1 */
246 .dev_id = "sh_tmu.1",
247 .con_id = "tmu_fck",
248 .clk = &mstp_clks[12],
249 }, {
250 /* TMU2 */
251 .dev_id = "sh_tmu.2",
252 .con_id = "tmu_fck",
253 .clk = &mstp_clks[12],
254 }, {
255 /* TMU3 */
256 .dev_id = "sh_tmu.3",
257 .con_id = "tmu_fck",
258 .clk = &mstp_clks[16], /* tmu345_fck */
259 }, {
260 /* TMU4 */
261 .dev_id = "sh_tmu.4",
262 .con_id = "tmu_fck",
263 .clk = &mstp_clks[16],
264 }, {
265 /* TMU5 */
266 .dev_id = "sh_tmu.5",
267 .con_id = "tmu_fck",
268 .clk = &mstp_clks[16],
269 },
270};
271
236int __init arch_clk_init(void) 272int __init arch_clk_init(void)
237{ 273{
238 int k, ret = 0; 274 int k, ret = 0;
@@ -246,6 +282,8 @@ int __init arch_clk_init(void)
246 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) 282 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
247 ret = clk_register(main_clks[k]); 283 ret = clk_register(main_clks[k]);
248 284
285 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
286
249 if (!ret) 287 if (!ret)
250 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); 288 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
251 289
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index d997f0a25b10..28de049a59b1 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * SH7785 support for the clock framework 4 * SH7785 support for the clock framework
5 * 5 *
6 * Copyright (C) 2007 - 2009 Paul Mundt 6 * Copyright (C) 2007 - 2010 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -14,6 +14,7 @@
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/cpufreq.h> 16#include <linux/cpufreq.h>
17#include <asm/clkdev.h>
17#include <asm/clock.h> 18#include <asm/clock.h>
18#include <asm/freq.h> 19#include <asm/freq.h>
19#include <cpu/sh7785.h> 20#include <cpu/sh7785.h>
@@ -88,12 +89,12 @@ struct clk div4_clks[DIV4_NR] = {
88 89
89static struct clk mstp_clks[] = { 90static struct clk mstp_clks[] = {
90 /* MSTPCR0 */ 91 /* MSTPCR0 */
91 SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0), 92 SH_CLK_MSTP32("sci_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
92 SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0), 93 SH_CLK_MSTP32("sci_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
93 SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0), 94 SH_CLK_MSTP32("sci_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
94 SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0), 95 SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
95 SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0), 96 SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
96 SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0), 97 SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
97 SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0), 98 SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0),
98 SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0), 99 SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0),
99 SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0), 100 SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0),
@@ -113,12 +114,48 @@ static struct clk mstp_clks[] = {
113 SH_CLK_MSTP32("gdta_fck", -1, NULL, MSTPCR1, 0, 0), 114 SH_CLK_MSTP32("gdta_fck", -1, NULL, MSTPCR1, 0, 0),
114}; 115};
115 116
117static struct clk_lookup lookups[] = {
118 {
119 /* TMU0 */
120 .dev_id = "sh_tmu.0",
121 .con_id = "tmu_fck",
122 .clk = &mstp_clks[13], /* tmu012_fck */
123 }, {
124 /* TMU1 */
125 .dev_id = "sh_tmu.1",
126 .con_id = "tmu_fck",
127 .clk = &mstp_clks[13],
128 }, {
129 /* TMU2 */
130 .dev_id = "sh_tmu.2",
131 .con_id = "tmu_fck",
132 .clk = &mstp_clks[13],
133 }, {
134 /* TMU3 */
135 .dev_id = "sh_tmu.3",
136 .con_id = "tmu_fck",
137 .clk = &mstp_clks[12], /* tmu345_fck */
138 }, {
139 /* TMU4 */
140 .dev_id = "sh_tmu.4",
141 .con_id = "tmu_fck",
142 .clk = &mstp_clks[12],
143 }, {
144 /* TMU5 */
145 .dev_id = "sh_tmu.5",
146 .con_id = "tmu_fck",
147 .clk = &mstp_clks[12],
148 },
149};
150
116int __init arch_clk_init(void) 151int __init arch_clk_init(void)
117{ 152{
118 int i, ret = 0; 153 int i, ret = 0;
119 154
120 for (i = 0; i < ARRAY_SIZE(clks); i++) 155 for (i = 0; i < ARRAY_SIZE(clks); i++)
121 ret |= clk_register(clks[i]); 156 ret |= clk_register(clks[i]);
157 for (i = 0; i < ARRAY_SIZE(lookups); i++)
158 clkdev_add(&lookups[i]);
122 159
123 if (!ret) 160 if (!ret)
124 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 161 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index af69fd468703..c4a84bb2f3d9 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -13,6 +13,8 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/clk.h>
17#include <asm/clkdev.h>
16#include <asm/clock.h> 18#include <asm/clock.h>
17#include <asm/freq.h> 19#include <asm/freq.h>
18 20
@@ -87,12 +89,12 @@ struct clk div4_clks[DIV4_NR] = {
87 89
88static struct clk mstp_clks[] = { 90static struct clk mstp_clks[] = {
89 /* MSTPCR0 */ 91 /* MSTPCR0 */
90 SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0), 92 SH_CLK_MSTP32("sci_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
91 SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0), 93 SH_CLK_MSTP32("sci_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
92 SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0), 94 SH_CLK_MSTP32("sci_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
93 SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0), 95 SH_CLK_MSTP32("sci_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
94 SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0), 96 SH_CLK_MSTP32("sci_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
95 SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0), 97 SH_CLK_MSTP32("sci_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
96 SH_CLK_MSTP32("ssi_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 23, 0), 98 SH_CLK_MSTP32("ssi_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 23, 0),
97 SH_CLK_MSTP32("ssi_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 22, 0), 99 SH_CLK_MSTP32("ssi_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 22, 0),
98 SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0), 100 SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0),
@@ -120,12 +122,78 @@ static struct clk mstp_clks[] = {
120 SH_CLK_MSTP32("ether_fck", -1, NULL, MSTPCR1, 2, 0), 122 SH_CLK_MSTP32("ether_fck", -1, NULL, MSTPCR1, 2, 0),
121}; 123};
122 124
125static struct clk_lookup lookups[] = {
126 {
127 /* TMU0 */
128 .dev_id = "sh_tmu.0",
129 .con_id = "tmu_fck",
130 .clk = &mstp_clks[17], /* tmu012_fck */
131 }, {
132 /* TMU1 */
133 .dev_id = "sh_tmu.1",
134 .con_id = "tmu_fck",
135 .clk = &mstp_clks[17],
136 }, {
137 /* TMU2 */
138 .dev_id = "sh_tmu.2",
139 .con_id = "tmu_fck",
140 .clk = &mstp_clks[17],
141 }, {
142 /* TMU3 */
143 .dev_id = "sh_tmu.3",
144 .con_id = "tmu_fck",
145 .clk = &mstp_clks[16], /* tmu345_fck */
146 }, {
147 /* TMU4 */
148 .dev_id = "sh_tmu.4",
149 .con_id = "tmu_fck",
150 .clk = &mstp_clks[16],
151 }, {
152 /* TMU5 */
153 .dev_id = "sh_tmu.5",
154 .con_id = "tmu_fck",
155 .clk = &mstp_clks[16],
156 }, {
157 /* TMU6 */
158 .dev_id = "sh_tmu.6",
159 .con_id = "tmu_fck",
160 .clk = &mstp_clks[15], /* tmu678_fck */
161 }, {
162 /* TMU7 */
163 .dev_id = "sh_tmu.7",
164 .con_id = "tmu_fck",
165 .clk = &mstp_clks[15],
166 }, {
167 /* TMU8 */
168 .dev_id = "sh_tmu.8",
169 .con_id = "tmu_fck",
170 .clk = &mstp_clks[15],
171 }, {
172 /* TMU9 */
173 .dev_id = "sh_tmu.9",
174 .con_id = "tmu_fck",
175 .clk = &mstp_clks[14], /* tmu9_11_fck */
176 }, {
177 /* TMU10 */
178 .dev_id = "sh_tmu.10",
179 .con_id = "tmu_fck",
180 .clk = &mstp_clks[14],
181 }, {
182 /* TMU11 */
183 .dev_id = "sh_tmu.11",
184 .con_id = "tmu_fck",
185 .clk = &mstp_clks[14],
186 }
187};
188
123int __init arch_clk_init(void) 189int __init arch_clk_init(void)
124{ 190{
125 int i, ret = 0; 191 int i, ret = 0;
126 192
127 for (i = 0; i < ARRAY_SIZE(clks); i++) 193 for (i = 0; i < ARRAY_SIZE(clks); i++)
128 ret |= clk_register(clks[i]); 194 ret |= clk_register(clks[i]);
195 for (i = 0; i < ARRAY_SIZE(lookups); i++)
196 clkdev_add(&lookups[i]);
129 197
130 if (!ret) 198 if (!ret)
131 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 199 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 45eb1bfd42c9..3681cafdb4af 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -21,7 +21,6 @@ static struct plat_sci_port scif0_platform_data = {
21 .flags = UPF_BOOT_AUTOCONF, 21 .flags = UPF_BOOT_AUTOCONF,
22 .type = PORT_SCIF, 22 .type = PORT_SCIF,
23 .irqs = { 80, 80, 80, 80 }, 23 .irqs = { 80, 80, 80, 80 },
24 .clk = "scif0",
25}; 24};
26 25
27static struct platform_device scif0_device = { 26static struct platform_device scif0_device = {
@@ -37,7 +36,6 @@ static struct plat_sci_port scif1_platform_data = {
37 .flags = UPF_BOOT_AUTOCONF, 36 .flags = UPF_BOOT_AUTOCONF,
38 .type = PORT_SCIF, 37 .type = PORT_SCIF,
39 .irqs = { 81, 81, 81, 81 }, 38 .irqs = { 81, 81, 81, 81 },
40 .clk = "scif1",
41}; 39};
42 40
43static struct platform_device scif1_device = { 41static struct platform_device scif1_device = {
@@ -53,7 +51,6 @@ static struct plat_sci_port scif2_platform_data = {
53 .flags = UPF_BOOT_AUTOCONF, 51 .flags = UPF_BOOT_AUTOCONF,
54 .type = PORT_SCIF, 52 .type = PORT_SCIF,
55 .irqs = { 82, 82, 82, 82 }, 53 .irqs = { 82, 82, 82, 82 },
56 .clk = "scif2",
57}; 54};
58 55
59static struct platform_device scif2_device = { 56static struct platform_device scif2_device = {
@@ -69,7 +66,6 @@ static struct plat_sci_port scif3_platform_data = {
69 .flags = UPF_BOOT_AUTOCONF, 66 .flags = UPF_BOOT_AUTOCONF,
70 .type = PORT_SCIF, 67 .type = PORT_SCIF,
71 .irqs = { 83, 83, 83, 83 }, 68 .irqs = { 83, 83, 83, 83 },
72 .clk = "scif3",
73}; 69};
74 70
75static struct platform_device scif3_device = { 71static struct platform_device scif3_device = {
@@ -207,17 +203,14 @@ static struct platform_device jpu_device = {
207}; 203};
208 204
209static struct sh_timer_config cmt_platform_data = { 205static struct sh_timer_config cmt_platform_data = {
210 .name = "CMT",
211 .channel_offset = 0x60, 206 .channel_offset = 0x60,
212 .timer_bit = 5, 207 .timer_bit = 5,
213 .clk = "cmt0",
214 .clockevent_rating = 125, 208 .clockevent_rating = 125,
215 .clocksource_rating = 200, 209 .clocksource_rating = 200,
216}; 210};
217 211
218static struct resource cmt_resources[] = { 212static struct resource cmt_resources[] = {
219 [0] = { 213 [0] = {
220 .name = "CMT",
221 .start = 0x044a0060, 214 .start = 0x044a0060,
222 .end = 0x044a006b, 215 .end = 0x044a006b,
223 .flags = IORESOURCE_MEM, 216 .flags = IORESOURCE_MEM,
@@ -239,16 +232,13 @@ static struct platform_device cmt_device = {
239}; 232};
240 233
241static struct sh_timer_config tmu0_platform_data = { 234static struct sh_timer_config tmu0_platform_data = {
242 .name = "TMU0",
243 .channel_offset = 0x04, 235 .channel_offset = 0x04,
244 .timer_bit = 0, 236 .timer_bit = 0,
245 .clk = "tmu0",
246 .clockevent_rating = 200, 237 .clockevent_rating = 200,
247}; 238};
248 239
249static struct resource tmu0_resources[] = { 240static struct resource tmu0_resources[] = {
250 [0] = { 241 [0] = {
251 .name = "TMU0",
252 .start = 0xffd80008, 242 .start = 0xffd80008,
253 .end = 0xffd80013, 243 .end = 0xffd80013,
254 .flags = IORESOURCE_MEM, 244 .flags = IORESOURCE_MEM,
@@ -270,16 +260,13 @@ static struct platform_device tmu0_device = {
270}; 260};
271 261
272static struct sh_timer_config tmu1_platform_data = { 262static struct sh_timer_config tmu1_platform_data = {
273 .name = "TMU1",
274 .channel_offset = 0x10, 263 .channel_offset = 0x10,
275 .timer_bit = 1, 264 .timer_bit = 1,
276 .clk = "tmu0",
277 .clocksource_rating = 200, 265 .clocksource_rating = 200,
278}; 266};
279 267
280static struct resource tmu1_resources[] = { 268static struct resource tmu1_resources[] = {
281 [0] = { 269 [0] = {
282 .name = "TMU1",
283 .start = 0xffd80014, 270 .start = 0xffd80014,
284 .end = 0xffd8001f, 271 .end = 0xffd8001f,
285 .flags = IORESOURCE_MEM, 272 .flags = IORESOURCE_MEM,
@@ -301,15 +288,12 @@ static struct platform_device tmu1_device = {
301}; 288};
302 289
303static struct sh_timer_config tmu2_platform_data = { 290static struct sh_timer_config tmu2_platform_data = {
304 .name = "TMU2",
305 .channel_offset = 0x1c, 291 .channel_offset = 0x1c,
306 .timer_bit = 2, 292 .timer_bit = 2,
307 .clk = "tmu0",
308}; 293};
309 294
310static struct resource tmu2_resources[] = { 295static struct resource tmu2_resources[] = {
311 [0] = { 296 [0] = {
312 .name = "TMU2",
313 .start = 0xffd80020, 297 .start = 0xffd80020,
314 .end = 0xffd8002b, 298 .end = 0xffd8002b,
315 .flags = IORESOURCE_MEM, 299 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index c494c193e3b6..8dab9e1bbd89 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -23,7 +23,6 @@ static struct plat_sci_port scif0_platform_data = {
23 .flags = UPF_BOOT_AUTOCONF, 23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF, 24 .type = PORT_SCIF,
25 .irqs = { 80, 80, 80, 80 }, 25 .irqs = { 80, 80, 80, 80 },
26 .clk = "scif0",
27}; 26};
28 27
29static struct platform_device scif0_device = { 28static struct platform_device scif0_device = {
@@ -169,17 +168,14 @@ static struct platform_device veu1_device = {
169}; 168};
170 169
171static struct sh_timer_config cmt_platform_data = { 170static struct sh_timer_config cmt_platform_data = {
172 .name = "CMT",
173 .channel_offset = 0x60, 171 .channel_offset = 0x60,
174 .timer_bit = 5, 172 .timer_bit = 5,
175 .clk = "cmt0",
176 .clockevent_rating = 125, 173 .clockevent_rating = 125,
177 .clocksource_rating = 200, 174 .clocksource_rating = 200,
178}; 175};
179 176
180static struct resource cmt_resources[] = { 177static struct resource cmt_resources[] = {
181 [0] = { 178 [0] = {
182 .name = "CMT",
183 .start = 0x044a0060, 179 .start = 0x044a0060,
184 .end = 0x044a006b, 180 .end = 0x044a006b,
185 .flags = IORESOURCE_MEM, 181 .flags = IORESOURCE_MEM,
@@ -201,16 +197,13 @@ static struct platform_device cmt_device = {
201}; 197};
202 198
203static struct sh_timer_config tmu0_platform_data = { 199static struct sh_timer_config tmu0_platform_data = {
204 .name = "TMU0",
205 .channel_offset = 0x04, 200 .channel_offset = 0x04,
206 .timer_bit = 0, 201 .timer_bit = 0,
207 .clk = "tmu0",
208 .clockevent_rating = 200, 202 .clockevent_rating = 200,
209}; 203};
210 204
211static struct resource tmu0_resources[] = { 205static struct resource tmu0_resources[] = {
212 [0] = { 206 [0] = {
213 .name = "TMU0",
214 .start = 0xffd80008, 207 .start = 0xffd80008,
215 .end = 0xffd80013, 208 .end = 0xffd80013,
216 .flags = IORESOURCE_MEM, 209 .flags = IORESOURCE_MEM,
@@ -232,16 +225,13 @@ static struct platform_device tmu0_device = {
232}; 225};
233 226
234static struct sh_timer_config tmu1_platform_data = { 227static struct sh_timer_config tmu1_platform_data = {
235 .name = "TMU1",
236 .channel_offset = 0x10, 228 .channel_offset = 0x10,
237 .timer_bit = 1, 229 .timer_bit = 1,
238 .clk = "tmu0",
239 .clocksource_rating = 200, 230 .clocksource_rating = 200,
240}; 231};
241 232
242static struct resource tmu1_resources[] = { 233static struct resource tmu1_resources[] = {
243 [0] = { 234 [0] = {
244 .name = "TMU1",
245 .start = 0xffd80014, 235 .start = 0xffd80014,
246 .end = 0xffd8001f, 236 .end = 0xffd8001f,
247 .flags = IORESOURCE_MEM, 237 .flags = IORESOURCE_MEM,
@@ -263,15 +253,12 @@ static struct platform_device tmu1_device = {
263}; 253};
264 254
265static struct sh_timer_config tmu2_platform_data = { 255static struct sh_timer_config tmu2_platform_data = {
266 .name = "TMU2",
267 .channel_offset = 0x1c, 256 .channel_offset = 0x1c,
268 .timer_bit = 2, 257 .timer_bit = 2,
269 .clk = "tmu0",
270}; 258};
271 259
272static struct resource tmu2_resources[] = { 260static struct resource tmu2_resources[] = {
273 [0] = { 261 [0] = {
274 .name = "TMU2",
275 .start = 0xffd80020, 262 .start = 0xffd80020,
276 .end = 0xffd8002b, 263 .end = 0xffd8002b,
277 .flags = IORESOURCE_MEM, 264 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index fd7e3639e845..dc9b30d086a4 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -174,7 +174,6 @@ static struct plat_sci_port scif0_platform_data = {
174 .flags = UPF_BOOT_AUTOCONF, 174 .flags = UPF_BOOT_AUTOCONF,
175 .type = PORT_SCIF, 175 .type = PORT_SCIF,
176 .irqs = { 80, 80, 80, 80 }, 176 .irqs = { 80, 80, 80, 80 },
177 .clk = "scif0",
178}; 177};
179 178
180static struct platform_device scif0_device = { 179static struct platform_device scif0_device = {
@@ -190,7 +189,6 @@ static struct plat_sci_port scif1_platform_data = {
190 .flags = UPF_BOOT_AUTOCONF, 189 .flags = UPF_BOOT_AUTOCONF,
191 .type = PORT_SCIF, 190 .type = PORT_SCIF,
192 .irqs = { 81, 81, 81, 81 }, 191 .irqs = { 81, 81, 81, 81 },
193 .clk = "scif1",
194}; 192};
195 193
196static struct platform_device scif1_device = { 194static struct platform_device scif1_device = {
@@ -206,7 +204,6 @@ static struct plat_sci_port scif2_platform_data = {
206 .flags = UPF_BOOT_AUTOCONF, 204 .flags = UPF_BOOT_AUTOCONF,
207 .type = PORT_SCIF, 205 .type = PORT_SCIF,
208 .irqs = { 82, 82, 82, 82 }, 206 .irqs = { 82, 82, 82, 82 },
209 .clk = "scif2",
210}; 207};
211 208
212static struct platform_device scif2_device = { 209static struct platform_device scif2_device = {
@@ -401,17 +398,14 @@ static struct platform_device jpu_device = {
401}; 398};
402 399
403static struct sh_timer_config cmt_platform_data = { 400static struct sh_timer_config cmt_platform_data = {
404 .name = "CMT",
405 .channel_offset = 0x60, 401 .channel_offset = 0x60,
406 .timer_bit = 5, 402 .timer_bit = 5,
407 .clk = "cmt0",
408 .clockevent_rating = 125, 403 .clockevent_rating = 125,
409 .clocksource_rating = 125, 404 .clocksource_rating = 125,
410}; 405};
411 406
412static struct resource cmt_resources[] = { 407static struct resource cmt_resources[] = {
413 [0] = { 408 [0] = {
414 .name = "CMT",
415 .start = 0x044a0060, 409 .start = 0x044a0060,
416 .end = 0x044a006b, 410 .end = 0x044a006b,
417 .flags = IORESOURCE_MEM, 411 .flags = IORESOURCE_MEM,
@@ -436,16 +430,13 @@ static struct platform_device cmt_device = {
436}; 430};
437 431
438static struct sh_timer_config tmu0_platform_data = { 432static struct sh_timer_config tmu0_platform_data = {
439 .name = "TMU0",
440 .channel_offset = 0x04, 433 .channel_offset = 0x04,
441 .timer_bit = 0, 434 .timer_bit = 0,
442 .clk = "tmu0",
443 .clockevent_rating = 200, 435 .clockevent_rating = 200,
444}; 436};
445 437
446static struct resource tmu0_resources[] = { 438static struct resource tmu0_resources[] = {
447 [0] = { 439 [0] = {
448 .name = "TMU0",
449 .start = 0xffd80008, 440 .start = 0xffd80008,
450 .end = 0xffd80013, 441 .end = 0xffd80013,
451 .flags = IORESOURCE_MEM, 442 .flags = IORESOURCE_MEM,
@@ -470,16 +461,13 @@ static struct platform_device tmu0_device = {
470}; 461};
471 462
472static struct sh_timer_config tmu1_platform_data = { 463static struct sh_timer_config tmu1_platform_data = {
473 .name = "TMU1",
474 .channel_offset = 0x10, 464 .channel_offset = 0x10,
475 .timer_bit = 1, 465 .timer_bit = 1,
476 .clk = "tmu0",
477 .clocksource_rating = 200, 466 .clocksource_rating = 200,
478}; 467};
479 468
480static struct resource tmu1_resources[] = { 469static struct resource tmu1_resources[] = {
481 [0] = { 470 [0] = {
482 .name = "TMU1",
483 .start = 0xffd80014, 471 .start = 0xffd80014,
484 .end = 0xffd8001f, 472 .end = 0xffd8001f,
485 .flags = IORESOURCE_MEM, 473 .flags = IORESOURCE_MEM,
@@ -504,15 +492,12 @@ static struct platform_device tmu1_device = {
504}; 492};
505 493
506static struct sh_timer_config tmu2_platform_data = { 494static struct sh_timer_config tmu2_platform_data = {
507 .name = "TMU2",
508 .channel_offset = 0x1c, 495 .channel_offset = 0x1c,
509 .timer_bit = 2, 496 .timer_bit = 2,
510 .clk = "tmu0",
511}; 497};
512 498
513static struct resource tmu2_resources[] = { 499static struct resource tmu2_resources[] = {
514 [0] = { 500 [0] = {
515 .name = "TMU2",
516 .start = 0xffd80020, 501 .start = 0xffd80020,
517 .end = 0xffd8002b, 502 .end = 0xffd8002b,
518 .flags = IORESOURCE_MEM, 503 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 85c61f624702..0eadefdbbba1 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -26,7 +26,6 @@ static struct plat_sci_port scif0_platform_data = {
26 .flags = UPF_BOOT_AUTOCONF, 26 .flags = UPF_BOOT_AUTOCONF,
27 .type = PORT_SCIF, 27 .type = PORT_SCIF,
28 .irqs = { 80, 80, 80, 80 }, 28 .irqs = { 80, 80, 80, 80 },
29 .clk = "scif0",
30}; 29};
31 30
32static struct platform_device scif0_device = { 31static struct platform_device scif0_device = {
@@ -42,7 +41,6 @@ static struct plat_sci_port scif1_platform_data = {
42 .flags = UPF_BOOT_AUTOCONF, 41 .flags = UPF_BOOT_AUTOCONF,
43 .type = PORT_SCIF, 42 .type = PORT_SCIF,
44 .irqs = { 81, 81, 81, 81 }, 43 .irqs = { 81, 81, 81, 81 },
45 .clk = "scif1",
46}; 44};
47 45
48static struct platform_device scif1_device = { 46static struct platform_device scif1_device = {
@@ -58,7 +56,6 @@ static struct plat_sci_port scif2_platform_data = {
58 .flags = UPF_BOOT_AUTOCONF, 56 .flags = UPF_BOOT_AUTOCONF,
59 .type = PORT_SCIF, 57 .type = PORT_SCIF,
60 .irqs = { 82, 82, 82, 82 }, 58 .irqs = { 82, 82, 82, 82 },
61 .clk = "scif2",
62}; 59};
63 60
64static struct platform_device scif2_device = { 61static struct platform_device scif2_device = {
@@ -74,7 +71,6 @@ static struct plat_sci_port scif3_platform_data = {
74 .flags = UPF_BOOT_AUTOCONF, 71 .flags = UPF_BOOT_AUTOCONF,
75 .type = PORT_SCIFA, 72 .type = PORT_SCIFA,
76 .irqs = { 56, 56, 56, 56 }, 73 .irqs = { 56, 56, 56, 56 },
77 .clk = "scif3",
78}; 74};
79 75
80static struct platform_device scif3_device = { 76static struct platform_device scif3_device = {
@@ -90,7 +86,6 @@ static struct plat_sci_port scif4_platform_data = {
90 .flags = UPF_BOOT_AUTOCONF, 86 .flags = UPF_BOOT_AUTOCONF,
91 .type = PORT_SCIFA, 87 .type = PORT_SCIFA,
92 .irqs = { 88, 88, 88, 88 }, 88 .irqs = { 88, 88, 88, 88 },
93 .clk = "scif4",
94}; 89};
95 90
96static struct platform_device scif4_device = { 91static struct platform_device scif4_device = {
@@ -106,7 +101,6 @@ static struct plat_sci_port scif5_platform_data = {
106 .flags = UPF_BOOT_AUTOCONF, 101 .flags = UPF_BOOT_AUTOCONF,
107 .type = PORT_SCIFA, 102 .type = PORT_SCIFA,
108 .irqs = { 109, 109, 109, 109 }, 103 .irqs = { 109, 109, 109, 109 },
109 .clk = "scif5",
110}; 104};
111 105
112static struct platform_device scif5_device = { 106static struct platform_device scif5_device = {
@@ -211,17 +205,14 @@ static struct platform_device veu1_device = {
211}; 205};
212 206
213static struct sh_timer_config cmt_platform_data = { 207static struct sh_timer_config cmt_platform_data = {
214 .name = "CMT",
215 .channel_offset = 0x60, 208 .channel_offset = 0x60,
216 .timer_bit = 5, 209 .timer_bit = 5,
217 .clk = "cmt0",
218 .clockevent_rating = 125, 210 .clockevent_rating = 125,
219 .clocksource_rating = 125, 211 .clocksource_rating = 125,
220}; 212};
221 213
222static struct resource cmt_resources[] = { 214static struct resource cmt_resources[] = {
223 [0] = { 215 [0] = {
224 .name = "CMT",
225 .start = 0x044a0060, 216 .start = 0x044a0060,
226 .end = 0x044a006b, 217 .end = 0x044a006b,
227 .flags = IORESOURCE_MEM, 218 .flags = IORESOURCE_MEM,
@@ -246,16 +237,13 @@ static struct platform_device cmt_device = {
246}; 237};
247 238
248static struct sh_timer_config tmu0_platform_data = { 239static struct sh_timer_config tmu0_platform_data = {
249 .name = "TMU0",
250 .channel_offset = 0x04, 240 .channel_offset = 0x04,
251 .timer_bit = 0, 241 .timer_bit = 0,
252 .clk = "tmu0",
253 .clockevent_rating = 200, 242 .clockevent_rating = 200,
254}; 243};
255 244
256static struct resource tmu0_resources[] = { 245static struct resource tmu0_resources[] = {
257 [0] = { 246 [0] = {
258 .name = "TMU0",
259 .start = 0xffd80008, 247 .start = 0xffd80008,
260 .end = 0xffd80013, 248 .end = 0xffd80013,
261 .flags = IORESOURCE_MEM, 249 .flags = IORESOURCE_MEM,
@@ -280,16 +268,13 @@ static struct platform_device tmu0_device = {
280}; 268};
281 269
282static struct sh_timer_config tmu1_platform_data = { 270static struct sh_timer_config tmu1_platform_data = {
283 .name = "TMU1",
284 .channel_offset = 0x10, 271 .channel_offset = 0x10,
285 .timer_bit = 1, 272 .timer_bit = 1,
286 .clk = "tmu0",
287 .clocksource_rating = 200, 273 .clocksource_rating = 200,
288}; 274};
289 275
290static struct resource tmu1_resources[] = { 276static struct resource tmu1_resources[] = {
291 [0] = { 277 [0] = {
292 .name = "TMU1",
293 .start = 0xffd80014, 278 .start = 0xffd80014,
294 .end = 0xffd8001f, 279 .end = 0xffd8001f,
295 .flags = IORESOURCE_MEM, 280 .flags = IORESOURCE_MEM,
@@ -314,15 +299,12 @@ static struct platform_device tmu1_device = {
314}; 299};
315 300
316static struct sh_timer_config tmu2_platform_data = { 301static struct sh_timer_config tmu2_platform_data = {
317 .name = "TMU2",
318 .channel_offset = 0x1c, 302 .channel_offset = 0x1c,
319 .timer_bit = 2, 303 .timer_bit = 2,
320 .clk = "tmu0",
321}; 304};
322 305
323static struct resource tmu2_resources[] = { 306static struct resource tmu2_resources[] = {
324 [0] = { 307 [0] = {
325 .name = "TMU2",
326 .start = 0xffd80020, 308 .start = 0xffd80020,
327 .end = 0xffd8002b, 309 .end = 0xffd8002b,
328 .flags = IORESOURCE_MEM, 310 .flags = IORESOURCE_MEM,
@@ -347,15 +329,12 @@ static struct platform_device tmu2_device = {
347}; 329};
348 330
349static struct sh_timer_config tmu3_platform_data = { 331static struct sh_timer_config tmu3_platform_data = {
350 .name = "TMU3",
351 .channel_offset = 0x04, 332 .channel_offset = 0x04,
352 .timer_bit = 0, 333 .timer_bit = 0,
353 .clk = "tmu1",
354}; 334};
355 335
356static struct resource tmu3_resources[] = { 336static struct resource tmu3_resources[] = {
357 [0] = { 337 [0] = {
358 .name = "TMU3",
359 .start = 0xffd90008, 338 .start = 0xffd90008,
360 .end = 0xffd90013, 339 .end = 0xffd90013,
361 .flags = IORESOURCE_MEM, 340 .flags = IORESOURCE_MEM,
@@ -380,15 +359,12 @@ static struct platform_device tmu3_device = {
380}; 359};
381 360
382static struct sh_timer_config tmu4_platform_data = { 361static struct sh_timer_config tmu4_platform_data = {
383 .name = "TMU4",
384 .channel_offset = 0x10, 362 .channel_offset = 0x10,
385 .timer_bit = 1, 363 .timer_bit = 1,
386 .clk = "tmu1",
387}; 364};
388 365
389static struct resource tmu4_resources[] = { 366static struct resource tmu4_resources[] = {
390 [0] = { 367 [0] = {
391 .name = "TMU4",
392 .start = 0xffd90014, 368 .start = 0xffd90014,
393 .end = 0xffd9001f, 369 .end = 0xffd9001f,
394 .flags = IORESOURCE_MEM, 370 .flags = IORESOURCE_MEM,
@@ -413,15 +389,12 @@ static struct platform_device tmu4_device = {
413}; 389};
414 390
415static struct sh_timer_config tmu5_platform_data = { 391static struct sh_timer_config tmu5_platform_data = {
416 .name = "TMU5",
417 .channel_offset = 0x1c, 392 .channel_offset = 0x1c,
418 .timer_bit = 2, 393 .timer_bit = 2,
419 .clk = "tmu1",
420}; 394};
421 395
422static struct resource tmu5_resources[] = { 396static struct resource tmu5_resources[] = {
423 [0] = { 397 [0] = {
424 .name = "TMU5",
425 .start = 0xffd90020, 398 .start = 0xffd90020,
426 .end = 0xffd9002b, 399 .end = 0xffd9002b,
427 .flags = IORESOURCE_MEM, 400 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index e7fa2a92fc1f..8a0a4a99f86b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -213,7 +213,6 @@ static struct plat_sci_port scif0_platform_data = {
213 .flags = UPF_BOOT_AUTOCONF, 213 .flags = UPF_BOOT_AUTOCONF,
214 .type = PORT_SCIF, 214 .type = PORT_SCIF,
215 .irqs = { 80, 80, 80, 80 }, 215 .irqs = { 80, 80, 80, 80 },
216 .clk = "scif0",
217}; 216};
218 217
219static struct platform_device scif0_device = { 218static struct platform_device scif0_device = {
@@ -229,7 +228,6 @@ static struct plat_sci_port scif1_platform_data = {
229 .flags = UPF_BOOT_AUTOCONF, 228 .flags = UPF_BOOT_AUTOCONF,
230 .type = PORT_SCIF, 229 .type = PORT_SCIF,
231 .irqs = { 81, 81, 81, 81 }, 230 .irqs = { 81, 81, 81, 81 },
232 .clk = "scif1",
233}; 231};
234 232
235static struct platform_device scif1_device = { 233static struct platform_device scif1_device = {
@@ -245,7 +243,6 @@ static struct plat_sci_port scif2_platform_data = {
245 .flags = UPF_BOOT_AUTOCONF, 243 .flags = UPF_BOOT_AUTOCONF,
246 .type = PORT_SCIF, 244 .type = PORT_SCIF,
247 .irqs = { 82, 82, 82, 82 }, 245 .irqs = { 82, 82, 82, 82 },
248 .clk = "scif2",
249}; 246};
250 247
251static struct platform_device scif2_device = { 248static struct platform_device scif2_device = {
@@ -261,7 +258,6 @@ static struct plat_sci_port scif3_platform_data = {
261 .flags = UPF_BOOT_AUTOCONF, 258 .flags = UPF_BOOT_AUTOCONF,
262 .type = PORT_SCIFA, 259 .type = PORT_SCIFA,
263 .irqs = { 56, 56, 56, 56 }, 260 .irqs = { 56, 56, 56, 56 },
264 .clk = "scif3",
265}; 261};
266 262
267static struct platform_device scif3_device = { 263static struct platform_device scif3_device = {
@@ -277,7 +273,6 @@ static struct plat_sci_port scif4_platform_data = {
277 .flags = UPF_BOOT_AUTOCONF, 273 .flags = UPF_BOOT_AUTOCONF,
278 .type = PORT_SCIFA, 274 .type = PORT_SCIFA,
279 .irqs = { 88, 88, 88, 88 }, 275 .irqs = { 88, 88, 88, 88 },
280 .clk = "scif4",
281}; 276};
282 277
283static struct platform_device scif4_device = { 278static struct platform_device scif4_device = {
@@ -293,7 +288,6 @@ static struct plat_sci_port scif5_platform_data = {
293 .flags = UPF_BOOT_AUTOCONF, 288 .flags = UPF_BOOT_AUTOCONF,
294 .type = PORT_SCIFA, 289 .type = PORT_SCIFA,
295 .irqs = { 109, 109, 109, 109 }, 290 .irqs = { 109, 109, 109, 109 },
296 .clk = "scif5",
297}; 291};
298 292
299static struct platform_device scif5_device = { 293static struct platform_device scif5_device = {
@@ -485,17 +479,14 @@ static struct platform_device veu1_device = {
485}; 479};
486 480
487static struct sh_timer_config cmt_platform_data = { 481static struct sh_timer_config cmt_platform_data = {
488 .name = "CMT",
489 .channel_offset = 0x60, 482 .channel_offset = 0x60,
490 .timer_bit = 5, 483 .timer_bit = 5,
491 .clk = "cmt0",
492 .clockevent_rating = 125, 484 .clockevent_rating = 125,
493 .clocksource_rating = 200, 485 .clocksource_rating = 200,
494}; 486};
495 487
496static struct resource cmt_resources[] = { 488static struct resource cmt_resources[] = {
497 [0] = { 489 [0] = {
498 .name = "CMT",
499 .start = 0x044a0060, 490 .start = 0x044a0060,
500 .end = 0x044a006b, 491 .end = 0x044a006b,
501 .flags = IORESOURCE_MEM, 492 .flags = IORESOURCE_MEM,
@@ -520,16 +511,13 @@ static struct platform_device cmt_device = {
520}; 511};
521 512
522static struct sh_timer_config tmu0_platform_data = { 513static struct sh_timer_config tmu0_platform_data = {
523 .name = "TMU0",
524 .channel_offset = 0x04, 514 .channel_offset = 0x04,
525 .timer_bit = 0, 515 .timer_bit = 0,
526 .clk = "tmu0",
527 .clockevent_rating = 200, 516 .clockevent_rating = 200,
528}; 517};
529 518
530static struct resource tmu0_resources[] = { 519static struct resource tmu0_resources[] = {
531 [0] = { 520 [0] = {
532 .name = "TMU0",
533 .start = 0xffd80008, 521 .start = 0xffd80008,
534 .end = 0xffd80013, 522 .end = 0xffd80013,
535 .flags = IORESOURCE_MEM, 523 .flags = IORESOURCE_MEM,
@@ -554,16 +542,13 @@ static struct platform_device tmu0_device = {
554}; 542};
555 543
556static struct sh_timer_config tmu1_platform_data = { 544static struct sh_timer_config tmu1_platform_data = {
557 .name = "TMU1",
558 .channel_offset = 0x10, 545 .channel_offset = 0x10,
559 .timer_bit = 1, 546 .timer_bit = 1,
560 .clk = "tmu0",
561 .clocksource_rating = 200, 547 .clocksource_rating = 200,
562}; 548};
563 549
564static struct resource tmu1_resources[] = { 550static struct resource tmu1_resources[] = {
565 [0] = { 551 [0] = {
566 .name = "TMU1",
567 .start = 0xffd80014, 552 .start = 0xffd80014,
568 .end = 0xffd8001f, 553 .end = 0xffd8001f,
569 .flags = IORESOURCE_MEM, 554 .flags = IORESOURCE_MEM,
@@ -588,15 +573,12 @@ static struct platform_device tmu1_device = {
588}; 573};
589 574
590static struct sh_timer_config tmu2_platform_data = { 575static struct sh_timer_config tmu2_platform_data = {
591 .name = "TMU2",
592 .channel_offset = 0x1c, 576 .channel_offset = 0x1c,
593 .timer_bit = 2, 577 .timer_bit = 2,
594 .clk = "tmu0",
595}; 578};
596 579
597static struct resource tmu2_resources[] = { 580static struct resource tmu2_resources[] = {
598 [0] = { 581 [0] = {
599 .name = "TMU2",
600 .start = 0xffd80020, 582 .start = 0xffd80020,
601 .end = 0xffd8002b, 583 .end = 0xffd8002b,
602 .flags = IORESOURCE_MEM, 584 .flags = IORESOURCE_MEM,
@@ -622,15 +604,12 @@ static struct platform_device tmu2_device = {
622 604
623 605
624static struct sh_timer_config tmu3_platform_data = { 606static struct sh_timer_config tmu3_platform_data = {
625 .name = "TMU3",
626 .channel_offset = 0x04, 607 .channel_offset = 0x04,
627 .timer_bit = 0, 608 .timer_bit = 0,
628 .clk = "tmu1",
629}; 609};
630 610
631static struct resource tmu3_resources[] = { 611static struct resource tmu3_resources[] = {
632 [0] = { 612 [0] = {
633 .name = "TMU3",
634 .start = 0xffd90008, 613 .start = 0xffd90008,
635 .end = 0xffd90013, 614 .end = 0xffd90013,
636 .flags = IORESOURCE_MEM, 615 .flags = IORESOURCE_MEM,
@@ -655,15 +634,12 @@ static struct platform_device tmu3_device = {
655}; 634};
656 635
657static struct sh_timer_config tmu4_platform_data = { 636static struct sh_timer_config tmu4_platform_data = {
658 .name = "TMU4",
659 .channel_offset = 0x10, 637 .channel_offset = 0x10,
660 .timer_bit = 1, 638 .timer_bit = 1,
661 .clk = "tmu1",
662}; 639};
663 640
664static struct resource tmu4_resources[] = { 641static struct resource tmu4_resources[] = {
665 [0] = { 642 [0] = {
666 .name = "TMU4",
667 .start = 0xffd90014, 643 .start = 0xffd90014,
668 .end = 0xffd9001f, 644 .end = 0xffd9001f,
669 .flags = IORESOURCE_MEM, 645 .flags = IORESOURCE_MEM,
@@ -688,15 +664,12 @@ static struct platform_device tmu4_device = {
688}; 664};
689 665
690static struct sh_timer_config tmu5_platform_data = { 666static struct sh_timer_config tmu5_platform_data = {
691 .name = "TMU5",
692 .channel_offset = 0x1c, 667 .channel_offset = 0x1c,
693 .timer_bit = 2, 668 .timer_bit = 2,
694 .clk = "tmu1",
695}; 669};
696 670
697static struct resource tmu5_resources[] = { 671static struct resource tmu5_resources[] = {
698 [0] = { 672 [0] = {
699 .name = "TMU5",
700 .start = 0xffd90020, 673 .start = 0xffd90020,
701 .end = 0xffd9002b, 674 .end = 0xffd9002b,
702 .flags = IORESOURCE_MEM, 675 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index e75edf58796a..444aca95b20d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -63,16 +63,13 @@ static struct platform_device scif4_device = {
63}; 63};
64 64
65static struct sh_timer_config tmu0_platform_data = { 65static struct sh_timer_config tmu0_platform_data = {
66 .name = "TMU0",
67 .channel_offset = 0x04, 66 .channel_offset = 0x04,
68 .timer_bit = 0, 67 .timer_bit = 0,
69 .clk = "peripheral_clk",
70 .clockevent_rating = 200, 68 .clockevent_rating = 200,
71}; 69};
72 70
73static struct resource tmu0_resources[] = { 71static struct resource tmu0_resources[] = {
74 [0] = { 72 [0] = {
75 .name = "TMU0",
76 .start = 0xfe430008, 73 .start = 0xfe430008,
77 .end = 0xfe430013, 74 .end = 0xfe430013,
78 .flags = IORESOURCE_MEM, 75 .flags = IORESOURCE_MEM,
@@ -94,16 +91,13 @@ static struct platform_device tmu0_device = {
94}; 91};
95 92
96static struct sh_timer_config tmu1_platform_data = { 93static struct sh_timer_config tmu1_platform_data = {
97 .name = "TMU1",
98 .channel_offset = 0x10, 94 .channel_offset = 0x10,
99 .timer_bit = 1, 95 .timer_bit = 1,
100 .clk = "peripheral_clk",
101 .clocksource_rating = 200, 96 .clocksource_rating = 200,
102}; 97};
103 98
104static struct resource tmu1_resources[] = { 99static struct resource tmu1_resources[] = {
105 [0] = { 100 [0] = {
106 .name = "TMU1",
107 .start = 0xfe430014, 101 .start = 0xfe430014,
108 .end = 0xfe43001f, 102 .end = 0xfe43001f,
109 .flags = IORESOURCE_MEM, 103 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 7f6b0a5f7f82..5b5f6b005fc5 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -131,16 +131,13 @@ static struct platform_device usbf_device = {
131}; 131};
132 132
133static struct sh_timer_config tmu0_platform_data = { 133static struct sh_timer_config tmu0_platform_data = {
134 .name = "TMU0",
135 .channel_offset = 0x04, 134 .channel_offset = 0x04,
136 .timer_bit = 0, 135 .timer_bit = 0,
137 .clk = "peripheral_clk",
138 .clockevent_rating = 200, 136 .clockevent_rating = 200,
139}; 137};
140 138
141static struct resource tmu0_resources[] = { 139static struct resource tmu0_resources[] = {
142 [0] = { 140 [0] = {
143 .name = "TMU0",
144 .start = 0xffd80008, 141 .start = 0xffd80008,
145 .end = 0xffd80013, 142 .end = 0xffd80013,
146 .flags = IORESOURCE_MEM, 143 .flags = IORESOURCE_MEM,
@@ -162,16 +159,13 @@ static struct platform_device tmu0_device = {
162}; 159};
163 160
164static struct sh_timer_config tmu1_platform_data = { 161static struct sh_timer_config tmu1_platform_data = {
165 .name = "TMU1",
166 .channel_offset = 0x10, 162 .channel_offset = 0x10,
167 .timer_bit = 1, 163 .timer_bit = 1,
168 .clk = "peripheral_clk",
169 .clocksource_rating = 200, 164 .clocksource_rating = 200,
170}; 165};
171 166
172static struct resource tmu1_resources[] = { 167static struct resource tmu1_resources[] = {
173 [0] = { 168 [0] = {
174 .name = "TMU1",
175 .start = 0xffd80014, 169 .start = 0xffd80014,
176 .end = 0xffd8001f, 170 .end = 0xffd8001f,
177 .flags = IORESOURCE_MEM, 171 .flags = IORESOURCE_MEM,
@@ -193,15 +187,12 @@ static struct platform_device tmu1_device = {
193}; 187};
194 188
195static struct sh_timer_config tmu2_platform_data = { 189static struct sh_timer_config tmu2_platform_data = {
196 .name = "TMU2",
197 .channel_offset = 0x1c, 190 .channel_offset = 0x1c,
198 .timer_bit = 2, 191 .timer_bit = 2,
199 .clk = "peripheral_clk",
200}; 192};
201 193
202static struct resource tmu2_resources[] = { 194static struct resource tmu2_resources[] = {
203 [0] = { 195 [0] = {
204 .name = "TMU2",
205 .start = 0xffd80020, 196 .start = 0xffd80020,
206 .end = 0xffd8002f, 197 .end = 0xffd8002f,
207 .flags = IORESOURCE_MEM, 198 .flags = IORESOURCE_MEM,
@@ -223,15 +214,12 @@ static struct platform_device tmu2_device = {
223}; 214};
224 215
225static struct sh_timer_config tmu3_platform_data = { 216static struct sh_timer_config tmu3_platform_data = {
226 .name = "TMU3",
227 .channel_offset = 0x04, 217 .channel_offset = 0x04,
228 .timer_bit = 0, 218 .timer_bit = 0,
229 .clk = "peripheral_clk",
230}; 219};
231 220
232static struct resource tmu3_resources[] = { 221static struct resource tmu3_resources[] = {
233 [0] = { 222 [0] = {
234 .name = "TMU3",
235 .start = 0xffd88008, 223 .start = 0xffd88008,
236 .end = 0xffd88013, 224 .end = 0xffd88013,
237 .flags = IORESOURCE_MEM, 225 .flags = IORESOURCE_MEM,
@@ -253,15 +241,12 @@ static struct platform_device tmu3_device = {
253}; 241};
254 242
255static struct sh_timer_config tmu4_platform_data = { 243static struct sh_timer_config tmu4_platform_data = {
256 .name = "TMU4",
257 .channel_offset = 0x10, 244 .channel_offset = 0x10,
258 .timer_bit = 1, 245 .timer_bit = 1,
259 .clk = "peripheral_clk",
260}; 246};
261 247
262static struct resource tmu4_resources[] = { 248static struct resource tmu4_resources[] = {
263 [0] = { 249 [0] = {
264 .name = "TMU4",
265 .start = 0xffd88014, 250 .start = 0xffd88014,
266 .end = 0xffd8801f, 251 .end = 0xffd8801f,
267 .flags = IORESOURCE_MEM, 252 .flags = IORESOURCE_MEM,
@@ -283,15 +268,12 @@ static struct platform_device tmu4_device = {
283}; 268};
284 269
285static struct sh_timer_config tmu5_platform_data = { 270static struct sh_timer_config tmu5_platform_data = {
286 .name = "TMU5",
287 .channel_offset = 0x1c, 271 .channel_offset = 0x1c,
288 .timer_bit = 2, 272 .timer_bit = 2,
289 .clk = "peripheral_clk",
290}; 273};
291 274
292static struct resource tmu5_resources[] = { 275static struct resource tmu5_resources[] = {
293 [0] = { 276 [0] = {
294 .name = "TMU5",
295 .start = 0xffd88020, 277 .start = 0xffd88020,
296 .end = 0xffd8802b, 278 .end = 0xffd8802b,
297 .flags = IORESOURCE_MEM, 279 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 86d681ecf90e..7270d7fd6761 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -165,16 +165,13 @@ static struct platform_device scif9_device = {
165}; 165};
166 166
167static struct sh_timer_config tmu0_platform_data = { 167static struct sh_timer_config tmu0_platform_data = {
168 .name = "TMU0",
169 .channel_offset = 0x04, 168 .channel_offset = 0x04,
170 .timer_bit = 0, 169 .timer_bit = 0,
171 .clk = "peripheral_clk",
172 .clockevent_rating = 200, 170 .clockevent_rating = 200,
173}; 171};
174 172
175static struct resource tmu0_resources[] = { 173static struct resource tmu0_resources[] = {
176 [0] = { 174 [0] = {
177 .name = "TMU0",
178 .start = 0xffd80008, 175 .start = 0xffd80008,
179 .end = 0xffd80013, 176 .end = 0xffd80013,
180 .flags = IORESOURCE_MEM, 177 .flags = IORESOURCE_MEM,
@@ -196,16 +193,13 @@ static struct platform_device tmu0_device = {
196}; 193};
197 194
198static struct sh_timer_config tmu1_platform_data = { 195static struct sh_timer_config tmu1_platform_data = {
199 .name = "TMU1",
200 .channel_offset = 0x10, 196 .channel_offset = 0x10,
201 .timer_bit = 1, 197 .timer_bit = 1,
202 .clk = "peripheral_clk",
203 .clocksource_rating = 200, 198 .clocksource_rating = 200,
204}; 199};
205 200
206static struct resource tmu1_resources[] = { 201static struct resource tmu1_resources[] = {
207 [0] = { 202 [0] = {
208 .name = "TMU1",
209 .start = 0xffd80014, 203 .start = 0xffd80014,
210 .end = 0xffd8001f, 204 .end = 0xffd8001f,
211 .flags = IORESOURCE_MEM, 205 .flags = IORESOURCE_MEM,
@@ -227,15 +221,12 @@ static struct platform_device tmu1_device = {
227}; 221};
228 222
229static struct sh_timer_config tmu2_platform_data = { 223static struct sh_timer_config tmu2_platform_data = {
230 .name = "TMU2",
231 .channel_offset = 0x1c, 224 .channel_offset = 0x1c,
232 .timer_bit = 2, 225 .timer_bit = 2,
233 .clk = "peripheral_clk",
234}; 226};
235 227
236static struct resource tmu2_resources[] = { 228static struct resource tmu2_resources[] = {
237 [0] = { 229 [0] = {
238 .name = "TMU2",
239 .start = 0xffd80020, 230 .start = 0xffd80020,
240 .end = 0xffd8002f, 231 .end = 0xffd8002f,
241 .flags = IORESOURCE_MEM, 232 .flags = IORESOURCE_MEM,
@@ -257,15 +248,12 @@ static struct platform_device tmu2_device = {
257}; 248};
258 249
259static struct sh_timer_config tmu3_platform_data = { 250static struct sh_timer_config tmu3_platform_data = {
260 .name = "TMU3",
261 .channel_offset = 0x04, 251 .channel_offset = 0x04,
262 .timer_bit = 0, 252 .timer_bit = 0,
263 .clk = "peripheral_clk",
264}; 253};
265 254
266static struct resource tmu3_resources[] = { 255static struct resource tmu3_resources[] = {
267 [0] = { 256 [0] = {
268 .name = "TMU3",
269 .start = 0xffd81008, 257 .start = 0xffd81008,
270 .end = 0xffd81013, 258 .end = 0xffd81013,
271 .flags = IORESOURCE_MEM, 259 .flags = IORESOURCE_MEM,
@@ -287,15 +275,12 @@ static struct platform_device tmu3_device = {
287}; 275};
288 276
289static struct sh_timer_config tmu4_platform_data = { 277static struct sh_timer_config tmu4_platform_data = {
290 .name = "TMU4",
291 .channel_offset = 0x10, 278 .channel_offset = 0x10,
292 .timer_bit = 1, 279 .timer_bit = 1,
293 .clk = "peripheral_clk",
294}; 280};
295 281
296static struct resource tmu4_resources[] = { 282static struct resource tmu4_resources[] = {
297 [0] = { 283 [0] = {
298 .name = "TMU4",
299 .start = 0xffd81014, 284 .start = 0xffd81014,
300 .end = 0xffd8101f, 285 .end = 0xffd8101f,
301 .flags = IORESOURCE_MEM, 286 .flags = IORESOURCE_MEM,
@@ -317,15 +302,12 @@ static struct platform_device tmu4_device = {
317}; 302};
318 303
319static struct sh_timer_config tmu5_platform_data = { 304static struct sh_timer_config tmu5_platform_data = {
320 .name = "TMU5",
321 .channel_offset = 0x1c, 305 .channel_offset = 0x1c,
322 .timer_bit = 2, 306 .timer_bit = 2,
323 .clk = "peripheral_clk",
324}; 307};
325 308
326static struct resource tmu5_resources[] = { 309static struct resource tmu5_resources[] = {
327 [0] = { 310 [0] = {
328 .name = "TMU5",
329 .start = 0xffd81020, 311 .start = 0xffd81020,
330 .end = 0xffd8102f, 312 .end = 0xffd8102f,
331 .flags = IORESOURCE_MEM, 313 .flags = IORESOURCE_MEM,
@@ -347,15 +329,12 @@ static struct platform_device tmu5_device = {
347}; 329};
348 330
349static struct sh_timer_config tmu6_platform_data = { 331static struct sh_timer_config tmu6_platform_data = {
350 .name = "TMU6",
351 .channel_offset = 0x04, 332 .channel_offset = 0x04,
352 .timer_bit = 0, 333 .timer_bit = 0,
353 .clk = "peripheral_clk",
354}; 334};
355 335
356static struct resource tmu6_resources[] = { 336static struct resource tmu6_resources[] = {
357 [0] = { 337 [0] = {
358 .name = "TMU6",
359 .start = 0xffd82008, 338 .start = 0xffd82008,
360 .end = 0xffd82013, 339 .end = 0xffd82013,
361 .flags = IORESOURCE_MEM, 340 .flags = IORESOURCE_MEM,
@@ -377,15 +356,12 @@ static struct platform_device tmu6_device = {
377}; 356};
378 357
379static struct sh_timer_config tmu7_platform_data = { 358static struct sh_timer_config tmu7_platform_data = {
380 .name = "TMU7",
381 .channel_offset = 0x10, 359 .channel_offset = 0x10,
382 .timer_bit = 1, 360 .timer_bit = 1,
383 .clk = "peripheral_clk",
384}; 361};
385 362
386static struct resource tmu7_resources[] = { 363static struct resource tmu7_resources[] = {
387 [0] = { 364 [0] = {
388 .name = "TMU7",
389 .start = 0xffd82014, 365 .start = 0xffd82014,
390 .end = 0xffd8201f, 366 .end = 0xffd8201f,
391 .flags = IORESOURCE_MEM, 367 .flags = IORESOURCE_MEM,
@@ -407,15 +383,12 @@ static struct platform_device tmu7_device = {
407}; 383};
408 384
409static struct sh_timer_config tmu8_platform_data = { 385static struct sh_timer_config tmu8_platform_data = {
410 .name = "TMU8",
411 .channel_offset = 0x1c, 386 .channel_offset = 0x1c,
412 .timer_bit = 2, 387 .timer_bit = 2,
413 .clk = "peripheral_clk",
414}; 388};
415 389
416static struct resource tmu8_resources[] = { 390static struct resource tmu8_resources[] = {
417 [0] = { 391 [0] = {
418 .name = "TMU8",
419 .start = 0xffd82020, 392 .start = 0xffd82020,
420 .end = 0xffd8202b, 393 .end = 0xffd8202b,
421 .flags = IORESOURCE_MEM, 394 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 02e792c90de6..05fc38df1582 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -49,16 +49,13 @@ static struct platform_device scif1_device = {
49}; 49};
50 50
51static struct sh_timer_config tmu0_platform_data = { 51static struct sh_timer_config tmu0_platform_data = {
52 .name = "TMU0",
53 .channel_offset = 0x04, 52 .channel_offset = 0x04,
54 .timer_bit = 0, 53 .timer_bit = 0,
55 .clk = "peripheral_clk",
56 .clockevent_rating = 200, 54 .clockevent_rating = 200,
57}; 55};
58 56
59static struct resource tmu0_resources[] = { 57static struct resource tmu0_resources[] = {
60 [0] = { 58 [0] = {
61 .name = "TMU0",
62 .start = 0xffd80008, 59 .start = 0xffd80008,
63 .end = 0xffd80013, 60 .end = 0xffd80013,
64 .flags = IORESOURCE_MEM, 61 .flags = IORESOURCE_MEM,
@@ -80,16 +77,13 @@ static struct platform_device tmu0_device = {
80}; 77};
81 78
82static struct sh_timer_config tmu1_platform_data = { 79static struct sh_timer_config tmu1_platform_data = {
83 .name = "TMU1",
84 .channel_offset = 0x10, 80 .channel_offset = 0x10,
85 .timer_bit = 1, 81 .timer_bit = 1,
86 .clk = "peripheral_clk",
87 .clocksource_rating = 200, 82 .clocksource_rating = 200,
88}; 83};
89 84
90static struct resource tmu1_resources[] = { 85static struct resource tmu1_resources[] = {
91 [0] = { 86 [0] = {
92 .name = "TMU1",
93 .start = 0xffd80014, 87 .start = 0xffd80014,
94 .end = 0xffd8001f, 88 .end = 0xffd8001f,
95 .flags = IORESOURCE_MEM, 89 .flags = IORESOURCE_MEM,
@@ -111,15 +105,12 @@ static struct platform_device tmu1_device = {
111}; 105};
112 106
113static struct sh_timer_config tmu2_platform_data = { 107static struct sh_timer_config tmu2_platform_data = {
114 .name = "TMU2",
115 .channel_offset = 0x1c, 108 .channel_offset = 0x1c,
116 .timer_bit = 2, 109 .timer_bit = 2,
117 .clk = "peripheral_clk",
118}; 110};
119 111
120static struct resource tmu2_resources[] = { 112static struct resource tmu2_resources[] = {
121 [0] = { 113 [0] = {
122 .name = "TMU2",
123 .start = 0xffd80020, 114 .start = 0xffd80020,
124 .end = 0xffd8002f, 115 .end = 0xffd8002f,
125 .flags = IORESOURCE_MEM, 116 .flags = IORESOURCE_MEM,
@@ -141,15 +132,12 @@ static struct platform_device tmu2_device = {
141}; 132};
142 133
143static struct sh_timer_config tmu3_platform_data = { 134static struct sh_timer_config tmu3_platform_data = {
144 .name = "TMU3",
145 .channel_offset = 0x04, 135 .channel_offset = 0x04,
146 .timer_bit = 0, 136 .timer_bit = 0,
147 .clk = "peripheral_clk",
148}; 137};
149 138
150static struct resource tmu3_resources[] = { 139static struct resource tmu3_resources[] = {
151 [0] = { 140 [0] = {
152 .name = "TMU3",
153 .start = 0xffdc0008, 141 .start = 0xffdc0008,
154 .end = 0xffdc0013, 142 .end = 0xffdc0013,
155 .flags = IORESOURCE_MEM, 143 .flags = IORESOURCE_MEM,
@@ -171,15 +159,12 @@ static struct platform_device tmu3_device = {
171}; 159};
172 160
173static struct sh_timer_config tmu4_platform_data = { 161static struct sh_timer_config tmu4_platform_data = {
174 .name = "TMU4",
175 .channel_offset = 0x10, 162 .channel_offset = 0x10,
176 .timer_bit = 1, 163 .timer_bit = 1,
177 .clk = "peripheral_clk",
178}; 164};
179 165
180static struct resource tmu4_resources[] = { 166static struct resource tmu4_resources[] = {
181 [0] = { 167 [0] = {
182 .name = "TMU4",
183 .start = 0xffdc0014, 168 .start = 0xffdc0014,
184 .end = 0xffdc001f, 169 .end = 0xffdc001f,
185 .flags = IORESOURCE_MEM, 170 .flags = IORESOURCE_MEM,
@@ -201,15 +186,12 @@ static struct platform_device tmu4_device = {
201}; 186};
202 187
203static struct sh_timer_config tmu5_platform_data = { 188static struct sh_timer_config tmu5_platform_data = {
204 .name = "TMU5",
205 .channel_offset = 0x1c, 189 .channel_offset = 0x1c,
206 .timer_bit = 2, 190 .timer_bit = 2,
207 .clk = "peripheral_clk",
208}; 191};
209 192
210static struct resource tmu5_resources[] = { 193static struct resource tmu5_resources[] = {
211 [0] = { 194 [0] = {
212 .name = "TMU5",
213 .start = 0xffdc0020, 195 .start = 0xffdc0020,
214 .end = 0xffdc002b, 196 .end = 0xffdc002b,
215 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 1fcd88b1671e..07bb2d4619f8 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -25,7 +25,6 @@ static struct plat_sci_port scif0_platform_data = {
25 .flags = UPF_BOOT_AUTOCONF, 25 .flags = UPF_BOOT_AUTOCONF,
26 .type = PORT_SCIF, 26 .type = PORT_SCIF,
27 .irqs = { 40, 40, 40, 40 }, 27 .irqs = { 40, 40, 40, 40 },
28 .clk = "scif_fck",
29}; 28};
30 29
31static struct platform_device scif0_device = { 30static struct platform_device scif0_device = {
@@ -41,7 +40,6 @@ static struct plat_sci_port scif1_platform_data = {
41 .flags = UPF_BOOT_AUTOCONF, 40 .flags = UPF_BOOT_AUTOCONF,
42 .type = PORT_SCIF, 41 .type = PORT_SCIF,
43 .irqs = { 44, 44, 44, 44 }, 42 .irqs = { 44, 44, 44, 44 },
44 .clk = "scif_fck",
45}; 43};
46 44
47static struct platform_device scif1_device = { 45static struct platform_device scif1_device = {
@@ -57,7 +55,6 @@ static struct plat_sci_port scif2_platform_data = {
57 .flags = UPF_BOOT_AUTOCONF, 55 .flags = UPF_BOOT_AUTOCONF,
58 .type = PORT_SCIF, 56 .type = PORT_SCIF,
59 .irqs = { 60, 60, 60, 60 }, 57 .irqs = { 60, 60, 60, 60 },
60 .clk = "scif_fck",
61}; 58};
62 59
63static struct platform_device scif2_device = { 60static struct platform_device scif2_device = {
@@ -73,7 +70,6 @@ static struct plat_sci_port scif3_platform_data = {
73 .flags = UPF_BOOT_AUTOCONF, 70 .flags = UPF_BOOT_AUTOCONF,
74 .type = PORT_SCIF, 71 .type = PORT_SCIF,
75 .irqs = { 61, 61, 61, 61 }, 72 .irqs = { 61, 61, 61, 61 },
76 .clk = "scif_fck",
77}; 73};
78 74
79static struct platform_device scif3_device = { 75static struct platform_device scif3_device = {
@@ -89,7 +85,6 @@ static struct plat_sci_port scif4_platform_data = {
89 .flags = UPF_BOOT_AUTOCONF, 85 .flags = UPF_BOOT_AUTOCONF,
90 .type = PORT_SCIF, 86 .type = PORT_SCIF,
91 .irqs = { 62, 62, 62, 62 }, 87 .irqs = { 62, 62, 62, 62 },
92 .clk = "scif_fck",
93}; 88};
94 89
95static struct platform_device scif4_device = { 90static struct platform_device scif4_device = {
@@ -105,7 +100,6 @@ static struct plat_sci_port scif5_platform_data = {
105 .flags = UPF_BOOT_AUTOCONF, 100 .flags = UPF_BOOT_AUTOCONF,
106 .type = PORT_SCIF, 101 .type = PORT_SCIF,
107 .irqs = { 63, 63, 63, 63 }, 102 .irqs = { 63, 63, 63, 63 },
108 .clk = "scif_fck",
109}; 103};
110 104
111static struct platform_device scif5_device = { 105static struct platform_device scif5_device = {
@@ -117,16 +111,13 @@ static struct platform_device scif5_device = {
117}; 111};
118 112
119static struct sh_timer_config tmu0_platform_data = { 113static struct sh_timer_config tmu0_platform_data = {
120 .name = "TMU0",
121 .channel_offset = 0x04, 114 .channel_offset = 0x04,
122 .timer_bit = 0, 115 .timer_bit = 0,
123 .clk = "tmu012_fck",
124 .clockevent_rating = 200, 116 .clockevent_rating = 200,
125}; 117};
126 118
127static struct resource tmu0_resources[] = { 119static struct resource tmu0_resources[] = {
128 [0] = { 120 [0] = {
129 .name = "TMU0",
130 .start = 0xffd80008, 121 .start = 0xffd80008,
131 .end = 0xffd80013, 122 .end = 0xffd80013,
132 .flags = IORESOURCE_MEM, 123 .flags = IORESOURCE_MEM,
@@ -148,16 +139,13 @@ static struct platform_device tmu0_device = {
148}; 139};
149 140
150static struct sh_timer_config tmu1_platform_data = { 141static struct sh_timer_config tmu1_platform_data = {
151 .name = "TMU1",
152 .channel_offset = 0x10, 142 .channel_offset = 0x10,
153 .timer_bit = 1, 143 .timer_bit = 1,
154 .clk = "tmu012_fck",
155 .clocksource_rating = 200, 144 .clocksource_rating = 200,
156}; 145};
157 146
158static struct resource tmu1_resources[] = { 147static struct resource tmu1_resources[] = {
159 [0] = { 148 [0] = {
160 .name = "TMU1",
161 .start = 0xffd80014, 149 .start = 0xffd80014,
162 .end = 0xffd8001f, 150 .end = 0xffd8001f,
163 .flags = IORESOURCE_MEM, 151 .flags = IORESOURCE_MEM,
@@ -179,15 +167,12 @@ static struct platform_device tmu1_device = {
179}; 167};
180 168
181static struct sh_timer_config tmu2_platform_data = { 169static struct sh_timer_config tmu2_platform_data = {
182 .name = "TMU2",
183 .channel_offset = 0x1c, 170 .channel_offset = 0x1c,
184 .timer_bit = 2, 171 .timer_bit = 2,
185 .clk = "tmu012_fck",
186}; 172};
187 173
188static struct resource tmu2_resources[] = { 174static struct resource tmu2_resources[] = {
189 [0] = { 175 [0] = {
190 .name = "TMU2",
191 .start = 0xffd80020, 176 .start = 0xffd80020,
192 .end = 0xffd8002f, 177 .end = 0xffd8002f,
193 .flags = IORESOURCE_MEM, 178 .flags = IORESOURCE_MEM,
@@ -209,15 +194,12 @@ static struct platform_device tmu2_device = {
209}; 194};
210 195
211static struct sh_timer_config tmu3_platform_data = { 196static struct sh_timer_config tmu3_platform_data = {
212 .name = "TMU3",
213 .channel_offset = 0x04, 197 .channel_offset = 0x04,
214 .timer_bit = 0, 198 .timer_bit = 0,
215 .clk = "tmu345_fck",
216}; 199};
217 200
218static struct resource tmu3_resources[] = { 201static struct resource tmu3_resources[] = {
219 [0] = { 202 [0] = {
220 .name = "TMU3",
221 .start = 0xffdc0008, 203 .start = 0xffdc0008,
222 .end = 0xffdc0013, 204 .end = 0xffdc0013,
223 .flags = IORESOURCE_MEM, 205 .flags = IORESOURCE_MEM,
@@ -239,15 +221,12 @@ static struct platform_device tmu3_device = {
239}; 221};
240 222
241static struct sh_timer_config tmu4_platform_data = { 223static struct sh_timer_config tmu4_platform_data = {
242 .name = "TMU4",
243 .channel_offset = 0x10, 224 .channel_offset = 0x10,
244 .timer_bit = 1, 225 .timer_bit = 1,
245 .clk = "tmu345_fck",
246}; 226};
247 227
248static struct resource tmu4_resources[] = { 228static struct resource tmu4_resources[] = {
249 [0] = { 229 [0] = {
250 .name = "TMU4",
251 .start = 0xffdc0014, 230 .start = 0xffdc0014,
252 .end = 0xffdc001f, 231 .end = 0xffdc001f,
253 .flags = IORESOURCE_MEM, 232 .flags = IORESOURCE_MEM,
@@ -269,15 +248,12 @@ static struct platform_device tmu4_device = {
269}; 248};
270 249
271static struct sh_timer_config tmu5_platform_data = { 250static struct sh_timer_config tmu5_platform_data = {
272 .name = "TMU5",
273 .channel_offset = 0x1c, 251 .channel_offset = 0x1c,
274 .timer_bit = 2, 252 .timer_bit = 2,
275 .clk = "tmu345_fck",
276}; 253};
277 254
278static struct resource tmu5_resources[] = { 255static struct resource tmu5_resources[] = {
279 [0] = { 256 [0] = {
280 .name = "TMU5",
281 .start = 0xffdc0020, 257 .start = 0xffdc0020,
282 .end = 0xffdc002b, 258 .end = 0xffdc002b,
283 .flags = IORESOURCE_MEM, 259 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 7e585320710a..f5599907ac3d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -117,16 +117,13 @@ static struct platform_device scif5_device = {
117}; 117};
118 118
119static struct sh_timer_config tmu0_platform_data = { 119static struct sh_timer_config tmu0_platform_data = {
120 .name = "TMU0",
121 .channel_offset = 0x04, 120 .channel_offset = 0x04,
122 .timer_bit = 0, 121 .timer_bit = 0,
123 .clk = "peripheral_clk",
124 .clockevent_rating = 200, 122 .clockevent_rating = 200,
125}; 123};
126 124
127static struct resource tmu0_resources[] = { 125static struct resource tmu0_resources[] = {
128 [0] = { 126 [0] = {
129 .name = "TMU0",
130 .start = 0xffd80008, 127 .start = 0xffd80008,
131 .end = 0xffd80013, 128 .end = 0xffd80013,
132 .flags = IORESOURCE_MEM, 129 .flags = IORESOURCE_MEM,
@@ -148,16 +145,13 @@ static struct platform_device tmu0_device = {
148}; 145};
149 146
150static struct sh_timer_config tmu1_platform_data = { 147static struct sh_timer_config tmu1_platform_data = {
151 .name = "TMU1",
152 .channel_offset = 0x10, 148 .channel_offset = 0x10,
153 .timer_bit = 1, 149 .timer_bit = 1,
154 .clk = "peripheral_clk",
155 .clocksource_rating = 200, 150 .clocksource_rating = 200,
156}; 151};
157 152
158static struct resource tmu1_resources[] = { 153static struct resource tmu1_resources[] = {
159 [0] = { 154 [0] = {
160 .name = "TMU1",
161 .start = 0xffd80014, 155 .start = 0xffd80014,
162 .end = 0xffd8001f, 156 .end = 0xffd8001f,
163 .flags = IORESOURCE_MEM, 157 .flags = IORESOURCE_MEM,
@@ -179,15 +173,12 @@ static struct platform_device tmu1_device = {
179}; 173};
180 174
181static struct sh_timer_config tmu2_platform_data = { 175static struct sh_timer_config tmu2_platform_data = {
182 .name = "TMU2",
183 .channel_offset = 0x1c, 176 .channel_offset = 0x1c,
184 .timer_bit = 2, 177 .timer_bit = 2,
185 .clk = "peripheral_clk",
186}; 178};
187 179
188static struct resource tmu2_resources[] = { 180static struct resource tmu2_resources[] = {
189 [0] = { 181 [0] = {
190 .name = "TMU2",
191 .start = 0xffd80020, 182 .start = 0xffd80020,
192 .end = 0xffd8002f, 183 .end = 0xffd8002f,
193 .flags = IORESOURCE_MEM, 184 .flags = IORESOURCE_MEM,
@@ -209,15 +200,12 @@ static struct platform_device tmu2_device = {
209}; 200};
210 201
211static struct sh_timer_config tmu3_platform_data = { 202static struct sh_timer_config tmu3_platform_data = {
212 .name = "TMU3",
213 .channel_offset = 0x04, 203 .channel_offset = 0x04,
214 .timer_bit = 0, 204 .timer_bit = 0,
215 .clk = "peripheral_clk",
216}; 205};
217 206
218static struct resource tmu3_resources[] = { 207static struct resource tmu3_resources[] = {
219 [0] = { 208 [0] = {
220 .name = "TMU3",
221 .start = 0xffda0008, 209 .start = 0xffda0008,
222 .end = 0xffda0013, 210 .end = 0xffda0013,
223 .flags = IORESOURCE_MEM, 211 .flags = IORESOURCE_MEM,
@@ -239,15 +227,12 @@ static struct platform_device tmu3_device = {
239}; 227};
240 228
241static struct sh_timer_config tmu4_platform_data = { 229static struct sh_timer_config tmu4_platform_data = {
242 .name = "TMU4",
243 .channel_offset = 0x10, 230 .channel_offset = 0x10,
244 .timer_bit = 1, 231 .timer_bit = 1,
245 .clk = "peripheral_clk",
246}; 232};
247 233
248static struct resource tmu4_resources[] = { 234static struct resource tmu4_resources[] = {
249 [0] = { 235 [0] = {
250 .name = "TMU4",
251 .start = 0xffda0014, 236 .start = 0xffda0014,
252 .end = 0xffda001f, 237 .end = 0xffda001f,
253 .flags = IORESOURCE_MEM, 238 .flags = IORESOURCE_MEM,
@@ -269,15 +254,12 @@ static struct platform_device tmu4_device = {
269}; 254};
270 255
271static struct sh_timer_config tmu5_platform_data = { 256static struct sh_timer_config tmu5_platform_data = {
272 .name = "TMU5",
273 .channel_offset = 0x1c, 257 .channel_offset = 0x1c,
274 .timer_bit = 2, 258 .timer_bit = 2,
275 .clk = "peripheral_clk",
276}; 259};
277 260
278static struct resource tmu5_resources[] = { 261static struct resource tmu5_resources[] = {
279 [0] = { 262 [0] = {
280 .name = "TMU5",
281 .start = 0xffda0020, 263 .start = 0xffda0020,
282 .end = 0xffda002b, 264 .end = 0xffda002b,
283 .flags = IORESOURCE_MEM, 265 .flags = IORESOURCE_MEM,
@@ -299,15 +281,12 @@ static struct platform_device tmu5_device = {
299}; 281};
300 282
301static struct sh_timer_config tmu6_platform_data = { 283static struct sh_timer_config tmu6_platform_data = {
302 .name = "TMU6",
303 .channel_offset = 0x04, 284 .channel_offset = 0x04,
304 .timer_bit = 0, 285 .timer_bit = 0,
305 .clk = "peripheral_clk",
306}; 286};
307 287
308static struct resource tmu6_resources[] = { 288static struct resource tmu6_resources[] = {
309 [0] = { 289 [0] = {
310 .name = "TMU6",
311 .start = 0xffdc0008, 290 .start = 0xffdc0008,
312 .end = 0xffdc0013, 291 .end = 0xffdc0013,
313 .flags = IORESOURCE_MEM, 292 .flags = IORESOURCE_MEM,
@@ -329,15 +308,12 @@ static struct platform_device tmu6_device = {
329}; 308};
330 309
331static struct sh_timer_config tmu7_platform_data = { 310static struct sh_timer_config tmu7_platform_data = {
332 .name = "TMU7",
333 .channel_offset = 0x10, 311 .channel_offset = 0x10,
334 .timer_bit = 1, 312 .timer_bit = 1,
335 .clk = "peripheral_clk",
336}; 313};
337 314
338static struct resource tmu7_resources[] = { 315static struct resource tmu7_resources[] = {
339 [0] = { 316 [0] = {
340 .name = "TMU7",
341 .start = 0xffdc0014, 317 .start = 0xffdc0014,
342 .end = 0xffdc001f, 318 .end = 0xffdc001f,
343 .flags = IORESOURCE_MEM, 319 .flags = IORESOURCE_MEM,
@@ -359,15 +335,12 @@ static struct platform_device tmu7_device = {
359}; 335};
360 336
361static struct sh_timer_config tmu8_platform_data = { 337static struct sh_timer_config tmu8_platform_data = {
362 .name = "TMU8",
363 .channel_offset = 0x1c, 338 .channel_offset = 0x1c,
364 .timer_bit = 2, 339 .timer_bit = 2,
365 .clk = "peripheral_clk",
366}; 340};
367 341
368static struct resource tmu8_resources[] = { 342static struct resource tmu8_resources[] = {
369 [0] = { 343 [0] = {
370 .name = "TMU8",
371 .start = 0xffdc0020, 344 .start = 0xffdc0020,
372 .end = 0xffdc002b, 345 .end = 0xffdc002b,
373 .flags = IORESOURCE_MEM, 346 .flags = IORESOURCE_MEM,
@@ -389,15 +362,12 @@ static struct platform_device tmu8_device = {
389}; 362};
390 363
391static struct sh_timer_config tmu9_platform_data = { 364static struct sh_timer_config tmu9_platform_data = {
392 .name = "TMU9",
393 .channel_offset = 0x04, 365 .channel_offset = 0x04,
394 .timer_bit = 0, 366 .timer_bit = 0,
395 .clk = "peripheral_clk",
396}; 367};
397 368
398static struct resource tmu9_resources[] = { 369static struct resource tmu9_resources[] = {
399 [0] = { 370 [0] = {
400 .name = "TMU9",
401 .start = 0xffde0008, 371 .start = 0xffde0008,
402 .end = 0xffde0013, 372 .end = 0xffde0013,
403 .flags = IORESOURCE_MEM, 373 .flags = IORESOURCE_MEM,
@@ -419,15 +389,12 @@ static struct platform_device tmu9_device = {
419}; 389};
420 390
421static struct sh_timer_config tmu10_platform_data = { 391static struct sh_timer_config tmu10_platform_data = {
422 .name = "TMU10",
423 .channel_offset = 0x10, 392 .channel_offset = 0x10,
424 .timer_bit = 1, 393 .timer_bit = 1,
425 .clk = "peripheral_clk",
426}; 394};
427 395
428static struct resource tmu10_resources[] = { 396static struct resource tmu10_resources[] = {
429 [0] = { 397 [0] = {
430 .name = "TMU10",
431 .start = 0xffde0014, 398 .start = 0xffde0014,
432 .end = 0xffde001f, 399 .end = 0xffde001f,
433 .flags = IORESOURCE_MEM, 400 .flags = IORESOURCE_MEM,
@@ -449,15 +416,12 @@ static struct platform_device tmu10_device = {
449}; 416};
450 417
451static struct sh_timer_config tmu11_platform_data = { 418static struct sh_timer_config tmu11_platform_data = {
452 .name = "TMU11",
453 .channel_offset = 0x1c, 419 .channel_offset = 0x1c,
454 .timer_bit = 2, 420 .timer_bit = 2,
455 .clk = "peripheral_clk",
456}; 421};
457 422
458static struct resource tmu11_resources[] = { 423static struct resource tmu11_resources[] = {
459 [0] = { 424 [0] = {
460 .name = "TMU11",
461 .start = 0xffde0020, 425 .start = 0xffde0020,
462 .end = 0xffde002b, 426 .end = 0xffde002b,
463 .flags = IORESOURCE_MEM, 427 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 780ba17a5599..9158bc5ea38b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -70,16 +70,13 @@ static struct platform_device scif2_device = {
70}; 70};
71 71
72static struct sh_timer_config tmu0_platform_data = { 72static struct sh_timer_config tmu0_platform_data = {
73 .name = "TMU0",
74 .channel_offset = 0x04, 73 .channel_offset = 0x04,
75 .timer_bit = 0, 74 .timer_bit = 0,
76 .clk = "peripheral_clk",
77 .clockevent_rating = 200, 75 .clockevent_rating = 200,
78}; 76};
79 77
80static struct resource tmu0_resources[] = { 78static struct resource tmu0_resources[] = {
81 [0] = { 79 [0] = {
82 .name = "TMU0",
83 .start = 0xffc10008, 80 .start = 0xffc10008,
84 .end = 0xffc10013, 81 .end = 0xffc10013,
85 .flags = IORESOURCE_MEM, 82 .flags = IORESOURCE_MEM,
@@ -101,16 +98,13 @@ static struct platform_device tmu0_device = {
101}; 98};
102 99
103static struct sh_timer_config tmu1_platform_data = { 100static struct sh_timer_config tmu1_platform_data = {
104 .name = "TMU1",
105 .channel_offset = 0x10, 101 .channel_offset = 0x10,
106 .timer_bit = 1, 102 .timer_bit = 1,
107 .clk = "peripheral_clk",
108 .clocksource_rating = 200, 103 .clocksource_rating = 200,
109}; 104};
110 105
111static struct resource tmu1_resources[] = { 106static struct resource tmu1_resources[] = {
112 [0] = { 107 [0] = {
113 .name = "TMU1",
114 .start = 0xffc10014, 108 .start = 0xffc10014,
115 .end = 0xffc1001f, 109 .end = 0xffc1001f,
116 .flags = IORESOURCE_MEM, 110 .flags = IORESOURCE_MEM,
@@ -132,15 +126,12 @@ static struct platform_device tmu1_device = {
132}; 126};
133 127
134static struct sh_timer_config tmu2_platform_data = { 128static struct sh_timer_config tmu2_platform_data = {
135 .name = "TMU2",
136 .channel_offset = 0x1c, 129 .channel_offset = 0x1c,
137 .timer_bit = 2, 130 .timer_bit = 2,
138 .clk = "peripheral_clk",
139}; 131};
140 132
141static struct resource tmu2_resources[] = { 133static struct resource tmu2_resources[] = {
142 [0] = { 134 [0] = {
143 .name = "TMU2",
144 .start = 0xffc10020, 135 .start = 0xffc10020,
145 .end = 0xffc1002f, 136 .end = 0xffc1002f,
146 .flags = IORESOURCE_MEM, 137 .flags = IORESOURCE_MEM,
@@ -162,15 +153,12 @@ static struct platform_device tmu2_device = {
162}; 153};
163 154
164static struct sh_timer_config tmu3_platform_data = { 155static struct sh_timer_config tmu3_platform_data = {
165 .name = "TMU3",
166 .channel_offset = 0x04, 156 .channel_offset = 0x04,
167 .timer_bit = 0, 157 .timer_bit = 0,
168 .clk = "peripheral_clk",
169}; 158};
170 159
171static struct resource tmu3_resources[] = { 160static struct resource tmu3_resources[] = {
172 [0] = { 161 [0] = {
173 .name = "TMU3",
174 .start = 0xffc20008, 162 .start = 0xffc20008,
175 .end = 0xffc20013, 163 .end = 0xffc20013,
176 .flags = IORESOURCE_MEM, 164 .flags = IORESOURCE_MEM,
@@ -192,15 +180,12 @@ static struct platform_device tmu3_device = {
192}; 180};
193 181
194static struct sh_timer_config tmu4_platform_data = { 182static struct sh_timer_config tmu4_platform_data = {
195 .name = "TMU4",
196 .channel_offset = 0x10, 183 .channel_offset = 0x10,
197 .timer_bit = 1, 184 .timer_bit = 1,
198 .clk = "peripheral_clk",
199}; 185};
200 186
201static struct resource tmu4_resources[] = { 187static struct resource tmu4_resources[] = {
202 [0] = { 188 [0] = {
203 .name = "TMU4",
204 .start = 0xffc20014, 189 .start = 0xffc20014,
205 .end = 0xffc2001f, 190 .end = 0xffc2001f,
206 .flags = IORESOURCE_MEM, 191 .flags = IORESOURCE_MEM,
@@ -222,15 +207,12 @@ static struct platform_device tmu4_device = {
222}; 207};
223 208
224static struct sh_timer_config tmu5_platform_data = { 209static struct sh_timer_config tmu5_platform_data = {
225 .name = "TMU5",
226 .channel_offset = 0x1c, 210 .channel_offset = 0x1c,
227 .timer_bit = 2, 211 .timer_bit = 2,
228 .clk = "peripheral_clk",
229}; 212};
230 213
231static struct resource tmu5_resources[] = { 214static struct resource tmu5_resources[] = {
232 [0] = { 215 [0] = {
233 .name = "TMU5",
234 .start = 0xffc20020, 216 .start = 0xffc20020,
235 .end = 0xffc2002b, 217 .end = 0xffc2002b,
236 .flags = IORESOURCE_MEM, 218 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
index e7a3c1e4b604..d910666142b1 100644
--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -68,16 +68,13 @@ static struct platform_device rtc_device = {
68#define TMU2_BASE (TMU_BASE + 0x8 + (0xc * 0x2)) 68#define TMU2_BASE (TMU_BASE + 0x8 + (0xc * 0x2))
69 69
70static struct sh_timer_config tmu0_platform_data = { 70static struct sh_timer_config tmu0_platform_data = {
71 .name = "TMU0",
72 .channel_offset = 0x04, 71 .channel_offset = 0x04,
73 .timer_bit = 0, 72 .timer_bit = 0,
74 .clk = "peripheral_clk",
75 .clockevent_rating = 200, 73 .clockevent_rating = 200,
76}; 74};
77 75
78static struct resource tmu0_resources[] = { 76static struct resource tmu0_resources[] = {
79 [0] = { 77 [0] = {
80 .name = "TMU0",
81 .start = TMU0_BASE, 78 .start = TMU0_BASE,
82 .end = TMU0_BASE + 0xc - 1, 79 .end = TMU0_BASE + 0xc - 1,
83 .flags = IORESOURCE_MEM, 80 .flags = IORESOURCE_MEM,
@@ -99,16 +96,13 @@ static struct platform_device tmu0_device = {
99}; 96};
100 97
101static struct sh_timer_config tmu1_platform_data = { 98static struct sh_timer_config tmu1_platform_data = {
102 .name = "TMU1",
103 .channel_offset = 0x10, 99 .channel_offset = 0x10,
104 .timer_bit = 1, 100 .timer_bit = 1,
105 .clk = "peripheral_clk",
106 .clocksource_rating = 200, 101 .clocksource_rating = 200,
107}; 102};
108 103
109static struct resource tmu1_resources[] = { 104static struct resource tmu1_resources[] = {
110 [0] = { 105 [0] = {
111 .name = "TMU1",
112 .start = TMU1_BASE, 106 .start = TMU1_BASE,
113 .end = TMU1_BASE + 0xc - 1, 107 .end = TMU1_BASE + 0xc - 1,
114 .flags = IORESOURCE_MEM, 108 .flags = IORESOURCE_MEM,
@@ -130,15 +124,12 @@ static struct platform_device tmu1_device = {
130}; 124};
131 125
132static struct sh_timer_config tmu2_platform_data = { 126static struct sh_timer_config tmu2_platform_data = {
133 .name = "TMU2",
134 .channel_offset = 0x1c, 127 .channel_offset = 0x1c,
135 .timer_bit = 2, 128 .timer_bit = 2,
136 .clk = "peripheral_clk",
137}; 129};
138 130
139static struct resource tmu2_resources[] = { 131static struct resource tmu2_resources[] = {
140 [0] = { 132 [0] = {
141 .name = "TMU2",
142 .start = TMU2_BASE, 133 .start = TMU2_BASE,
143 .end = TMU2_BASE + 0xc - 1, 134 .end = TMU2_BASE + 0xc - 1,
144 .flags = IORESOURCE_MEM, 135 .flags = IORESOURCE_MEM,
diff --git a/arch/sh/kernel/cpufreq.c b/arch/sh/kernel/cpufreq.c
index dce4f3ff0932..0fffacea6ed9 100644
--- a/arch/sh/kernel/cpufreq.c
+++ b/arch/sh/kernel/cpufreq.c
@@ -48,7 +48,7 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
48 return -ENODEV; 48 return -ENODEV;
49 49
50 cpus_allowed = current->cpus_allowed; 50 cpus_allowed = current->cpus_allowed;
51 set_cpus_allowed(current, cpumask_of_cpu(cpu)); 51 set_cpus_allowed_ptr(current, cpumask_of(cpu));
52 52
53 BUG_ON(smp_processor_id() != cpu); 53 BUG_ON(smp_processor_id() != cpu);
54 54
@@ -66,7 +66,7 @@ static int sh_cpufreq_target(struct cpufreq_policy *policy,
66 freqs.flags = 0; 66 freqs.flags = 0;
67 67
68 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 68 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
69 set_cpus_allowed(current, cpus_allowed); 69 set_cpus_allowed_ptr(current, &cpus_allowed);
70 clk_set_rate(cpuclk, freq); 70 clk_set_rate(cpuclk, freq);
71 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 71 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
72 72
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
index bd1c497280a6..94739ee7aa74 100644
--- a/arch/sh/kernel/dwarf.c
+++ b/arch/sh/kernel/dwarf.c
@@ -727,7 +727,7 @@ static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
727 unsigned char *end, struct module *mod) 727 unsigned char *end, struct module *mod)
728{ 728{
729 struct rb_node **rb_node = &cie_root.rb_node; 729 struct rb_node **rb_node = &cie_root.rb_node;
730 struct rb_node *parent; 730 struct rb_node *parent = *rb_node;
731 struct dwarf_cie *cie; 731 struct dwarf_cie *cie;
732 unsigned long flags; 732 unsigned long flags;
733 int count; 733 int count;
@@ -856,7 +856,7 @@ static int dwarf_parse_fde(void *entry, u32 entry_type,
856 unsigned char *end, struct module *mod) 856 unsigned char *end, struct module *mod)
857{ 857{
858 struct rb_node **rb_node = &fde_root.rb_node; 858 struct rb_node **rb_node = &fde_root.rb_node;
859 struct rb_node *parent; 859 struct rb_node *parent = *rb_node;
860 struct dwarf_fde *fde; 860 struct dwarf_fde *fde;
861 struct dwarf_cie *cie; 861 struct dwarf_cie *cie;
862 unsigned long flags; 862 unsigned long flags;
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 0fd7b41f0a22..273f890b17ae 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -112,7 +112,7 @@ void cpu_idle(void)
112 } 112 }
113} 113}
114 114
115void __cpuinit select_idle_routine(void) 115void __init select_idle_routine(void)
116{ 116{
117 /* 117 /*
118 * If a platform has set its own idle routine, leave it alone. 118 * If a platform has set its own idle routine, leave it alone.
diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c
index 9f253e9cce01..81b6de41ae5d 100644
--- a/arch/sh/kernel/perf_event.c
+++ b/arch/sh/kernel/perf_event.c
@@ -315,7 +315,7 @@ void hw_perf_disable(void)
315 sh_pmu->disable_all(); 315 sh_pmu->disable_all();
316} 316}
317 317
318int register_sh_pmu(struct sh_pmu *pmu) 318int __cpuinit register_sh_pmu(struct sh_pmu *pmu)
319{ 319{
320 if (sh_pmu) 320 if (sh_pmu)
321 return -EBUSY; 321 return -EBUSY;
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index c90957a459ac..c0d40f671ecd 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -504,13 +504,6 @@ out:
504 return error; 504 return error;
505} 505}
506 506
507/*
508 * These bracket the sleeping functions..
509 */
510extern void interruptible_sleep_on(wait_queue_head_t *q);
511
512#define mid_sched ((unsigned long) interruptible_sleep_on)
513
514#ifdef CONFIG_FRAME_POINTER 507#ifdef CONFIG_FRAME_POINTER
515static int in_sh64_switch_to(unsigned long pc) 508static int in_sh64_switch_to(unsigned long pc)
516{ 509{
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c
index e124cf7008df..002cc612deef 100644
--- a/arch/sh/kernel/smp.c
+++ b/arch/sh/kernel/smp.c
@@ -69,6 +69,7 @@ asmlinkage void __cpuinit start_secondary(void)
69 unsigned int cpu; 69 unsigned int cpu;
70 struct mm_struct *mm = &init_mm; 70 struct mm_struct *mm = &init_mm;
71 71
72 enable_mmu();
72 atomic_inc(&mm->mm_count); 73 atomic_inc(&mm->mm_count);
73 atomic_inc(&mm->mm_users); 74 atomic_inc(&mm->mm_users);
74 current->active_mm = mm; 75 current->active_mm = mm;
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index 3dc8a8a63822..c73018a9972c 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -18,13 +18,14 @@ mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \
18 ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o 18 ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o
19 19
20obj-y += $(mmu-y) 20obj-y += $(mmu-y)
21obj-$(CONFIG_DEBUG_FS) += asids-debugfs.o
22 21
23ifdef CONFIG_DEBUG_FS 22debugfs-y := asids-debugfs.o
24obj-$(CONFIG_CPU_SH4) += cache-debugfs.o 23ifndef CONFIG_CACHE_OFF
24debugfs-$(CONFIG_CPU_SH4) += cache-debugfs.o
25endif 25endif
26 26
27ifdef CONFIG_MMU 27ifdef CONFIG_MMU
28debugfs-$(CONFIG_CPU_SH4) += tlb-debugfs.o
28tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o 29tlb-$(CONFIG_CPU_SH3) := tlb-sh3.o
29tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o tlb-urb.o 30tlb-$(CONFIG_CPU_SH4) := tlb-sh4.o tlb-urb.o
30tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o 31tlb-$(CONFIG_CPU_SH5) := tlb-sh5.o
@@ -32,6 +33,7 @@ tlb-$(CONFIG_CPU_HAS_PTEAEX) := tlb-pteaex.o tlb-urb.o
32obj-y += $(tlb-y) 33obj-y += $(tlb-y)
33endif 34endif
34 35
36obj-$(CONFIG_DEBUG_FS) += $(debugfs-y)
35obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 37obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
36obj-$(CONFIG_PMB) += pmb.o 38obj-$(CONFIG_PMB) += pmb.o
37obj-$(CONFIG_NUMA) += numa.o 39obj-$(CONFIG_NUMA) += numa.o
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index a4662e2782c3..3cc21933063b 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -323,6 +323,7 @@ static void __clear_pmb_entry(struct pmb_entry *pmbe)
323 writel_uncached(data_val & ~PMB_V, data); 323 writel_uncached(data_val & ~PMB_V, data);
324} 324}
325 325
326#ifdef CONFIG_PM
326static void set_pmb_entry(struct pmb_entry *pmbe) 327static void set_pmb_entry(struct pmb_entry *pmbe)
327{ 328{
328 unsigned long flags; 329 unsigned long flags;
@@ -331,6 +332,7 @@ static void set_pmb_entry(struct pmb_entry *pmbe)
331 __set_pmb_entry(pmbe); 332 __set_pmb_entry(pmbe);
332 spin_unlock_irqrestore(&pmbe->lock, flags); 333 spin_unlock_irqrestore(&pmbe->lock, flags);
333} 334}
335#endif /* CONFIG_PM */
334 336
335int pmb_bolt_mapping(unsigned long vaddr, phys_addr_t phys, 337int pmb_bolt_mapping(unsigned long vaddr, phys_addr_t phys,
336 unsigned long size, pgprot_t prot) 338 unsigned long size, pgprot_t prot)
@@ -802,7 +804,7 @@ void __init pmb_init(void)
802 writel_uncached(0, PMB_IRMCR); 804 writel_uncached(0, PMB_IRMCR);
803 805
804 /* Flush out the TLB */ 806 /* Flush out the TLB */
805 __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR); 807 local_flush_tlb_all();
806 ctrl_barrier(); 808 ctrl_barrier();
807} 809}
808 810
diff --git a/arch/sh/mm/tlb-debugfs.c b/arch/sh/mm/tlb-debugfs.c
new file mode 100644
index 000000000000..229bf75f28df
--- /dev/null
+++ b/arch/sh/mm/tlb-debugfs.c
@@ -0,0 +1,179 @@
1/*
2 * arch/sh/mm/tlb-debugfs.c
3 *
4 * debugfs ops for SH-4 ITLB/UTLBs.
5 *
6 * Copyright (C) 2010 Matt Fleming
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/debugfs.h>
15#include <linux/seq_file.h>
16#include <asm/processor.h>
17#include <asm/mmu_context.h>
18#include <asm/tlbflush.h>
19
20enum tlb_type {
21 TLB_TYPE_ITLB,
22 TLB_TYPE_UTLB,
23};
24
25static struct {
26 int bits;
27 const char *size;
28} tlb_sizes[] = {
29 { 0x0, " 1KB" },
30 { 0x1, " 4KB" },
31 { 0x2, " 8KB" },
32 { 0x4, " 64KB" },
33 { 0x5, "256KB" },
34 { 0x7, " 1MB" },
35 { 0x8, " 4MB" },
36 { 0xc, " 64MB" },
37};
38
39static int tlb_seq_show(struct seq_file *file, void *iter)
40{
41 unsigned int tlb_type = (unsigned int)file->private;
42 unsigned long addr1, addr2, data1, data2;
43 unsigned long flags;
44 unsigned long mmucr;
45 unsigned int nentries, entry;
46 unsigned int urb;
47
48 mmucr = __raw_readl(MMUCR);
49 if ((mmucr & 0x1) == 0) {
50 seq_printf(file, "address translation disabled\n");
51 return 0;
52 }
53
54 if (tlb_type == TLB_TYPE_ITLB) {
55 addr1 = MMU_ITLB_ADDRESS_ARRAY;
56 addr2 = MMU_ITLB_ADDRESS_ARRAY2;
57 data1 = MMU_ITLB_DATA_ARRAY;
58 data2 = MMU_ITLB_DATA_ARRAY2;
59 nentries = 4;
60 } else {
61 addr1 = MMU_UTLB_ADDRESS_ARRAY;
62 addr2 = MMU_UTLB_ADDRESS_ARRAY2;
63 data1 = MMU_UTLB_DATA_ARRAY;
64 data2 = MMU_UTLB_DATA_ARRAY2;
65 nentries = 64;
66 }
67
68 local_irq_save(flags);
69 jump_to_uncached();
70
71 urb = (mmucr & MMUCR_URB) >> MMUCR_URB_SHIFT;
72
73 /* Make the "entry >= urb" test fail. */
74 if (urb == 0)
75 urb = MMUCR_URB_NENTRIES + 1;
76
77 if (tlb_type == TLB_TYPE_ITLB) {
78 addr1 = MMU_ITLB_ADDRESS_ARRAY;
79 addr2 = MMU_ITLB_ADDRESS_ARRAY2;
80 data1 = MMU_ITLB_DATA_ARRAY;
81 data2 = MMU_ITLB_DATA_ARRAY2;
82 nentries = 4;
83 } else {
84 addr1 = MMU_UTLB_ADDRESS_ARRAY;
85 addr2 = MMU_UTLB_ADDRESS_ARRAY2;
86 data1 = MMU_UTLB_DATA_ARRAY;
87 data2 = MMU_UTLB_DATA_ARRAY2;
88 nentries = 64;
89 }
90
91 seq_printf(file, "entry: vpn ppn asid size valid wired\n");
92
93 for (entry = 0; entry < nentries; entry++) {
94 unsigned long vpn, ppn, asid, size;
95 unsigned long valid;
96 unsigned long val;
97 const char *sz = " ?";
98 int i;
99
100 val = __raw_readl(addr1 | (entry << MMU_TLB_ENTRY_SHIFT));
101 ctrl_barrier();
102 vpn = val & 0xfffffc00;
103 valid = val & 0x100;
104
105 val = __raw_readl(addr2 | (entry << MMU_TLB_ENTRY_SHIFT));
106 ctrl_barrier();
107 asid = val & MMU_CONTEXT_ASID_MASK;
108
109 val = __raw_readl(data1 | (entry << MMU_TLB_ENTRY_SHIFT));
110 ctrl_barrier();
111 ppn = (val & 0x0ffffc00) << 4;
112
113 val = __raw_readl(data2 | (entry << MMU_TLB_ENTRY_SHIFT));
114 ctrl_barrier();
115 size = (val & 0xf0) >> 4;
116
117 for (i = 0; i < ARRAY_SIZE(tlb_sizes); i++) {
118 if (tlb_sizes[i].bits == size)
119 break;
120 }
121
122 if (i != ARRAY_SIZE(tlb_sizes))
123 sz = tlb_sizes[i].size;
124
125 seq_printf(file, "%2d: 0x%08lx 0x%08lx %5lu %s %s %s\n",
126 entry, vpn, ppn, asid,
127 sz, valid ? "V" : "-",
128 (urb <= entry) ? "W" : "-");
129 }
130
131 back_to_cached();
132 local_irq_restore(flags);
133
134 return 0;
135}
136
137static int tlb_debugfs_open(struct inode *inode, struct file *file)
138{
139 return single_open(file, tlb_seq_show, inode->i_private);
140}
141
142static const struct file_operations tlb_debugfs_fops = {
143 .owner = THIS_MODULE,
144 .open = tlb_debugfs_open,
145 .read = seq_read,
146 .llseek = seq_lseek,
147 .release = single_release,
148};
149
150static int __init tlb_debugfs_init(void)
151{
152 struct dentry *itlb, *utlb;
153
154 itlb = debugfs_create_file("itlb", S_IRUSR, sh_debugfs_root,
155 (unsigned int *)TLB_TYPE_ITLB,
156 &tlb_debugfs_fops);
157 if (unlikely(!itlb))
158 return -ENOMEM;
159 if (IS_ERR(itlb))
160 return PTR_ERR(itlb);
161
162 utlb = debugfs_create_file("utlb", S_IRUSR, sh_debugfs_root,
163 (unsigned int *)TLB_TYPE_UTLB,
164 &tlb_debugfs_fops);
165 if (unlikely(!utlb)) {
166 debugfs_remove(itlb);
167 return -ENOMEM;
168 }
169
170 if (IS_ERR(utlb)) {
171 debugfs_remove(itlb);
172 return PTR_ERR(utlb);
173 }
174
175 return 0;
176}
177module_init(tlb_debugfs_init);
178
179MODULE_LICENSE("GPL v2");
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
index 32dc674c550c..bdd0982b56ee 100644
--- a/arch/sh/mm/tlb-pteaex.c
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -73,5 +73,7 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
73 jump_to_uncached(); 73 jump_to_uncached();
74 __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT); 74 __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
75 __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT); 75 __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
76 __raw_writel(page, MMU_ITLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
77 __raw_writel(asid, MMU_ITLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
76 back_to_cached(); 78 back_to_cached();
77} 79}
diff --git a/arch/sh/mm/tlb-urb.c b/arch/sh/mm/tlb-urb.c
index bb5b9098956d..c92ce20db39b 100644
--- a/arch/sh/mm/tlb-urb.c
+++ b/arch/sh/mm/tlb-urb.c
@@ -24,13 +24,9 @@ void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
24 24
25 local_irq_save(flags); 25 local_irq_save(flags);
26 26
27 /* Load the entry into the TLB */
28 __update_tlb(vma, addr, pte);
29
30 /* ... and wire it up. */
31 status = __raw_readl(MMUCR); 27 status = __raw_readl(MMUCR);
32 urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT; 28 urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
33 status &= ~MMUCR_URB; 29 status &= ~MMUCR_URC;
34 30
35 /* 31 /*
36 * Make sure we're not trying to wire the last TLB entry slot. 32 * Make sure we're not trying to wire the last TLB entry slot.
@@ -39,7 +35,23 @@ void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
39 35
40 urb = urb % MMUCR_URB_NENTRIES; 36 urb = urb % MMUCR_URB_NENTRIES;
41 37
38 /*
39 * Insert this entry into the highest non-wired TLB slot (via
40 * the URC field).
41 */
42 status |= (urb << MMUCR_URC_SHIFT);
43 __raw_writel(status, MMUCR);
44 ctrl_barrier();
45
46 /* Load the entry into the TLB */
47 __update_tlb(vma, addr, pte);
48
49 /* ... and wire it up. */
50 status = __raw_readl(MMUCR);
51
52 status &= ~MMUCR_URB;
42 status |= (urb << MMUCR_URB_SHIFT); 53 status |= (urb << MMUCR_URB_SHIFT);
54
43 __raw_writel(status, MMUCR); 55 __raw_writel(status, MMUCR);
44 ctrl_barrier(); 56 ctrl_barrier();
45 57
diff --git a/arch/sh/mm/tlbflush_32.c b/arch/sh/mm/tlbflush_32.c
index 004bb3f25b5f..77dc5efa7127 100644
--- a/arch/sh/mm/tlbflush_32.c
+++ b/arch/sh/mm/tlbflush_32.c
@@ -123,18 +123,27 @@ void local_flush_tlb_mm(struct mm_struct *mm)
123void local_flush_tlb_all(void) 123void local_flush_tlb_all(void)
124{ 124{
125 unsigned long flags, status; 125 unsigned long flags, status;
126 int i;
126 127
127 /* 128 /*
128 * Flush all the TLB. 129 * Flush all the TLB.
129 *
130 * Write to the MMU control register's bit:
131 * TF-bit for SH-3, TI-bit for SH-4.
132 * It's same position, bit #2.
133 */ 130 */
134 local_irq_save(flags); 131 local_irq_save(flags);
132 jump_to_uncached();
133
135 status = __raw_readl(MMUCR); 134 status = __raw_readl(MMUCR);
136 status |= 0x04; 135 status = ((status & MMUCR_URB) >> MMUCR_URB_SHIFT);
137 __raw_writel(status, MMUCR); 136
137 if (status == 0)
138 status = MMUCR_URB_NENTRIES;
139
140 for (i = 0; i < status; i++)
141 __raw_writel(0x0, MMU_UTLB_ADDRESS_ARRAY | (i << 8));
142
143 for (i = 0; i < 4; i++)
144 __raw_writel(0x0, MMU_ITLB_ADDRESS_ARRAY | (i << 8));
145
146 back_to_cached();
138 ctrl_barrier(); 147 ctrl_barrier();
139 local_irq_restore(flags); 148 local_irq_restore(flags);
140} 149}
diff --git a/arch/sh/mm/uncached.c b/arch/sh/mm/uncached.c
index cf20a5c5136a..8a4eca551fc0 100644
--- a/arch/sh/mm/uncached.c
+++ b/arch/sh/mm/uncached.c
@@ -1,6 +1,8 @@
1#include <linux/init.h> 1#include <linux/init.h>
2#include <linux/module.h>
2#include <asm/sizes.h> 3#include <asm/sizes.h>
3#include <asm/page.h> 4#include <asm/page.h>
5#include <asm/addrspace.h>
4 6
5/* 7/*
6 * This is the offset of the uncached section from its cached alias. 8 * This is the offset of the uncached section from its cached alias.
@@ -15,15 +17,22 @@
15unsigned long cached_to_uncached = SZ_512M; 17unsigned long cached_to_uncached = SZ_512M;
16unsigned long uncached_size = SZ_512M; 18unsigned long uncached_size = SZ_512M;
17unsigned long uncached_start, uncached_end; 19unsigned long uncached_start, uncached_end;
20EXPORT_SYMBOL(uncached_start);
21EXPORT_SYMBOL(uncached_end);
18 22
19int virt_addr_uncached(unsigned long kaddr) 23int virt_addr_uncached(unsigned long kaddr)
20{ 24{
21 return (kaddr >= uncached_start) && (kaddr < uncached_end); 25 return (kaddr >= uncached_start) && (kaddr < uncached_end);
22} 26}
27EXPORT_SYMBOL(virt_addr_uncached);
23 28
24void __init uncached_init(void) 29void __init uncached_init(void)
25{ 30{
31#ifdef CONFIG_29BIT
32 uncached_start = P2SEG;
33#else
26 uncached_start = memory_end; 34 uncached_start = memory_end;
35#endif
27 uncached_end = uncached_start + uncached_size; 36 uncached_end = uncached_start + uncached_size;
28} 37}
29 38
diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
index 573458f1caf2..b87e0b6970cb 100644
--- a/arch/x86/kernel/cpu/perf_event_amd.c
+++ b/arch/x86/kernel/cpu/perf_event_amd.c
@@ -348,10 +348,12 @@ static void amd_pmu_cpu_offline(int cpu)
348 348
349 raw_spin_lock(&amd_nb_lock); 349 raw_spin_lock(&amd_nb_lock);
350 350
351 if (--cpuhw->amd_nb->refcnt == 0) 351 if (cpuhw->amd_nb) {
352 kfree(cpuhw->amd_nb); 352 if (--cpuhw->amd_nb->refcnt == 0)
353 kfree(cpuhw->amd_nb);
353 354
354 cpuhw->amd_nb = NULL; 355 cpuhw->amd_nb = NULL;
356 }
355 357
356 raw_spin_unlock(&amd_nb_lock); 358 raw_spin_unlock(&amd_nb_lock);
357} 359}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-03 23:37:45 -0500