diff options
Diffstat (limited to 'arch')
30 files changed, 314 insertions, 43 deletions
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index f68012239641..a3a94e9c9378 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -314,7 +314,7 @@ static struct clk timer2_clk = { | |||
314 | .name = "timer2", | 314 | .name = "timer2", |
315 | .parent = &pll1_aux_clk, | 315 | .parent = &pll1_aux_clk, |
316 | .lpsc = DAVINCI_LPSC_TIMER2, | 316 | .lpsc = DAVINCI_LPSC_TIMER2, |
317 | .usecount = 1, /* REVISIT: why can't' this be disabled? */ | 317 | .usecount = 1, /* REVISIT: why can't this be disabled? */ |
318 | }; | 318 | }; |
319 | 319 | ||
320 | static struct clk timer3_clk = { | 320 | static struct clk timer3_clk = { |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 5f8a65424184..4c82c2716293 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -274,7 +274,7 @@ static struct clk timer2_clk = { | |||
274 | .name = "timer2", | 274 | .name = "timer2", |
275 | .parent = &pll1_aux_clk, | 275 | .parent = &pll1_aux_clk, |
276 | .lpsc = DAVINCI_LPSC_TIMER2, | 276 | .lpsc = DAVINCI_LPSC_TIMER2, |
277 | .usecount = 1, /* REVISIT: why can't' this be disabled? */ | 277 | .usecount = 1, /* REVISIT: why can't this be disabled? */ |
278 | }; | 278 | }; |
279 | 279 | ||
280 | static struct clk_lookup dm644x_clks[] = { | 280 | static struct clk_lookup dm644x_clks[] = { |
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index a45cd6409686..512b15204450 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -68,7 +68,7 @@ obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o | |||
68 | obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o | 68 | obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o |
69 | 69 | ||
70 | AFLAGS_sleep24xx.o :=-Wa,-march=armv6 | 70 | AFLAGS_sleep24xx.o :=-Wa,-march=armv6 |
71 | AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a | 71 | AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec) |
72 | 72 | ||
73 | ifeq ($(CONFIG_PM_VERBOSE),y) | 73 | ifeq ($(CONFIG_PM_VERBOSE),y) |
74 | CFLAGS_pm_bus.o += -DDEBUG | 74 | CFLAGS_pm_bus.o += -DDEBUG |
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index e964895b80e8..f8ba20a14e62 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
@@ -141,14 +141,19 @@ static void __init rx51_init(void) | |||
141 | static void __init rx51_map_io(void) | 141 | static void __init rx51_map_io(void) |
142 | { | 142 | { |
143 | omap2_set_globals_3xxx(); | 143 | omap2_set_globals_3xxx(); |
144 | rx51_video_mem_init(); | ||
145 | omap34xx_map_common_io(); | 144 | omap34xx_map_common_io(); |
146 | } | 145 | } |
147 | 146 | ||
147 | static void __init rx51_reserve(void) | ||
148 | { | ||
149 | rx51_video_mem_init(); | ||
150 | omap_reserve(); | ||
151 | } | ||
152 | |||
148 | MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") | 153 | MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") |
149 | /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ | 154 | /* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */ |
150 | .boot_params = 0x80000100, | 155 | .boot_params = 0x80000100, |
151 | .reserve = omap_reserve, | 156 | .reserve = rx51_reserve, |
152 | .map_io = rx51_map_io, | 157 | .map_io = rx51_map_io, |
153 | .init_early = rx51_init_early, | 158 | .init_early = rx51_init_early, |
154 | .init_irq = omap_init_irq, | 159 | .init_irq = omap_init_irq, |
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index 276992d3b7fb..8c965671b4d4 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -3116,14 +3116,9 @@ static struct omap_clk omap44xx_clks[] = { | |||
3116 | CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), | 3116 | CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), |
3117 | CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), | 3117 | CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), |
3118 | CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), | 3118 | CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), |
3119 | CLK("omapdss_dss", "dss_clk", &dss_dss_clk, CK_443X), | ||
3120 | CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), | 3119 | CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), |
3121 | CLK("omapdss_dss", "fck", &dss_fck, CK_443X), | 3120 | CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X), |
3122 | /* | 3121 | CLK("omapdss_dss", "ick", &dss_fck, CK_443X), |
3123 | * On OMAP4, DSS ick is a dummy clock; this is needed for compatibility | ||
3124 | * with OMAP2/3. | ||
3125 | */ | ||
3126 | CLK("omapdss_dss", "ick", &dummy_ck, CK_443X), | ||
3127 | CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), | 3122 | CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), |
3128 | CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), | 3123 | CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), |
3129 | CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), | 3124 | CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), |
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c index 9d0dec806e92..38830d8d4783 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c | |||
@@ -247,6 +247,7 @@ struct omap3_cm_regs { | |||
247 | u32 per_cm_clksel; | 247 | u32 per_cm_clksel; |
248 | u32 emu_cm_clksel; | 248 | u32 emu_cm_clksel; |
249 | u32 emu_cm_clkstctrl; | 249 | u32 emu_cm_clkstctrl; |
250 | u32 pll_cm_autoidle; | ||
250 | u32 pll_cm_autoidle2; | 251 | u32 pll_cm_autoidle2; |
251 | u32 pll_cm_clksel4; | 252 | u32 pll_cm_clksel4; |
252 | u32 pll_cm_clksel5; | 253 | u32 pll_cm_clksel5; |
@@ -319,6 +320,15 @@ void omap3_cm_save_context(void) | |||
319 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1); | 320 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1); |
320 | cm_context.emu_cm_clkstctrl = | 321 | cm_context.emu_cm_clkstctrl = |
321 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL); | 322 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL); |
323 | /* | ||
324 | * As per erratum i671, ROM code does not respect the PER DPLL | ||
325 | * programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1. | ||
326 | * In this case, even though this register has been saved in | ||
327 | * scratchpad contents, we need to restore AUTO_PERIPH_DPLL | ||
328 | * by ourselves. So, we need to save it anyway. | ||
329 | */ | ||
330 | cm_context.pll_cm_autoidle = | ||
331 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE); | ||
322 | cm_context.pll_cm_autoidle2 = | 332 | cm_context.pll_cm_autoidle2 = |
323 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2); | 333 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2); |
324 | cm_context.pll_cm_clksel4 = | 334 | cm_context.pll_cm_clksel4 = |
@@ -441,6 +451,13 @@ void omap3_cm_restore_context(void) | |||
441 | CM_CLKSEL1); | 451 | CM_CLKSEL1); |
442 | omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD, | 452 | omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD, |
443 | OMAP2_CM_CLKSTCTRL); | 453 | OMAP2_CM_CLKSTCTRL); |
454 | /* | ||
455 | * As per erratum i671, ROM code does not respect the PER DPLL | ||
456 | * programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1. | ||
457 | * In this case, we need to restore AUTO_PERIPH_DPLL by ourselves. | ||
458 | */ | ||
459 | omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle, PLL_MOD, | ||
460 | CM_AUTOIDLE); | ||
444 | omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD, | 461 | omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD, |
445 | CM_AUTOIDLE2); | 462 | CM_AUTOIDLE2); |
446 | omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD, | 463 | omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD, |
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 695279419020..da53ba3917ca 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
@@ -316,8 +316,14 @@ void omap3_save_scratchpad_contents(void) | |||
316 | omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); | 316 | omap2_cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); |
317 | prcm_block_contents.cm_clken_pll = | 317 | prcm_block_contents.cm_clken_pll = |
318 | omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); | 318 | omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); |
319 | /* | ||
320 | * As per erratum i671, ROM code does not respect the PER DPLL | ||
321 | * programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1. | ||
322 | * Then, in anycase, clear these bits to avoid extra latencies. | ||
323 | */ | ||
319 | prcm_block_contents.cm_autoidle_pll = | 324 | prcm_block_contents.cm_autoidle_pll = |
320 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL); | 325 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) & |
326 | ~OMAP3430_AUTO_PERIPH_DPLL_MASK; | ||
321 | prcm_block_contents.cm_clksel1_pll = | 327 | prcm_block_contents.cm_clksel1_pll = |
322 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL); | 328 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL); |
323 | prcm_block_contents.cm_clksel2_pll = | 329 | prcm_block_contents.cm_clksel2_pll = |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 8eb3ce1bbfbe..c4d0ae87d62a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -1639,6 +1639,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { | |||
1639 | 1639 | ||
1640 | static struct omap_hwmod omap2420_gpio1_hwmod = { | 1640 | static struct omap_hwmod omap2420_gpio1_hwmod = { |
1641 | .name = "gpio1", | 1641 | .name = "gpio1", |
1642 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1642 | .mpu_irqs = omap242x_gpio1_irqs, | 1643 | .mpu_irqs = omap242x_gpio1_irqs, |
1643 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), | 1644 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), |
1644 | .main_clk = "gpios_fck", | 1645 | .main_clk = "gpios_fck", |
@@ -1669,6 +1670,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { | |||
1669 | 1670 | ||
1670 | static struct omap_hwmod omap2420_gpio2_hwmod = { | 1671 | static struct omap_hwmod omap2420_gpio2_hwmod = { |
1671 | .name = "gpio2", | 1672 | .name = "gpio2", |
1673 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1672 | .mpu_irqs = omap242x_gpio2_irqs, | 1674 | .mpu_irqs = omap242x_gpio2_irqs, |
1673 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), | 1675 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), |
1674 | .main_clk = "gpios_fck", | 1676 | .main_clk = "gpios_fck", |
@@ -1699,6 +1701,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { | |||
1699 | 1701 | ||
1700 | static struct omap_hwmod omap2420_gpio3_hwmod = { | 1702 | static struct omap_hwmod omap2420_gpio3_hwmod = { |
1701 | .name = "gpio3", | 1703 | .name = "gpio3", |
1704 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1702 | .mpu_irqs = omap242x_gpio3_irqs, | 1705 | .mpu_irqs = omap242x_gpio3_irqs, |
1703 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), | 1706 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), |
1704 | .main_clk = "gpios_fck", | 1707 | .main_clk = "gpios_fck", |
@@ -1729,6 +1732,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { | |||
1729 | 1732 | ||
1730 | static struct omap_hwmod omap2420_gpio4_hwmod = { | 1733 | static struct omap_hwmod omap2420_gpio4_hwmod = { |
1731 | .name = "gpio4", | 1734 | .name = "gpio4", |
1735 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1732 | .mpu_irqs = omap242x_gpio4_irqs, | 1736 | .mpu_irqs = omap242x_gpio4_irqs, |
1733 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), | 1737 | .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), |
1734 | .main_clk = "gpios_fck", | 1738 | .main_clk = "gpios_fck", |
@@ -1782,7 +1786,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { | |||
1782 | static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { | 1786 | static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { |
1783 | { | 1787 | { |
1784 | .pa_start = 0x48056000, | 1788 | .pa_start = 0x48056000, |
1785 | .pa_end = 0x4a0560ff, | 1789 | .pa_end = 0x48056fff, |
1786 | .flags = ADDR_TYPE_RT | 1790 | .flags = ADDR_TYPE_RT |
1787 | }, | 1791 | }, |
1788 | }; | 1792 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index e6e3810db77f..9682dd519f8d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -1742,6 +1742,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | |||
1742 | 1742 | ||
1743 | static struct omap_hwmod omap2430_gpio1_hwmod = { | 1743 | static struct omap_hwmod omap2430_gpio1_hwmod = { |
1744 | .name = "gpio1", | 1744 | .name = "gpio1", |
1745 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1745 | .mpu_irqs = omap243x_gpio1_irqs, | 1746 | .mpu_irqs = omap243x_gpio1_irqs, |
1746 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), | 1747 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), |
1747 | .main_clk = "gpios_fck", | 1748 | .main_clk = "gpios_fck", |
@@ -1772,6 +1773,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | |||
1772 | 1773 | ||
1773 | static struct omap_hwmod omap2430_gpio2_hwmod = { | 1774 | static struct omap_hwmod omap2430_gpio2_hwmod = { |
1774 | .name = "gpio2", | 1775 | .name = "gpio2", |
1776 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1775 | .mpu_irqs = omap243x_gpio2_irqs, | 1777 | .mpu_irqs = omap243x_gpio2_irqs, |
1776 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), | 1778 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), |
1777 | .main_clk = "gpios_fck", | 1779 | .main_clk = "gpios_fck", |
@@ -1802,6 +1804,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | |||
1802 | 1804 | ||
1803 | static struct omap_hwmod omap2430_gpio3_hwmod = { | 1805 | static struct omap_hwmod omap2430_gpio3_hwmod = { |
1804 | .name = "gpio3", | 1806 | .name = "gpio3", |
1807 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1805 | .mpu_irqs = omap243x_gpio3_irqs, | 1808 | .mpu_irqs = omap243x_gpio3_irqs, |
1806 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), | 1809 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), |
1807 | .main_clk = "gpios_fck", | 1810 | .main_clk = "gpios_fck", |
@@ -1832,6 +1835,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | |||
1832 | 1835 | ||
1833 | static struct omap_hwmod omap2430_gpio4_hwmod = { | 1836 | static struct omap_hwmod omap2430_gpio4_hwmod = { |
1834 | .name = "gpio4", | 1837 | .name = "gpio4", |
1838 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1835 | .mpu_irqs = omap243x_gpio4_irqs, | 1839 | .mpu_irqs = omap243x_gpio4_irqs, |
1836 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), | 1840 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), |
1837 | .main_clk = "gpios_fck", | 1841 | .main_clk = "gpios_fck", |
@@ -1862,6 +1866,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { | |||
1862 | 1866 | ||
1863 | static struct omap_hwmod omap2430_gpio5_hwmod = { | 1867 | static struct omap_hwmod omap2430_gpio5_hwmod = { |
1864 | .name = "gpio5", | 1868 | .name = "gpio5", |
1869 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
1865 | .mpu_irqs = omap243x_gpio5_irqs, | 1870 | .mpu_irqs = omap243x_gpio5_irqs, |
1866 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), | 1871 | .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), |
1867 | .main_clk = "gpio5_fck", | 1872 | .main_clk = "gpio5_fck", |
@@ -1915,7 +1920,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { | |||
1915 | static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { | 1920 | static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { |
1916 | { | 1921 | { |
1917 | .pa_start = 0x48056000, | 1922 | .pa_start = 0x48056000, |
1918 | .pa_end = 0x4a0560ff, | 1923 | .pa_end = 0x48056fff, |
1919 | .flags = ADDR_TYPE_RT | 1924 | .flags = ADDR_TYPE_RT |
1920 | }, | 1925 | }, |
1921 | }; | 1926 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index b98e2dfcba28..909a84de6682 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -2141,6 +2141,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = { | |||
2141 | 2141 | ||
2142 | static struct omap_hwmod omap3xxx_gpio1_hwmod = { | 2142 | static struct omap_hwmod omap3xxx_gpio1_hwmod = { |
2143 | .name = "gpio1", | 2143 | .name = "gpio1", |
2144 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2144 | .mpu_irqs = omap3xxx_gpio1_irqs, | 2145 | .mpu_irqs = omap3xxx_gpio1_irqs, |
2145 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), | 2146 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), |
2146 | .main_clk = "gpio1_ick", | 2147 | .main_clk = "gpio1_ick", |
@@ -2177,6 +2178,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = { | |||
2177 | 2178 | ||
2178 | static struct omap_hwmod omap3xxx_gpio2_hwmod = { | 2179 | static struct omap_hwmod omap3xxx_gpio2_hwmod = { |
2179 | .name = "gpio2", | 2180 | .name = "gpio2", |
2181 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2180 | .mpu_irqs = omap3xxx_gpio2_irqs, | 2182 | .mpu_irqs = omap3xxx_gpio2_irqs, |
2181 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), | 2183 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), |
2182 | .main_clk = "gpio2_ick", | 2184 | .main_clk = "gpio2_ick", |
@@ -2213,6 +2215,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = { | |||
2213 | 2215 | ||
2214 | static struct omap_hwmod omap3xxx_gpio3_hwmod = { | 2216 | static struct omap_hwmod omap3xxx_gpio3_hwmod = { |
2215 | .name = "gpio3", | 2217 | .name = "gpio3", |
2218 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2216 | .mpu_irqs = omap3xxx_gpio3_irqs, | 2219 | .mpu_irqs = omap3xxx_gpio3_irqs, |
2217 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), | 2220 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), |
2218 | .main_clk = "gpio3_ick", | 2221 | .main_clk = "gpio3_ick", |
@@ -2249,6 +2252,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = { | |||
2249 | 2252 | ||
2250 | static struct omap_hwmod omap3xxx_gpio4_hwmod = { | 2253 | static struct omap_hwmod omap3xxx_gpio4_hwmod = { |
2251 | .name = "gpio4", | 2254 | .name = "gpio4", |
2255 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2252 | .mpu_irqs = omap3xxx_gpio4_irqs, | 2256 | .mpu_irqs = omap3xxx_gpio4_irqs, |
2253 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), | 2257 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), |
2254 | .main_clk = "gpio4_ick", | 2258 | .main_clk = "gpio4_ick", |
@@ -2285,6 +2289,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio5_slaves[] = { | |||
2285 | 2289 | ||
2286 | static struct omap_hwmod omap3xxx_gpio5_hwmod = { | 2290 | static struct omap_hwmod omap3xxx_gpio5_hwmod = { |
2287 | .name = "gpio5", | 2291 | .name = "gpio5", |
2292 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2288 | .mpu_irqs = omap3xxx_gpio5_irqs, | 2293 | .mpu_irqs = omap3xxx_gpio5_irqs, |
2289 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), | 2294 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), |
2290 | .main_clk = "gpio5_ick", | 2295 | .main_clk = "gpio5_ick", |
@@ -2321,6 +2326,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio6_slaves[] = { | |||
2321 | 2326 | ||
2322 | static struct omap_hwmod omap3xxx_gpio6_hwmod = { | 2327 | static struct omap_hwmod omap3xxx_gpio6_hwmod = { |
2323 | .name = "gpio6", | 2328 | .name = "gpio6", |
2329 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
2324 | .mpu_irqs = omap3xxx_gpio6_irqs, | 2330 | .mpu_irqs = omap3xxx_gpio6_irqs, |
2325 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), | 2331 | .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), |
2326 | .main_clk = "gpio6_ick", | 2332 | .main_clk = "gpio6_ick", |
@@ -2386,7 +2392,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { | |||
2386 | static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { | 2392 | static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { |
2387 | { | 2393 | { |
2388 | .pa_start = 0x48056000, | 2394 | .pa_start = 0x48056000, |
2389 | .pa_end = 0x4a0560ff, | 2395 | .pa_end = 0x48056fff, |
2390 | .flags = ADDR_TYPE_RT | 2396 | .flags = ADDR_TYPE_RT |
2391 | }, | 2397 | }, |
2392 | }; | 2398 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 3e88dd3f8ef3..abc548a0c98d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -885,7 +885,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_masters[] = { | |||
885 | static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { | 885 | static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { |
886 | { | 886 | { |
887 | .pa_start = 0x4a056000, | 887 | .pa_start = 0x4a056000, |
888 | .pa_end = 0x4a0560ff, | 888 | .pa_end = 0x4a056fff, |
889 | .flags = ADDR_TYPE_RT | 889 | .flags = ADDR_TYPE_RT |
890 | }, | 890 | }, |
891 | }; | 891 | }; |
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c index 5f2da7565b68..4321e7938929 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.c +++ b/arch/arm/mach-omap2/omap_l3_smx.c | |||
@@ -196,11 +196,11 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) | |||
196 | /* No timeout error for debug sources */ | 196 | /* No timeout error for debug sources */ |
197 | } | 197 | } |
198 | 198 | ||
199 | base = ((l3->rt) + (*(omap3_l3_bases[int_type] + err_source))); | ||
200 | |||
201 | /* identify the error source */ | 199 | /* identify the error source */ |
202 | for (err_source = 0; !(status & (1 << err_source)); err_source++) | 200 | for (err_source = 0; !(status & (1 << err_source)); err_source++) |
203 | ; | 201 | ; |
202 | |||
203 | base = l3->rt + *(omap3_l3_bases[int_type] + err_source); | ||
204 | error = omap3_l3_readll(base, L3_ERROR_LOG); | 204 | error = omap3_l3_readll(base, L3_ERROR_LOG); |
205 | 205 | ||
206 | if (error) { | 206 | if (error) { |
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 30af3351c2d6..49486f522dca 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c | |||
@@ -89,6 +89,7 @@ static void omap2_init_processor_devices(void) | |||
89 | if (cpu_is_omap44xx()) { | 89 | if (cpu_is_omap44xx()) { |
90 | _init_omap_device("l3_main_1", &l3_dev); | 90 | _init_omap_device("l3_main_1", &l3_dev); |
91 | _init_omap_device("dsp", &dsp_dev); | 91 | _init_omap_device("dsp", &dsp_dev); |
92 | _init_omap_device("iva", &iva_dev); | ||
92 | } else { | 93 | } else { |
93 | _init_omap_device("l3_main", &l3_dev); | 94 | _init_omap_device("l3_main", &l3_dev); |
94 | } | 95 | } |
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 6fb520999b6e..0c1552d9d995 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c | |||
@@ -114,7 +114,6 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) | |||
114 | sys_clk_speed /= 1000; | 114 | sys_clk_speed /= 1000; |
115 | 115 | ||
116 | /* Generic voltage parameters */ | 116 | /* Generic voltage parameters */ |
117 | vdd->curr_volt = 1200000; | ||
118 | vdd->volt_scale = vp_forceupdate_scale_voltage; | 117 | vdd->volt_scale = vp_forceupdate_scale_voltage; |
119 | vdd->vp_enabled = false; | 118 | vdd->vp_enabled = false; |
120 | 119 | ||
diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c index 02b7a03e4226..8b3db1c587fc 100644 --- a/arch/m68k/mm/motorola.c +++ b/arch/m68k/mm/motorola.c | |||
@@ -300,6 +300,8 @@ void __init paging_init(void) | |||
300 | zones_size[ZONE_DMA] = m68k_memory[i].size >> PAGE_SHIFT; | 300 | zones_size[ZONE_DMA] = m68k_memory[i].size >> PAGE_SHIFT; |
301 | free_area_init_node(i, zones_size, | 301 | free_area_init_node(i, zones_size, |
302 | m68k_memory[i].addr >> PAGE_SHIFT, NULL); | 302 | m68k_memory[i].addr >> PAGE_SHIFT, NULL); |
303 | if (node_present_pages(i)) | ||
304 | node_set_state(i, N_NORMAL_MEMORY); | ||
303 | } | 305 | } |
304 | } | 306 | } |
305 | 307 | ||
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c index b7ed8d7a9b33..b1d126258dee 100644 --- a/arch/parisc/mm/init.c +++ b/arch/parisc/mm/init.c | |||
@@ -266,8 +266,10 @@ static void __init setup_bootmem(void) | |||
266 | } | 266 | } |
267 | memset(pfnnid_map, 0xff, sizeof(pfnnid_map)); | 267 | memset(pfnnid_map, 0xff, sizeof(pfnnid_map)); |
268 | 268 | ||
269 | for (i = 0; i < npmem_ranges; i++) | 269 | for (i = 0; i < npmem_ranges; i++) { |
270 | node_set_state(i, N_NORMAL_MEMORY); | ||
270 | node_set_online(i); | 271 | node_set_online(i); |
272 | } | ||
271 | #endif | 273 | #endif |
272 | 274 | ||
273 | /* | 275 | /* |
diff --git a/arch/powerpc/include/asm/uninorth.h b/arch/powerpc/include/asm/uninorth.h index ae9c899c8a6d..d12b11d7641e 100644 --- a/arch/powerpc/include/asm/uninorth.h +++ b/arch/powerpc/include/asm/uninorth.h | |||
@@ -60,7 +60,7 @@ | |||
60 | * | 60 | * |
61 | * Obviously, the GART is not cache coherent and so any change to it | 61 | * Obviously, the GART is not cache coherent and so any change to it |
62 | * must be flushed to memory (or maybe just make the GART space non | 62 | * must be flushed to memory (or maybe just make the GART space non |
63 | * cachable). AGP memory itself does't seem to be cache coherent neither. | 63 | * cachable). AGP memory itself doesn't seem to be cache coherent neither. |
64 | * | 64 | * |
65 | * In order to invalidate the GART (which is probably necessary to inval | 65 | * In order to invalidate the GART (which is probably necessary to inval |
66 | * the bridge internal TLBs), the following sequence has to be written, | 66 | * the bridge internal TLBs), the following sequence has to be written, |
diff --git a/arch/s390/crypto/prng.c b/arch/s390/crypto/prng.c index 975e3ab13cb5..44bca3f994b0 100644 --- a/arch/s390/crypto/prng.c +++ b/arch/s390/crypto/prng.c | |||
@@ -76,7 +76,7 @@ static void prng_seed(int nbytes) | |||
76 | 76 | ||
77 | /* Add the entropy */ | 77 | /* Add the entropy */ |
78 | while (nbytes >= 8) { | 78 | while (nbytes >= 8) { |
79 | *((__u64 *)parm_block) ^= *((__u64 *)buf+i*8); | 79 | *((__u64 *)parm_block) ^= *((__u64 *)buf+i); |
80 | prng_add_entropy(); | 80 | prng_add_entropy(); |
81 | i += 8; | 81 | i += 8; |
82 | nbytes -= 8; | 82 | nbytes -= 8; |
diff --git a/arch/s390/kvm/sie64a.S b/arch/s390/kvm/sie64a.S index 7e9d30d567b0..ab0e041ac54c 100644 --- a/arch/s390/kvm/sie64a.S +++ b/arch/s390/kvm/sie64a.S | |||
@@ -48,10 +48,10 @@ sie_irq_handler: | |||
48 | tm __TI_flags+7(%r2),_TIF_EXIT_SIE | 48 | tm __TI_flags+7(%r2),_TIF_EXIT_SIE |
49 | jz 0f | 49 | jz 0f |
50 | larl %r2,sie_exit # work pending, leave sie | 50 | larl %r2,sie_exit # work pending, leave sie |
51 | stg %r2,__LC_RETURN_PSW+8 | 51 | stg %r2,SPI_PSW+8(0,%r15) |
52 | br %r14 | 52 | br %r14 |
53 | 0: larl %r2,sie_reenter # re-enter with guest id | 53 | 0: larl %r2,sie_reenter # re-enter with guest id |
54 | stg %r2,__LC_RETURN_PSW+8 | 54 | stg %r2,SPI_PSW+8(0,%r15) |
55 | 1: br %r14 | 55 | 1: br %r14 |
56 | 56 | ||
57 | /* | 57 | /* |
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c index 9217e332b118..4cf85fef407c 100644 --- a/arch/s390/mm/fault.c +++ b/arch/s390/mm/fault.c | |||
@@ -558,9 +558,9 @@ static void pfault_interrupt(unsigned int ext_int_code, | |||
558 | * Get the token (= address of the task structure of the affected task). | 558 | * Get the token (= address of the task structure of the affected task). |
559 | */ | 559 | */ |
560 | #ifdef CONFIG_64BIT | 560 | #ifdef CONFIG_64BIT |
561 | tsk = *(struct task_struct **) param64; | 561 | tsk = (struct task_struct *) param64; |
562 | #else | 562 | #else |
563 | tsk = *(struct task_struct **) param32; | 563 | tsk = (struct task_struct *) param32; |
564 | #endif | 564 | #endif |
565 | 565 | ||
566 | if (subcode & 0x0080) { | 566 | if (subcode & 0x0080) { |
diff --git a/arch/s390/mm/pageattr.c b/arch/s390/mm/pageattr.c index 122ffbd08ce0..0607e4b14b27 100644 --- a/arch/s390/mm/pageattr.c +++ b/arch/s390/mm/pageattr.c | |||
@@ -24,12 +24,13 @@ static void change_page_attr(unsigned long addr, int numpages, | |||
24 | WARN_ON_ONCE(1); | 24 | WARN_ON_ONCE(1); |
25 | continue; | 25 | continue; |
26 | } | 26 | } |
27 | ptep = pte_offset_kernel(pmdp, addr + i * PAGE_SIZE); | 27 | ptep = pte_offset_kernel(pmdp, addr); |
28 | 28 | ||
29 | pte = *ptep; | 29 | pte = *ptep; |
30 | pte = set(pte); | 30 | pte = set(pte); |
31 | ptep_invalidate(&init_mm, addr + i * PAGE_SIZE, ptep); | 31 | ptep_invalidate(&init_mm, addr, ptep); |
32 | *ptep = pte; | 32 | *ptep = pte; |
33 | addr += PAGE_SIZE; | ||
33 | } | 34 | } |
34 | } | 35 | } |
35 | 36 | ||
diff --git a/arch/um/Kconfig.um b/arch/um/Kconfig.um index 90a438acbfaf..b5e675e370c6 100644 --- a/arch/um/Kconfig.um +++ b/arch/um/Kconfig.um | |||
@@ -47,7 +47,7 @@ config HOSTFS | |||
47 | 47 | ||
48 | config HPPFS | 48 | config HPPFS |
49 | tristate "HoneyPot ProcFS (EXPERIMENTAL)" | 49 | tristate "HoneyPot ProcFS (EXPERIMENTAL)" |
50 | depends on EXPERIMENTAL | 50 | depends on EXPERIMENTAL && PROC_FS |
51 | help | 51 | help |
52 | hppfs (HoneyPot ProcFS) is a filesystem which allows UML /proc | 52 | hppfs (HoneyPot ProcFS) is a filesystem which allows UML /proc |
53 | entries to be overridden, removed, or fabricated from the host. | 53 | entries to be overridden, removed, or fabricated from the host. |
diff --git a/arch/um/include/asm/thread_info.h b/arch/um/include/asm/thread_info.h index e2cf786bda0a..5bd1bad33fab 100644 --- a/arch/um/include/asm/thread_info.h +++ b/arch/um/include/asm/thread_info.h | |||
@@ -49,7 +49,10 @@ static inline struct thread_info *current_thread_info(void) | |||
49 | { | 49 | { |
50 | struct thread_info *ti; | 50 | struct thread_info *ti; |
51 | unsigned long mask = THREAD_SIZE - 1; | 51 | unsigned long mask = THREAD_SIZE - 1; |
52 | ti = (struct thread_info *) (((unsigned long) &ti) & ~mask); | 52 | void *p; |
53 | |||
54 | asm volatile ("" : "=r" (p) : "0" (&ti)); | ||
55 | ti = (struct thread_info *) (((unsigned long)p) & ~mask); | ||
53 | return ti; | 56 | return ti; |
54 | } | 57 | } |
55 | 58 | ||
diff --git a/arch/um/sys-i386/Makefile b/arch/um/sys-i386/Makefile index 804b28dd0328..b1da91c1b200 100644 --- a/arch/um/sys-i386/Makefile +++ b/arch/um/sys-i386/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | obj-y = bug.o bugs.o checksum.o delay.o fault.o ksyms.o ldt.o ptrace.o \ | 5 | obj-y = bug.o bugs.o checksum.o delay.o fault.o ksyms.o ldt.o ptrace.o \ |
6 | ptrace_user.o setjmp.o signal.o stub.o stub_segv.o syscalls.o sysrq.o \ | 6 | ptrace_user.o setjmp.o signal.o stub.o stub_segv.o syscalls.o sysrq.o \ |
7 | sys_call_table.o tls.o | 7 | sys_call_table.o tls.o atomic64_cx8_32.o |
8 | 8 | ||
9 | obj-$(CONFIG_BINFMT_ELF) += elfcore.o | 9 | obj-$(CONFIG_BINFMT_ELF) += elfcore.o |
10 | 10 | ||
diff --git a/arch/um/sys-i386/atomic64_cx8_32.S b/arch/um/sys-i386/atomic64_cx8_32.S new file mode 100644 index 000000000000..1e901d3d4a95 --- /dev/null +++ b/arch/um/sys-i386/atomic64_cx8_32.S | |||
@@ -0,0 +1,225 @@ | |||
1 | /* | ||
2 | * atomic64_t for 586+ | ||
3 | * | ||
4 | * Copied from arch/x86/lib/atomic64_cx8_32.S | ||
5 | * | ||
6 | * Copyright © 2010 Luca Barbieri | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <linux/linkage.h> | ||
16 | #include <asm/alternative-asm.h> | ||
17 | #include <asm/dwarf2.h> | ||
18 | |||
19 | .macro SAVE reg | ||
20 | pushl_cfi %\reg | ||
21 | CFI_REL_OFFSET \reg, 0 | ||
22 | .endm | ||
23 | |||
24 | .macro RESTORE reg | ||
25 | popl_cfi %\reg | ||
26 | CFI_RESTORE \reg | ||
27 | .endm | ||
28 | |||
29 | .macro read64 reg | ||
30 | movl %ebx, %eax | ||
31 | movl %ecx, %edx | ||
32 | /* we need LOCK_PREFIX since otherwise cmpxchg8b always does the write */ | ||
33 | LOCK_PREFIX | ||
34 | cmpxchg8b (\reg) | ||
35 | .endm | ||
36 | |||
37 | ENTRY(atomic64_read_cx8) | ||
38 | CFI_STARTPROC | ||
39 | |||
40 | read64 %ecx | ||
41 | ret | ||
42 | CFI_ENDPROC | ||
43 | ENDPROC(atomic64_read_cx8) | ||
44 | |||
45 | ENTRY(atomic64_set_cx8) | ||
46 | CFI_STARTPROC | ||
47 | |||
48 | 1: | ||
49 | /* we don't need LOCK_PREFIX since aligned 64-bit writes | ||
50 | * are atomic on 586 and newer */ | ||
51 | cmpxchg8b (%esi) | ||
52 | jne 1b | ||
53 | |||
54 | ret | ||
55 | CFI_ENDPROC | ||
56 | ENDPROC(atomic64_set_cx8) | ||
57 | |||
58 | ENTRY(atomic64_xchg_cx8) | ||
59 | CFI_STARTPROC | ||
60 | |||
61 | movl %ebx, %eax | ||
62 | movl %ecx, %edx | ||
63 | 1: | ||
64 | LOCK_PREFIX | ||
65 | cmpxchg8b (%esi) | ||
66 | jne 1b | ||
67 | |||
68 | ret | ||
69 | CFI_ENDPROC | ||
70 | ENDPROC(atomic64_xchg_cx8) | ||
71 | |||
72 | .macro addsub_return func ins insc | ||
73 | ENTRY(atomic64_\func\()_return_cx8) | ||
74 | CFI_STARTPROC | ||
75 | SAVE ebp | ||
76 | SAVE ebx | ||
77 | SAVE esi | ||
78 | SAVE edi | ||
79 | |||
80 | movl %eax, %esi | ||
81 | movl %edx, %edi | ||
82 | movl %ecx, %ebp | ||
83 | |||
84 | read64 %ebp | ||
85 | 1: | ||
86 | movl %eax, %ebx | ||
87 | movl %edx, %ecx | ||
88 | \ins\()l %esi, %ebx | ||
89 | \insc\()l %edi, %ecx | ||
90 | LOCK_PREFIX | ||
91 | cmpxchg8b (%ebp) | ||
92 | jne 1b | ||
93 | |||
94 | 10: | ||
95 | movl %ebx, %eax | ||
96 | movl %ecx, %edx | ||
97 | RESTORE edi | ||
98 | RESTORE esi | ||
99 | RESTORE ebx | ||
100 | RESTORE ebp | ||
101 | ret | ||
102 | CFI_ENDPROC | ||
103 | ENDPROC(atomic64_\func\()_return_cx8) | ||
104 | .endm | ||
105 | |||
106 | addsub_return add add adc | ||
107 | addsub_return sub sub sbb | ||
108 | |||
109 | .macro incdec_return func ins insc | ||
110 | ENTRY(atomic64_\func\()_return_cx8) | ||
111 | CFI_STARTPROC | ||
112 | SAVE ebx | ||
113 | |||
114 | read64 %esi | ||
115 | 1: | ||
116 | movl %eax, %ebx | ||
117 | movl %edx, %ecx | ||
118 | \ins\()l $1, %ebx | ||
119 | \insc\()l $0, %ecx | ||
120 | LOCK_PREFIX | ||
121 | cmpxchg8b (%esi) | ||
122 | jne 1b | ||
123 | |||
124 | 10: | ||
125 | movl %ebx, %eax | ||
126 | movl %ecx, %edx | ||
127 | RESTORE ebx | ||
128 | ret | ||
129 | CFI_ENDPROC | ||
130 | ENDPROC(atomic64_\func\()_return_cx8) | ||
131 | .endm | ||
132 | |||
133 | incdec_return inc add adc | ||
134 | incdec_return dec sub sbb | ||
135 | |||
136 | ENTRY(atomic64_dec_if_positive_cx8) | ||
137 | CFI_STARTPROC | ||
138 | SAVE ebx | ||
139 | |||
140 | read64 %esi | ||
141 | 1: | ||
142 | movl %eax, %ebx | ||
143 | movl %edx, %ecx | ||
144 | subl $1, %ebx | ||
145 | sbb $0, %ecx | ||
146 | js 2f | ||
147 | LOCK_PREFIX | ||
148 | cmpxchg8b (%esi) | ||
149 | jne 1b | ||
150 | |||
151 | 2: | ||
152 | movl %ebx, %eax | ||
153 | movl %ecx, %edx | ||
154 | RESTORE ebx | ||
155 | ret | ||
156 | CFI_ENDPROC | ||
157 | ENDPROC(atomic64_dec_if_positive_cx8) | ||
158 | |||
159 | ENTRY(atomic64_add_unless_cx8) | ||
160 | CFI_STARTPROC | ||
161 | SAVE ebp | ||
162 | SAVE ebx | ||
163 | /* these just push these two parameters on the stack */ | ||
164 | SAVE edi | ||
165 | SAVE esi | ||
166 | |||
167 | movl %ecx, %ebp | ||
168 | movl %eax, %esi | ||
169 | movl %edx, %edi | ||
170 | |||
171 | read64 %ebp | ||
172 | 1: | ||
173 | cmpl %eax, 0(%esp) | ||
174 | je 4f | ||
175 | 2: | ||
176 | movl %eax, %ebx | ||
177 | movl %edx, %ecx | ||
178 | addl %esi, %ebx | ||
179 | adcl %edi, %ecx | ||
180 | LOCK_PREFIX | ||
181 | cmpxchg8b (%ebp) | ||
182 | jne 1b | ||
183 | |||
184 | movl $1, %eax | ||
185 | 3: | ||
186 | addl $8, %esp | ||
187 | CFI_ADJUST_CFA_OFFSET -8 | ||
188 | RESTORE ebx | ||
189 | RESTORE ebp | ||
190 | ret | ||
191 | 4: | ||
192 | cmpl %edx, 4(%esp) | ||
193 | jne 2b | ||
194 | xorl %eax, %eax | ||
195 | jmp 3b | ||
196 | CFI_ENDPROC | ||
197 | ENDPROC(atomic64_add_unless_cx8) | ||
198 | |||
199 | ENTRY(atomic64_inc_not_zero_cx8) | ||
200 | CFI_STARTPROC | ||
201 | SAVE ebx | ||
202 | |||
203 | read64 %esi | ||
204 | 1: | ||
205 | testl %eax, %eax | ||
206 | je 4f | ||
207 | 2: | ||
208 | movl %eax, %ebx | ||
209 | movl %edx, %ecx | ||
210 | addl $1, %ebx | ||
211 | adcl $0, %ecx | ||
212 | LOCK_PREFIX | ||
213 | cmpxchg8b (%esi) | ||
214 | jne 1b | ||
215 | |||
216 | movl $1, %eax | ||
217 | 3: | ||
218 | RESTORE ebx | ||
219 | ret | ||
220 | 4: | ||
221 | testl %edx, %edx | ||
222 | jne 2b | ||
223 | jmp 3b | ||
224 | CFI_ENDPROC | ||
225 | ENDPROC(atomic64_inc_not_zero_cx8) | ||
diff --git a/arch/x86/boot/memory.c b/arch/x86/boot/memory.c index cae3feb1035e..db75d07c3645 100644 --- a/arch/x86/boot/memory.c +++ b/arch/x86/boot/memory.c | |||
@@ -91,7 +91,7 @@ static int detect_memory_e801(void) | |||
91 | if (oreg.ax > 15*1024) { | 91 | if (oreg.ax > 15*1024) { |
92 | return -1; /* Bogus! */ | 92 | return -1; /* Bogus! */ |
93 | } else if (oreg.ax == 15*1024) { | 93 | } else if (oreg.ax == 15*1024) { |
94 | boot_params.alt_mem_k = (oreg.dx << 6) + oreg.ax; | 94 | boot_params.alt_mem_k = (oreg.bx << 6) + oreg.ax; |
95 | } else { | 95 | } else { |
96 | /* | 96 | /* |
97 | * This ignores memory above 16MB if we have a memory | 97 | * This ignores memory above 16MB if we have a memory |
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h index c4bd267dfc50..a97a240f67f3 100644 --- a/arch/x86/include/asm/io_apic.h +++ b/arch/x86/include/asm/io_apic.h | |||
@@ -150,7 +150,7 @@ void setup_IO_APIC_irq_extra(u32 gsi); | |||
150 | extern void ioapic_and_gsi_init(void); | 150 | extern void ioapic_and_gsi_init(void); |
151 | extern void ioapic_insert_resources(void); | 151 | extern void ioapic_insert_resources(void); |
152 | 152 | ||
153 | int io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr); | 153 | int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr); |
154 | 154 | ||
155 | extern struct IO_APIC_route_entry **alloc_ioapic_entries(void); | 155 | extern struct IO_APIC_route_entry **alloc_ioapic_entries(void); |
156 | extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries); | 156 | extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries); |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 68df09bba92e..45fd33d1fd3a 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -128,8 +128,8 @@ static int __init parse_noapic(char *str) | |||
128 | } | 128 | } |
129 | early_param("noapic", parse_noapic); | 129 | early_param("noapic", parse_noapic); |
130 | 130 | ||
131 | static int io_apic_setup_irq_pin_once(unsigned int irq, int node, | 131 | static int io_apic_setup_irq_pin(unsigned int irq, int node, |
132 | struct io_apic_irq_attr *attr); | 132 | struct io_apic_irq_attr *attr); |
133 | 133 | ||
134 | /* Will be called in mpparse/acpi/sfi codes for saving IRQ info */ | 134 | /* Will be called in mpparse/acpi/sfi codes for saving IRQ info */ |
135 | void mp_save_irq(struct mpc_intsrc *m) | 135 | void mp_save_irq(struct mpc_intsrc *m) |
@@ -3570,7 +3570,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) | |||
3570 | } | 3570 | } |
3571 | #endif /* CONFIG_HT_IRQ */ | 3571 | #endif /* CONFIG_HT_IRQ */ |
3572 | 3572 | ||
3573 | int | 3573 | static int |
3574 | io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr) | 3574 | io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr) |
3575 | { | 3575 | { |
3576 | struct irq_cfg *cfg = alloc_irq_and_cfg_at(irq, node); | 3576 | struct irq_cfg *cfg = alloc_irq_and_cfg_at(irq, node); |
@@ -3585,8 +3585,8 @@ io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr) | |||
3585 | return ret; | 3585 | return ret; |
3586 | } | 3586 | } |
3587 | 3587 | ||
3588 | static int io_apic_setup_irq_pin_once(unsigned int irq, int node, | 3588 | int io_apic_setup_irq_pin_once(unsigned int irq, int node, |
3589 | struct io_apic_irq_attr *attr) | 3589 | struct io_apic_irq_attr *attr) |
3590 | { | 3590 | { |
3591 | unsigned int id = attr->ioapic, pin = attr->ioapic_pin; | 3591 | unsigned int id = attr->ioapic, pin = attr->ioapic_pin; |
3592 | int ret; | 3592 | int ret; |
diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c index 706a9fb46a58..e90f08458e6b 100644 --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c | |||
@@ -391,7 +391,7 @@ static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize, | |||
391 | 391 | ||
392 | set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity); | 392 | set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity); |
393 | 393 | ||
394 | return io_apic_setup_irq_pin(*out_hwirq, cpu_to_node(0), &attr); | 394 | return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr); |
395 | } | 395 | } |
396 | 396 | ||
397 | static void __init ioapic_add_ofnode(struct device_node *np) | 397 | static void __init ioapic_add_ofnode(struct device_node *np) |
diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts index 2d6d226f2b10..e70be38ce039 100644 --- a/arch/x86/platform/ce4100/falconfalls.dts +++ b/arch/x86/platform/ce4100/falconfalls.dts | |||
@@ -347,7 +347,7 @@ | |||
347 | "pciclass0c03"; | 347 | "pciclass0c03"; |
348 | 348 | ||
349 | reg = <0x16800 0x0 0x0 0x0 0x0>; | 349 | reg = <0x16800 0x0 0x0 0x0 0x0>; |
350 | interrupts = <22 3>; | 350 | interrupts = <22 1>; |
351 | }; | 351 | }; |
352 | 352 | ||
353 | usb@d,1 { | 353 | usb@d,1 { |
@@ -357,7 +357,7 @@ | |||
357 | "pciclass0c03"; | 357 | "pciclass0c03"; |
358 | 358 | ||
359 | reg = <0x16900 0x0 0x0 0x0 0x0>; | 359 | reg = <0x16900 0x0 0x0 0x0 0x0>; |
360 | interrupts = <22 3>; | 360 | interrupts = <22 1>; |
361 | }; | 361 | }; |
362 | 362 | ||
363 | sata@e,0 { | 363 | sata@e,0 { |
@@ -367,7 +367,7 @@ | |||
367 | "pciclass0106"; | 367 | "pciclass0106"; |
368 | 368 | ||
369 | reg = <0x17000 0x0 0x0 0x0 0x0>; | 369 | reg = <0x17000 0x0 0x0 0x0 0x0>; |
370 | interrupts = <23 3>; | 370 | interrupts = <23 1>; |
371 | }; | 371 | }; |
372 | 372 | ||
373 | flash@f,0 { | 373 | flash@f,0 { |