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-rw-r--r--arch/arm/mm/proc-arm925.S2
-rw-r--r--arch/arm/mm/proc-arm926.S2
-rw-r--r--arch/arm/mm/proc-arm940.S2
-rw-r--r--arch/arm/mm/proc-arm946.S2
4 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 065087afb772..d045812f3399 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -332,7 +332,7 @@ ENTRY(arm925_dma_flush_range)
332#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 332#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
333 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 333 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
334#else 334#else
335 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 335 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
336#endif 336#endif
337 add r0, r0, #CACHE_DLINESIZE 337 add r0, r0, #CACHE_DLINESIZE
338 cmp r0, r1 338 cmp r0, r1
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 997db8472b5c..4cd33169a7c9 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -295,7 +295,7 @@ ENTRY(arm926_dma_flush_range)
295#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 295#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
296 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 296 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
297#else 297#else
298 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 298 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
299#endif 299#endif
300 add r0, r0, #CACHE_DLINESIZE 300 add r0, r0, #CACHE_DLINESIZE
301 cmp r0, r1 301 cmp r0, r1
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index 44ead902bd54..1a3d63df8e90 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -222,7 +222,7 @@ ENTRY(arm940_dma_flush_range)
222#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 222#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
223 mcr p15, 0, r3, c7, c14, 2 @ clean/flush D entry 223 mcr p15, 0, r3, c7, c14, 2 @ clean/flush D entry
224#else 224#else
225 mcr p15, 0, r3, c7, c10, 2 @ clean D entry 225 mcr p15, 0, r3, c7, c6, 2 @ invalidate D entry
226#endif 226#endif
227 subs r3, r3, #1 << 26 227 subs r3, r3, #1 << 26
228 bcs 2b @ entries 63 to 0 228 bcs 2b @ entries 63 to 0
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 2218b0c01330..82d579ac9b98 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -265,7 +265,7 @@ ENTRY(arm946_dma_flush_range)
265#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 265#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
266 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 266 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
267#else 267#else
268 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 268 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
269#endif 269#endif
270 add r0, r0, #CACHE_DLINESIZE 270 add r0, r0, #CACHE_DLINESIZE
271 cmp r0, r1 271 cmp r0, r1