diff options
Diffstat (limited to 'arch')
71 files changed, 799 insertions, 371 deletions
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig index 357d4021e2d0..b3c8cce0f8fb 100644 --- a/arch/arm/configs/omap3_beagle_defconfig +++ b/arch/arm/configs/omap3_beagle_defconfig | |||
@@ -969,7 +969,6 @@ CONFIG_USB_ETH_RNDIS=y | |||
969 | # | 969 | # |
970 | CONFIG_USB_OTG_UTILS=y | 970 | CONFIG_USB_OTG_UTILS=y |
971 | # CONFIG_USB_GPIO_VBUS is not set | 971 | # CONFIG_USB_GPIO_VBUS is not set |
972 | # CONFIG_ISP1301_OMAP is not set | ||
973 | CONFIG_TWL4030_USB=y | 972 | CONFIG_TWL4030_USB=y |
974 | # CONFIG_NOP_USB_XCEIV is not set | 973 | # CONFIG_NOP_USB_XCEIV is not set |
975 | CONFIG_MMC=y | 974 | CONFIG_MMC=y |
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 63a481fbbed4..338ff19ae447 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h | |||
@@ -84,7 +84,7 @@ ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p) | |||
84 | *p = res | mask; | 84 | *p = res | mask; |
85 | raw_local_irq_restore(flags); | 85 | raw_local_irq_restore(flags); |
86 | 86 | ||
87 | return res & mask; | 87 | return (res & mask) != 0; |
88 | } | 88 | } |
89 | 89 | ||
90 | static inline int | 90 | static inline int |
@@ -101,7 +101,7 @@ ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p) | |||
101 | *p = res & ~mask; | 101 | *p = res & ~mask; |
102 | raw_local_irq_restore(flags); | 102 | raw_local_irq_restore(flags); |
103 | 103 | ||
104 | return res & mask; | 104 | return (res & mask) != 0; |
105 | } | 105 | } |
106 | 106 | ||
107 | static inline int | 107 | static inline int |
@@ -118,7 +118,7 @@ ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p) | |||
118 | *p = res ^ mask; | 118 | *p = res ^ mask; |
119 | raw_local_irq_restore(flags); | 119 | raw_local_irq_restore(flags); |
120 | 120 | ||
121 | return res & mask; | 121 | return (res & mask) != 0; |
122 | } | 122 | } |
123 | 123 | ||
124 | #include <asm-generic/bitops/non-atomic.h> | 124 | #include <asm-generic/bitops/non-atomic.h> |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 467b69ed1021..f838f36eb702 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -45,21 +45,21 @@ static int __init user_debug_setup(char *str) | |||
45 | __setup("user_debug=", user_debug_setup); | 45 | __setup("user_debug=", user_debug_setup); |
46 | #endif | 46 | #endif |
47 | 47 | ||
48 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top); | 48 | static void dump_mem(const char *, const char *, unsigned long, unsigned long); |
49 | 49 | ||
50 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) | 50 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) |
51 | { | 51 | { |
52 | #ifdef CONFIG_KALLSYMS | 52 | #ifdef CONFIG_KALLSYMS |
53 | printk("[<%08lx>] ", where); | 53 | char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN]; |
54 | print_symbol("(%s) ", where); | 54 | sprint_symbol(sym1, where); |
55 | printk("from [<%08lx>] ", from); | 55 | sprint_symbol(sym2, from); |
56 | print_symbol("(%s)\n", from); | 56 | printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2); |
57 | #else | 57 | #else |
58 | printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); | 58 | printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); |
59 | #endif | 59 | #endif |
60 | 60 | ||
61 | if (in_exception_text(where)) | 61 | if (in_exception_text(where)) |
62 | dump_mem("Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); | 62 | dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); |
63 | } | 63 | } |
64 | 64 | ||
65 | #ifndef CONFIG_ARM_UNWIND | 65 | #ifndef CONFIG_ARM_UNWIND |
@@ -81,9 +81,10 @@ static int verify_stack(unsigned long sp) | |||
81 | /* | 81 | /* |
82 | * Dump out the contents of some memory nicely... | 82 | * Dump out the contents of some memory nicely... |
83 | */ | 83 | */ |
84 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top) | 84 | static void dump_mem(const char *lvl, const char *str, unsigned long bottom, |
85 | unsigned long top) | ||
85 | { | 86 | { |
86 | unsigned long p = bottom & ~31; | 87 | unsigned long first; |
87 | mm_segment_t fs; | 88 | mm_segment_t fs; |
88 | int i; | 89 | int i; |
89 | 90 | ||
@@ -95,33 +96,37 @@ static void dump_mem(const char *str, unsigned long bottom, unsigned long top) | |||
95 | fs = get_fs(); | 96 | fs = get_fs(); |
96 | set_fs(KERNEL_DS); | 97 | set_fs(KERNEL_DS); |
97 | 98 | ||
98 | printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top); | 99 | printk("%s%s(0x%08lx to 0x%08lx)\n", lvl, str, bottom, top); |
99 | 100 | ||
100 | for (p = bottom & ~31; p < top;) { | 101 | for (first = bottom & ~31; first < top; first += 32) { |
101 | printk("%04lx: ", p & 0xffff); | 102 | unsigned long p; |
103 | char str[sizeof(" 12345678") * 8 + 1]; | ||
102 | 104 | ||
103 | for (i = 0; i < 8; i++, p += 4) { | 105 | memset(str, ' ', sizeof(str)); |
104 | unsigned int val; | 106 | str[sizeof(str) - 1] = '\0'; |
105 | 107 | ||
106 | if (p < bottom || p >= top) | 108 | for (p = first, i = 0; i < 8 && p < top; i++, p += 4) { |
107 | printk(" "); | 109 | if (p >= bottom && p < top) { |
108 | else { | 110 | unsigned long val; |
109 | __get_user(val, (unsigned long *)p); | 111 | if (__get_user(val, (unsigned long *)p) == 0) |
110 | printk("%08x ", val); | 112 | sprintf(str + i * 9, " %08lx", val); |
113 | else | ||
114 | sprintf(str + i * 9, " ????????"); | ||
111 | } | 115 | } |
112 | } | 116 | } |
113 | printk ("\n"); | 117 | printk("%s%04lx:%s\n", lvl, first & 0xffff, str); |
114 | } | 118 | } |
115 | 119 | ||
116 | set_fs(fs); | 120 | set_fs(fs); |
117 | } | 121 | } |
118 | 122 | ||
119 | static void dump_instr(struct pt_regs *regs) | 123 | static void dump_instr(const char *lvl, struct pt_regs *regs) |
120 | { | 124 | { |
121 | unsigned long addr = instruction_pointer(regs); | 125 | unsigned long addr = instruction_pointer(regs); |
122 | const int thumb = thumb_mode(regs); | 126 | const int thumb = thumb_mode(regs); |
123 | const int width = thumb ? 4 : 8; | 127 | const int width = thumb ? 4 : 8; |
124 | mm_segment_t fs; | 128 | mm_segment_t fs; |
129 | char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; | ||
125 | int i; | 130 | int i; |
126 | 131 | ||
127 | /* | 132 | /* |
@@ -132,7 +137,6 @@ static void dump_instr(struct pt_regs *regs) | |||
132 | fs = get_fs(); | 137 | fs = get_fs(); |
133 | set_fs(KERNEL_DS); | 138 | set_fs(KERNEL_DS); |
134 | 139 | ||
135 | printk("Code: "); | ||
136 | for (i = -4; i < 1; i++) { | 140 | for (i = -4; i < 1; i++) { |
137 | unsigned int val, bad; | 141 | unsigned int val, bad; |
138 | 142 | ||
@@ -142,13 +146,14 @@ static void dump_instr(struct pt_regs *regs) | |||
142 | bad = __get_user(val, &((u32 *)addr)[i]); | 146 | bad = __get_user(val, &((u32 *)addr)[i]); |
143 | 147 | ||
144 | if (!bad) | 148 | if (!bad) |
145 | printk(i == 0 ? "(%0*x) " : "%0*x ", width, val); | 149 | p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ", |
150 | width, val); | ||
146 | else { | 151 | else { |
147 | printk("bad PC value."); | 152 | p += sprintf(p, "bad PC value"); |
148 | break; | 153 | break; |
149 | } | 154 | } |
150 | } | 155 | } |
151 | printk("\n"); | 156 | printk("%sCode: %s\n", lvl, str); |
152 | 157 | ||
153 | set_fs(fs); | 158 | set_fs(fs); |
154 | } | 159 | } |
@@ -224,18 +229,19 @@ static void __die(const char *str, int err, struct thread_info *thread, struct p | |||
224 | struct task_struct *tsk = thread->task; | 229 | struct task_struct *tsk = thread->task; |
225 | static int die_counter; | 230 | static int die_counter; |
226 | 231 | ||
227 | printk("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", | 232 | printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", |
228 | str, err, ++die_counter); | 233 | str, err, ++die_counter); |
234 | sysfs_printk_last_file(); | ||
229 | print_modules(); | 235 | print_modules(); |
230 | __show_regs(regs); | 236 | __show_regs(regs); |
231 | printk("Process %s (pid: %d, stack limit = 0x%p)\n", | 237 | printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", |
232 | tsk->comm, task_pid_nr(tsk), thread + 1); | 238 | TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1); |
233 | 239 | ||
234 | if (!user_mode(regs) || in_interrupt()) { | 240 | if (!user_mode(regs) || in_interrupt()) { |
235 | dump_mem("Stack: ", regs->ARM_sp, | 241 | dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp, |
236 | THREAD_SIZE + (unsigned long)task_stack_page(tsk)); | 242 | THREAD_SIZE + (unsigned long)task_stack_page(tsk)); |
237 | dump_backtrace(regs, tsk); | 243 | dump_backtrace(regs, tsk); |
238 | dump_instr(regs); | 244 | dump_instr(KERN_EMERG, regs); |
239 | } | 245 | } |
240 | } | 246 | } |
241 | 247 | ||
@@ -250,13 +256,14 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) | |||
250 | 256 | ||
251 | oops_enter(); | 257 | oops_enter(); |
252 | 258 | ||
253 | console_verbose(); | ||
254 | spin_lock_irq(&die_lock); | 259 | spin_lock_irq(&die_lock); |
260 | console_verbose(); | ||
255 | bust_spinlocks(1); | 261 | bust_spinlocks(1); |
256 | __die(str, err, thread, regs); | 262 | __die(str, err, thread, regs); |
257 | bust_spinlocks(0); | 263 | bust_spinlocks(0); |
258 | add_taint(TAINT_DIE); | 264 | add_taint(TAINT_DIE); |
259 | spin_unlock_irq(&die_lock); | 265 | spin_unlock_irq(&die_lock); |
266 | oops_exit(); | ||
260 | 267 | ||
261 | if (in_interrupt()) | 268 | if (in_interrupt()) |
262 | panic("Fatal exception in interrupt"); | 269 | panic("Fatal exception in interrupt"); |
@@ -264,7 +271,6 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) | |||
264 | if (panic_on_oops) | 271 | if (panic_on_oops) |
265 | panic("Fatal exception"); | 272 | panic("Fatal exception"); |
266 | 273 | ||
267 | oops_exit(); | ||
268 | do_exit(SIGSEGV); | 274 | do_exit(SIGSEGV); |
269 | } | 275 | } |
270 | 276 | ||
@@ -349,7 +355,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) | |||
349 | if (user_debug & UDBG_UNDEFINED) { | 355 | if (user_debug & UDBG_UNDEFINED) { |
350 | printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", | 356 | printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", |
351 | current->comm, task_pid_nr(current), pc); | 357 | current->comm, task_pid_nr(current), pc); |
352 | dump_instr(regs); | 358 | dump_instr(KERN_INFO, regs); |
353 | } | 359 | } |
354 | #endif | 360 | #endif |
355 | 361 | ||
@@ -400,7 +406,7 @@ static int bad_syscall(int n, struct pt_regs *regs) | |||
400 | if (user_debug & UDBG_SYSCALL) { | 406 | if (user_debug & UDBG_SYSCALL) { |
401 | printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n", | 407 | printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n", |
402 | task_pid_nr(current), current->comm, n); | 408 | task_pid_nr(current), current->comm, n); |
403 | dump_instr(regs); | 409 | dump_instr(KERN_ERR, regs); |
404 | } | 410 | } |
405 | #endif | 411 | #endif |
406 | 412 | ||
@@ -579,7 +585,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs) | |||
579 | if (user_debug & UDBG_SYSCALL) { | 585 | if (user_debug & UDBG_SYSCALL) { |
580 | printk("[%d] %s: arm syscall %d\n", | 586 | printk("[%d] %s: arm syscall %d\n", |
581 | task_pid_nr(current), current->comm, no); | 587 | task_pid_nr(current), current->comm, no); |
582 | dump_instr(regs); | 588 | dump_instr("", regs); |
583 | if (user_mode(regs)) { | 589 | if (user_mode(regs)) { |
584 | __show_regs(regs); | 590 | __show_regs(regs); |
585 | c_backtrace(regs->ARM_fp, processor_mode(regs)); | 591 | c_backtrace(regs->ARM_fp, processor_mode(regs)); |
@@ -656,7 +662,7 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs) | |||
656 | if (user_debug & UDBG_BADABORT) { | 662 | if (user_debug & UDBG_BADABORT) { |
657 | printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n", | 663 | printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n", |
658 | task_pid_nr(current), current->comm, code, instr); | 664 | task_pid_nr(current), current->comm, code, instr); |
659 | dump_instr(regs); | 665 | dump_instr(KERN_ERR, regs); |
660 | show_pte(current->mm, addr); | 666 | show_pte(current->mm, addr); |
661 | } | 667 | } |
662 | #endif | 668 | #endif |
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c index 4b4f69251b31..e590bbe0a7b4 100644 --- a/arch/arm/mach-bcmring/core.c +++ b/arch/arm/mach-bcmring/core.c | |||
@@ -271,12 +271,12 @@ static struct irqaction bcmring_timer_irq = { | |||
271 | .handler = bcmring_timer_interrupt, | 271 | .handler = bcmring_timer_interrupt, |
272 | }; | 272 | }; |
273 | 273 | ||
274 | static cycle_t bcmring_get_cycles_timer1(void) | 274 | static cycle_t bcmring_get_cycles_timer1(struct clocksource *cs) |
275 | { | 275 | { |
276 | return ~readl(TIMER1_VA_BASE + TIMER_VALUE); | 276 | return ~readl(TIMER1_VA_BASE + TIMER_VALUE); |
277 | } | 277 | } |
278 | 278 | ||
279 | static cycle_t bcmring_get_cycles_timer3(void) | 279 | static cycle_t bcmring_get_cycles_timer3(struct clocksource *cs) |
280 | { | 280 | { |
281 | return ~readl(TIMER3_VA_BASE + TIMER_VALUE); | 281 | return ~readl(TIMER3_VA_BASE + TIMER_VALUE); |
282 | } | 282 | } |
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h index cdbf93c694a6..38b37060d426 100644 --- a/arch/arm/mach-bcmring/include/mach/system.h +++ b/arch/arm/mach-bcmring/include/mach/system.h | |||
@@ -29,7 +29,7 @@ static inline void arch_idle(void) | |||
29 | cpu_do_idle(); | 29 | cpu_do_idle(); |
30 | } | 30 | } |
31 | 31 | ||
32 | static inline void arch_reset(char mode, char *cmd) | 32 | static inline void arch_reset(char mode, const char *cmd) |
33 | { | 33 | { |
34 | printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); | 34 | printk("arch_reset:%c %x\n", mode, bcmring_arch_warm_reboot); |
35 | 35 | ||
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig index d7291c682a64..9167c3d2a5ed 100644 --- a/arch/arm/mach-ep93xx/Kconfig +++ b/arch/arm/mach-ep93xx/Kconfig | |||
@@ -17,13 +17,31 @@ config EP93XX_SDCE3_SYNC_PHYS_OFFSET | |||
17 | bool "0x00000000 - SDCE3/SyncBoot" | 17 | bool "0x00000000 - SDCE3/SyncBoot" |
18 | help | 18 | help |
19 | Select this option if you want support for EP93xx boards with the | 19 | Select this option if you want support for EP93xx boards with the |
20 | first SDRAM bank at 0x00000000 | 20 | first SDRAM bank at 0x00000000. |
21 | 21 | ||
22 | config EP93XX_SDCE0_PHYS_OFFSET | 22 | config EP93XX_SDCE0_PHYS_OFFSET |
23 | bool "0xc0000000 - SDCEO" | 23 | bool "0xc0000000 - SDCEO" |
24 | help | 24 | help |
25 | Select this option if you want support for EP93xx boards with the | 25 | Select this option if you want support for EP93xx boards with the |
26 | first SDRAM bank at 0xc0000000 | 26 | first SDRAM bank at 0xc0000000. |
27 | |||
28 | config EP93XX_SDCE1_PHYS_OFFSET | ||
29 | bool "0xd0000000 - SDCE1" | ||
30 | help | ||
31 | Select this option if you want support for EP93xx boards with the | ||
32 | first SDRAM bank at 0xd0000000. | ||
33 | |||
34 | config EP93XX_SDCE2_PHYS_OFFSET | ||
35 | bool "0xe0000000 - SDCE2" | ||
36 | help | ||
37 | Select this option if you want support for EP93xx boards with the | ||
38 | first SDRAM bank at 0xe0000000. | ||
39 | |||
40 | config EP93XX_SDCE3_ASYNC_PHYS_OFFSET | ||
41 | bool "0xf0000000 - SDCE3/AsyncBoot" | ||
42 | help | ||
43 | Select this option if you want support for EP93xx boards with the | ||
44 | first SDRAM bank at 0xf0000000. | ||
27 | 45 | ||
28 | endchoice | 46 | endchoice |
29 | 47 | ||
@@ -112,28 +130,36 @@ config MACH_MICRO9 | |||
112 | bool | 130 | bool |
113 | 131 | ||
114 | config MACH_MICRO9H | 132 | config MACH_MICRO9H |
115 | bool "Support Contec Hypercontrol Micro9-H" | 133 | bool "Support Contec Micro9-High" |
116 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET | 134 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET |
117 | select MACH_MICRO9 | 135 | select MACH_MICRO9 |
118 | help | 136 | help |
119 | Say 'Y' here if you want your kernel to support the | 137 | Say 'Y' here if you want your kernel to support the |
120 | Contec Hypercontrol Micro9-H board. | 138 | Contec Micro9-High board. |
121 | 139 | ||
122 | config MACH_MICRO9M | 140 | config MACH_MICRO9M |
123 | bool "Support Contec Hypercontrol Micro9-M" | 141 | bool "Support Contec Micro9-Mid" |
124 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET | 142 | depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET |
125 | select MACH_MICRO9 | 143 | select MACH_MICRO9 |
126 | help | 144 | help |
127 | Say 'Y' here if you want your kernel to support the | 145 | Say 'Y' here if you want your kernel to support the |
128 | Contec Hypercontrol Micro9-M board. | 146 | Contec Micro9-Mid board. |
129 | 147 | ||
130 | config MACH_MICRO9L | 148 | config MACH_MICRO9L |
131 | bool "Support Contec Hypercontrol Micro9-L" | 149 | bool "Support Contec Micro9-Lite" |
132 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET | 150 | depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET |
133 | select MACH_MICRO9 | 151 | select MACH_MICRO9 |
134 | help | 152 | help |
135 | Say 'Y' here if you want your kernel to support the | 153 | Say 'Y' here if you want your kernel to support the |
136 | Contec Hypercontrol Micro9-L board. | 154 | Contec Micro9-Lite board. |
155 | |||
156 | config MACH_MICRO9S | ||
157 | bool "Support Contec Micro9-Slim" | ||
158 | depends on EP93XX_SDCE3_ASYNC_PHYS_OFFSET | ||
159 | select MACH_MICRO9 | ||
160 | help | ||
161 | Say 'Y' here if you want your kernel to support the | ||
162 | Contec Micro9-Slim board. | ||
137 | 163 | ||
138 | config MACH_TS72XX | 164 | config MACH_TS72XX |
139 | bool "Support Technologic Systems TS-72xx SBC" | 165 | bool "Support Technologic Systems TS-72xx SBC" |
diff --git a/arch/arm/mach-ep93xx/Makefile.boot b/arch/arm/mach-ep93xx/Makefile.boot index 27a085a8f12a..0ad33f15c622 100644 --- a/arch/arm/mach-ep93xx/Makefile.boot +++ b/arch/arm/mach-ep93xx/Makefile.boot | |||
@@ -3,3 +3,12 @@ params_phys-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET) := 0x00000100 | |||
3 | 3 | ||
4 | zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0008000 | 4 | zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0008000 |
5 | params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100 | 5 | params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) := 0xc0000100 |
6 | |||
7 | zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0008000 | ||
8 | params_phys-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) := 0xd0000100 | ||
9 | |||
10 | zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0008000 | ||
11 | params_phys-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) := 0xe0000100 | ||
12 | |||
13 | zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0008000 | ||
14 | params_phys-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) := 0xf0000100 | ||
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c index dda19cd76194..1d0f9d8aff2e 100644 --- a/arch/arm/mach-ep93xx/clock.c +++ b/arch/arm/mach-ep93xx/clock.c | |||
@@ -16,13 +16,16 @@ | |||
16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
17 | #include <linux/string.h> | 17 | #include <linux/string.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/spinlock.h> | ||
20 | |||
21 | #include <mach/hardware.h> | ||
19 | 22 | ||
20 | #include <asm/clkdev.h> | 23 | #include <asm/clkdev.h> |
21 | #include <asm/div64.h> | 24 | #include <asm/div64.h> |
22 | #include <mach/hardware.h> | ||
23 | 25 | ||
24 | 26 | ||
25 | struct clk { | 27 | struct clk { |
28 | struct clk *parent; | ||
26 | unsigned long rate; | 29 | unsigned long rate; |
27 | int users; | 30 | int users; |
28 | int sw_locked; | 31 | int sw_locked; |
@@ -39,40 +42,60 @@ static unsigned long get_uart_rate(struct clk *clk); | |||
39 | static int set_keytchclk_rate(struct clk *clk, unsigned long rate); | 42 | static int set_keytchclk_rate(struct clk *clk, unsigned long rate); |
40 | static int set_div_rate(struct clk *clk, unsigned long rate); | 43 | static int set_div_rate(struct clk *clk, unsigned long rate); |
41 | 44 | ||
45 | |||
46 | static struct clk clk_xtali = { | ||
47 | .rate = EP93XX_EXT_CLK_RATE, | ||
48 | }; | ||
42 | static struct clk clk_uart1 = { | 49 | static struct clk clk_uart1 = { |
50 | .parent = &clk_xtali, | ||
43 | .sw_locked = 1, | 51 | .sw_locked = 1, |
44 | .enable_reg = EP93XX_SYSCON_DEVCFG, | 52 | .enable_reg = EP93XX_SYSCON_DEVCFG, |
45 | .enable_mask = EP93XX_SYSCON_DEVCFG_U1EN, | 53 | .enable_mask = EP93XX_SYSCON_DEVCFG_U1EN, |
46 | .get_rate = get_uart_rate, | 54 | .get_rate = get_uart_rate, |
47 | }; | 55 | }; |
48 | static struct clk clk_uart2 = { | 56 | static struct clk clk_uart2 = { |
57 | .parent = &clk_xtali, | ||
49 | .sw_locked = 1, | 58 | .sw_locked = 1, |
50 | .enable_reg = EP93XX_SYSCON_DEVCFG, | 59 | .enable_reg = EP93XX_SYSCON_DEVCFG, |
51 | .enable_mask = EP93XX_SYSCON_DEVCFG_U2EN, | 60 | .enable_mask = EP93XX_SYSCON_DEVCFG_U2EN, |
52 | .get_rate = get_uart_rate, | 61 | .get_rate = get_uart_rate, |
53 | }; | 62 | }; |
54 | static struct clk clk_uart3 = { | 63 | static struct clk clk_uart3 = { |
64 | .parent = &clk_xtali, | ||
55 | .sw_locked = 1, | 65 | .sw_locked = 1, |
56 | .enable_reg = EP93XX_SYSCON_DEVCFG, | 66 | .enable_reg = EP93XX_SYSCON_DEVCFG, |
57 | .enable_mask = EP93XX_SYSCON_DEVCFG_U3EN, | 67 | .enable_mask = EP93XX_SYSCON_DEVCFG_U3EN, |
58 | .get_rate = get_uart_rate, | 68 | .get_rate = get_uart_rate, |
59 | }; | 69 | }; |
60 | static struct clk clk_pll1; | 70 | static struct clk clk_pll1 = { |
61 | static struct clk clk_f; | 71 | .parent = &clk_xtali, |
62 | static struct clk clk_h; | 72 | }; |
63 | static struct clk clk_p; | 73 | static struct clk clk_f = { |
64 | static struct clk clk_pll2; | 74 | .parent = &clk_pll1, |
75 | }; | ||
76 | static struct clk clk_h = { | ||
77 | .parent = &clk_pll1, | ||
78 | }; | ||
79 | static struct clk clk_p = { | ||
80 | .parent = &clk_pll1, | ||
81 | }; | ||
82 | static struct clk clk_pll2 = { | ||
83 | .parent = &clk_xtali, | ||
84 | }; | ||
65 | static struct clk clk_usb_host = { | 85 | static struct clk clk_usb_host = { |
86 | .parent = &clk_pll2, | ||
66 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 87 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
67 | .enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN, | 88 | .enable_mask = EP93XX_SYSCON_PWRCNT_USH_EN, |
68 | }; | 89 | }; |
69 | static struct clk clk_keypad = { | 90 | static struct clk clk_keypad = { |
91 | .parent = &clk_xtali, | ||
70 | .sw_locked = 1, | 92 | .sw_locked = 1, |
71 | .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV, | 93 | .enable_reg = EP93XX_SYSCON_KEYTCHCLKDIV, |
72 | .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN, | 94 | .enable_mask = EP93XX_SYSCON_KEYTCHCLKDIV_KEN, |
73 | .set_rate = set_keytchclk_rate, | 95 | .set_rate = set_keytchclk_rate, |
74 | }; | 96 | }; |
75 | static struct clk clk_pwm = { | 97 | static struct clk clk_pwm = { |
98 | .parent = &clk_xtali, | ||
76 | .rate = EP93XX_EXT_CLK_RATE, | 99 | .rate = EP93XX_EXT_CLK_RATE, |
77 | }; | 100 | }; |
78 | 101 | ||
@@ -85,50 +108,62 @@ static struct clk clk_video = { | |||
85 | 108 | ||
86 | /* DMA Clocks */ | 109 | /* DMA Clocks */ |
87 | static struct clk clk_m2p0 = { | 110 | static struct clk clk_m2p0 = { |
111 | .parent = &clk_h, | ||
88 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 112 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
89 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P0, | 113 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P0, |
90 | }; | 114 | }; |
91 | static struct clk clk_m2p1 = { | 115 | static struct clk clk_m2p1 = { |
116 | .parent = &clk_h, | ||
92 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 117 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
93 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P1, | 118 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P1, |
94 | }; | 119 | }; |
95 | static struct clk clk_m2p2 = { | 120 | static struct clk clk_m2p2 = { |
121 | .parent = &clk_h, | ||
96 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 122 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
97 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P2, | 123 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P2, |
98 | }; | 124 | }; |
99 | static struct clk clk_m2p3 = { | 125 | static struct clk clk_m2p3 = { |
126 | .parent = &clk_h, | ||
100 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 127 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
101 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P3, | 128 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P3, |
102 | }; | 129 | }; |
103 | static struct clk clk_m2p4 = { | 130 | static struct clk clk_m2p4 = { |
131 | .parent = &clk_h, | ||
104 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 132 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
105 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P4, | 133 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P4, |
106 | }; | 134 | }; |
107 | static struct clk clk_m2p5 = { | 135 | static struct clk clk_m2p5 = { |
136 | .parent = &clk_h, | ||
108 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 137 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
109 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P5, | 138 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P5, |
110 | }; | 139 | }; |
111 | static struct clk clk_m2p6 = { | 140 | static struct clk clk_m2p6 = { |
141 | .parent = &clk_h, | ||
112 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 142 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
113 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P6, | 143 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P6, |
114 | }; | 144 | }; |
115 | static struct clk clk_m2p7 = { | 145 | static struct clk clk_m2p7 = { |
146 | .parent = &clk_h, | ||
116 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 147 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
117 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P7, | 148 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P7, |
118 | }; | 149 | }; |
119 | static struct clk clk_m2p8 = { | 150 | static struct clk clk_m2p8 = { |
151 | .parent = &clk_h, | ||
120 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 152 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
121 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P8, | 153 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P8, |
122 | }; | 154 | }; |
123 | static struct clk clk_m2p9 = { | 155 | static struct clk clk_m2p9 = { |
156 | .parent = &clk_h, | ||
124 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 157 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
125 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P9, | 158 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2P9, |
126 | }; | 159 | }; |
127 | static struct clk clk_m2m0 = { | 160 | static struct clk clk_m2m0 = { |
161 | .parent = &clk_h, | ||
128 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 162 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
129 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M0, | 163 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M0, |
130 | }; | 164 | }; |
131 | static struct clk clk_m2m1 = { | 165 | static struct clk clk_m2m1 = { |
166 | .parent = &clk_h, | ||
132 | .enable_reg = EP93XX_SYSCON_PWRCNT, | 167 | .enable_reg = EP93XX_SYSCON_PWRCNT, |
133 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1, | 168 | .enable_mask = EP93XX_SYSCON_PWRCNT_DMA_M2M1, |
134 | }; | 169 | }; |
@@ -137,6 +172,7 @@ static struct clk clk_m2m1 = { | |||
137 | { .dev_id = dev, .con_id = con, .clk = ck } | 172 | { .dev_id = dev, .con_id = con, .clk = ck } |
138 | 173 | ||
139 | static struct clk_lookup clocks[] = { | 174 | static struct clk_lookup clocks[] = { |
175 | INIT_CK(NULL, "xtali", &clk_xtali), | ||
140 | INIT_CK("apb:uart1", NULL, &clk_uart1), | 176 | INIT_CK("apb:uart1", NULL, &clk_uart1), |
141 | INIT_CK("apb:uart2", NULL, &clk_uart2), | 177 | INIT_CK("apb:uart2", NULL, &clk_uart2), |
142 | INIT_CK("apb:uart3", NULL, &clk_uart3), | 178 | INIT_CK("apb:uart3", NULL, &clk_uart3), |
@@ -163,48 +199,84 @@ static struct clk_lookup clocks[] = { | |||
163 | INIT_CK(NULL, "m2m1", &clk_m2m1), | 199 | INIT_CK(NULL, "m2m1", &clk_m2m1), |
164 | }; | 200 | }; |
165 | 201 | ||
202 | static DEFINE_SPINLOCK(clk_lock); | ||
203 | |||
204 | static void __clk_enable(struct clk *clk) | ||
205 | { | ||
206 | if (!clk->users++) { | ||
207 | if (clk->parent) | ||
208 | __clk_enable(clk->parent); | ||
209 | |||
210 | if (clk->enable_reg) { | ||
211 | u32 v; | ||
212 | |||
213 | v = __raw_readl(clk->enable_reg); | ||
214 | v |= clk->enable_mask; | ||
215 | if (clk->sw_locked) | ||
216 | ep93xx_syscon_swlocked_write(v, clk->enable_reg); | ||
217 | else | ||
218 | __raw_writel(v, clk->enable_reg); | ||
219 | } | ||
220 | } | ||
221 | } | ||
166 | 222 | ||
167 | int clk_enable(struct clk *clk) | 223 | int clk_enable(struct clk *clk) |
168 | { | 224 | { |
169 | if (!clk->users++ && clk->enable_reg) { | 225 | unsigned long flags; |
170 | u32 value; | ||
171 | 226 | ||
172 | value = __raw_readl(clk->enable_reg); | 227 | if (!clk) |
173 | value |= clk->enable_mask; | 228 | return -EINVAL; |
174 | if (clk->sw_locked) | 229 | |
175 | ep93xx_syscon_swlocked_write(value, clk->enable_reg); | 230 | spin_lock_irqsave(&clk_lock, flags); |
176 | else | 231 | __clk_enable(clk); |
177 | __raw_writel(value, clk->enable_reg); | 232 | spin_unlock_irqrestore(&clk_lock, flags); |
178 | } | ||
179 | 233 | ||
180 | return 0; | 234 | return 0; |
181 | } | 235 | } |
182 | EXPORT_SYMBOL(clk_enable); | 236 | EXPORT_SYMBOL(clk_enable); |
183 | 237 | ||
184 | void clk_disable(struct clk *clk) | 238 | static void __clk_disable(struct clk *clk) |
185 | { | 239 | { |
186 | if (!--clk->users && clk->enable_reg) { | 240 | if (!--clk->users) { |
187 | u32 value; | 241 | if (clk->enable_reg) { |
242 | u32 v; | ||
243 | |||
244 | v = __raw_readl(clk->enable_reg); | ||
245 | v &= ~clk->enable_mask; | ||
246 | if (clk->sw_locked) | ||
247 | ep93xx_syscon_swlocked_write(v, clk->enable_reg); | ||
248 | else | ||
249 | __raw_writel(v, clk->enable_reg); | ||
250 | } | ||
188 | 251 | ||
189 | value = __raw_readl(clk->enable_reg); | 252 | if (clk->parent) |
190 | value &= ~clk->enable_mask; | 253 | __clk_disable(clk->parent); |
191 | if (clk->sw_locked) | ||
192 | ep93xx_syscon_swlocked_write(value, clk->enable_reg); | ||
193 | else | ||
194 | __raw_writel(value, clk->enable_reg); | ||
195 | } | 254 | } |
196 | } | 255 | } |
256 | |||
257 | void clk_disable(struct clk *clk) | ||
258 | { | ||
259 | unsigned long flags; | ||
260 | |||
261 | if (!clk) | ||
262 | return; | ||
263 | |||
264 | spin_lock_irqsave(&clk_lock, flags); | ||
265 | __clk_disable(clk); | ||
266 | spin_unlock_irqrestore(&clk_lock, flags); | ||
267 | } | ||
197 | EXPORT_SYMBOL(clk_disable); | 268 | EXPORT_SYMBOL(clk_disable); |
198 | 269 | ||
199 | static unsigned long get_uart_rate(struct clk *clk) | 270 | static unsigned long get_uart_rate(struct clk *clk) |
200 | { | 271 | { |
272 | unsigned long rate = clk_get_rate(clk->parent); | ||
201 | u32 value; | 273 | u32 value; |
202 | 274 | ||
203 | value = __raw_readl(EP93XX_SYSCON_PWRCNT); | 275 | value = __raw_readl(EP93XX_SYSCON_PWRCNT); |
204 | if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD) | 276 | if (value & EP93XX_SYSCON_PWRCNT_UARTBAUD) |
205 | return EP93XX_EXT_CLK_RATE; | 277 | return rate; |
206 | else | 278 | else |
207 | return EP93XX_EXT_CLK_RATE / 2; | 279 | return rate / 2; |
208 | } | 280 | } |
209 | 281 | ||
210 | unsigned long clk_get_rate(struct clk *clk) | 282 | unsigned long clk_get_rate(struct clk *clk) |
@@ -244,16 +316,16 @@ static int set_keytchclk_rate(struct clk *clk, unsigned long rate) | |||
244 | return 0; | 316 | return 0; |
245 | } | 317 | } |
246 | 318 | ||
247 | static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, | 319 | static int calc_clk_div(struct clk *clk, unsigned long rate, |
248 | int *pdiv, int *div) | 320 | int *psel, int *esel, int *pdiv, int *div) |
249 | { | 321 | { |
250 | unsigned long max_rate, best_rate = 0, | 322 | struct clk *mclk; |
251 | actual_rate = 0, mclk_rate = 0, rate_err = -1; | 323 | unsigned long max_rate, actual_rate, mclk_rate, rate_err = -1; |
252 | int i, found = 0, __div = 0, __pdiv = 0; | 324 | int i, found = 0, __div = 0, __pdiv = 0; |
253 | 325 | ||
254 | /* Don't exceed the maximum rate */ | 326 | /* Don't exceed the maximum rate */ |
255 | max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), | 327 | max_rate = max(max(clk_pll1.rate / 4, clk_pll2.rate / 4), |
256 | (unsigned long)EP93XX_EXT_CLK_RATE / 4); | 328 | clk_xtali.rate / 4); |
257 | rate = min(rate, max_rate); | 329 | rate = min(rate, max_rate); |
258 | 330 | ||
259 | /* | 331 | /* |
@@ -267,11 +339,12 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, | |||
267 | */ | 339 | */ |
268 | for (i = 0; i < 3; i++) { | 340 | for (i = 0; i < 3; i++) { |
269 | if (i == 0) | 341 | if (i == 0) |
270 | mclk_rate = EP93XX_EXT_CLK_RATE * 2; | 342 | mclk = &clk_xtali; |
271 | else if (i == 1) | 343 | else if (i == 1) |
272 | mclk_rate = clk_pll1.rate * 2; | 344 | mclk = &clk_pll1; |
273 | else if (i == 2) | 345 | else |
274 | mclk_rate = clk_pll2.rate * 2; | 346 | mclk = &clk_pll2; |
347 | mclk_rate = mclk->rate * 2; | ||
275 | 348 | ||
276 | /* Try each predivider value */ | 349 | /* Try each predivider value */ |
277 | for (__pdiv = 4; __pdiv <= 6; __pdiv++) { | 350 | for (__pdiv = 4; __pdiv <= 6; __pdiv++) { |
@@ -286,7 +359,8 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, | |||
286 | *div = __div; | 359 | *div = __div; |
287 | *psel = (i == 2); | 360 | *psel = (i == 2); |
288 | *esel = (i != 0); | 361 | *esel = (i != 0); |
289 | best_rate = actual_rate; | 362 | clk->parent = mclk; |
363 | clk->rate = actual_rate; | ||
290 | rate_err = abs(actual_rate - rate); | 364 | rate_err = abs(actual_rate - rate); |
291 | found = 1; | 365 | found = 1; |
292 | } | 366 | } |
@@ -294,21 +368,19 @@ static unsigned long calc_clk_div(unsigned long rate, int *psel, int *esel, | |||
294 | } | 368 | } |
295 | 369 | ||
296 | if (!found) | 370 | if (!found) |
297 | return 0; | 371 | return -EINVAL; |
298 | 372 | ||
299 | return best_rate; | 373 | return 0; |
300 | } | 374 | } |
301 | 375 | ||
302 | static int set_div_rate(struct clk *clk, unsigned long rate) | 376 | static int set_div_rate(struct clk *clk, unsigned long rate) |
303 | { | 377 | { |
304 | unsigned long actual_rate; | 378 | int err, psel = 0, esel = 0, pdiv = 0, div = 0; |
305 | int psel = 0, esel = 0, pdiv = 0, div = 0; | ||
306 | u32 val; | 379 | u32 val; |
307 | 380 | ||
308 | actual_rate = calc_clk_div(rate, &psel, &esel, &pdiv, &div); | 381 | err = calc_clk_div(clk, rate, &psel, &esel, &pdiv, &div); |
309 | if (actual_rate == 0) | 382 | if (err) |
310 | return -EINVAL; | 383 | return err; |
311 | clk->rate = actual_rate; | ||
312 | 384 | ||
313 | /* Clear the esel, psel, pdiv and div bits */ | 385 | /* Clear the esel, psel, pdiv and div bits */ |
314 | val = __raw_readl(clk->enable_reg); | 386 | val = __raw_readl(clk->enable_reg); |
@@ -344,7 +416,7 @@ static unsigned long calc_pll_rate(u32 config_word) | |||
344 | unsigned long long rate; | 416 | unsigned long long rate; |
345 | int i; | 417 | int i; |
346 | 418 | ||
347 | rate = EP93XX_EXT_CLK_RATE; | 419 | rate = clk_xtali.rate; |
348 | rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ | 420 | rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ |
349 | rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ | 421 | rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ |
350 | do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ | 422 | do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ |
@@ -377,7 +449,7 @@ static int __init ep93xx_clock_init(void) | |||
377 | 449 | ||
378 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); | 450 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); |
379 | if (!(value & 0x00800000)) { /* PLL1 bypassed? */ | 451 | if (!(value & 0x00800000)) { /* PLL1 bypassed? */ |
380 | clk_pll1.rate = EP93XX_EXT_CLK_RATE; | 452 | clk_pll1.rate = clk_xtali.rate; |
381 | } else { | 453 | } else { |
382 | clk_pll1.rate = calc_pll_rate(value); | 454 | clk_pll1.rate = calc_pll_rate(value); |
383 | } | 455 | } |
@@ -388,7 +460,7 @@ static int __init ep93xx_clock_init(void) | |||
388 | 460 | ||
389 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); | 461 | value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); |
390 | if (!(value & 0x00080000)) { /* PLL2 bypassed? */ | 462 | if (!(value & 0x00080000)) { /* PLL2 bypassed? */ |
391 | clk_pll2.rate = EP93XX_EXT_CLK_RATE; | 463 | clk_pll2.rate = clk_xtali.rate; |
392 | } else if (value & 0x00040000) { /* PLL2 enabled? */ | 464 | } else if (value & 0x00040000) { /* PLL2 enabled? */ |
393 | clk_pll2.rate = calc_pll_rate(value); | 465 | clk_pll2.rate = calc_pll_rate(value); |
394 | } else { | 466 | } else { |
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index f7ebed942f66..f95dc160c34b 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -550,13 +550,11 @@ void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) | |||
550 | platform_device_register(&ep93xx_eth_device); | 550 | platform_device_register(&ep93xx_eth_device); |
551 | } | 551 | } |
552 | 552 | ||
553 | static struct i2c_gpio_platform_data ep93xx_i2c_data = { | 553 | |
554 | .sda_pin = EP93XX_GPIO_LINE_EEDAT, | 554 | /************************************************************************* |
555 | .sda_is_open_drain = 0, | 555 | * EP93xx i2c peripheral handling |
556 | .scl_pin = EP93XX_GPIO_LINE_EECLK, | 556 | *************************************************************************/ |
557 | .scl_is_open_drain = 0, | 557 | static struct i2c_gpio_platform_data ep93xx_i2c_data; |
558 | .udelay = 2, | ||
559 | }; | ||
560 | 558 | ||
561 | static struct platform_device ep93xx_i2c_device = { | 559 | static struct platform_device ep93xx_i2c_device = { |
562 | .name = "i2c-gpio", | 560 | .name = "i2c-gpio", |
@@ -564,8 +562,25 @@ static struct platform_device ep93xx_i2c_device = { | |||
564 | .dev.platform_data = &ep93xx_i2c_data, | 562 | .dev.platform_data = &ep93xx_i2c_data, |
565 | }; | 563 | }; |
566 | 564 | ||
567 | void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num) | 565 | void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data, |
566 | struct i2c_board_info *devices, int num) | ||
568 | { | 567 | { |
568 | /* | ||
569 | * Set the EEPROM interface pin drive type control. | ||
570 | * Defines the driver type for the EECLK and EEDAT pins as either | ||
571 | * open drain, which will require an external pull-up, or a normal | ||
572 | * CMOS driver. | ||
573 | */ | ||
574 | if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT) | ||
575 | pr_warning("ep93xx: sda != EEDAT, open drain has no effect\n"); | ||
576 | if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK) | ||
577 | pr_warning("ep93xx: scl != EECLK, open drain has no effect\n"); | ||
578 | |||
579 | __raw_writel((data->sda_is_open_drain << 1) | | ||
580 | (data->scl_is_open_drain << 0), | ||
581 | EP93XX_GPIO_EEDRIVE); | ||
582 | |||
583 | ep93xx_i2c_data = *data; | ||
569 | i2c_register_board_info(0, devices, num); | 584 | i2c_register_board_info(0, devices, num); |
570 | platform_device_register(&ep93xx_i2c_device); | 585 | platform_device_register(&ep93xx_i2c_device); |
571 | } | 586 | } |
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c index 73145ae5d3fa..ca71cf1a72a0 100644 --- a/arch/arm/mach-ep93xx/edb93xx.c +++ b/arch/arm/mach-ep93xx/edb93xx.c | |||
@@ -27,8 +27,10 @@ | |||
27 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
28 | #include <linux/init.h> | 28 | #include <linux/init.h> |
29 | #include <linux/platform_device.h> | 29 | #include <linux/platform_device.h> |
30 | #include <linux/i2c.h> | ||
31 | #include <linux/mtd/physmap.h> | 30 | #include <linux/mtd/physmap.h> |
31 | #include <linux/gpio.h> | ||
32 | #include <linux/i2c.h> | ||
33 | #include <linux/i2c-gpio.h> | ||
32 | 34 | ||
33 | #include <mach/hardware.h> | 35 | #include <mach/hardware.h> |
34 | 36 | ||
@@ -76,13 +78,26 @@ static struct ep93xx_eth_data edb93xx_eth_data = { | |||
76 | .phy_id = 1, | 78 | .phy_id = 1, |
77 | }; | 79 | }; |
78 | 80 | ||
79 | static struct i2c_board_info __initdata edb93xxa_i2c_data[] = { | 81 | |
82 | /************************************************************************* | ||
83 | * EDB93xx i2c peripheral handling | ||
84 | *************************************************************************/ | ||
85 | static struct i2c_gpio_platform_data edb93xx_i2c_gpio_data = { | ||
86 | .sda_pin = EP93XX_GPIO_LINE_EEDAT, | ||
87 | .sda_is_open_drain = 0, | ||
88 | .scl_pin = EP93XX_GPIO_LINE_EECLK, | ||
89 | .scl_is_open_drain = 0, | ||
90 | .udelay = 0, /* default to 100 kHz */ | ||
91 | .timeout = 0, /* default to 100 ms */ | ||
92 | }; | ||
93 | |||
94 | static struct i2c_board_info __initdata edb93xxa_i2c_board_info[] = { | ||
80 | { | 95 | { |
81 | I2C_BOARD_INFO("isl1208", 0x6f), | 96 | I2C_BOARD_INFO("isl1208", 0x6f), |
82 | }, | 97 | }, |
83 | }; | 98 | }; |
84 | 99 | ||
85 | static struct i2c_board_info __initdata edb93xx_i2c_data[] = { | 100 | static struct i2c_board_info __initdata edb93xx_i2c_board_info[] = { |
86 | { | 101 | { |
87 | I2C_BOARD_INFO("ds1337", 0x68), | 102 | I2C_BOARD_INFO("ds1337", 0x68), |
88 | }, | 103 | }, |
@@ -92,12 +107,14 @@ static void __init edb93xx_register_i2c(void) | |||
92 | { | 107 | { |
93 | if (machine_is_edb9302a() || machine_is_edb9307a() || | 108 | if (machine_is_edb9302a() || machine_is_edb9307a() || |
94 | machine_is_edb9315a()) { | 109 | machine_is_edb9315a()) { |
95 | ep93xx_register_i2c(edb93xxa_i2c_data, | 110 | ep93xx_register_i2c(&edb93xx_i2c_gpio_data, |
96 | ARRAY_SIZE(edb93xxa_i2c_data)); | 111 | edb93xxa_i2c_board_info, |
112 | ARRAY_SIZE(edb93xxa_i2c_board_info)); | ||
97 | } else if (machine_is_edb9307() || machine_is_edb9312() || | 113 | } else if (machine_is_edb9307() || machine_is_edb9312() || |
98 | machine_is_edb9315()) { | 114 | machine_is_edb9315()) { |
99 | ep93xx_register_i2c(edb93xx_i2c_data, | 115 | ep93xx_register_i2c(&edb93xx_i2c_gpio_data |
100 | ARRAY_SIZE(edb93xx_i2c_data)); | 116 | edb93xx_i2c_board_info, |
117 | ARRAY_SIZE(edb93xx_i2c_board_info)); | ||
101 | } | 118 | } |
102 | } | 119 | } |
103 | 120 | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 0fbf87b16338..b1f937eda29c 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |||
@@ -52,25 +52,27 @@ | |||
52 | #define EP93XX_AHB_VIRT_BASE 0xfef00000 | 52 | #define EP93XX_AHB_VIRT_BASE 0xfef00000 |
53 | #define EP93XX_AHB_SIZE 0x00100000 | 53 | #define EP93XX_AHB_SIZE 0x00100000 |
54 | 54 | ||
55 | #define EP93XX_AHB_PHYS(x) (EP93XX_AHB_PHYS_BASE + (x)) | ||
55 | #define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x)) | 56 | #define EP93XX_AHB_IOMEM(x) IOMEM(EP93XX_AHB_VIRT_BASE + (x)) |
56 | 57 | ||
57 | #define EP93XX_APB_PHYS_BASE 0x80800000 | 58 | #define EP93XX_APB_PHYS_BASE 0x80800000 |
58 | #define EP93XX_APB_VIRT_BASE 0xfed00000 | 59 | #define EP93XX_APB_VIRT_BASE 0xfed00000 |
59 | #define EP93XX_APB_SIZE 0x00200000 | 60 | #define EP93XX_APB_SIZE 0x00200000 |
60 | 61 | ||
62 | #define EP93XX_APB_PHYS(x) (EP93XX_APB_PHYS_BASE + (x)) | ||
61 | #define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) | 63 | #define EP93XX_APB_IOMEM(x) IOMEM(EP93XX_APB_VIRT_BASE + (x)) |
62 | 64 | ||
63 | 65 | ||
64 | /* AHB peripherals */ | 66 | /* AHB peripherals */ |
65 | #define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) | 67 | #define EP93XX_DMA_BASE EP93XX_AHB_IOMEM(0x00000000) |
66 | 68 | ||
67 | #define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) | 69 | #define EP93XX_ETHERNET_PHYS_BASE EP93XX_AHB_PHYS(0x00010000) |
68 | #define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) | 70 | #define EP93XX_ETHERNET_BASE EP93XX_AHB_IOMEM(0x00010000) |
69 | 71 | ||
70 | #define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) | 72 | #define EP93XX_USB_PHYS_BASE EP93XX_AHB_PHYS(0x00020000) |
71 | #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) | 73 | #define EP93XX_USB_BASE EP93XX_AHB_IOMEM(0x00020000) |
72 | 74 | ||
73 | #define EP93XX_RASTER_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00030000) | 75 | #define EP93XX_RASTER_PHYS_BASE EP93XX_AHB_PHYS(0x00030000) |
74 | #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) | 76 | #define EP93XX_RASTER_BASE EP93XX_AHB_IOMEM(0x00030000) |
75 | 77 | ||
76 | #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) | 78 | #define EP93XX_GRAPHICS_ACCEL_BASE EP93XX_AHB_IOMEM(0x00040000) |
@@ -112,21 +114,10 @@ | |||
112 | 114 | ||
113 | #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) | 115 | #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) |
114 | #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) | 116 | #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) |
115 | #define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c) | ||
116 | #define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50) | ||
117 | #define EP93XX_GPIO_F_INT_ACK EP93XX_GPIO_REG(0x54) | ||
118 | #define EP93XX_GPIO_F_INT_ENABLE EP93XX_GPIO_REG(0x58) | ||
119 | #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) | 117 | #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) |
120 | #define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90) | ||
121 | #define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94) | ||
122 | #define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98) | ||
123 | #define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c) | ||
124 | #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) | 118 | #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) |
125 | #define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac) | ||
126 | #define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0) | ||
127 | #define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4) | ||
128 | #define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8) | ||
129 | #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) | 119 | #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) |
120 | #define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8) | ||
130 | 121 | ||
131 | #define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) | 122 | #define EP93XX_AAC_BASE EP93XX_APB_IOMEM(0x00080000) |
132 | 123 | ||
@@ -134,13 +125,13 @@ | |||
134 | 125 | ||
135 | #define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) | 126 | #define EP93XX_IRDA_BASE EP93XX_APB_IOMEM(0x000b0000) |
136 | 127 | ||
137 | #define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000) | 128 | #define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000) |
138 | #define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000) | 129 | #define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000) |
139 | 130 | ||
140 | #define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000) | 131 | #define EP93XX_UART2_PHYS_BASE EP93XX_APB_PHYS(0x000d0000) |
141 | #define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000) | 132 | #define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000) |
142 | 133 | ||
143 | #define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000) | 134 | #define EP93XX_UART3_PHYS_BASE EP93XX_APB_PHYS(0x000e0000) |
144 | #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) | 135 | #define EP93XX_UART3_BASE EP93XX_APB_IOMEM(0x000e0000) |
145 | 136 | ||
146 | #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) | 137 | #define EP93XX_KEY_MATRIX_BASE EP93XX_APB_IOMEM(0x000f0000) |
@@ -148,10 +139,10 @@ | |||
148 | #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) | 139 | #define EP93XX_ADC_BASE EP93XX_APB_IOMEM(0x00100000) |
149 | #define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) | 140 | #define EP93XX_TOUCHSCREEN_BASE EP93XX_APB_IOMEM(0x00100000) |
150 | 141 | ||
151 | #define EP93XX_PWM_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00110000) | 142 | #define EP93XX_PWM_PHYS_BASE EP93XX_APB_PHYS(0x00110000) |
152 | #define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) | 143 | #define EP93XX_PWM_BASE EP93XX_APB_IOMEM(0x00110000) |
153 | 144 | ||
154 | #define EP93XX_RTC_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x00120000) | 145 | #define EP93XX_RTC_PHYS_BASE EP93XX_APB_PHYS(0x00120000) |
155 | #define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) | 146 | #define EP93XX_RTC_BASE EP93XX_APB_IOMEM(0x00120000) |
156 | 147 | ||
157 | #define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) | 148 | #define EP93XX_SYSCON_BASE EP93XX_APB_IOMEM(0x00130000) |
@@ -218,6 +209,17 @@ | |||
218 | #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) | 209 | #define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16) |
219 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) | 210 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KEN (1<<15) |
220 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) | 211 | #define EP93XX_SYSCON_KEYTCHCLKDIV_KDIV (1<<0) |
212 | #define EP93XX_SYSCON_SYSCFG EP93XX_SYSCON_REG(0x9c) | ||
213 | #define EP93XX_SYSCON_SYSCFG_REV_MASK (0xf0000000) | ||
214 | #define EP93XX_SYSCON_SYSCFG_REV_SHIFT (28) | ||
215 | #define EP93XX_SYSCON_SYSCFG_SBOOT (1<<8) | ||
216 | #define EP93XX_SYSCON_SYSCFG_LCSN7 (1<<7) | ||
217 | #define EP93XX_SYSCON_SYSCFG_LCSN6 (1<<6) | ||
218 | #define EP93XX_SYSCON_SYSCFG_LASDO (1<<5) | ||
219 | #define EP93XX_SYSCON_SYSCFG_LEEDA (1<<4) | ||
220 | #define EP93XX_SYSCON_SYSCFG_LEECLK (1<<3) | ||
221 | #define EP93XX_SYSCON_SYSCFG_LCSN2 (1<<1) | ||
222 | #define EP93XX_SYSCON_SYSCFG_LCSN1 (1<<0) | ||
221 | #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) | 223 | #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) |
222 | 224 | ||
223 | #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) | 225 | #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) |
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h index 0a1498ae899a..c991b149bdf2 100644 --- a/arch/arm/mach-ep93xx/include/mach/gpio.h +++ b/arch/arm/mach-ep93xx/include/mach/gpio.h | |||
@@ -114,17 +114,9 @@ extern void ep93xx_gpio_int_debounce(unsigned int irq, int enable); | |||
114 | * B0..B7 (7..15) to irq 72..79, and | 114 | * B0..B7 (7..15) to irq 72..79, and |
115 | * F0..F7 (16..24) to irq 80..87. | 115 | * F0..F7 (16..24) to irq 80..87. |
116 | */ | 116 | */ |
117 | static inline int gpio_to_irq(unsigned gpio) | 117 | #define gpio_to_irq(gpio) \ |
118 | { | 118 | (((gpio) <= EP93XX_GPIO_LINE_MAX_IRQ) ? (64 + (gpio)) : -EINVAL) |
119 | if (gpio <= EP93XX_GPIO_LINE_MAX_IRQ) | 119 | |
120 | return 64 + gpio; | 120 | #define irq_to_gpio(irq) ((irq) - gpio_to_irq(0)) |
121 | |||
122 | return -EINVAL; | ||
123 | } | ||
124 | |||
125 | static inline int irq_to_gpio(unsigned irq) | ||
126 | { | ||
127 | return irq - gpio_to_irq(0); | ||
128 | } | ||
129 | 121 | ||
130 | #endif | 122 | #endif |
diff --git a/arch/arm/mach-ep93xx/include/mach/memory.h b/arch/arm/mach-ep93xx/include/mach/memory.h index 925b12ea0990..554064e90307 100644 --- a/arch/arm/mach-ep93xx/include/mach/memory.h +++ b/arch/arm/mach-ep93xx/include/mach/memory.h | |||
@@ -9,6 +9,12 @@ | |||
9 | #define PHYS_OFFSET UL(0x00000000) | 9 | #define PHYS_OFFSET UL(0x00000000) |
10 | #elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) | 10 | #elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET) |
11 | #define PHYS_OFFSET UL(0xc0000000) | 11 | #define PHYS_OFFSET UL(0xc0000000) |
12 | #elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET) | ||
13 | #define PHYS_OFFSET UL(0xd0000000) | ||
14 | #elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET) | ||
15 | #define PHYS_OFFSET UL(0xe0000000) | ||
16 | #elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET) | ||
17 | #define PHYS_OFFSET UL(0xf0000000) | ||
12 | #else | 18 | #else |
13 | #error "Kconfig bug: No EP93xx PHYS_OFFSET set" | 19 | #error "Kconfig bug: No EP93xx PHYS_OFFSET set" |
14 | #endif | 20 | #endif |
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h index 01a0f0838e5b..a3ec33fd79d4 100644 --- a/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/arch/arm/mach-ep93xx/include/mach/platform.h | |||
@@ -4,6 +4,7 @@ | |||
4 | 4 | ||
5 | #ifndef __ASSEMBLY__ | 5 | #ifndef __ASSEMBLY__ |
6 | 6 | ||
7 | struct i2c_gpio_platform_data; | ||
7 | struct i2c_board_info; | 8 | struct i2c_board_info; |
8 | struct platform_device; | 9 | struct platform_device; |
9 | struct ep93xxfb_mach_info; | 10 | struct ep93xxfb_mach_info; |
@@ -33,7 +34,8 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits) | |||
33 | } | 34 | } |
34 | 35 | ||
35 | void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); | 36 | void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr); |
36 | void ep93xx_register_i2c(struct i2c_board_info *devices, int num); | 37 | void ep93xx_register_i2c(struct i2c_gpio_platform_data *data, |
38 | struct i2c_board_info *devices, int num); | ||
37 | void ep93xx_register_fb(struct ep93xxfb_mach_info *data); | 39 | void ep93xx_register_fb(struct ep93xxfb_mach_info *data); |
38 | void ep93xx_register_pwm(int pwm0, int pwm1); | 40 | void ep93xx_register_pwm(int pwm0, int pwm1); |
39 | int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); | 41 | int ep93xx_pwm_acquire_gpio(struct platform_device *pdev); |
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c index 0a313e82fb74..d83b80478b09 100644 --- a/arch/arm/mach-ep93xx/micro9.c +++ b/arch/arm/mach-ep93xx/micro9.c | |||
@@ -2,7 +2,9 @@ | |||
2 | * linux/arch/arm/mach-ep93xx/micro9.c | 2 | * linux/arch/arm/mach-ep93xx/micro9.c |
3 | * | 3 | * |
4 | * Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH | 4 | * Copyright (C) 2006 Contec Steuerungstechnik & Automation GmbH |
5 | * Manfred Gruber <manfred.gruber@contec.at> | 5 | * Manfred Gruber <m.gruber@tirol.com> |
6 | * Copyright (C) 2009 Contec Steuerungstechnik & Automation GmbH | ||
7 | * Hubert Feurstein <hubert.feurstein@contec.at> | ||
6 | * | 8 | * |
7 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | 10 | * it under the terms of the GNU General Public License version 2 as |
@@ -20,104 +22,124 @@ | |||
20 | #include <asm/mach/arch.h> | 22 | #include <asm/mach/arch.h> |
21 | 23 | ||
22 | 24 | ||
23 | static struct ep93xx_eth_data micro9_eth_data = { | 25 | /************************************************************************* |
24 | .phy_id = 0x1f, | 26 | * Micro9 NOR Flash |
25 | }; | 27 | * |
26 | 28 | * Micro9-High has up to 64MB of 32-bit flash on CS1 | |
27 | static void __init micro9_init(void) | 29 | * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1 |
28 | { | 30 | * Micro9-Lite uses a seperate MTD map driver for flash support |
29 | ep93xx_register_eth(µ9_eth_data, 1); | 31 | * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1 |
30 | } | 32 | *************************************************************************/ |
31 | 33 | static struct physmap_flash_data micro9_flash_data; | |
32 | /* | 34 | |
33 | * Micro9-H | 35 | static struct resource micro9_flash_resource = { |
34 | */ | ||
35 | #ifdef CONFIG_MACH_MICRO9H | ||
36 | static struct physmap_flash_data micro9h_flash_data = { | ||
37 | .width = 4, | ||
38 | }; | ||
39 | |||
40 | static struct resource micro9h_flash_resource = { | ||
41 | .start = EP93XX_CS1_PHYS_BASE, | 36 | .start = EP93XX_CS1_PHYS_BASE, |
42 | .end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1, | 37 | .end = EP93XX_CS1_PHYS_BASE + SZ_64M - 1, |
43 | .flags = IORESOURCE_MEM, | 38 | .flags = IORESOURCE_MEM, |
44 | }; | 39 | }; |
45 | 40 | ||
46 | static struct platform_device micro9h_flash = { | 41 | static struct platform_device micro9_flash = { |
47 | .name = "physmap-flash", | 42 | .name = "physmap-flash", |
48 | .id = 0, | 43 | .id = 0, |
49 | .dev = { | 44 | .dev = { |
50 | .platform_data = µ9h_flash_data, | 45 | .platform_data = µ9_flash_data, |
51 | }, | 46 | }, |
52 | .num_resources = 1, | 47 | .num_resources = 1, |
53 | .resource = µ9h_flash_resource, | 48 | .resource = µ9_flash_resource, |
54 | }; | 49 | }; |
55 | 50 | ||
56 | static void __init micro9h_init(void) | 51 | static void __init __micro9_register_flash(unsigned int width) |
52 | { | ||
53 | micro9_flash_data.width = width; | ||
54 | |||
55 | platform_device_register(µ9_flash); | ||
56 | } | ||
57 | |||
58 | static unsigned int __init micro9_detect_bootwidth(void) | ||
59 | { | ||
60 | u32 v; | ||
61 | |||
62 | /* Detect the bus width of the external flash memory */ | ||
63 | v = __raw_readl(EP93XX_SYSCON_SYSCFG); | ||
64 | if (v & EP93XX_SYSCON_SYSCFG_LCSN7) | ||
65 | return 4; /* 32-bit */ | ||
66 | else | ||
67 | return 2; /* 16-bit */ | ||
68 | } | ||
69 | |||
70 | static void __init micro9_register_flash(void) | ||
57 | { | 71 | { |
58 | platform_device_register(µ9h_flash); | 72 | if (machine_is_micro9()) |
73 | __micro9_register_flash(4); | ||
74 | else if (machine_is_micro9m() || machine_is_micro9s()) | ||
75 | __micro9_register_flash(micro9_detect_bootwidth()); | ||
59 | } | 76 | } |
60 | 77 | ||
61 | static void __init micro9h_init_machine(void) | 78 | |
79 | /************************************************************************* | ||
80 | * Micro9 Ethernet | ||
81 | *************************************************************************/ | ||
82 | static struct ep93xx_eth_data micro9_eth_data = { | ||
83 | .phy_id = 0x1f, | ||
84 | }; | ||
85 | |||
86 | |||
87 | static void __init micro9_init_machine(void) | ||
62 | { | 88 | { |
63 | ep93xx_init_devices(); | 89 | ep93xx_init_devices(); |
64 | micro9_init(); | 90 | ep93xx_register_eth(µ9_eth_data, 1); |
65 | micro9h_init(); | 91 | micro9_register_flash(); |
66 | } | 92 | } |
67 | 93 | ||
68 | MACHINE_START(MICRO9, "Contec Hypercontrol Micro9-H") | 94 | |
69 | /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ | 95 | #ifdef CONFIG_MACH_MICRO9H |
96 | MACHINE_START(MICRO9, "Contec Micro9-High") | ||
97 | /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ | ||
70 | .phys_io = EP93XX_APB_PHYS_BASE, | 98 | .phys_io = EP93XX_APB_PHYS_BASE, |
71 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | 99 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, |
72 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, | 100 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, |
73 | .map_io = ep93xx_map_io, | 101 | .map_io = ep93xx_map_io, |
74 | .init_irq = ep93xx_init_irq, | 102 | .init_irq = ep93xx_init_irq, |
75 | .timer = &ep93xx_timer, | 103 | .timer = &ep93xx_timer, |
76 | .init_machine = micro9h_init_machine, | 104 | .init_machine = micro9_init_machine, |
77 | MACHINE_END | 105 | MACHINE_END |
78 | #endif | 106 | #endif |
79 | 107 | ||
80 | /* | ||
81 | * Micro9-M | ||
82 | */ | ||
83 | #ifdef CONFIG_MACH_MICRO9M | 108 | #ifdef CONFIG_MACH_MICRO9M |
84 | static void __init micro9m_init_machine(void) | 109 | MACHINE_START(MICRO9M, "Contec Micro9-Mid") |
85 | { | 110 | /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ |
86 | ep93xx_init_devices(); | ||
87 | micro9_init(); | ||
88 | } | ||
89 | |||
90 | MACHINE_START(MICRO9M, "Contec Hypercontrol Micro9-M") | ||
91 | /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ | ||
92 | .phys_io = EP93XX_APB_PHYS_BASE, | 111 | .phys_io = EP93XX_APB_PHYS_BASE, |
93 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | 112 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, |
94 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, | 113 | .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100, |
95 | .map_io = ep93xx_map_io, | 114 | .map_io = ep93xx_map_io, |
96 | .init_irq = ep93xx_init_irq, | 115 | .init_irq = ep93xx_init_irq, |
97 | .timer = &ep93xx_timer, | 116 | .timer = &ep93xx_timer, |
98 | .init_machine = micro9m_init_machine, | 117 | .init_machine = micro9_init_machine, |
99 | MACHINE_END | 118 | MACHINE_END |
100 | #endif | 119 | #endif |
101 | 120 | ||
102 | /* | ||
103 | * Micro9-L | ||
104 | */ | ||
105 | #ifdef CONFIG_MACH_MICRO9L | 121 | #ifdef CONFIG_MACH_MICRO9L |
106 | static void __init micro9l_init_machine(void) | 122 | MACHINE_START(MICRO9L, "Contec Micro9-Lite") |
107 | { | 123 | /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ |
108 | ep93xx_init_devices(); | ||
109 | micro9_init(); | ||
110 | } | ||
111 | |||
112 | MACHINE_START(MICRO9L, "Contec Hypercontrol Micro9-L") | ||
113 | /* Maintainer: Manfred Gruber <manfred.gruber@contec.at> */ | ||
114 | .phys_io = EP93XX_APB_PHYS_BASE, | 124 | .phys_io = EP93XX_APB_PHYS_BASE, |
115 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | 125 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, |
116 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, | 126 | .boot_params = EP93XX_SDCE3_PHYS_BASE_SYNC + 0x100, |
117 | .map_io = ep93xx_map_io, | 127 | .map_io = ep93xx_map_io, |
118 | .init_irq = ep93xx_init_irq, | 128 | .init_irq = ep93xx_init_irq, |
119 | .timer = &ep93xx_timer, | 129 | .timer = &ep93xx_timer, |
120 | .init_machine = micro9l_init_machine, | 130 | .init_machine = micro9_init_machine, |
121 | MACHINE_END | 131 | MACHINE_END |
122 | #endif | 132 | #endif |
123 | 133 | ||
134 | #ifdef CONFIG_MACH_MICRO9S | ||
135 | MACHINE_START(MICRO9S, "Contec Micro9-Slim") | ||
136 | /* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */ | ||
137 | .phys_io = EP93XX_APB_PHYS_BASE, | ||
138 | .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc, | ||
139 | .boot_params = EP93XX_SDCE3_PHYS_BASE_ASYNC + 0x100, | ||
140 | .map_io = ep93xx_map_io, | ||
141 | .init_irq = ep93xx_init_irq, | ||
142 | .timer = &ep93xx_timer, | ||
143 | .init_machine = micro9_init_machine, | ||
144 | MACHINE_END | ||
145 | #endif | ||
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index c1af5326e92f..2b0eb1ba5d7f 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -444,7 +444,7 @@ static int __init rx51_i2c_init(void) | |||
444 | rx51_twldata.vaux3 = &rx51_vaux3_cam; | 444 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
445 | rx51_twldata.vmmc2 = &rx51_vmmc2; | 445 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
446 | } | 446 | } |
447 | omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1, | 447 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, |
448 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); | 448 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); |
449 | omap_register_i2c_bus(2, 100, NULL, 0); | 449 | omap_register_i2c_bus(2, 100, NULL, 0); |
450 | omap_register_i2c_bus(3, 400, NULL, 0); | 450 | omap_register_i2c_bus(3, 400, NULL, 0); |
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index b7b32208ced7..fd3369d5e5cb 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <mach/keypad.h> | 25 | #include <mach/keypad.h> |
26 | 26 | ||
27 | #include "mmc-twl4030.h" | 27 | #include "mmc-twl4030.h" |
28 | #include "sdram-micron-mt46h32m32lf-6.h" | ||
28 | 29 | ||
29 | /* Zoom2 has Qwerty keyboard*/ | 30 | /* Zoom2 has Qwerty keyboard*/ |
30 | static int board_keymap[] = { | 31 | static int board_keymap[] = { |
@@ -213,7 +214,8 @@ static void __init omap_zoom2_init_irq(void) | |||
213 | { | 214 | { |
214 | omap_board_config = zoom2_config; | 215 | omap_board_config = zoom2_config; |
215 | omap_board_config_size = ARRAY_SIZE(zoom2_config); | 216 | omap_board_config_size = ARRAY_SIZE(zoom2_config); |
216 | omap2_init_common_hw(NULL, NULL); | 217 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, |
218 | mt46h32m32lf6_sdrc_params); | ||
217 | omap_init_irq(); | 219 | omap_init_irq(); |
218 | omap_gpio_init(); | 220 | omap_gpio_init(); |
219 | } | 221 | } |
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index bc5d3ac66611..e2dbedd581e8 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c | |||
@@ -769,6 +769,7 @@ int __init omap2_clk_init(void) | |||
769 | if (c->cpu & cpu_mask) { | 769 | if (c->cpu & cpu_mask) { |
770 | clkdev_add(&c->lk); | 770 | clkdev_add(&c->lk); |
771 | clk_register(c->lk.clk); | 771 | clk_register(c->lk.clk); |
772 | omap2_init_clk_clkdm(c->lk.clk); | ||
772 | } | 773 | } |
773 | 774 | ||
774 | /* Check the MPU rate set by bootloader */ | 775 | /* Check the MPU rate set by bootloader */ |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 4ef7b4f5474e..58aff8485df9 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -137,6 +137,36 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm) | |||
137 | } | 137 | } |
138 | } | 138 | } |
139 | 139 | ||
140 | /* | ||
141 | * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit | ||
142 | * @clkdm: struct clockdomain * | ||
143 | * @enable: int 0 to disable, 1 to enable | ||
144 | * | ||
145 | * Internal helper for actually switching the bit that controls hwsup | ||
146 | * idle transitions for clkdm. | ||
147 | */ | ||
148 | static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) | ||
149 | { | ||
150 | u32 v; | ||
151 | |||
152 | if (cpu_is_omap24xx()) { | ||
153 | if (enable) | ||
154 | v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; | ||
155 | else | ||
156 | v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; | ||
157 | } else if (cpu_is_omap34xx()) { | ||
158 | if (enable) | ||
159 | v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; | ||
160 | else | ||
161 | v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; | ||
162 | } else { | ||
163 | BUG(); | ||
164 | } | ||
165 | |||
166 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | ||
167 | v << __ffs(clkdm->clktrctrl_mask), | ||
168 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); | ||
169 | } | ||
140 | 170 | ||
141 | static struct clockdomain *_clkdm_lookup(const char *name) | 171 | static struct clockdomain *_clkdm_lookup(const char *name) |
142 | { | 172 | { |
@@ -456,8 +486,6 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |||
456 | */ | 486 | */ |
457 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | 487 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm) |
458 | { | 488 | { |
459 | u32 v; | ||
460 | |||
461 | if (!clkdm) | 489 | if (!clkdm) |
462 | return; | 490 | return; |
463 | 491 | ||
@@ -473,18 +501,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |||
473 | if (atomic_read(&clkdm->usecount) > 0) | 501 | if (atomic_read(&clkdm->usecount) > 0) |
474 | _clkdm_add_autodeps(clkdm); | 502 | _clkdm_add_autodeps(clkdm); |
475 | 503 | ||
476 | if (cpu_is_omap24xx()) | 504 | _omap2_clkdm_set_hwsup(clkdm, 1); |
477 | v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; | ||
478 | else if (cpu_is_omap34xx()) | ||
479 | v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; | ||
480 | else | ||
481 | BUG(); | ||
482 | |||
483 | |||
484 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | ||
485 | v << __ffs(clkdm->clktrctrl_mask), | ||
486 | clkdm->pwrdm.ptr->prcm_offs, | ||
487 | CM_CLKSTCTRL); | ||
488 | 505 | ||
489 | pwrdm_clkdm_state_switch(clkdm); | 506 | pwrdm_clkdm_state_switch(clkdm); |
490 | } | 507 | } |
@@ -500,8 +517,6 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |||
500 | */ | 517 | */ |
501 | void omap2_clkdm_deny_idle(struct clockdomain *clkdm) | 518 | void omap2_clkdm_deny_idle(struct clockdomain *clkdm) |
502 | { | 519 | { |
503 | u32 v; | ||
504 | |||
505 | if (!clkdm) | 520 | if (!clkdm) |
506 | return; | 521 | return; |
507 | 522 | ||
@@ -514,16 +529,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm) | |||
514 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", | 529 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", |
515 | clkdm->name); | 530 | clkdm->name); |
516 | 531 | ||
517 | if (cpu_is_omap24xx()) | 532 | _omap2_clkdm_set_hwsup(clkdm, 0); |
518 | v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; | ||
519 | else if (cpu_is_omap34xx()) | ||
520 | v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; | ||
521 | else | ||
522 | BUG(); | ||
523 | |||
524 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | ||
525 | v << __ffs(clkdm->clktrctrl_mask), | ||
526 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); | ||
527 | 533 | ||
528 | if (atomic_read(&clkdm->usecount) > 0) | 534 | if (atomic_read(&clkdm->usecount) > 0) |
529 | _clkdm_del_autodeps(clkdm); | 535 | _clkdm_del_autodeps(clkdm); |
@@ -569,10 +575,14 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |||
569 | v = omap2_clkdm_clktrctrl_read(clkdm); | 575 | v = omap2_clkdm_clktrctrl_read(clkdm); |
570 | 576 | ||
571 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || | 577 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || |
572 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) | 578 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { |
579 | /* Disable HW transitions when we are changing deps */ | ||
580 | _omap2_clkdm_set_hwsup(clkdm, 0); | ||
573 | _clkdm_add_autodeps(clkdm); | 581 | _clkdm_add_autodeps(clkdm); |
574 | else | 582 | _omap2_clkdm_set_hwsup(clkdm, 1); |
583 | } else { | ||
575 | omap2_clkdm_wakeup(clkdm); | 584 | omap2_clkdm_wakeup(clkdm); |
585 | } | ||
576 | 586 | ||
577 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | 587 | pwrdm_wait_transition(clkdm->pwrdm.ptr); |
578 | pwrdm_clkdm_state_switch(clkdm); | 588 | pwrdm_clkdm_state_switch(clkdm); |
@@ -623,10 +633,14 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |||
623 | v = omap2_clkdm_clktrctrl_read(clkdm); | 633 | v = omap2_clkdm_clktrctrl_read(clkdm); |
624 | 634 | ||
625 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || | 635 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || |
626 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) | 636 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { |
637 | /* Disable HW transitions when we are changing deps */ | ||
638 | _omap2_clkdm_set_hwsup(clkdm, 0); | ||
627 | _clkdm_del_autodeps(clkdm); | 639 | _clkdm_del_autodeps(clkdm); |
628 | else | 640 | _omap2_clkdm_set_hwsup(clkdm, 1); |
641 | } else { | ||
629 | omap2_clkdm_sleep(clkdm); | 642 | omap2_clkdm_sleep(clkdm); |
643 | } | ||
630 | 644 | ||
631 | pwrdm_clkdm_state_switch(clkdm); | 645 | pwrdm_clkdm_state_switch(clkdm); |
632 | 646 | ||
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 3a8ee2272add..983cc8c20081 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c | |||
@@ -155,7 +155,7 @@ MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table | |||
155 | 155 | ||
156 | static pxa_freqs_t pxa27x_freqs[] = { | 156 | static pxa_freqs_t pxa27x_freqs[] = { |
157 | {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 }, | 157 | {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 }, |
158 | {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1), 1000000, 1705000 }, | 158 | {156000, 104000, PXA27x_CCCR(1, 8, 3), 0, CCLKCFG2(1, 0, 1), 1000000, 1705000 }, |
159 | {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 }, | 159 | {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 }, |
160 | {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 }, | 160 | {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 }, |
161 | {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 }, | 161 | {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 }, |
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 79141f862728..965480eb4fe6 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c | |||
@@ -238,7 +238,7 @@ static struct resource csb726_lan_resources[] = { | |||
238 | }; | 238 | }; |
239 | 239 | ||
240 | struct smsc911x_platform_config csb726_lan_config = { | 240 | struct smsc911x_platform_config csb726_lan_config = { |
241 | .irq_type = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 241 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
242 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | 242 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, |
243 | .flags = SMSC911X_USE_32BIT, | 243 | .flags = SMSC911X_USE_32BIT, |
244 | .phy_interface = PHY_INTERFACE_MODE_MII, | 244 | .phy_interface = PHY_INTERFACE_MODE_MII, |
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile index 8a5546e6d547..bb7b8198d0c4 100644 --- a/arch/arm/mach-sa1100/Makefile +++ b/arch/arm/mach-sa1100/Makefile | |||
@@ -25,6 +25,7 @@ led-$(CONFIG_SA1100_CERF) += leds-cerf.o | |||
25 | 25 | ||
26 | obj-$(CONFIG_SA1100_COLLIE) += collie.o | 26 | obj-$(CONFIG_SA1100_COLLIE) += collie.o |
27 | 27 | ||
28 | obj-$(CONFIG_SA1100_H3100) += h3600.o | ||
28 | obj-$(CONFIG_SA1100_H3600) += h3600.o | 29 | obj-$(CONFIG_SA1100_H3600) += h3600.o |
29 | 30 | ||
30 | obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o | 31 | obj-$(CONFIG_SA1100_HACKKIT) += hackkit.o |
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 8f5c13f4c936..295e25dd6381 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/linkage.h> | 12 | #include <linux/linkage.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <asm/assembler.h> | 14 | #include <asm/assembler.h> |
15 | #include <asm/unwind.h> | ||
15 | 16 | ||
16 | #include "proc-macros.S" | 17 | #include "proc-macros.S" |
17 | 18 | ||
@@ -121,11 +122,13 @@ ENTRY(v6_coherent_kern_range) | |||
121 | * - the Icache does not read data from the write buffer | 122 | * - the Icache does not read data from the write buffer |
122 | */ | 123 | */ |
123 | ENTRY(v6_coherent_user_range) | 124 | ENTRY(v6_coherent_user_range) |
124 | 125 | UNWIND(.fnstart ) | |
125 | #ifdef HARVARD_CACHE | 126 | #ifdef HARVARD_CACHE |
126 | bic r0, r0, #CACHE_LINE_SIZE - 1 | 127 | bic r0, r0, #CACHE_LINE_SIZE - 1 |
127 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D line | 128 | 1: |
129 | USER( mcr p15, 0, r0, c7, c10, 1 ) @ clean D line | ||
128 | add r0, r0, #CACHE_LINE_SIZE | 130 | add r0, r0, #CACHE_LINE_SIZE |
131 | 2: | ||
129 | cmp r0, r1 | 132 | cmp r0, r1 |
130 | blo 1b | 133 | blo 1b |
131 | #endif | 134 | #endif |
@@ -143,6 +146,19 @@ ENTRY(v6_coherent_user_range) | |||
143 | mov pc, lr | 146 | mov pc, lr |
144 | 147 | ||
145 | /* | 148 | /* |
149 | * Fault handling for the cache operation above. If the virtual address in r0 | ||
150 | * isn't mapped, just try the next page. | ||
151 | */ | ||
152 | 9001: | ||
153 | mov r0, r0, lsr #12 | ||
154 | mov r0, r0, lsl #12 | ||
155 | add r0, r0, #4096 | ||
156 | b 2b | ||
157 | UNWIND(.fnend ) | ||
158 | ENDPROC(v6_coherent_user_range) | ||
159 | ENDPROC(v6_coherent_kern_range) | ||
160 | |||
161 | /* | ||
146 | * v6_flush_kern_dcache_page(kaddr) | 162 | * v6_flush_kern_dcache_page(kaddr) |
147 | * | 163 | * |
148 | * Ensure that the data held in the page kaddr is written back | 164 | * Ensure that the data held in the page kaddr is written back |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index bda0ec31a4e2..e1bd9759617f 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <asm/assembler.h> | 15 | #include <asm/assembler.h> |
16 | #include <asm/unwind.h> | ||
16 | 17 | ||
17 | #include "proc-macros.S" | 18 | #include "proc-macros.S" |
18 | 19 | ||
@@ -153,13 +154,16 @@ ENTRY(v7_coherent_kern_range) | |||
153 | * - the Icache does not read data from the write buffer | 154 | * - the Icache does not read data from the write buffer |
154 | */ | 155 | */ |
155 | ENTRY(v7_coherent_user_range) | 156 | ENTRY(v7_coherent_user_range) |
157 | UNWIND(.fnstart ) | ||
156 | dcache_line_size r2, r3 | 158 | dcache_line_size r2, r3 |
157 | sub r3, r2, #1 | 159 | sub r3, r2, #1 |
158 | bic r0, r0, r3 | 160 | bic r0, r0, r3 |
159 | 1: mcr p15, 0, r0, c7, c11, 1 @ clean D line to the point of unification | 161 | 1: |
162 | USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification | ||
160 | dsb | 163 | dsb |
161 | mcr p15, 0, r0, c7, c5, 1 @ invalidate I line | 164 | USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line |
162 | add r0, r0, r2 | 165 | add r0, r0, r2 |
166 | 2: | ||
163 | cmp r0, r1 | 167 | cmp r0, r1 |
164 | blo 1b | 168 | blo 1b |
165 | mov r0, #0 | 169 | mov r0, #0 |
@@ -167,6 +171,17 @@ ENTRY(v7_coherent_user_range) | |||
167 | dsb | 171 | dsb |
168 | isb | 172 | isb |
169 | mov pc, lr | 173 | mov pc, lr |
174 | |||
175 | /* | ||
176 | * Fault handling for the cache operation above. If the virtual address in r0 | ||
177 | * isn't mapped, just try the next page. | ||
178 | */ | ||
179 | 9001: | ||
180 | mov r0, r0, lsr #12 | ||
181 | mov r0, r0, lsl #12 | ||
182 | add r0, r0, #4096 | ||
183 | b 2b | ||
184 | UNWIND(.fnend ) | ||
170 | ENDPROC(v7_coherent_kern_range) | 185 | ENDPROC(v7_coherent_kern_range) |
171 | ENDPROC(v7_coherent_user_range) | 186 | ENDPROC(v7_coherent_user_range) |
172 | 187 | ||
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c index bc0099d5ae85..d0d17b6a3703 100644 --- a/arch/arm/mm/fault-armv.c +++ b/arch/arm/mm/fault-armv.c | |||
@@ -153,14 +153,11 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte) | |||
153 | 153 | ||
154 | page = pfn_to_page(pfn); | 154 | page = pfn_to_page(pfn); |
155 | mapping = page_mapping(page); | 155 | mapping = page_mapping(page); |
156 | if (mapping) { | ||
157 | #ifndef CONFIG_SMP | 156 | #ifndef CONFIG_SMP |
158 | int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); | 157 | if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) |
159 | 158 | __flush_dcache_page(mapping, page); | |
160 | if (dirty) | ||
161 | __flush_dcache_page(mapping, page); | ||
162 | #endif | 159 | #endif |
163 | 160 | if (mapping) { | |
164 | if (cache_is_vivt()) | 161 | if (cache_is_vivt()) |
165 | make_coherent(mapping, vma, addr, pfn); | 162 | make_coherent(mapping, vma, addr, pfn); |
166 | else if (vma->vm_flags & VM_EXEC) | 163 | else if (vma->vm_flags & VM_EXEC) |
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index ae0e25f5a70e..10e06801afb3 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c | |||
@@ -292,6 +292,11 @@ do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
292 | * down_read() | 292 | * down_read() |
293 | */ | 293 | */ |
294 | might_sleep(); | 294 | might_sleep(); |
295 | #ifdef CONFIG_DEBUG_VM | ||
296 | if (!user_mode(regs) && | ||
297 | !search_exception_tables(regs->ARM_pc)) | ||
298 | goto no_context; | ||
299 | #endif | ||
295 | } | 300 | } |
296 | 301 | ||
297 | fault = __do_page_fault(mm, addr, fsr, tsk); | 302 | fault = __do_page_fault(mm, addr, fsr, tsk); |
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index 73cae57fa707..30f82fb5918c 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
@@ -46,6 +46,8 @@ void *kmap_atomic(struct page *page, enum km_type type) | |||
46 | if (!PageHighMem(page)) | 46 | if (!PageHighMem(page)) |
47 | return page_address(page); | 47 | return page_address(page); |
48 | 48 | ||
49 | debug_kmap_atomic(type); | ||
50 | |||
49 | kmap = kmap_high_get(page); | 51 | kmap = kmap_high_get(page); |
50 | if (kmap) | 52 | if (kmap) |
51 | return kmap; | 53 | return kmap; |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 877c492f8e10..40940d7ce4ff 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -483,7 +483,7 @@ free_memmap(int node, unsigned long start_pfn, unsigned long end_pfn) | |||
483 | /* | 483 | /* |
484 | * Convert start_pfn/end_pfn to a struct page pointer. | 484 | * Convert start_pfn/end_pfn to a struct page pointer. |
485 | */ | 485 | */ |
486 | start_pg = pfn_to_page(start_pfn); | 486 | start_pg = pfn_to_page(start_pfn - 1) + 1; |
487 | end_pg = pfn_to_page(end_pfn); | 487 | end_pg = pfn_to_page(end_pfn); |
488 | 488 | ||
489 | /* | 489 | /* |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index fd3154ae69b1..0eb676d7e807 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -829,10 +829,10 @@ EXPORT_SYMBOL(omap_free_dma); | |||
829 | * | 829 | * |
830 | * @param arb_rate | 830 | * @param arb_rate |
831 | * @param max_fifo_depth | 831 | * @param max_fifo_depth |
832 | * @param tparams - Number of thereads to reserve : DMA_THREAD_RESERVE_NORM | 832 | * @param tparams - Number of threads to reserve : DMA_THREAD_RESERVE_NORM |
833 | * DMA_THREAD_RESERVE_ONET | 833 | * DMA_THREAD_RESERVE_ONET |
834 | * DMA_THREAD_RESERVE_TWOT | 834 | * DMA_THREAD_RESERVE_TWOT |
835 | * DMA_THREAD_RESERVE_THREET | 835 | * DMA_THREAD_RESERVE_THREET |
836 | */ | 836 | */ |
837 | void | 837 | void |
838 | omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) | 838 | omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) |
@@ -844,11 +844,14 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) | |||
844 | return; | 844 | return; |
845 | } | 845 | } |
846 | 846 | ||
847 | if (max_fifo_depth == 0) | ||
848 | max_fifo_depth = 1; | ||
847 | if (arb_rate == 0) | 849 | if (arb_rate == 0) |
848 | arb_rate = 1; | 850 | arb_rate = 1; |
849 | 851 | ||
850 | reg = (arb_rate & 0xff) << 16; | 852 | reg = 0xff & max_fifo_depth; |
851 | reg |= (0xff & max_fifo_depth); | 853 | reg |= (0x3 & tparams) << 12; |
854 | reg |= (arb_rate & 0xff) << 16; | ||
852 | 855 | ||
853 | dma_write(reg, GCR); | 856 | dma_write(reg, GCR); |
854 | } | 857 | } |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 88ac9768f1c1..e664b912d7bb 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -595,7 +595,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) | |||
595 | rx &= 1; | 595 | rx &= 1; |
596 | if (cpu_is_omap2430() || cpu_is_omap34xx()) { | 596 | if (cpu_is_omap2430() || cpu_is_omap34xx()) { |
597 | w = OMAP_MCBSP_READ(io_base, RCCR); | 597 | w = OMAP_MCBSP_READ(io_base, RCCR); |
598 | w |= (tx ? RDISABLE : 0); | 598 | w |= (rx ? RDISABLE : 0); |
599 | OMAP_MCBSP_WRITE(io_base, RCCR, w); | 599 | OMAP_MCBSP_WRITE(io_base, RCCR, w); |
600 | } | 600 | } |
601 | w = OMAP_MCBSP_READ(io_base, SPCR1); | 601 | w = OMAP_MCBSP_READ(io_base, SPCR1); |
diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h index 3a179827528d..20778a405d7a 100644 --- a/arch/powerpc/include/asm/firmware.h +++ b/arch/powerpc/include/asm/firmware.h | |||
@@ -37,7 +37,7 @@ | |||
37 | #define FW_FEATURE_VIO ASM_CONST(0x0000000000004000) | 37 | #define FW_FEATURE_VIO ASM_CONST(0x0000000000004000) |
38 | #define FW_FEATURE_RDMA ASM_CONST(0x0000000000008000) | 38 | #define FW_FEATURE_RDMA ASM_CONST(0x0000000000008000) |
39 | #define FW_FEATURE_LLAN ASM_CONST(0x0000000000010000) | 39 | #define FW_FEATURE_LLAN ASM_CONST(0x0000000000010000) |
40 | #define FW_FEATURE_BULK ASM_CONST(0x0000000000020000) | 40 | #define FW_FEATURE_BULK_REMOVE ASM_CONST(0x0000000000020000) |
41 | #define FW_FEATURE_XDABR ASM_CONST(0x0000000000040000) | 41 | #define FW_FEATURE_XDABR ASM_CONST(0x0000000000040000) |
42 | #define FW_FEATURE_MULTITCE ASM_CONST(0x0000000000080000) | 42 | #define FW_FEATURE_MULTITCE ASM_CONST(0x0000000000080000) |
43 | #define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000) | 43 | #define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000) |
@@ -45,8 +45,7 @@ | |||
45 | #define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000) | 45 | #define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000) |
46 | #define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) | 46 | #define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) |
47 | #define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000) | 47 | #define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000) |
48 | #define FW_FEATURE_BULK_REMOVE ASM_CONST(0x0000000002000000) | 48 | #define FW_FEATURE_CMO ASM_CONST(0x0000000002000000) |
49 | #define FW_FEATURE_CMO ASM_CONST(0x0000000004000000) | ||
50 | 49 | ||
51 | #ifndef __ASSEMBLY__ | 50 | #ifndef __ASSEMBLY__ |
52 | 51 | ||
@@ -58,8 +57,9 @@ enum { | |||
58 | FW_FEATURE_PERF | FW_FEATURE_DUMP | FW_FEATURE_INTERRUPT | | 57 | FW_FEATURE_PERF | FW_FEATURE_DUMP | FW_FEATURE_INTERRUPT | |
59 | FW_FEATURE_MIGRATE | FW_FEATURE_PERFMON | FW_FEATURE_CRQ | | 58 | FW_FEATURE_MIGRATE | FW_FEATURE_PERFMON | FW_FEATURE_CRQ | |
60 | FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN | | 59 | FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN | |
61 | FW_FEATURE_BULK | FW_FEATURE_XDABR | FW_FEATURE_MULTITCE | | 60 | FW_FEATURE_BULK_REMOVE | FW_FEATURE_XDABR | |
62 | FW_FEATURE_SPLPAR | FW_FEATURE_LPAR | FW_FEATURE_CMO, | 61 | FW_FEATURE_MULTITCE | FW_FEATURE_SPLPAR | FW_FEATURE_LPAR | |
62 | FW_FEATURE_CMO, | ||
63 | FW_FEATURE_PSERIES_ALWAYS = 0, | 63 | FW_FEATURE_PSERIES_ALWAYS = 0, |
64 | FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, | 64 | FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, |
65 | FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, | 65 | FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 0b9c9135922e..03c862b6a9c4 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -711,6 +711,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
711 | .cpu_setup = __setup_cpu_750, | 711 | .cpu_setup = __setup_cpu_750, |
712 | .machine_check = machine_check_generic, | 712 | .machine_check = machine_check_generic, |
713 | .platform = "ppc750", | 713 | .platform = "ppc750", |
714 | .oprofile_cpu_type = "ppc/750", | ||
715 | .oprofile_type = PPC_OPROFILE_G4, | ||
714 | }, | 716 | }, |
715 | { /* 745/755 */ | 717 | { /* 745/755 */ |
716 | .pvr_mask = 0xfffff000, | 718 | .pvr_mask = 0xfffff000, |
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 900e0eea0099..f9fd54bfcc84 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S | |||
@@ -1038,8 +1038,7 @@ _GLOBAL(mod_return_to_handler) | |||
1038 | * We are in a module using the module's TOC. | 1038 | * We are in a module using the module's TOC. |
1039 | * Switch to our TOC to run inside the core kernel. | 1039 | * Switch to our TOC to run inside the core kernel. |
1040 | */ | 1040 | */ |
1041 | LOAD_REG_IMMEDIATE(r4,ftrace_return_to_handler) | 1041 | ld r2, PACATOC(r13) |
1042 | ld r2, 8(r4) | ||
1043 | 1042 | ||
1044 | bl .ftrace_return_to_handler | 1043 | bl .ftrace_return_to_handler |
1045 | nop | 1044 | nop |
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c index fe8f71dd0b3f..641c74bb8e27 100644 --- a/arch/powerpc/kernel/kgdb.c +++ b/arch/powerpc/kernel/kgdb.c | |||
@@ -282,12 +282,6 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) | |||
282 | { | 282 | { |
283 | unsigned long *ptr = gdb_regs; | 283 | unsigned long *ptr = gdb_regs; |
284 | int reg; | 284 | int reg; |
285 | #ifdef CONFIG_SPE | ||
286 | union { | ||
287 | u32 v32[2]; | ||
288 | u64 v64; | ||
289 | } acc; | ||
290 | #endif | ||
291 | 285 | ||
292 | for (reg = 0; reg < 32; reg++) | 286 | for (reg = 0; reg < 32; reg++) |
293 | UNPACK64(regs->gpr[reg], ptr); | 287 | UNPACK64(regs->gpr[reg], ptr); |
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index bb8209e34931..e8dfdbd9327a 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c | |||
@@ -1190,7 +1190,7 @@ EXPORT_SYMBOL(pcibios_align_resource); | |||
1190 | * Reparent resource children of pr that conflict with res | 1190 | * Reparent resource children of pr that conflict with res |
1191 | * under res, and make res replace those children. | 1191 | * under res, and make res replace those children. |
1192 | */ | 1192 | */ |
1193 | static int __init reparent_resources(struct resource *parent, | 1193 | static int reparent_resources(struct resource *parent, |
1194 | struct resource *res) | 1194 | struct resource *res) |
1195 | { | 1195 | { |
1196 | struct resource *p, **pp; | 1196 | struct resource *p, **pp; |
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 1168c5f440ab..2ec1eaed19ca 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -1016,9 +1016,13 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) | |||
1016 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | 1016 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
1017 | int curr_frame = current->curr_ret_stack; | 1017 | int curr_frame = current->curr_ret_stack; |
1018 | extern void return_to_handler(void); | 1018 | extern void return_to_handler(void); |
1019 | unsigned long addr = (unsigned long)return_to_handler; | 1019 | unsigned long rth = (unsigned long)return_to_handler; |
1020 | unsigned long mrth = -1; | ||
1020 | #ifdef CONFIG_PPC64 | 1021 | #ifdef CONFIG_PPC64 |
1021 | addr = *(unsigned long*)addr; | 1022 | extern void mod_return_to_handler(void); |
1023 | rth = *(unsigned long *)rth; | ||
1024 | mrth = (unsigned long)mod_return_to_handler; | ||
1025 | mrth = *(unsigned long *)mrth; | ||
1022 | #endif | 1026 | #endif |
1023 | #endif | 1027 | #endif |
1024 | 1028 | ||
@@ -1044,7 +1048,7 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) | |||
1044 | if (!firstframe || ip != lr) { | 1048 | if (!firstframe || ip != lr) { |
1045 | printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); | 1049 | printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); |
1046 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | 1050 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
1047 | if (ip == addr && curr_frame >= 0) { | 1051 | if ((ip == rth || ip == mrth) && curr_frame >= 0) { |
1048 | printk(" (%pS)", | 1052 | printk(" (%pS)", |
1049 | (void *)current->ret_stack[curr_frame].ret); | 1053 | (void *)current->ret_stack[curr_frame].ret); |
1050 | curr_frame--; | 1054 | curr_frame--; |
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index f56429362a12..27735a7ac12b 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S | |||
@@ -236,6 +236,7 @@ SECTIONS | |||
236 | READ_MOSTLY_DATA(L1_CACHE_BYTES) | 236 | READ_MOSTLY_DATA(L1_CACHE_BYTES) |
237 | } | 237 | } |
238 | 238 | ||
239 | . = ALIGN(PAGE_SIZE); | ||
239 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { | 240 | .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { |
240 | NOSAVE_DATA | 241 | NOSAVE_DATA |
241 | } | 242 | } |
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S index bc44dc4b5c67..95ce35581696 100644 --- a/arch/powerpc/mm/slb_low.S +++ b/arch/powerpc/mm/slb_low.S | |||
@@ -72,19 +72,17 @@ _GLOBAL(slb_miss_kernel_load_vmemmap) | |||
72 | 1: | 72 | 1: |
73 | #endif /* CONFIG_SPARSEMEM_VMEMMAP */ | 73 | #endif /* CONFIG_SPARSEMEM_VMEMMAP */ |
74 | 74 | ||
75 | /* vmalloc/ioremap mapping encoding bits, the "li" instructions below | 75 | /* vmalloc mapping gets the encoding from the PACA as the mapping |
76 | * will be patched by the kernel at boot | 76 | * can be demoted from 64K -> 4K dynamically on some machines |
77 | */ | 77 | */ |
78 | BEGIN_FTR_SECTION | ||
79 | /* check whether this is in vmalloc or ioremap space */ | ||
80 | clrldi r11,r10,48 | 78 | clrldi r11,r10,48 |
81 | cmpldi r11,(VMALLOC_SIZE >> 28) - 1 | 79 | cmpldi r11,(VMALLOC_SIZE >> 28) - 1 |
82 | bgt 5f | 80 | bgt 5f |
83 | lhz r11,PACAVMALLOCSLLP(r13) | 81 | lhz r11,PACAVMALLOCSLLP(r13) |
84 | b 6f | 82 | b 6f |
85 | 5: | 83 | 5: |
86 | END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE) | 84 | /* IO mapping */ |
87 | _GLOBAL(slb_miss_kernel_load_io) | 85 | _GLOBAL(slb_miss_kernel_load_io) |
88 | li r11,0 | 86 | li r11,0 |
89 | 6: | 87 | 6: |
90 | BEGIN_FTR_SECTION | 88 | BEGIN_FTR_SECTION |
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index aca5741ddc67..a86c34b3bb84 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c | |||
@@ -365,7 +365,7 @@ static int axon_msi_probe(struct of_device *device, | |||
365 | printk(KERN_ERR | 365 | printk(KERN_ERR |
366 | "axon_msi: couldn't parse dcr properties on %s\n", | 366 | "axon_msi: couldn't parse dcr properties on %s\n", |
367 | dn->full_name); | 367 | dn->full_name); |
368 | goto out; | 368 | goto out_free_msic; |
369 | } | 369 | } |
370 | 370 | ||
371 | msic->dcr_host = dcr_map(dn, dcr_base, dcr_len); | 371 | msic->dcr_host = dcr_map(dn, dcr_base, dcr_len); |
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c index 21226b74c9b2..414ca9849f23 100644 --- a/arch/powerpc/platforms/powermac/low_i2c.c +++ b/arch/powerpc/platforms/powermac/low_i2c.c | |||
@@ -540,8 +540,11 @@ static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np) | |||
540 | /* Make sure IRQ is disabled */ | 540 | /* Make sure IRQ is disabled */ |
541 | kw_write_reg(reg_ier, 0); | 541 | kw_write_reg(reg_ier, 0); |
542 | 542 | ||
543 | /* Request chip interrupt */ | 543 | /* Request chip interrupt. We set IRQF_TIMER because we don't |
544 | if (request_irq(host->irq, kw_i2c_irq, 0, "keywest i2c", host)) | 544 | * want that interrupt disabled between the 2 passes of driver |
545 | * suspend or we'll have issues running the pfuncs | ||
546 | */ | ||
547 | if (request_irq(host->irq, kw_i2c_irq, IRQF_TIMER, "keywest i2c", host)) | ||
545 | host->irq = NO_IRQ; | 548 | host->irq = NO_IRQ; |
546 | 549 | ||
547 | printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n", | 550 | printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n", |
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c index 5a707da3f5c2..0a14d8cd314f 100644 --- a/arch/powerpc/platforms/pseries/firmware.c +++ b/arch/powerpc/platforms/pseries/firmware.c | |||
@@ -51,11 +51,10 @@ firmware_features_table[FIRMWARE_MAX_FEATURES] = { | |||
51 | {FW_FEATURE_VIO, "hcall-vio"}, | 51 | {FW_FEATURE_VIO, "hcall-vio"}, |
52 | {FW_FEATURE_RDMA, "hcall-rdma"}, | 52 | {FW_FEATURE_RDMA, "hcall-rdma"}, |
53 | {FW_FEATURE_LLAN, "hcall-lLAN"}, | 53 | {FW_FEATURE_LLAN, "hcall-lLAN"}, |
54 | {FW_FEATURE_BULK, "hcall-bulk"}, | 54 | {FW_FEATURE_BULK_REMOVE, "hcall-bulk"}, |
55 | {FW_FEATURE_XDABR, "hcall-xdabr"}, | 55 | {FW_FEATURE_XDABR, "hcall-xdabr"}, |
56 | {FW_FEATURE_MULTITCE, "hcall-multi-tce"}, | 56 | {FW_FEATURE_MULTITCE, "hcall-multi-tce"}, |
57 | {FW_FEATURE_SPLPAR, "hcall-splpar"}, | 57 | {FW_FEATURE_SPLPAR, "hcall-splpar"}, |
58 | {FW_FEATURE_BULK_REMOVE, "hcall-bulk"}, | ||
59 | }; | 58 | }; |
60 | 59 | ||
61 | /* Build up the firmware features bitmask using the contents of | 60 | /* Build up the firmware features bitmask using the contents of |
diff --git a/arch/s390/hypfs/hypfs_diag.c b/arch/s390/hypfs/hypfs_diag.c index 704dd396257b..77df726180ba 100644 --- a/arch/s390/hypfs/hypfs_diag.c +++ b/arch/s390/hypfs/hypfs_diag.c | |||
@@ -438,7 +438,7 @@ static int diag204_probe(void) | |||
438 | } | 438 | } |
439 | if (diag204((unsigned long)SUBC_STIB6 | | 439 | if (diag204((unsigned long)SUBC_STIB6 | |
440 | (unsigned long)INFO_EXT, pages, buf) >= 0) { | 440 | (unsigned long)INFO_EXT, pages, buf) >= 0) { |
441 | diag204_store_sc = SUBC_STIB7; | 441 | diag204_store_sc = SUBC_STIB6; |
442 | diag204_info_type = INFO_EXT; | 442 | diag204_info_type = INFO_EXT; |
443 | goto out; | 443 | goto out; |
444 | } | 444 | } |
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c index 802c8ab247f3..0729f36c2fe3 100644 --- a/arch/s390/kernel/processor.c +++ b/arch/s390/kernel/processor.c | |||
@@ -31,9 +31,9 @@ void __cpuinit print_cpu_info(void) | |||
31 | 31 | ||
32 | static int show_cpuinfo(struct seq_file *m, void *v) | 32 | static int show_cpuinfo(struct seq_file *m, void *v) |
33 | { | 33 | { |
34 | static const char *hwcap_str[9] = { | 34 | static const char *hwcap_str[10] = { |
35 | "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp", | 35 | "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp", |
36 | "edat", "etf3eh" | 36 | "edat", "etf3eh", "highgprs" |
37 | }; | 37 | }; |
38 | struct _lowcore *lc; | 38 | struct _lowcore *lc; |
39 | unsigned long n = (unsigned long) v - 1; | 39 | unsigned long n = (unsigned long) v - 1; |
@@ -48,7 +48,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
48 | num_online_cpus(), loops_per_jiffy/(500000/HZ), | 48 | num_online_cpus(), loops_per_jiffy/(500000/HZ), |
49 | (loops_per_jiffy/(5000/HZ))%100); | 49 | (loops_per_jiffy/(5000/HZ))%100); |
50 | seq_puts(m, "features\t: "); | 50 | seq_puts(m, "features\t: "); |
51 | for (i = 0; i < 9; i++) | 51 | for (i = 0; i < 10; i++) |
52 | if (hwcap_str[i] && (elf_hwcap & (1UL << i))) | 52 | if (hwcap_str[i] && (elf_hwcap & (1UL << i))) |
53 | seq_printf(m, "%s ", hwcap_str[i]); | 53 | seq_printf(m, "%s ", hwcap_str[i]); |
54 | seq_puts(m, "\n"); | 54 | seq_puts(m, "\n"); |
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S index 68d9223b145e..3eb84931d2aa 100644 --- a/arch/sh/kernel/entry-common.S +++ b/arch/sh/kernel/entry-common.S | |||
@@ -121,7 +121,7 @@ noresched: | |||
121 | ENTRY(resume_userspace) | 121 | ENTRY(resume_userspace) |
122 | ! r8: current_thread_info | 122 | ! r8: current_thread_info |
123 | cli | 123 | cli |
124 | TRACE_IRQS_OfF | 124 | TRACE_IRQS_OFF |
125 | mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags | 125 | mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags |
126 | tst #(_TIF_WORK_MASK & 0xff), r0 | 126 | tst #(_TIF_WORK_MASK & 0xff), r0 |
127 | bt/s __restore_all | 127 | bt/s __restore_all |
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c index a3dcc6d5d253..2c48e267256e 100644 --- a/arch/sh/kernel/ftrace.c +++ b/arch/sh/kernel/ftrace.c | |||
@@ -291,31 +291,48 @@ struct syscall_metadata *syscall_nr_to_meta(int nr) | |||
291 | return syscalls_metadata[nr]; | 291 | return syscalls_metadata[nr]; |
292 | } | 292 | } |
293 | 293 | ||
294 | void arch_init_ftrace_syscalls(void) | 294 | int syscall_name_to_nr(char *name) |
295 | { | ||
296 | int i; | ||
297 | |||
298 | if (!syscalls_metadata) | ||
299 | return -1; | ||
300 | for (i = 0; i < NR_syscalls; i++) | ||
301 | if (syscalls_metadata[i]) | ||
302 | if (!strcmp(syscalls_metadata[i]->name, name)) | ||
303 | return i; | ||
304 | return -1; | ||
305 | } | ||
306 | |||
307 | void set_syscall_enter_id(int num, int id) | ||
308 | { | ||
309 | syscalls_metadata[num]->enter_id = id; | ||
310 | } | ||
311 | |||
312 | void set_syscall_exit_id(int num, int id) | ||
313 | { | ||
314 | syscalls_metadata[num]->exit_id = id; | ||
315 | } | ||
316 | |||
317 | static int __init arch_init_ftrace_syscalls(void) | ||
295 | { | 318 | { |
296 | int i; | 319 | int i; |
297 | struct syscall_metadata *meta; | 320 | struct syscall_metadata *meta; |
298 | unsigned long **psys_syscall_table = &sys_call_table; | 321 | unsigned long **psys_syscall_table = &sys_call_table; |
299 | static atomic_t refs; | ||
300 | |||
301 | if (atomic_inc_return(&refs) != 1) | ||
302 | goto end; | ||
303 | 322 | ||
304 | syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) * | 323 | syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) * |
305 | FTRACE_SYSCALL_MAX, GFP_KERNEL); | 324 | FTRACE_SYSCALL_MAX, GFP_KERNEL); |
306 | if (!syscalls_metadata) { | 325 | if (!syscalls_metadata) { |
307 | WARN_ON(1); | 326 | WARN_ON(1); |
308 | return; | 327 | return -ENOMEM; |
309 | } | 328 | } |
310 | 329 | ||
311 | for (i = 0; i < FTRACE_SYSCALL_MAX; i++) { | 330 | for (i = 0; i < FTRACE_SYSCALL_MAX; i++) { |
312 | meta = find_syscall_meta(psys_syscall_table[i]); | 331 | meta = find_syscall_meta(psys_syscall_table[i]); |
313 | syscalls_metadata[i] = meta; | 332 | syscalls_metadata[i] = meta; |
314 | } | 333 | } |
315 | return; | ||
316 | 334 | ||
317 | /* Paranoid: avoid overflow */ | 335 | return 0; |
318 | end: | ||
319 | atomic_dec(&refs); | ||
320 | } | 336 | } |
337 | arch_initcall(arch_init_ftrace_syscalls); | ||
321 | #endif /* CONFIG_FTRACE_SYSCALLS */ | 338 | #endif /* CONFIG_FTRACE_SYSCALLS */ |
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index f9d44f8e0df6..99b4fb553bf1 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c | |||
@@ -549,6 +549,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
549 | 549 | ||
550 | if (cpu == 0) | 550 | if (cpu == 0) |
551 | seq_printf(m, "machine\t\t: %s\n", get_system_type()); | 551 | seq_printf(m, "machine\t\t: %s\n", get_system_type()); |
552 | else | ||
553 | seq_printf(m, "\n"); | ||
552 | 554 | ||
553 | seq_printf(m, "processor\t: %d\n", cpu); | 555 | seq_printf(m, "processor\t: %d\n", cpu); |
554 | seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); | 556 | seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); |
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c index 6729703547a1..3db37425210d 100644 --- a/arch/sh/kernel/signal_32.c +++ b/arch/sh/kernel/signal_32.c | |||
@@ -145,7 +145,7 @@ static inline int restore_sigcontext_fpu(struct sigcontext __user *sc) | |||
145 | { | 145 | { |
146 | struct task_struct *tsk = current; | 146 | struct task_struct *tsk = current; |
147 | 147 | ||
148 | if (!(current_cpu_data.flags & CPU_HAS_FPU)) | 148 | if (!(boot_cpu_data.flags & CPU_HAS_FPU)) |
149 | return 0; | 149 | return 0; |
150 | 150 | ||
151 | set_used_math(); | 151 | set_used_math(); |
@@ -158,7 +158,7 @@ static inline int save_sigcontext_fpu(struct sigcontext __user *sc, | |||
158 | { | 158 | { |
159 | struct task_struct *tsk = current; | 159 | struct task_struct *tsk = current; |
160 | 160 | ||
161 | if (!(current_cpu_data.flags & CPU_HAS_FPU)) | 161 | if (!(boot_cpu_data.flags & CPU_HAS_FPU)) |
162 | return 0; | 162 | return 0; |
163 | 163 | ||
164 | if (!used_math()) { | 164 | if (!used_math()) { |
@@ -199,7 +199,7 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc, int *r0_p | |||
199 | #undef COPY | 199 | #undef COPY |
200 | 200 | ||
201 | #ifdef CONFIG_SH_FPU | 201 | #ifdef CONFIG_SH_FPU |
202 | if (current_cpu_data.flags & CPU_HAS_FPU) { | 202 | if (boot_cpu_data.flags & CPU_HAS_FPU) { |
203 | int owned_fp; | 203 | int owned_fp; |
204 | struct task_struct *tsk = current; | 204 | struct task_struct *tsk = current; |
205 | 205 | ||
@@ -472,6 +472,7 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
472 | err |= __put_user(OR_R0_R0, &frame->retcode[6]); | 472 | err |= __put_user(OR_R0_R0, &frame->retcode[6]); |
473 | err |= __put_user((__NR_rt_sigreturn), &frame->retcode[7]); | 473 | err |= __put_user((__NR_rt_sigreturn), &frame->retcode[7]); |
474 | regs->pr = (unsigned long) frame->retcode; | 474 | regs->pr = (unsigned long) frame->retcode; |
475 | flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode)); | ||
475 | } | 476 | } |
476 | 477 | ||
477 | if (err) | 478 | if (err) |
@@ -497,8 +498,6 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
497 | pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", | 498 | pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", |
498 | current->comm, task_pid_nr(current), frame, regs->pc, regs->pr); | 499 | current->comm, task_pid_nr(current), frame, regs->pc, regs->pr); |
499 | 500 | ||
500 | flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode)); | ||
501 | |||
502 | return 0; | 501 | return 0; |
503 | 502 | ||
504 | give_sigsegv: | 503 | give_sigsegv: |
diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c index 442d8d47a41e..160db1003cfb 100644 --- a/arch/sh/kernel/smp.c +++ b/arch/sh/kernel/smp.c | |||
@@ -35,6 +35,8 @@ static inline void __init smp_store_cpu_info(unsigned int cpu) | |||
35 | { | 35 | { |
36 | struct sh_cpuinfo *c = cpu_data + cpu; | 36 | struct sh_cpuinfo *c = cpu_data + cpu; |
37 | 37 | ||
38 | memcpy(c, &boot_cpu_data, sizeof(struct sh_cpuinfo)); | ||
39 | |||
38 | c->loops_per_jiffy = loops_per_jiffy; | 40 | c->loops_per_jiffy = loops_per_jiffy; |
39 | } | 41 | } |
40 | 42 | ||
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c index e0b5e4b5accd..7a2ee3a6b8e7 100644 --- a/arch/sh/kernel/traps_32.c +++ b/arch/sh/kernel/traps_32.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/kexec.h> | 25 | #include <linux/kexec.h> |
26 | #include <linux/limits.h> | 26 | #include <linux/limits.h> |
27 | #include <linux/proc_fs.h> | 27 | #include <linux/proc_fs.h> |
28 | #include <linux/sysfs.h> | ||
28 | #include <asm/system.h> | 29 | #include <asm/system.h> |
29 | #include <asm/uaccess.h> | 30 | #include <asm/uaccess.h> |
30 | #include <asm/fpu.h> | 31 | #include <asm/fpu.h> |
@@ -159,12 +160,12 @@ void die(const char * str, struct pt_regs * regs, long err) | |||
159 | 160 | ||
160 | oops_enter(); | 161 | oops_enter(); |
161 | 162 | ||
162 | console_verbose(); | ||
163 | spin_lock_irq(&die_lock); | 163 | spin_lock_irq(&die_lock); |
164 | console_verbose(); | ||
164 | bust_spinlocks(1); | 165 | bust_spinlocks(1); |
165 | 166 | ||
166 | printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); | 167 | printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter); |
167 | 168 | sysfs_printk_last_file(); | |
168 | print_modules(); | 169 | print_modules(); |
169 | show_regs(regs); | 170 | show_regs(regs); |
170 | 171 | ||
@@ -180,6 +181,7 @@ void die(const char * str, struct pt_regs * regs, long err) | |||
180 | bust_spinlocks(0); | 181 | bust_spinlocks(0); |
181 | add_taint(TAINT_DIE); | 182 | add_taint(TAINT_DIE); |
182 | spin_unlock_irq(&die_lock); | 183 | spin_unlock_irq(&die_lock); |
184 | oops_exit(); | ||
183 | 185 | ||
184 | if (kexec_should_crash(current)) | 186 | if (kexec_should_crash(current)) |
185 | crash_kexec(regs); | 187 | crash_kexec(regs); |
@@ -190,7 +192,6 @@ void die(const char * str, struct pt_regs * regs, long err) | |||
190 | if (panic_on_oops) | 192 | if (panic_on_oops) |
191 | panic("Fatal exception"); | 193 | panic("Fatal exception"); |
192 | 194 | ||
193 | oops_exit(); | ||
194 | do_exit(SIGSEGV); | 195 | do_exit(SIGSEGV); |
195 | } | 196 | } |
196 | 197 | ||
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c index 35c37b7f717a..5e1091be9dc4 100644 --- a/arch/sh/mm/cache.c +++ b/arch/sh/mm/cache.c | |||
@@ -128,7 +128,7 @@ void __update_cache(struct vm_area_struct *vma, | |||
128 | return; | 128 | return; |
129 | 129 | ||
130 | page = pfn_to_page(pfn); | 130 | page = pfn_to_page(pfn); |
131 | if (pfn_valid(pfn) && page_mapping(page)) { | 131 | if (pfn_valid(pfn)) { |
132 | int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); | 132 | int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); |
133 | if (dirty) { | 133 | if (dirty) { |
134 | unsigned long addr = (unsigned long)page_address(page); | 134 | unsigned long addr = (unsigned long)page_address(page); |
diff --git a/arch/sparc/kernel/ldc.c b/arch/sparc/kernel/ldc.c index adf5f273868a..cb3c72c45aab 100644 --- a/arch/sparc/kernel/ldc.c +++ b/arch/sparc/kernel/ldc.c | |||
@@ -1242,13 +1242,13 @@ int ldc_bind(struct ldc_channel *lp, const char *name) | |||
1242 | snprintf(lp->tx_irq_name, LDC_IRQ_NAME_MAX, "%s TX", name); | 1242 | snprintf(lp->tx_irq_name, LDC_IRQ_NAME_MAX, "%s TX", name); |
1243 | 1243 | ||
1244 | err = request_irq(lp->cfg.rx_irq, ldc_rx, | 1244 | err = request_irq(lp->cfg.rx_irq, ldc_rx, |
1245 | IRQF_SAMPLE_RANDOM | IRQF_SHARED, | 1245 | IRQF_SAMPLE_RANDOM | IRQF_DISABLED | IRQF_SHARED, |
1246 | lp->rx_irq_name, lp); | 1246 | lp->rx_irq_name, lp); |
1247 | if (err) | 1247 | if (err) |
1248 | return err; | 1248 | return err; |
1249 | 1249 | ||
1250 | err = request_irq(lp->cfg.tx_irq, ldc_tx, | 1250 | err = request_irq(lp->cfg.tx_irq, ldc_tx, |
1251 | IRQF_SAMPLE_RANDOM | IRQF_SHARED, | 1251 | IRQF_SAMPLE_RANDOM | IRQF_DISABLED | IRQF_SHARED, |
1252 | lp->tx_irq_name, lp); | 1252 | lp->tx_irq_name, lp); |
1253 | if (err) { | 1253 | if (err) { |
1254 | free_irq(lp->cfg.rx_irq, lp); | 1254 | free_irq(lp->cfg.rx_irq, lp); |
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c index 04db92743896..fa5936e1c3b9 100644 --- a/arch/sparc/kernel/perf_event.c +++ b/arch/sparc/kernel/perf_event.c | |||
@@ -437,7 +437,7 @@ static const struct sparc_pmu niagara2_pmu = { | |||
437 | .lower_shift = 6, | 437 | .lower_shift = 6, |
438 | .event_mask = 0xfff, | 438 | .event_mask = 0xfff, |
439 | .hv_bit = 0x8, | 439 | .hv_bit = 0x8, |
440 | .irq_bit = 0x03, | 440 | .irq_bit = 0x30, |
441 | .upper_nop = 0x220, | 441 | .upper_nop = 0x220, |
442 | .lower_nop = 0x220, | 442 | .lower_nop = 0x220, |
443 | }; | 443 | }; |
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c index a70a5e1904d9..1886d37d411b 100644 --- a/arch/sparc/mm/init_64.c +++ b/arch/sparc/mm/init_64.c | |||
@@ -265,7 +265,7 @@ static void flush_dcache(unsigned long pfn) | |||
265 | struct page *page; | 265 | struct page *page; |
266 | 266 | ||
267 | page = pfn_to_page(pfn); | 267 | page = pfn_to_page(pfn); |
268 | if (page && page_mapping(page)) { | 268 | if (page) { |
269 | unsigned long pg_flags; | 269 | unsigned long pg_flags; |
270 | 270 | ||
271 | pg_flags = page->flags; | 271 | pg_flags = page->flags; |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c876bace8fdc..07e01149e3bf 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -491,7 +491,7 @@ if PARAVIRT_GUEST | |||
491 | source "arch/x86/xen/Kconfig" | 491 | source "arch/x86/xen/Kconfig" |
492 | 492 | ||
493 | config VMI | 493 | config VMI |
494 | bool "VMI Guest support" | 494 | bool "VMI Guest support (DEPRECATED)" |
495 | select PARAVIRT | 495 | select PARAVIRT |
496 | depends on X86_32 | 496 | depends on X86_32 |
497 | ---help--- | 497 | ---help--- |
@@ -500,6 +500,15 @@ config VMI | |||
500 | at the moment), by linking the kernel to a GPL-ed ROM module | 500 | at the moment), by linking the kernel to a GPL-ed ROM module |
501 | provided by the hypervisor. | 501 | provided by the hypervisor. |
502 | 502 | ||
503 | As of September 2009, VMware has started a phased retirement | ||
504 | of this feature from VMware's products. Please see | ||
505 | feature-removal-schedule.txt for details. If you are | ||
506 | planning to enable this option, please note that you cannot | ||
507 | live migrate a VMI enabled VM to a future VMware product, | ||
508 | which doesn't support VMI. So if you expect your kernel to | ||
509 | seamlessly migrate to newer VMware products, keep this | ||
510 | disabled. | ||
511 | |||
503 | config KVM_CLOCK | 512 | config KVM_CLOCK |
504 | bool "KVM paravirtualized clock" | 513 | bool "KVM paravirtualized clock" |
505 | select PARAVIRT | 514 | select PARAVIRT |
diff --git a/arch/x86/boot/setup.ld b/arch/x86/boot/setup.ld index 0f6ec455a2b1..03c0683636b6 100644 --- a/arch/x86/boot/setup.ld +++ b/arch/x86/boot/setup.ld | |||
@@ -53,6 +53,9 @@ SECTIONS | |||
53 | 53 | ||
54 | /DISCARD/ : { *(.note*) } | 54 | /DISCARD/ : { *(.note*) } |
55 | 55 | ||
56 | /* | ||
57 | * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: | ||
58 | */ | ||
56 | . = ASSERT(_end <= 0x8000, "Setup too big!"); | 59 | . = ASSERT(_end <= 0x8000, "Setup too big!"); |
57 | . = ASSERT(hdr == 0x1f1, "The setup header has the wrong offset!"); | 60 | . = ASSERT(hdr == 0x1f1, "The setup header has the wrong offset!"); |
58 | /* Necessary for the very-old-loader check to work... */ | 61 | /* Necessary for the very-old-loader check to work... */ |
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h index 8aebcc41041d..efb38994859c 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h | |||
@@ -840,42 +840,22 @@ static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock) | |||
840 | 840 | ||
841 | static inline unsigned long __raw_local_save_flags(void) | 841 | static inline unsigned long __raw_local_save_flags(void) |
842 | { | 842 | { |
843 | unsigned long f; | 843 | return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl); |
844 | |||
845 | asm volatile(paravirt_alt(PARAVIRT_CALL) | ||
846 | : "=a"(f) | ||
847 | : paravirt_type(pv_irq_ops.save_fl), | ||
848 | paravirt_clobber(CLBR_EAX) | ||
849 | : "memory", "cc"); | ||
850 | return f; | ||
851 | } | 844 | } |
852 | 845 | ||
853 | static inline void raw_local_irq_restore(unsigned long f) | 846 | static inline void raw_local_irq_restore(unsigned long f) |
854 | { | 847 | { |
855 | asm volatile(paravirt_alt(PARAVIRT_CALL) | 848 | PVOP_VCALLEE1(pv_irq_ops.restore_fl, f); |
856 | : "=a"(f) | ||
857 | : PV_FLAGS_ARG(f), | ||
858 | paravirt_type(pv_irq_ops.restore_fl), | ||
859 | paravirt_clobber(CLBR_EAX) | ||
860 | : "memory", "cc"); | ||
861 | } | 849 | } |
862 | 850 | ||
863 | static inline void raw_local_irq_disable(void) | 851 | static inline void raw_local_irq_disable(void) |
864 | { | 852 | { |
865 | asm volatile(paravirt_alt(PARAVIRT_CALL) | 853 | PVOP_VCALLEE0(pv_irq_ops.irq_disable); |
866 | : | ||
867 | : paravirt_type(pv_irq_ops.irq_disable), | ||
868 | paravirt_clobber(CLBR_EAX) | ||
869 | : "memory", "eax", "cc"); | ||
870 | } | 854 | } |
871 | 855 | ||
872 | static inline void raw_local_irq_enable(void) | 856 | static inline void raw_local_irq_enable(void) |
873 | { | 857 | { |
874 | asm volatile(paravirt_alt(PARAVIRT_CALL) | 858 | PVOP_VCALLEE0(pv_irq_ops.irq_enable); |
875 | : | ||
876 | : paravirt_type(pv_irq_ops.irq_enable), | ||
877 | paravirt_clobber(CLBR_EAX) | ||
878 | : "memory", "eax", "cc"); | ||
879 | } | 859 | } |
880 | 860 | ||
881 | static inline unsigned long __raw_local_irq_save(void) | 861 | static inline unsigned long __raw_local_irq_save(void) |
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h index dd0f5b32489d..9357473c8da0 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h | |||
@@ -494,10 +494,11 @@ int paravirt_disable_iospace(void); | |||
494 | #define EXTRA_CLOBBERS | 494 | #define EXTRA_CLOBBERS |
495 | #define VEXTRA_CLOBBERS | 495 | #define VEXTRA_CLOBBERS |
496 | #else /* CONFIG_X86_64 */ | 496 | #else /* CONFIG_X86_64 */ |
497 | /* [re]ax isn't an arg, but the return val */ | ||
497 | #define PVOP_VCALL_ARGS \ | 498 | #define PVOP_VCALL_ARGS \ |
498 | unsigned long __edi = __edi, __esi = __esi, \ | 499 | unsigned long __edi = __edi, __esi = __esi, \ |
499 | __edx = __edx, __ecx = __ecx | 500 | __edx = __edx, __ecx = __ecx, __eax = __eax |
500 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax | 501 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS |
501 | 502 | ||
502 | #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) | 503 | #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) |
503 | #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) | 504 | #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) |
@@ -509,6 +510,7 @@ int paravirt_disable_iospace(void); | |||
509 | "=c" (__ecx) | 510 | "=c" (__ecx) |
510 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) | 511 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) |
511 | 512 | ||
513 | /* void functions are still allowed [re]ax for scratch */ | ||
512 | #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) | 514 | #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) |
513 | #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS | 515 | #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS |
514 | 516 | ||
@@ -583,8 +585,8 @@ int paravirt_disable_iospace(void); | |||
583 | VEXTRA_CLOBBERS, \ | 585 | VEXTRA_CLOBBERS, \ |
584 | pre, post, ##__VA_ARGS__) | 586 | pre, post, ##__VA_ARGS__) |
585 | 587 | ||
586 | #define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...) \ | 588 | #define __PVOP_VCALLEESAVE(op, pre, post, ...) \ |
587 | ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ | 589 | ____PVOP_VCALL(op.func, CLBR_RET_REG, \ |
588 | PVOP_VCALLEE_CLOBBERS, , \ | 590 | PVOP_VCALLEE_CLOBBERS, , \ |
589 | pre, post, ##__VA_ARGS__) | 591 | pre, post, ##__VA_ARGS__) |
590 | 592 | ||
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index ad7ce3fd5065..8d9f8548a870 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h | |||
@@ -28,9 +28,20 @@ | |||
28 | */ | 28 | */ |
29 | #define ARCH_PERFMON_EVENT_MASK 0xffff | 29 | #define ARCH_PERFMON_EVENT_MASK 0xffff |
30 | 30 | ||
31 | /* | ||
32 | * filter mask to validate fixed counter events. | ||
33 | * the following filters disqualify for fixed counters: | ||
34 | * - inv | ||
35 | * - edge | ||
36 | * - cnt-mask | ||
37 | * The other filters are supported by fixed counters. | ||
38 | * The any-thread option is supported starting with v3. | ||
39 | */ | ||
40 | #define ARCH_PERFMON_EVENT_FILTER_MASK 0xff840000 | ||
41 | |||
31 | #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c | 42 | #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c |
32 | #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8) | 43 | #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8) |
33 | #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX 0 | 44 | #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX 0 |
34 | #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT \ | 45 | #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT \ |
35 | (1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX)) | 46 | (1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX)) |
36 | 47 | ||
diff --git a/arch/x86/kernel/acpi/realmode/wakeup.lds.S b/arch/x86/kernel/acpi/realmode/wakeup.lds.S index 7da00b799cda..060fff8f5c5b 100644 --- a/arch/x86/kernel/acpi/realmode/wakeup.lds.S +++ b/arch/x86/kernel/acpi/realmode/wakeup.lds.S | |||
@@ -57,5 +57,8 @@ SECTIONS | |||
57 | *(.note*) | 57 | *(.note*) |
58 | } | 58 | } |
59 | 59 | ||
60 | /* | ||
61 | * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: | ||
62 | */ | ||
60 | . = ASSERT(_end <= WAKEUP_SIZE, "Wakeup too big!"); | 63 | . = ASSERT(_end <= WAKEUP_SIZE, "Wakeup too big!"); |
61 | } | 64 | } |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index f5f5886a6b53..326c25477d3d 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -352,14 +352,14 @@ static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size) | |||
352 | 352 | ||
353 | for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) { | 353 | for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) { |
354 | alias.v = uv_read_local_mmr(redir_addrs[i].alias); | 354 | alias.v = uv_read_local_mmr(redir_addrs[i].alias); |
355 | if (alias.s.base == 0) { | 355 | if (alias.s.enable && alias.s.base == 0) { |
356 | *size = (1UL << alias.s.m_alias); | 356 | *size = (1UL << alias.s.m_alias); |
357 | redirect.v = uv_read_local_mmr(redir_addrs[i].redirect); | 357 | redirect.v = uv_read_local_mmr(redir_addrs[i].redirect); |
358 | *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT; | 358 | *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT; |
359 | return; | 359 | return; |
360 | } | 360 | } |
361 | } | 361 | } |
362 | BUG(); | 362 | *base = *size = 0; |
363 | } | 363 | } |
364 | 364 | ||
365 | enum map_type {map_wb, map_uc}; | 365 | enum map_type {map_wb, map_uc}; |
@@ -619,12 +619,12 @@ void __init uv_system_init(void) | |||
619 | uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base; | 619 | uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base; |
620 | uv_cpu_hub_info(cpu)->lowmem_remap_top = lowmem_redir_size; | 620 | uv_cpu_hub_info(cpu)->lowmem_remap_top = lowmem_redir_size; |
621 | uv_cpu_hub_info(cpu)->m_val = m_val; | 621 | uv_cpu_hub_info(cpu)->m_val = m_val; |
622 | uv_cpu_hub_info(cpu)->n_val = m_val; | 622 | uv_cpu_hub_info(cpu)->n_val = n_val; |
623 | uv_cpu_hub_info(cpu)->numa_blade_id = blade; | 623 | uv_cpu_hub_info(cpu)->numa_blade_id = blade; |
624 | uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; | 624 | uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; |
625 | uv_cpu_hub_info(cpu)->pnode = pnode; | 625 | uv_cpu_hub_info(cpu)->pnode = pnode; |
626 | uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; | 626 | uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask; |
627 | uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; | 627 | uv_cpu_hub_info(cpu)->gpa_mask = (1UL << (m_val + n_val)) - 1; |
628 | uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; | 628 | uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; |
629 | uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra; | 629 | uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra; |
630 | uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; | 630 | uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; |
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 15ba9c972d7a..0fb9dc50697e 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c | |||
@@ -46,6 +46,9 @@ | |||
46 | 46 | ||
47 | #include "mce-internal.h" | 47 | #include "mce-internal.h" |
48 | 48 | ||
49 | #define CREATE_TRACE_POINTS | ||
50 | #include <trace/events/mce.h> | ||
51 | |||
49 | int mce_disabled __read_mostly; | 52 | int mce_disabled __read_mostly; |
50 | 53 | ||
51 | #define MISC_MCELOG_MINOR 227 | 54 | #define MISC_MCELOG_MINOR 227 |
@@ -149,6 +152,9 @@ void mce_log(struct mce *mce) | |||
149 | { | 152 | { |
150 | unsigned next, entry; | 153 | unsigned next, entry; |
151 | 154 | ||
155 | /* Emit the trace record: */ | ||
156 | trace_mce_record(mce); | ||
157 | |||
152 | mce->finished = 0; | 158 | mce->finished = 0; |
153 | wmb(); | 159 | wmb(); |
154 | for (;;) { | 160 | for (;;) { |
@@ -1222,7 +1228,8 @@ static int __cpuinit mce_cap_init(void) | |||
1222 | rdmsrl(MSR_IA32_MCG_CAP, cap); | 1228 | rdmsrl(MSR_IA32_MCG_CAP, cap); |
1223 | 1229 | ||
1224 | b = cap & MCG_BANKCNT_MASK; | 1230 | b = cap & MCG_BANKCNT_MASK; |
1225 | printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b); | 1231 | if (!banks) |
1232 | printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b); | ||
1226 | 1233 | ||
1227 | if (b > MAX_NR_BANKS) { | 1234 | if (b > MAX_NR_BANKS) { |
1228 | printk(KERN_WARNING | 1235 | printk(KERN_WARNING |
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index b5801c311846..2e20bca3cca1 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c | |||
@@ -77,6 +77,18 @@ struct cpu_hw_events { | |||
77 | struct debug_store *ds; | 77 | struct debug_store *ds; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | struct event_constraint { | ||
81 | unsigned long idxmsk[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; | ||
82 | int code; | ||
83 | }; | ||
84 | |||
85 | #define EVENT_CONSTRAINT(c, m) { .code = (c), .idxmsk[0] = (m) } | ||
86 | #define EVENT_CONSTRAINT_END { .code = 0, .idxmsk[0] = 0 } | ||
87 | |||
88 | #define for_each_event_constraint(e, c) \ | ||
89 | for ((e) = (c); (e)->idxmsk[0]; (e)++) | ||
90 | |||
91 | |||
80 | /* | 92 | /* |
81 | * struct x86_pmu - generic x86 pmu | 93 | * struct x86_pmu - generic x86 pmu |
82 | */ | 94 | */ |
@@ -102,6 +114,8 @@ struct x86_pmu { | |||
102 | u64 intel_ctrl; | 114 | u64 intel_ctrl; |
103 | void (*enable_bts)(u64 config); | 115 | void (*enable_bts)(u64 config); |
104 | void (*disable_bts)(void); | 116 | void (*disable_bts)(void); |
117 | int (*get_event_idx)(struct cpu_hw_events *cpuc, | ||
118 | struct hw_perf_event *hwc); | ||
105 | }; | 119 | }; |
106 | 120 | ||
107 | static struct x86_pmu x86_pmu __read_mostly; | 121 | static struct x86_pmu x86_pmu __read_mostly; |
@@ -110,6 +124,8 @@ static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { | |||
110 | .enabled = 1, | 124 | .enabled = 1, |
111 | }; | 125 | }; |
112 | 126 | ||
127 | static const struct event_constraint *event_constraints; | ||
128 | |||
113 | /* | 129 | /* |
114 | * Not sure about some of these | 130 | * Not sure about some of these |
115 | */ | 131 | */ |
@@ -155,6 +171,16 @@ static u64 p6_pmu_raw_event(u64 hw_event) | |||
155 | return hw_event & P6_EVNTSEL_MASK; | 171 | return hw_event & P6_EVNTSEL_MASK; |
156 | } | 172 | } |
157 | 173 | ||
174 | static const struct event_constraint intel_p6_event_constraints[] = | ||
175 | { | ||
176 | EVENT_CONSTRAINT(0xc1, 0x1), /* FLOPS */ | ||
177 | EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */ | ||
178 | EVENT_CONSTRAINT(0x11, 0x1), /* FP_ASSIST */ | ||
179 | EVENT_CONSTRAINT(0x12, 0x2), /* MUL */ | ||
180 | EVENT_CONSTRAINT(0x13, 0x2), /* DIV */ | ||
181 | EVENT_CONSTRAINT(0x14, 0x1), /* CYCLES_DIV_BUSY */ | ||
182 | EVENT_CONSTRAINT_END | ||
183 | }; | ||
158 | 184 | ||
159 | /* | 185 | /* |
160 | * Intel PerfMon v3. Used on Core2 and later. | 186 | * Intel PerfMon v3. Used on Core2 and later. |
@@ -170,6 +196,35 @@ static const u64 intel_perfmon_event_map[] = | |||
170 | [PERF_COUNT_HW_BUS_CYCLES] = 0x013c, | 196 | [PERF_COUNT_HW_BUS_CYCLES] = 0x013c, |
171 | }; | 197 | }; |
172 | 198 | ||
199 | static const struct event_constraint intel_core_event_constraints[] = | ||
200 | { | ||
201 | EVENT_CONSTRAINT(0x10, 0x1), /* FP_COMP_OPS_EXE */ | ||
202 | EVENT_CONSTRAINT(0x11, 0x2), /* FP_ASSIST */ | ||
203 | EVENT_CONSTRAINT(0x12, 0x2), /* MUL */ | ||
204 | EVENT_CONSTRAINT(0x13, 0x2), /* DIV */ | ||
205 | EVENT_CONSTRAINT(0x14, 0x1), /* CYCLES_DIV_BUSY */ | ||
206 | EVENT_CONSTRAINT(0x18, 0x1), /* IDLE_DURING_DIV */ | ||
207 | EVENT_CONSTRAINT(0x19, 0x2), /* DELAYED_BYPASS */ | ||
208 | EVENT_CONSTRAINT(0xa1, 0x1), /* RS_UOPS_DISPATCH_CYCLES */ | ||
209 | EVENT_CONSTRAINT(0xcb, 0x1), /* MEM_LOAD_RETIRED */ | ||
210 | EVENT_CONSTRAINT_END | ||
211 | }; | ||
212 | |||
213 | static const struct event_constraint intel_nehalem_event_constraints[] = | ||
214 | { | ||
215 | EVENT_CONSTRAINT(0x40, 0x3), /* L1D_CACHE_LD */ | ||
216 | EVENT_CONSTRAINT(0x41, 0x3), /* L1D_CACHE_ST */ | ||
217 | EVENT_CONSTRAINT(0x42, 0x3), /* L1D_CACHE_LOCK */ | ||
218 | EVENT_CONSTRAINT(0x43, 0x3), /* L1D_ALL_REF */ | ||
219 | EVENT_CONSTRAINT(0x4e, 0x3), /* L1D_PREFETCH */ | ||
220 | EVENT_CONSTRAINT(0x4c, 0x3), /* LOAD_HIT_PRE */ | ||
221 | EVENT_CONSTRAINT(0x51, 0x3), /* L1D */ | ||
222 | EVENT_CONSTRAINT(0x52, 0x3), /* L1D_CACHE_PREFETCH_LOCK_FB_HIT */ | ||
223 | EVENT_CONSTRAINT(0x53, 0x3), /* L1D_CACHE_LOCK_FB_HIT */ | ||
224 | EVENT_CONSTRAINT(0xc5, 0x3), /* CACHE_LOCK_CYCLES */ | ||
225 | EVENT_CONSTRAINT_END | ||
226 | }; | ||
227 | |||
173 | static u64 intel_pmu_event_map(int hw_event) | 228 | static u64 intel_pmu_event_map(int hw_event) |
174 | { | 229 | { |
175 | return intel_perfmon_event_map[hw_event]; | 230 | return intel_perfmon_event_map[hw_event]; |
@@ -469,7 +524,7 @@ static u64 intel_pmu_raw_event(u64 hw_event) | |||
469 | #define CORE_EVNTSEL_UNIT_MASK 0x0000FF00ULL | 524 | #define CORE_EVNTSEL_UNIT_MASK 0x0000FF00ULL |
470 | #define CORE_EVNTSEL_EDGE_MASK 0x00040000ULL | 525 | #define CORE_EVNTSEL_EDGE_MASK 0x00040000ULL |
471 | #define CORE_EVNTSEL_INV_MASK 0x00800000ULL | 526 | #define CORE_EVNTSEL_INV_MASK 0x00800000ULL |
472 | #define CORE_EVNTSEL_REG_MASK 0xFF000000ULL | 527 | #define CORE_EVNTSEL_REG_MASK 0xFF000000ULL |
473 | 528 | ||
474 | #define CORE_EVNTSEL_MASK \ | 529 | #define CORE_EVNTSEL_MASK \ |
475 | (CORE_EVNTSEL_EVENT_MASK | \ | 530 | (CORE_EVNTSEL_EVENT_MASK | \ |
@@ -932,6 +987,8 @@ static int __hw_perf_event_init(struct perf_event *event) | |||
932 | */ | 987 | */ |
933 | hwc->config = ARCH_PERFMON_EVENTSEL_INT; | 988 | hwc->config = ARCH_PERFMON_EVENTSEL_INT; |
934 | 989 | ||
990 | hwc->idx = -1; | ||
991 | |||
935 | /* | 992 | /* |
936 | * Count user and OS events unless requested not to. | 993 | * Count user and OS events unless requested not to. |
937 | */ | 994 | */ |
@@ -1334,8 +1391,7 @@ static void amd_pmu_enable_event(struct hw_perf_event *hwc, int idx) | |||
1334 | x86_pmu_enable_event(hwc, idx); | 1391 | x86_pmu_enable_event(hwc, idx); |
1335 | } | 1392 | } |
1336 | 1393 | ||
1337 | static int | 1394 | static int fixed_mode_idx(struct hw_perf_event *hwc) |
1338 | fixed_mode_idx(struct perf_event *event, struct hw_perf_event *hwc) | ||
1339 | { | 1395 | { |
1340 | unsigned int hw_event; | 1396 | unsigned int hw_event; |
1341 | 1397 | ||
@@ -1349,6 +1405,12 @@ fixed_mode_idx(struct perf_event *event, struct hw_perf_event *hwc) | |||
1349 | if (!x86_pmu.num_events_fixed) | 1405 | if (!x86_pmu.num_events_fixed) |
1350 | return -1; | 1406 | return -1; |
1351 | 1407 | ||
1408 | /* | ||
1409 | * fixed counters do not take all possible filters | ||
1410 | */ | ||
1411 | if (hwc->config & ARCH_PERFMON_EVENT_FILTER_MASK) | ||
1412 | return -1; | ||
1413 | |||
1352 | if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS))) | 1414 | if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS))) |
1353 | return X86_PMC_IDX_FIXED_INSTRUCTIONS; | 1415 | return X86_PMC_IDX_FIXED_INSTRUCTIONS; |
1354 | if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_CPU_CYCLES))) | 1416 | if (unlikely(hw_event == x86_pmu.event_map(PERF_COUNT_HW_CPU_CYCLES))) |
@@ -1360,22 +1422,57 @@ fixed_mode_idx(struct perf_event *event, struct hw_perf_event *hwc) | |||
1360 | } | 1422 | } |
1361 | 1423 | ||
1362 | /* | 1424 | /* |
1363 | * Find a PMC slot for the freshly enabled / scheduled in event: | 1425 | * generic counter allocator: get next free counter |
1364 | */ | 1426 | */ |
1365 | static int x86_pmu_enable(struct perf_event *event) | 1427 | static int |
1428 | gen_get_event_idx(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc) | ||
1429 | { | ||
1430 | int idx; | ||
1431 | |||
1432 | idx = find_first_zero_bit(cpuc->used_mask, x86_pmu.num_events); | ||
1433 | return idx == x86_pmu.num_events ? -1 : idx; | ||
1434 | } | ||
1435 | |||
1436 | /* | ||
1437 | * intel-specific counter allocator: check event constraints | ||
1438 | */ | ||
1439 | static int | ||
1440 | intel_get_event_idx(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc) | ||
1441 | { | ||
1442 | const struct event_constraint *event_constraint; | ||
1443 | int i, code; | ||
1444 | |||
1445 | if (!event_constraints) | ||
1446 | goto skip; | ||
1447 | |||
1448 | code = hwc->config & CORE_EVNTSEL_EVENT_MASK; | ||
1449 | |||
1450 | for_each_event_constraint(event_constraint, event_constraints) { | ||
1451 | if (code == event_constraint->code) { | ||
1452 | for_each_bit(i, event_constraint->idxmsk, X86_PMC_IDX_MAX) { | ||
1453 | if (!test_and_set_bit(i, cpuc->used_mask)) | ||
1454 | return i; | ||
1455 | } | ||
1456 | return -1; | ||
1457 | } | ||
1458 | } | ||
1459 | skip: | ||
1460 | return gen_get_event_idx(cpuc, hwc); | ||
1461 | } | ||
1462 | |||
1463 | static int | ||
1464 | x86_schedule_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc) | ||
1366 | { | 1465 | { |
1367 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
1368 | struct hw_perf_event *hwc = &event->hw; | ||
1369 | int idx; | 1466 | int idx; |
1370 | 1467 | ||
1371 | idx = fixed_mode_idx(event, hwc); | 1468 | idx = fixed_mode_idx(hwc); |
1372 | if (idx == X86_PMC_IDX_FIXED_BTS) { | 1469 | if (idx == X86_PMC_IDX_FIXED_BTS) { |
1373 | /* BTS is already occupied. */ | 1470 | /* BTS is already occupied. */ |
1374 | if (test_and_set_bit(idx, cpuc->used_mask)) | 1471 | if (test_and_set_bit(idx, cpuc->used_mask)) |
1375 | return -EAGAIN; | 1472 | return -EAGAIN; |
1376 | 1473 | ||
1377 | hwc->config_base = 0; | 1474 | hwc->config_base = 0; |
1378 | hwc->event_base = 0; | 1475 | hwc->event_base = 0; |
1379 | hwc->idx = idx; | 1476 | hwc->idx = idx; |
1380 | } else if (idx >= 0) { | 1477 | } else if (idx >= 0) { |
1381 | /* | 1478 | /* |
@@ -1396,20 +1493,35 @@ static int x86_pmu_enable(struct perf_event *event) | |||
1396 | } else { | 1493 | } else { |
1397 | idx = hwc->idx; | 1494 | idx = hwc->idx; |
1398 | /* Try to get the previous generic event again */ | 1495 | /* Try to get the previous generic event again */ |
1399 | if (test_and_set_bit(idx, cpuc->used_mask)) { | 1496 | if (idx == -1 || test_and_set_bit(idx, cpuc->used_mask)) { |
1400 | try_generic: | 1497 | try_generic: |
1401 | idx = find_first_zero_bit(cpuc->used_mask, | 1498 | idx = x86_pmu.get_event_idx(cpuc, hwc); |
1402 | x86_pmu.num_events); | 1499 | if (idx == -1) |
1403 | if (idx == x86_pmu.num_events) | ||
1404 | return -EAGAIN; | 1500 | return -EAGAIN; |
1405 | 1501 | ||
1406 | set_bit(idx, cpuc->used_mask); | 1502 | set_bit(idx, cpuc->used_mask); |
1407 | hwc->idx = idx; | 1503 | hwc->idx = idx; |
1408 | } | 1504 | } |
1409 | hwc->config_base = x86_pmu.eventsel; | 1505 | hwc->config_base = x86_pmu.eventsel; |
1410 | hwc->event_base = x86_pmu.perfctr; | 1506 | hwc->event_base = x86_pmu.perfctr; |
1411 | } | 1507 | } |
1412 | 1508 | ||
1509 | return idx; | ||
1510 | } | ||
1511 | |||
1512 | /* | ||
1513 | * Find a PMC slot for the freshly enabled / scheduled in event: | ||
1514 | */ | ||
1515 | static int x86_pmu_enable(struct perf_event *event) | ||
1516 | { | ||
1517 | struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | ||
1518 | struct hw_perf_event *hwc = &event->hw; | ||
1519 | int idx; | ||
1520 | |||
1521 | idx = x86_schedule_event(cpuc, hwc); | ||
1522 | if (idx < 0) | ||
1523 | return idx; | ||
1524 | |||
1413 | perf_events_lapic_init(); | 1525 | perf_events_lapic_init(); |
1414 | 1526 | ||
1415 | x86_pmu.disable(hwc, idx); | 1527 | x86_pmu.disable(hwc, idx); |
@@ -1877,6 +1989,7 @@ static struct x86_pmu p6_pmu = { | |||
1877 | */ | 1989 | */ |
1878 | .event_bits = 32, | 1990 | .event_bits = 32, |
1879 | .event_mask = (1ULL << 32) - 1, | 1991 | .event_mask = (1ULL << 32) - 1, |
1992 | .get_event_idx = intel_get_event_idx, | ||
1880 | }; | 1993 | }; |
1881 | 1994 | ||
1882 | static struct x86_pmu intel_pmu = { | 1995 | static struct x86_pmu intel_pmu = { |
@@ -1900,6 +2013,7 @@ static struct x86_pmu intel_pmu = { | |||
1900 | .max_period = (1ULL << 31) - 1, | 2013 | .max_period = (1ULL << 31) - 1, |
1901 | .enable_bts = intel_pmu_enable_bts, | 2014 | .enable_bts = intel_pmu_enable_bts, |
1902 | .disable_bts = intel_pmu_disable_bts, | 2015 | .disable_bts = intel_pmu_disable_bts, |
2016 | .get_event_idx = intel_get_event_idx, | ||
1903 | }; | 2017 | }; |
1904 | 2018 | ||
1905 | static struct x86_pmu amd_pmu = { | 2019 | static struct x86_pmu amd_pmu = { |
@@ -1920,6 +2034,7 @@ static struct x86_pmu amd_pmu = { | |||
1920 | .apic = 1, | 2034 | .apic = 1, |
1921 | /* use highest bit to detect overflow */ | 2035 | /* use highest bit to detect overflow */ |
1922 | .max_period = (1ULL << 47) - 1, | 2036 | .max_period = (1ULL << 47) - 1, |
2037 | .get_event_idx = gen_get_event_idx, | ||
1923 | }; | 2038 | }; |
1924 | 2039 | ||
1925 | static int p6_pmu_init(void) | 2040 | static int p6_pmu_init(void) |
@@ -1932,10 +2047,12 @@ static int p6_pmu_init(void) | |||
1932 | case 7: | 2047 | case 7: |
1933 | case 8: | 2048 | case 8: |
1934 | case 11: /* Pentium III */ | 2049 | case 11: /* Pentium III */ |
2050 | event_constraints = intel_p6_event_constraints; | ||
1935 | break; | 2051 | break; |
1936 | case 9: | 2052 | case 9: |
1937 | case 13: | 2053 | case 13: |
1938 | /* Pentium M */ | 2054 | /* Pentium M */ |
2055 | event_constraints = intel_p6_event_constraints; | ||
1939 | break; | 2056 | break; |
1940 | default: | 2057 | default: |
1941 | pr_cont("unsupported p6 CPU model %d ", | 2058 | pr_cont("unsupported p6 CPU model %d ", |
@@ -2007,12 +2124,14 @@ static int intel_pmu_init(void) | |||
2007 | sizeof(hw_cache_event_ids)); | 2124 | sizeof(hw_cache_event_ids)); |
2008 | 2125 | ||
2009 | pr_cont("Core2 events, "); | 2126 | pr_cont("Core2 events, "); |
2127 | event_constraints = intel_core_event_constraints; | ||
2010 | break; | 2128 | break; |
2011 | default: | 2129 | default: |
2012 | case 26: | 2130 | case 26: |
2013 | memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids, | 2131 | memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids, |
2014 | sizeof(hw_cache_event_ids)); | 2132 | sizeof(hw_cache_event_ids)); |
2015 | 2133 | ||
2134 | event_constraints = intel_nehalem_event_constraints; | ||
2016 | pr_cont("Nehalem/Corei7 events, "); | 2135 | pr_cont("Nehalem/Corei7 events, "); |
2017 | break; | 2136 | break; |
2018 | case 28: | 2137 | case 28: |
@@ -2105,11 +2224,47 @@ static const struct pmu pmu = { | |||
2105 | .unthrottle = x86_pmu_unthrottle, | 2224 | .unthrottle = x86_pmu_unthrottle, |
2106 | }; | 2225 | }; |
2107 | 2226 | ||
2227 | static int | ||
2228 | validate_event(struct cpu_hw_events *cpuc, struct perf_event *event) | ||
2229 | { | ||
2230 | struct hw_perf_event fake_event = event->hw; | ||
2231 | |||
2232 | if (event->pmu != &pmu) | ||
2233 | return 0; | ||
2234 | |||
2235 | return x86_schedule_event(cpuc, &fake_event); | ||
2236 | } | ||
2237 | |||
2238 | static int validate_group(struct perf_event *event) | ||
2239 | { | ||
2240 | struct perf_event *sibling, *leader = event->group_leader; | ||
2241 | struct cpu_hw_events fake_pmu; | ||
2242 | |||
2243 | memset(&fake_pmu, 0, sizeof(fake_pmu)); | ||
2244 | |||
2245 | if (!validate_event(&fake_pmu, leader)) | ||
2246 | return -ENOSPC; | ||
2247 | |||
2248 | list_for_each_entry(sibling, &leader->sibling_list, group_entry) { | ||
2249 | if (!validate_event(&fake_pmu, sibling)) | ||
2250 | return -ENOSPC; | ||
2251 | } | ||
2252 | |||
2253 | if (!validate_event(&fake_pmu, event)) | ||
2254 | return -ENOSPC; | ||
2255 | |||
2256 | return 0; | ||
2257 | } | ||
2258 | |||
2108 | const struct pmu *hw_perf_event_init(struct perf_event *event) | 2259 | const struct pmu *hw_perf_event_init(struct perf_event *event) |
2109 | { | 2260 | { |
2110 | int err; | 2261 | int err; |
2111 | 2262 | ||
2112 | err = __hw_perf_event_init(event); | 2263 | err = __hw_perf_event_init(event); |
2264 | if (!err) { | ||
2265 | if (event->group_leader != event) | ||
2266 | err = validate_group(event); | ||
2267 | } | ||
2113 | if (err) { | 2268 | if (err) { |
2114 | if (event->destroy) | 2269 | if (event->destroy) |
2115 | event->destroy(event); | 2270 | event->destroy(event); |
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c index 391206199515..04bbd5278568 100644 --- a/arch/x86/kernel/irq.c +++ b/arch/x86/kernel/irq.c | |||
@@ -63,10 +63,10 @@ static int show_other_interrupts(struct seq_file *p, int prec) | |||
63 | for_each_online_cpu(j) | 63 | for_each_online_cpu(j) |
64 | seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count); | 64 | seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count); |
65 | seq_printf(p, " Spurious interrupts\n"); | 65 | seq_printf(p, " Spurious interrupts\n"); |
66 | seq_printf(p, "%*s: ", prec, "CNT"); | 66 | seq_printf(p, "%*s: ", prec, "PMI"); |
67 | for_each_online_cpu(j) | 67 | for_each_online_cpu(j) |
68 | seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs); | 68 | seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs); |
69 | seq_printf(p, " Performance counter interrupts\n"); | 69 | seq_printf(p, " Performance monitoring interrupts\n"); |
70 | seq_printf(p, "%*s: ", prec, "PND"); | 70 | seq_printf(p, "%*s: ", prec, "PND"); |
71 | for_each_online_cpu(j) | 71 | for_each_online_cpu(j) |
72 | seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs); | 72 | seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs); |
@@ -244,7 +244,6 @@ unsigned int __irq_entry do_IRQ(struct pt_regs *regs) | |||
244 | __func__, smp_processor_id(), vector, irq); | 244 | __func__, smp_processor_id(), vector, irq); |
245 | } | 245 | } |
246 | 246 | ||
247 | run_local_timers(); | ||
248 | irq_exit(); | 247 | irq_exit(); |
249 | 248 | ||
250 | set_irq_regs(old_regs); | 249 | set_irq_regs(old_regs); |
@@ -269,7 +268,6 @@ void smp_generic_interrupt(struct pt_regs *regs) | |||
269 | if (generic_interrupt_extension) | 268 | if (generic_interrupt_extension) |
270 | generic_interrupt_extension(); | 269 | generic_interrupt_extension(); |
271 | 270 | ||
272 | run_local_timers(); | ||
273 | irq_exit(); | 271 | irq_exit(); |
274 | 272 | ||
275 | set_irq_regs(old_regs); | 273 | set_irq_regs(old_regs); |
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index d20009b4e6ef..b2a71dca5642 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c | |||
@@ -311,7 +311,7 @@ void pci_iommu_shutdown(void) | |||
311 | amd_iommu_shutdown(); | 311 | amd_iommu_shutdown(); |
312 | } | 312 | } |
313 | /* Must execute after PCI subsystem */ | 313 | /* Must execute after PCI subsystem */ |
314 | fs_initcall(pci_iommu_init); | 314 | rootfs_initcall(pci_iommu_init); |
315 | 315 | ||
316 | #ifdef CONFIG_PCI | 316 | #ifdef CONFIG_PCI |
317 | /* Many VIA bridges seem to corrupt data for DAC. Disable it here */ | 317 | /* Many VIA bridges seem to corrupt data for DAC. Disable it here */ |
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c index d915d956e66d..ec1de97600e7 100644 --- a/arch/x86/kernel/smp.c +++ b/arch/x86/kernel/smp.c | |||
@@ -198,7 +198,6 @@ void smp_reschedule_interrupt(struct pt_regs *regs) | |||
198 | { | 198 | { |
199 | ack_APIC_irq(); | 199 | ack_APIC_irq(); |
200 | inc_irq_stat(irq_resched_count); | 200 | inc_irq_stat(irq_resched_count); |
201 | run_local_timers(); | ||
202 | /* | 201 | /* |
203 | * KVM uses this interrupt to force a cpu out of guest mode | 202 | * KVM uses this interrupt to force a cpu out of guest mode |
204 | */ | 203 | */ |
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c index dcb00d278512..be2573448ed9 100644 --- a/arch/x86/kernel/time.c +++ b/arch/x86/kernel/time.c | |||
@@ -38,7 +38,8 @@ unsigned long profile_pc(struct pt_regs *regs) | |||
38 | #ifdef CONFIG_FRAME_POINTER | 38 | #ifdef CONFIG_FRAME_POINTER |
39 | return *(unsigned long *)(regs->bp + sizeof(long)); | 39 | return *(unsigned long *)(regs->bp + sizeof(long)); |
40 | #else | 40 | #else |
41 | unsigned long *sp = (unsigned long *)regs->sp; | 41 | unsigned long *sp = |
42 | (unsigned long *)kernel_stack_pointer(regs); | ||
42 | /* | 43 | /* |
43 | * Return address is either directly at stack pointer | 44 | * Return address is either directly at stack pointer |
44 | * or above a saved flags. Eflags has bits 22-31 zero, | 45 | * or above a saved flags. Eflags has bits 22-31 zero, |
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c index 503c1f2e8835..f99fb6acfe34 100644 --- a/arch/x86/kernel/tlb_uv.c +++ b/arch/x86/kernel/tlb_uv.c | |||
@@ -843,8 +843,8 @@ static int __init uv_bau_init(void) | |||
843 | GFP_KERNEL, cpu_to_node(cur_cpu)); | 843 | GFP_KERNEL, cpu_to_node(cur_cpu)); |
844 | 844 | ||
845 | uv_bau_retry_limit = 1; | 845 | uv_bau_retry_limit = 1; |
846 | uv_nshift = uv_hub_info->n_val; | 846 | uv_nshift = uv_hub_info->m_val; |
847 | uv_mmask = (1UL << uv_hub_info->n_val) - 1; | 847 | uv_mmask = (1UL << uv_hub_info->m_val) - 1; |
848 | nblades = uv_num_possible_blades(); | 848 | nblades = uv_num_possible_blades(); |
849 | 849 | ||
850 | uv_bau_table_bases = (struct bau_control **) | 850 | uv_bau_table_bases = (struct bau_control **) |
diff --git a/arch/x86/kernel/trampoline.c b/arch/x86/kernel/trampoline.c index 699f7eeb896a..cd022121cab6 100644 --- a/arch/x86/kernel/trampoline.c +++ b/arch/x86/kernel/trampoline.c | |||
@@ -3,8 +3,16 @@ | |||
3 | #include <asm/trampoline.h> | 3 | #include <asm/trampoline.h> |
4 | #include <asm/e820.h> | 4 | #include <asm/e820.h> |
5 | 5 | ||
6 | #if defined(CONFIG_X86_64) && defined(CONFIG_ACPI_SLEEP) | ||
7 | #define __trampinit | ||
8 | #define __trampinitdata | ||
9 | #else | ||
10 | #define __trampinit __cpuinit | ||
11 | #define __trampinitdata __cpuinitdata | ||
12 | #endif | ||
13 | |||
6 | /* ready for x86_64 and x86 */ | 14 | /* ready for x86_64 and x86 */ |
7 | unsigned char *__cpuinitdata trampoline_base = __va(TRAMPOLINE_BASE); | 15 | unsigned char *__trampinitdata trampoline_base = __va(TRAMPOLINE_BASE); |
8 | 16 | ||
9 | void __init reserve_trampoline_memory(void) | 17 | void __init reserve_trampoline_memory(void) |
10 | { | 18 | { |
@@ -26,7 +34,7 @@ void __init reserve_trampoline_memory(void) | |||
26 | * bootstrap into the page concerned. The caller | 34 | * bootstrap into the page concerned. The caller |
27 | * has made sure it's suitably aligned. | 35 | * has made sure it's suitably aligned. |
28 | */ | 36 | */ |
29 | unsigned long __cpuinit setup_trampoline(void) | 37 | unsigned long __trampinit setup_trampoline(void) |
30 | { | 38 | { |
31 | memcpy(trampoline_base, trampoline_data, TRAMPOLINE_SIZE); | 39 | memcpy(trampoline_base, trampoline_data, TRAMPOLINE_SIZE); |
32 | return virt_to_phys(trampoline_base); | 40 | return virt_to_phys(trampoline_base); |
diff --git a/arch/x86/kernel/trampoline_64.S b/arch/x86/kernel/trampoline_64.S index 596d54c660a5..3af2dff58b21 100644 --- a/arch/x86/kernel/trampoline_64.S +++ b/arch/x86/kernel/trampoline_64.S | |||
@@ -32,8 +32,12 @@ | |||
32 | #include <asm/segment.h> | 32 | #include <asm/segment.h> |
33 | #include <asm/processor-flags.h> | 33 | #include <asm/processor-flags.h> |
34 | 34 | ||
35 | #ifdef CONFIG_ACPI_SLEEP | ||
36 | .section .rodata, "a", @progbits | ||
37 | #else | ||
35 | /* We can free up the trampoline after bootup if cpu hotplug is not supported. */ | 38 | /* We can free up the trampoline after bootup if cpu hotplug is not supported. */ |
36 | __CPUINITRODATA | 39 | __CPUINITRODATA |
40 | #endif | ||
37 | .code16 | 41 | .code16 |
38 | 42 | ||
39 | ENTRY(trampoline_data) | 43 | ENTRY(trampoline_data) |
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c index 31e6f6cfe53e..d430e4c30193 100644 --- a/arch/x86/kernel/vmi_32.c +++ b/arch/x86/kernel/vmi_32.c | |||
@@ -648,7 +648,7 @@ static inline int __init activate_vmi(void) | |||
648 | 648 | ||
649 | pv_info.paravirt_enabled = 1; | 649 | pv_info.paravirt_enabled = 1; |
650 | pv_info.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK; | 650 | pv_info.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK; |
651 | pv_info.name = "vmi"; | 651 | pv_info.name = "vmi [deprecated]"; |
652 | 652 | ||
653 | pv_init_ops.patch = vmi_patch; | 653 | pv_init_ops.patch = vmi_patch; |
654 | 654 | ||
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S index 92929fb3f9fa..3c68fe2d46cf 100644 --- a/arch/x86/kernel/vmlinux.lds.S +++ b/arch/x86/kernel/vmlinux.lds.S | |||
@@ -305,6 +305,9 @@ SECTIONS | |||
305 | 305 | ||
306 | 306 | ||
307 | #ifdef CONFIG_X86_32 | 307 | #ifdef CONFIG_X86_32 |
308 | /* | ||
309 | * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: | ||
310 | */ | ||
308 | . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), | 311 | . = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), |
309 | "kernel image bigger than KERNEL_IMAGE_SIZE"); | 312 | "kernel image bigger than KERNEL_IMAGE_SIZE"); |
310 | #else | 313 | #else |