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-rw-r--r--arch/arm/configs/kirkwood_defconfig225
-rw-r--r--arch/arm/configs/mv78xx0_defconfig1
-rw-r--r--arch/arm/configs/orion5x_defconfig4
-rw-r--r--arch/arm/kernel/entry-common.S4
-rw-r--r--arch/arm/kernel/fiq.c4
-rw-r--r--arch/arm/mach-ep93xx/include/mach/platform.h2
-rw-r--r--arch/arm/mach-kirkwood/Kconfig6
-rw-r--r--arch/arm/mach-kirkwood/Makefile3
-rw-r--r--arch/arm/mach-kirkwood/common.c56
-rw-r--r--arch/arm/mach-kirkwood/common.h5
-rw-r--r--arch/arm/mach-kirkwood/db88f6281-bp-setup.c67
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h2
-rw-r--r--arch/arm/mach-kirkwood/mpp.c97
-rw-r--r--arch/arm/mach-kirkwood/mpp.h303
-rw-r--r--arch/arm/mach-kirkwood/rd88f6192-nas-setup.c9
-rw-r--r--arch/arm/mach-kirkwood/rd88f6281-setup.c19
-rw-r--r--arch/arm/mach-kirkwood/sheevaplug-setup.c136
-rw-r--r--arch/arm/mach-mv78xx0/Kconfig6
-rw-r--r--arch/arm/mach-mv78xx0/Makefile1
-rw-r--r--arch/arm/mach-mv78xx0/common.c132
-rw-r--r--arch/arm/mach-mv78xx0/common.h3
-rw-r--r--arch/arm/mach-mv78xx0/db78x00-bp-setup.c16
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h14
-rw-r--r--arch/arm/mach-mv78xx0/pcie.c6
-rw-r--r--arch/arm/mach-mv78xx0/rd78x00-masa-setup.c88
-rw-r--r--arch/arm/mach-mx1/mx1ads.c1
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c4
-rw-r--r--arch/arm/mach-orion5x/Kconfig1
-rw-r--r--arch/arm/mach-orion5x/common.c7
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c4
-rw-r--r--arch/arm/mach-orion5x/ts78xx-fpga.h29
-rw-r--r--arch/arm/mach-orion5x/ts78xx-setup.c441
-rw-r--r--arch/arm/mach-s3c6410/mach-smdk6410.c4
-rw-r--r--arch/arm/mm/copypage-feroceon.c2
-rw-r--r--arch/arm/mm/copypage-v3.c2
-rw-r--r--arch/arm/mm/copypage-v4mc.c2
-rw-r--r--arch/arm/mm/copypage-v4wb.c2
-rw-r--r--arch/arm/mm/copypage-v4wt.c2
-rw-r--r--arch/arm/mm/copypage-xsc3.c2
-rw-r--r--arch/arm/mm/copypage-xscale.c2
-rw-r--r--arch/arm/plat-omap/Makefile3
-rw-r--r--arch/arm/plat-omap/common.c14
-rw-r--r--arch/arm/plat-omap/include/mach/common.h2
-rw-r--r--arch/arm/plat-omap/include/mach/pm.h2
-rw-r--r--arch/arm/plat-orion/gpio.c29
-rw-r--r--arch/arm/plat-orion/include/plat/gpio.h6
-rw-r--r--arch/arm/plat-orion/include/plat/mvsdio.h21
-rw-r--r--arch/arm/plat-s3c64xx/clock.c2
-rw-r--r--arch/arm/plat-s3c64xx/gpiolib.c2
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/irqs.h2
-rw-r--r--arch/arm/plat-s3c64xx/irq-eint.c15
-rw-r--r--arch/arm/plat-s3c64xx/irq.c2
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c24
-rw-r--r--arch/arm/tools/mach-types136
54 files changed, 1712 insertions, 262 deletions
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 4bc38078d580..9ed4e1b86674 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -1,11 +1,11 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.28-rc7 3# Linux kernel version: 2.6.29-rc5
4# Thu Dec 4 15:27:39 2008 4# Tue Mar 3 21:45:57 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8# CONFIG_GENERIC_GPIO is not set 8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y 9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y 10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y 11CONFIG_MMU=y
@@ -42,10 +42,19 @@ CONFIG_SYSVIPC_SYSCTL=y
42# CONFIG_BSD_PROCESS_ACCT is not set 42# CONFIG_BSD_PROCESS_ACCT is not set
43# CONFIG_TASKSTATS is not set 43# CONFIG_TASKSTATS is not set
44# CONFIG_AUDIT is not set 44# CONFIG_AUDIT is not set
45
46#
47# RCU Subsystem
48#
49CONFIG_CLASSIC_RCU=y
50# CONFIG_TREE_RCU is not set
51# CONFIG_PREEMPT_RCU is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_PREEMPT_RCU_TRACE is not set
45# CONFIG_IKCONFIG is not set 54# CONFIG_IKCONFIG is not set
46CONFIG_LOG_BUF_SHIFT=14 55CONFIG_LOG_BUF_SHIFT=19
47# CONFIG_CGROUPS is not set
48# CONFIG_GROUP_SCHED is not set 56# CONFIG_GROUP_SCHED is not set
57# CONFIG_CGROUPS is not set
49# CONFIG_SYSFS_DEPRECATED_V2 is not set 58# CONFIG_SYSFS_DEPRECATED_V2 is not set
50# CONFIG_RELAY is not set 59# CONFIG_RELAY is not set
51CONFIG_NAMESPACES=y 60CONFIG_NAMESPACES=y
@@ -53,6 +62,7 @@ CONFIG_NAMESPACES=y
53# CONFIG_IPC_NS is not set 62# CONFIG_IPC_NS is not set
54# CONFIG_USER_NS is not set 63# CONFIG_USER_NS is not set
55# CONFIG_PID_NS is not set 64# CONFIG_PID_NS is not set
65# CONFIG_NET_NS is not set
56# CONFIG_BLK_DEV_INITRD is not set 66# CONFIG_BLK_DEV_INITRD is not set
57CONFIG_CC_OPTIMIZE_FOR_SIZE=y 67CONFIG_CC_OPTIMIZE_FOR_SIZE=y
58CONFIG_SYSCTL=y 68CONFIG_SYSCTL=y
@@ -83,6 +93,7 @@ CONFIG_SLUB_DEBUG=y
83CONFIG_SLUB=y 93CONFIG_SLUB=y
84# CONFIG_SLOB is not set 94# CONFIG_SLOB is not set
85CONFIG_PROFILING=y 95CONFIG_PROFILING=y
96CONFIG_TRACEPOINTS=y
86# CONFIG_MARKERS is not set 97# CONFIG_MARKERS is not set
87CONFIG_OPROFILE=y 98CONFIG_OPROFILE=y
88CONFIG_HAVE_OPROFILE=y 99CONFIG_HAVE_OPROFILE=y
@@ -93,7 +104,6 @@ CONFIG_HAVE_KRETPROBES=y
93CONFIG_HAVE_GENERIC_DMA_COHERENT=y 104CONFIG_HAVE_GENERIC_DMA_COHERENT=y
94CONFIG_SLABINFO=y 105CONFIG_SLABINFO=y
95CONFIG_RT_MUTEXES=y 106CONFIG_RT_MUTEXES=y
96# CONFIG_TINY_SHMEM is not set
97CONFIG_BASE_SMALL=0 107CONFIG_BASE_SMALL=0
98CONFIG_MODULES=y 108CONFIG_MODULES=y
99# CONFIG_MODULE_FORCE_LOAD is not set 109# CONFIG_MODULE_FORCE_LOAD is not set
@@ -101,11 +111,9 @@ CONFIG_MODULE_UNLOAD=y
101# CONFIG_MODULE_FORCE_UNLOAD is not set 111# CONFIG_MODULE_FORCE_UNLOAD is not set
102# CONFIG_MODVERSIONS is not set 112# CONFIG_MODVERSIONS is not set
103# CONFIG_MODULE_SRCVERSION_ALL is not set 113# CONFIG_MODULE_SRCVERSION_ALL is not set
104CONFIG_KMOD=y
105CONFIG_BLOCK=y 114CONFIG_BLOCK=y
106# CONFIG_LBD is not set 115# CONFIG_LBD is not set
107# CONFIG_BLK_DEV_IO_TRACE is not set 116# CONFIG_BLK_DEV_IO_TRACE is not set
108# CONFIG_LSF is not set
109# CONFIG_BLK_DEV_BSG is not set 117# CONFIG_BLK_DEV_BSG is not set
110# CONFIG_BLK_DEV_INTEGRITY is not set 118# CONFIG_BLK_DEV_INTEGRITY is not set
111 119
@@ -121,7 +129,6 @@ CONFIG_IOSCHED_CFQ=y
121CONFIG_DEFAULT_CFQ=y 129CONFIG_DEFAULT_CFQ=y
122# CONFIG_DEFAULT_NOOP is not set 130# CONFIG_DEFAULT_NOOP is not set
123CONFIG_DEFAULT_IOSCHED="cfq" 131CONFIG_DEFAULT_IOSCHED="cfq"
124CONFIG_CLASSIC_RCU=y
125# CONFIG_FREEZER is not set 132# CONFIG_FREEZER is not set
126 133
127# 134#
@@ -132,7 +139,6 @@ CONFIG_CLASSIC_RCU=y
132# CONFIG_ARCH_REALVIEW is not set 139# CONFIG_ARCH_REALVIEW is not set
133# CONFIG_ARCH_VERSATILE is not set 140# CONFIG_ARCH_VERSATILE is not set
134# CONFIG_ARCH_AT91 is not set 141# CONFIG_ARCH_AT91 is not set
135# CONFIG_ARCH_CLPS7500 is not set
136# CONFIG_ARCH_CLPS711X is not set 142# CONFIG_ARCH_CLPS711X is not set
137# CONFIG_ARCH_EBSA110 is not set 143# CONFIG_ARCH_EBSA110 is not set
138# CONFIG_ARCH_EP93XX is not set 144# CONFIG_ARCH_EP93XX is not set
@@ -159,11 +165,13 @@ CONFIG_ARCH_KIRKWOOD=y
159# CONFIG_ARCH_RPC is not set 165# CONFIG_ARCH_RPC is not set
160# CONFIG_ARCH_SA1100 is not set 166# CONFIG_ARCH_SA1100 is not set
161# CONFIG_ARCH_S3C2410 is not set 167# CONFIG_ARCH_S3C2410 is not set
168# CONFIG_ARCH_S3C64XX is not set
162# CONFIG_ARCH_SHARK is not set 169# CONFIG_ARCH_SHARK is not set
163# CONFIG_ARCH_LH7A40X is not set 170# CONFIG_ARCH_LH7A40X is not set
164# CONFIG_ARCH_DAVINCI is not set 171# CONFIG_ARCH_DAVINCI is not set
165# CONFIG_ARCH_OMAP is not set 172# CONFIG_ARCH_OMAP is not set
166# CONFIG_ARCH_MSM is not set 173# CONFIG_ARCH_MSM is not set
174# CONFIG_ARCH_W90X900 is not set
167 175
168# 176#
169# Marvell Kirkwood Implementations 177# Marvell Kirkwood Implementations
@@ -171,14 +179,7 @@ CONFIG_ARCH_KIRKWOOD=y
171CONFIG_MACH_DB88F6281_BP=y 179CONFIG_MACH_DB88F6281_BP=y
172CONFIG_MACH_RD88F6192_NAS=y 180CONFIG_MACH_RD88F6192_NAS=y
173CONFIG_MACH_RD88F6281=y 181CONFIG_MACH_RD88F6281=y
174 182CONFIG_MACH_SHEEVAPLUG=y
175#
176# Boot options
177#
178
179#
180# Power management
181#
182CONFIG_PLAT_ORION=y 183CONFIG_PLAT_ORION=y
183 184
184# 185#
@@ -214,6 +215,7 @@ CONFIG_PCI_SYSCALL=y
214# CONFIG_ARCH_SUPPORTS_MSI is not set 215# CONFIG_ARCH_SUPPORTS_MSI is not set
215CONFIG_PCI_LEGACY=y 216CONFIG_PCI_LEGACY=y
216# CONFIG_PCI_DEBUG is not set 217# CONFIG_PCI_DEBUG is not set
218# CONFIG_PCI_STUB is not set
217# CONFIG_PCCARD is not set 219# CONFIG_PCCARD is not set
218 220
219# 221#
@@ -242,7 +244,6 @@ CONFIG_FLATMEM=y
242CONFIG_FLAT_NODE_MEM_MAP=y 244CONFIG_FLAT_NODE_MEM_MAP=y
243CONFIG_PAGEFLAGS_EXTENDED=y 245CONFIG_PAGEFLAGS_EXTENDED=y
244CONFIG_SPLIT_PTLOCK_CPUS=4096 246CONFIG_SPLIT_PTLOCK_CPUS=4096
245# CONFIG_RESOURCES_64BIT is not set
246# CONFIG_PHYS_ADDR_T_64BIT is not set 247# CONFIG_PHYS_ADDR_T_64BIT is not set
247CONFIG_ZONE_DMA_FLAG=0 248CONFIG_ZONE_DMA_FLAG=0
248CONFIG_VIRT_TO_BUS=y 249CONFIG_VIRT_TO_BUS=y
@@ -291,6 +292,7 @@ CONFIG_NET=y
291# 292#
292# Networking options 293# Networking options
293# 294#
295CONFIG_COMPAT_NET_DEV_OPS=y
294CONFIG_PACKET=y 296CONFIG_PACKET=y
295CONFIG_PACKET_MMAP=y 297CONFIG_PACKET_MMAP=y
296CONFIG_UNIX=y 298CONFIG_UNIX=y
@@ -355,6 +357,7 @@ CONFIG_NET_DSA_MV88E6123_61_65=y
355# CONFIG_ECONET is not set 357# CONFIG_ECONET is not set
356# CONFIG_WAN_ROUTER is not set 358# CONFIG_WAN_ROUTER is not set
357# CONFIG_NET_SCHED is not set 359# CONFIG_NET_SCHED is not set
360# CONFIG_DCB is not set
358 361
359# 362#
360# Network testing 363# Network testing
@@ -368,12 +371,27 @@ CONFIG_NET_PKTGEN=m
368# CONFIG_AF_RXRPC is not set 371# CONFIG_AF_RXRPC is not set
369# CONFIG_PHONET is not set 372# CONFIG_PHONET is not set
370CONFIG_WIRELESS=y 373CONFIG_WIRELESS=y
371# CONFIG_CFG80211 is not set 374CONFIG_CFG80211=y
375# CONFIG_CFG80211_REG_DEBUG is not set
376# CONFIG_NL80211 is not set
372CONFIG_WIRELESS_OLD_REGULATORY=y 377CONFIG_WIRELESS_OLD_REGULATORY=y
373CONFIG_WIRELESS_EXT=y 378CONFIG_WIRELESS_EXT=y
374CONFIG_WIRELESS_EXT_SYSFS=y 379CONFIG_WIRELESS_EXT_SYSFS=y
375# CONFIG_MAC80211 is not set 380CONFIG_LIB80211=y
376# CONFIG_IEEE80211 is not set 381CONFIG_MAC80211=y
382
383#
384# Rate control algorithm selection
385#
386CONFIG_MAC80211_RC_MINSTREL=y
387# CONFIG_MAC80211_RC_DEFAULT_PID is not set
388CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
389CONFIG_MAC80211_RC_DEFAULT="minstrel"
390# CONFIG_MAC80211_MESH is not set
391# CONFIG_MAC80211_LEDS is not set
392# CONFIG_MAC80211_DEBUGFS is not set
393# CONFIG_MAC80211_DEBUG_MENU is not set
394# CONFIG_WIMAX is not set
377# CONFIG_RFKILL is not set 395# CONFIG_RFKILL is not set
378# CONFIG_NET_9P is not set 396# CONFIG_NET_9P is not set
379 397
@@ -398,6 +416,7 @@ CONFIG_MTD=y
398# CONFIG_MTD_DEBUG is not set 416# CONFIG_MTD_DEBUG is not set
399# CONFIG_MTD_CONCAT is not set 417# CONFIG_MTD_CONCAT is not set
400CONFIG_MTD_PARTITIONS=y 418CONFIG_MTD_PARTITIONS=y
419# CONFIG_MTD_TESTS is not set
401# CONFIG_MTD_REDBOOT_PARTS is not set 420# CONFIG_MTD_REDBOOT_PARTS is not set
402CONFIG_MTD_CMDLINE_PARTS=y 421CONFIG_MTD_CMDLINE_PARTS=y
403# CONFIG_MTD_AFS_PARTS is not set 422# CONFIG_MTD_AFS_PARTS is not set
@@ -451,9 +470,7 @@ CONFIG_MTD_CFI_UTIL=y
451# 470#
452# CONFIG_MTD_COMPLEX_MAPPINGS is not set 471# CONFIG_MTD_COMPLEX_MAPPINGS is not set
453CONFIG_MTD_PHYSMAP=y 472CONFIG_MTD_PHYSMAP=y
454CONFIG_MTD_PHYSMAP_START=0x0 473# CONFIG_MTD_PHYSMAP_COMPAT is not set
455CONFIG_MTD_PHYSMAP_LEN=0x0
456CONFIG_MTD_PHYSMAP_BANKWIDTH=0
457# CONFIG_MTD_ARM_INTEGRATOR is not set 474# CONFIG_MTD_ARM_INTEGRATOR is not set
458# CONFIG_MTD_IMPA7 is not set 475# CONFIG_MTD_IMPA7 is not set
459# CONFIG_MTD_INTEL_VR_NOR is not set 476# CONFIG_MTD_INTEL_VR_NOR is not set
@@ -481,6 +498,7 @@ CONFIG_MTD_NAND=y
481# CONFIG_MTD_NAND_VERIFY_WRITE is not set 498# CONFIG_MTD_NAND_VERIFY_WRITE is not set
482# CONFIG_MTD_NAND_ECC_SMC is not set 499# CONFIG_MTD_NAND_ECC_SMC is not set
483# CONFIG_MTD_NAND_MUSEUM_IDS is not set 500# CONFIG_MTD_NAND_MUSEUM_IDS is not set
501# CONFIG_MTD_NAND_GPIO is not set
484CONFIG_MTD_NAND_IDS=y 502CONFIG_MTD_NAND_IDS=y
485# CONFIG_MTD_NAND_DISKONCHIP is not set 503# CONFIG_MTD_NAND_DISKONCHIP is not set
486# CONFIG_MTD_NAND_CAFE is not set 504# CONFIG_MTD_NAND_CAFE is not set
@@ -491,6 +509,12 @@ CONFIG_MTD_NAND_ORION=y
491# CONFIG_MTD_ONENAND is not set 509# CONFIG_MTD_ONENAND is not set
492 510
493# 511#
512# LPDDR flash memory drivers
513#
514# CONFIG_MTD_LPDDR is not set
515# CONFIG_MTD_QINFO_PROBE is not set
516
517#
494# UBI - Unsorted block images 518# UBI - Unsorted block images
495# 519#
496# CONFIG_MTD_UBI is not set 520# CONFIG_MTD_UBI is not set
@@ -568,6 +592,8 @@ CONFIG_SCSI_LOWLEVEL=y
568# CONFIG_MEGARAID_LEGACY is not set 592# CONFIG_MEGARAID_LEGACY is not set
569# CONFIG_MEGARAID_SAS is not set 593# CONFIG_MEGARAID_SAS is not set
570# CONFIG_SCSI_HPTIOP is not set 594# CONFIG_SCSI_HPTIOP is not set
595# CONFIG_LIBFC is not set
596# CONFIG_FCOE is not set
571# CONFIG_SCSI_DMX3191D is not set 597# CONFIG_SCSI_DMX3191D is not set
572# CONFIG_SCSI_FUTURE_DOMAIN is not set 598# CONFIG_SCSI_FUTURE_DOMAIN is not set
573# CONFIG_SCSI_IPS is not set 599# CONFIG_SCSI_IPS is not set
@@ -682,6 +708,9 @@ CONFIG_MARVELL_PHY=y
682# CONFIG_BROADCOM_PHY is not set 708# CONFIG_BROADCOM_PHY is not set
683# CONFIG_ICPLUS_PHY is not set 709# CONFIG_ICPLUS_PHY is not set
684# CONFIG_REALTEK_PHY is not set 710# CONFIG_REALTEK_PHY is not set
711# CONFIG_NATIONAL_PHY is not set
712# CONFIG_STE10XP is not set
713# CONFIG_LSI_ET1011C_PHY is not set
685# CONFIG_FIXED_PHY is not set 714# CONFIG_FIXED_PHY is not set
686# CONFIG_MDIO_BITBANG is not set 715# CONFIG_MDIO_BITBANG is not set
687CONFIG_NET_ETHERNET=y 716CONFIG_NET_ETHERNET=y
@@ -695,6 +724,7 @@ CONFIG_MII=y
695# CONFIG_DM9000 is not set 724# CONFIG_DM9000 is not set
696# CONFIG_ENC28J60 is not set 725# CONFIG_ENC28J60 is not set
697# CONFIG_SMC911X is not set 726# CONFIG_SMC911X is not set
727# CONFIG_SMSC911X is not set
698# CONFIG_NET_TULIP is not set 728# CONFIG_NET_TULIP is not set
699# CONFIG_HP100 is not set 729# CONFIG_HP100 is not set
700# CONFIG_IBM_NEW_EMAC_ZMII is not set 730# CONFIG_IBM_NEW_EMAC_ZMII is not set
@@ -710,7 +740,6 @@ CONFIG_NET_PCI=y
710# CONFIG_ADAPTEC_STARFIRE is not set 740# CONFIG_ADAPTEC_STARFIRE is not set
711# CONFIG_B44 is not set 741# CONFIG_B44 is not set
712# CONFIG_FORCEDETH is not set 742# CONFIG_FORCEDETH is not set
713# CONFIG_EEPRO100 is not set
714# CONFIG_E100 is not set 743# CONFIG_E100 is not set
715# CONFIG_FEALNX is not set 744# CONFIG_FEALNX is not set
716# CONFIG_NATSEMI is not set 745# CONFIG_NATSEMI is not set
@@ -720,6 +749,7 @@ CONFIG_NET_PCI=y
720# CONFIG_R6040 is not set 749# CONFIG_R6040 is not set
721# CONFIG_SIS900 is not set 750# CONFIG_SIS900 is not set
722# CONFIG_EPIC100 is not set 751# CONFIG_EPIC100 is not set
752# CONFIG_SMSC9420 is not set
723# CONFIG_SUNDANCE is not set 753# CONFIG_SUNDANCE is not set
724# CONFIG_TLAN is not set 754# CONFIG_TLAN is not set
725# CONFIG_VIA_RHINE is not set 755# CONFIG_VIA_RHINE is not set
@@ -754,8 +784,39 @@ CONFIG_MV643XX_ETH=y
754# Wireless LAN 784# Wireless LAN
755# 785#
756# CONFIG_WLAN_PRE80211 is not set 786# CONFIG_WLAN_PRE80211 is not set
757# CONFIG_WLAN_80211 is not set 787CONFIG_WLAN_80211=y
788CONFIG_LIBERTAS=y
789# CONFIG_LIBERTAS_USB is not set
790CONFIG_LIBERTAS_SDIO=y
791# CONFIG_LIBERTAS_DEBUG is not set
792# CONFIG_LIBERTAS_THINFIRM is not set
793# CONFIG_HERMES is not set
794# CONFIG_ATMEL is not set
795# CONFIG_PRISM54 is not set
796# CONFIG_USB_ZD1201 is not set
797# CONFIG_USB_NET_RNDIS_WLAN is not set
798# CONFIG_RTL8180 is not set
799# CONFIG_RTL8187 is not set
800# CONFIG_ADM8211 is not set
801# CONFIG_MAC80211_HWSIM is not set
802# CONFIG_P54_COMMON is not set
803# CONFIG_ATH5K is not set
804# CONFIG_ATH9K is not set
805# CONFIG_IPW2100 is not set
806# CONFIG_IPW2200 is not set
807# CONFIG_IWLCORE is not set
758# CONFIG_IWLWIFI_LEDS is not set 808# CONFIG_IWLWIFI_LEDS is not set
809# CONFIG_IWLAGN is not set
810# CONFIG_IWL3945 is not set
811# CONFIG_HOSTAP is not set
812# CONFIG_B43 is not set
813# CONFIG_B43LEGACY is not set
814# CONFIG_ZD1211RW is not set
815# CONFIG_RT2X00 is not set
816
817#
818# Enable WiMAX (Networking options) to see the WiMAX drivers
819#
759 820
760# 821#
761# USB Network Adapters 822# USB Network Adapters
@@ -839,11 +900,11 @@ CONFIG_SERIAL_CORE=y
839CONFIG_SERIAL_CORE_CONSOLE=y 900CONFIG_SERIAL_CORE_CONSOLE=y
840# CONFIG_SERIAL_JSM is not set 901# CONFIG_SERIAL_JSM is not set
841CONFIG_UNIX98_PTYS=y 902CONFIG_UNIX98_PTYS=y
903# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
842CONFIG_LEGACY_PTYS=y 904CONFIG_LEGACY_PTYS=y
843CONFIG_LEGACY_PTY_COUNT=16 905CONFIG_LEGACY_PTY_COUNT=16
844# CONFIG_IPMI_HANDLER is not set 906# CONFIG_IPMI_HANDLER is not set
845# CONFIG_HW_RANDOM is not set 907# CONFIG_HW_RANDOM is not set
846# CONFIG_NVRAM is not set
847# CONFIG_R3964 is not set 908# CONFIG_R3964 is not set
848# CONFIG_APPLICOM is not set 909# CONFIG_APPLICOM is not set
849# CONFIG_RAW_DRIVER is not set 910# CONFIG_RAW_DRIVER is not set
@@ -879,6 +940,7 @@ CONFIG_I2C_HELPER_AUTO=y
879# 940#
880# I2C system bus drivers (mostly embedded / system-on-chip) 941# I2C system bus drivers (mostly embedded / system-on-chip)
881# 942#
943# CONFIG_I2C_GPIO is not set
882CONFIG_I2C_MV64XXX=y 944CONFIG_I2C_MV64XXX=y
883# CONFIG_I2C_OCORES is not set 945# CONFIG_I2C_OCORES is not set
884# CONFIG_I2C_SIMTEC is not set 946# CONFIG_I2C_SIMTEC is not set
@@ -905,8 +967,6 @@ CONFIG_I2C_MV64XXX=y
905# Miscellaneous I2C Chip support 967# Miscellaneous I2C Chip support
906# 968#
907# CONFIG_DS1682 is not set 969# CONFIG_DS1682 is not set
908# CONFIG_EEPROM_AT24 is not set
909# CONFIG_EEPROM_LEGACY is not set
910# CONFIG_SENSORS_PCF8574 is not set 970# CONFIG_SENSORS_PCF8574 is not set
911# CONFIG_PCF8575 is not set 971# CONFIG_PCF8575 is not set
912# CONFIG_SENSORS_PCA9539 is not set 972# CONFIG_SENSORS_PCA9539 is not set
@@ -925,12 +985,12 @@ CONFIG_SPI_MASTER=y
925# SPI Master Controller Drivers 985# SPI Master Controller Drivers
926# 986#
927# CONFIG_SPI_BITBANG is not set 987# CONFIG_SPI_BITBANG is not set
988# CONFIG_SPI_GPIO is not set
928CONFIG_SPI_ORION=y 989CONFIG_SPI_ORION=y
929 990
930# 991#
931# SPI Protocol Masters 992# SPI Protocol Masters
932# 993#
933# CONFIG_EEPROM_AT25 is not set
934# CONFIG_SPI_SPIDEV is not set 994# CONFIG_SPI_SPIDEV is not set
935# CONFIG_SPI_TLE62X0 is not set 995# CONFIG_SPI_TLE62X0 is not set
936# CONFIG_W1 is not set 996# CONFIG_W1 is not set
@@ -952,10 +1012,12 @@ CONFIG_SSB_POSSIBLE=y
952# CONFIG_MFD_CORE is not set 1012# CONFIG_MFD_CORE is not set
953# CONFIG_MFD_SM501 is not set 1013# CONFIG_MFD_SM501 is not set
954# CONFIG_HTC_PASIC3 is not set 1014# CONFIG_HTC_PASIC3 is not set
1015# CONFIG_TWL4030_CORE is not set
955# CONFIG_MFD_TMIO is not set 1016# CONFIG_MFD_TMIO is not set
956# CONFIG_PMIC_DA903X is not set 1017# CONFIG_PMIC_DA903X is not set
957# CONFIG_MFD_WM8400 is not set 1018# CONFIG_MFD_WM8400 is not set
958# CONFIG_MFD_WM8350_I2C is not set 1019# CONFIG_MFD_WM8350_I2C is not set
1020# CONFIG_MFD_PCF50633 is not set
959 1021
960# 1022#
961# Multimedia devices 1023# Multimedia devices
@@ -1012,11 +1074,9 @@ CONFIG_HID_COMPAT=y
1012CONFIG_HID_A4TECH=y 1074CONFIG_HID_A4TECH=y
1013CONFIG_HID_APPLE=y 1075CONFIG_HID_APPLE=y
1014CONFIG_HID_BELKIN=y 1076CONFIG_HID_BELKIN=y
1015CONFIG_HID_BRIGHT=y
1016CONFIG_HID_CHERRY=y 1077CONFIG_HID_CHERRY=y
1017CONFIG_HID_CHICONY=y 1078CONFIG_HID_CHICONY=y
1018CONFIG_HID_CYPRESS=y 1079CONFIG_HID_CYPRESS=y
1019CONFIG_HID_DELL=y
1020CONFIG_HID_EZKEY=y 1080CONFIG_HID_EZKEY=y
1021CONFIG_HID_GYRATION=y 1081CONFIG_HID_GYRATION=y
1022CONFIG_HID_LOGITECH=y 1082CONFIG_HID_LOGITECH=y
@@ -1024,12 +1084,15 @@ CONFIG_HID_LOGITECH=y
1024# CONFIG_LOGIRUMBLEPAD2_FF is not set 1084# CONFIG_LOGIRUMBLEPAD2_FF is not set
1025CONFIG_HID_MICROSOFT=y 1085CONFIG_HID_MICROSOFT=y
1026CONFIG_HID_MONTEREY=y 1086CONFIG_HID_MONTEREY=y
1087CONFIG_HID_NTRIG=y
1027CONFIG_HID_PANTHERLORD=y 1088CONFIG_HID_PANTHERLORD=y
1028# CONFIG_PANTHERLORD_FF is not set 1089# CONFIG_PANTHERLORD_FF is not set
1029CONFIG_HID_PETALYNX=y 1090CONFIG_HID_PETALYNX=y
1030CONFIG_HID_SAMSUNG=y 1091CONFIG_HID_SAMSUNG=y
1031CONFIG_HID_SONY=y 1092CONFIG_HID_SONY=y
1032CONFIG_HID_SUNPLUS=y 1093CONFIG_HID_SUNPLUS=y
1094# CONFIG_GREENASIA_FF is not set
1095CONFIG_HID_TOPSEED=y
1033# CONFIG_THRUSTMASTER_FF is not set 1096# CONFIG_THRUSTMASTER_FF is not set
1034# CONFIG_ZEROPLUS_FF is not set 1097# CONFIG_ZEROPLUS_FF is not set
1035CONFIG_USB_SUPPORT=y 1098CONFIG_USB_SUPPORT=y
@@ -1058,6 +1121,7 @@ CONFIG_USB_DEVICE_CLASS=y
1058CONFIG_USB_EHCI_HCD=y 1121CONFIG_USB_EHCI_HCD=y
1059CONFIG_USB_EHCI_ROOT_HUB_TT=y 1122CONFIG_USB_EHCI_ROOT_HUB_TT=y
1060CONFIG_USB_EHCI_TT_NEWSCHED=y 1123CONFIG_USB_EHCI_TT_NEWSCHED=y
1124# CONFIG_USB_OXU210HP_HCD is not set
1061# CONFIG_USB_ISP116X_HCD is not set 1125# CONFIG_USB_ISP116X_HCD is not set
1062# CONFIG_USB_ISP1760_HCD is not set 1126# CONFIG_USB_ISP1760_HCD is not set
1063# CONFIG_USB_OHCI_HCD is not set 1127# CONFIG_USB_OHCI_HCD is not set
@@ -1087,7 +1151,6 @@ CONFIG_USB_STORAGE=y
1087CONFIG_USB_STORAGE_DATAFAB=y 1151CONFIG_USB_STORAGE_DATAFAB=y
1088CONFIG_USB_STORAGE_FREECOM=y 1152CONFIG_USB_STORAGE_FREECOM=y
1089# CONFIG_USB_STORAGE_ISD200 is not set 1153# CONFIG_USB_STORAGE_ISD200 is not set
1090CONFIG_USB_STORAGE_DPCM=y
1091# CONFIG_USB_STORAGE_USBAT is not set 1154# CONFIG_USB_STORAGE_USBAT is not set
1092CONFIG_USB_STORAGE_SDDR09=y 1155CONFIG_USB_STORAGE_SDDR09=y
1093CONFIG_USB_STORAGE_SDDR55=y 1156CONFIG_USB_STORAGE_SDDR55=y
@@ -1135,21 +1198,51 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
1135# CONFIG_USB_ISIGHTFW is not set 1198# CONFIG_USB_ISIGHTFW is not set
1136# CONFIG_USB_VST is not set 1199# CONFIG_USB_VST is not set
1137# CONFIG_USB_GADGET is not set 1200# CONFIG_USB_GADGET is not set
1201
1202#
1203# OTG and related infrastructure
1204#
1205# CONFIG_USB_GPIO_VBUS is not set
1138# CONFIG_UWB is not set 1206# CONFIG_UWB is not set
1139# CONFIG_MMC is not set 1207CONFIG_MMC=y
1208# CONFIG_MMC_DEBUG is not set
1209# CONFIG_MMC_UNSAFE_RESUME is not set
1210
1211#
1212# MMC/SD/SDIO Card Drivers
1213#
1214CONFIG_MMC_BLOCK=y
1215CONFIG_MMC_BLOCK_BOUNCE=y
1216CONFIG_SDIO_UART=y
1217# CONFIG_MMC_TEST is not set
1218
1219#
1220# MMC/SD/SDIO Host Controller Drivers
1221#
1222# CONFIG_MMC_SDHCI is not set
1223# CONFIG_MMC_TIFM_SD is not set
1224CONFIG_MMC_MVSDIO=y
1225# CONFIG_MMC_SPI is not set
1140# CONFIG_MEMSTICK is not set 1226# CONFIG_MEMSTICK is not set
1141# CONFIG_ACCESSIBILITY is not set 1227# CONFIG_ACCESSIBILITY is not set
1142CONFIG_NEW_LEDS=y 1228CONFIG_NEW_LEDS=y
1143# CONFIG_LEDS_CLASS is not set 1229CONFIG_LEDS_CLASS=y
1144 1230
1145# 1231#
1146# LED drivers 1232# LED drivers
1147# 1233#
1234# CONFIG_LEDS_PCA9532 is not set
1235CONFIG_LEDS_GPIO=y
1236# CONFIG_LEDS_PCA955X is not set
1148 1237
1149# 1238#
1150# LED Triggers 1239# LED Triggers
1151# 1240#
1152# CONFIG_LEDS_TRIGGERS is not set 1241CONFIG_LEDS_TRIGGERS=y
1242CONFIG_LEDS_TRIGGER_TIMER=y
1243CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1244# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
1245CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
1153CONFIG_RTC_LIB=y 1246CONFIG_RTC_LIB=y
1154CONFIG_RTC_CLASS=y 1247CONFIG_RTC_CLASS=y
1155CONFIG_RTC_HCTOSYS=y 1248CONFIG_RTC_HCTOSYS=y
@@ -1227,6 +1320,7 @@ CONFIG_DMA_ENGINE=y
1227# CONFIG_DMATEST is not set 1320# CONFIG_DMATEST is not set
1228# CONFIG_REGULATOR is not set 1321# CONFIG_REGULATOR is not set
1229# CONFIG_UIO is not set 1322# CONFIG_UIO is not set
1323# CONFIG_STAGING is not set
1230 1324
1231# 1325#
1232# File systems 1326# File systems
@@ -1238,16 +1332,14 @@ CONFIG_EXT3_FS=y
1238# CONFIG_EXT3_FS_XATTR is not set 1332# CONFIG_EXT3_FS_XATTR is not set
1239# CONFIG_EXT4_FS is not set 1333# CONFIG_EXT4_FS is not set
1240CONFIG_JBD=y 1334CONFIG_JBD=y
1335# CONFIG_JBD_DEBUG is not set
1241# CONFIG_REISERFS_FS is not set 1336# CONFIG_REISERFS_FS is not set
1242# CONFIG_JFS_FS is not set 1337# CONFIG_JFS_FS is not set
1243# CONFIG_FS_POSIX_ACL is not set 1338# CONFIG_FS_POSIX_ACL is not set
1244CONFIG_FILE_LOCKING=y 1339CONFIG_FILE_LOCKING=y
1245CONFIG_XFS_FS=y 1340# CONFIG_XFS_FS is not set
1246# CONFIG_XFS_QUOTA is not set
1247# CONFIG_XFS_POSIX_ACL is not set
1248# CONFIG_XFS_RT is not set
1249# CONFIG_XFS_DEBUG is not set
1250# CONFIG_OCFS2_FS is not set 1341# CONFIG_OCFS2_FS is not set
1342# CONFIG_BTRFS_FS is not set
1251CONFIG_DNOTIFY=y 1343CONFIG_DNOTIFY=y
1252CONFIG_INOTIFY=y 1344CONFIG_INOTIFY=y
1253CONFIG_INOTIFY_USER=y 1345CONFIG_INOTIFY_USER=y
@@ -1268,9 +1360,9 @@ CONFIG_UDF_NLS=y
1268# 1360#
1269# DOS/FAT/NT Filesystems 1361# DOS/FAT/NT Filesystems
1270# 1362#
1271CONFIG_FAT_FS=m 1363CONFIG_FAT_FS=y
1272CONFIG_MSDOS_FS=m 1364CONFIG_MSDOS_FS=y
1273CONFIG_VFAT_FS=m 1365CONFIG_VFAT_FS=y
1274CONFIG_FAT_DEFAULT_CODEPAGE=437 1366CONFIG_FAT_DEFAULT_CODEPAGE=437
1275CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" 1367CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1276# CONFIG_NTFS_FS is not set 1368# CONFIG_NTFS_FS is not set
@@ -1286,10 +1378,7 @@ CONFIG_TMPFS=y
1286# CONFIG_TMPFS_POSIX_ACL is not set 1378# CONFIG_TMPFS_POSIX_ACL is not set
1287# CONFIG_HUGETLB_PAGE is not set 1379# CONFIG_HUGETLB_PAGE is not set
1288# CONFIG_CONFIGFS_FS is not set 1380# CONFIG_CONFIGFS_FS is not set
1289 1381CONFIG_MISC_FILESYSTEMS=y
1290#
1291# Miscellaneous filesystems
1292#
1293# CONFIG_ADFS_FS is not set 1382# CONFIG_ADFS_FS is not set
1294# CONFIG_AFFS_FS is not set 1383# CONFIG_AFFS_FS is not set
1295# CONFIG_HFS_FS is not set 1384# CONFIG_HFS_FS is not set
@@ -1309,6 +1398,7 @@ CONFIG_JFFS2_ZLIB=y
1309CONFIG_JFFS2_RTIME=y 1398CONFIG_JFFS2_RTIME=y
1310# CONFIG_JFFS2_RUBIN is not set 1399# CONFIG_JFFS2_RUBIN is not set
1311CONFIG_CRAMFS=y 1400CONFIG_CRAMFS=y
1401# CONFIG_SQUASHFS is not set
1312# CONFIG_VXFS_FS is not set 1402# CONFIG_VXFS_FS is not set
1313# CONFIG_MINIX_FS is not set 1403# CONFIG_MINIX_FS is not set
1314# CONFIG_OMFS_FS is not set 1404# CONFIG_OMFS_FS is not set
@@ -1393,7 +1483,7 @@ CONFIG_ENABLE_MUST_CHECK=y
1393CONFIG_FRAME_WARN=1024 1483CONFIG_FRAME_WARN=1024
1394CONFIG_MAGIC_SYSRQ=y 1484CONFIG_MAGIC_SYSRQ=y
1395# CONFIG_UNUSED_SYMBOLS is not set 1485# CONFIG_UNUSED_SYMBOLS is not set
1396# CONFIG_DEBUG_FS is not set 1486CONFIG_DEBUG_FS=y
1397# CONFIG_HEADERS_CHECK is not set 1487# CONFIG_HEADERS_CHECK is not set
1398CONFIG_DEBUG_KERNEL=y 1488CONFIG_DEBUG_KERNEL=y
1399# CONFIG_DEBUG_SHIRQ is not set 1489# CONFIG_DEBUG_SHIRQ is not set
@@ -1416,6 +1506,7 @@ CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1416# CONFIG_LOCK_STAT is not set 1506# CONFIG_LOCK_STAT is not set
1417# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1507# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1418# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1508# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1509CONFIG_STACKTRACE=y
1419# CONFIG_DEBUG_KOBJECT is not set 1510# CONFIG_DEBUG_KOBJECT is not set
1420CONFIG_DEBUG_BUGVERBOSE=y 1511CONFIG_DEBUG_BUGVERBOSE=y
1421CONFIG_DEBUG_INFO=y 1512CONFIG_DEBUG_INFO=y
@@ -1424,7 +1515,7 @@ CONFIG_DEBUG_INFO=y
1424CONFIG_DEBUG_MEMORY_INIT=y 1515CONFIG_DEBUG_MEMORY_INIT=y
1425# CONFIG_DEBUG_LIST is not set 1516# CONFIG_DEBUG_LIST is not set
1426# CONFIG_DEBUG_SG is not set 1517# CONFIG_DEBUG_SG is not set
1427CONFIG_FRAME_POINTER=y 1518# CONFIG_DEBUG_NOTIFIERS is not set
1428# CONFIG_BOOT_PRINTK_DELAY is not set 1519# CONFIG_BOOT_PRINTK_DELAY is not set
1429# CONFIG_RCU_TORTURE_TEST is not set 1520# CONFIG_RCU_TORTURE_TEST is not set
1430# CONFIG_RCU_CPU_STALL_DETECTOR is not set 1521# CONFIG_RCU_CPU_STALL_DETECTOR is not set
@@ -1435,7 +1526,10 @@ CONFIG_FRAME_POINTER=y
1435# CONFIG_FAULT_INJECTION is not set 1526# CONFIG_FAULT_INJECTION is not set
1436# CONFIG_LATENCYTOP is not set 1527# CONFIG_LATENCYTOP is not set
1437CONFIG_SYSCTL_SYSCALL_CHECK=y 1528CONFIG_SYSCTL_SYSCALL_CHECK=y
1529CONFIG_NOP_TRACER=y
1438CONFIG_HAVE_FUNCTION_TRACER=y 1530CONFIG_HAVE_FUNCTION_TRACER=y
1531CONFIG_RING_BUFFER=y
1532CONFIG_TRACING=y
1439 1533
1440# 1534#
1441# Tracers 1535# Tracers
@@ -1446,11 +1540,14 @@ CONFIG_HAVE_FUNCTION_TRACER=y
1446# CONFIG_SCHED_TRACER is not set 1540# CONFIG_SCHED_TRACER is not set
1447# CONFIG_CONTEXT_SWITCH_TRACER is not set 1541# CONFIG_CONTEXT_SWITCH_TRACER is not set
1448# CONFIG_BOOT_TRACER is not set 1542# CONFIG_BOOT_TRACER is not set
1543# CONFIG_TRACE_BRANCH_PROFILING is not set
1449# CONFIG_STACK_TRACER is not set 1544# CONFIG_STACK_TRACER is not set
1545# CONFIG_FTRACE_STARTUP_TEST is not set
1450# CONFIG_DYNAMIC_PRINTK_DEBUG is not set 1546# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1451# CONFIG_SAMPLES is not set 1547# CONFIG_SAMPLES is not set
1452CONFIG_HAVE_ARCH_KGDB=y 1548CONFIG_HAVE_ARCH_KGDB=y
1453# CONFIG_KGDB is not set 1549# CONFIG_KGDB is not set
1550CONFIG_ARM_UNWIND=y
1454CONFIG_DEBUG_USER=y 1551CONFIG_DEBUG_USER=y
1455CONFIG_DEBUG_ERRORS=y 1552CONFIG_DEBUG_ERRORS=y
1456# CONFIG_DEBUG_STACK_USAGE is not set 1553# CONFIG_DEBUG_STACK_USAGE is not set
@@ -1464,19 +1561,22 @@ CONFIG_DEBUG_LL=y
1464# CONFIG_SECURITY is not set 1561# CONFIG_SECURITY is not set
1465# CONFIG_SECURITYFS is not set 1562# CONFIG_SECURITYFS is not set
1466# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1563# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1467CONFIG_ASYNC_CORE=y
1468CONFIG_CRYPTO=y 1564CONFIG_CRYPTO=y
1469 1565
1470# 1566#
1471# Crypto core or helper 1567# Crypto core or helper
1472# 1568#
1473# CONFIG_CRYPTO_FIPS is not set 1569# CONFIG_CRYPTO_FIPS is not set
1474CONFIG_CRYPTO_ALGAPI=m 1570CONFIG_CRYPTO_ALGAPI=y
1475CONFIG_CRYPTO_AEAD=m 1571CONFIG_CRYPTO_ALGAPI2=y
1476CONFIG_CRYPTO_BLKCIPHER=m 1572CONFIG_CRYPTO_AEAD2=y
1477CONFIG_CRYPTO_HASH=m 1573CONFIG_CRYPTO_BLKCIPHER=y
1478CONFIG_CRYPTO_RNG=m 1574CONFIG_CRYPTO_BLKCIPHER2=y
1479CONFIG_CRYPTO_MANAGER=m 1575CONFIG_CRYPTO_HASH=y
1576CONFIG_CRYPTO_HASH2=y
1577CONFIG_CRYPTO_RNG2=y
1578CONFIG_CRYPTO_MANAGER=y
1579CONFIG_CRYPTO_MANAGER2=y
1480# CONFIG_CRYPTO_GF128MUL is not set 1580# CONFIG_CRYPTO_GF128MUL is not set
1481# CONFIG_CRYPTO_NULL is not set 1581# CONFIG_CRYPTO_NULL is not set
1482# CONFIG_CRYPTO_CRYPTD is not set 1582# CONFIG_CRYPTO_CRYPTD is not set
@@ -1496,7 +1596,7 @@ CONFIG_CRYPTO_MANAGER=m
1496CONFIG_CRYPTO_CBC=m 1596CONFIG_CRYPTO_CBC=m
1497# CONFIG_CRYPTO_CTR is not set 1597# CONFIG_CRYPTO_CTR is not set
1498# CONFIG_CRYPTO_CTS is not set 1598# CONFIG_CRYPTO_CTS is not set
1499CONFIG_CRYPTO_ECB=m 1599CONFIG_CRYPTO_ECB=y
1500# CONFIG_CRYPTO_LRW is not set 1600# CONFIG_CRYPTO_LRW is not set
1501CONFIG_CRYPTO_PCBC=m 1601CONFIG_CRYPTO_PCBC=m
1502# CONFIG_CRYPTO_XTS is not set 1602# CONFIG_CRYPTO_XTS is not set
@@ -1510,7 +1610,7 @@ CONFIG_CRYPTO_PCBC=m
1510# 1610#
1511# Digest 1611# Digest
1512# 1612#
1513# CONFIG_CRYPTO_CRC32C is not set 1613CONFIG_CRYPTO_CRC32C=y
1514# CONFIG_CRYPTO_MD4 is not set 1614# CONFIG_CRYPTO_MD4 is not set
1515# CONFIG_CRYPTO_MD5 is not set 1615# CONFIG_CRYPTO_MD5 is not set
1516# CONFIG_CRYPTO_MICHAEL_MIC is not set 1616# CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1527,9 +1627,9 @@ CONFIG_CRYPTO_PCBC=m
1527# 1627#
1528# Ciphers 1628# Ciphers
1529# 1629#
1530# CONFIG_CRYPTO_AES is not set 1630CONFIG_CRYPTO_AES=y
1531# CONFIG_CRYPTO_ANUBIS is not set 1631# CONFIG_CRYPTO_ANUBIS is not set
1532# CONFIG_CRYPTO_ARC4 is not set 1632CONFIG_CRYPTO_ARC4=y
1533# CONFIG_CRYPTO_BLOWFISH is not set 1633# CONFIG_CRYPTO_BLOWFISH is not set
1534# CONFIG_CRYPTO_CAMELLIA is not set 1634# CONFIG_CRYPTO_CAMELLIA is not set
1535# CONFIG_CRYPTO_CAST5 is not set 1635# CONFIG_CRYPTO_CAST5 is not set
@@ -1560,6 +1660,7 @@ CONFIG_CRYPTO_HW=y
1560# Library routines 1660# Library routines
1561# 1661#
1562CONFIG_BITREVERSE=y 1662CONFIG_BITREVERSE=y
1663CONFIG_GENERIC_FIND_LAST_BIT=y
1563CONFIG_CRC_CCITT=y 1664CONFIG_CRC_CCITT=y
1564CONFIG_CRC16=y 1665CONFIG_CRC16=y
1565# CONFIG_CRC_T10DIF is not set 1666# CONFIG_CRC_T10DIF is not set
diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
index 83c817f31bcc..b0698722e0cb 100644
--- a/arch/arm/configs/mv78xx0_defconfig
+++ b/arch/arm/configs/mv78xx0_defconfig
@@ -165,6 +165,7 @@ CONFIG_ARCH_MV78XX0=y
165# Marvell MV78xx0 Implementations 165# Marvell MV78xx0 Implementations
166# 166#
167CONFIG_MACH_DB78X00_BP=y 167CONFIG_MACH_DB78X00_BP=y
168CONFIG_MACH_RD78X00_MASA=y
168 169
169# 170#
170# Boot options 171# Boot options
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index a8ee6984a09e..020e6a8a9e5c 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -481,7 +481,7 @@ CONFIG_MTD_NAND_IDS=y
481# CONFIG_MTD_NAND_DISKONCHIP is not set 481# CONFIG_MTD_NAND_DISKONCHIP is not set
482# CONFIG_MTD_NAND_CAFE is not set 482# CONFIG_MTD_NAND_CAFE is not set
483# CONFIG_MTD_NAND_NANDSIM is not set 483# CONFIG_MTD_NAND_NANDSIM is not set
484# CONFIG_MTD_NAND_PLATFORM is not set 484CONFIG_MTD_NAND_PLATFORM=y
485# CONFIG_MTD_ALAUDA is not set 485# CONFIG_MTD_ALAUDA is not set
486CONFIG_MTD_NAND_ORION=y 486CONFIG_MTD_NAND_ORION=y
487# CONFIG_MTD_ONENAND is not set 487# CONFIG_MTD_ONENAND is not set
@@ -1177,7 +1177,7 @@ CONFIG_RTC_DRV_S35390A=y
1177# CONFIG_RTC_DRV_DS1553 is not set 1177# CONFIG_RTC_DRV_DS1553 is not set
1178# CONFIG_RTC_DRV_DS1742 is not set 1178# CONFIG_RTC_DRV_DS1742 is not set
1179# CONFIG_RTC_DRV_STK17TA8 is not set 1179# CONFIG_RTC_DRV_STK17TA8 is not set
1180# CONFIG_RTC_DRV_M48T86 is not set 1180CONFIG_RTC_DRV_M48T86=y
1181# CONFIG_RTC_DRV_M48T59 is not set 1181# CONFIG_RTC_DRV_M48T59 is not set
1182# CONFIG_RTC_DRV_V3020 is not set 1182# CONFIG_RTC_DRV_V3020 is not set
1183 1183
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index b8c1f1411440..b55cb0331809 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -115,6 +115,7 @@ ENTRY(mcount)
115 .globl mcount_call 115 .globl mcount_call
116mcount_call: 116mcount_call:
117 bl ftrace_stub 117 bl ftrace_stub
118 ldr lr, [fp, #-4] @ restore lr
118 ldmia sp!, {r0-r3, pc} 119 ldmia sp!, {r0-r3, pc}
119 120
120ENTRY(ftrace_caller) 121ENTRY(ftrace_caller)
@@ -126,6 +127,7 @@ ENTRY(ftrace_caller)
126 .globl ftrace_call 127 .globl ftrace_call
127ftrace_call: 128ftrace_call:
128 bl ftrace_stub 129 bl ftrace_stub
130 ldr lr, [fp, #-4] @ restore lr
129 ldmia sp!, {r0-r3, pc} 131 ldmia sp!, {r0-r3, pc}
130 132
131#else 133#else
@@ -137,6 +139,7 @@ ENTRY(mcount)
137 adr r0, ftrace_stub 139 adr r0, ftrace_stub
138 cmp r0, r2 140 cmp r0, r2
139 bne trace 141 bne trace
142 ldr lr, [fp, #-4] @ restore lr
140 ldmia sp!, {r0-r3, pc} 143 ldmia sp!, {r0-r3, pc}
141 144
142trace: 145trace:
@@ -145,6 +148,7 @@ trace:
145 sub r0, r0, #MCOUNT_INSN_SIZE 148 sub r0, r0, #MCOUNT_INSN_SIZE
146 mov lr, pc 149 mov lr, pc
147 mov pc, r2 150 mov pc, r2
151 mov lr, r1 @ restore lr
148 ldmia sp!, {r0-r3, pc} 152 ldmia sp!, {r0-r3, pc}
149 153
150#endif /* CONFIG_DYNAMIC_FTRACE */ 154#endif /* CONFIG_DYNAMIC_FTRACE */
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 36f81d967979..6ff7919613d7 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -88,7 +88,7 @@ void set_fiq_handler(void *start, unsigned int length)
88 * disable irqs for the duration. Note - these functions are almost 88 * disable irqs for the duration. Note - these functions are almost
89 * entirely coded in assembly. 89 * entirely coded in assembly.
90 */ 90 */
91void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs) 91void __naked set_fiq_regs(struct pt_regs *regs)
92{ 92{
93 register unsigned long tmp; 93 register unsigned long tmp;
94 asm volatile ( 94 asm volatile (
@@ -106,7 +106,7 @@ void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs)
106 : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); 106 : "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE));
107} 107}
108 108
109void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs) 109void __naked get_fiq_regs(struct pt_regs *regs)
110{ 110{
111 register unsigned long tmp; 111 register unsigned long tmp;
112 asm volatile ( 112 asm volatile (
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
index 88f7e88f152f..05f0f4f2f3ce 100644
--- a/arch/arm/mach-ep93xx/include/mach/platform.h
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -4,6 +4,8 @@
4 4
5#ifndef __ASSEMBLY__ 5#ifndef __ASSEMBLY__
6 6
7struct i2c_board_info;
8
7struct ep93xx_eth_data 9struct ep93xx_eth_data
8{ 10{
9 unsigned char dev_addr[6]; 11 unsigned char dev_addr[6];
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 3600cd9f0519..532443622a17 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -20,6 +20,12 @@ config MACH_RD88F6281
20 Say 'Y' here if you want your kernel to support the 20 Say 'Y' here if you want your kernel to support the
21 Marvell RD-88F6281 Reference Board. 21 Marvell RD-88F6281 Reference Board.
22 22
23config MACH_SHEEVAPLUG
24 bool "Marvell SheevaPlug Reference Board"
25 help
26 Say 'Y' here if you want your kernel to support the
27 Marvell SheevaPlug Reference Board.
28
23endmenu 29endmenu
24 30
25endif 31endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index b96c55dad343..de81b4b5bd33 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -1,5 +1,6 @@
1obj-y += common.o addr-map.o irq.o pcie.o 1obj-y += common.o addr-map.o irq.o pcie.o mpp.o
2 2
3obj-$(CONFIG_MACH_DB88F6281_BP) += db88f6281-bp-setup.o 3obj-$(CONFIG_MACH_DB88F6281_BP) += db88f6281-bp-setup.o
4obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o 4obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o
5obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o 5obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
6obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index b3404b7775b3..9f012551794d 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -24,6 +24,7 @@
24#include <mach/kirkwood.h> 24#include <mach/kirkwood.h>
25#include <plat/cache-feroceon-l2.h> 25#include <plat/cache-feroceon-l2.h>
26#include <plat/ehci-orion.h> 26#include <plat/ehci-orion.h>
27#include <plat/mvsdio.h>
27#include <plat/mv_xor.h> 28#include <plat/mv_xor.h>
28#include <plat/orion_nand.h> 29#include <plat/orion_nand.h>
29#include <plat/time.h> 30#include <plat/time.h>
@@ -254,7 +255,7 @@ static struct resource kirkwood_rtc_resource = {
254 .flags = IORESOURCE_MEM, 255 .flags = IORESOURCE_MEM,
255}; 256};
256 257
257void __init kirkwood_rtc_init(void) 258static void __init kirkwood_rtc_init(void)
258{ 259{
259 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1); 260 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
260} 261}
@@ -296,6 +297,50 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
296 297
297 298
298/***************************************************************************** 299/*****************************************************************************
300 * SD/SDIO/MMC
301 ****************************************************************************/
302static struct resource mvsdio_resources[] = {
303 [0] = {
304 .start = SDIO_PHYS_BASE,
305 .end = SDIO_PHYS_BASE + SZ_1K - 1,
306 .flags = IORESOURCE_MEM,
307 },
308 [1] = {
309 .start = IRQ_KIRKWOOD_SDIO,
310 .end = IRQ_KIRKWOOD_SDIO,
311 .flags = IORESOURCE_IRQ,
312 },
313};
314
315static u64 mvsdio_dmamask = 0xffffffffUL;
316
317static struct platform_device kirkwood_sdio = {
318 .name = "mvsdio",
319 .id = -1,
320 .dev = {
321 .dma_mask = &mvsdio_dmamask,
322 .coherent_dma_mask = 0xffffffff,
323 },
324 .num_resources = ARRAY_SIZE(mvsdio_resources),
325 .resource = mvsdio_resources,
326};
327
328void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
329{
330 u32 dev, rev;
331
332 kirkwood_pcie_id(&dev, &rev);
333 if (rev == 0) /* catch all Kirkwood Z0's */
334 mvsdio_data->clock = 100000000;
335 else
336 mvsdio_data->clock = 200000000;
337 mvsdio_data->dram = &kirkwood_mbus_dram_info;
338 kirkwood_sdio.dev.platform_data = mvsdio_data;
339 platform_device_register(&kirkwood_sdio);
340}
341
342
343/*****************************************************************************
299 * SPI 344 * SPI
300 ****************************************************************************/ 345 ****************************************************************************/
301static struct orion_spi_info kirkwood_spi_plat_data = { 346static struct orion_spi_info kirkwood_spi_plat_data = {
@@ -502,7 +547,7 @@ static struct platform_device kirkwood_xor01_channel = {
502 }, 547 },
503}; 548};
504 549
505void __init kirkwood_xor0_init(void) 550static void __init kirkwood_xor0_init(void)
506{ 551{
507 platform_device_register(&kirkwood_xor0_shared); 552 platform_device_register(&kirkwood_xor0_shared);
508 553
@@ -600,7 +645,7 @@ static struct platform_device kirkwood_xor11_channel = {
600 }, 645 },
601}; 646};
602 647
603void __init kirkwood_xor1_init(void) 648static void __init kirkwood_xor1_init(void)
604{ 649{
605 platform_device_register(&kirkwood_xor1_shared); 650 platform_device_register(&kirkwood_xor1_shared);
606 651
@@ -708,4 +753,9 @@ void __init kirkwood_init(void)
708#ifdef CONFIG_CACHE_FEROCEON_L2 753#ifdef CONFIG_CACHE_FEROCEON_L2
709 kirkwood_l2_init(); 754 kirkwood_l2_init();
710#endif 755#endif
756
757 /* internal devices that every board has */
758 kirkwood_rtc_init();
759 kirkwood_xor0_init();
760 kirkwood_xor1_init();
711} 761}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index fe367c18e722..9e5282684d58 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -14,6 +14,7 @@
14struct dsa_platform_data; 14struct dsa_platform_data;
15struct mv643xx_eth_platform_data; 15struct mv643xx_eth_platform_data;
16struct mv_sata_platform_data; 16struct mv_sata_platform_data;
17struct mvsdio_platform_data;
17 18
18/* 19/*
19 * Basic Kirkwood init functions used early by machine-setup. 20 * Basic Kirkwood init functions used early by machine-setup.
@@ -33,13 +34,11 @@ void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
33void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data); 34void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data);
34void kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq); 35void kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq);
35void kirkwood_pcie_init(void); 36void kirkwood_pcie_init(void);
36void kirkwood_rtc_init(void);
37void kirkwood_sata_init(struct mv_sata_platform_data *sata_data); 37void kirkwood_sata_init(struct mv_sata_platform_data *sata_data);
38void kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data);
38void kirkwood_spi_init(void); 39void kirkwood_spi_init(void);
39void kirkwood_uart0_init(void); 40void kirkwood_uart0_init(void);
40void kirkwood_uart1_init(void); 41void kirkwood_uart1_init(void);
41void kirkwood_xor0_init(void);
42void kirkwood_xor1_init(void);
43 42
44extern struct sys_timer kirkwood_timer; 43extern struct sys_timer kirkwood_timer;
45 44
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index a14c2948c62a..5505d5837752 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -11,18 +11,59 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mtd/nand.h> 14#include <linux/mtd/nand.h>
18#include <linux/timer.h> 15#include <linux/mtd/partitions.h>
19#include <linux/ata_platform.h> 16#include <linux/ata_platform.h>
20#include <linux/mv643xx_eth.h> 17#include <linux/mv643xx_eth.h>
21#include <asm/mach-types.h> 18#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 19#include <asm/mach/arch.h>
23#include <asm/mach/pci.h>
24#include <mach/kirkwood.h> 20#include <mach/kirkwood.h>
21#include <plat/orion_nand.h>
22#include <plat/mvsdio.h>
25#include "common.h" 23#include "common.h"
24#include "mpp.h"
25
26static struct mtd_partition db88f6281_nand_parts[] = {
27 {
28 .name = "u-boot",
29 .offset = 0,
30 .size = SZ_1M
31 }, {
32 .name = "uImage",
33 .offset = MTDPART_OFS_NXTBLK,
34 .size = SZ_4M
35 }, {
36 .name = "root",
37 .offset = MTDPART_OFS_NXTBLK,
38 .size = MTDPART_SIZ_FULL
39 },
40};
41
42static struct resource db88f6281_nand_resource = {
43 .flags = IORESOURCE_MEM,
44 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
45 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
46 KIRKWOOD_NAND_MEM_SIZE - 1,
47};
48
49static struct orion_nand_data db88f6281_nand_data = {
50 .parts = db88f6281_nand_parts,
51 .nr_parts = ARRAY_SIZE(db88f6281_nand_parts),
52 .cle = 0,
53 .ale = 1,
54 .width = 8,
55 .chip_delay = 25,
56};
57
58static struct platform_device db88f6281_nand_flash = {
59 .name = "orion_nand",
60 .id = -1,
61 .dev = {
62 .platform_data = &db88f6281_nand_data,
63 },
64 .resource = &db88f6281_nand_resource,
65 .num_resources = 1,
66};
26 67
27static struct mv643xx_eth_platform_data db88f6281_ge00_data = { 68static struct mv643xx_eth_platform_data db88f6281_ge00_data = {
28 .phy_addr = MV643XX_ETH_PHY_ADDR(8), 69 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
@@ -32,18 +73,32 @@ static struct mv_sata_platform_data db88f6281_sata_data = {
32 .n_ports = 2, 73 .n_ports = 2,
33}; 74};
34 75
76static struct mvsdio_platform_data db88f6281_mvsdio_data = {
77 .gpio_write_protect = 37,
78 .gpio_card_detect = 38,
79};
80
81static unsigned int db88f6281_mpp_config[] __initdata = {
82 MPP37_GPIO,
83 MPP38_GPIO,
84 0
85};
86
35static void __init db88f6281_init(void) 87static void __init db88f6281_init(void)
36{ 88{
37 /* 89 /*
38 * Basic setup. Needs to be called early. 90 * Basic setup. Needs to be called early.
39 */ 91 */
40 kirkwood_init(); 92 kirkwood_init();
93 kirkwood_mpp_conf(db88f6281_mpp_config);
41 94
42 kirkwood_ehci_init(); 95 kirkwood_ehci_init();
43 kirkwood_ge00_init(&db88f6281_ge00_data); 96 kirkwood_ge00_init(&db88f6281_ge00_data);
44 kirkwood_rtc_init();
45 kirkwood_sata_init(&db88f6281_sata_data); 97 kirkwood_sata_init(&db88f6281_sata_data);
46 kirkwood_uart0_init(); 98 kirkwood_uart0_init();
99 kirkwood_sdio_init(&db88f6281_mvsdio_data);
100
101 platform_device_register(&db88f6281_nand_flash);
47} 102}
48 103
49static int __init db88f6281_pci_init(void) 104static int __init db88f6281_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index ada480c0e197..d3db30fe763b 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -116,5 +116,7 @@
116 116
117#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000) 117#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
118 118
119#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
120
119 121
120#endif 122#endif
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
new file mode 100644
index 000000000000..63c44934391a
--- /dev/null
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -0,0 +1,97 @@
1/*
2 * arch/arm/mach-kirkwood/mpp.c
3 *
4 * MPP functions for Marvell Kirkwood SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/mbus.h>
14#include <linux/io.h>
15#include <asm/gpio.h>
16#include <mach/hardware.h>
17#include "common.h"
18#include "mpp.h"
19
20static unsigned int __init kirkwood_variant(void)
21{
22 u32 dev, rev;
23
24 kirkwood_pcie_id(&dev, &rev);
25
26 if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0)
27 return MPP_F6281_MASK;
28 if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0)
29 return MPP_F6192_MASK;
30 if (dev == MV88F6180_DEV_ID)
31 return MPP_F6180_MASK;
32
33 printk(KERN_ERR "MPP setup: unknown kirkwood variant "
34 "(dev %#x rev %#x)\n", dev, rev);
35 return 0;
36}
37
38#define MPP_CTRL(i) (DEV_BUS_VIRT_BASE + (i) * 4)
39#define MPP_NR_REGS (1 + MPP_MAX/8)
40
41void __init kirkwood_mpp_conf(unsigned int *mpp_list)
42{
43 u32 mpp_ctrl[MPP_NR_REGS];
44 unsigned int variant_mask;
45 int i;
46
47 variant_mask = kirkwood_variant();
48 if (!variant_mask)
49 return;
50
51 printk(KERN_DEBUG "initial MPP regs:");
52 for (i = 0; i < MPP_NR_REGS; i++) {
53 mpp_ctrl[i] = readl(MPP_CTRL(i));
54 printk(" %08x", mpp_ctrl[i]);
55 }
56 printk("\n");
57
58 while (*mpp_list) {
59 unsigned int num = MPP_NUM(*mpp_list);
60 unsigned int sel = MPP_SEL(*mpp_list);
61 int shift, gpio_mode;
62
63 if (num > MPP_MAX) {
64 printk(KERN_ERR "kirkwood_mpp_conf: invalid MPP "
65 "number (%u)\n", num);
66 continue;
67 }
68 if (!(*mpp_list & variant_mask)) {
69 printk(KERN_WARNING
70 "kirkwood_mpp_conf: requested MPP%u config "
71 "unavailable on this hardware\n", num);
72 continue;
73 }
74
75 shift = (num & 7) << 2;
76 mpp_ctrl[num / 8] &= ~(0xf << shift);
77 mpp_ctrl[num / 8] |= sel << shift;
78
79 gpio_mode = 0;
80 if (*mpp_list & MPP_INPUT_MASK)
81 gpio_mode |= GPIO_INPUT_OK;
82 if (*mpp_list & MPP_OUTPUT_MASK)
83 gpio_mode |= GPIO_OUTPUT_OK;
84 if (sel != 0)
85 gpio_mode = 0;
86 orion_gpio_set_valid(num, gpio_mode);
87
88 mpp_list++;
89 }
90
91 printk(KERN_DEBUG " final MPP regs:");
92 for (i = 0; i < MPP_NR_REGS; i++) {
93 writel(mpp_ctrl[i], MPP_CTRL(i));
94 printk(" %08x", mpp_ctrl[i]);
95 }
96 printk("\n");
97}
diff --git a/arch/arm/mach-kirkwood/mpp.h b/arch/arm/mach-kirkwood/mpp.h
new file mode 100644
index 000000000000..45cccb743107
--- /dev/null
+++ b/arch/arm/mach-kirkwood/mpp.h
@@ -0,0 +1,303 @@
1/*
2 * linux/arch/arm/mach-kirkwood/mpp.h -- Multi Purpose Pins
3 *
4 * Copyright 2009: Marvell Technology Group Ltd.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __KIRKWOOD_MPP_H
12#define __KIRKWOOD_MPP_H
13
14#define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \
15 /* MPP number */ ((_num) & 0xff) | \
16 /* MPP select value */ (((_sel) & 0xf) << 8) | \
17 /* may be input signal */ ((!!(_in)) << 12) | \
18 /* may be output signal */ ((!!(_out)) << 13) | \
19 /* available on F6180 */ ((!!(_F6180)) << 14) | \
20 /* available on F6190 */ ((!!(_F6190)) << 15) | \
21 /* available on F6192 */ ((!!(_F6192)) << 16) | \
22 /* available on F6281 */ ((!!(_F6281)) << 17))
23
24#define MPP_NUM(x) ((x) & 0xff)
25#define MPP_SEL(x) (((x) >> 8) & 0xf)
26
27 /* num sel i o 6180 6190 6192 6281 */
28
29#define MPP_INPUT_MASK MPP( 0, 0x0, 1, 0, 0, 0, 0, 0 )
30#define MPP_OUTPUT_MASK MPP( 0, 0x0, 0, 1, 0, 0, 0, 0 )
31
32#define MPP_F6180_MASK MPP( 0, 0x0, 0, 0, 1, 0, 0, 0 )
33#define MPP_F6190_MASK MPP( 0, 0x0, 0, 0, 0, 1, 0, 0 )
34#define MPP_F6192_MASK MPP( 0, 0x0, 0, 0, 0, 0, 1, 0 )
35#define MPP_F6281_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 1 )
36
37#define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1 )
38#define MPP0_NF_IO2 MPP( 0, 0x1, 1, 1, 1, 1, 1, 1 )
39#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 1, 1, 1, 1, 1 )
40
41#define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1 )
42#define MPP1_NF_IO3 MPP( 1, 0x1, 1, 1, 1, 1, 1, 1 )
43#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 1, 1, 1, 1, 1 )
44
45#define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1 )
46#define MPP2_NF_IO4 MPP( 2, 0x1, 1, 1, 1, 1, 1, 1 )
47#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 1, 1, 1, 1, 1 )
48
49#define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1 )
50#define MPP3_NF_IO5 MPP( 3, 0x1, 1, 1, 1, 1, 1, 1 )
51#define MPP3_SPI_MISO MPP( 3, 0x2, 1, 0, 1, 1, 1, 1 )
52
53#define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1 )
54#define MPP4_NF_IO6 MPP( 4, 0x1, 1, 1, 1, 1, 1, 1 )
55#define MPP4_UART0_RXD MPP( 4, 0x2, 1, 0, 1, 1, 1, 1 )
56#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 1, 0, 0, 1, 1 )
57#define MPP4_PTP_CLK MPP( 4, 0xd, 1, 0, 1, 1, 1, 1 )
58
59#define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1 )
60#define MPP5_NF_IO7 MPP( 5, 0x1, 1, 1, 1, 1, 1, 1 )
61#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 1, 1, 1, 1, 1 )
62#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 1, 1, 1, 1, 1 )
63#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 1, 0, 1, 1, 1 )
64
65#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 1, 1, 1, 1, 1 )
66#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 1, 1, 1, 1, 1 )
67#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 1, 1, 1, 1, 1 )
68
69#define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1 )
70#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 1, 1, 1, 1, 1 )
71#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 1, 1, 1, 1, 1 )
72#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 1, 1, 1, 1, 1 )
73
74#define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1 )
75#define MPP8_TW_SDA MPP( 8, 0x1, 1, 1, 1, 1, 1, 1 )
76#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 1, 1, 1, 1, 1 )
77#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 1, 1, 1, 1, 1 )
78#define MPP8_MII0_RXERR MPP( 8, 0x4, 1, 0, 0, 1, 1, 1 )
79#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 1, 0, 0, 1, 1 )
80#define MPP8_PTP_CLK MPP( 8, 0xc, 1, 0, 1, 1, 1, 1 )
81#define MPP8_MII0_COL MPP( 8, 0xd, 1, 0, 1, 1, 1, 1 )
82
83#define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1 )
84#define MPP9_TW_SCK MPP( 9, 0x1, 1, 1, 1, 1, 1, 1 )
85#define MPP9_UART0_CTS MPP( 9, 0x2, 1, 0, 1, 1, 1, 1 )
86#define MPP9_UART1_CTS MPP( 9, 0x3, 1, 0, 1, 1, 1, 1 )
87#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 1, 0, 1, 1, 1 )
88#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 1, 0, 1, 1, 1, 1 )
89#define MPP9_MII0_CRS MPP( 9, 0xd, 1, 0, 1, 1, 1, 1 )
90
91#define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1 )
92#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 1, 1, 1, 1, 1 )
93#define MPP10_UArt0_TXD MPP( 10, 0X3, 0, 1, 1, 1, 1, 1 )
94#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 1, 0, 0, 1, 1 )
95#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 1, 1, 1, 1, 1 )
96
97#define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1 )
98#define MPP11_SPI_MISO MPP( 11, 0x2, 1, 0, 1, 1, 1, 1 )
99#define MPP11_UArt0_RXD MPP( 11, 0x3, 1, 0, 1, 1, 1, 1 )
100#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 1, 0, 1, 1, 1, 1 )
101#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 1, 1, 1, 1, 1 )
102#define MPP11_PTP_CLK MPP( 11, 0xd, 1, 0, 1, 1, 1, 1 )
103#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1 )
104
105#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1 )
106#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1 )
107
108#define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1 )
109#define MPP13_SD_CMD MPP( 13, 0x1, 1, 1, 1, 1, 1, 1 )
110#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 1, 1, 1, 1, 1 )
111
112#define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1 )
113#define MPP14_SD_D0 MPP( 14, 0x1, 1, 1, 1, 1, 1, 1 )
114#define MPP14_UART1_RXD MPP( 14, 0x3, 1, 0, 1, 1, 1, 1 )
115#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 1, 0, 0, 1, 1 )
116#define MPP14_MII0_COL MPP( 14, 0xd, 1, 0, 1, 1, 1, 1 )
117
118#define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1 )
119#define MPP15_SD_D1 MPP( 15, 0x1, 1, 1, 1, 1, 1, 1 )
120#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 1, 1, 1, 1, 1 )
121#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 1, 1, 1, 1, 1 )
122#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 1, 0, 1, 1, 1 )
123
124#define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1 )
125#define MPP16_SD_D2 MPP( 16, 0x1, 1, 1, 1, 1, 1, 1 )
126#define MPP16_UART0_CTS MPP( 16, 0x2, 1, 0, 1, 1, 1, 1 )
127#define MPP16_UART1_RXD MPP( 16, 0x3, 1, 0, 1, 1, 1, 1 )
128#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 1, 0, 0, 1, 1 )
129#define MPP16_MII0_CRS MPP( 16, 0xd, 1, 0, 1, 1, 1, 1 )
130
131#define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1 )
132#define MPP17_SD_D3 MPP( 17, 0x1, 1, 1, 1, 1, 1, 1 )
133#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 1, 0, 1, 1, 1 )
134
135#define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1 )
136#define MPP18_NF_IO0 MPP( 18, 0x1, 1, 1, 1, 1, 1, 1 )
137
138#define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1 )
139#define MPP19_NF_IO1 MPP( 19, 0x1, 1, 1, 1, 1, 1, 1 )
140
141#define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1 )
142#define MPP20_TSMP0 MPP( 20, 0x1, 1, 1, 0, 0, 1, 1 )
143#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 1, 0, 0, 1, 1 )
144#define MPP20_GE1_0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1 )
145#define MPP20_AUDIO_SPDIFI MPP( 20, 0x4, 1, 0, 0, 0, 1, 1 )
146#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 1, 0, 0, 1, 1 )
147
148#define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1 )
149#define MPP21_TSMP1 MPP( 21, 0x1, 1, 1, 0, 0, 1, 1 )
150#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 1, 0, 0, 1, 1 )
151#define MPP21_GE1_1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1 )
152#define MPP21_AUDIO_SPDIFO MPP( 21, 0x4, 0, 1, 0, 0, 1, 1 )
153#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 1, 0, 1, 1, 1 )
154
155#define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1 )
156#define MPP22_TSMP2 MPP( 22, 0x1, 1, 1, 0, 0, 1, 1 )
157#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 1, 0, 0, 1, 1 )
158#define MPP22_GE1_2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1 )
159#define MPP22_AUDIO_SPDIFRMKCLK MPP( 22, 0x4, 0, 1, 0, 0, 1, 1 )
160#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 1, 0, 0, 1, 1 )
161
162#define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1 )
163#define MPP23_TSMP3 MPP( 23, 0x1, 1, 1, 0, 0, 1, 1 )
164#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 1, 0, 0, 0, 1, 1 )
165#define MPP23_GE1_3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1 )
166#define MPP23_AUDIO_I2SBCLK MPP( 23, 0x4, 0, 1, 0, 0, 1, 1 )
167#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 1, 0, 1, 1, 1 )
168
169#define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1 )
170#define MPP24_TSMP4 MPP( 24, 0x1, 1, 1, 0, 0, 1, 1 )
171#define MPP24_TDM_SPI_CS0 DEV( 24, 0x2, 0, 1, 0, 0, 1, 1 )
172#define MPP24_GE1_4 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1 )
173#define MPP24_AUDIO_I2SDO MPP( 24, 0x4, 0, 1, 0, 0, 1, 1 )
174
175#define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1 )
176#define MPP25_TSMP5 MPP( 25, 0x1, 1, 1, 0, 0, 1, 1 )
177#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 1, 0, 0, 1, 1 )
178#define MPP25_GE1_5 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1 )
179#define MPP25_AUDIO_I2SLRCLK MPP( 25, 0x4, 0, 1, 0, 0, 1, 1 )
180
181#define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1 )
182#define MPP26_TSMP6 MPP( 26, 0x1, 1, 1, 0, 0, 1, 1 )
183#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 1, 0, 0, 0, 1, 1 )
184#define MPP26_GE1_6 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1 )
185#define MPP26_AUDIO_I2SMCLK MPP( 26, 0x4, 0, 1, 0, 0, 1, 1 )
186
187#define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1 )
188#define MPP27_TSMP7 MPP( 27, 0x1, 1, 1, 0, 0, 1, 1 )
189#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 1, 0, 0, 1, 1 )
190#define MPP27_GE1_7 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1 )
191#define MPP27_AUDIO_I2SDI MPP( 27, 0x4, 1, 0, 0, 0, 1, 1 )
192
193#define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1 )
194#define MPP28_TSMP8 MPP( 28, 0x1, 1, 1, 0, 0, 1, 1 )
195#define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1 )
196#define MPP28_GE1_8 MPP( 28, 0x3, 0, 0, 0, 1, 1, 1 )
197#define MPP28_AUDIO_EXTCLK MPP( 28, 0x4, 1, 0, 0, 0, 1, 1 )
198
199#define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1 )
200#define MPP29_TSMP9 MPP( 29, 0x1, 1, 1, 0, 0, 1, 1 )
201#define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1 )
202#define MPP29_GE1_9 MPP( 29, 0x3, 0, 0, 0, 1, 1, 1 )
203
204#define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1 )
205#define MPP30_TSMP10 MPP( 30, 0x1, 1, 1, 0, 0, 1, 1 )
206#define MPP30_TDM_PCLK MPP( 30, 0x2, 1, 1, 0, 0, 1, 1 )
207#define MPP30_GE1_10 MPP( 30, 0x3, 0, 0, 0, 1, 1, 1 )
208
209#define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1 )
210#define MPP31_TSMP11 MPP( 31, 0x1, 1, 1, 0, 0, 1, 1 )
211#define MPP31_TDM_FS MPP( 31, 0x2, 1, 1, 0, 0, 1, 1 )
212#define MPP31_GE1_11 MPP( 31, 0x3, 0, 0, 0, 1, 1, 1 )
213
214#define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1 )
215#define MPP32_TSMP12 MPP( 32, 0x1, 1, 1, 0, 0, 1, 1 )
216#define MPP32_TDM_DRX MPP( 32, 0x2, 1, 0, 0, 0, 1, 1 )
217#define MPP32_GE1_12 MPP( 32, 0x3, 0, 0, 0, 1, 1, 1 )
218
219#define MPP33_GPIO MPP( 33, 0x0, 1, 1, 0, 1, 1, 1 )
220#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 1, 0, 0, 1, 1 )
221#define MPP33_GE1_13 MPP( 33, 0x3, 0, 0, 0, 1, 1, 1 )
222
223#define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1 )
224#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 1, 0, 0, 1, 1 )
225#define MPP34_GE1_14 MPP( 34, 0x3, 0, 0, 0, 1, 1, 1 )
226
227#define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1 )
228#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 1, 0, 0, 1, 1 )
229#define MPP35_GE1_15 MPP( 35, 0x3, 0, 0, 0, 1, 1, 1 )
230#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 1, 0, 1, 1, 1 )
231#define MPP35_MII0_RXERR MPP( 35, 0xc, 1, 0, 1, 1, 1, 1 )
232
233#define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1 )
234#define MPP36_TSMP0 MPP( 36, 0x1, 1, 1, 0, 0, 0, 1 )
235#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 1, 0, 0, 0, 1 )
236#define MPP36_AUDIO_SPDIFI MPP( 36, 0x4, 1, 0, 1, 0, 0, 1 )
237
238#define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1 )
239#define MPP37_TSMP1 MPP( 37, 0x1, 1, 1, 0, 0, 0, 1 )
240#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 1, 0, 0, 0, 1 )
241#define MPP37_AUDIO_SPDIFO MPP( 37, 0x4, 0, 1, 1, 0, 0, 1 )
242
243#define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1 )
244#define MPP38_TSMP2 MPP( 38, 0x1, 1, 1, 0, 0, 0, 1 )
245#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 1, 0, 0, 0, 1 )
246#define MPP38_AUDIO_SPDIFRMLCLK MPP( 38, 0x4, 0, 1, 1, 0, 0, 1 )
247
248#define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1 )
249#define MPP39_TSMP3 MPP( 39, 0x1, 1, 1, 0, 0, 0, 1 )
250#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 1, 0, 0, 0, 1 )
251#define MPP39_AUDIO_I2SBCLK MPP( 39, 0x4, 0, 1, 1, 0, 0, 1 )
252
253#define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1 )
254#define MPP40_TSMP4 MPP( 40, 0x1, 1, 1, 0, 0, 0, 1 )
255#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 1, 0, 0, 0, 1 )
256#define MPP40_AUDIO_I2SDO MPP( 40, 0x4, 0, 1, 1, 0, 0, 1 )
257
258#define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1 )
259#define MPP41_TSMP5 MPP( 41, 0x1, 1, 1, 0, 0, 0, 1 )
260#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 1, 0, 0, 0, 0, 1 )
261#define MPP41_AUDIO_I2SLRC MPP( 41, 0x4, 0, 1, 1, 0, 0, 1 )
262
263#define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1 )
264#define MPP42_TSMP6 MPP( 42, 0x1, 1, 1, 0, 0, 0, 1 )
265#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 1, 0, 0, 0, 1 )
266#define MPP42_AUDIO_I2SMCLK MPP( 42, 0x4, 0, 1, 1, 0, 0, 1 )
267
268#define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1 )
269#define MPP43_TSMP7 MPP( 43, 0x1, 1, 1, 0, 0, 0, 1 )
270#define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1 )
271#define MPP43_AUDIO_I2SDI MPP( 43, 0x4, 1, 0, 1, 0, 0, 1 )
272
273#define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1 )
274#define MPP44_TSMP8 MPP( 44, 0x1, 1, 1, 0, 0, 0, 1 )
275#define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1 )
276#define MPP44_AUDIO_EXTCLK MPP( 44, 0x4, 1, 0, 1, 0, 0, 1 )
277
278#define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1 )
279#define MPP45_TSMP9 MPP( 45, 0x1, 1, 1, 0, 0, 0, 1 )
280#define MPP45_TDM_PCLK MPP( 45, 0x2, 1, 1, 0, 0, 0, 1 )
281
282#define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1 )
283#define MPP46_TSMP10 MPP( 46, 0x1, 1, 1, 0, 0, 0, 1 )
284#define MPP46_TDM_FS MPP( 46, 0x2, 1, 1, 0, 0, 0, 1 )
285
286#define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1 )
287#define MPP47_TSMP11 MPP( 47, 0x1, 1, 1, 0, 0, 0, 1 )
288#define MPP47_TDM_DRX MPP( 47, 0x2, 1, 0, 0, 0, 0, 1 )
289
290#define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1 )
291#define MPP48_TSMP12 MPP( 48, 0x1, 1, 1, 0, 0, 0, 1 )
292#define MPP48_TDM_DTX MPP( 48. 0x2, 0, 1, 0, 0, 0, 1 )
293
294#define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1 )
295#define MPP49_TSMP9 MPP( 49, 0x1, 1, 1, 0, 0, 0, 1 )
296#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 1, 0, 0, 0, 1 )
297#define MPP49_PTP_CLK MPP( 49, 0x5, 1, 0, 0, 0, 0, 1 )
298
299#define MPP_MAX 49
300
301void kirkwood_mpp_conf(unsigned int *mpp_list);
302
303#endif
diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
index b1d1a87a6821..2f0e4ef3db0f 100644
--- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
@@ -11,11 +11,8 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mtd/nand.h> 14#include <linux/mtd/nand.h>
18#include <linux/timer.h> 15#include <linux/mtd/partitions.h>
19#include <linux/ata_platform.h> 16#include <linux/ata_platform.h>
20#include <linux/mv643xx_eth.h> 17#include <linux/mv643xx_eth.h>
21#include <linux/spi/flash.h> 18#include <linux/spi/flash.h>
@@ -23,7 +20,6 @@
23#include <linux/spi/orion_spi.h> 20#include <linux/spi/orion_spi.h>
24#include <asm/mach-types.h> 21#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
26#include <asm/mach/pci.h>
27#include <mach/kirkwood.h> 23#include <mach/kirkwood.h>
28#include "common.h" 24#include "common.h"
29 25
@@ -61,14 +57,11 @@ static void __init rd88f6192_init(void)
61 57
62 kirkwood_ehci_init(); 58 kirkwood_ehci_init();
63 kirkwood_ge00_init(&rd88f6192_ge00_data); 59 kirkwood_ge00_init(&rd88f6192_ge00_data);
64 kirkwood_rtc_init();
65 kirkwood_sata_init(&rd88f6192_sata_data); 60 kirkwood_sata_init(&rd88f6192_sata_data);
66 spi_register_board_info(rd88F6192_spi_slave_info, 61 spi_register_board_info(rd88F6192_spi_slave_info,
67 ARRAY_SIZE(rd88F6192_spi_slave_info)); 62 ARRAY_SIZE(rd88F6192_spi_slave_info));
68 kirkwood_spi_init(); 63 kirkwood_spi_init();
69 kirkwood_uart0_init(); 64 kirkwood_uart0_init();
70 kirkwood_xor0_init();
71 kirkwood_xor1_init();
72} 65}
73 66
74static int __init rd88f6192_pci_init(void) 67static int __init rd88f6192_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 9a0e905d10cd..c3deea5e3cad 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -11,21 +11,20 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h> 14#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mtd/nand.h> 15#include <linux/mtd/nand.h>
18#include <linux/timer.h> 16#include <linux/mtd/partitions.h>
19#include <linux/ata_platform.h> 17#include <linux/ata_platform.h>
20#include <linux/mv643xx_eth.h> 18#include <linux/mv643xx_eth.h>
21#include <linux/ethtool.h> 19#include <linux/ethtool.h>
22#include <net/dsa.h> 20#include <net/dsa.h>
23#include <asm/mach-types.h> 21#include <asm/mach-types.h>
24#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
25#include <asm/mach/pci.h>
26#include <mach/kirkwood.h> 23#include <mach/kirkwood.h>
24#include <plat/mvsdio.h>
27#include <plat/orion_nand.h> 25#include <plat/orion_nand.h>
28#include "common.h" 26#include "common.h"
27#include "mpp.h"
29 28
30static struct mtd_partition rd88f6281_nand_parts[] = { 29static struct mtd_partition rd88f6281_nand_parts[] = {
31 { 30 {
@@ -91,6 +90,15 @@ static struct mv_sata_platform_data rd88f6281_sata_data = {
91 .n_ports = 2, 90 .n_ports = 2,
92}; 91};
93 92
93static struct mvsdio_platform_data rd88f6281_mvsdio_data = {
94 .gpio_card_detect = 28,
95};
96
97static unsigned int rd88f6281_mpp_config[] __initdata = {
98 MPP28_GPIO,
99 0
100};
101
94static void __init rd88f6281_init(void) 102static void __init rd88f6281_init(void)
95{ 103{
96 u32 dev, rev; 104 u32 dev, rev;
@@ -99,6 +107,7 @@ static void __init rd88f6281_init(void)
99 * Basic setup. Needs to be called early. 107 * Basic setup. Needs to be called early.
100 */ 108 */
101 kirkwood_init(); 109 kirkwood_init();
110 kirkwood_mpp_conf(rd88f6281_mpp_config);
102 111
103 kirkwood_ehci_init(); 112 kirkwood_ehci_init();
104 113
@@ -112,8 +121,8 @@ static void __init rd88f6281_init(void)
112 } 121 }
113 kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ); 122 kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ);
114 123
115 kirkwood_rtc_init();
116 kirkwood_sata_init(&rd88f6281_sata_data); 124 kirkwood_sata_init(&rd88f6281_sata_data);
125 kirkwood_sdio_init(&rd88f6281_mvsdio_data);
117 kirkwood_uart0_init(); 126 kirkwood_uart0_init();
118 127
119 platform_device_register(&rd88f6281_nand_flash); 128 platform_device_register(&rd88f6281_nand_flash);
diff --git a/arch/arm/mach-kirkwood/sheevaplug-setup.c b/arch/arm/mach-kirkwood/sheevaplug-setup.c
new file mode 100644
index 000000000000..831e4a56cae1
--- /dev/null
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -0,0 +1,136 @@
1/*
2 * arch/arm/mach-kirkwood/sheevaplug-setup.c
3 *
4 * Marvell SheevaPlug Reference Board Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/nand.h>
15#include <linux/mtd/partitions.h>
16#include <linux/mv643xx_eth.h>
17#include <linux/gpio.h>
18#include <linux/leds.h>
19#include <asm/mach-types.h>
20#include <asm/mach/arch.h>
21#include <mach/kirkwood.h>
22#include <plat/mvsdio.h>
23#include <plat/orion_nand.h>
24#include "common.h"
25#include "mpp.h"
26
27static struct mtd_partition sheevaplug_nand_parts[] = {
28 {
29 .name = "u-boot",
30 .offset = 0,
31 .size = SZ_1M
32 }, {
33 .name = "uImage",
34 .offset = MTDPART_OFS_NXTBLK,
35 .size = SZ_4M
36 }, {
37 .name = "root",
38 .offset = MTDPART_OFS_NXTBLK,
39 .size = MTDPART_SIZ_FULL
40 },
41};
42
43static struct resource sheevaplug_nand_resource = {
44 .flags = IORESOURCE_MEM,
45 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
46 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
47 KIRKWOOD_NAND_MEM_SIZE - 1,
48};
49
50static struct orion_nand_data sheevaplug_nand_data = {
51 .parts = sheevaplug_nand_parts,
52 .nr_parts = ARRAY_SIZE(sheevaplug_nand_parts),
53 .cle = 0,
54 .ale = 1,
55 .width = 8,
56 .chip_delay = 25,
57};
58
59static struct platform_device sheevaplug_nand_flash = {
60 .name = "orion_nand",
61 .id = -1,
62 .dev = {
63 .platform_data = &sheevaplug_nand_data,
64 },
65 .resource = &sheevaplug_nand_resource,
66 .num_resources = 1,
67};
68
69static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
70 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
71};
72
73static struct mvsdio_platform_data sheevaplug_mvsdio_data = {
74 // unfortunately the CD signal has not been connected */
75};
76
77static struct gpio_led sheevaplug_led_pins[] = {
78 {
79 .name = "plug:green:health",
80 .default_trigger = "default-on",
81 .gpio = 49,
82 .active_low = 1,
83 },
84};
85
86static struct gpio_led_platform_data sheevaplug_led_data = {
87 .leds = sheevaplug_led_pins,
88 .num_leds = ARRAY_SIZE(sheevaplug_led_pins),
89};
90
91static struct platform_device sheevaplug_leds = {
92 .name = "leds-gpio",
93 .id = -1,
94 .dev = {
95 .platform_data = &sheevaplug_led_data,
96 }
97};
98
99static unsigned int sheevaplug_mpp_config[] __initdata = {
100 MPP29_GPIO, /* USB Power Enable */
101 MPP49_GPIO, /* LED */
102 0
103};
104
105static void __init sheevaplug_init(void)
106{
107 /*
108 * Basic setup. Needs to be called early.
109 */
110 kirkwood_init();
111 kirkwood_mpp_conf(sheevaplug_mpp_config);
112
113 kirkwood_uart0_init();
114
115 if (gpio_request(29, "USB Power Enable") != 0 ||
116 gpio_direction_output(29, 1) != 0)
117 printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n");
118 kirkwood_ehci_init();
119
120 kirkwood_ge00_init(&sheevaplug_ge00_data);
121 kirkwood_sdio_init(&sheevaplug_mvsdio_data);
122
123 platform_device_register(&sheevaplug_nand_flash);
124 platform_device_register(&sheevaplug_leds);
125}
126
127MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
128 /* Maintainer: shadi Ammouri <shadi@marvell.com> */
129 .phys_io = KIRKWOOD_REGS_PHYS_BASE,
130 .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc,
131 .boot_params = 0x00000100,
132 .init_machine = sheevaplug_init,
133 .map_io = kirkwood_map_io,
134 .init_irq = kirkwood_init_irq,
135 .timer = &kirkwood_timer,
136MACHINE_END
diff --git a/arch/arm/mach-mv78xx0/Kconfig b/arch/arm/mach-mv78xx0/Kconfig
index d83cb86837db..6fbe68fe4412 100644
--- a/arch/arm/mach-mv78xx0/Kconfig
+++ b/arch/arm/mach-mv78xx0/Kconfig
@@ -8,6 +8,12 @@ config MACH_DB78X00_BP
8 Say 'Y' here if you want your kernel to support the 8 Say 'Y' here if you want your kernel to support the
9 Marvell DB-78x00-BP Development Board. 9 Marvell DB-78x00-BP Development Board.
10 10
11config MACH_RD78X00_MASA
12 bool "Marvell RD-78x00-mASA Reference Design"
13 help
14 Say 'Y' here if you want your kernel to support the
15 Marvell RD-78x00-mASA Reference Design.
16
11endmenu 17endmenu
12 18
13endif 19endif
diff --git a/arch/arm/mach-mv78xx0/Makefile b/arch/arm/mach-mv78xx0/Makefile
index ec16c05c3b1b..da628b7f3bb6 100644
--- a/arch/arm/mach-mv78xx0/Makefile
+++ b/arch/arm/mach-mv78xx0/Makefile
@@ -1,2 +1,3 @@
1obj-y += common.o addr-map.o irq.o pcie.o 1obj-y += common.o addr-map.o irq.o pcie.o
2obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o 2obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o
3obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index b0e4e0d8f506..a575daaa62d1 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -14,7 +14,9 @@
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/mbus.h> 15#include <linux/mbus.h>
16#include <linux/mv643xx_eth.h> 16#include <linux/mv643xx_eth.h>
17#include <linux/mv643xx_i2c.h>
17#include <linux/ata_platform.h> 18#include <linux/ata_platform.h>
19#include <linux/ethtool.h>
18#include <asm/mach/map.h> 20#include <asm/mach/map.h>
19#include <asm/mach/time.h> 21#include <asm/mach/time.h>
20#include <mach/mv78xx0.h> 22#include <mach/mv78xx0.h>
@@ -430,9 +432,22 @@ static struct platform_device mv78xx0_ge10 = {
430 432
431void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) 433void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
432{ 434{
435 u32 dev, rev;
436
433 eth_data->shared = &mv78xx0_ge10_shared; 437 eth_data->shared = &mv78xx0_ge10_shared;
434 mv78xx0_ge10.dev.platform_data = eth_data; 438 mv78xx0_ge10.dev.platform_data = eth_data;
435 439
440 /*
441 * On the Z0, ge10 and ge11 are internally connected back
442 * to back, and not brought out.
443 */
444 mv78xx0_pcie_id(&dev, &rev);
445 if (dev == MV78X00_Z0_DEV_ID) {
446 eth_data->phy_addr = MV643XX_ETH_PHY_NONE;
447 eth_data->speed = SPEED_1000;
448 eth_data->duplex = DUPLEX_FULL;
449 }
450
436 platform_device_register(&mv78xx0_ge10_shared); 451 platform_device_register(&mv78xx0_ge10_shared);
437 platform_device_register(&mv78xx0_ge10); 452 platform_device_register(&mv78xx0_ge10);
438} 453}
@@ -484,13 +499,101 @@ static struct platform_device mv78xx0_ge11 = {
484 499
485void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data) 500void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
486{ 501{
502 u32 dev, rev;
503
487 eth_data->shared = &mv78xx0_ge11_shared; 504 eth_data->shared = &mv78xx0_ge11_shared;
488 mv78xx0_ge11.dev.platform_data = eth_data; 505 mv78xx0_ge11.dev.platform_data = eth_data;
489 506
507 /*
508 * On the Z0, ge10 and ge11 are internally connected back
509 * to back, and not brought out.
510 */
511 mv78xx0_pcie_id(&dev, &rev);
512 if (dev == MV78X00_Z0_DEV_ID) {
513 eth_data->phy_addr = MV643XX_ETH_PHY_NONE;
514 eth_data->speed = SPEED_1000;
515 eth_data->duplex = DUPLEX_FULL;
516 }
517
490 platform_device_register(&mv78xx0_ge11_shared); 518 platform_device_register(&mv78xx0_ge11_shared);
491 platform_device_register(&mv78xx0_ge11); 519 platform_device_register(&mv78xx0_ge11);
492} 520}
493 521
522/*****************************************************************************
523 * I2C bus 0
524 ****************************************************************************/
525
526static struct mv64xxx_i2c_pdata mv78xx0_i2c_0_pdata = {
527 .freq_m = 8, /* assumes 166 MHz TCLK */
528 .freq_n = 3,
529 .timeout = 1000, /* Default timeout of 1 second */
530};
531
532static struct resource mv78xx0_i2c_0_resources[] = {
533 {
534 .name = "i2c 0 base",
535 .start = I2C_0_PHYS_BASE,
536 .end = I2C_0_PHYS_BASE + 0x1f,
537 .flags = IORESOURCE_MEM,
538 }, {
539 .name = "i2c 0 irq",
540 .start = IRQ_MV78XX0_I2C_0,
541 .end = IRQ_MV78XX0_I2C_0,
542 .flags = IORESOURCE_IRQ,
543 },
544};
545
546
547static struct platform_device mv78xx0_i2c_0 = {
548 .name = MV64XXX_I2C_CTLR_NAME,
549 .id = 0,
550 .num_resources = ARRAY_SIZE(mv78xx0_i2c_0_resources),
551 .resource = mv78xx0_i2c_0_resources,
552 .dev = {
553 .platform_data = &mv78xx0_i2c_0_pdata,
554 },
555};
556
557/*****************************************************************************
558 * I2C bus 1
559 ****************************************************************************/
560
561static struct mv64xxx_i2c_pdata mv78xx0_i2c_1_pdata = {
562 .freq_m = 8, /* assumes 166 MHz TCLK */
563 .freq_n = 3,
564 .timeout = 1000, /* Default timeout of 1 second */
565};
566
567static struct resource mv78xx0_i2c_1_resources[] = {
568 {
569 .name = "i2c 1 base",
570 .start = I2C_1_PHYS_BASE,
571 .end = I2C_1_PHYS_BASE + 0x1f,
572 .flags = IORESOURCE_MEM,
573 }, {
574 .name = "i2c 1 irq",
575 .start = IRQ_MV78XX0_I2C_1,
576 .end = IRQ_MV78XX0_I2C_1,
577 .flags = IORESOURCE_IRQ,
578 },
579};
580
581
582static struct platform_device mv78xx0_i2c_1 = {
583 .name = MV64XXX_I2C_CTLR_NAME,
584 .id = 1,
585 .num_resources = ARRAY_SIZE(mv78xx0_i2c_1_resources),
586 .resource = mv78xx0_i2c_1_resources,
587 .dev = {
588 .platform_data = &mv78xx0_i2c_1_pdata,
589 },
590};
591
592void __init mv78xx0_i2c_init(void)
593{
594 platform_device_register(&mv78xx0_i2c_0);
595 platform_device_register(&mv78xx0_i2c_1);
596}
494 597
495/***************************************************************************** 598/*****************************************************************************
496 * SATA 599 * SATA
@@ -719,6 +822,32 @@ struct sys_timer mv78xx0_timer = {
719/***************************************************************************** 822/*****************************************************************************
720 * General 823 * General
721 ****************************************************************************/ 824 ****************************************************************************/
825static char * __init mv78xx0_id(void)
826{
827 u32 dev, rev;
828
829 mv78xx0_pcie_id(&dev, &rev);
830
831 if (dev == MV78X00_Z0_DEV_ID) {
832 if (rev == MV78X00_REV_Z0)
833 return "MV78X00-Z0";
834 else
835 return "MV78X00-Rev-Unsupported";
836 } else if (dev == MV78100_DEV_ID) {
837 if (rev == MV78100_REV_A0)
838 return "MV78100-A0";
839 else
840 return "MV78100-Rev-Unsupported";
841 } else if (dev == MV78200_DEV_ID) {
842 if (rev == MV78100_REV_A0)
843 return "MV78200-A0";
844 else
845 return "MV78200-Rev-Unsupported";
846 } else {
847 return "Device-Unknown";
848 }
849}
850
722static int __init is_l2_writethrough(void) 851static int __init is_l2_writethrough(void)
723{ 852{
724 return !!(readl(CPU_CONTROL) & L2_WRITETHROUGH); 853 return !!(readl(CPU_CONTROL) & L2_WRITETHROUGH);
@@ -737,7 +866,8 @@ void __init mv78xx0_init(void)
737 get_pclk_l2clk(hclk, core_index, &pclk, &l2clk); 866 get_pclk_l2clk(hclk, core_index, &pclk, &l2clk);
738 tclk = get_tclk(); 867 tclk = get_tclk();
739 868
740 printk(KERN_INFO "MV78xx0 core #%d, ", core_index); 869 printk(KERN_INFO "%s ", mv78xx0_id());
870 printk("core #%d, ", core_index);
741 printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000); 871 printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000);
742 printk("L2 = %dMHz, ", (l2clk + 499999) / 1000000); 872 printk("L2 = %dMHz, ", (l2clk + 499999) / 1000000);
743 printk("HCLK = %dMHz, ", (hclk + 499999) / 1000000); 873 printk("HCLK = %dMHz, ", (hclk + 499999) / 1000000);
diff --git a/arch/arm/mach-mv78xx0/common.h b/arch/arm/mach-mv78xx0/common.h
index 78af5de319dd..befc22475469 100644
--- a/arch/arm/mach-mv78xx0/common.h
+++ b/arch/arm/mach-mv78xx0/common.h
@@ -29,6 +29,8 @@ void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size,
29void mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size, 29void mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size,
30 int maj, int min); 30 int maj, int min);
31 31
32void mv78xx0_pcie_id(u32 *dev, u32 *rev);
33
32void mv78xx0_ehci0_init(void); 34void mv78xx0_ehci0_init(void);
33void mv78xx0_ehci1_init(void); 35void mv78xx0_ehci1_init(void);
34void mv78xx0_ehci2_init(void); 36void mv78xx0_ehci2_init(void);
@@ -42,6 +44,7 @@ void mv78xx0_uart0_init(void);
42void mv78xx0_uart1_init(void); 44void mv78xx0_uart1_init(void);
43void mv78xx0_uart2_init(void); 45void mv78xx0_uart2_init(void);
44void mv78xx0_uart3_init(void); 46void mv78xx0_uart3_init(void);
47void mv78xx0_i2c_init(void);
45 48
46extern struct sys_timer mv78xx0_timer; 49extern struct sys_timer mv78xx0_timer;
47 50
diff --git a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
index 2e285bbb7bbd..efdabe04c69e 100644
--- a/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
+++ b/arch/arm/mach-mv78xx0/db78x00-bp-setup.c
@@ -14,6 +14,7 @@
14#include <linux/ata_platform.h> 14#include <linux/ata_platform.h>
15#include <linux/mv643xx_eth.h> 15#include <linux/mv643xx_eth.h>
16#include <linux/ethtool.h> 16#include <linux/ethtool.h>
17#include <linux/i2c.h>
17#include <mach/mv78xx0.h> 18#include <mach/mv78xx0.h>
18#include <asm/mach-types.h> 19#include <asm/mach-types.h>
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
@@ -28,21 +29,22 @@ static struct mv643xx_eth_platform_data db78x00_ge01_data = {
28}; 29};
29 30
30static struct mv643xx_eth_platform_data db78x00_ge10_data = { 31static struct mv643xx_eth_platform_data db78x00_ge10_data = {
31 .phy_addr = MV643XX_ETH_PHY_NONE, 32 .phy_addr = MV643XX_ETH_PHY_ADDR(10),
32 .speed = SPEED_1000,
33 .duplex = DUPLEX_FULL,
34}; 33};
35 34
36static struct mv643xx_eth_platform_data db78x00_ge11_data = { 35static struct mv643xx_eth_platform_data db78x00_ge11_data = {
37 .phy_addr = MV643XX_ETH_PHY_NONE, 36 .phy_addr = MV643XX_ETH_PHY_ADDR(11),
38 .speed = SPEED_1000,
39 .duplex = DUPLEX_FULL,
40}; 37};
41 38
42static struct mv_sata_platform_data db78x00_sata_data = { 39static struct mv_sata_platform_data db78x00_sata_data = {
43 .n_ports = 2, 40 .n_ports = 2,
44}; 41};
45 42
43static struct i2c_board_info __initdata db78x00_i2c_rtc = {
44 I2C_BOARD_INFO("ds1338", 0x68),
45};
46
47
46static void __init db78x00_init(void) 48static void __init db78x00_init(void)
47{ 49{
48 /* 50 /*
@@ -64,6 +66,8 @@ static void __init db78x00_init(void)
64 mv78xx0_sata_init(&db78x00_sata_data); 66 mv78xx0_sata_init(&db78x00_sata_data);
65 mv78xx0_uart0_init(); 67 mv78xx0_uart0_init();
66 mv78xx0_uart2_init(); 68 mv78xx0_uart2_init();
69 mv78xx0_i2c_init();
70 i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
67 } else { 71 } else {
68 mv78xx0_uart1_init(); 72 mv78xx0_uart1_init();
69 mv78xx0_uart3_init(); 73 mv78xx0_uart3_init();
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index e930ea5330a2..582cffc733ad 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -80,6 +80,18 @@
80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
81 81
82/* 82/*
83 * Supported devices and revisions.
84 */
85#define MV78X00_Z0_DEV_ID 0x6381
86#define MV78X00_REV_Z0 1
87
88#define MV78100_DEV_ID 0x7810
89#define MV78100_REV_A0 1
90
91#define MV78200_DEV_ID 0x7820
92#define MV78200_REV_A0 1
93
94/*
83 * Register Map 95 * Register Map
84 */ 96 */
85#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000) 97#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000)
@@ -90,6 +102,8 @@
90#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000) 102#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000)
91#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030) 103#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030)
92#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034) 104#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034)
105#define I2C_0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000)
106#define I2C_1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1100)
93#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) 107#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000)
94#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) 108#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000)
95#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) 109#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100)
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index aad3a7a2f830..a560439dcc3c 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -33,6 +33,12 @@ static struct resource pcie_io_space;
33static struct resource pcie_mem_space; 33static struct resource pcie_mem_space;
34 34
35 35
36void __init mv78xx0_pcie_id(u32 *dev, u32 *rev)
37{
38 *dev = orion_pcie_dev_id((void __iomem *)PCIE00_VIRT_BASE);
39 *rev = orion_pcie_rev((void __iomem *)PCIE00_VIRT_BASE);
40}
41
36static void __init mv78xx0_pcie_preinit(void) 42static void __init mv78xx0_pcie_preinit(void)
37{ 43{
38 int i; 44 int i;
diff --git a/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
new file mode 100644
index 000000000000..e136b7a03355
--- /dev/null
+++ b/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c
@@ -0,0 +1,88 @@
1/*
2 * arch/arm/mach-mv78x00/rd78x00-masa-setup.c
3 *
4 * Marvell RD-78x00-mASA Development Board Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/ata_platform.h>
15#include <linux/mv643xx_eth.h>
16#include <linux/ethtool.h>
17#include <mach/mv78xx0.h>
18#include <asm/mach-types.h>
19#include <asm/mach/arch.h>
20#include "common.h"
21
22static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = {
23 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
24};
25
26static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = {
27 .phy_addr = MV643XX_ETH_PHY_ADDR(9),
28};
29
30static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = {
31};
32
33static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = {
34};
35
36static struct mv_sata_platform_data rd78x00_masa_sata_data = {
37 .n_ports = 2,
38};
39
40static void __init rd78x00_masa_init(void)
41{
42 /*
43 * Basic MV78x00 setup. Needs to be called early.
44 */
45 mv78xx0_init();
46
47 /*
48 * Partition on-chip peripherals between the two CPU cores.
49 */
50 if (mv78xx0_core_index() == 0) {
51 mv78xx0_ehci0_init();
52 mv78xx0_ehci1_init();
53 mv78xx0_ge00_init(&rd78x00_masa_ge00_data);
54 mv78xx0_ge10_init(&rd78x00_masa_ge10_data);
55 mv78xx0_sata_init(&rd78x00_masa_sata_data);
56 mv78xx0_uart0_init();
57 mv78xx0_uart2_init();
58 } else {
59 mv78xx0_ehci2_init();
60 mv78xx0_ge01_init(&rd78x00_masa_ge01_data);
61 mv78xx0_ge11_init(&rd78x00_masa_ge11_data);
62 mv78xx0_uart1_init();
63 mv78xx0_uart3_init();
64 }
65}
66
67static int __init rd78x00_pci_init(void)
68{
69 /*
70 * Assign all PCIe devices to CPU core #0.
71 */
72 if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0)
73 mv78xx0_pcie_init(1, 1);
74
75 return 0;
76}
77subsys_initcall(rd78x00_pci_init);
78
79MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board")
80 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
81 .phys_io = MV78XX0_REGS_PHYS_BASE,
82 .io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc,
83 .boot_params = 0x00000100,
84 .init_machine = rd78x00_masa_init,
85 .map_io = mv78xx0_map_io,
86 .init_irq = mv78xx0_init_irq,
87 .timer = &mv78xx0_timer,
88MACHINE_END
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mx1ads.c
index 89738fe576b1..7ae229bc1b79 100644
--- a/arch/arm/mach-mx1/mx1ads.c
+++ b/arch/arm/mach-mx1/mx1ads.c
@@ -23,6 +23,7 @@
23#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
24#include <asm/mach/time.h> 24#include <asm/mach/time.h>
25 25
26#include <mach/irqs.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
27#include <mach/common.h> 28#include <mach/common.h>
28#include <mach/imx-uart.h> 29#include <mach/imx-uart.h>
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index ad312ccf2ec5..b70b1e65034b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -178,7 +178,9 @@ static int __init omap3_beagle_i2c_init(void)
178#ifdef CONFIG_I2C2_OMAP_BEAGLE 178#ifdef CONFIG_I2C2_OMAP_BEAGLE
179 omap_register_i2c_bus(2, 400, NULL, 0); 179 omap_register_i2c_bus(2, 400, NULL, 0);
180#endif 180#endif
181 omap_register_i2c_bus(3, 400, NULL, 0); 181 /* Bus 3 is attached to the DVI port where devices like the pico DLP
182 * projector don't work reliably with 400kHz */
183 omap_register_i2c_bus(3, 100, NULL, 0);
182 return 0; 184 return 0;
183} 185}
184 186
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index f59a8d0e0824..2c7035d8dcbf 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -71,6 +71,7 @@ config MACH_WRT350N_V2
71 71
72config MACH_TS78XX 72config MACH_TS78XX
73 bool "Technologic Systems TS-78xx" 73 bool "Technologic Systems TS-78xx"
74 select PM
74 help 75 help
75 Say 'Y' here if you want your kernel to support the 76 Say 'Y' here if you want your kernel to support the
76 Technologic Systems TS-78xx platform. 77 Technologic Systems TS-78xx platform.
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 0a623379789f..8a0e49d84256 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -431,6 +431,10 @@ void __init orion5x_uart1_init(void)
431/***************************************************************************** 431/*****************************************************************************
432 * XOR engine 432 * XOR engine
433 ****************************************************************************/ 433 ****************************************************************************/
434struct mv_xor_platform_shared_data orion5x_xor_shared_data = {
435 .dram = &orion5x_mbus_dram_info,
436};
437
434static struct resource orion5x_xor_shared_resources[] = { 438static struct resource orion5x_xor_shared_resources[] = {
435 { 439 {
436 .name = "xor low", 440 .name = "xor low",
@@ -448,6 +452,9 @@ static struct resource orion5x_xor_shared_resources[] = {
448static struct platform_device orion5x_xor_shared = { 452static struct platform_device orion5x_xor_shared = {
449 .name = MV_XOR_SHARED_NAME, 453 .name = MV_XOR_SHARED_NAME,
450 .id = 0, 454 .id = 0,
455 .dev = {
456 .platform_data = &orion5x_xor_shared_data,
457 },
451 .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources), 458 .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
452 .resource = orion5x_xor_shared_resources, 459 .resource = orion5x_xor_shared_resources,
453}; 460};
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 0722d6510df1..b31ca4cef365 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -76,7 +76,7 @@ static int __init dns323_dev_id(void)
76 76
77static int __init dns323_pci_init(void) 77static int __init dns323_pci_init(void)
78{ 78{
79 /* The 5182 doesn't really use it's PCI bus, and initialising PCI 79 /* The 5182 doesn't really use its PCI bus, and initialising PCI
80 * gets in the way of initialising the SATA controller. 80 * gets in the way of initialising the SATA controller.
81 */ 81 */
82 if (machine_is_dns323() && dns323_dev_id() != MV88F5182_DEV_ID) 82 if (machine_is_dns323() && dns323_dev_id() != MV88F5182_DEV_ID)
@@ -418,7 +418,7 @@ static void __init dns323_init(void)
418 orion5x_i2c_init(); 418 orion5x_i2c_init();
419 orion5x_uart0_init(); 419 orion5x_uart0_init();
420 420
421 /* The 5182 has it's SATA controller on-chip, and needs it's own little 421 /* The 5182 has its SATA controller on-chip, and needs its own little
422 * init routine. 422 * init routine.
423 */ 423 */
424 if (dns323_dev_id() == MV88F5182_DEV_ID) 424 if (dns323_dev_id() == MV88F5182_DEV_ID)
diff --git a/arch/arm/mach-orion5x/ts78xx-fpga.h b/arch/arm/mach-orion5x/ts78xx-fpga.h
new file mode 100644
index 000000000000..0a314ddef658
--- /dev/null
+++ b/arch/arm/mach-orion5x/ts78xx-fpga.h
@@ -0,0 +1,29 @@
1#define FPGAID(_magic, _rev) ((_magic << 8) + _rev)
2
3/*
4 * get yer id's from http://ts78xx.digriz.org.uk/
5 * do *not* make up your own or 'borrow' any!
6 */
7enum fpga_ids {
8 /* Technologic Systems */
9 TS7800_REV_B2 = FPGAID(0x00b480, 0x02),
10 TS7800_REV_B3 = FPGAID(0x00b480, 0x03),
11};
12
13struct fpga_device {
14 unsigned present:1;
15 unsigned init:1;
16};
17
18struct fpga_devices {
19 /* Technologic Systems */
20 struct fpga_device ts_rtc;
21 struct fpga_device ts_nand;
22};
23
24struct ts78xx_fpga_data {
25 unsigned int id;
26 int state;
27
28 struct fpga_devices supports;
29};
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index 1368e9fd1a06..f5191ddea085 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -10,17 +10,20 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/sysfs.h>
13#include <linux/platform_device.h> 14#include <linux/platform_device.h>
14#include <linux/mtd/physmap.h>
15#include <linux/mv643xx_eth.h> 15#include <linux/mv643xx_eth.h>
16#include <linux/ata_platform.h> 16#include <linux/ata_platform.h>
17#include <linux/m48t86.h> 17#include <linux/m48t86.h>
18#include <linux/mtd/nand.h>
19#include <linux/mtd/partitions.h>
18#include <asm/mach-types.h> 20#include <asm/mach-types.h>
19#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
20#include <asm/mach/map.h> 22#include <asm/mach/map.h>
21#include <mach/orion5x.h> 23#include <mach/orion5x.h>
22#include "common.h" 24#include "common.h"
23#include "mpp.h" 25#include "mpp.h"
26#include "ts78xx-fpga.h"
24 27
25/***************************************************************************** 28/*****************************************************************************
26 * TS-78xx Info 29 * TS-78xx Info
@@ -33,18 +36,11 @@
33#define TS78XX_FPGA_REGS_VIRT_BASE 0xff900000 36#define TS78XX_FPGA_REGS_VIRT_BASE 0xff900000
34#define TS78XX_FPGA_REGS_SIZE SZ_1M 37#define TS78XX_FPGA_REGS_SIZE SZ_1M
35 38
36#define TS78XX_FPGA_REGS_SYSCON_ID (TS78XX_FPGA_REGS_VIRT_BASE | 0x000) 39static struct ts78xx_fpga_data ts78xx_fpga = {
37#define TS78XX_FPGA_REGS_SYSCON_LCDI (TS78XX_FPGA_REGS_VIRT_BASE | 0x004) 40 .id = 0,
38#define TS78XX_FPGA_REGS_SYSCON_LCDO (TS78XX_FPGA_REGS_VIRT_BASE | 0x008) 41 .state = 1,
39 42/* .supports = ... - populated by ts78xx_fpga_supports() */
40#define TS78XX_FPGA_REGS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808) 43};
41#define TS78XX_FPGA_REGS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c)
42
43/*
44 * 512kB NOR flash Device
45 */
46#define TS78XX_NOR_BOOT_BASE 0xff800000
47#define TS78XX_NOR_BOOT_SIZE SZ_512K
48 44
49/***************************************************************************** 45/*****************************************************************************
50 * I/O Address Mapping 46 * I/O Address Mapping
@@ -65,73 +61,47 @@ void __init ts78xx_map_io(void)
65} 61}
66 62
67/***************************************************************************** 63/*****************************************************************************
68 * 512kB NOR Boot Flash - the chip is a M25P40 64 * Ethernet
69 ****************************************************************************/ 65 ****************************************************************************/
70static struct mtd_partition ts78xx_nor_boot_flash_resources[] = { 66static struct mv643xx_eth_platform_data ts78xx_eth_data = {
71 { 67 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
72 .name = "ts-bootrom",
73 .offset = 0,
74 /* only the first 256kB is used */
75 .size = SZ_256K,
76 .mask_flags = MTD_WRITEABLE,
77 },
78};
79
80static struct physmap_flash_data ts78xx_nor_boot_flash_data = {
81 .width = 1,
82 .parts = ts78xx_nor_boot_flash_resources,
83 .nr_parts = ARRAY_SIZE(ts78xx_nor_boot_flash_resources),
84};
85
86static struct resource ts78xx_nor_boot_flash_resource = {
87 .flags = IORESOURCE_MEM,
88 .start = TS78XX_NOR_BOOT_BASE,
89 .end = TS78XX_NOR_BOOT_BASE + TS78XX_NOR_BOOT_SIZE - 1,
90};
91
92static struct platform_device ts78xx_nor_boot_flash = {
93 .name = "physmap-flash",
94 .id = -1,
95 .dev = {
96 .platform_data = &ts78xx_nor_boot_flash_data,
97 },
98 .num_resources = 1,
99 .resource = &ts78xx_nor_boot_flash_resource,
100}; 68};
101 69
102/***************************************************************************** 70/*****************************************************************************
103 * Ethernet 71 * SATA
104 ****************************************************************************/ 72 ****************************************************************************/
105static struct mv643xx_eth_platform_data ts78xx_eth_data = { 73static struct mv_sata_platform_data ts78xx_sata_data = {
106 .phy_addr = MV643XX_ETH_PHY_ADDR(0), 74 .n_ports = 2,
107}; 75};
108 76
109/***************************************************************************** 77/*****************************************************************************
110 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c 78 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c
111 ****************************************************************************/ 79 ****************************************************************************/
112#ifdef CONFIG_RTC_DRV_M48T86 80#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808)
113static unsigned char ts78xx_rtc_readbyte(unsigned long addr) 81#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c)
82
83static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr)
114{ 84{
115 writeb(addr, TS78XX_FPGA_REGS_RTC_CTRL); 85 writeb(addr, TS_RTC_CTRL);
116 return readb(TS78XX_FPGA_REGS_RTC_DATA); 86 return readb(TS_RTC_DATA);
117} 87}
118 88
119static void ts78xx_rtc_writebyte(unsigned char value, unsigned long addr) 89static void ts78xx_ts_rtc_writebyte(unsigned char value, unsigned long addr)
120{ 90{
121 writeb(addr, TS78XX_FPGA_REGS_RTC_CTRL); 91 writeb(addr, TS_RTC_CTRL);
122 writeb(value, TS78XX_FPGA_REGS_RTC_DATA); 92 writeb(value, TS_RTC_DATA);
123} 93}
124 94
125static struct m48t86_ops ts78xx_rtc_ops = { 95static struct m48t86_ops ts78xx_ts_rtc_ops = {
126 .readbyte = ts78xx_rtc_readbyte, 96 .readbyte = ts78xx_ts_rtc_readbyte,
127 .writebyte = ts78xx_rtc_writebyte, 97 .writebyte = ts78xx_ts_rtc_writebyte,
128}; 98};
129 99
130static struct platform_device ts78xx_rtc_device = { 100static struct platform_device ts78xx_ts_rtc_device = {
131 .name = "rtc-m48t86", 101 .name = "rtc-m48t86",
132 .id = -1, 102 .id = -1,
133 .dev = { 103 .dev = {
134 .platform_data = &ts78xx_rtc_ops, 104 .platform_data = &ts78xx_ts_rtc_ops,
135 }, 105 },
136 .num_resources = 0, 106 .num_resources = 0,
137}; 107};
@@ -146,59 +116,311 @@ static struct platform_device ts78xx_rtc_device = {
146 * TODO: track down a guinea pig without an RTC to see if we can work out a 116 * TODO: track down a guinea pig without an RTC to see if we can work out a
147 * better RTC detection routine 117 * better RTC detection routine
148 */ 118 */
149static int __init ts78xx_rtc_init(void) 119static int ts78xx_ts_rtc_load(void)
150{ 120{
121 int rc;
151 unsigned char tmp_rtc0, tmp_rtc1; 122 unsigned char tmp_rtc0, tmp_rtc1;
152 123
153 tmp_rtc0 = ts78xx_rtc_readbyte(126); 124 tmp_rtc0 = ts78xx_ts_rtc_readbyte(126);
154 tmp_rtc1 = ts78xx_rtc_readbyte(127); 125 tmp_rtc1 = ts78xx_ts_rtc_readbyte(127);
155 126
156 ts78xx_rtc_writebyte(0x00, 126); 127 ts78xx_ts_rtc_writebyte(0x00, 126);
157 ts78xx_rtc_writebyte(0x55, 127); 128 ts78xx_ts_rtc_writebyte(0x55, 127);
158 if (ts78xx_rtc_readbyte(127) == 0x55) { 129 if (ts78xx_ts_rtc_readbyte(127) == 0x55) {
159 ts78xx_rtc_writebyte(0xaa, 127); 130 ts78xx_ts_rtc_writebyte(0xaa, 127);
160 if (ts78xx_rtc_readbyte(127) == 0xaa 131 if (ts78xx_ts_rtc_readbyte(127) == 0xaa
161 && ts78xx_rtc_readbyte(126) == 0x00) { 132 && ts78xx_ts_rtc_readbyte(126) == 0x00) {
162 ts78xx_rtc_writebyte(tmp_rtc0, 126); 133 ts78xx_ts_rtc_writebyte(tmp_rtc0, 126);
163 ts78xx_rtc_writebyte(tmp_rtc1, 127); 134 ts78xx_ts_rtc_writebyte(tmp_rtc1, 127);
164 platform_device_register(&ts78xx_rtc_device); 135
165 return 1; 136 if (ts78xx_fpga.supports.ts_rtc.init == 0) {
137 rc = platform_device_register(&ts78xx_ts_rtc_device);
138 if (!rc)
139 ts78xx_fpga.supports.ts_rtc.init = 1;
140 } else
141 rc = platform_device_add(&ts78xx_ts_rtc_device);
142
143 return rc;
166 } 144 }
167 } 145 }
168 146
169 return 0; 147 return -ENODEV;
170}; 148};
171#else 149
172static int __init ts78xx_rtc_init(void) 150static void ts78xx_ts_rtc_unload(void)
173{ 151{
174 return 0; 152 platform_device_del(&ts78xx_ts_rtc_device);
175} 153}
176#endif
177 154
178/***************************************************************************** 155/*****************************************************************************
179 * SATA 156 * NAND Flash
180 ****************************************************************************/ 157 ****************************************************************************/
181static struct mv_sata_platform_data ts78xx_sata_data = { 158#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x800) /* VIRT */
182 .n_ports = 2, 159#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x804) /* PHYS */
160
161/*
162 * hardware specific access to control-lines
163 *
164 * ctrl:
165 * NAND_NCE: bit 0 -> bit 2
166 * NAND_CLE: bit 1 -> bit 1
167 * NAND_ALE: bit 2 -> bit 0
168 */
169static void ts78xx_ts_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
170 unsigned int ctrl)
171{
172 struct nand_chip *this = mtd->priv;
173
174 if (ctrl & NAND_CTRL_CHANGE) {
175 unsigned char bits;
176
177 bits = (ctrl & NAND_NCE) << 2;
178 bits |= ctrl & NAND_CLE;
179 bits |= (ctrl & NAND_ALE) >> 2;
180
181 writeb((readb(TS_NAND_CTRL) & ~0x7) | bits, TS_NAND_CTRL);
182 }
183
184 if (cmd != NAND_CMD_NONE)
185 writeb(cmd, this->IO_ADDR_W);
186}
187
188static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd)
189{
190 return readb(TS_NAND_CTRL) & 0x20;
191}
192
193const char *ts_nand_part_probes[] = { "cmdlinepart", NULL };
194
195static struct mtd_partition ts78xx_ts_nand_parts[] = {
196 {
197 .name = "mbr",
198 .offset = 0,
199 .size = SZ_128K,
200 .mask_flags = MTD_WRITEABLE,
201 }, {
202 .name = "kernel",
203 .offset = MTDPART_OFS_APPEND,
204 .size = SZ_4M,
205 }, {
206 .name = "initrd",
207 .offset = MTDPART_OFS_APPEND,
208 .size = SZ_4M,
209 }, {
210 .name = "rootfs",
211 .offset = MTDPART_OFS_APPEND,
212 .size = MTDPART_SIZ_FULL,
213 }
183}; 214};
184 215
216static struct platform_nand_data ts78xx_ts_nand_data = {
217 .chip = {
218 .part_probe_types = ts_nand_part_probes,
219 .partitions = ts78xx_ts_nand_parts,
220 .nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts),
221 .chip_delay = 15,
222 .options = NAND_USE_FLASH_BBT,
223 },
224 .ctrl = {
225 /*
226 * The HW ECC offloading functions, used to give about a 9%
227 * performance increase for 'dd if=/dev/mtdblockX' and 5% for
228 * nanddump. This all however was changed by git commit
229 * e6cf5df1838c28bb060ac45b5585e48e71bbc740 so now there is
230 * no performance advantage to be had so we no longer bother
231 */
232 .cmd_ctrl = ts78xx_ts_nand_cmd_ctrl,
233 .dev_ready = ts78xx_ts_nand_dev_ready,
234 },
235};
236
237static struct resource ts78xx_ts_nand_resources = {
238 .start = TS_NAND_DATA,
239 .end = TS_NAND_DATA + 4,
240 .flags = IORESOURCE_IO,
241};
242
243static struct platform_device ts78xx_ts_nand_device = {
244 .name = "gen_nand",
245 .id = -1,
246 .dev = {
247 .platform_data = &ts78xx_ts_nand_data,
248 },
249 .resource = &ts78xx_ts_nand_resources,
250 .num_resources = 1,
251};
252
253static int ts78xx_ts_nand_load(void)
254{
255 int rc;
256
257 if (ts78xx_fpga.supports.ts_nand.init == 0) {
258 rc = platform_device_register(&ts78xx_ts_nand_device);
259 if (!rc)
260 ts78xx_fpga.supports.ts_nand.init = 1;
261 } else
262 rc = platform_device_add(&ts78xx_ts_nand_device);
263
264 return rc;
265};
266
267static void ts78xx_ts_nand_unload(void)
268{
269 platform_device_del(&ts78xx_ts_nand_device);
270}
271
185/***************************************************************************** 272/*****************************************************************************
186 * print some information regarding the board 273 * FPGA 'hotplug' support code
187 ****************************************************************************/ 274 ****************************************************************************/
188static void __init ts78xx_print_board_id(void) 275static void ts78xx_fpga_devices_zero_init(void)
189{ 276{
190 unsigned int board_info; 277 ts78xx_fpga.supports.ts_rtc.init = 0;
191 278 ts78xx_fpga.supports.ts_nand.init = 0;
192 board_info = readl(TS78XX_FPGA_REGS_SYSCON_ID); 279}
193 printk(KERN_INFO "TS-78xx Info: FPGA rev=%.2x, Board Magic=%.6x, ", 280
194 board_info & 0xff, 281static void ts78xx_fpga_supports(void)
195 (board_info >> 8) & 0xffffff); 282{
196 board_info = readl(TS78XX_FPGA_REGS_SYSCON_LCDI); 283 /* TODO: put this 'table' into ts78xx-fpga.h */
197 printk("JP1=%d, JP2=%d\n", 284 switch (ts78xx_fpga.id) {
198 (board_info >> 30) & 0x1, 285 case TS7800_REV_B2:
199 (board_info >> 31) & 0x1); 286 case TS7800_REV_B3:
287 ts78xx_fpga.supports.ts_rtc.present = 1;
288 ts78xx_fpga.supports.ts_nand.present = 1;
289 break;
290 default:
291 ts78xx_fpga.supports.ts_rtc.present = 0;
292 ts78xx_fpga.supports.ts_nand.present = 0;
293 }
294}
295
296static int ts78xx_fpga_load_devices(void)
297{
298 int tmp, ret = 0;
299
300 if (ts78xx_fpga.supports.ts_rtc.present == 1) {
301 tmp = ts78xx_ts_rtc_load();
302 if (tmp) {
303 printk(KERN_INFO "TS-78xx: RTC not registered\n");
304 ts78xx_fpga.supports.ts_rtc.present = 0;
305 }
306 ret |= tmp;
307 }
308 if (ts78xx_fpga.supports.ts_nand.present == 1) {
309 tmp = ts78xx_ts_nand_load();
310 if (tmp) {
311 printk(KERN_INFO "TS-78xx: NAND not registered\n");
312 ts78xx_fpga.supports.ts_nand.present = 0;
313 }
314 ret |= tmp;
315 }
316
317 return ret;
318}
319
320static int ts78xx_fpga_unload_devices(void)
321{
322 int ret = 0;
323
324 if (ts78xx_fpga.supports.ts_rtc.present == 1)
325 ts78xx_ts_rtc_unload();
326 if (ts78xx_fpga.supports.ts_nand.present == 1)
327 ts78xx_ts_nand_unload();
328
329 return ret;
330}
331
332static int ts78xx_fpga_load(void)
333{
334 ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
335
336 printk(KERN_INFO "TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n",
337 (ts78xx_fpga.id >> 8) & 0xffffff,
338 ts78xx_fpga.id & 0xff);
339
340 ts78xx_fpga_supports();
341
342 if (ts78xx_fpga_load_devices()) {
343 ts78xx_fpga.state = -1;
344 return -EBUSY;
345 }
346
347 return 0;
200}; 348};
201 349
350static int ts78xx_fpga_unload(void)
351{
352 unsigned int fpga_id;
353
354 fpga_id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
355
356 /*
357 * There does not seem to be a feasible way to block access to the GPIO
358 * pins from userspace (/dev/mem). This if clause should hopefully warn
359 * those foolish enough not to follow 'policy' :)
360 *
361 * UrJTAG SVN since r1381 can be used to reprogram the FPGA
362 */
363 if (ts78xx_fpga.id != fpga_id) {
364 printk(KERN_ERR "TS-78xx FPGA: magic/rev mismatch\n"
365 "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",
366 (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff,
367 (fpga_id >> 8) & 0xffffff, fpga_id & 0xff);
368 ts78xx_fpga.state = -1;
369 return -EBUSY;
370 }
371
372 if (ts78xx_fpga_unload_devices()) {
373 ts78xx_fpga.state = -1;
374 return -EBUSY;
375 }
376
377 return 0;
378};
379
380static ssize_t ts78xx_fpga_show(struct kobject *kobj,
381 struct kobj_attribute *attr, char *buf)
382{
383 if (ts78xx_fpga.state < 0)
384 return sprintf(buf, "borked\n");
385
386 return sprintf(buf, "%s\n", (ts78xx_fpga.state) ? "online" : "offline");
387}
388
389static ssize_t ts78xx_fpga_store(struct kobject *kobj,
390 struct kobj_attribute *attr, const char *buf, size_t n)
391{
392 int value, ret;
393
394 if (ts78xx_fpga.state < 0) {
395 printk(KERN_ERR "TS-78xx FPGA: borked, you must powercycle asap\n");
396 return -EBUSY;
397 }
398
399 if (strncmp(buf, "online", sizeof("online") - 1) == 0)
400 value = 1;
401 else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0)
402 value = 0;
403 else {
404 printk(KERN_ERR "ts78xx_fpga_store: Invalid value\n");
405 return -EINVAL;
406 }
407
408 if (ts78xx_fpga.state == value)
409 return n;
410
411 ret = (ts78xx_fpga.state == 0)
412 ? ts78xx_fpga_load()
413 : ts78xx_fpga_unload();
414
415 if (!(ret < 0))
416 ts78xx_fpga.state = value;
417
418 return n;
419}
420
421static struct kobj_attribute ts78xx_fpga_attr =
422 __ATTR(ts78xx_fpga, 0644, ts78xx_fpga_show, ts78xx_fpga_store);
423
202/***************************************************************************** 424/*****************************************************************************
203 * General Setup 425 * General Setup
204 ****************************************************************************/ 426 ****************************************************************************/
@@ -223,30 +445,29 @@ static struct orion5x_mpp_mode ts78xx_mpp_modes[] __initdata = {
223 { 17, MPP_UART }, 445 { 17, MPP_UART },
224 { 18, MPP_UART }, 446 { 18, MPP_UART },
225 { 19, MPP_UART }, 447 { 19, MPP_UART },
448 /*
449 * MPP[20] PCI Clock Out 1
450 * MPP[21] PCI Clock Out 0
451 * MPP[22] Unused
452 * MPP[23] Unused
453 * MPP[24] Unused
454 * MPP[25] Unused
455 */
226 { -1 }, 456 { -1 },
227}; 457};
228 458
229static void __init ts78xx_init(void) 459static void __init ts78xx_init(void)
230{ 460{
461 int ret;
462
231 /* 463 /*
232 * Setup basic Orion functions. Need to be called early. 464 * Setup basic Orion functions. Need to be called early.
233 */ 465 */
234 orion5x_init(); 466 orion5x_init();
235 467
236 ts78xx_print_board_id();
237
238 orion5x_mpp_conf(ts78xx_mpp_modes); 468 orion5x_mpp_conf(ts78xx_mpp_modes);
239 469
240 /* 470 /*
241 * MPP[20] PCI Clock Out 1
242 * MPP[21] PCI Clock Out 0
243 * MPP[22] Unused
244 * MPP[23] Unused
245 * MPP[24] Unused
246 * MPP[25] Unused
247 */
248
249 /*
250 * Configure peripherals. 471 * Configure peripherals.
251 */ 472 */
252 orion5x_ehci0_init(); 473 orion5x_ehci0_init();
@@ -257,12 +478,12 @@ static void __init ts78xx_init(void)
257 orion5x_uart1_init(); 478 orion5x_uart1_init();
258 orion5x_xor_init(); 479 orion5x_xor_init();
259 480
260 orion5x_setup_dev_boot_win(TS78XX_NOR_BOOT_BASE, 481 /* FPGA init */
261 TS78XX_NOR_BOOT_SIZE); 482 ts78xx_fpga_devices_zero_init();
262 platform_device_register(&ts78xx_nor_boot_flash); 483 ret = ts78xx_fpga_load();
263 484 ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr);
264 if (!ts78xx_rtc_init()) 485 if (ret)
265 printk(KERN_INFO "TS-78xx RTC not detected or enabled\n"); 486 printk(KERN_ERR "sysfs_create_file failed: %d\n", ret);
266} 487}
267 488
268MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") 489MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC")
diff --git a/arch/arm/mach-s3c6410/mach-smdk6410.c b/arch/arm/mach-s3c6410/mach-smdk6410.c
index 3c4d47145c83..25f7935576f8 100644
--- a/arch/arm/mach-s3c6410/mach-smdk6410.c
+++ b/arch/arm/mach-s3c6410/mach-smdk6410.c
@@ -129,7 +129,7 @@ static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
129 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 129 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
130}; 130};
131 131
132struct map_desc smdk6410_iodesc[] = {}; 132static struct map_desc smdk6410_iodesc[] = {};
133 133
134static struct platform_device *smdk6410_devices[] __initdata = { 134static struct platform_device *smdk6410_devices[] __initdata = {
135#ifdef CONFIG_SMDK6410_SD_CH0 135#ifdef CONFIG_SMDK6410_SD_CH0
@@ -146,7 +146,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
146 146
147static struct i2c_board_info i2c_devs0[] __initdata = { 147static struct i2c_board_info i2c_devs0[] __initdata = {
148 { I2C_BOARD_INFO("24c08", 0x50), }, 148 { I2C_BOARD_INFO("24c08", 0x50), },
149 { I2C_BOARD_INFO("WM8580", 0X1b), }, 149 { I2C_BOARD_INFO("wm8580", 0x1b), },
150}; 150};
151 151
152static struct i2c_board_info i2c_devs1[] __initdata = { 152static struct i2c_board_info i2c_devs1[] __initdata = {
diff --git a/arch/arm/mm/copypage-feroceon.c b/arch/arm/mm/copypage-feroceon.c
index c3ba6a94da0c..70997d5bee2d 100644
--- a/arch/arm/mm/copypage-feroceon.c
+++ b/arch/arm/mm/copypage-feroceon.c
@@ -13,7 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/highmem.h> 14#include <linux/highmem.h>
15 15
16static void __attribute__((naked)) 16static void __naked
17feroceon_copy_user_page(void *kto, const void *kfrom) 17feroceon_copy_user_page(void *kto, const void *kfrom)
18{ 18{
19 asm("\ 19 asm("\
diff --git a/arch/arm/mm/copypage-v3.c b/arch/arm/mm/copypage-v3.c
index 70ed96c8af8e..de9c06854ad7 100644
--- a/arch/arm/mm/copypage-v3.c
+++ b/arch/arm/mm/copypage-v3.c
@@ -15,7 +15,7 @@
15 * 15 *
16 * FIXME: do we need to handle cache stuff... 16 * FIXME: do we need to handle cache stuff...
17 */ 17 */
18static void __attribute__((naked)) 18static void __naked
19v3_copy_user_page(void *kto, const void *kfrom) 19v3_copy_user_page(void *kto, const void *kfrom)
20{ 20{
21 asm("\n\ 21 asm("\n\
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index 1601698b9800..7370a7142b04 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -44,7 +44,7 @@ static DEFINE_SPINLOCK(minicache_lock);
44 * instruction. If your processor does not supply this, you have to write your 44 * instruction. If your processor does not supply this, you have to write your
45 * own copy_user_highpage that does the right thing. 45 * own copy_user_highpage that does the right thing.
46 */ 46 */
47static void __attribute__((naked)) 47static void __naked
48mc_copy_user_page(void *from, void *to) 48mc_copy_user_page(void *from, void *to)
49{ 49{
50 asm volatile( 50 asm volatile(
diff --git a/arch/arm/mm/copypage-v4wb.c b/arch/arm/mm/copypage-v4wb.c
index 3ec93dab7656..9ab098414227 100644
--- a/arch/arm/mm/copypage-v4wb.c
+++ b/arch/arm/mm/copypage-v4wb.c
@@ -22,7 +22,7 @@
22 * instruction. If your processor does not supply this, you have to write your 22 * instruction. If your processor does not supply this, you have to write your
23 * own copy_user_highpage that does the right thing. 23 * own copy_user_highpage that does the right thing.
24 */ 24 */
25static void __attribute__((naked)) 25static void __naked
26v4wb_copy_user_page(void *kto, const void *kfrom) 26v4wb_copy_user_page(void *kto, const void *kfrom)
27{ 27{
28 asm("\ 28 asm("\
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
index 0f1188efae45..300efafd6643 100644
--- a/arch/arm/mm/copypage-v4wt.c
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -20,7 +20,7 @@
20 * dirty data in the cache. However, we do have to ensure that 20 * dirty data in the cache. However, we do have to ensure that
21 * subsequent reads are up to date. 21 * subsequent reads are up to date.
22 */ 22 */
23static void __attribute__((naked)) 23static void __naked
24v4wt_copy_user_page(void *kto, const void *kfrom) 24v4wt_copy_user_page(void *kto, const void *kfrom)
25{ 25{
26 asm("\ 26 asm("\
diff --git a/arch/arm/mm/copypage-xsc3.c b/arch/arm/mm/copypage-xsc3.c
index 39a994542cad..bc4525f5ab23 100644
--- a/arch/arm/mm/copypage-xsc3.c
+++ b/arch/arm/mm/copypage-xsc3.c
@@ -29,7 +29,7 @@
29 * if we eventually end up using our copied page. 29 * if we eventually end up using our copied page.
30 * 30 *
31 */ 31 */
32static void __attribute__((naked)) 32static void __naked
33xsc3_mc_copy_user_page(void *kto, const void *kfrom) 33xsc3_mc_copy_user_page(void *kto, const void *kfrom)
34{ 34{
35 asm("\ 35 asm("\
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index d18f2397ee2d..76824d3e966a 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -42,7 +42,7 @@ static DEFINE_SPINLOCK(minicache_lock);
42 * Dcache aliasing issue. The writes will be forwarded to the write buffer, 42 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
43 * and merged as appropriate. 43 * and merged as appropriate.
44 */ 44 */
45static void __attribute__((naked)) 45static void __naked
46mc_copy_user_page(void *from, void *to) 46mc_copy_user_page(void *from, void *to)
47{ 47{
48 /* 48 /*
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index deaff58878a2..04a100cfb8e5 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -18,7 +18,8 @@ obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
18obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 18obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
19obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o 19obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
20obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o 20obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
21obj-$(CONFIG_I2C_OMAP) += i2c.o 21i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
22obj-y += $(i2c-omap-m) $(i2c-omap-y)
22 23
23# OMAP mailbox framework 24# OMAP mailbox framework
24obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o 25obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 187239c054c9..d1797147732f 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -200,20 +200,16 @@ static struct clocksource clocksource_32k = {
200}; 200};
201 201
202/* 202/*
203 * Rounds down to nearest nsec.
204 */
205unsigned long long omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
206{
207 return cyc2ns(&clocksource_32k, ticks_32k);
208}
209
210/*
211 * Returns current time from boot in nsecs. It's OK for this to wrap 203 * Returns current time from boot in nsecs. It's OK for this to wrap
212 * around for now, as it's just a relative time stamp. 204 * around for now, as it's just a relative time stamp.
213 */ 205 */
214unsigned long long sched_clock(void) 206unsigned long long sched_clock(void)
215{ 207{
216 return omap_32k_ticks_to_nsecs(omap_32k_read()); 208 unsigned long long ret;
209
210 ret = (unsigned long long)omap_32k_read();
211 ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift;
212 return ret;
217} 213}
218 214
219static int __init omap_init_clocksource_32k(void) 215static int __init omap_init_clocksource_32k(void)
diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h
index f3444a66a57e..0ecf36deb17b 100644
--- a/arch/arm/plat-omap/include/mach/common.h
+++ b/arch/arm/plat-omap/include/mach/common.h
@@ -35,7 +35,7 @@ extern void omap_map_common_io(void);
35extern struct sys_timer omap_timer; 35extern struct sys_timer omap_timer;
36extern void omap_serial_init(void); 36extern void omap_serial_init(void);
37extern void omap_serial_enable_clocks(int enable); 37extern void omap_serial_enable_clocks(int enable);
38#ifdef CONFIG_I2C_OMAP 38#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
39extern int omap_register_i2c_bus(int bus_id, u32 clkrate, 39extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
40 struct i2c_board_info const *info, 40 struct i2c_board_info const *info,
41 unsigned len); 41 unsigned len);
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index ca81830b4f86..ce6ee7927537 100644
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -108,7 +108,7 @@
108 !defined(CONFIG_ARCH_OMAP15XX) && \ 108 !defined(CONFIG_ARCH_OMAP15XX) && \
109 !defined(CONFIG_ARCH_OMAP16XX) && \ 109 !defined(CONFIG_ARCH_OMAP16XX) && \
110 !defined(CONFIG_ARCH_OMAP24XX) 110 !defined(CONFIG_ARCH_OMAP24XX)
111#error "Power management for this processor not implemented yet" 111#warning "Power management for this processor not implemented yet"
112#endif 112#endif
113 113
114#ifndef __ASSEMBLER__ 114#ifndef __ASSEMBLER__
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 0d12c2164766..32eb9e33bebb 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -19,7 +19,8 @@
19 19
20static DEFINE_SPINLOCK(gpio_lock); 20static DEFINE_SPINLOCK(gpio_lock);
21static const char *gpio_label[GPIO_MAX]; /* non null for allocated GPIOs */ 21static const char *gpio_label[GPIO_MAX]; /* non null for allocated GPIOs */
22static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)]; 22static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];
23static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];
23 24
24static inline void __set_direction(unsigned pin, int input) 25static inline void __set_direction(unsigned pin, int input)
25{ 26{
@@ -53,7 +54,7 @@ int gpio_direction_input(unsigned pin)
53{ 54{
54 unsigned long flags; 55 unsigned long flags;
55 56
56 if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { 57 if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid_input)) {
57 pr_debug("%s: invalid GPIO %d\n", __func__, pin); 58 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
58 return -EINVAL; 59 return -EINVAL;
59 } 60 }
@@ -83,7 +84,7 @@ int gpio_direction_output(unsigned pin, int value)
83 unsigned long flags; 84 unsigned long flags;
84 u32 u; 85 u32 u;
85 86
86 if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { 87 if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid_output)) {
87 pr_debug("%s: invalid GPIO %d\n", __func__, pin); 88 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
88 return -EINVAL; 89 return -EINVAL;
89 } 90 }
@@ -161,7 +162,9 @@ int gpio_request(unsigned pin, const char *label)
161 unsigned long flags; 162 unsigned long flags;
162 int ret; 163 int ret;
163 164
164 if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { 165 if (pin >= GPIO_MAX ||
166 !(test_bit(pin, gpio_valid_input) ||
167 test_bit(pin, gpio_valid_output))) {
165 pr_debug("%s: invalid GPIO %d\n", __func__, pin); 168 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
166 return -EINVAL; 169 return -EINVAL;
167 } 170 }
@@ -183,7 +186,9 @@ EXPORT_SYMBOL(gpio_request);
183 186
184void gpio_free(unsigned pin) 187void gpio_free(unsigned pin)
185{ 188{
186 if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { 189 if (pin >= GPIO_MAX ||
190 !(test_bit(pin, gpio_valid_input) ||
191 test_bit(pin, gpio_valid_output))) {
187 pr_debug("%s: invalid GPIO %d\n", __func__, pin); 192 pr_debug("%s: invalid GPIO %d\n", __func__, pin);
188 return; 193 return;
189 } 194 }
@@ -208,12 +213,18 @@ void __init orion_gpio_set_unused(unsigned pin)
208 __set_direction(pin, 0); 213 __set_direction(pin, 0);
209} 214}
210 215
211void __init orion_gpio_set_valid(unsigned pin, int valid) 216void __init orion_gpio_set_valid(unsigned pin, int mode)
212{ 217{
213 if (valid) 218 if (mode == 1)
214 __set_bit(pin, gpio_valid); 219 mode = GPIO_INPUT_OK | GPIO_OUTPUT_OK;
220 if (mode & GPIO_INPUT_OK)
221 __set_bit(pin, gpio_valid_input);
215 else 222 else
216 __clear_bit(pin, gpio_valid); 223 __clear_bit(pin, gpio_valid_input);
224 if (mode & GPIO_OUTPUT_OK)
225 __set_bit(pin, gpio_valid_output);
226 else
227 __clear_bit(pin, gpio_valid_output);
217} 228}
218 229
219void orion_gpio_set_blink(unsigned pin, int blink) 230void orion_gpio_set_blink(unsigned pin, int blink)
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h
index ec743e82c876..33f6c6aec185 100644
--- a/arch/arm/plat-orion/include/plat/gpio.h
+++ b/arch/arm/plat-orion/include/plat/gpio.h
@@ -25,9 +25,13 @@ void gpio_set_value(unsigned pin, int value);
25 * Orion-specific GPIO API extensions. 25 * Orion-specific GPIO API extensions.
26 */ 26 */
27void orion_gpio_set_unused(unsigned pin); 27void orion_gpio_set_unused(unsigned pin);
28void orion_gpio_set_valid(unsigned pin, int valid);
29void orion_gpio_set_blink(unsigned pin, int blink); 28void orion_gpio_set_blink(unsigned pin, int blink);
30 29
30#define GPIO_BIDI_OK (1 << 0)
31#define GPIO_INPUT_OK (1 << 1)
32#define GPIO_OUTPUT_OK (1 << 2)
33void orion_gpio_set_valid(unsigned pin, int mode);
34
31/* 35/*
32 * GPIO interrupt handling. 36 * GPIO interrupt handling.
33 */ 37 */
diff --git a/arch/arm/plat-orion/include/plat/mvsdio.h b/arch/arm/plat-orion/include/plat/mvsdio.h
new file mode 100644
index 000000000000..14ca88676002
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/mvsdio.h
@@ -0,0 +1,21 @@
1/*
2 * arch/arm/plat-orion/include/plat/mvsdio.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __MACH_MVSDIO_H
10#define __MACH_MVSDIO_H
11
12#include <linux/mbus.h>
13
14struct mvsdio_platform_data {
15 struct mbus_dram_target_info *dram;
16 unsigned int clock;
17 int gpio_card_detect;
18 int gpio_write_protect;
19};
20
21#endif
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
index 136c982c68e1..ad1b9682c9c3 100644
--- a/arch/arm/plat-s3c64xx/clock.c
+++ b/arch/arm/plat-s3c64xx/clock.c
@@ -248,7 +248,7 @@ static struct clk *clks[] __initdata = {
248 &clk_48m, 248 &clk_48m,
249}; 249};
250 250
251void s3c64xx_register_clocks(void) 251void __init s3c64xx_register_clocks(void)
252{ 252{
253 struct clk *clkp; 253 struct clk *clkp;
254 int ret; 254 int ret;
diff --git a/arch/arm/plat-s3c64xx/gpiolib.c b/arch/arm/plat-s3c64xx/gpiolib.c
index cc62941d7b5c..ee9188add8fb 100644
--- a/arch/arm/plat-s3c64xx/gpiolib.c
+++ b/arch/arm/plat-s3c64xx/gpiolib.c
@@ -417,4 +417,4 @@ static __init int s3c64xx_gpiolib_init(void)
417 return 0; 417 return 0;
418} 418}
419 419
420arch_initcall(s3c64xx_gpiolib_init); 420core_initcall(s3c64xx_gpiolib_init);
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
index 2846f550b727..f865bf4d709e 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -117,7 +117,7 @@
117#define IRQ_ONENAND1 S3C64XX_IRQ_VIC1(12) 117#define IRQ_ONENAND1 S3C64XX_IRQ_VIC1(12)
118#define IRQ_NFC S3C64XX_IRQ_VIC1(13) 118#define IRQ_NFC S3C64XX_IRQ_VIC1(13)
119#define IRQ_CFCON S3C64XX_IRQ_VIC1(14) 119#define IRQ_CFCON S3C64XX_IRQ_VIC1(14)
120#define IRQ_UHOST S3C64XX_IRQ_VIC1(15) 120#define IRQ_USBH S3C64XX_IRQ_VIC1(15)
121#define IRQ_SPI0 S3C64XX_IRQ_VIC1(16) 121#define IRQ_SPI0 S3C64XX_IRQ_VIC1(16)
122#define IRQ_SPI1 S3C64XX_IRQ_VIC1(17) 122#define IRQ_SPI1 S3C64XX_IRQ_VIC1(17)
123#define IRQ_IIC S3C64XX_IRQ_VIC1(18) 123#define IRQ_IIC S3C64XX_IRQ_VIC1(18)
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
index ebb305ce7689..cf524826c93a 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -14,12 +14,15 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/gpio.h>
17#include <linux/irq.h> 18#include <linux/irq.h>
18#include <linux/io.h> 19#include <linux/io.h>
19 20
20#include <asm/hardware/vic.h> 21#include <asm/hardware/vic.h>
21 22
22#include <plat/regs-irqtype.h> 23#include <plat/regs-irqtype.h>
24#include <plat/regs-gpio.h>
25#include <plat/gpio-cfg.h>
23 26
24#include <mach/map.h> 27#include <mach/map.h>
25#include <plat/cpu.h> 28#include <plat/cpu.h>
@@ -74,6 +77,7 @@ static void s3c_irq_eint_maskack(unsigned int irq)
74static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) 77static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
75{ 78{
76 int offs = eint_offset(irq); 79 int offs = eint_offset(irq);
80 int pin;
77 int shift; 81 int shift;
78 u32 ctrl, mask; 82 u32 ctrl, mask;
79 u32 newvalue = 0; 83 u32 newvalue = 0;
@@ -125,6 +129,15 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
125 ctrl |= newvalue << shift; 129 ctrl |= newvalue << shift;
126 __raw_writel(ctrl, reg); 130 __raw_writel(ctrl, reg);
127 131
132 /* set the GPIO pin appropriately */
133
134 if (offs < 23)
135 pin = S3C64XX_GPN(offs);
136 else
137 pin = S3C64XX_GPM(offs - 23);
138
139 s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2));
140
128 return 0; 141 return 0;
129} 142}
130 143
@@ -181,7 +194,7 @@ static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc)
181 s3c_irq_demux_eint(20, 27); 194 s3c_irq_demux_eint(20, 27);
182} 195}
183 196
184int __init s3c64xx_init_irq_eint(void) 197static int __init s3c64xx_init_irq_eint(void)
185{ 198{
186 int irq; 199 int irq;
187 200
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
index a94f1d5e819d..f22edf7c2d2d 100644
--- a/arch/arm/plat-s3c64xx/irq.c
+++ b/arch/arm/plat-s3c64xx/irq.c
@@ -207,7 +207,7 @@ static struct irq_chip s3c_irq_uart = {
207 207
208static void __init s3c64xx_uart_irq(struct uart_irq *uirq) 208static void __init s3c64xx_uart_irq(struct uart_irq *uirq)
209{ 209{
210 void *reg_base = uirq->regs; 210 void __iomem *reg_base = uirq->regs;
211 unsigned int irq; 211 unsigned int irq;
212 int offs; 212 int offs;
213 213
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index 8d9a0cada668..05b17528041e 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -36,7 +36,7 @@
36 * ext_xtal_mux for want of an actual name from the manual. 36 * ext_xtal_mux for want of an actual name from the manual.
37*/ 37*/
38 38
39struct clk clk_ext_xtal_mux = { 39static struct clk clk_ext_xtal_mux = {
40 .name = "ext_xtal", 40 .name = "ext_xtal",
41 .id = -1, 41 .id = -1,
42}; 42};
@@ -63,7 +63,7 @@ struct clksrc_clk {
63 void __iomem *reg_divider; 63 void __iomem *reg_divider;
64}; 64};
65 65
66struct clk clk_fout_apll = { 66static struct clk clk_fout_apll = {
67 .name = "fout_apll", 67 .name = "fout_apll",
68 .id = -1, 68 .id = -1,
69}; 69};
@@ -78,7 +78,7 @@ static struct clk_sources clk_src_apll = {
78 .nr_sources = ARRAY_SIZE(clk_src_apll_list), 78 .nr_sources = ARRAY_SIZE(clk_src_apll_list),
79}; 79};
80 80
81struct clksrc_clk clk_mout_apll = { 81static struct clksrc_clk clk_mout_apll = {
82 .clk = { 82 .clk = {
83 .name = "mout_apll", 83 .name = "mout_apll",
84 .id = -1, 84 .id = -1,
@@ -88,7 +88,7 @@ struct clksrc_clk clk_mout_apll = {
88 .sources = &clk_src_apll, 88 .sources = &clk_src_apll,
89}; 89};
90 90
91struct clk clk_fout_epll = { 91static struct clk clk_fout_epll = {
92 .name = "fout_epll", 92 .name = "fout_epll",
93 .id = -1, 93 .id = -1,
94}; 94};
@@ -103,7 +103,7 @@ static struct clk_sources clk_src_epll = {
103 .nr_sources = ARRAY_SIZE(clk_src_epll_list), 103 .nr_sources = ARRAY_SIZE(clk_src_epll_list),
104}; 104};
105 105
106struct clksrc_clk clk_mout_epll = { 106static struct clksrc_clk clk_mout_epll = {
107 .clk = { 107 .clk = {
108 .name = "mout_epll", 108 .name = "mout_epll",
109 .id = -1, 109 .id = -1,
@@ -123,7 +123,7 @@ static struct clk_sources clk_src_mpll = {
123 .nr_sources = ARRAY_SIZE(clk_src_mpll_list), 123 .nr_sources = ARRAY_SIZE(clk_src_mpll_list),
124}; 124};
125 125
126struct clksrc_clk clk_mout_mpll = { 126static struct clksrc_clk clk_mout_mpll = {
127 .clk = { 127 .clk = {
128 .name = "mout_mpll", 128 .name = "mout_mpll",
129 .id = -1, 129 .id = -1,
@@ -145,7 +145,7 @@ static unsigned long s3c64xx_clk_doutmpll_get_rate(struct clk *clk)
145 return rate; 145 return rate;
146} 146}
147 147
148struct clk clk_dout_mpll = { 148static struct clk clk_dout_mpll = {
149 .name = "dout_mpll", 149 .name = "dout_mpll",
150 .id = -1, 150 .id = -1,
151 .parent = &clk_mout_mpll.clk, 151 .parent = &clk_mout_mpll.clk,
@@ -189,10 +189,10 @@ static struct clk_sources clkset_uart = {
189}; 189};
190 190
191static struct clk *clkset_uhost_list[] = { 191static struct clk *clkset_uhost_list[] = {
192 &clk_48m,
192 &clk_mout_epll.clk, 193 &clk_mout_epll.clk,
193 &clk_dout_mpll, 194 &clk_dout_mpll,
194 &clk_fin_epll, 195 &clk_fin_epll,
195 &clk_48m,
196}; 196};
197 197
198static struct clk_sources clkset_uhost = { 198static struct clk_sources clkset_uhost = {
@@ -239,10 +239,12 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
239 239
240 rate = clk_round_rate(clk, rate); 240 rate = clk_round_rate(clk, rate);
241 div = clk_get_rate(clk->parent) / rate; 241 div = clk_get_rate(clk->parent) / rate;
242 if (div > 16)
243 return -EINVAL;
242 244
243 val = __raw_readl(reg); 245 val = __raw_readl(reg);
244 val &= ~sclk->mask; 246 val &= ~(0xf << sclk->shift);
245 val |= (rate - 1) << sclk->shift; 247 val |= (div - 1) << sclk->shift;
246 __raw_writel(val, reg); 248 __raw_writel(val, reg);
247 249
248 return 0; 250 return 0;
@@ -351,7 +353,7 @@ static struct clksrc_clk clk_mmc2 = {
351 353
352static struct clksrc_clk clk_usbhost = { 354static struct clksrc_clk clk_usbhost = {
353 .clk = { 355 .clk = {
354 .name = "usb-host-bus", 356 .name = "usb-bus-host",
355 .id = -1, 357 .id = -1,
356 .ctrlbit = S3C_CLKCON_SCLK_UHOST, 358 .ctrlbit = S3C_CLKCON_SCLK_UHOST,
357 .enable = s3c64xx_sclk_ctrl, 359 .enable = s3c64xx_sclk_ctrl,
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index fd23c0e9e698..b4211d8b2ac7 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Sun Nov 30 16:39:36 2008 15# Last update: Thu Mar 12 18:01:45 2009
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -1811,7 +1811,7 @@ pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820
1811jade MACH_JADE JADE 1821 1811jade MACH_JADE JADE 1821
1812ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822 1812ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822
1813gprisc3 MACH_GPRISC3 GPRISC3 1823 1813gprisc3 MACH_GPRISC3 GPRISC3 1823
1814stamp9260 MACH_STAMP9260 STAMP9260 1824 1814stamp9g20 MACH_STAMP9G20 STAMP9G20 1824
1815smdk6430 MACH_SMDK6430 SMDK6430 1825 1815smdk6430 MACH_SMDK6430 SMDK6430 1825
1816smdkc100 MACH_SMDKC100 SMDKC100 1826 1816smdkc100 MACH_SMDKC100 SMDKC100 1826
1817tavorevb MACH_TAVOREVB TAVOREVB 1827 1817tavorevb MACH_TAVOREVB TAVOREVB 1827
@@ -1993,4 +1993,134 @@ spark MACH_SPARK SPARK 2002
1993benzina MACH_BENZINA BENZINA 2003 1993benzina MACH_BENZINA BENZINA 2003
1994blaze MACH_BLAZE BLAZE 2004 1994blaze MACH_BLAZE BLAZE 2004
1995linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005 1995linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005
1996htcvenus MACH_HTCVENUS HTCVENUS 2006 1996htckovsky MACH_HTCVENUS HTCVENUS 2006
1997sony_prs505 MACH_SONY_PRS505 SONY_PRS505 2007
1998hanlin_v3 MACH_HANLIN_V3 HANLIN_V3 2008
1999sapphira MACH_SAPPHIRA SAPPHIRA 2009
2000dack_sda_01 MACH_DACK_SDA_01 DACK_SDA_01 2010
2001armbox MACH_ARMBOX ARMBOX 2011
2002harris_rvp MACH_HARRIS_RVP HARRIS_RVP 2012
2003ribaldo MACH_RIBALDO RIBALDO 2013
2004agora MACH_AGORA AGORA 2014
2005omap3_mini MACH_OMAP3_MINI OMAP3_MINI 2015
2006a9sam6432_b MACH_A9SAM6432_B A9SAM6432_B 2016
2007usg2410 MACH_USG2410 USG2410 2017
2008pc72052_i10_revb MACH_PC72052_I10_REVB PC72052_I10_REVB 2018
2009mx35_exm32 MACH_MX35_EXM32 MX35_EXM32 2019
2010topas910 MACH_TOPAS910 TOPAS910 2020
2011hyena MACH_HYENA HYENA 2021
2012pospax MACH_POSPAX POSPAX 2022
2013hdl_gx MACH_HDL_GX HDL_GX 2023
2014ctera_4bay MACH_CTERA_4BAY CTERA_4BAY 2024
2015ctera_plug_c MACH_CTERA_PLUG_C CTERA_PLUG_C 2025
2016crwea_plug_i MACH_CRWEA_PLUG_I CRWEA_PLUG_I 2026
2017egauge2 MACH_EGAUGE2 EGAUGE2 2027
2018didj MACH_DIDJ DIDJ 2028
2019m_s3c2443 MACH_MEISTER MEISTER 2029
2020htcblackstone MACH_HTCBLACKSTONE HTCBLACKSTONE 2030
2021cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031
2022smdk6440 MACH_SMDK6440 SMDK6440 2032
2023omap_35xx_mvp MACH_OMAP_35XX_MVP OMAP_35XX_MVP 2033
2024ctera_plug_i MACH_CTERA_PLUG_I CTERA_PLUG_I 2034
2025pvg610_100 MACH_PVG610 PVG610 2035
2026hprw6815 MACH_HPRW6815 HPRW6815 2036
2027omap3_oswald MACH_OMAP3_OSWALD OMAP3_OSWALD 2037
2028nas4220b MACH_NAS4220B NAS4220B 2038
2029htcraphael_cdma MACH_HTCRAPHAEL_CDMA HTCRAPHAEL_CDMA 2039
2030htcdiamond_cdma MACH_HTCDIAMOND_CDMA HTCDIAMOND_CDMA 2040
2031scaler MACH_SCALER SCALER 2041
2032zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042
2033aspenite MACH_ASPENITE ASPENITE 2043
2034teton MACH_TETON TETON 2044
2035ttc_dkb MACH_TTC_DKB TTC_DKB 2045
2036bishop2 MACH_BISHOP2 BISHOP2 2046
2037ippv5 MACH_IPPV5 IPPV5 2047
2038farm926 MACH_FARM926 FARM926 2048
2039mmccpu MACH_MMCCPU MMCCPU 2049
2040sgmsfl MACH_SGMSFL SGMSFL 2050
2041tt8000 MACH_TT8000 TT8000 2051
2042zrn4300lp MACH_ZRN4300LP ZRN4300LP 2052
2043mptc MACH_MPTC MPTC 2053
2044h6051 MACH_H6051 H6051 2054
2045pvg610_101 MACH_PVG610_101 PVG610_101 2055
2046stamp9261_pc_evb MACH_STAMP9261_PC_EVB STAMP9261_PC_EVB 2056
2047pelco_odysseus MACH_PELCO_ODYSSEUS PELCO_ODYSSEUS 2057
2048tny_a9260 MACH_TNY_A9260 TNY_A9260 2058
2049tny_a9g20 MACH_TNY_A9G20 TNY_A9G20 2059
2050aesop_mp2530f MACH_AESOP_MP2530F AESOP_MP2530F 2060
2051dx900 MACH_DX900 DX900 2061
2052cpodc2 MACH_CPODC2 CPODC2 2062
2053tilt_8925 MACH_TILT_8925 TILT_8925 2063
2054davinci_dm357_evm MACH_DAVINCI_DM357_EVM DAVINCI_DM357_EVM 2064
2055swordfish MACH_SWORDFISH SWORDFISH 2065
2056corvus MACH_CORVUS CORVUS 2066
2057taurus MACH_TAURUS TAURUS 2067
2058axm MACH_AXM AXM 2068
2059axc MACH_AXC AXC 2069
2060baby MACH_BABY BABY 2070
2061mp200 MACH_MP200 MP200 2071
2062pcm043 MACH_PCM043 PCM043 2072
2063hanlin_v3c MACH_HANLIN_V3C HANLIN_V3C 2073
2064kbk9g20 MACH_KBK9G20 KBK9G20 2074
2065adsturbog5 MACH_ADSTURBOG5 ADSTURBOG5 2075
2066avenger_lite1 MACH_AVENGER_LITE1 AVENGER_LITE1 2076
2067suc82x MACH_SUC SUC 2077
2068at91sam7s256 MACH_AT91SAM7S256 AT91SAM7S256 2078
2069mendoza MACH_MENDOZA MENDOZA 2079
2070kira MACH_KIRA KIRA 2080
2071mx1hbm MACH_MX1HBM MX1HBM 2081
2072quatro43xx MACH_QUATRO43XX QUATRO43XX 2082
2073quatro4230 MACH_QUATRO4230 QUATRO4230 2083
2074nsb400 MACH_NSB400 NSB400 2084
2075drp255 MACH_DRP255 DRP255 2085
2076thoth MACH_THOTH THOTH 2086
2077firestone MACH_FIRESTONE FIRESTONE 2087
2078asusp750 MACH_ASUSP750 ASUSP750 2088
2079ctera_dl MACH_CTERA_DL CTERA_DL 2089
2080socr MACH_SOCR SOCR 2090
2081htcoxygen MACH_HTCOXYGEN HTCOXYGEN 2091
2082heroc MACH_HEROC HEROC 2092
2083zeno6800 MACH_ZENO6800 ZENO6800 2093
2084sc2mcs MACH_SC2MCS SC2MCS 2094
2085gene100 MACH_GENE100 GENE100 2095
2086as353x MACH_AS353X AS353X 2096
2087sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097
2088at91sam9g20 MACH_AT91SAM9G20 AT91SAM9G20 2098
2089mv88f6192gtw_fe MACH_MV88F6192GTW_FE MV88F6192GTW_FE 2099
2090cc9200 MACH_CC9200 CC9200 2100
2091sm9200 MACH_SM9200 SM9200 2101
2092tp9200 MACH_TP9200 TP9200 2102
2093snapperdv MACH_SNAPPERDV SNAPPERDV 2103
2094avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104
2095avengers_lite1 MACH_AVENGERS_LITE1 AVENGERS_LITE1 2105
2096omap3axon MACH_OMAP3AXON OMAP3AXON 2106
2097ma8xx MACH_MA8XX MA8XX 2107
2098mp201ek MACH_MP201EK MP201EK 2108
2099davinci_tux MACH_DAVINCI_TUX DAVINCI_TUX 2109
2100mpa1600 MACH_MPA1600 MPA1600 2110
2101pelco_troy MACH_PELCO_TROY PELCO_TROY 2111
2102nsb667 MACH_NSB667 NSB667 2112
2103rovers5_4mpix MACH_ROVERS5_4MPIX ROVERS5_4MPIX 2113
2104twocom MACH_TWOCOM TWOCOM 2114
2105ubisys_p9_rcu3r2 MACH_UBISYS_P9_RCU3R2 UBISYS_P9_RCU3R2 2115
2106hero_espresso MACH_HERO_ESPRESSO HERO_ESPRESSO 2116
2107afeusb MACH_AFEUSB AFEUSB 2117
2108t830 MACH_T830 T830 2118
2109spd8020_cc MACH_SPD8020_CC SPD8020_CC 2119
2110om_3d7k MACH_OM_3D7K OM_3D7K 2120
2111picocom2 MACH_PICOCOM2 PICOCOM2 2121
2112uwg4mx27 MACH_UWG4MX27 UWG4MX27 2122
2113uwg4mx31 MACH_UWG4MX31 UWG4MX31 2123
2114cherry MACH_CHERRY CHERRY 2124
2115mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125
2116s3c2440turkiye MACH_S3C2440TURKIYE S3C2440TURKIYE 2126
2117tx37 MACH_TX37 TX37 2127
2118sbc2800_9g20 MACH_SBC2800_9G20 SBC2800_9G20 2128
2119benzglb MACH_BENZGLB BENZGLB 2129
2120benztd MACH_BENZTD BENZTD 2130
2121cartesio_plus MACH_CARTESIO_PLUS CARTESIO_PLUS 2131
2122solrad_g20 MACH_SOLRAD_G20 SOLRAD_G20 2132
2123mx27wallace MACH_MX27WALLACE MX27WALLACE 2133
2124fmzwebmodul MACH_FMZWEBMODUL FMZWEBMODUL 2134
2125rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135
2126smallogger MACH_SMALLOGGER SMALLOGGER 2136
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-28 17:22:48 -0400