547 files changed, 26845 insertions, 9186 deletions

diff --git a/arch/Kconfig b/arch/Kconfig
index 550dab22daa1..830c16a2b801 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -106,3 +106,5 @@ config HAVE_CLK
           The <linux/clk.h> calls support software clock gating and
           thus are a key power management tool on many systems.
 
+config HAVE_DMA_API_DEBUG
+        bool
diff --git a/arch/alpha/kernel/srm_env.c b/arch/alpha/kernel/srm_env.c
index 78ad7cd1bbd6..d12af472e1c0 100644
--- a/arch/alpha/kernel/srm_env.c
+++ b/arch/alpha/kernel/srm_env.c
@@ -218,7 +218,6 @@ srm_env_init(void)
                                 BASE_DIR);
                 goto cleanup;
         }
-        base_dir->owner = THIS_MODULE;
 
         /*
          * Create per-name subdirectory
@@ -229,7 +228,6 @@ srm_env_init(void)
                                 BASE_DIR, NAMED_DIR);
                 goto cleanup;
         }
-        named_dir->owner = THIS_MODULE;
 
         /*
          * Create per-number subdirectory
@@ -241,7 +239,6 @@ srm_env_init(void)
                 goto cleanup;
 
         }
-        numbered_dir->owner = THIS_MODULE;
 
         /*
          * Create all named nodes
@@ -254,7 +251,6 @@ srm_env_init(void)
                         goto cleanup;
 
                 entry->proc_entry->data         = (void *) entry;
-                entry->proc_entry->owner        = THIS_MODULE;
                 entry->proc_entry->read_proc    = srm_env_read;
                 entry->proc_entry->write_proc   = srm_env_write;
 
@@ -275,7 +271,6 @@ srm_env_init(void)
 
                 entry->id                       = var_num;
                 entry->proc_entry->data         = (void *) entry;
-                entry->proc_entry->owner        = THIS_MODULE;
                 entry->proc_entry->read_proc    = srm_env_read;
                 entry->proc_entry->write_proc   = srm_env_write;
         }
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index f46698e20c1f..6112740b4ae9 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -380,14 +380,49 @@ static struct pca953x_platform_data pca9536_data = {
         .gpio_base      = NR_BUILTIN_GPIO + 1,
 };
 
-static struct soc_camera_link iclink[] = {
-        {
-                .bus_id = 0, /* Must match with the camera ID above */
-                .gpio   = NR_BUILTIN_GPIO + 1,
-        }, {
-                .bus_id = 0, /* Must match with the camera ID above */
-                .gpio   = -ENXIO,
+static int gpio_bus_switch;
+
+static int pcm990_camera_set_bus_param(struct soc_camera_link *link,
+                unsigned long flags)
+{
+        if (gpio_bus_switch <= 0) {
+                if (flags == SOCAM_DATAWIDTH_10)
+                        return 0;
+                else
+                        return -EINVAL;
+        }
+
+        if (flags & SOCAM_DATAWIDTH_8)
+                gpio_set_value(gpio_bus_switch, 1);
+        else
+                gpio_set_value(gpio_bus_switch, 0);
+
+        return 0;
+}
+
+static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
+{
+        int ret;
+
+        if (!gpio_bus_switch) {
+                ret = gpio_request(NR_BUILTIN_GPIO + 1, "camera");
+                if (!ret) {
+                        gpio_bus_switch = NR_BUILTIN_GPIO + 1;
+                        gpio_direction_output(gpio_bus_switch, 0);
+                } else
+                        gpio_bus_switch = -EINVAL;
         }
+
+        if (gpio_bus_switch > 0)
+                return SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_10;
+        else
+                return SOCAM_DATAWIDTH_10;
+}
+
+static struct soc_camera_link iclink = {
+        .bus_id = 0, /* Must match with the camera ID above */
+        .query_bus_param = pcm990_camera_query_bus_param,
+        .set_bus_param = pcm990_camera_set_bus_param,
 };
 
 /* Board I2C devices. */
@@ -398,10 +433,10 @@ static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
                 .platform_data = &pca9536_data,
         }, {
                 I2C_BOARD_INFO("mt9v022", 0x48),
-                .platform_data = &iclink[0], /* With extender */
+                .platform_data = &iclink, /* With extender */
         }, {
                 I2C_BOARD_INFO("mt9m001", 0x5d),
-                .platform_data = &iclink[0], /* With extender */
+                .platform_data = &iclink, /* With extender */
         },
 };
 #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
diff --git a/arch/arm/plat-mxc/include/mach/mx3_camera.h b/arch/arm/plat-mxc/include/mach/mx3_camera.h
new file mode 100644
index 000000000000..36d7ff27b5e2
--- /dev/null
+++ b/arch/arm/plat-mxc/include/mach/mx3_camera.h
@@ -0,0 +1,52 @@
+/*
+ * mx3_camera.h - i.MX3x camera driver header file
+ *
+ * Copyright (C) 2008, Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _MX3_CAMERA_H_
+#define _MX3_CAMERA_H_
+
+#include <linux/device.h>
+
+#define MX3_CAMERA_CLK_SRC      1
+#define MX3_CAMERA_EXT_VSYNC    2
+#define MX3_CAMERA_DP           4
+#define MX3_CAMERA_PCP          8
+#define MX3_CAMERA_HSP          0x10
+#define MX3_CAMERA_VSP          0x20
+#define MX3_CAMERA_DATAWIDTH_4  0x40
+#define MX3_CAMERA_DATAWIDTH_8  0x80
+#define MX3_CAMERA_DATAWIDTH_10 0x100
+#define MX3_CAMERA_DATAWIDTH_15 0x200
+
+#define MX3_CAMERA_DATAWIDTH_MASK (MX3_CAMERA_DATAWIDTH_4 | MX3_CAMERA_DATAWIDTH_8 | \
+                                   MX3_CAMERA_DATAWIDTH_10 | MX3_CAMERA_DATAWIDTH_15)
+
+/**
+ * struct mx3_camera_pdata - i.MX3x camera platform data
+ * @flags:      MX3_CAMERA_* flags
+ * @mclk_10khz: master clock frequency in 10kHz units
+ * @dma_dev:    IPU DMA device to match against in channel allocation
+ */
+struct mx3_camera_pdata {
+        unsigned long flags;
+        unsigned long mclk_10khz;
+        struct device *dma_dev;
+};
+
+#endif
diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c
index 834cab7438a8..530d1393a232 100644
--- a/arch/blackfin/mm/sram-alloc.c
+++ b/arch/blackfin/mm/sram-alloc.c
@@ -854,7 +854,6 @@ static int __init sram_proc_init(void)
                 printk(KERN_WARNING "unable to create /proc/sram\n");
                 return -1;
         }
-        ptr->owner = THIS_MODULE;
         ptr->read_proc = sram_proc_read;
         return 0;
 }
diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c
index c685ba4c3387..2b73c7a5b649 100644
--- a/arch/cris/arch-v10/kernel/time.c
+++ b/arch/cris/arch-v10/kernel/time.c
@@ -261,7 +261,6 @@ timer_interrupt(int irq, void *dev_id)
 static struct irqaction irq2  = {
         .handler = timer_interrupt,
         .flags = IRQF_SHARED | IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "timer",
 };
 
diff --git a/arch/cris/arch-v32/kernel/smp.c b/arch/cris/arch-v32/kernel/smp.c
index 9dac17334640..f59a973c97ee 100644
--- a/arch/cris/arch-v32/kernel/smp.c
+++ b/arch/cris/arch-v32/kernel/smp.c
@@ -65,7 +65,6 @@ static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
 static struct irqaction irq_ipi  = {
         .handler = crisv32_ipi_interrupt,
         .flags = IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "ipi",
 };
 
diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index 3a13dd6e0a9a..65633d0dab86 100644
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -267,7 +267,6 @@ timer_interrupt(int irq, void *dev_id)
 static struct irqaction irq_timer = {
         .handler = timer_interrupt,
         .flags = IRQF_SHARED | IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "timer"
 };
 
diff --git a/arch/frv/kernel/irq-mb93091.c b/arch/frv/kernel/irq-mb93091.c
index 9e38f99bbab8..4dd9adaf115a 100644
--- a/arch/frv/kernel/irq-mb93091.c
+++ b/arch/frv/kernel/irq-mb93091.c
@@ -109,28 +109,24 @@ static struct irqaction fpga_irq[4]  = {
         [0] = {
                 .handler        = fpga_interrupt,
                 .flags          = IRQF_DISABLED | IRQF_SHARED,
-                .mask           = CPU_MASK_NONE,
                 .name           = "fpga.0",
                 .dev_id         = (void *) 0x0028UL,
         },
         [1] = {
                 .handler        = fpga_interrupt,
                 .flags          = IRQF_DISABLED | IRQF_SHARED,
-                .mask           = CPU_MASK_NONE,
                 .name           = "fpga.1",
                 .dev_id         = (void *) 0x0050UL,
         },
         [2] = {
                 .handler        = fpga_interrupt,
                 .flags          = IRQF_DISABLED | IRQF_SHARED,
-                .mask           = CPU_MASK_NONE,
                 .name           = "fpga.2",
                 .dev_id         = (void *) 0x1c00UL,
         },
         [3] = {
                 .handler        = fpga_interrupt,
                 .flags          = IRQF_DISABLED | IRQF_SHARED,
-                .mask           = CPU_MASK_NONE,
                 .name           = "fpga.3",
                 .dev_id         = (void *) 0x6386UL,
         }
diff --git a/arch/frv/kernel/irq-mb93093.c b/arch/frv/kernel/irq-mb93093.c
index 3c2752ca9775..e45209031873 100644
--- a/arch/frv/kernel/irq-mb93093.c
+++ b/arch/frv/kernel/irq-mb93093.c
@@ -108,7 +108,6 @@ static struct irqaction fpga_irq[1]  = {
         [0] = {
                 .handler        = fpga_interrupt,
                 .flags          = IRQF_DISABLED,
-                .mask           = CPU_MASK_NONE,
                 .name           = "fpga.0",
                 .dev_id         = (void *) 0x0700UL,
         }
diff --git a/arch/frv/kernel/irq-mb93493.c b/arch/frv/kernel/irq-mb93493.c
index 7754c7338e4b..ba55ecdfb245 100644
--- a/arch/frv/kernel/irq-mb93493.c
+++ b/arch/frv/kernel/irq-mb93493.c
@@ -120,14 +120,12 @@ static struct irqaction mb93493_irq[2]  = {
         [0] = {
                 .handler        = mb93493_interrupt,
                 .flags          = IRQF_DISABLED | IRQF_SHARED,
-                .mask           = CPU_MASK_NONE,
                 .name           = "mb93493.0",
                 .dev_id         = (void *) __addr_MB93493_IQSR(0),
         },
         [1] = {
                 .handler        = mb93493_interrupt,
                 .flags          = IRQF_DISABLED | IRQF_SHARED,
-                .mask           = CPU_MASK_NONE,
                 .name           = "mb93493.1",
                 .dev_id         = (void *) __addr_MB93493_IQSR(1),
         }
diff --git a/arch/frv/kernel/time.c b/arch/frv/kernel/time.c
index 69f6a4ef5d61..fb0ce7577225 100644
--- a/arch/frv/kernel/time.c
+++ b/arch/frv/kernel/time.c
@@ -45,7 +45,6 @@ static irqreturn_t timer_interrupt(int irq, void *dummy);
 static struct irqaction timer_irq  = {
         .handler = timer_interrupt,
         .flags = IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "timer",
 };
 
diff --git a/arch/h8300/kernel/timer/itu.c b/arch/h8300/kernel/timer/itu.c
index d1c926596b08..4883ba7103a8 100644
--- a/arch/h8300/kernel/timer/itu.c
+++ b/arch/h8300/kernel/timer/itu.c
@@ -60,7 +60,6 @@ static struct irqaction itu_irq = {
         .name           = "itu",
         .handler        = timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_TIMER,
-        .mask           = CPU_MASK_NONE,
 };
 
 static const int __initdata divide_rate[] = {1, 2, 4, 8};
diff --git a/arch/h8300/kernel/timer/timer16.c b/arch/h8300/kernel/timer/timer16.c
index e14271b72119..042dbb53f3fb 100644
--- a/arch/h8300/kernel/timer/timer16.c
+++ b/arch/h8300/kernel/timer/timer16.c
@@ -55,7 +55,6 @@ static struct irqaction timer16_irq = {
         .name           = "timer-16",
         .handler        = timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_TIMER,
-        .mask           = CPU_MASK_NONE,
 };
 
 static const int __initdata divide_rate[] = {1, 2, 4, 8};
diff --git a/arch/h8300/kernel/timer/timer8.c b/arch/h8300/kernel/timer/timer8.c
index 0556d7c7bea6..38be0cabef0d 100644
--- a/arch/h8300/kernel/timer/timer8.c
+++ b/arch/h8300/kernel/timer/timer8.c
@@ -75,7 +75,6 @@ static struct irqaction timer8_irq = {
         .name           = "timer-8",
         .handler        = timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_TIMER,
-        .mask           = CPU_MASK_NONE,
 };
 
 static const int __initdata divide_rate[] = {8, 64, 8192};
diff --git a/arch/h8300/kernel/timer/tpu.c b/arch/h8300/kernel/timer/tpu.c
index df7f453a9673..ad383caae196 100644
--- a/arch/h8300/kernel/timer/tpu.c
+++ b/arch/h8300/kernel/timer/tpu.c
@@ -65,7 +65,6 @@ static struct irqaction tpu_irq = {
         .name           = "tpu",
         .handler        = timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_TIMER,
-        .mask           = CPU_MASK_NONE,
 };
 
 const static int __initdata divide_rate[] = {
diff --git a/arch/ia64/dig/Makefile b/arch/ia64/dig/Makefile
index 5c0283830bd6..2f7caddf093e 100644
--- a/arch/ia64/dig/Makefile
+++ b/arch/ia64/dig/Makefile
@@ -7,8 +7,8 @@
 
 obj-y := setup.o
 ifeq ($(CONFIG_DMAR), y)
-obj-$(CONFIG_IA64_GENERIC) += machvec.o machvec_vtd.o dig_vtd_iommu.o
+obj-$(CONFIG_IA64_GENERIC) += machvec.o machvec_vtd.o
 else
 obj-$(CONFIG_IA64_GENERIC) += machvec.o
 endif
-obj-$(CONFIG_IA64_DIG_VTD) += dig_vtd_iommu.o
+
diff --git a/arch/ia64/dig/dig_vtd_iommu.c b/arch/ia64/dig/dig_vtd_iommu.c
deleted file mode 100644
index 1c8a079017a3..000000000000
--- a/arch/ia64/dig/dig_vtd_iommu.c
+++ /dev/null
@@ -1,59 +0,0 @@
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/intel-iommu.h>
-
-void *
-vtd_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
-                 gfp_t flags)
-{
-        return intel_alloc_coherent(dev, size, dma_handle, flags);
-}
-EXPORT_SYMBOL_GPL(vtd_alloc_coherent);
-
-void
-vtd_free_coherent(struct device *dev, size_t size, void *vaddr,
-                 dma_addr_t dma_handle)
-{
-        intel_free_coherent(dev, size, vaddr, dma_handle);
-}
-EXPORT_SYMBOL_GPL(vtd_free_coherent);
-
-dma_addr_t
-vtd_map_single_attrs(struct device *dev, void *addr, size_t size,
-                     int dir, struct dma_attrs *attrs)
-{
-        return intel_map_single(dev, (phys_addr_t)addr, size, dir);
-}
-EXPORT_SYMBOL_GPL(vtd_map_single_attrs);
-
-void
-vtd_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
-                       int dir, struct dma_attrs *attrs)
-{
-        intel_unmap_single(dev, iova, size, dir);
-}
-EXPORT_SYMBOL_GPL(vtd_unmap_single_attrs);
-
-int
-vtd_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
-                 int dir, struct dma_attrs *attrs)
-{
-        return intel_map_sg(dev, sglist, nents, dir);
-}
-EXPORT_SYMBOL_GPL(vtd_map_sg_attrs);
-
-void
-vtd_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist,
-                   int nents, int dir, struct dma_attrs *attrs)
-{
-        intel_unmap_sg(dev, sglist, nents, dir);
-}
-EXPORT_SYMBOL_GPL(vtd_unmap_sg_attrs);
-
-int
-vtd_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
-{
-        return 0;
-}
-EXPORT_SYMBOL_GPL(vtd_dma_mapping_error);
diff --git a/arch/ia64/hp/common/hwsw_iommu.c b/arch/ia64/hp/common/hwsw_iommu.c
index 2769dbfd03bf..e4a80d82e3d8 100644
--- a/arch/ia64/hp/common/hwsw_iommu.c
+++ b/arch/ia64/hp/common/hwsw_iommu.c
@@ -13,49 +13,34 @@
  */
 
 #include <linux/device.h>
+#include <linux/dma-mapping.h>
 #include <linux/swiotlb.h>
-
 #include <asm/machvec.h>
 
+extern struct dma_map_ops sba_dma_ops, swiotlb_dma_ops;
+
 /* swiotlb declarations & definitions: */
 extern int swiotlb_late_init_with_default_size (size_t size);
 
-/* hwiommu declarations & definitions: */
-
-extern ia64_mv_dma_alloc_coherent       sba_alloc_coherent;
-extern ia64_mv_dma_free_coherent        sba_free_coherent;
-extern ia64_mv_dma_map_single_attrs     sba_map_single_attrs;
-extern ia64_mv_dma_unmap_single_attrs   sba_unmap_single_attrs;
-extern ia64_mv_dma_map_sg_attrs         sba_map_sg_attrs;
-extern ia64_mv_dma_unmap_sg_attrs       sba_unmap_sg_attrs;
-extern ia64_mv_dma_supported            sba_dma_supported;
-extern ia64_mv_dma_mapping_error        sba_dma_mapping_error;
-
-#define hwiommu_alloc_coherent          sba_alloc_coherent
-#define hwiommu_free_coherent           sba_free_coherent
-#define hwiommu_map_single_attrs        sba_map_single_attrs
-#define hwiommu_unmap_single_attrs      sba_unmap_single_attrs
-#define hwiommu_map_sg_attrs            sba_map_sg_attrs
-#define hwiommu_unmap_sg_attrs          sba_unmap_sg_attrs
-#define hwiommu_dma_supported           sba_dma_supported
-#define hwiommu_dma_mapping_error       sba_dma_mapping_error
-#define hwiommu_sync_single_for_cpu     machvec_dma_sync_single
-#define hwiommu_sync_sg_for_cpu         machvec_dma_sync_sg
-#define hwiommu_sync_single_for_device  machvec_dma_sync_single
-#define hwiommu_sync_sg_for_device      machvec_dma_sync_sg
-
-
 /*
  * Note: we need to make the determination of whether or not to use
  * the sw I/O TLB based purely on the device structure.  Anything else
  * would be unreliable or would be too intrusive.
  */
-static inline int
-use_swiotlb (struct device *dev)
+static inline int use_swiotlb(struct device *dev)
 {
-        return dev && dev->dma_mask && !hwiommu_dma_supported(dev, *dev->dma_mask);
+        return dev && dev->dma_mask &&
+                !sba_dma_ops.dma_supported(dev, *dev->dma_mask);
 }
 
+struct dma_map_ops *hwsw_dma_get_ops(struct device *dev)
+{
+        if (use_swiotlb(dev))
+                return &swiotlb_dma_ops;
+        return &sba_dma_ops;
+}
+EXPORT_SYMBOL(hwsw_dma_get_ops);
+
 void __init
 hwsw_init (void)
 {
@@ -71,125 +56,3 @@ hwsw_init (void)
 #endif
         }
 }
-
-void *
-hwsw_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags)
-{
-        if (use_swiotlb(dev))
-                return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
-        else
-                return hwiommu_alloc_coherent(dev, size, dma_handle, flags);
-}
-
-void
-hwsw_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
-{
-        if (use_swiotlb(dev))
-                swiotlb_free_coherent(dev, size, vaddr, dma_handle);
-        else
-                hwiommu_free_coherent(dev, size, vaddr, dma_handle);
-}
-
-dma_addr_t
-hwsw_map_single_attrs(struct device *dev, void *addr, size_t size, int dir,
-                       struct dma_attrs *attrs)
-{
-        if (use_swiotlb(dev))
-                return swiotlb_map_single_attrs(dev, addr, size, dir, attrs);
-        else
-                return hwiommu_map_single_attrs(dev, addr, size, dir, attrs);
-}
-EXPORT_SYMBOL(hwsw_map_single_attrs);
-
-void
-hwsw_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
-                         int dir, struct dma_attrs *attrs)
-{
-        if (use_swiotlb(dev))
-                return swiotlb_unmap_single_attrs(dev, iova, size, dir, attrs);
-        else
-                return hwiommu_unmap_single_attrs(dev, iova, size, dir, attrs);
-}
-EXPORT_SYMBOL(hwsw_unmap_single_attrs);
-
-int
-hwsw_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
-                   int dir, struct dma_attrs *attrs)
-{
-        if (use_swiotlb(dev))
-                return swiotlb_map_sg_attrs(dev, sglist, nents, dir, attrs);
-        else
-                return hwiommu_map_sg_attrs(dev, sglist, nents, dir, attrs);
-}
-EXPORT_SYMBOL(hwsw_map_sg_attrs);
-
-void
-hwsw_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
-                     int dir, struct dma_attrs *attrs)
-{
-        if (use_swiotlb(dev))
-                return swiotlb_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
-        else
-                return hwiommu_unmap_sg_attrs(dev, sglist, nents, dir, attrs);
-}
-EXPORT_SYMBOL(hwsw_unmap_sg_attrs);
-
-void
-hwsw_sync_single_for_cpu (struct device *dev, dma_addr_t addr, size_t size, int dir)
-{
-        if (use_swiotlb(dev))
-                swiotlb_sync_single_for_cpu(dev, addr, size, dir);
-        else
-                hwiommu_sync_single_for_cpu(dev, addr, size, dir);
-}
-
-void
-hwsw_sync_sg_for_cpu (struct device *dev, struct scatterlist *sg, int nelems, int dir)
-{
-        if (use_swiotlb(dev))
-                swiotlb_sync_sg_for_cpu(dev, sg, nelems, dir);
-        else
-                hwiommu_sync_sg_for_cpu(dev, sg, nelems, dir);
-}
-
-void
-hwsw_sync_single_for_device (struct device *dev, dma_addr_t addr, size_t size, int dir)
-{
-        if (use_swiotlb(dev))
-                swiotlb_sync_single_for_device(dev, addr, size, dir);
-        else
-                hwiommu_sync_single_for_device(dev, addr, size, dir);
-}
-
-void
-hwsw_sync_sg_for_device (struct device *dev, struct scatterlist *sg, int nelems, int dir)
-{
-        if (use_swiotlb(dev))
-                swiotlb_sync_sg_for_device(dev, sg, nelems, dir);
-        else
-                hwiommu_sync_sg_for_device(dev, sg, nelems, dir);
-}
-
-int
-hwsw_dma_supported (struct device *dev, u64 mask)
-{
-        if (hwiommu_dma_supported(dev, mask))
-                return 1;
-        return swiotlb_dma_supported(dev, mask);
-}
-
-int
-hwsw_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
-{
-        return hwiommu_dma_mapping_error(dev, dma_addr) ||
-                swiotlb_dma_mapping_error(dev, dma_addr);
-}
-
-EXPORT_SYMBOL(hwsw_dma_mapping_error);
-EXPORT_SYMBOL(hwsw_dma_supported);
-EXPORT_SYMBOL(hwsw_alloc_coherent);
-EXPORT_SYMBOL(hwsw_free_coherent);
-EXPORT_SYMBOL(hwsw_sync_single_for_cpu);
-EXPORT_SYMBOL(hwsw_sync_single_for_device);
-EXPORT_SYMBOL(hwsw_sync_sg_for_cpu);
-EXPORT_SYMBOL(hwsw_sync_sg_for_device);
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index 6d5e6c5630e3..56ceb68eb99d 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -36,6 +36,7 @@
 #include <linux/bitops.h>         /* hweight64() */
 #include <linux/crash_dump.h>
 #include <linux/iommu-helper.h>
+#include <linux/dma-mapping.h>
 
 #include <asm/delay.h>          /* ia64_get_itc() */
 #include <asm/io.h>
@@ -908,11 +909,13 @@ sba_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt)
  *
  * See Documentation/PCI/PCI-DMA-mapping.txt
  */
-dma_addr_t
-sba_map_single_attrs(struct device *dev, void *addr, size_t size, int dir,
-                     struct dma_attrs *attrs)
+static dma_addr_t sba_map_page(struct device *dev, struct page *page,
+                               unsigned long poff, size_t size,
+                               enum dma_data_direction dir,
+                               struct dma_attrs *attrs)
 {
         struct ioc *ioc;
+        void *addr = page_address(page) + poff;
         dma_addr_t iovp;
         dma_addr_t offset;
         u64 *pdir_start;
@@ -990,7 +993,14 @@ sba_map_single_attrs(struct device *dev, void *addr, size_t size, int dir,
 #endif
         return SBA_IOVA(ioc, iovp, offset);
 }
-EXPORT_SYMBOL(sba_map_single_attrs);
+
+static dma_addr_t sba_map_single_attrs(struct device *dev, void *addr,
+                                       size_t size, enum dma_data_direction dir,
+                                       struct dma_attrs *attrs)
+{
+        return sba_map_page(dev, virt_to_page(addr),
+                            (unsigned long)addr & ~PAGE_MASK, size, dir, attrs);
+}
 
 #ifdef ENABLE_MARK_CLEAN
 static SBA_INLINE void
@@ -1026,8 +1036,8 @@ sba_mark_clean(struct ioc *ioc, dma_addr_t iova, size_t size)
  *
  * See Documentation/PCI/PCI-DMA-mapping.txt
  */
-void sba_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
-                            int dir, struct dma_attrs *attrs)
+static void sba_unmap_page(struct device *dev, dma_addr_t iova, size_t size,
+                           enum dma_data_direction dir, struct dma_attrs *attrs)
 {
         struct ioc *ioc;
 #if DELAYED_RESOURCE_CNT > 0
@@ -1094,7 +1104,12 @@ void sba_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
         spin_unlock_irqrestore(&ioc->res_lock, flags);
 #endif /* DELAYED_RESOURCE_CNT == 0 */
 }
-EXPORT_SYMBOL(sba_unmap_single_attrs);
+
+void sba_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size,
+                            enum dma_data_direction dir, struct dma_attrs *attrs)
+{
+        sba_unmap_page(dev, iova, size, dir, attrs);
+}
 
 /**
  * sba_alloc_coherent - allocate/map shared mem for DMA
@@ -1104,7 +1119,7 @@ EXPORT_SYMBOL(sba_unmap_single_attrs);
  *
  * See Documentation/PCI/PCI-DMA-mapping.txt
  */
-void *
+static void *
 sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flags)
 {
         struct ioc *ioc;
@@ -1167,7 +1182,8 @@ sba_alloc_coherent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp
  *
  * See Documentation/PCI/PCI-DMA-mapping.txt
  */
-void sba_free_coherent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
+static void sba_free_coherent (struct device *dev, size_t size, void *vaddr,
+                               dma_addr_t dma_handle)
 {
         sba_unmap_single_attrs(dev, dma_handle, size, 0, NULL);
         free_pages((unsigned long) vaddr, get_order(size));
@@ -1422,8 +1438,9 @@ sba_coalesce_chunks(struct ioc *ioc, struct device *dev,
  *
  * See Documentation/PCI/PCI-DMA-mapping.txt
  */
-int sba_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
-                     int dir, struct dma_attrs *attrs)
+static int sba_map_sg_attrs(struct device *dev, struct scatterlist *sglist,
+                            int nents, enum dma_data_direction dir,
+                            struct dma_attrs *attrs)
 {
         struct ioc *ioc;
         int coalesced, filled = 0;
@@ -1502,7 +1519,6 @@ int sba_map_sg_attrs(struct device *dev, struct scatterlist *sglist, int nents,
 
         return filled;
 }
-EXPORT_SYMBOL(sba_map_sg_attrs);
 
 /**
  * sba_unmap_sg_attrs - unmap Scatter/Gather list
@@ -1514,8 +1530,9 @@ EXPORT_SYMBOL(sba_map_sg_attrs);
  *
  * See Documentation/PCI/PCI-DMA-mapping.txt
  */
-void sba_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist,
-                        int nents, int dir, struct dma_attrs *attrs)
+static void sba_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist,
+                               int nents, enum dma_data_direction dir,
+                               struct dma_attrs *attrs)
 {
 #ifdef ASSERT_PDIR_SANITY
         struct ioc *ioc;
@@ -1551,7 +1568,6 @@ void sba_unmap_sg_attrs(struct device *dev, struct scatterlist *sglist,
 #endif
 
 }
-EXPORT_SYMBOL(sba_unmap_sg_attrs);
 
 /**************************************************************
 *
@@ -2064,6 +2080,8 @@ static struct acpi_driver acpi_sba_ioc_driver = {
         },
 };
 
+extern struct dma_map_ops swiotlb_dma_ops;
+
 static int __init
 sba_init(void)
 {
@@ -2077,6 +2095,7 @@ sba_init(void)
          * a successful kdump kernel boot is to use the swiotlb.
          */
         if (is_kdump_kernel()) {
+                dma_ops = &swiotlb_dma_ops;
                 if (swiotlb_late_init_with_default_size(64 * (1<<20)) != 0)
                         panic("Unable to initialize software I/O TLB:"
                                   " Try machvec=dig boot option");
@@ -2092,6 +2111,7 @@ sba_init(void)
                  * If we didn't find something sba_iommu can claim, we
                  * need to setup the swiotlb and switch to the dig machvec.
                  */
+                dma_ops = &swiotlb_dma_ops;
                 if (swiotlb_late_init_with_default_size(64 * (1<<20)) != 0)
                         panic("Unable to find SBA IOMMU or initialize "
                               "software I/O TLB: Try machvec=dig boot option");
@@ -2138,15 +2158,13 @@ nosbagart(char *str)
         return 1;
 }
 
-int
-sba_dma_supported (struct device *dev, u64 mask)
+static int sba_dma_supported (struct device *dev, u64 mask)
 {
         /* make sure it's at least 32bit capable */
         return ((mask & 0xFFFFFFFFUL) == 0xFFFFFFFFUL);
 }
 
-int
-sba_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+static int sba_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
         return 0;
 }
@@ -2176,7 +2194,22 @@ sba_page_override(char *str)
 
 __setup("sbapagesize=",sba_page_override);
 
-EXPORT_SYMBOL(sba_dma_mapping_error);
-EXPORT_SYMBOL(sba_dma_supported);
-EXPORT_SYMBOL(sba_alloc_coherent);
-EXPORT_SYMBOL(sba_free_coherent);
+struct dma_map_ops sba_dma_ops = {
+        .alloc_coherent         = sba_alloc_coherent,
+        .free_coherent          = sba_free_coherent,
+        .map_page               = sba_map_page,
+        .unmap_page             = sba_unmap_page,
+        .map_sg                 = sba_map_sg_attrs,
+        .unmap_sg               = sba_unmap_sg_attrs,
+        .sync_single_for_cpu    = machvec_dma_sync_single,
+        .sync_sg_for_cpu        = machvec_dma_sync_sg,
+        .sync_single_for_device = machvec_dma_sync_single,
+        .sync_sg_for_device     = machvec_dma_sync_sg,
+        .dma_supported          = sba_dma_supported,
+        .mapping_error          = sba_dma_mapping_error,
+};
+
+void sba_dma_init(void)
+{
+        dma_ops = &sba_dma_ops;
+}
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index 1f912d927585..36c0009dbece 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -11,99 +11,128 @@
 
 #define ARCH_HAS_DMA_GET_REQUIRED_MASK
 
-struct dma_mapping_ops {
-        int             (*mapping_error)(struct device *dev,
-                                         dma_addr_t dma_addr);
-        void*           (*alloc_coherent)(struct device *dev, size_t size,
-                                dma_addr_t *dma_handle, gfp_t gfp);
-        void            (*free_coherent)(struct device *dev, size_t size,
-                                void *vaddr, dma_addr_t dma_handle);
-        dma_addr_t      (*map_single)(struct device *hwdev, unsigned long ptr,
-                                size_t size, int direction);
-        void            (*unmap_single)(struct device *dev, dma_addr_t addr,
-                                size_t size, int direction);
-        void            (*sync_single_for_cpu)(struct device *hwdev,
-                                dma_addr_t dma_handle, size_t size,
-                                int direction);
-        void            (*sync_single_for_device)(struct device *hwdev,
-                                dma_addr_t dma_handle, size_t size,
-                                int direction);
-        void            (*sync_single_range_for_cpu)(struct device *hwdev,
-                                dma_addr_t dma_handle, unsigned long offset,
-                                size_t size, int direction);
-        void            (*sync_single_range_for_device)(struct device *hwdev,
-                                dma_addr_t dma_handle, unsigned long offset,
-                                size_t size, int direction);
-        void            (*sync_sg_for_cpu)(struct device *hwdev,
-                                struct scatterlist *sg, int nelems,
-                                int direction);
-        void            (*sync_sg_for_device)(struct device *hwdev,
-                                struct scatterlist *sg, int nelems,
-                                int direction);
-        int             (*map_sg)(struct device *hwdev, struct scatterlist *sg,
-                                int nents, int direction);
-        void            (*unmap_sg)(struct device *hwdev,
-                                struct scatterlist *sg, int nents,
-                                int direction);
-        int             (*dma_supported_op)(struct device *hwdev, u64 mask);
-        int             is_phys;
-};
-
-extern struct dma_mapping_ops *dma_ops;
+extern struct dma_map_ops *dma_ops;
 extern struct ia64_machine_vector ia64_mv;
 extern void set_iommu_machvec(void);
 
-#define dma_alloc_coherent(dev, size, handle, gfp)      \
-        platform_dma_alloc_coherent(dev, size, handle, (gfp) | GFP_DMA)
+extern void machvec_dma_sync_single(struct device *, dma_addr_t, size_t,
+                                    enum dma_data_direction);
+extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int,
+                                enum dma_data_direction);
 
-/* coherent mem. is cheap */
-static inline void *
-dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
-                      gfp_t flag)
+static inline void *dma_alloc_coherent(struct device *dev, size_t size,
+                                       dma_addr_t *daddr, gfp_t gfp)
 {
-        return dma_alloc_coherent(dev, size, dma_handle, flag);
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        return ops->alloc_coherent(dev, size, daddr, gfp);
 }
-#define dma_free_coherent       platform_dma_free_coherent
-static inline void
-dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
-                     dma_addr_t dma_handle)
+
+static inline void dma_free_coherent(struct device *dev, size_t size,
+                                     void *caddr, dma_addr_t daddr)
+{
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        ops->free_coherent(dev, size, caddr, daddr);
+}
+
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+
+static inline dma_addr_t dma_map_single_attrs(struct device *dev,
+                                              void *caddr, size_t size,
+                                              enum dma_data_direction dir,
+                                              struct dma_attrs *attrs)
+{
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        return ops->map_page(dev, virt_to_page(caddr),
+                             (unsigned long)caddr & ~PAGE_MASK, size,
+                             dir, attrs);
+}
+
+static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t daddr,
+                                          size_t size,
+                                          enum dma_data_direction dir,
+                                          struct dma_attrs *attrs)
+{
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        ops->unmap_page(dev, daddr, size, dir, attrs);
+}
+
+#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, NULL)
+#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, NULL)
+
+static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
+                                   int nents, enum dma_data_direction dir,
+                                   struct dma_attrs *attrs)
+{
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        return ops->map_sg(dev, sgl, nents, dir, attrs);
+}
+
+static inline void dma_unmap_sg_attrs(struct device *dev,
+                                      struct scatterlist *sgl, int nents,
+                                      enum dma_data_direction dir,
+                                      struct dma_attrs *attrs)
+{
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        ops->unmap_sg(dev, sgl, nents, dir, attrs);
+}
+
+#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL)
+#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL)
+
+static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t daddr,
+                                           size_t size,
+                                           enum dma_data_direction dir)
 {
-        dma_free_coherent(dev, size, cpu_addr, dma_handle);
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        ops->sync_single_for_cpu(dev, daddr, size, dir);
 }
-#define dma_map_single_attrs    platform_dma_map_single_attrs
-static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
-                                        size_t size, int dir)
+
+static inline void dma_sync_sg_for_cpu(struct device *dev,
+                                       struct scatterlist *sgl,
+                                       int nents, enum dma_data_direction dir)
 {
-        return dma_map_single_attrs(dev, cpu_addr, size, dir, NULL);
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        ops->sync_sg_for_cpu(dev, sgl, nents, dir);
 }
-#define dma_map_sg_attrs        platform_dma_map_sg_attrs
-static inline int dma_map_sg(struct device *dev, struct scatterlist *sgl,
-                             int nents, int dir)
+
+static inline void dma_sync_single_for_device(struct device *dev,
+                                              dma_addr_t daddr,
+                                              size_t size,
+                                              enum dma_data_direction dir)
 {
-        return dma_map_sg_attrs(dev, sgl, nents, dir, NULL);
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        ops->sync_single_for_device(dev, daddr, size, dir);
 }
-#define dma_unmap_single_attrs  platform_dma_unmap_single_attrs
-static inline void dma_unmap_single(struct device *dev, dma_addr_t cpu_addr,
-                                    size_t size, int dir)
+
+static inline void dma_sync_sg_for_device(struct device *dev,
+                                          struct scatterlist *sgl,
+                                          int nents,
+                                          enum dma_data_direction dir)
 {
-        return dma_unmap_single_attrs(dev, cpu_addr, size, dir, NULL);
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        ops->sync_sg_for_device(dev, sgl, nents, dir);
 }
-#define dma_unmap_sg_attrs      platform_dma_unmap_sg_attrs
-static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sgl,
-                                int nents, int dir)
+
+static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr)
+{
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        return ops->mapping_error(dev, daddr);
+}
+
+static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
+                                      size_t offset, size_t size,
+                                      enum dma_data_direction dir)
 {
-        return dma_unmap_sg_attrs(dev, sgl, nents, dir, NULL);
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        return ops->map_page(dev, page, offset, size, dir, NULL);
 }
-#define dma_sync_single_for_cpu platform_dma_sync_single_for_cpu
-#define dma_sync_sg_for_cpu     platform_dma_sync_sg_for_cpu
-#define dma_sync_single_for_device platform_dma_sync_single_for_device
-#define dma_sync_sg_for_device  platform_dma_sync_sg_for_device
-#define dma_mapping_error       platform_dma_mapping_error
 
-#define dma_map_page(dev, pg, off, size, dir)                           \
-        dma_map_single(dev, page_address(pg) + (off), (size), (dir))
-#define dma_unmap_page(dev, dma_addr, size, dir)                        \
-        dma_unmap_single(dev, dma_addr, size, dir)
+static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
+                                  size_t size, enum dma_data_direction dir)
+{
+        dma_unmap_single(dev, addr, size, dir);
+}
 
 /*
  * Rest of this file is part of the "Advanced DMA API".  Use at your own risk.
@@ -115,7 +144,11 @@ static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sgl,
 #define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir)    \
         dma_sync_single_for_device(dev, dma_handle, size, dir)
 
-#define dma_supported           platform_dma_supported
+static inline int dma_supported(struct device *dev, u64 mask)
+{
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
+        return ops->dma_supported(dev, mask);
+}
 
 static inline int
 dma_set_mask (struct device *dev, u64 mask)
@@ -141,11 +174,4 @@ dma_cache_sync (struct device *dev, void *vaddr, size_t size,
 
 #define dma_is_consistent(d, h) (1)     /* all we do is coherent memory... */
 
-static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
-{
-        return dma_ops;
-}
-
-
-
 #endif /* _ASM_IA64_DMA_MAPPING_H */
diff --git a/arch/ia64/include/asm/machvec.h b/arch/ia64/include/asm/machvec.h
index fe87b2121707..367d299d9938 100644
--- a/arch/ia64/include/asm/machvec.h
+++ b/arch/ia64/include/asm/machvec.h
@@ -11,7 +11,6 @@
 #define _ASM_IA64_MACHVEC_H
 
 #include <linux/types.h>
-#include <linux/swiotlb.h>
 
 /* forward declarations: */
 struct device;
@@ -45,24 +44,8 @@ typedef void ia64_mv_kernel_launch_event_t(void);
 
 /* DMA-mapping interface: */
 typedef void ia64_mv_dma_init (void);
-typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, gfp_t);
-typedef void ia64_mv_dma_free_coherent (struct device *, size_t, void *, dma_addr_t);
-typedef dma_addr_t ia64_mv_dma_map_single (struct device *, void *, size_t, int);
-typedef void ia64_mv_dma_unmap_single (struct device *, dma_addr_t, size_t, int);
-typedef int ia64_mv_dma_map_sg (struct device *, struct scatterlist *, int, int);
-typedef void ia64_mv_dma_unmap_sg (struct device *, struct scatterlist *, int, int);
-typedef void ia64_mv_dma_sync_single_for_cpu (struct device *, dma_addr_t, size_t, int);
-typedef void ia64_mv_dma_sync_sg_for_cpu (struct device *, struct scatterlist *, int, int);
-typedef void ia64_mv_dma_sync_single_for_device (struct device *, dma_addr_t, size_t, int);
-typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist *, int, int);
-typedef int ia64_mv_dma_mapping_error(struct device *, dma_addr_t dma_addr);
-typedef int ia64_mv_dma_supported (struct device *, u64);
-
-typedef dma_addr_t ia64_mv_dma_map_single_attrs (struct device *, void *, size_t, int, struct dma_attrs *);
-typedef void ia64_mv_dma_unmap_single_attrs (struct device *, dma_addr_t, size_t, int, struct dma_attrs *);
-typedef int ia64_mv_dma_map_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *);
-typedef void ia64_mv_dma_unmap_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *);
 typedef u64 ia64_mv_dma_get_required_mask (struct device *);
+typedef struct dma_map_ops *ia64_mv_dma_get_ops(struct device *);
 
 /*
  * WARNING: The legacy I/O space is _architected_.  Platforms are
@@ -114,8 +97,6 @@ machvec_noop_bus (struct pci_bus *bus)
 
 extern void machvec_setup (char **);
 extern void machvec_timer_interrupt (int, void *);
-extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int);
-extern void machvec_dma_sync_sg (struct device *, struct scatterlist *, int, int);
 extern void machvec_tlb_migrate_finish (struct mm_struct *);
 
 # if defined (CONFIG_IA64_HP_SIM)
@@ -148,19 +129,8 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *);
 #  define platform_global_tlb_purge     ia64_mv.global_tlb_purge
 #  define platform_tlb_migrate_finish   ia64_mv.tlb_migrate_finish
 #  define platform_dma_init             ia64_mv.dma_init
-#  define platform_dma_alloc_coherent   ia64_mv.dma_alloc_coherent
-#  define platform_dma_free_coherent    ia64_mv.dma_free_coherent
-#  define platform_dma_map_single_attrs ia64_mv.dma_map_single_attrs
-#  define platform_dma_unmap_single_attrs       ia64_mv.dma_unmap_single_attrs
-#  define platform_dma_map_sg_attrs     ia64_mv.dma_map_sg_attrs
-#  define platform_dma_unmap_sg_attrs   ia64_mv.dma_unmap_sg_attrs
-#  define platform_dma_sync_single_for_cpu ia64_mv.dma_sync_single_for_cpu
-#  define platform_dma_sync_sg_for_cpu  ia64_mv.dma_sync_sg_for_cpu
-#  define platform_dma_sync_single_for_device ia64_mv.dma_sync_single_for_device
-#  define platform_dma_sync_sg_for_device ia64_mv.dma_sync_sg_for_device
-#  define platform_dma_mapping_error            ia64_mv.dma_mapping_error
-#  define platform_dma_supported        ia64_mv.dma_supported
 #  define platform_dma_get_required_mask ia64_mv.dma_get_required_mask
+#  define platform_dma_get_ops          ia64_mv.dma_get_ops
 #  define platform_irq_to_vector        ia64_mv.irq_to_vector
 #  define platform_local_vector_to_irq  ia64_mv.local_vector_to_irq
 #  define platform_pci_get_legacy_mem   ia64_mv.pci_get_legacy_mem
@@ -203,19 +173,8 @@ struct ia64_machine_vector {
         ia64_mv_global_tlb_purge_t *global_tlb_purge;
         ia64_mv_tlb_migrate_finish_t *tlb_migrate_finish;
         ia64_mv_dma_init *dma_init;
-        ia64_mv_dma_alloc_coherent *dma_alloc_coherent;
-        ia64_mv_dma_free_coherent *dma_free_coherent;
-        ia64_mv_dma_map_single_attrs *dma_map_single_attrs;
-        ia64_mv_dma_unmap_single_attrs *dma_unmap_single_attrs;
-        ia64_mv_dma_map_sg_attrs *dma_map_sg_attrs;
-        ia64_mv_dma_unmap_sg_attrs *dma_unmap_sg_attrs;
-        ia64_mv_dma_sync_single_for_cpu *dma_sync_single_for_cpu;
-        ia64_mv_dma_sync_sg_for_cpu *dma_sync_sg_for_cpu;
-        ia64_mv_dma_sync_single_for_device *dma_sync_single_for_device;
-        ia64_mv_dma_sync_sg_for_device *dma_sync_sg_for_device;
-        ia64_mv_dma_mapping_error *dma_mapping_error;
-        ia64_mv_dma_supported *dma_supported;
         ia64_mv_dma_get_required_mask *dma_get_required_mask;
+        ia64_mv_dma_get_ops *dma_get_ops;
         ia64_mv_irq_to_vector *irq_to_vector;
         ia64_mv_local_vector_to_irq *local_vector_to_irq;
         ia64_mv_pci_get_legacy_mem_t *pci_get_legacy_mem;
@@ -254,19 +213,8 @@ struct ia64_machine_vector {
         platform_global_tlb_purge,              \
         platform_tlb_migrate_finish,            \
         platform_dma_init,                      \
-        platform_dma_alloc_coherent,            \
-        platform_dma_free_coherent,             \
-        platform_dma_map_single_attrs,          \
-        platform_dma_unmap_single_attrs,        \
-        platform_dma_map_sg_attrs,              \
-        platform_dma_unmap_sg_attrs,            \
-        platform_dma_sync_single_for_cpu,       \
-        platform_dma_sync_sg_for_cpu,           \
-        platform_dma_sync_single_for_device,    \
-        platform_dma_sync_sg_for_device,        \
-        platform_dma_mapping_error,                     \
-        platform_dma_supported,                 \
         platform_dma_get_required_mask,         \
+        platform_dma_get_ops,                   \
         platform_irq_to_vector,                 \
         platform_local_vector_to_irq,           \
         platform_pci_get_legacy_mem,            \
@@ -302,6 +250,9 @@ extern void machvec_init_from_cmdline(const char *cmdline);
 #  error Unknown configuration.  Update arch/ia64/include/asm/machvec.h.
 # endif /* CONFIG_IA64_GENERIC */
 
+extern void swiotlb_dma_init(void);
+extern struct dma_map_ops *dma_get_ops(struct device *);
+
 /*
  * Define default versions so we can extend machvec for new platforms without having
  * to update the machvec files for all existing platforms.
@@ -332,43 +283,10 @@ extern void machvec_init_from_cmdline(const char *cmdline);
 # define platform_kernel_launch_event   machvec_noop
 #endif
 #ifndef platform_dma_init
-# define platform_dma_init              swiotlb_init
-#endif
-#ifndef platform_dma_alloc_coherent
-# define platform_dma_alloc_coherent    swiotlb_alloc_coherent
-#endif
-#ifndef platform_dma_free_coherent
-# define platform_dma_free_coherent     swiotlb_free_coherent
-#endif
-#ifndef platform_dma_map_single_attrs
-# define platform_dma_map_single_attrs  swiotlb_map_single_attrs
-#endif
-#ifndef platform_dma_unmap_single_attrs
-# define platform_dma_unmap_single_attrs        swiotlb_unmap_single_attrs
-#endif
-#ifndef platform_dma_map_sg_attrs
-# define platform_dma_map_sg_attrs      swiotlb_map_sg_attrs
-#endif
-#ifndef platform_dma_unmap_sg_attrs
-# define platform_dma_unmap_sg_attrs    swiotlb_unmap_sg_attrs
-#endif
-#ifndef platform_dma_sync_single_for_cpu
-# define platform_dma_sync_single_for_cpu       swiotlb_sync_single_for_cpu
-#endif
-#ifndef platform_dma_sync_sg_for_cpu
-# define platform_dma_sync_sg_for_cpu           swiotlb_sync_sg_for_cpu
-#endif
-#ifndef platform_dma_sync_single_for_device
-# define platform_dma_sync_single_for_device    swiotlb_sync_single_for_device
-#endif
-#ifndef platform_dma_sync_sg_for_device
-# define platform_dma_sync_sg_for_device        swiotlb_sync_sg_for_device
-#endif
-#ifndef platform_dma_mapping_error
-# define platform_dma_mapping_error             swiotlb_dma_mapping_error
+# define platform_dma_init              swiotlb_dma_init
 #endif
-#ifndef platform_dma_supported
-# define  platform_dma_supported        swiotlb_dma_supported
+#ifndef platform_dma_get_ops
+# define platform_dma_get_ops           dma_get_ops
 #endif
 #ifndef platform_dma_get_required_mask
 # define  platform_dma_get_required_mask        ia64_dma_get_required_mask
diff --git a/arch/ia64/include/asm/machvec_dig_vtd.h b/arch/ia64/include/asm/machvec_dig_vtd.h
index 3400b561e711..6ab1de5c45ef 100644
--- a/arch/ia64/include/asm/machvec_dig_vtd.h
+++ b/arch/ia64/include/asm/machvec_dig_vtd.h
@@ -2,14 +2,6 @@
 #define _ASM_IA64_MACHVEC_DIG_VTD_h
 
 extern ia64_mv_setup_t                  dig_setup;
-extern ia64_mv_dma_alloc_coherent       vtd_alloc_coherent;
-extern ia64_mv_dma_free_coherent        vtd_free_coherent;
-extern ia64_mv_dma_map_single_attrs     vtd_map_single_attrs;
-extern ia64_mv_dma_unmap_single_attrs   vtd_unmap_single_attrs;
-extern ia64_mv_dma_map_sg_attrs         vtd_map_sg_attrs;
-extern ia64_mv_dma_unmap_sg_attrs       vtd_unmap_sg_attrs;
-extern ia64_mv_dma_supported            iommu_dma_supported;
-extern ia64_mv_dma_mapping_error        vtd_dma_mapping_error;
 extern ia64_mv_dma_init                 pci_iommu_alloc;
 
 /*
@@ -22,17 +14,5 @@ extern ia64_mv_dma_init			pci_iommu_alloc;
 #define platform_name                           "dig_vtd"
 #define platform_setup                          dig_setup
 #define platform_dma_init                       pci_iommu_alloc
-#define platform_dma_alloc_coherent             vtd_alloc_coherent
-#define platform_dma_free_coherent              vtd_free_coherent
-#define platform_dma_map_single_attrs           vtd_map_single_attrs
-#define platform_dma_unmap_single_attrs         vtd_unmap_single_attrs
-#define platform_dma_map_sg_attrs               vtd_map_sg_attrs
-#define platform_dma_unmap_sg_attrs             vtd_unmap_sg_attrs
-#define platform_dma_sync_single_for_cpu        machvec_dma_sync_single
-#define platform_dma_sync_sg_for_cpu            machvec_dma_sync_sg
-#define platform_dma_sync_single_for_device     machvec_dma_sync_single
-#define platform_dma_sync_sg_for_device         machvec_dma_sync_sg
-#define platform_dma_supported                  iommu_dma_supported
-#define platform_dma_mapping_error              vtd_dma_mapping_error
 
 #endif /* _ASM_IA64_MACHVEC_DIG_VTD_h */
diff --git a/arch/ia64/include/asm/machvec_hpzx1.h b/arch/ia64/include/asm/machvec_hpzx1.h
index 2f57f5144b9f..3bd83d78a412 100644
--- a/arch/ia64/include/asm/machvec_hpzx1.h
+++ b/arch/ia64/include/asm/machvec_hpzx1.h
@@ -2,14 +2,7 @@
 #define _ASM_IA64_MACHVEC_HPZX1_h
 
 extern ia64_mv_setup_t                  dig_setup;
-extern ia64_mv_dma_alloc_coherent       sba_alloc_coherent;
-extern ia64_mv_dma_free_coherent        sba_free_coherent;
-extern ia64_mv_dma_map_single_attrs     sba_map_single_attrs;
-extern ia64_mv_dma_unmap_single_attrs   sba_unmap_single_attrs;
-extern ia64_mv_dma_map_sg_attrs         sba_map_sg_attrs;
-extern ia64_mv_dma_unmap_sg_attrs       sba_unmap_sg_attrs;
-extern ia64_mv_dma_supported            sba_dma_supported;
-extern ia64_mv_dma_mapping_error        sba_dma_mapping_error;
+extern ia64_mv_dma_init                 sba_dma_init;
 
 /*
  * This stuff has dual use!
@@ -20,18 +13,6 @@ extern ia64_mv_dma_mapping_error	sba_dma_mapping_error;
  */
 #define platform_name                           "hpzx1"
 #define platform_setup                          dig_setup
-#define platform_dma_init                       machvec_noop
-#define platform_dma_alloc_coherent             sba_alloc_coherent
-#define platform_dma_free_coherent              sba_free_coherent
-#define platform_dma_map_single_attrs           sba_map_single_attrs
-#define platform_dma_unmap_single_attrs         sba_unmap_single_attrs
-#define platform_dma_map_sg_attrs               sba_map_sg_attrs
-#define platform_dma_unmap_sg_attrs             sba_unmap_sg_attrs
-#define platform_dma_sync_single_for_cpu        machvec_dma_sync_single
-#define platform_dma_sync_sg_for_cpu            machvec_dma_sync_sg
-#define platform_dma_sync_single_for_device     machvec_dma_sync_single
-#define platform_dma_sync_sg_for_device         machvec_dma_sync_sg
-#define platform_dma_supported                  sba_dma_supported
-#define platform_dma_mapping_error              sba_dma_mapping_error
+#define platform_dma_init                       sba_dma_init
 
 #endif /* _ASM_IA64_MACHVEC_HPZX1_h */
diff --git a/arch/ia64/include/asm/machvec_hpzx1_swiotlb.h b/arch/ia64/include/asm/machvec_hpzx1_swiotlb.h
index a842cdda827b..1091ac39740c 100644
--- a/arch/ia64/include/asm/machvec_hpzx1_swiotlb.h
+++ b/arch/ia64/include/asm/machvec_hpzx1_swiotlb.h
@@ -2,18 +2,7 @@
 #define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h
 
 extern ia64_mv_setup_t                          dig_setup;
-extern ia64_mv_dma_alloc_coherent               hwsw_alloc_coherent;
-extern ia64_mv_dma_free_coherent                hwsw_free_coherent;
-extern ia64_mv_dma_map_single_attrs             hwsw_map_single_attrs;
-extern ia64_mv_dma_unmap_single_attrs           hwsw_unmap_single_attrs;
-extern ia64_mv_dma_map_sg_attrs                 hwsw_map_sg_attrs;
-extern ia64_mv_dma_unmap_sg_attrs               hwsw_unmap_sg_attrs;
-extern ia64_mv_dma_supported                    hwsw_dma_supported;
-extern ia64_mv_dma_mapping_error                hwsw_dma_mapping_error;
-extern ia64_mv_dma_sync_single_for_cpu          hwsw_sync_single_for_cpu;
-extern ia64_mv_dma_sync_sg_for_cpu              hwsw_sync_sg_for_cpu;
-extern ia64_mv_dma_sync_single_for_device       hwsw_sync_single_for_device;
-extern ia64_mv_dma_sync_sg_for_device           hwsw_sync_sg_for_device;
+extern ia64_mv_dma_get_ops                      hwsw_dma_get_ops;
 
 /*
  * This stuff has dual use!
@@ -23,20 +12,8 @@ extern ia64_mv_dma_sync_sg_for_device		hwsw_sync_sg_for_device;
  * the macros are used directly.
  */
 #define platform_name                           "hpzx1_swiotlb"
-
 #define platform_setup                          dig_setup
 #define platform_dma_init                       machvec_noop
-#define platform_dma_alloc_coherent             hwsw_alloc_coherent
-#define platform_dma_free_coherent              hwsw_free_coherent
-#define platform_dma_map_single_attrs           hwsw_map_single_attrs
-#define platform_dma_unmap_single_attrs         hwsw_unmap_single_attrs
-#define platform_dma_map_sg_attrs               hwsw_map_sg_attrs
-#define platform_dma_unmap_sg_attrs             hwsw_unmap_sg_attrs
-#define platform_dma_supported                  hwsw_dma_supported
-#define platform_dma_mapping_error              hwsw_dma_mapping_error
-#define platform_dma_sync_single_for_cpu        hwsw_sync_single_for_cpu
-#define platform_dma_sync_sg_for_cpu            hwsw_sync_sg_for_cpu
-#define platform_dma_sync_single_for_device     hwsw_sync_single_for_device
-#define platform_dma_sync_sg_for_device         hwsw_sync_sg_for_device
+#define platform_dma_get_ops                    hwsw_dma_get_ops
 
 #endif /* _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h */
diff --git a/arch/ia64/include/asm/machvec_sn2.h b/arch/ia64/include/asm/machvec_sn2.h
index f1a6e0d6dfa5..f061a30aac42 100644
--- a/arch/ia64/include/asm/machvec_sn2.h
+++ b/arch/ia64/include/asm/machvec_sn2.h
@@ -55,19 +55,8 @@ extern ia64_mv_readb_t __sn_readb_relaxed;
 extern ia64_mv_readw_t __sn_readw_relaxed;
 extern ia64_mv_readl_t __sn_readl_relaxed;
 extern ia64_mv_readq_t __sn_readq_relaxed;
-extern ia64_mv_dma_alloc_coherent       sn_dma_alloc_coherent;
-extern ia64_mv_dma_free_coherent        sn_dma_free_coherent;
-extern ia64_mv_dma_map_single_attrs     sn_dma_map_single_attrs;
-extern ia64_mv_dma_unmap_single_attrs   sn_dma_unmap_single_attrs;
-extern ia64_mv_dma_map_sg_attrs         sn_dma_map_sg_attrs;
-extern ia64_mv_dma_unmap_sg_attrs       sn_dma_unmap_sg_attrs;
-extern ia64_mv_dma_sync_single_for_cpu  sn_dma_sync_single_for_cpu;
-extern ia64_mv_dma_sync_sg_for_cpu      sn_dma_sync_sg_for_cpu;
-extern ia64_mv_dma_sync_single_for_device sn_dma_sync_single_for_device;
-extern ia64_mv_dma_sync_sg_for_device   sn_dma_sync_sg_for_device;
-extern ia64_mv_dma_mapping_error        sn_dma_mapping_error;
-extern ia64_mv_dma_supported            sn_dma_supported;
 extern ia64_mv_dma_get_required_mask    sn_dma_get_required_mask;
+extern ia64_mv_dma_init                 sn_dma_init;
 extern ia64_mv_migrate_t                sn_migrate;
 extern ia64_mv_kernel_launch_event_t    sn_kernel_launch_event;
 extern ia64_mv_setup_msi_irq_t          sn_setup_msi_irq;
@@ -111,20 +100,8 @@ extern ia64_mv_pci_fixup_bus_t		sn_pci_fixup_bus;
 #define platform_pci_get_legacy_mem     sn_pci_get_legacy_mem
 #define platform_pci_legacy_read        sn_pci_legacy_read
 #define platform_pci_legacy_write       sn_pci_legacy_write
-#define platform_dma_init               machvec_noop
-#define platform_dma_alloc_coherent     sn_dma_alloc_coherent
-#define platform_dma_free_coherent      sn_dma_free_coherent
-#define platform_dma_map_single_attrs   sn_dma_map_single_attrs
-#define platform_dma_unmap_single_attrs sn_dma_unmap_single_attrs
-#define platform_dma_map_sg_attrs       sn_dma_map_sg_attrs
-#define platform_dma_unmap_sg_attrs     sn_dma_unmap_sg_attrs
-#define platform_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu
-#define platform_dma_sync_sg_for_cpu    sn_dma_sync_sg_for_cpu
-#define platform_dma_sync_single_for_device sn_dma_sync_single_for_device
-#define platform_dma_sync_sg_for_device sn_dma_sync_sg_for_device
-#define platform_dma_mapping_error              sn_dma_mapping_error
-#define platform_dma_supported          sn_dma_supported
 #define platform_dma_get_required_mask  sn_dma_get_required_mask
+#define platform_dma_init               sn_dma_init
 #define platform_migrate                sn_migrate
 #define platform_kernel_launch_event    sn_kernel_launch_event
 #ifdef CONFIG_PCI_MSI
diff --git a/arch/ia64/include/asm/topology.h b/arch/ia64/include/asm/topology.h
index 3193f4417e16..f260dcf21515 100644
--- a/arch/ia64/include/asm/topology.h
+++ b/arch/ia64/include/asm/topology.h
@@ -44,11 +44,6 @@
 #define parent_node(nid) (nid)
 
 /*
- * Returns the number of the first CPU on Node 'node'.
- */
-#define node_to_first_cpu(node) (cpumask_first(cpumask_of_node(node)))
-
-/*
  * Determines the node for a given pci bus
  */
 #define pcibus_to_node(bus) PCI_CONTROLLER(bus)->node
diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile
index c381ea954892..f2778f2c4fd9 100644
--- a/arch/ia64/kernel/Makefile
+++ b/arch/ia64/kernel/Makefile
@@ -7,7 +7,7 @@ extra-y	:= head.o init_task.o vmlinux.lds
 obj-y := acpi.o entry.o efi.o efi_stub.o gate-data.o fsys.o ia64_ksyms.o irq.o irq_ia64.o       \
          irq_lsapic.o ivt.o machvec.o pal.o patch.o process.o perfmon.o ptrace.o sal.o          \
          salinfo.o setup.o signal.o sys_ia64.o time.o traps.o unaligned.o \
-         unwind.o mca.o mca_asm.o topology.o
+         unwind.o mca.o mca_asm.o topology.o dma-mapping.o
 
 obj-$(CONFIG_IA64_BRL_EMU)      += brl_emu.o
 obj-$(CONFIG_IA64_GENERIC)      += acpi-ext.o
@@ -43,9 +43,7 @@ ifneq ($(CONFIG_IA64_ESI),)
 obj-y                           += esi_stub.o   # must be in kernel proper
 endif
 obj-$(CONFIG_DMAR)              += pci-dma.o
-ifeq ($(CONFIG_DMAR), y)
 obj-$(CONFIG_SWIOTLB)           += pci-swiotlb.o
-endif
 
 # The gate DSO image is built using a special linker script.
 targets += gate.so gate-syms.o
diff --git a/arch/ia64/kernel/dma-mapping.c b/arch/ia64/kernel/dma-mapping.c
new file mode 100644
index 000000000000..086a2aeb0404
--- /dev/null
+++ b/arch/ia64/kernel/dma-mapping.c
@@ -0,0 +1,13 @@
+#include <linux/dma-mapping.h>
+
+/* Set this to 1 if there is a HW IOMMU in the system */
+int iommu_detected __read_mostly;
+
+struct dma_map_ops *dma_ops;
+EXPORT_SYMBOL(dma_ops);
+
+struct dma_map_ops *dma_get_ops(struct device *dev)
+{
+        return dma_ops;
+}
+EXPORT_SYMBOL(dma_get_ops);
diff --git a/arch/ia64/kernel/machvec.c b/arch/ia64/kernel/machvec.c
index 7ccb228ceedc..d41a40ef80c0 100644
--- a/arch/ia64/kernel/machvec.c
+++ b/arch/ia64/kernel/machvec.c
@@ -1,5 +1,5 @@
 #include <linux/module.h>
-
+#include <linux/dma-mapping.h>
 #include <asm/machvec.h>
 #include <asm/system.h>
 
@@ -75,14 +75,16 @@ machvec_timer_interrupt (int irq, void *dev_id)
 EXPORT_SYMBOL(machvec_timer_interrupt);
 
 void
-machvec_dma_sync_single (struct device *hwdev, dma_addr_t dma_handle, size_t size, int dir)
+machvec_dma_sync_single(struct device *hwdev, dma_addr_t dma_handle, size_t size,
+                        enum dma_data_direction dir)
 {
         mb();
 }
 EXPORT_SYMBOL(machvec_dma_sync_single);
 
 void
-machvec_dma_sync_sg (struct device *hwdev, struct scatterlist *sg, int n, int dir)
+machvec_dma_sync_sg(struct device *hwdev, struct scatterlist *sg, int n,
+                    enum dma_data_direction dir)
 {
         mb();
 }
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c
index e5c57f413ca2..a4f19c70aadd 100644
--- a/arch/ia64/kernel/palinfo.c
+++ b/arch/ia64/kernel/palinfo.c
@@ -1002,8 +1002,6 @@ create_palinfo_proc_entries(unsigned int cpu)
                 *pdir = create_proc_read_entry(
                                 palinfo_entries[j].name, 0, cpu_dir,
                                 palinfo_read_entry, (void *)f.value);
-                if (*pdir)
-                        (*pdir)->owner = THIS_MODULE;
                 pdir++;
         }
 }
diff --git a/arch/ia64/kernel/pci-dma.c b/arch/ia64/kernel/pci-dma.c
index d0ada067a4af..e4cb443bb988 100644
--- a/arch/ia64/kernel/pci-dma.c
+++ b/arch/ia64/kernel/pci-dma.c
@@ -32,9 +32,6 @@ int force_iommu __read_mostly = 1;
 int force_iommu __read_mostly;
 #endif
 
-/* Set this to 1 if there is a HW IOMMU in the system */
-int iommu_detected __read_mostly;
-
 /* Dummy device used for NULL arguments (normally ISA). Better would
    be probably a smaller DMA mask, but this is bug-to-bug compatible
    to i386. */
@@ -44,18 +41,7 @@ struct device fallback_dev = {
         .dma_mask = &fallback_dev.coherent_dma_mask,
 };
 
-void __init pci_iommu_alloc(void)
-{
-        /*
-         * The order of these functions is important for
-         * fall-back/fail-over reasons
-         */
-        detect_intel_iommu();
-
-#ifdef CONFIG_SWIOTLB
-        pci_swiotlb_init();
-#endif
-}
+extern struct dma_map_ops intel_dma_ops;
 
 static int __init pci_iommu_init(void)
 {
@@ -79,15 +65,12 @@ iommu_dma_init(void)
         return;
 }
 
-struct dma_mapping_ops *dma_ops;
-EXPORT_SYMBOL(dma_ops);
-
 int iommu_dma_supported(struct device *dev, u64 mask)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        struct dma_map_ops *ops = platform_dma_get_ops(dev);
 
-        if (ops->dma_supported_op)
-                return ops->dma_supported_op(dev, mask);
+        if (ops->dma_supported)
+                return ops->dma_supported(dev, mask);
 
         /* Copied from i386. Doesn't make much sense, because it will
            only work for pci_alloc_coherent.
@@ -116,4 +99,25 @@ int iommu_dma_supported(struct device *dev, u64 mask)
 }
 EXPORT_SYMBOL(iommu_dma_supported);
 
+void __init pci_iommu_alloc(void)
+{
+        dma_ops = &intel_dma_ops;
+
+        dma_ops->sync_single_for_cpu = machvec_dma_sync_single;
+        dma_ops->sync_sg_for_cpu = machvec_dma_sync_sg;
+        dma_ops->sync_single_for_device = machvec_dma_sync_single;
+        dma_ops->sync_sg_for_device = machvec_dma_sync_sg;
+        dma_ops->dma_supported = iommu_dma_supported;
+
+        /*
+         * The order of these functions is important for
+         * fall-back/fail-over reasons
+         */
+        detect_intel_iommu();
+
+#ifdef CONFIG_SWIOTLB
+        pci_swiotlb_init();
+#endif
+}
+
 #endif
diff --git a/arch/ia64/kernel/pci-swiotlb.c b/arch/ia64/kernel/pci-swiotlb.c
index 16c50516dbc1..573f02c39a00 100644
--- a/arch/ia64/kernel/pci-swiotlb.c
+++ b/arch/ia64/kernel/pci-swiotlb.c
@@ -13,23 +13,37 @@
 int swiotlb __read_mostly;
 EXPORT_SYMBOL(swiotlb);
 
-struct dma_mapping_ops swiotlb_dma_ops = {
-        .mapping_error = swiotlb_dma_mapping_error,
-        .alloc_coherent = swiotlb_alloc_coherent,
+static void *ia64_swiotlb_alloc_coherent(struct device *dev, size_t size,
+                                         dma_addr_t *dma_handle, gfp_t gfp)
+{
+        if (dev->coherent_dma_mask != DMA_64BIT_MASK)
+                gfp |= GFP_DMA;
+        return swiotlb_alloc_coherent(dev, size, dma_handle, gfp);
+}
+
+struct dma_map_ops swiotlb_dma_ops = {
+        .alloc_coherent = ia64_swiotlb_alloc_coherent,
         .free_coherent = swiotlb_free_coherent,
-        .map_single = swiotlb_map_single,
-        .unmap_single = swiotlb_unmap_single,
+        .map_page = swiotlb_map_page,
+        .unmap_page = swiotlb_unmap_page,
+        .map_sg = swiotlb_map_sg_attrs,
+        .unmap_sg = swiotlb_unmap_sg_attrs,
         .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
         .sync_single_for_device = swiotlb_sync_single_for_device,
         .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
         .sync_single_range_for_device = swiotlb_sync_single_range_for_device,
         .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
         .sync_sg_for_device = swiotlb_sync_sg_for_device,
-        .map_sg = swiotlb_map_sg,
-        .unmap_sg = swiotlb_unmap_sg,
-        .dma_supported_op = swiotlb_dma_supported,
+        .dma_supported = swiotlb_dma_supported,
+        .mapping_error = swiotlb_dma_mapping_error,
 };
 
+void __init swiotlb_dma_init(void)
+{
+        dma_ops = &swiotlb_dma_ops;
+        swiotlb_init();
+}
+
 void __init pci_swiotlb_init(void)
 {
         if (!iommu_detected) {
diff --git a/arch/ia64/sn/kernel/sn2/prominfo_proc.c b/arch/ia64/sn/kernel/sn2/prominfo_proc.c
index 4dcce3d0e04c..e63328818643 100644
--- a/arch/ia64/sn/kernel/sn2/prominfo_proc.c
+++ b/arch/ia64/sn/kernel/sn2/prominfo_proc.c
@@ -225,7 +225,6 @@ static struct proc_dir_entry *sgi_prominfo_entry;
 int __init prominfo_init(void)
 {
         struct proc_dir_entry **entp;
-        struct proc_dir_entry *p;
         cnodeid_t cnodeid;
         unsigned long nasid;
         int size;
@@ -246,14 +245,10 @@ int __init prominfo_init(void)
                 sprintf(name, "node%d", cnodeid);
                 *entp = proc_mkdir(name, sgi_prominfo_entry);
                 nasid = cnodeid_to_nasid(cnodeid);
-                p = create_proc_read_entry("fit", 0, *entp, read_fit_entry,
+                create_proc_read_entry("fit", 0, *entp, read_fit_entry,
                                            (void *)nasid);
-                if (p)
-                        p->owner = THIS_MODULE;
-                p = create_proc_read_entry("version", 0, *entp,
+                create_proc_read_entry("version", 0, *entp,
                                            read_version_entry, (void *)nasid);
-                if (p)
-                        p->owner = THIS_MODULE;
                 entp++;
         }
 
diff --git a/arch/ia64/sn/pci/pci_dma.c b/arch/ia64/sn/pci/pci_dma.c
index 863f5017baae..8c130e8f00e1 100644
--- a/arch/ia64/sn/pci/pci_dma.c
+++ b/arch/ia64/sn/pci/pci_dma.c
@@ -10,7 +10,7 @@
  */
 
 #include <linux/module.h>
-#include <linux/dma-attrs.h>
+#include <linux/dma-mapping.h>
 #include <asm/dma.h>
 #include <asm/sn/intr.h>
 #include <asm/sn/pcibus_provider_defs.h>
@@ -31,7 +31,7 @@
  * this function.  Of course, SN only supports devices that have 32 or more
  * address bits when using the PMU.
  */
-int sn_dma_supported(struct device *dev, u64 mask)
+static int sn_dma_supported(struct device *dev, u64 mask)
 {
         BUG_ON(dev->bus != &pci_bus_type);
 
@@ -39,7 +39,6 @@ int sn_dma_supported(struct device *dev, u64 mask)
                 return 0;
         return 1;
 }
-EXPORT_SYMBOL(sn_dma_supported);
 
 /**
  * sn_dma_set_mask - set the DMA mask
@@ -75,8 +74,8 @@ EXPORT_SYMBOL(sn_dma_set_mask);
  * queue for a SCSI controller).  See Documentation/DMA-API.txt for
  * more information.
  */
-void *sn_dma_alloc_coherent(struct device *dev, size_t size,
-                            dma_addr_t * dma_handle, gfp_t flags)
+static void *sn_dma_alloc_coherent(struct device *dev, size_t size,
+                                   dma_addr_t * dma_handle, gfp_t flags)
 {
         void *cpuaddr;
         unsigned long phys_addr;
@@ -124,7 +123,6 @@ void *sn_dma_alloc_coherent(struct device *dev, size_t size,
 
         return cpuaddr;
 }
-EXPORT_SYMBOL(sn_dma_alloc_coherent);
 
 /**
  * sn_pci_free_coherent - free memory associated with coherent DMAable region
@@ -136,8 +134,8 @@ EXPORT_SYMBOL(sn_dma_alloc_coherent);
  * Frees the memory allocated by dma_alloc_coherent(), potentially unmapping
  * any associated IOMMU mappings.
  */
-void sn_dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
-                          dma_addr_t dma_handle)
+static void sn_dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
+                                 dma_addr_t dma_handle)
 {
         struct pci_dev *pdev = to_pci_dev(dev);
         struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
@@ -147,7 +145,6 @@ void sn_dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
         provider->dma_unmap(pdev, dma_handle, 0);
         free_pages((unsigned long)cpu_addr, get_order(size));
 }
-EXPORT_SYMBOL(sn_dma_free_coherent);
 
 /**
  * sn_dma_map_single_attrs - map a single page for DMA
@@ -173,10 +170,12 @@ EXPORT_SYMBOL(sn_dma_free_coherent);
  * TODO: simplify our interface;
  *       figure out how to save dmamap handle so can use two step.
  */
-dma_addr_t sn_dma_map_single_attrs(struct device *dev, void *cpu_addr,
-                                   size_t size, int direction,
-                                   struct dma_attrs *attrs)
+static dma_addr_t sn_dma_map_page(struct device *dev, struct page *page,
+                                  unsigned long offset, size_t size,
+                                  enum dma_data_direction dir,
+                                  struct dma_attrs *attrs)
 {
+        void *cpu_addr = page_address(page) + offset;
         dma_addr_t dma_addr;
         unsigned long phys_addr;
         struct pci_dev *pdev = to_pci_dev(dev);
@@ -201,7 +200,6 @@ dma_addr_t sn_dma_map_single_attrs(struct device *dev, void *cpu_addr,
         }
         return dma_addr;
 }
-EXPORT_SYMBOL(sn_dma_map_single_attrs);
 
 /**
  * sn_dma_unmap_single_attrs - unamp a DMA mapped page
@@ -215,21 +213,20 @@ EXPORT_SYMBOL(sn_dma_map_single_attrs);
  * by @dma_handle into the coherence domain.  On SN, we're always cache
  * coherent, so we just need to free any ATEs associated with this mapping.
  */
-void sn_dma_unmap_single_attrs(struct device *dev, dma_addr_t dma_addr,
-                               size_t size, int direction,
-                               struct dma_attrs *attrs)
+static void sn_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
+                              size_t size, enum dma_data_direction dir,
+                              struct dma_attrs *attrs)
 {
         struct pci_dev *pdev = to_pci_dev(dev);
         struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
 
         BUG_ON(dev->bus != &pci_bus_type);
 
-        provider->dma_unmap(pdev, dma_addr, direction);
+        provider->dma_unmap(pdev, dma_addr, dir);
 }
-EXPORT_SYMBOL(sn_dma_unmap_single_attrs);
 
 /**
- * sn_dma_unmap_sg_attrs - unmap a DMA scatterlist
+ * sn_dma_unmap_sg - unmap a DMA scatterlist
  * @dev: device to unmap
  * @sg: scatterlist to unmap
  * @nhwentries: number of scatterlist entries
@@ -238,9 +235,9 @@ EXPORT_SYMBOL(sn_dma_unmap_single_attrs);
  *
  * Unmap a set of streaming mode DMA translations.
  */
-void sn_dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sgl,
-                           int nhwentries, int direction,
-                           struct dma_attrs *attrs)
+static void sn_dma_unmap_sg(struct device *dev, struct scatterlist *sgl,
+                            int nhwentries, enum dma_data_direction dir,
+                            struct dma_attrs *attrs)
 {
         int i;
         struct pci_dev *pdev = to_pci_dev(dev);
@@ -250,15 +247,14 @@ void sn_dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sgl,
         BUG_ON(dev->bus != &pci_bus_type);
 
         for_each_sg(sgl, sg, nhwentries, i) {
-                provider->dma_unmap(pdev, sg->dma_address, direction);
+                provider->dma_unmap(pdev, sg->dma_address, dir);
                 sg->dma_address = (dma_addr_t) NULL;
                 sg->dma_length = 0;
         }
 }
-EXPORT_SYMBOL(sn_dma_unmap_sg_attrs);
 
 /**
- * sn_dma_map_sg_attrs - map a scatterlist for DMA
+ * sn_dma_map_sg - map a scatterlist for DMA
  * @dev: device to map for
  * @sg: scatterlist to map
  * @nhwentries: number of entries
@@ -272,8 +268,9 @@ EXPORT_SYMBOL(sn_dma_unmap_sg_attrs);
  *
  * Maps each entry of @sg for DMA.
  */
-int sn_dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
-                        int nhwentries, int direction, struct dma_attrs *attrs)
+static int sn_dma_map_sg(struct device *dev, struct scatterlist *sgl,
+                         int nhwentries, enum dma_data_direction dir,
+                         struct dma_attrs *attrs)
 {
         unsigned long phys_addr;
         struct scatterlist *saved_sg = sgl, *sg;
@@ -310,8 +307,7 @@ int sn_dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
                          * Free any successfully allocated entries.
                          */
                         if (i > 0)
-                                sn_dma_unmap_sg_attrs(dev, saved_sg, i,
-                                                      direction, attrs);
+                                sn_dma_unmap_sg(dev, saved_sg, i, dir, attrs);
                         return 0;
                 }
 
@@ -320,41 +316,36 @@ int sn_dma_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
 
         return nhwentries;
 }
-EXPORT_SYMBOL(sn_dma_map_sg_attrs);
 
-void sn_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
-                                size_t size, int direction)
+static void sn_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+                                       size_t size, enum dma_data_direction dir)
 {
         BUG_ON(dev->bus != &pci_bus_type);
 }
-EXPORT_SYMBOL(sn_dma_sync_single_for_cpu);
 
-void sn_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
-                                   size_t size, int direction)
+static void sn_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
+                                          size_t size,
+                                          enum dma_data_direction dir)
 {
         BUG_ON(dev->bus != &pci_bus_type);
 }
-EXPORT_SYMBOL(sn_dma_sync_single_for_device);
 
-void sn_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
-                            int nelems, int direction)
+static void sn_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+                                   int nelems, enum dma_data_direction dir)
 {
         BUG_ON(dev->bus != &pci_bus_type);
 }
-EXPORT_SYMBOL(sn_dma_sync_sg_for_cpu);
 
-void sn_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
-                               int nelems, int direction)
+static void sn_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
+                                      int nelems, enum dma_data_direction dir)
 {
         BUG_ON(dev->bus != &pci_bus_type);
 }
-EXPORT_SYMBOL(sn_dma_sync_sg_for_device);
 
-int sn_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+static int sn_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
         return 0;
 }
-EXPORT_SYMBOL(sn_dma_mapping_error);
 
 u64 sn_dma_get_required_mask(struct device *dev)
 {
@@ -471,3 +462,23 @@ int sn_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
  out:
         return ret;
 }
+
+static struct dma_map_ops sn_dma_ops = {
+        .alloc_coherent         = sn_dma_alloc_coherent,
+        .free_coherent          = sn_dma_free_coherent,
+        .map_page               = sn_dma_map_page,
+        .unmap_page             = sn_dma_unmap_page,
+        .map_sg                 = sn_dma_map_sg,
+        .unmap_sg               = sn_dma_unmap_sg,
+        .sync_single_for_cpu    = sn_dma_sync_single_for_cpu,
+        .sync_sg_for_cpu        = sn_dma_sync_sg_for_cpu,
+        .sync_single_for_device = sn_dma_sync_single_for_device,
+        .sync_sg_for_device     = sn_dma_sync_sg_for_device,
+        .mapping_error          = sn_dma_mapping_error,
+        .dma_supported          = sn_dma_supported,
+};
+
+void sn_dma_init(void)
+{
+        dma_ops = &sn_dma_ops;
+}
diff --git a/arch/m32r/kernel/time.c b/arch/m32r/kernel/time.c
index 6ea017727cce..cada3ba4b990 100644
--- a/arch/m32r/kernel/time.c
+++ b/arch/m32r/kernel/time.c
@@ -230,7 +230,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
 static struct irqaction irq0 = {
         .handler = timer_interrupt,
         .flags = IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "MFT2",
 };
 
diff --git a/arch/m68k/include/asm/ide.h b/arch/m68k/include/asm/ide.h
index b996a3c8cff5..3958726664ba 100644
--- a/arch/m68k/include/asm/ide.h
+++ b/arch/m68k/include/asm/ide.h
@@ -30,101 +30,28 @@
 #define _M68K_IDE_H
 
 #ifdef __KERNEL__
-
-
 #include <asm/setup.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 
-#ifdef CONFIG_ATARI
-#include <linux/interrupt.h>
-#include <asm/atari_stdma.h>
-#endif
-
-#ifdef CONFIG_MAC
-#include <asm/macints.h>
-#endif
-
 /*
  * Get rid of defs from io.h - ide has its private and conflicting versions
  * Since so far no single m68k platform uses ISA/PCI I/O space for IDE, we
  * always use the `raw' MMIO versions
  */
-#undef inb
-#undef inw
-#undef insw
-#undef inl
-#undef insl
-#undef outb
-#undef outw
-#undef outsw
-#undef outl
-#undef outsl
 #undef readb
 #undef readw
-#undef readl
 #undef writeb
 #undef writew
-#undef writel
 
-#define inb                             in_8
-#define inw                             in_be16
-#define insw(port, addr, n)             raw_insw((u16 *)port, addr, n)
-#define inl                             in_be32
-#define insl(port, addr, n)             raw_insl((u32 *)port, addr, n)
-#define outb(val, port)                 out_8(port, val)
-#define outw(val, port)                 out_be16(port, val)
-#define outsw(port, addr, n)            raw_outsw((u16 *)port, addr, n)
-#define outl(val, port)                 out_be32(port, val)
-#define outsl(port, addr, n)            raw_outsl((u32 *)port, addr, n)
 #define readb                           in_8
 #define readw                           in_be16
 #define __ide_mm_insw(port, addr, n)    raw_insw((u16 *)port, addr, n)
-#define readl                           in_be32
 #define __ide_mm_insl(port, addr, n)    raw_insl((u32 *)port, addr, n)
 #define writeb(val, port)               out_8(port, val)
 #define writew(val, port)               out_be16(port, val)
 #define __ide_mm_outsw(port, addr, n)   raw_outsw((u16 *)port, addr, n)
-#define writel(val, port)               out_be32(port, val)
 #define __ide_mm_outsl(port, addr, n)   raw_outsl((u32 *)port, addr, n)
-#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
-#define insw_swapw(port, addr, n)       raw_insw_swapw((u16 *)port, addr, n)
-#define outsw_swapw(port, addr, n)      raw_outsw_swapw((u16 *)port, addr, n)
-#endif
-
-#ifdef CONFIG_BLK_DEV_FALCON_IDE
-#define IDE_ARCH_LOCK
-
-extern int falconide_intr_lock;
-
-static __inline__ void ide_release_lock (void)
-{
-        if (MACH_IS_ATARI) {
-                if (falconide_intr_lock == 0) {
-                        printk("ide_release_lock: bug\n");
-                        return;
-                }
-                falconide_intr_lock = 0;
-                stdma_release();
-        }
-}
-
-static __inline__ void
-ide_get_lock(irq_handler_t handler, void *data)
-{
-        if (MACH_IS_ATARI) {
-                if (falconide_intr_lock == 0) {
-                        if (in_interrupt() > 0)
-                                panic( "Falcon IDE hasn't ST-DMA lock in interrupt" );
-                        stdma_lock(handler, data);
-                        falconide_intr_lock = 1;
-                }
-        }
-}
-#endif /* CONFIG_BLK_DEV_FALCON_IDE */
-
-#define IDE_ARCH_ACK_INTR
-#define ide_ack_intr(hwif)      ((hwif)->ack_intr ? (hwif)->ack_intr(hwif) : 1)
 
 #endif /* __KERNEL__ */
 #endif /* _M68K_IDE_H */
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 206cb7953b0c..dc787190430a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -77,7 +77,6 @@ config MIPS_COBALT
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_64BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
-        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config MACH_DECSTATION
         bool "DECstations"
@@ -132,7 +131,6 @@ config MACH_JAZZ
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
         select SYS_SUPPORTS_100HZ
-        select GENERIC_HARDIRQS_NO__DO_IRQ
         help
          This a family of machines based on the MIPS R4030 chipset which was
          used by several vendors to build RISC/os and Windows NT workstations.
@@ -154,7 +152,6 @@ config LASAT
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
         select SYS_SUPPORTS_LITTLE_ENDIAN
-        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config LEMOTE_FULONG
         bool "Lemote Fulong mini-PC"
@@ -175,7 +172,6 @@ config LEMOTE_FULONG
         select SYS_SUPPORTS_LITTLE_ENDIAN
         select SYS_SUPPORTS_HIGHMEM
         select SYS_HAS_EARLY_PRINTK
-        select GENERIC_HARDIRQS_NO__DO_IRQ
         select GENERIC_ISA_DMA_SUPPORT_BROKEN
         select CPU_HAS_WB
         help
@@ -250,7 +246,6 @@ config MACH_VR41XX
         select CEVT_R4K
         select CSRC_R4K
         select SYS_HAS_CPU_VR41XX
-        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config NXP_STB220
         bool "NXP STB220 board"
@@ -364,7 +359,6 @@ config SGI_IP27
         select SYS_SUPPORTS_BIG_ENDIAN
         select SYS_SUPPORTS_NUMA
         select SYS_SUPPORTS_SMP
-        select GENERIC_HARDIRQS_NO__DO_IRQ
         help
           This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
           workstations.  To compile a Linux kernel that runs on these, say Y
@@ -563,7 +557,6 @@ config MIKROTIK_RB532
         select CEVT_R4K
         select CSRC_R4K
         select DMA_NONCOHERENT
-        select GENERIC_HARDIRQS_NO__DO_IRQ
         select HW_HAS_PCI
         select IRQ_CPU
         select SYS_HAS_CPU_MIPS32_R1
@@ -700,8 +693,7 @@ config SCHED_OMIT_FRAME_POINTER
         default y
 
 config GENERIC_HARDIRQS_NO__DO_IRQ
-        bool
-        default n
+        def_bool y
 
 #
 # Select some configuration options automatically based on user selections.
@@ -920,7 +912,6 @@ config SOC_PNX833X
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
         select SYS_SUPPORTS_BIG_ENDIAN
-        select GENERIC_HARDIRQS_NO__DO_IRQ
         select GENERIC_GPIO
         select CPU_MIPSR2_IRQ_VI
 
@@ -939,7 +930,6 @@ config SOC_PNX8550
         select SYS_HAS_CPU_MIPS32_R1
         select SYS_HAS_EARLY_PRINTK
         select SYS_SUPPORTS_32BIT_KERNEL
-        select GENERIC_HARDIRQS_NO__DO_IRQ
         select GENERIC_GPIO
 
 config SWAP_IO_SPACE
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 22dab2e14348..8d544c7c9fe9 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -720,11 +720,17 @@ ifdef CONFIG_MIPS32_O32
         $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32"
 endif
 
+install:
+        $(Q)install -D -m 755 vmlinux $(INSTALL_PATH)/vmlinux-$(KERNELRELEASE)
+        $(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE)
+        $(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE)
+
 archclean:
         @$(MAKE) $(clean)=arch/mips/boot
         @$(MAKE) $(clean)=arch/mips/lasat
 
 define archhelp
+        echo '  install              - install kernel into $(INSTALL_PATH)'
         echo '  vmlinux.ecoff        - ECOFF boot image'
         echo '  vmlinux.bin          - Raw binary boot image'
         echo '  vmlinux.srec         - SREC boot image'
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 7f8ef13d0014..8128aebfb155 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -134,4 +134,4 @@ config SOC_AU1X00
         select SYS_HAS_CPU_MIPS32_R1
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_APM_EMULATION
-        select GENERIC_HARDIRQS_NO__DO_IRQ
+        select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/mips/alchemy/common/gpio.c b/arch/mips/alchemy/common/gpio.c
index e660ddd611c4..91a9c4436c39 100644
--- a/arch/mips/alchemy/common/gpio.c
+++ b/arch/mips/alchemy/common/gpio.c
@@ -1,5 +1,5 @@
 /*
- *  Copyright (C) 2007, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
+ *  Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
  *      Architecture specific GPIO support
  *
  *  This program is free software; you can redistribute  it and/or modify it
@@ -27,122 +27,175 @@
  *      others have a second one : GPIO2
  */
 
+#include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/types.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
 
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/gpio.h>
 
-#define gpio1 sys
-#if !defined(CONFIG_SOC_AU1000)
-
-static struct au1x00_gpio2 *const gpio2 = (struct au1x00_gpio2 *) GPIO2_BASE;
-#define GPIO2_OUTPUT_ENABLE_MASK        0x00010000
+struct au1000_gpio_chip {
+        struct gpio_chip        chip;
+        void __iomem            *regbase;
+};
 
-static int au1xxx_gpio2_read(unsigned gpio)
+#if !defined(CONFIG_SOC_AU1000)
+static int au1000_gpio2_get(struct gpio_chip *chip, unsigned offset)
 {
-        gpio -= AU1XXX_GPIO_BASE;
-        return ((gpio2->pinstate >> gpio) & 0x01);
+        u32 mask = 1 << offset;
+        struct au1000_gpio_chip *gpch;
+
+        gpch = container_of(chip, struct au1000_gpio_chip, chip);
+        return readl(gpch->regbase + AU1000_GPIO2_ST) & mask;
 }
 
-static void au1xxx_gpio2_write(unsigned gpio, int value)
+static void au1000_gpio2_set(struct gpio_chip *chip,
+                                unsigned offset, int value)
 {
-        gpio -= AU1XXX_GPIO_BASE;
+        u32 mask = ((GPIO2_OUT_EN_MASK << offset) | (!!value << offset));
+        struct au1000_gpio_chip *gpch;
+        unsigned long flags;
+
+        gpch = container_of(chip, struct au1000_gpio_chip, chip);
 
-        gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio);
+        local_irq_save(flags);
+        writel(mask, gpch->regbase + AU1000_GPIO2_OUT);
+        local_irq_restore(flags);
 }
 
-static int au1xxx_gpio2_direction_input(unsigned gpio)
+static int au1000_gpio2_direction_input(struct gpio_chip *chip, unsigned offset)
 {
-        gpio -= AU1XXX_GPIO_BASE;
-        gpio2->dir &= ~(0x01 << gpio);
+        u32 mask = 1 << offset;
+        u32 tmp;
+        struct au1000_gpio_chip *gpch;
+        unsigned long flags;
+
+        gpch = container_of(chip, struct au1000_gpio_chip, chip);
+
+        local_irq_save(flags);
+        tmp = readl(gpch->regbase + AU1000_GPIO2_DIR);
+        tmp &= ~mask;
+        writel(tmp, gpch->regbase + AU1000_GPIO2_DIR);
+        local_irq_restore(flags);
+
         return 0;
 }
 
-static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
+static int au1000_gpio2_direction_output(struct gpio_chip *chip,
+                                        unsigned offset, int value)
 {
-        gpio -= AU1XXX_GPIO_BASE;
-        gpio2->dir |= 0x01 << gpio;
-        gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio);
+        u32 mask = 1 << offset;
+        u32 out_mask = ((GPIO2_OUT_EN_MASK << offset) | (!!value << offset));
+        u32 tmp;
+        struct au1000_gpio_chip *gpch;
+        unsigned long flags;
+
+        gpch = container_of(chip, struct au1000_gpio_chip, chip);
+
+        local_irq_save(flags);
+        tmp = readl(gpch->regbase + AU1000_GPIO2_DIR);
+        tmp |= mask;
+        writel(tmp, gpch->regbase + AU1000_GPIO2_DIR);
+        writel(out_mask, gpch->regbase + AU1000_GPIO2_OUT);
+        local_irq_restore(flags);
+
         return 0;
 }
-
 #endif /* !defined(CONFIG_SOC_AU1000) */
 
-static int au1xxx_gpio1_read(unsigned gpio)
+static int au1000_gpio1_get(struct gpio_chip *chip, unsigned offset)
 {
-        return (gpio1->pinstaterd >> gpio) & 0x01;
+        u32 mask = 1 << offset;
+        struct au1000_gpio_chip *gpch;
+
+        gpch = container_of(chip, struct au1000_gpio_chip, chip);
+        return readl(gpch->regbase + AU1000_GPIO1_ST) & mask;
 }
 
-static void au1xxx_gpio1_write(unsigned gpio, int value)
+static void au1000_gpio1_set(struct gpio_chip *chip,
+                                unsigned offset, int value)
 {
+        u32 mask = 1 << offset;
+        u32 reg_offset;
+        struct au1000_gpio_chip *gpch;
+        unsigned long flags;
+
+        gpch = container_of(chip, struct au1000_gpio_chip, chip);
+
         if (value)
-                gpio1->outputset = (0x01 << gpio);
+                reg_offset = AU1000_GPIO1_OUT;
         else
-                /* Output a zero */
-                gpio1->outputclr = (0x01 << gpio);
-}
+                reg_offset = AU1000_GPIO1_CLR;
 
-static int au1xxx_gpio1_direction_input(unsigned gpio)
-{
-        gpio1->pininputen = (0x01 << gpio);
-        return 0;
+        local_irq_save(flags);
+        writel(mask, gpch->regbase + reg_offset);
+        local_irq_restore(flags);
 }
 
-static int au1xxx_gpio1_direction_output(unsigned gpio, int value)
+static int au1000_gpio1_direction_input(struct gpio_chip *chip, unsigned offset)
 {
-        gpio1->trioutclr = (0x01 & gpio);
-        au1xxx_gpio1_write(gpio, value);
+        u32 mask = 1 << offset;
+        struct au1000_gpio_chip *gpch;
+
+        gpch = container_of(chip, struct au1000_gpio_chip, chip);
+        writel(mask, gpch->regbase + AU1000_GPIO1_ST);
+
         return 0;
 }
 
-int au1xxx_gpio_get_value(unsigned gpio)
+static int au1000_gpio1_direction_output(struct gpio_chip *chip,
+                                        unsigned offset, int value)
 {
-        if (gpio >= AU1XXX_GPIO_BASE)
-#if defined(CONFIG_SOC_AU1000)
-                return 0;
-#else
-                return au1xxx_gpio2_read(gpio);
-#endif
-        else
-                return au1xxx_gpio1_read(gpio);
-}
-EXPORT_SYMBOL(au1xxx_gpio_get_value);
+        u32 mask = 1 << offset;
+        struct au1000_gpio_chip *gpch;
 
-void au1xxx_gpio_set_value(unsigned gpio, int value)
-{
-        if (gpio >= AU1XXX_GPIO_BASE)
-#if defined(CONFIG_SOC_AU1000)
-                ;
-#else
-                au1xxx_gpio2_write(gpio, value);
-#endif
-        else
-                au1xxx_gpio1_write(gpio, value);
-}
-EXPORT_SYMBOL(au1xxx_gpio_set_value);
+        gpch = container_of(chip, struct au1000_gpio_chip, chip);
 
-int au1xxx_gpio_direction_input(unsigned gpio)
-{
-        if (gpio >= AU1XXX_GPIO_BASE)
-#if defined(CONFIG_SOC_AU1000)
-                return -ENODEV;
-#else
-                return au1xxx_gpio2_direction_input(gpio);
-#endif
+        writel(mask, gpch->regbase + AU1000_GPIO1_TRI_OUT);
+        au1000_gpio1_set(chip, offset, value);
 
-        return au1xxx_gpio1_direction_input(gpio);
+        return 0;
 }
-EXPORT_SYMBOL(au1xxx_gpio_direction_input);
 
-int au1xxx_gpio_direction_output(unsigned gpio, int value)
+struct au1000_gpio_chip au1000_gpio_chip[] = {
+        [0] = {
+                .regbase                        = (void __iomem *)SYS_BASE,
+                .chip = {
+                        .label                  = "au1000-gpio1",
+                        .direction_input        = au1000_gpio1_direction_input,
+                        .direction_output       = au1000_gpio1_direction_output,
+                        .get                    = au1000_gpio1_get,
+                        .set                    = au1000_gpio1_set,
+                        .base                   = 0,
+                        .ngpio                  = 32,
+                },
+        },
+#if !defined(CONFIG_SOC_AU1000)
+        [1] = {
+                .regbase                        = (void __iomem *)GPIO2_BASE,
+                .chip = {
+                        .label                  = "au1000-gpio2",
+                        .direction_input        = au1000_gpio2_direction_input,
+                        .direction_output       = au1000_gpio2_direction_output,
+                        .get                    = au1000_gpio2_get,
+                        .set                    = au1000_gpio2_set,
+                        .base                   = AU1XXX_GPIO_BASE,
+                        .ngpio                  = 32,
+                },
+        },
+#endif
+};
+
+static int __init au1000_gpio_init(void)
 {
-        if (gpio >= AU1XXX_GPIO_BASE)
-#if defined(CONFIG_SOC_AU1000)
-                return -ENODEV;
-#else
-                return au1xxx_gpio2_direction_output(gpio, value);
+        gpiochip_add(&au1000_gpio_chip[0].chip);
+#if !defined(CONFIG_SOC_AU1000)
+        gpiochip_add(&au1000_gpio_chip[1].chip);
 #endif
 
-        return au1xxx_gpio1_direction_output(gpio, value);
+        return 0;
 }
-EXPORT_SYMBOL(au1xxx_gpio_direction_output);
+arch_initcall(au1000_gpio_init);
+
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c
index 95303297c534..0d68e1985ffd 100644
--- a/arch/mips/alchemy/devboards/pb1200/platform.c
+++ b/arch/mips/alchemy/devboards/pb1200/platform.c
@@ -22,6 +22,7 @@
 #include <linux/init.h>
 #include <linux/leds.h>
 #include <linux/platform_device.h>
+#include <linux/smc91x.h>
 
 #include <asm/mach-au1x00/au1xxx.h>
 #include <asm/mach-au1x00/au1100_mmc.h>
@@ -131,6 +132,12 @@ static struct platform_device ide_device = {
         .resource       = ide_resources
 };
 
+static struct smc91x_platdata smc_data = {
+        .flags  = SMC91X_NOWAIT | SMC91X_USE_16BIT,
+        .leda   = RPC_LED_100_10,
+        .ledb   = RPC_LED_TX_RX,
+};
+
 static struct resource smc91c111_resources[] = {
         [0] = {
                 .name   = "smc91x-regs",
@@ -146,6 +153,9 @@ static struct resource smc91c111_resources[] = {
 };
 
 static struct platform_device smc91c111_device = {
+        .dev    = {
+                .platform_data  = &smc_data,
+        },
         .name           = "smc91x",
         .id             = -1,
         .num_resources  = ARRAY_SIZE(smc91c111_resources),
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile
index 1c2a7faf5881..d6903c3f3d51 100644
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@ -14,3 +14,5 @@ obj-y += dma-octeon.o flash_setup.o
 obj-y += octeon-memcpy.o
 
 obj-$(CONFIG_SMP)                     += smp.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/cavium-octeon/flash_setup.c b/arch/mips/cavium-octeon/flash_setup.c
index 553d36cbcc42..008f657116eb 100644
--- a/arch/mips/cavium-octeon/flash_setup.c
+++ b/arch/mips/cavium-octeon/flash_setup.c
@@ -57,7 +57,7 @@ static int __init flash_init(void)
                 flash_map.bankwidth = 1;
                 flash_map.virt = ioremap(flash_map.phys, flash_map.size);
                 pr_notice("Bootbus flash: Setting flash for %luMB flash at "
-                          "0x%08lx\n", flash_map.size >> 20, flash_map.phys);
+                          "0x%08llx\n", flash_map.size >> 20, flash_map.phys);
                 simple_map_init(&flash_map);
                 mymtd = do_map_probe("cfi_probe", &flash_map);
                 if (mymtd) {
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index fc72984a5dae..1c19af8daa62 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -31,7 +31,7 @@ static void octeon_irq_core_ack(unsigned int irq)
 
 static void octeon_irq_core_eoi(unsigned int irq)
 {
-        irq_desc_t *desc = irq_desc + irq;
+        struct irq_desc *desc = irq_desc + irq;
         unsigned int bit = irq - OCTEON_IRQ_SW0;
         /*
          * If an IRQ is being processed while we are disabling it the
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index ac4fb912649d..cb9bf820fe53 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -47,7 +47,6 @@ asmlinkage void plat_irq_dispatch(void)
 
 static struct irqaction cascade = {
         .handler        = no_action,
-        .mask           = CPU_MASK_NONE,
         .name           = "cascade",
 };
 
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index c2583ecc93cf..43828ae796ec 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -80,9 +80,9 @@ void emma2rh_irq_init(void)
         u32 i;
 
         for (i = 0; i < NUM_EMMA2RH_IRQ; i++)
-                set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i,
-                                         &emma2rh_irq_controller,
-                                         handle_level_irq);
+                set_irq_chip_and_handler_name(EMMA2RH_IRQ_BASE + i,
+                                              &emma2rh_irq_controller,
+                                              handle_level_irq, "level");
 }
 
 static void emma2rh_sw_irq_enable(unsigned int irq)
@@ -120,9 +120,9 @@ void emma2rh_sw_irq_init(void)
         u32 i;
 
         for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++)
-                set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i,
-                                         &emma2rh_sw_irq_controller,
-                                         handle_level_irq);
+                set_irq_chip_and_handler_name(EMMA2RH_SW_IRQ_BASE + i,
+                                              &emma2rh_sw_irq_controller,
+                                              handle_level_irq, "level");
 }
 
 static void emma2rh_gpio_irq_enable(unsigned int irq)
@@ -149,37 +149,28 @@ static void emma2rh_gpio_irq_disable(unsigned int irq)
 
 static void emma2rh_gpio_irq_ack(unsigned int irq)
 {
-        u32 reg;
-
         irq -= EMMA2RH_GPIO_IRQ_BASE;
         emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
-
-        reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
-        reg &= ~(1 << irq);
-        emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
 }
 
-static void emma2rh_gpio_irq_end(unsigned int irq)
+static void emma2rh_gpio_irq_mask_ack(unsigned int irq)
 {
         u32 reg;
 
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-
-                irq -= EMMA2RH_GPIO_IRQ_BASE;
+        irq -= EMMA2RH_GPIO_IRQ_BASE;
+        emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
 
-                reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
-                reg |= 1 << irq;
-                emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
-        }
+        reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+        reg &= ~(1 << irq);
+        emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
 }
 
 struct irq_chip emma2rh_gpio_irq_controller = {
         .name = "emma2rh_gpio_irq",
         .ack = emma2rh_gpio_irq_ack,
         .mask = emma2rh_gpio_irq_disable,
-        .mask_ack = emma2rh_gpio_irq_ack,
+        .mask_ack = emma2rh_gpio_irq_mask_ack,
         .unmask = emma2rh_gpio_irq_enable,
-        .end = emma2rh_gpio_irq_end,
 };
 
 void emma2rh_gpio_irq_init(void)
@@ -187,14 +178,14 @@ void emma2rh_gpio_irq_init(void)
         u32 i;
 
         for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
-                set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i,
-                             &emma2rh_gpio_irq_controller);
+                set_irq_chip_and_handler_name(EMMA2RH_GPIO_IRQ_BASE + i,
+                                              &emma2rh_gpio_irq_controller,
+                                              handle_edge_irq, "edge");
 }
 
 static struct irqaction irq_cascade = {
            .handler = no_action,
            .flags = 0,
-           .mask = CPU_MASK_NONE,
            .name = "cascade",
            .dev_id = NULL,
            .next = NULL,
@@ -213,8 +204,7 @@ void emma2rh_irq_dispatch(void)
                     emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
 
 #ifdef EMMA2RH_SW_CASCADE
-        if (intStatus &
-            (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+        if (intStatus & (1UL << EMMA2RH_SW_CASCADE)) {
                 u32 swIntStatus;
                 swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
                     & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
@@ -225,6 +215,8 @@ void emma2rh_irq_dispatch(void)
                         }
                 }
         }
+        /* Skip S/W interrupt */
+        intStatus &= ~(1UL << EMMA2RH_SW_CASCADE);
 #endif
 
         for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
@@ -238,8 +230,7 @@ void emma2rh_irq_dispatch(void)
                     emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
 
 #ifdef EMMA2RH_GPIO_CASCADE
-        if (intStatus &
-            (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+        if (intStatus & (1UL << (EMMA2RH_GPIO_CASCADE % 32))) {
                 u32 gpioIntStatus;
                 gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
                     & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
@@ -250,6 +241,8 @@ void emma2rh_irq_dispatch(void)
                         }
                 }
         }
+        /* Skip GPIO interrupt */
+        intStatus &= ~(1UL << (EMMA2RH_GPIO_CASCADE % 32));
 #endif
 
         for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
diff --git a/arch/mips/emma/markeins/platform.c b/arch/mips/emma/markeins/platform.c
index d5f47e4f0d18..80ae12ef87db 100644
--- a/arch/mips/emma/markeins/platform.c
+++ b/arch/mips/emma/markeins/platform.c
@@ -110,6 +110,7 @@ struct platform_device i2c_emma_devices[] = {
 static struct  plat_serial8250_port platform_serial_ports[] = {
         [0] = {
                 .membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
+                .mapbase = EMMA2RH_PFUR0_BASE + 3,
                 .irq = EMMA2RH_IRQ_PFUR0,
                 .uartclk = EMMA2RH_SERIAL_CLOCK,
                 .regshift = 4,
@@ -117,6 +118,7 @@ static struct  plat_serial8250_port platform_serial_ports[] = {
                 .flags = EMMA2RH_SERIAL_FLAGS,
        }, [1] = {
                 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
+                .mapbase = EMMA2RH_PFUR1_BASE + 3,
                 .irq = EMMA2RH_IRQ_PFUR1,
                 .uartclk = EMMA2RH_SERIAL_CLOCK,
                 .regshift = 4,
@@ -124,6 +126,7 @@ static struct  plat_serial8250_port platform_serial_ports[] = {
                 .flags = EMMA2RH_SERIAL_FLAGS,
        }, [2] = {
                 .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
+                .mapbase = EMMA2RH_PFUR2_BASE + 3,
                 .irq = EMMA2RH_IRQ_PFUR2,
                 .uartclk = EMMA2RH_SERIAL_CLOCK,
                 .regshift = 4,
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index c018727c7ddc..3bdc0e3d89cc 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -209,8 +209,7 @@ enum cpu_type_enum {
          * MIPS32 class processors
          */
         CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
-        CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500,
-        CPU_AU1550, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
+        CPU_ALCHEMY, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
 
         /*
          * MIPS64 class processors
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index 134e1fc8f4d6..a12d971db4f9 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -87,7 +87,7 @@ do {									\
         : "=r" (tmp));                                                  \
 } while (0)
 
-#elif defined(CONFIG_CPU_MIPSR1)
+#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MACH_ALCHEMY)
 
 /*
  * These are slightly complicated by the fact that we guarantee R1 kernels to
@@ -139,7 +139,7 @@ do {									\
 } while (0)
 
 #elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
-      defined(CONFIG_CPU_R5500)
+      defined(CONFIG_CPU_R5500) || defined(CONFIG_MACH_ALCHEMY)
 
 /*
  * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
diff --git a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
new file mode 100644
index 000000000000..d5df0cab9b87
--- /dev/null
+++ b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
@@ -0,0 +1,49 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_tlb                     1
+#define cpu_has_4kex                    1
+#define cpu_has_3k_cache                0
+#define cpu_has_4k_cache                1
+#define cpu_has_tx39_cache              0
+#define cpu_has_fpu                     0
+#define cpu_has_counter                 1
+#define cpu_has_watch                   1
+#define cpu_has_divec                   1
+#define cpu_has_vce                     0
+#define cpu_has_cache_cdex_p            0
+#define cpu_has_cache_cdex_s            0
+#define cpu_has_mcheck                  1
+#define cpu_has_ejtag                   1
+#define cpu_has_llsc                    1
+#define cpu_has_mips16                  0
+#define cpu_has_mdmx                    0
+#define cpu_has_mips3d                  0
+#define cpu_has_smartmips               0
+#define cpu_has_vtag_icache             0
+#define cpu_has_dc_aliases              0
+#define cpu_has_ic_fills_f_dc           1
+#define cpu_has_mips32r1                1
+#define cpu_has_mips32r2                0
+#define cpu_has_mips64r1                0
+#define cpu_has_mips64r2                0
+#define cpu_has_dsp                     0
+#define cpu_has_mipsmt                  0
+#define cpu_has_userlocal               0
+#define cpu_has_nofpuex                 0
+#define cpu_has_64bits                  0
+#define cpu_has_64bit_zero_reg          0
+#define cpu_has_vint                    0
+#define cpu_has_veic                    0
+#define cpu_has_inclusive_pcaches       0
+
+#define cpu_dcache_line_size()          32
+#define cpu_icache_line_size()          32
+
+#endif /* __ASM_MACH_AU1X00_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-au1x00/gpio.h b/arch/mips/include/asm/mach-au1x00/gpio.h
index 2dc61e009a08..34d9b7279024 100644
--- a/arch/mips/include/asm/mach-au1x00/gpio.h
+++ b/arch/mips/include/asm/mach-au1x00/gpio.h
@@ -5,65 +5,29 @@
 
 #define AU1XXX_GPIO_BASE        200
 
-struct au1x00_gpio2 {
-        u32     dir;
-        u32     reserved;
-        u32     output;
-        u32     pinstate;
-        u32     inten;
-        u32     enable;
-};
+/* GPIO bank 1 offsets */
+#define AU1000_GPIO1_TRI_OUT    0x0100
+#define AU1000_GPIO1_OUT        0x0108
+#define AU1000_GPIO1_ST         0x0110
+#define AU1000_GPIO1_CLR        0x010C
 
-extern int au1xxx_gpio_get_value(unsigned gpio);
-extern void au1xxx_gpio_set_value(unsigned gpio, int value);
-extern int au1xxx_gpio_direction_input(unsigned gpio);
-extern int au1xxx_gpio_direction_output(unsigned gpio, int value);
+/* GPIO bank 2 offsets */
+#define AU1000_GPIO2_DIR        0x00
+#define AU1000_GPIO2_RSVD       0x04
+#define AU1000_GPIO2_OUT        0x08
+#define AU1000_GPIO2_ST         0x0C
+#define AU1000_GPIO2_INT        0x10
+#define AU1000_GPIO2_EN         0x14
 
+#define GPIO2_OUT_EN_MASK       0x00010000
 
-/* Wrappers for the arch-neutral GPIO API */
+#define gpio_to_irq(gpio)       NULL
 
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-        /* Not yet implemented */
-        return 0;
-}
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
 
-static inline void gpio_free(unsigned gpio)
-{
-        /* Not yet implemented */
-}
+#define gpio_cansleep __gpio_cansleep
 
-static inline int gpio_direction_input(unsigned gpio)
-{
-        return au1xxx_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-{
-        return au1xxx_gpio_direction_output(gpio, value);
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
-        return au1xxx_gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
-        au1xxx_gpio_set_value(gpio, value);
-}
-
-static inline int gpio_to_irq(unsigned gpio)
-{
-        return gpio;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
-        return irq;
-}
-
-/* For cansleep */
 #include <asm-generic/gpio.h>
 
 #endif /* _AU1XXX_GPIO_H_ */
diff --git a/arch/mips/include/asm/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h
index 55d481569a1f..07547231e078 100644
--- a/arch/mips/include/asm/mach-ip27/topology.h
+++ b/arch/mips/include/asm/mach-ip27/topology.h
@@ -26,7 +26,6 @@ extern struct cpuinfo_ip27 sn_cpu_info[NR_CPUS];
 #define parent_node(node)       (node)
 #define node_to_cpumask(node)   (hub_data(node)->h_cpus)
 #define cpumask_of_node(node)   (&hub_data(node)->h_cpus)
-#define node_to_first_cpu(node) (cpumask_first(cpumask_of_node(node)))
 struct pci_bus;
 extern int pcibus_to_node(struct pci_bus *);
 
diff --git a/arch/mips/include/asm/mips-boards/generic.h b/arch/mips/include/asm/mips-boards/generic.h
index 7f0b034dd9a5..c0da1a881e3d 100644
--- a/arch/mips/include/asm/mips-boards/generic.h
+++ b/arch/mips/include/asm/mips-boards/generic.h
@@ -71,8 +71,6 @@
 
 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
 
-extern int mips_revision_corid;
-
 #define MIPS_REVISION_SCON_OTHER           0
 #define MIPS_REVISION_SCON_SOCITSC         1
 #define MIPS_REVISION_SCON_SOCITSCP        2
diff --git a/arch/mips/include/asm/smp-ops.h b/arch/mips/include/asm/smp-ops.h
index 43c207e72a63..64ffc0290b84 100644
--- a/arch/mips/include/asm/smp-ops.h
+++ b/arch/mips/include/asm/smp-ops.h
@@ -15,6 +15,8 @@
 
 #include <linux/cpumask.h>
 
+struct task_struct;
+
 struct plat_smp_ops {
         void (*send_ipi_single)(int cpu, unsigned int action);
         void (*send_ipi_mask)(cpumask_t mask, unsigned int action);
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index 0884947ebe27..10e82441b496 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -76,7 +76,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
                 "2:                                                     \n"
                 "       .subsection 2                                   \n"
                 "4:     andi    %[ticket], %[ticket], 0x1fff            \n"
-                "5:     sll     %[ticket], 5                            \n"
+                "       sll     %[ticket], 5                            \n"
                 "                                                       \n"
                 "6:     bnez    %[ticket], 6b                           \n"
                 "        subu   %[ticket], 1                            \n"
@@ -85,7 +85,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
                 "       andi    %[ticket], %[ticket], 0x1fff            \n"
                 "       beq     %[ticket], %[my_ticket], 2b             \n"
                 "        subu   %[ticket], %[my_ticket], %[ticket]      \n"
-                "       b       5b                                      \n"
+                "       b       4b                                      \n"
                 "        subu   %[ticket], %[ticket], 1                 \n"
                 "       .previous                                       \n"
                 "       .set pop                                        \n"
@@ -113,7 +113,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
                 "        ll     %[ticket], %[ticket_ptr]                \n"
                 "                                                       \n"
                 "4:     andi    %[ticket], %[ticket], 0x1fff            \n"
-                "5:     sll     %[ticket], 5                            \n"
+                "       sll     %[ticket], 5                            \n"
                 "                                                       \n"
                 "6:     bnez    %[ticket], 6b                           \n"
                 "        subu   %[ticket], 1                            \n"
@@ -122,7 +122,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
                 "       andi    %[ticket], %[ticket], 0x1fff            \n"
                 "       beq     %[ticket], %[my_ticket], 2b             \n"
                 "        subu   %[ticket], %[my_ticket], %[ticket]      \n"
-                "       b       5b                                      \n"
+                "       b       4b                                      \n"
                 "        subu   %[ticket], %[ticket], 1                 \n"
                 "       .previous                                       \n"
                 "       .set pop                                        \n"
diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h
index bcbb8d675af5..7956e69a3bd5 100644
--- a/arch/mips/include/asm/types.h
+++ b/arch/mips/include/asm/types.h
@@ -4,12 +4,18 @@
  * for more details.
  *
  * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
+ * Copyright (C) 2008 Wind River Systems,
+ *   written by Ralf Baechle
  * Copyright (C) 1999 Silicon Graphics, Inc.
  */
 #ifndef _ASM_TYPES_H
 #define _ASM_TYPES_H
 
-#if _MIPS_SZLONG == 64
+/*
+ * We don't use int-l64.h for the kernel anymore but still use it for
+ * userspace to avoid code changes.
+ */
+#if (_MIPS_SZLONG == 64) && !defined(__KERNEL__)
 # include <asm-generic/int-l64.h>
 #else
 # include <asm-generic/int-ll64.h>
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index 03965cb1b252..d9b6a5b5399d 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -134,7 +134,6 @@ static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
 static struct irqaction r4030_timer_irqaction = {
         .handler        = r4030_timer_interrupt,
         .flags          = IRQF_DISABLED,
-        .mask           = CPU_MASK_CPU0,
         .name           = "R4030 timer",
 };
 
diff --git a/arch/mips/jazz/jazzdma.c b/arch/mips/jazz/jazzdma.c
index c672c08d49e5..f0fd636723be 100644
--- a/arch/mips/jazz/jazzdma.c
+++ b/arch/mips/jazz/jazzdma.c
@@ -68,8 +68,7 @@ static int __init vdma_init(void)
          */
         pgtbl = (VDMA_PGTBL_ENTRY *)__get_free_pages(GFP_KERNEL | GFP_DMA,
                                                     get_order(VDMA_PGTBL_SIZE));
-        if (!pgtbl)
-                BUG();
+        BUG_ON(!pgtbl);
         dma_cache_wback_inv((unsigned long)pgtbl, VDMA_PGTBL_SIZE);
         pgtbl = (VDMA_PGTBL_ENTRY *)KSEG1ADDR(pgtbl);
 
diff --git a/arch/mips/kernel/cevt-bcm1480.c b/arch/mips/kernel/cevt-bcm1480.c
index b820661678b0..a5182a207696 100644
--- a/arch/mips/kernel/cevt-bcm1480.c
+++ b/arch/mips/kernel/cevt-bcm1480.c
@@ -144,7 +144,6 @@ void __cpuinit sb1480_clockevent_init(void)
 
         action->handler = sibyte_counter_handler;
         action->flags   = IRQF_DISABLED | IRQF_PERCPU;
-        action->mask    = cpumask_of_cpu(cpu);
         action->name    = name;
         action->dev_id  = cd;
 
diff --git a/arch/mips/kernel/cevt-sb1250.c b/arch/mips/kernel/cevt-sb1250.c
index a2eebaafda52..340f53e5c6b1 100644
--- a/arch/mips/kernel/cevt-sb1250.c
+++ b/arch/mips/kernel/cevt-sb1250.c
@@ -143,7 +143,6 @@ void __cpuinit sb1250_clockevent_init(void)
 
         action->handler = sibyte_counter_handler;
         action->flags   = IRQF_DISABLED | IRQF_PERCPU;
-        action->mask    = cpumask_of_cpu(cpu);
         action->name    = name;
         action->dev_id  = cd;
 
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 1bdbcad3bb74..b13b8eb30596 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -183,13 +183,7 @@ void __init check_wait(void)
         case CPU_TX49XX:
                 cpu_wait = r4k_wait_irqoff;
                 break;
-        case CPU_AU1000:
-        case CPU_AU1100:
-        case CPU_AU1500:
-        case CPU_AU1550:
-        case CPU_AU1200:
-        case CPU_AU1210:
-        case CPU_AU1250:
+        case CPU_ALCHEMY:
                 cpu_wait = au1k_wait;
                 break;
         case CPU_20KC:
@@ -783,37 +777,30 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu)
         switch (c->processor_id & 0xff00) {
         case PRID_IMP_AU1_REV1:
         case PRID_IMP_AU1_REV2:
+                c->cputype = CPU_ALCHEMY;
                 switch ((c->processor_id >> 24) & 0xff) {
                 case 0:
-                        c->cputype = CPU_AU1000;
                         __cpu_name[cpu] = "Au1000";
                         break;
                 case 1:
-                        c->cputype = CPU_AU1500;
                         __cpu_name[cpu] = "Au1500";
                         break;
                 case 2:
-                        c->cputype = CPU_AU1100;
                         __cpu_name[cpu] = "Au1100";
                         break;
                 case 3:
-                        c->cputype = CPU_AU1550;
                         __cpu_name[cpu] = "Au1550";
                         break;
                 case 4:
-                        c->cputype = CPU_AU1200;
                         __cpu_name[cpu] = "Au1200";
-                        if ((c->processor_id & 0xff) == 2) {
-                                c->cputype = CPU_AU1250;
+                        if ((c->processor_id & 0xff) == 2)
                                 __cpu_name[cpu] = "Au1250";
-                        }
                         break;
                 case 5:
-                        c->cputype = CPU_AU1210;
                         __cpu_name[cpu] = "Au1210";
                         break;
                 default:
-                        panic("Unknown Au Core!");
+                        __cpu_name[cpu] = "Au1xxx";
                         break;
                 }
                 break;
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index f4d187825f96..689719e34f08 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -98,7 +98,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
 static struct irqaction irq0  = {
         .handler = timer_interrupt,
         .flags = IRQF_DISABLED | IRQF_NOBALANCING,
-        .mask = CPU_MASK_NONE,
         .name = "timer"
 };
 
@@ -121,7 +120,6 @@ void __init setup_pit_timer(void)
         cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
         clockevents_register_device(cd);
 
-        irq0.mask = cpumask_of_cpu(cpu);
         setup_irq(0, &irq0);
 }
 
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 413bd1d37f54..01c0885a8061 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -306,7 +306,6 @@ static void init_8259A(int auto_eoi)
  */
 static struct irqaction irq2 = {
         .handler = no_action,
-        .mask = CPU_MASK_NONE,
         .name = "cascade",
 };
 
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 963c16d266ab..6a8cd28133d5 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -140,14 +140,16 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma
 
                 switch (imp->im_type) {
                 case MSC01_IRQ_EDGE:
-                        set_irq_chip(irqbase+n, &msc_edgeirq_type);
+                        set_irq_chip_and_handler_name(irqbase + n,
+                                &msc_edgeirq_type, handle_edge_irq, "edge");
                         if (cpu_has_veic)
                                 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
                         else
                                 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
                         break;
                 case MSC01_IRQ_LEVEL:
-                        set_irq_chip(irqbase+n, &msc_levelirq_type);
+                        set_irq_chip_and_handler_name(irqbase+n,
+                                &msc_levelirq_type, handle_level_irq, "level");
                         if (cpu_has_veic)
                                 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
                         else
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 0ee2567b780d..55c8a3ca507b 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -112,7 +112,8 @@ void __init mips_cpu_irq_init(void)
          */
         if (cpu_has_mipsmt)
                 for (i = irq_base; i < irq_base + 2; i++)
-                        set_irq_chip(i, &mips_mt_cpu_irq_controller);
+                        set_irq_chip_and_handler(i, &mips_mt_cpu_irq_controller,
+                                                 handle_percpu_irq);
 
         for (i = irq_base + 2; i < irq_base + 8; i++)
                 set_irq_chip_and_handler(i, &mips_cpu_irq_controller,
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 2a472713de8e..6242bc68add7 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -133,9 +133,9 @@ SYSCALL_DEFINE4(32_ftruncate64, unsigned long, fd, unsigned long, __dummy,
         return sys_ftruncate(fd, merge_64(a2, a3));
 }
 
-SYSCALL_DEFINE5(32_llseek, unsigned long, fd, unsigned long, offset_high,
-        unsigned long, offset_low, loff_t __user *, result,
-        unsigned long, origin)
+SYSCALL_DEFINE5(32_llseek, unsigned int, fd, unsigned int, offset_high,
+                unsigned int, offset_low, loff_t __user *, result,
+                unsigned int, origin)
 {
         return sys_llseek(fd, offset_high, offset_low, result, origin);
 }
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 4430a1f8fdf1..2950b97253b7 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -277,7 +277,8 @@ static void __init bootmem_init(void)
          * not selected. Once that done we can determine the low bound
          * of usable memory.
          */
-        reserved_end = max(init_initrd(), PFN_UP(__pa_symbol(&_end)));
+        reserved_end = max(init_initrd(),
+                           (unsigned long) PFN_UP(__pa_symbol(&_end)));
 
         /*
          * max_low_pfn is not a number of pages. The number of pages
diff --git a/arch/mips/kernel/smp-up.c b/arch/mips/kernel/smp-up.c
index ead6c30eeb14..878e3733bbb2 100644
--- a/arch/mips/kernel/smp-up.c
+++ b/arch/mips/kernel/smp-up.c
@@ -13,7 +13,7 @@
 /*
  * Send inter-processor interrupt
  */
-void up_send_ipi_single(int cpu, unsigned int action)
+static void up_send_ipi_single(int cpu, unsigned int action)
 {
         panic(KERN_ERR "%s called", __func__);
 }
@@ -27,31 +27,31 @@ static inline void up_send_ipi_mask(cpumask_t mask, unsigned int action)
  *  After we've done initial boot, this function is called to allow the
  *  board code to clean up state, if needed
  */
-void __cpuinit up_init_secondary(void)
+static void __cpuinit up_init_secondary(void)
 {
 }
 
-void __cpuinit up_smp_finish(void)
+static void __cpuinit up_smp_finish(void)
 {
 }
 
 /* Hook for after all CPUs are online */
-void up_cpus_done(void)
+static void up_cpus_done(void)
 {
 }
 
 /*
  * Firmware CPU startup hook
  */
-void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle)
+static void __cpuinit up_boot_secondary(int cpu, struct task_struct *idle)
 {
 }
 
-void __init up_smp_setup(void)
+static void __init up_smp_setup(void)
 {
 }
 
-void __init up_prepare_cpus(unsigned int max_cpus)
+static void __init up_prepare_cpus(unsigned int max_cpus)
 {
 }
 
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 3da94704f816..c937506a03aa 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -44,7 +44,7 @@
 #include <asm/mipsmtregs.h>
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-volatile cpumask_t cpu_callin_map;      /* Bitmask of started secondaries */
+static volatile cpumask_t cpu_callin_map;       /* Bitmask of started secondaries */
 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
 
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 29fadaccecdd..e83da174b533 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1277,8 +1277,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
         u32 *w;
         unsigned char *b;
 
-        if (!cpu_has_veic && !cpu_has_vint)
-                BUG();
+        BUG_ON(!cpu_has_veic && !cpu_has_vint);
 
         if (addr == NULL) {
                 handler = (unsigned long) do_default_vi;
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index d1ac7a25c856..1353fb135ed3 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -104,7 +104,6 @@ asmlinkage void plat_irq_dispatch(void)
 
 static struct irqaction cascade = {
         .handler        = no_action,
-        .mask           = CPU_MASK_NONE,
         .name           = "cascade",
 };
 
diff --git a/arch/mips/lemote/lm2e/irq.c b/arch/mips/lemote/lm2e/irq.c
index 3e0b7beb1009..1d0a09f3b832 100644
--- a/arch/mips/lemote/lm2e/irq.c
+++ b/arch/mips/lemote/lm2e/irq.c
@@ -92,7 +92,6 @@ asmlinkage void plat_irq_dispatch(void)
 
 static struct irqaction cascade_irqaction = {
         .handler = no_action,
-        .mask = CPU_MASK_NONE,
         .name = "cascade",
 };
 
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 871e828bc62a..58d9075e86fe 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1026,13 +1026,7 @@ static void __cpuinit probe_pcache(void)
                 c->icache.flags |= MIPS_CACHE_VTAG;
                 break;
 
-        case CPU_AU1000:
-        case CPU_AU1500:
-        case CPU_AU1100:
-        case CPU_AU1550:
-        case CPU_AU1200:
-        case CPU_AU1210:
-        case CPU_AU1250:
+        case CPU_ALCHEMY:
                 c->icache.flags |= MIPS_CACHE_IC_F_DC;
                 break;
         }
@@ -1244,7 +1238,7 @@ void au1x00_fixup_config_od(void)
         /*
          * Au1100 errata actually keeps silence about this bit, so we set it
          * just in case for those revisions that require it to be set according
-         * to arch/mips/au1000/common/cputable.c
+         * to the (now gone) cpu table.
          */
         case 0x02030200: /* Au1100 AB */
         case 0x02030201: /* Au1100 BA */
@@ -1314,11 +1308,10 @@ static void __cpuinit coherency_setup(void)
                 break;
         /*
          * We need to catch the early Alchemy SOCs with
-         * the write-only co_config.od bit and set it back to one...
+         * the write-only co_config.od bit and set it back to one on:
+         * Au1000 rev DA, HA, HB;  Au1100 AB, BA, BC, Au1500 AB
          */
-        case CPU_AU1000: /* rev. DA, HA, HB */
-        case CPU_AU1100: /* rev. AB, BA, BC ?? */
-        case CPU_AU1500: /* rev. AB */
+        case CPU_ALCHEMY:
                 au1x00_fixup_config_od();
                 break;
 
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index 8f2cd8eda741..060d28dca8a8 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -17,8 +17,7 @@ void *__kmap(struct page *page)
 
 void __kunmap(struct page *page)
 {
-        if (in_interrupt())
-                BUG();
+        BUG_ON(in_interrupt());
         if (!PageHighMem(page))
                 return;
         kunmap_high(page);
@@ -46,8 +45,7 @@ void *__kmap_atomic(struct page *page, enum km_type type)
         idx = type + KM_TYPE_NR*smp_processor_id();
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
 #ifdef CONFIG_DEBUG_HIGHMEM
-        if (!pte_none(*(kmap_pte-idx)))
-                BUG();
+        BUG_ON(!pte_none(*(kmap_pte - idx)));
 #endif
         set_pte(kmap_pte-idx, mk_pte(page, kmap_prot));
         local_flush_tlb_one((unsigned long)vaddr);
@@ -66,8 +64,7 @@ void __kunmap_atomic(void *kvaddr, enum km_type type)
                 return;
         }
 
-        if (vaddr != __fix_to_virt(FIX_KMAP_BEGIN+idx))
-                BUG();
+        BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
 
         /*
          * force other mappings to Oops if they'll try to access
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 137c14bafd6b..d9348946a19e 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -307,8 +307,7 @@ void __init fixrange_init(unsigned long start, unsigned long end,
                                 if (pmd_none(*pmd)) {
                                         pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
                                         set_pmd(pmd, __pmd((unsigned long)pte));
-                                        if (pte != pte_offset_kernel(pmd, 0))
-                                                BUG();
+                                        BUG_ON(pte != pte_offset_kernel(pmd, 0));
                                 }
                                 vaddr += PMD_SIZE;
                         }
diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index 59945b9ee23c..0c43248347bd 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -27,8 +27,7 @@ static inline void remap_area_pte(pte_t * pte, unsigned long address,
         end = address + size;
         if (end > PMD_SIZE)
                 end = PMD_SIZE;
-        if (address >= end)
-                BUG();
+        BUG_ON(address >= end);
         pfn = phys_addr >> PAGE_SHIFT;
         do {
                 if (!pte_none(*pte)) {
@@ -52,8 +51,7 @@ static inline int remap_area_pmd(pmd_t * pmd, unsigned long address,
         if (end > PGDIR_SIZE)
                 end = PGDIR_SIZE;
         phys_addr -= address;
-        if (address >= end)
-                BUG();
+        BUG_ON(address >= end);
         do {
                 pte_t * pte = pte_alloc_kernel(pmd, address);
                 if (!pte)
@@ -75,8 +73,7 @@ static int remap_area_pages(unsigned long address, phys_t phys_addr,
         phys_addr -= address;
         dir = pgd_offset(&init_mm, address);
         flush_cache_all();
-        if (address >= end)
-                BUG();
+        BUG_ON(address >= end);
         do {
                 pud_t *pud;
                 pmd_t *pmd;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index f335cf6cdd78..0615b62efd6d 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -292,13 +292,6 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
         case CPU_R4300:
         case CPU_5KC:
         case CPU_TX49XX:
-        case CPU_AU1000:
-        case CPU_AU1100:
-        case CPU_AU1500:
-        case CPU_AU1550:
-        case CPU_AU1200:
-        case CPU_AU1210:
-        case CPU_AU1250:
         case CPU_PR4450:
                 uasm_i_nop(p);
                 tlbw(p);
@@ -321,6 +314,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
         case CPU_R5500:
                 if (m4kc_tlbp_war())
                         uasm_i_nop(p);
+        case CPU_ALCHEMY:
                 tlbw(p);
                 break;
 
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
index 4832af251668..475038a141a6 100644
--- a/arch/mips/mti-malta/malta-init.c
+++ b/arch/mips/mti-malta/malta-init.c
@@ -48,7 +48,7 @@ int *_prom_argv, *_prom_envp;
 
 int init_debug = 0;
 
-int mips_revision_corid;
+static int mips_revision_corid;
 int mips_revision_sconid;
 
 /* Bonito64 system controller register base. */
diff --git a/arch/mips/sgi-ip27/ip27-berr.c b/arch/mips/sgi-ip27/ip27-berr.c
index 7d05e68fdc77..04cebadc2b3c 100644
--- a/arch/mips/sgi-ip27/ip27-berr.c
+++ b/arch/mips/sgi-ip27/ip27-berr.c
@@ -66,7 +66,7 @@ int ip27_be_handler(struct pt_regs *regs, int is_fixup)
         printk("Slice %c got %cbe at 0x%lx\n", 'A' + cpu, data ? 'd' : 'i',
                regs->cp0_epc);
         printk("Hub information:\n");
-        printk("ERR_INT_PEND = 0x%06lx\n", LOCAL_HUB_L(PI_ERR_INT_PEND));
+        printk("ERR_INT_PEND = 0x%06llx\n", LOCAL_HUB_L(PI_ERR_INT_PEND));
         errst0 = LOCAL_HUB_L(cpu ? PI_ERR_STATUS0_B : PI_ERR_STATUS0_A);
         errst1 = LOCAL_HUB_L(cpu ? PI_ERR_STATUS1_B : PI_ERR_STATUS1_A);
         dump_hub_information(errst0, errst1);
diff --git a/arch/mips/sgi-ip27/ip27-nmi.c b/arch/mips/sgi-ip27/ip27-nmi.c
index 64459e7d891b..6c5a630566f9 100644
--- a/arch/mips/sgi-ip27/ip27-nmi.c
+++ b/arch/mips/sgi-ip27/ip27-nmi.c
@@ -143,8 +143,8 @@ void nmi_dump_hub_irq(nasid_t nasid, int slice)
         pend0 = REMOTE_HUB_L(nasid, PI_INT_PEND0);
         pend1 = REMOTE_HUB_L(nasid, PI_INT_PEND1);
 
-        printk("PI_INT_MASK0: %16lx PI_INT_MASK1: %16lx\n", mask0, mask1);
-        printk("PI_INT_PEND0: %16lx PI_INT_PEND1: %16lx\n", pend0, pend1);
+        printk("PI_INT_MASK0: %16Lx PI_INT_MASK1: %16Lx\n", mask0, mask1);
+        printk("PI_INT_PEND0: %16Lx PI_INT_PEND1: %16Lx\n", pend0, pend1);
         printk("\n\n");
 }
 
@@ -219,7 +219,7 @@ cont_nmi_dump(void)
                 if (i == 1000) {
                         for_each_online_node(node)
                                 if (NODEPDA(node)->dump_count == 0) {
-                                        cpu = node_to_first_cpu(node);
+                                        cpu = cpumask_first(cpumask_of_node(node));
                                         for (n=0; n < CNODE_NUM_CPUS(node); cpu++, n++) {
                                                 CPUMASK_SETB(nmied_cpus, cpu);
                                                 /*
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index 0d6b6663d5f6..83a0b3c359da 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -115,14 +115,12 @@ extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
 struct irqaction memerr_irq = {
         .handler = crime_memerr_intr,
         .flags = IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "CRIME memory error",
 };
 
 struct irqaction cpuerr_irq = {
         .handler = crime_cpuerr_intr,
         .flags = IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "CRIME CPU error",
 };
 
@@ -325,16 +323,11 @@ static void mask_and_ack_maceisa_irq(unsigned int irq)
 {
         unsigned long mace_int;
 
-        switch (irq) {
-        case MACEISA_PARALLEL_IRQ:
-        case MACEISA_SERIAL1_TDMAPR_IRQ:
-        case MACEISA_SERIAL2_TDMAPR_IRQ:
-                /* edge triggered */
-                mace_int = mace->perif.ctrl.istat;
-                mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ));
-                mace->perif.ctrl.istat = mace_int;
-                break;
-        }
+        /* edge triggered */
+        mace_int = mace->perif.ctrl.istat;
+        mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ));
+        mace->perif.ctrl.istat = mace_int;
+
         disable_maceisa_irq(irq);
 }
 
@@ -344,7 +337,16 @@ static void end_maceisa_irq(unsigned irq)
                 enable_maceisa_irq(irq);
 }
 
-static struct irq_chip ip32_maceisa_interrupt = {
+static struct irq_chip ip32_maceisa_level_interrupt = {
+        .name           = "IP32 MACE ISA",
+        .ack            = disable_maceisa_irq,
+        .mask           = disable_maceisa_irq,
+        .mask_ack       = disable_maceisa_irq,
+        .unmask         = enable_maceisa_irq,
+        .end            = end_maceisa_irq,
+};
+
+static struct irq_chip ip32_maceisa_edge_interrupt = {
         .name           = "IP32 MACE ISA",
         .ack            = mask_and_ack_maceisa_irq,
         .mask           = disable_maceisa_irq,
@@ -500,27 +502,50 @@ void __init arch_init_irq(void)
         for (irq = CRIME_IRQ_BASE; irq <= IP32_IRQ_MAX; irq++) {
                 switch (irq) {
                 case MACE_VID_IN1_IRQ ... MACE_PCI_BRIDGE_IRQ:
-                        set_irq_chip(irq, &ip32_mace_interrupt);
+                        set_irq_chip_and_handler_name(irq,&ip32_mace_interrupt,
+                                handle_level_irq, "level");
                         break;
+
                 case MACEPCI_SCSI0_IRQ ...  MACEPCI_SHARED2_IRQ:
-                        set_irq_chip(irq, &ip32_macepci_interrupt);
+                        set_irq_chip_and_handler_name(irq,
+                                &ip32_macepci_interrupt, handle_level_irq,
+                                "level");
                         break;
+
                 case CRIME_GBE0_IRQ ... CRIME_GBE3_IRQ:
-                        set_irq_chip(irq, &crime_edge_interrupt);
+                        set_irq_chip_and_handler_name(irq,
+                                &crime_edge_interrupt, handle_edge_irq, "edge");
                         break;
                 case CRIME_CPUERR_IRQ:
                 case CRIME_MEMERR_IRQ:
-                        set_irq_chip(irq, &crime_level_interrupt);
+                        set_irq_chip_and_handler_name(irq,
+                                &crime_level_interrupt, handle_level_irq,
+                                "level");
                         break;
+
                 case CRIME_RE_EMPTY_E_IRQ ... CRIME_RE_IDLE_E_IRQ:
                 case CRIME_SOFT0_IRQ ... CRIME_SOFT2_IRQ:
-                        set_irq_chip(irq, &crime_edge_interrupt);
+                        set_irq_chip_and_handler_name(irq,
+                                &crime_edge_interrupt, handle_edge_irq, "edge");
                         break;
+
                 case CRIME_VICE_IRQ:
-                        set_irq_chip(irq, &crime_edge_interrupt);
+                        set_irq_chip_and_handler_name(irq,
+                                &crime_edge_interrupt, handle_edge_irq, "edge");
+                        break;
+
+                case MACEISA_PARALLEL_IRQ:
+                case MACEISA_SERIAL1_TDMAPR_IRQ:
+                case MACEISA_SERIAL2_TDMAPR_IRQ:
+                        set_irq_chip_and_handler_name(irq,
+                                &ip32_maceisa_edge_interrupt, handle_edge_irq,
+                                "edge");
                         break;
+
                 default:
-                        set_irq_chip(irq, &ip32_maceisa_interrupt);
+                        set_irq_chip_and_handler_name(irq,
+                                &ip32_maceisa_level_interrupt, handle_level_irq,
+                                "level");
                         break;
                 }
         }
diff --git a/arch/mips/sgi-ip32/ip32-memory.c b/arch/mips/sgi-ip32/ip32-memory.c
index ca93ecf825ae..828ce131c228 100644
--- a/arch/mips/sgi-ip32/ip32-memory.c
+++ b/arch/mips/sgi-ip32/ip32-memory.c
@@ -36,7 +36,7 @@ void __init prom_meminit(void)
                 if (base + size > (256 << 20))
                         base += CRIME_HI_MEM_BASE;
 
-                printk("CRIME MC: bank %u base 0x%016lx size %luMiB\n",
+                printk("CRIME MC: bank %u base 0x%016Lx size %LuMiB\n",
                         bank, base, size >> 20);
                 add_memory_region(base, size, BOOT_MEM_RAM);
         }
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 12b465d404df..352352b3cb2f 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -236,7 +236,7 @@ void __init init_bcm1480_irqs(void)
         int i;
 
         for (i = 0; i < BCM1480_NR_IRQS; i++) {
-                set_irq_chip(i, &bcm1480_irq_type);
+                set_irq_chip_and_handler(i, &bcm1480_irq_type, handle_level_irq);
                 bcm1480_irq_owner[i] = 0;
         }
 }
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index 808ac2959b8c..c08ff582da6f 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -220,7 +220,7 @@ void __init init_sb1250_irqs(void)
         int i;
 
         for (i = 0; i < SB1250_NR_IRQS; i++) {
-                set_irq_chip(i, &sb1250_irq_type);
+                set_irq_chip_and_handler(i, &sb1250_irq_type, handle_level_irq);
                 sb1250_irq_owner[i] = 0;
         }
 }
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index 3f8cf5eb2f06..7dd76fb3b645 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -219,7 +219,7 @@ void __init sni_a20r_irq_init(void)
         int i;
 
         for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++)
-                set_irq_chip(i, &a20r_irq_type);
+                set_irq_chip_and_handler(i, &a20r_irq_type, handle_level_irq);
         sni_hwint = a20r_hwint;
         change_c0_status(ST0_IM, IE_IRQ0);
         setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 834650f371e0..74e6c67982fb 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -304,7 +304,7 @@ void __init sni_pcimt_irq_init(void)
         mips_cpu_irq_init();
         /* Actually we've got more interrupts to handle ...  */
         for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_SCSI; i++)
-                set_irq_chip(i, &pcimt_irq_type);
+                set_irq_chip_and_handler(i, &pcimt_irq_type, handle_level_irq);
         sni_hwint = sni_pcimt_hwint;
         change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ3);
 }
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index e5f12cf96e8e..071a9573ac7f 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -246,7 +246,7 @@ void __init sni_pcit_irq_init(void)
 
         mips_cpu_irq_init();
         for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
-                set_irq_chip(i, &pcit_irq_type);
+                set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq);
         *(volatile u32 *)SNI_PCIT_INT_REG = 0;
         sni_hwint = sni_pcit_hwint;
         change_c0_status(ST0_IM, IE_IRQ1);
@@ -259,7 +259,7 @@ void __init sni_pcit_cplus_irq_init(void)
 
         mips_cpu_irq_init();
         for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
-                set_irq_chip(i, &pcit_irq_type);
+                set_irq_chip_and_handler(i, &pcit_irq_type, handle_level_irq);
         *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
         sni_hwint = sni_pcit_hwint_cplus;
         change_c0_status(ST0_IM, IE_IRQ0);
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c
index 5310aa75afa4..5e687819cbc2 100644
--- a/arch/mips/sni/rm200.c
+++ b/arch/mips/sni/rm200.c
@@ -359,7 +359,8 @@ void sni_rm200_init_8259A(void)
  * IRQ2 is cascade interrupt to second interrupt controller
  */
 static struct irqaction sni_rm200_irq2 = {
-        no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL
+        .handler = no_action,
+        .name = "cascade",
 };
 
 static struct resource sni_rm200_pic1_resource = {
@@ -487,7 +488,7 @@ void __init sni_rm200_irq_init(void)
         mips_cpu_irq_init();
         /* Actually we've got more interrupts to handle ...  */
         for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++)
-                set_irq_chip(i, &rm200_irq_type);
+                set_irq_chip_and_handler(i, &rm200_irq_type, handle_level_irq);
         sni_hwint = sni_rm200_hwint;
         change_c0_status(ST0_IM, IE_IRQ0);
         setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq);
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig
index 226e8bb2f0a1..0db7cf38ed8b 100644
--- a/arch/mips/txx9/Kconfig
+++ b/arch/mips/txx9/Kconfig
@@ -20,7 +20,6 @@ config MACH_TXX9
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
         select SYS_SUPPORTS_BIG_ENDIAN
-        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config TOSHIBA_JMR3927
         bool "Toshiba JMR-TX3927 board"
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 92dd1a0ca352..9cc389109b19 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -32,7 +32,6 @@ static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned;
 
 static struct irqaction cascade_irqaction = {
         .handler        = no_action,
-        .mask           = CPU_MASK_NONE,
         .name           = "cascade",
 };
 
diff --git a/arch/mn10300/kernel/time.c b/arch/mn10300/kernel/time.c
index e4606586f94c..395caf01b909 100644
--- a/arch/mn10300/kernel/time.c
+++ b/arch/mn10300/kernel/time.c
@@ -37,7 +37,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id);
 static struct irqaction timer_irq = {
         .handler        = timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER,
-        .mask           = CPU_MASK_NONE,
         .name           = "timer",
 };
 
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 74cc312c347c..ad6b1c084fe3 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -111,6 +111,7 @@ config PPC
         select HAVE_FTRACE_MCOUNT_RECORD
         select HAVE_DYNAMIC_FTRACE
         select HAVE_FUNCTION_TRACER
+        select HAVE_FUNCTION_GRAPH_TRACER
         select ARCH_WANT_OPTIONAL_GPIOLIB
         select HAVE_IDE
         select HAVE_IOREMAP_PROT
@@ -312,7 +313,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
 
 config KEXEC
         bool "kexec system call (EXPERIMENTAL)"
-        depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL
+        depends on BOOK3S && EXPERIMENTAL
         help
           kexec is a system call that implements the ability to shutdown your
           current kernel, and to start another kernel.  It is like a reboot
@@ -409,6 +410,18 @@ config PPC_HAS_HASH_64K
         depends on PPC64
         default n
 
+config STDBINUTILS
+        bool "Using standard binutils settings"
+        depends on 44x
+        default y
+        help
+          Turning this option off allows you to select 256KB PAGE_SIZE on 44x.
+          Note, that kernel will be able to run only those applications,
+          which had been compiled using binutils later than 2.17.50.0.3 with
+          '-zmax-page-size' set to 256K (the default is 64K). Or, if using
+          the older binutils, you can patch them with a trivial patch, which
+          changes the ELF_MAXPAGESIZE definition from 0x10000 to 0x40000.
+
 choice
         prompt "Page size"
         default PPC_4K_PAGES
@@ -444,6 +457,19 @@ config PPC_64K_PAGES
         bool "64k page size" if 44x || PPC_STD_MMU_64
         select PPC_HAS_HASH_64K if PPC_STD_MMU_64
 
+config PPC_256K_PAGES
+        bool "256k page size" if 44x
+        depends on !STDBINUTILS && (!SHMEM || BROKEN)
+        help
+          Make the page size 256k.
+
+          As the ELF standard only requires alignment to support page
+          sizes up to 64k, you will need to compile all of your user
+          space applications with a non-standard binutils settings
+          (see the STDBINUTILS description for details).
+
+          Say N unless you know what you are doing.
+
 endchoice
 
 config FORCE_MAX_ZONEORDER
@@ -456,6 +482,8 @@ config FORCE_MAX_ZONEORDER
         default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES
         range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES
         default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES
+        range 5 64 if PPC_STD_MMU_32 && PPC_256K_PAGES
+        default "5" if PPC_STD_MMU_32 && PPC_256K_PAGES
         range 11 64
         default "11"
         help
@@ -594,6 +622,7 @@ config FSL_SOC
 config FSL_PCI
         bool
         select PPC_INDIRECT_PCI
+        select PCI_QUIRKS
 
 config 4xx_SOC
         bool
@@ -730,6 +759,22 @@ config LOWMEM_SIZE
         hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
         default "0x30000000"
 
+config LOWMEM_CAM_NUM_BOOL
+        bool "Set number of CAMs to use to map low memory"
+        depends on ADVANCED_OPTIONS && FSL_BOOKE
+        help
+          This option allows you to set the maximum number of CAM slots that
+          will be used to map low memory.  There are a limited number of slots
+          available and even more limited number that will fit in the L1 MMU.
+          However, using more entries will allow mapping more low memory.  This
+          can be useful in optimizing the layout of kernel virtual memory.
+
+          Say N here unless you know what you are doing.
+
+config LOWMEM_CAM_NUM
+        int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL
+        default 3
+
 config RELOCATABLE
         bool "Build a relocatable kernel (EXPERIMENTAL)"
         depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE
@@ -794,7 +839,7 @@ config PHYSICAL_START
 
 config PHYSICAL_ALIGN
         hex
-        default "0x10000000" if FSL_BOOKE
+        default "0x04000000" if FSL_BOOKE
         help
           This value puts the alignment restrictions on physical address
           where kernel is loaded and run from. Kernel is compiled for an
@@ -815,31 +860,6 @@ config TASK_SIZE
         default "0x80000000" if PPC_PREP || PPC_8xx
         default "0xc0000000"
 
-config CONSISTENT_START_BOOL
-        bool "Set custom consistent memory pool address"
-        depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
-        help
-          This option allows you to set the base virtual address
-          of the consistent memory pool.  This pool of virtual
-          memory is used to make consistent memory allocations.
-
-config CONSISTENT_START
-        hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
-        default "0xfd000000" if (NOT_COHERENT_CACHE && 8xx)
-        default "0xff100000" if NOT_COHERENT_CACHE
-
-config CONSISTENT_SIZE_BOOL
-        bool "Set custom consistent memory pool size"
-        depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
-        help
-          This option allows you to set the size of the
-          consistent memory pool.  This pool of virtual memory
-          is used to make consistent memory allocations.
-
-config CONSISTENT_SIZE
-        hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
-        default "0x00200000" if NOT_COHERENT_CACHE
-
 config PIN_TLB
         bool "Pinned Kernel TLBs (860 ONLY)"
         depends on ADVANCED_OPTIONS && 8xx
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 08f7cc0a1953..22091bbfdc9b 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -129,7 +129,7 @@ config BDI_SWITCH
 
 config BOOTX_TEXT
         bool "Support for early boot text console (BootX or OpenFirmware only)"
-        depends on PPC_OF && PPC_MULTIPLATFORM
+        depends on PPC_OF && PPC_BOOK3S
         help
           Say Y here to see progress messages from the boot firmware in text
           mode. Requires either BootX or Open Firmware.
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 72d17f50e54f..551fc58c05cf 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -147,8 +147,8 @@ core-y				+= arch/powerpc/kernel/ \
                                    arch/powerpc/mm/ \
                                    arch/powerpc/lib/ \
                                    arch/powerpc/sysdev/ \
-                                   arch/powerpc/platforms/
-core-$(CONFIG_MATH_EMULATION)   += arch/powerpc/math-emu/
+                                   arch/powerpc/platforms/ \
+                                   arch/powerpc/math-emu/
 core-$(CONFIG_XMON)             += arch/powerpc/xmon/
 core-$(CONFIG_KVM)              += arch/powerpc/kvm/
 
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index e84df338ea29..4458abb67c51 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -70,7 +70,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
                 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
                 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
                 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
-                cuboot-acadia.c
+                cuboot-acadia.c cuboot-amigaone.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -235,7 +235,9 @@ image-$(CONFIG_PPC_ADDER875)		+= cuImage.adder875-uboot \
                                            dtbImage.adder875-redboot
 
 # Board ports in arch/powerpc/platform/52xx/Kconfig
-image-$(CONFIG_PPC_LITE5200)            += cuImage.lite5200 cuImage.lite5200b
+image-$(CONFIG_PPC_LITE5200)            += cuImage.lite5200 lite5200.dtb
+image-$(CONFIG_PPC_LITE5200)            += cuImage.lite5200b lite5200b.dtb
+image-$(CONFIG_PPC_MEDIA5200)           += cuImage.media5200 media5200.dtb
 
 # Board ports in arch/powerpc/platform/82xx/Kconfig
 image-$(CONFIG_MPC8272_ADS)             += cuImage.mpc8272ads
@@ -274,6 +276,9 @@ image-$(CONFIG_STORCENTER)		+= cuImage.storcenter
 image-$(CONFIG_MPC7448HPC2)             += cuImage.mpc7448hpc2
 image-$(CONFIG_PPC_C2K)                 += cuImage.c2k
 
+# Board port in arch/powerpc/platform/amigaone/Kconfig
+image-$(CONFIG_AMIGAONE)                += cuImage.amigaone
+
 # For 32-bit powermacs, build the COFF and miboot images
 # as well as the ELF images.
 ifeq ($(CONFIG_PPC32),y)
diff --git a/arch/powerpc/boot/cuboot-amigaone.c b/arch/powerpc/boot/cuboot-amigaone.c
new file mode 100644
index 000000000000..d5029674030b
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-amigaone.c
@@ -0,0 +1,35 @@
+/*
+ * Old U-boot compatibility for AmigaOne
+ *
+ * Author: Gerhard Pircher (gerhard_pircher@gmx.net)
+ *
+ *   Based on cuboot-83xx.c
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void platform_fixups(void)
+{
+        dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+        dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        CUBOOT_INIT();
+        fdt_init(_dtb_start);
+        serial_console_init();
+        platform_ops.fixups = platform_fixups;
+}
diff --git a/arch/powerpc/boot/dts/amigaone.dts b/arch/powerpc/boot/dts/amigaone.dts
new file mode 100644
index 000000000000..26549fca2ed4
--- /dev/null
+++ b/arch/powerpc/boot/dts/amigaone.dts
@@ -0,0 +1,173 @@
+/*
+ * AmigaOne Device Tree Source
+ *
+ * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "AmigaOne";
+        compatible = "eyetech,amigaone";
+        coherency-off;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        cpus {
+                #cpus = <1>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <32768>;         // L1, 32K
+                        i-cache-size = <32768>;         // L1, 32K
+                        timebase-frequency = <0>;       // 33.3 MHz, from U-boot
+                        clock-frequency = <0>;          // From U-boot
+                        bus-frequency = <0>;            // From U-boot
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0 0>;                            // From U-boot
+        };
+
+        pci@80000000 {
+                device_type = "pci";
+                compatible = "mai-logic,articia-s";
+                bus-frequency = <33333333>;
+                bus-range = <0 0xff>;
+                ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000       // PCI I/O
+                          0x02000000 0 0x80000000 0x80000000 0 0x7d000000       // PCI memory
+                          0x02000000 0 0x00000000 0xfd000000 0 0x01000000>;     // PCI alias memory (ISA)
+                // Configuration address and data register.
+                reg = <0xfec00cf8 4
+                       0xfee00cfc 4>;
+                8259-interrupt-acknowledge = <0xfef00000>;
+                // Do not define a interrupt-parent here, if there is no
+                // interrupt-map property.
+                #address-cells = <3>;
+                #size-cells = <2>;
+
+                isa@7 {
+                        device_type = "isa";
+                        compatible = "pciclass,0601";
+                        vendor-id = <0x00001106>;
+                        device-id = <0x00000686>;
+                        revision-id = <0x00000010>;
+                        class-code = <0x00060100>;
+                        subsystem-id = <0>;
+                        subsystem-vendor-id = <0>;
+                        devsel-speed = <0x00000001>;
+                        min-grant = <0>;
+                        max-latency = <0>;
+                        /* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
+                        ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00010000>;
+                        interrupt-parent = <&i8259>;
+                        #interrupt-cells = <2>;
+                        #address-cells = <2>;
+                        #size-cells = <1>;
+
+                        dma-controller@0 {
+                                compatible = "pnpPNP,200";
+                                reg = <1 0x00000000 0x00000020
+                                       1 0x00000080 0x00000010
+                                       1 0x000000c0 0x00000020>;
+                        };
+
+                        i8259: interrupt-controller@20 {
+                                device_type = "interrupt-controller";
+                                compatible = "pnpPNP,000";
+                                interrupt-controller;
+                                reg = <1 0x00000020 0x00000002
+                                       1 0x000000a0 0x00000002
+                                       1 0x000004d0 0x00000002>;
+                                reserved-interrupts = <2>;
+                                #interrupt-cells = <2>;
+                        };
+
+                        timer@40 {
+                                // Also adds pcspkr to platform devices.
+                                compatible = "pnpPNP,100";
+                                reg = <1 0x00000040 0x00000020>;
+                        };
+
+                        8042@60 {
+                                device_type = "8042";
+                                reg = <1 0x00000060 0x00000001
+                                       1 0x00000064 0x00000001>;
+                                interrupts = <1 3 12 3>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                keyboard@0 {
+                                        compatible = "pnpPNP,303";
+                                        reg = <0>;
+                                };
+
+                                mouse@1 {
+                                        compatible = "pnpPNP,f03";
+                                        reg = <1>;
+                                };
+                        };
+
+                        rtc@70 {
+                                compatible = "pnpPNP,b00";
+                                reg = <1 0x00000070 0x00000002>;
+                                interrupts = <8 3>;
+                        };
+
+                        serial@3f8 {
+                                device_type = "serial";
+                                compatible = "pnpPNP,501","pnpPNP,500";
+                                reg = <1 0x000003f8 0x00000008>;
+                                interrupts = <4 3>;
+                                clock-frequency = <1843200>;
+                                current-speed = <115200>;
+                        };
+
+                        serial@2f8 {
+                                device_type = "serial";
+                                compatible = "pnpPNP,501","pnpPNP,500";
+                                reg = <1 0x000002f8 0x00000008>;
+                                interrupts = <3 3>;
+                                clock-frequency = <1843200>;
+                                current-speed = <115200>;
+                        };
+
+                        parallel@378 {
+                                device_type = "parallel";
+                                // No ECP support for now, otherwise add "pnpPNP,401".
+                                compatible = "pnpPNP,400";
+                                reg = <1 0x00000378 0x00000003
+                                       1 0x00000778 0x00000003>;
+                        };
+
+                        fdc@3f0 {
+                                device_type = "fdc";
+                                compatible = "pnpPNP,700";
+                                reg = <1 0x000003f0 0x00000008>;
+                                interrupts = <6 3>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                disk@0 {
+                                        reg = <0>;
+                                };
+                        };
+                };
+        };
+
+        chosen {
+                linux,stdout-path = "/pci@80000000/isa@7/serial@3f8";
+        };
+};
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 524af7ef9f26..7da84fd7be93 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -181,70 +181,76 @@
                         phy_type = "ulpi";
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <17 0x8>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <18 0x8>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 08 e5 11 32 33 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         linux,network-index = <0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <18 0x8>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 08 e5 11 32 34 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         linux,network-index = <1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 4447def69dc5..5fd1ad09bdf2 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -149,6 +149,20 @@
                                         /*RXDE*/  0x5 0x4>;
                 };
 
+                USB0: ehci@bffd0400 {
+                        compatible = "ibm,usb-ehci-460ex", "usb-ehci";
+                        interrupt-parent = <&UIC2>;
+                        interrupts = <0x1d 4>;
+                        reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
+                };
+
+                USB1: usb@bffd0000 {
+                        compatible = "ohci-le";
+                        reg = <4 0xbffd0000 0x60>;
+                        interrupt-parent = <&UIC2>;
+                        interrupts = <0x1e 4>;
+                };
+
                 POB0: opb {
                         compatible = "ibm,opb-460ex", "ibm,opb";
                         #address-cells = <1>;
@@ -252,6 +266,20 @@
                                 reg = <0xef600700 0x00000014>;
                                 interrupt-parent = <&UIC0>;
                                 interrupts = <0x2 0x4>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                rtc@68 {
+                                        compatible = "stm,m41t80";
+                                        reg = <0x68>;
+                                        interrupt-parent = <&UIC2>;
+                                        interrupts = <0x19 0x8>;
+                                };
+                                sttm@48 {
+                                        compatible = "ad,ad7414";
+                                        reg = <0x48>;
+                                        interrupt-parent = <&UIC1>;
+                                        interrupts = <0x14 0x8>;
+                                };
                         };
 
                         IIC1: i2c@ef600800 {
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index 2f74cc4e093e..cee8080aa245 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -17,6 +17,7 @@
         compatible = "schindler,cm5200";
         #address-cells = <1>;
         #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
 
         cpus {
                 #address-cells = <1>;
@@ -66,7 +67,6 @@
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x600 0x10>;
                         interrupts = <1 9 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl,has-wdt;
                 };
 
@@ -74,84 +74,76 @@
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x610 0x10>;
                         interrupts = <1 10 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@620 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x620 0x10>;
                         interrupts = <1 11 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@630 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x630 0x10>;
                         interrupts = <1 12 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@640 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x640 0x10>;
                         interrupts = <1 13 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@650 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x650 0x10>;
                         interrupts = <1 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@660 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x660 0x10>;
                         interrupts = <1 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@670 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x670 0x10>;
                         interrupts = <1 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 rtc@800 {       // Real time clock
                         compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
                         reg = <0x800 0x100>;
                         interrupts = <1 5 0 1 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
-                gpio@b00 {
+                gpio_simple: gpio@b00 {
                         compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
                         reg = <0xb00 0x40>;
                         interrupts = <1 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
-                gpio@c00 {
+                gpio_wkup: gpio@c00 {
                         compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
                         reg = <0xc00 0x40>;
                         interrupts = <1 8 0 0 3 0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
                 spi@f00 {
                         compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
                         reg = <0xf00 0x20>;
                         interrupts = <2 13 0 2 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 usb@1000 {
                         compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
                         reg = <0x1000 0xff>;
                         interrupts = <2 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 dma-controller@1200 {
@@ -161,7 +153,6 @@
                                       3 4 0  3 5 0  3 6 0  3 7 0
                                       3 8 0  3 9 0  3 10 0  3 11 0
                                       3 12 0  3 13 0  3 14 0  3 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 xlb@1f00 {
@@ -170,48 +161,34 @@
                 };
 
                 serial@2000 {           // PSC1
-                        device_type = "serial";
                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        port-number = <0>;  // Logical port assignment
                         reg = <0x2000 0x100>;
                         interrupts = <2 1 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 serial@2200 {           // PSC2
-                        device_type = "serial";
-                        compatible = "fsl,mpc5200-psc-uart";
-                        port-number = <1>;  // Logical port assignment
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
                         reg = <0x2200 0x100>;
                         interrupts = <2 2 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 serial@2400 {           // PSC3
-                        device_type = "serial";
-                        compatible = "fsl,mpc5200-psc-uart";
-                        port-number = <2>;  // Logical port assignment
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
                         reg = <0x2400 0x100>;
                         interrupts = <2 3 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 serial@2c00 {           // PSC6
-                        device_type = "serial";
                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        port-number = <5>;  // Logical port assignment
                         reg = <0x2c00 0x100>;
                         interrupts = <2 4 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 ethernet@3000 {
-                        device_type = "network";
                         compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
                         reg = <0x3000 0x400>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <2 5 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         phy-handle = <&phy0>;
                 };
 
@@ -221,10 +198,8 @@
                         compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
                         reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
                         interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
-                        interrupt-parent = <&mpc5200_pic>;
 
                         phy0: ethernet-phy@0 {
-                                device_type = "ethernet-phy";
                                 reg = <0>;
                         };
                 };
@@ -235,7 +210,6 @@
                         compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                         reg = <0x3d40 0x40>;
                         interrupts = <2 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl5200-clocking;
                 };
 
@@ -245,9 +219,8 @@
                 };
         };
 
-        lpb {
-                model = "fsl,lpb";
-                compatible = "fsl,lpb";
+        localbus {
+                compatible = "fsl,mpc5200b-lpb","simple-bus";
                 #address-cells = <2>;
                 #size-cells = <1>;
                 ranges = <0 0 0xfc000000 0x2000000>;
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts
new file mode 100644
index 000000000000..4c36186ef946
--- /dev/null
+++ b/arch/powerpc/boot/dts/digsy_mtc.dts
@@ -0,0 +1,254 @@
+/*
+ * Digsy MTC board Device Tree Source
+ *
+ * Copyright (C) 2009 Semihalf
+ *
+ * Based on the CM5200 by M. Balakowicz
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "intercontrol,digsy-mtc";
+        compatible = "intercontrol,digsy-mtc";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,5200@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        d-cache-size = <0x4000>;                // L1, 16K
+                        i-cache-size = <0x4000>;                // L1, 16K
+                        timebase-frequency = <0>;       // from bootloader
+                        bus-frequency = <0>;            // from bootloader
+                        clock-frequency = <0>;          // from bootloader
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x02000000>;  // 32MB
+        };
+
+        soc5200@f0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc5200b-immr";
+                ranges = <0 0xf0000000 0x0000c000>;
+                reg = <0xf0000000 0x00000100>;
+                bus-frequency = <0>;            // from bootloader
+                system-frequency = <0>;         // from bootloader
+
+                cdm@200 {
+                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
+                        reg = <0x200 0x38>;
+                };
+
+                mpc5200_pic: interrupt-controller@500 {
+                        // 5200 interrupts are encoded into two levels;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
+                        reg = <0x500 0x80>;
+                };
+
+                timer@600 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x600 0x10>;
+                        interrupts = <1 9 0>;
+                        fsl,has-wdt;
+                };
+
+                timer@610 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x610 0x10>;
+                        interrupts = <1 10 0>;
+                };
+
+                timer@620 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x620 0x10>;
+                        interrupts = <1 11 0>;
+                };
+
+                timer@630 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x630 0x10>;
+                        interrupts = <1 12 0>;
+                };
+
+                timer@640 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x640 0x10>;
+                        interrupts = <1 13 0>;
+                };
+
+                timer@650 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x650 0x10>;
+                        interrupts = <1 14 0>;
+                };
+
+                timer@660 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x660 0x10>;
+                        interrupts = <1 15 0>;
+                };
+
+                timer@670 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x670 0x10>;
+                        interrupts = <1 16 0>;
+                };
+
+                gpio_simple: gpio@b00 {
+                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        reg = <0xb00 0x40>;
+                        interrupts = <1 7 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpio_wkup: gpio@c00 {
+                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        reg = <0xc00 0x40>;
+                        interrupts = <1 8 0 0 3 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                spi@f00 {
+                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+                        reg = <0xf00 0x20>;
+                        interrupts = <2 13 0 2 14 0>;
+                };
+
+                usb@1000 {
+                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
+                        reg = <0x1000 0xff>;
+                        interrupts = <2 6 0>;
+                };
+
+                dma-controller@1200 {
+                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+                        reg = <0x1200 0x80>;
+                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
+                                      3 4 0  3 5 0  3 6 0  3 7 0
+                                      3 8 0  3 9 0  3 10 0  3 11 0
+                                      3 12 0  3 13 0  3 14 0  3 15 0>;
+                };
+
+                xlb@1f00 {
+                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        reg = <0x1f00 0x100>;
+                };
+
+                serial@2600 {           // PSC4
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        reg = <0x2600 0x100>;
+                        interrupts = <2 11 0>;
+                };
+
+                serial@2800 {           // PSC5
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        reg = <0x2800 0x100>;
+                        interrupts = <2 12 0>;
+                };
+
+                ethernet@3000 {
+                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
+                        reg = <0x3000 0x400>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <2 5 0>;
+                        phy-handle = <&phy0>;
+                };
+
+                mdio@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+                        reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
+                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
+
+                        phy0: ethernet-phy@0 {
+                                reg = <0>;
+                        };
+                };
+
+                ata@3a00 {
+                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+                        reg = <0x3a00 0x100>;
+                        interrupts = <2 7 0>;
+                };
+
+                i2c@3d00 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+                        reg = <0x3d00 0x40>;
+                        interrupts = <2 15 0>;
+                        fsl5200-clocking;
+
+                        rtc@50 {
+                                compatible = "at,24c08";
+                                reg = <0x50>;
+                        };
+
+                        rtc@68 {
+                                compatible = "dallas,ds1339";
+                                reg = <0x68>;
+                        };
+                };
+
+                sram@8000 {
+                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+                        reg = <0x8000 0x4000>;
+                };
+        };
+
+        lpb {
+                compatible = "fsl,mpc5200b-lpb","simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges = <0 0 0xff000000 0x1000000>;
+
+                // 16-bit flash device at LocalPlus Bus CS0
+                flash@0,0 {
+                        compatible = "cfi-flash";
+                        reg = <0 0 0x1000000>;
+                        bank-width = <2>;
+                        device-width = <2>;
+                        #size-cells = <1>;
+                        #address-cells = <1>;
+
+                        partition@0 {
+                                label = "kernel";
+                                reg = <0x0 0x00200000>;
+                        };
+                        partition@200000 {
+                                label = "root";
+                                reg = <0x00200000 0x00300000>;
+                        };
+                        partition@500000 {
+                                label = "user";
+                                reg = <0x00500000 0x00a00000>;
+                        };
+                        partition@f00000 {
+                                label = "u-boot";
+                                reg = <0x00f00000 0x100000>;
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
new file mode 100644
index 000000000000..d47ad0718759
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -0,0 +1,367 @@
+/*
+ * GE Fanuc PPC9A Device Tree Source
+ *
+ * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * Based on: SBS CM6 Device Tree Source
+ * Copyright 2007 SBS Technologies GmbH & Co. KG
+ * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
+ * Copyright 2006 Freescale Semiconductor Inc.
+ */
+
+/*
+ * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
+ */
+
+/dts-v1/;
+
+/ {
+        model = "GEF_PPC9A";
+        compatible = "gef,ppc9a";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8641@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <32768>;         // L1, 32K
+                        i-cache-size = <32768>;         // L1, 32K
+                        timebase-frequency = <0>;       // From uboot
+                        bus-frequency = <0>;            // From uboot
+                        clock-frequency = <0>;          // From uboot
+                };
+                PowerPC,8641@1 {
+                        device_type = "cpu";
+                        reg = <1>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <32768>;         // L1, 32K
+                        i-cache-size = <32768>;         // L1, 32K
+                        timebase-frequency = <0>;       // From uboot
+                        bus-frequency = <0>;            // From uboot
+                        clock-frequency = <0>;          // From uboot
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x40000000>; // set by uboot
+        };
+
+        localbus@fef05000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8641-localbus", "simple-bus";
+                reg = <0xfef05000 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+
+                ranges = <0 0 0xff000000 0x01000000     // 16MB Boot flash
+                          1 0 0xe8000000 0x08000000     // Paged Flash 0
+                          2 0 0xe0000000 0x08000000     // Paged Flash 1
+                          3 0 0xfc100000 0x00020000     // NVRAM
+                          4 0 0xfc000000 0x00008000     // FPGA
+                          5 0 0xfc008000 0x00008000     // AFIX FPGA
+                          6 0 0xfd000000 0x00800000     // IO FPGA (8-bit)
+                          7 0 0xfd800000 0x00800000>;   // IO FPGA (32-bit)
+
+                /* flash@0,0 is a mirror of part of the memory in flash@1,0
+                flash@0,0 {
+                        compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
+                        reg = <0x0 0x0 0x1000000>;
+                        bank-width = <4>;
+                        device-width = <2>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "firmware";
+                                reg = <0x0 0x1000000>;
+                                read-only;
+                        };
+                };
+                */
+
+                flash@1,0 {
+                        compatible = "gef,ppc9a-paged-flash", "cfi-flash";
+                        reg = <0x1 0x0 0x8000000>;
+                        bank-width = <4>;
+                        device-width = <2>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "user";
+                                reg = <0x0 0x7800000>;
+                        };
+                        partition@7800000 {
+                                label = "firmware";
+                                reg = <0x7800000 0x800000>;
+                                read-only;
+                        };
+                };
+
+                fpga@4,0 {
+                        compatible = "gef,ppc9a-fpga-regs";
+                        reg = <0x4 0x0 0x40>;
+                };
+
+                wdt@4,2000 {
+                        compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
+                                "gef,fpga-wdt";
+                        reg = <0x4 0x2000 0x8>;
+                        interrupts = <0x1a 0x4>;
+                        interrupt-parent = <&gef_pic>;
+                };
+                /* Second watchdog available, driver currently supports one.
+                wdt@4,2010 {
+                        compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
+                                "gef,fpga-wdt";
+                        reg = <0x4 0x2010 0x8>;
+                        interrupts = <0x1b 0x4>;
+                        interrupt-parent = <&gef_pic>;
+                };
+                */
+                gef_pic: pic@4,4000 {
+                        #interrupt-cells = <1>;
+                        interrupt-controller;
+                        compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00";
+                        reg = <0x4 0x4000 0x20>;
+                        interrupts = <0x8
+                                      0x9>;
+                        interrupt-parent = <&mpic>;
+
+                };
+                gef_gpio: gpio@7,14000 {
+                        #gpio-cells = <2>;
+                        compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio";
+                        reg = <0x7 0x14000 0x24>;
+                        gpio-controller;
+                };
+        };
+
+        soc@fef00000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                #interrupt-cells = <2>;
+                compatible = "fsl,mpc8641-soc", "simple-bus";
+                ranges = <0x0 0xfef00000 0x00100000>;
+                reg = <0xfef00000 0x100000>;    // CCSRBAR 1M
+                bus-frequency = <33333333>;
+
+                i2c1: i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <0x2b 0x2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        hwmon@48 {
+                                compatible = "national,lm92";
+                                reg = <0x48>;
+                        };
+
+                        hwmon@4c {
+                                compatible = "adi,adt7461";
+                                reg = <0x4c>;
+                        };
+
+                        rtc@51 {
+                                compatible = "epson,rx8581";
+                                reg = <0x00000051>;
+                        };
+
+                        eti@6b {
+                                compatible = "dallas,ds1682";
+                                reg = <0x6b>;
+                        };
+                };
+
+                i2c2: i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <0x2b 0x2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                           "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                           "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                           "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                           "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "gmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&gef_pic>;
+                                        interrupts = <0x9 0x4>;
+                                        reg = <1>;
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&gef_pic>;
+                                        interrupts = <0x8 0x4>;
+                                        reg = <3>;
+                                };
+                        };
+                };
+
+                enet1: ethernet@26000 {
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy2>;
+                        phy-connection-type = "gmii";
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0x2a 0x2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0x1c 0x2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                mpic: pic@40000 {
+                        clock-frequency = <0>;
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+
+                global-utilities@e0000 {
+                        compatible = "fsl,mpc8641-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+        };
+
+        pci0: pcie@fef08000 {
+                compatible = "fsl,mpc8641-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xfef08000 0x1000>;
+                bus-range = <0x0 0xff>;
+                ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
+                          0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <0x18 0x2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                >;
+
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x02000000 0x0 0x80000000
+                                  0x02000000 0x0 0x80000000
+                                  0x0 0x40000000
+
+                                  0x01000000 0x0 0x00000000
+                                  0x01000000 0x0 0x00000000
+                                  0x0 0x00400000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
new file mode 100644
index 000000000000..1569117e5ddc
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -0,0 +1,367 @@
+/*
+ * GE Fanuc SBC310 Device Tree Source
+ *
+ * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * Based on: SBS CM6 Device Tree Source
+ * Copyright 2007 SBS Technologies GmbH & Co. KG
+ * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
+ * Copyright 2006 Freescale Semiconductor Inc.
+ */
+
+/*
+ * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
+ */
+
+/dts-v1/;
+
+/ {
+        model = "GEF_SBC310";
+        compatible = "gef,sbc310";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8641@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <32768>;         // L1, 32K
+                        i-cache-size = <32768>;         // L1, 32K
+                        timebase-frequency = <0>;       // From uboot
+                        bus-frequency = <0>;            // From uboot
+                        clock-frequency = <0>;          // From uboot
+                };
+                PowerPC,8641@1 {
+                        device_type = "cpu";
+                        reg = <1>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <32768>;         // L1, 32K
+                        i-cache-size = <32768>;         // L1, 32K
+                        timebase-frequency = <0>;       // From uboot
+                        bus-frequency = <0>;            // From uboot
+                        clock-frequency = <0>;          // From uboot
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x40000000>; // set by uboot
+        };
+
+        localbus@fef05000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8641-localbus", "simple-bus";
+                reg = <0xfef05000 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+
+                ranges = <0 0 0xff000000 0x01000000     // 16MB Boot flash
+                          1 0 0xe0000000 0x08000000     // Paged Flash 0
+                          2 0 0xe8000000 0x08000000     // Paged Flash 1
+                          3 0 0xfc100000 0x00020000     // NVRAM
+                          4 0 0xfc000000 0x00010000>;   // FPGA
+
+                /* flash@0,0 is a mirror of part of the memory in flash@1,0
+                flash@0,0 {
+                        compatible = "cfi-flash";
+                        reg = <0 0 0x01000000>;
+                        bank-width = <2>;
+                        device-width = <2>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "firmware";
+                                reg = <0x00000000 0x01000000>;
+                                read-only;
+                        };
+                };
+                */
+
+                flash@1,0 {
+                        compatible = "cfi-flash";
+                        reg = <1 0 0x8000000>;
+                        bank-width = <2>;
+                        device-width = <2>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "user";
+                                reg = <0x00000000 0x07800000>;
+                        };
+                        partition@7800000 {
+                                label = "firmware";
+                                reg = <0x07800000 0x00800000>;
+                                read-only;
+                        };
+                };
+
+                fpga@4,0 {
+                        compatible = "gef,fpga-regs";
+                        reg = <0x4 0x0 0x40>;
+                };
+
+                wdt@4,2000 {
+                        #interrupt-cells = <2>;
+                        device_type = "watchdog";
+                        compatible = "gef,fpga-wdt";
+                        reg = <0x4 0x2000 0x8>;
+                        interrupts = <0x1a 0x4>;
+                        interrupt-parent = <&gef_pic>;
+                };
+/*
+                wdt@4,2010 {
+                        #interrupt-cells = <2>;
+                        device_type = "watchdog";
+                        compatible = "gef,fpga-wdt";
+                        reg = <0x4 0x2010 0x8>;
+                        interrupts = <0x1b 0x4>;
+                        interrupt-parent = <&gef_pic>;
+                };
+*/
+                gef_pic: pic@4,4000 {
+                        #interrupt-cells = <1>;
+                        interrupt-controller;
+                        compatible = "gef,fpga-pic";
+                        reg = <0x4 0x4000 0x20>;
+                        interrupts = <0x8
+                                      0x9>;
+                        interrupt-parent = <&mpic>;
+
+                };
+                gef_gpio: gpio@4,8000 {
+                        #gpio-cells = <2>;
+                        compatible = "gef,sbc310-gpio";
+                        reg = <0x4 0x8000 0x24>;
+                        gpio-controller;
+                };
+        };
+
+        soc@fef00000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                #interrupt-cells = <2>;
+                device_type = "soc";
+                compatible = "simple-bus";
+                ranges = <0x0 0xfef00000 0x00100000>;
+                reg = <0xfef00000 0x100000>;    // CCSRBAR 1M
+                bus-frequency = <33333333>;
+
+                i2c1: i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <0x2b 0x2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        rtc@51 {
+                                compatible = "epson,rx8581";
+                                reg = <0x00000051>;
+                        };
+                };
+
+                i2c2: i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <0x2b 0x2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        hwmon@48 {
+                                compatible = "national,lm92";
+                                reg = <0x48>;
+                        };
+
+                        hwmon@4c {
+                                compatible = "adi,adt7461";
+                                reg = <0x4c>;
+                        };
+
+                        eti@6b {
+                                compatible = "dallas,ds1682";
+                                reg = <0x6b>;
+                        };
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                           "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                           "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                           "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8641-dma-channel",
+                                           "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "gmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&gef_pic>;
+                                        interrupts = <0x9 0x4>;
+                                        reg = <1>;
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&gef_pic>;
+                                        interrupts = <0x8 0x4>;
+                                        reg = <3>;
+                                };
+                        };
+                };
+
+                enet1: ethernet@26000 {
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy2>;
+                        phy-connection-type = "gmii";
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0x2a 0x2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <0x1c 0x2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                mpic: pic@40000 {
+                        clock-frequency = <0>;
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+
+                global-utilities@e0000 {
+                        compatible = "fsl,mpc8641-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+        };
+
+        pci0: pcie@fef08000 {
+                compatible = "fsl,mpc8641-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xfef08000 0x1000>;
+                bus-range = <0x0 0xff>;
+                ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
+                          0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <0x18 0x2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
+                        0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
+                        0x0000 0x0 0x0 0x3 &mpic 0x2 0x2
+                        0x0000 0x0 0x0 0x4 &mpic 0x3 0x2
+                >;
+
+                pcie@0 {
+                        reg = <0 0 0 0 0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x02000000 0x0 0x80000000
+                                  0x02000000 0x0 0x80000000
+                                  0x0 0x40000000
+
+                                  0x01000000 0x0 0x00000000
+                                  0x01000000 0x0 0x00000000
+                                  0x0 0x00400000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index e78c355c7bac..6582dbd36da7 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -71,7 +71,7 @@
                 #address-cells = <2>;
                 #size-cells = <1>;
                 compatible = "fsl,mpc8641-localbus", "simple-bus";
-                reg = <0xf8005000 0x1000>;
+                reg = <0xfef05000 0x1000>;
                 interrupts = <19 2>;
                 interrupt-parent = <&mpic>;
 
@@ -202,34 +202,37 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&gef_pic>;
-                                interrupts = <0x9 0x4>;
-                                reg = <1>;
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&gef_pic>;
-                                interrupts = <0x8 0x4>;
-                                reg = <3>;
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "gmii";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&gef_pic>;
+                                        interrupts = <0x9 0x4>;
+                                        reg = <1>;
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&gef_pic>;
+                                        interrupts = <0x8 0x4>;
+                                        reg = <3>;
+                                };
+                        };
                 };
 
                 enet1: ethernet@26000 {
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index 3bfff47418db..308fe7c29dea 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -124,67 +124,72 @@
                         };
                 };
 
-                mdio@24520 {                                    /* For TSECs */
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        PHY1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-
-                        PHY2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         /* Mac address filled in by bootwrapper */
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&PHY1>;
+
+                        mdio@520 {                                      /* For TSECs */
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                PHY1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                PHY2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         /* Mac address filled in by bootwrapper */
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&PHY2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 3f7a5dce8de0..de30b3f9eb26 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -17,6 +17,7 @@
         compatible = "fsl,lite5200";
         #address-cells = <1>;
         #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
 
         cpus {
                 #address-cells = <1>;
@@ -58,96 +59,74 @@
                         // 5200 interrupts are encoded into two levels;
                         interrupt-controller;
                         #interrupt-cells = <3>;
-                        device_type = "interrupt-controller";
                         compatible = "fsl,mpc5200-pic";
                         reg = <0x500 0x80>;
                 };
 
                 timer@600 {     // General Purpose Timer
                         compatible = "fsl,mpc5200-gpt";
-                        cell-index = <0>;
                         reg = <0x600 0x10>;
                         interrupts = <1 9 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl,has-wdt;
                 };
 
                 timer@610 {     // General Purpose Timer
                         compatible = "fsl,mpc5200-gpt";
-                        cell-index = <1>;
                         reg = <0x610 0x10>;
                         interrupts = <1 10 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@620 {     // General Purpose Timer
                         compatible = "fsl,mpc5200-gpt";
-                        cell-index = <2>;
                         reg = <0x620 0x10>;
                         interrupts = <1 11 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@630 {     // General Purpose Timer
                         compatible = "fsl,mpc5200-gpt";
-                        cell-index = <3>;
                         reg = <0x630 0x10>;
                         interrupts = <1 12 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@640 {     // General Purpose Timer
                         compatible = "fsl,mpc5200-gpt";
-                        cell-index = <4>;
                         reg = <0x640 0x10>;
                         interrupts = <1 13 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@650 {     // General Purpose Timer
                         compatible = "fsl,mpc5200-gpt";
-                        cell-index = <5>;
                         reg = <0x650 0x10>;
                         interrupts = <1 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@660 {     // General Purpose Timer
                         compatible = "fsl,mpc5200-gpt";
-                        cell-index = <6>;
                         reg = <0x660 0x10>;
                         interrupts = <1 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@670 {     // General Purpose Timer
                         compatible = "fsl,mpc5200-gpt";
-                        cell-index = <7>;
                         reg = <0x670 0x10>;
                         interrupts = <1 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 rtc@800 {       // Real time clock
                         compatible = "fsl,mpc5200-rtc";
                         reg = <0x800 0x100>;
                         interrupts = <1 5 0 1 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 can@900 {
                         compatible = "fsl,mpc5200-mscan";
-                        cell-index = <0>;
                         interrupts = <2 17 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         reg = <0x900 0x80>;
                 };
 
                 can@980 {
                         compatible = "fsl,mpc5200-mscan";
-                        cell-index = <1>;
                         interrupts = <2 18 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         reg = <0x980 0x80>;
                 };
 
@@ -155,39 +134,33 @@
                         compatible = "fsl,mpc5200-gpio";
                         reg = <0xb00 0x40>;
                         interrupts = <1 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 gpio@c00 {
                         compatible = "fsl,mpc5200-gpio-wkup";
                         reg = <0xc00 0x40>;
                         interrupts = <1 8 0 0 3 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 spi@f00 {
                         compatible = "fsl,mpc5200-spi";
                         reg = <0xf00 0x20>;
                         interrupts = <2 13 0 2 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 usb@1000 {
                         compatible = "fsl,mpc5200-ohci","ohci-be";
                         reg = <0x1000 0xff>;
                         interrupts = <2 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 dma-controller@1200 {
-                        device_type = "dma-controller";
                         compatible = "fsl,mpc5200-bestcomm";
                         reg = <0x1200 0x80>;
                         interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
                                       3 4 0  3 5 0  3 6 0  3 7 0
                                       3 8 0  3 9 0  3 10 0  3 11 0
                                       3 12 0  3 13 0  3 14 0  3 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 xlb@1f00 {
@@ -196,13 +169,10 @@
                 };
 
                 serial@2000 {           // PSC1
-                        device_type = "serial";
                         compatible = "fsl,mpc5200-psc-uart";
-                        port-number = <0>;  // Logical port assignment
                         cell-index = <0>;
                         reg = <0x2000 0x100>;
                         interrupts = <2 1 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 // PSC2 in ac97 mode example
@@ -211,7 +181,6 @@
                 //      cell-index = <1>;
                 //      reg = <0x2200 0x100>;
                 //      interrupts = <2 2 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 // PSC3 in CODEC mode example
@@ -220,27 +189,22 @@
                 //      cell-index = <2>;
                 //      reg = <0x2400 0x100>;
                 //      interrupts = <2 3 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 // PSC4 in uart mode example
                 //serial@2600 {         // PSC4
-                //      device_type = "serial";
                 //      compatible = "fsl,mpc5200-psc-uart";
                 //      cell-index = <3>;
                 //      reg = <0x2600 0x100>;
                 //      interrupts = <2 11 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 // PSC5 in uart mode example
                 //serial@2800 {         // PSC5
-                //      device_type = "serial";
                 //      compatible = "fsl,mpc5200-psc-uart";
                 //      cell-index = <4>;
                 //      reg = <0x2800 0x100>;
                 //      interrupts = <2 12 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 // PSC6 in spi mode example
@@ -249,16 +213,13 @@
                 //      cell-index = <5>;
                 //      reg = <0x2c00 0x100>;
                 //      interrupts = <2 4 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 ethernet@3000 {
-                        device_type = "network";
                         compatible = "fsl,mpc5200-fec";
                         reg = <0x3000 0x400>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <2 5 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         phy-handle = <&phy0>;
                 };
 
@@ -268,30 +229,24 @@
                         compatible = "fsl,mpc5200-mdio";
                         reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
                         interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
-                        interrupt-parent = <&mpc5200_pic>;
 
                         phy0: ethernet-phy@1 {
-                                device_type = "ethernet-phy";
                                 reg = <1>;
                         };
                 };
 
                 ata@3a00 {
-                        device_type = "ata";
                         compatible = "fsl,mpc5200-ata";
                         reg = <0x3a00 0x100>;
                         interrupts = <2 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 i2c@3d00 {
                         #address-cells = <1>;
                         #size-cells = <0>;
                         compatible = "fsl,mpc5200-i2c","fsl-i2c";
-                        cell-index = <0>;
                         reg = <0x3d00 0x40>;
                         interrupts = <2 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl5200-clocking;
                 };
 
@@ -299,14 +254,12 @@
                         #address-cells = <1>;
                         #size-cells = <0>;
                         compatible = "fsl,mpc5200-i2c","fsl-i2c";
-                        cell-index = <1>;
                         reg = <0x3d40 0x40>;
                         interrupts = <2 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl5200-clocking;
                 };
                 sram@8000 {
-                        compatible = "fsl,mpc5200-sram","sram";
+                        compatible = "fsl,mpc5200-sram";
                         reg = <0x8000 0x4000>;
                 };
         };
@@ -325,7 +278,6 @@
                                  0xc000 0 0 4 &mpc5200_pic 0 0 3>;
                 clock-frequency = <0>; // From boot loader
                 interrupts = <2 8 0 2 9 0 2 10 0>;
-                interrupt-parent = <&mpc5200_pic>;
                 bus-range = <0 0>;
                 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
                           0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 63e3bb48e843..c63e3566479e 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -17,6 +17,7 @@
         compatible = "fsl,lite5200b";
         #address-cells = <1>;
         #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
 
         cpus {
                 #address-cells = <1>;
@@ -58,136 +59,112 @@
                         // 5200 interrupts are encoded into two levels;
                         interrupt-controller;
                         #interrupt-cells = <3>;
-                        device_type = "interrupt-controller";
                         compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
                         reg = <0x500 0x80>;
                 };
 
                 timer@600 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <0>;
                         reg = <0x600 0x10>;
                         interrupts = <1 9 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl,has-wdt;
                 };
 
                 timer@610 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <1>;
                         reg = <0x610 0x10>;
                         interrupts = <1 10 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@620 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <2>;
                         reg = <0x620 0x10>;
                         interrupts = <1 11 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@630 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <3>;
                         reg = <0x630 0x10>;
                         interrupts = <1 12 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@640 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <4>;
                         reg = <0x640 0x10>;
                         interrupts = <1 13 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@650 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <5>;
                         reg = <0x650 0x10>;
                         interrupts = <1 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@660 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <6>;
                         reg = <0x660 0x10>;
                         interrupts = <1 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@670 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <7>;
                         reg = <0x670 0x10>;
                         interrupts = <1 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 rtc@800 {       // Real time clock
                         compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
                         reg = <0x800 0x100>;
                         interrupts = <1 5 0 1 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 can@900 {
                         compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        cell-index = <0>;
                         interrupts = <2 17 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         reg = <0x900 0x80>;
                 };
 
                 can@980 {
                         compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        cell-index = <1>;
                         interrupts = <2 18 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         reg = <0x980 0x80>;
                 };
 
-                gpio@b00 {
+                gpio_simple: gpio@b00 {
                         compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
                         reg = <0xb00 0x40>;
                         interrupts = <1 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
-                gpio@c00 {
+                gpio_wkup: gpio@c00 {
                         compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
                         reg = <0xc00 0x40>;
                         interrupts = <1 8 0 0 3 0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
                 spi@f00 {
                         compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
                         reg = <0xf00 0x20>;
                         interrupts = <2 13 0 2 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 usb@1000 {
                         compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
                         reg = <0x1000 0xff>;
                         interrupts = <2 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 dma-controller@1200 {
-                        device_type = "dma-controller";
                         compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
                         reg = <0x1200 0x80>;
                         interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
                                       3 4 0  3 5 0  3 6 0  3 7 0
                                       3 8 0  3 9 0  3 10 0  3 11 0
                                       3 12 0  3 13 0  3 14 0  3 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 xlb@1f00 {
@@ -196,13 +173,10 @@
                 };
 
                 serial@2000 {           // PSC1
-                        device_type = "serial";
                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        port-number = <0>;  // Logical port assignment
                         cell-index = <0>;
                         reg = <0x2000 0x100>;
                         interrupts = <2 1 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 // PSC2 in ac97 mode example
@@ -211,7 +185,6 @@
                 //      cell-index = <1>;
                 //      reg = <0x2200 0x100>;
                 //      interrupts = <2 2 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 // PSC3 in CODEC mode example
@@ -220,27 +193,22 @@
                 //      cell-index = <2>;
                 //      reg = <0x2400 0x100>;
                 //      interrupts = <2 3 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 // PSC4 in uart mode example
                 //serial@2600 {         // PSC4
-                //      device_type = "serial";
                 //      compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
                 //      cell-index = <3>;
                 //      reg = <0x2600 0x100>;
                 //      interrupts = <2 11 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 // PSC5 in uart mode example
                 //serial@2800 {         // PSC5
-                //      device_type = "serial";
                 //      compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
                 //      cell-index = <4>;
                 //      reg = <0x2800 0x100>;
                 //      interrupts = <2 12 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 // PSC6 in spi mode example
@@ -249,49 +217,40 @@
                 //      cell-index = <5>;
                 //      reg = <0x2c00 0x100>;
                 //      interrupts = <2 4 0>;
-                //      interrupt-parent = <&mpc5200_pic>;
                 //};
 
                 ethernet@3000 {
-                        device_type = "network";
                         compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
                         reg = <0x3000 0x400>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <2 5 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         phy-handle = <&phy0>;
                 };
 
                 mdio@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
+                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
                         reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
                         interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
-                        interrupt-parent = <&mpc5200_pic>;
 
                         phy0: ethernet-phy@0 {
-                                device_type = "ethernet-phy";
                                 reg = <0>;
                         };
                 };
 
                 ata@3a00 {
-                        device_type = "ata";
                         compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
                         reg = <0x3a00 0x100>;
                         interrupts = <2 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 i2c@3d00 {
                         #address-cells = <1>;
                         #size-cells = <0>;
                         compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        cell-index = <0>;
                         reg = <0x3d00 0x40>;
                         interrupts = <2 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl5200-clocking;
                 };
 
@@ -299,14 +258,13 @@
                         #address-cells = <1>;
                         #size-cells = <0>;
                         compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        cell-index = <1>;
                         reg = <0x3d40 0x40>;
                         interrupts = <2 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl5200-clocking;
                 };
+
                 sram@8000 {
-                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
+                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
                         reg = <0x8000 0x4000>;
                 };
         };
@@ -330,7 +288,6 @@
                                  0xc800 0 0 4 &mpc5200_pic 0 0 3>;
                 clock-frequency = <0>; // From boot loader
                 interrupts = <2 8 0 2 9 0 2 10 0>;
-                interrupt-parent = <&mpc5200_pic>;
                 bus-range = <0 0>;
                 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
                           0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/media5200.dts b/arch/powerpc/boot/dts/media5200.dts
new file mode 100644
index 000000000000..e297d8b41875
--- /dev/null
+++ b/arch/powerpc/boot/dts/media5200.dts
@@ -0,0 +1,318 @@
+/*
+ * Freescale Media5200 board Device Tree Source
+ *
+ * Copyright 2009 Secret Lab Technologies Ltd.
+ * Grant Likely <grant.likely@secretlab.ca>
+ * Steven Cavanagh <scavanagh@secretlab.ca>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "fsl,media5200";
+        compatible = "fsl,media5200";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
+
+        aliases {
+                console = &console;
+                ethernet0 = &eth0;
+        };
+
+        chosen {
+                linux,stdout-path = &console;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,5200@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        d-cache-size = <0x4000>;                // L1, 16K
+                        i-cache-size = <0x4000>;                // L1, 16K
+                        timebase-frequency = <33000000>;        // 33 MHz, these were configured by U-Boot
+                        bus-frequency = <132000000>;            // 132 MHz
+                        clock-frequency = <396000000>;          // 396 MHz
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x08000000>;  // 128MB RAM
+        };
+
+        soc@f0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc5200b-immr";
+                ranges = <0 0xf0000000 0x0000c000>;
+                reg = <0xf0000000 0x00000100>;
+                bus-frequency = <132000000>;// 132 MHz
+                system-frequency = <0>;         // from bootloader
+
+                cdm@200 {
+                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
+                        reg = <0x200 0x38>;
+                };
+
+                mpc5200_pic: interrupt-controller@500 {
+                        // 5200 interrupts are encoded into two levels;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
+                        reg = <0x500 0x80>;
+                };
+
+                timer@600 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x600 0x10>;
+                        interrupts = <1 9 0>;
+                        fsl,has-wdt;
+                };
+
+                timer@610 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x610 0x10>;
+                        interrupts = <1 10 0>;
+                };
+
+                timer@620 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x620 0x10>;
+                        interrupts = <1 11 0>;
+                };
+
+                timer@630 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x630 0x10>;
+                        interrupts = <1 12 0>;
+                };
+
+                timer@640 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x640 0x10>;
+                        interrupts = <1 13 0>;
+                };
+
+                timer@650 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x650 0x10>;
+                        interrupts = <1 14 0>;
+                };
+
+                timer@660 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x660 0x10>;
+                        interrupts = <1 15 0>;
+                };
+
+                timer@670 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x670 0x10>;
+                        interrupts = <1 16 0>;
+                };
+
+                rtc@800 {       // Real time clock
+                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
+                        reg = <0x800 0x100>;
+                        interrupts = <1 5 0 1 6 0>;
+                };
+
+                can@900 {
+                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+                        interrupts = <2 17 0>;
+                        reg = <0x900 0x80>;
+                };
+
+                can@980 {
+                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+                        interrupts = <2 18 0>;
+                        reg = <0x980 0x80>;
+                };
+
+                gpio_simple: gpio@b00 {
+                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        reg = <0xb00 0x40>;
+                        interrupts = <1 7 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpio_wkup: gpio@c00 {
+                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        reg = <0xc00 0x40>;
+                        interrupts = <1 8 0 0 3 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                spi@f00 {
+                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+                        reg = <0xf00 0x20>;
+                        interrupts = <2 13 0 2 14 0>;
+                };
+
+                usb@1000 {
+                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
+                        reg = <0x1000 0x100>;
+                        interrupts = <2 6 0>;
+                };
+
+                dma-controller@1200 {
+                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+                        reg = <0x1200 0x80>;
+                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
+                                      3 4 0  3 5 0  3 6 0  3 7 0
+                                      3 8 0  3 9 0  3 10 0  3 11 0
+                                      3 12 0  3 13 0  3 14 0  3 15 0>;
+                };
+
+                xlb@1f00 {
+                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        reg = <0x1f00 0x100>;
+                };
+
+                // PSC6 in uart mode
+                console: serial@2c00 {          // PSC6
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        cell-index = <5>;
+                        port-number = <0>;  // Logical port assignment
+                        reg = <0x2c00 0x100>;
+                        interrupts = <2 4 0>;
+                };
+
+                eth0: ethernet@3000 {
+                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
+                        reg = <0x3000 0x400>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <2 5 0>;
+                        phy-handle = <&phy0>;
+                };
+
+                mdio@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
+                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
+
+                        phy0: ethernet-phy@0 {
+                                reg = <0>;
+                        };
+                };
+
+                ata@3a00 {
+                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+                        reg = <0x3a00 0x100>;
+                        interrupts = <2 7 0>;
+                };
+
+                i2c@3d00 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+                        reg = <0x3d00 0x40>;
+                        interrupts = <2 15 0>;
+                        fsl5200-clocking;
+                };
+
+                i2c@3d40 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+                        reg = <0x3d40 0x40>;
+                        interrupts = <2 16 0>;
+                        fsl5200-clocking;
+                };
+
+                sram@8000 {
+                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+                        reg = <0x8000 0x4000>;
+                };
+        };
+
+        pci@f0000d00 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
+                reg = <0xf0000d00 0x100>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot
+                                 0xc000 0 0 2 &media5200_fpga 0 3
+                                 0xc000 0 0 3 &media5200_fpga 0 4
+                                 0xc000 0 0 4 &media5200_fpga 0 5
+
+                                 0xc800 0 0 1 &media5200_fpga 0 3 // 2nd slot
+                                 0xc800 0 0 2 &media5200_fpga 0 4
+                                 0xc800 0 0 3 &media5200_fpga 0 5
+                                 0xc800 0 0 4 &media5200_fpga 0 2
+
+                                 0xd000 0 0 1 &media5200_fpga 0 4 // miniPCI
+                                 0xd000 0 0 2 &media5200_fpga 0 5
+
+                                 0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP
+                                >;
+                clock-frequency = <0>; // From boot loader
+                interrupts = <2 8 0 2 9 0 2 10 0>;
+                interrupt-parent = <&mpc5200_pic>;
+                bus-range = <0 0>;
+                ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
+                          0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
+        };
+
+        localbus {
+                compatible = "fsl,mpc5200b-lpb","simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+
+                ranges = < 0 0 0xfc000000 0x02000000
+                           1 0 0xfe000000 0x02000000
+                           2 0 0xf0010000 0x00010000
+                           3 0 0xf0020000 0x00010000 >;
+
+                flash@0,0 {
+                        compatible = "amd,am29lv28ml", "cfi-flash";
+                        reg = <0 0x0 0x2000000>;                // 32 MB
+                        bank-width = <4>;                       // Width in bytes of the flash bank
+                        device-width = <2>;                     // Two devices on each bank
+                };
+
+                flash@1,0 {
+                        compatible = "amd,am29lv28ml", "cfi-flash";
+                        reg = <1 0 0x2000000>;                  // 32 MB
+                        bank-width = <4>;                       // Width in bytes of the flash bank
+                        device-width = <2>;                     // Two devices on each bank
+                };
+
+                media5200_fpga: fpga@2,0 {
+                        compatible = "fsl,media5200-fpga";
+                        interrupt-controller;
+                        #interrupt-cells = <2>; // 0:bank 1:id; no type field
+                        reg = <2 0 0x10000>;
+
+                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <0 0 3     // IRQ bank 0
+                                      1 1 3>;   // IRQ bank 1
+                };
+
+                uart@3,0 {
+                        compatible = "ti,tl16c752bpt";
+                        reg = <3 0 0x10000>;
+                        interrupt-parent = <&media5200_fpga>;
+                        interrupts = <0 0  0 1>; // 2 irqs
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 52ba6f98b273..7be8ca038676 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -17,6 +17,7 @@
         compatible = "promess,motionpro";
         #address-cells = <1>;
         #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
 
         cpus {
                 #address-cells = <1>;
@@ -66,7 +67,6 @@
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x600 0x10>;
                         interrupts = <1 9 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl,has-wdt;
                 };
 
@@ -74,35 +74,30 @@
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x610 0x10>;
                         interrupts = <1 10 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@620 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x620 0x10>;
                         interrupts = <1 11 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@630 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x630 0x10>;
                         interrupts = <1 12 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@640 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x640 0x10>;
                         interrupts = <1 13 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 timer@650 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
                         reg = <0x650 0x10>;
                         interrupts = <1 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 motionpro-led@660 {     // Motion-PRO status LED
@@ -110,7 +105,6 @@
                         label = "motionpro-statusled";
                         reg = <0x660 0x10>;
                         interrupts = <1 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         blink-delay = <100>; // 100 msec
                 };
 
@@ -119,49 +113,46 @@
                         label = "motionpro-readyled";
                         reg = <0x670 0x10>;
                         interrupts = <1 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 rtc@800 {       // Real time clock
                         compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
                         reg = <0x800 0x100>;
                         interrupts = <1 5 0 1 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 can@980 {
                         compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
                         interrupts = <2 18 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         reg = <0x980 0x80>;
                 };
 
-                gpio@b00 {
+                gpio_simple: gpio@b00 {
                         compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
                         reg = <0xb00 0x40>;
                         interrupts = <1 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
-                gpio@c00 {
+                gpio_wkup: gpio@c00 {
                         compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
                         reg = <0xc00 0x40>;
                         interrupts = <1 8 0 0 3 0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
                 spi@f00 {
                         compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
                         reg = <0xf00 0x20>;
                         interrupts = <2 13 0 2 14 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 usb@1000 {
                         compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
                         reg = <0x1000 0xff>;
                         interrupts = <2 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 dma-controller@1200 {
@@ -171,7 +162,6 @@
                                       3 4 0  3 5 0  3 6 0  3 7 0
                                       3 8 0  3 9 0  3 10 0  3 11 0
                                       3 12 0  3 13 0  3 14 0  3 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 xlb@1f00 {
@@ -180,12 +170,9 @@
                 };
 
                 serial@2000 {           // PSC1
-                        device_type = "serial";
                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        port-number = <0>;  // Logical port assignment
                         reg = <0x2000 0x100>;
                         interrupts = <2 1 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 // PSC2 in spi master mode 
@@ -194,26 +181,20 @@
                         cell-index = <1>;
                         reg = <0x2200 0x100>;
                         interrupts = <2 2 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 // PSC5 in uart mode
                 serial@2800 {           // PSC5
-                        device_type = "serial";
                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        port-number = <4>;  // Logical port assignment
                         reg = <0x2800 0x100>;
                         interrupts = <2 12 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 ethernet@3000 {
-                        device_type = "network";
                         compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
                         reg = <0x3000 0x400>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <2 5 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         phy-handle = <&phy0>;
                 };
 
@@ -223,10 +204,8 @@
                         compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
                         reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
                         interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
-                        interrupt-parent = <&mpc5200_pic>;
 
                         phy0: ethernet-phy@2 {
-                                device_type = "ethernet-phy";
                                 reg = <2>;
                         };
                 };
@@ -235,7 +214,6 @@
                         compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
                         reg = <0x3a00 0x100>;
                         interrupts = <2 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 i2c@3d40 {
@@ -244,7 +222,6 @@
                         compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                         reg = <0x3d40 0x40>;
                         interrupts = <2 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl5200-clocking;
 
                         rtc@68 {
@@ -259,8 +236,8 @@
                 };
         };
 
-        lpb {
-                compatible = "fsl,lpb";
+        localbus {
+                compatible = "fsl,mpc5200b-lpb","simple-bus";
                 #address-cells = <2>;
                 #size-cells = <1>;
                 ranges = <0 0 0xff000000 0x01000000
@@ -273,7 +250,6 @@
                         compatible = "promess,motionpro-kollmorgen";
                         reg = <1 0 0x10000>;
                         interrupts = <1 1 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 // 8-bit board CPLD on LocalPlus Bus CS2
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 3ebf7ec0484c..761faa7b6964 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -180,7 +180,7 @@
                         #address-cells = <1>;
                         #size-cells = <1>;
                         sleep = <&pmc 0x20000000>;
-                        ranges;
+                        ranges = <0x0 0x24000 0x1000>;
 
                         cell-index = <0>;
                         device_type = "network";
@@ -195,11 +195,11 @@
                         fixed-link = <1 1 1000 0 0>;
                         fsl,magic-packet;
 
-                        mdio@24520 {
+                        mdio@520 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,gianfar-mdio";
-                                reg = <0x24520 0x20>;
+                                reg = <0x520 0x20>;
                                 phy4: ethernet-phy@4 {
                                         interrupt-parent = <&ipic>;
                                         interrupts = <20 0x8>;
@@ -221,6 +221,7 @@
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <34 0x8 33 0x8 32 0x8>;
                         interrupt-parent = <&ipic>;
@@ -229,11 +230,11 @@
                         sleep = <&pmc 0x10000000>;
                         fsl,magic-packet;
 
-                        mdio@25520 {
+                        mdio@520 {
                                 #address-cells = <1>;
                                 #size-cells = <0>;
                                 compatible = "fsl,gianfar-tbi";
-                                reg = <0x25520 0x20>;
+                                reg = <0x520 0x20>;
 
                                 tbi1: tbi-phy@11 {
                                         reg = <0x11>;
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 71784165b77e..3f4c5fb988a0 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -22,6 +22,8 @@
                 serial0 = &serial0;
                 serial1 = &serial1;
                 pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
         };
 
         cpus {
@@ -188,66 +190,74 @@
                         phy_type = "utmi";
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <20 0x8>;
-                                reg = <0x0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <19 0x8>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = < &phy0 >;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <20 0x8>;
+                                        reg = <0x0>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <19 0x8>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = < &phy1 >;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -349,4 +359,66 @@
                 compatible = "fsl,mpc8349-pci";
                 device_type = "pci";
         };
+
+        pci1: pcie@e0009000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe0009000 0x00001000>;
+                ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 1 8
+                                 0 0 0 2 &ipic 1 8
+                                 0 0 0 3 &ipic 1 8
+                                 0 0 0 4 &ipic 1 8>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xa0000000
+                                  0x02000000 0 0xa0000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
+
+        pci2: pcie@e000a000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe000a000 0x00001000>;
+                ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 2 8
+                                 0 0 0 2 &ipic 2 8
+                                 0 0 0 3 &ipic 2 8
+                                 0 0 0 4 &ipic 2 8>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xc0000000
+                                  0x02000000 0 0xc0000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index b5eda94a8e2a..1ae38f0ddef8 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -170,57 +170,52 @@
                         phy_type = "ulpi";
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        /* Vitesse 8201 */
-                        phy1c: ethernet-phy@1c {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <18 0x8>;
-                                reg = <0x1c>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy1c>;
                         linux,network-index = <0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                /* Vitesse 8201 */
+                                phy1c: ethernet-phy@1c {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <18 0x8>;
+                                        reg = <0x1c>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
@@ -228,6 +223,18 @@
                         fixed-link = <1 1 1000 0 0>;
                         linux,network-index = <1>;
                         tbi-handle = <&tbi1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index c87a6015e165..662abe1fb804 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -149,37 +149,41 @@
                         phy_type = "ulpi";
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        /* Vitesse 8201 */
-                        phy1c: ethernet-phy@1c {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <18 0x8>;
-                                reg = <0x1c>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy1c>;
                         linux,network-index = <0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                /* Vitesse 8201 */
+                                phy1c: ethernet-phy@1c {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <18 0x8>;
+                                        reg = <0x1c>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index d9adba01c09c..d9f0a2325fa4 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -167,69 +167,76 @@
                         phy_type = "ulpi";
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <17 0x8>;
-                                reg = <0x0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <18 0x8>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         linux,network-index = <0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x0>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <18 0x8>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         linux,network-index = <1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 1d14d7052e6d..963708017e6c 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -23,6 +23,8 @@
                 serial0 = &serial0;
                 serial1 = &serial1;
                 pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
         };
 
         cpus {
@@ -127,21 +129,38 @@
                         reg = <0x200 0x100>;
                 };
 
-                i2c@3000 {
+                sleep-nexus {
                         #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <14 0x8>;
-                        interrupt-parent = <&ipic>;
-                        dfsrr;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        sleep = <&pmc 0x0c000000>;
+                        ranges;
+
+                        i2c@3000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <0>;
+                                compatible = "fsl-i2c";
+                                reg = <0x3000 0x100>;
+                                interrupts = <14 0x8>;
+                                interrupt-parent = <&ipic>;
+                                dfsrr;
+
+                                rtc@68 {
+                                        compatible = "dallas,ds1374";
+                                        reg = <0x68>;
+                                        interrupts = <19 0x8>;
+                                        interrupt-parent = <&ipic>;
+                                };
+                        };
 
-                        rtc@68 {
-                                compatible = "dallas,ds1374";
-                                reg = <0x68>;
-                                interrupts = <19 0x8>;
+                        sdhci@2e000 {
+                                compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+                                reg = <0x2e000 0x1000>;
+                                interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                /* Filled in by U-Boot */
+                                clock-frequency = <0>;
                         };
                 };
 
@@ -174,70 +193,83 @@
                         interrupts = <38 0x8>;
                         dr_mode = "host";
                         phy_type = "ulpi";
+                        sleep = <&pmc 0x00c00000>;
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <17 0x8>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <18 0x8>;
-                                reg = <0x3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+                        sleep = <&pmc 0xc0000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <18 0x8>;
+                                        reg = <0x3>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
+                        sleep = <&pmc 0x30000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -309,14 +341,7 @@
                         fsl,channel-fifo-len = <24>;
                         fsl,exec-units-mask = <0x9fe>;
                         fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                sdhc@2e000 {
-                        model = "eSDHC";
-                        compatible = "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <42 0x8>;
-                        interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x03000000>;
                 };
 
                 sata@18000 {
@@ -324,6 +349,7 @@
                         reg = <0x18000 0x1000>;
                         interrupts = <44 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x000000c0>;
                 };
 
                 sata@19000 {
@@ -331,6 +357,7 @@
                         reg = <0x19000 0x1000>;
                         interrupts = <45 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x00000030>;
                 };
 
                 /* IPIC
@@ -346,6 +373,13 @@
                         #interrupt-cells = <2>;
                         reg = <0x700 0x100>;
                 };
+
+                pmc: power@b00 {
+                        compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
+                        reg = <0xb00 0x100 0xa00 0x100>;
+                        interrupts = <80 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
         };
 
         pci0: pci@e0008500 {
@@ -400,6 +434,7 @@
                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+                sleep = <&pmc 0x00010000>;
                 clock-frequency = <0>;
                 #interrupt-cells = <1>;
                 #size-cells = <2>;
@@ -409,4 +444,68 @@
                 compatible = "fsl,mpc8349-pci";
                 device_type = "pci";
         };
+
+        pci1: pcie@e0009000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe0009000 0x00001000>;
+                ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 1 8
+                                 0 0 0 2 &ipic 1 8
+                                 0 0 0 3 &ipic 1 8
+                                 0 0 0 4 &ipic 1 8>;
+                sleep = <&pmc 0x00300000>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xa8000000
+                                  0x02000000 0 0xa8000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
+
+        pci2: pcie@e000a000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe000a000 0x00001000>;
+                ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 2 8
+                                 0 0 0 2 &ipic 2 8
+                                 0 0 0 3 &ipic 2 8
+                                 0 0 0 4 &ipic 2 8>;
+                sleep = <&pmc 0x000c0000>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xc8000000
+                                  0x02000000 0 0xc8000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9413af3b9925..053339390c22 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -22,6 +22,8 @@
                 serial0 = &serial0;
                 serial1 = &serial1;
                 pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
         };
 
         cpus {
@@ -107,26 +109,72 @@
                         reg = <0x200 0x100>;
                 };
 
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <14 0x8>;
+                gpio1: gpio-controller@c00 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
+                        reg = <0xc00 0x100>;
+                        interrupts = <74 0x8>;
                         interrupt-parent = <&ipic>;
-                        dfsrr;
-                        rtc@68 {
-                                compatible = "dallas,ds1339";
-                                reg = <0x68>;
+                        gpio-controller;
+                };
+
+                gpio2: gpio-controller@d00 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
+                        reg = <0xd00 0x100>;
+                        interrupts = <75 0x8>;
+                        interrupt-parent = <&ipic>;
+                        gpio-controller;
+                };
+
+                sleep-nexus {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        sleep = <&pmc 0x0c000000>;
+                        ranges;
+
+                        i2c@3000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <0>;
+                                compatible = "fsl-i2c";
+                                reg = <0x3000 0x100>;
+                                interrupts = <14 0x8>;
+                                interrupt-parent = <&ipic>;
+                                dfsrr;
+
+                                dtt@48 {
+                                        compatible = "national,lm75";
+                                        reg = <0x48>;
+                                };
+
+                                at24@50 {
+                                        compatible = "at24,24c256";
+                                        reg = <0x50>;
+                                };
+
+                                rtc@68 {
+                                        compatible = "dallas,ds1339";
+                                        reg = <0x68>;
+                                };
+
+                                mcu_pio: mcu@a {
+                                        #gpio-cells = <2>;
+                                        compatible = "fsl,mc9s08qg8-mpc8377erdb",
+                                                     "fsl,mcu-mpc8349emitx";
+                                        reg = <0x0a>;
+                                        gpio-controller;
+                                };
                         };
 
-                        mcu_pio: mcu@a {
-                                #gpio-cells = <2>;
-                                compatible = "fsl,mc9s08qg8-mpc8377erdb",
-                                             "fsl,mcu-mpc8349emitx";
-                                reg = <0x0a>;
-                                gpio-controller;
+                        sdhci@2e000 {
+                                compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
+                                reg = <0x2e000 0x1000>;
+                                interrupts = <42 0x8>;
+                                interrupt-parent = <&ipic>;
+                                /* Filled in by U-Boot */
+                                clock-frequency = <0>;
                         };
                 };
 
@@ -197,64 +245,76 @@
                         interrupt-parent = <&ipic>;
                         interrupts = <38 0x8>;
                         phy_type = "ulpi";
+                        sleep = <&pmc 0x00c00000>;
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <17 0x8>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+                        sleep = <&pmc 0xc0000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         fixed-link = <1 1 1000 0 0>;
                         tbi-handle = <&tbi1>;
+                        sleep = <&pmc 0x30000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -287,6 +347,7 @@
                         fsl,channel-fifo-len = <24>;
                         fsl,exec-units-mask = <0x9fe>;
                         fsl,descriptor-types-mask = <0x3ab0ebf>;
+                        sleep = <&pmc 0x03000000>;
                 };
 
                 sata@18000 {
@@ -294,6 +355,7 @@
                         reg = <0x18000 0x1000>;
                         interrupts = <44 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x000000c0>;
                 };
 
                 sata@19000 {
@@ -301,6 +363,7 @@
                         reg = <0x19000 0x1000>;
                         interrupts = <45 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x00000030>;
                 };
 
                 /* IPIC
@@ -316,6 +379,13 @@
                         #interrupt-cells = <2>;
                         reg = <0x700 0x100>;
                 };
+
+                pmc: power@b00 {
+                        compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
+                        reg = <0xb00 0x100 0xa00 0x100>;
+                        interrupts = <80 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
         };
 
         pci0: pci@e0008500 {
@@ -341,6 +411,7 @@
                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+                sleep = <&pmc 0x00010000>;
                 clock-frequency = <66666666>;
                 #interrupt-cells = <1>;
                 #size-cells = <2>;
@@ -350,4 +421,68 @@
                 compatible = "fsl,mpc8349-pci";
                 device_type = "pci";
         };
+
+        pci1: pcie@e0009000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe0009000 0x00001000>;
+                ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 1 8
+                                 0 0 0 2 &ipic 1 8
+                                 0 0 0 3 &ipic 1 8
+                                 0 0 0 4 &ipic 1 8>;
+                sleep = <&pmc 0x00300000>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xa8000000
+                                  0x02000000 0 0xa8000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
+
+        pci2: pcie@e000a000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe000a000 0x00001000>;
+                ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 2 8
+                                 0 0 0 2 &ipic 2 8
+                                 0 0 0 3 &ipic 2 8
+                                 0 0 0 4 &ipic 2 8>;
+                sleep = <&pmc 0x000c0000>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xc8000000
+                                  0x02000000 0 0xc8000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index b85fc02682d2..651ff2f9db2d 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -23,6 +23,8 @@
                 serial0 = &serial0;
                 serial1 = &serial1;
                 pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
         };
 
         cpus {
@@ -127,21 +129,38 @@
                         reg = <0x200 0x100>;
                 };
 
-                i2c@3000 {
+                sleep-nexus {
                         #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <14 0x8>;
-                        interrupt-parent = <&ipic>;
-                        dfsrr;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        sleep = <&pmc 0x0c000000>;
+                        ranges;
+
+                        i2c@3000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <0>;
+                                compatible = "fsl-i2c";
+                                reg = <0x3000 0x100>;
+                                interrupts = <14 0x8>;
+                                interrupt-parent = <&ipic>;
+                                dfsrr;
+
+                                rtc@68 {
+                                        compatible = "dallas,ds1374";
+                                        reg = <0x68>;
+                                        interrupts = <19 0x8>;
+                                        interrupt-parent = <&ipic>;
+                                };
+                        };
 
-                        rtc@68 {
-                                compatible = "dallas,ds1374";
-                                reg = <0x68>;
-                                interrupts = <19 0x8>;
+                        sdhci@2e000 {
+                                compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+                                reg = <0x2e000 0x1000>;
+                                interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                /* Filled in by U-Boot */
+                                clock-frequency = <0>;
                         };
                 };
 
@@ -213,70 +232,83 @@
                         interrupts = <38 0x8>;
                         dr_mode = "host";
                         phy_type = "ulpi";
+                        sleep = <&pmc 0x00c00000>;
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <17 0x8>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <18 0x8>;
-                                reg = <0x3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+                        sleep = <&pmc 0xc0000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <18 0x8>;
+                                        reg = <0x3>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
+                        sleep = <&pmc 0x30000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -309,14 +341,7 @@
                         fsl,channel-fifo-len = <24>;
                         fsl,exec-units-mask = <0x9fe>;
                         fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                sdhc@2e000 {
-                        model = "eSDHC";
-                        compatible = "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <42 0x8>;
-                        interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x03000000>;
                 };
 
                 /* IPIC
@@ -332,6 +357,13 @@
                         #interrupt-cells = <2>;
                         reg = <0x700 0x100>;
                 };
+
+                pmc: power@b00 {
+                        compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
+                        reg = <0xb00 0x100 0xa00 0x100>;
+                        interrupts = <80 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
         };
 
         pci0: pci@e0008500 {
@@ -387,6 +419,7 @@
                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
                 clock-frequency = <0>;
+                sleep = <&pmc 0x00010000>;
                 #interrupt-cells = <1>;
                 #size-cells = <2>;
                 #address-cells = <3>;
@@ -395,4 +428,68 @@
                 compatible = "fsl,mpc8349-pci";
                 device_type = "pci";
         };
+
+        pci1: pcie@e0009000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe0009000 0x00001000>;
+                ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 1 8
+                                 0 0 0 2 &ipic 1 8
+                                 0 0 0 3 &ipic 1 8
+                                 0 0 0 4 &ipic 1 8>;
+                sleep = <&pmc 0x00300000>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xa8000000
+                                  0x02000000 0 0xa8000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
+
+        pci2: pcie@e000a000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe000a000 0x00001000>;
+                ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 2 8
+                                 0 0 0 2 &ipic 2 8
+                                 0 0 0 3 &ipic 2 8
+                                 0 0 0 4 &ipic 2 8>;
+                sleep = <&pmc 0x000c0000>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xc8000000
+                                  0x02000000 0 0xc8000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 23c10ce22c2c..5d90e85704c3 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -22,6 +22,8 @@
                 serial0 = &serial0;
                 serial1 = &serial1;
                 pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
         };
 
         cpus {
@@ -107,26 +109,72 @@
                         reg = <0x200 0x100>;
                 };
 
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <14 0x8>;
+                gpio1: gpio-controller@c00 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
+                        reg = <0xc00 0x100>;
+                        interrupts = <74 0x8>;
                         interrupt-parent = <&ipic>;
-                        dfsrr;
-                        rtc@68 {
-                                compatible = "dallas,ds1339";
-                                reg = <0x68>;
+                        gpio-controller;
+                };
+
+                gpio2: gpio-controller@d00 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
+                        reg = <0xd00 0x100>;
+                        interrupts = <75 0x8>;
+                        interrupt-parent = <&ipic>;
+                        gpio-controller;
+                };
+
+                sleep-nexus {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        sleep = <&pmc 0x0c000000>;
+                        ranges;
+
+                        i2c@3000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <0>;
+                                compatible = "fsl-i2c";
+                                reg = <0x3000 0x100>;
+                                interrupts = <14 0x8>;
+                                interrupt-parent = <&ipic>;
+                                dfsrr;
+
+                                dtt@48 {
+                                        compatible = "national,lm75";
+                                        reg = <0x48>;
+                                };
+
+                                at24@50 {
+                                        compatible = "at24,24c256";
+                                        reg = <0x50>;
+                                };
+
+                                rtc@68 {
+                                        compatible = "dallas,ds1339";
+                                        reg = <0x68>;
+                                };
+
+                                mcu_pio: mcu@a {
+                                        #gpio-cells = <2>;
+                                        compatible = "fsl,mc9s08qg8-mpc8378erdb",
+                                                     "fsl,mcu-mpc8349emitx";
+                                        reg = <0x0a>;
+                                        gpio-controller;
+                                };
                         };
 
-                        mcu_pio: mcu@a {
-                                #gpio-cells = <2>;
-                                compatible = "fsl,mc9s08qg8-mpc8378erdb",
-                                             "fsl,mcu-mpc8349emitx";
-                                reg = <0x0a>;
-                                gpio-controller;
+                        sdhci@2e000 {
+                                compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+                                reg = <0x2e000 0x1000>;
+                                interrupts = <42 0x8>;
+                                interrupt-parent = <&ipic>;
+                                /* Filled in by U-Boot */
+                                clock-frequency = <0>;
                         };
                 };
 
@@ -197,62 +245,76 @@
                         interrupt-parent = <&ipic>;
                         interrupts = <38 0x8>;
                         phy_type = "ulpi";
+                        sleep = <&pmc 0x00c00000>;
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <17 0x8>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
+                        tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+                        sleep = <&pmc 0xc0000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         fixed-link = <1 1 1000 0 0>;
+                        tbi-handle = <&tbi1>;
+                        sleep = <&pmc 0x30000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -285,6 +347,7 @@
                         fsl,channel-fifo-len = <24>;
                         fsl,exec-units-mask = <0x9fe>;
                         fsl,descriptor-types-mask = <0x3ab0ebf>;
+                        sleep = <&pmc 0x03000000>;
                 };
 
                 /* IPIC
@@ -300,6 +363,13 @@
                         #interrupt-cells = <2>;
                         reg = <0x700 0x100>;
                 };
+
+                pmc: power@b00 {
+                        compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc";
+                        reg = <0xb00 0x100 0xa00 0x100>;
+                        interrupts = <80 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
         };
 
         pci0: pci@e0008500 {
@@ -325,6 +395,7 @@
                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+                sleep = <&pmc 0x00010000>;
                 clock-frequency = <66666666>;
                 #interrupt-cells = <1>;
                 #size-cells = <2>;
@@ -334,4 +405,68 @@
                 compatible = "fsl,mpc8349-pci";
                 device_type = "pci";
         };
+
+        pci1: pcie@e0009000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe0009000 0x00001000>;
+                ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 1 8
+                                 0 0 0 2 &ipic 1 8
+                                 0 0 0 3 &ipic 1 8
+                                 0 0 0 4 &ipic 1 8>;
+                sleep = <&pmc 0x00300000>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xa8000000
+                                  0x02000000 0 0xa8000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
+
+        pci2: pcie@e000a000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe000a000 0x00001000>;
+                ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+                bus-range = <0 255>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0 0 0 1 &ipic 2 8
+                                 0 0 0 2 &ipic 2 8
+                                 0 0 0 3 &ipic 2 8
+                                 0 0 0 4 &ipic 2 8>;
+                sleep = <&pmc 0x000c0000>;
+                clock-frequency = <0>;
+
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xc8000000
+                                  0x02000000 0 0xc8000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
 };
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index acf06c438dbf..d6f208b8297a 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -127,21 +127,38 @@
                         reg = <0x200 0x100>;
                 };
 
-                i2c@3000 {
+                sleep-nexus {
                         #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <14 0x8>;
-                        interrupt-parent = <&ipic>;
-                        dfsrr;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        sleep = <&pmc 0x0c000000>;
+                        ranges;
+
+                        i2c@3000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <0>;
+                                compatible = "fsl-i2c";
+                                reg = <0x3000 0x100>;
+                                interrupts = <14 0x8>;
+                                interrupt-parent = <&ipic>;
+                                dfsrr;
+
+                                rtc@68 {
+                                        compatible = "dallas,ds1374";
+                                        reg = <0x68>;
+                                        interrupts = <19 0x8>;
+                                        interrupt-parent = <&ipic>;
+                                };
+                        };
 
-                        rtc@68 {
-                                compatible = "dallas,ds1374";
-                                reg = <0x68>;
-                                interrupts = <19 0x8>;
+                        sdhci@2e000 {
+                                compatible = "fsl,mpc8379-esdhc";
+                                reg = <0x2e000 0x1000>;
+                                interrupts = <42 0x8>;
                                 interrupt-parent = <&ipic>;
+                                /* Filled in by U-Boot */
+                                clock-frequency = <0>;
                         };
                 };
 
@@ -213,69 +230,83 @@
                         interrupts = <38 0x8>;
                         dr_mode = "host";
                         phy_type = "ulpi";
-                };
-
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <17 0x8>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <18 0x8>;
-                                reg = <0x3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
+                        sleep = <&pmc 0x00c00000>;
                 };
 
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+                        sleep = <&pmc 0xc0000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <18 0x8>;
+                                        reg = <0x3>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
+                        sleep = <&pmc 0x30000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -308,14 +339,7 @@
                         fsl,channel-fifo-len = <24>;
                         fsl,exec-units-mask = <0x9fe>;
                         fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-
-                sdhc@2e000 {
-                        model = "eSDHC";
-                        compatible = "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <42 0x8>;
-                        interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x03000000>;
                 };
 
                 sata@18000 {
@@ -323,6 +347,7 @@
                         reg = <0x18000 0x1000>;
                         interrupts = <44 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x000000c0>;
                 };
 
                 sata@19000 {
@@ -330,6 +355,7 @@
                         reg = <0x19000 0x1000>;
                         interrupts = <45 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x00000030>;
                 };
 
                 sata@1a000 {
@@ -337,6 +363,7 @@
                         reg = <0x1a000 0x1000>;
                         interrupts = <46 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x0000000c>;
                 };
 
                 sata@1b000 {
@@ -344,6 +371,7 @@
                         reg = <0x1b000 0x1000>;
                         interrupts = <47 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x00000003>;
                 };
 
                 /* IPIC
@@ -359,6 +387,13 @@
                         #interrupt-cells = <2>;
                         reg = <0x700 0x100>;
                 };
+
+                pmc: power@b00 {
+                        compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
+                        reg = <0xb00 0x100 0xa00 0x100>;
+                        interrupts = <80 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
         };
 
         pci0: pci@e0008500 {
@@ -413,6 +448,7 @@
                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+                sleep = <&pmc 0x00010000>;
                 clock-frequency = <0>;
                 #interrupt-cells = <1>;
                 #size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 72cdc3c4c7e3..98ae95bd18f4 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -107,26 +107,72 @@
                         reg = <0x200 0x100>;
                 };
 
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <14 0x8>;
+                gpio1: gpio-controller@c00 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
+                        reg = <0xc00 0x100>;
+                        interrupts = <74 0x8>;
                         interrupt-parent = <&ipic>;
-                        dfsrr;
-                        rtc@68 {
-                                compatible = "dallas,ds1339";
-                                reg = <0x68>;
+                        gpio-controller;
+                };
+
+                gpio2: gpio-controller@d00 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
+                        reg = <0xd00 0x100>;
+                        interrupts = <75 0x8>;
+                        interrupt-parent = <&ipic>;
+                        gpio-controller;
+                };
+
+                sleep-nexus {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "simple-bus";
+                        sleep = <&pmc 0x0c000000>;
+                        ranges;
+
+                        i2c@3000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                cell-index = <0>;
+                                compatible = "fsl-i2c";
+                                reg = <0x3000 0x100>;
+                                interrupts = <14 0x8>;
+                                interrupt-parent = <&ipic>;
+                                dfsrr;
+
+                                dtt@48 {
+                                        compatible = "national,lm75";
+                                        reg = <0x48>;
+                                };
+
+                                at24@50 {
+                                        compatible = "at24,24c256";
+                                        reg = <0x50>;
+                                };
+
+                                rtc@68 {
+                                        compatible = "dallas,ds1339";
+                                        reg = <0x68>;
+                                };
+
+                                mcu_pio: mcu@a {
+                                        #gpio-cells = <2>;
+                                        compatible = "fsl,mc9s08qg8-mpc8379erdb",
+                                                     "fsl,mcu-mpc8349emitx";
+                                        reg = <0x0a>;
+                                        gpio-controller;
+                                };
                         };
 
-                        mcu_pio: mcu@a {
-                                #gpio-cells = <2>;
-                                compatible = "fsl,mc9s08qg8-mpc8379erdb",
-                                             "fsl,mcu-mpc8349emitx";
-                                reg = <0x0a>;
-                                gpio-controller;
+                        sdhci@2e000 {
+                                compatible = "fsl,mpc8379-esdhc";
+                                reg = <0x2e000 0x1000>;
+                                interrupts = <42 0x8>;
+                                interrupt-parent = <&ipic>;
+                                /* Filled in by U-Boot */
+                                clock-frequency = <0>;
                         };
                 };
 
@@ -197,63 +243,76 @@
                         interrupt-parent = <&ipic>;
                         interrupts = <38 0x8>;
                         phy_type = "ulpi";
-                };
-
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <17 0x8>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
+                        sleep = <&pmc 0x00c00000>;
                 };
 
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+                        sleep = <&pmc 0xc0000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         phy-connection-type = "mii";
                         interrupt-parent = <&ipic>;
                         fixed-link = <1 1 1000 0 0>;
                         tbi-handle = <&tbi1>;
+                        sleep = <&pmc 0x30000000>;
+                        fsl,magic-packet;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -286,6 +345,7 @@
                         fsl,channel-fifo-len = <24>;
                         fsl,exec-units-mask = <0x9fe>;
                         fsl,descriptor-types-mask = <0x3ab0ebf>;
+                        sleep = <&pmc 0x03000000>;
                 };
 
                 sata@18000 {
@@ -293,6 +353,7 @@
                         reg = <0x18000 0x1000>;
                         interrupts = <44 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x000000c0>;
                 };
 
                 sata@19000 {
@@ -300,6 +361,7 @@
                         reg = <0x19000 0x1000>;
                         interrupts = <45 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x00000030>;
                 };
 
                 sata@1a000 {
@@ -307,6 +369,7 @@
                         reg = <0x1a000 0x1000>;
                         interrupts = <46 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x0000000c>;
                 };
 
                 sata@1b000 {
@@ -314,6 +377,7 @@
                         reg = <0x1b000 0x1000>;
                         interrupts = <47 0x8>;
                         interrupt-parent = <&ipic>;
+                        sleep = <&pmc 0x00000003>;
                 };
 
                 /* IPIC
@@ -329,6 +393,13 @@
                         #interrupt-cells = <2>;
                         reg = <0x700 0x100>;
                 };
+
+                pmc: power@b00 {
+                        compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
+                        reg = <0xb00 0x100 0xa00 0x100>;
+                        interrupts = <80 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
         };
 
         pci0: pci@e0008500 {
@@ -354,6 +425,7 @@
                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+                sleep = <&pmc 0x00010000>;
                 clock-frequency = <66666666>;
                 #interrupt-cells = <1>;
                 #size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 3c905df1812c..b31c5041350b 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -137,42 +137,6 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 0x1>;
-                                reg = <0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 0x1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 usb@22000 {
                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
                         reg = <0x22000 0x1000>;
@@ -194,31 +158,73 @@
                 };
 
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 0x1>;
+                                        reg = <0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 0x1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 usb@2b000 {
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 79570ffe41b9..ddd67be10b03 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -126,97 +126,106 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <7 1>;
-                                reg = <0x3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <7 1>;
+                                        reg = <0x3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <2>;
                         device_type = "network";
                         model = "FEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <41 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi2>;
                         phy-handle = <&phy3>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 221036a8ce23..e45097f44fbd 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -126,66 +126,72 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 0668d1048779..7c6932be0197 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -98,44 +98,6 @@
                         dfsrr;
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 dma@21300 {
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -178,31 +140,74 @@
                 };
 
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy0>;
                         tbi-handle = <&tbi0>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy1>;
                         tbi-handle = <&tbi1>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index df774a7088ff..804e90353293 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -142,129 +142,141 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@27520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x27520 0x20>;
-
-                        tbi3: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
 /* eTSEC 3/4 are currently broken
                 enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <2>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <3>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
  */
 
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 053b01e1c93b..9484f0729b10 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -126,66 +126,72 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 11b1bcbe14ce..cc2acf87d02f 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -115,78 +115,84 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 1>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <7 1>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <7 1>;
-                                reg = <0x3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 1>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <7 1>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <7 1>;
+                                        reg = <0x3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 1955bd9e113d..9d52e3b25047 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -149,78 +149,84 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@7 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <1 1>;
-                                reg = <0x7>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
-                                reg = <0x1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <1 1>;
-                                reg = <0x2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <2 1>;
-                                reg = <0x3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@7 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <1 1>;
+                                        reg = <0x7>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <2 1>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <1 1>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <2 1>;
+                                        reg = <0x3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy3>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 359c3b727420..6e79a4169088 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -1,7 +1,7 @@
 /*
  * MPC8572 DS Device Tree Source
  *
- * Copyright 2007, 2008 Freescale Semiconductor Inc.
+ * Copyright 2007-2009 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -312,129 +312,141 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x0>;
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x1>;
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x2>;
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x3>;
-                        };
-
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@27520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x27520 0x20>;
-
-                        tbi3: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x0>;
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x1>;
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x2>;
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x3>;
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <2>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <3>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -643,7 +655,7 @@
 
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
-                                  0x0 0x100000>;
+                                  0x0 0x10000>;
                         uli1575@0 {
                                 reg = <0x0 0x0 0x0 0x0 0x0>;
                                 #size-cells = <2>;
@@ -654,7 +666,7 @@
 
                                           0x1000000 0x0 0x0
                                           0x1000000 0x0 0x0
-                                          0x0 0x100000>;
+                                          0x0 0x10000>;
                                 isa@1e {
                                         device_type = "isa";
                                         #interrupt-cells = <2>;
@@ -744,7 +756,7 @@
 
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
-                                  0x0 0x100000>;
+                                  0x0 0x10000>;
                 };
         };
 
@@ -781,7 +793,7 @@
 
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
-                                  0x0 0x100000>;
+                                  0x0 0x10000>;
                 };
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
new file mode 100644
index 000000000000..dbd81a764742
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts
@@ -0,0 +1,799 @@
+/*
+ * MPC8572 DS Device Tree Source
+ *
+ * Copyright 2007-2009 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+        model = "fsl,MPC8572DS";
+        compatible = "fsl,MPC8572DS";
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                ethernet3 = &enet3;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+                pci1 = &pci1;
+                pci2 = &pci2;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8572@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+
+                PowerPC,8572@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        d-cache-line-size = <32>;       // 32 bytes
+                        i-cache-line-size = <32>;       // 32 bytes
+                        d-cache-size = <0x8000>;                // L1, 32K
+                        i-cache-size = <0x8000>;                // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+        };
+
+        localbus@fffe05000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus";
+                reg = <0xf 0xffe05000 0 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+
+                ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
+                          0x1 0x0 0xf 0xe0000000 0x08000000
+                          0x2 0x0 0xf 0xffa00000 0x00040000
+                          0x3 0x0 0xf 0xffdf0000 0x00008000
+                          0x4 0x0 0xf 0xffa40000 0x00040000
+                          0x5 0x0 0xf 0xffa80000 0x00040000
+                          0x6 0x0 0xf 0xffac0000 0x00040000>;
+
+                nor@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0x0 0x0 0x8000000>;
+                        bank-width = <2>;
+                        device-width = <1>;
+
+                        ramdisk@0 {
+                                reg = <0x0 0x03000000>;
+                                read-only;
+                        };
+
+                        diagnostic@3000000 {
+                                reg = <0x03000000 0x00e00000>;
+                                read-only;
+                        };
+
+                        dink@3e00000 {
+                                reg = <0x03e00000 0x00200000>;
+                                read-only;
+                        };
+
+                        kernel@4000000 {
+                                reg = <0x04000000 0x00400000>;
+                                read-only;
+                        };
+
+                        jffs2@4400000 {
+                                reg = <0x04400000 0x03b00000>;
+                        };
+
+                        dtb@7f00000 {
+                                reg = <0x07f00000 0x00080000>;
+                                read-only;
+                        };
+
+                        u-boot@7f80000 {
+                                reg = <0x07f80000 0x00080000>;
+                                read-only;
+                        };
+                };
+
+                nand@2,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x2 0x0 0x40000>;
+
+                        u-boot@0 {
+                                reg = <0x0 0x02000000>;
+                                read-only;
+                        };
+
+                        jffs2@2000000 {
+                                reg = <0x02000000 0x10000000>;
+                        };
+
+                        ramdisk@12000000 {
+                                reg = <0x12000000 0x08000000>;
+                                read-only;
+                        };
+
+                        kernel@1a000000 {
+                                reg = <0x1a000000 0x04000000>;
+                        };
+
+                        dtb@1e000000 {
+                                reg = <0x1e000000 0x01000000>;
+                                read-only;
+                        };
+
+                        empty@1f000000 {
+                                reg = <0x1f000000 0x21000000>;
+                        };
+                };
+
+                nand@4,0 {
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x4 0x0 0x40000>;
+                };
+
+                nand@5,0 {
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x5 0x0 0x40000>;
+                };
+
+                nand@6,0 {
+                        compatible = "fsl,mpc8572-fcm-nand",
+                                     "fsl,elbc-fcm-nand";
+                        reg = <0x6 0x0 0x40000>;
+                };
+        };
+
+        soc8572@fffe00000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "simple-bus";
+                ranges = <0x0 0xf 0xffe00000 0x100000>;
+                reg = <0xf 0xffe00000 0 0x1000>;        // CCSRBAR & soc regs, remove once parse code for immrbase fixed
+                bus-frequency = <0>;            // Filled out by uboot.
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                memory-controller@6000 {
+                        compatible = "fsl,mpc8572-memory-controller";
+                        reg = <0x6000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8572-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x100000>; // L2, 1M
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0xc300 0x4>;
+                        ranges = <0x0 0xc100 0x200>;
+                        cell-index = <1>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <76 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <77 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <78 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <79 2>;
+                        };
+                };
+
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8572-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi0>;
+                        phy-handle = <&phy0>;
+                        phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x0>;
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x1>;
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x2>;
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x3>;
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi1>;
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <2>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi2>;
+                        phy-handle = <&phy2>;
+                        phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <3>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <37 2 38 2 39 2>;
+                        interrupt-parent = <&mpic>;
+                        tbi-handle = <&tbi3>;
+                        phy-handle = <&phy3>;
+                        phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8572-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                msi@41600 {
+                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                crypto@30000 {
+                        compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+                                     "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <45 2 58 2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0x9fe>;
+                        fsl,descriptor-types-mask = <0x3ab0ebf>;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+        };
+
+        pci0: pcie@fffe08000 {
+                cell-index = <0>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xf 0xffe08000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xc0000000 0xc 0x00000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x11 func 0 - PCI slot 1 */
+                        0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 1 - PCI slot 1 */
+                        0x8900 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8900 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8900 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8900 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 2 - PCI slot 1 */
+                        0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 3 - PCI slot 1 */
+                        0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 4 - PCI slot 1 */
+                        0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 5 - PCI slot 1 */
+                        0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 6 - PCI slot 1 */
+                        0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x11 func 7 - PCI slot 1 */
+                        0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1
+                        0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1
+                        0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1
+                        0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1
+
+                        /* IDSEL 0x12 func 0 - PCI slot 2 */
+                        0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9000 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9000 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 1 - PCI slot 2 */
+                        0x9100 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9100 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9100 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9100 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 2 - PCI slot 2 */
+                        0x9200 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9200 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9200 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9200 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 3 - PCI slot 2 */
+                        0x9300 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9300 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9300 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9300 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 4 - PCI slot 2 */
+                        0x9400 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9400 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9400 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9400 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 5 - PCI slot 2 */
+                        0x9500 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9500 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9500 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9500 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 6 - PCI slot 2 */
+                        0x9600 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9600 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9600 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9600 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        /* IDSEL 0x12 func 7 - PCI slot 2 */
+                        0x9700 0x0 0x0 0x1 &mpic 0x3 0x1
+                        0x9700 0x0 0x0 0x2 &mpic 0x4 0x1
+                        0x9700 0x0 0x0 0x3 &mpic 0x1 0x1
+                        0x9700 0x0 0x0 0x4 &mpic 0x2 0x1
+
+                        // IDSEL 0x1c  USB
+                        0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
+                        0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
+                        0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
+                        0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
+
+                        // IDSEL 0x1d  Audio
+                        0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
+
+                        // IDSEL 0x1e Legacy
+                        0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
+                        0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
+
+                        // IDSEL 0x1f IDE/SATA
+                        0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
+                        0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
+
+                        >;
+
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x10000>;
+                        uli1575@0 {
+                                reg = <0x0 0x0 0x0 0x0 0x0>;
+                                #size-cells = <2>;
+                                #address-cells = <3>;
+                                ranges = <0x2000000 0x0 0xc0000000
+                                          0x2000000 0x0 0xc0000000
+                                          0x0 0x20000000
+
+                                          0x1000000 0x0 0x0
+                                          0x1000000 0x0 0x0
+                                          0x0 0x10000>;
+                                isa@1e {
+                                        device_type = "isa";
+                                        #interrupt-cells = <2>;
+                                        #size-cells = <1>;
+                                        #address-cells = <2>;
+                                        reg = <0xf000 0x0 0x0 0x0 0x0>;
+                                        ranges = <0x1 0x0 0x1000000 0x0 0x0
+                                                  0x1000>;
+                                        interrupt-parent = <&i8259>;
+
+                                        i8259: interrupt-controller@20 {
+                                                reg = <0x1 0x20 0x2
+                                                       0x1 0xa0 0x2
+                                                       0x1 0x4d0 0x2>;
+                                                interrupt-controller;
+                                                device_type = "interrupt-controller";
+                                                #address-cells = <0>;
+                                                #interrupt-cells = <2>;
+                                                compatible = "chrp,iic";
+                                                interrupts = <9 2>;
+                                                interrupt-parent = <&mpic>;
+                                        };
+
+                                        i8042@60 {
+                                                #size-cells = <0>;
+                                                #address-cells = <1>;
+                                                reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
+                                                interrupts = <1 3 12 3>;
+                                                interrupt-parent =
+                                                        <&i8259>;
+
+                                                keyboard@0 {
+                                                        reg = <0x0>;
+                                                        compatible = "pnpPNP,303";
+                                                };
+
+                                                mouse@1 {
+                                                        reg = <0x1>;
+                                                        compatible = "pnpPNP,f03";
+                                                };
+                                        };
+
+                                        rtc@70 {
+                                                compatible = "pnpPNP,b00";
+                                                reg = <0x1 0x70 0x2>;
+                                        };
+
+                                        gpio@400 {
+                                                reg = <0x1 0x400 0x80>;
+                                        };
+                                };
+                        };
+                };
+
+        };
+
+        pci1: pcie@fffe09000 {
+                cell-index = <1>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xf 0xffe09000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <25 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x10000>;
+                };
+        };
+
+        pci2: pcie@fffe0a000 {
+                cell-index = <2>;
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0xf 0xffe0a000 0 0x1000>;
+                bus-range = <0 255>;
+                ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0xc0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x10000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index fd462efa9e61..2bc0c7189653 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -6,7 +6,7 @@
  * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
  * eth1, crypto, pci0, pci1.
  *
- * Copyright 2007, 2008 Freescale Semiconductor Inc.
+ * Copyright 2007-2009 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -148,35 +148,38 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x0>;
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x1>;
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x0>;
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x1>;
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
@@ -227,7 +230,7 @@
                         device_type = "open-pic";
                         protected-sources = <
                         31 32 33 37 38 39       /* enet2 enet3 */
-                        76 77 78 79 27 42       /* dma2 pci2 serial*/
+                        76 77 78 79 26 42       /* dma2 pci2 serial*/
                         0xe0 0xe1 0xe2 0xe3     /* msi */
                         0xe4 0xe5 0xe6 0xe7
                         >;
@@ -376,7 +379,7 @@
 
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
-                                  0x0 0x100000>;
+                                  0x0 0x10000>;
                         uli1575@0 {
                                 reg = <0x0 0x0 0x0 0x0 0x0>;
                                 #size-cells = <2>;
@@ -387,7 +390,7 @@
 
                                           0x1000000 0x0 0x0
                                           0x1000000 0x0 0x0
-                                          0x0 0x100000>;
+                                          0x0 0x10000>;
                                 isa@1e {
                                         device_type = "isa";
                                         #interrupt-cells = <2>;
@@ -477,7 +480,7 @@
 
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
-                                  0x0 0x100000>;
+                                  0x0 0x10000>;
                 };
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index e35230f2ac93..159cb3a875f0 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -7,7 +7,7 @@
  *
  * Please note to add "-b 1" for core1's dts compiling.
  *
- * Copyright 2007, 2008 Freescale Semiconductor Inc.
+ * Copyright 2007-2009 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -186,7 +186,7 @@
                         protected-sources = <
                         18 16 10 42 45 58       /* MEM L2 mdio serial crypto */
                         29 30 34 35 36 40       /* enet0 enet1 */
-                        24 26 20 21 22 23       /* pcie0 pcie1 dma1 */
+                        24 25 20 21 22 23       /* pci0 pci1 dma1 */
                         43                      /* i2c */
                         0x1 0x2 0x3 0x4         /* pci slot */
                         0x9 0xa 0xb 0xc         /* usb */
@@ -228,7 +228,7 @@
 
                                   0x1000000 0x0 0x0
                                   0x1000000 0x0 0x0
-                                  0x0 0x100000>;
+                                  0x0 0x10000>;
                 };
         };
 };
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index f724d72c7b92..1bd3ebe11437 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -217,6 +217,7 @@
                         codec-handle = <&cs4270>;
                         fsl,playback-dma = <&dma00>;
                         fsl,capture-dma = <&dma01>;
+                        fsl,fifo-depth = <8>;
                 };
 
                 ssi@16100 {
@@ -225,6 +226,7 @@
                         reg = <0x16100 0x100>;
                         interrupt-parent = <&mpic>;
                         interrupts = <63 2>;
+                        fsl,fifo-depth = <8>;
                 };
 
                 dma@21300 {
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 4481532cbe77..d72beb192460 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -180,133 +180,144 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@27520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x27520 0x20>;
-
-                        tbi3: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30  2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
                 
                 enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <2>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <3>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index be2c11ca0594..895834713894 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -19,6 +19,7 @@
         compatible = "phytec,pcm030";
         #address-cells = <1>;
         #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
 
         cpus {
                 #address-cells = <1>;
@@ -29,26 +30,26 @@
                         reg = <0>;
                         d-cache-line-size = <32>;
                         i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;        /* L1, 16K          */
-                        i-cache-size = <0x4000>;        /* L1, 16K          */
-                        timebase-frequency = <0>;       /* From Bootloader  */
-                        bus-frequency = <0>;            /* From Bootloader  */
-                        clock-frequency = <0>;          /* From Bootloader  */
+                        d-cache-size = <0x4000>;        // L1, 16K
+                        i-cache-size = <0x4000>;        // L1, 16K
+                        timebase-frequency = <0>;       // from bootloader
+                        bus-frequency = <0>;            // from bootloader
+                        clock-frequency = <0>;          // from bootloader
                 };
         };
 
         memory {
                 device_type = "memory";
-                reg = <0x00000000 0x04000000>;  /* 64MB */
+                reg = <0x00000000 0x04000000>;  // 64MB
         };
 
         soc5200@f0000000 {
                 #address-cells = <1>;
                 #size-cells = <1>;
                 compatible = "fsl,mpc5200b-immr";
-                ranges = <0x0 0xf0000000 0x0000c000>;
-                bus-frequency = <0>;            /* From bootloader */
-                system-frequency = <0>;         /* From bootloader */
+                ranges = <0 0xf0000000 0x0000c000>;
+                bus-frequency = <0>;            // from bootloader
+                system-frequency = <0>;         // from bootloader
 
                 cdm@200 {
                         compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
@@ -56,87 +57,70 @@
                 };
 
                 mpc5200_pic: interrupt-controller@500 {
-                        /* 5200 interrupts are encoded into two levels; */
+                        // 5200 interrupts are encoded into two levels;
                         interrupt-controller;
                         #interrupt-cells = <3>;
-                        device_type = "interrupt-controller";
                         compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
                         reg = <0x500 0x80>;
                 };
 
-                timer@600 {     /* General Purpose Timer */
+                timer@600 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <0>;
                         reg = <0x600 0x10>;
-                        interrupts = <0x1 0x9 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 9 0>;
                         fsl,has-wdt;
                 };
 
-                timer@610 {     /* General Purpose Timer */
+                timer@610 {     // General Purpose Timer
                         compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        cell-index = <1>;
                         reg = <0x610 0x10>;
-                        interrupts = <0x1 0xa 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 10 0>;
                 };
 
-                gpt2: timer@620 { /* General Purpose Timer in GPIO mode */
+                gpt2: timer@620 {       // General Purpose Timer in GPIO mode
                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        cell-index = <2>;
                         reg = <0x620 0x10>;
-                        interrupts = <0x1 0xb 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 11 0>;
                         gpio-controller;
                         #gpio-cells = <2>;
                 };
 
-                gpt3: timer@630 { /* General Purpose Timer in GPIO mode */
+                gpt3: timer@630 {       // General Purpose Timer in GPIO mode
                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        cell-index = <3>;
                         reg = <0x630 0x10>;
-                        interrupts = <0x1 0xc 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 12 0>;
                         gpio-controller;
                         #gpio-cells = <2>;
                 };
 
-                gpt4: timer@640 { /* General Purpose Timer in GPIO mode */
+                gpt4: timer@640 {       // General Purpose Timer in GPIO mode
                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        cell-index = <4>;
                         reg = <0x640 0x10>;
-                        interrupts = <0x1 0xd 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 13 0>;
                         gpio-controller;
                         #gpio-cells = <2>;
                 };
 
-                gpt5: timer@650 { /* General Purpose Timer in GPIO mode */
+                gpt5: timer@650 {       // General Purpose Timer in GPIO mode
                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        cell-index = <5>;
                         reg = <0x650 0x10>;
-                        interrupts = <0x1 0xe 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 14 0>;
                         gpio-controller;
                         #gpio-cells = <2>;
                 };
 
-                gpt6: timer@660 { /* General Purpose Timer in GPIO mode */
+                gpt6: timer@660 {       // General Purpose Timer in GPIO mode
                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        cell-index = <6>;
                         reg = <0x660 0x10>;
-                        interrupts = <0x1 0xf 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 15 0>;
                         gpio-controller;
                         #gpio-cells = <2>;
                 };
 
-                gpt7: timer@670 { /* General Purpose Timer in GPIO mode */
+                gpt7: timer@670 {       // General Purpose Timer in GPIO mode
                         compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        cell-index = <7>;
                         reg = <0x670 0x10>;
-                        interrupts = <0x1 0x10 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 16 0>;
                         gpio-controller;
                         #gpio-cells = <2>;
                 };
@@ -144,40 +128,33 @@
                 rtc@800 {       // Real time clock
                         compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
                         reg = <0x800 0x100>;
-                        interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 5 0 1 6 0>;
                 };
 
                 can@900 {
                         compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        cell-index = <0>;
-                        interrupts = <0x2 0x11 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 17 0>;
                         reg = <0x900 0x80>;
                 };
 
                 can@980 {
                         compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        cell-index = <1>;
-                        interrupts = <0x2 0x12 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 18 0>;
                         reg = <0x980 0x80>;
                 };
 
                 gpio_simple: gpio@b00 {
                         compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
                         reg = <0xb00 0x40>;
-                        interrupts = <0x1 0x7 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 7 0>;
                         gpio-controller;
                         #gpio-cells = <2>;
                 };
 
-                gpio_wkup: gpio-wkup@c00 {
+                gpio_wkup: gpio@c00 {
                         compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
                         reg = <0xc00 0x40>;
-                        interrupts = <0x1 0x8 0x0 0x0 0x3 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <1 8 0 0 3 0>;
                         gpio-controller;
                         #gpio-cells = <2>;
                 };
@@ -185,26 +162,22 @@
                 spi@f00 {
                         compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
                         reg = <0xf00 0x20>;
-                        interrupts = <0x2 0xd 0x0 0x2 0xe 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 13 0 2 14 0>;
                 };
 
                 usb@1000 {
                         compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
                         reg = <0x1000 0xff>;
-                        interrupts = <0x2 0x6 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 6 0>;
                 };
 
                 dma-controller@1200 {
-                        device_type = "dma-controller";
                         compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
                         reg = <0x1200 0x80>;
-                        interrupts = <0x3 0x0 0x0  0x3 0x1 0x0  0x3 0x2 0x0  0x3 0x3 0x0
-                                      0x3 0x4 0x0  0x3 0x5 0x0  0x3 0x6 0x0  0x3 0x7 0x0
-                                      0x3 0x8 0x0  0x3 0x9 0x0  0x3 0xa 0x0  0x3 0xb 0x0
-                                      0x3 0xc 0x0  0x3 0xd 0x0  0x3 0xe 0x0  0x3 0xf 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
+                                      3 4 0  3 5 0  3 6 0  3 7 0
+                                      3 8 0  3 9 0  3 10 0  3 11 0
+                                      3 12 0  3 13 0  3 14 0  3 15 0>;
                 };
 
                 xlb@1f00 {
@@ -213,24 +186,19 @@
                 };
 
                 ac97@2000 { /* PSC1 in ac97 mode */
-                        device_type = "sound";
                         compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
                         cell-index = <0>;
                         reg = <0x2000 0x100>;
-                        interrupts = <0x2 0x2 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 1 0>;
                 };
 
                 /* PSC2 port is used by CAN1/2 */
 
                 serial@2400 { /* PSC3 in UART mode */
-                        device_type = "serial";
                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        port-number = <0>;
                         cell-index = <2>;
                         reg = <0x2400 0x100>;
-                        interrupts = <0x2 0x3 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 3 0>;
                 };
 
                 /* PSC4 is ??? */
@@ -238,55 +206,44 @@
                 /* PSC5 is ??? */
 
                 serial@2c00 { /* PSC6 in UART mode */
-                        device_type = "serial";
                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        port-number = <1>;
                         cell-index = <5>;
                         reg = <0x2c00 0x100>;
-                        interrupts = <0x2 0x4 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 4 0>;
                 };
 
                 ethernet@3000 {
-                        device_type = "network";
                         compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
                         reg = <0x3000 0x400>;
-                        local-mac-address = [00 00 00 00 00 00];
-                        interrupts = <0x2 0x5 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <2 5 0>;
                         phy-handle = <&phy0>;
                 };
 
                 mdio@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;   /* fec range, since we need to setup fec interrupts */
-                        interrupts = <0x2 0x5 0x0>;     /* these are for "mii command finished", not link changes & co. */
-                        interrupt-parent = <&mpc5200_pic>;
-
-                        phy0:ethernet-phy@0 {
-                                device_type = "ethernet-phy";
-                                reg = <0x0>;
+                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
+                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
+
+                        phy0: ethernet-phy@0 {
+                                reg = <0>;
                         };
                 };
 
                 ata@3a00 {
-                        device_type = "ata";
                         compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
                         reg = <0x3a00 0x100>;
-                        interrupts = <0x2 0x7 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 7 0>;
                 };
 
                 i2c@3d00 {
                         #address-cells = <1>;
                         #size-cells = <0>;
                         compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        cell-index = <0>;
                         reg = <0x3d00 0x40>;
-                        interrupts = <0x2 0xf 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 15 0>;
                         fsl5200-clocking;
                 };
 
@@ -294,10 +251,8 @@
                         #address-cells = <1>;
                         #size-cells = <0>;
                         compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        cell-index = <1>;
                         reg = <0x3d40 0x40>;
-                        interrupts = <0x2 0x10 0x0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        interrupts = <2 16 0>;
                         fsl5200-clocking;
                         rtc@51 {
                                 compatible = "nxp,pcf8563";
@@ -307,7 +262,7 @@
                 };
 
                 sram@8000 {
-                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
+                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
                         reg = <0x8000 0x4000>;
                 };
 
@@ -340,22 +295,21 @@
                 device_type = "pci";
                 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
                 reg = <0xf0000d00 0x100>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <0xc000 0x0 0x0 0x1 &mpc5200_pic 0x0 0x0 0x3 /* 1st slot */
-                                 0xc000 0x0 0x0 0x2 &mpc5200_pic 0x1 0x1 0x3
-                                 0xc000 0x0 0x0 0x3 &mpc5200_pic 0x1 0x2 0x3
-                                 0xc000 0x0 0x0 0x4 &mpc5200_pic 0x1 0x3 0x3
-
-                                 0xc800 0x0 0x0 0x1 &mpc5200_pic 0x1 0x1 0x3 /* 2nd slot */
-                                 0xc800 0x0 0x0 0x2 &mpc5200_pic 0x1 0x2 0x3
-                                 0xc800 0x0 0x0 0x3 &mpc5200_pic 0x1 0x3 0x3
-                                 0xc800 0x0 0x0 0x4 &mpc5200_pic 0x0 0x0 0x3>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
+                                 0xc000 0 0 2 &mpc5200_pic 1 1 3
+                                 0xc000 0 0 3 &mpc5200_pic 1 2 3
+                                 0xc000 0 0 4 &mpc5200_pic 1 3 3
+
+                                 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
+                                 0xc800 0 0 2 &mpc5200_pic 1 2 3
+                                 0xc800 0 0 3 &mpc5200_pic 1 3 3
+                                 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
                 clock-frequency = <0>; // From boot loader
-                interrupts = <0x2 0x8 0x0 0x2 0x9 0x0 0x2 0xa 0x0>;
-                interrupt-parent = <&mpc5200_pic>;
+                interrupts = <2 8 0 2 9 0 2 10 0>;
                 bus-range = <0 0>;
-                ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
-                          0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
-                          0x01000000 0x0 0x00000000 0xb0000000 0x0 0x01000000>;
+                ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
+                          0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
         };
 };
diff --git a/arch/powerpc/boot/dts/pcm032.dts b/arch/powerpc/boot/dts/pcm032.dts
new file mode 100644
index 000000000000..030042678392
--- /dev/null
+++ b/arch/powerpc/boot/dts/pcm032.dts
@@ -0,0 +1,392 @@
+/*
+ * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source
+ *
+ * Copyright (C) 2006-2009 Pengutronix
+ * Sascha Hauer <s.hauer@pengutronix.de>
+ * Juergen Beisert <j.beisert@pengutronix.de>
+ * Wolfram Sang <w.sang@pengutronix.de>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "phytec,pcm032";
+        compatible = "phytec,pcm032";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,5200@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        d-cache-size = <0x4000>;        // L1, 16K
+                        i-cache-size = <0x4000>;        // L1, 16K
+                        timebase-frequency = <0>;       // from bootloader
+                        bus-frequency = <0>;            // from bootloader
+                        clock-frequency = <0>;          // from bootloader
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x08000000>;  // 128MB
+        };
+
+        soc5200@f0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc5200b-immr";
+                ranges = <0 0xf0000000 0x0000c000>;
+                bus-frequency = <0>;            // from bootloader
+                system-frequency = <0>;         // from bootloader
+
+                cdm@200 {
+                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
+                        reg = <0x200 0x38>;
+                };
+
+                mpc5200_pic: interrupt-controller@500 {
+                        // 5200 interrupts are encoded into two levels;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
+                        reg = <0x500 0x80>;
+                };
+
+                timer@600 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x600 0x10>;
+                        interrupts = <1 9 0>;
+                        fsl,has-wdt;
+                };
+
+                timer@610 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x610 0x10>;
+                        interrupts = <1 10 0>;
+                };
+
+                gpt2: timer@620 {       // General Purpose Timer in GPIO mode
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x620 0x10>;
+                        interrupts = <1 11 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpt3: timer@630 {       // General Purpose Timer in GPIO mode
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x630 0x10>;
+                        interrupts = <1 12 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpt4: timer@640 {       // General Purpose Timer in GPIO mode
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x640 0x10>;
+                        interrupts = <1 13 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpt5: timer@650 {       // General Purpose Timer in GPIO mode
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x650 0x10>;
+                        interrupts = <1 14 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpt6: timer@660 {       // General Purpose Timer in GPIO mode
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x660 0x10>;
+                        interrupts = <1 15 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpt7: timer@670 {       // General Purpose Timer in GPIO mode
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x670 0x10>;
+                        interrupts = <1 16 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                rtc@800 {       // Real time clock
+                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
+                        reg = <0x800 0x100>;
+                        interrupts = <1 5 0 1 6 0>;
+                };
+
+                can@900 {
+                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+                        interrupts = <2 17 0>;
+                        reg = <0x900 0x80>;
+                };
+
+                can@980 {
+                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+                        interrupts = <2 18 0>;
+                        reg = <0x980 0x80>;
+                };
+
+                gpio_simple: gpio@b00 {
+                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        reg = <0xb00 0x40>;
+                        interrupts = <1 7 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                gpio_wkup: gpio@c00 {
+                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        reg = <0xc00 0x40>;
+                        interrupts = <1 8 0 0 3 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+
+                spi@f00 {
+                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+                        reg = <0xf00 0x20>;
+                        interrupts = <2 13 0 2 14 0>;
+                };
+
+                usb@1000 {
+                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
+                        reg = <0x1000 0xff>;
+                        interrupts = <2 6 0>;
+                };
+
+                dma-controller@1200 {
+                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+                        reg = <0x1200 0x80>;
+                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
+                                      3 4 0  3 5 0  3 6 0  3 7 0
+                                      3 8 0  3 9 0  3 10 0  3 11 0
+                                      3 12 0  3 13 0  3 14 0  3 15 0>;
+                };
+
+                xlb@1f00 {
+                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        reg = <0x1f00 0x100>;
+                };
+
+                ac97@2000 {     /* PSC1 is ac97 */
+                        compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
+                        cell-index = <0>;
+                        reg = <0x2000 0x100>;
+                        interrupts = <2 1 0>;
+                };
+
+                /* PSC2 port is used by CAN1/2 */
+
+                serial@2400 { /* PSC3 in UART mode */
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        cell-index = <2>;
+                        reg = <0x2400 0x100>;
+                        interrupts = <2 3 0>;
+                };
+
+                /* PSC4 is ??? */
+
+                /* PSC5 is ??? */
+
+                serial@2c00 { /* PSC6 in UART mode */
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        cell-index = <5>;
+                        reg = <0x2c00 0x100>;
+                        interrupts = <2 4 0>;
+                };
+
+                ethernet@3000 {
+                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
+                        reg = <0x3000 0x400>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <2 5 0>;
+                        phy-handle = <&phy0>;
+                };
+
+                mdio@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
+                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
+
+                        phy0: ethernet-phy@0 {
+                                reg = <0>;
+                        };
+                };
+
+                ata@3a00 {
+                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+                        reg = <0x3a00 0x100>;
+                        interrupts = <2 7 0>;
+                };
+
+                i2c@3d00 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+                        reg = <0x3d00 0x40>;
+                        interrupts = <2 15 0>;
+                        fsl5200-clocking;
+                };
+
+                i2c@3d40 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+                        reg = <0x3d40 0x40>;
+                        interrupts = <2 16 0>;
+                        fsl5200-clocking;
+                        rtc@51 {
+                                compatible = "nxp,pcf8563";
+                                reg = <0x51>;
+                        };
+                        eeprom@52 {
+                                compatible = "at24,24c32";
+                                reg = <0x52>;
+                        };
+                };
+
+                sram@8000 {
+                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+                        reg = <0x8000 0x4000>;
+                };
+        };
+
+        pci@f0000d00 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
+                reg = <0xf0000d00 0x100>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
+                                 0xc000 0 0 2 &mpc5200_pic 1 1 3
+                                 0xc000 0 0 3 &mpc5200_pic 1 2 3
+                                 0xc000 0 0 4 &mpc5200_pic 1 3 3
+
+                                 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
+                                 0xc800 0 0 2 &mpc5200_pic 1 2 3
+                                 0xc800 0 0 3 &mpc5200_pic 1 3 3
+                                 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
+                clock-frequency = <0>; // From boot loader
+                interrupts = <2 8 0 2 9 0 2 10 0>;
+                bus-range = <0 0>;
+                ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
+                          0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
+        };
+
+        localbus {
+                compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
+
+                #address-cells = <2>;
+                #size-cells = <1>;
+
+                ranges = <0 0 0xfe000000 0x02000000
+                          1 0 0xfc000000 0x02000000
+                          2 0 0xfbe00000 0x00200000
+                          3 0 0xf9e00000 0x02000000
+                          4 0 0xf7e00000 0x02000000
+                          5 0 0xe6000000 0x02000000
+                          6 0 0xe8000000 0x02000000
+                          7 0 0xea000000 0x02000000>;
+
+                flash@0,0 {
+                        compatible = "cfi-flash";
+                        reg = <0 0 0x02000000>;
+                        bank-width = <4>;
+                        #size-cells = <1>;
+                        #address-cells = <1>;
+
+                        partition@0 {
+                                label = "ubootl";
+                                reg = <0x00000000 0x00040000>;
+                        };
+                        partition@40000 {
+                                label = "kernel";
+                                reg = <0x00040000 0x001c0000>;
+                        };
+                        partition@200000 {
+                                label = "jffs2";
+                                reg = <0x00200000 0x01d00000>;
+                        };
+                        partition@1f00000 {
+                                label = "uboot";
+                                reg = <0x01f00000 0x00040000>;
+                        };
+                        partition@1f40000 {
+                                label = "env";
+                                reg = <0x01f40000 0x00040000>;
+                        };
+                        partition@1f80000 {
+                                label = "oftree";
+                                reg = <0x01f80000 0x00040000>;
+                        };
+                        partition@1fc0000 {
+                                label = "space";
+                                reg = <0x01fc0000 0x00040000>;
+                        };
+                };
+
+                sram@2,0 {
+                        compatible = "mtd-ram";
+                        reg = <2 0 0x00200000>;
+                        bank-width = <2>;
+                };
+
+                /*
+                 * example snippets for FPGA
+                 *
+                 * fpga@3,0 {
+                 *         compatible = "fpga_driver";
+                 *         reg = <3 0 0x02000000>;
+                 *         bank-width = <4>;
+                 * };
+                 *
+                 * fpga@4,0 {
+                 *         compatible = "fpga_driver";
+                 *         reg = <4 0 0x02000000>;
+                 *         bank-width = <4>;
+                 * };
+                 */
+
+                /*
+                 * example snippets for free chipselects
+                 *
+                 * device@5,0 {
+                 *         compatible = "custom_driver";
+                 *         reg = <5 0 0x02000000>;
+                 * };
+                 *
+                 * device@6,0 {
+                 *         compatible = "custom_driver";
+                 *         reg = <6 0 0x02000000>;
+                 * };
+                 *
+                 * device@7,0 {
+                 *         compatible = "custom_driver";
+                 *         reg = <7 0 0x02000000>;
+                 * };
+                 */
+        };
+};
+
diff --git a/arch/powerpc/boot/dts/redwood.dts b/arch/powerpc/boot/dts/redwood.dts
new file mode 100644
index 000000000000..ad402c488741
--- /dev/null
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -0,0 +1,244 @@
+/*
+ * Device Tree Source for AMCC Redwood(460SX)
+ *
+ * Copyright 2008 AMCC <tmarri@amcc.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "amcc,redwood";
+        compatible = "amcc,redwood";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                ethernet0 = &EMAC0;
+                serial0 = &UART0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,460SX";
+                        reg = <0x00000000>;
+                        clock-frequency = <0>; /* Filled in by U-Boot */
+                        timebase-frequency = <0>; /* Filled in by U-Boot */
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
+        };
+
+        UIC0: interrupt-controller0 {
+                compatible = "ibm,uic-460sx","ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0x0c0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+        };
+
+        UIC1: interrupt-controller1 {
+                compatible = "ibm,uic-460sx","ibm,uic";
+                interrupt-controller;
+                cell-index = <1>;
+                dcr-reg = <0x0d0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        UIC2: interrupt-controller2 {
+                compatible = "ibm,uic-460sx","ibm,uic";
+                interrupt-controller;
+                cell-index = <2>;
+                dcr-reg = <0x0e0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        UIC3: interrupt-controller3 {
+                compatible = "ibm,uic-460sx","ibm,uic";
+                interrupt-controller;
+                cell-index = <3>;
+                dcr-reg = <0x0f0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        SDR0: sdr {
+                compatible = "ibm,sdr-460sx";
+                dcr-reg = <0x00e 0x002>;
+        };
+
+        CPR0: cpr {
+                compatible = "ibm,cpr-460sx";
+                dcr-reg = <0x00c 0x002>;
+        };
+
+        plb {
+                compatible = "ibm,plb-460sx", "ibm,plb4";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; /* Filled in by U-Boot */
+
+                SDRAM0: sdram {
+                        compatible = "ibm,sdram-460sx", "ibm,sdram-405gp";
+                        dcr-reg = <0x010 0x002>;
+                };
+
+                MAL0: mcmal {
+                        compatible = "ibm,mcmal-460sx", "ibm,mcmal2";
+                        dcr-reg = <0x180 0x62>;
+                        num-tx-chans = <4>;
+                        num-rx-chans = <32>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        interrupt-parent = <&UIC1>;
+                        interrupts = <  /*TXEOB*/ 0x6 0x4
+                                        /*RXEOB*/ 0x7 0x4
+                                        /*SERR*/  0x1 0x4
+                                        /*TXDE*/  0x2 0x4
+                                        /*RXDE*/  0x3 0x4
+                                        /*COAL TX0*/ 0x18 0x2
+                                        /*COAL TX1*/ 0x19 0x2
+                                        /*COAL TX2*/ 0x1a 0x2
+                                        /*COAL TX3*/ 0x1b 0x2
+                                        /*COAL RX0*/ 0x1c 0x2
+                                        /*COAL RX1*/ 0x1d 0x2
+                                        /*COAL RX2*/ 0x1e 0x2
+                                        /*COAL RX3*/ 0x1f 0x2>;
+                };
+
+                POB0: opb {
+                        compatible = "ibm,opb-460sx", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
+                        clock-frequency = <0>; /* Filled in by U-Boot */
+
+                        EBC0: ebc {
+                                compatible = "ibm,ebc-460sx", "ibm,ebc";
+                                dcr-reg = <0x012 0x002>;
+                                #address-cells = <2>;
+                                #size-cells = <1>;
+                                clock-frequency = <0>; /* Filled in by U-Boot */
+                                /* ranges property is supplied by U-Boot */
+                                interrupts = <0x6 0x4>;
+                                interrupt-parent = <&UIC1>;
+
+                                nor_flash@0,0 {
+                                        compatible = "amd,s29gl512n", "cfi-flash";
+                                        bank-width = <2>;
+                                        reg = <0x0000000 0x00000000 0x04000000>;
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        partition@0 {
+                                                label = "kernel";
+                                                reg = <0x00000000 0x001e0000>;
+                                        };
+                                        partition@1e0000 {
+                                                label = "dtb";
+                                                reg = <0x001e0000 0x00020000>;
+                                        };
+                                        partition@200000 {
+                                                label = "ramdisk";
+                                                reg = <0x00200000 0x01400000>;
+                                        };
+                                        partition@1600000 {
+                                                label = "jffs2";
+                                                reg = <0x01600000 0x00400000>;
+                                        };
+                                        partition@1a00000 {
+                                                label = "user";
+                                                reg = <0x01a00000 0x02560000>;
+                                        };
+                                        partition@3f60000 {
+                                                label = "env";
+                                                reg = <0x03f60000 0x00040000>;
+                                        };
+                                        partition@3fa0000 {
+                                                label = "u-boot";
+                                                reg = <0x03fa0000 0x00060000>;
+                                        };
+                                };
+                        };
+
+                        UART0: serial@ef600200 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <0xef600200 0x00000008>;
+                                virtual-reg = <0xef600200>;
+                                clock-frequency = <0>; /* Filled in by U-Boot */
+                                current-speed = <0>; /* Filled in by U-Boot */
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x0 0x4>;
+                        };
+
+                        RGMII0: emac-rgmii@ef600900 {
+                                compatible = "ibm,rgmii-460sx", "ibm,rgmii";
+                                reg = <0xef600900 0x00000008>;
+                        };
+
+                        EMAC0: ethernet@ef600a00 {
+                                device_type = "network";
+                                compatible = "ibm,emac-460sx", "ibm,emac4";
+                                interrupt-parent = <&EMAC0>;
+                                interrupts = <0x0 0x1>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4
+                                                 /*Wake*/   0x1 &UIC2 0x1d 0x4>;
+                                reg = <0xef600a00 0x00000070>;
+                                local-mac-address = [000000000000]; /* Filled in by U-Boot */
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <0>;
+                                mal-rx-channel = <0>;
+                                cell-index = <0>;
+                                max-frame-size = <9000>;
+                                rx-fifo-size = <4096>;
+                                tx-fifo-size = <2048>;
+                                phy-mode = "rgmii";
+                                phy-map = <0x00000000>;
+                                rgmii-device = <&RGMII0>;
+                                rgmii-channel = <0>;
+                                has-inverted-stacr-oc;
+                                has-new-stacr-staopc;
+                        };
+
+                };
+
+        };
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@ef600200";
+        };
+
+};
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 8d365a57ebc1..a36dbbc48694 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -159,68 +159,76 @@
                         phy_type = "ulpi";
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@19 {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <20 0x8>;
-                                reg = <0x19>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1a {
-                                interrupt-parent = <&ipic>;
-                                interrupts = <21 0x8>;
-                                reg = <0x1a>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <32 0x8 33 0x8 34 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         linux,network-index = <0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@19 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <20 0x8>;
+                                        reg = <0x19>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                phy1: ethernet-phy@1a {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <21 0x8>;
+                                        reg = <0x1a>;
+                                        device_type = "ethernet-phy";
+                                };
+
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 0x8 36 0x8 37 0x8>;
                         interrupt-parent = <&ipic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         linux,network-index = <1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 2baf4a51f224..9c5079fec4f2 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -234,66 +234,72 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@19 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <0x6 0x1>;
-                                reg = <0x19>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1a {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <0x7 0x1>;
-                                reg = <0x1a>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@19 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <0x6 0x1>;
+                                        reg = <0x19>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1a {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <0x7 0x1>;
+                                        reg = <0x1a>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index 01542f7062ab..b772405a9a0a 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -139,77 +139,83 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-                        phy0: ethernet-phy@19 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <0x6 0x1>;
-                                reg = <0x19>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@1a {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <0x7 0x1>;
-                                reg = <0x1a>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@1b {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <0x8 0x1>;
-                                reg = <0x1b>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@1c {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <0x8 0x1>;
-                                reg = <0x1c>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+                                phy0: ethernet-phy@19 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <0x6 0x1>;
+                                        reg = <0x19>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@1a {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <0x7 0x1>;
+                                        reg = <0x1a>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@1b {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <0x8 0x1>;
+                                        reg = <0x1b>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@1c {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <0x8 0x1>;
+                                        reg = <0x1c>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 36db981548e4..e3e914e78caa 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -192,132 +192,144 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy0: ethernet-phy@1f {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0x1f>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy1: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <0>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <10 1>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@27520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x27520 0x20>;
-
-                        tbi3: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30  2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy0>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@1f {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0x1f>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy1: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <0>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <10 1>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <2>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi2>;
                         phy-handle = <&phy2>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <3>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi3>;
                         phy-handle = <&phy3>;
                         phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts
new file mode 100644
index 000000000000..b8d0fc6f0042
--- /dev/null
+++ b/arch/powerpc/boot/dts/socrates.dts
@@ -0,0 +1,338 @@
+/*
+ * Device Tree Source for the Socrates board (MPC8544).
+ *
+ * Copyright (c) 2008 Emcraft Systems.
+ * Sergei Poselenov, <sposelenov@emcraft.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "abb,socrates";
+        compatible = "abb,socrates";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,8544@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        d-cache-size = <0x8000>;        // L1, 32K
+                        i-cache-size = <0x8000>;        // L1, 32K
+                        timebase-frequency = <0>;
+                        bus-frequency = <0>;
+                        clock-frequency = <0>;
+                        next-level-cache = <&L2>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x00000000>;  // Filled in by U-Boot
+        };
+
+        soc8544@e0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                ranges = <0x00000000 0xe0000000 0x00100000>;
+                reg = <0xe0000000 0x00001000>;  // CCSRBAR 1M
+                bus-frequency = <0>;            // Filled in by U-Boot
+                compatible = "fsl,mpc8544-immr", "simple-bus";
+
+                memory-controller@2000 {
+                        compatible = "fsl,mpc8544-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,mpc8544-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>;
+                        cache-size = <0x40000>; // L2, 256K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+
+                        dtt@28 {
+                                compatible = "winbond,w83782d";
+                                reg = <0x28>;
+                        };
+                        rtc@32 {
+                                compatible = "epson,rx8025";
+                                reg = <0x32>;
+                                interrupts = <7 1>;
+                                interrupt-parent = <&mpic>;
+                        };
+                        dtt@4c {
+                                compatible = "dallas,ds75";
+                                reg = <0x4c>;
+                        };
+                        ts@4a {
+                                compatible = "ti,tsc2003";
+                                reg = <0x4a>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <8 1>;
+                        };
+                };
+
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy0>;
+                        tbi-handle = <&tbi0>;
+                        phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy0: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <0 1>;
+                                        reg = <0>;
+                                };
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <0 1>;
+                                        reg = <1>;
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                };
+                        };
+                };
+
+                enet1: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                        phy-handle = <&phy1>;
+                        tbi-handle = <&tbi1>;
+                        phy-connection-type = "rgmii-id";
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                };
+                        };
+                };
+
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,mpc8548-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+        };
+
+
+        localbus {
+                compatible = "fsl,mpc8544-localbus",
+                             "fsl,pq3-localbus",
+                             "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                reg = <0xe0005000 0x40>;
+
+                ranges = <0 0 0xfc000000 0x04000000
+                          2 0 0xc8000000 0x04000000
+                          3 0 0xc0000000 0x00100000
+                        >; /* Overwritten by U-Boot */
+
+                nor_flash@0,0 {
+                        compatible = "amd,s29gl256n", "cfi-flash";
+                        bank-width = <2>;
+                        reg = <0x0 0x000000 0x4000000>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        partition@0 {
+                                label = "kernel";
+                                reg = <0x0 0x1e0000>;
+                                read-only;
+                        };
+                        partition@1e0000 {
+                                label = "dtb";
+                                reg = <0x1e0000 0x20000>;
+                        };
+                        partition@200000 {
+                                label = "root";
+                                reg = <0x200000 0x200000>;
+                        };
+                        partition@400000 {
+                                label = "user";
+                                reg = <0x400000 0x3b80000>;
+                        };
+                        partition@3f80000 {
+                                label = "env";
+                                reg = <0x3f80000 0x40000>;
+                                read-only;
+                        };
+                        partition@3fc0000 {
+                                label = "u-boot";
+                                reg = <0x3fc0000 0x40000>;
+                                read-only;
+                        };
+                };
+
+                display@2,0 {
+                        compatible = "fujitsu,lime";
+                        reg = <2 0x0 0x4000000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <6 1>;
+                };
+
+                fpga_pic: fpga-pic@3,10 {
+                        compatible = "abb,socrates-fpga-pic";
+                        reg = <3 0x10 0x10>;
+                        interrupt-controller;
+                        /* IRQs 2, 10, 11, active low, level-sensitive */
+                        interrupts = <2 1 10 1 11 1>;
+                        interrupt-parent = <&mpic>;
+                        #interrupt-cells = <3>;
+                };
+
+                spi@3,60 {
+                        compatible = "abb,socrates-spi";
+                        reg = <3 0x60 0x10>;
+                        interrupts = <8 4 0>;   // number, type, routing
+                        interrupt-parent = <&fpga_pic>;
+                };
+
+                nand@3,70 {
+                        compatible = "abb,socrates-nand";
+                        reg = <3 0x70 0x04>;
+                        bank-width = <1>;
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        data@0 {
+                                label = "data";
+                                reg = <0x0 0x40000000>;
+                        };
+                };
+
+                can@3,100 {
+                        compatible = "philips,sja1000";
+                        reg = <3 0x100 0x80>;
+                        interrupts = <2 8 1>;   // number, type, routing
+                        interrupt-parent = <&fpga_pic>;
+                };
+        };
+
+        pci0: pci@e0008000 {
+                cell-index = <0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                compatible = "fsl,mpc8540-pci";
+                device_type = "pci";
+                reg = <0xe0008000 0x1000>;
+                clock-frequency = <66666666>;
+
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                                /* IDSEL 0x11 */
+                                 0x8800 0x0 0x0 1 &mpic 5 1
+                                /* IDSEL 0x12 */
+                                 0x9000 0x0 0x0 1 &mpic 4 1>;
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+                bus-range = <0x0 0x0>;
+                ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
+                          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
+        };
+
+};
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index fff33fe6efc6..8b173957fb5f 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -124,66 +124,72 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 4>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy4: ethernet-phy@4 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <5 4>;
-                                reg = <4>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 4>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy4: ethernet-phy@4 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <5 4>;
+                                        reg = <4>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy4>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 mpic: pic@40000 {
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 906302e26a62..c9590b58b7b0 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -17,6 +17,7 @@
         compatible = "tqc,tqm5200";
         #address-cells = <1>;
         #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
 
         cpus {
                 #address-cells = <1>;
@@ -66,36 +67,33 @@
                         compatible = "fsl,mpc5200-gpt";
                         reg = <0x600 0x10>;
                         interrupts = <1 9 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl,has-wdt;
                 };
 
                 can@900 {
                         compatible = "fsl,mpc5200-mscan";
                         interrupts = <2 17 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         reg = <0x900 0x80>;
                 };
 
                 can@980 {
                         compatible = "fsl,mpc5200-mscan";
                         interrupts = <2 18 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         reg = <0x980 0x80>;
                 };
 
-                gpio@b00 {
+                gpio_simple: gpio@b00 {
                         compatible = "fsl,mpc5200-gpio";
                         reg = <0xb00 0x40>;
                         interrupts = <1 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
                 };
 
                 usb@1000 {
                         compatible = "fsl,mpc5200-ohci","ohci-be";
                         reg = <0x1000 0xff>;
                         interrupts = <2 6 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 dma-controller@1200 {
@@ -105,7 +103,6 @@
                                       3 4 0  3 5 0  3 6 0  3 7 0
                                       3 8 0  3 9 0  3 10 0  3 11 0
                                       3 12 0  3 13 0  3 14 0  3 15 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 xlb@1f00 {
@@ -114,39 +111,28 @@
                 };
 
                 serial@2000 {           // PSC1
-                        device_type = "serial";
                         compatible = "fsl,mpc5200-psc-uart";
-                        port-number = <0>;  // Logical port assignment
                         reg = <0x2000 0x100>;
                         interrupts = <2 1 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 serial@2200 {           // PSC2
-                        device_type = "serial";
                         compatible = "fsl,mpc5200-psc-uart";
-                        port-number = <1>;  // Logical port assignment
                         reg = <0x2200 0x100>;
                         interrupts = <2 2 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 serial@2400 {           // PSC3
-                        device_type = "serial";
                         compatible = "fsl,mpc5200-psc-uart";
-                        port-number = <2>;  // Logical port assignment
                         reg = <0x2400 0x100>;
                         interrupts = <2 3 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 ethernet@3000 {
-                        device_type = "network";
                         compatible = "fsl,mpc5200-fec";
                         reg = <0x3000 0x400>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <2 5 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         phy-handle = <&phy0>;
                 };
 
@@ -156,10 +142,8 @@
                         compatible = "fsl,mpc5200-mdio";
                         reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
                         interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
-                        interrupt-parent = <&mpc5200_pic>;
 
                         phy0: ethernet-phy@0 {
-                                device_type = "ethernet-phy";
                                 reg = <0>;
                         };
                 };
@@ -168,7 +152,6 @@
                         compatible = "fsl,mpc5200-ata";
                         reg = <0x3a00 0x100>;
                         interrupts = <2 7 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                 };
 
                 i2c@3d40 {
@@ -177,7 +160,6 @@
                         compatible = "fsl,mpc5200-i2c","fsl-i2c";
                         reg = <0x3d40 0x40>;
                         interrupts = <2 16 0>;
-                        interrupt-parent = <&mpc5200_pic>;
                         fsl5200-clocking;
 
                          rtc@68 {
@@ -192,9 +174,8 @@
                 };
         };
 
-        lpb {
-                model = "fsl,lpb";
-                compatible = "fsl,lpb";
+        localbus {
+                compatible = "fsl,mpc5200-lpb","simple-bus";
                 #address-cells = <2>;
                 #size-cells = <1>;
                 ranges = <0 0 0xfc000000 0x02000000>;
@@ -223,7 +204,6 @@
                                  0xc000 0 0 4 &mpc5200_pic 0 0 3>;
                 clock-frequency = <0>; // From boot loader
                 interrupts = <2 8 0 2 9 0 2 10 0>;
-                interrupt-parent = <&mpc5200_pic>;
                 bus-range = <0 0>;
                 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
                           0x02000000 0 0x90000000 0x90000000 0 0x10000000
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index a693f01c21aa..ac9413a29f9f 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -84,6 +84,11 @@
                         interrupt-parent = <&mpic>;
                         dfsrr;
 
+                        dtt@50 {
+                                compatible = "national,lm75";
+                                reg = <0x50>;
+                        };
+
                         rtc@68 {
                                 compatible = "dallas,ds1337";
                                 reg = <0x68>;
@@ -131,94 +136,103 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <2>;
                         device_type = "network";
                         model = "FEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <41 2>;
                         interrupt-parent = <&mpic>;
                         phy-handle = <&phy3>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 9e3f5f0dde20..c71bb5dd5e5e 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -83,6 +83,11 @@
                         interrupt-parent = <&mpic>;
                         dfsrr;
 
+                        dtt@50 {
+                                compatible = "national,lm75";
+                                reg = <0x50>;
+                        };
+
                         rtc@68 {
                                 compatible = "dallas,ds1337";
                                 reg = <0x68>;
@@ -130,72 +135,78 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 15086eb65c50..28b1a95257cd 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -85,6 +85,11 @@
                         interrupt-parent = <&mpic>;
                         dfsrr;
 
+                        dtt@50 {
+                                compatible = "national,lm75";
+                                reg = <0x50>;
+                        };
+
                         rtc@68 {
                                 compatible = "dallas,ds1337";
                                 reg = <0x68>;
@@ -143,134 +148,146 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy1: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <3>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy4: ethernet-phy@4 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <4>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy5: ethernet-phy@5 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <5>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@27520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x27520 0x20>;
-
-                        tbi3: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy1: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy4: ethernet-phy@4 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <4>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy5: ethernet-phy@5 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <5>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <2>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi2>;
                         phy-handle = <&phy3>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <3>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi3>;
                         phy-handle = <&phy4>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -365,14 +382,14 @@
                 can0@2,0 {
                         compatible = "intel,82527"; // Bosch CC770
                         reg = <2 0x0 0x100>;
-                        interrupts = <4 0>;
+                        interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
                 };
 
                 can1@2,100 {
                         compatible = "intel,82527"; // Bosch CC770
                         reg = <2 0x100 0x100>;
-                        interrupts = <4 0>;
+                        interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
                 };
 
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index b7b65f5e79b6..826fb622cd3c 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -85,6 +85,11 @@
                         interrupt-parent = <&mpic>;
                         dfsrr;
 
+                        dtt@50 {
+                                compatible = "national,lm75";
+                                reg = <0x50>;
+                        };
+
                         rtc@68 {
                                 compatible = "dallas,ds1337";
                                 reg = <0x68>;
@@ -143,134 +148,146 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy1: ethernet-phy@0 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <3>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy4: ethernet-phy@4 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <4>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy5: ethernet-phy@5 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <5>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@26520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
-
-                        tbi2: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@27520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x27520 0x20>;
-
-                        tbi3: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy1: ethernet-phy@0 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy4: ethernet-phy@4 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <4>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy5: ethernet-phy@5 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <5>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <2>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <31 2 32 2 33 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi2>;
                         phy-handle = <&phy3>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi2: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet3: ethernet@27000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <3>;
                         device_type = "network";
                         model = "eTSEC";
                         compatible = "gianfar";
                         reg = <0x27000 0x1000>;
+                        ranges = <0x0 0x27000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <37 2 38 2 39 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi3>;
                         phy-handle = <&phy4>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi3: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
@@ -365,14 +382,14 @@
                 can0@2,0 {
                         compatible = "intel,82527"; // Bosch CC770
                         reg = <2 0x0 0x100>;
-                        interrupts = <4 0>;
+                        interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
                 };
 
                 can1@2,100 {
                         compatible = "intel,82527"; // Bosch CC770
                         reg = <2 0x100 0x100>;
-                        interrupts = <4 0>;
+                        interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
                 };
 
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index cf92b4e7945e..a133ded6dddb 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -83,6 +83,11 @@
                         interrupt-parent = <&mpic>;
                         dfsrr;
 
+                        dtt@50 {
+                                compatible = "national,lm75";
+                                reg = <0x50>;
+                        };
+
                         rtc@68 {
                                 compatible = "dallas,ds1337";
                                 reg = <0x68>;
@@ -130,72 +135,78 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 serial0: serial@4500 {
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 9e1ab2d2f669..649e2e576267 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -85,6 +85,11 @@
                         interrupt-parent = <&mpic>;
                         dfsrr;
 
+                        dtt@50 {
+                                compatible = "national,lm75";
+                                reg = <0x50>;
+                        };
+
                         rtc@68 {
                                 compatible = "dallas,ds1337";
                                 reg = <0x68>;
@@ -132,72 +137,78 @@
                         };
                 };
 
-                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
-
-                        phy1: ethernet-phy@1 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <1>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy2: ethernet-phy@2 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <2>;
-                                device_type = "ethernet-phy";
-                        };
-                        phy3: ethernet-phy@3 {
-                                interrupt-parent = <&mpic>;
-                                interrupts = <8 1>;
-                                reg = <3>;
-                                device_type = "ethernet-phy";
-                        };
-                        tbi0: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
-                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x25520 0x20>;
-
-                        tbi1: tbi-phy@11 {
-                                reg = <0x11>;
-                                device_type = "tbi-phy";
-                        };
-                };
-
                 enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <0>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <29 2 30 2 34 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi0>;
                         phy-handle = <&phy2>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy3: ethernet-phy@3 {
+                                        interrupt-parent = <&mpic>;
+                                        interrupts = <8 1>;
+                                        reg = <3>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
                         cell-index = <1>;
                         device_type = "network";
                         model = "TSEC";
                         compatible = "gianfar";
                         reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         interrupts = <35 2 36 2 40 2>;
                         interrupt-parent = <&mpic>;
                         tbi-handle = <&tbi1>;
                         phy-handle = <&phy1>;
+
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
                 };
 
                 mpic: pic@40000 {
@@ -335,14 +346,14 @@
                 can0@2,0 {
                         compatible = "intel,82527"; // Bosch CC770
                         reg = <2 0x0 0x100>;
-                        interrupts = <4 0>;
+                        interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
                 };
 
                 can1@2,100 {
                         compatible = "intel,82527"; // Bosch CC770
                         reg = <2 0x100 0x100>;
-                        interrupts = <4 0>;
+                        interrupts = <4 1>;
                         interrupt-parent = <&mpic>;
                 };
         };
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts
index dc8e78e2dceb..52d8c1ad26a1 100644
--- a/arch/powerpc/boot/dts/virtex440-ml507.dts
+++ b/arch/powerpc/boot/dts/virtex440-ml507.dts
@@ -7,6 +7,15 @@
  * This file is licensed under the terms of the GNU General Public License
  * version 2. This program is licensed "as is" without any warranty of any
  * kind, whether express or implied.
+ *
+ * ---
+ *
+ * Device Tree Generator version: 1.1
+ *
+ * CAUTION: This file is automatically generated by libgen.
+ * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
+ *
+ * XPS project directory: ml507_ppc440_emb_ref
  */
 
 /dts-v1/;
@@ -22,8 +31,8 @@
                 reg = < 0 0x10000000 >;
         } ;
         chosen {
-                bootargs = "console=ttyS0 ip=on root=/dev/ram";
-                linux,stdout-path = "/plb@0/serial@83e00000";
+                bootargs = "console=ttyS0 root=/dev/ram";
+                linux,stdout-path = &RS232_Uart_1;
         } ;
         cpus {
                 #address-cells = <1>;
@@ -136,19 +145,19 @@
                                 compatible = "xlnx,ll-dma-1.00.a";
                                 dcr-reg = < 0x80 0x11 >;
                                 interrupt-parent = <&xps_intc_0>;
-                                interrupts = < 9 2 0xa 2 >;
+                                interrupts = < 10 2 11 2 >;
                         } ;
                 } ;
         } ;
         plb_v46_0: plb@0 {
                 #address-cells = <1>;
                 #size-cells = <1>;
-                compatible = "xlnx,plb-v46-1.02.a", "simple-bus";
+                compatible = "xlnx,plb-v46-1.03.a", "simple-bus";
                 ranges ;
                 DIP_Switches_8Bit: gpio@81460000 {
                         compatible = "xlnx,xps-gpio-1.00.a";
                         interrupt-parent = <&xps_intc_0>;
-                        interrupts = < 6 2 >;
+                        interrupts = < 7 2 >;
                         reg = < 0x81460000 0x10000 >;
                         xlnx,all-inputs = <1>;
                         xlnx,all-inputs-2 = <0>;
@@ -163,6 +172,86 @@
                         xlnx,tri-default = <0xffffffff>;
                         xlnx,tri-default-2 = <0xffffffff>;
                 } ;
+                FLASH: flash@fc000000 {
+                        bank-width = <2>;
+                        compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash";
+                        reg = < 0xfc000000 0x2000000 >;
+                        xlnx,family = "virtex5";
+                        xlnx,include-datawidth-matching-0 = <0x1>;
+                        xlnx,include-datawidth-matching-1 = <0x0>;
+                        xlnx,include-datawidth-matching-2 = <0x0>;
+                        xlnx,include-datawidth-matching-3 = <0x0>;
+                        xlnx,include-negedge-ioregs = <0x0>;
+                        xlnx,include-plb-ipif = <0x1>;
+                        xlnx,include-wrbuf = <0x1>;
+                        xlnx,max-mem-width = <0x10>;
+                        xlnx,mch-native-dwidth = <0x20>;
+                        xlnx,mch-plb-clk-period-ps = <0x2710>;
+                        xlnx,mch-splb-awidth = <0x20>;
+                        xlnx,mch0-accessbuf-depth = <0x10>;
+                        xlnx,mch0-protocol = <0x0>;
+                        xlnx,mch0-rddatabuf-depth = <0x10>;
+                        xlnx,mch1-accessbuf-depth = <0x10>;
+                        xlnx,mch1-protocol = <0x0>;
+                        xlnx,mch1-rddatabuf-depth = <0x10>;
+                        xlnx,mch2-accessbuf-depth = <0x10>;
+                        xlnx,mch2-protocol = <0x0>;
+                        xlnx,mch2-rddatabuf-depth = <0x10>;
+                        xlnx,mch3-accessbuf-depth = <0x10>;
+                        xlnx,mch3-protocol = <0x0>;
+                        xlnx,mch3-rddatabuf-depth = <0x10>;
+                        xlnx,mem0-width = <0x10>;
+                        xlnx,mem1-width = <0x20>;
+                        xlnx,mem2-width = <0x20>;
+                        xlnx,mem3-width = <0x20>;
+                        xlnx,num-banks-mem = <0x1>;
+                        xlnx,num-channels = <0x2>;
+                        xlnx,priority-mode = <0x0>;
+                        xlnx,synch-mem-0 = <0x0>;
+                        xlnx,synch-mem-1 = <0x0>;
+                        xlnx,synch-mem-2 = <0x0>;
+                        xlnx,synch-mem-3 = <0x0>;
+                        xlnx,synch-pipedelay-0 = <0x2>;
+                        xlnx,synch-pipedelay-1 = <0x2>;
+                        xlnx,synch-pipedelay-2 = <0x2>;
+                        xlnx,synch-pipedelay-3 = <0x2>;
+                        xlnx,tavdv-ps-mem-0 = <0x1adb0>;
+                        xlnx,tavdv-ps-mem-1 = <0x3a98>;
+                        xlnx,tavdv-ps-mem-2 = <0x3a98>;
+                        xlnx,tavdv-ps-mem-3 = <0x3a98>;
+                        xlnx,tcedv-ps-mem-0 = <0x1adb0>;
+                        xlnx,tcedv-ps-mem-1 = <0x3a98>;
+                        xlnx,tcedv-ps-mem-2 = <0x3a98>;
+                        xlnx,tcedv-ps-mem-3 = <0x3a98>;
+                        xlnx,thzce-ps-mem-0 = <0x88b8>;
+                        xlnx,thzce-ps-mem-1 = <0x1b58>;
+                        xlnx,thzce-ps-mem-2 = <0x1b58>;
+                        xlnx,thzce-ps-mem-3 = <0x1b58>;
+                        xlnx,thzoe-ps-mem-0 = <0x1b58>;
+                        xlnx,thzoe-ps-mem-1 = <0x1b58>;
+                        xlnx,thzoe-ps-mem-2 = <0x1b58>;
+                        xlnx,thzoe-ps-mem-3 = <0x1b58>;
+                        xlnx,tlzwe-ps-mem-0 = <0x88b8>;
+                        xlnx,tlzwe-ps-mem-1 = <0x0>;
+                        xlnx,tlzwe-ps-mem-2 = <0x0>;
+                        xlnx,tlzwe-ps-mem-3 = <0x0>;
+                        xlnx,twc-ps-mem-0 = <0x2af8>;
+                        xlnx,twc-ps-mem-1 = <0x3a98>;
+                        xlnx,twc-ps-mem-2 = <0x3a98>;
+                        xlnx,twc-ps-mem-3 = <0x3a98>;
+                        xlnx,twp-ps-mem-0 = <0x11170>;
+                        xlnx,twp-ps-mem-1 = <0x2ee0>;
+                        xlnx,twp-ps-mem-2 = <0x2ee0>;
+                        xlnx,twp-ps-mem-3 = <0x2ee0>;
+                        xlnx,xcl0-linesize = <0x4>;
+                        xlnx,xcl0-writexfer = <0x1>;
+                        xlnx,xcl1-linesize = <0x4>;
+                        xlnx,xcl1-writexfer = <0x1>;
+                        xlnx,xcl2-linesize = <0x4>;
+                        xlnx,xcl2-writexfer = <0x1>;
+                        xlnx,xcl3-linesize = <0x4>;
+                        xlnx,xcl3-writexfer = <0x1>;
+                } ;
                 Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
                         #address-cells = <1>;
                         #size-cells = <1>;
@@ -185,6 +274,19 @@
                                 xlnx,txfifo = <0x1000>;
                         } ;
                 } ;
+                IIC_EEPROM: i2c@81600000 {
+                        compatible = "xlnx,xps-iic-2.00.a";
+                        interrupt-parent = <&xps_intc_0>;
+                        interrupts = < 6 2 >;
+                        reg = < 0x81600000 0x10000 >;
+                        xlnx,clk-freq = <0x5f5e100>;
+                        xlnx,family = "virtex5";
+                        xlnx,gpo-width = <0x1>;
+                        xlnx,iic-freq = <0x186a0>;
+                        xlnx,scl-inertial-delay = <0x0>;
+                        xlnx,sda-inertial-delay = <0x0>;
+                        xlnx,ten-bit-adr = <0x0>;
+                } ;
                 LEDs_8Bit: gpio@81400000 {
                         compatible = "xlnx,xps-gpio-1.00.a";
                         reg = < 0x81400000 0x10000 >;
@@ -220,7 +322,7 @@
                 Push_Buttons_5Bit: gpio@81440000 {
                         compatible = "xlnx,xps-gpio-1.00.a";
                         interrupt-parent = <&xps_intc_0>;
-                        interrupts = < 7 2 >;
+                        interrupts = < 8 2 >;
                         reg = < 0x81440000 0x10000 >;
                         xlnx,all-inputs = <1>;
                         xlnx,all-inputs-2 = <0>;
@@ -237,13 +339,13 @@
                 } ;
                 RS232_Uart_1: serial@83e00000 {
                         clock-frequency = <100000000>;
-                        compatible = "xlnx,xps-uart16550-2.00.a", "ns16550";
-                        current-speed = <0x2580>;
+                        compatible = "xlnx,xps-uart16550-2.00.b", "ns16550";
+                        current-speed = <9600>;
                         device_type = "serial";
                         interrupt-parent = <&xps_intc_0>;
-                        interrupts = < 8 2 >;
+                        interrupts = < 9 2 >;
                         reg = < 0x83e00000 0x10000 >;
-                        reg-offset = <3>;
+                        reg-offset = <0x1003>;
                         reg-shift = <2>;
                         xlnx,family = "virtex5";
                         xlnx,has-external-rclk = <0>;
@@ -268,7 +370,7 @@
                         compatible = "xlnx,xps-intc-1.00.a";
                         interrupt-controller ;
                         reg = < 0x81800000 0x10000 >;
-                        xlnx,num-intr-inputs = <0xb>;
+                        xlnx,num-intr-inputs = <0xc>;
                 } ;
                 xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
                         compatible = "xlnx,xps-timebase-wdt-1.00.b";
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index 8b3607cb53fb..f2156f07571f 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -117,7 +117,8 @@ int serial_console_init(void)
         if (devp == NULL)
                 goto err_out;
 
-        if (dt_is_compatible(devp, "ns16550"))
+        if (dt_is_compatible(devp, "ns16550") ||
+            dt_is_compatible(devp, "pnpPNP,501"))
                 rc = ns16550_console_init(devp, &serial_cd);
         else if (dt_is_compatible(devp, "marvell,mv64360-mpsc"))
                 rc = mpsc_console_init(devp, &serial_cd);
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 965c237c122d..3ac75aecdb94 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -186,6 +186,9 @@ cuboot*)
     *-mpc85*|*-tqm85*|*-sbc85*)
         platformo=$object/cuboot-85xx.o
         ;;
+    *-amigaone)
+        link_address='0x800000'
+        ;;
     esac
     ;;
 ps3)
@@ -211,11 +214,11 @@ simpleboot-virtex405-*)
     binary=y
     ;;
 simpleboot-virtex440-*)
-    platformo="$object/simpleboot.o $object/virtex.o"
+    platformo="$object/fixed-head.o $object/simpleboot.o $object/virtex.o"
     binary=y
     ;;
 simpleboot-*)
-    platformo="$object/simpleboot.o"
+    platformo="$object/fixed-head.o $object/simpleboot.o"
     binary=y
     ;;
 asp834x-redboot)
diff --git a/arch/powerpc/configs/44x/canyonlands_defconfig b/arch/powerpc/configs/44x/canyonlands_defconfig
index 81cdcc4b9278..f9a08ee49b96 100644
--- a/arch/powerpc/configs/44x/canyonlands_defconfig
+++ b/arch/powerpc/configs/44x/canyonlands_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29-rc2
-# Tue Jan 20 08:22:35 2009
+# Linux kernel version: 2.6.29-rc3
+# Mon Feb  2 13:13:04 2009
 #
 # CONFIG_PPC64 is not set
 
@@ -74,6 +74,15 @@ CONFIG_POSIX_MQUEUE=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -147,11 +156,6 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
-# CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
-# CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_FREEZER is not set
 CONFIG_PPC4xx_PCI_EXPRESS=y
 
@@ -373,6 +377,7 @@ CONFIG_CONNECTOR=y
 CONFIG_PROC_EVENTS=y
 # CONFIG_MTD is not set
 CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
 # CONFIG_PARPORT is not set
 CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_FD is not set
@@ -384,6 +389,7 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 # CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=35000
@@ -466,6 +472,15 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
 #
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
 # CONFIG_WAN is not set
 # CONFIG_FDDI is not set
 # CONFIG_HIPPI is not set
@@ -533,13 +548,136 @@ CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
 CONFIG_DEVPORT=y
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_IBM_IIC=y
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
 # CONFIG_SPI is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 # CONFIG_GPIOLIB is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
-# CONFIG_HWMON is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+CONFIG_SENSORS_AD7414=y
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
 # CONFIG_THERMAL is not set
 # CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
@@ -556,7 +694,12 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
 # CONFIG_REGULATOR is not set
 
 #
@@ -574,6 +717,7 @@ CONFIG_SSB_POSSIBLE=y
 # Multimedia drivers
 #
 CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
 
 #
 # Graphics support
@@ -590,7 +734,109 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
 #
 # CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_SOUND is not set
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=m
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_HCD_PPC_OF=y
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
 # CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
diff --git a/arch/powerpc/configs/44x/redwood_defconfig b/arch/powerpc/configs/44x/redwood_defconfig
new file mode 100644
index 000000000000..e665433762ba
--- /dev/null
+++ b/arch/powerpc/configs/44x/redwood_defconfig
@@ -0,0 +1,1176 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc3
+# Wed Feb  4 14:31:09 2009
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+CONFIG_44x=y
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_4xx=y
+CONFIG_BOOKE=y
+CONFIG_PTE_64BIT=y
+CONFIG_PHYS_64BIT=y
+CONFIG_PPC_MMU_NOHASH=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
+CONFIG_PPC4xx_PCI_EXPRESS=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_BAMBOO is not set
+# CONFIG_EBONY is not set
+# CONFIG_SAM440EP is not set
+# CONFIG_SEQUOIA is not set
+# CONFIG_TAISHAN is not set
+# CONFIG_KATMAI is not set
+# CONFIG_RAINIER is not set
+# CONFIG_WARP is not set
+# CONFIG_ARCHES is not set
+# CONFIG_CANYONLANDS is not set
+# CONFIG_GLACIER is not set
+CONFIG_REDWOOD=y
+# CONFIG_YOSEMITE is not set
+# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
+CONFIG_PPC44x_SIMPLE=y
+# CONFIG_PPC4xx_GPIO is not set
+CONFIG_460SX=y
+# CONFIG_IPIC is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_FSL_ULI1575 is not set
+# CONFIG_SIMPLE_GPIO is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_PPC_NEED_DMA_SYNC_OPS=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_64K_PAGES is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+CONFIG_EXTRA_TARGETS=""
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_4xx_SOC=y
+CONFIG_PPC_PCI_CHOICE=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEASPM is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=35000
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_XILINX_SYSACE is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+CONFIG_SCSI_SAS_ATTRS=y
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_FUSION=y
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+CONFIG_FUSION_SAS=y
+CONFIG_FUSION_MAX_SGE=128
+# CONFIG_FUSION_CTL is not set
+# CONFIG_FUSION_LOGGING is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+CONFIG_I2O=y
+CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y
+CONFIG_I2O_EXT_ADAPTEC=y
+# CONFIG_I2O_CONFIG is not set
+# CONFIG_I2O_BUS is not set
+# CONFIG_I2O_BLOCK is not set
+# CONFIG_I2O_SCSI is not set
+# CONFIG_I2O_PROC is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_IBM_NEW_EMAC=y
+CONFIG_IBM_NEW_EMAC_RXB=256
+CONFIG_IBM_NEW_EMAC_TXB=256
+CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
+CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
+CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
+CONFIG_IBM_NEW_EMAC_DEBUG=y
+CONFIG_IBM_NEW_EMAC_ZMII=y
+CONFIG_IBM_NEW_EMAC_RGMII=y
+CONFIG_IBM_NEW_EMAC_TAH=y
+CONFIG_IBM_NEW_EMAC_EMAC4=y
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+# CONFIG_ATL2 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+CONFIG_E1000E=y
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=1
+CONFIG_SERIAL_8250_RUNTIME_UARTS=1
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_HVC_UDBG is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_IBM_IIC=y
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+CONFIG_I2C_DEBUG_CORE=y
+CONFIG_I2C_DEBUG_ALGO=y
+CONFIG_I2C_DEBUG_BUS=y
+CONFIG_I2C_DEBUG_CHIP=y
+# CONFIG_SPI is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_PRINT_STACK_DEPTH=64
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_MSI_BITMAP_SELFTEST is not set
+# CONFIG_XMON is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_VIRQ_DEBUG is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_GF128MUL=y
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_CRYPTD=y
+CONFIG_CRYPTO_AUTHENC=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_SEQIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CTS=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_LRW=y
+CONFIG_CRYPTO_PCBC=y
+CONFIG_CRYPTO_XTS=y
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_XCBC=y
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_BLOWFISH=y
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/85xx/socrates_defconfig b/arch/powerpc/configs/85xx/socrates_defconfig
new file mode 100644
index 000000000000..0cc9048290a8
--- /dev/null
+++ b/arch/powerpc/configs/85xx/socrates_defconfig
@@ -0,0 +1,1410 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26.2
+# Sat Oct 18 11:06:13 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+CONFIG_PPC_85xx=y
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_E500=y
+CONFIG_BOOKE=y
+CONFIG_FSL_BOOKE=y
+CONFIG_FSL_EMB_PERFMON=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_SPE=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_HOTPLUG is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+# CONFIG_EPOLL is not set
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_MPC85xx=y
+# CONFIG_MPC8540_ADS is not set
+# CONFIG_MPC8560_ADS is not set
+# CONFIG_MPC85xx_CDS is not set
+# CONFIG_MPC85xx_MDS is not set
+# CONFIG_MPC85xx_DS is not set
+CONFIG_SOCRATES=y
+# CONFIG_KSI8560 is not set
+# CONFIG_STX_GP3 is not set
+# CONFIG_TQM8540 is not set
+# CONFIG_TQM8541 is not set
+# CONFIG_TQM8555 is not set
+# CONFIG_TQM8560 is not set
+# CONFIG_SBC8548 is not set
+# CONFIG_SBC8560 is not set
+# CONFIG_IPIC is not set
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_MATH_EMULATION=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYSICAL_ALIGN=0x10000000
+CONFIG_TASK_SIZE=0xc0000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_BCM=y
+
+#
+# CAN Device Drivers
+#
+# CONFIG_CAN_VCAN is not set
+# CONFIG_CAN_OLD_DRIVERS is not set
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_SJA1000=y
+CONFIG_CAN_SJA1000_MEM_OF=y
+# CONFIG_CAN_EMS_PCI is not set
+# CONFIG_CAN_IXXAT_PCI is not set
+# CONFIG_CAN_PEAK_PCI is not set
+# CONFIG_CAN_KVASER_PCI is not set
+# CONFIG_CAN_MSCAN is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_NAND_FSL_ELBC is not set
+CONFIG_MTD_NAND_SOCRATES=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=y
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+CONFIG_GFAR_NAPI=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=800
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+CONFIG_TOUCHSCREEN_TSC2003=y
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+CONFIG_SPI_SOCRATES=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+CONFIG_HWMON_VID=y
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+CONFIG_SENSORS_LM75=y
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+CONFIG_SENSORS_W83781D=y
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+CONFIG_HWMON_DEBUG_CHIP=y
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+CONFIG_FB_FOREIGN_ENDIAN=y
+CONFIG_FB_BOTH_ENDIAN=y
+# CONFIG_FB_BIG_ENDIAN is not set
+# CONFIG_FB_LITTLE_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+CONFIG_FB_MB862XX=y
+# CONFIG_FB_MB862XX_PCI_GDC is not set
+CONFIG_FB_MB862XX_LIME=y
+# CONFIG_FB_PRE_INIT_FB is not set
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_OF is not set
+# CONFIG_FB_CT65550 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_FSL_DIU is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_EHCI_FSL is not set
+CONFIG_USB_EHCI_HCD_PPC_OF=y
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+CONFIG_RTC_DRV_RX8025=y
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_PPC=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
new file mode 100644
index 000000000000..df2c16337794
--- /dev/null
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -0,0 +1,1889 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc7
+# Fri Mar 13 15:36:11 2009
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_ALTIVEC=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_LOCKBREAK=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+CONFIG_GENERIC_TBSYNC=y
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_RELAY=y
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_STOP_MACHINE=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# Platform support
+#
+CONFIG_PPC_MULTIPLATFORM=y
+CONFIG_CLASSIC32=y
+# CONFIG_PPC_CHRP is not set
+# CONFIG_MPC5121_ADS is not set
+# CONFIG_MPC5121_GENERIC is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PPC_82xx is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_PPC_83xx is not set
+CONFIG_PPC_86xx=y
+# CONFIG_MPC8641_HPCN is not set
+# CONFIG_SBC8641D is not set
+# CONFIG_MPC8610_HPCD is not set
+CONFIG_GEF_PPC9A=y
+# CONFIG_GEF_SBC310 is not set
+# CONFIG_GEF_SBC610 is not set
+CONFIG_MPC8641=y
+# CONFIG_IPIC is not set
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_TAU is not set
+# CONFIG_QUICC_ENGINE is not set
+# CONFIG_FSL_ULI1575 is not set
+# CONFIG_MPC8xxx_GPIO is not set
+# CONFIG_SIMPLE_GPIO is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+CONFIG_SCHED_HRTICK=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=m
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_IRQ_ALL_CPUS=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_64K_PAGES is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_EXTRA_TARGETS=""
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_PCI=y
+CONFIG_PPC_PCI_CHOICE=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEASPM is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+# CONFIG_PCI_LEGACY is not set
+CONFIG_PCI_DEBUG=y
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=m
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_XFRM_TUNNEL=m
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETLABEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+CONFIG_NETFILTER_XTABLES=m
+# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
+# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_MAC is not set
+# CONFIG_NETFILTER_XT_MATCH_MARK is not set
+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
+# CONFIG_NETFILTER_XT_MATCH_STRING is not set
+# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_NF_DEFRAG_IPV4 is not set
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+# CONFIG_IP_NF_MATCH_AH is not set
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_ECN=m
+# CONFIG_IP_NF_TARGET_TTL is not set
+CONFIG_IP_NF_RAW=m
+# CONFIG_IP_NF_SECURITY is not set
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+# CONFIG_IP6_NF_MATCH_AH is not set
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+# CONFIG_IP6_NF_MATCH_MH is not set
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_FILTER=m
+# CONFIG_IP6_NF_TARGET_REJECT is not set
+CONFIG_IP6_NF_MANGLE=m
+# CONFIG_IP6_NF_TARGET_HL is not set
+CONFIG_IP6_NF_RAW=m
+# CONFIG_IP6_NF_SECURITY is not set
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+CONFIG_TIPC=m
+# CONFIG_TIPC_ADVANCED is not set
+# CONFIG_TIPC_DEBUG is not set
+CONFIG_ATM=m
+CONFIG_ATM_CLIP=m
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_LANE=m
+CONFIG_ATM_MPOA=m
+CONFIG_ATM_BR2684=m
+# CONFIG_ATM_BR2684_IPFILTER is not set
+CONFIG_STP=m
+CONFIG_BRIDGE=m
+# CONFIG_NET_DSA is not set
+CONFIG_VLAN_8021Q=m
+# CONFIG_VLAN_8021Q_GVRP is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+CONFIG_WAN_ROUTER=m
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_PRIO=m
+# CONFIG_NET_SCH_MULTIQ is not set
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+# CONFIG_NET_SCH_DRR is not set
+
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+# CONFIG_NET_CLS_BASIC is not set
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+# CONFIG_CLS_U32_PERF is not set
+# CONFIG_CLS_U32_MARK is not set
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+# CONFIG_NET_CLS_IND is not set
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=131072
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SIL24 is not set
+# CONFIG_SATA_FSL is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+CONFIG_SATA_SIL=y
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+# CONFIG_ATL2 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+# CONFIG_MV643XX_ETH is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+CONFIG_ATM_DRIVERS=y
+# CONFIG_ATM_DUMMY is not set
+# CONFIG_ATM_TCP is not set
+# CONFIG_ATM_LANAI is not set
+# CONFIG_ATM_ENI is not set
+# CONFIG_ATM_FIRESTREAM is not set
+# CONFIG_ATM_ZATM is not set
+# CONFIG_ATM_NICSTAR is not set
+# CONFIG_ATM_IDT77252 is not set
+# CONFIG_ATM_AMBASSADOR is not set
+# CONFIG_ATM_HORIZON is not set
+# CONFIG_ATM_IA is not set
+# CONFIG_ATM_FORE200E is not set
+# CONFIG_ATM_HE is not set
+# CONFIG_ATM_SOLOS is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+CONFIG_PPPOE=m
+CONFIG_PPPOATM=m
+# CONFIG_PPPOL2TP is not set
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLHC=m
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
+# CONFIG_NET_FC is not set
+CONFIG_NETCONSOLE=y
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+CONFIG_NETPOLL_TRAP=y
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_HVC_UDBG is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+CONFIG_NVRAM=y
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+CONFIG_DS1682=y
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+# CONFIG_GPIO_XILINX is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+CONFIG_SENSORS_LM90=y
+CONFIG_SENSORS_LM92=y
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_ALIM7101_WDT is not set
+CONFIG_GEF_WDT=y
+# CONFIG_8xxx_WDT is not set
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+CONFIG_THRUSTMASTER_FF=m
+CONFIG_ZEROPLUS_FF=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_EHCI_FSL is not set
+# CONFIG_USB_EHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_ATM is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+# CONFIG_RTC_INTF_PROC is not set
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+CONFIG_RTC_DRV_RX8581=y
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_PPC is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_PRINT_STACK_DEPTH=64
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_MSI_BITMAP_SELFTEST is not set
+# CONFIG_XMON is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+# CONFIG_SECURITY_PATH is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_SECURITY_ROOTPLUG is not set
+CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=m
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=m
+CONFIG_CRYPTO_TEST=m
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_WP512=m
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+CONFIG_CRYPTO_KHAZAD=m
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
new file mode 100644
index 000000000000..bd236b3d915a
--- /dev/null
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -0,0 +1,1613 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc3
+# Wed Jan 28 23:05:34 2009
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_ALTIVEC=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_LOCKBREAK=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+CONFIG_GENERIC_TBSYNC=y
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+CONFIG_RELAY=y
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_STOP_MACHINE=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+CONFIG_PPC_MSI_BITMAP=y
+
+#
+# Platform support
+#
+CONFIG_PPC_MULTIPLATFORM=y
+CONFIG_CLASSIC32=y
+# CONFIG_PPC_CHRP is not set
+# CONFIG_MPC5121_ADS is not set
+# CONFIG_MPC5121_GENERIC is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PPC_82xx is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_PPC_83xx is not set
+CONFIG_PPC_86xx=y
+# CONFIG_MPC8641_HPCN is not set
+# CONFIG_SBC8641D is not set
+# CONFIG_MPC8610_HPCD is not set
+CONFIG_GEF_SBC310=y
+# CONFIG_GEF_SBC610 is not set
+CONFIG_MPC8641=y
+# CONFIG_IPIC is not set
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_TAU is not set
+# CONFIG_QUICC_ENGINE is not set
+# CONFIG_FSL_ULI1575 is not set
+# CONFIG_MPC8xxx_GPIO is not set
+# CONFIG_SIMPLE_GPIO is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+CONFIG_SCHED_HRTICK=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_IRQ_ALL_CPUS=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_64K_PAGES is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_EXTRA_TARGETS=""
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_PCI=y
+CONFIG_PPC_PCI_CHOICE=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEASPM is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_PCI_MSI=y
+# CONFIG_PCI_LEGACY is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_LOWMEM_CAM_NUM=3
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=m
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_XFRM_TUNNEL=m
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+CONFIG_NET_PKTGEN=m
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_FIB_RULES=y
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=131072
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+# CONFIG_SATA_AHCI is not set
+CONFIG_SATA_SIL24=y
+# CONFIG_SATA_FSL is not set
+# CONFIG_ATA_SFF is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+# CONFIG_ATL2 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+# CONFIG_MV643XX_ETH is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+CONFIG_PPPOE=m
+# CONFIG_PPPOL2TP is not set
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLHC=m
+CONFIG_SLIP_SMART=y
+CONFIG_SLIP_MODE_SLIP6=y
+# CONFIG_NET_FC is not set
+CONFIG_NETCONSOLE=y
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+CONFIG_NETPOLL_TRAP=y
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_HVC_UDBG is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+CONFIG_NVRAM=y
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+CONFIG_DS1682=y
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+# CONFIG_GPIO_XILINX is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+# CONFIG_GPIO_BT8XX is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+CONFIG_SENSORS_LM90=y
+CONFIG_SENSORS_LM92=y
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_ALIM7101_WDT is not set
+CONFIG_GEF_WDT=y
+# CONFIG_8xxx_WDT is not set
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_EHCI_FSL is not set
+# CONFIG_USB_EHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+# CONFIG_RTC_INTF_PROC is not set
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+CONFIG_RTC_DRV_RX8581=y
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_PPC is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=y
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_PRINT_STACK_DEPTH=64
+# CONFIG_IRQSTACKS is not set
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=m
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=m
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/amigaone_defconfig b/arch/powerpc/configs/amigaone_defconfig
new file mode 100644
index 000000000000..b63cc38df6b1
--- /dev/null
+++ b/arch/powerpc/configs/amigaone_defconfig
@@ -0,0 +1,1636 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc3
+# Sun Feb  1 14:22:42 2009
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_ALTIVEC=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_CHECK_CACHE_COHERENCY=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=15
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_PCSPKR_PLATFORM=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
+
+#
+# Platform support
+#
+CONFIG_PPC_MULTIPLATFORM=y
+CONFIG_CLASSIC32=y
+# CONFIG_PPC_CHRP is not set
+# CONFIG_MPC5121_ADS is not set
+# CONFIG_MPC5121_GENERIC is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PPC_82xx is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_86xx is not set
+# CONFIG_EMBEDDED6xx is not set
+CONFIG_AMIGAONE=y
+# CONFIG_IPIC is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+CONFIG_PPC_I8259=y
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_TAU is not set
+# CONFIG_FSL_ULI1575 is not set
+# CONFIG_SIMPLE_GPIO is not set
+
+#
+# Kernel options
+#
+CONFIG_HIGHMEM=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+CONFIG_BINFMT_MISC=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_PPC_NEED_DMA_SYNC_OPS=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_MIGRATION is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_64K_PAGES is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_EXTRA_TARGETS=""
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+# CONFIG_PCI_LEGACY is not set
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+# CONFIG_NETFILTER_ADVANCED is not set
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NETFILTER_XTABLES=m
+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
+# CONFIG_NETFILTER_XT_MATCH_MARK is not set
+# CONFIG_NETFILTER_XT_MATCH_STATE is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+# CONFIG_IP_NF_TARGET_ULOG is not set
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+# CONFIG_NF_NAT_TFTP is not set
+# CONFIG_NF_NAT_AMANDA is not set
+# CONFIG_NF_NAT_PPTP is not set
+# CONFIG_NF_NAT_H323 is not set
+CONFIG_NF_NAT_SIP=m
+# CONFIG_IP_NF_MANGLE is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+CONFIG_PARPORT=y
+CONFIG_PARPORT_PC=y
+# CONFIG_PARPORT_SERIAL is not set
+CONFIG_PARPORT_PC_FIFO=y
+# CONFIG_PARPORT_PC_SUPERIO is not set
+# CONFIG_PARPORT_GSC is not set
+# CONFIG_PARPORT_AX88796 is not set
+# CONFIG_PARPORT_1284 is not set
+CONFIG_BLK_DEV=y
+CONFIG_BLK_DEV_FD=y
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+CONFIG_IDE=y
+
+#
+# Please see Documentation/ide/ide.txt for help/info on IDE drives
+#
+CONFIG_IDE_TIMINGS=y
+CONFIG_IDE_ATAPI=y
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_IDE_GD=y
+CONFIG_IDE_GD_ATA=y
+# CONFIG_IDE_GD_ATAPI is not set
+CONFIG_BLK_DEV_IDECD=y
+CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_PLATFORM is not set
+CONFIG_BLK_DEV_IDEDMA_SFF=y
+
+#
+# PCI IDE chipsets support
+#
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_PCIBUS_ORDER is not set
+# CONFIG_BLK_DEV_OFFBOARD is not set
+CONFIG_BLK_DEV_GENERIC=y
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_JMICRON is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8172 is not set
+# CONFIG_BLK_DEV_IT8213 is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+CONFIG_BLK_DEV_SIIMAGE=y
+# CONFIG_BLK_DEV_SL82C105 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+CONFIG_BLK_DEV_VIA82CXXX=y
+# CONFIG_BLK_DEV_TC86C001 is not set
+CONFIG_BLK_DEV_IDEDMA=y
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_CONSTANTS=y
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+CONFIG_SCSI_SPI_ATTRS=y
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_LIBFC is not set
+# CONFIG_FCOE is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_PPA is not set
+# CONFIG_SCSI_IMM is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+CONFIG_SCSI_SYM53C8XX_2=y
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+# CONFIG_SCSI_SYM53C8XX_MMIO is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+CONFIG_NET_VENDOR_3COM=y
+CONFIG_VORTEX=y
+# CONFIG_TYPHOON is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+CONFIG_8139CP=y
+CONFIG_8139TOO=y
+CONFIG_8139TOO_PIO=y
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+# CONFIG_R6040 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_SC92031 is not set
+# CONFIG_NET_POCKET is not set
+# CONFIG_ATL2 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_PCSPKR=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+CONFIG_INPUT_UINPUT=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PARKBD is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_XILINX_XPS_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_PRINTER is not set
+# CONFIG_PPDEV is not set
+# CONFIG_HVC_UDBG is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+CONFIG_FIRMWARE_EDID=y
+CONFIG_FB_DDC=y
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+CONFIG_FB_MACMODES=y
+CONFIG_FB_BACKLIGHT=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_OF is not set
+# CONFIG_FB_CT65550 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+CONFIG_FB_RADEON=y
+CONFIG_FB_RADEON_I2C=y
+CONFIG_FB_RADEON_BACKLIGHT=y
+# CONFIG_FB_RADEON_DEBUG is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+CONFIG_FB_3DFX=y
+# CONFIG_FB_3DFX_ACCEL is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=m
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+
+#
+# Display device support
+#
+CONFIG_DISPLAY_SUPPORT=m
+
+#
+# Display hardware drivers
+#
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_TOPSEED=y
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_UHCI_HCD=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+CONFIG_RTC_DRV_CMOS=y
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_PPC is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+# CONFIG_EXT4DEV_COMPAT is not set
+CONFIG_EXT4_FS_XATTR=y
+# CONFIG_EXT4_FS_POSIX_ACL is not set
+# CONFIG_EXT4_FS_SECURITY is not set
+CONFIG_JBD=y
+CONFIG_JBD2=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+# CONFIG_JOLIET is not set
+# CONFIG_ZISOFS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+CONFIG_AFFS_FS=m
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+CONFIG_AMIGA_PARTITION=y
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=m
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_PRINT_STACK_DEPTH=64
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_MSI_BITMAP_SELFTEST is not set
+CONFIG_XMON=y
+CONFIG_XMON_DEFAULT=y
+CONFIG_XMON_DISASSEMBLY=y
+CONFIG_DEBUGGER=y
+CONFIG_IRQSTACKS=y
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD2=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_RNG2=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=m
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index 81afc8b373d7..af0cd55605d0 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29-rc2
-# Mon Jan 26 21:40:44 2009
+# Linux kernel version: 2.6.29-rc3
+# Fri Feb  6 09:48:53 2009
 #
 # CONFIG_PPC64 is not set
 
@@ -388,7 +388,10 @@ CONFIG_MTD=y
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_TESTS is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
 CONFIG_MTD_CMDLINE_PARTS=y
 # CONFIG_MTD_OF_PARTS is not set
 # CONFIG_MTD_AR7_PARTS is not set
@@ -502,7 +505,7 @@ CONFIG_MISC_DEVICES=y
 #
 # EEPROM support
 #
-# CONFIG_EEPROM_AT24 is not set
+CONFIG_EEPROM_AT24=y
 # CONFIG_EEPROM_LEGACY is not set
 # CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
@@ -678,7 +681,7 @@ CONFIG_PHYLIB=y
 # CONFIG_MARVELL_PHY is not set
 # CONFIG_DAVICOM_PHY is not set
 # CONFIG_QSEMI_PHY is not set
-# CONFIG_LXT_PHY is not set
+CONFIG_LXT_PHY=y
 # CONFIG_CICADA_PHY is not set
 # CONFIG_VITESSE_PHY is not set
 # CONFIG_SMSC_PHY is not set
@@ -815,8 +818,6 @@ CONFIG_LEGACY_PTY_COUNT=256
 # CONFIG_IPMI_HANDLER is not set
 # CONFIG_HW_RANDOM is not set
 # CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
 # CONFIG_R3964 is not set
 # CONFIG_APPLICOM is not set
 # CONFIG_RAW_DRIVER is not set
@@ -1281,7 +1282,61 @@ CONFIG_NEW_LEDS=y
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 # CONFIG_EDAC is not set
-# CONFIG_RTC_CLASS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS1307=y
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_PPC is not set
 # CONFIG_DMADEVICES is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 88c6295b76c1..252401824575 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -2067,9 +2067,9 @@ CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_DEBUG_STACK_USAGE=y
 # CONFIG_DEBUG_PAGEALLOC is not set
 # CONFIG_HCALL_STATS is not set
-# CONFIG_CODE_PATCHING_SELFTEST is not set
-# CONFIG_FTR_FIXUP_SELFTEST is not set
-# CONFIG_MSI_BITMAP_SELFTEST is not set
+CONFIG_CODE_PATCHING_SELFTEST=y
+CONFIG_FTR_FIXUP_SELFTEST=y
+CONFIG_MSI_BITMAP_SELFTEST=y
 CONFIG_XMON=y
 # CONFIG_XMON_DEFAULT is not set
 CONFIG_XMON_DISASSEMBLY=y
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h
index 107d9b915e33..37c32aba79b7 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -11,9 +11,7 @@
  */
 
 #include <asm/types.h>
-
-#define PPC_NOP_INSTR           0x60000000
-#define PPC_LWSYNC_INSTR        0x7c2004ac
+#include <asm/ppc-opcode.h>
 
 /* Flags for create_branch:
  * "b"   == create_branch(addr, target, 0);
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 21172badd708..80f315e8a421 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -145,6 +145,7 @@ extern const char *powerpc_base_platform;
 #define CPU_FTR_USE_TB                  ASM_CONST(0x0000000000000040)
 #define CPU_FTR_L2CSR                   ASM_CONST(0x0000000000000080)
 #define CPU_FTR_601                     ASM_CONST(0x0000000000000100)
+#define CPU_FTR_DBELL                   ASM_CONST(0x0000000000000200)
 #define CPU_FTR_CAN_NAP                 ASM_CONST(0x0000000000000400)
 #define CPU_FTR_L3CR                    ASM_CONST(0x0000000000000800)
 #define CPU_FTR_L3_DISABLE_NAP          ASM_CONST(0x0000000000001000)
@@ -375,7 +376,8 @@ extern const char *powerpc_base_platform;
             CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
 #define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
             CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
-            CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE)
+            CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
+            CPU_FTR_DBELL)
 #define CPU_FTRS_GENERIC_32     (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
 
 /* 64-bit CPUs */
diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h
new file mode 100644
index 000000000000..501189a543d1
--- /dev/null
+++ b/arch/powerpc/include/asm/dbell.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2009 Freescale Semicondutor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * provides masks and opcode images for use by code generation, emulation
+ * and for instructions that older assemblers might not know about
+ */
+#ifndef _ASM_POWERPC_DBELL_H
+#define _ASM_POWERPC_DBELL_H
+
+#include <linux/smp.h>
+#include <linux/threads.h>
+
+#include <asm/ppc-opcode.h>
+
+#define PPC_DBELL_MSG_BRDCAST   (0x04000000)
+#define PPC_DBELL_TYPE(x)       (((x) & 0xf) << 28)
+enum ppc_dbell {
+        PPC_DBELL = 0,          /* doorbell */
+        PPC_DBELL_CRIT = 1,     /* critical doorbell */
+        PPC_G_DBELL = 2,        /* guest doorbell */
+        PPC_G_DBELL_CRIT = 3,   /* guest critical doorbell */
+        PPC_G_DBELL_MC = 4,     /* guest mcheck doorbell */
+};
+
+#ifdef CONFIG_SMP
+extern unsigned long dbell_smp_message[NR_CPUS];
+extern void smp_dbell_message_pass(int target, int msg);
+#endif
+
+static inline void ppc_msgsnd(enum ppc_dbell type, u32 flags, u32 tag)
+{
+        u32 msg = PPC_DBELL_TYPE(type) | (flags & PPC_DBELL_MSG_BRDCAST) |
+                        (tag & 0x07ffffff);
+
+        __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
+}
+
+#endif /* _ASM_POWERPC_DBELL_H */
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 86cef7ddc8d5..c69f2b5f0cc4 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -109,18 +109,8 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
          * only ISA DMA device we support is the floppy and we have a hack
          * in the floppy driver directly to get a device for us.
          */
-
-        if (unlikely(dev == NULL) || dev->archdata.dma_ops == NULL) {
-#ifdef CONFIG_PPC64
+        if (unlikely(dev == NULL))
                 return NULL;
-#else
-                /* Use default on 32-bit if dma_ops is not set up */
-                /* TODO: Long term, we should fix drivers so that dev and
-                 * archdata dma_ops are set up for all buses.
-                 */
-                return &dma_direct_ops;
-#endif
-        }
 
         return dev->archdata.dma_ops;
 }
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index b5600ce6055e..1a856b15226e 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -8,6 +8,7 @@
 #endif
 
 #include <linux/types.h>
+
 #include <asm/ptrace.h>
 #include <asm/cputable.h>
 #include <asm/auxvec.h>
@@ -178,7 +179,8 @@ typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
    the loader.  We need to make sure that it is out of the way of the program
    that it will "exec", and that there is sufficient room for the brk.  */
 
-#define ELF_ET_DYN_BASE         (0x20000000)
+extern unsigned long randomize_et_dyn(unsigned long base);
+#define ELF_ET_DYN_BASE         (randomize_et_dyn(0x20000000))
 
 /*
  * Our registers are always unsigned longs, whether we're a 32 bit
@@ -270,6 +272,14 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
                                        int uses_interp);
 #define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
 
+/* 1GB for 64bit, 8MB for 32bit */
+#define STACK_RND_MASK (is_32bit_task() ? \
+        (0x7ff >> (PAGE_SHIFT - 12)) : \
+        (0x3ffff >> (PAGE_SHIFT - 12)))
+
+extern unsigned long arch_randomize_brk(struct mm_struct *mm);
+#define arch_randomize_brk arch_randomize_brk
+
 #endif /* __KERNEL__ */
 
 /*
diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h
index 8428b38a3d30..d60fd18f428c 100644
--- a/arch/powerpc/include/asm/fixmap.h
+++ b/arch/powerpc/include/asm/fixmap.h
@@ -61,7 +61,7 @@ extern void __set_fixmap (enum fixed_addresses idx,
  * Some hardware wants to get fixmapped without caching.
  */
 #define set_fixmap_nocache(idx, phys) \
-                __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
+                __set_fixmap(idx, phys, PAGE_KERNEL_NCG)
 
 #define clear_fixmap(idx) \
                 __set_fixmap(idx, 0, __pgprot(0))
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h
index e5f2ae8362f7..dde1296b8b41 100644
--- a/arch/powerpc/include/asm/ftrace.h
+++ b/arch/powerpc/include/asm/ftrace.h
@@ -5,7 +5,44 @@
 #define MCOUNT_ADDR             ((long)(_mcount))
 #define MCOUNT_INSN_SIZE        4 /* sizeof mcount call */
 
-#ifndef __ASSEMBLY__
+#ifdef __ASSEMBLY__
+
+/* Based off of objdump optput from glibc */
+
+#define MCOUNT_SAVE_FRAME                       \
+        stwu    r1,-48(r1);                     \
+        stw     r3, 12(r1);                     \
+        stw     r4, 16(r1);                     \
+        stw     r5, 20(r1);                     \
+        stw     r6, 24(r1);                     \
+        mflr    r3;                             \
+        lwz     r4, 52(r1);                     \
+        mfcr    r5;                             \
+        stw     r7, 28(r1);                     \
+        stw     r8, 32(r1);                     \
+        stw     r9, 36(r1);                     \
+        stw     r10,40(r1);                     \
+        stw     r3, 44(r1);                     \
+        stw     r5, 8(r1)
+
+#define MCOUNT_RESTORE_FRAME                    \
+        lwz     r6, 8(r1);                      \
+        lwz     r0, 44(r1);                     \
+        lwz     r3, 12(r1);                     \
+        mtctr   r0;                             \
+        lwz     r4, 16(r1);                     \
+        mtcr    r6;                             \
+        lwz     r5, 20(r1);                     \
+        lwz     r6, 24(r1);                     \
+        lwz     r0, 52(r1);                     \
+        lwz     r7, 28(r1);                     \
+        lwz     r8, 32(r1);                     \
+        mtlr    r0;                             \
+        lwz     r9, 36(r1);                     \
+        lwz     r10,40(r1);                     \
+        addi    r1, r1, 48
+
+#else /* !__ASSEMBLY__ */
 extern void _mcount(void);
 
 #ifdef CONFIG_DYNAMIC_FTRACE
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index 04e4a620952e..545028f86488 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -39,15 +39,15 @@ extern pte_t *pkmap_page_table;
  * chunk of RAM.
  */
 /*
- * We use one full pte table with 4K pages. And with 16K/64K pages pte
- * table covers enough memory (32MB and 512MB resp.) that both FIXMAP
- * and PKMAP can be placed in single pte table. We use 1024 pages for
- * PKMAP in case of 16K/64K pages.
+ * We use one full pte table with 4K pages. And with 16K/64K/256K pages pte
+ * table covers enough memory (32MB/512MB/2GB resp.), so that both FIXMAP
+ * and PKMAP can be placed in a single pte table. We use 512 pages for PKMAP
+ * in case of 16K/64K/256K page sizes.
  */
 #ifdef CONFIG_PPC_4K_PAGES
 #define PKMAP_ORDER     PTE_SHIFT
 #else
-#define PKMAP_ORDER     10
+#define PKMAP_ORDER     9
 #endif
 #define LAST_PKMAP      (1 << PKMAP_ORDER)
 #ifndef CONFIG_PPC_4K_PAGES
@@ -99,7 +99,7 @@ static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgpro
 #ifdef CONFIG_DEBUG_HIGHMEM
         BUG_ON(!pte_none(*(kmap_pte-idx)));
 #endif
-        __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot));
+        __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1);
         local_flush_tlb_page(NULL, vaddr);
 
         return (void*) vaddr;
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index f75a5fc64d2e..b7e034b0a6dd 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -129,7 +129,7 @@ static inline int irqs_disabled_flags(unsigned long flags)
  * interrupt-retrigger: should we handle this via lost interrupts and IPIs
  * or should we not care like we do now ? --BenH.
  */
-struct hw_interrupt_type;
+struct irq_chip;
 
 #endif  /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 494cd8b0a278..001f2f11c19b 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -632,6 +632,9 @@ static inline void iosync(void)
  *   ioremap_flags and cannot be hooked (but can be used by a hook on one
  *   of the previous ones)
  *
+ * * __ioremap_caller is the same as above but takes an explicit caller
+ *   reference rather than using __builtin_return_address(0)
+ *
  * * __iounmap, is the low level implementation used by iounmap and cannot
  *   be hooked (but can be used by a hook on iounmap)
  *
@@ -646,6 +649,9 @@ extern void iounmap(volatile void __iomem *addr);
 
 extern void __iomem *__ioremap(phys_addr_t, unsigned long size,
                                unsigned long flags);
+extern void __iomem *__ioremap_caller(phys_addr_t, unsigned long size,
+                                      unsigned long flags, void *caller);
+
 extern void __iounmap(volatile void __iomem *addr);
 
 extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea,
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 25aaa97facd8..68235f7e4a8f 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -97,7 +97,7 @@ struct lppaca {
         u64     saved_gpr4;             // Saved GPR4                   x28-x2F
         u64     saved_gpr5;             // Saved GPR5                   x30-x37
 
-        u8      reserved4;              // Reserved                     x38-x38
+        u8      dtl_enable_mask;        // Dispatch Trace Log mask      x38-x38
         u8      donate_dedicated_cpu;   // Donate dedicated CPU cycles  x39-x39
         u8      fpregs_in_use;          // FP regs in use               x3A-x3A
         u8      pmcregs_in_use;         // PMC regs in use              x3B-x3B
@@ -133,8 +133,10 @@ struct lppaca {
 //=============================================================================
 // CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data
 //=============================================================================
-        u32     page_ins;                       // CMO Hint - # page ins by OS  x00-x04
-        u8      pmc_save_area[252];     // PMC interrupt Area           x04-xFF
+        u32     page_ins;               // CMO Hint - # page ins by OS  x00-x03
+        u8      reserved8[148];         // Reserved                     x04-x97
+        volatile u64 dtl_idx;           // Dispatch Trace Log head idx  x98-x9F
+        u8      reserved9[96];          // Reserved                     xA0-xFF
 } __attribute__((__aligned__(0x400)));
 
 extern struct lppaca lppaca[];
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 2740c44ff717..0efdb1dfdc5f 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -90,7 +90,7 @@ struct machdep_calls {
         void            (*tce_flush)(struct iommu_table *tbl);
 
         void __iomem *  (*ioremap)(phys_addr_t addr, unsigned long size,
-                                   unsigned long flags);
+                                   unsigned long flags, void *caller);
         void            (*iounmap)(volatile void __iomem *token);
 
 #ifdef CONFIG_PM
@@ -327,8 +327,6 @@ extern void __devinit smp_generic_take_timebase(void);
  */
 /* Print a boot progress message. */
 void ppc64_boot_msg(unsigned int src, const char *msg);
-/* Print a termination message (print only -- does not stop the kernel) */
-void ppc64_terminate_msg(unsigned int src, const char *msg);
 
 static inline void log_error(char *buf, unsigned int err_type, int fatal)
 {
diff --git a/arch/powerpc/include/asm/mmu-44x.h b/arch/powerpc/include/asm/mmu-44x.h
index 27cc6fdcd3b7..3c86576bfefa 100644
--- a/arch/powerpc/include/asm/mmu-44x.h
+++ b/arch/powerpc/include/asm/mmu-44x.h
@@ -83,6 +83,8 @@ typedef struct {
 #define PPC44x_TLBE_SIZE        PPC44x_TLB_16K
 #elif (PAGE_SHIFT == 16)
 #define PPC44x_TLBE_SIZE        PPC44x_TLB_64K
+#elif (PAGE_SHIFT == 18)
+#define PPC44x_TLBE_SIZE        PPC44x_TLB_256K
 #else
 #error "Unsupported PAGE_SIZE"
 #endif
diff --git a/arch/powerpc/include/asm/mmu-fsl-booke.h b/arch/powerpc/include/asm/mmu-book3e.h
index 4285b64a65e0..7e74cff81d86 100644
--- a/arch/powerpc/include/asm/mmu-fsl-booke.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -1,26 +1,42 @@
-#ifndef _ASM_POWERPC_MMU_FSL_BOOKE_H_
-#define _ASM_POWERPC_MMU_FSL_BOOKE_H_
+#ifndef _ASM_POWERPC_MMU_BOOK3E_H_
+#define _ASM_POWERPC_MMU_BOOK3E_H_
 /*
- * Freescale Book-E MMU support
+ * Freescale Book-E/Book-3e (ISA 2.06+) MMU support
  */
 
-/* Book-E defined page sizes */
-#define BOOKE_PAGESZ_1K         0
-#define BOOKE_PAGESZ_4K         1
-#define BOOKE_PAGESZ_16K        2
-#define BOOKE_PAGESZ_64K        3
-#define BOOKE_PAGESZ_256K       4
-#define BOOKE_PAGESZ_1M         5
-#define BOOKE_PAGESZ_4M         6
-#define BOOKE_PAGESZ_16M        7
-#define BOOKE_PAGESZ_64M        8
-#define BOOKE_PAGESZ_256M       9
-#define BOOKE_PAGESZ_1GB        10
-#define BOOKE_PAGESZ_4GB        11
-#define BOOKE_PAGESZ_16GB       12
-#define BOOKE_PAGESZ_64GB       13
-#define BOOKE_PAGESZ_256GB      14
-#define BOOKE_PAGESZ_1TB        15
+/* Book-3e defined page sizes */
+#define BOOK3E_PAGESZ_1K        0
+#define BOOK3E_PAGESZ_2K        1
+#define BOOK3E_PAGESZ_4K        2
+#define BOOK3E_PAGESZ_8K        3
+#define BOOK3E_PAGESZ_16K       4
+#define BOOK3E_PAGESZ_32K       5
+#define BOOK3E_PAGESZ_64K       6
+#define BOOK3E_PAGESZ_128K      7
+#define BOOK3E_PAGESZ_256K      8
+#define BOOK3E_PAGESZ_512K      9
+#define BOOK3E_PAGESZ_1M        10
+#define BOOK3E_PAGESZ_2M        11
+#define BOOK3E_PAGESZ_4M        12
+#define BOOK3E_PAGESZ_8M        13
+#define BOOK3E_PAGESZ_16M       14
+#define BOOK3E_PAGESZ_32M       15
+#define BOOK3E_PAGESZ_64M       16
+#define BOOK3E_PAGESZ_128M      17
+#define BOOK3E_PAGESZ_256M      18
+#define BOOK3E_PAGESZ_512M      19
+#define BOOK3E_PAGESZ_1GB       20
+#define BOOK3E_PAGESZ_2GB       21
+#define BOOK3E_PAGESZ_4GB       22
+#define BOOK3E_PAGESZ_8GB       23
+#define BOOK3E_PAGESZ_16GB      24
+#define BOOK3E_PAGESZ_32GB      25
+#define BOOK3E_PAGESZ_64GB      26
+#define BOOK3E_PAGESZ_128GB     27
+#define BOOK3E_PAGESZ_256GB     28
+#define BOOK3E_PAGESZ_512GB     29
+#define BOOK3E_PAGESZ_1TB       30
+#define BOOK3E_PAGESZ_2TB       31
 
 #define MAS0_TLBSEL(x)  ((x << 28) & 0x30000000)
 #define MAS0_ESEL(x)    ((x << 16) & 0x0FFF0000)
@@ -29,8 +45,9 @@
 #define MAS1_VALID      0x80000000
 #define MAS1_IPROT      0x40000000
 #define MAS1_TID(x)     ((x << 16) & 0x3FFF0000)
+#define MAS1_IND        0x00002000
 #define MAS1_TS         0x00001000
-#define MAS1_TSIZE(x)   ((x << 8) & 0x00000F00)
+#define MAS1_TSIZE(x)   ((x << 7) & 0x00000F80)
 
 #define MAS2_EPN        0xFFFFF000
 #define MAS2_X0         0x00000040
@@ -40,7 +57,7 @@
 #define MAS2_M          0x00000004
 #define MAS2_G          0x00000002
 #define MAS2_E          0x00000001
-#define MAS2_EPN_MASK(size)             (~0 << (2*(size) + 10))
+#define MAS2_EPN_MASK(size)             (~0 << (size + 10))
 #define MAS2_VAL(addr, size, flags)     ((addr) & MAS2_EPN_MASK(size) | (flags))
 
 #define MAS3_RPN        0xFFFFF000
@@ -56,7 +73,7 @@
 #define MAS3_SR         0x00000001
 
 #define MAS4_TLBSELD(x) MAS0_TLBSEL(x)
-#define MAS4_TIDDSEL    0x000F0000
+#define MAS4_INDD       0x00008000
 #define MAS4_TSIZED(x)  MAS1_TSIZE(x)
 #define MAS4_X0D        0x00000040
 #define MAS4_X1D        0x00000020
@@ -68,6 +85,7 @@
 
 #define MAS6_SPID0      0x3FFF0000
 #define MAS6_SPID1      0x00007FFE
+#define MAS6_ISIZE(x)   MAS1_TSIZE(x)
 #define MAS6_SAS        0x00000001
 #define MAS6_SPID       MAS6_SPID0
 
@@ -84,4 +102,4 @@ typedef struct {
 } mm_context_t;
 #endif /* !__ASSEMBLY__ */
 
-#endif /* _ASM_POWERPC_MMU_FSL_BOOKE_H_ */
+#endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index 68b752626808..98c104a09961 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -284,8 +284,6 @@ extern void add_gpage(unsigned long addr, unsigned long page_size,
                           unsigned long number_of_pages);
 extern void demote_segment_4k(struct mm_struct *mm, unsigned long addr);
 
-extern void htab_initialize(void);
-extern void htab_initialize_secondary(void);
 extern void hpte_init_native(void);
 extern void hpte_init_lpar(void);
 extern void hpte_init_iSeries(void);
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 6e7639911318..cbf154387091 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -36,9 +36,9 @@
  */
 #define MMU_FTR_USE_TLBIVAX_BCAST       ASM_CONST(0x00040000)
 
-/* Enable use of tlbilx invalidate-by-PID variant.
+/* Enable use of tlbilx invalidate instructions.
  */
-#define MMU_FTR_USE_TLBILX_PID          ASM_CONST(0x00080000)
+#define MMU_FTR_USE_TLBILX              ASM_CONST(0x00080000)
 
 /* This indicates that the processor cannot handle multiple outstanding
  * broadcast tlbivax or tlbsync. This makes the code use a spinlock
@@ -46,6 +46,12 @@
  */
 #define MMU_FTR_LOCK_BCAST_INVAL        ASM_CONST(0x00100000)
 
+/* This indicates that the processor doesn't handle way selection
+ * properly and needs SW to track and update the LRU state.  This
+ * is specific to an errata on e300c2/c3/c4 class parts
+ */
+#define MMU_FTR_NEED_DTLB_SW_LRU        ASM_CONST(0x00200000)
+
 #ifndef __ASSEMBLY__
 #include <asm/cputable.h>
 
@@ -56,6 +62,10 @@ static inline int mmu_has_feature(unsigned long feature)
 
 extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
 
+/* MMU initialization (64-bit only fo now) */
+extern void early_init_mmu(void);
+extern void early_init_mmu_secondary(void);
+
 #endif /* !__ASSEMBLY__ */
 
 
@@ -71,9 +81,9 @@ extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
 #elif defined(CONFIG_44x)
 /* 44x-style software loaded TLB */
 #  include <asm/mmu-44x.h>
-#elif defined(CONFIG_FSL_BOOKE)
-/* Freescale Book-E software loaded TLB */
-#  include <asm/mmu-fsl-booke.h>
+#elif defined(CONFIG_PPC_BOOK3E_MMU)
+/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
+#  include <asm/mmu-book3e.h>
 #elif defined (CONFIG_PPC_8xx)
 /* Motorola/Freescale 8xx software loaded TLB */
 #  include <asm/mmu-8xx.h>
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
index ab4f19263c42..b7063669f972 100644
--- a/arch/powerpc/include/asm/mmu_context.h
+++ b/arch/powerpc/include/asm/mmu_context.h
@@ -31,7 +31,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk)
 {
         /* Mark this context has been used on the new CPU */
-        cpu_set(smp_processor_id(), next->cpu_vm_mask);
+        cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
 
         /* 32-bit keeps track of the current PGDIR in the thread struct */
 #ifdef CONFIG_PPC32
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h
index 81a23932a160..52e049cd9e68 100644
--- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -273,6 +273,7 @@ extern void mpc5200_setup_xlb_arbiter(void);
 extern void mpc52xx_declare_of_platform_devices(void);
 extern void mpc52xx_map_common_devices(void);
 extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv);
+extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node);
 extern void mpc52xx_restart(char *cmd);
 
 /* mpc52xx_pic.c */
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 197d569f5bd3..32cbf16f10ea 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -19,12 +19,14 @@
 #include <asm/kdump.h>
 
 /*
- * On regular PPC32 page size is 4K (but we support 4K/16K/64K pages
+ * On regular PPC32 page size is 4K (but we support 4K/16K/64K/256K pages
  * on PPC44x). For PPC64 we support either 4K or 64K software
  * page size. When using 64K pages however, whether we are really supporting
  * 64K pages in HW or not is irrelevant to those definitions.
  */
-#if defined(CONFIG_PPC_64K_PAGES)
+#if defined(CONFIG_PPC_256K_PAGES)
+#define PAGE_SHIFT              18
+#elif defined(CONFIG_PPC_64K_PAGES)
 #define PAGE_SHIFT              16
 #elif defined(CONFIG_PPC_16K_PAGES)
 #define PAGE_SHIFT              14
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index 1458d9500381..a0e3f6e6b4ee 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -19,7 +19,11 @@
 #define PTE_FLAGS_OFFSET        0
 #endif
 
+#ifdef CONFIG_PPC_256K_PAGES
+#define PTE_SHIFT       (PAGE_SHIFT - PTE_T_LOG2 - 2)   /* 1/4 of a page */
+#else
 #define PTE_SHIFT       (PAGE_SHIFT - PTE_T_LOG2)       /* full page */
+#endif
 
 #ifndef __ASSEMBLY__
 /*
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 820b5f0a35ce..ba45c997830f 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -19,55 +19,6 @@ extern int icache_44x_need_flush;
 #endif /* __ASSEMBLY__ */
 
 /*
- * The PowerPC MMU uses a hash table containing PTEs, together with
- * a set of 16 segment registers (on 32-bit implementations), to define
- * the virtual to physical address mapping.
- *
- * We use the hash table as an extended TLB, i.e. a cache of currently
- * active mappings.  We maintain a two-level page table tree, much
- * like that used by the i386, for the sake of the Linux memory
- * management code.  Low-level assembler code in hashtable.S
- * (procedure hash_page) is responsible for extracting ptes from the
- * tree and putting them into the hash table when necessary, and
- * updating the accessed and modified bits in the page table tree.
- */
-
-/*
- * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk.
- * We also use the two level tables, but we can put the real bits in them
- * needed for the TLB and tablewalk.  These definitions require Mx_CTR.PPM = 0,
- * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1.  The level 2 descriptor has
- * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit
- * based upon user/super access.  The TLB does not have accessed nor write
- * protect.  We assume that if the TLB get loaded with an entry it is
- * accessed, and overload the changed bit for write protect.  We use
- * two bits in the software pte that are supposed to be set to zero in
- * the TLB entry (24 and 25) for these indicators.  Although the level 1
- * descriptor contains the guarded and writethrough/copyback bits, we can
- * set these at the page level since they get copied from the Mx_TWC
- * register when the TLB entry is loaded.  We will use bit 27 for guard, since
- * that is where it exists in the MD_TWC, and bit 26 for writethrough.
- * These will get masked from the level 2 descriptor at TLB load time, and
- * copied to the MD_TWC before it gets loaded.
- * Large page sizes added.  We currently support two sizes, 4K and 8M.
- * This also allows a TLB hander optimization because we can directly
- * load the PMD into MD_TWC.  The 8M pages are only used for kernel
- * mapping of well known areas.  The PMD (PGD) entries contain control
- * flags in addition to the address, so care must be taken that the
- * software no longer assumes these are only pointers.
- */
-
-/*
- * At present, all PowerPC 400-class processors share a similar TLB
- * architecture. The instruction and data sides share a unified,
- * 64-entry, fully-associative TLB which is maintained totally under
- * software control. In addition, the instruction side has a
- * hardware-managed, 4-entry, fully-associative TLB which serves as a
- * first level to the shared TLB. These two TLBs are known as the UTLB
- * and ITLB, respectively (see "mmu.h" for definitions).
- */
-
-/*
  * The normal case is that PTEs are 32-bits and we have a 1-page
  * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages.  -- paulus
  *
@@ -135,409 +86,22 @@ extern int icache_44x_need_flush;
  */
 
 #if defined(CONFIG_40x)
-
-/* There are several potential gotchas here.  The 40x hardware TLBLO
-   field looks like this:
-
-   0  1  2  3  4  ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
-   RPN.....................  0  0 EX WR ZSEL.......  W  I  M  G
-
-   Where possible we make the Linux PTE bits match up with this
-
-   - bits 20 and 21 must be cleared, because we use 4k pages (40x can
-     support down to 1k pages), this is done in the TLBMiss exception
-     handler.
-   - We use only zones 0 (for kernel pages) and 1 (for user pages)
-     of the 16 available.  Bit 24-26 of the TLB are cleared in the TLB
-     miss handler.  Bit 27 is PAGE_USER, thus selecting the correct
-     zone.
-   - PRESENT *must* be in the bottom two bits because swap cache
-     entries use the top 30 bits.  Because 40x doesn't support SMP
-     anyway, M is irrelevant so we borrow it for PAGE_PRESENT.  Bit 30
-     is cleared in the TLB miss handler before the TLB entry is loaded.
-   - All other bits of the PTE are loaded into TLBLO without
-     modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
-     software PTE bits.  We actually use use bits 21, 24, 25, and
-     30 respectively for the software bits: ACCESSED, DIRTY, RW, and
-     PRESENT.
-*/
-
-/* Definitions for 40x embedded chips. */
-#define _PAGE_GUARDED   0x001   /* G: page is guarded from prefetch */
-#define _PAGE_FILE      0x001   /* when !present: nonlinear file mapping */
-#define _PAGE_PRESENT   0x002   /* software: PTE contains a translation */
-#define _PAGE_NO_CACHE  0x004   /* I: caching is inhibited */
-#define _PAGE_WRITETHRU 0x008   /* W: caching is write-through */
-#define _PAGE_USER      0x010   /* matches one of the zone permission bits */
-#define _PAGE_RW        0x040   /* software: Writes permitted */
-#define _PAGE_DIRTY     0x080   /* software: dirty page */
-#define _PAGE_HWWRITE   0x100   /* hardware: Dirty & RW, set in exception */
-#define _PAGE_HWEXEC    0x200   /* hardware: EX permission */
-#define _PAGE_ACCESSED  0x400   /* software: R: page referenced */
-
-#define _PMD_PRESENT    0x400   /* PMD points to page of PTEs */
-#define _PMD_BAD        0x802
-#define _PMD_SIZE       0x0e0   /* size field, != 0 for large-page PMD entry */
-#define _PMD_SIZE_4M    0x0c0
-#define _PMD_SIZE_16M   0x0e0
-#define PMD_PAGE_SIZE(pmdval)   (1024 << (((pmdval) & _PMD_SIZE) >> 4))
-
-/* Until my rework is finished, 40x still needs atomic PTE updates */
-#define PTE_ATOMIC_UPDATES      1
-
+#include <asm/pte-40x.h>
 #elif defined(CONFIG_44x)
-/*
- * Definitions for PPC440
- *
- * Because of the 3 word TLB entries to support 36-bit addressing,
- * the attribute are difficult to map in such a fashion that they
- * are easily loaded during exception processing.  I decided to
- * organize the entry so the ERPN is the only portion in the
- * upper word of the PTE and the attribute bits below are packed
- * in as sensibly as they can be in the area below a 4KB page size
- * oriented RPN.  This at least makes it easy to load the RPN and
- * ERPN fields in the TLB. -Matt
- *
- * Note that these bits preclude future use of a page size
- * less than 4KB.
- *
- *
- * PPC 440 core has following TLB attribute fields;
- *
- *   TLB1:
- *   0  1  2  3  4  ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
- *   RPN.................................  -  -  -  -  -  - ERPN.......
- *
- *   TLB2:
- *   0  1  2  3  4  ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
- *   -  -  -  -  -    - U0 U1 U2 U3 W  I  M  G  E   - UX UW UR SX SW SR
- *
- * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
- * TLB2 storage attibute fields. Those are:
- *
- *   TLB2:
- *   0...10    11   12   13   14   15   16...31
- *   no change WL1  IL1I IL1D IL2I IL2D no change
- *
- * There are some constrains and options, to decide mapping software bits
- * into TLB entry.
- *
- *   - PRESENT *must* be in the bottom three bits because swap cache
- *     entries use the top 29 bits for TLB2.
- *
- *   - FILE *must* be in the bottom three bits because swap cache
- *     entries use the top 29 bits for TLB2.
- *
- *   - CACHE COHERENT bit (M) has no effect on original PPC440 cores,
- *     because it doesn't support SMP. However, some later 460 variants
- *     have -some- form of SMP support and so I keep the bit there for
- *     future use
- *
- * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
- * for memory protection related functions (see PTE structure in
- * include/asm-ppc/mmu.h).  The _PAGE_XXX definitions in this file map to the
- * above bits.  Note that the bit values are CPU specific, not architecture
- * specific.
- *
- * The kernel PTE entry holds an arch-dependent swp_entry structure under
- * certain situations. In other words, in such situations some portion of
- * the PTE bits are used as a swp_entry. In the PPC implementation, the
- * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still
- * hold protection values. That means the three protection bits are
- * reserved for both PTE and SWAP entry at the most significant three
- * LSBs.
- *
- * There are three protection bits available for SWAP entry:
- *      _PAGE_PRESENT
- *      _PAGE_FILE
- *      _PAGE_HASHPTE (if HW has)
- *
- * So those three bits have to be inside of 0-2nd LSB of PTE.
- *
- */
-
-#define _PAGE_PRESENT   0x00000001              /* S: PTE valid */
-#define _PAGE_RW        0x00000002              /* S: Write permission */
-#define _PAGE_FILE      0x00000004              /* S: nonlinear file mapping */
-#define _PAGE_HWEXEC    0x00000004              /* H: Execute permission */
-#define _PAGE_ACCESSED  0x00000008              /* S: Page referenced */
-#define _PAGE_DIRTY     0x00000010              /* S: Page dirty */
-#define _PAGE_SPECIAL   0x00000020              /* S: Special page */
-#define _PAGE_USER      0x00000040              /* S: User page */
-#define _PAGE_ENDIAN    0x00000080              /* H: E bit */
-#define _PAGE_GUARDED   0x00000100              /* H: G bit */
-#define _PAGE_COHERENT  0x00000200              /* H: M bit */
-#define _PAGE_NO_CACHE  0x00000400              /* H: I bit */
-#define _PAGE_WRITETHRU 0x00000800              /* H: W bit */
-
-/* TODO: Add large page lowmem mapping support */
-#define _PMD_PRESENT    0
-#define _PMD_PRESENT_MASK (PAGE_MASK)
-#define _PMD_BAD        (~PAGE_MASK)
-
-/* ERPN in a PTE never gets cleared, ignore it */
-#define _PTE_NONE_MASK  0xffffffff00000000ULL
-
-#define __HAVE_ARCH_PTE_SPECIAL
-
+#include <asm/pte-44x.h>
 #elif defined(CONFIG_FSL_BOOKE)
-/*
-   MMU Assist Register 3:
-
-   32 33 34 35 36  ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
-   RPN......................  0  0 U0 U1 U2 U3 UX SX UW SW UR SR
-
-   - PRESENT *must* be in the bottom three bits because swap cache
-     entries use the top 29 bits.
-
-   - FILE *must* be in the bottom three bits because swap cache
-     entries use the top 29 bits.
-*/
-
-/* Definitions for FSL Book-E Cores */
-#define _PAGE_PRESENT   0x00001 /* S: PTE contains a translation */
-#define _PAGE_USER      0x00002 /* S: User page (maps to UR) */
-#define _PAGE_FILE      0x00002 /* S: when !present: nonlinear file mapping */
-#define _PAGE_RW        0x00004 /* S: Write permission (SW) */
-#define _PAGE_DIRTY     0x00008 /* S: Page dirty */
-#define _PAGE_HWEXEC    0x00010 /* H: SX permission */
-#define _PAGE_ACCESSED  0x00020 /* S: Page referenced */
-
-#define _PAGE_ENDIAN    0x00040 /* H: E bit */
-#define _PAGE_GUARDED   0x00080 /* H: G bit */
-#define _PAGE_COHERENT  0x00100 /* H: M bit */
-#define _PAGE_NO_CACHE  0x00200 /* H: I bit */
-#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
-#define _PAGE_SPECIAL   0x00800 /* S: Special page */
-
-#ifdef CONFIG_PTE_64BIT
-/* ERPN in a PTE never gets cleared, ignore it */
-#define _PTE_NONE_MASK  0xffffffffffff0000ULL
-#endif
-
-#define _PMD_PRESENT    0
-#define _PMD_PRESENT_MASK (PAGE_MASK)
-#define _PMD_BAD        (~PAGE_MASK)
-
-#define __HAVE_ARCH_PTE_SPECIAL
-
+#include <asm/pte-fsl-booke.h>
 #elif defined(CONFIG_8xx)
-/* Definitions for 8xx embedded chips. */
-#define _PAGE_PRESENT   0x0001  /* Page is valid */
-#define _PAGE_FILE      0x0002  /* when !present: nonlinear file mapping */
-#define _PAGE_NO_CACHE  0x0002  /* I: cache inhibit */
-#define _PAGE_SHARED    0x0004  /* No ASID (context) compare */
-
-/* These five software bits must be masked out when the entry is loaded
- * into the TLB.
- */
-#define _PAGE_EXEC      0x0008  /* software: i-cache coherency required */
-#define _PAGE_GUARDED   0x0010  /* software: guarded access */
-#define _PAGE_DIRTY     0x0020  /* software: page changed */
-#define _PAGE_RW        0x0040  /* software: user write access allowed */
-#define _PAGE_ACCESSED  0x0080  /* software: page referenced */
-
-/* Setting any bits in the nibble with the follow two controls will
- * require a TLB exception handler change.  It is assumed unused bits
- * are always zero.
- */
-#define _PAGE_HWWRITE   0x0100  /* h/w write enable: never set in Linux PTE */
-#define _PAGE_USER      0x0800  /* One of the PP bits, the other is USER&~RW */
-
-#define _PMD_PRESENT    0x0001
-#define _PMD_BAD        0x0ff0
-#define _PMD_PAGE_MASK  0x000c
-#define _PMD_PAGE_8M    0x000c
-
-#define _PTE_NONE_MASK _PAGE_ACCESSED
-
-/* Until my rework is finished, 8xx still needs atomic PTE updates */
-#define PTE_ATOMIC_UPDATES      1
-
+#include <asm/pte-8xx.h>
 #else /* CONFIG_6xx */
-/* Definitions for 60x, 740/750, etc. */
-#define _PAGE_PRESENT   0x001   /* software: pte contains a translation */
-#define _PAGE_HASHPTE   0x002   /* hash_page has made an HPTE for this pte */
-#define _PAGE_FILE      0x004   /* when !present: nonlinear file mapping */
-#define _PAGE_USER      0x004   /* usermode access allowed */
-#define _PAGE_GUARDED   0x008   /* G: prohibit speculative access */
-#define _PAGE_COHERENT  0x010   /* M: enforce memory coherence (SMP systems) */
-#define _PAGE_NO_CACHE  0x020   /* I: cache inhibit */
-#define _PAGE_WRITETHRU 0x040   /* W: cache write-through */
-#define _PAGE_DIRTY     0x080   /* C: page changed */
-#define _PAGE_ACCESSED  0x100   /* R: page referenced */
-#define _PAGE_EXEC      0x200   /* software: i-cache coherency required */
-#define _PAGE_RW        0x400   /* software: user write access allowed */
-#define _PAGE_SPECIAL   0x800   /* software: Special page */
-
-#ifdef CONFIG_PTE_64BIT
-/* We never clear the high word of the pte */
-#define _PTE_NONE_MASK  (0xffffffff00000000ULL | _PAGE_HASHPTE)
-#else
-#define _PTE_NONE_MASK  _PAGE_HASHPTE
+#include <asm/pte-hash32.h>
 #endif
 
-#define _PMD_PRESENT    0
-#define _PMD_PRESENT_MASK (PAGE_MASK)
-#define _PMD_BAD        (~PAGE_MASK)
-
-/* Hash table based platforms need atomic updates of the linux PTE */
-#define PTE_ATOMIC_UPDATES      1
-
-#define __HAVE_ARCH_PTE_SPECIAL
-
-#endif
-
-/*
- * Some bits are only used on some cpu families...
- */
-#ifndef _PAGE_HASHPTE
-#define _PAGE_HASHPTE   0
-#endif
-#ifndef _PTE_NONE_MASK
-#define _PTE_NONE_MASK 0
-#endif
-#ifndef _PAGE_SHARED
-#define _PAGE_SHARED    0
-#endif
-#ifndef _PAGE_HWWRITE
-#define _PAGE_HWWRITE   0
-#endif
-#ifndef _PAGE_HWEXEC
-#define _PAGE_HWEXEC    0
-#endif
-#ifndef _PAGE_EXEC
-#define _PAGE_EXEC      0
-#endif
-#ifndef _PAGE_ENDIAN
-#define _PAGE_ENDIAN    0
-#endif
-#ifndef _PAGE_COHERENT
-#define _PAGE_COHERENT  0
-#endif
-#ifndef _PAGE_WRITETHRU
-#define _PAGE_WRITETHRU 0
-#endif
-#ifndef _PAGE_SPECIAL
-#define _PAGE_SPECIAL   0
-#endif
-#ifndef _PMD_PRESENT_MASK
-#define _PMD_PRESENT_MASK       _PMD_PRESENT
-#endif
-#ifndef _PMD_SIZE
-#define _PMD_SIZE       0
-#define PMD_PAGE_SIZE(pmd)      bad_call_to_PMD_PAGE_SIZE()
-#endif
-
-#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \
-                         _PAGE_SPECIAL)
-
-
-#define PAGE_PROT_BITS  (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
-                         _PAGE_WRITETHRU | _PAGE_ENDIAN | \
-                         _PAGE_USER | _PAGE_ACCESSED | \
-                         _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
-                         _PAGE_EXEC | _PAGE_HWEXEC)
-
-/*
- * We define 2 sets of base prot bits, one for basic pages (ie,
- * cacheable kernel and user pages) and one for non cacheable
- * pages. We always set _PAGE_COHERENT when SMP is enabled or
- * the processor might need it for DMA coherency.
- */
-#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
-#define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
-#else
-#define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED)
-#endif
-#define _PAGE_BASE_NC   (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_NO_CACHE)
-
-#define _PAGE_WRENABLE  (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE)
-#define _PAGE_KERNEL    (_PAGE_BASE | _PAGE_SHARED | _PAGE_WRENABLE)
-#define _PAGE_KERNEL_NC (_PAGE_BASE_NC | _PAGE_SHARED | _PAGE_WRENABLE)
-
-#ifdef CONFIG_PPC_STD_MMU
-/* On standard PPC MMU, no user access implies kernel read/write access,
- * so to write-protect kernel memory we must turn on user access */
-#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED | _PAGE_USER)
-#else
-#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED)
-#endif
-
-#define _PAGE_IO        (_PAGE_KERNEL_NC | _PAGE_GUARDED)
-#define _PAGE_RAM       (_PAGE_KERNEL | _PAGE_HWEXEC)
-
-#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
-        defined(CONFIG_KPROBES)
-/* We want the debuggers to be able to set breakpoints anywhere, so
- * don't write protect the kernel text */
-#define _PAGE_RAM_TEXT  _PAGE_RAM
-#else
-#define _PAGE_RAM_TEXT  (_PAGE_KERNEL_RO | _PAGE_HWEXEC)
-#endif
-
-#define PAGE_NONE       __pgprot(_PAGE_BASE)
-#define PAGE_READONLY   __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
-#define PAGE_SHARED_X   __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
-#define PAGE_COPY       __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-
-#define PAGE_KERNEL             __pgprot(_PAGE_RAM)
-#define PAGE_KERNEL_NOCACHE     __pgprot(_PAGE_IO)
-
-/*
- * The PowerPC can only do execute protection on a segment (256MB) basis,
- * not on a page basis.  So we consider execute permission the same as read.
- * Also, write permissions imply read permissions.
- * This is the closest we can get..
- */
-#define __P000  PAGE_NONE
-#define __P001  PAGE_READONLY_X
-#define __P010  PAGE_COPY
-#define __P011  PAGE_COPY_X
-#define __P100  PAGE_READONLY
-#define __P101  PAGE_READONLY_X
-#define __P110  PAGE_COPY
-#define __P111  PAGE_COPY_X
-
-#define __S000  PAGE_NONE
-#define __S001  PAGE_READONLY_X
-#define __S010  PAGE_SHARED
-#define __S011  PAGE_SHARED_X
-#define __S100  PAGE_READONLY
-#define __S101  PAGE_READONLY_X
-#define __S110  PAGE_SHARED
-#define __S111  PAGE_SHARED_X
+/* And here we include common definitions */
+#include <asm/pte-common.h>
 
 #ifndef __ASSEMBLY__
-/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
- * kernel without large page PMD support */
-extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
-
-/*
- * Conversions between PTE values and page frame numbers.
- */
-
-/* in some case we want to additionaly adjust where the pfn is in the pte to
- * allow room for more flags */
-#if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)
-#define PFN_SHIFT_OFFSET        (PAGE_SHIFT + 8)
-#else
-#define PFN_SHIFT_OFFSET        (PAGE_SHIFT)
-#endif
 
-#define pte_pfn(x)              (pte_val(x) >> PFN_SHIFT_OFFSET)
-#define pte_page(x)             pfn_to_page(pte_pfn(x))
-
-#define pfn_pte(pfn, prot)      __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\
-                                        pgprot_val(prot))
-#define mk_pte(page, prot)      pfn_pte(page_to_pfn(page), prot)
-#endif /* __ASSEMBLY__ */
-
-#define pte_none(pte)           ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
-#define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
 #define pte_clear(mm, addr, ptep) \
         do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)
 
@@ -546,43 +110,6 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
 #define pmd_present(pmd)        (pmd_val(pmd) & _PMD_PRESENT_MASK)
 #define pmd_clear(pmdp)         do { pmd_val(*(pmdp)) = 0; } while (0)
 
-#ifndef __ASSEMBLY__
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-static inline int pte_write(pte_t pte)          { return pte_val(pte) & _PAGE_RW; }
-static inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_DIRTY; }
-static inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
-static inline int pte_file(pte_t pte)           { return pte_val(pte) & _PAGE_FILE; }
-static inline int pte_special(pte_t pte)        { return pte_val(pte) & _PAGE_SPECIAL; }
-
-static inline pte_t pte_wrprotect(pte_t pte) {
-        pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
-static inline pte_t pte_mkclean(pte_t pte) {
-        pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
-static inline pte_t pte_mkold(pte_t pte) {
-        pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
-
-static inline pte_t pte_mkwrite(pte_t pte) {
-        pte_val(pte) |= _PAGE_RW; return pte; }
-static inline pte_t pte_mkdirty(pte_t pte) {
-        pte_val(pte) |= _PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkyoung(pte_t pte) {
-        pte_val(pte) |= _PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkspecial(pte_t pte) {
-        pte_val(pte) |= _PAGE_SPECIAL; return pte; }
-static inline pgprot_t pte_pgprot(pte_t pte)
-{
-        return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
-}
-
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{
-        pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
-        return pte;
-}
-
 /*
  * When flushing the tlb entry for a page, we also need to flush the hash
  * table entry.  flush_hash_pages is assembler (for speed) in hashtable.S.
@@ -599,11 +126,19 @@ extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
                              unsigned long address);
 
 /*
- * Atomic PTE updates.
+ * PTE updates. This function is called whenever an existing
+ * valid PTE is updated. This does -not- include set_pte_at()
+ * which nowadays only sets a new PTE.
  *
- * pte_update clears and sets bit atomically, and returns
- * the old pte value.  In the 64-bit PTE case we lock around the
- * low PTE word since we expect ALL flag bits to be there
+ * Depending on the type of MMU, we may need to use atomic updates
+ * and the PTE may be either 32 or 64 bit wide. In the later case,
+ * when using atomic updates, only the low part of the PTE is
+ * accessed atomically.
+ *
+ * In addition, on 44x, we also maintain a global flag indicating
+ * that an executable user mapping was modified, which is needed
+ * to properly flush the virtually tagged instruction cache of
+ * those implementations.
  */
 #ifndef CONFIG_PTE_64BIT
 static inline unsigned long pte_update(pte_t *p,
@@ -668,44 +203,6 @@ static inline unsigned long long pte_update(pte_t *p,
 #endif /* CONFIG_PTE_64BIT */
 
 /*
- * set_pte stores a linux PTE into the linux page table.
- * On machines which use an MMU hash table we avoid changing the
- * _PAGE_HASHPTE bit.
- */
-
-static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
-                              pte_t *ptep, pte_t pte)
-{
-#if (_PAGE_HASHPTE != 0) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
-        pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE);
-#elif defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
-#if _PAGE_HASHPTE != 0
-        if (pte_val(*ptep) & _PAGE_HASHPTE)
-                flush_hash_entry(mm, ptep, addr);
-#endif
-        __asm__ __volatile__("\
-                stw%U0%X0 %2,%0\n\
-                eieio\n\
-                stw%U0%X0 %L2,%1"
-        : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
-        : "r" (pte) : "memory");
-#else
-        *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
-                      | (pte_val(pte) & ~_PAGE_HASHPTE));
-#endif
-}
-
-
-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
-                              pte_t *ptep, pte_t pte)
-{
-#if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP) && defined(CONFIG_DEBUG_VM)
-        WARN_ON(pte_present(*ptep));
-#endif
-        __set_pte_at(mm, addr, ptep, pte);
-}
-
-/*
  * 2.6 calls this without flushing the TLB entry; this is wrong
  * for our hash-based implementation, we fix that up here.
  */
@@ -745,24 +242,14 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
 }
 
 
-#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
-static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
+static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
 {
         unsigned long bits = pte_val(entry) &
-                (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW);
+                (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW |
+                 _PAGE_HWEXEC | _PAGE_EXEC);
         pte_update(ptep, 0, bits);
 }
 
-#define  ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
-({                                                                         \
-        int __changed = !pte_same(*(__ptep), __entry);                     \
-        if (__changed) {                                                   \
-                __ptep_set_access_flags(__ptep, __entry, __dirty);         \
-                flush_tlb_page_nohash(__vma, __address);                   \
-        }                                                                  \
-        __changed;                                                         \
-})
-
 #define __HAVE_ARCH_PTE_SAME
 #define pte_same(A,B)   (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
 
diff --git a/arch/powerpc/include/asm/pgtable-4k.h b/arch/powerpc/include/asm/pgtable-ppc64-4k.h
index 1dbca4e7de67..6eefdcffa359 100644
--- a/arch/powerpc/include/asm/pgtable-4k.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64-4k.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_POWERPC_PGTABLE_4K_H
-#define _ASM_POWERPC_PGTABLE_4K_H
+#ifndef _ASM_POWERPC_PGTABLE_PPC64_4K_H
+#define _ASM_POWERPC_PGTABLE_PPC64_4K_H
 /*
  * Entries per page directory level.  The PTE level must use a 64b record
  * for each page table entry.  The PMD and PGD level use a 32b record for
@@ -40,28 +40,6 @@
 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
 
-/* PTE bits */
-#define _PAGE_HASHPTE   0x0400 /* software: pte has an associated HPTE */
-#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
-#define _PAGE_GROUP_IX  0x7000 /* software: HPTE index within group */
-#define _PAGE_F_SECOND  _PAGE_SECONDARY
-#define _PAGE_F_GIX     _PAGE_GROUP_IX
-#define _PAGE_SPECIAL   0x10000 /* software: special page */
-#define __HAVE_ARCH_PTE_SPECIAL
-
-/* PTE flags to conserve for HPTE identification */
-#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \
-                         _PAGE_SECONDARY | _PAGE_GROUP_IX)
-
-/* There is no 4K PFN hack on 4K pages */
-#define _PAGE_4K_PFN    0
-
-/* PAGE_MASK gives the right answer below, but only by accident */
-/* It should be preserving the high 48 bits and then specifically */
-/* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */
-#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \
-                         _PAGE_HPTEFLAGS | _PAGE_SPECIAL)
-
 /* Bits to mask out from a PMD to get to the PTE page */
 #define PMD_MASKED_BITS         0
 /* Bits to mask out from a PUD to get to the PMD page */
@@ -69,30 +47,6 @@
 /* Bits to mask out from a PGD to get to the PUD page */
 #define PGD_MASKED_BITS         0
 
-/* shift to put page number into pte */
-#define PTE_RPN_SHIFT   (17)
-
-#ifdef STRICT_MM_TYPECHECKS
-#define __real_pte(e,p)         ((real_pte_t){(e)})
-#define __rpte_to_pte(r)        ((r).pte)
-#else
-#define __real_pte(e,p)         (e)
-#define __rpte_to_pte(r)        (__pte(r))
-#endif
-#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
-
-#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift)       \
-        do {                                                             \
-                index = 0;                                               \
-                shift = mmu_psize_defs[psize].shift;                     \
-
-#define pte_iterate_hashed_end() } while(0)
-
-#ifdef CONFIG_PPC_HAS_HASH_64K
-#define pte_pagesize_index(mm, addr, pte)       get_slice_psize(mm, addr)
-#else
-#define pte_pagesize_index(mm, addr, pte)       MMU_PAGE_4K
-#endif
 
 /*
  * 4-level page tables related bits
@@ -112,6 +66,9 @@
 #define pud_ERROR(e) \
         printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
 
+/*
+ * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() */
 #define remap_4k_pfn(vma, addr, pfn, prot)      \
         remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
-#endif /* _ASM_POWERPC_PGTABLE_4K_H */
+
+#endif /* _ASM_POWERPC_PGTABLE_PPC64_4K_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc64-64k.h b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
new file mode 100644
index 000000000000..6cc085b945a5
--- /dev/null
+++ b/arch/powerpc/include/asm/pgtable-ppc64-64k.h
@@ -0,0 +1,42 @@
+#ifndef _ASM_POWERPC_PGTABLE_PPC64_64K_H
+#define _ASM_POWERPC_PGTABLE_PPC64_64K_H
+
+#include <asm-generic/pgtable-nopud.h>
+
+
+#define PTE_INDEX_SIZE  12
+#define PMD_INDEX_SIZE  12
+#define PUD_INDEX_SIZE  0
+#define PGD_INDEX_SIZE  4
+
+#ifndef __ASSEMBLY__
+
+#define PTE_TABLE_SIZE  (sizeof(real_pte_t) << PTE_INDEX_SIZE)
+#define PMD_TABLE_SIZE  (sizeof(pmd_t) << PMD_INDEX_SIZE)
+#define PGD_TABLE_SIZE  (sizeof(pgd_t) << PGD_INDEX_SIZE)
+
+#define PTRS_PER_PTE    (1 << PTE_INDEX_SIZE)
+#define PTRS_PER_PMD    (1 << PMD_INDEX_SIZE)
+#define PTRS_PER_PGD    (1 << PGD_INDEX_SIZE)
+
+/* With 4k base page size, hugepage PTEs go at the PMD level */
+#define MIN_HUGEPTE_SHIFT       PAGE_SHIFT
+
+/* PMD_SHIFT determines what a second-level page table entry can map */
+#define PMD_SHIFT       (PAGE_SHIFT + PTE_INDEX_SIZE)
+#define PMD_SIZE        (1UL << PMD_SHIFT)
+#define PMD_MASK        (~(PMD_SIZE-1))
+
+/* PGDIR_SHIFT determines what a third-level page table entry can map */
+#define PGDIR_SHIFT     (PMD_SHIFT + PMD_INDEX_SIZE)
+#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK      (~(PGDIR_SIZE-1))
+
+#endif  /* __ASSEMBLY__ */
+
+/* Bits to mask out from a PMD to get to the PTE page */
+#define PMD_MASKED_BITS         0x1ff
+/* Bits to mask out from a PGD/PUD to get to the PMD page */
+#define PUD_MASKED_BITS         0x1ff
+
+#endif /* _ASM_POWERPC_PGTABLE_PPC64_64K_H */
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index b0f18be81d9f..c40db05f21e0 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -11,9 +11,9 @@
 #endif /* __ASSEMBLY__ */
 
 #ifdef CONFIG_PPC_64K_PAGES
-#include <asm/pgtable-64k.h>
+#include <asm/pgtable-ppc64-64k.h>
 #else
-#include <asm/pgtable-4k.h>
+#include <asm/pgtable-ppc64-4k.h>
 #endif
 
 #define FIRST_USER_ADDRESS      0
@@ -25,6 +25,8 @@
                             PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
 
+
+/* Some sanity checking */
 #if TASK_SIZE_USER64 > PGTABLE_RANGE
 #error TASK_SIZE_USER64 exceeds pagetable range
 #endif
@@ -33,7 +35,6 @@
 #error TASK_SIZE_USER64 exceeds user VSID range
 #endif
 
-
 /*
  * Define the address range of the vmalloc VM area.
  */
@@ -76,83 +77,12 @@
 
 
 /*
- * Common bits in a linux-style PTE.  These match the bits in the
- * (hardware-defined) PowerPC PTE as closely as possible. Additional
- * bits may be defined in pgtable-*.h
+ * Include the PTE bits definitions
  */
-#define _PAGE_PRESENT   0x0001 /* software: pte contains a translation */
-#define _PAGE_USER      0x0002 /* matches one of the PP bits */
-#define _PAGE_FILE      0x0002 /* (!present only) software: pte holds file offset */
-#define _PAGE_EXEC      0x0004 /* No execute on POWER4 and newer (we invert) */
-#define _PAGE_GUARDED   0x0008
-#define _PAGE_COHERENT  0x0010 /* M: enforce memory coherence (SMP systems) */
-#define _PAGE_NO_CACHE  0x0020 /* I: cache inhibit */
-#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
-#define _PAGE_DIRTY     0x0080 /* C: page changed */
-#define _PAGE_ACCESSED  0x0100 /* R: page referenced */
-#define _PAGE_RW        0x0200 /* software: user write access allowed */
-#define _PAGE_BUSY      0x0800 /* software: PTE & hash are busy */
-
-/* Strong Access Ordering */
-#define _PAGE_SAO       (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
-
-#define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
-
-#define _PAGE_WRENABLE  (_PAGE_RW | _PAGE_DIRTY)
-
-/* __pgprot defined in arch/powerpc/include/asm/page.h */
-#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
-
-#define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
-#define PAGE_SHARED_X   __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_COPY       __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_READONLY   __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_KERNEL     __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
-#define PAGE_KERNEL_CI  __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
-                               _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
-#define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
-
-#define PAGE_AGP        __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
-#define HAVE_PAGE_AGP
-
-#define PAGE_PROT_BITS  (_PAGE_GUARDED | _PAGE_COHERENT | \
-                         _PAGE_NO_CACHE | _PAGE_WRITETHRU |             \
-                         _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER |         \
-                         _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
-/* PTEIDX nibble */
-#define _PTEIDX_SECONDARY       0x8
-#define _PTEIDX_GROUP_IX        0x7
+#include <asm/pte-hash64.h>
+#include <asm/pte-common.h>
 
 
-/*
- * POWER4 and newer have per page execute protection, older chips can only
- * do this on a segment (256MB) basis.
- *
- * Also, write permissions imply read permissions.
- * This is the closest we can get..
- *
- * Note due to the way vm flags are laid out, the bits are XWR
- */
-#define __P000  PAGE_NONE
-#define __P001  PAGE_READONLY
-#define __P010  PAGE_COPY
-#define __P011  PAGE_COPY
-#define __P100  PAGE_READONLY_X
-#define __P101  PAGE_READONLY_X
-#define __P110  PAGE_COPY_X
-#define __P111  PAGE_COPY_X
-
-#define __S000  PAGE_NONE
-#define __S001  PAGE_READONLY
-#define __S010  PAGE_SHARED
-#define __S011  PAGE_SHARED
-#define __S100  PAGE_READONLY_X
-#define __S101  PAGE_READONLY_X
-#define __S110  PAGE_SHARED_X
-#define __S111  PAGE_SHARED_X
-
 #ifdef CONFIG_PPC_MM_SLICES
 #define HAVE_ARCH_UNMAPPED_AREA
 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
@@ -161,32 +91,38 @@
 #ifndef __ASSEMBLY__
 
 /*
- * Conversion functions: convert a page and protection to a page entry,
- * and a page entry and page directory to the page they refer to.
- *
- * mk_pte takes a (struct page *) as input
+ * This is the default implementation of various PTE accessors, it's
+ * used in all cases except Book3S with 64K pages where we have a
+ * concept of sub-pages
  */
-#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
+#ifndef __real_pte
 
-static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
-{
-        pte_t pte;
+#ifdef STRICT_MM_TYPECHECKS
+#define __real_pte(e,p)         ((real_pte_t){(e)})
+#define __rpte_to_pte(r)        ((r).pte)
+#else
+#define __real_pte(e,p)         (e)
+#define __rpte_to_pte(r)        (__pte(r))
+#endif
+#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
 
+#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift)       \
+        do {                                                             \
+                index = 0;                                               \
+                shift = mmu_psize_defs[psize].shift;                     \
 
-        pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot);
-        return pte;
-}
+#define pte_iterate_hashed_end() } while(0)
 
-#define pte_modify(_pte, newprot) \
-  (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
+#ifdef CONFIG_PPC_HAS_HASH_64K
+#define pte_pagesize_index(mm, addr, pte)       get_slice_psize(mm, addr)
+#else
+#define pte_pagesize_index(mm, addr, pte)       MMU_PAGE_4K
+#endif
 
-#define pte_none(pte)           ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
-#define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
+#endif /* __real_pte */
 
-/* pte_clear moved to later in this file */
 
-#define pte_pfn(x)              ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
-#define pte_page(x)             pfn_to_page(pte_pfn(x))
+/* pte_clear moved to later in this file */
 
 #define PMD_BAD_BITS            (PTE_TABLE_SIZE-1)
 #define PUD_BAD_BITS            (PMD_TABLE_SIZE-1)
@@ -235,36 +171,6 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
 /* This now only contains the vmalloc pages */
 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
-static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
-static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
-static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
-static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
-
-static inline pte_t pte_wrprotect(pte_t pte) {
-        pte_val(pte) &= ~(_PAGE_RW); return pte; }
-static inline pte_t pte_mkclean(pte_t pte) {
-        pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
-static inline pte_t pte_mkold(pte_t pte) {
-        pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkwrite(pte_t pte) {
-        pte_val(pte) |= _PAGE_RW; return pte; }
-static inline pte_t pte_mkdirty(pte_t pte) {
-        pte_val(pte) |= _PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkyoung(pte_t pte) {
-        pte_val(pte) |= _PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkhuge(pte_t pte) {
-        return pte; }
-static inline pte_t pte_mkspecial(pte_t pte) {
-        pte_val(pte) |= _PAGE_SPECIAL; return pte; }
-static inline pgprot_t pte_pgprot(pte_t pte)
-{
-        return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
-}
 
 /* Atomic PTE updates */
 static inline unsigned long pte_update(struct mm_struct *mm,
@@ -272,6 +178,7 @@ static inline unsigned long pte_update(struct mm_struct *mm,
                                        pte_t *ptep, unsigned long clr,
                                        int huge)
 {
+#ifdef PTE_ATOMIC_UPDATES
         unsigned long old, tmp;
 
         __asm__ __volatile__(
@@ -284,6 +191,13 @@ static inline unsigned long pte_update(struct mm_struct *mm,
         : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
         : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
         : "cc" );
+#else
+        unsigned long old = pte_val(*ptep);
+        *ptep = __pte(old & ~clr);
+#endif
+        /* huge pages use the old page table lock */
+        if (!huge)
+                assert_pte_locked(mm, addr);
 
         if (old & _PAGE_HASHPTE)
                 hpte_need_flush(mm, addr, ptep, old, huge);
@@ -359,26 +273,17 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
         pte_update(mm, addr, ptep, ~0UL, 0);
 }
 
-/*
- * set_pte stores a linux PTE into the linux page table.
- */
-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
-                              pte_t *ptep, pte_t pte)
-{
-        if (pte_present(*ptep))
-                pte_clear(mm, addr, ptep);
-        pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
-        *ptep = pte;
-}
 
 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
  * function doesn't need to flush the hash entry
  */
-#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
-static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
+static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
 {
         unsigned long bits = pte_val(entry) &
-                (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
+                (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW |
+                 _PAGE_EXEC | _PAGE_HWEXEC);
+
+#ifdef PTE_ATOMIC_UPDATES
         unsigned long old, tmp;
 
         __asm__ __volatile__(
@@ -391,16 +296,11 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
         :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
         :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
         :"cc");
+#else
+        unsigned long old = pte_val(*ptep);
+        *ptep = __pte(old | bits);
+#endif
 }
-#define  ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
-({                                                                         \
-        int __changed = !pte_same(*(__ptep), __entry);                     \
-        if (__changed) {                                                   \
-                __ptep_set_access_flags(__ptep, __entry, __dirty);         \
-                flush_tlb_page_nohash(__vma, __address);                   \
-        }                                                                  \
-        __changed;                                                         \
-})
 
 #define __HAVE_ARCH_PTE_SAME
 #define pte_same(A,B)   (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 07f55e601696..eb17da781128 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -6,7 +6,17 @@
 #include <asm/processor.h>              /* For TASK_SIZE */
 #include <asm/mmu.h>
 #include <asm/page.h>
+
 struct mm_struct;
+
+#ifdef CONFIG_DEBUG_VM
+extern void assert_pte_locked(struct mm_struct *mm, unsigned long addr);
+#else /* CONFIG_DEBUG_VM */
+static inline void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
+{
+}
+#endif /* !CONFIG_DEBUG_VM */
+
 #endif /* !__ASSEMBLY__ */
 
 #if defined(CONFIG_PPC64)
@@ -17,6 +27,130 @@ struct mm_struct;
 
 #ifndef __ASSEMBLY__
 
+/* Generic accessors to PTE bits */
+static inline int pte_write(pte_t pte)          { return pte_val(pte) & _PAGE_RW; }
+static inline int pte_dirty(pte_t pte)          { return pte_val(pte) & _PAGE_DIRTY; }
+static inline int pte_young(pte_t pte)          { return pte_val(pte) & _PAGE_ACCESSED; }
+static inline int pte_file(pte_t pte)           { return pte_val(pte) & _PAGE_FILE; }
+static inline int pte_special(pte_t pte)        { return pte_val(pte) & _PAGE_SPECIAL; }
+static inline int pte_present(pte_t pte)        { return pte_val(pte) & _PAGE_PRESENT; }
+static inline int pte_none(pte_t pte)           { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; }
+static inline pgprot_t pte_pgprot(pte_t pte)    { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
+
+/* Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ *
+ * Even if PTEs can be unsigned long long, a PFN is always an unsigned
+ * long for now.
+ */
+static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) {
+        return __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |
+                     pgprot_val(pgprot)); }
+static inline unsigned long pte_pfn(pte_t pte)  {
+        return pte_val(pte) >> PTE_RPN_SHIFT; }
+
+/* Keep these as a macros to avoid include dependency mess */
+#define pte_page(x)             pfn_to_page(pte_pfn(x))
+#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
+
+/* Generic modifiers for PTE bits */
+static inline pte_t pte_wrprotect(pte_t pte) {
+        pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
+static inline pte_t pte_mkclean(pte_t pte) {
+        pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
+static inline pte_t pte_mkold(pte_t pte) {
+        pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkwrite(pte_t pte) {
+        pte_val(pte) |= _PAGE_RW; return pte; }
+static inline pte_t pte_mkdirty(pte_t pte) {
+        pte_val(pte) |= _PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkyoung(pte_t pte) {
+        pte_val(pte) |= _PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkspecial(pte_t pte) {
+        pte_val(pte) |= _PAGE_SPECIAL; return pte; }
+static inline pte_t pte_mkhuge(pte_t pte) {
+        return pte; }
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+        pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
+        return pte;
+}
+
+
+/* Insert a PTE, top-level function is out of line. It uses an inline
+ * low level function in the respective pgtable-* files
+ */
+extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
+                       pte_t pte);
+
+/* This low level function performs the actual PTE insertion
+ * Setting the PTE depends on the MMU type and other factors. It's
+ * an horrible mess that I'm not going to try to clean up now but
+ * I'm keeping it in one place rather than spread around
+ */
+static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
+                                pte_t *ptep, pte_t pte, int percpu)
+{
+#if defined(CONFIG_PPC_STD_MMU_32) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT)
+        /* First case is 32-bit Hash MMU in SMP mode with 32-bit PTEs. We use the
+         * helper pte_update() which does an atomic update. We need to do that
+         * because a concurrent invalidation can clear _PAGE_HASHPTE. If it's a
+         * per-CPU PTE such as a kmap_atomic, we do a simple update preserving
+         * the hash bits instead (ie, same as the non-SMP case)
+         */
+        if (percpu)
+                *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
+                              | (pte_val(pte) & ~_PAGE_HASHPTE));
+        else
+                pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte));
+
+#elif defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP)
+        /* Second case is 32-bit with 64-bit PTE in SMP mode. In this case, we
+         * can just store as long as we do the two halves in the right order
+         * with a barrier in between. This is possible because we take care,
+         * in the hash code, to pre-invalidate if the PTE was already hashed,
+         * which synchronizes us with any concurrent invalidation.
+         * In the percpu case, we also fallback to the simple update preserving
+         * the hash bits
+         */
+        if (percpu) {
+                *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
+                              | (pte_val(pte) & ~_PAGE_HASHPTE));
+                return;
+        }
+#if _PAGE_HASHPTE != 0
+        if (pte_val(*ptep) & _PAGE_HASHPTE)
+                flush_hash_entry(mm, ptep, addr);
+#endif
+        __asm__ __volatile__("\
+                stw%U0%X0 %2,%0\n\
+                eieio\n\
+                stw%U0%X0 %L2,%1"
+        : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
+        : "r" (pte) : "memory");
+
+#elif defined(CONFIG_PPC_STD_MMU_32)
+        /* Third case is 32-bit hash table in UP mode, we need to preserve
+         * the _PAGE_HASHPTE bit since we may not have invalidated the previous
+         * translation in the hash yet (done in a subsequent flush_tlb_xxx())
+         * and see we need to keep track that this PTE needs invalidating
+         */
+        *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE)
+                      | (pte_val(pte) & ~_PAGE_HASHPTE));
+
+#else
+        /* Anything else just stores the PTE normally. That covers all 64-bit
+         * cases, and 32-bit non-hash with 64-bit PTEs in UP mode
+         */
+        *ptep = pte;
+#endif
+}
+
+
+#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
+extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
+                                 pte_t *ptep, pte_t entry, int dirty);
+
 /*
  * Macro to mark a page protection value as "uncacheable".
  */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
new file mode 100644
index 000000000000..f4a4db8d5555
--- /dev/null
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright 2009 Freescale Semicondutor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * provides masks and opcode images for use by code generation, emulation
+ * and for instructions that older assemblers might not know about
+ */
+#ifndef _ASM_POWERPC_PPC_OPCODE_H
+#define _ASM_POWERPC_PPC_OPCODE_H
+
+#include <linux/stringify.h>
+#include <asm/asm-compat.h>
+
+/* sorted alphabetically */
+#define PPC_INST_DCBA                   0x7c0005ec
+#define PPC_INST_DCBA_MASK              0xfc0007fe
+#define PPC_INST_DCBAL                  0x7c2005ec
+#define PPC_INST_DCBZL                  0x7c2007ec
+#define PPC_INST_ISEL                   0x7c00001e
+#define PPC_INST_ISEL_MASK              0xfc00003e
+#define PPC_INST_LSWI                   0x7c0004aa
+#define PPC_INST_LSWX                   0x7c00042a
+#define PPC_INST_LWSYNC                 0x7c2004ac
+#define PPC_INST_MCRXR                  0x7c000400
+#define PPC_INST_MCRXR_MASK             0xfc0007fe
+#define PPC_INST_MFSPR_PVR              0x7c1f42a6
+#define PPC_INST_MFSPR_PVR_MASK         0xfc1fffff
+#define PPC_INST_MSGSND                 0x7c00019c
+#define PPC_INST_NOP                    0x60000000
+#define PPC_INST_POPCNTB                0x7c0000f4
+#define PPC_INST_POPCNTB_MASK           0xfc0007fe
+#define PPC_INST_RFCI                   0x4c000066
+#define PPC_INST_RFDI                   0x4c00004e
+#define PPC_INST_RFMCI                  0x4c00004c
+
+#define PPC_INST_STRING                 0x7c00042a
+#define PPC_INST_STRING_MASK            0xfc0007fe
+#define PPC_INST_STRING_GEN_MASK        0xfc00067e
+
+#define PPC_INST_STSWI                  0x7c0005aa
+#define PPC_INST_STSWX                  0x7c00052a
+#define PPC_INST_TLBILX                 0x7c000626
+#define PPC_INST_WAIT                   0x7c00007c
+
+/* macros to insert fields into opcodes */
+#define __PPC_RA(a)     ((a & 0x1f) << 16)
+#define __PPC_RB(b)     ((b & 0x1f) << 11)
+#define __PPC_T_TLB(t)  ((t & 0x3) << 21)
+#define __PPC_WC(w)     ((w & 0x3) << 21)
+
+/* Deal with instructions that older assemblers aren't aware of */
+#define PPC_DCBAL(a, b)         stringify_in_c(.long PPC_INST_DCBAL | \
+                                        __PPC_RA(a) | __PPC_RB(b))
+#define PPC_DCBZL(a, b)         stringify_in_c(.long PPC_INST_DCBZL | \
+                                        __PPC_RA(a) | __PPC_RB(b))
+#define PPC_MSGSND(b)           stringify_in_c(.long PPC_INST_MSGSND | \
+                                        __PPC_RB(b))
+#define PPC_RFCI                stringify_in_c(.long PPC_INST_RFCI)
+#define PPC_RFDI                stringify_in_c(.long PPC_INST_RFDI)
+#define PPC_RFMCI               stringify_in_c(.long PPC_INST_RFMCI)
+#define PPC_TLBILX(t, a, b)     stringify_in_c(.long PPC_INST_TLBILX | \
+                                        __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b))
+#define PPC_TLBILX_ALL(a, b)    PPC_TLBILX(0, a, b)
+#define PPC_TLBILX_PID(a, b)    PPC_TLBILX(1, a, b)
+#define PPC_TLBILX_VA(a, b)     PPC_TLBILX(3, a, b)
+#define PPC_WAIT(w)             stringify_in_c(.long PPC_INST_WAIT | \
+                                        __PPC_WC(w))
+
+#endif /* _ASM_POWERPC_PPC_OPCODE_H */
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 1a0d628eb114..f59a66684aed 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -7,6 +7,7 @@
 #include <linux/stringify.h>
 #include <asm/asm-compat.h>
 #include <asm/processor.h>
+#include <asm/ppc-opcode.h>
 
 #ifndef __ASSEMBLY__
 #error __FILE__ should only be used in assembler files
@@ -167,11 +168,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);					\
 #define HMT_MEDIUM_HIGH or      5,5,5           # medium high priority
 #define HMT_HIGH        or      3,3,3
 
-/* handle instructions that older assemblers may not know */
-#define RFCI            .long 0x4c000066        /* rfci instruction */
-#define RFDI            .long 0x4c00004e        /* rfdi instruction */
-#define RFMCI           .long 0x4c00004c        /* rfmci instruction */
-
 #ifdef __KERNEL__
 #ifdef CONFIG_PPC64
 
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index d3466490104a..9eed29eee604 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -313,6 +313,25 @@ static inline void prefetchw(const void *x)
 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 #endif
 
+#ifdef CONFIG_PPC64
+static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
+{
+        unsigned long sp;
+
+        if (is_32)
+                sp = regs->gpr[1] & 0x0ffffffffUL;
+        else
+                sp = regs->gpr[1];
+
+        return sp;
+}
+#else
+static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32)
+{
+        return regs->gpr[1];
+}
+#endif
+
 #endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
 #endif /* _ASM_POWERPC_PROCESSOR_H */
diff --git a/arch/powerpc/include/asm/ps3av.h b/arch/powerpc/include/asm/ps3av.h
index cd24ac16660a..0427b0b53d2d 100644
--- a/arch/powerpc/include/asm/ps3av.h
+++ b/arch/powerpc/include/asm/ps3av.h
@@ -730,7 +730,7 @@ extern int ps3av_cmd_av_get_hw_conf(struct ps3av_pkt_av_get_hw_conf *);
 extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *,
                                             u32);
 
-extern int ps3av_set_video_mode(u32);
+extern int ps3av_set_video_mode(int);
 extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32);
 extern int ps3av_get_auto_mode(void);
 extern int ps3av_get_mode(void);
diff --git a/arch/powerpc/include/asm/ps3fb.h b/arch/powerpc/include/asm/ps3fb.h
index e7233a849680..90dbefb8cfc4 100644
--- a/arch/powerpc/include/asm/ps3fb.h
+++ b/arch/powerpc/include/asm/ps3fb.h
@@ -21,6 +21,7 @@
 
 #include <linux/types.h>
 #include <linux/ioctl.h>
+#include <linux/types.h>
 
 /* ioctl */
 #define PS3FB_IOCTL_SETMODE       _IOW('r',  1, int) /* set video mode */
diff --git a/arch/powerpc/include/asm/pte-40x.h b/arch/powerpc/include/asm/pte-40x.h
new file mode 100644
index 000000000000..07630faae029
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-40x.h
@@ -0,0 +1,64 @@
+#ifndef _ASM_POWERPC_PTE_40x_H
+#define _ASM_POWERPC_PTE_40x_H
+#ifdef __KERNEL__
+
+/*
+ * At present, all PowerPC 400-class processors share a similar TLB
+ * architecture. The instruction and data sides share a unified,
+ * 64-entry, fully-associative TLB which is maintained totally under
+ * software control. In addition, the instruction side has a
+ * hardware-managed, 4-entry, fully-associative TLB which serves as a
+ * first level to the shared TLB. These two TLBs are known as the UTLB
+ * and ITLB, respectively (see "mmu.h" for definitions).
+ *
+ * There are several potential gotchas here.  The 40x hardware TLBLO
+ * field looks like this:
+ *
+ * 0  1  2  3  4  ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
+ * RPN.....................  0  0 EX WR ZSEL.......  W  I  M  G
+ *
+ * Where possible we make the Linux PTE bits match up with this
+ *
+ * - bits 20 and 21 must be cleared, because we use 4k pages (40x can
+ *   support down to 1k pages), this is done in the TLBMiss exception
+ *   handler.
+ * - We use only zones 0 (for kernel pages) and 1 (for user pages)
+ *   of the 16 available.  Bit 24-26 of the TLB are cleared in the TLB
+ *   miss handler.  Bit 27 is PAGE_USER, thus selecting the correct
+ *   zone.
+ * - PRESENT *must* be in the bottom two bits because swap cache
+ *   entries use the top 30 bits.  Because 40x doesn't support SMP
+ *   anyway, M is irrelevant so we borrow it for PAGE_PRESENT.  Bit 30
+ *   is cleared in the TLB miss handler before the TLB entry is loaded.
+ * - All other bits of the PTE are loaded into TLBLO without
+ *   modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
+ *   software PTE bits.  We actually use use bits 21, 24, 25, and
+ *   30 respectively for the software bits: ACCESSED, DIRTY, RW, and
+ *   PRESENT.
+ */
+
+#define _PAGE_GUARDED   0x001   /* G: page is guarded from prefetch */
+#define _PAGE_FILE      0x001   /* when !present: nonlinear file mapping */
+#define _PAGE_PRESENT   0x002   /* software: PTE contains a translation */
+#define _PAGE_NO_CACHE  0x004   /* I: caching is inhibited */
+#define _PAGE_WRITETHRU 0x008   /* W: caching is write-through */
+#define _PAGE_USER      0x010   /* matches one of the zone permission bits */
+#define _PAGE_RW        0x040   /* software: Writes permitted */
+#define _PAGE_DIRTY     0x080   /* software: dirty page */
+#define _PAGE_HWWRITE   0x100   /* hardware: Dirty & RW, set in exception */
+#define _PAGE_HWEXEC    0x200   /* hardware: EX permission */
+#define _PAGE_ACCESSED  0x400   /* software: R: page referenced */
+
+#define _PMD_PRESENT    0x400   /* PMD points to page of PTEs */
+#define _PMD_BAD        0x802
+#define _PMD_SIZE       0x0e0   /* size field, != 0 for large-page PMD entry */
+#define _PMD_SIZE_4M    0x0c0
+#define _PMD_SIZE_16M   0x0e0
+
+#define PMD_PAGE_SIZE(pmdval)   (1024 << (((pmdval) & _PMD_SIZE) >> 4))
+
+/* Until my rework is finished, 40x still needs atomic PTE updates */
+#define PTE_ATOMIC_UPDATES      1
+
+#endif /* __KERNEL__ */
+#endif /*  _ASM_POWERPC_PTE_40x_H */
diff --git a/arch/powerpc/include/asm/pte-44x.h b/arch/powerpc/include/asm/pte-44x.h
new file mode 100644
index 000000000000..37e98bcf83e0
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-44x.h
@@ -0,0 +1,102 @@
+#ifndef _ASM_POWERPC_PTE_44x_H
+#define _ASM_POWERPC_PTE_44x_H
+#ifdef __KERNEL__
+
+/*
+ * Definitions for PPC440
+ *
+ * Because of the 3 word TLB entries to support 36-bit addressing,
+ * the attribute are difficult to map in such a fashion that they
+ * are easily loaded during exception processing.  I decided to
+ * organize the entry so the ERPN is the only portion in the
+ * upper word of the PTE and the attribute bits below are packed
+ * in as sensibly as they can be in the area below a 4KB page size
+ * oriented RPN.  This at least makes it easy to load the RPN and
+ * ERPN fields in the TLB. -Matt
+ *
+ * This isn't entirely true anymore, at least some bits are now
+ * easier to move into the TLB from the PTE. -BenH.
+ *
+ * Note that these bits preclude future use of a page size
+ * less than 4KB.
+ *
+ *
+ * PPC 440 core has following TLB attribute fields;
+ *
+ *   TLB1:
+ *   0  1  2  3  4  ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
+ *   RPN.................................  -  -  -  -  -  - ERPN.......
+ *
+ *   TLB2:
+ *   0  1  2  3  4  ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
+ *   -  -  -  -  -    - U0 U1 U2 U3 W  I  M  G  E   - UX UW UR SX SW SR
+ *
+ * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional
+ * TLB2 storage attibute fields. Those are:
+ *
+ *   TLB2:
+ *   0...10    11   12   13   14   15   16...31
+ *   no change WL1  IL1I IL1D IL2I IL2D no change
+ *
+ * There are some constrains and options, to decide mapping software bits
+ * into TLB entry.
+ *
+ *   - PRESENT *must* be in the bottom three bits because swap cache
+ *     entries use the top 29 bits for TLB2.
+ *
+ *   - FILE *must* be in the bottom three bits because swap cache
+ *     entries use the top 29 bits for TLB2.
+ *
+ *   - CACHE COHERENT bit (M) has no effect on original PPC440 cores,
+ *     because it doesn't support SMP. However, some later 460 variants
+ *     have -some- form of SMP support and so I keep the bit there for
+ *     future use
+ *
+ * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
+ * for memory protection related functions (see PTE structure in
+ * include/asm-ppc/mmu.h).  The _PAGE_XXX definitions in this file map to the
+ * above bits.  Note that the bit values are CPU specific, not architecture
+ * specific.
+ *
+ * The kernel PTE entry holds an arch-dependent swp_entry structure under
+ * certain situations. In other words, in such situations some portion of
+ * the PTE bits are used as a swp_entry. In the PPC implementation, the
+ * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still
+ * hold protection values. That means the three protection bits are
+ * reserved for both PTE and SWAP entry at the most significant three
+ * LSBs.
+ *
+ * There are three protection bits available for SWAP entry:
+ *      _PAGE_PRESENT
+ *      _PAGE_FILE
+ *      _PAGE_HASHPTE (if HW has)
+ *
+ * So those three bits have to be inside of 0-2nd LSB of PTE.
+ *
+ */
+
+#define _PAGE_PRESENT   0x00000001              /* S: PTE valid */
+#define _PAGE_RW        0x00000002              /* S: Write permission */
+#define _PAGE_FILE      0x00000004              /* S: nonlinear file mapping */
+#define _PAGE_HWEXEC    0x00000004              /* H: Execute permission */
+#define _PAGE_ACCESSED  0x00000008              /* S: Page referenced */
+#define _PAGE_DIRTY     0x00000010              /* S: Page dirty */
+#define _PAGE_SPECIAL   0x00000020              /* S: Special page */
+#define _PAGE_USER      0x00000040              /* S: User page */
+#define _PAGE_ENDIAN    0x00000080              /* H: E bit */
+#define _PAGE_GUARDED   0x00000100              /* H: G bit */
+#define _PAGE_COHERENT  0x00000200              /* H: M bit */
+#define _PAGE_NO_CACHE  0x00000400              /* H: I bit */
+#define _PAGE_WRITETHRU 0x00000800              /* H: W bit */
+
+/* TODO: Add large page lowmem mapping support */
+#define _PMD_PRESENT    0
+#define _PMD_PRESENT_MASK (PAGE_MASK)
+#define _PMD_BAD        (~PAGE_MASK)
+
+/* ERPN in a PTE never gets cleared, ignore it */
+#define _PTE_NONE_MASK  0xffffffff00000000ULL
+
+
+#endif /* __KERNEL__ */
+#endif /*  _ASM_POWERPC_PTE_44x_H */
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h
new file mode 100644
index 000000000000..8c6e31251034
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-8xx.h
@@ -0,0 +1,67 @@
+#ifndef _ASM_POWERPC_PTE_8xx_H
+#define _ASM_POWERPC_PTE_8xx_H
+#ifdef __KERNEL__
+
+/*
+ * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk.
+ * We also use the two level tables, but we can put the real bits in them
+ * needed for the TLB and tablewalk.  These definitions require Mx_CTR.PPM = 0,
+ * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1.  The level 2 descriptor has
+ * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit
+ * based upon user/super access.  The TLB does not have accessed nor write
+ * protect.  We assume that if the TLB get loaded with an entry it is
+ * accessed, and overload the changed bit for write protect.  We use
+ * two bits in the software pte that are supposed to be set to zero in
+ * the TLB entry (24 and 25) for these indicators.  Although the level 1
+ * descriptor contains the guarded and writethrough/copyback bits, we can
+ * set these at the page level since they get copied from the Mx_TWC
+ * register when the TLB entry is loaded.  We will use bit 27 for guard, since
+ * that is where it exists in the MD_TWC, and bit 26 for writethrough.
+ * These will get masked from the level 2 descriptor at TLB load time, and
+ * copied to the MD_TWC before it gets loaded.
+ * Large page sizes added.  We currently support two sizes, 4K and 8M.
+ * This also allows a TLB hander optimization because we can directly
+ * load the PMD into MD_TWC.  The 8M pages are only used for kernel
+ * mapping of well known areas.  The PMD (PGD) entries contain control
+ * flags in addition to the address, so care must be taken that the
+ * software no longer assumes these are only pointers.
+ */
+
+/* Definitions for 8xx embedded chips. */
+#define _PAGE_PRESENT   0x0001  /* Page is valid */
+#define _PAGE_FILE      0x0002  /* when !present: nonlinear file mapping */
+#define _PAGE_NO_CACHE  0x0002  /* I: cache inhibit */
+#define _PAGE_SHARED    0x0004  /* No ASID (context) compare */
+
+/* These five software bits must be masked out when the entry is loaded
+ * into the TLB.
+ */
+#define _PAGE_EXEC      0x0008  /* software: i-cache coherency required */
+#define _PAGE_GUARDED   0x0010  /* software: guarded access */
+#define _PAGE_DIRTY     0x0020  /* software: page changed */
+#define _PAGE_RW        0x0040  /* software: user write access allowed */
+#define _PAGE_ACCESSED  0x0080  /* software: page referenced */
+
+/* Setting any bits in the nibble with the follow two controls will
+ * require a TLB exception handler change.  It is assumed unused bits
+ * are always zero.
+ */
+#define _PAGE_HWWRITE   0x0100  /* h/w write enable: never set in Linux PTE */
+#define _PAGE_USER      0x0800  /* One of the PP bits, the other is USER&~RW */
+
+#define _PMD_PRESENT    0x0001
+#define _PMD_BAD        0x0ff0
+#define _PMD_PAGE_MASK  0x000c
+#define _PMD_PAGE_8M    0x000c
+
+#define _PTE_NONE_MASK _PAGE_ACCESSED
+
+/* Until my rework is finished, 8xx still needs atomic PTE updates */
+#define PTE_ATOMIC_UPDATES      1
+
+/* We need to add _PAGE_SHARED to kernel pages */
+#define _PAGE_KERNEL_RO (_PAGE_SHARED)
+#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
+
+#endif /* __KERNEL__ */
+#endif /*  _ASM_POWERPC_PTE_8xx_H */
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
new file mode 100644
index 000000000000..d9740e886801
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -0,0 +1,180 @@
+/* Included from asm/pgtable-*.h only ! */
+
+/*
+ * Some bits are only used on some cpu families... Make sure that all
+ * the undefined gets a sensible default
+ */
+#ifndef _PAGE_HASHPTE
+#define _PAGE_HASHPTE   0
+#endif
+#ifndef _PAGE_SHARED
+#define _PAGE_SHARED    0
+#endif
+#ifndef _PAGE_HWWRITE
+#define _PAGE_HWWRITE   0
+#endif
+#ifndef _PAGE_HWEXEC
+#define _PAGE_HWEXEC    0
+#endif
+#ifndef _PAGE_EXEC
+#define _PAGE_EXEC      0
+#endif
+#ifndef _PAGE_ENDIAN
+#define _PAGE_ENDIAN    0
+#endif
+#ifndef _PAGE_COHERENT
+#define _PAGE_COHERENT  0
+#endif
+#ifndef _PAGE_WRITETHRU
+#define _PAGE_WRITETHRU 0
+#endif
+#ifndef _PAGE_SPECIAL
+#define _PAGE_SPECIAL   0
+#endif
+#ifndef _PAGE_4K_PFN
+#define _PAGE_4K_PFN            0
+#endif
+#ifndef _PAGE_PSIZE
+#define _PAGE_PSIZE             0
+#endif
+#ifndef _PMD_PRESENT_MASK
+#define _PMD_PRESENT_MASK       _PMD_PRESENT
+#endif
+#ifndef _PMD_SIZE
+#define _PMD_SIZE       0
+#define PMD_PAGE_SIZE(pmd)      bad_call_to_PMD_PAGE_SIZE()
+#endif
+#ifndef _PAGE_KERNEL_RO
+#define _PAGE_KERNEL_RO 0
+#endif
+#ifndef _PAGE_KERNEL_RW
+#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
+#endif
+#ifndef _PAGE_HPTEFLAGS
+#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
+#endif
+#ifndef _PTE_NONE_MASK
+#define _PTE_NONE_MASK  _PAGE_HPTEFLAGS
+#endif
+
+/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
+ * kernel without large page PMD support
+ */
+#ifndef __ASSEMBLY__
+extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
+#endif /* __ASSEMBLY__ */
+
+/* Location of the PFN in the PTE. Most 32-bit platforms use the same
+ * as _PAGE_SHIFT here (ie, naturally aligned).
+ * Platform who don't just pre-define the value so we don't override it here
+ */
+#ifndef PTE_RPN_SHIFT
+#define PTE_RPN_SHIFT   (PAGE_SHIFT)
+#endif
+
+/* The mask convered by the RPN must be a ULL on 32-bit platforms with
+ * 64-bit PTEs
+ */
+#if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
+#define PTE_RPN_MAX     (1ULL << (64 - PTE_RPN_SHIFT))
+#define PTE_RPN_MASK    (~((1ULL<<PTE_RPN_SHIFT)-1))
+#else
+#define PTE_RPN_MAX     (1UL << (32 - PTE_RPN_SHIFT))
+#define PTE_RPN_MASK    (~((1UL<<PTE_RPN_SHIFT)-1))
+#endif
+
+/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
+ * pgprot changes
+ */
+#define _PAGE_CHG_MASK  (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
+                         _PAGE_ACCESSED | _PAGE_SPECIAL)
+
+/* Mask of bits returned by pte_pgprot() */
+#define PAGE_PROT_BITS  (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
+                         _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
+                         _PAGE_USER | _PAGE_ACCESSED | \
+                         _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
+                         _PAGE_EXEC | _PAGE_HWEXEC)
+
+/*
+ * We define 2 sets of base prot bits, one for basic pages (ie,
+ * cacheable kernel and user pages) and one for non cacheable
+ * pages. We always set _PAGE_COHERENT when SMP is enabled or
+ * the processor might need it for DMA coherency.
+ */
+#define _PAGE_BASE_NC   (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
+#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
+#define _PAGE_BASE      (_PAGE_BASE_NC | _PAGE_COHERENT)
+#else
+#define _PAGE_BASE      (_PAGE_BASE_NC)
+#endif
+
+/* Permission masks used to generate the __P and __S table,
+ *
+ * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
+ *
+ * Write permissions imply read permissions for now (we could make write-only
+ * pages on BookE but we don't bother for now). Execute permission control is
+ * possible on platforms that define _PAGE_EXEC
+ *
+ * Note due to the way vm flags are laid out, the bits are XWR
+ */
+#define PAGE_NONE       __pgprot(_PAGE_BASE)
+#define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X   __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
+#define PAGE_COPY       __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+#define PAGE_READONLY   __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+
+#define __P000  PAGE_NONE
+#define __P001  PAGE_READONLY
+#define __P010  PAGE_COPY
+#define __P011  PAGE_COPY
+#define __P100  PAGE_READONLY_X
+#define __P101  PAGE_READONLY_X
+#define __P110  PAGE_COPY_X
+#define __P111  PAGE_COPY_X
+
+#define __S000  PAGE_NONE
+#define __S001  PAGE_READONLY
+#define __S010  PAGE_SHARED
+#define __S011  PAGE_SHARED
+#define __S100  PAGE_READONLY_X
+#define __S101  PAGE_READONLY_X
+#define __S110  PAGE_SHARED_X
+#define __S111  PAGE_SHARED_X
+
+/* Permission masks used for kernel mappings */
+#define PAGE_KERNEL     __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
+#define PAGE_KERNEL_NC  __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+                                 _PAGE_NO_CACHE)
+#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
+                                 _PAGE_NO_CACHE | _PAGE_GUARDED)
+#define PAGE_KERNEL_X   __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
+#define PAGE_KERNEL_RO  __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
+#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
+
+/* Protection used for kernel text. We want the debuggers to be able to
+ * set breakpoints anywhere, so don't write protect the kernel text
+ * on platforms where such control is possible.
+ */
+#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
+        defined(CONFIG_KPROBES)
+#define PAGE_KERNEL_TEXT        PAGE_KERNEL_X
+#else
+#define PAGE_KERNEL_TEXT        PAGE_KERNEL_ROX
+#endif
+
+/* Make modules code happy. We don't set RO yet */
+#define PAGE_KERNEL_EXEC        PAGE_KERNEL_X
+
+/* Advertise special mapping type for AGP */
+#define PAGE_AGP                (PAGE_KERNEL_NC)
+#define HAVE_PAGE_AGP
+
+/* Advertise support for _PAGE_SPECIAL */
+#ifdef _PAGE_SPECIAL
+#define __HAVE_ARCH_PTE_SPECIAL
+#endif
+
diff --git a/arch/powerpc/include/asm/pte-fsl-booke.h b/arch/powerpc/include/asm/pte-fsl-booke.h
new file mode 100644
index 000000000000..10820f58acf5
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-fsl-booke.h
@@ -0,0 +1,48 @@
+#ifndef _ASM_POWERPC_PTE_FSL_BOOKE_H
+#define _ASM_POWERPC_PTE_FSL_BOOKE_H
+#ifdef __KERNEL__
+
+/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
+ * processors
+ *
+   MMU Assist Register 3:
+
+   32 33 34 35 36  ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
+   RPN......................  0  0 U0 U1 U2 U3 UX SX UW SW UR SR
+
+   - PRESENT *must* be in the bottom three bits because swap cache
+     entries use the top 29 bits.
+
+   - FILE *must* be in the bottom three bits because swap cache
+     entries use the top 29 bits.
+*/
+
+/* Definitions for FSL Book-E Cores */
+#define _PAGE_PRESENT   0x00001 /* S: PTE contains a translation */
+#define _PAGE_USER      0x00002 /* S: User page (maps to UR) */
+#define _PAGE_FILE      0x00002 /* S: when !present: nonlinear file mapping */
+#define _PAGE_RW        0x00004 /* S: Write permission (SW) */
+#define _PAGE_DIRTY     0x00008 /* S: Page dirty */
+#define _PAGE_HWEXEC    0x00010 /* H: SX permission */
+#define _PAGE_ACCESSED  0x00020 /* S: Page referenced */
+
+#define _PAGE_ENDIAN    0x00040 /* H: E bit */
+#define _PAGE_GUARDED   0x00080 /* H: G bit */
+#define _PAGE_COHERENT  0x00100 /* H: M bit */
+#define _PAGE_NO_CACHE  0x00200 /* H: I bit */
+#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
+#define _PAGE_SPECIAL   0x00800 /* S: Special page */
+
+#ifdef CONFIG_PTE_64BIT
+/* ERPN in a PTE never gets cleared, ignore it */
+#define _PTE_NONE_MASK  0xffffffffffff0000ULL
+/* We extend the size of the PTE flags area when using 64-bit PTEs */
+#define PTE_RPN_SHIFT   (PAGE_SHIFT + 8)
+#endif
+
+#define _PMD_PRESENT    0
+#define _PMD_PRESENT_MASK (PAGE_MASK)
+#define _PMD_BAD        (~PAGE_MASK)
+
+#endif /* __KERNEL__ */
+#endif /*  _ASM_POWERPC_PTE_FSL_BOOKE_H */
diff --git a/arch/powerpc/include/asm/pte-hash32.h b/arch/powerpc/include/asm/pte-hash32.h
new file mode 100644
index 000000000000..16e571c7f9ef
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash32.h
@@ -0,0 +1,48 @@
+#ifndef _ASM_POWERPC_PTE_HASH32_H
+#define _ASM_POWERPC_PTE_HASH32_H
+#ifdef __KERNEL__
+
+/*
+ * The "classic" 32-bit implementation of the PowerPC MMU uses a hash
+ * table containing PTEs, together with a set of 16 segment registers,
+ * to define the virtual to physical address mapping.
+ *
+ * We use the hash table as an extended TLB, i.e. a cache of currently
+ * active mappings.  We maintain a two-level page table tree, much
+ * like that used by the i386, for the sake of the Linux memory
+ * management code.  Low-level assembler code in hash_low_32.S
+ * (procedure hash_page) is responsible for extracting ptes from the
+ * tree and putting them into the hash table when necessary, and
+ * updating the accessed and modified bits in the page table tree.
+ */
+
+#define _PAGE_PRESENT   0x001   /* software: pte contains a translation */
+#define _PAGE_HASHPTE   0x002   /* hash_page has made an HPTE for this pte */
+#define _PAGE_FILE      0x004   /* when !present: nonlinear file mapping */
+#define _PAGE_USER      0x004   /* usermode access allowed */
+#define _PAGE_GUARDED   0x008   /* G: prohibit speculative access */
+#define _PAGE_COHERENT  0x010   /* M: enforce memory coherence (SMP systems) */
+#define _PAGE_NO_CACHE  0x020   /* I: cache inhibit */
+#define _PAGE_WRITETHRU 0x040   /* W: cache write-through */
+#define _PAGE_DIRTY     0x080   /* C: page changed */
+#define _PAGE_ACCESSED  0x100   /* R: page referenced */
+#define _PAGE_EXEC      0x200   /* software: i-cache coherency required */
+#define _PAGE_RW        0x400   /* software: user write access allowed */
+#define _PAGE_SPECIAL   0x800   /* software: Special page */
+
+#ifdef CONFIG_PTE_64BIT
+/* We never clear the high word of the pte */
+#define _PTE_NONE_MASK  (0xffffffff00000000ULL | _PAGE_HASHPTE)
+#else
+#define _PTE_NONE_MASK  _PAGE_HASHPTE
+#endif
+
+#define _PMD_PRESENT    0
+#define _PMD_PRESENT_MASK (PAGE_MASK)
+#define _PMD_BAD        (~PAGE_MASK)
+
+/* Hash table based platforms need atomic updates of the linux PTE */
+#define PTE_ATOMIC_UPDATES      1
+
+#endif /* __KERNEL__ */
+#endif /*  _ASM_POWERPC_PTE_HASH32_H */
diff --git a/arch/powerpc/include/asm/pte-hash64-4k.h b/arch/powerpc/include/asm/pte-hash64-4k.h
new file mode 100644
index 000000000000..c134e809aac3
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash64-4k.h
@@ -0,0 +1,17 @@
+/* To be include by pgtable-hash64.h only */
+
+/* PTE bits */
+#define _PAGE_HASHPTE   0x0400 /* software: pte has an associated HPTE */
+#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
+#define _PAGE_GROUP_IX  0x7000 /* software: HPTE index within group */
+#define _PAGE_F_SECOND  _PAGE_SECONDARY
+#define _PAGE_F_GIX     _PAGE_GROUP_IX
+#define _PAGE_SPECIAL   0x10000 /* software: special page */
+
+/* PTE flags to conserve for HPTE identification */
+#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \
+                         _PAGE_SECONDARY | _PAGE_GROUP_IX)
+
+/* shift to put page number into pte */
+#define PTE_RPN_SHIFT   (17)
+
diff --git a/arch/powerpc/include/asm/pgtable-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h
index 7389003349a6..e05d26fa372f 100644
--- a/arch/powerpc/include/asm/pgtable-64k.h
+++ b/arch/powerpc/include/asm/pte-hash64-64k.h
@@ -1,76 +1,6 @@
-#ifndef _ASM_POWERPC_PGTABLE_64K_H
-#define _ASM_POWERPC_PGTABLE_64K_H
-
-#include <asm-generic/pgtable-nopud.h>
-
-
-#define PTE_INDEX_SIZE  12
-#define PMD_INDEX_SIZE  12
-#define PUD_INDEX_SIZE  0
-#define PGD_INDEX_SIZE  4
-
-#ifndef __ASSEMBLY__
-#define PTE_TABLE_SIZE  (sizeof(real_pte_t) << PTE_INDEX_SIZE)
-#define PMD_TABLE_SIZE  (sizeof(pmd_t) << PMD_INDEX_SIZE)
-#define PGD_TABLE_SIZE  (sizeof(pgd_t) << PGD_INDEX_SIZE)
-
-#define PTRS_PER_PTE    (1 << PTE_INDEX_SIZE)
-#define PTRS_PER_PMD    (1 << PMD_INDEX_SIZE)
-#define PTRS_PER_PGD    (1 << PGD_INDEX_SIZE)
-
-#ifdef CONFIG_PPC_SUBPAGE_PROT
-/*
- * For the sub-page protection option, we extend the PGD with one of
- * these.  Basically we have a 3-level tree, with the top level being
- * the protptrs array.  To optimize speed and memory consumption when
- * only addresses < 4GB are being protected, pointers to the first
- * four pages of sub-page protection words are stored in the low_prot
- * array.
- * Each page of sub-page protection words protects 1GB (4 bytes
- * protects 64k).  For the 3-level tree, each page of pointers then
- * protects 8TB.
- */
-struct subpage_prot_table {
-        unsigned long maxaddr;  /* only addresses < this are protected */
-        unsigned int **protptrs[2];
-        unsigned int *low_prot[4];
-};
-
-#undef PGD_TABLE_SIZE
-#define PGD_TABLE_SIZE          ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \
-                                 sizeof(struct subpage_prot_table))
-
-#define SBP_L1_BITS             (PAGE_SHIFT - 2)
-#define SBP_L2_BITS             (PAGE_SHIFT - 3)
-#define SBP_L1_COUNT            (1 << SBP_L1_BITS)
-#define SBP_L2_COUNT            (1 << SBP_L2_BITS)
-#define SBP_L2_SHIFT            (PAGE_SHIFT + SBP_L1_BITS)
-#define SBP_L3_SHIFT            (SBP_L2_SHIFT + SBP_L2_BITS)
-
-extern void subpage_prot_free(pgd_t *pgd);
-
-static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
-{
-        return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD);
-}
-#endif /* CONFIG_PPC_SUBPAGE_PROT */
-#endif  /* __ASSEMBLY__ */
-
-/* With 4k base page size, hugepage PTEs go at the PMD level */
-#define MIN_HUGEPTE_SHIFT       PAGE_SHIFT
-
-/* PMD_SHIFT determines what a second-level page table entry can map */
-#define PMD_SHIFT       (PAGE_SHIFT + PTE_INDEX_SIZE)
-#define PMD_SIZE        (1UL << PMD_SHIFT)
-#define PMD_MASK        (~(PMD_SIZE-1))
-
-/* PGDIR_SHIFT determines what a third-level page table entry can map */
-#define PGDIR_SHIFT     (PMD_SHIFT + PMD_INDEX_SIZE)
-#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
-#define PGDIR_MASK      (~(PGDIR_SIZE-1))
+/* To be include by pgtable-hash64.h only */
 
 /* Additional PTE bits (don't change without checking asm in hash_low.S) */
-#define __HAVE_ARCH_PTE_SPECIAL
 #define _PAGE_SPECIAL   0x00000400 /* software: special page */
 #define _PAGE_HPTE_SUB  0x0ffff000 /* combo only: sub pages HPTE bits */
 #define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */
@@ -107,21 +37,15 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
  * of addressable physical space, or 46 bits for the special 4k PFNs.
  */
 #define PTE_RPN_SHIFT   (30)
-#define PTE_RPN_MAX     (1UL << (64 - PTE_RPN_SHIFT))
-#define PTE_RPN_MASK    (~((1UL<<PTE_RPN_SHIFT)-1))
-
-/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
- * pgprot changes
- */
-#define _PAGE_CHG_MASK  (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
-                         _PAGE_ACCESSED | _PAGE_SPECIAL)
 
-/* Bits to mask out from a PMD to get to the PTE page */
-#define PMD_MASKED_BITS         0x1ff
-/* Bits to mask out from a PGD/PUD to get to the PMD page */
-#define PUD_MASKED_BITS         0x1ff
+#ifndef __ASSEMBLY__
 
-/* Manipulate "rpte" values */
+/*
+ * With 64K pages on hash table, we have a special PTE format that
+ * uses a second "half" of the page table to encode sub-page information
+ * in order to deal with 64K made of 4K HW pages. Thus we override the
+ * generic accessors and iterators here
+ */
 #define __real_pte(e,p)         ((real_pte_t) { \
         (e), pte_val(*((p) + PTRS_PER_PTE)) })
 #define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \
@@ -130,7 +54,6 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
 #define __rpte_sub_valid(rpte, index) \
         (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index)))
 
-
 /* Trick: we set __end to va + 64k, which happens works for
  * a 16M page as well as we want only one iteration
  */
@@ -152,4 +75,41 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
         remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE,                \
                         __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN))
 
-#endif /* _ASM_POWERPC_PGTABLE_64K_H */
+
+#ifdef CONFIG_PPC_SUBPAGE_PROT
+/*
+ * For the sub-page protection option, we extend the PGD with one of
+ * these.  Basically we have a 3-level tree, with the top level being
+ * the protptrs array.  To optimize speed and memory consumption when
+ * only addresses < 4GB are being protected, pointers to the first
+ * four pages of sub-page protection words are stored in the low_prot
+ * array.
+ * Each page of sub-page protection words protects 1GB (4 bytes
+ * protects 64k).  For the 3-level tree, each page of pointers then
+ * protects 8TB.
+ */
+struct subpage_prot_table {
+        unsigned long maxaddr;  /* only addresses < this are protected */
+        unsigned int **protptrs[2];
+        unsigned int *low_prot[4];
+};
+
+#undef PGD_TABLE_SIZE
+#define PGD_TABLE_SIZE          ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \
+                                 sizeof(struct subpage_prot_table))
+
+#define SBP_L1_BITS             (PAGE_SHIFT - 2)
+#define SBP_L2_BITS             (PAGE_SHIFT - 3)
+#define SBP_L1_COUNT            (1 << SBP_L1_BITS)
+#define SBP_L2_COUNT            (1 << SBP_L2_BITS)
+#define SBP_L2_SHIFT            (PAGE_SHIFT + SBP_L1_BITS)
+#define SBP_L3_SHIFT            (SBP_L2_SHIFT + SBP_L2_BITS)
+
+extern void subpage_prot_free(pgd_t *pgd);
+
+static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd)
+{
+        return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD);
+}
+#endif /* CONFIG_PPC_SUBPAGE_PROT */
+#endif  /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/pte-hash64.h b/arch/powerpc/include/asm/pte-hash64.h
new file mode 100644
index 000000000000..0419eeb53274
--- /dev/null
+++ b/arch/powerpc/include/asm/pte-hash64.h
@@ -0,0 +1,54 @@
+#ifndef _ASM_POWERPC_PTE_HASH64_H
+#define _ASM_POWERPC_PTE_HASH64_H
+#ifdef __KERNEL__
+
+/*
+ * Common bits between 4K and 64K pages in a linux-style PTE.
+ * These match the bits in the (hardware-defined) PowerPC PTE as closely
+ * as possible. Additional bits may be defined in pgtable-hash64-*.h
+ *
+ * Note: We only support user read/write permissions. Supervisor always
+ * have full read/write to pages above PAGE_OFFSET (pages below that
+ * always use the user access permissions).
+ *
+ * We could create separate kernel read-only if we used the 3 PP bits
+ * combinations that newer processors provide but we currently don't.
+ */
+#define _PAGE_PRESENT           0x0001 /* software: pte contains a translation */
+#define _PAGE_USER              0x0002 /* matches one of the PP bits */
+#define _PAGE_FILE              0x0002 /* (!present only) software: pte holds file offset */
+#define _PAGE_EXEC              0x0004 /* No execute on POWER4 and newer (we invert) */
+#define _PAGE_GUARDED           0x0008
+#define _PAGE_COHERENT          0x0010 /* M: enforce memory coherence (SMP systems) */
+#define _PAGE_NO_CACHE          0x0020 /* I: cache inhibit */
+#define _PAGE_WRITETHRU         0x0040 /* W: cache write-through */
+#define _PAGE_DIRTY             0x0080 /* C: page changed */
+#define _PAGE_ACCESSED          0x0100 /* R: page referenced */
+#define _PAGE_RW                0x0200 /* software: user write access allowed */
+#define _PAGE_BUSY              0x0800 /* software: PTE & hash are busy */
+
+/* No separate kernel read-only */
+#define _PAGE_KERNEL_RW         (_PAGE_RW | _PAGE_DIRTY) /* user access blocked by key */
+#define _PAGE_KERNEL_RO          _PAGE_KERNEL_RW
+
+/* Strong Access Ordering */
+#define _PAGE_SAO               (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
+
+/* No page size encoding in the linux PTE */
+#define _PAGE_PSIZE             0
+
+/* PTEIDX nibble */
+#define _PTEIDX_SECONDARY       0x8
+#define _PTEIDX_GROUP_IX        0x7
+
+/* Hash table based platforms need atomic updates of the linux PTE */
+#define PTE_ATOMIC_UPDATES      1
+
+#ifdef CONFIG_PPC_64K_PAGES
+#include <asm/pte-hash64-64k.h>
+#else
+#include <asm/pte-hash64-4k.h>
+#endif
+
+#endif /* __KERNEL__ */
+#endif /*  _ASM_POWERPC_PTE_HASH64_H */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f484a343efba..c9ff1ec97479 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -155,6 +155,8 @@
 #define   CTRL_RUNLATCH 0x1
 #define SPRN_DABR       0x3F5   /* Data Address Breakpoint Register */
 #define   DABR_TRANSLATION      (1UL << 2)
+#define   DABR_DATA_WRITE       (1UL << 1)
+#define   DABR_DATA_READ        (1UL << 0)
 #define SPRN_DABR2      0x13D   /* e300 */
 #define SPRN_DABRX      0x3F7   /* Data Address Breakpoint Register Extension */
 #define   DABRX_USER    (1UL << 0)
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 67453766bff1..a56f4d61aa72 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -10,6 +10,7 @@
 #define __ASM_POWERPC_REG_BOOKE_H__
 
 /* Machine State Register (MSR) Fields */
+#define MSR_GS          (1<<28) /* Guest state */
 #define MSR_UCLE        (1<<26) /* User-mode cache lock enable */
 #define MSR_SPE         (1<<25) /* Enable SPE */
 #define MSR_DWE         (1<<10) /* Debug Wait Enable */
@@ -110,6 +111,7 @@
 #define SPRN_L1CSR0     0x3F2   /* L1 Cache Control and Status Register 0 */
 #define SPRN_L1CSR1     0x3F3   /* L1 Cache Control and Status Register 1 */
 #define SPRN_MMUCSR0    0x3F4   /* MMU Control and Status Register 0 */
+#define SPRN_MMUCFG     0x3F7   /* MMU Configuration Register */
 #define SPRN_PIT        0x3DB   /* Programmable Interval Timer */
 #define SPRN_BUCSR      0x3F5   /* Branch Unit Control and Status */
 #define SPRN_L2CSR0     0x3F9   /* L2 Data Cache Control and Status Register 0 */
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index 2a4be19a92c4..f612798e1c93 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -531,7 +531,7 @@ __cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new,
 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
 #endif
 
-#define arch_align_stack(x) (x)
+extern unsigned long arch_align_stack(unsigned long sp);
 
 /* Used in very early kernel initialization. */
 extern unsigned long reloc_offset(void);
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index 9665a26a253a..9aba5a38a7c4 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -12,8 +12,10 @@
 
 /* We have 8k stacks on ppc32 and 16k on ppc64 */
 
-#ifdef CONFIG_PPC64
+#if defined(CONFIG_PPC64)
 #define THREAD_SHIFT            14
+#elif defined(CONFIG_PPC_256K_PAGES)
+#define THREAD_SHIFT            15
 #else
 #define THREAD_SHIFT            13
 #endif
@@ -154,6 +156,13 @@ static inline void set_restore_sigmask(void)
         ti->local_flags |= _TLF_RESTORE_SIGMASK;
         set_bit(TIF_SIGPENDING, &ti->flags);
 }
+
+#ifdef CONFIG_PPC64
+#define is_32bit_task() (test_thread_flag(TIF_32BIT))
+#else
+#define is_32bit_task() (1)
+#endif
+
 #endif  /* !__ASSEMBLY__ */
 
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
index 375258559ae6..054a16d68082 100644
--- a/arch/powerpc/include/asm/topology.h
+++ b/arch/powerpc/include/asm/topology.h
@@ -24,11 +24,6 @@ static inline cpumask_t node_to_cpumask(int node)
 
 #define cpumask_of_node(node) (&numa_cpumask_lookup_table[node])
 
-static inline int node_to_first_cpu(int node)
-{
-        return cpumask_first(cpumask_of_node(node));
-}
-
 int of_node_to_nid(struct device_node *device);
 
 struct pci_bus;
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index 6418ceea44b7..cd21e5e6b04f 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 
 extern void (*udbg_putc)(char c);
+extern void (*udbg_flush)(void);
 extern int (*udbg_getc)(void);
 extern int (*udbg_getc_poll)(void);
 
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 8d1a419df35d..71901fbda4a5 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -18,12 +18,10 @@ CFLAGS_REMOVE_cputable.o = -pg -mno-sched-epilog
 CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog
 CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog
 CFLAGS_REMOVE_prom.o = -pg -mno-sched-epilog
-
-ifdef CONFIG_DYNAMIC_FTRACE
-# dynamic ftrace setup.
+# do not trace tracer code
 CFLAGS_REMOVE_ftrace.o = -pg -mno-sched-epilog
-endif
-
+# timers used by tracing
+CFLAGS_REMOVE_time.o = -pg -mno-sched-epilog
 endif
 
 obj-y                           := cputable.o ptrace.o syscalls.o \
@@ -61,6 +59,7 @@ obj-$(CONFIG_HIBERNATION)	+= swsusp.o suspend.o \
 obj64-$(CONFIG_HIBERNATION)     += swsusp_asm64.o
 obj-$(CONFIG_MODULES)           += module.o module_$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_44x)               += cpu_setup_44x.o
+obj-$(CONFIG_FSL_BOOKE)         += cpu_setup_fsl_booke.o dbell.o
 
 extra-$(CONFIG_PPC_STD_MMU)     := head_32.o
 extra-$(CONFIG_PPC64)           := head_64.o
@@ -76,7 +75,7 @@ obj-y				+= time.o prom.o traps.o setup-common.o \
 obj-$(CONFIG_PPC32)             += entry_32.o setup_32.o
 obj-$(CONFIG_PPC64)             += dma-iommu.o iommu.o
 obj-$(CONFIG_KGDB)              += kgdb.o
-obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
+obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE)    += prom_init.o
 obj-$(CONFIG_MODULES)           += ppc_ksyms.o
 obj-$(CONFIG_BOOTX_TEXT)        += btext.o
 obj-$(CONFIG_SMP)               += smp.o
@@ -94,6 +93,7 @@ obj-$(CONFIG_AUDIT)		+= audit.o
 obj64-$(CONFIG_AUDIT)           += compat_audit.o
 
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
+obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
 
 obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
 
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 73cb6a3229ae..5ffcfaa77d6a 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -187,7 +187,7 @@ static struct aligninfo aligninfo[128] = {
         { 4, ST+F+S+U },        /* 11 1 1010: stfsux */
         { 8, ST+F+U },          /* 11 1 1011: stfdux */
         INVALID,                /* 11 1 1100 */
-        INVALID,                /* 11 1 1101 */
+        { 4, LD+F },            /* 11 1 1101: lfiwzx */
         INVALID,                /* 11 1 1110 */
         INVALID,                /* 11 1 1111 */
 };
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 42fe4da4e8ae..1e40bc053946 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -284,9 +284,6 @@ int main(void)
 #endif /* ! CONFIG_PPC64 */
 
         /* About the CPU features table */
-        DEFINE(CPU_SPEC_ENTRY_SIZE, sizeof(struct cpu_spec));
-        DEFINE(CPU_SPEC_PVR_MASK, offsetof(struct cpu_spec, pvr_mask));
-        DEFINE(CPU_SPEC_PVR_VALUE, offsetof(struct cpu_spec, pvr_value));
         DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
         DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
         DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
index 10b4ab1008af..7d606f89a839 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -34,6 +34,7 @@ _GLOBAL(__setup_cpu_440grx)
         blr
 _GLOBAL(__setup_cpu_460ex)
 _GLOBAL(__setup_cpu_460gt)
+_GLOBAL(__setup_cpu_460sx)
         mflr    r4
         bl      __init_fpu_44x
         bl      __fixup_440A_mcheck
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 72d1d7395254..54f767e31a1a 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -15,9 +15,14 @@
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/cache.h>
+#include <asm/mmu.h>
 
 _GLOBAL(__setup_cpu_603)
         mflr    r4
+BEGIN_MMU_FTR_SECTION
+        li      r10,0
+        mtspr   SPRN_SPRG4,r10          /* init SW LRU tracking */
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
 BEGIN_FTR_SECTION
         bl      __init_fpu_registers
 END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
new file mode 100644
index 000000000000..eb4b9adcedb4
--- /dev/null
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -0,0 +1,31 @@
+/*
+ * This file contains low level CPU setup functions.
+ * Kumar Gala <galak@kernel.crashing.org>
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * Based on cpu_setup_6xx code by
+ * Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <asm/processor.h>
+#include <asm/cputable.h>
+#include <asm/ppc_asm.h>
+
+_GLOBAL(__setup_cpu_e200)
+        /* enable dedicated debug exception handling resources (Debug APU) */
+        mfspr   r3,SPRN_HID0
+        ori     r3,r3,HID0_DAPUEN@l
+        mtspr   SPRN_HID0,r3
+        b       __setup_e200_ivors
+_GLOBAL(__setup_cpu_e500v1)
+_GLOBAL(__setup_cpu_e500v2)
+        b       __setup_e500_ivors
+_GLOBAL(__setup_cpu_e500mc)
+        b       __setup_e500mc_ivors
+
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 923f87aff20a..cd1b687544f3 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -35,6 +35,10 @@ const char *powerpc_base_platform;
  * and ppc64
  */
 #ifdef CONFIG_PPC32
+extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
@@ -43,6 +47,7 @@ extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -726,6 +731,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_setup              = __setup_cpu_750,
                 .machine_check          = machine_check_generic,
                 .platform               = "ppc750",
+                .oprofile_cpu_type      = "ppc/750",
+                .oprofile_type          = PPC_OPROFILE_G4,
         },
         {       /* 750FX rev 2.0 must disable HID0[DPM] */
                 .pvr_mask               = 0xffffffff,
@@ -741,6 +748,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_setup              = __setup_cpu_750,
                 .machine_check          = machine_check_generic,
                 .platform               = "ppc750",
+                .oprofile_cpu_type      = "ppc/750",
+                .oprofile_type          = PPC_OPROFILE_G4,
         },
         {       /* 750FX (All revs except 2.0) */
                 .pvr_mask               = 0xffff0000,
@@ -756,6 +765,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_setup              = __setup_cpu_750fx,
                 .machine_check          = machine_check_generic,
                 .platform               = "ppc750",
+                .oprofile_cpu_type      = "ppc/750",
+                .oprofile_type          = PPC_OPROFILE_G4,
         },
         {       /* 750GX */
                 .pvr_mask               = 0xffff0000,
@@ -771,6 +782,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_setup              = __setup_cpu_750fx,
                 .machine_check          = machine_check_generic,
                 .platform               = "ppc750",
+                .oprofile_cpu_type      = "ppc/750",
+                .oprofile_type          = PPC_OPROFILE_G4,
         },
         {       /* 740/750 (L2CR bit need fixup for 740) */
                 .pvr_mask               = 0xffff0000,
@@ -1077,7 +1090,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e300c2",
                 .cpu_features           = CPU_FTRS_E300C2,
                 .cpu_user_features      = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
-                .mmu_features           = MMU_FTR_USE_HIGH_BATS,
+                .mmu_features           = MMU_FTR_USE_HIGH_BATS |
+                        MMU_FTR_NEED_DTLB_SW_LRU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -1090,7 +1104,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e300c3",
                 .cpu_features           = CPU_FTRS_E300,
                 .cpu_user_features      = COMMON_USER,
-                .mmu_features           = MMU_FTR_USE_HIGH_BATS,
+                .mmu_features           = MMU_FTR_USE_HIGH_BATS |
+                        MMU_FTR_NEED_DTLB_SW_LRU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -1105,7 +1120,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e300c4",
                 .cpu_features           = CPU_FTRS_E300,
                 .cpu_user_features      = COMMON_USER,
-                .mmu_features           = MMU_FTR_USE_HIGH_BATS,
+                .mmu_features           = MMU_FTR_USE_HIGH_BATS |
+                        MMU_FTR_NEED_DTLB_SW_LRU,
                 .icache_bsize           = 32,
                 .dcache_bsize           = 32,
                 .cpu_setup              = __setup_cpu_603,
@@ -1634,6 +1650,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .machine_check          = machine_check_440A,
                 .platform               = "ppc440",
         },
+        { /* 460SX */
+                .pvr_mask               = 0xffffff00,
+                .pvr_value              = 0x13541800,
+                .cpu_name               = "460SX",
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER_BOOKE,
+                .mmu_features           = MMU_FTR_TYPE_44x,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+                .cpu_setup              = __setup_cpu_460sx,
+                .machine_check          = machine_check_440A,
+                .platform               = "ppc440",
+        },
         {       /* default match */
                 .pvr_mask               = 0x00000000,
                 .pvr_value              = 0x00000000,
@@ -1687,6 +1716,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                         PPC_FEATURE_UNIFIED_CACHE,
                 .mmu_features           = MMU_FTR_TYPE_FSL_E,
                 .dcache_bsize           = 32,
+                .cpu_setup              = __setup_cpu_e200,
                 .machine_check          = machine_check_e200,
                 .platform               = "ppc5554",
         }
@@ -1706,6 +1736,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .num_pmcs               = 4,
                 .oprofile_cpu_type      = "ppc/e500",
                 .oprofile_type          = PPC_OPROFILE_FSL_EMB,
+                .cpu_setup              = __setup_cpu_e500v1,
                 .machine_check          = machine_check_e500,
                 .platform               = "ppc8540",
         },
@@ -1724,6 +1755,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .num_pmcs               = 4,
                 .oprofile_cpu_type      = "ppc/e500",
                 .oprofile_type          = PPC_OPROFILE_FSL_EMB,
+                .cpu_setup              = __setup_cpu_e500v2,
                 .machine_check          = machine_check_e500,
                 .platform               = "ppc8548",
         },
@@ -1733,12 +1765,14 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 .cpu_name               = "e500mc",
                 .cpu_features           = CPU_FTRS_E500MC,
                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
-                .mmu_features           = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
+                        MMU_FTR_USE_TLBILX,
                 .icache_bsize           = 64,
                 .dcache_bsize           = 64,
                 .num_pmcs               = 4,
                 .oprofile_cpu_type      = "ppc/e500", /* xxx - galak, e500mc? */
                 .oprofile_type          = PPC_OPROFILE_FSL_EMB,
+                .cpu_setup              = __setup_cpu_e500mc,
                 .machine_check          = machine_check_e500,
                 .platform               = "ppce500mc",
         },
@@ -1762,74 +1796,84 @@ static struct cpu_spec __initdata cpu_specs[] = {
 
 static struct cpu_spec the_cpu_spec;
 
-struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
+static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
 {
-        struct cpu_spec *s = cpu_specs;
         struct cpu_spec *t = &the_cpu_spec;
-        int i;
+        struct cpu_spec old;
 
-        s = PTRRELOC(s);
         t = PTRRELOC(t);
+        old = *t;
 
-        for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
-                if ((pvr & s->pvr_mask) == s->pvr_value) {
-                        /*
-                         * If we are overriding a previous value derived
-                         * from the real PVR with a new value obtained
-                         * using a logical PVR value, don't modify the
-                         * performance monitor fields.
-                         */
-                        if (t->num_pmcs && !s->num_pmcs) {
-                                t->cpu_name = s->cpu_name;
-                                t->cpu_features = s->cpu_features;
-                                t->cpu_user_features = s->cpu_user_features;
-                                t->icache_bsize = s->icache_bsize;
-                                t->dcache_bsize = s->dcache_bsize;
-                                t->cpu_setup = s->cpu_setup;
-                                t->cpu_restore = s->cpu_restore;
-                                t->platform = s->platform;
-                                /*
-                                 * If we have passed through this logic once
-                                 * before and have pulled the default case
-                                 * because the real PVR was not found inside
-                                 * cpu_specs[], then we are possibly running in
-                                 * compatibility mode. In that case, let the
-                                 * oprofiler know which set of compatibility
-                                 * counters to pull from by making sure the
-                                 * oprofile_cpu_type string is set to that of
-                                 * compatibility mode. If the oprofile_cpu_type
-                                 * already has a value, then we are possibly
-                                 * overriding a real PVR with a logical one, and,
-                                 * in that case, keep the current value for
-                                 * oprofile_cpu_type.
-                                 */
-                                if (t->oprofile_cpu_type == NULL)
-                                        t->oprofile_cpu_type = s->oprofile_cpu_type;
-                        } else
-                                *t = *s;
-                        *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
+        /* Copy everything, then do fixups */
+        *t = *s;
+
+        /*
+         * If we are overriding a previous value derived from the real
+         * PVR with a new value obtained using a logical PVR value,
+         * don't modify the performance monitor fields.
+         */
+        if (old.num_pmcs && !s->num_pmcs) {
+                t->num_pmcs = old.num_pmcs;
+                t->pmc_type = old.pmc_type;
+                t->oprofile_type = old.oprofile_type;
+                t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
+                t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
+                t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
+
+                /*
+                 * If we have passed through this logic once before and
+                 * have pulled the default case because the real PVR was
+                 * not found inside cpu_specs[], then we are possibly
+                 * running in compatibility mode. In that case, let the
+                 * oprofiler know which set of compatibility counters to
+                 * pull from by making sure the oprofile_cpu_type string
+                 * is set to that of compatibility mode. If the
+                 * oprofile_cpu_type already has a value, then we are
+                 * possibly overriding a real PVR with a logical one,
+                 * and, in that case, keep the current value for
+                 * oprofile_cpu_type.
+                 */
+                if (old.oprofile_cpu_type == NULL)
+                        t->oprofile_cpu_type = s->oprofile_cpu_type;
+        }
 
-                        /*
-                         * Set the base platform string once; assumes
-                         * we're called with real pvr first.
-                         */
-                        if (*PTRRELOC(&powerpc_base_platform) == NULL)
-                                *PTRRELOC(&powerpc_base_platform) = t->platform;
+        *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
+
+        /*
+         * Set the base platform string once; assumes
+         * we're called with real pvr first.
+         */
+        if (*PTRRELOC(&powerpc_base_platform) == NULL)
+                *PTRRELOC(&powerpc_base_platform) = t->platform;
 
 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
-                        /* ppc64 and booke expect identify_cpu to also call
-                         * setup_cpu for that processor. I will consolidate
-                         * that at a later time, for now, just use #ifdef.
-                         * we also don't need to PTRRELOC the function pointer
-                         * on ppc64 and booke as we are running at 0 in real
-                         * mode on ppc64 and reloc_offset is always 0 on booke.
-                         */
-                        if (s->cpu_setup) {
-                                s->cpu_setup(offset, s);
-                        }
+        /* ppc64 and booke expect identify_cpu to also call setup_cpu for
+         * that processor. I will consolidate that at a later time, for now,
+         * just use #ifdef. We also don't need to PTRRELOC the function
+         * pointer on ppc64 and booke as we are running at 0 in real mode
+         * on ppc64 and reloc_offset is always 0 on booke.
+         */
+        if (s->cpu_setup) {
+                s->cpu_setup(offset, s);
+        }
 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
+}
+
+struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
+{
+        struct cpu_spec *s = cpu_specs;
+        int i;
+
+        s = PTRRELOC(s);
+
+        for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
+                if ((pvr & s->pvr_mask) == s->pvr_value) {
+                        setup_cpu_spec(offset, s);
                         return s;
                 }
+        }
+
         BUG();
+
         return NULL;
 }
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 19671aca6591..5fb667a60894 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -48,7 +48,7 @@ static void __init create_trampoline(unsigned long addr)
          * branch to "addr" we jump to ("addr" + 32 MB). Although it requires
          * two instructions it doesn't require any registers.
          */
-        patch_instruction(p, PPC_NOP_INSTR);
+        patch_instruction(p, PPC_INST_NOP);
         patch_branch(++p, addr + PHYSICAL_START, 0);
 }
 
diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/dbell.c
new file mode 100644
index 000000000000..1493734cd871
--- /dev/null
+++ b/arch/powerpc/kernel/dbell.c
@@ -0,0 +1,44 @@
+/*
+ * Author: Kumar Gala <galak@kernel.crashing.org>
+ *
+ * Copyright 2009 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/smp.h>
+#include <linux/threads.h>
+
+#include <asm/dbell.h>
+
+#ifdef CONFIG_SMP
+unsigned long dbell_smp_message[NR_CPUS];
+
+void smp_dbell_message_pass(int target, int msg)
+{
+        int i;
+
+        if(target < NR_CPUS) {
+                set_bit(msg, &dbell_smp_message[target]);
+                ppc_msgsnd(PPC_DBELL, 0, target);
+        }
+        else if(target == MSG_ALL_BUT_SELF) {
+                for_each_online_cpu(i) {
+                        if (i == smp_processor_id())
+                                continue;
+                        set_bit(msg, &dbell_smp_message[i]);
+                        ppc_msgsnd(PPC_DBELL, 0, i);
+                }
+        }
+        else { /* target == MSG_ALL */
+                for_each_online_cpu(i)
+                        set_bit(msg, &dbell_smp_message[i]);
+                ppc_msgsnd(PPC_DBELL, PPC_DBELL_MSG_BRDCAST, 0);
+        }
+}
+#endif
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 6f7eb7e00c79..4dd38f129153 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -63,7 +63,7 @@ debug_transfer_to_handler:
 
         .globl  crit_transfer_to_handler
 crit_transfer_to_handler:
-#ifdef CONFIG_FSL_BOOKE
+#ifdef CONFIG_PPC_BOOK3E_MMU
         mfspr   r0,SPRN_MAS0
         stw     r0,MAS0(r11)
         mfspr   r0,SPRN_MAS1
@@ -78,7 +78,7 @@ crit_transfer_to_handler:
         mfspr   r0,SPRN_MAS7
         stw     r0,MAS7(r11)
 #endif /* CONFIG_PHYS_64BIT */
-#endif /* CONFIG_FSL_BOOKE */
+#endif /* CONFIG_PPC_BOOK3E_MMU */
 #ifdef CONFIG_44x
         mfspr   r0,SPRN_MMUCR
         stw     r0,MMUCR(r11)
@@ -914,7 +914,7 @@ exc_exit_restart_end:
         mtspr   SPRN_##exc_lvl_srr0,r9;                                 \
         mtspr   SPRN_##exc_lvl_srr1,r10;
 
-#if defined(CONFIG_FSL_BOOKE)
+#if defined(CONFIG_PPC_BOOK3E_MMU)
 #ifdef CONFIG_PHYS_64BIT
 #define RESTORE_MAS7                                                    \
         lwz     r11,MAS7(r1);                                           \
@@ -956,7 +956,7 @@ ret_from_crit_exc:
         lwz     r10,crit_srr1@l(r10);
         mtspr   SPRN_SRR0,r9;
         mtspr   SPRN_SRR1,r10;
-        RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
+        RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, PPC_RFCI)
 #endif /* CONFIG_40x */
 
 #ifdef CONFIG_BOOKE
@@ -967,7 +967,7 @@ ret_from_crit_exc:
         stw     r10,KSP_LIMIT(r9)
         RESTORE_xSRR(SRR0,SRR1);
         RESTORE_MMU_REGS;
-        RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
+        RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, PPC_RFCI)
 
         .globl  ret_from_debug_exc
 ret_from_debug_exc:
@@ -981,7 +981,7 @@ ret_from_debug_exc:
         RESTORE_xSRR(SRR0,SRR1);
         RESTORE_xSRR(CSRR0,CSRR1);
         RESTORE_MMU_REGS;
-        RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI)
+        RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, PPC_RFDI)
 
         .globl  ret_from_mcheck_exc
 ret_from_mcheck_exc:
@@ -992,7 +992,7 @@ ret_from_mcheck_exc:
         RESTORE_xSRR(CSRR0,CSRR1);
         RESTORE_xSRR(DSRR0,DSRR1);
         RESTORE_MMU_REGS;
-        RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI)
+        RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, PPC_RFMCI)
 #endif /* CONFIG_BOOKE */
 
 /*
@@ -1176,59 +1176,27 @@ _GLOBAL(_mcount)
         bctr
 
 _GLOBAL(ftrace_caller)
-        /* Based off of objdump optput from glibc */
-        stwu    r1,-48(r1)
-        stw     r3, 12(r1)
-        stw     r4, 16(r1)
-        stw     r5, 20(r1)
-        stw     r6, 24(r1)
-        mflr    r3
-        lwz     r4, 52(r1)
-        mfcr    r5
-        stw     r7, 28(r1)
-        stw     r8, 32(r1)
-        stw     r9, 36(r1)
-        stw     r10,40(r1)
-        stw     r3, 44(r1)
-        stw     r5, 8(r1)
+        MCOUNT_SAVE_FRAME
+        /* r3 ends up with link register */
         subi    r3, r3, MCOUNT_INSN_SIZE
 .globl ftrace_call
 ftrace_call:
         bl      ftrace_stub
         nop
-        lwz     r6, 8(r1)
-        lwz     r0, 44(r1)
-        lwz     r3, 12(r1)
-        mtctr   r0
-        lwz     r4, 16(r1)
-        mtcr    r6
-        lwz     r5, 20(r1)
-        lwz     r6, 24(r1)
-        lwz     r0, 52(r1)
-        lwz     r7, 28(r1)
-        lwz     r8, 32(r1)
-        mtlr    r0
-        lwz     r9, 36(r1)
-        lwz     r10,40(r1)
-        addi    r1, r1, 48
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+.globl ftrace_graph_call
+ftrace_graph_call:
+        b       ftrace_graph_stub
+_GLOBAL(ftrace_graph_stub)
+#endif
+        MCOUNT_RESTORE_FRAME
+        /* old link register ends up in ctr reg */
         bctr
 #else
 _GLOBAL(mcount)
 _GLOBAL(_mcount)
-        stwu    r1,-48(r1)
-        stw     r3, 12(r1)
-        stw     r4, 16(r1)
-        stw     r5, 20(r1)
-        stw     r6, 24(r1)
-        mflr    r3
-        lwz     r4, 52(r1)
-        mfcr    r5
-        stw     r7, 28(r1)
-        stw     r8, 32(r1)
-        stw     r9, 36(r1)
-        stw     r10,40(r1)
-        stw     r3, 44(r1)
-        stw     r5, 8(r1)
+
+        MCOUNT_SAVE_FRAME
 
         subi    r3, r3, MCOUNT_INSN_SIZE
         LOAD_REG_ADDR(r5, ftrace_trace_function)
@@ -1236,28 +1204,55 @@ _GLOBAL(_mcount)
 
         mtctr   r5
         bctrl
-
         nop
 
-        lwz     r6, 8(r1)
-        lwz     r0, 44(r1)
-        lwz     r3, 12(r1)
-        mtctr   r0
-        lwz     r4, 16(r1)
-        mtcr    r6
-        lwz     r5, 20(r1)
-        lwz     r6, 24(r1)
-        lwz     r0, 52(r1)
-        lwz     r7, 28(r1)
-        lwz     r8, 32(r1)
-        mtlr    r0
-        lwz     r9, 36(r1)
-        lwz     r10,40(r1)
-        addi    r1, r1, 48
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        b       ftrace_graph_caller
+#endif
+        MCOUNT_RESTORE_FRAME
         bctr
 #endif
 
 _GLOBAL(ftrace_stub)
         blr
 
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+_GLOBAL(ftrace_graph_caller)
+        /* load r4 with local address */
+        lwz     r4, 44(r1)
+        subi    r4, r4, MCOUNT_INSN_SIZE
+
+        /* get the parent address */
+        addi    r3, r1, 52
+
+        bl      prepare_ftrace_return
+        nop
+
+        MCOUNT_RESTORE_FRAME
+        /* old link register ends up in ctr reg */
+        bctr
+
+_GLOBAL(return_to_handler)
+        /* need to save return values */
+        stwu    r1, -32(r1)
+        stw     r3, 20(r1)
+        stw     r4, 16(r1)
+        stw     r31, 12(r1)
+        mr      r31, r1
+
+        bl      ftrace_return_to_handler
+        nop
+
+        /* return value has real return address */
+        mtlr    r3
+
+        lwz     r3, 20(r1)
+        lwz     r4, 16(r1)
+        lwz     r31,12(r1)
+        lwz     r1, 0(r1)
+
+        /* Jump back to real return address */
+        blr
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+
 #endif /* CONFIG_MCOUNT */
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 383ed6eb0085..abfc32330479 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -908,6 +908,12 @@ _GLOBAL(ftrace_caller)
 ftrace_call:
         bl      ftrace_stub
         nop
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+.globl ftrace_graph_call
+ftrace_graph_call:
+        b       ftrace_graph_stub
+_GLOBAL(ftrace_graph_stub)
+#endif
         ld      r0, 128(r1)
         mtlr    r0
         addi    r1, r1, 112
@@ -931,13 +937,90 @@ _GLOBAL(_mcount)
         ld      r5,0(r5)
         mtctr   r5
         bctrl
-
         nop
+
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        b       ftrace_graph_caller
+#endif
         ld      r0, 128(r1)
         mtlr    r0
         addi    r1, r1, 112
 _GLOBAL(ftrace_stub)
         blr
 
-#endif
-#endif
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+_GLOBAL(ftrace_graph_caller)
+        /* load r4 with local address */
+        ld      r4, 128(r1)
+        subi    r4, r4, MCOUNT_INSN_SIZE
+
+        /* get the parent address */
+        ld      r11, 112(r1)
+        addi    r3, r11, 16
+
+        bl      .prepare_ftrace_return
+        nop
+
+        ld      r0, 128(r1)
+        mtlr    r0
+        addi    r1, r1, 112
+        blr
+
+_GLOBAL(return_to_handler)
+        /* need to save return values */
+        std     r4,  -24(r1)
+        std     r3,  -16(r1)
+        std     r31, -8(r1)
+        mr      r31, r1
+        stdu    r1, -112(r1)
+
+        bl      .ftrace_return_to_handler
+        nop
+
+        /* return value has real return address */
+        mtlr    r3
+
+        ld      r1, 0(r1)
+        ld      r4,  -24(r1)
+        ld      r3,  -16(r1)
+        ld      r31, -8(r1)
+
+        /* Jump back to real return address */
+        blr
+
+_GLOBAL(mod_return_to_handler)
+        /* need to save return values */
+        std     r4,  -32(r1)
+        std     r3,  -24(r1)
+        /* save TOC */
+        std     r2,  -16(r1)
+        std     r31, -8(r1)
+        mr      r31, r1
+        stdu    r1, -112(r1)
+
+        /*
+         * We are in a module using the module's TOC.
+         * Switch to our TOC to run inside the core kernel.
+         */
+        LOAD_REG_IMMEDIATE(r4,ftrace_return_to_handler)
+        ld      r2, 8(r4)
+
+        bl      .ftrace_return_to_handler
+        nop
+
+        /* return value has real return address */
+        mtlr    r3
+
+        ld      r1, 0(r1)
+        ld      r4,  -32(r1)
+        ld      r3,  -24(r1)
+        ld      r2,  -16(r1)
+        ld      r31, -8(r1)
+
+        /* Jump back to real return address */
+        blr
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+#endif /* CONFIG_FUNCTION_TRACER */
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 60c60ccf5e3c..5b5d16b2cac8 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -5,6 +5,9 @@
  *
  * Thanks goes out to P.A. Semi, Inc for supplying me with a PPC64 box.
  *
+ * Added function graph tracer code, taken from x86 that was written
+ * by Frederic Weisbecker, and ported to PPC by Steven Rostedt.
+ *
  */
 
 #include <linux/spinlock.h>
@@ -20,14 +23,6 @@
 #include <asm/code-patching.h>
 #include <asm/ftrace.h>
 
-#if 0
-#define DEBUGP printk
-#else
-#define DEBUGP(fmt , ...)       do { } while (0)
-#endif
-
-static unsigned int ftrace_nop = PPC_NOP_INSTR;
-
 #ifdef CONFIG_PPC32
 # define GET_ADDR(addr) addr
 #else
@@ -35,37 +30,23 @@ static unsigned int ftrace_nop = PPC_NOP_INSTR;
 # define GET_ADDR(addr) (*(unsigned long *)addr)
 #endif
 
-
-static unsigned int ftrace_calc_offset(long ip, long addr)
+#ifdef CONFIG_DYNAMIC_FTRACE
+static unsigned int ftrace_nop_replace(void)
 {
-        return (int)(addr - ip);
+        return PPC_INST_NOP;
 }
 
-static unsigned char *ftrace_nop_replace(void)
+static unsigned int
+ftrace_call_replace(unsigned long ip, unsigned long addr, int link)
 {
-        return (char *)&ftrace_nop;
-}
-
-static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
-{
-        static unsigned int op;
+        unsigned int op;
 
-        /*
-         * It would be nice to just use create_function_call, but that will
-         * update the code itself. Here we need to just return the
-         * instruction that is going to be modified, without modifying the
-         * code.
-         */
         addr = GET_ADDR(addr);
 
-        /* Set to "bl addr" */
-        op = 0x48000001 | (ftrace_calc_offset(ip, addr) & 0x03fffffc);
+        /* if (link) set op to 'bl' else 'b' */
+        op = create_branch((unsigned int *)ip, addr, link ? 1 : 0);
 
-        /*
-         * No locking needed, this must be called via kstop_machine
-         * which in essence is like running on a uniprocessor machine.
-         */
-        return (unsigned char *)&op;
+        return op;
 }
 
 #ifdef CONFIG_PPC64
@@ -77,10 +58,9 @@ static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr)
 #endif
 
 static int
-ftrace_modify_code(unsigned long ip, unsigned char *old_code,
-                   unsigned char *new_code)
+ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
 {
-        unsigned char replaced[MCOUNT_INSN_SIZE];
+        unsigned int replaced;
 
         /*
          * Note: Due to modules and __init, code can
@@ -93,15 +73,15 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code,
          */
 
         /* read the text we want to modify */
-        if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE))
+        if (probe_kernel_read(&replaced, (void *)ip, MCOUNT_INSN_SIZE))
                 return -EFAULT;
 
         /* Make sure it is what we expect it to be */
-        if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0)
+        if (replaced != old)
                 return -EINVAL;
 
         /* replace the text with the new text */
-        if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE))
+        if (probe_kernel_write((void *)ip, &new, MCOUNT_INSN_SIZE))
                 return -EPERM;
 
         flush_icache_range(ip, ip + 8);
@@ -119,6 +99,8 @@ static int test_24bit_addr(unsigned long ip, unsigned long addr)
         return create_branch((unsigned int *)ip, addr, 0);
 }
 
+#ifdef CONFIG_MODULES
+
 static int is_bl_op(unsigned int op)
 {
         return (op & 0xfc000003) == 0x48000001;
@@ -175,7 +157,7 @@ __ftrace_make_nop(struct module *mod,
          * 0xe8, 0x4c, 0x00, 0x28,    ld      r2,40(r12)
          */
 
-        DEBUGP("ip:%lx jumps to %lx r2: %lx", ip, tramp, mod->arch.toc);
+        pr_debug("ip:%lx jumps to %lx r2: %lx", ip, tramp, mod->arch.toc);
 
         /* Find where the trampoline jumps to */
         if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
@@ -183,7 +165,7 @@ __ftrace_make_nop(struct module *mod,
                 return -EFAULT;
         }
 
-        DEBUGP(" %08x %08x", jmp[0], jmp[1]);
+        pr_debug(" %08x %08x", jmp[0], jmp[1]);
 
         /* verify that this is what we expect it to be */
         if (((jmp[0] & 0xffff0000) != 0x3d820000) ||
@@ -199,18 +181,18 @@ __ftrace_make_nop(struct module *mod,
         offset = ((unsigned)((unsigned short)jmp[0]) << 16) +
                 (int)((short)jmp[1]);
 
-        DEBUGP(" %x ", offset);
+        pr_debug(" %x ", offset);
 
         /* get the address this jumps too */
         tramp = mod->arch.toc + offset + 32;
-        DEBUGP("toc: %lx", tramp);
+        pr_debug("toc: %lx", tramp);
 
         if (probe_kernel_read(jmp, (void *)tramp, 8)) {
                 printk(KERN_ERR "Failed to read %lx\n", tramp);
                 return -EFAULT;
         }
 
-        DEBUGP(" %08x %08x\n", jmp[0], jmp[1]);
+        pr_debug(" %08x %08x\n", jmp[0], jmp[1]);
 
         ptr = ((unsigned long)jmp[0] << 32) + jmp[1];
 
@@ -287,7 +269,7 @@ __ftrace_make_nop(struct module *mod,
          *  0x4e, 0x80, 0x04, 0x20  bctr
          */
 
-        DEBUGP("ip:%lx jumps to %lx", ip, tramp);
+        pr_debug("ip:%lx jumps to %lx", ip, tramp);
 
         /* Find where the trampoline jumps to */
         if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
@@ -295,7 +277,7 @@ __ftrace_make_nop(struct module *mod,
                 return -EFAULT;
         }
 
-        DEBUGP(" %08x %08x ", jmp[0], jmp[1]);
+        pr_debug(" %08x %08x ", jmp[0], jmp[1]);
 
         /* verify that this is what we expect it to be */
         if (((jmp[0] & 0xffff0000) != 0x3d600000) ||
@@ -311,7 +293,7 @@ __ftrace_make_nop(struct module *mod,
         if (tramp & 0x8000)
                 tramp -= 0x10000;
 
-        DEBUGP(" %x ", tramp);
+        pr_debug(" %x ", tramp);
 
         if (tramp != addr) {
                 printk(KERN_ERR
@@ -320,7 +302,7 @@ __ftrace_make_nop(struct module *mod,
                 return -EINVAL;
         }
 
-        op = PPC_NOP_INSTR;
+        op = PPC_INST_NOP;
 
         if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
                 return -EPERM;
@@ -330,12 +312,13 @@ __ftrace_make_nop(struct module *mod,
         return 0;
 }
 #endif /* PPC64 */
+#endif /* CONFIG_MODULES */
 
 int ftrace_make_nop(struct module *mod,
                     struct dyn_ftrace *rec, unsigned long addr)
 {
-        unsigned char *old, *new;
         unsigned long ip = rec->ip;
+        unsigned int old, new;
 
         /*
          * If the calling address is more that 24 bits away,
@@ -344,11 +327,12 @@ int ftrace_make_nop(struct module *mod,
          */
         if (test_24bit_addr(ip, addr)) {
                 /* within range */
-                old = ftrace_call_replace(ip, addr);
+                old = ftrace_call_replace(ip, addr, 1);
                 new = ftrace_nop_replace();
                 return ftrace_modify_code(ip, old, new);
         }
 
+#ifdef CONFIG_MODULES
         /*
          * Out of range jumps are called from modules.
          * We should either already have a pointer to the module
@@ -373,9 +357,13 @@ int ftrace_make_nop(struct module *mod,
                 mod = rec->arch.mod;
 
         return __ftrace_make_nop(mod, rec, addr);
-
+#else
+        /* We should not get here without modules */
+        return -EINVAL;
+#endif /* CONFIG_MODULES */
 }
 
+#ifdef CONFIG_MODULES
 #ifdef CONFIG_PPC64
 static int
 __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
@@ -392,7 +380,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
          *  b +8; ld r2,40(r1)
          */
         if (((op[0] != 0x48000008) || (op[1] != 0xe8410028)) &&
-            ((op[0] != PPC_NOP_INSTR) || (op[1] != PPC_NOP_INSTR))) {
+            ((op[0] != PPC_INST_NOP) || (op[1] != PPC_INST_NOP))) {
                 printk(KERN_ERR "Expected NOPs but have %x %x\n", op[0], op[1]);
                 return -EINVAL;
         }
@@ -414,7 +402,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
         /* ld r2,40(r1) */
         op[1] = 0xe8410028;
 
-        DEBUGP("write to %lx\n", rec->ip);
+        pr_debug("write to %lx\n", rec->ip);
 
         if (probe_kernel_write((void *)ip, op, MCOUNT_INSN_SIZE * 2))
                 return -EPERM;
@@ -435,7 +423,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
                 return -EFAULT;
 
         /* It should be pointing to a nop */
-        if (op != PPC_NOP_INSTR) {
+        if (op != PPC_INST_NOP) {
                 printk(KERN_ERR "Expected NOP but have %x\n", op);
                 return -EINVAL;
         }
@@ -454,7 +442,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
                 return -EINVAL;
         }
 
-        DEBUGP("write to %lx\n", rec->ip);
+        pr_debug("write to %lx\n", rec->ip);
 
         if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
                 return -EPERM;
@@ -464,11 +452,12 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
         return 0;
 }
 #endif /* CONFIG_PPC64 */
+#endif /* CONFIG_MODULES */
 
 int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
 {
-        unsigned char *old, *new;
         unsigned long ip = rec->ip;
+        unsigned int old, new;
 
         /*
          * If the calling address is more that 24 bits away,
@@ -478,10 +467,11 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
         if (test_24bit_addr(ip, addr)) {
                 /* within range */
                 old = ftrace_nop_replace();
-                new = ftrace_call_replace(ip, addr);
+                new = ftrace_call_replace(ip, addr, 1);
                 return ftrace_modify_code(ip, old, new);
         }
 
+#ifdef CONFIG_MODULES
         /*
          * Out of range jumps are called from modules.
          * Being that we are converting from nop, it had better
@@ -493,16 +483,20 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
         }
 
         return __ftrace_make_call(rec, addr);
+#else
+        /* We should not get here without modules */
+        return -EINVAL;
+#endif /* CONFIG_MODULES */
 }
 
 int ftrace_update_ftrace_func(ftrace_func_t func)
 {
         unsigned long ip = (unsigned long)(&ftrace_call);
-        unsigned char old[MCOUNT_INSN_SIZE], *new;
+        unsigned int old, new;
         int ret;
 
-        memcpy(old, &ftrace_call, MCOUNT_INSN_SIZE);
-        new = ftrace_call_replace(ip, (unsigned long)func);
+        old = *(unsigned int *)&ftrace_call;
+        new = ftrace_call_replace(ip, (unsigned long)func, 1);
         ret = ftrace_modify_code(ip, old, new);
 
         return ret;
@@ -517,3 +511,115 @@ int __init ftrace_dyn_arch_init(void *data)
 
         return 0;
 }
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+extern void ftrace_graph_call(void);
+extern void ftrace_graph_stub(void);
+
+int ftrace_enable_ftrace_graph_caller(void)
+{
+        unsigned long ip = (unsigned long)(&ftrace_graph_call);
+        unsigned long addr = (unsigned long)(&ftrace_graph_caller);
+        unsigned long stub = (unsigned long)(&ftrace_graph_stub);
+        unsigned int old, new;
+
+        old = ftrace_call_replace(ip, stub, 0);
+        new = ftrace_call_replace(ip, addr, 0);
+
+        return ftrace_modify_code(ip, old, new);
+}
+
+int ftrace_disable_ftrace_graph_caller(void)
+{
+        unsigned long ip = (unsigned long)(&ftrace_graph_call);
+        unsigned long addr = (unsigned long)(&ftrace_graph_caller);
+        unsigned long stub = (unsigned long)(&ftrace_graph_stub);
+        unsigned int old, new;
+
+        old = ftrace_call_replace(ip, addr, 0);
+        new = ftrace_call_replace(ip, stub, 0);
+
+        return ftrace_modify_code(ip, old, new);
+}
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+#ifdef CONFIG_PPC64
+extern void mod_return_to_handler(void);
+#endif
+
+/*
+ * Hook the return address and push it in the stack of return addrs
+ * in current thread info.
+ */
+void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
+{
+        unsigned long old;
+        unsigned long long calltime;
+        int faulted;
+        struct ftrace_graph_ent trace;
+        unsigned long return_hooker = (unsigned long)&return_to_handler;
+
+        if (unlikely(atomic_read(&current->tracing_graph_pause)))
+                return;
+
+#if CONFIG_PPC64
+        /* non core kernel code needs to save and restore the TOC */
+        if (REGION_ID(self_addr) != KERNEL_REGION_ID)
+                return_hooker = (unsigned long)&mod_return_to_handler;
+#endif
+
+        return_hooker = GET_ADDR(return_hooker);
+
+        /*
+         * Protect against fault, even if it shouldn't
+         * happen. This tool is too much intrusive to
+         * ignore such a protection.
+         */
+        asm volatile(
+                "1: " PPC_LL "%[old], 0(%[parent])\n"
+                "2: " PPC_STL "%[return_hooker], 0(%[parent])\n"
+                "   li %[faulted], 0\n"
+                "3:\n"
+
+                ".section .fixup, \"ax\"\n"
+                "4: li %[faulted], 1\n"
+                "   b 3b\n"
+                ".previous\n"
+
+                ".section __ex_table,\"a\"\n"
+                        PPC_LONG_ALIGN "\n"
+                        PPC_LONG "1b,4b\n"
+                        PPC_LONG "2b,4b\n"
+                ".previous"
+
+                : [old] "=r" (old), [faulted] "=r" (faulted)
+                : [parent] "r" (parent), [return_hooker] "r" (return_hooker)
+                : "memory"
+        );
+
+        if (unlikely(faulted)) {
+                ftrace_graph_stop();
+                WARN_ON(1);
+                return;
+        }
+
+        calltime = cpu_clock(raw_smp_processor_id());
+
+        if (ftrace_push_return_trace(old, calltime,
+                                self_addr, &trace.depth) == -EBUSY) {
+                *parent = old;
+                return;
+        }
+
+        trace.func = self_addr;
+
+        /* Only trace if the calling function expects to */
+        if (!ftrace_graph_entry(&trace)) {
+                current->curr_ret_stack--;
+                *parent = old;
+        }
+}
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index d794a637e421..54e68c11ae15 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -108,18 +108,21 @@ __start:
  * because OF may have I/O devices mapped into that area
  * (particularly on CHRP).
  */
-#ifdef CONFIG_PPC_MULTIPLATFORM
         cmpwi   0,r5,0
         beq     1f
 
+#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
         /* find out where we are now */
         bcl     20,31,$+4
 0:      mflr    r8                      /* r8 = runtime addr here */
         addis   r8,r8,(_stext - 0b)@ha
         addi    r8,r8,(_stext - 0b)@l   /* current runtime base addr */
         bl      prom_init
+#endif /* CONFIG_PPC_OF_BOOT_TRAMPOLINE */
+
+        /* We never return. We also hit that trap if trying to boot
+         * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
         trap
-#endif
 
 /*
  * Check for BootX signature when supporting PowerMac and branch to
@@ -472,12 +475,11 @@ SystemCall:
         . = 0x1000
 InstructionTLBMiss:
 /*
- * r0:  stored ctr
+ * r0:  scratch
  * r1:  linux style pte ( later becomes ppc hardware pte )
  * r2:  ptr to linux-style pte
  * r3:  scratch
  */
-        mfctr   r0
         /* Get PTE (linux-style) and check access */
         mfspr   r3,SPRN_IMISS
         lis     r1,PAGE_OFFSET@h                /* check if kernel address */
@@ -496,28 +498,27 @@ InstructionTLBMiss:
         rlwinm. r2,r2,0,0,19            /* extract address of pte page */
         beq-    InstructionAddressInvalid       /* return if no mapping */
         rlwimi  r2,r3,22,20,29          /* insert next 10 bits of address */
-        lwz     r3,0(r2)                /* get linux-style pte */
-        andc.   r1,r1,r3                /* check access & ~permission */
+        lwz     r0,0(r2)                /* get linux-style pte */
+        andc.   r1,r1,r0                /* check access & ~permission */
         bne-    InstructionAddressInvalid /* return if access not permitted */
-        ori     r3,r3,_PAGE_ACCESSED    /* set _PAGE_ACCESSED in pte */
+        ori     r0,r0,_PAGE_ACCESSED    /* set _PAGE_ACCESSED in pte */
         /*
          * NOTE! We are assuming this is not an SMP system, otherwise
          * we would need to update the pte atomically with lwarx/stwcx.
          */
-        stw     r3,0(r2)                /* update PTE (accessed bit) */
+        stw     r0,0(r2)                /* update PTE (accessed bit) */
         /* Convert linux-style PTE to low word of PPC-style PTE */
-        rlwinm  r1,r3,32-10,31,31       /* _PAGE_RW -> PP lsb */
-        rlwinm  r2,r3,32-7,31,31        /* _PAGE_DIRTY -> PP lsb */
+        rlwinm  r1,r0,32-10,31,31       /* _PAGE_RW -> PP lsb */
+        rlwinm  r2,r0,32-7,31,31        /* _PAGE_DIRTY -> PP lsb */
         and     r1,r1,r2                /* writable if _RW and _DIRTY */
-        rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
-        rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
+        rlwimi  r0,r0,32-1,30,30        /* _PAGE_USER -> PP msb */
+        rlwimi  r0,r0,32-1,31,31        /* _PAGE_USER -> PP lsb */
         ori     r1,r1,0xe04             /* clear out reserved bits */
-        andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
+        andc    r1,r0,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
 BEGIN_FTR_SECTION
         rlwinm  r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
 END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         mtspr   SPRN_RPA,r1
-        mfspr   r3,SPRN_IMISS
         tlbli   r3
         mfspr   r3,SPRN_SRR1            /* Need to restore CR0 */
         mtcrf   0x80,r3
@@ -528,7 +529,6 @@ InstructionAddressInvalid:
 
         addis   r1,r1,0x2000
         mtspr   SPRN_DSISR,r1   /* (shouldn't be needed) */
-        mtctr   r0              /* Restore CTR */
         andi.   r2,r3,0xFFFF    /* Clear upper bits of SRR1 */
         or      r2,r2,r1
         mtspr   SPRN_SRR1,r2
@@ -549,12 +549,11 @@ InstructionAddressInvalid:
         . = 0x1100
 DataLoadTLBMiss:
 /*
- * r0:  stored ctr
+ * r0:  scratch
  * r1:  linux style pte ( later becomes ppc hardware pte )
  * r2:  ptr to linux-style pte
  * r3:  scratch
  */
-        mfctr   r0
         /* Get PTE (linux-style) and check access */
         mfspr   r3,SPRN_DMISS
         lis     r1,PAGE_OFFSET@h                /* check if kernel address */
@@ -573,38 +572,48 @@ DataLoadTLBMiss:
         rlwinm. r2,r2,0,0,19            /* extract address of pte page */
         beq-    DataAddressInvalid      /* return if no mapping */
         rlwimi  r2,r3,22,20,29          /* insert next 10 bits of address */
-        lwz     r3,0(r2)                /* get linux-style pte */
-        andc.   r1,r1,r3                /* check access & ~permission */
+        lwz     r0,0(r2)                /* get linux-style pte */
+        andc.   r1,r1,r0                /* check access & ~permission */
         bne-    DataAddressInvalid      /* return if access not permitted */
-        ori     r3,r3,_PAGE_ACCESSED    /* set _PAGE_ACCESSED in pte */
+        ori     r0,r0,_PAGE_ACCESSED    /* set _PAGE_ACCESSED in pte */
         /*
          * NOTE! We are assuming this is not an SMP system, otherwise
          * we would need to update the pte atomically with lwarx/stwcx.
          */
-        stw     r3,0(r2)                /* update PTE (accessed bit) */
+        stw     r0,0(r2)                /* update PTE (accessed bit) */
         /* Convert linux-style PTE to low word of PPC-style PTE */
-        rlwinm  r1,r3,32-10,31,31       /* _PAGE_RW -> PP lsb */
-        rlwinm  r2,r3,32-7,31,31        /* _PAGE_DIRTY -> PP lsb */
+        rlwinm  r1,r0,32-10,31,31       /* _PAGE_RW -> PP lsb */
+        rlwinm  r2,r0,32-7,31,31        /* _PAGE_DIRTY -> PP lsb */
         and     r1,r1,r2                /* writable if _RW and _DIRTY */
-        rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
-        rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
+        rlwimi  r0,r0,32-1,30,30        /* _PAGE_USER -> PP msb */
+        rlwimi  r0,r0,32-1,31,31        /* _PAGE_USER -> PP lsb */
         ori     r1,r1,0xe04             /* clear out reserved bits */
-        andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
+        andc    r1,r0,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
 BEGIN_FTR_SECTION
         rlwinm  r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
 END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         mtspr   SPRN_RPA,r1
-        mfspr   r3,SPRN_DMISS
+        mfspr   r2,SPRN_SRR1            /* Need to restore CR0 */
+        mtcrf   0x80,r2
+BEGIN_MMU_FTR_SECTION
+        li      r0,1
+        mfspr   r1,SPRN_SPRG4
+        rlwinm  r2,r3,20,27,31          /* Get Address bits 15:19 */
+        slw     r0,r0,r2
+        xor     r1,r0,r1
+        srw     r0,r1,r2
+        mtspr   SPRN_SPRG4,r1
+        mfspr   r2,SPRN_SRR1
+        rlwimi  r2,r0,31-14,14,14
+        mtspr   SPRN_SRR1,r2
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
         tlbld   r3
-        mfspr   r3,SPRN_SRR1            /* Need to restore CR0 */
-        mtcrf   0x80,r3
         rfi
 DataAddressInvalid:
         mfspr   r3,SPRN_SRR1
         rlwinm  r1,r3,9,6,6     /* Get load/store bit */
         addis   r1,r1,0x2000
         mtspr   SPRN_DSISR,r1
-        mtctr   r0              /* Restore CTR */
         andi.   r2,r3,0xFFFF    /* Clear upper bits of SRR1 */
         mtspr   SPRN_SRR1,r2
         mfspr   r1,SPRN_DMISS   /* Get failing address */
@@ -624,12 +633,11 @@ DataAddressInvalid:
         . = 0x1200
 DataStoreTLBMiss:
 /*
- * r0:  stored ctr
+ * r0:  scratch
  * r1:  linux style pte ( later becomes ppc hardware pte )
  * r2:  ptr to linux-style pte
  * r3:  scratch
  */
-        mfctr   r0
         /* Get PTE (linux-style) and check access */
         mfspr   r3,SPRN_DMISS
         lis     r1,PAGE_OFFSET@h                /* check if kernel address */
@@ -648,27 +656,38 @@ DataStoreTLBMiss:
         rlwinm. r2,r2,0,0,19            /* extract address of pte page */
         beq-    DataAddressInvalid      /* return if no mapping */
         rlwimi  r2,r3,22,20,29          /* insert next 10 bits of address */
-        lwz     r3,0(r2)                /* get linux-style pte */
-        andc.   r1,r1,r3                /* check access & ~permission */
+        lwz     r0,0(r2)                /* get linux-style pte */
+        andc.   r1,r1,r0                /* check access & ~permission */
         bne-    DataAddressInvalid      /* return if access not permitted */
-        ori     r3,r3,_PAGE_ACCESSED|_PAGE_DIRTY
+        ori     r0,r0,_PAGE_ACCESSED|_PAGE_DIRTY
         /*
          * NOTE! We are assuming this is not an SMP system, otherwise
          * we would need to update the pte atomically with lwarx/stwcx.
          */
-        stw     r3,0(r2)                /* update PTE (accessed/dirty bits) */
+        stw     r0,0(r2)                /* update PTE (accessed/dirty bits) */
         /* Convert linux-style PTE to low word of PPC-style PTE */
-        rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
+        rlwimi  r0,r0,32-1,30,30        /* _PAGE_USER -> PP msb */
         li      r1,0xe05                /* clear out reserved bits & PP lsb */
-        andc    r1,r3,r1                /* PP = user? 2: 0 */
+        andc    r1,r0,r1                /* PP = user? 2: 0 */
 BEGIN_FTR_SECTION
         rlwinm  r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */
 END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         mtspr   SPRN_RPA,r1
-        mfspr   r3,SPRN_DMISS
+        mfspr   r2,SPRN_SRR1            /* Need to restore CR0 */
+        mtcrf   0x80,r2
+BEGIN_MMU_FTR_SECTION
+        li      r0,1
+        mfspr   r1,SPRN_SPRG4
+        rlwinm  r2,r3,20,27,31          /* Get Address bits 15:19 */
+        slw     r0,r0,r2
+        xor     r1,r0,r1
+        srw     r0,r1,r2
+        mtspr   SPRN_SPRG4,r1
+        mfspr   r2,SPRN_SRR1
+        rlwimi  r2,r0,31-14,14,14
+        mtspr   SPRN_SRR1,r2
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU)
         tlbld   r3
-        mfspr   r3,SPRN_SRR1            /* Need to restore CR0 */
-        mtcrf   0x80,r3
         rfi
 
 #ifndef CONFIG_ALTIVEC
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index ebaedafc8e67..50ef505b8fb6 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1360,6 +1360,7 @@ _GLOBAL(__start_initialization_multiplatform)
         b       .__after_prom_start
 
 _INIT_STATIC(__boot_from_prom)
+#ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
         /* Save parameters */
         mr      r31,r3
         mr      r30,r4
@@ -1390,7 +1391,10 @@ _INIT_STATIC(__boot_from_prom)
         /* Do all of the interaction with OF client interface */
         mr      r8,r26
         bl      .prom_init
-        /* We never return */
+#endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
+
+        /* We never return. We also hit that trap if trying to boot
+         * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
         trap
 
 _STATIC(__after_prom_start)
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index fce2df988504..95f39f1e68d4 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -10,6 +10,15 @@
                 mtspr   SPRN_IVOR##vector_number,r26;   \
                 sync
 
+#if (THREAD_SHIFT < 15)
+#define ALLOC_STACK_FRAME(reg, val)                     \
+        addi reg,reg,val
+#else
+#define ALLOC_STACK_FRAME(reg, val)                     \
+        addis   reg,reg,val@ha;                         \
+        addi    reg,reg,val@l
+#endif
+
 #define NORMAL_EXCEPTION_PROLOG                                              \
         mtspr   SPRN_SPRG0,r10;         /* save two registers to work with */\
         mtspr   SPRN_SPRG1,r11;                                              \
@@ -20,7 +29,7 @@
         beq     1f;                                                          \
         mfspr   r1,SPRN_SPRG3;          /* if from user, start at top of   */\
         lwz     r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack   */\
-        addi    r1,r1,THREAD_SIZE;                                           \
+        ALLOC_STACK_FRAME(r1, THREAD_SIZE);                                  \
 1:      subi    r1,r1,INT_FRAME_SIZE;   /* Allocate an exception frame     */\
         mr      r11,r1;                                                      \
         stw     r10,_CCR(r11);          /* save various registers          */\
@@ -70,10 +79,10 @@
 
 /* only on e500mc/e200 */
 #define DEBUG_STACK_BASE        dbgirq_ctx
-#ifdef CONFIG_PPC_E500MC
-#define DEBUG_SPRG              SPRN_SPRG9
-#else
+#ifdef CONFIG_E200
 #define DEBUG_SPRG              SPRN_SPRG6W
+#else
+#define DEBUG_SPRG              SPRN_SPRG9
 #endif
 
 #define EXC_LVL_FRAME_OVERHEAD  (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
@@ -279,7 +288,7 @@ label:
         lwz     r11,GPR11(r8);                                                \
         mfspr   r8,DEBUG_SPRG;                                                \
                                                                               \
-        RFDI;                                                                 \
+        PPC_RFDI;                                                                     \
         b       .;                                                            \
                                                                               \
         /* continue normal handling for a debug exception... */               \
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 36ffb3504a4f..4c22620d009b 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -103,10 +103,15 @@ invstr:	mflr	r6				/* Make it accessible */
         or      r7,r7,r4
         mtspr   SPRN_MAS6,r7
         tlbsx   0,r6                            /* search MSR[IS], SPID=PID0 */
-#ifndef CONFIG_E200
         mfspr   r7,SPRN_MAS1
         andis.  r7,r7,MAS1_VALID@h
         bne     match_TLB
+
+        mfspr   r7,SPRN_MMUCFG
+        rlwinm  r7,r7,21,28,31                  /* extract MMUCFG[NPIDS] */
+        cmpwi   r7,3
+        bne     match_TLB                       /* skip if NPIDS != 3 */
+
         mfspr   r7,SPRN_PID1
         slwi    r7,r7,16
         or      r7,r7,r4
@@ -120,7 +125,7 @@ invstr:	mflr	r6				/* Make it accessible */
         or      r7,r7,r4
         mtspr   SPRN_MAS6,r7
         tlbsx   0,r6                            /* Fall through, we had to match */
-#endif
+
 match_TLB:
         mfspr   r7,SPRN_MAS0
         rlwinm  r3,r7,16,20,31                  /* Extract MAS0(Entry) */
@@ -168,7 +173,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
 
         /* grab and fixup the RPN */
         mfspr   r6,SPRN_MAS1    /* extract MAS1[SIZE] */
-        rlwinm  r6,r6,25,27,30
+        rlwinm  r6,r6,25,27,31
         li      r8,-1
         addi    r6,r6,10
         slw     r6,r8,r6        /* convert to mask */
@@ -194,7 +199,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
         xori    r6,r4,1         /* Setup TMP mapping in the other Address space */
         slwi    r6,r6,12
         oris    r6,r6,(MAS1_VALID|MAS1_IPROT)@h
-        ori     r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
+        ori     r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_4K))@l
         mtspr   SPRN_MAS1,r6
         mfspr   r6,SPRN_MAS2
         li      r7,0            /* temp EPN = 0 */
@@ -215,14 +220,19 @@ skpinv:	addi	r6,r6,1				/* Increment */
 
 /* 4. Clear out PIDs & Search info */
         li      r6,0
+        mtspr   SPRN_MAS6,r6
         mtspr   SPRN_PID0,r6
-#ifndef CONFIG_E200
+
+        mfspr   r7,SPRN_MMUCFG
+        rlwinm  r7,r7,21,28,31                  /* extract MMUCFG[NPIDS] */
+        cmpwi   r7,3
+        bne     2f                              /* skip if NPIDS != 3 */
+
         mtspr   SPRN_PID1,r6
         mtspr   SPRN_PID2,r6
-#endif
-        mtspr   SPRN_MAS6,r6
 
 /* 5. Invalidate mapping we started in */
+2:
         lis     r7,0x1000       /* Set MAS0(TLBSEL) = 1 */
         rlwimi  r7,r3,16,4,15   /* Setup MAS0 = TLBSEL | ESEL(r3) */
         mtspr   SPRN_MAS0,r7
@@ -247,10 +257,10 @@ skpinv:	addi	r6,r6,1				/* Increment */
         lis     r6,0x1000               /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
         mtspr   SPRN_MAS0,r6
         lis     r6,(MAS1_VALID|MAS1_IPROT)@h
-        ori     r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l
+        ori     r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l
         mtspr   SPRN_MAS1,r6
-        lis     r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@h
-        ori     r6,r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@l
+        lis     r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@h
+        ori     r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@l
         mtspr   SPRN_MAS2,r6
         mtspr   SPRN_MAS3,r8
         tlbwe
@@ -298,26 +308,14 @@ skpinv:	addi	r6,r6,1				/* Increment */
         SET_IVOR(12, WatchdogTimer);
         SET_IVOR(13, DataTLBError);
         SET_IVOR(14, InstructionTLBError);
-        SET_IVOR(15, DebugDebug);
-#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
         SET_IVOR(15, DebugCrit);
-#endif
-        SET_IVOR(32, SPEUnavailable);
-        SET_IVOR(33, SPEFloatingPointData);
-        SET_IVOR(34, SPEFloatingPointRound);
-#ifndef CONFIG_E200
-        SET_IVOR(35, PerformanceMonitor);
-#endif
-#ifdef CONFIG_PPC_E500MC
-        SET_IVOR(36, Doorbell);
-#endif
 
         /* Establish the interrupt vector base */
         lis     r4,interrupt_base@h     /* IVPR only uses the high 16-bits */
         mtspr   SPRN_IVPR,r4
 
         /* Setup the defaults for TLB entries */
-        li      r2,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
+        li      r2,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l
 #ifdef CONFIG_E200
         oris    r2,r2,MAS4_TLBSELD(1)@h
 #endif
@@ -329,12 +327,6 @@ skpinv:	addi	r6,r6,1				/* Increment */
         oris    r2,r2,HID0_DOZE@h
         mtspr   SPRN_HID0, r2
 #endif
-#ifdef CONFIG_E200
-        /* enable dedicated debug exception handling resources (Debug APU) */
-        mfspr   r2,SPRN_HID0
-        ori     r2,r2,HID0_DAPUEN@l
-        mtspr   SPRN_HID0,r2
-#endif
 
 #if !defined(CONFIG_BDI_SWITCH)
         /*
@@ -706,15 +698,13 @@ interrupt_base:
         /* Performance Monitor */
         EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
 
-#ifdef CONFIG_PPC_E500MC
-        EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_STD)
-#endif
+        EXCEPTION(0x2070, Doorbell, doorbell_exception, EXC_XFER_STD)
+
+        CRITICAL_EXCEPTION(0x2080, CriticalDoorbell, unknown_exception)
 
         /* Debug Interrupt */
         DEBUG_DEBUG_EXCEPTION
-#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
         DEBUG_CRIT_EXCEPTION
-#endif
 
 /*
  * Local functions
@@ -897,6 +887,47 @@ KernelSPE:
  * Global functions
  */
 
+/* Adjust or setup IVORs for e200 */
+_GLOBAL(__setup_e200_ivors)
+        li      r3,DebugDebug@l
+        mtspr   SPRN_IVOR15,r3
+        li      r3,SPEUnavailable@l
+        mtspr   SPRN_IVOR32,r3
+        li      r3,SPEFloatingPointData@l
+        mtspr   SPRN_IVOR33,r3
+        li      r3,SPEFloatingPointRound@l
+        mtspr   SPRN_IVOR34,r3
+        sync
+        blr
+
+/* Adjust or setup IVORs for e500v1/v2 */
+_GLOBAL(__setup_e500_ivors)
+        li      r3,DebugCrit@l
+        mtspr   SPRN_IVOR15,r3
+        li      r3,SPEUnavailable@l
+        mtspr   SPRN_IVOR32,r3
+        li      r3,SPEFloatingPointData@l
+        mtspr   SPRN_IVOR33,r3
+        li      r3,SPEFloatingPointRound@l
+        mtspr   SPRN_IVOR34,r3
+        li      r3,PerformanceMonitor@l
+        mtspr   SPRN_IVOR35,r3
+        sync
+        blr
+
+/* Adjust or setup IVORs for e500mc */
+_GLOBAL(__setup_e500mc_ivors)
+        li      r3,DebugDebug@l
+        mtspr   SPRN_IVOR15,r3
+        li      r3,PerformanceMonitor@l
+        mtspr   SPRN_IVOR35,r3
+        li      r3,Doorbell@l
+        mtspr   SPRN_IVOR36,r3
+        li      r3,CriticalDoorbell@l
+        mtspr   SPRN_IVOR37,r3
+        sync
+        blr
+
 /*
  * extern void loadcam_entry(unsigned int index)
  *
@@ -1089,7 +1120,7 @@ __secondary_start:
         mtspr   SPRN_SPRG3,r4
 
         /* Setup the defaults for TLB entries */
-        li      r4,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
+        li      r4,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l
         mtspr   SPRN_MAS4,r4
 
         /* Jump to start_secondary */
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 1b55ffdf0026..5576147e57b6 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -171,7 +171,7 @@ int show_interrupts(struct seq_file *p, void *v)
 {
         int i = *(loff_t *)v, j;
         struct irqaction *action;
-        irq_desc_t *desc;
+        struct irq_desc *desc;
         unsigned long flags;
 
         if (i == 0) {
@@ -1038,7 +1038,7 @@ arch_initcall(irq_late_init);
 static int virq_debug_show(struct seq_file *m, void *private)
 {
         unsigned long flags;
-        irq_desc_t *desc;
+        struct irq_desc *desc;
         const char *p;
         char none[] = "none";
         int i;
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 8992b031a7b6..8fbb12508bf3 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -329,7 +329,7 @@ static unsigned long stub_for_addr(Elf64_Shdr *sechdrs,
    restore r2. */
 static int restore_r2(u32 *instruction, struct module *me)
 {
-        if (*instruction != PPC_NOP_INSTR) {
+        if (*instruction != PPC_INST_NOP) {
                 printk("%s: Expect noop after relocate, got %08x\n",
                        me->name, *instruction);
                 return 0;
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 0f4181272311..9c69e7e145c5 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -38,6 +38,7 @@
 #include <asm/eeh.h>
 
 static DEFINE_SPINLOCK(hose_spinlock);
+LIST_HEAD(hose_list);
 
 /* XXX kill that some day ... */
 static int global_phb_number;           /* Global phb counter */
@@ -49,7 +50,7 @@ resource_size_t isa_mem_base;
 unsigned int ppc_pci_flags = 0;
 
 
-static struct dma_mapping_ops *pci_dma_ops;
+static struct dma_mapping_ops *pci_dma_ops = &dma_direct_ops;
 
 void set_pci_dma_ops(struct dma_mapping_ops *dma_ops)
 {
@@ -113,19 +114,24 @@ void pcibios_free_controller(struct pci_controller *phb)
                 kfree(phb);
 }
 
+static resource_size_t pcibios_io_size(const struct pci_controller *hose)
+{
+#ifdef CONFIG_PPC64
+        return hose->pci_io_size;
+#else
+        return hose->io_resource.end - hose->io_resource.start + 1;
+#endif
+}
+
 int pcibios_vaddr_is_ioport(void __iomem *address)
 {
         int ret = 0;
         struct pci_controller *hose;
-        unsigned long size;
+        resource_size_t size;
 
         spin_lock(&hose_spinlock);
         list_for_each_entry(hose, &hose_list, list_node) {
-#ifdef CONFIG_PPC64
-                size = hose->pci_io_size;
-#else
-                size = hose->io_resource.end - hose->io_resource.start + 1;
-#endif
+                size = pcibios_io_size(hose);
                 if (address >= hose->io_base_virt &&
                     address < (hose->io_base_virt + size)) {
                         ret = 1;
@@ -136,6 +142,29 @@ int pcibios_vaddr_is_ioport(void __iomem *address)
         return ret;
 }
 
+unsigned long pci_address_to_pio(phys_addr_t address)
+{
+        struct pci_controller *hose;
+        resource_size_t size;
+        unsigned long ret = ~0;
+
+        spin_lock(&hose_spinlock);
+        list_for_each_entry(hose, &hose_list, list_node) {
+                size = pcibios_io_size(hose);
+                if (address >= hose->io_base_phys &&
+                    address < (hose->io_base_phys + size)) {
+                        unsigned long base =
+                                (unsigned long)hose->io_base_virt - _IO_BASE;
+                        ret = base + (address - hose->io_base_phys);
+                        break;
+                }
+        }
+        spin_unlock(&hose_spinlock);
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(pci_address_to_pio);
+
 /*
  * Return the domain number for this bus.
  */
@@ -1453,7 +1482,7 @@ void __init pcibios_resource_survey(void)
          * we proceed to assigning things that were left unassigned
          */
         if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
-                pr_debug("PCI: Assigning unassigned resouces...\n");
+                pr_debug("PCI: Assigning unassigned resources...\n");
                 pci_assign_unassigned_resources();
         }
 
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 132cd80afa21..d473634e39e3 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -20,6 +20,7 @@
 #include <asm/prom.h>
 #include <asm/sections.h>
 #include <asm/pci-bridge.h>
+#include <asm/ppc-pci.h>
 #include <asm/byteorder.h>
 #include <asm/uaccess.h>
 #include <asm/machdep.h>
@@ -43,8 +44,6 @@ static u8* pci_to_OF_bus_map;
  */
 static int pci_assign_all_buses;
 
-LIST_HEAD(hose_list);
-
 static int pci_bus_count;
 
 /* This will remain NULL for now, until isa-bridge.c is made common
@@ -219,16 +218,23 @@ scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void
 static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
                                                unsigned int devfn)
 {
-        struct device_node *np;
+        struct device_node *np, *cnp;
         const u32 *reg;
         unsigned int psize;
 
         for_each_child_of_node(parent, np) {
                 reg = of_get_property(np, "reg", &psize);
-                if (reg == NULL || psize < 4)
-                        continue;
-                if (((reg[0] >> 8) & 0xff) == devfn)
+                if (reg && psize >= 4 && ((reg[0] >> 8) & 0xff) == devfn)
                         return np;
+
+                /* Note: some OFs create a parent node "multifunc-device" as
+                 * a fake root for all functions of a multi-function device,
+                 * we go down them as well. */
+                if (!strcmp(np->name, "multifunc-device")) {
+                        cnp = scan_OF_for_pci_dev(np, devfn);
+                        if (cnp)
+                                return cnp;
+                }
         }
         return NULL;
 }
@@ -491,24 +497,6 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
         return result;
 }
 
-unsigned long pci_address_to_pio(phys_addr_t address)
-{
-        struct pci_controller *hose, *tmp;
-
-        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
-                unsigned int size = hose->io_resource.end -
-                        hose->io_resource.start + 1;
-                if (address >= hose->io_base_phys &&
-                    address < (hose->io_base_phys + size)) {
-                        unsigned long base =
-                                (unsigned long)hose->io_base_virt - _IO_BASE;
-                        return base + (address - hose->io_base_phys);
-                }
-        }
-        return (unsigned int)-1;
-}
-EXPORT_SYMBOL(pci_address_to_pio);
-
 /*
  * Null PCI config access functions, for the case when we can't
  * find a hose.
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index ea8eda8c87cf..be574fc0d92f 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -43,8 +43,6 @@ unsigned long pci_probe_only = 1;
 unsigned long pci_io_base = ISA_IO_BASE;
 EXPORT_SYMBOL(pci_io_base);
 
-LIST_HEAD(hose_list);
-
 static void fixup_broken_pcnet32(struct pci_dev* dev)
 {
         if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
@@ -524,23 +522,6 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
 }
 EXPORT_SYMBOL_GPL(pcibios_map_io_space);
 
-unsigned long pci_address_to_pio(phys_addr_t address)
-{
-        struct pci_controller *hose, *tmp;
-
-        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
-                if (address >= hose->io_base_phys &&
-                    address < (hose->io_base_phys + hose->pci_io_size)) {
-                        unsigned long base =
-                                (unsigned long)hose->io_base_virt - _IO_BASE;
-                        return base + (address - hose->io_base_phys);
-                }
-        }
-        return (unsigned int)-1;
-}
-EXPORT_SYMBOL_GPL(pci_address_to_pio);
-
-
 #define IOBASE_BRIDGE_NUMBER    0
 #define IOBASE_MEMORY           1
 #define IOBASE_IO               2
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index fb7049c054c0..eac064948780 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -33,7 +33,10 @@
 #include <linux/mqueue.h>
 #include <linux/hardirq.h>
 #include <linux/utsname.h>
+#include <linux/ftrace.h>
 #include <linux/kernel_stat.h>
+#include <linux/personality.h>
+#include <linux/random.h>
 
 #include <asm/pgtable.h>
 #include <asm/uaccess.h>
@@ -1008,6 +1011,14 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
         unsigned long sp, ip, lr, newsp;
         int count = 0;
         int firstframe = 1;
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        int curr_frame = current->curr_ret_stack;
+        extern void return_to_handler(void);
+        unsigned long addr = (unsigned long)return_to_handler;
+#ifdef CONFIG_PPC64
+        addr = *(unsigned long*)addr;
+#endif
+#endif
 
         sp = (unsigned long) stack;
         if (tsk == NULL)
@@ -1030,6 +1041,13 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
                 ip = stack[STACK_FRAME_LR_SAVE];
                 if (!firstframe || ip != lr) {
                         printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+                        if (ip == addr && curr_frame >= 0) {
+                                printk(" (%pS)",
+                                       (void *)current->ret_stack[curr_frame].ret);
+                                curr_frame--;
+                        }
+#endif
                         if (firstframe)
                                 printk(" (unreliable)");
                         printk("\n");
@@ -1122,3 +1140,43 @@ void thread_info_cache_init(void)
 }
 
 #endif /* THREAD_SHIFT < PAGE_SHIFT */
+
+unsigned long arch_align_stack(unsigned long sp)
+{
+        if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
+                sp -= get_random_int() & ~PAGE_MASK;
+        return sp & ~0xf;
+}
+
+static inline unsigned long brk_rnd(void)
+{
+        unsigned long rnd = 0;
+
+        /* 8MB for 32bit, 1GB for 64bit */
+        if (is_32bit_task())
+                rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
+        else
+                rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
+
+        return rnd << PAGE_SHIFT;
+}
+
+unsigned long arch_randomize_brk(struct mm_struct *mm)
+{
+        unsigned long ret = PAGE_ALIGN(mm->brk + brk_rnd());
+
+        if (ret < mm->brk)
+                return mm->brk;
+
+        return ret;
+}
+
+unsigned long randomize_et_dyn(unsigned long base)
+{
+        unsigned long ret = PAGE_ALIGN(base + brk_rnd());
+
+        if (ret < base)
+                return base;
+
+        return ret;
+}
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index f00f83109ab3..5ec6a9e23933 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -1075,11 +1075,6 @@ static void __init early_reserve_mem(void)
                 DBG("reserving: %llx -> %llx\n", base, size);
                 lmb_reserve(base, size);
         }
-
-#if 0
-        DBG("memory reserved, lmbs :\n");
-        lmb_dump_all();
-#endif
 }
 
 #ifdef CONFIG_PHYP_DUMP
@@ -1221,6 +1216,7 @@ void __init early_init_devtree(void *params)
         lmb_enforce_memory_limit(limit);
 
         lmb_analyze();
+        lmb_dump_all();
 
         DBG("Phys. mem: %lx\n", lmb_phys_mem_size());
 
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 7f1b33d5e30d..2e026c0407d4 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -2283,6 +2283,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
          */
         prom_init_stdout();
 
+        prom_printf("Preparing to boot %s", RELOC(linux_banner));
+
         /*
          * Get default machine type. At this point, we do not differentiate
          * between pSeries SMP and pSeries LPAR
diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh
index ea3a2ec03ffa..1ac136b128f0 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -20,7 +20,7 @@ WHITELIST="add_reloc_offset __bss_start __bss_stop copy_and_flush
 _end enter_prom memcpy memset reloc_offset __secondary_hold
 __secondary_hold_acknowledge __secondary_hold_spinloop __start
 strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224
-reloc_got2 kernstart_addr memstart_addr"
+reloc_got2 kernstart_addr memstart_addr linux_banner"
 
 NM="$1"
 OBJ="$2"
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index fdfe14c4bdef..ee4c7609b649 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -46,6 +46,7 @@ EXPORT_SYMBOL(rtas);
 
 struct rtas_suspend_me_data {
         atomic_t working; /* number of cpus accessing this struct */
+        atomic_t done;
         int token; /* ibm,suspend-me */
         int error;
         struct completion *complete; /* wait on this until working == 0 */
@@ -689,7 +690,7 @@ static int ibm_suspend_me_token = RTAS_UNKNOWN_SERVICE;
 #ifdef CONFIG_PPC_PSERIES
 static void rtas_percpu_suspend_me(void *info)
 {
-        long rc;
+        long rc = H_SUCCESS;
         unsigned long msr_save;
         int cpu;
         struct rtas_suspend_me_data *data =
@@ -701,7 +702,8 @@ static void rtas_percpu_suspend_me(void *info)
         msr_save = mfmsr();
         mtmsr(msr_save & ~(MSR_EE));
 
-        rc = plpar_hcall_norets(H_JOIN);
+        while (rc == H_SUCCESS && !atomic_read(&data->done))
+                rc = plpar_hcall_norets(H_JOIN);
 
         mtmsr(msr_save);
 
@@ -724,6 +726,9 @@ static void rtas_percpu_suspend_me(void *info)
                        smp_processor_id(), rc);
                 data->error = rc;
         }
+
+        atomic_set(&data->done, 1);
+
         /* This cpu did the suspend or got an error; in either case,
          * we need to prod all other other cpus out of join state.
          * Extra prods are harmless.
@@ -766,6 +771,7 @@ static int rtas_ibm_suspend_me(struct rtas_args *args)
         }
 
         atomic_set(&data.working, 0);
+        atomic_set(&data.done, 0);
         data.token = rtas_token("ibm,suspend-me");
         data.error = 0;
         data.complete = &done;
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index 149cb112cd1a..13011a96a977 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -669,7 +669,6 @@ static void remove_flash_pde(struct proc_dir_entry *dp)
 {
         if (dp) {
                 kfree(dp->data);
-                dp->owner = NULL;
                 remove_proc_entry(dp->name, dp->parent);
         }
 }
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 705fc4bf3800..9774f9fed96e 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -35,6 +35,8 @@
 #include <linux/debugfs.h>
 #include <linux/percpu.h>
 #include <linux/lmb.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/processor.h>
@@ -669,3 +671,37 @@ static int powerpc_debugfs_init(void)
 }
 arch_initcall(powerpc_debugfs_init);
 #endif
+
+static int ppc_dflt_bus_notify(struct notifier_block *nb,
+                                unsigned long action, void *data)
+{
+        struct device *dev = data;
+
+        /* We are only intereted in device addition */
+        if (action != BUS_NOTIFY_ADD_DEVICE)
+                return 0;
+
+        set_dma_ops(dev, &dma_direct_ops);
+
+        return NOTIFY_DONE;
+}
+
+static struct notifier_block ppc_dflt_plat_bus_notifier = {
+        .notifier_call = ppc_dflt_bus_notify,
+        .priority = INT_MAX,
+};
+
+static struct notifier_block ppc_dflt_of_bus_notifier = {
+        .notifier_call = ppc_dflt_bus_notify,
+        .priority = INT_MAX,
+};
+
+static int __init setup_bus_notifier(void)
+{
+        bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier);
+        bus_register_notifier(&of_platform_bus_type, &ppc_dflt_of_bus_notifier);
+
+        return 0;
+}
+
+arch_initcall(setup_bus_notifier);
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 2d34196bba8c..c410c606955d 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -202,8 +202,6 @@ void __init early_setup(unsigned long dt_ptr)
 
         /* Fix up paca fields required for the boot cpu */
         get_paca()->cpu_start = 1;
-        get_paca()->stab_real = __pa((u64)&initial_stab);
-        get_paca()->stab_addr = (u64)&initial_stab;
 
         /* Probe the machine type */
         probe_machine();
@@ -212,20 +210,8 @@ void __init early_setup(unsigned long dt_ptr)
 
         DBG("Found, Initializing memory management...\n");
 
-        /*
-         * Initialize the MMU Hash table and create the linear mapping
-         * of memory. Has to be done before stab/slb initialization as
-         * this is currently where the page size encoding is obtained
-         */
-        htab_initialize();
-
-        /*
-         * Initialize stab / SLB management except on iSeries
-         */
-        if (cpu_has_feature(CPU_FTR_SLB))
-                slb_initialize();
-        else if (!firmware_has_feature(FW_FEATURE_ISERIES))
-                stab_initialize(get_paca()->stab_real);
+        /* Initialize the hash table or TLB handling */
+        early_init_mmu();
 
         DBG(" <- early_setup()\n");
 }
@@ -233,22 +219,11 @@ void __init early_setup(unsigned long dt_ptr)
 #ifdef CONFIG_SMP
 void early_setup_secondary(void)
 {
-        struct paca_struct *lpaca = get_paca();
-
         /* Mark interrupts enabled in PACA */
-        lpaca->soft_enabled = 0;
+        get_paca()->soft_enabled = 0;
 
-        /* Initialize hash table for that CPU */
-        htab_initialize_secondary();
-
-        /* Initialize STAB/SLB. We use a virtual address as it works
-         * in real mode on pSeries and we want a virutal address on
-         * iSeries anyway
-         */
-        if (cpu_has_feature(CPU_FTR_SLB))
-                slb_initialize();
-        else
-                stab_initialize(lpaca->stab_addr);
+        /* Initialize the hash table or TLB handling */
+        early_init_mmu_secondary();
 }
 
 #endif /* CONFIG_SMP */
@@ -578,13 +553,6 @@ void ppc64_boot_msg(unsigned int src, const char *msg)
         printk("[boot]%04x %s\n", src, msg);
 }
 
-/* Print a termination message (print only -- does not stop the kernel) */
-void ppc64_terminate_msg(unsigned int src, const char *msg)
-{
-        ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
-        printk("[terminate]%04x %s\n", src, msg);
-}
-
 void cpu_die(void)
 {
         if (ppc_md.cpu_die)
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index a54405ebd7b0..00b5078da9a3 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -26,12 +26,12 @@ int show_unhandled_signals = 0;
  * Allocate space for the signal frame
  */
 void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
-                           size_t frame_size)
+                           size_t frame_size, int is_32)
 {
         unsigned long oldsp, newsp;
 
         /* Default to using normal stack */
-        oldsp = regs->gpr[1];
+        oldsp = get_clean_sp(regs, is_32);
 
         /* Check for alt stack */
         if ((ka->sa.sa_flags & SA_ONSTACK) &&
diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h
index b427bf8e1d8f..6c0ddfc0603e 100644
--- a/arch/powerpc/kernel/signal.h
+++ b/arch/powerpc/kernel/signal.h
@@ -15,7 +15,7 @@
 extern void do_signal(struct pt_regs *regs, unsigned long thread_info_flags);
 
 extern void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
-                                  size_t frame_size);
+                                  size_t frame_size, int is_32);
 extern void restore_sigmask(sigset_t *set);
 
 extern int handle_signal32(unsigned long sig, struct k_sigaction *ka,
@@ -39,22 +39,12 @@ extern unsigned long copy_vsx_from_user(struct task_struct *task,
 
 #ifdef CONFIG_PPC64
 
-static inline int is_32bit_task(void)
-{
-        return test_thread_flag(TIF_32BIT);
-}
-
 extern int handle_rt_signal64(int signr, struct k_sigaction *ka,
                               siginfo_t *info, sigset_t *set,
                               struct pt_regs *regs);
 
 #else /* CONFIG_PPC64 */
 
-static inline int is_32bit_task(void)
-{
-        return 1;
-}
-
 static inline int handle_rt_signal64(int signr, struct k_sigaction *ka,
                                      siginfo_t *info, sigset_t *set,
                                      struct pt_regs *regs)
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index b13abf305996..d670429a1608 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -836,7 +836,7 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
 
         /* Set up Signal Frame */
         /* Put a Real Time Context onto stack */
-        rt_sf = get_sigframe(ka, regs, sizeof(*rt_sf));
+        rt_sf = get_sigframe(ka, regs, sizeof(*rt_sf), 1);
         addr = rt_sf;
         if (unlikely(rt_sf == NULL))
                 goto badframe;
@@ -1182,7 +1182,7 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka,
         unsigned long newsp = 0;
 
         /* Set up Signal Frame */
-        frame = get_sigframe(ka, regs, sizeof(*frame));
+        frame = get_sigframe(ka, regs, sizeof(*frame), 1);
         if (unlikely(frame == NULL))
                 goto badframe;
         sc = (struct sigcontext __user *) &frame->sctx;
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index e132891d3cea..2fe6fc64b614 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -402,7 +402,7 @@ int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info,
         unsigned long newsp = 0;
         long err = 0;
 
-        frame = get_sigframe(ka, regs, sizeof(*frame));
+        frame = get_sigframe(ka, regs, sizeof(*frame), 0);
         if (unlikely(frame == NULL))
                 goto badframe;
 
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 4a2ee08af6a7..f41aec85aa49 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -134,44 +134,23 @@ void ppc_enable_pmcs(void)
 }
 EXPORT_SYMBOL(ppc_enable_pmcs);
 
-#if defined(CONFIG_6xx) || defined(CONFIG_PPC64)
-/* XXX convert to rusty's on_one_cpu */
-static unsigned long run_on_cpu(unsigned long cpu,
-                                unsigned long (*func)(unsigned long),
-                                unsigned long arg)
-{
-        cpumask_t old_affinity = current->cpus_allowed;
-        unsigned long ret;
-
-        /* should return -EINVAL to userspace */
-        if (set_cpus_allowed(current, cpumask_of_cpu(cpu)))
-                return 0;
-
-        ret = func(arg);
-
-        set_cpus_allowed(current, old_affinity);
-
-        return ret;
-}
-#endif
-
 #define SYSFS_PMCSETUP(NAME, ADDRESS) \
-static unsigned long read_##NAME(unsigned long junk) \
+static void read_##NAME(void *val) \
 { \
-        return mfspr(ADDRESS); \
+        *(unsigned long *)val = mfspr(ADDRESS); \
 } \
-static unsigned long write_##NAME(unsigned long val) \
+static void write_##NAME(void *val) \
 { \
         ppc_enable_pmcs(); \
-        mtspr(ADDRESS, val); \
-        return 0; \
+        mtspr(ADDRESS, *(unsigned long *)val);  \
 } \
 static ssize_t show_##NAME(struct sys_device *dev, \
                         struct sysdev_attribute *attr, \
                         char *buf) \
 { \
         struct cpu *cpu = container_of(dev, struct cpu, sysdev); \
-        unsigned long val = run_on_cpu(cpu->sysdev.id, read_##NAME, 0); \
+        unsigned long val; \
+        smp_call_function_single(cpu->sysdev.id, read_##NAME, &val, 1); \
         return sprintf(buf, "%lx\n", val); \
 } \
 static ssize_t __used \
@@ -183,7 +162,7 @@ static ssize_t __used \
         int ret = sscanf(buf, "%lx", &val); \
         if (ret != 1) \
                 return -EINVAL; \
-        run_on_cpu(cpu->sysdev.id, write_##NAME, val); \
+        smp_call_function_single(cpu->sysdev.id, write_##NAME, &val, 1); \
         return count; \
 }
 
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 5457e9575685..678fbff0d206 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -52,6 +52,10 @@
 #include <asm/processor.h>
 #endif
 #include <asm/kexec.h>
+#include <asm/ppc-opcode.h>
+#ifdef CONFIG_FSL_BOOKE
+#include <asm/dbell.h>
+#endif
 
 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 int (*__debugger)(struct pt_regs *regs);
@@ -637,29 +641,6 @@ static void parse_fpe(struct pt_regs *regs)
  * bits is faster and easier.
  *
  */
-#define INST_MFSPR_PVR          0x7c1f42a6
-#define INST_MFSPR_PVR_MASK     0xfc1fffff
-
-#define INST_DCBA               0x7c0005ec
-#define INST_DCBA_MASK          0xfc0007fe
-
-#define INST_MCRXR              0x7c000400
-#define INST_MCRXR_MASK         0xfc0007fe
-
-#define INST_STRING             0x7c00042a
-#define INST_STRING_MASK        0xfc0007fe
-#define INST_STRING_GEN_MASK    0xfc00067e
-#define INST_LSWI               0x7c0004aa
-#define INST_LSWX               0x7c00042a
-#define INST_STSWI              0x7c0005aa
-#define INST_STSWX              0x7c00052a
-
-#define INST_POPCNTB            0x7c0000f4
-#define INST_POPCNTB_MASK       0xfc0007fe
-
-#define INST_ISEL               0x7c00001e
-#define INST_ISEL_MASK          0xfc00003e
-
 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
 {
         u8 rT = (instword >> 21) & 0x1f;
@@ -670,20 +651,20 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
         int pos = 0;
 
         /* Early out if we are an invalid form of lswx */
-        if ((instword & INST_STRING_MASK) == INST_LSWX)
+        if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX)
                 if ((rT == rA) || (rT == NB_RB))
                         return -EINVAL;
 
         EA = (rA == 0) ? 0 : regs->gpr[rA];
 
-        switch (instword & INST_STRING_MASK) {
-                case INST_LSWX:
-                case INST_STSWX:
+        switch (instword & PPC_INST_STRING_MASK) {
+                case PPC_INST_LSWX:
+                case PPC_INST_STSWX:
                         EA += NB_RB;
                         num_bytes = regs->xer & 0x7f;
                         break;
-                case INST_LSWI:
-                case INST_STSWI:
+                case PPC_INST_LSWI:
+                case PPC_INST_STSWI:
                         num_bytes = (NB_RB == 0) ? 32 : NB_RB;
                         break;
                 default:
@@ -695,9 +676,9 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
                 u8 val;
                 u32 shift = 8 * (3 - (pos & 0x3));
 
-                switch ((instword & INST_STRING_MASK)) {
-                        case INST_LSWX:
-                        case INST_LSWI:
+                switch ((instword & PPC_INST_STRING_MASK)) {
+                        case PPC_INST_LSWX:
+                        case PPC_INST_LSWI:
                                 if (get_user(val, (u8 __user *)EA))
                                         return -EFAULT;
                                 /* first time updating this reg,
@@ -706,8 +687,8 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword)
                                         regs->gpr[rT] = 0;
                                 regs->gpr[rT] |= val << shift;
                                 break;
-                        case INST_STSWI:
-                        case INST_STSWX:
+                        case PPC_INST_STSWI:
+                        case PPC_INST_STSWX:
                                 val = regs->gpr[rT] >> shift;
                                 if (put_user(val, (u8 __user *)EA))
                                         return -EFAULT;
@@ -775,18 +756,18 @@ static int emulate_instruction(struct pt_regs *regs)
                 return -EFAULT;
 
         /* Emulate the mfspr rD, PVR. */
-        if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
+        if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
                 rd = (instword >> 21) & 0x1f;
                 regs->gpr[rd] = mfspr(SPRN_PVR);
                 return 0;
         }
 
         /* Emulating the dcba insn is just a no-op.  */
-        if ((instword & INST_DCBA_MASK) == INST_DCBA)
+        if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA)
                 return 0;
 
         /* Emulate the mcrxr insn.  */
-        if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
+        if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) {
                 int shift = (instword >> 21) & 0x1c;
                 unsigned long msk = 0xf0000000UL >> shift;
 
@@ -796,16 +777,16 @@ static int emulate_instruction(struct pt_regs *regs)
         }
 
         /* Emulate load/store string insn. */
-        if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
+        if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING)
                 return emulate_string_inst(regs, instword);
 
         /* Emulate the popcntb (Population Count Bytes) instruction. */
-        if ((instword & INST_POPCNTB_MASK) == INST_POPCNTB) {
+        if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
                 return emulate_popcntb_inst(regs, instword);
         }
 
         /* Emulate isel (Integer Select) instruction */
-        if ((instword & INST_ISEL_MASK) == INST_ISEL) {
+        if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
                 return emulate_isel(regs, instword);
         }
 
@@ -1144,6 +1125,24 @@ void vsx_assist_exception(struct pt_regs *regs)
 #endif /* CONFIG_VSX */
 
 #ifdef CONFIG_FSL_BOOKE
+
+void doorbell_exception(struct pt_regs *regs)
+{
+#ifdef CONFIG_SMP
+        int cpu = smp_processor_id();
+        int msg;
+
+        if (num_online_cpus() < 2)
+                return;
+
+        for (msg = 0; msg < 4; msg++)
+                if (test_and_clear_bit(msg, &dbell_smp_message[cpu]))
+                        smp_message_recv(msg);
+#else
+        printk(KERN_WARNING "Received doorbell on non-smp system\n");
+#endif
+}
+
 void CacheLockingException(struct pt_regs *regs, unsigned long address,
                            unsigned long error_code)
 {
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 7d6c9bb8c77f..fc9af47e2128 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -18,6 +18,7 @@
 #include <asm/udbg.h>
 
 void (*udbg_putc)(char c);
+void (*udbg_flush)(void);
 int (*udbg_getc)(void);
 int (*udbg_getc_poll)(void);
 
@@ -76,6 +77,9 @@ void udbg_puts(const char *s)
                         while ((c = *s++) != '\0')
                                 udbg_putc(c);
                 }
+
+                if (udbg_flush)
+                        udbg_flush();
         }
 #if 0
         else {
@@ -98,6 +102,9 @@ int udbg_write(const char *s, int n)
                 }
         }
 
+        if (udbg_flush)
+                udbg_flush();
+
         return n - remain;
 }
 
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 7b7da8cfd5e8..0362a891e54e 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -48,14 +48,21 @@ struct NS16550 {
 
 static struct NS16550 __iomem *udbg_comport;
 
-static void udbg_550_putc(char c)
+static void udbg_550_flush(void)
 {
         if (udbg_comport) {
                 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
                         /* wait for idle */;
-                out_8(&udbg_comport->thr, c);
+        }
+}
+
+static void udbg_550_putc(char c)
+{
+        if (udbg_comport) {
                 if (c == '\n')
                         udbg_550_putc('\r');
+                udbg_550_flush();
+                out_8(&udbg_comport->thr, c);
         }
 }
 
@@ -108,6 +115,7 @@ void udbg_init_uart(void __iomem *comport, unsigned int speed,
                 /* Clear & enable FIFOs */
                 out_8(&udbg_comport->fcr ,0x07);
                 udbg_putc = udbg_550_putc;
+                udbg_flush = udbg_550_flush;
                 udbg_getc = udbg_550_getc;
                 udbg_getc_poll = udbg_550_getc_poll;
         }
@@ -149,14 +157,21 @@ unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
 }
 
 #ifdef CONFIG_PPC_MAPLE
-void udbg_maple_real_putc(char c)
+void udbg_maple_real_flush(void)
 {
         if (udbg_comport) {
                 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
                         /* wait for idle */;
-                real_writeb(c, &udbg_comport->thr); eieio();
+        }
+}
+
+void udbg_maple_real_putc(char c)
+{
+        if (udbg_comport) {
                 if (c == '\n')
                         udbg_maple_real_putc('\r');
+                udbg_maple_real_flush();
+                real_writeb(c, &udbg_comport->thr); eieio();
         }
 }
 
@@ -165,20 +180,28 @@ void __init udbg_init_maple_realmode(void)
         udbg_comport = (struct NS16550 __iomem *)0xf40003f8;
 
         udbg_putc = udbg_maple_real_putc;
+        udbg_flush = udbg_maple_real_flush;
         udbg_getc = NULL;
         udbg_getc_poll = NULL;
 }
 #endif /* CONFIG_PPC_MAPLE */
 
 #ifdef CONFIG_PPC_PASEMI
-void udbg_pas_real_putc(char c)
+void udbg_pas_real_flush(void)
 {
         if (udbg_comport) {
                 while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
                         /* wait for idle */;
-                real_205_writeb(c, &udbg_comport->thr); eieio();
+        }
+}
+
+void udbg_pas_real_putc(char c)
+{
+        if (udbg_comport) {
                 if (c == '\n')
                         udbg_pas_real_putc('\r');
+                udbg_pas_real_flush();
+                real_205_writeb(c, &udbg_comport->thr); eieio();
         }
 }
 
@@ -187,6 +210,7 @@ void udbg_init_pas_realmode(void)
         udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL;
 
         udbg_putc = udbg_pas_real_putc;
+        udbg_flush = udbg_pas_real_flush;
         udbg_getc = NULL;
         udbg_getc_poll = NULL;
 }
@@ -195,14 +219,21 @@ void udbg_init_pas_realmode(void)
 #ifdef CONFIG_PPC_EARLY_DEBUG_44x
 #include <platforms/44x/44x.h>
 
-static void udbg_44x_as1_putc(char c)
+static int udbg_44x_as1_flush(void)
 {
         if (udbg_comport) {
                 while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
                         /* wait for idle */;
-                as1_writeb(c, &udbg_comport->thr); eieio();
+        }
+}
+
+static void udbg_44x_as1_putc(char c)
+{
+        if (udbg_comport) {
                 if (c == '\n')
                         udbg_44x_as1_putc('\r');
+                udbg_44x_as1_flush();
+                as1_writeb(c, &udbg_comport->thr); eieio();
         }
 }
 
@@ -222,19 +253,27 @@ void __init udbg_init_44x_as1(void)
                 (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
 
         udbg_putc = udbg_44x_as1_putc;
+        udbg_flush = udbg_44x_as1_flush;
         udbg_getc = udbg_44x_as1_getc;
 }
 #endif /* CONFIG_PPC_EARLY_DEBUG_44x */
 
 #ifdef CONFIG_PPC_EARLY_DEBUG_40x
-static void udbg_40x_real_putc(char c)
+static void udbg_40x_real_flush(void)
 {
         if (udbg_comport) {
                 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
                         /* wait for idle */;
-                real_writeb(c, &udbg_comport->thr); eieio();
+        }
+}
+
+static void udbg_40x_real_putc(char c)
+{
+        if (udbg_comport) {
                 if (c == '\n')
                         udbg_40x_real_putc('\r');
+                udbg_40x_real_flush();
+                real_writeb(c, &udbg_comport->thr); eieio();
         }
 }
 
@@ -254,6 +293,7 @@ void __init udbg_init_40x_realmode(void)
                 CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
 
         udbg_putc = udbg_40x_real_putc;
+        udbg_flush = udbg_40x_real_flush;
         udbg_getc = udbg_40x_real_getc;
         udbg_getc_poll = NULL;
 }
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 67f07f453385..b9ef1644a722 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -58,6 +58,7 @@ SECTIONS
                 SCHED_TEXT
                 LOCK_TEXT
                 KPROBES_TEXT
+                IRQENTRY_TEXT
 
 #ifdef CONFIG_PPC32
                 *(.got1)
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index b7dc4c19f582..005a28d380af 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -29,121 +29,11 @@
 #include <linux/types.h>
 #include <linux/highmem.h>
 #include <linux/dma-mapping.h>
+#include <linux/vmalloc.h>
 
 #include <asm/tlbflush.h>
 
 /*
- * This address range defaults to a value that is safe for all
- * platforms which currently set CONFIG_NOT_COHERENT_CACHE. It
- * can be further configured for specific applications under
- * the "Advanced Setup" menu. -Matt
- */
-#define CONSISTENT_BASE (CONFIG_CONSISTENT_START)
-#define CONSISTENT_END  (CONFIG_CONSISTENT_START + CONFIG_CONSISTENT_SIZE)
-#define CONSISTENT_OFFSET(x)    (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
-
-/*
- * This is the page table (2MB) covering uncached, DMA consistent allocations
- */
-static pte_t *consistent_pte;
-static DEFINE_SPINLOCK(consistent_lock);
-
-/*
- * VM region handling support.
- *
- * This should become something generic, handling VM region allocations for
- * vmalloc and similar (ioremap, module space, etc).
- *
- * I envisage vmalloc()'s supporting vm_struct becoming:
- *
- *  struct vm_struct {
- *    struct vm_region  region;
- *    unsigned long     flags;
- *    struct page       **pages;
- *    unsigned int      nr_pages;
- *    unsigned long     phys_addr;
- *  };
- *
- * get_vm_area() would then call vm_region_alloc with an appropriate
- * struct vm_region head (eg):
- *
- *  struct vm_region vmalloc_head = {
- *      .vm_list        = LIST_HEAD_INIT(vmalloc_head.vm_list),
- *      .vm_start       = VMALLOC_START,
- *      .vm_end         = VMALLOC_END,
- *  };
- *
- * However, vmalloc_head.vm_start is variable (typically, it is dependent on
- * the amount of RAM found at boot time.)  I would imagine that get_vm_area()
- * would have to initialise this each time prior to calling vm_region_alloc().
- */
-struct ppc_vm_region {
-        struct list_head        vm_list;
-        unsigned long           vm_start;
-        unsigned long           vm_end;
-};
-
-static struct ppc_vm_region consistent_head = {
-        .vm_list        = LIST_HEAD_INIT(consistent_head.vm_list),
-        .vm_start       = CONSISTENT_BASE,
-        .vm_end         = CONSISTENT_END,
-};
-
-static struct ppc_vm_region *
-ppc_vm_region_alloc(struct ppc_vm_region *head, size_t size, gfp_t gfp)
-{
-        unsigned long addr = head->vm_start, end = head->vm_end - size;
-        unsigned long flags;
-        struct ppc_vm_region *c, *new;
-
-        new = kmalloc(sizeof(struct ppc_vm_region), gfp);
-        if (!new)
-                goto out;
-
-        spin_lock_irqsave(&consistent_lock, flags);
-
-        list_for_each_entry(c, &head->vm_list, vm_list) {
-                if ((addr + size) < addr)
-                        goto nospc;
-                if ((addr + size) <= c->vm_start)
-                        goto found;
-                addr = c->vm_end;
-                if (addr > end)
-                        goto nospc;
-        }
-
- found:
-        /*
-         * Insert this entry _before_ the one we found.
-         */
-        list_add_tail(&new->vm_list, &c->vm_list);
-        new->vm_start = addr;
-        new->vm_end = addr + size;
-
-        spin_unlock_irqrestore(&consistent_lock, flags);
-        return new;
-
- nospc:
-        spin_unlock_irqrestore(&consistent_lock, flags);
-        kfree(new);
- out:
-        return NULL;
-}
-
-static struct ppc_vm_region *ppc_vm_region_find(struct ppc_vm_region *head, unsigned long addr)
-{
-        struct ppc_vm_region *c;
-
-        list_for_each_entry(c, &head->vm_list, vm_list) {
-                if (c->vm_start == addr)
-                        goto out;
-        }
-        c = NULL;
- out:
-        return c;
-}
-
-/*
  * Allocate DMA-coherent memory space and return both the kernel remapped
  * virtual and bus address for that space.
  */
@@ -151,21 +41,21 @@ void *
 __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
 {
         struct page *page;
-        struct ppc_vm_region *c;
         unsigned long order;
+        int i;
+        unsigned int nr_pages = PAGE_ALIGN(size)>>PAGE_SHIFT;
+        unsigned int array_size = nr_pages * sizeof(struct page *);
+        struct page **pages;
+        struct page *end;
         u64 mask = 0x00ffffff, limit; /* ISA default */
+        struct vm_struct *area;
 
-        if (!consistent_pte) {
-                printk(KERN_ERR "%s: not initialised\n", __func__);
-                dump_stack();
-                return NULL;
-        }
-
+        BUG_ON(!mem_init_done);
         size = PAGE_ALIGN(size);
         limit = (mask + 1) & ~mask;
-        if ((limit && size >= limit) || size >= (CONSISTENT_END - CONSISTENT_BASE)) {
-                printk(KERN_WARNING "coherent allocation too big (requested %#x mask %#Lx)\n",
-                       size, mask);
+        if (limit && size >= limit) {
+                printk(KERN_WARNING "coherent allocation too big (requested "
+                                "%#x mask %#Lx)\n", size, mask);
                 return NULL;
         }
 
@@ -178,6 +68,8 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
         if (!page)
                 goto no_page;
 
+        end = page + (1 << order);
+
         /*
          * Invalidate any data that might be lurking in the
          * kernel direct-mapped region for device DMA.
@@ -188,48 +80,59 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
                 flush_dcache_range(kaddr, kaddr + size);
         }
 
+        split_page(page, order);
+
         /*
-         * Allocate a virtual address in the consistent mapping region.
+         * Set the "dma handle"
          */
-        c = ppc_vm_region_alloc(&consistent_head, size,
-                            gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
-        if (c) {
-                unsigned long vaddr = c->vm_start;
-                pte_t *pte = consistent_pte + CONSISTENT_OFFSET(vaddr);
-                struct page *end = page + (1 << order);
-
-                split_page(page, order);
-
-                /*
-                 * Set the "dma handle"
-                 */
-                *handle = page_to_phys(page);
+        *handle = page_to_phys(page);
+
+        area = get_vm_area_caller(size, VM_IOREMAP,
+                        __builtin_return_address(1));
+        if (!area)
+                goto out_free_pages;
+
+        if (array_size > PAGE_SIZE) {
+                pages = vmalloc(array_size);
+                area->flags |= VM_VPAGES;
+        } else {
+                pages = kmalloc(array_size, GFP_KERNEL);
+        }
+        if (!pages)
+                goto out_free_area;
 
-                do {
-                        BUG_ON(!pte_none(*pte));
+        area->pages = pages;
+        area->nr_pages = nr_pages;
 
-                        SetPageReserved(page);
-                        set_pte_at(&init_mm, vaddr,
-                                   pte, mk_pte(page, pgprot_noncached(PAGE_KERNEL)));
-                        page++;
-                        pte++;
-                        vaddr += PAGE_SIZE;
-                } while (size -= PAGE_SIZE);
+        for (i = 0; i < nr_pages; i++)
+                pages[i] = page + i;
 
-                /*
-                 * Free the otherwise unused pages.
-                 */
-                while (page < end) {
-                        __free_page(page);
-                        page++;
-                }
+        if (map_vm_area(area, pgprot_noncached(PAGE_KERNEL), &pages))
+                goto out_unmap;
 
-                return (void *)c->vm_start;
+        /*
+         * Free the otherwise unused pages.
+         */
+        page += nr_pages;
+        while (page < end) {
+                __free_page(page);
+                page++;
         }
 
+        return area->addr;
+out_unmap:
+        vunmap(area->addr);
+        if (array_size > PAGE_SIZE)
+                vfree(pages);
+        else
+                kfree(pages);
+        goto out_free_pages;
+out_free_area:
+        free_vm_area(area);
+out_free_pages:
         if (page)
                 __free_pages(page, order);
- no_page:
+no_page:
         return NULL;
 }
 EXPORT_SYMBOL(__dma_alloc_coherent);
@@ -239,104 +142,12 @@ EXPORT_SYMBOL(__dma_alloc_coherent);
  */
 void __dma_free_coherent(size_t size, void *vaddr)
 {
-        struct ppc_vm_region *c;
-        unsigned long flags, addr;
-        pte_t *ptep;
-
-        size = PAGE_ALIGN(size);
-
-        spin_lock_irqsave(&consistent_lock, flags);
-
-        c = ppc_vm_region_find(&consistent_head, (unsigned long)vaddr);
-        if (!c)
-                goto no_area;
-
-        if ((c->vm_end - c->vm_start) != size) {
-                printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
-                       __func__, c->vm_end - c->vm_start, size);
-                dump_stack();
-                size = c->vm_end - c->vm_start;
-        }
-
-        ptep = consistent_pte + CONSISTENT_OFFSET(c->vm_start);
-        addr = c->vm_start;
-        do {
-                pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
-                unsigned long pfn;
-
-                ptep++;
-                addr += PAGE_SIZE;
+        vfree(vaddr);
 
-                if (!pte_none(pte) && pte_present(pte)) {
-                        pfn = pte_pfn(pte);
-
-                        if (pfn_valid(pfn)) {
-                                struct page *page = pfn_to_page(pfn);
-                                ClearPageReserved(page);
-
-                                __free_page(page);
-                                continue;
-                        }
-                }
-
-                printk(KERN_CRIT "%s: bad page in kernel page table\n",
-                       __func__);
-        } while (size -= PAGE_SIZE);
-
-        flush_tlb_kernel_range(c->vm_start, c->vm_end);
-
-        list_del(&c->vm_list);
-
-        spin_unlock_irqrestore(&consistent_lock, flags);
-
-        kfree(c);
-        return;
-
- no_area:
-        spin_unlock_irqrestore(&consistent_lock, flags);
-        printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
-               __func__, vaddr);
-        dump_stack();
 }
 EXPORT_SYMBOL(__dma_free_coherent);
 
 /*
- * Initialise the consistent memory allocation.
- */
-static int __init dma_alloc_init(void)
-{
-        pgd_t *pgd;
-        pud_t *pud;
-        pmd_t *pmd;
-        pte_t *pte;
-        int ret = 0;
-
-        do {
-                pgd = pgd_offset(&init_mm, CONSISTENT_BASE);
-                pud = pud_alloc(&init_mm, pgd, CONSISTENT_BASE);
-                pmd = pmd_alloc(&init_mm, pud, CONSISTENT_BASE);
-                if (!pmd) {
-                        printk(KERN_ERR "%s: no pmd tables\n", __func__);
-                        ret = -ENOMEM;
-                        break;
-                }
-
-                pte = pte_alloc_kernel(pmd, CONSISTENT_BASE);
-                if (!pte) {
-                        printk(KERN_ERR "%s: no pte tables\n", __func__);
-                        ret = -ENOMEM;
-                        break;
-                }
-
-                consistent_pte = pte;
-        } while (0);
-
-        return ret;
-}
-
-core_initcall(dma_alloc_init);
-
-/*
  * make an area consistent.
  */
 void __dma_sync(void *vaddr, size_t size, int direction)
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index 8c5a03be31e0..7e8865bcd683 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -85,7 +85,7 @@ static int patch_feature_section(unsigned long value, struct fixup_entry *fcur)
         }
 
         for (; dest < end; dest++)
-                patch_instruction(dest, PPC_NOP_INSTR);
+                patch_instruction(dest, PPC_INST_NOP);
 
         return 0;
 }
@@ -122,7 +122,7 @@ void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
 
         for (; start < end; start++) {
                 dest = (void *)start + *start;
-                patch_instruction(dest, PPC_LWSYNC_INSTR);
+                patch_instruction(dest, PPC_INST_LWSYNC);
         }
 }
 
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index f9e506a735ae..0c16ab947f1f 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -1,6 +1,4 @@
 
-obj-y                           := math.o fmr.o lfd.o stfd.o
-
 obj-$(CONFIG_MATH_EMULATION)    += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
                                         fctiw.o fctiwz.o fdiv.o fdivs.o \
                                         fmadd.o fmadds.o fmsub.o fmsubs.o \
@@ -9,7 +7,8 @@ obj-$(CONFIG_MATH_EMULATION)	+= fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
                                         fres.o frsp.o frsqrte.o fsel.o lfs.o \
                                         fsqrt.o fsqrts.o fsub.o fsubs.o \
                                         mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
-                                        mtfsf.o mtfsfi.o stfiwx.o stfs.o
+                                        mtfsf.o mtfsfi.o stfiwx.o stfs.o \
+                                        math.o fmr.o lfd.o stfd.o
 
 obj-$(CONFIG_SPE)               += math_efp.o
 
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index 953cc4a1cde5..17290bcedc5e 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -6,7 +6,7 @@ ifeq ($(CONFIG_PPC64),y)
 EXTRA_CFLAGS    += -mno-minimal-toc
 endif
 
-obj-y                           := fault.o mem.o pgtable.o \
+obj-y                           := fault.o mem.o pgtable.o gup.o \
                                    init_$(CONFIG_WORD_SIZE).o \
                                    pgtable_$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_PPC_MMU_NOHASH)    += mmu_context_nohash.o tlb_nohash.o \
@@ -14,7 +14,7 @@ obj-$(CONFIG_PPC_MMU_NOHASH)	+= mmu_context_nohash.o tlb_nohash.o \
 hash-$(CONFIG_PPC_NATIVE)       := hash_native_64.o
 obj-$(CONFIG_PPC64)             += hash_utils_64.o \
                                    slb_low.o slb.o stab.o \
-                                   gup.o mmap.o $(hash-y)
+                                   mmap_64.o $(hash-y)
 obj-$(CONFIG_PPC_STD_MMU_32)    += ppc_mmu_32.o
 obj-$(CONFIG_PPC_STD_MMU)       += hash_low_$(CONFIG_WORD_SIZE).o \
                                    tlb_hash$(CONFIG_WORD_SIZE).o \
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 91c7b8636b8a..76993941cac9 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -253,45 +253,33 @@ good_area:
 #endif /* CONFIG_8xx */
 
         if (is_exec) {
-#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
-                /* protection fault */
+#ifdef CONFIG_PPC_STD_MMU
+                /* Protection fault on exec go straight to failure on
+                 * Hash based MMUs as they either don't support per-page
+                 * execute permission, or if they do, it's handled already
+                 * at the hash level. This test would probably have to
+                 * be removed if we change the way this works to make hash
+                 * processors use the same I/D cache coherency mechanism
+                 * as embedded.
+                 */
                 if (error_code & DSISR_PROTFAULT)
                         goto bad_area;
+#endif /* CONFIG_PPC_STD_MMU */
+
                 /*
                  * Allow execution from readable areas if the MMU does not
                  * provide separate controls over reading and executing.
+                 *
+                 * Note: That code used to not be enabled for 4xx/BookE.
+                 * It is now as I/D cache coherency for these is done at
+                 * set_pte_at() time and I see no reason why the test
+                 * below wouldn't be valid on those processors. This -may-
+                 * break programs compiled with a really old ABI though.
                  */
                 if (!(vma->vm_flags & VM_EXEC) &&
                     (cpu_has_feature(CPU_FTR_NOEXECUTE) ||
                      !(vma->vm_flags & (VM_READ | VM_WRITE))))
                         goto bad_area;
-#else
-                pte_t *ptep;
-                pmd_t *pmdp;
-
-                /* Since 4xx/Book-E supports per-page execute permission,
-                 * we lazily flush dcache to icache. */
-                ptep = NULL;
-                if (get_pteptr(mm, address, &ptep, &pmdp)) {
-                        spinlock_t *ptl = pte_lockptr(mm, pmdp);
-                        spin_lock(ptl);
-                        if (pte_present(*ptep)) {
-                                struct page *page = pte_page(*ptep);
-
-                                if (!test_bit(PG_arch_1, &page->flags)) {
-                                        flush_dcache_icache_page(page);
-                                        set_bit(PG_arch_1, &page->flags);
-                                }
-                                pte_update(ptep, 0, _PAGE_HWEXEC |
-                                           _PAGE_ACCESSED);
-                                local_flush_tlb_page(vma, address);
-                                pte_unmap_unlock(ptep, ptl);
-                                up_read(&mm->mmap_sem);
-                                return 0;
-                        }
-                        pte_unmap_unlock(ptep, ptl);
-                }
-#endif
         /* a write */
         } else if (is_write) {
                 if (!(vma->vm_flags & VM_WRITE))
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index ea6e41e39d9f..bb3d65998e6b 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -56,10 +56,14 @@
 
 extern void loadcam_entry(unsigned int index);
 unsigned int tlbcam_index;
-static unsigned long __cam0, __cam1, __cam2;
+static unsigned long cam[CONFIG_LOWMEM_CAM_NUM];
 
 #define NUM_TLBCAMS     (16)
 
+#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
+#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
+#endif
+
 struct tlbcam TLBCAM[NUM_TLBCAMS];
 
 struct tlbcamrange {
@@ -107,7 +111,7 @@ void settlbcam(int index, unsigned long virt, phys_addr_t phys,
         unsigned int tsize, lz;
 
         asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
-        tsize = (21 - lz) / 2;
+        tsize = 21 - lz;
 
 #ifdef CONFIG_SMP
         if ((flags & _PAGE_NO_CACHE) == 0)
@@ -152,19 +156,19 @@ void invalidate_tlbcam_entry(int index)
         loadcam_entry(index);
 }
 
-void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
-                unsigned long cam2)
+unsigned long __init mmu_mapin_ram(void)
 {
-        settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0);
-        tlbcam_index++;
-        if (cam1) {
-                tlbcam_index++;
-                settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1, _PAGE_KERNEL, 0);
-        }
-        if (cam2) {
+        unsigned long virt = PAGE_OFFSET;
+        phys_addr_t phys = memstart_addr;
+
+        while (cam[tlbcam_index] && tlbcam_index < ARRAY_SIZE(cam)) {
+                settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], PAGE_KERNEL_X, 0);
+                virt += cam[tlbcam_index];
+                phys += cam[tlbcam_index];
                 tlbcam_index++;
-                settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1, cam2, _PAGE_KERNEL, 0);
         }
+
+        return virt - PAGE_OFFSET;
 }
 
 /*
@@ -175,51 +179,46 @@ void __init MMU_init_hw(void)
         flush_instruction_cache();
 }
 
-unsigned long __init mmu_mapin_ram(void)
-{
-        cam_mapin_ram(__cam0, __cam1, __cam2);
-
-        return __cam0 + __cam1 + __cam2;
-}
-
-
 void __init
 adjust_total_lowmem(void)
 {
-        phys_addr_t max_lowmem_size = __max_low_memory;
-        phys_addr_t cam_max_size = 0x10000000;
         phys_addr_t ram;
+        unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
+        char buf[ARRAY_SIZE(cam) * 5 + 1], *p = buf;
+        int i;
+        unsigned long virt = PAGE_OFFSET & 0xffffffffUL;
+        unsigned long phys = memstart_addr & 0xffffffffUL;
 
-        /* adjust CAM size to max_lowmem_size */
-        if (max_lowmem_size < cam_max_size)
-                cam_max_size = max_lowmem_size;
+        /* Convert (4^max) kB to (2^max) bytes */
+        max_cam = max_cam * 2 + 10;
 
-        /* adjust lowmem size to max_lowmem_size */
-        ram = min(max_lowmem_size, total_lowmem);
+        /* adjust lowmem size to __max_low_memory */
+        ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
 
         /* Calculate CAM values */
-        __cam0 = 1UL << 2 * (__ilog2(ram) / 2);
-        if (__cam0 > cam_max_size)
-                __cam0 = cam_max_size;
-        ram -= __cam0;
-        if (ram) {
-                __cam1 = 1UL << 2 * (__ilog2(ram) / 2);
-                if (__cam1 > cam_max_size)
-                        __cam1 = cam_max_size;
-                ram -= __cam1;
-        }
-        if (ram) {
-                __cam2 = 1UL << 2 * (__ilog2(ram) / 2);
-                if (__cam2 > cam_max_size)
-                        __cam2 = cam_max_size;
-                ram -= __cam2;
+        __max_low_memory = 0;
+        for (i = 0; ram && i < ARRAY_SIZE(cam); i++) {
+                unsigned int camsize = __ilog2(ram) & ~1U;
+                unsigned int align = __ffs(virt | phys) & ~1U;
+
+                if (camsize > align)
+                        camsize = align;
+                if (camsize > max_cam)
+                        camsize = max_cam;
+
+                cam[i] = 1UL << camsize;
+                ram -= cam[i];
+                __max_low_memory += cam[i];
+                virt += cam[i];
+                phys += cam[i];
+
+                p += sprintf(p, "%lu/", cam[i] >> 20);
         }
+        for (; i < ARRAY_SIZE(cam); i++)
+                p += sprintf(p, "0/");
+        p[-1] = '\0';
 
-        printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb,"
-                        " CAM2=%ldMb residual: %ldMb\n",
-                        __cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
-                        (long int)((total_lowmem - __cam0 - __cam1 - __cam2)
-                                   >> 20));
-        __max_low_memory = __cam0 + __cam1 + __cam2;
+        pr_info("Memory CAM mapping: %s Mb, residual: %dMb\n", buf,
+                (unsigned int)((total_lowmem - __max_low_memory) >> 20));
         __initial_memory_limit_addr = memstart_addr + __max_low_memory;
 }
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c
index 28a114db3ba0..bc400c78c97f 100644
--- a/arch/powerpc/mm/gup.c
+++ b/arch/powerpc/mm/gup.c
@@ -14,6 +14,8 @@
 #include <linux/rwsem.h>
 #include <asm/pgtable.h>
 
+#ifdef __HAVE_ARCH_PTE_SPECIAL
+
 /*
  * The performance critical leaf functions are made noinline otherwise gcc
  * inlines everything into a single function which results in too much
@@ -151,8 +153,11 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
         unsigned long addr, len, end;
         unsigned long next;
         pgd_t *pgdp;
-        int psize, nr = 0;
+        int nr = 0;
+#ifdef CONFIG_PPC64
         unsigned int shift;
+        int psize;
+#endif
 
         pr_debug("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read");
 
@@ -205,8 +210,13 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
          */
         local_irq_disable();
 
+#ifdef CONFIG_PPC64
+        /* Those bits are related to hugetlbfs implementation and only exist
+         * on 64-bit for now
+         */
         psize = get_slice_psize(mm, addr);
         shift = mmu_psize_defs[psize].shift;
+#endif /* CONFIG_PPC64 */
 
 #ifdef CONFIG_HUGETLB_PAGE
         if (unlikely(mmu_huge_psizes[psize])) {
@@ -236,7 +246,9 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
                 do {
                         pgd_t pgd = *pgdp;
 
+#ifdef CONFIG_PPC64
                         VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift);
+#endif
                         pr_debug("  %016lx: normal pgd %p\n", addr,
                                  (void *)pgd_val(pgd));
                         next = pgd_addr_end(addr, end);
@@ -279,3 +291,5 @@ slow_irqon:
                 return ret;
         }
 }
+
+#endif /* __HAVE_ARCH_PTE_SPECIAL */
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 8d5b4758c13a..db556d25c3a7 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -516,7 +516,7 @@ static int __init htab_dt_scan_pftsize(unsigned long node,
 
 static unsigned long __init htab_get_table_size(void)
 {
-        unsigned long mem_size, rnd_mem_size, pteg_count;
+        unsigned long mem_size, rnd_mem_size, pteg_count, psize;
 
         /* If hash size isn't already provided by the platform, we try to
          * retrieve it from the device-tree. If it's not there neither, we
@@ -534,7 +534,8 @@ static unsigned long __init htab_get_table_size(void)
                 rnd_mem_size <<= 1;
 
         /* # pages / 2 */
-        pteg_count = max(rnd_mem_size >> (12 + 1), 1UL << 11);
+        psize = mmu_psize_defs[mmu_virtual_psize].shift;
+        pteg_count = max(rnd_mem_size >> (psize + 1), 1UL << 11);
 
         return pteg_count << 7;
 }
@@ -589,7 +590,7 @@ static void __init htab_finish_init(void)
         make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp);
 }
 
-void __init htab_initialize(void)
+static void __init htab_initialize(void)
 {
         unsigned long table;
         unsigned long pteg_count;
@@ -731,11 +732,43 @@ void __init htab_initialize(void)
 #undef KB
 #undef MB
 
-void htab_initialize_secondary(void)
+void __init early_init_mmu(void)
 {
+        /* Setup initial STAB address in the PACA */
+        get_paca()->stab_real = __pa((u64)&initial_stab);
+        get_paca()->stab_addr = (u64)&initial_stab;
+
+        /* Initialize the MMU Hash table and create the linear mapping
+         * of memory. Has to be done before stab/slb initialization as
+         * this is currently where the page size encoding is obtained
+         */
+        htab_initialize();
+
+        /* Initialize stab / SLB management except on iSeries
+         */
+        if (cpu_has_feature(CPU_FTR_SLB))
+                slb_initialize();
+        else if (!firmware_has_feature(FW_FEATURE_ISERIES))
+                stab_initialize(get_paca()->stab_real);
+}
+
+#ifdef CONFIG_SMP
+void __init early_init_mmu_secondary(void)
+{
+        /* Initialize hash table for that CPU */
         if (!firmware_has_feature(FW_FEATURE_LPAR))
                 mtspr(SPRN_SDR1, _SDR1);
+
+        /* Initialize STAB/SLB. We use a virtual address as it works
+         * in real mode on pSeries and we want a virutal address on
+         * iSeries anyway
+         */
+        if (cpu_has_feature(CPU_FTR_SLB))
+                slb_initialize();
+        else
+                stab_initialize(get_paca()->stab_addr);
 }
+#endif /* CONFIG_SMP */
 
 /*
  * Called by asm hashtable.S for doing lazy icache flush
@@ -858,7 +891,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
         unsigned long vsid;
         struct mm_struct *mm;
         pte_t *ptep;
-        cpumask_t tmp;
+        const struct cpumask *tmp;
         int rc, user_region = 0, local = 0;
         int psize, ssize;
 
@@ -906,8 +939,8 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
                 return 1;
 
         /* Check CPU locality */
-        tmp = cpumask_of_cpu(smp_processor_id());
-        if (user_region && cpus_equal(mm->cpu_vm_mask, tmp))
+        tmp = cpumask_of(smp_processor_id());
+        if (user_region && cpumask_equal(mm_cpumask(mm), tmp))
                 local = 1;
 
 #ifdef CONFIG_HUGETLB_PAGE
@@ -1023,7 +1056,6 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
         unsigned long vsid;
         void *pgdir;
         pte_t *ptep;
-        cpumask_t mask;
         unsigned long flags;
         int local = 0;
         int ssize;
@@ -1066,8 +1098,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
         local_irq_save(flags);
 
         /* Is that local to this CPU ? */
-        mask = cpumask_of_cpu(smp_processor_id());
-        if (cpus_equal(mm->cpu_vm_mask, mask))
+        if (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id())))
                 local = 1;
 
         /* Hash it in */
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index f00f09a77f12..f668fa9ba804 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -472,40 +472,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
 {
 #ifdef CONFIG_PPC_STD_MMU
         unsigned long access = 0, trap;
-#endif
-        unsigned long pfn = pte_pfn(pte);
-
-        /* handle i-cache coherency */
-        if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE) &&
-            !cpu_has_feature(CPU_FTR_NOEXECUTE) &&
-            pfn_valid(pfn)) {
-                struct page *page = pfn_to_page(pfn);
-#ifdef CONFIG_8xx
-                /* On 8xx, cache control instructions (particularly
-                 * "dcbst" from flush_dcache_icache) fault as write
-                 * operation if there is an unpopulated TLB entry
-                 * for the address in question. To workaround that,
-                 * we invalidate the TLB here, thus avoiding dcbst
-                 * misbehaviour.
-                 */
-                _tlbil_va(address, 0 /* 8xx doesn't care about PID */);
-#endif
-                /* The _PAGE_USER test should really be _PAGE_EXEC, but
-                 * older glibc versions execute some code from no-exec
-                 * pages, which for now we are supporting.  If exec-only
-                 * pages are ever implemented, this will have to change.
-                 */
-                if (!PageReserved(page) && (pte_val(pte) & _PAGE_USER)
-                    && !test_bit(PG_arch_1, &page->flags)) {
-                        if (vma->vm_mm == current->active_mm) {
-                                __flush_dcache_icache((void *) address);
-                        } else
-                                flush_dcache_icache_page(page);
-                        set_bit(PG_arch_1, &page->flags);
-                }
-        }
 
-#ifdef CONFIG_PPC_STD_MMU
         /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */
         if (!pte_young(pte) || address >= TASK_SIZE)
                 return;
diff --git a/arch/powerpc/mm/mmap.c b/arch/powerpc/mm/mmap_64.c
index 86010fc7d3b1..0d957a4c70fe 100644
--- a/arch/powerpc/mm/mmap.c
+++ b/arch/powerpc/mm/mmap_64.c
@@ -24,36 +24,26 @@
 
 #include <linux/personality.h>
 #include <linux/mm.h>
+#include <linux/random.h>
 #include <linux/sched.h>
 
 /*
  * Top of mmap area (just below the process stack).
  *
- * Leave an at least ~128 MB hole.
+ * Leave at least a ~128 MB hole on 32bit applications.
+ *
+ * On 64bit applications we randomise the stack by 1GB so we need to
+ * space our mmap start address by a further 1GB, otherwise there is a
+ * chance the mmap area will end up closer to the stack than our ulimit
+ * requires.
  */
-#define MIN_GAP (128*1024*1024)
+#define MIN_GAP32 (128*1024*1024)
+#define MIN_GAP64 ((128 + 1024)*1024*1024UL)
+#define MIN_GAP ((is_32bit_task()) ? MIN_GAP32 : MIN_GAP64)
 #define MAX_GAP (TASK_SIZE/6*5)
 
-static inline unsigned long mmap_base(void)
-{
-        unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur;
-
-        if (gap < MIN_GAP)
-                gap = MIN_GAP;
-        else if (gap > MAX_GAP)
-                gap = MAX_GAP;
-
-        return TASK_SIZE - (gap & PAGE_MASK);
-}
-
 static inline int mmap_is_legacy(void)
 {
-        /*
-         * Force standard allocation for 64 bit programs.
-         */
-        if (!test_thread_flag(TIF_32BIT))
-                return 1;
-
         if (current->personality & ADDR_COMPAT_LAYOUT)
                 return 1;
 
@@ -64,6 +54,40 @@ static inline int mmap_is_legacy(void)
 }
 
 /*
+ * Since get_random_int() returns the same value within a 1 jiffy window,
+ * we will almost always get the same randomisation for the stack and mmap
+ * region. This will mean the relative distance between stack and mmap will
+ * be the same.
+ *
+ * To avoid this we can shift the randomness by 1 bit.
+ */
+static unsigned long mmap_rnd(void)
+{
+        unsigned long rnd = 0;
+
+        if (current->flags & PF_RANDOMIZE) {
+                /* 8MB for 32bit, 1GB for 64bit */
+                if (is_32bit_task())
+                        rnd = (long)(get_random_int() % (1<<(22-PAGE_SHIFT)));
+                else
+                        rnd = (long)(get_random_int() % (1<<(29-PAGE_SHIFT)));
+        }
+        return (rnd << PAGE_SHIFT) * 2;
+}
+
+static inline unsigned long mmap_base(void)
+{
+        unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur;
+
+        if (gap < MIN_GAP)
+                gap = MIN_GAP;
+        else if (gap > MAX_GAP)
+                gap = MAX_GAP;
+
+        return PAGE_ALIGN(TASK_SIZE - gap - mmap_rnd());
+}
+
+/*
  * This function, called very early during the creation of a new
  * process VM image, sets up which VM layout function to use:
  */
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index 52a0cfc38b64..a70e311bd457 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -97,7 +97,7 @@ static unsigned int steal_context_smp(unsigned int id)
                 mm->context.id = MMU_NO_CONTEXT;
 
                 /* Mark it stale on all CPUs that used this mm */
-                for_each_cpu_mask_nr(cpu, mm->cpu_vm_mask)
+                for_each_cpu(cpu, mm_cpumask(mm))
                         __set_bit(id, stale_map[cpu]);
                 return id;
         }
@@ -380,7 +380,7 @@ void __init mmu_context_init(void)
 #endif
 
         printk(KERN_INFO
-               "MMU: Allocated %d bytes of context maps for %d contexts\n",
+               "MMU: Allocated %zu bytes of context maps for %d contexts\n",
                2 * CTX_MAP_SIZE + (sizeof(void *) * (last_context + 1)),
                last_context - first_context + 1);
 
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 5ac08b8ab654..9047145095aa 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -158,35 +158,6 @@ static void unmap_cpu_from_node(unsigned long cpu)
 }
 #endif /* CONFIG_HOTPLUG_CPU */
 
-static struct device_node * __cpuinit find_cpu_node(unsigned int cpu)
-{
-        unsigned int hw_cpuid = get_hard_smp_processor_id(cpu);
-        struct device_node *cpu_node = NULL;
-        const unsigned int *interrupt_server, *reg;
-        int len;
-
-        while ((cpu_node = of_find_node_by_type(cpu_node, "cpu")) != NULL) {
-                /* Try interrupt server first */
-                interrupt_server = of_get_property(cpu_node,
-                                        "ibm,ppc-interrupt-server#s", &len);
-
-                len = len / sizeof(u32);
-
-                if (interrupt_server && (len > 0)) {
-                        while (len--) {
-                                if (interrupt_server[len] == hw_cpuid)
-                                        return cpu_node;
-                        }
-                } else {
-                        reg = of_get_property(cpu_node, "reg", &len);
-                        if (reg && (len > 0) && (reg[0] == hw_cpuid))
-                                return cpu_node;
-                }
-        }
-
-        return NULL;
-}
-
 /* must hold reference to node during call */
 static const int *of_get_associativity(struct device_node *dev)
 {
@@ -290,7 +261,7 @@ static int __init find_min_common_depth(void)
         ref_points = of_get_property(rtas_root,
                         "ibm,associativity-reference-points", &len);
 
-        if ((len >= 1) && ref_points) {
+        if ((len >= 2 * sizeof(unsigned int)) && ref_points) {
                 depth = ref_points[1];
         } else {
                 dbg("NUMA: ibm,associativity-reference-points not found.\n");
@@ -470,7 +441,7 @@ static int of_drconf_to_nid_single(struct of_drconf_cell *drmem,
 static int __cpuinit numa_setup_cpu(unsigned long lcpu)
 {
         int nid = 0;
-        struct device_node *cpu = find_cpu_node(lcpu);
+        struct device_node *cpu = of_get_cpu_node(lcpu, NULL);
 
         if (!cpu) {
                 WARN_ON(1);
@@ -652,7 +623,7 @@ static int __init parse_numa_properties(void)
         for_each_present_cpu(i) {
                 int nid;
 
-                cpu = find_cpu_node(i);
+                cpu = of_get_cpu_node(i, NULL);
                 BUG_ON(!cpu);
                 nid = of_node_to_nid_single(cpu);
                 of_node_put(cpu);
@@ -1041,57 +1012,32 @@ early_param("numa", early_numa);
 
 #ifdef CONFIG_MEMORY_HOTPLUG
 /*
- * Validate the node associated with the memory section we are
- * trying to add.
- */
-int valid_hot_add_scn(int *nid, unsigned long start, u32 lmb_size,
-                      unsigned long scn_addr)
-{
-        nodemask_t nodes;
-
-        if (*nid < 0 || !node_online(*nid))
-                *nid = any_online_node(NODE_MASK_ALL);
-
-        if ((scn_addr >= start) && (scn_addr < (start + lmb_size))) {
-                nodes_setall(nodes);
-                while (NODE_DATA(*nid)->node_spanned_pages == 0) {
-                        node_clear(*nid, nodes);
-                        *nid = any_online_node(nodes);
-                }
-
-                return 1;
-        }
-
-        return 0;
-}
-
-/*
- * Find the node associated with a hot added memory section represented
- * by the ibm,dynamic-reconfiguration-memory node.
+ * Find the node associated with a hot added memory section for
+ * memory represented in the device tree by the property
+ * ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory.
  */
 static int hot_add_drconf_scn_to_nid(struct device_node *memory,
                                      unsigned long scn_addr)
 {
         const u32 *dm;
-        unsigned int n, rc;
+        unsigned int drconf_cell_cnt, rc;
         unsigned long lmb_size;
-        int default_nid = any_online_node(NODE_MASK_ALL);
-        int nid;
         struct assoc_arrays aa;
+        int nid = -1;
 
-        n = of_get_drconf_memory(memory, &dm);
-        if (!n)
-                return default_nid;;
+        drconf_cell_cnt = of_get_drconf_memory(memory, &dm);
+        if (!drconf_cell_cnt)
+                return -1;
 
         lmb_size = of_get_lmb_size(memory);
         if (!lmb_size)
-                return default_nid;
+                return -1;
 
         rc = of_get_assoc_arrays(memory, &aa);
         if (rc)
-                return default_nid;
+                return -1;
 
-        for (; n != 0; --n) {
+        for (; drconf_cell_cnt != 0; --drconf_cell_cnt) {
                 struct of_drconf_cell drmem;
 
                 read_drconf_cell(&drmem, &dm);
@@ -1102,15 +1048,57 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory,
                     || !(drmem.flags & DRCONF_MEM_ASSIGNED))
                         continue;
 
+                if ((scn_addr < drmem.base_addr)
+                    || (scn_addr >= (drmem.base_addr + lmb_size)))
+                        continue;
+
                 nid = of_drconf_to_nid_single(&drmem, &aa);
+                break;
+        }
+
+        return nid;
+}
 
-                if (valid_hot_add_scn(&nid, drmem.base_addr, lmb_size,
-                                      scn_addr))
-                        return nid;
+/*
+ * Find the node associated with a hot added memory section for memory
+ * represented in the device tree as a node (i.e. memory@XXXX) for
+ * each lmb.
+ */
+int hot_add_node_scn_to_nid(unsigned long scn_addr)
+{
+        struct device_node *memory = NULL;
+        int nid = -1;
+
+        while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
+                unsigned long start, size;
+                int ranges;
+                const unsigned int *memcell_buf;
+                unsigned int len;
+
+                memcell_buf = of_get_property(memory, "reg", &len);
+                if (!memcell_buf || len <= 0)
+                        continue;
+
+                /* ranges in cell */
+                ranges = (len >> 2) / (n_mem_addr_cells + n_mem_size_cells);
+
+                while (ranges--) {
+                        start = read_n_cells(n_mem_addr_cells, &memcell_buf);
+                        size = read_n_cells(n_mem_size_cells, &memcell_buf);
+
+                        if ((scn_addr < start) || (scn_addr >= (start + size)))
+                                continue;
+
+                        nid = of_node_to_nid_single(memory);
+                        break;
+                }
+
+                of_node_put(memory);
+                if (nid >= 0)
+                        break;
         }
 
-        BUG();  /* section address should be found above */
-        return 0;
+        return nid;
 }
 
 /*
@@ -1121,7 +1109,7 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory,
 int hot_add_scn_to_nid(unsigned long scn_addr)
 {
         struct device_node *memory = NULL;
-        int nid;
+        int nid, found = 0;
 
         if (!numa_enabled || (min_common_depth < 0))
                 return any_online_node(NODE_MASK_ALL);
@@ -1130,35 +1118,25 @@ int hot_add_scn_to_nid(unsigned long scn_addr)
         if (memory) {
                 nid = hot_add_drconf_scn_to_nid(memory, scn_addr);
                 of_node_put(memory);
-                return nid;
+        } else {
+                nid = hot_add_node_scn_to_nid(scn_addr);
         }
 
-        while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
-                unsigned long start, size;
-                int ranges;
-                const unsigned int *memcell_buf;
-                unsigned int len;
-
-                memcell_buf = of_get_property(memory, "reg", &len);
-                if (!memcell_buf || len <= 0)
-                        continue;
+        if (nid < 0 || !node_online(nid))
+                nid = any_online_node(NODE_MASK_ALL);
 
-                /* ranges in cell */
-                ranges = (len >> 2) / (n_mem_addr_cells + n_mem_size_cells);
-ha_new_range:
-                start = read_n_cells(n_mem_addr_cells, &memcell_buf);
-                size = read_n_cells(n_mem_size_cells, &memcell_buf);
-                nid = of_node_to_nid_single(memory);
+        if (NODE_DATA(nid)->node_spanned_pages)
+                return nid;
 
-                if (valid_hot_add_scn(&nid, start, size, scn_addr)) {
-                        of_node_put(memory);
-                        return nid;
+        for_each_online_node(nid) {
+                if (NODE_DATA(nid)->node_spanned_pages) {
+                        found = 1;
+                        break;
                 }
-
-                if (--ranges)           /* process all ranges in cell */
-                        goto ha_new_range;
         }
-        BUG();  /* section address should be found above */
-        return 0;
+
+        BUG_ON(!found);
+        return nid;
 }
+
 #endif /* CONFIG_MEMORY_HOTPLUG */
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index 6d94116fdea1..f5c6fd42265c 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -1,5 +1,6 @@
 /*
  * This file contains common routines for dealing with free of page tables
+ * Along with common page table handling code
  *
  *  Derived from arch/powerpc/mm/tlb_64.c:
  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
@@ -81,11 +82,10 @@ static void pte_free_submit(struct pte_freelist_batch *batch)
 void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
 {
         /* This is safe since tlb_gather_mmu has disabled preemption */
-        cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
         struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
 
         if (atomic_read(&tlb->mm->mm_users) < 2 ||
-            cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
+            cpumask_equal(mm_cpumask(tlb->mm), cpumask_of(smp_processor_id()))){
                 pgtable_free(pgf);
                 return;
         }
@@ -115,3 +115,133 @@ void pte_free_finish(void)
         pte_free_submit(*batchp);
         *batchp = NULL;
 }
+
+/*
+ * Handle i/d cache flushing, called from set_pte_at() or ptep_set_access_flags()
+ */
+static pte_t do_dcache_icache_coherency(pte_t pte)
+{
+        unsigned long pfn = pte_pfn(pte);
+        struct page *page;
+
+        if (unlikely(!pfn_valid(pfn)))
+                return pte;
+        page = pfn_to_page(pfn);
+
+        if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) {
+                pr_debug("do_dcache_icache_coherency... flushing\n");
+                flush_dcache_icache_page(page);
+                set_bit(PG_arch_1, &page->flags);
+        }
+        else
+                pr_debug("do_dcache_icache_coherency... already clean\n");
+        return __pte(pte_val(pte) | _PAGE_HWEXEC);
+}
+
+static inline int is_exec_fault(void)
+{
+        return current->thread.regs && TRAP(current->thread.regs) == 0x400;
+}
+
+/* We only try to do i/d cache coherency on stuff that looks like
+ * reasonably "normal" PTEs. We currently require a PTE to be present
+ * and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE
+ */
+static inline int pte_looks_normal(pte_t pte)
+{
+        return (pte_val(pte) &
+                (_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE)) ==
+                (_PAGE_PRESENT);
+}
+
+#if defined(CONFIG_PPC_STD_MMU)
+/* Server-style MMU handles coherency when hashing if HW exec permission
+ * is supposed per page (currently 64-bit only). Else, we always flush
+ * valid PTEs in set_pte.
+ */
+static inline int pte_need_exec_flush(pte_t pte, int set_pte)
+{
+        return set_pte && pte_looks_normal(pte) &&
+                !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
+                  cpu_has_feature(CPU_FTR_NOEXECUTE));
+}
+#elif _PAGE_HWEXEC == 0
+/* Embedded type MMU without HW exec support (8xx only so far), we flush
+ * the cache for any present PTE
+ */
+static inline int pte_need_exec_flush(pte_t pte, int set_pte)
+{
+        return set_pte && pte_looks_normal(pte);
+}
+#else
+/* Other embedded CPUs with HW exec support per-page, we flush on exec
+ * fault if HWEXEC is not set
+ */
+static inline int pte_need_exec_flush(pte_t pte, int set_pte)
+{
+        return pte_looks_normal(pte) && is_exec_fault() &&
+                !(pte_val(pte) & _PAGE_HWEXEC);
+}
+#endif
+
+/*
+ * set_pte stores a linux PTE into the linux page table.
+ */
+void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
+{
+#ifdef CONFIG_DEBUG_VM
+        WARN_ON(pte_present(*ptep));
+#endif
+        /* Note: mm->context.id might not yet have been assigned as
+         * this context might not have been activated yet when this
+         * is called.
+         */
+        pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
+        if (pte_need_exec_flush(pte, 1))
+                pte = do_dcache_icache_coherency(pte);
+
+        /* Perform the setting of the PTE */
+        __set_pte_at(mm, addr, ptep, pte, 0);
+}
+
+/*
+ * This is called when relaxing access to a PTE. It's also called in the page
+ * fault path when we don't hit any of the major fault cases, ie, a minor
+ * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
+ * handled those two for us, we additionally deal with missing execute
+ * permission here on some processors
+ */
+int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
+                          pte_t *ptep, pte_t entry, int dirty)
+{
+        int changed;
+        if (!dirty && pte_need_exec_flush(entry, 0))
+                entry = do_dcache_icache_coherency(entry);
+        changed = !pte_same(*(ptep), entry);
+        if (changed) {
+                assert_pte_locked(vma->vm_mm, address);
+                __ptep_set_access_flags(ptep, entry);
+                flush_tlb_page_nohash(vma, address);
+        }
+        return changed;
+}
+
+#ifdef CONFIG_DEBUG_VM
+void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
+{
+        pgd_t *pgd;
+        pud_t *pud;
+        pmd_t *pmd;
+
+        if (mm == &init_mm)
+                return;
+        pgd = mm->pgd + pgd_index(addr);
+        BUG_ON(pgd_none(*pgd));
+        pud = pud_offset(pgd, addr);
+        BUG_ON(pud_none(*pud));
+        pmd = pmd_offset(pud, addr);
+        BUG_ON(!pmd_present(*pmd));
+        BUG_ON(!spin_is_locked(pte_lockptr(mm, pmd)));
+}
+#endif /* CONFIG_DEBUG_VM */
+
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 58bcaeba728d..430d0908fa50 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -129,7 +129,8 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
 void __iomem *
 ioremap(phys_addr_t addr, unsigned long size)
 {
-        return __ioremap(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED);
+        return __ioremap_caller(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED,
+                                __builtin_return_address(0));
 }
 EXPORT_SYMBOL(ioremap);
 
@@ -143,20 +144,27 @@ ioremap_flags(phys_addr_t addr, unsigned long size, unsigned long flags)
         /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */
         flags &= ~(_PAGE_USER | _PAGE_EXEC | _PAGE_HWEXEC);
 
-        return __ioremap(addr, size, flags);
+        return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
 }
 EXPORT_SYMBOL(ioremap_flags);
 
 void __iomem *
 __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
 {
+        return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+}
+
+void __iomem *
+__ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
+                 void *caller)
+{
         unsigned long v, i;
         phys_addr_t p;
         int err;
 
         /* Make sure we have the base flags */
         if ((flags & _PAGE_PRESENT) == 0)
-                flags |= _PAGE_KERNEL;
+                flags |= PAGE_KERNEL;
 
         /* Non-cacheable page cannot be coherent */
         if (flags & _PAGE_NO_CACHE)
@@ -212,7 +220,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
 
         if (mem_init_done) {
                 struct vm_struct *area;
-                area = get_vm_area(size, VM_IOREMAP);
+                area = get_vm_area_caller(size, VM_IOREMAP, caller);
                 if (area == 0)
                         return NULL;
                 v = (unsigned long) area->addr;
@@ -288,7 +296,7 @@ void __init mapin_ram(void)
         p = memstart_addr + s;
         for (; s < total_lowmem; s += PAGE_SIZE) {
                 ktext = ((char *) v >= _stext && (char *) v < etext);
-                f = ktext ?_PAGE_RAM_TEXT : _PAGE_RAM;
+                f = ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL;
                 map_page(v, p, f);
 #ifdef CONFIG_PPC_STD_MMU_32
                 if (ktext)
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 365e61ae5dbc..bfa7db6b2fd5 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -144,8 +144,8 @@ void __iounmap_at(void *ea, unsigned long size)
         unmap_kernel_range((unsigned long)ea, size);
 }
 
-void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
-                         unsigned long flags)
+void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
+                                unsigned long flags, void *caller)
 {
         phys_addr_t paligned;
         void __iomem *ret;
@@ -168,8 +168,9 @@ void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
         if (mem_init_done) {
                 struct vm_struct *area;
 
-                area = __get_vm_area(size, VM_IOREMAP,
-                                     ioremap_bot, IOREMAP_END);
+                area = __get_vm_area_caller(size, VM_IOREMAP,
+                                            ioremap_bot, IOREMAP_END,
+                                            caller);
                 if (area == NULL)
                         return NULL;
                 ret = __ioremap_at(paligned, area->addr, size, flags);
@@ -186,19 +187,27 @@ void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
         return ret;
 }
 
+void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
+                         unsigned long flags)
+{
+        return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
+}
 
 void __iomem * ioremap(phys_addr_t addr, unsigned long size)
 {
         unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED;
+        void *caller = __builtin_return_address(0);
 
         if (ppc_md.ioremap)
-                return ppc_md.ioremap(addr, size, flags);
-        return __ioremap(addr, size, flags);
+                return ppc_md.ioremap(addr, size, flags, caller);
+        return __ioremap_caller(addr, size, flags, caller);
 }
 
 void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size,
                              unsigned long flags)
 {
+        void *caller = __builtin_return_address(0);
+
         /* writeable implies dirty for kernel addresses */
         if (flags & _PAGE_RW)
                 flags |= _PAGE_DIRTY;
@@ -207,8 +216,8 @@ void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size,
         flags &= ~(_PAGE_USER | _PAGE_EXEC);
 
         if (ppc_md.ioremap)
-                return ppc_md.ioremap(addr, size, flags);
-        return __ioremap(addr, size, flags);
+                return ppc_md.ioremap(addr, size, flags, caller);
+        return __ioremap_caller(addr, size, flags, caller);
 }
 
 
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index fe65c405412c..2d2a87e10154 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -74,9 +74,6 @@ unsigned long p_mapped_by_bats(phys_addr_t pa)
 
 unsigned long __init mmu_mapin_ram(void)
 {
-#ifdef CONFIG_POWER4
-        return 0;
-#else
         unsigned long tot, bl, done;
         unsigned long max_size = (256<<20);
 
@@ -95,7 +92,7 @@ unsigned long __init mmu_mapin_ram(void)
                         break;
         }
 
-        setbat(2, PAGE_OFFSET, 0, bl, _PAGE_RAM);
+        setbat(2, PAGE_OFFSET, 0, bl, PAGE_KERNEL_X);
         done = (unsigned long)bat_addrs[2].limit - PAGE_OFFSET + 1;
         if ((done < tot) && !bat_addrs[3].limit) {
                 /* use BAT3 to cover a bit more */
@@ -103,12 +100,11 @@ unsigned long __init mmu_mapin_ram(void)
                 for (bl = 128<<10; bl < max_size; bl <<= 1)
                         if (bl * 2 > tot)
                                 break;
-                setbat(3, PAGE_OFFSET+done, done, bl, _PAGE_RAM);
+                setbat(3, PAGE_OFFSET+done, done, bl, PAGE_KERNEL_X);
                 done = (unsigned long)bat_addrs[3].limit - PAGE_OFFSET + 1;
         }
 
         return done;
-#endif
 }
 
 /*
@@ -136,9 +132,7 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys,
                 wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
                 bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
                 bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp;
-#ifndef CONFIG_KGDB /* want user access for breakpoints */
                 if (flags & _PAGE_USER)
-#endif
                         bat[1].batu |= 1;       /* Vp = 1 */
                 if (flags & _PAGE_GUARDED) {
                         /* G bit must be zero in IBATs */
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c
index c931bc7d1079..1be1b5e59796 100644
--- a/arch/powerpc/mm/tlb_hash64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -139,12 +139,12 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
  */
 void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
 {
-        cpumask_t tmp;
+        const struct cpumask *tmp;
         int i, local = 0;
 
         i = batch->index;
-        tmp = cpumask_of_cpu(smp_processor_id());
-        if (cpus_equal(batch->mm->cpu_vm_mask, tmp))
+        tmp = cpumask_of(smp_processor_id());
+        if (cpumask_equal(mm_cpumask(batch->mm), tmp))
                 local = 1;
         if (i == 1)
                 flush_hash_page(batch->vaddr[0], batch->pte[0],
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 39ac22b13c73..7af72970faed 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -132,11 +132,11 @@ void flush_tlb_mm(struct mm_struct *mm)
         pid = mm->context.id;
         if (unlikely(pid == MMU_NO_CONTEXT))
                 goto no_context;
-        cpu_mask = mm->cpu_vm_mask;
-        cpu_clear(smp_processor_id(), cpu_mask);
-        if (!cpus_empty(cpu_mask)) {
+        if (!cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) {
                 struct tlb_flush_param p = { .pid = pid };
-                smp_call_function_mask(cpu_mask, do_flush_tlb_mm_ipi, &p, 1);
+                /* Ignores smp_processor_id() even if set. */
+                smp_call_function_many(mm_cpumask(mm),
+                                       do_flush_tlb_mm_ipi, &p, 1);
         }
         _tlbil_pid(pid);
  no_context:
@@ -146,16 +146,15 @@ EXPORT_SYMBOL(flush_tlb_mm);
 
 void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
 {
-        cpumask_t cpu_mask;
+        struct cpumask *cpu_mask;
         unsigned int pid;
 
         preempt_disable();
         pid = vma ? vma->vm_mm->context.id : 0;
         if (unlikely(pid == MMU_NO_CONTEXT))
                 goto bail;
-        cpu_mask = vma->vm_mm->cpu_vm_mask;
-        cpu_clear(smp_processor_id(), cpu_mask);
-        if (!cpus_empty(cpu_mask)) {
+        cpu_mask = mm_cpumask(vma->vm_mm);
+        if (!cpumask_equal(cpu_mask, cpumask_of(smp_processor_id()))) {
                 /* If broadcast tlbivax is supported, use it */
                 if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) {
                         int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL);
@@ -167,7 +166,8 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
                         goto bail;
                 } else {
                         struct tlb_flush_param p = { .pid = pid, .addr = vmaddr };
-                        smp_call_function_mask(cpu_mask,
+                        /* Ignores smp_processor_id() even if set in cpu_mask */
+                        smp_call_function_many(cpu_mask,
                                                do_flush_tlb_page_ipi, &p, 1);
                 }
         }
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index f900a39e6ec4..788b87c36f77 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -118,25 +118,50 @@ _GLOBAL(_tlbil_pid)
 
 #elif defined(CONFIG_FSL_BOOKE)
 /*
- * FSL BookE implementations. Currently _pid and _all are the
- * same. This will change when tlbilx is actually supported and
- * performs invalidate-by-PID. This change will be driven by
- * mmu_features conditional
+ * FSL BookE implementations.
+ *
+ * Since feature sections are using _SECTION_ELSE we need
+ * to have the larger code path before the _SECTION_ELSE
  */
 
+#define MMUCSR0_TLBFI   (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
+                         MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
 /*
  * Flush MMU TLB on the local processor
  */
-_GLOBAL(_tlbil_pid)
 _GLOBAL(_tlbil_all)
-#define MMUCSR0_TLBFI   (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
-                         MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
+BEGIN_MMU_FTR_SECTION
+        li      r3,(MMUCSR0_TLBFI)@l
+        mtspr   SPRN_MMUCSR0, r3
+1:
+        mfspr   r3,SPRN_MMUCSR0
+        andi.   r3,r3,MMUCSR0_TLBFI@l
+        bne     1b
+MMU_FTR_SECTION_ELSE
+        PPC_TLBILX_ALL(0,0)
+ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
+        msync
+        isync
+        blr
+
+_GLOBAL(_tlbil_pid)
+BEGIN_MMU_FTR_SECTION
+        slwi    r3,r3,16
+        mfmsr   r10
+        wrteei  0
+        mfspr   r4,SPRN_MAS6    /* save MAS6 */
+        mtspr   SPRN_MAS6,r3
+        PPC_TLBILX_PID(0,0)
+        mtspr   SPRN_MAS6,r4    /* restore MAS6 */
+        wrtee   r10
+MMU_FTR_SECTION_ELSE
         li      r3,(MMUCSR0_TLBFI)@l
         mtspr   SPRN_MMUCSR0, r3
 1:
         mfspr   r3,SPRN_MMUCSR0
         andi.   r3,r3,MMUCSR0_TLBFI@l
         bne     1b
+ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBILX)
         msync
         isync
         blr
@@ -149,7 +174,9 @@ _GLOBAL(_tlbil_va)
         mfmsr   r10
         wrteei  0
         slwi    r4,r4,16
+        ori     r4,r4,(MAS6_ISIZE(BOOK3E_PAGESZ_4K))@l
         mtspr   SPRN_MAS6,r4            /* assume AS=0 for now */
+BEGIN_MMU_FTR_SECTION
         tlbsx   0,r3
         mfspr   r4,SPRN_MAS1            /* check valid */
         andis.  r3,r4,MAS1_VALID@h
@@ -157,6 +184,9 @@ _GLOBAL(_tlbil_va)
         rlwinm  r4,r4,0,1,31
         mtspr   SPRN_MAS1,r4
         tlbwe
+MMU_FTR_SECTION_ELSE
+        PPC_TLBILX_VA(0,r3)
+ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
         msync
         isync
 1:      wrtee   r10
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c
index cc599eb8768b..f8d36f940e88 100644
--- a/arch/powerpc/oprofile/op_model_7450.c
+++ b/arch/powerpc/oprofile/op_model_7450.c
@@ -29,7 +29,7 @@
 static unsigned long reset_value[OP_MAX_COUNTER];
 
 static int oprofile_running;
-static u32 mmcr0_val, mmcr1_val, mmcr2_val;
+static u32 mmcr0_val, mmcr1_val, mmcr2_val, num_pmcs;
 
 #define MMCR0_PMC1_SHIFT        6
 #define MMCR0_PMC2_SHIFT        0
@@ -88,13 +88,12 @@ static int fsl7450_cpu_setup(struct op_counter_config *ctr)
 
         mtspr(SPRN_MMCR0, mmcr0_val);
         mtspr(SPRN_MMCR1, mmcr1_val);
-        mtspr(SPRN_MMCR2, mmcr2_val);
+        if (num_pmcs > 4)
+                mtspr(SPRN_MMCR2, mmcr2_val);
 
         return 0;
 }
 
-#define NUM_CTRS 6
-
 /* Configures the global settings for the countes on all CPUs. */
 static int fsl7450_reg_setup(struct op_counter_config *ctr,
                              struct op_system_config *sys,
@@ -102,12 +101,13 @@ static int fsl7450_reg_setup(struct op_counter_config *ctr,
 {
         int i;
 
+        num_pmcs = num_ctrs;
         /* Our counters count up, and "count" refers to
          * how much before the next interrupt, and we interrupt
          * on overflow.  So we calculate the starting value
          * which will give us "count" until overflow.
          * Then we set the events on the enabled counters */
-        for (i = 0; i < NUM_CTRS; ++i)
+        for (i = 0; i < num_ctrs; ++i)
                 reset_value[i] = 0x80000000UL - ctr[i].count;
 
         /* Set events for Counters 1 & 2 */
@@ -123,9 +123,10 @@ static int fsl7450_reg_setup(struct op_counter_config *ctr,
 
         /* Set events for Counters 3-6 */
         mmcr1_val = mmcr1_event3(ctr[2].event)
-                | mmcr1_event4(ctr[3].event)
-                | mmcr1_event5(ctr[4].event)
-                | mmcr1_event6(ctr[5].event);
+                | mmcr1_event4(ctr[3].event);
+        if (num_ctrs > 4)
+                mmcr1_val |= mmcr1_event5(ctr[4].event)
+                        | mmcr1_event6(ctr[5].event);
 
         mmcr2_val = 0;
 
@@ -139,7 +140,7 @@ static int fsl7450_start(struct op_counter_config *ctr)
 
         mtmsr(mfmsr() | MSR_PMM);
 
-        for (i = 0; i < NUM_CTRS; ++i) {
+        for (i = 0; i < num_pmcs; ++i) {
                 if (ctr[i].enabled)
                         classic_ctr_write(i, reset_value[i]);
                 else
@@ -184,7 +185,7 @@ static void fsl7450_handle_interrupt(struct pt_regs *regs,
         pc = mfspr(SPRN_SIAR);
         is_kernel = is_kernel_addr(pc);
 
-        for (i = 0; i < NUM_CTRS; ++i) {
+        for (i = 0; i < num_pmcs; ++i) {
                 val = classic_ctr_read(i);
                 if (val < 0) {
                         if (oprofile_running && ctr[i].enabled) {
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 3496bc05058e..bf5c7ff2e6e5 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -118,6 +118,17 @@ config GLACIER
         help
           This option enables support for the AMCC PPC460GT evaluation board.
 
+config REDWOOD
+        bool "Redwood"
+        depends on 44x
+        default n
+        select PPC44x_SIMPLE
+        select 460SX
+        select PCI
+        select PPC4xx_PCI_EXPRESS
+        help
+          This option enables support for the AMCC PPC460SX Redwood board.
+
 config YOSEMITE
         bool "Yosemite"
         depends on 44x
@@ -220,6 +231,14 @@ config 460EX
         select IBM_NEW_EMAC_EMAC4
         select IBM_NEW_EMAC_TAH
 
+config 460SX
+        bool
+        select PPC_FPU
+        select IBM_NEW_EMAC_EMAC4
+        select IBM_NEW_EMAC_RGMII
+        select IBM_NEW_EMAC_ZMII
+        select IBM_NEW_EMAC_TAH
+
 # 44x errata/workaround config symbols, selected by the CPU models above
 config IBM440EP_ERR42
         bool
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c
index 76fdc51dac8b..5bcd441885e8 100644
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
@@ -57,6 +57,7 @@ static char *board[] __initdata = {
         "ibm,ebony",
         "amcc,katmai",
         "amcc,rainier",
+        "amcc,redwood",
         "amcc,sequoia",
         "amcc,taishan",
         "amcc,yosemite"
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 326852c78b8f..4dac9b0525a4 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -12,7 +12,7 @@ config PPC_MPC5121
 
 config MPC5121_ADS
         bool "Freescale MPC5121E ADS"
-        depends on PPC_MULTIPLATFORM && PPC32
+        depends on 6xx
         select DEFAULT_UIMAGE
         select PPC_MPC5121
         select MPC5121_ADS_CPLD
@@ -21,7 +21,7 @@ config MPC5121_ADS
 
 config MPC5121_GENERIC
         bool "Generic support for simple MPC5121 based boards"
-        depends on PPC_MULTIPLATFORM && PPC32
+        depends on 6xx
         select DEFAULT_UIMAGE
         select PPC_MPC5121
         help
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 696a5ee4962d..8b8e9560a315 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -1,6 +1,6 @@
 config PPC_MPC52xx
         bool "52xx-based boards"
-        depends on PPC_MULTIPLATFORM && PPC32
+        depends on 6xx
         select PPC_CLOCK
         select PPC_PCI_CHOICE
 
@@ -21,7 +21,13 @@ config PPC_MPC5200_SIMPLE
             and if there is a PCI bus node defined in the device tree.
 
           Boards that are compatible with this generic platform support
-          are: 'tqc,tqm5200', 'promess,motionpro', 'schindler,cm5200'.
+          are:
+             intercontrol,digsy-mtc
+             phytec,pcm030
+             phytec,pcm032
+             promess,motionpro
+             schindler,cm5200
+             tqc,tqm5200
 
 config PPC_EFIKA
         bool "bPlan Efika 5k2. MPC5200B based computer"
@@ -35,6 +41,11 @@ config PPC_LITE5200
         depends on PPC_MPC52xx
         select DEFAULT_UIMAGE
 
+config PPC_MEDIA5200
+        bool "Freescale Media5200 Eval Board"
+        depends on PPC_MPC52xx
+        select DEFAULT_UIMAGE
+
 config PPC_MPC5200_BUGFIX
         bool "MPC5200 (L25R) bugfix support"
         depends on PPC_MPC52xx
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile
index b8a52062738a..bfd4f52cf3dd 100644
--- a/arch/powerpc/platforms/52xx/Makefile
+++ b/arch/powerpc/platforms/52xx/Makefile
@@ -1,12 +1,13 @@
 #
 # Makefile for 52xx based boards
 #
-obj-y                           += mpc52xx_pic.o mpc52xx_common.o
+obj-y                           += mpc52xx_pic.o mpc52xx_common.o mpc52xx_gpt.o
 obj-$(CONFIG_PCI)               += mpc52xx_pci.o
 
 obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o
 obj-$(CONFIG_PPC_EFIKA)         += efika.o
 obj-$(CONFIG_PPC_LITE5200)      += lite5200.o
+obj-$(CONFIG_PPC_MEDIA5200)     += media5200.o
 
 obj-$(CONFIG_PM)                += mpc52xx_sleep.o mpc52xx_pm.o
 ifeq ($(CONFIG_PPC_LITE5200),y)
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
new file mode 100644
index 000000000000..68e4f1696d14
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -0,0 +1,273 @@
+/*
+ * Support for 'media5200-platform' compatible boards.
+ *
+ * Copyright (C) 2008 Secret Lab Technologies Ltd.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * Description:
+ * This code implements support for the Freescape Media5200 platform
+ * (built around the MPC5200 SoC).
+ *
+ * Notable characteristic of the Media5200 is the presence of an FPGA
+ * that has all external IRQ lines routed through it.  This file implements
+ * a cascaded interrupt controller driver which attaches itself to the
+ * Virtual IRQ subsystem after the primary mpc5200 interrupt controller
+ * is initialized.
+ *
+ */
+
+#undef DEBUG
+
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <asm/time.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include <asm/mpc52xx.h>
+
+static struct of_device_id mpc5200_gpio_ids[] __initdata = {
+        { .compatible = "fsl,mpc5200-gpio", },
+        { .compatible = "mpc5200-gpio", },
+        {}
+};
+
+/* FPGA register set */
+#define MEDIA5200_IRQ_ENABLE (0x40c)
+#define MEDIA5200_IRQ_STATUS (0x410)
+#define MEDIA5200_NUM_IRQS   (6)
+#define MEDIA5200_IRQ_SHIFT  (32 - MEDIA5200_NUM_IRQS)
+
+struct media5200_irq {
+        void __iomem *regs;
+        spinlock_t lock;
+        struct irq_host *irqhost;
+};
+struct media5200_irq media5200_irq;
+
+static void media5200_irq_unmask(unsigned int virq)
+{
+        unsigned long flags;
+        u32 val;
+
+        spin_lock_irqsave(&media5200_irq.lock, flags);
+        val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
+        val |= 1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq);
+        out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
+        spin_unlock_irqrestore(&media5200_irq.lock, flags);
+}
+
+static void media5200_irq_mask(unsigned int virq)
+{
+        unsigned long flags;
+        u32 val;
+
+        spin_lock_irqsave(&media5200_irq.lock, flags);
+        val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
+        val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq));
+        out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
+        spin_unlock_irqrestore(&media5200_irq.lock, flags);
+}
+
+static struct irq_chip media5200_irq_chip = {
+        .typename = "Media5200 FPGA",
+        .unmask = media5200_irq_unmask,
+        .mask = media5200_irq_mask,
+        .mask_ack = media5200_irq_mask,
+};
+
+void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
+{
+        int sub_virq, val;
+        u32 status, enable;
+
+        /* Mask off the cascaded IRQ */
+        spin_lock(&desc->lock);
+        desc->chip->mask(virq);
+        spin_unlock(&desc->lock);
+
+        /* Ask the FPGA for IRQ status.  If 'val' is 0, then no irqs
+         * are pending.  'ffs()' is 1 based */
+        status = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
+        enable = in_be32(media5200_irq.regs + MEDIA5200_IRQ_STATUS);
+        val = ffs((status & enable) >> MEDIA5200_IRQ_SHIFT);
+        if (val) {
+                sub_virq = irq_linear_revmap(media5200_irq.irqhost, val - 1);
+                /* pr_debug("%s: virq=%i s=%.8x e=%.8x hwirq=%i subvirq=%i\n",
+                 *          __func__, virq, status, enable, val - 1, sub_virq);
+                 */
+                generic_handle_irq(sub_virq);
+        }
+
+        /* Processing done; can reenable the cascade now */
+        spin_lock(&desc->lock);
+        desc->chip->ack(virq);
+        if (!(desc->status & IRQ_DISABLED))
+                desc->chip->unmask(virq);
+        spin_unlock(&desc->lock);
+}
+
+static int media5200_irq_map(struct irq_host *h, unsigned int virq,
+                             irq_hw_number_t hw)
+{
+        struct irq_desc *desc = get_irq_desc(virq);
+
+        pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw);
+        set_irq_chip_data(virq, &media5200_irq);
+        set_irq_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq);
+        set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
+        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+        desc->status |= IRQ_TYPE_LEVEL_LOW | IRQ_LEVEL;
+
+        return 0;
+}
+
+static int media5200_irq_xlate(struct irq_host *h, struct device_node *ct,
+                                 u32 *intspec, unsigned int intsize,
+                                 irq_hw_number_t *out_hwirq,
+                                 unsigned int *out_flags)
+{
+        if (intsize != 2)
+                return -1;
+
+        pr_debug("%s: bank=%i, number=%i\n", __func__, intspec[0], intspec[1]);
+        *out_hwirq = intspec[1];
+        *out_flags = IRQ_TYPE_NONE;
+        return 0;
+}
+
+static struct irq_host_ops media5200_irq_ops = {
+        .map = media5200_irq_map,
+        .xlate = media5200_irq_xlate,
+};
+
+/*
+ * Setup Media5200 IRQ mapping
+ */
+static void __init media5200_init_irq(void)
+{
+        struct device_node *fpga_np;
+        int cascade_virq;
+
+        /* First setup the regular MPC5200 interrupt controller */
+        mpc52xx_init_irq();
+
+        /* Now find the FPGA IRQ */
+        fpga_np = of_find_compatible_node(NULL, NULL, "fsl,media5200-fpga");
+        if (!fpga_np)
+                goto out;
+        pr_debug("%s: found fpga node: %s\n", __func__, fpga_np->full_name);
+
+        media5200_irq.regs = of_iomap(fpga_np, 0);
+        if (!media5200_irq.regs)
+                goto out;
+        pr_debug("%s: mapped to %p\n", __func__, media5200_irq.regs);
+
+        cascade_virq = irq_of_parse_and_map(fpga_np, 0);
+        if (!cascade_virq)
+                goto out;
+        pr_debug("%s: cascaded on virq=%i\n", __func__, cascade_virq);
+
+        /* Disable all FPGA IRQs */
+        out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, 0);
+
+        spin_lock_init(&media5200_irq.lock);
+
+        media5200_irq.irqhost = irq_alloc_host(fpga_np, IRQ_HOST_MAP_LINEAR,
+                                               MEDIA5200_NUM_IRQS,
+                                               &media5200_irq_ops, -1);
+        if (!media5200_irq.irqhost)
+                goto out;
+        pr_debug("%s: allocated irqhost\n", __func__);
+
+        media5200_irq.irqhost->host_data = &media5200_irq;
+
+        set_irq_data(cascade_virq, &media5200_irq);
+        set_irq_chained_handler(cascade_virq, media5200_irq_cascade);
+
+        return;
+
+ out:
+        pr_err("Could not find Media5200 FPGA; PCI interrupts will not work\n");
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init media5200_setup_arch(void)
+{
+
+        struct device_node *np;
+        struct mpc52xx_gpio __iomem *gpio;
+        u32 port_config;
+
+        if (ppc_md.progress)
+                ppc_md.progress("media5200_setup_arch()", 0);
+
+        /* Map important registers from the internal memory map */
+        mpc52xx_map_common_devices();
+
+        /* Some mpc5200 & mpc5200b related configuration */
+        mpc5200_setup_xlb_arbiter();
+
+        mpc52xx_setup_pci();
+
+        np = of_find_matching_node(NULL, mpc5200_gpio_ids);
+        gpio = of_iomap(np, 0);
+        of_node_put(np);
+        if (!gpio) {
+                printk(KERN_ERR "%s() failed. expect abnormal behavior\n",
+                       __func__);
+                return;
+        }
+
+        /* Set port config */
+        port_config = in_be32(&gpio->port_config);
+
+        port_config &= ~0x03000000;     /* ATA CS is on csb_4/5         */
+        port_config |=  0x01000000;
+
+        out_be32(&gpio->port_config, port_config);
+
+        /* Unmap zone */
+        iounmap(gpio);
+
+}
+
+/* list of the supported boards */
+static char *board[] __initdata = {
+        "fsl,media5200",
+        NULL
+};
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init media5200_probe(void)
+{
+        unsigned long node = of_get_flat_dt_root();
+        int i = 0;
+
+        while (board[i]) {
+                if (of_flat_dt_is_compatible(node, board[i]))
+                        break;
+                i++;
+        }
+
+        return (board[i] != NULL);
+}
+
+define_machine(media5200_platform) {
+        .name           = "media5200-platform",
+        .probe          = media5200_probe,
+        .setup_arch     = media5200_setup_arch,
+        .init           = mpc52xx_declare_of_platform_devices,
+        .init_IRQ       = media5200_init_irq,
+        .get_irq        = mpc52xx_get_irq,
+        .restart        = mpc52xx_restart,
+        .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
index a3bda0b9f1ff..c31e5b534f0a 100644
--- a/arch/powerpc/platforms/52xx/mpc5200_simple.c
+++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
@@ -50,8 +50,10 @@ static void __init mpc5200_simple_setup_arch(void)
 
 /* list of the supported boards */
 static char *board[] __initdata = {
-        "promess,motionpro",
+        "intercontrol,digsy-mtc",
         "phytec,pcm030",
+        "phytec,pcm032",
+        "promess,motionpro",
         "schindler,cm5200",
         "tqc,tqm5200",
         NULL
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 98367a0255f3..8e3dd5a0f228 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -28,9 +28,10 @@ static struct of_device_id mpc52xx_xlb_ids[] __initdata = {
 static struct of_device_id mpc52xx_bus_ids[] __initdata = {
         { .compatible = "fsl,mpc5200-immr", },
         { .compatible = "fsl,mpc5200b-immr", },
-        { .compatible = "fsl,lpb", },
+        { .compatible = "simple-bus", },
 
         /* depreciated matches; shouldn't be used in new device trees */
+        { .compatible = "fsl,lpb", },
         { .type = "builtin", .compatible = "mpc5200", }, /* efika */
         { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
         {}
@@ -205,6 +206,43 @@ int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
 EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv);
 
 /**
+ * mpc52xx_get_xtal_freq - Get SYS_XTAL_IN frequency for a device
+ *
+ * @node: device node
+ *
+ * Returns the frequency of the external oscillator clock connected
+ * to the SYS_XTAL_IN pin, or 0 if it cannot be determined.
+ */
+unsigned int mpc52xx_get_xtal_freq(struct device_node *node)
+{
+        u32 val;
+        unsigned int freq;
+
+        if (!mpc52xx_cdm)
+                return 0;
+
+        freq = mpc52xx_find_ipb_freq(node);
+        if (!freq)
+                return 0;
+
+        if (in_8(&mpc52xx_cdm->ipb_clk_sel) & 0x1)
+                freq *= 2;
+
+        val  = in_be32(&mpc52xx_cdm->rstcfg);
+        if (val & (1 << 5))
+                freq *= 8;
+        else
+                freq *= 4;
+        if (val & (1 << 6))
+                freq /= 12;
+        else
+                freq /= 16;
+
+        return freq;
+}
+EXPORT_SYMBOL(mpc52xx_get_xtal_freq);
+
+/**
  * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer
  */
 void
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
index 07f89ae46d04..2b8d8ef32e4e 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
@@ -354,88 +354,6 @@ static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
         .remove = mpc52xx_gpiochip_remove,
 };
 
-/*
- * GPIO LIB API implementation for gpt GPIOs.
- *
- * Each gpt only has a single GPIO.
- */
-static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
-{
-        struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
-        struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
-
-        return (in_be32(&regs->status) & (1 << (31 - 23))) ? 1 : 0;
-}
-
-static void
-mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
-{
-        struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
-        struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
-
-        if (val)
-                out_be32(&regs->mode, 0x34);
-        else
-                out_be32(&regs->mode, 0x24);
-
-        pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
-}
-
-static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
-{
-        struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
-        struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
-
-        out_be32(&regs->mode, 0x04);
-
-        return 0;
-}
-
-static int
-mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
-{
-        mpc52xx_gpt_gpio_set(gc, gpio, val);
-        pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
-
-        return 0;
-}
-
-static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev,
-                                        const struct of_device_id *match)
-{
-        struct of_mm_gpio_chip *mmchip;
-        struct of_gpio_chip *chip;
-
-        mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
-        if (!mmchip)
-                return -ENOMEM;
-
-        chip = &mmchip->of_gc;
-
-        chip->gpio_cells          = 2;
-        chip->gc.ngpio            = 1;
-        chip->gc.direction_input  = mpc52xx_gpt_gpio_dir_in;
-        chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
-        chip->gc.get              = mpc52xx_gpt_gpio_get;
-        chip->gc.set              = mpc52xx_gpt_gpio_set;
-
-        return of_mm_gpiochip_add(ofdev->node, mmchip);
-}
-
-static const struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
-        {
-                .compatible = "fsl,mpc5200-gpt-gpio",
-        },
-        {}
-};
-
-static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = {
-        .name = "gpio_gpt",
-        .match_table = mpc52xx_gpt_gpiochip_match,
-        .probe = mpc52xx_gpt_gpiochip_probe,
-        .remove = mpc52xx_gpiochip_remove,
-};
-
 static int __init mpc52xx_gpio_init(void)
 {
         if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
@@ -444,9 +362,6 @@ static int __init mpc52xx_gpio_init(void)
         if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
                 printk(KERN_ERR "Unable to register simple GPIO driver\n");
 
-        if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver))
-                printk(KERN_ERR "Unable to register gpt GPIO driver\n");
-
         return 0;
 }
 
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
new file mode 100644
index 000000000000..bfbcd418e690
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -0,0 +1,396 @@
+/*
+ * MPC5200 General Purpose Timer device driver
+ *
+ * Copyright (c) 2009 Secret Lab Technologies Ltd.
+ * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This file is a driver for the the General Purpose Timer (gpt) devices
+ * found on the MPC5200 SoC.  Each timer has an IO pin which can be used
+ * for GPIO or can be used to raise interrupts.  The timer function can
+ * be used independently from the IO pin, or it can be used to control
+ * output signals or measure input signals.
+ *
+ * This driver supports the GPIO and IRQ controller functions of the GPT
+ * device.  Timer functions are not yet supported, nor is the watchdog
+ * timer.
+ *
+ * To use the GPIO function, the following two properties must be added
+ * to the device tree node for the gpt device (typically in the .dts file
+ * for the board):
+ *      gpio-controller;
+ *      #gpio-cells = < 2 >;
+ * This driver will register the GPIO pin if it finds the gpio-controller
+ * property in the device tree.
+ *
+ * To use the IRQ controller function, the following two properties must
+ * be added to the device tree node for the gpt device:
+ *      interrupt-controller;
+ *      #interrupt-cells = < 1 >;
+ * The IRQ controller binding only uses one cell to specify the interrupt,
+ * and the IRQ flags are encoded in the cell.  A cell is not used to encode
+ * the IRQ number because the GPT only has a single IRQ source.  For flags,
+ * a value of '1' means rising edge sensitive and '2' means falling edge.
+ *
+ * The GPIO and the IRQ controller functions can be used at the same time,
+ * but in this use case the IO line will only work as an input.  Trying to
+ * use it as a GPIO output will not work.
+ *
+ * When using the GPIO line as an output, it can either be driven as normal
+ * IO, or it can be an Open Collector (OC) output.  At the moment it is the
+ * responsibility of either the bootloader or the platform setup code to set
+ * the output mode.  This driver does not change the output mode setting.
+ */
+
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
+#include <linux/kernel.h>
+#include <asm/mpc52xx.h>
+
+MODULE_DESCRIPTION("Freescale MPC52xx gpt driver");
+MODULE_AUTHOR("Sascha Hauer, Grant Likely");
+MODULE_LICENSE("GPL");
+
+/**
+ * struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver
+ * @dev: pointer to device structure
+ * @regs: virtual address of GPT registers
+ * @lock: spinlock to coordinate between different functions.
+ * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled
+ * @irqhost: Pointer to irq_host instance; used when IRQ mode is supported
+ */
+struct mpc52xx_gpt_priv {
+        struct device *dev;
+        struct mpc52xx_gpt __iomem *regs;
+        spinlock_t lock;
+        struct irq_host *irqhost;
+
+#if defined(CONFIG_GPIOLIB)
+        struct of_gpio_chip of_gc;
+#endif
+};
+
+#define MPC52xx_GPT_MODE_MS_MASK        (0x07)
+#define MPC52xx_GPT_MODE_MS_IC          (0x01)
+#define MPC52xx_GPT_MODE_MS_OC          (0x02)
+#define MPC52xx_GPT_MODE_MS_PWM         (0x03)
+#define MPC52xx_GPT_MODE_MS_GPIO        (0x04)
+
+#define MPC52xx_GPT_MODE_GPIO_MASK      (0x30)
+#define MPC52xx_GPT_MODE_GPIO_OUT_LOW   (0x20)
+#define MPC52xx_GPT_MODE_GPIO_OUT_HIGH  (0x30)
+
+#define MPC52xx_GPT_MODE_IRQ_EN         (0x0100)
+
+#define MPC52xx_GPT_MODE_ICT_MASK       (0x030000)
+#define MPC52xx_GPT_MODE_ICT_RISING     (0x010000)
+#define MPC52xx_GPT_MODE_ICT_FALLING    (0x020000)
+#define MPC52xx_GPT_MODE_ICT_TOGGLE     (0x030000)
+
+#define MPC52xx_GPT_STATUS_IRQMASK      (0x000f)
+
+/* ---------------------------------------------------------------------
+ * Cascaded interrupt controller hooks
+ */
+
+static void mpc52xx_gpt_irq_unmask(unsigned int virq)
+{
+        struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+        unsigned long flags;
+
+        spin_lock_irqsave(&gpt->lock, flags);
+        setbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);
+        spin_unlock_irqrestore(&gpt->lock, flags);
+}
+
+static void mpc52xx_gpt_irq_mask(unsigned int virq)
+{
+        struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+        unsigned long flags;
+
+        spin_lock_irqsave(&gpt->lock, flags);
+        clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);
+        spin_unlock_irqrestore(&gpt->lock, flags);
+}
+
+static void mpc52xx_gpt_irq_ack(unsigned int virq)
+{
+        struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+
+        out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);
+}
+
+static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
+{
+        struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+        unsigned long flags;
+        u32 reg;
+
+        dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, virq, flow_type);
+
+        spin_lock_irqsave(&gpt->lock, flags);
+        reg = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_MODE_ICT_MASK;
+        if (flow_type & IRQF_TRIGGER_RISING)
+                reg |= MPC52xx_GPT_MODE_ICT_RISING;
+        if (flow_type & IRQF_TRIGGER_FALLING)
+                reg |= MPC52xx_GPT_MODE_ICT_FALLING;
+        out_be32(&gpt->regs->mode, reg);
+        spin_unlock_irqrestore(&gpt->lock, flags);
+
+        return 0;
+}
+
+static struct irq_chip mpc52xx_gpt_irq_chip = {
+        .typename = "MPC52xx GPT",
+        .unmask = mpc52xx_gpt_irq_unmask,
+        .mask = mpc52xx_gpt_irq_mask,
+        .ack = mpc52xx_gpt_irq_ack,
+        .set_type = mpc52xx_gpt_irq_set_type,
+};
+
+void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
+{
+        struct mpc52xx_gpt_priv *gpt = get_irq_data(virq);
+        int sub_virq;
+        u32 status;
+
+        status = in_be32(&gpt->regs->status) & MPC52xx_GPT_STATUS_IRQMASK;
+        if (status) {
+                sub_virq = irq_linear_revmap(gpt->irqhost, 0);
+                generic_handle_irq(sub_virq);
+        }
+}
+
+static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
+                               irq_hw_number_t hw)
+{
+        struct mpc52xx_gpt_priv *gpt = h->host_data;
+
+        dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);
+        set_irq_chip_data(virq, gpt);
+        set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
+
+        return 0;
+}
+
+static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct,
+                                 u32 *intspec, unsigned int intsize,
+                                 irq_hw_number_t *out_hwirq,
+                                 unsigned int *out_flags)
+{
+        struct mpc52xx_gpt_priv *gpt = h->host_data;
+
+        dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]);
+
+        if ((intsize < 1) || (intspec[0] < 1) || (intspec[0] > 3)) {
+                dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name);
+                return -EINVAL;
+        }
+
+        *out_hwirq = 0; /* The GPT only has 1 IRQ line */
+        *out_flags = intspec[0];
+
+        return 0;
+}
+
+static struct irq_host_ops mpc52xx_gpt_irq_ops = {
+        .map = mpc52xx_gpt_irq_map,
+        .xlate = mpc52xx_gpt_irq_xlate,
+};
+
+static void
+mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
+{
+        int cascade_virq;
+        unsigned long flags;
+
+        /* Only setup cascaded IRQ if device tree claims the GPT is
+         * an interrupt controller */
+        if (!of_find_property(node, "interrupt-controller", NULL))
+                return;
+
+        cascade_virq = irq_of_parse_and_map(node, 0);
+
+        gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1,
+                                      &mpc52xx_gpt_irq_ops, -1);
+        if (!gpt->irqhost) {
+                dev_err(gpt->dev, "irq_alloc_host() failed\n");
+                return;
+        }
+
+        gpt->irqhost->host_data = gpt;
+
+        set_irq_data(cascade_virq, gpt);
+        set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
+
+        /* Set to Input Capture mode */
+        spin_lock_irqsave(&gpt->lock, flags);
+        clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,
+                        MPC52xx_GPT_MODE_MS_IC);
+        spin_unlock_irqrestore(&gpt->lock, flags);
+
+        dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq);
+}
+
+
+/* ---------------------------------------------------------------------
+ * GPIOLIB hooks
+ */
+#if defined(CONFIG_GPIOLIB)
+static inline struct mpc52xx_gpt_priv *gc_to_mpc52xx_gpt(struct gpio_chip *gc)
+{
+        return container_of(to_of_gpio_chip(gc), struct mpc52xx_gpt_priv,of_gc);
+}
+
+static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+        struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
+
+        return (in_be32(&gpt->regs->status) >> 8) & 1;
+}
+
+static void
+mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v)
+{
+        struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
+        unsigned long flags;
+        u32 r;
+
+        dev_dbg(gpt->dev, "%s: gpio:%d v:%d\n", __func__, gpio, v);
+        r = v ? MPC52xx_GPT_MODE_GPIO_OUT_HIGH : MPC52xx_GPT_MODE_GPIO_OUT_LOW;
+
+        spin_lock_irqsave(&gpt->lock, flags);
+        clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK, r);
+        spin_unlock_irqrestore(&gpt->lock, flags);
+}
+
+static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+        struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc);
+        unsigned long flags;
+
+        dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio);
+
+        spin_lock_irqsave(&gpt->lock, flags);
+        clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK);
+        spin_unlock_irqrestore(&gpt->lock, flags);
+
+        return 0;
+}
+
+static int
+mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+        mpc52xx_gpt_gpio_set(gc, gpio, val);
+        return 0;
+}
+
+static void
+mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
+{
+        int rc;
+
+        /* Only setup GPIO if the device tree claims the GPT is
+         * a GPIO controller */
+        if (!of_find_property(node, "gpio-controller", NULL))
+                return;
+
+        gpt->of_gc.gc.label = kstrdup(node->full_name, GFP_KERNEL);
+        if (!gpt->of_gc.gc.label) {
+                dev_err(gpt->dev, "out of memory\n");
+                return;
+        }
+
+        gpt->of_gc.gpio_cells = 2;
+        gpt->of_gc.gc.ngpio = 1;
+        gpt->of_gc.gc.direction_input  = mpc52xx_gpt_gpio_dir_in;
+        gpt->of_gc.gc.direction_output = mpc52xx_gpt_gpio_dir_out;
+        gpt->of_gc.gc.get = mpc52xx_gpt_gpio_get;
+        gpt->of_gc.gc.set = mpc52xx_gpt_gpio_set;
+        gpt->of_gc.gc.base = -1;
+        gpt->of_gc.xlate = of_gpio_simple_xlate;
+        node->data = &gpt->of_gc;
+        of_node_get(node);
+
+        /* Setup external pin in GPIO mode */
+        clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK,
+                        MPC52xx_GPT_MODE_MS_GPIO);
+
+        rc = gpiochip_add(&gpt->of_gc.gc);
+        if (rc)
+                dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc);
+
+        dev_dbg(gpt->dev, "%s() complete.\n", __func__);
+}
+#else /* defined(CONFIG_GPIOLIB) */
+static void
+mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *p, struct device_node *np) { }
+#endif /* defined(CONFIG_GPIOLIB) */
+
+/* ---------------------------------------------------------------------
+ * of_platform bus binding code
+ */
+static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev,
+                                       const struct of_device_id *match)
+{
+        struct mpc52xx_gpt_priv *gpt;
+
+        gpt = kzalloc(sizeof *gpt, GFP_KERNEL);
+        if (!gpt)
+                return -ENOMEM;
+
+        spin_lock_init(&gpt->lock);
+        gpt->dev = &ofdev->dev;
+        gpt->regs = of_iomap(ofdev->node, 0);
+        if (!gpt->regs) {
+                kfree(gpt);
+                return -ENOMEM;
+        }
+
+        dev_set_drvdata(&ofdev->dev, gpt);
+
+        mpc52xx_gpt_gpio_setup(gpt, ofdev->node);
+        mpc52xx_gpt_irq_setup(gpt, ofdev->node);
+
+        return 0;
+}
+
+static int mpc52xx_gpt_remove(struct of_device *ofdev)
+{
+        return -EBUSY;
+}
+
+static const struct of_device_id mpc52xx_gpt_match[] = {
+        { .compatible = "fsl,mpc5200-gpt", },
+
+        /* Depreciated compatible values; don't use for new dts files */
+        { .compatible = "fsl,mpc5200-gpt-gpio", },
+        { .compatible = "mpc5200-gpt", },
+        {}
+};
+
+static struct of_platform_driver mpc52xx_gpt_driver = {
+        .name = "mpc52xx-gpt",
+        .match_table = mpc52xx_gpt_match,
+        .probe = mpc52xx_gpt_probe,
+        .remove = mpc52xx_gpt_remove,
+};
+
+static int __init mpc52xx_gpt_init(void)
+{
+        if (of_register_platform_driver(&mpc52xx_gpt_driver))
+                pr_err("error registering MPC52xx GPT driver\n");
+
+        return 0;
+}
+
+/* Make sure GPIOs and IRQs get set up before anyone tries to use them */
+subsys_initcall(mpc52xx_gpt_init);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 0a093f03c758..480f806fd0a9 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -163,8 +163,6 @@ static void mpc52xx_extirq_mask(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_clrbit(&intr->ctrl, 11 - l2irq);
 }
 
@@ -176,8 +174,6 @@ static void mpc52xx_extirq_unmask(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_setbit(&intr->ctrl, 11 - l2irq);
 }
 
@@ -189,17 +185,15 @@ static void mpc52xx_extirq_ack(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_setbit(&intr->ctrl, 27-l2irq);
 }
 
 static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
 {
-        struct irq_desc *desc = get_irq_desc(virq);
         u32 ctrl_reg, type;
         int irq;
         int l2irq;
+        void *handler = handle_level_irq;
 
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
@@ -207,32 +201,21 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
         pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
 
         switch (flow_type) {
-        case IRQF_TRIGGER_HIGH:
-                type = 0;
-                break;
-        case IRQF_TRIGGER_RISING:
-                type = 1;
-                break;
-        case IRQF_TRIGGER_FALLING:
-                type = 2;
-                break;
-        case IRQF_TRIGGER_LOW:
-                type = 3;
-                break;
+        case IRQF_TRIGGER_HIGH: type = 0; break;
+        case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break;
+        case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break;
+        case IRQF_TRIGGER_LOW: type = 3; break;
         default:
                 type = 0;
         }
 
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
-        desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
-        if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
-                desc->status |= IRQ_LEVEL;
-
         ctrl_reg = in_be32(&intr->ctrl);
         ctrl_reg &= ~(0x3 << (22 - (l2irq * 2)));
         ctrl_reg |= (type << (22 - (l2irq * 2)));
         out_be32(&intr->ctrl, ctrl_reg);
 
+        __set_irq_handler_unlocked(virq, handler);
+
         return 0;
 }
 
@@ -247,6 +230,11 @@ static struct irq_chip mpc52xx_extirq_irqchip = {
 /*
  * Main interrupt irq_chip
  */
+static int mpc52xx_null_set_type(unsigned int virq, unsigned int flow_type)
+{
+        return 0; /* Do nothing so that the sense mask will get updated */
+}
+
 static void mpc52xx_main_mask(unsigned int virq)
 {
         int irq;
@@ -255,8 +243,6 @@ static void mpc52xx_main_mask(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_setbit(&intr->main_mask, 16 - l2irq);
 }
 
@@ -268,8 +254,6 @@ static void mpc52xx_main_unmask(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_clrbit(&intr->main_mask, 16 - l2irq);
 }
 
@@ -278,6 +262,7 @@ static struct irq_chip mpc52xx_main_irqchip = {
         .mask = mpc52xx_main_mask,
         .mask_ack = mpc52xx_main_mask,
         .unmask = mpc52xx_main_unmask,
+        .set_type = mpc52xx_null_set_type,
 };
 
 /*
@@ -291,8 +276,6 @@ static void mpc52xx_periph_mask(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_setbit(&intr->per_mask, 31 - l2irq);
 }
 
@@ -304,8 +287,6 @@ static void mpc52xx_periph_unmask(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_clrbit(&intr->per_mask, 31 - l2irq);
 }
 
@@ -314,6 +295,7 @@ static struct irq_chip mpc52xx_periph_irqchip = {
         .mask = mpc52xx_periph_mask,
         .mask_ack = mpc52xx_periph_mask,
         .unmask = mpc52xx_periph_unmask,
+        .set_type = mpc52xx_null_set_type,
 };
 
 /*
@@ -327,8 +309,6 @@ static void mpc52xx_sdma_mask(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_setbit(&sdma->IntMask, l2irq);
 }
 
@@ -340,8 +320,6 @@ static void mpc52xx_sdma_unmask(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         io_be_clrbit(&sdma->IntMask, l2irq);
 }
 
@@ -353,8 +331,6 @@ static void mpc52xx_sdma_ack(unsigned int virq)
         irq = irq_map[virq].hwirq;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq);
-
         out_be32(&sdma->IntPend, 1 << l2irq);
 }
 
@@ -363,9 +339,19 @@ static struct irq_chip mpc52xx_sdma_irqchip = {
         .mask = mpc52xx_sdma_mask,
         .unmask = mpc52xx_sdma_unmask,
         .ack = mpc52xx_sdma_ack,
+        .set_type = mpc52xx_null_set_type,
 };
 
 /**
+ * mpc52xx_is_extirq - Returns true if hwirq number is for an external IRQ
+ */
+static int mpc52xx_is_extirq(int l1, int l2)
+{
+        return ((l1 == 0) && (l2 == 0)) ||
+               ((l1 == 1) && (l2 >= 1) && (l2 <= 3));
+}
+
+/**
  * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property
  */
 static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
@@ -383,38 +369,23 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
 
         intrvect_l1 = (int)intspec[0];
         intrvect_l2 = (int)intspec[1];
-        intrvect_type = (int)intspec[2];
+        intrvect_type = (int)intspec[2] & 0x3;
 
         intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) &
                          MPC52xx_IRQ_L1_MASK;
         intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK;
 
-        pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
-                 intrvect_l2);
-
         *out_hwirq = intrvect_linux;
-        *out_flags = mpc52xx_map_senses[intrvect_type];
+        *out_flags = IRQ_TYPE_LEVEL_LOW;
+        if (mpc52xx_is_extirq(intrvect_l1, intrvect_l2))
+                *out_flags = mpc52xx_map_senses[intrvect_type];
 
+        pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1,
+                 intrvect_l2);
         return 0;
 }
 
 /**
- * mpc52xx_irqx_gettype - determine the IRQ sense type (level/edge)
- *
- * Only external IRQs need this.
- */
-static int mpc52xx_irqx_gettype(int irq)
-{
-        int type;
-        u32 ctrl_reg;
-
-        ctrl_reg = in_be32(&intr->ctrl);
-        type = (ctrl_reg >> (22 - irq * 2)) & 0x3;
-
-        return mpc52xx_map_senses[type];
-}
-
-/**
  * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure
  */
 static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
@@ -422,68 +393,46 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
 {
         int l1irq;
         int l2irq;
-        struct irq_chip *good_irqchip;
-        void *good_handle;
+        struct irq_chip *irqchip;
+        void *hndlr;
         int type;
+        u32 reg;
 
         l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET;
         l2irq = irq & MPC52xx_IRQ_L2_MASK;
 
         /*
-         * Most of ours IRQs will be level low
-         * Only external IRQs on some platform may be others
+         * External IRQs are handled differently by the hardware so they are
+         * handled by a dedicated irq_chip structure.
          */
-        type = IRQ_TYPE_LEVEL_LOW;
+        if (mpc52xx_is_extirq(l1irq, l2irq)) {
+                reg = in_be32(&intr->ctrl);
+                type = mpc52xx_map_senses[(reg >> (22 - l2irq * 2)) & 0x3];
+                if ((type == IRQ_TYPE_EDGE_FALLING) ||
+                    (type == IRQ_TYPE_EDGE_RISING))
+                        hndlr = handle_edge_irq;
+                else
+                        hndlr = handle_level_irq;
+
+                set_irq_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr);
+                pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n",
+                         __func__, l2irq, virq, (int)irq, type);
+                return 0;
+        }
 
+        /* It is an internal SOC irq.  Choose the correct irq_chip */
         switch (l1irq) {
-        case MPC52xx_IRQ_L1_CRIT:
-                pr_debug("%s: Critical. l2=%x\n", __func__, l2irq);
-
-                BUG_ON(l2irq != 0);
-
-                type = mpc52xx_irqx_gettype(l2irq);
-                good_irqchip = &mpc52xx_extirq_irqchip;
-                break;
-
-        case MPC52xx_IRQ_L1_MAIN:
-                pr_debug("%s: Main IRQ[1-3] l2=%x\n", __func__, l2irq);
-
-                if ((l2irq >= 1) && (l2irq <= 3)) {
-                        type = mpc52xx_irqx_gettype(l2irq);
-                        good_irqchip = &mpc52xx_extirq_irqchip;
-                } else {
-                        good_irqchip = &mpc52xx_main_irqchip;
-                }
-                break;
-
-        case MPC52xx_IRQ_L1_PERP:
-                pr_debug("%s: Peripherals. l2=%x\n", __func__, l2irq);
-                good_irqchip = &mpc52xx_periph_irqchip;
-                break;
-
-        case MPC52xx_IRQ_L1_SDMA:
-                pr_debug("%s: SDMA. l2=%x\n", __func__, l2irq);
-                good_irqchip = &mpc52xx_sdma_irqchip;
-                break;
-
+        case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break;
+        case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break;
+        case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break;
         default:
-                pr_err("%s: invalid virq requested (0x%x)\n", __func__, virq);
+                pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n",
+                       __func__, virq, l1irq, l2irq);
                 return -EINVAL;
         }
 
-        switch (type) {
-        case IRQ_TYPE_EDGE_FALLING:
-        case IRQ_TYPE_EDGE_RISING:
-                good_handle = handle_edge_irq;
-                break;
-        default:
-                good_handle = handle_level_irq;
-        }
-
-        set_irq_chip_and_handler(virq, good_irqchip, good_handle);
-
-        pr_debug("%s: virq=%x, hw=%x. type=%x\n", __func__, virq,
-                 (int)irq, type);
+        set_irq_chip_and_handler(virq, irqchip, handle_level_irq);
+        pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq);
 
         return 0;
 }
@@ -522,6 +471,8 @@ void __init mpc52xx_init_irq(void)
                 panic(__FILE__  ": find_and_map failed on 'mpc5200-bestcomm'. "
                                 "Check node !");
 
+        pr_debug("MPC5200 IRQ controller mapped to 0x%p\n", intr);
+
         /* Disable all interrupt sources. */
         out_be32(&sdma->IntPend, 0xffffffff);   /* 1 means clear pending */
         out_be32(&sdma->IntMask, 0xffffffff);   /* 1 means disabled */
@@ -613,8 +564,5 @@ unsigned int mpc52xx_get_irq(void)
                 }
         }
 
-        pr_debug("%s: irq=%x. virq=%d\n", __func__, irq,
-                 irq_linear_revmap(mpc52xx_irqhost, irq));
-
         return irq_linear_revmap(mpc52xx_irqhost, irq);
 }
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 30f008b2f92e..7c7df4003820 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,6 +1,6 @@
 menuconfig PPC_82xx
         bool "82xx-based boards (PQ II)"
-        depends on 6xx && PPC_MULTIPLATFORM
+        depends on 6xx
 
 if PPC_82xx
 
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 83c664afc897..437d29a59d72 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,6 +1,6 @@
 menuconfig PPC_83xx
         bool "83xx-based boards"
-        depends on 6xx && PPC_MULTIPLATFORM
+        depends on 6xx
         select PPC_UDBG_16550
         select PPC_PCI_CHOICE
         select FSL_PCI if PCI
diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c
index bb30d67ad0a2..aa0d84d22585 100644
--- a/arch/powerpc/platforms/83xx/asp834x.c
+++ b/arch/powerpc/platforms/83xx/asp834x.c
@@ -58,6 +58,7 @@ static struct __initdata of_device_id asp8347_ids[] = {
         { .type = "soc", },
         { .compatible = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index 91a2c80b9d72..0b4f883b20eb 100644
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc831x_rdb_setup_arch(void)
 #ifdef CONFIG_PCI
         for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
                 mpc83xx_add_bridge(np);
+        for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
+                mpc83xx_add_bridge(np);
 #endif
         mpc831x_usb_cfg();
 }
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index 76092d37c7d9..81e44fa1c644 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -42,6 +42,7 @@
 static struct of_device_id __initdata mpc834x_itx_ids[] = {
         { .compatible = "fsl,pq2pro-localbus", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index fc3f2ed1f3e9..d0a634b056ca 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -112,6 +112,7 @@ static struct of_device_id mpc834x_ids[] = {
         { .type = "soc", },
         { .compatible = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
index 530ef990ca7c..51df7e754698 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -84,14 +84,10 @@ static void __init mpc837x_mds_setup_arch(void)
                 ppc_md.progress("mpc837x_mds_setup_arch()", 0);
 
 #ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") {
-                if (!of_device_is_available(np)) {
-                        pr_warning("%s: disabled by the firmware.\n",
-                                   np->full_name);
-                        continue;
-                }
+        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+                mpc83xx_add_bridge(np);
+        for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
                 mpc83xx_add_bridge(np);
-        }
 #endif
         mpc837xmds_usb_cfg();
 }
@@ -100,6 +96,7 @@ static struct of_device_id mpc837x_ids[] = {
         { .type = "soc", },
         { .compatible = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 1d096545322b..76f3b32a155e 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -38,6 +38,8 @@ static void __init mpc837x_rdb_setup_arch(void)
 #ifdef CONFIG_PCI
         for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
                 mpc83xx_add_bridge(np);
+        for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
+                mpc83xx_add_bridge(np);
 #endif
         mpc837x_usb_cfg();
 }
@@ -46,6 +48,7 @@ static struct of_device_id mpc837x_ids[] = {
         { .type = "soc", },
         { .compatible = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/83xx/sbc834x.c b/arch/powerpc/platforms/83xx/sbc834x.c
index 156c4e218009..49023dbe1576 100644
--- a/arch/powerpc/platforms/83xx/sbc834x.c
+++ b/arch/powerpc/platforms/83xx/sbc834x.c
@@ -84,6 +84,7 @@ static struct __initdata of_device_id sbc834x_ids[] = {
         { .type = "soc", },
         { .compatible = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index cc99c280aad9..11e1fac17c7f 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -14,6 +14,7 @@
 #include <linux/stddef.h>
 #include <linux/kernel.h>
 #include <linux/errno.h>
+#include <linux/of.h>
 
 #include <asm/io.h>
 #include <asm/prom.h>
@@ -210,7 +211,7 @@ int mpc837x_usb_cfg(void)
         int ret = 0;
 
         np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
-        if (!np)
+        if (!np || !of_device_is_available(np))
                 return -ENODEV;
         prop = of_get_property(np, "phy_type", NULL);
 
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index b79dc710ed34..7f066adc068c 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -51,6 +51,12 @@ config MPC85xx_DS
         help
           This option enables support for the MPC85xx DS (MPC8544 DS) board
 
+config SOCRATES
+        bool "Socrates"
+        select DEFAULT_UIMAGE
+        help
+          This option enables support for the Socrates board.
+
 config KSI8560
         bool "Emerson KSI8560"
         select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index f0798c09980f..a857b35b9828 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -13,4 +13,5 @@ obj-$(CONFIG_STX_GP3)	  += stx_gp3.o
 obj-$(CONFIG_TQM85xx)     += tqm85xx.o
 obj-$(CONFIG_SBC8560)     += sbc8560.o
 obj-$(CONFIG_SBC8548)     += sbc8548.o
+obj-$(CONFIG_SOCRATES)    += socrates.o socrates_fpga_pic.o
 obj-$(CONFIG_KSI8560)     += ksi8560.o
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
index 81cee7bbf2d2..f4d36b5a2e00 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -106,8 +106,6 @@ static void __init ksi8560_pic_init(void)
         cpm2_pic_init(np);
         of_node_put(np);
         set_irq_chained_handler(irq, cpm2_cascade);
-
-        setup_irq(0, NULL);
 #endif
 }
 
@@ -221,6 +219,7 @@ static struct of_device_id __initdata of_bus_ids[] = {
         { .type = "simple-bus", },
         { .name = "cpm", },
         { .name = "localbus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 1bf5aefdfeb1..63efca20d7bd 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -92,6 +92,7 @@ static struct of_device_id __initdata mpc8536_ds_ids[] = {
         { .type = "soc", },
         { .compatible = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 21f009023e26..9438a892afc4 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -226,6 +226,7 @@ static struct of_device_id __initdata of_bus_ids[] = {
         { .name = "cpm", },
         { .name = "localbus", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index aeb6a5bc5522..458d91fba91d 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -179,7 +179,6 @@ static irqreturn_t mpc85xx_8259_cascade_action(int irq, void *dev_id)
 static struct irqaction mpc85xxcds_8259_irqaction = {
         .handler = mpc85xx_8259_cascade_action,
         .flags = IRQF_SHARED,
-        .mask = CPU_MASK_NONE,
         .name = "8259 cascade",
 };
 #endif /* PPC_I8259 */
@@ -336,6 +335,7 @@ static struct of_device_id __initdata of_bus_ids[] = {
         { .type = "soc", },
         { .compatible = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 7326d904202c..de66de7a9ca2 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -204,6 +204,7 @@ static struct of_device_id __initdata mpc85xxds_ids[] = {
         { .type = "soc", },
         { .compatible = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 658a36fab3ab..7dd029034aec 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -265,6 +265,7 @@ static struct of_device_id mpc85xx_ids[] = {
         { .compatible = "simple-bus", },
         { .type = "qe", },
         { .compatible = "fsl,qe", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c
index 7ec77ce12dad..ecdd8c09e4ed 100644
--- a/arch/powerpc/platforms/85xx/sbc8548.c
+++ b/arch/powerpc/platforms/85xx/sbc8548.c
@@ -154,6 +154,7 @@ static struct of_device_id __initdata of_bus_ids[] = {
         { .name = "soc", },
         { .type = "soc", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
index 472f254a19d2..cc27807a8b64 100644
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -213,6 +213,7 @@ static struct of_device_id __initdata of_bus_ids[] = {
         { .name = "cpm", },
         { .name = "localbus", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 79a0df17078b..cc0b0db8a6f3 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -21,6 +21,7 @@
 #include <asm/page.h>
 #include <asm/mpic.h>
 #include <asm/cacheflush.h>
+#include <asm/dbell.h>
 
 #include <sysdev/fsl_soc.h>
 
@@ -80,10 +81,8 @@ smp_85xx_kick_cpu(int nr)
 }
 
 static void __init
-smp_85xx_setup_cpu(int cpu_nr)
+smp_85xx_basic_setup(int cpu_nr)
 {
-        mpic_setup_this_cpu();
-
         /* Clear any pending timer interrupts */
         mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
 
@@ -91,15 +90,43 @@ smp_85xx_setup_cpu(int cpu_nr)
         mtspr(SPRN_TCR, TCR_DIE);
 }
 
+static void __init
+smp_85xx_setup_cpu(int cpu_nr)
+{
+        mpic_setup_this_cpu();
+
+        smp_85xx_basic_setup(cpu_nr);
+}
+
 struct smp_ops_t smp_85xx_ops = {
-        .message_pass = smp_mpic_message_pass,
-        .probe = smp_mpic_probe,
         .kick_cpu = smp_85xx_kick_cpu,
-        .setup_cpu = smp_85xx_setup_cpu,
 };
 
-void __init
-mpc85xx_smp_init(void)
+static int __init smp_dummy_probe(void)
 {
+        return NR_CPUS;
+}
+
+void __init mpc85xx_smp_init(void)
+{
+        struct device_node *np;
+
+        smp_85xx_ops.message_pass = NULL;
+
+        np = of_find_node_by_type(NULL, "open-pic");
+        if (np) {
+                smp_85xx_ops.probe = smp_mpic_probe;
+                smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu;
+                smp_85xx_ops.message_pass = smp_mpic_message_pass;
+        } else {
+                smp_85xx_ops.probe = smp_dummy_probe;
+                smp_85xx_ops.setup_cpu = smp_85xx_basic_setup;
+        }
+
+        if (cpu_has_feature(CPU_FTR_DBELL))
+                smp_85xx_ops.message_pass = smp_dbell_message_pass;
+
+        BUG_ON(!smp_85xx_ops.message_pass);
+
         smp_ops = &smp_85xx_ops;
 }
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c
new file mode 100644
index 000000000000..d0e8443b12c6
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/socrates.c
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2008 Emcraft Systems
+ * Sergei Poselenov <sposelenov@emcraft.com>
+ *
+ * Based on MPC8560 ADS and arch/ppc tqm85xx ports
+ *
+ * Maintained by Kumar Gala (see MAINTAINERS for contact information)
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * Copyright (c) 2005-2006 DENX Software Engineering
+ * Stefan Roese <sr@denx.de>
+ *
+ * Based on original work by
+ *      Kumar Gala <kumar.gala@freescale.com>
+ *      Copyright 2004 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpic.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "socrates_fpga_pic.h"
+
+static void __init socrates_pic_init(void)
+{
+        struct mpic *mpic;
+        struct resource r;
+        struct device_node *np;
+
+        np = of_find_node_by_type(NULL, "open-pic");
+        if (!np) {
+                printk(KERN_ERR "Could not find open-pic node\n");
+                return;
+        }
+
+        if (of_address_to_resource(np, 0, &r)) {
+                printk(KERN_ERR "Could not map mpic register space\n");
+                of_node_put(np);
+                return;
+        }
+
+        mpic = mpic_alloc(np, r.start,
+                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                        0, 256, " OpenPIC  ");
+        BUG_ON(mpic == NULL);
+        of_node_put(np);
+
+        mpic_init(mpic);
+
+        np = of_find_compatible_node(NULL, NULL, "abb,socrates-fpga-pic");
+        if (!np) {
+                printk(KERN_ERR "Could not find socrates-fpga-pic node\n");
+                return;
+        }
+        socrates_fpga_pic_init(np);
+        of_node_put(np);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init socrates_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+        struct device_node *np;
+#endif
+
+        if (ppc_md.progress)
+                ppc_md.progress("socrates_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+        for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
+                fsl_add_bridge(np, 1);
+#endif
+}
+
+static struct of_device_id __initdata socrates_of_bus_ids[] = {
+        { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
+        {},
+};
+
+static void __init socrates_init(void)
+{
+        of_platform_bus_probe(NULL, socrates_of_bus_ids, NULL);
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init socrates_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "abb,socrates"))
+                return 1;
+
+        return 0;
+}
+
+define_machine(socrates) {
+        .name                   = "Socrates",
+        .probe                  = socrates_probe,
+        .setup_arch             = socrates_setup_arch,
+        .init                   = socrates_init,
+        .init_IRQ               = socrates_pic_init,
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
new file mode 100644
index 000000000000..60edf63d0157
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -0,0 +1,327 @@
+/*
+ *  Copyright (C) 2008 Ilya Yanok, Emcraft Systems
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/irq.h>
+#include <linux/of_platform.h>
+#include <linux/io.h>
+
+/*
+ * The FPGA supports 9 interrupt sources, which can be routed to 3
+ * interrupt request lines of the MPIC. The line to be used can be
+ * specified through the third cell of FDT property  "interrupts".
+ */
+
+#define SOCRATES_FPGA_NUM_IRQS  9
+
+#define FPGA_PIC_IRQCFG         (0x0)
+#define FPGA_PIC_IRQMASK(n)     (0x4 + 0x4 * (n))
+
+#define SOCRATES_FPGA_IRQ_MASK  ((1 << SOCRATES_FPGA_NUM_IRQS) - 1)
+
+struct socrates_fpga_irq_info {
+        unsigned int irq_line;
+        int type;
+};
+
+/*
+ * Interrupt routing and type table
+ *
+ * IRQ_TYPE_NONE means the interrupt type is configurable,
+ * otherwise it's fixed to the specified value.
+ */
+static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = {
+        [0] = {0, IRQ_TYPE_NONE},
+        [1] = {0, IRQ_TYPE_LEVEL_HIGH},
+        [2] = {0, IRQ_TYPE_LEVEL_LOW},
+        [3] = {0, IRQ_TYPE_NONE},
+        [4] = {0, IRQ_TYPE_NONE},
+        [5] = {0, IRQ_TYPE_NONE},
+        [6] = {0, IRQ_TYPE_NONE},
+        [7] = {0, IRQ_TYPE_NONE},
+        [8] = {0, IRQ_TYPE_LEVEL_HIGH},
+};
+
+#define socrates_fpga_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
+
+static DEFINE_SPINLOCK(socrates_fpga_pic_lock);
+
+static void __iomem *socrates_fpga_pic_iobase;
+static struct irq_host *socrates_fpga_pic_irq_host;
+static unsigned int socrates_fpga_irqs[3];
+
+static inline uint32_t socrates_fpga_pic_read(int reg)
+{
+        return in_be32(socrates_fpga_pic_iobase + reg);
+}
+
+static inline void socrates_fpga_pic_write(int reg, uint32_t val)
+{
+        out_be32(socrates_fpga_pic_iobase + reg, val);
+}
+
+static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
+{
+        uint32_t cause;
+        unsigned long flags;
+        int i;
+
+        /* Check irq line routed to the MPIC */
+        for (i = 0; i < 3; i++) {
+                if (irq == socrates_fpga_irqs[i])
+                        break;
+        }
+        if (i == 3)
+                return NO_IRQ;
+
+        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i));
+        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) {
+                if (cause >> (i + 16))
+                        break;
+        }
+        return irq_linear_revmap(socrates_fpga_pic_irq_host,
+                        (irq_hw_number_t)i);
+}
+
+void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc)
+{
+        unsigned int cascade_irq;
+
+        /*
+         * See if we actually have an interrupt, call generic handling code if
+         * we do.
+         */
+        cascade_irq = socrates_fpga_pic_get_irq(irq);
+
+        if (cascade_irq != NO_IRQ)
+                generic_handle_irq(cascade_irq);
+        desc->chip->eoi(irq);
+
+}
+
+static void socrates_fpga_pic_ack(unsigned int virq)
+{
+        unsigned long flags;
+        unsigned int hwirq, irq_line;
+        uint32_t mask;
+
+        hwirq = socrates_fpga_irq_to_hw(virq);
+
+        irq_line = fpga_irqs[hwirq].irq_line;
+        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
+                & SOCRATES_FPGA_IRQ_MASK;
+        mask |= (1 << (hwirq + 16));
+        socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
+        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+}
+
+static void socrates_fpga_pic_mask(unsigned int virq)
+{
+        unsigned long flags;
+        unsigned int hwirq;
+        int irq_line;
+        u32 mask;
+
+        hwirq = socrates_fpga_irq_to_hw(virq);
+
+        irq_line = fpga_irqs[hwirq].irq_line;
+        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
+                & SOCRATES_FPGA_IRQ_MASK;
+        mask &= ~(1 << hwirq);
+        socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
+        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+}
+
+static void socrates_fpga_pic_mask_ack(unsigned int virq)
+{
+        unsigned long flags;
+        unsigned int hwirq;
+        int irq_line;
+        u32 mask;
+
+        hwirq = socrates_fpga_irq_to_hw(virq);
+
+        irq_line = fpga_irqs[hwirq].irq_line;
+        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
+                & SOCRATES_FPGA_IRQ_MASK;
+        mask &= ~(1 << hwirq);
+        mask |= (1 << (hwirq + 16));
+        socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
+        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+}
+
+static void socrates_fpga_pic_unmask(unsigned int virq)
+{
+        unsigned long flags;
+        unsigned int hwirq;
+        int irq_line;
+        u32 mask;
+
+        hwirq = socrates_fpga_irq_to_hw(virq);
+
+        irq_line = fpga_irqs[hwirq].irq_line;
+        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
+                & SOCRATES_FPGA_IRQ_MASK;
+        mask |= (1 << hwirq);
+        socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
+        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+}
+
+static void socrates_fpga_pic_eoi(unsigned int virq)
+{
+        unsigned long flags;
+        unsigned int hwirq;
+        int irq_line;
+        u32 mask;
+
+        hwirq = socrates_fpga_irq_to_hw(virq);
+
+        irq_line = fpga_irqs[hwirq].irq_line;
+        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
+                & SOCRATES_FPGA_IRQ_MASK;
+        mask |= (1 << (hwirq + 16));
+        socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
+        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+}
+
+static int socrates_fpga_pic_set_type(unsigned int virq,
+                unsigned int flow_type)
+{
+        unsigned long flags;
+        unsigned int hwirq;
+        int polarity;
+        u32 mask;
+
+        hwirq = socrates_fpga_irq_to_hw(virq);
+
+        if (fpga_irqs[hwirq].type != IRQ_TYPE_NONE)
+                return -EINVAL;
+
+        switch (flow_type & IRQ_TYPE_SENSE_MASK) {
+        case IRQ_TYPE_LEVEL_HIGH:
+                polarity = 1;
+                break;
+        case IRQ_TYPE_LEVEL_LOW:
+                polarity = 0;
+                break;
+        default:
+                return -EINVAL;
+        }
+        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG);
+        if (polarity)
+                mask |= (1 << hwirq);
+        else
+                mask &= ~(1 << hwirq);
+        socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask);
+        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        return 0;
+}
+
+static struct irq_chip socrates_fpga_pic_chip = {
+        .typename       = " FPGA-PIC ",
+        .ack            = socrates_fpga_pic_ack,
+        .mask           = socrates_fpga_pic_mask,
+        .mask_ack       = socrates_fpga_pic_mask_ack,
+        .unmask         = socrates_fpga_pic_unmask,
+        .eoi            = socrates_fpga_pic_eoi,
+        .set_type       = socrates_fpga_pic_set_type,
+};
+
+static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq,
+                irq_hw_number_t hwirq)
+{
+        /* All interrupts are LEVEL sensitive */
+        get_irq_desc(virq)->status |= IRQ_LEVEL;
+        set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip,
+                        handle_fasteoi_irq);
+
+        return 0;
+}
+
+static int socrates_fpga_pic_host_xlate(struct irq_host *h,
+                struct device_node *ct, u32 *intspec, unsigned int intsize,
+                irq_hw_number_t *out_hwirq, unsigned int *out_flags)
+{
+        struct socrates_fpga_irq_info *fpga_irq = &fpga_irqs[intspec[0]];
+
+        *out_hwirq = intspec[0];
+        if  (fpga_irq->type == IRQ_TYPE_NONE) {
+                /* type is configurable */
+                if (intspec[1] != IRQ_TYPE_LEVEL_LOW &&
+                    intspec[1] != IRQ_TYPE_LEVEL_HIGH) {
+                        pr_warning("FPGA PIC: invalid irq type, "
+                                   "setting default active low\n");
+                        *out_flags = IRQ_TYPE_LEVEL_LOW;
+                } else {
+                        *out_flags = intspec[1];
+                }
+        } else {
+                /* type is fixed */
+                *out_flags = fpga_irq->type;
+        }
+
+        /* Use specified interrupt routing */
+        if (intspec[2] <= 2)
+                fpga_irq->irq_line = intspec[2];
+        else
+                pr_warning("FPGA PIC: invalid irq routing\n");
+
+        return 0;
+}
+
+static struct irq_host_ops socrates_fpga_pic_host_ops = {
+        .map    = socrates_fpga_pic_host_map,
+        .xlate  = socrates_fpga_pic_host_xlate,
+};
+
+void socrates_fpga_pic_init(struct device_node *pic)
+{
+        unsigned long flags;
+        int i;
+
+        /* Setup an irq_host structure */
+        socrates_fpga_pic_irq_host = irq_alloc_host(pic, IRQ_HOST_MAP_LINEAR,
+                        SOCRATES_FPGA_NUM_IRQS, &socrates_fpga_pic_host_ops,
+                        SOCRATES_FPGA_NUM_IRQS);
+        if (socrates_fpga_pic_irq_host == NULL) {
+                pr_err("FPGA PIC: Unable to allocate host\n");
+                return;
+        }
+
+        for (i = 0; i < 3; i++) {
+                socrates_fpga_irqs[i] = irq_of_parse_and_map(pic, i);
+                if (socrates_fpga_irqs[i] == NO_IRQ) {
+                        pr_warning("FPGA PIC: can't get irq%d.\n", i);
+                        continue;
+                }
+                set_irq_chained_handler(socrates_fpga_irqs[i],
+                                socrates_fpga_pic_cascade);
+        }
+
+        socrates_fpga_pic_iobase = of_iomap(pic, 0);
+
+        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0),
+                        SOCRATES_FPGA_IRQ_MASK << 16);
+        socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1),
+                        SOCRATES_FPGA_IRQ_MASK << 16);
+        socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2),
+                        SOCRATES_FPGA_IRQ_MASK << 16);
+        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+
+        pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n");
+}
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.h b/arch/powerpc/platforms/85xx/socrates_fpga_pic.h
new file mode 100644
index 000000000000..21d7d8e42199
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.h
@@ -0,0 +1,16 @@
+/*
+ *  Copyright (C) 2008 Ilya Yanok, Emcraft Systems
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef SOCRATES_FPGA_PIC_H
+#define SOCRATES_FPGA_PIC_H
+
+void socrates_fpga_pic_init(struct device_node *pic);
+
+#endif
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index 0cca8f5cb272..f559918f3c6f 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -145,6 +145,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m)
 
 static struct of_device_id __initdata of_bus_ids[] = {
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 2933a8e827d9..5b0ab9966e90 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -153,6 +153,7 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m)
 
 static struct of_device_id __initdata of_bus_ids[] = {
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 8e5693935975..fdaf4ddaa955 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -1,7 +1,7 @@
 config PPC_86xx
 menuconfig PPC_86xx
         bool "86xx-based boards"
-        depends on 6xx && PPC_MULTIPLATFORM
+        depends on 6xx
         select FSL_SOC
         select ALTIVEC
         help
@@ -31,6 +31,22 @@ config MPC8610_HPCD
         help
           This option enables support for the MPC8610 HPCD board.
 
+config GEF_PPC9A
+        bool "GE Fanuc PPC9A"
+        select DEFAULT_UIMAGE
+        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
+        help
+          This option enables support for GE Fanuc's PPC9A.
+
+config GEF_SBC310
+        bool "GE Fanuc SBC310"
+        select DEFAULT_UIMAGE
+        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
+        help
+          This option enables support for GE Fanuc's SBC310.
+
 config GEF_SBC610
         bool "GE Fanuc SBC610"
         select DEFAULT_UIMAGE
@@ -48,7 +64,7 @@ config MPC8641
         select FSL_PCI if PCI
         select PPC_UDBG_16550
         select MPIC
-        default y if MPC8641_HPCN || SBC8641D || GEF_SBC610
+        default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A
 
 config MPC8610
         bool
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 31e540c2ebbc..4b0d7b1aa005 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -9,3 +9,5 @@ obj-$(CONFIG_SBC8641D)		+= sbc8641d.o
 obj-$(CONFIG_MPC8610_HPCD)      += mpc8610_hpcd.o
 gef-gpio-$(CONFIG_GPIOLIB)      += gef_gpio.o
 obj-$(CONFIG_GEF_SBC610)        += gef_sbc610.o gef_pic.o $(gef-gpio-y)
+obj-$(CONFIG_GEF_SBC310)        += gef_sbc310.o gef_pic.o $(gef-gpio-y)
+obj-$(CONFIG_GEF_PPC9A)         += gef_ppc9a.o gef_pic.o $(gef-gpio-y)
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
index 85b2800f4cb7..b2ea8875adba 100644
--- a/arch/powerpc/platforms/86xx/gef_gpio.c
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -37,8 +37,6 @@
 #define GEF_GPIO_OVERRUN        0x1C
 #define GEF_GPIO_MODE           0x20
 
-#define NUM_GPIO 19
-
 static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value)
 {
         unsigned int data;
@@ -103,10 +101,10 @@ static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 static int __init gef_gpio_init(void)
 {
         struct device_node *np;
+        int retval;
+        struct of_mm_gpio_chip *gef_gpio_chip;
 
         for_each_compatible_node(np, NULL, "gef,sbc610-gpio") {
-                int retval;
-                struct of_mm_gpio_chip *gef_gpio_chip;
 
                 pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
 
@@ -120,7 +118,35 @@ static int __init gef_gpio_init(void)
 
                 /* Setup pointers to chip functions */
                 gef_gpio_chip->of_gc.gpio_cells = 2;
-                gef_gpio_chip->of_gc.gc.ngpio = NUM_GPIO;
+                gef_gpio_chip->of_gc.gc.ngpio = 19;
+                gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
+                gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
+                gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
+                gef_gpio_chip->of_gc.gc.set = gef_gpio_set;
+
+                /* This function adds a memory mapped GPIO chip */
+                retval = of_mm_gpiochip_add(np, gef_gpio_chip);
+                if (retval) {
+                        kfree(gef_gpio_chip);
+                        pr_err("%s: Unable to add GPIO\n", np->full_name);
+                }
+        }
+
+        for_each_compatible_node(np, NULL, "gef,sbc310-gpio") {
+
+                pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
+
+                /* Allocate chip structure */
+                gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
+                if (!gef_gpio_chip) {
+                        pr_err("%s: Unable to allocate structure\n",
+                                np->full_name);
+                        continue;
+                }
+
+                /* Setup pointers to chip functions */
+                gef_gpio_chip->of_gc.gpio_cells = 2;
+                gef_gpio_chip->of_gc.gc.ngpio = 6;
                 gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
                 gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
                 gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
new file mode 100644
index 000000000000..d79104669cdc
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -0,0 +1,224 @@
+/*
+ * GE Fanuc PPC9A board support
+ *
+ * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ *
+ * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc86xx.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_pci.h>
+#include <sysdev/fsl_soc.h>
+
+#include "mpc86xx.h"
+#include "gef_pic.h"
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG (fmt...) do { printk(KERN_ERR "PPC9A: " fmt); } while (0)
+#else
+#define DBG (fmt...) do { } while (0)
+#endif
+
+void __iomem *ppc9a_regs;
+
+static void __init gef_ppc9a_init_irq(void)
+{
+        struct device_node *cascade_node = NULL;
+
+        mpc86xx_init_irq();
+
+        /*
+         * There is a simple interrupt handler in the main FPGA, this needs
+         * to be cascaded into the MPIC
+         */
+        cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic-1.00");
+        if (!cascade_node) {
+                printk(KERN_WARNING "PPC9A: No FPGA PIC\n");
+                return;
+        }
+
+        gef_pic_init(cascade_node);
+        of_node_put(cascade_node);
+}
+
+static void __init gef_ppc9a_setup_arch(void)
+{
+        struct device_node *regs;
+#ifdef CONFIG_PCI
+        struct device_node *np;
+
+        for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
+                fsl_add_bridge(np, 1);
+        }
+#endif
+
+        printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n");
+
+#ifdef CONFIG_SMP
+        mpc86xx_smp_init();
+#endif
+
+        /* Remap basic board registers */
+        regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs");
+        if (regs) {
+                ppc9a_regs = of_iomap(regs, 0);
+                if (ppc9a_regs == NULL)
+                        printk(KERN_WARNING "Unable to map board registers\n");
+                of_node_put(regs);
+        }
+}
+
+/* Return the PCB revision */
+static unsigned int gef_ppc9a_get_pcb_rev(void)
+{
+        unsigned int reg;
+
+        reg = ioread32(ppc9a_regs);
+        return (reg >> 8) & 0xff;
+}
+
+/* Return the board (software) revision */
+static unsigned int gef_ppc9a_get_board_rev(void)
+{
+        unsigned int reg;
+
+        reg = ioread32(ppc9a_regs);
+        return (reg >> 16) & 0xff;
+}
+
+/* Return the FPGA revision */
+static unsigned int gef_ppc9a_get_fpga_rev(void)
+{
+        unsigned int reg;
+
+        reg = ioread32(ppc9a_regs);
+        return (reg >> 24) & 0xf;
+}
+
+static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
+{
+        uint svid = mfspr(SPRN_SVR);
+
+        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+
+        seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
+                ('A' + gef_ppc9a_get_board_rev() - 1));
+        seq_printf(m, "FPGA Revision\t: %u\n", gef_ppc9a_get_fpga_rev());
+
+        seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+}
+
+static void __init gef_ppc9a_nec_fixup(struct pci_dev *pdev)
+{
+        unsigned int val;
+
+        /* Do not do the fixup on other platforms! */
+        if (!machine_is(gef_ppc9a))
+                return;
+
+        printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
+
+        /* Ensure ports 1, 2, 3, 4 & 5 are enabled */
+        pci_read_config_dword(pdev, 0xe0, &val);
+        pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5);
+
+        /* System clock is 48-MHz Oscillator and EHCI Enabled. */
+        pci_write_config_dword(pdev, 0xe4, 1 << 5);
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
+        gef_ppc9a_nec_fixup);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ *
+ * This function is called to determine whether the BSP is compatible with the
+ * supplied device-tree, which is assumed to be the correct one for the actual
+ * board. It is expected thati, in the future, a kernel may support multiple
+ * boards.
+ */
+static int __init gef_ppc9a_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "gef,ppc9a"))
+                return 1;
+
+        return 0;
+}
+
+static long __init mpc86xx_time_init(void)
+{
+        unsigned int temp;
+
+        /* Set the time base to zero */
+        mtspr(SPRN_TBWL, 0);
+        mtspr(SPRN_TBWU, 0);
+
+        temp = mfspr(SPRN_HID0);
+        temp |= HID0_TBEN;
+        mtspr(SPRN_HID0, temp);
+        asm volatile("isync");
+
+        return 0;
+}
+
+static __initdata struct of_device_id of_bus_ids[] = {
+        { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
+        {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+        printk(KERN_DEBUG "Probe platform devices\n");
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+        return 0;
+}
+machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
+
+define_machine(gef_ppc9a) {
+        .name                   = "GE Fanuc PPC9A",
+        .probe                  = gef_ppc9a_probe,
+        .setup_arch             = gef_ppc9a_setup_arch,
+        .init_IRQ               = gef_ppc9a_init_irq,
+        .show_cpuinfo           = gef_ppc9a_show_cpuinfo,
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .time_init              = mpc86xx_time_init,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+};
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
new file mode 100644
index 000000000000..af14f852d747
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -0,0 +1,235 @@
+/*
+ * GE Fanuc SBC310 board support
+ *
+ * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ *
+ * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc86xx.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_pci.h>
+#include <sysdev/fsl_soc.h>
+
+#include "mpc86xx.h"
+#include "gef_pic.h"
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
+#else
+#define DBG (fmt...) do { } while (0)
+#endif
+
+void __iomem *sbc310_regs;
+
+static void __init gef_sbc310_init_irq(void)
+{
+        struct device_node *cascade_node = NULL;
+
+        mpc86xx_init_irq();
+
+        /*
+         * There is a simple interrupt handler in the main FPGA, this needs
+         * to be cascaded into the MPIC
+         */
+        cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
+        if (!cascade_node) {
+                printk(KERN_WARNING "SBC310: No FPGA PIC\n");
+                return;
+        }
+
+        gef_pic_init(cascade_node);
+        of_node_put(cascade_node);
+}
+
+static void __init gef_sbc310_setup_arch(void)
+{
+        struct device_node *regs;
+#ifdef CONFIG_PCI
+        struct device_node *np;
+
+        for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
+                fsl_add_bridge(np, 1);
+        }
+#endif
+
+        printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n");
+
+#ifdef CONFIG_SMP
+        mpc86xx_smp_init();
+#endif
+
+        /* Remap basic board registers */
+        regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
+        if (regs) {
+                sbc310_regs = of_iomap(regs, 0);
+                if (sbc310_regs == NULL)
+                        printk(KERN_WARNING "Unable to map board registers\n");
+                of_node_put(regs);
+        }
+}
+
+/* Return the PCB revision */
+static unsigned int gef_sbc310_get_board_id(void)
+{
+        unsigned int reg;
+
+        reg = ioread32(sbc310_regs);
+        return reg & 0xff;
+}
+
+/* Return the PCB revision */
+static unsigned int gef_sbc310_get_pcb_rev(void)
+{
+        unsigned int reg;
+
+        reg = ioread32(sbc310_regs);
+        return (reg >> 8) & 0xff;
+}
+
+/* Return the board (software) revision */
+static unsigned int gef_sbc310_get_board_rev(void)
+{
+        unsigned int reg;
+
+        reg = ioread32(sbc310_regs);
+        return (reg >> 16) & 0xff;
+}
+
+/* Return the FPGA revision */
+static unsigned int gef_sbc310_get_fpga_rev(void)
+{
+        unsigned int reg;
+
+        reg = ioread32(sbc310_regs);
+        return (reg >> 24) & 0xf;
+}
+
+static void gef_sbc310_show_cpuinfo(struct seq_file *m)
+{
+        uint svid = mfspr(SPRN_SVR);
+
+        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+
+        seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
+        seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
+                ('A' + gef_sbc310_get_board_rev() - 1));
+        seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
+
+        seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+}
+
+static void __init gef_sbc310_nec_fixup(struct pci_dev *pdev)
+{
+        unsigned int val;
+
+        /* Do not do the fixup on other platforms! */
+        if (!machine_is(gef_sbc310))
+                return;
+
+        printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
+
+        /* Ensure only ports 1 & 2 are enabled */
+        pci_read_config_dword(pdev, 0xe0, &val);
+        pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
+
+        /* System clock is 48-MHz Oscillator and EHCI Enabled. */
+        pci_write_config_dword(pdev, 0xe4, 1 << 5);
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
+        gef_sbc310_nec_fixup);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ *
+ * This function is called to determine whether the BSP is compatible with the
+ * supplied device-tree, which is assumed to be the correct one for the actual
+ * board. It is expected thati, in the future, a kernel may support multiple
+ * boards.
+ */
+static int __init gef_sbc310_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "gef,sbc310"))
+                return 1;
+
+        return 0;
+}
+
+static long __init mpc86xx_time_init(void)
+{
+        unsigned int temp;
+
+        /* Set the time base to zero */
+        mtspr(SPRN_TBWL, 0);
+        mtspr(SPRN_TBWU, 0);
+
+        temp = mfspr(SPRN_HID0);
+        temp |= HID0_TBEN;
+        mtspr(SPRN_HID0, temp);
+        asm volatile("isync");
+
+        return 0;
+}
+
+static __initdata struct of_device_id of_bus_ids[] = {
+        { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
+        {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+        printk(KERN_DEBUG "Probe platform devices\n");
+        of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+        return 0;
+}
+machine_device_initcall(gef_sbc310, declare_of_platform_devices);
+
+define_machine(gef_sbc310) {
+        .name                   = "GE Fanuc SBC310",
+        .probe                  = gef_sbc310_probe,
+        .setup_arch             = gef_sbc310_setup_arch,
+        .init_IRQ               = gef_sbc310_init_irq,
+        .show_cpuinfo           = gef_sbc310_show_cpuinfo,
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .time_init              = mpc86xx_time_init,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+};
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index d6b772ba3b8f..ea2360639652 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -194,6 +194,7 @@ static long __init mpc86xx_time_init(void)
 
 static __initdata struct of_device_id of_bus_ids[] = {
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index e8d54ac5292c..3f49a6f893a3 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -46,6 +46,7 @@ static unsigned char *pixis_bdcfg0, *pixis_arch;
 static struct of_device_id __initdata mpc8610_ids[] = {
         { .compatible = "fsl,mpc8610-immr", },
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {}
 };
 
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 27e0e682d8e1..c4ec49b5f7f8 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -148,6 +148,7 @@ mpc86xx_time_init(void)
 static __initdata struct of_device_id of_bus_ids[] = {
         { .compatible = "simple-bus", },
         { .compatible = "fsl,rapidio-delta", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c
index 5fd7ed40986f..2886a36fc085 100644
--- a/arch/powerpc/platforms/86xx/sbc8641d.c
+++ b/arch/powerpc/platforms/86xx/sbc8641d.c
@@ -103,6 +103,7 @@ mpc86xx_time_init(void)
 
 static __initdata struct of_device_id of_bus_ids[] = {
         { .compatible = "simple-bus", },
+        { .compatible = "gianfar", },
         {},
 };
 
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index 0d9f75c74f8c..385acfc48397 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -44,7 +44,6 @@ static irqreturn_t timebase_interrupt(int irq, void *dev)
 
 static struct irqaction tbint_irqaction = {
         .handler = timebase_interrupt,
-        .mask = CPU_MASK_NONE,
         .name = "tbint",
 };
 
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 200b9cb900ea..ffa2a9fd53d0 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -1,14 +1,5 @@
 menu "Platform support"
 
-config PPC_MULTIPLATFORM
-        bool
-        depends on PPC64 || 6xx
-        default y
-
-config CLASSIC32
-        def_bool y
-        depends on 6xx && PPC_MULTIPLATFORM
-
 source "arch/powerpc/platforms/pseries/Kconfig"
 source "arch/powerpc/platforms/iseries/Kconfig"
 source "arch/powerpc/platforms/chrp/Kconfig"
@@ -28,15 +19,28 @@ source "arch/powerpc/platforms/86xx/Kconfig"
 source "arch/powerpc/platforms/embedded6xx/Kconfig"
 source "arch/powerpc/platforms/44x/Kconfig"
 source "arch/powerpc/platforms/40x/Kconfig"
+source "arch/powerpc/platforms/amigaone/Kconfig"
 
 config PPC_NATIVE
         bool
-        depends on PPC_MULTIPLATFORM
+        depends on 6xx || PPC64
         help
           Support for running natively on the hardware, i.e. without
           a hypervisor. This option is not user-selectable but should
           be selected by all platforms that need it.
 
+config PPC_OF_BOOT_TRAMPOLINE
+        bool "Support booting from Open Firmware or yaboot"
+        depends on 6xx || PPC64
+        default y
+        help
+          Support from booting from Open Firmware or yaboot using an
+          Open Firmware client interface. This enables the kernel to
+          communicate with open firmware to retrieve system informations
+          such as the device tree.
+
+          In case of doubt, say Y
+
 config UDBG_RTAS_CONSOLE
         bool "RTAS based debug console"
         depends on PPC_RTAS
@@ -70,7 +74,7 @@ config PPC_I8259
 
 config U3_DART
         bool
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64
         default n
 
 config PPC_RTAS
@@ -91,15 +95,6 @@ config RTAS_FLASH
         tristate "Firmware flash interface"
         depends on PPC64 && RTAS_PROC
 
-config PPC_PMI
-        tristate "Support for PMI"
-        depends on PPC_IBM_CELL_BLADE
-        help
-          PMI (Platform Management Interrupt) is a way to
-          communicate with the BMC (Baseboard Management Controller).
-          It is used in some IBM Cell blades.
-        default m
-
 config MMIO_NVRAM
         bool
         default n
@@ -196,7 +191,7 @@ config PPC601_SYNC_FIX
 
 config TAU
         bool "On-chip CPU temperature sensor support"
-        depends on CLASSIC32
+        depends on 6xx
         help
           G3 and G4 processors have an on-chip temperature sensor called the
           'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
@@ -274,7 +269,7 @@ config CPM2
 
 config AXON_RAM
         tristate "Axon DDR2 memory device driver"
-        depends on PPC_IBM_CELL_BLADE
+        depends on PPC_IBM_CELL_BLADE && BLOCK
         default m
         help
           It registers one block device per Axon's DDR2 memory bank found
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index e868b5c50723..9da795e49337 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -57,9 +57,17 @@ config E200
 
 endchoice
 
+# Until we have a choice of exclusive CPU types on 64-bit, we always
+# use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is
+# "classic" MMU
+
+config PPC_BOOK3S
+       def_bool y
+       depends on PPC64 || 6xx
+
 config POWER4_ONLY
         bool "Optimize for POWER4"
-        depends on PPC64
+        depends on PPC64 && PPC_BOOK3S
         default n
         ---help---
           Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
@@ -68,16 +76,16 @@ config POWER4_ONLY
 
 config POWER3
         bool
-        depends on PPC64
+        depends on PPC64 && PPC_BOOK3S
         default y if !POWER4_ONLY
 
 config POWER4
-        depends on PPC64
+        depends on PPC64 && PPC_BOOK3S
         def_bool y
 
 config TUNE_CELL
         bool "Optimize for Cell Broadband Engine"
-        depends on PPC64
+        depends on PPC64 && PPC_BOOK3S
         help
           Cause the compiler to optimize for the PPE of the Cell Broadband
           Engine. This will make the code run considerably faster on Cell
@@ -147,7 +155,7 @@ config PHYS_64BIT
 
 config ALTIVEC
         bool "AltiVec Support"
-        depends on CLASSIC32 || POWER4
+        depends on 6xx || POWER4
         ---help---
           This option enables kernel support for the Altivec extensions to the
           PowerPC processor. The kernel currently supports saving and restoring
@@ -210,6 +218,10 @@ config PPC_MMU_NOHASH
         def_bool y
         depends on !PPC_STD_MMU
 
+config PPC_BOOK3E_MMU
+        def_bool y
+        depends on FSL_BOOKE
+
 config PPC_MM_SLICES
         bool
         default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES)
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 8079e0b4fd69..f7419198e635 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -19,3 +19,4 @@ obj-$(CONFIG_PPC_PASEMI)	+= pasemi/
 obj-$(CONFIG_PPC_CELL)          += cell/
 obj-$(CONFIG_PPC_PS3)           += ps3/
 obj-$(CONFIG_EMBEDDED6xx)       += embedded6xx/
+obj-$(CONFIG_AMIGAONE)          += amigaone/
diff --git a/arch/powerpc/platforms/amigaone/Kconfig b/arch/powerpc/platforms/amigaone/Kconfig
new file mode 100644
index 000000000000..022476717718
--- /dev/null
+++ b/arch/powerpc/platforms/amigaone/Kconfig
@@ -0,0 +1,18 @@
+config AMIGAONE
+        bool "Eyetech AmigaOne/MAI Teron"
+        depends on 6xx && BROKEN_ON_SMP
+        select PPC_I8259
+        select PPC_INDIRECT_PCI
+        select PPC_UDBG_16550
+        select PCI
+        select NOT_COHERENT_CACHE
+        select CHECK_CACHE_COHERENCY
+        select DEFAULT_UIMAGE
+        select PCSPKR_PLATFORM
+        help
+        Select AmigaOne for the following machines:
+        - AmigaOne SE/Teron CX (G3 only)
+        - AmigaOne XE/Teron PX
+        - uA1/Teron mini
+          More information is available at:
+          <http://amigaone-linux.sourceforge.net/>.
diff --git a/arch/powerpc/platforms/amigaone/Makefile b/arch/powerpc/platforms/amigaone/Makefile
new file mode 100644
index 000000000000..e6885b3b2ee7
--- /dev/null
+++ b/arch/powerpc/platforms/amigaone/Makefile
@@ -0,0 +1 @@
+obj-y   += setup.o
diff --git a/arch/powerpc/platforms/amigaone/setup.c b/arch/powerpc/platforms/amigaone/setup.c
new file mode 100644
index 000000000000..443035366c12
--- /dev/null
+++ b/arch/powerpc/platforms/amigaone/setup.c
@@ -0,0 +1,170 @@
+/*
+ * AmigaOne platform setup
+ *
+ * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
+ *
+ *   Based on original amigaone_setup.c source code
+ * Copyright 2003 by Hans-Joerg Frieden and Thomas Frieden
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/seq_file.h>
+#include <linux/utsrelease.h>
+
+#include <asm/machdep.h>
+#include <asm/cputable.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/i8259.h>
+#include <asm/time.h>
+#include <asm/udbg.h>
+
+extern void __flush_disable_L1(void);
+
+void amigaone_show_cpuinfo(struct seq_file *m)
+{
+        seq_printf(m, "vendor\t\t: Eyetech Ltd.\n");
+}
+
+static int __init amigaone_add_bridge(struct device_node *dev)
+{
+        const u32 *cfg_addr, *cfg_data;
+        int len;
+        const int *bus_range;
+        struct pci_controller *hose;
+
+        printk(KERN_INFO "Adding PCI host bridge %s\n", dev->full_name);
+
+        cfg_addr = of_get_address(dev, 0, NULL, NULL);
+        cfg_data = of_get_address(dev, 1, NULL, NULL);
+        if ((cfg_addr == NULL) || (cfg_data == NULL))
+                return -ENODEV;
+
+        bus_range = of_get_property(dev, "bus-range", &len);
+        if ((bus_range == NULL) || (len < 2 * sizeof(int)))
+                printk(KERN_WARNING "Can't get bus-range for %s, assume"
+                       " bus 0\n", dev->full_name);
+
+        hose = pcibios_alloc_controller(dev);
+        if (hose == NULL)
+                return -ENOMEM;
+
+        hose->first_busno = bus_range ? bus_range[0] : 0;
+        hose->last_busno = bus_range ? bus_range[1] : 0xff;
+
+        setup_indirect_pci(hose, cfg_addr[0], cfg_data[0], 0);
+
+        /* Interpret the "ranges" property */
+        /* This also maps the I/O region and sets isa_io/mem_base */
+        pci_process_bridge_OF_ranges(hose, dev, 1);
+
+        return 0;
+}
+
+void __init amigaone_setup_arch(void)
+{
+        struct device_node *np;
+        int phb = -ENODEV;
+
+        /* Lookup PCI host bridges. */
+        for_each_compatible_node(np, "pci", "mai-logic,articia-s")
+                phb = amigaone_add_bridge(np);
+
+        BUG_ON(phb != 0);
+
+        if (ppc_md.progress)
+                ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0);
+}
+
+void __init amigaone_init_IRQ(void)
+{
+        struct device_node *pic, *np = NULL;
+        const unsigned long *prop = NULL;
+        unsigned long int_ack = 0;
+
+        /* Search for ISA interrupt controller. */
+        pic = of_find_compatible_node(NULL, "interrupt-controller",
+                                      "pnpPNP,000");
+        BUG_ON(pic == NULL);
+
+        /* Look for interrupt acknowledge address in the PCI root node. */
+        np = of_find_compatible_node(NULL, "pci", "mai-logic,articia-s");
+        if (np) {
+                prop = of_get_property(np, "8259-interrupt-acknowledge", NULL);
+                if (prop)
+                        int_ack = prop[0];
+                of_node_put(np);
+        }
+
+        if (int_ack == 0)
+                printk(KERN_WARNING "Cannot find PCI interrupt acknowledge"
+                       " address, polling\n");
+
+        i8259_init(pic, int_ack);
+        ppc_md.get_irq = i8259_irq;
+        irq_set_default_host(i8259_get_host());
+}
+
+void __init amigaone_init(void)
+{
+        request_region(0x00, 0x20, "dma1");
+        request_region(0x40, 0x20, "timer");
+        request_region(0x80, 0x10, "dma page reg");
+        request_region(0xc0, 0x20, "dma2");
+}
+
+void amigaone_restart(char *cmd)
+{
+        local_irq_disable();
+
+        /* Flush and disable caches. */
+        __flush_disable_L1();
+
+        /* Set SRR0 to the reset vector and turn on MSR_IP. */
+        mtspr(SPRN_SRR0, 0xfff00100);
+        mtspr(SPRN_SRR1, MSR_IP);
+
+        /* Do an rfi to jump back to firmware. */
+        __asm__ __volatile__("rfi" : : : "memory");
+
+        /* Not reached. */
+        while (1);
+}
+
+static int __init amigaone_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+
+        if (of_flat_dt_is_compatible(root, "eyetech,amigaone")) {
+                /*
+                 * Coherent memory access cause complete system lockup! Thus
+                 * disable this CPU feature, even if the CPU needs it.
+                 */
+                cur_cpu_spec->cpu_features &= ~CPU_FTR_NEED_COHERENT;
+
+                ISA_DMA_THRESHOLD = 0x00ffffff;
+                DMA_MODE_READ = 0x44;
+                DMA_MODE_WRITE = 0x48;
+
+                return 1;
+        }
+
+        return 0;
+}
+
+define_machine(amigaone) {
+        .name                   = "AmigaOne",
+        .probe                  = amigaone_probe,
+        .setup_arch             = amigaone_setup_arch,
+        .init                   = amigaone_init,
+        .show_cpuinfo           = amigaone_show_cpuinfo,
+        .init_IRQ               = amigaone_init_IRQ,
+        .restart                = amigaone_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index 5cc3279559a4..40e24c39ad06 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -23,7 +23,7 @@ config PPC_CELL_NATIVE
 
 config PPC_IBM_CELL_BLADE
         bool "IBM Cell Blade"
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64 && PPC_BOOK3S
         select PPC_CELL_NATIVE
         select MMIO_NVRAM
         select PPC_UDBG_16550
@@ -31,7 +31,7 @@ config PPC_IBM_CELL_BLADE
 
 config PPC_CELLEB
         bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64 && PPC_BOOK3S
         select PPC_CELL_NATIVE
         select HAS_TXX9_SERIAL
         select PPC_UDBG_BEAT
@@ -40,9 +40,14 @@ config PPC_CELLEB
 
 config PPC_CELL_QPACE
         bool "IBM Cell - QPACE"
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64 && PPC_BOOK3S
         select PPC_CELL_COMMON
 
+config AXON_MSI
+        bool
+        depends on PPC_IBM_CELL_BLADE && PCI_MSI
+        default y
+
 menu "Cell Broadband Engine options"
         depends on PPC_CELL
 
@@ -98,7 +103,7 @@ config PPC_IBM_CELL_RESETBUTTON
 
 config PPC_IBM_CELL_POWERBUTTON
         tristate "IBM Cell Blade power button"
-        depends on PPC_IBM_CELL_BLADE && PPC_PMI && INPUT_EVDEV
+        depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV
         default y
         help
           Support Powerbutton on IBM Cell blades.
@@ -118,9 +123,9 @@ config CBE_CPUFREQ
           For details, take a look at <file:Documentation/cpu-freq/>.
           If you don't have such processor, say N
 
-config CBE_CPUFREQ_PMI
-        tristate "CBE frequency scaling using PMI interface"
-        depends on CBE_CPUFREQ && PPC_PMI && EXPERIMENTAL
+config CBE_CPUFREQ_PMI_ENABLE
+        bool "CBE frequency scaling using PMI interface"
+        depends on CBE_CPUFREQ && EXPERIMENTAL
         default n
         help
           Select this, if you want to use the PMI interface
@@ -128,6 +133,20 @@ config CBE_CPUFREQ_PMI
           processor will not only be able to run at lower speed,
           but also at lower core voltage.
 
+config CBE_CPUFREQ_PMI
+        tristate
+        depends on CBE_CPUFREQ_PMI_ENABLE
+        default CBE_CPUFREQ
+
+config PPC_PMI
+        tristate
+        default y
+        depends on CBE_CPUFREQ_PMI || PPC_IBM_CELL_POWERBUTTON
+        help
+          PMI (Platform Management Interrupt) is a way to
+          communicate with the BMC (Baseboard Management Controller).
+          It is used in some IBM Cell blades.
+
 config CBE_CPUFREQ_SPU_GOVERNOR
         tristate "CBE frequency scaling based on SPU usage"
         depends on SPU_FS && CPU_FREQ
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 43eccb270301..83fafe922641 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -28,7 +28,7 @@ obj-$(CONFIG_SPU_BASE)			+= spu_callbacks.o spu_base.o \
                                            $(spu-manage-y) \
                                            spufs/
 
-obj-$(CONFIG_PCI_MSI)                   += axon_msi.o
+obj-$(CONFIG_AXON_MSI)                  += axon_msi.o
 
 # qpace setup
 obj-$(CONFIG_PPC_CELL_QPACE)            += qpace_setup.o
diff --git a/arch/powerpc/platforms/cell/io-workarounds.c b/arch/powerpc/platforms/cell/io-workarounds.c
index 059cad6c3f69..5c1118e31940 100644
--- a/arch/powerpc/platforms/cell/io-workarounds.c
+++ b/arch/powerpc/platforms/cell/io-workarounds.c
@@ -131,10 +131,10 @@ static const struct ppc_pci_io __devinitconst iowa_pci_io = {
 };
 
 static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,
-                                                unsigned long flags)
+                                  unsigned long flags, void *caller)
 {
         struct iowa_bus *bus;
-        void __iomem *res = __ioremap(addr, size, flags);
+        void __iomem *res = __ioremap_caller(addr, size, flags, caller);
         int busno;
 
         bus = iowa_pci_find(0, (unsigned long)addr);
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index ee5033eddf01..5744527a7f2a 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -74,7 +74,7 @@
 #define IOC_IO_ExcpStat_V               0x8000000000000000ul
 #define IOC_IO_ExcpStat_SPF_Mask        0x6000000000000000ul
 #define IOC_IO_ExcpStat_SPF_S           0x6000000000000000ul
-#define IOC_IO_ExcpStat_SPF_P           0x4000000000000000ul
+#define IOC_IO_ExcpStat_SPF_P           0x2000000000000000ul
 #define IOC_IO_ExcpStat_ADDR_Mask       0x00000007fffff000ul
 #define IOC_IO_ExcpStat_RW_Mask         0x0000000000000800ul
 #define IOC_IO_ExcpStat_IOID_Mask       0x00000000000007fful
@@ -247,17 +247,18 @@ static void tce_free_cell(struct iommu_table *tbl, long index, long npages)
 
 static irqreturn_t ioc_interrupt(int irq, void *data)
 {
-        unsigned long stat;
+        unsigned long stat, spf;
         struct cbe_iommu *iommu = data;
 
         stat = in_be64(iommu->xlate_regs + IOC_IO_ExcpStat);
+        spf = stat & IOC_IO_ExcpStat_SPF_Mask;
 
         /* Might want to rate limit it */
         printk(KERN_ERR "iommu: DMA exception 0x%016lx\n", stat);
         printk(KERN_ERR "  V=%d, SPF=[%c%c], RW=%s, IOID=0x%04x\n",
                !!(stat & IOC_IO_ExcpStat_V),
-               (stat & IOC_IO_ExcpStat_SPF_S) ? 'S' : ' ',
-               (stat & IOC_IO_ExcpStat_SPF_P) ? 'P' : ' ',
+               (spf == IOC_IO_ExcpStat_SPF_S) ? 'S' : ' ',
+               (spf == IOC_IO_ExcpStat_SPF_P) ? 'P' : ' ',
                (stat & IOC_IO_ExcpStat_RW_Mask) ? "Read" : "Write",
                (unsigned int)(stat & IOC_IO_ExcpStat_IOID_Mask));
         printk(KERN_ERR "  page=0x%016lx\n",
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
index be84e6a16b30..c5ce02e84c8e 100644
--- a/arch/powerpc/platforms/cell/qpace_setup.c
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -81,16 +81,6 @@ static int __init qpace_publish_devices(void)
 }
 machine_subsys_initcall(qpace, qpace_publish_devices);
 
-extern int qpace_notify(struct device *dev)
-{
-        /* set dma_ops for of_platform bus */
-        if (dev->bus && dev->bus->name
-                        && !strcmp(dev->bus->name, "of_platform"))
-                set_dma_ops(dev, &dma_direct_ops);
-
-        return 0;
-}
-
 static void __init qpace_setup_arch(void)
 {
 #ifdef CONFIG_SPU_BASE
@@ -115,9 +105,6 @@ static void __init qpace_setup_arch(void)
 #ifdef CONFIG_DUMMY_CONSOLE
         conswitchp = &dummy_con;
 #endif
-
-        /* set notifier function */
-        platform_notify = &qpace_notify;
 }
 
 static int __init qpace_probe(void)
@@ -141,6 +128,8 @@ define_machine(qpace) {
         .power_off              = rtas_power_off,
         .halt                   = rtas_halt,
         .get_boot_time          = rtas_get_boot_time,
+        .get_rtc_time           = rtas_get_rtc_time,
+        .set_rtc_time           = rtas_set_rtc_time,
         .calibrate_decr         = generic_calibrate_decr,
         .progress               = qpace_progress,
         .init_IRQ               = iic_init_IRQ,
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index e487ad68ac11..9abd210d87c1 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -114,7 +114,7 @@ static inline void mm_needs_global_tlbie(struct mm_struct *mm)
         int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
 
         /* Global TLBIE broadcast required with SPEs. */
-        __cpus_setall(&mm->cpu_vm_mask, nr);
+        bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr);
 }
 
 void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
diff --git a/arch/powerpc/platforms/cell/spu_fault.c b/arch/powerpc/platforms/cell/spu_fault.c
index c8b1cd42905d..95d8dadf2d87 100644
--- a/arch/powerpc/platforms/cell/spu_fault.c
+++ b/arch/powerpc/platforms/cell/spu_fault.c
@@ -39,60 +39,56 @@ int spu_handle_mm_fault(struct mm_struct *mm, unsigned long ea,
         unsigned long is_write;
         int ret;
 
-#if 0
-        if (!IS_VALID_EA(ea)) {
+        if (mm == NULL)
                 return -EFAULT;
-        }
-#endif /* XXX */
-        if (mm == NULL) {
-                return -EFAULT;
-        }
-        if (mm->pgd == NULL) {
+
+        if (mm->pgd == NULL)
                 return -EFAULT;
-        }
 
         down_read(&mm->mmap_sem);
+        ret = -EFAULT;
         vma = find_vma(mm, ea);
         if (!vma)
-                goto bad_area;
-        if (vma->vm_start <= ea)
-                goto good_area;
-        if (!(vma->vm_flags & VM_GROWSDOWN))
-                goto bad_area;
-        if (expand_stack(vma, ea))
-                goto bad_area;
-good_area:
+                goto out_unlock;
+
+        if (ea < vma->vm_start) {
+                if (!(vma->vm_flags & VM_GROWSDOWN))
+                        goto out_unlock;
+                if (expand_stack(vma, ea))
+                        goto out_unlock;
+        }
+
         is_write = dsisr & MFC_DSISR_ACCESS_PUT;
         if (is_write) {
                 if (!(vma->vm_flags & VM_WRITE))
-                        goto bad_area;
+                        goto out_unlock;
         } else {
                 if (dsisr & MFC_DSISR_ACCESS_DENIED)
-                        goto bad_area;
+                        goto out_unlock;
                 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
-                        goto bad_area;
+                        goto out_unlock;
         }
+
         ret = 0;
         *flt = handle_mm_fault(mm, vma, ea, is_write);
         if (unlikely(*flt & VM_FAULT_ERROR)) {
                 if (*flt & VM_FAULT_OOM) {
                         ret = -ENOMEM;
-                        goto bad_area;
+                        goto out_unlock;
                 } else if (*flt & VM_FAULT_SIGBUS) {
                         ret = -EFAULT;
-                        goto bad_area;
+                        goto out_unlock;
                 }
                 BUG();
         }
+
         if (*flt & VM_FAULT_MAJOR)
                 current->maj_flt++;
         else
                 current->min_flt++;
-        up_read(&mm->mmap_sem);
-        return ret;
 
-bad_area:
+out_unlock:
         up_read(&mm->mmap_sem);
-        return -EFAULT;
+        return ret;
 }
 EXPORT_SYMBOL_GPL(spu_handle_mm_fault);
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c
index 6653ddbed048..db5398c0339f 100644
--- a/arch/powerpc/platforms/cell/spufs/context.c
+++ b/arch/powerpc/platforms/cell/spufs/context.c
@@ -35,6 +35,8 @@ atomic_t nr_spu_contexts = ATOMIC_INIT(0);
 struct spu_context *alloc_spu_context(struct spu_gang *gang)
 {
         struct spu_context *ctx;
+        struct timespec ts;
+
         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
         if (!ctx)
                 goto out;
@@ -64,6 +66,8 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang)
         __spu_update_sched_info(ctx);
         spu_set_timeslice(ctx);
         ctx->stats.util_state = SPU_UTIL_IDLE_LOADED;
+        ktime_get_ts(&ts);
+        ctx->stats.tstamp = timespec_to_ns(&ts);
 
         atomic_inc(&nr_spu_contexts);
         goto out;
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 0da7f2bf5ee1..d6a519e6e1c1 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -568,16 +568,17 @@ spufs_regs_write(struct file *file, const char __user *buffer,
         struct spu_lscsa *lscsa = ctx->csa.lscsa;
         int ret;
 
-        size = min_t(ssize_t, sizeof lscsa->gprs - *pos, size);
-        if (size <= 0)
+        if (*pos >= sizeof(lscsa->gprs))
                 return -EFBIG;
+
+        size = min_t(ssize_t, sizeof(lscsa->gprs) - *pos, size);
         *pos += size;
 
         ret = spu_acquire_saved(ctx);
         if (ret)
                 return ret;
 
-        ret = copy_from_user(lscsa->gprs + *pos - size,
+        ret = copy_from_user((char *)lscsa->gprs + *pos - size,
                              buffer, size) ? -EFAULT : size;
 
         spu_release_saved(ctx);
@@ -623,10 +624,11 @@ spufs_fpcr_write(struct file *file, const char __user * buffer,
         struct spu_lscsa *lscsa = ctx->csa.lscsa;
         int ret;
 
-        size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size);
-        if (size <= 0)
+        if (*pos >= sizeof(lscsa->fpcr))
                 return -EFBIG;
 
+        size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size);
+
         ret = spu_acquire_saved(ctx);
         if (ret)
                 return ret;
@@ -2665,7 +2667,7 @@ static const struct file_operations spufs_ctx_fops = {
         .release        = single_release,
 };
 
-struct spufs_tree_descr spufs_dir_contents[] = {
+const struct spufs_tree_descr spufs_dir_contents[] = {
         { "capabilities", &spufs_caps_fops, 0444, },
         { "mem",  &spufs_mem_fops,  0666, LS_SIZE, },
         { "regs", &spufs_regs_fops,  0666, sizeof(struct spu_reg128[128]), },
@@ -2706,7 +2708,7 @@ struct spufs_tree_descr spufs_dir_contents[] = {
         {},
 };
 
-struct spufs_tree_descr spufs_dir_nosched_contents[] = {
+const struct spufs_tree_descr spufs_dir_nosched_contents[] = {
         { "capabilities", &spufs_caps_fops, 0444, },
         { "mem",  &spufs_mem_fops,  0666, LS_SIZE, },
         { "mbox", &spufs_mbox_fops, 0444, },
@@ -2731,12 +2733,12 @@ struct spufs_tree_descr spufs_dir_nosched_contents[] = {
         {},
 };
 
-struct spufs_tree_descr spufs_dir_debug_contents[] = {
+const struct spufs_tree_descr spufs_dir_debug_contents[] = {
         { ".ctx", &spufs_ctx_fops, 0444, },
         {},
 };
 
-struct spufs_coredump_reader spufs_coredump_read[] = {
+const struct spufs_coredump_reader spufs_coredump_read[] = {
         { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])},
         { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) },
         { "lslr", NULL, spufs_lslr_get, 19 },
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index e309ef70a531..64f068540d0d 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -186,8 +186,9 @@ static int spufs_rmdir(struct inode *parent, struct dentry *dir)
         return simple_rmdir(parent, dir);
 }
 
-static int spufs_fill_dir(struct dentry *dir, struct spufs_tree_descr *files,
-                          int mode, struct spu_context *ctx)
+static int spufs_fill_dir(struct dentry *dir,
+                const struct spufs_tree_descr *files, int mode,
+                struct spu_context *ctx)
 {
         struct dentry *dentry, *tmp;
         int ret;
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index c58bd36b0c5b..4ddf769a64e5 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -117,6 +117,9 @@ static int spu_setup_isolated(struct spu_context *ctx)
                 cond_resched();
         }
 
+        /* clear purge status */
+        out_be64(mfc_cntl, 0);
+
         /* put the SPE in kernel mode to allow access to the loader */
         sr1 = spu_mfc_sr1_get(ctx->spu);
         sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK;
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 3bf908e2873a..ae31573bea4a 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -241,9 +241,9 @@ struct spufs_tree_descr {
         size_t size;
 };
 
-extern struct spufs_tree_descr spufs_dir_contents[];
-extern struct spufs_tree_descr spufs_dir_nosched_contents[];
-extern struct spufs_tree_descr spufs_dir_debug_contents[];
+extern const struct spufs_tree_descr spufs_dir_contents[];
+extern const struct spufs_tree_descr spufs_dir_nosched_contents[];
+extern const struct spufs_tree_descr spufs_dir_debug_contents[];
 
 /* system call implementation */
 extern struct spufs_calls spufs_calls;
@@ -358,7 +358,7 @@ struct spufs_coredump_reader {
         u64 (*get)(struct spu_context *ctx);
         size_t size;
 };
-extern struct spufs_coredump_reader spufs_coredump_read[];
+extern const struct spufs_coredump_reader spufs_coredump_read[];
 extern int spufs_coredump_num_notes;
 
 extern int spu_init_csa(struct spu_state *csa);
diff --git a/arch/powerpc/platforms/chrp/Kconfig b/arch/powerpc/platforms/chrp/Kconfig
index 22b4b4e3b6f0..37d438bd5b7a 100644
--- a/arch/powerpc/platforms/chrp/Kconfig
+++ b/arch/powerpc/platforms/chrp/Kconfig
@@ -1,6 +1,6 @@
 config PPC_CHRP
         bool "Common Hardware Reference Platform (CHRP) based machines"
-        depends on PPC_MULTIPLATFORM && PPC32
+        depends on 6xx
         select MPIC
         select PPC_I8259
         select PPC_INDIRECT_PCI
diff --git a/arch/powerpc/platforms/chrp/pegasos_eth.c b/arch/powerpc/platforms/chrp/pegasos_eth.c
index 130ff72d99dd..039fc8e82199 100644
--- a/arch/powerpc/platforms/chrp/pegasos_eth.c
+++ b/arch/powerpc/platforms/chrp/pegasos_eth.c
@@ -21,8 +21,8 @@
 #define PEGASOS2_SRAM_BASE                      (0xf2000000)
 #define PEGASOS2_SRAM_SIZE                      (256*1024)
 
-#define PEGASOS2_SRAM_BASE_ETH0                 (PEGASOS2_SRAM_BASE)
-#define PEGASOS2_SRAM_BASE_ETH1                 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) )
+#define PEGASOS2_SRAM_BASE_ETH_PORT0                    (PEGASOS2_SRAM_BASE)
+#define PEGASOS2_SRAM_BASE_ETH_PORT1                    (PEGASOS2_SRAM_BASE_ETH_PORT0 + (PEGASOS2_SRAM_SIZE / 2) )
 
 
 #define PEGASOS2_SRAM_RXRING_SIZE               (PEGASOS2_SRAM_SIZE/4)
@@ -47,75 +47,42 @@ static struct platform_device mv643xx_eth_shared_device = {
         .resource       = mv643xx_eth_shared_resources,
 };
 
-static struct resource mv643xx_eth0_resources[] = {
+static struct resource mv643xx_eth_port1_resources[] = {
         [0] = {
-                .name   = "eth0 irq",
+                .name   = "eth port1 irq",
                 .start  = 9,
                 .end    = 9,
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
-
-static struct mv643xx_eth_platform_data eth0_pd = {
-        .shared         = &mv643xx_eth_shared_device,
-        .port_number    = 0,
-
-        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
-        .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
-        .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
-
-        .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE,
-        .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
-        .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
-};
-
-static struct platform_device eth0_device = {
-        .name           = MV643XX_ETH_NAME,
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(mv643xx_eth0_resources),
-        .resource       = mv643xx_eth0_resources,
-        .dev = {
-                .platform_data = &eth0_pd,
-        },
-};
-
-static struct resource mv643xx_eth1_resources[] = {
-        [0] = {
-                .name   = "eth1 irq",
-                .start  = 9,
-                .end    = 9,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct mv643xx_eth_platform_data eth1_pd = {
+static struct mv643xx_eth_platform_data eth_port1_pd = {
         .shared         = &mv643xx_eth_shared_device,
         .port_number    = 1,
+        .phy_addr       = MV643XX_ETH_PHY_ADDR(7),
 
-        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
+        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH_PORT1,
         .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
         .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
 
-        .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE,
+        .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH_PORT1 + PEGASOS2_SRAM_TXRING_SIZE,
         .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
         .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
 };
 
-static struct platform_device eth1_device = {
+static struct platform_device eth_port1_device = {
         .name           = MV643XX_ETH_NAME,
         .id             = 1,
-        .num_resources  = ARRAY_SIZE(mv643xx_eth1_resources),
-        .resource       = mv643xx_eth1_resources,
+        .num_resources  = ARRAY_SIZE(mv643xx_eth_port1_resources),
+        .resource       = mv643xx_eth_port1_resources,
         .dev = {
-                .platform_data = &eth1_pd,
+                .platform_data = &eth_port1_pd,
         },
 };
 
 static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
         &mv643xx_eth_shared_device,
-        &eth0_device,
-        &eth1_device,
+        &eth_port1_device,
 };
 
 /***********/
@@ -191,15 +158,10 @@ static int __init mv643xx_eth_add_pds(void)
 
                 if ( Enable_SRAM() < 0)
                 {
-                        eth0_pd.tx_sram_addr = 0;
-                        eth0_pd.tx_sram_size = 0;
-                        eth0_pd.rx_sram_addr = 0;
-                        eth0_pd.rx_sram_size = 0;
-
-                        eth1_pd.tx_sram_addr = 0;
-                        eth1_pd.tx_sram_size = 0;
-                        eth1_pd.rx_sram_addr = 0;
-                        eth1_pd.rx_sram_size = 0;
+                        eth_port1_pd.tx_sram_addr = 0;
+                        eth_port1_pd.tx_sram_size = 0;
+                        eth_port1_pd.rx_sram_addr = 0;
+                        eth_port1_pd.rx_sram_size = 0;
 
 #ifdef BE_VERBOSE
                         printk("Pegasos II/Marvell MV64361: Can't enable the "
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 272d79a8d289..cd4ad9aea760 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -472,7 +472,6 @@ static void __init chrp_find_openpic(void)
 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_XMON)
 static struct irqaction xmon_irqaction = {
         .handler = xmon_irq,
-        .mask = CPU_MASK_NONE,
         .name = "XMON break",
 };
 #endif
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 4f9f8184d164..291ac9d8cbee 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -1,6 +1,6 @@
 config EMBEDDED6xx
         bool "Embedded 6xx/7xx/7xxx-based boards"
-        depends on PPC32 && BROKEN_ON_SMP && PPC_MULTIPLATFORM
+        depends on 6xx && BROKEN_ON_SMP
 
 config LINKSTATION
         bool "Linkstation / Kurobox(HG) from Buffalo"
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
index 7ddd0a2c8027..647e87787437 100644
--- a/arch/powerpc/platforms/iseries/Kconfig
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -1,6 +1,6 @@
 config PPC_ISERIES
         bool "IBM Legacy iSeries"
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64 && PPC_BOOK3S
         select PPC_INDIRECT_IO
         select PPC_PCI_CHOICE if EMBEDDED
 
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index 701d9297c207..94f444758836 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -214,7 +214,7 @@ void __init iSeries_activate_IRQs()
         unsigned long flags;
 
         for_each_irq (irq) {
-                irq_desc_t *desc = get_irq_desc(irq);
+                struct irq_desc *desc = get_irq_desc(irq);
 
                 if (desc && desc->chip && desc->chip->startup) {
                         spin_lock_irqsave(&desc->lock, flags);
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index 24519b96d6ad..a6cd3394feaa 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -617,7 +617,7 @@ static void iseries_dedicated_idle(void)
 }
 
 static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
-                                     unsigned long flags)
+                                     unsigned long flags, void *caller)
 {
         return (void __iomem *)address;
 }
diff --git a/arch/powerpc/platforms/maple/Kconfig b/arch/powerpc/platforms/maple/Kconfig
index a6467a5591fa..1ea621a94c3b 100644
--- a/arch/powerpc/platforms/maple/Kconfig
+++ b/arch/powerpc/platforms/maple/Kconfig
@@ -1,5 +1,5 @@
 config PPC_MAPLE
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64 && PPC_BOOK3S
         bool "Maple 970FX Evaluation Board"
         select PCI
         select MPIC
diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig
index 348e0619e3e5..a2aeb327d185 100644
--- a/arch/powerpc/platforms/pasemi/Kconfig
+++ b/arch/powerpc/platforms/pasemi/Kconfig
@@ -1,5 +1,5 @@
 config PPC_PASEMI
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64 && PPC_BOOK3S
         bool "PA Semi SoC-based platforms"
         default n
         select MPIC
diff --git a/arch/powerpc/platforms/powermac/Kconfig b/arch/powerpc/platforms/powermac/Kconfig
index 055990ca8ce6..1e1a0873e1dd 100644
--- a/arch/powerpc/platforms/powermac/Kconfig
+++ b/arch/powerpc/platforms/powermac/Kconfig
@@ -1,6 +1,6 @@
 config PPC_PMAC
         bool "Apple PowerMac based machines"
-        depends on PPC_MULTIPLATFORM
+        depends on PPC_BOOK3S
         select MPIC
         select PCI
         select PPC_INDIRECT_PCI if PPC32
diff --git a/arch/powerpc/platforms/powermac/cpufreq_64.c b/arch/powerpc/platforms/powermac/cpufreq_64.c
index beb38333b6d2..22ecfbe7183d 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_64.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_64.c
@@ -86,6 +86,7 @@ static int (*g5_query_freq)(void);
 
 static DEFINE_MUTEX(g5_switch_mutex);
 
+static unsigned long transition_latency;
 
 #ifdef CONFIG_PMAC_SMU
 
@@ -357,7 +358,7 @@ static unsigned int g5_cpufreq_get_speed(unsigned int cpu)
 
 static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy)
 {
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
+        policy->cpuinfo.transition_latency = transition_latency;
         policy->cur = g5_cpu_freqs[g5_query_freq()].frequency;
         /* secondary CPUs are tied to the primary one by the
          * cpufreq core if in the secondary policy we tell it that
@@ -500,6 +501,7 @@ static int __init g5_neo2_cpufreq_init(struct device_node *cpus)
         g5_cpu_freqs[1].frequency = max_freq/2;
 
         /* Set callbacks */
+        transition_latency = 12000;
         g5_switch_freq = g5_scom_switch_freq;
         g5_query_freq = g5_scom_query_freq;
         freq_method = "SCOM";
@@ -675,6 +677,7 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus)
         g5_cpu_freqs[1].frequency = min_freq;
 
         /* Set callbacks */
+        transition_latency = CPUFREQ_ETERNAL;
         g5_switch_volt = g5_pfunc_switch_volt;
         g5_switch_freq = g5_pfunc_switch_freq;
         g5_query_freq = g5_pfunc_query_freq;
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 6d149ae8ffa7..7039d8f1d3ba 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -266,7 +266,6 @@ static unsigned int pmac_pic_get_irq(void)
 static struct irqaction xmon_action = {
         .handler        = xmon_irq,
         .flags          = 0,
-        .mask           = CPU_MASK_NONE,
         .name           = "NMI - XMON"
 };
 #endif
@@ -274,7 +273,6 @@ static struct irqaction xmon_action = {
 static struct irqaction gatwick_cascade_action = {
         .handler        = gatwick_action,
         .flags          = IRQF_DISABLED,
-        .mask           = CPU_MASK_NONE,
         .name           = "cascade",
 };
 
diff --git a/arch/powerpc/platforms/powermac/pic.h b/arch/powerpc/platforms/powermac/pic.h
index c44c89f5e532..d622a8345aaa 100644
--- a/arch/powerpc/platforms/powermac/pic.h
+++ b/arch/powerpc/platforms/powermac/pic.h
@@ -3,7 +3,7 @@
 
 #include <linux/irq.h>
 
-extern struct hw_interrupt_type pmac_pic;
+extern struct irq_chip pmac_pic;
 
 extern void pmac_pic_init(void);
 extern int pmac_get_irq(void);
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 9b78f5300c24..45936c9ed0ec 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -746,4 +746,7 @@ define_machine(powermac) {
 #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
         .cpu_die                = pmac_cpu_die,
 #endif
+#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32)
+        .cpu_die                = generic_mach_cpu_die,
+#endif
 };
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index bd8817b00fa4..cf1dbe758890 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -385,7 +385,6 @@ static void __init psurge_dual_sync_tb(int cpu_nr)
 static struct irqaction psurge_irqaction = {
         .handler = psurge_primary_intr,
         .flags = IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "primary IPI",
 };
 
diff --git a/arch/powerpc/platforms/prep/Kconfig b/arch/powerpc/platforms/prep/Kconfig
index 29d411279b0c..bf8330ef2e76 100644
--- a/arch/powerpc/platforms/prep/Kconfig
+++ b/arch/powerpc/platforms/prep/Kconfig
@@ -1,6 +1,6 @@
 config PPC_PREP
         bool "PowerPC Reference Platform (PReP) based machines"
-        depends on PPC_MULTIPLATFORM && PPC32 && BROKEN
+        depends on 6xx && BROKEN
         select MPIC
         select PPC_I8259
         select PPC_INDIRECT_PCI
diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig
index 740ef56a1550..dfe316b161a9 100644
--- a/arch/powerpc/platforms/ps3/Kconfig
+++ b/arch/powerpc/platforms/ps3/Kconfig
@@ -1,6 +1,6 @@
 config PPC_PS3
         bool "Sony PS3"
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64 && PPC_BOOK3S
         select PPC_CELL
         select USB_ARCH_HAS_OHCI
         select USB_OHCI_LITTLE_ENDIAN
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index d281cc0bca71..9a2b6d948610 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -311,7 +311,7 @@ static int __init ps3_mm_add_memory(void)
         result = add_memory(0, start_addr, map.r1.size);
 
         if (result) {
-                DBG("%s:%d: add_memory failed: (%d)\n",
+                pr_err("%s:%d: add_memory failed: (%d)\n",
                         __func__, __LINE__, result);
                 return result;
         }
@@ -322,7 +322,7 @@ static int __init ps3_mm_add_memory(void)
         result = online_pages(start_pfn, nr_pages);
 
         if (result)
-                DBG("%s:%d: online_pages failed: (%d)\n",
+                pr_err("%s:%d: online_pages failed: (%d)\n",
                         __func__, __LINE__, result);
 
         return result;
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index ddc2a307cd50..f0e6f28427bd 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -1,5 +1,5 @@
 config PPC_PSERIES
-        depends on PPC_MULTIPLATFORM && PPC64
+        depends on PPC64 && PPC_BOOK3S
         bool "IBM pSeries & new (POWER5-based) iSeries"
         select MPIC
         select PPC_I8259
@@ -25,6 +25,11 @@ config EEH
         depends on PPC_PSERIES && PCI
         default y if !EMBEDDED
 
+config PSERIES_MSI
+       bool
+       depends on PCI_MSI && EEH
+       default y
+
 config SCANLOG
         tristate "Scanlog dump interface"
         depends on RTAS_PROC && PPC_PSERIES
@@ -63,3 +68,13 @@ config CMM
           makes sense for a system running in an LPAR where the unused pages
           will be reused for other LPARs. The interface allows firmware to
           balance memory across many LPARs.
+
+config DTL
+        bool "Dispatch Trace Log"
+        depends on PPC_SPLPAR && DEBUG_FS
+        help
+          SPLPAR machines can log hypervisor preempt & dispatch events to a
+          kernel buffer. Saying Y here will enable logging these events,
+          which are accessible through a debugfs file.
+
+          Say N if you are unsure.
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index dfe574af2dc0..790c0b872d4f 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_SCANLOG)	+= scanlog.o
 obj-$(CONFIG_EEH)       += eeh.o eeh_cache.o eeh_driver.o eeh_event.o eeh_sysfs.o
 obj-$(CONFIG_KEXEC)     += kexec.o
 obj-$(CONFIG_PCI)       += pci.o pci_dlpar.o
-obj-$(CONFIG_PCI_MSI)   += msi.o
+obj-$(CONFIG_PSERIES_MSI)       += msi.o
 
 obj-$(CONFIG_HOTPLUG_CPU)       += hotplug-cpu.o
 obj-$(CONFIG_MEMORY_HOTPLUG)    += hotplug-memory.o
@@ -25,3 +25,4 @@ obj-$(CONFIG_HVCS)		+= hvcserver.o
 obj-$(CONFIG_HCALL_STATS)       += hvCall_inst.o
 obj-$(CONFIG_PHYP_DUMP) += phyp_dump.o
 obj-$(CONFIG_CMM)               += cmm.o
+obj-$(CONFIG_DTL)               += dtl.o
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
new file mode 100644
index 000000000000..fafcaa0e81ef
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -0,0 +1,278 @@
+/*
+ * Virtual Processor Dispatch Trace Log
+ *
+ * (C) Copyright IBM Corporation 2009
+ *
+ * Author: Jeremy Kerr <jk@ozlabs.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/debugfs.h>
+#include <asm/smp.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
+
+#include "plpar_wrappers.h"
+
+/*
+ * Layout of entries in the hypervisor's DTL buffer. Although we don't
+ * actually access the internals of an entry (we only need to know the size),
+ * we might as well define it here for reference.
+ */
+struct dtl_entry {
+        u8      dispatch_reason;
+        u8      preempt_reason;
+        u16     processor_id;
+        u32     enqueue_to_dispatch_time;
+        u32     ready_to_enqueue_time;
+        u32     waiting_to_ready_time;
+        u64     timebase;
+        u64     fault_addr;
+        u64     srr0;
+        u64     srr1;
+};
+
+struct dtl {
+        struct dtl_entry        *buf;
+        struct dentry           *file;
+        int                     cpu;
+        int                     buf_entries;
+        u64                     last_idx;
+};
+static DEFINE_PER_CPU(struct dtl, dtl);
+
+/*
+ * Dispatch trace log event mask:
+ * 0x7: 0x1: voluntary virtual processor waits
+ *      0x2: time-slice preempts
+ *      0x4: virtual partition memory page faults
+ */
+static u8 dtl_event_mask = 0x7;
+
+
+/*
+ * Size of per-cpu log buffers. Default is just under 16 pages worth.
+ */
+static int dtl_buf_entries = (16 * 85);
+
+
+static int dtl_enable(struct dtl *dtl)
+{
+        unsigned long addr;
+        int ret, hwcpu;
+
+        /* only allow one reader */
+        if (dtl->buf)
+                return -EBUSY;
+
+        /* we need to store the original allocation size for use during read */
+        dtl->buf_entries = dtl_buf_entries;
+
+        dtl->buf = kmalloc_node(dtl->buf_entries * sizeof(struct dtl_entry),
+                        GFP_KERNEL, cpu_to_node(dtl->cpu));
+        if (!dtl->buf) {
+                printk(KERN_WARNING "%s: buffer alloc failed for cpu %d\n",
+                                __func__, dtl->cpu);
+                return -ENOMEM;
+        }
+
+        /* Register our dtl buffer with the hypervisor. The HV expects the
+         * buffer size to be passed in the second word of the buffer */
+        ((u32 *)dtl->buf)[1] = dtl->buf_entries * sizeof(struct dtl_entry);
+
+        hwcpu = get_hard_smp_processor_id(dtl->cpu);
+        addr = __pa(dtl->buf);
+        ret = register_dtl(hwcpu, addr);
+        if (ret) {
+                printk(KERN_WARNING "%s: DTL registration for cpu %d (hw %d) "
+                       "failed with %d\n", __func__, dtl->cpu, hwcpu, ret);
+                kfree(dtl->buf);
+                return -EIO;
+        }
+
+        /* set our initial buffer indices */
+        dtl->last_idx = lppaca[dtl->cpu].dtl_idx = 0;
+
+        /* ensure that our updates to the lppaca fields have occurred before
+         * we actually enable the logging */
+        smp_wmb();
+
+        /* enable event logging */
+        lppaca[dtl->cpu].dtl_enable_mask = dtl_event_mask;
+
+        return 0;
+}
+
+static void dtl_disable(struct dtl *dtl)
+{
+        int hwcpu = get_hard_smp_processor_id(dtl->cpu);
+
+        lppaca[dtl->cpu].dtl_enable_mask = 0x0;
+
+        unregister_dtl(hwcpu, __pa(dtl->buf));
+
+        kfree(dtl->buf);
+        dtl->buf = NULL;
+        dtl->buf_entries = 0;
+}
+
+/* file interface */
+
+static int dtl_file_open(struct inode *inode, struct file *filp)
+{
+        struct dtl *dtl = inode->i_private;
+        int rc;
+
+        rc = dtl_enable(dtl);
+        if (rc)
+                return rc;
+
+        filp->private_data = dtl;
+        return 0;
+}
+
+static int dtl_file_release(struct inode *inode, struct file *filp)
+{
+        struct dtl *dtl = inode->i_private;
+        dtl_disable(dtl);
+        return 0;
+}
+
+static ssize_t dtl_file_read(struct file *filp, char __user *buf, size_t len,
+                loff_t *pos)
+{
+        int rc, cur_idx, last_idx, n_read, n_req, read_size;
+        struct dtl *dtl;
+
+        if ((len % sizeof(struct dtl_entry)) != 0)
+                return -EINVAL;
+
+        dtl = filp->private_data;
+
+        /* requested number of entries to read */
+        n_req = len / sizeof(struct dtl_entry);
+
+        /* actual number of entries read */
+        n_read = 0;
+
+        cur_idx = lppaca[dtl->cpu].dtl_idx;
+        last_idx = dtl->last_idx;
+
+        if (cur_idx - last_idx > dtl->buf_entries) {
+                pr_debug("%s: hv buffer overflow for cpu %d, samples lost\n",
+                                __func__, dtl->cpu);
+        }
+
+        cur_idx  %= dtl->buf_entries;
+        last_idx %= dtl->buf_entries;
+
+        /* read the tail of the buffer if we've wrapped */
+        if (last_idx > cur_idx) {
+                read_size = min(n_req, dtl->buf_entries - last_idx);
+
+                rc = copy_to_user(buf, &dtl->buf[last_idx],
+                                read_size * sizeof(struct dtl_entry));
+                if (rc)
+                        return -EFAULT;
+
+                last_idx = 0;
+                n_req -= read_size;
+                n_read += read_size;
+                buf += read_size * sizeof(struct dtl_entry);
+        }
+
+        /* .. and now the head */
+        read_size = min(n_req, cur_idx - last_idx);
+        rc = copy_to_user(buf, &dtl->buf[last_idx],
+                        read_size * sizeof(struct dtl_entry));
+        if (rc)
+                return -EFAULT;
+
+        n_read += read_size;
+        dtl->last_idx += n_read;
+
+        return n_read * sizeof(struct dtl_entry);
+}
+
+static struct file_operations dtl_fops = {
+        .open           = dtl_file_open,
+        .release        = dtl_file_release,
+        .read           = dtl_file_read,
+        .llseek         = no_llseek,
+};
+
+static struct dentry *dtl_dir;
+
+static int dtl_setup_file(struct dtl *dtl)
+{
+        char name[10];
+
+        sprintf(name, "cpu-%d", dtl->cpu);
+
+        dtl->file = debugfs_create_file(name, 0400, dtl_dir, dtl, &dtl_fops);
+        if (!dtl->file)
+                return -ENOMEM;
+
+        return 0;
+}
+
+static int dtl_init(void)
+{
+        struct dentry *event_mask_file, *buf_entries_file;
+        int rc, i;
+
+        if (!firmware_has_feature(FW_FEATURE_SPLPAR))
+                return -ENODEV;
+
+        /* set up common debugfs structure */
+
+        rc = -ENOMEM;
+        dtl_dir = debugfs_create_dir("dtl", powerpc_debugfs_root);
+        if (!dtl_dir) {
+                printk(KERN_WARNING "%s: can't create dtl root dir\n",
+                                __func__);
+                goto err;
+        }
+
+        event_mask_file = debugfs_create_x8("dtl_event_mask", 0600,
+                                dtl_dir, &dtl_event_mask);
+        buf_entries_file = debugfs_create_u32("dtl_buf_entries", 0600,
+                                dtl_dir, &dtl_buf_entries);
+
+        if (!event_mask_file || !buf_entries_file) {
+                printk(KERN_WARNING "%s: can't create dtl files\n", __func__);
+                goto err_remove_dir;
+        }
+
+        /* set up the per-cpu log structures */
+        for_each_possible_cpu(i) {
+                struct dtl *dtl = &per_cpu(dtl, i);
+                dtl->cpu = i;
+
+                rc = dtl_setup_file(dtl);
+                if (rc)
+                        goto err_remove_dir;
+        }
+
+        return 0;
+
+err_remove_dir:
+        debugfs_remove_recursive(dtl_dir);
+err:
+        return rc;
+}
+arch_initcall(dtl_init);
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index 0ad56ff7b4a0..380420f8c400 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -79,6 +79,40 @@ static int irq_in_use(unsigned int irq)
         return rc;
 }
 
+/**
+ * eeh_disable_irq - disable interrupt for the recovering device
+ */
+static void eeh_disable_irq(struct pci_dev *dev)
+{
+        struct device_node *dn = pci_device_to_OF_node(dev);
+
+        /* Don't disable MSI and MSI-X interrupts. They are
+         * effectively disabled by the DMA Stopped state
+         * when an EEH error occurs.
+        */
+        if (dev->msi_enabled || dev->msix_enabled)
+                return;
+
+        if (!irq_in_use(dev->irq))
+                return;
+
+        PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED;
+        disable_irq_nosync(dev->irq);
+}
+
+/**
+ * eeh_enable_irq - enable interrupt for the recovering device
+ */
+static void eeh_enable_irq(struct pci_dev *dev)
+{
+        struct device_node *dn = pci_device_to_OF_node(dev);
+
+        if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) {
+                PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED;
+                enable_irq(dev->irq);
+        }
+}
+
 /* ------------------------------------------------------- */
 /**
  * eeh_report_error - report pci error to each device driver
@@ -98,11 +132,8 @@ static void eeh_report_error(struct pci_dev *dev, void *userdata)
         if (!driver)
                 return;
 
-        if (irq_in_use (dev->irq)) {
-                struct device_node *dn = pci_device_to_OF_node(dev);
-                PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED;
-                disable_irq_nosync(dev->irq);
-        }
+        eeh_disable_irq(dev);
+
         if (!driver->err_handler ||
             !driver->err_handler->error_detected)
                 return;
@@ -147,15 +178,12 @@ static void eeh_report_reset(struct pci_dev *dev, void *userdata)
 {
         enum pci_ers_result rc, *res = userdata;
         struct pci_driver *driver = dev->driver;
-        struct device_node *dn = pci_device_to_OF_node(dev);
 
         if (!driver)
                 return;
 
-        if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) {
-                PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED;
-                enable_irq(dev->irq);
-        }
+        eeh_enable_irq(dev);
+
         if (!driver->err_handler ||
             !driver->err_handler->slot_reset)
                 return;
@@ -174,17 +202,14 @@ static void eeh_report_reset(struct pci_dev *dev, void *userdata)
 static void eeh_report_resume(struct pci_dev *dev, void *userdata)
 {
         struct pci_driver *driver = dev->driver;
-        struct device_node *dn = pci_device_to_OF_node(dev);
 
         dev->error_state = pci_channel_io_normal;
 
         if (!driver)
                 return;
 
-        if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) {
-                PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED;
-                enable_irq(dev->irq);
-        }
+        eeh_enable_irq(dev);
+
         if (!driver->err_handler ||
             !driver->err_handler->resume)
                 return;
@@ -208,15 +233,12 @@ static void eeh_report_failure(struct pci_dev *dev, void *userdata)
         if (!driver)
                 return;
 
-        if (irq_in_use (dev->irq)) {
-                struct device_node *dn = pci_device_to_OF_node(dev);
-                PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED;
-                disable_irq_nosync(dev->irq);
-        }
-        if (!driver->err_handler)
-                return;
-        if (!driver->err_handler->error_detected)
+        eeh_disable_irq(dev);
+
+        if (!driver->err_handler ||
+            !driver->err_handler->error_detected)
                 return;
+
         driver->err_handler->error_detected(dev, pci_channel_io_perm_failure);
 }
 
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index f15222bbe136..bf2e1ac41308 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -71,11 +71,13 @@ static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs)
         } while (rtas_busy_delay(rc));
 
         /*
-         * If the RTAS call succeeded, check the number of irqs is actually
-         * what we asked for. If not, return an error.
+         * If the RTAS call succeeded, return the number of irqs allocated.
+         * If not, make sure we return a negative error code.
          */
-        if (rc == 0 && rtas_ret[0] != num_irqs)
-                rc = -ENOSPC;
+        if (rc == 0)
+                rc = rtas_ret[0];
+        else if (rc > 0)
+                rc = -rc;
 
         pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n",
                  func, num_irqs, rtas_ret[0], rc);
@@ -91,7 +93,7 @@ static void rtas_disable_msi(struct pci_dev *pdev)
         if (!pdn)
                 return;
 
-        if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0))
+        if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0)
                 pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
 }
 
@@ -132,7 +134,7 @@ static void rtas_teardown_msi_irqs(struct pci_dev *pdev)
         rtas_disable_msi(pdev);
 }
 
-static int check_req_msi(struct pci_dev *pdev, int nvec)
+static int check_req(struct pci_dev *pdev, int nvec, char *prop_name)
 {
         struct device_node *dn;
         struct pci_dn *pdn;
@@ -144,26 +146,235 @@ static int check_req_msi(struct pci_dev *pdev, int nvec)
 
         dn = pdn->node;
 
-        req_msi = of_get_property(dn, "ibm,req#msi", NULL);
+        req_msi = of_get_property(dn, prop_name, NULL);
         if (!req_msi) {
-                pr_debug("rtas_msi: No ibm,req#msi on %s\n", dn->full_name);
+                pr_debug("rtas_msi: No %s on %s\n", prop_name, dn->full_name);
                 return -ENOENT;
         }
 
         if (*req_msi < nvec) {
-                pr_debug("rtas_msi: ibm,req#msi requests < %d MSIs\n", nvec);
-                return -ENOSPC;
+                pr_debug("rtas_msi: %s requests < %d MSIs\n", prop_name, nvec);
+
+                if (*req_msi == 0) /* Be paranoid */
+                        return -ENOSPC;
+
+                return *req_msi;
         }
 
         return 0;
 }
 
+static int check_req_msi(struct pci_dev *pdev, int nvec)
+{
+        return check_req(pdev, nvec, "ibm,req#msi");
+}
+
+static int check_req_msix(struct pci_dev *pdev, int nvec)
+{
+        return check_req(pdev, nvec, "ibm,req#msi-x");
+}
+
+/* Quota calculation */
+
+static struct device_node *find_pe_total_msi(struct pci_dev *dev, int *total)
+{
+        struct device_node *dn;
+        const u32 *p;
+
+        dn = of_node_get(pci_device_to_OF_node(dev));
+        while (dn) {
+                p = of_get_property(dn, "ibm,pe-total-#msi", NULL);
+                if (p) {
+                        pr_debug("rtas_msi: found prop on dn %s\n",
+                                dn->full_name);
+                        *total = *p;
+                        return dn;
+                }
+
+                dn = of_get_next_parent(dn);
+        }
+
+        return NULL;
+}
+
+static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
+{
+        struct device_node *dn;
+
+        /* Found our PE and assume 8 at that point. */
+
+        dn = pci_device_to_OF_node(dev);
+        if (!dn)
+                return NULL;
+
+        dn = find_device_pe(dn);
+        if (!dn)
+                return NULL;
+
+        /* We actually want the parent */
+        dn = of_get_parent(dn);
+        if (!dn)
+                return NULL;
+
+        /* Hardcode of 8 for old firmwares */
+        *total = 8;
+        pr_debug("rtas_msi: using PE dn %s\n", dn->full_name);
+
+        return dn;
+}
+
+struct msi_counts {
+        struct device_node *requestor;
+        int num_devices;
+        int request;
+        int quota;
+        int spare;
+        int over_quota;
+};
+
+static void *count_non_bridge_devices(struct device_node *dn, void *data)
+{
+        struct msi_counts *counts = data;
+        const u32 *p;
+        u32 class;
+
+        pr_debug("rtas_msi: counting %s\n", dn->full_name);
+
+        p = of_get_property(dn, "class-code", NULL);
+        class = p ? *p : 0;
+
+        if ((class >> 8) != PCI_CLASS_BRIDGE_PCI)
+                counts->num_devices++;
+
+        return NULL;
+}
+
+static void *count_spare_msis(struct device_node *dn, void *data)
+{
+        struct msi_counts *counts = data;
+        const u32 *p;
+        int req;
+
+        if (dn == counts->requestor)
+                req = counts->request;
+        else {
+                /* We don't know if a driver will try to use MSI or MSI-X,
+                 * so we just have to punt and use the larger of the two. */
+                req = 0;
+                p = of_get_property(dn, "ibm,req#msi", NULL);
+                if (p)
+                        req = *p;
+
+                p = of_get_property(dn, "ibm,req#msi-x", NULL);
+                if (p)
+                        req = max(req, (int)*p);
+        }
+
+        if (req < counts->quota)
+                counts->spare += counts->quota - req;
+        else if (req > counts->quota)
+                counts->over_quota++;
+
+        return NULL;
+}
+
+static int msi_quota_for_device(struct pci_dev *dev, int request)
+{
+        struct device_node *pe_dn;
+        struct msi_counts counts;
+        int total;
+
+        pr_debug("rtas_msi: calc quota for %s, request %d\n", pci_name(dev),
+                  request);
+
+        pe_dn = find_pe_total_msi(dev, &total);
+        if (!pe_dn)
+                pe_dn = find_pe_dn(dev, &total);
+
+        if (!pe_dn) {
+                pr_err("rtas_msi: couldn't find PE for %s\n", pci_name(dev));
+                goto out;
+        }
+
+        pr_debug("rtas_msi: found PE %s\n", pe_dn->full_name);
+
+        memset(&counts, 0, sizeof(struct msi_counts));
+
+        /* Work out how many devices we have below this PE */
+        traverse_pci_devices(pe_dn, count_non_bridge_devices, &counts);
+
+        if (counts.num_devices == 0) {
+                pr_err("rtas_msi: found 0 devices under PE for %s\n",
+                        pci_name(dev));
+                goto out;
+        }
+
+        counts.quota = total / counts.num_devices;
+        if (request <= counts.quota)
+                goto out;
+
+        /* else, we have some more calculating to do */
+        counts.requestor = pci_device_to_OF_node(dev);
+        counts.request = request;
+        traverse_pci_devices(pe_dn, count_spare_msis, &counts);
+
+        /* If the quota isn't an integer multiple of the total, we can
+         * use the remainder as spare MSIs for anyone that wants them. */
+        counts.spare += total % counts.num_devices;
+
+        /* Divide any spare by the number of over-quota requestors */
+        if (counts.over_quota)
+                counts.quota += counts.spare / counts.over_quota;
+
+        /* And finally clamp the request to the possibly adjusted quota */
+        request = min(counts.quota, request);
+
+        pr_debug("rtas_msi: request clamped to quota %d\n", request);
+out:
+        of_node_put(pe_dn);
+
+        return request;
+}
+
 static int rtas_msi_check_device(struct pci_dev *pdev, int nvec, int type)
 {
+        int quota, rc;
+
         if (type == PCI_CAP_ID_MSIX)
-                pr_debug("rtas_msi: MSI-X untested, trying anyway.\n");
+                rc = check_req_msix(pdev, nvec);
+        else
+                rc = check_req_msi(pdev, nvec);
+
+        if (rc)
+                return rc;
+
+        quota = msi_quota_for_device(pdev, nvec);
 
-        return check_req_msi(pdev, nvec);
+        if (quota && quota < nvec)
+                return quota;
+
+        return 0;
+}
+
+static int check_msix_entries(struct pci_dev *pdev)
+{
+        struct msi_desc *entry;
+        int expected;
+
+        /* There's no way for us to express to firmware that we want
+         * a discontiguous, or non-zero based, range of MSI-X entries.
+         * So we must reject such requests. */
+
+        expected = 0;
+        list_for_each_entry(entry, &pdev->msi_list, list) {
+                if (entry->msi_attrib.entry_nr != expected) {
+                        pr_debug("rtas_msi: bad MSI-X entries.\n");
+                        return -EINVAL;
+                }
+                expected++;
+        }
+
+        return 0;
 }
 
 static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
@@ -177,6 +388,9 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
         if (!pdn)
                 return -ENODEV;
 
+        if (type == PCI_CAP_ID_MSIX && check_msix_entries(pdev))
+                return -EINVAL;
+
         /*
          * Try the new more explicit firmware interface, if that fails fall
          * back to the old interface. The old interface is known to never
@@ -185,21 +399,21 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
         if (type == PCI_CAP_ID_MSI) {
                 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec);
 
-                if (rc) {
+                if (rc < 0) {
                         pr_debug("rtas_msi: trying the old firmware call.\n");
                         rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec);
                 }
         } else
                 rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
 
-        if (rc) {
+        if (rc != nvec) {
                 pr_debug("rtas_msi: rtas_change_msi() failed\n");
                 return rc;
         }
 
         i = 0;
         list_for_each_entry(entry, &pdev->msi_list, list) {
-                hwirq = rtas_query_irq_number(pdn, i);
+                hwirq = rtas_query_irq_number(pdn, i++);
                 if (hwirq < 0) {
                         pr_debug("rtas_msi: error (%d) getting hwirq\n", rc);
                         return hwirq;
@@ -234,8 +448,8 @@ static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)
         }
 
         /* No MSI -> MSIs can't have been assigned by fw, leave LSI */
-        if (check_req_msi(pdev, 1)) {
-                dev_dbg(&pdev->dev, "rtas_msi: no req#msi, nothing to do.\n");
+        if (check_req_msi(pdev, 1) && check_req_msix(pdev, 1)) {
+                dev_dbg(&pdev->dev, "rtas_msi: no req#msi/x, nothing to do.\n");
                 return;
         }
 
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index 5e1ed3d60ee5..ad152a0e3946 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -137,11 +137,9 @@ EXPORT_SYMBOL_GPL(pcibios_add_pci_devices);
 struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
 {
         struct pci_controller *phb;
-        int primary;
 
         pr_debug("PCI: Initializing new hotplug PHB %s\n", dn->full_name);
 
-        primary = list_empty(&hose_list);
         phb = pcibios_alloc_controller(dn);
         if (!phb)
                 return NULL;
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h
index d967c1893ab5..a24a6b2333b2 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -43,6 +43,16 @@ static inline long register_slb_shadow(unsigned long cpu, unsigned long vpa)
         return vpa_call(0x3, cpu, vpa);
 }
 
+static inline long unregister_dtl(unsigned long cpu, unsigned long vpa)
+{
+        return vpa_call(0x6, cpu, vpa);
+}
+
+static inline long register_dtl(unsigned long cpu, unsigned long vpa)
+{
+        return vpa_call(0x2, cpu, vpa);
+}
+
 static inline long plpar_page_set_loaned(unsigned long vpa)
 {
         unsigned long cmo_page_sz = cmo_get_page_size();
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index c591a25b0b0d..b6f1b137d427 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -468,9 +468,13 @@ static int do_update_property(char *buf, size_t bufsize)
 
                 rc = blocking_notifier_call_chain(&pSeries_reconfig_chain,
                                                   action, value);
+                if (rc == NOTIFY_BAD) {
+                        rc = prom_update_property(np, oldprop, newprop);
+                        return -ENOMEM;
+                }
         }
 
-        return rc;
+        return 0;
 }
 
 /**
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 490473ce8103..82424cd7e128 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -119,7 +119,6 @@ static irqreturn_t cpm_error_interrupt(int irq, void *dev)
 
 static struct irqaction cpm_error_irqaction = {
         .handler = cpm_error_interrupt,
-        .mask = CPU_MASK_NONE,
         .name = "error",
 };
 
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c
index f1c3395633b9..fd969f0e3121 100644
--- a/arch/powerpc/sysdev/cpm2.c
+++ b/arch/powerpc/sysdev/cpm2.c
@@ -52,6 +52,7 @@ cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
  * the communication processor devices.
  */
 cpm2_map_t __iomem *cpm2_immr;
+EXPORT_SYMBOL(cpm2_immr);
 
 #define CPM_MAP_SIZE    (0x40000)       /* 256k - the PQ3 reserve this amount
                                            of space for CPM as it is larger
@@ -129,7 +130,8 @@ void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src)
                 brg -= 4;
         }
         bp += brg;
-        val = (((clk / rate) - 1) << 1) | CPM_BRG_EN | src;
+        /* Round the clock divider to the nearest integer. */
+        val = (((clk * 2 / rate) - 1) & ~1) | CPM_BRG_EN | src;
         if (div16)
                 val |= CPM_BRG_DIV16;
 
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index 00d3d17c84a3..e4b6d66d93de 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -56,7 +56,7 @@ void __init udbg_init_cpm(void)
 {
         if (cpm_udbg_txdesc) {
 #ifdef CONFIG_CPM2
-                setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO);
+                setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG);
 #endif
                 udbg_putc = udbg_putc_cpm;
         }
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 9817f63723dd..78021d8afc53 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,12 +1,16 @@
 /*
  * MPC83xx/85xx/86xx PCI/PCIE support routing.
  *
- * Copyright 2007,2008 Freescale Semiconductor, Inc
+ * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2009 MontaVista Software, Inc.
  *
  * Initial author: Xianghua Xiao <x.xiao@freescale.com>
  * Recode: ZHANG WEI <wei.zhang@freescale.com>
  * Rewrite the routing for Frescale PCI and PCI Express
  *      Roy Zang <tie-fei.zang@freescale.com>
+ * MPC83xx PCI-Express support:
+ *      Tony Li <tony.li@freescale.com>
+ *      Anton Vorontsov <avorontsov@ru.mvista.com>
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -27,6 +31,29 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
 
+static int fsl_pcie_bus_fixup;
+
+static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
+{
+        /* if we aren't a PCIe don't bother */
+        if (!pci_find_capability(dev, PCI_CAP_ID_EXP))
+                return;
+
+        dev->class = PCI_CLASS_BRIDGE_PCI << 8;
+        fsl_pcie_bus_fixup = 1;
+        return;
+}
+
+static int __init fsl_pcie_check_link(struct pci_controller *hose)
+{
+        u32 val;
+
+        early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
+        if (val < PCIE_LTSSM_L0)
+                return 1;
+        return 0;
+}
+
 #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
 static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
         unsigned int index, const struct resource *res,
@@ -159,28 +186,6 @@ static void __init setup_pci_pcsrbar(struct pci_controller *hose)
 #endif
 }
 
-static int fsl_pcie_bus_fixup;
-
-static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
-{
-        /* if we aren't a PCIe don't bother */
-        if (!pci_find_capability(dev, PCI_CAP_ID_EXP))
-                return ;
-
-        dev->class = PCI_CLASS_BRIDGE_PCI << 8;
-        fsl_pcie_bus_fixup = 1;
-        return ;
-}
-
-static int __init fsl_pcie_check_link(struct pci_controller *hose)
-{
-        u32 val;
-        early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
-        if (val < PCIE_LTSSM_L0)
-                return 1;
-        return 0;
-}
-
 void fsl_pcibios_fixup_bus(struct pci_bus *bus)
 {
         struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
@@ -294,8 +299,184 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
 #endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
 
 #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8377E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8377, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8378E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8378, quirk_fsl_pcie_header);
+
+struct mpc83xx_pcie_priv {
+        void __iomem *cfg_type0;
+        void __iomem *cfg_type1;
+        u32 dev_base;
+};
+
+/*
+ * With the convention of u-boot, the PCIE outbound window 0 serves
+ * as configuration transactions outbound.
+ */
+#define PEX_OUTWIN0_BAR         0xCA4
+#define PEX_OUTWIN0_TAL         0xCA8
+#define PEX_OUTWIN0_TAH         0xCAC
+
+static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn)
+{
+        struct pci_controller *hose = bus->sysdata;
+
+        if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+        /*
+         * Workaround for the HW bug: for Type 0 configure transactions the
+         * PCI-E controller does not check the device number bits and just
+         * assumes that the device number bits are 0.
+         */
+        if (bus->number == hose->first_busno ||
+                        bus->primary == hose->first_busno) {
+                if (devfn & 0xf8)
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+        }
+
+        if (ppc_md.pci_exclude_device) {
+                if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
+                        return PCIBIOS_DEVICE_NOT_FOUND;
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus,
+                                            unsigned int devfn, int offset)
+{
+        struct pci_controller *hose = bus->sysdata;
+        struct mpc83xx_pcie_priv *pcie = hose->dn->data;
+        u8 bus_no = bus->number - hose->first_busno;
+        u32 dev_base = bus_no << 24 | devfn << 16;
+        int ret;
+
+        ret = mpc83xx_pcie_exclude_device(bus, devfn);
+        if (ret)
+                return NULL;
+
+        offset &= 0xfff;
+
+        /* Type 0 */
+        if (bus->number == hose->first_busno)
+                return pcie->cfg_type0 + offset;
+
+        if (pcie->dev_base == dev_base)
+                goto mapped;
+
+        out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, dev_base);
+
+        pcie->dev_base = dev_base;
+mapped:
+        return pcie->cfg_type1 + offset;
+}
+
+static int mpc83xx_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
+                                    int offset, int len, u32 *val)
+{
+        void __iomem *cfg_addr;
+
+        cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset);
+        if (!cfg_addr)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        switch (len) {
+        case 1:
+                *val = in_8(cfg_addr);
+                break;
+        case 2:
+                *val = in_le16(cfg_addr);
+                break;
+        default:
+                *val = in_le32(cfg_addr);
+                break;
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
+                                     int offset, int len, u32 val)
+{
+        void __iomem *cfg_addr;
+
+        cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset);
+        if (!cfg_addr)
+                return PCIBIOS_DEVICE_NOT_FOUND;
+
+        switch (len) {
+        case 1:
+                out_8(cfg_addr, val);
+                break;
+        case 2:
+                out_le16(cfg_addr, val);
+                break;
+        default:
+                out_le32(cfg_addr, val);
+                break;
+        }
+
+        return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops mpc83xx_pcie_ops = {
+        .read = mpc83xx_pcie_read_config,
+        .write = mpc83xx_pcie_write_config,
+};
+
+static int __init mpc83xx_pcie_setup(struct pci_controller *hose,
+                                     struct resource *reg)
+{
+        struct mpc83xx_pcie_priv *pcie;
+        u32 cfg_bar;
+        int ret = -ENOMEM;
+
+        pcie = zalloc_maybe_bootmem(sizeof(*pcie), GFP_KERNEL);
+        if (!pcie)
+                return ret;
+
+        pcie->cfg_type0 = ioremap(reg->start, resource_size(reg));
+        if (!pcie->cfg_type0)
+                goto err0;
+
+        cfg_bar = in_le32(pcie->cfg_type0 + PEX_OUTWIN0_BAR);
+        if (!cfg_bar) {
+                /* PCI-E isn't configured. */
+                ret = -ENODEV;
+                goto err1;
+        }
+
+        pcie->cfg_type1 = ioremap(cfg_bar, 0x1000);
+        if (!pcie->cfg_type1)
+                goto err1;
+
+        WARN_ON(hose->dn->data);
+        hose->dn->data = pcie;
+        hose->ops = &mpc83xx_pcie_ops;
+
+        out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAH, 0);
+        out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, 0);
+
+        if (fsl_pcie_check_link(hose))
+                hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
+
+        return 0;
+err1:
+        iounmap(pcie->cfg_type0);
+err0:
+        kfree(pcie);
+        return ret;
+
+}
+
 int __init mpc83xx_add_bridge(struct device_node *dev)
 {
+        int ret;
         int len;
         struct pci_controller *hose;
         struct resource rsrc_reg;
@@ -303,6 +484,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
         const int *bus_range;
         int primary;
 
+        if (!of_device_is_available(dev)) {
+                pr_warning("%s: disabled by the firmware.\n",
+                           dev->full_name);
+                return -ENODEV;
+        }
         pr_debug("Adding PCI host bridge %s\n", dev->full_name);
 
         /* Fetch host bridge registers address */
@@ -350,7 +536,14 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
         hose->first_busno = bus_range ? bus_range[0] : 0;
         hose->last_busno = bus_range ? bus_range[1] : 0xff;
 
-        setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0);
+        if (of_device_is_compatible(dev, "fsl,mpc8314-pcie")) {
+                ret = mpc83xx_pcie_setup(hose, &rsrc_reg);
+                if (ret)
+                        goto err0;
+        } else {
+                setup_indirect_pci(hose, rsrc_cfg.start,
+                                   rsrc_cfg.start + 4, 0);
+        }
 
         printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. "
                "Firmware bus number: %d->%d\n",
@@ -365,5 +558,8 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
         pci_process_bridge_OF_ranges(hose, dev, primary);
 
         return 0;
+err0:
+        pcibios_free_controller(hose);
+        return ret;
 }
 #endif /* CONFIG_PPC_83xx */
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 115cb16351fd..a01c89d3f9bd 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -22,6 +22,7 @@
 #include <linux/module.h>
 #include <linux/device.h>
 #include <linux/platform_device.h>
+#include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/phy.h>
 #include <linux/phy_fixed.h>
@@ -328,6 +329,9 @@ static int __init fsl_usb_of_init(void)
                 struct fsl_usb2_platform_data usb_data;
                 const unsigned char *prop = NULL;
 
+                if (!of_device_is_available(np))
+                        continue;
+
                 memset(&r, 0, sizeof(r));
                 memset(&usb_data, 0, sizeof(usb_data));
 
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 9a89cd3e80a2..a86d3ce01ead 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -568,8 +568,7 @@ static void ipic_ack_irq(unsigned int virq)
 
         spin_lock_irqsave(&ipic_lock, flags);
 
-        temp = ipic_read(ipic->regs, ipic_info[src].ack);
-        temp |= (1 << (31 - ipic_info[src].bit));
+        temp = 1 << (31 - ipic_info[src].bit);
         ipic_write(ipic->regs, ipic_info[src].ack, temp);
 
         /* mb() can't guarantee that ack is finished.  But it does finish
@@ -592,8 +591,7 @@ static void ipic_mask_irq_and_ack(unsigned int virq)
         temp &= ~(1 << (31 - ipic_info[src].bit));
         ipic_write(ipic->regs, ipic_info[src].mask, temp);
 
-        temp = ipic_read(ipic->regs, ipic_info[src].ack);
-        temp |= (1 << (31 - ipic_info[src].bit));
+        temp = 1 << (31 - ipic_info[src].bit);
         ipic_write(ipic->regs, ipic_info[src].ack, temp);
 
         /* mb() can't guarantee that ack is finished.  But it does finish
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index f84217b8863a..5a32cbef9b6c 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -141,7 +141,7 @@ void msi_bitmap_free(struct msi_bitmap *bmp)
 #define check(x)        \
         if (!(x)) printk("msi_bitmap: test failed at line %d\n", __LINE__);
 
-void test_basics(void)
+void __init test_basics(void)
 {
         struct msi_bitmap bmp;
         int i, size = 512;
@@ -186,7 +186,7 @@ void test_basics(void)
         kfree(bmp.bitmap);
 }
 
-void test_of_node(void)
+void __init test_of_node(void)
 {
         u32 prop_data[] = { 10, 10, 25, 3, 40, 1, 100, 100, 200, 20 };
         const char *expected_str = "0-9,20-24,28-39,41-99,220-255";
@@ -234,7 +234,7 @@ void test_of_node(void)
         kfree(bmp.bitmap);
 }
 
-int msi_bitmap_selftest(void)
+int __init msi_bitmap_selftest(void)
 {
         printk(KERN_DEBUG "Running MSI bitmap self-tests ...\n");
 
diff --git a/arch/powerpc/sysdev/pmi.c b/arch/powerpc/sysdev/pmi.c
index c858749263e0..aaa915998eb6 100644
--- a/arch/powerpc/sysdev/pmi.c
+++ b/arch/powerpc/sysdev/pmi.c
@@ -50,7 +50,7 @@ struct pmi_data {
 
 static struct pmi_data *data;
 
-static int pmi_irq_handler(int irq, void *dev_id)
+static irqreturn_t pmi_irq_handler(int irq, void *dev_id)
 {
         u8 type;
         int rc;
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 5558d932b4d5..6a2d473c345a 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1839,6 +1839,8 @@ static int __init ppc4xx_pci_find_bridges(void)
 {
         struct device_node *np;
 
+        ppc_pci_flags |= PPC_PCI_ENABLE_PROC_DOMAINS | PPC_PCI_COMPAT_DOMAIN_0;
+
 #ifdef CONFIG_PPC4xx_PCI_EXPRESS
         for_each_compatible_node(np, NULL, "ibm,plb-pciex")
                 ppc4xx_probe_pciex_bridge(np);
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index a64e38841c49..e27655b8a98d 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -310,7 +310,8 @@ static struct platform_device camera_device = {
 
 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
         .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
-        SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
+        SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_HIGH | SOCAM_MASTER |
+        SOCAM_DATAWIDTH_8,
 };
 
 static struct resource ceu_resources[] = {
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index bc35b4cae6b3..4fd6a727873c 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -352,8 +352,9 @@ static int tw9910_power(struct device *dev, int mode)
 }
 
 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
-        .flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \
-        | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH,
+        .flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING
+        | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH
+        | SOCAM_DATA_ACTIVE_HIGH,
 };
 
 static struct resource migor_ceu_resources[] = {
diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h
index 066f0fba590e..a3f239545897 100644
--- a/arch/sh/include/asm/topology.h
+++ b/arch/sh/include/asm/topology.h
@@ -33,7 +33,6 @@
 
 #define node_to_cpumask(node)   ((void)node, cpu_online_map)
 #define cpumask_of_node(node)   ((void)node, cpu_online_mask)
-#define node_to_first_cpu(node) ((void)(node),0)
 
 #define pcibus_to_node(bus)     ((void)(bus), -1)
 #define pcibus_to_cpumask(bus)  (pcibus_to_node(bus) == -1 ? \
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
index 59d2a03e8b3c..988c77c37231 100644
--- a/arch/sh/kernel/time_64.c
+++ b/arch/sh/kernel/time_64.c
@@ -284,7 +284,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
 static struct irqaction irq0  = {
         .handler = timer_interrupt,
         .flags = IRQF_DISABLED,
-        .mask = CPU_MASK_NONE,
         .name = "timer",
 };
 
diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c
index c127293271e1..9aa348658ae3 100644
--- a/arch/sh/kernel/timers/timer-cmt.c
+++ b/arch/sh/kernel/timers/timer-cmt.c
@@ -109,7 +109,6 @@ static struct irqaction cmt_irq = {
         .name           = "timer",
         .handler        = cmt_timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .mask           = CPU_MASK_NONE,
 };
 
 static void cmt_clk_init(struct clk *clk)
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
index 9a77ae86b403..9b0ef0126479 100644
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ b/arch/sh/kernel/timers/timer-mtu2.c
@@ -115,7 +115,6 @@ static struct irqaction mtu2_irq = {
         .name           = "timer",
         .handler        = mtu2_timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .mask           = CPU_MASK_NONE,
 };
 
 static unsigned int divisors[] = { 1, 4, 16, 64, 1, 1, 256 };
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 10b5a6f17cc0..c5d3396f5960 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -162,7 +162,6 @@ static struct irqaction tmu0_irq = {
         .name           = "periodic/oneshot timer",
         .handler        = tmu_timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .mask           = CPU_MASK_NONE,
 };
 
 static void __init tmu_clk_init(struct clk *clk)
diff --git a/arch/sparc/include/asm/mmu_context_64.h b/arch/sparc/include/asm/mmu_context_64.h
index 5693ab482606..666a73fef28d 100644
--- a/arch/sparc/include/asm/mmu_context_64.h
+++ b/arch/sparc/include/asm/mmu_context_64.h
@@ -121,8 +121,8 @@ static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, str
          * local TLB.
          */
         cpu = smp_processor_id();
-        if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) {
-                cpu_set(cpu, mm->cpu_vm_mask);
+        if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) {
+                cpumask_set_cpu(cpu, mm_cpumask(mm));
                 __flush_tlb_mm(CTX_HWBITS(mm->context),
                                SECONDARY_CONTEXT);
         }
@@ -141,8 +141,8 @@ static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm
         if (!CTX_VALID(mm->context))
                 get_new_mmu_context(mm);
         cpu = smp_processor_id();
-        if (!cpu_isset(cpu, mm->cpu_vm_mask))
-                cpu_set(cpu, mm->cpu_vm_mask);
+        if (!cpumask_test_cpu(cpu, mm_cpumask(mm)))
+                cpumask_set_cpu(cpu, mm_cpumask(mm));
 
         load_secondary_context(mm);
         __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT);
diff --git a/arch/sparc/include/asm/smp_64.h b/arch/sparc/include/asm/smp_64.h
index 57224dd37b3a..becb6bf353a9 100644
--- a/arch/sparc/include/asm/smp_64.h
+++ b/arch/sparc/include/asm/smp_64.h
@@ -35,7 +35,8 @@ extern cpumask_t cpu_core_map[NR_CPUS];
 extern int sparc64_multi_core;
 
 extern void arch_send_call_function_single_ipi(int cpu);
-extern void arch_send_call_function_ipi(cpumask_t mask);
+extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
+#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
 
 /*
  *      General functions that each host system must provide.
diff --git a/arch/sparc/include/asm/system_32.h b/arch/sparc/include/asm/system_32.h
index 79c1ae2b42a3..751c8c17f5a0 100644
--- a/arch/sparc/include/asm/system_32.h
+++ b/arch/sparc/include/asm/system_32.h
@@ -126,7 +126,7 @@ extern void flushw_all(void);
 #define switch_to(prev, next, last) do {                                                \
         SWITCH_ENTER(prev);                                                             \
         SWITCH_DO_LAZY_FPU(next);                                                       \
-        cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask);                      \
+        cpumask_set_cpu(smp_processor_id(), mm_cpumask(next->active_mm));               \
         __asm__ __volatile__(                                                           \
         "sethi  %%hi(here - 0x8), %%o7\n\t"                                             \
         "mov    %%g6, %%g3\n\t"                                                         \
diff --git a/arch/sparc/include/asm/topology_64.h b/arch/sparc/include/asm/topology_64.h
index 5bc0b8fd6374..e5ea8d332421 100644
--- a/arch/sparc/include/asm/topology_64.h
+++ b/arch/sparc/include/asm/topology_64.h
@@ -28,11 +28,6 @@ static inline cpumask_t node_to_cpumask(int node)
 #define node_to_cpumask_ptr_next(v, node)       \
                            v = &(numa_cpumask_lookup_table[node])
 
-static inline int node_to_first_cpu(int node)
-{
-        return cpumask_first(cpumask_of_node(node));
-}
-
 struct pci_bus;
 #ifdef CONFIG_PCI
 extern int pcibus_to_node(struct pci_bus *pbus);
@@ -43,13 +38,9 @@ static inline int pcibus_to_node(struct pci_bus *pbus)
 }
 #endif
 
-#define pcibus_to_cpumask(bus)  \
-        (pcibus_to_node(bus) == -1 ? \
-         CPU_MASK_ALL : \
-         node_to_cpumask(pcibus_to_node(bus)))
 #define cpumask_of_pcibus(bus)  \
         (pcibus_to_node(bus) == -1 ? \
-         CPU_MASK_ALL_PTR : \
+         cpu_all_mask : \
          cpumask_of_node(pcibus_to_node(bus)))
 
 #define SD_NODE_INIT (struct sched_domain) {            \
@@ -89,7 +80,6 @@ static inline int pcibus_to_node(struct pci_bus *pbus)
 #define smt_capable()                           (sparc64_multi_core)
 #endif /* CONFIG_SMP */
 
-#define cpu_coregroup_map(cpu)                  (cpu_core_map[cpu])
 #define cpu_coregroup_mask(cpu)                 (&cpu_core_map[cpu])
 
 #endif /* _ASM_SPARC64_TOPOLOGY_H */
diff --git a/arch/sparc/kernel/ds.c b/arch/sparc/kernel/ds.c
index 57c39843fb2a..90350f838f05 100644
--- a/arch/sparc/kernel/ds.c
+++ b/arch/sparc/kernel/ds.c
@@ -653,7 +653,7 @@ static void __cpuinit dr_cpu_data(struct ds_info *dp,
                 if (cpu_list[i] == CPU_SENTINEL)
                         continue;
 
-                if (cpu_list[i] < NR_CPUS)
+                if (cpu_list[i] < nr_cpu_ids)
                         cpu_set(cpu_list[i], mask);
         }
 
diff --git a/arch/sparc/kernel/irq_32.c b/arch/sparc/kernel/irq_32.c
index 44dd5ee64339..ad800b80c718 100644
--- a/arch/sparc/kernel/irq_32.c
+++ b/arch/sparc/kernel/irq_32.c
@@ -439,7 +439,6 @@ static int request_fast_irq(unsigned int irq,
         flush_cache_all();
 
         action->flags = irqflags;
-        cpus_clear(action->mask);
         action->name = devname;
         action->dev_id = NULL;
         action->next = NULL;
@@ -574,7 +573,6 @@ int request_irq(unsigned int irq,
 
         action->handler = handler;
         action->flags = irqflags;
-        cpus_clear(action->mask);
         action->name = devname;
         action->next = NULL;
         action->dev_id = dev_id;
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index d0d6a515499a..5deabe921a47 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -266,12 +266,12 @@ static int irq_choose_cpu(unsigned int virt_irq)
                 spin_lock_irqsave(&irq_rover_lock, flags);
 
                 while (!cpu_online(irq_rover)) {
-                        if (++irq_rover >= NR_CPUS)
+                        if (++irq_rover >= nr_cpu_ids)
                                 irq_rover = 0;
                 }
                 cpuid = irq_rover;
                 do {
-                        if (++irq_rover >= NR_CPUS)
+                        if (++irq_rover >= nr_cpu_ids)
                                 irq_rover = 0;
                 } while (!cpu_online(irq_rover));
 
diff --git a/arch/sparc/kernel/led.c b/arch/sparc/kernel/led.c
index adaaed4ea2fb..00d034ea2164 100644
--- a/arch/sparc/kernel/led.c
+++ b/arch/sparc/kernel/led.c
@@ -126,7 +126,6 @@ static int __init led_init(void)
         led = proc_create("led", 0, NULL, &led_proc_fops);
         if (!led)
                 return -ENOMEM;
-        led->owner = THIS_MODULE;
 
         printk(KERN_INFO
                "led: version %s, Lars Kotthoff <metalhead@metalhead.ws>\n",
diff --git a/arch/sparc/kernel/mdesc.c b/arch/sparc/kernel/mdesc.c
index 3f79f0c23a08..f0e6ed23a468 100644
--- a/arch/sparc/kernel/mdesc.c
+++ b/arch/sparc/kernel/mdesc.c
@@ -567,7 +567,7 @@ static void __init report_platform_properties(void)
                         max_cpu = NR_CPUS;
                 }
                 for (i = 0; i < max_cpu; i++)
-                        cpu_set(i, cpu_possible_map);
+                        set_cpu_possible(i, true);
         }
 #endif
 
diff --git a/arch/sparc/kernel/nmi.c b/arch/sparc/kernel/nmi.c
index f3577223c863..2c0cc72d295b 100644
--- a/arch/sparc/kernel/nmi.c
+++ b/arch/sparc/kernel/nmi.c
@@ -13,6 +13,7 @@
 #include <linux/module.h>
 #include <linux/kprobes.h>
 #include <linux/kernel_stat.h>
+#include <linux/reboot.h>
 #include <linux/slab.h>
 #include <linux/kdebug.h>
 #include <linux/delay.h>
@@ -206,13 +207,33 @@ void nmi_adjust_hz(unsigned int new_hz)
 }
 EXPORT_SYMBOL_GPL(nmi_adjust_hz);
 
+static int nmi_shutdown(struct notifier_block *nb, unsigned long cmd, void *p)
+{
+        on_each_cpu(stop_watchdog, NULL, 1);
+        return 0;
+}
+
+static struct notifier_block nmi_reboot_notifier = {
+        .notifier_call = nmi_shutdown,
+};
+
 int __init nmi_init(void)
 {
+        int err;
+
         nmi_usable = 1;
 
         on_each_cpu(start_watchdog, NULL, 1);
 
-        return check_nmi_watchdog();
+        err = check_nmi_watchdog();
+        if (!err) {
+                err = register_reboot_notifier(&nmi_reboot_notifier);
+                if (err) {
+                        nmi_usable = 0;
+                        on_each_cpu(stop_watchdog, NULL, 1);
+                }
+        }
+        return err;
 }
 
 static int __init setup_nmi_watchdog(char *str)
diff --git a/arch/sparc/kernel/prom_64.c b/arch/sparc/kernel/prom_64.c
index edecca7b8116..ca55c7012f77 100644
--- a/arch/sparc/kernel/prom_64.c
+++ b/arch/sparc/kernel/prom_64.c
@@ -518,8 +518,8 @@ void __init of_fill_in_cpu_data(void)
                 }
 
 #ifdef CONFIG_SMP
-                cpu_set(cpuid, cpu_present_map);
-                cpu_set(cpuid, cpu_possible_map);
+                set_cpu_present(cpuid, true);
+                set_cpu_possible(cpuid, true);
 #endif
         }
 
diff --git a/arch/sparc/kernel/smp_32.c b/arch/sparc/kernel/smp_32.c
index 1e5ac4e282e1..132d81fb2616 100644
--- a/arch/sparc/kernel/smp_32.c
+++ b/arch/sparc/kernel/smp_32.c
@@ -70,13 +70,12 @@ void __init smp_cpus_done(unsigned int max_cpus)
         extern void smp4m_smp_done(void);
         extern void smp4d_smp_done(void);
         unsigned long bogosum = 0;
-        int cpu, num;
+        int cpu, num = 0;
 
-        for (cpu = 0, num = 0; cpu < NR_CPUS; cpu++)
-                if (cpu_online(cpu)) {
-                        num++;
-                        bogosum += cpu_data(cpu).udelay_val;
-                }
+        for_each_online_cpu(cpu) {
+                num++;
+                bogosum += cpu_data(cpu).udelay_val;
+        }
 
         printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
                 num, bogosum/(500000/HZ),
@@ -144,7 +143,7 @@ void smp_flush_tlb_all(void)
 void smp_flush_cache_mm(struct mm_struct *mm)
 {
         if(mm->context != NO_CONTEXT) {
-                cpumask_t cpu_mask = mm->cpu_vm_mask;
+                cpumask_t cpu_mask = *mm_cpumask(mm);
                 cpu_clear(smp_processor_id(), cpu_mask);
                 if (!cpus_empty(cpu_mask))
                         xc1((smpfunc_t) BTFIXUP_CALL(local_flush_cache_mm), (unsigned long) mm);
@@ -155,12 +154,13 @@ void smp_flush_cache_mm(struct mm_struct *mm)
 void smp_flush_tlb_mm(struct mm_struct *mm)
 {
         if(mm->context != NO_CONTEXT) {
-                cpumask_t cpu_mask = mm->cpu_vm_mask;
+                cpumask_t cpu_mask = *mm_cpumask(mm);
                 cpu_clear(smp_processor_id(), cpu_mask);
                 if (!cpus_empty(cpu_mask)) {
                         xc1((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_mm), (unsigned long) mm);
                         if(atomic_read(&mm->mm_users) == 1 && current->active_mm == mm)
-                                mm->cpu_vm_mask = cpumask_of_cpu(smp_processor_id());
+                                cpumask_copy(mm_cpumask(mm),
+                                             cpumask_of(smp_processor_id()));
                 }
                 local_flush_tlb_mm(mm);
         }
@@ -172,7 +172,7 @@ void smp_flush_cache_range(struct vm_area_struct *vma, unsigned long start,
         struct mm_struct *mm = vma->vm_mm;
 
         if (mm->context != NO_CONTEXT) {
-                cpumask_t cpu_mask = mm->cpu_vm_mask;
+                cpumask_t cpu_mask = *mm_cpumask(mm);
                 cpu_clear(smp_processor_id(), cpu_mask);
                 if (!cpus_empty(cpu_mask))
                         xc3((smpfunc_t) BTFIXUP_CALL(local_flush_cache_range), (unsigned long) vma, start, end);
@@ -186,7 +186,7 @@ void smp_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
         struct mm_struct *mm = vma->vm_mm;
 
         if (mm->context != NO_CONTEXT) {
-                cpumask_t cpu_mask = mm->cpu_vm_mask;
+                cpumask_t cpu_mask = *mm_cpumask(mm);
                 cpu_clear(smp_processor_id(), cpu_mask);
                 if (!cpus_empty(cpu_mask))
                         xc3((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_range), (unsigned long) vma, start, end);
@@ -199,7 +199,7 @@ void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page)
         struct mm_struct *mm = vma->vm_mm;
 
         if(mm->context != NO_CONTEXT) {
-                cpumask_t cpu_mask = mm->cpu_vm_mask;
+                cpumask_t cpu_mask = *mm_cpumask(mm);
                 cpu_clear(smp_processor_id(), cpu_mask);
                 if (!cpus_empty(cpu_mask))
                         xc2((smpfunc_t) BTFIXUP_CALL(local_flush_cache_page), (unsigned long) vma, page);
@@ -212,7 +212,7 @@ void smp_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
         struct mm_struct *mm = vma->vm_mm;
 
         if(mm->context != NO_CONTEXT) {
-                cpumask_t cpu_mask = mm->cpu_vm_mask;
+                cpumask_t cpu_mask = *mm_cpumask(mm);
                 cpu_clear(smp_processor_id(), cpu_mask);
                 if (!cpus_empty(cpu_mask))
                         xc2((smpfunc_t) BTFIXUP_CALL(local_flush_tlb_page), (unsigned long) vma, page);
@@ -241,7 +241,7 @@ void smp_flush_page_to_ram(unsigned long page)
 
 void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr)
 {
-        cpumask_t cpu_mask = mm->cpu_vm_mask;
+        cpumask_t cpu_mask = *mm_cpumask(mm);
         cpu_clear(smp_processor_id(), cpu_mask);
         if (!cpus_empty(cpu_mask))
                 xc2((smpfunc_t) BTFIXUP_CALL(local_flush_sig_insns), (unsigned long) mm, insn_addr);
@@ -332,8 +332,8 @@ void __init smp_setup_cpu_possible_map(void)
         instance = 0;
         while (!cpu_find_by_instance(instance, NULL, &mid)) {
                 if (mid < NR_CPUS) {
-                        cpu_set(mid, cpu_possible_map);
-                        cpu_set(mid, cpu_present_map);
+                        set_cpu_possible(mid, true);
+                        set_cpu_present(mid, true);
                 }
                 instance++;
         }
@@ -351,8 +351,8 @@ void __init smp_prepare_boot_cpu(void)
                 printk("boot cpu id != 0, this could work but is untested\n");
 
         current_thread_info()->cpu = cpuid;
-        cpu_set(cpuid, cpu_online_map);
-        cpu_set(cpuid, cpu_possible_map);
+        set_cpu_online(cpuid, true);
+        set_cpu_possible(cpuid, true);
 }
 
 int __cpuinit __cpu_up(unsigned int cpu)
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 79457f682b5a..708e12a26b05 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -808,9 +808,9 @@ static void smp_start_sync_tick_client(int cpu)
 
 extern unsigned long xcall_call_function;
 
-void arch_send_call_function_ipi(cpumask_t mask)
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 {
-        xcall_deliver((u64) &xcall_call_function, 0, 0, &mask);
+        xcall_deliver((u64) &xcall_call_function, 0, 0, mask);
 }
 
 extern unsigned long xcall_call_function_single;
@@ -850,7 +850,7 @@ static void tsb_sync(void *info)
 
 void smp_tsb_sync(struct mm_struct *mm)
 {
-        smp_call_function_mask(mm->cpu_vm_mask, tsb_sync, mm, 1);
+        smp_call_function_many(mm_cpumask(mm), tsb_sync, mm, 1);
 }
 
 extern unsigned long xcall_flush_tlb_mm;
@@ -1055,13 +1055,13 @@ void smp_flush_tlb_mm(struct mm_struct *mm)
         int cpu = get_cpu();
 
         if (atomic_read(&mm->mm_users) == 1) {
-                mm->cpu_vm_mask = cpumask_of_cpu(cpu);
+                cpumask_copy(mm_cpumask(mm), cpumask_of(cpu));
                 goto local_flush_and_out;
         }
 
         smp_cross_call_masked(&xcall_flush_tlb_mm,
                               ctx, 0, 0,
-                              &mm->cpu_vm_mask);
+                              mm_cpumask(mm));
 
 local_flush_and_out:
         __flush_tlb_mm(ctx, SECONDARY_CONTEXT);
@@ -1075,11 +1075,11 @@ void smp_flush_tlb_pending(struct mm_struct *mm, unsigned long nr, unsigned long
         int cpu = get_cpu();
 
         if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
-                mm->cpu_vm_mask = cpumask_of_cpu(cpu);
+                cpumask_copy(mm_cpumask(mm), cpumask_of(cpu));
         else
                 smp_cross_call_masked(&xcall_flush_tlb_pending,
                                       ctx, nr, (unsigned long) vaddrs,
-                                      &mm->cpu_vm_mask);
+                                      mm_cpumask(mm));
 
         __flush_tlb_pending(ctx, nr, vaddrs);
 
diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c
index 3369fef5b4b3..ab036a72de5a 100644
--- a/arch/sparc/kernel/sun4d_irq.c
+++ b/arch/sparc/kernel/sun4d_irq.c
@@ -326,7 +326,6 @@ int sun4d_request_irq(unsigned int irq,
 
         action->handler = handler;
         action->flags = irqflags;
-        cpus_clear(action->mask);
         action->name = devname;
         action->next = NULL;
         action->dev_id = dev_id;
diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c
index 50afaed99c8a..54fb02468f0d 100644
--- a/arch/sparc/kernel/sun4d_smp.c
+++ b/arch/sparc/kernel/sun4d_smp.c
@@ -150,7 +150,7 @@ void __cpuinit smp4d_callin(void)
         spin_lock_irqsave(&sun4d_imsk_lock, flags);
         cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
         spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
-        cpu_set(cpuid, cpu_online_map);
+        set_cpu_online(cpuid, true);
 
 }
 
@@ -228,11 +228,10 @@ void __init smp4d_smp_done(void)
         /* setup cpu list for irq rotation */
         first = 0;
         prev = &first;
-        for (i = 0; i < NR_CPUS; i++)
-                if (cpu_online(i)) {
-                        *prev = i;
-                        prev = &cpu_data(i).next;
-                }
+        for_each_online_cpu(i) {
+                *prev = i;
+                prev = &cpu_data(i).next;
+        }
         *prev = first;
         local_flush_cache_all();
 
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c
index 8040376c4890..960b113d0006 100644
--- a/arch/sparc/kernel/sun4m_smp.c
+++ b/arch/sparc/kernel/sun4m_smp.c
@@ -113,7 +113,7 @@ void __cpuinit smp4m_callin(void)
 
         local_irq_enable();
 
-        cpu_set(cpuid, cpu_online_map);
+        set_cpu_online(cpuid, true);
 }
 
 /*
@@ -186,11 +186,9 @@ void __init smp4m_smp_done(void)
         /* setup cpu list for irq rotation */
         first = 0;
         prev = &first;
-        for (i = 0; i < NR_CPUS; i++) {
-                if (cpu_online(i)) {
-                        *prev = i;
-                        prev = &cpu_data(i).next;
-                }
+        for_each_online_cpu(i) {
+                *prev = i;
+                prev = &cpu_data(i).next;
         }
         *prev = first;
         local_flush_cache_all();
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 00373ce2d8fb..2c8dfeb7ab04 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -1092,7 +1092,7 @@ static void __init numa_parse_mdesc_group_cpus(struct mdesc_handle *md,
                 if (strcmp(name, "cpu"))
                         continue;
                 id = mdesc_get_property(md, target, "id", NULL);
-                if (*id < NR_CPUS)
+                if (*id < nr_cpu_ids)
                         cpu_set(*id, *mask);
         }
 }
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index fe7ed08390bb..06c9a7d98206 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -1425,7 +1425,7 @@ static void __init init_vac_layout(void)
                                 min_line_size = vac_line_size;
                         //FIXME: cpus not contiguous!!
                         cpu++;
-                        if (cpu >= NR_CPUS || !cpu_online(cpu))
+                        if (cpu >= nr_cpu_ids || !cpu_online(cpu))
                                 break;
 #else
                         break;
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 06c02c00d7d9..45161b816313 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -40,6 +40,7 @@ config X86
         select HAVE_GENERIC_DMA_COHERENT if X86_32
         select HAVE_EFFICIENT_UNALIGNED_ACCESS
         select USER_STACKTRACE_SUPPORT
+        select HAVE_DMA_API_DEBUG
         select HAVE_KERNEL_GZIP
         select HAVE_KERNEL_BZIP2
         select HAVE_KERNEL_LZMA
@@ -786,6 +787,11 @@ config X86_MCE_AMD
            Additional support for AMD specific MCE features such as
            the DRAM Error Threshold.
 
+config X86_MCE_THRESHOLD
+        depends on X86_MCE_AMD || X86_MCE_INTEL
+        bool
+        default y
+
 config X86_MCE_NONFATAL
         tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
         depends on X86_32 && X86_MCE
@@ -929,6 +935,12 @@ config X86_CPUID
           with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
           /dev/cpu/31/cpuid.
 
+config X86_CPU_DEBUG
+        tristate "/sys/kernel/debug/x86/cpu/* - CPU Debug support"
+        ---help---
+          If you select this option, this will provide various x86 CPUs
+          information through debugfs.
+
 choice
         prompt "High Memory Support"
         default HIGHMEM4G if !X86_NUMAQ
@@ -1121,7 +1133,7 @@ config NUMA_EMU
 
 config NODES_SHIFT
         int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
-        range 1 9   if X86_64
+        range 1 9
         default "9" if MAXSMP
         default "6" if X86_64
         default "4" if X86_NUMAQ
@@ -1429,7 +1441,7 @@ config CRASH_DUMP
 config KEXEC_JUMP
         bool "kexec jump (EXPERIMENTAL)"
         depends on EXPERIMENTAL
-        depends on KEXEC && HIBERNATION && X86_32
+        depends on KEXEC && HIBERNATION
         ---help---
           Jump between original kernel and kexeced kernel and invoke
           code in physical address mode via KEXEC
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index a95eaf0e582a..924e156a85ab 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -456,24 +456,9 @@ config CPU_SUP_AMD
 
           If unsure, say N.
 
-config CPU_SUP_CENTAUR_32
+config CPU_SUP_CENTAUR
         default y
         bool "Support Centaur processors" if PROCESSOR_SELECT
-        depends on !64BIT
-        ---help---
-          This enables detection, tunings and quirks for Centaur processors
-
-          You need this enabled if you want your kernel to run on a
-          Centaur CPU. Disabling this option on other types of CPUs
-          makes the kernel a tiny bit smaller. Disabling it on a Centaur
-          CPU might render the kernel unbootable.
-
-          If unsure, say N.
-
-config CPU_SUP_CENTAUR_64
-        default y
-        bool "Support Centaur processors" if PROCESSOR_SELECT
-        depends on 64BIT
         ---help---
           This enables detection, tunings and quirks for Centaur processors
 
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 1836191839ee..f05d8c91d9e5 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -153,34 +153,23 @@ endif
 
 boot := arch/x86/boot
 
-PHONY += zImage bzImage compressed zlilo bzlilo \
-         zdisk bzdisk fdimage fdimage144 fdimage288 isoimage install
+BOOT_TARGETS = bzlilo bzdisk fdimage fdimage144 fdimage288 isoimage install
+
+PHONY += bzImage $(BOOT_TARGETS)
 
 # Default kernel to build
 all: bzImage
 
 # KBUILD_IMAGE specify target image being built
-                    KBUILD_IMAGE := $(boot)/bzImage
-zImage zlilo zdisk: KBUILD_IMAGE := $(boot)/zImage
+KBUILD_IMAGE := $(boot)/bzImage
 
-zImage bzImage: vmlinux
+bzImage: vmlinux
         $(Q)$(MAKE) $(build)=$(boot) $(KBUILD_IMAGE)
         $(Q)mkdir -p $(objtree)/arch/$(UTS_MACHINE)/boot
         $(Q)ln -fsn ../../x86/boot/bzImage $(objtree)/arch/$(UTS_MACHINE)/boot/$@
 
-compressed: zImage
-
-zlilo bzlilo: vmlinux
-        $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) zlilo
-
-zdisk bzdisk: vmlinux
-        $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) zdisk
-
-fdimage fdimage144 fdimage288 isoimage: vmlinux
-        $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) $@
-
-install:
-        $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) install
+$(BOOT_TARGETS): vmlinux
+        $(Q)$(MAKE) $(build)=$(boot) $@
 
 PHONY += vdso_install
 vdso_install:
@@ -205,7 +194,3 @@ define archhelp
   echo  '                  FDARGS="..."  arguments for the booted kernel'
   echo  '                  FDINITRD=file initrd for the booted kernel'
 endef
-
-CLEAN_FILES += arch/x86/boot/fdimage \
-               arch/x86/boot/image.iso \
-               arch/x86/boot/mtools.conf
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index c70eff69a1fb..fb737ce5888d 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -6,26 +6,24 @@
 # for more details.
 #
 # Copyright (C) 1994 by Linus Torvalds
+# Changed by many, many contributors over the years.
 #
 
 # ROOT_DEV specifies the default root-device when making the image.
 # This can be either FLOPPY, CURRENT, /dev/xxxx or empty, in which case
 # the default of FLOPPY is used by 'build'.
 
-ROOT_DEV := CURRENT
+ROOT_DEV        := CURRENT
 
 # If you want to preset the SVGA mode, uncomment the next line and
 # set SVGA_MODE to whatever number you want.
 # Set it to -DSVGA_MODE=NORMAL_VGA if you just want the EGA/VGA mode.
 # The number is the same as you would ordinarily press at bootup.
 
-SVGA_MODE := -DSVGA_MODE=NORMAL_VGA
+SVGA_MODE       := -DSVGA_MODE=NORMAL_VGA
 
-# If you want the RAM disk device, define this to be the size in blocks.
-
-#RAMDISK := -DRAMDISK=512
-
-targets         := vmlinux.bin setup.bin setup.elf zImage bzImage
+targets         := vmlinux.bin setup.bin setup.elf bzImage
+targets         += fdimage fdimage144 fdimage288 image.iso mtools.conf
 subdir-         := compressed
 
 setup-y         += a20.o cmdline.o copy.o cpu.o cpucheck.o edd.o
@@ -71,17 +69,13 @@ KBUILD_CFLAGS	:= $(LINUXINCLUDE) -g -Os -D_SETUP -D__KERNEL__ \
 KBUILD_CFLAGS +=   $(call cc-option,-m32)
 KBUILD_AFLAGS   := $(KBUILD_CFLAGS) -D__ASSEMBLY__
 
-$(obj)/zImage:  asflags-y := $(SVGA_MODE) $(RAMDISK)
-$(obj)/bzImage: ccflags-y := -D__BIG_KERNEL__
-$(obj)/bzImage: asflags-y := $(SVGA_MODE) $(RAMDISK) -D__BIG_KERNEL__
-$(obj)/bzImage: BUILDFLAGS   := -b
+$(obj)/bzImage: asflags-y  := $(SVGA_MODE)
 
 quiet_cmd_image = BUILD   $@
-cmd_image = $(obj)/tools/build $(BUILDFLAGS) $(obj)/setup.bin \
-            $(obj)/vmlinux.bin $(ROOT_DEV) > $@
+cmd_image = $(obj)/tools/build $(obj)/setup.bin $(obj)/vmlinux.bin \
+        $(ROOT_DEV) > $@
 
-$(obj)/zImage $(obj)/bzImage: $(obj)/setup.bin \
-                              $(obj)/vmlinux.bin $(obj)/tools/build FORCE
+$(obj)/bzImage: $(obj)/setup.bin $(obj)/vmlinux.bin $(obj)/tools/build FORCE
         $(call if_changed,image)
         @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
 
@@ -116,9 +110,11 @@ $(obj)/setup.bin: $(obj)/setup.elf FORCE
 $(obj)/compressed/vmlinux: FORCE
         $(Q)$(MAKE) $(build)=$(obj)/compressed $@
 
-# Set this if you want to pass append arguments to the zdisk/fdimage/isoimage kernel
+# Set this if you want to pass append arguments to the
+# bzdisk/fdimage/isoimage kernel
 FDARGS =
-# Set this if you want an initrd included with the zdisk/fdimage/isoimage kernel
+# Set this if you want an initrd included with the
+# bzdisk/fdimage/isoimage kernel
 FDINITRD =
 
 image_cmdline = default linux $(FDARGS) $(if $(FDINITRD),initrd=initrd.img,)
@@ -127,7 +123,7 @@ $(obj)/mtools.conf: $(src)/mtools.conf.in
         sed -e 's|@OBJ@|$(obj)|g' < $< > $@
 
 # This requires write access to /dev/fd0
-zdisk: $(BOOTIMAGE) $(obj)/mtools.conf
+bzdisk: $(obj)/bzImage $(obj)/mtools.conf
         MTOOLSRC=$(obj)/mtools.conf mformat a:                  ; sync
         syslinux /dev/fd0                                       ; sync
         echo '$(image_cmdline)' | \
@@ -135,10 +131,10 @@ zdisk: $(BOOTIMAGE) $(obj)/mtools.conf
         if [ -f '$(FDINITRD)' ] ; then \
                 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' a:initrd.img ; \
         fi
-        MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) a:linux  ; sync
+        MTOOLSRC=$(obj)/mtools.conf mcopy $(obj)/bzImage a:linux        ; sync
 
 # These require being root or having syslinux 2.02 or higher installed
-fdimage fdimage144: $(BOOTIMAGE) $(obj)/mtools.conf
+fdimage fdimage144: $(obj)/bzImage $(obj)/mtools.conf
         dd if=/dev/zero of=$(obj)/fdimage bs=1024 count=1440
         MTOOLSRC=$(obj)/mtools.conf mformat v:                  ; sync
         syslinux $(obj)/fdimage                                 ; sync
@@ -147,9 +143,9 @@ fdimage fdimage144: $(BOOTIMAGE) $(obj)/mtools.conf
         if [ -f '$(FDINITRD)' ] ; then \
                 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' v:initrd.img ; \
         fi
-        MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) v:linux  ; sync
+        MTOOLSRC=$(obj)/mtools.conf mcopy $(obj)/bzImage v:linux        ; sync
 
-fdimage288: $(BOOTIMAGE) $(obj)/mtools.conf
+fdimage288: $(obj)/bzImage $(obj)/mtools.conf
         dd if=/dev/zero of=$(obj)/fdimage bs=1024 count=2880
         MTOOLSRC=$(obj)/mtools.conf mformat w:                  ; sync
         syslinux $(obj)/fdimage                                 ; sync
@@ -158,9 +154,9 @@ fdimage288: $(BOOTIMAGE) $(obj)/mtools.conf
         if [ -f '$(FDINITRD)' ] ; then \
                 MTOOLSRC=$(obj)/mtools.conf mcopy '$(FDINITRD)' w:initrd.img ; \
         fi
-        MTOOLSRC=$(obj)/mtools.conf mcopy $(BOOTIMAGE) w:linux  ; sync
+        MTOOLSRC=$(obj)/mtools.conf mcopy $(obj)/bzImage w:linux        ; sync
 
-isoimage: $(BOOTIMAGE)
+isoimage: $(obj)/bzImage
         -rm -rf $(obj)/isoimage
         mkdir $(obj)/isoimage
         for i in lib lib64 share end ; do \
@@ -170,7 +166,7 @@ isoimage: $(BOOTIMAGE)
                 fi ; \
                 if [ $$i = end ] ; then exit 1 ; fi ; \
         done
-        cp $(BOOTIMAGE) $(obj)/isoimage/linux
+        cp $(obj)/bzImage $(obj)/isoimage/linux
         echo '$(image_cmdline)' > $(obj)/isoimage/isolinux.cfg
         if [ -f '$(FDINITRD)' ] ; then \
                 cp '$(FDINITRD)' $(obj)/isoimage/initrd.img ; \
@@ -181,12 +177,13 @@ isoimage: $(BOOTIMAGE)
         isohybrid $(obj)/image.iso 2>/dev/null || true
         rm -rf $(obj)/isoimage
 
-zlilo: $(BOOTIMAGE)
+bzlilo: $(obj)/bzImage
         if [ -f $(INSTALL_PATH)/vmlinuz ]; then mv $(INSTALL_PATH)/vmlinuz $(INSTALL_PATH)/vmlinuz.old; fi
         if [ -f $(INSTALL_PATH)/System.map ]; then mv $(INSTALL_PATH)/System.map $(INSTALL_PATH)/System.old; fi
-        cat $(BOOTIMAGE) > $(INSTALL_PATH)/vmlinuz
+        cat $(obj)/bzImage > $(INSTALL_PATH)/vmlinuz
         cp System.map $(INSTALL_PATH)/
         if [ -x /sbin/lilo ]; then /sbin/lilo; else /etc/lilo/install; fi
 
 install:
-        sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(BOOTIMAGE) System.map "$(INSTALL_PATH)"
+        sh $(srctree)/$(src)/install.sh $(KERNELRELEASE) $(obj)/bzImage \
+                System.map "$(INSTALL_PATH)"
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index 7ccff4884a23..5d84d1c74e4c 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -24,12 +24,8 @@
 #include "boot.h"
 #include "offsets.h"
 
-SETUPSECTS      = 4                     /* default nr of setup-sectors */
 BOOTSEG         = 0x07C0                /* original address of boot-sector */
-SYSSEG          = DEF_SYSSEG            /* system loaded at 0x10000 (65536) */
-SYSSIZE         = DEF_SYSSIZE           /* system size: # of 16-byte clicks */
-                                        /* to be loaded */
-ROOT_DEV        = 0                     /* ROOT_DEV is now written by "build" */
+SYSSEG          = 0x1000                /* historical load address >> 4 */
 
 #ifndef SVGA_MODE
 #define SVGA_MODE ASK_VGA
@@ -97,12 +93,12 @@ bugger_off_msg:
         .section ".header", "a"
         .globl  hdr
 hdr:
-setup_sects:    .byte SETUPSECTS
+setup_sects:    .byte 0                 /* Filled in by build.c */
 root_flags:     .word ROOT_RDONLY
-syssize:        .long SYSSIZE
-ram_size:       .word RAMDISK
+syssize:        .long 0                 /* Filled in by build.c */
+ram_size:       .word 0                 /* Obsolete */
 vid_mode:       .word SVGA_MODE
-root_dev:       .word ROOT_DEV
+root_dev:       .word 0                 /* Filled in by build.c */
 boot_flag:      .word 0xAA55
 
         # offset 512, entry point
@@ -123,14 +119,15 @@ _start:
                                         # or else old loadlin-1.5 will fail)
                 .globl realmode_swtch
 realmode_swtch: .word   0, 0            # default_switch, SETUPSEG
-start_sys_seg:  .word   SYSSEG
+start_sys_seg:  .word   SYSSEG          # obsolete and meaningless, but just
+                                        # in case something decided to "use" it
                 .word   kernel_version-512 # pointing to kernel version string
                                         # above section of header is compatible
                                         # with loadlin-1.5 (header v1.5). Don't
                                         # change it.
 
-type_of_loader: .byte   0               # = 0, old one (LILO, Loadlin,
-                                        #      Bootlin, SYSLX, bootsect...)
+type_of_loader: .byte   0               # 0 means ancient bootloader, newer
+                                        # bootloaders know to change this.
                                         # See Documentation/i386/boot.txt for
                                         # assigned ids
 
@@ -142,11 +139,7 @@ CAN_USE_HEAP	= 0x80			# If set, the loader also has set
                                         # space behind setup.S can be used for
                                         # heap purposes.
                                         # Only the loader knows what is free
-#ifndef __BIG_KERNEL__
-                .byte   0
-#else
                 .byte   LOADED_HIGH
-#endif
 
 setup_move_size: .word  0x8000          # size to move, when setup is not
                                         # loaded at 0x90000. We will move setup
@@ -157,11 +150,7 @@ setup_move_size: .word  0x8000		# size to move, when setup is not
 
 code32_start:                           # here loaders can put a different
                                         # start address for 32-bit code.
-#ifndef __BIG_KERNEL__
-                .long   0x1000          #   0x1000 = default for zImage
-#else
                 .long   0x100000        # 0x100000 = default for big kernel
-#endif
 
 ramdisk_image:  .long   0               # address of loaded ramdisk image
                                         # Here the loader puts the 32-bit
diff --git a/arch/x86/boot/pm.c b/arch/x86/boot/pm.c
index 85a1cd8a8ff8..8062f8915250 100644
--- a/arch/x86/boot/pm.c
+++ b/arch/x86/boot/pm.c
@@ -33,47 +33,6 @@ static void realmode_switch_hook(void)
 }
 
 /*
- * A zImage kernel is loaded at 0x10000 but wants to run at 0x1000.
- * A bzImage kernel is loaded and runs at 0x100000.
- */
-static void move_kernel_around(void)
-{
-        /* Note: rely on the compile-time option here rather than
-           the LOADED_HIGH flag.  The Qemu kernel loader unconditionally
-           sets the loadflags to zero. */
-#ifndef __BIG_KERNEL__
-        u16 dst_seg, src_seg;
-        u32 syssize;
-
-        dst_seg =  0x1000 >> 4;
-        src_seg = 0x10000 >> 4;
-        syssize = boot_params.hdr.syssize; /* Size in 16-byte paragraphs */
-
-        while (syssize) {
-                int paras  = (syssize >= 0x1000) ? 0x1000 : syssize;
-                int dwords = paras << 2;
-
-                asm volatile("pushw %%es ; "
-                             "pushw %%ds ; "
-                             "movw %1,%%es ; "
-                             "movw %2,%%ds ; "
-                             "xorw %%di,%%di ; "
-                             "xorw %%si,%%si ; "
-                             "rep;movsl ; "
-                             "popw %%ds ; "
-                             "popw %%es"
-                             : "+c" (dwords)
-                             : "r" (dst_seg), "r" (src_seg)
-                             : "esi", "edi");
-
-                syssize -= paras;
-                dst_seg += paras;
-                src_seg += paras;
-        }
-#endif
-}
-
-/*
  * Disable all interrupts at the legacy PIC.
  */
 static void mask_all_interrupts(void)
@@ -147,9 +106,6 @@ void go_to_protected_mode(void)
         /* Hook before leaving real mode, also disables interrupts */
         realmode_switch_hook();
 
-        /* Move the kernel/setup to their final resting places */
-        move_kernel_around();
-
         /* Enable the A20 gate */
         if (enable_a20()) {
                 puts("A20 gate not responding, unable to boot...\n");
diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S
index 019c17a75851..3e0edc6d2a20 100644
--- a/arch/x86/boot/pmjump.S
+++ b/arch/x86/boot/pmjump.S
@@ -47,6 +47,7 @@ GLOBAL(protected_mode_jump)
 ENDPROC(protected_mode_jump)
 
         .code32
+        .section ".text32","ax"
 GLOBAL(in_pm32)
         # Set up data segments for flat 32-bit mode
         movl    %ecx, %ds
diff --git a/arch/x86/boot/setup.ld b/arch/x86/boot/setup.ld
index df9234b3a5e0..bb8dc2de7969 100644
--- a/arch/x86/boot/setup.ld
+++ b/arch/x86/boot/setup.ld
@@ -17,7 +17,8 @@ SECTIONS
         .header         : { *(.header) }
         .inittext       : { *(.inittext) }
         .initdata       : { *(.initdata) }
-        .text           : { *(.text*) }
+        .text           : { *(.text) }
+        .text32         : { *(.text32) }
 
         . = ALIGN(16);
         .rodata         : { *(.rodata*) }
diff --git a/arch/x86/boot/tools/build.c b/arch/x86/boot/tools/build.c
index 44dc1923c0e3..ee3a4ea923ac 100644
--- a/arch/x86/boot/tools/build.c
+++ b/arch/x86/boot/tools/build.c
@@ -130,7 +130,7 @@ static void die(const char * str, ...)
 
 static void usage(void)
 {
-        die("Usage: build [-b] setup system [rootdev] [> image]");
+        die("Usage: build setup system [rootdev] [> image]");
 }
 
 int main(int argc, char ** argv)
@@ -145,11 +145,6 @@ int main(int argc, char ** argv)
         void *kernel;
         u32 crc = 0xffffffffUL;
 
-        if (argc > 2 && !strcmp(argv[1], "-b"))
-          {
-            is_big_kernel = 1;
-            argc--, argv++;
-          }
         if ((argc < 3) || (argc > 4))
                 usage();
         if (argc > 3) {
@@ -216,8 +211,6 @@ int main(int argc, char ** argv)
                 die("Unable to mmap '%s': %m", argv[2]);
         /* Number of 16-byte paragraphs, including space for a 4-byte CRC */
         sys_size = (sz + 15 + 4) / 16;
-        if (!is_big_kernel && sys_size > DEF_SYSSIZE)
-                die("System is too big. Try using bzImage or modules.");
 
         /* Patch the setup code with the appropriate size parameters */
         buf[0x1f1] = setup_sectors-1;
diff --git a/arch/x86/boot/video-vga.c b/arch/x86/boot/video-vga.c
index 5d4742ed4aa2..95d86ce0421c 100644
--- a/arch/x86/boot/video-vga.c
+++ b/arch/x86/boot/video-vga.c
@@ -129,41 +129,45 @@ u16 vga_crtc(void)
         return (inb(0x3cc) & 1) ? 0x3d4 : 0x3b4;
 }
 
-static void vga_set_480_scanlines(int end)
+static void vga_set_480_scanlines(int lines)
 {
-        u16 crtc;
-        u8  csel;
+        u16 crtc;               /* CRTC base address */
+        u8  csel;               /* CRTC miscellaneous output register */
+        u8  ovfw;               /* CRTC overflow register */
+        int end = lines-1;
 
         crtc = vga_crtc();
 
+        ovfw = 0x3c | ((end >> (8-1)) & 0x02) | ((end >> (9-6)) & 0x40);
+
         out_idx(0x0c, crtc, 0x11); /* Vertical sync end, unlock CR0-7 */
         out_idx(0x0b, crtc, 0x06); /* Vertical total */
-        out_idx(0x3e, crtc, 0x07); /* Vertical overflow */
+        out_idx(ovfw, crtc, 0x07); /* Vertical overflow */
         out_idx(0xea, crtc, 0x10); /* Vertical sync start */
-        out_idx(end, crtc, 0x12); /* Vertical display end */
+        out_idx(end,  crtc, 0x12); /* Vertical display end */
         out_idx(0xe7, crtc, 0x15); /* Vertical blank start */
         out_idx(0x04, crtc, 0x16); /* Vertical blank end */
         csel = inb(0x3cc);
         csel &= 0x0d;
         csel |= 0xe2;
-        outb(csel, 0x3cc);
+        outb(csel, 0x3c2);
 }
 
 static void vga_set_80x30(void)
 {
-        vga_set_480_scanlines(0xdf);
+        vga_set_480_scanlines(30*16);
 }
 
 static void vga_set_80x34(void)
 {
         vga_set_14font();
-        vga_set_480_scanlines(0xdb);
+        vga_set_480_scanlines(34*14);
 }
 
 static void vga_set_80x60(void)
 {
         vga_set_8font();
-        vga_set_480_scanlines(0xdf);
+        vga_set_480_scanlines(60*8);
 }
 
 static int vga_set_mode(struct mode_info *mode)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 4ef949c1972e..df8a300dfe6c 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -75,7 +75,7 @@ static inline void default_inquire_remote_apic(int apicid)
 #define setup_secondary_clock setup_secondary_APIC_clock
 #endif
 
-#ifdef CONFIG_X86_VSMP
+#ifdef CONFIG_X86_64
 extern int is_vsmp_box(void);
 #else
 static inline int is_vsmp_box(void)
@@ -108,6 +108,16 @@ extern void native_apic_icr_write(u32 low, u32 id);
 extern u64 native_apic_icr_read(void);
 
 #ifdef CONFIG_X86_X2APIC
+/*
+ * Make previous memory operations globally visible before
+ * sending the IPI through x2apic wrmsr. We need a serializing instruction or
+ * mfence for this.
+ */
+static inline void x2apic_wrmsr_fence(void)
+{
+        asm volatile("mfence" : : : "memory");
+}
+
 static inline void native_apic_msr_write(u32 reg, u32 v)
 {
         if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
@@ -184,6 +194,9 @@ static inline int x2apic_enabled(void)
 {
         return 0;
 }
+
+#define x2apic  0
+
 #endif
 
 extern int get_physical_broadcast(void);
@@ -379,6 +392,7 @@ static inline u32 safe_apic_wait_icr_idle(void)
 
 static inline void ack_APIC_irq(void)
 {
+#ifdef CONFIG_X86_LOCAL_APIC
         /*
          * ack_APIC_irq() actually gets compiled as a single instruction
          * ... yummie.
@@ -386,6 +400,7 @@ static inline void ack_APIC_irq(void)
 
         /* Docs say use 0 for future compatibility */
         apic_write(APIC_EOI, 0);
+#endif
 }
 
 static inline unsigned default_get_apic_id(unsigned long x)
@@ -474,10 +489,19 @@ static inline int default_apic_id_registered(void)
         return physid_isset(read_apic_id(), phys_cpu_present_map);
 }
 
+static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+        return cpuid_apic >> index_msb;
+}
+
+extern int default_apicid_to_node(int logical_apicid);
+
+#endif
+
 static inline unsigned int
 default_cpu_mask_to_apicid(const struct cpumask *cpumask)
 {
-        return cpumask_bits(cpumask)[0];
+        return cpumask_bits(cpumask)[0] & APIC_ALL_CPUS;
 }
 
 static inline unsigned int
@@ -491,15 +515,6 @@ default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
         return (unsigned int)(mask1 & mask2 & mask3);
 }
 
-static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
-{
-        return cpuid_apic >> index_msb;
-}
-
-extern int default_apicid_to_node(int logical_apicid);
-
-#endif
-
 static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
 {
         return physid_isset(apicid, bitmap);
diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h
index 63134e31e8b9..bc9514fb3b13 100644
--- a/arch/x86/include/asm/apicdef.h
+++ b/arch/x86/include/asm/apicdef.h
@@ -53,6 +53,7 @@
 #define         APIC_ESR_SENDILL        0x00020
 #define         APIC_ESR_RECVILL        0x00040
 #define         APIC_ESR_ILLREGA        0x00080
+#define         APIC_LVTCMCI    0x2f0
 #define APIC_ICR        0x300
 #define         APIC_DEST_SELF          0x40000
 #define         APIC_DEST_ALLINC        0x80000
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h
index 6526cf08b0e4..6ba23dd9fc92 100644
--- a/arch/x86/include/asm/boot.h
+++ b/arch/x86/include/asm/boot.h
@@ -1,10 +1,6 @@
 #ifndef _ASM_X86_BOOT_H
 #define _ASM_X86_BOOT_H
 
-/* Don't touch these, unless you really know what you're doing. */
-#define DEF_SYSSEG      0x1000
-#define DEF_SYSSIZE     0x7F00
-
 /* Internal svga startup constants */
 #define NORMAL_VGA      0xffff          /* 80x25 mode */
 #define EXTENDED_VGA    0xfffe          /* 80x50 mode */
diff --git a/arch/x86/include/asm/cacheflush.h b/arch/x86/include/asm/cacheflush.h
index 5b301b7ff5f4..b3894bf52fcd 100644
--- a/arch/x86/include/asm/cacheflush.h
+++ b/arch/x86/include/asm/cacheflush.h
@@ -90,6 +90,9 @@ int set_memory_4k(unsigned long addr, int numpages);
 int set_memory_array_uc(unsigned long *addr, int addrinarray);
 int set_memory_array_wb(unsigned long *addr, int addrinarray);
 
+int set_pages_array_uc(struct page **pages, int addrinarray);
+int set_pages_array_wb(struct page **pages, int addrinarray);
+
 /*
  * For legacy compatibility with the old APIs, a few functions
  * are provided that work on a "struct page".
diff --git a/arch/x86/include/asm/cpu_debug.h b/arch/x86/include/asm/cpu_debug.h
new file mode 100755
index 000000000000..222802029fa6
--- /dev/null
+++ b/arch/x86/include/asm/cpu_debug.h
@@ -0,0 +1,226 @@
+#ifndef _ASM_X86_CPU_DEBUG_H
+#define _ASM_X86_CPU_DEBUG_H
+
+/*
+ * CPU x86 architecture debug
+ *
+ * Copyright(C) 2009 Jaswinder Singh Rajput
+ */
+
+/* Register flags */
+enum cpu_debug_bit {
+/* Model Specific Registers (MSRs)                                      */
+        CPU_MC_BIT,                             /* Machine Check        */
+        CPU_MONITOR_BIT,                        /* Monitor              */
+        CPU_TIME_BIT,                           /* Time                 */
+        CPU_PMC_BIT,                            /* Performance Monitor  */
+        CPU_PLATFORM_BIT,                       /* Platform             */
+        CPU_APIC_BIT,                           /* APIC                 */
+        CPU_POWERON_BIT,                        /* Power-on             */
+        CPU_CONTROL_BIT,                        /* Control              */
+        CPU_FEATURES_BIT,                       /* Features control     */
+        CPU_LBRANCH_BIT,                        /* Last Branch          */
+        CPU_BIOS_BIT,                           /* BIOS                 */
+        CPU_FREQ_BIT,                           /* Frequency            */
+        CPU_MTTR_BIT,                           /* MTRR                 */
+        CPU_PERF_BIT,                           /* Performance          */
+        CPU_CACHE_BIT,                          /* Cache                */
+        CPU_SYSENTER_BIT,                       /* Sysenter             */
+        CPU_THERM_BIT,                          /* Thermal              */
+        CPU_MISC_BIT,                           /* Miscellaneous        */
+        CPU_DEBUG_BIT,                          /* Debug                */
+        CPU_PAT_BIT,                            /* PAT                  */
+        CPU_VMX_BIT,                            /* VMX                  */
+        CPU_CALL_BIT,                           /* System Call          */
+        CPU_BASE_BIT,                           /* BASE Address         */
+        CPU_VER_BIT,                            /* Version ID           */
+        CPU_CONF_BIT,                           /* Configuration        */
+        CPU_SMM_BIT,                            /* System mgmt mode     */
+        CPU_SVM_BIT,                            /*Secure Virtual Machine*/
+        CPU_OSVM_BIT,                           /* OS-Visible Workaround*/
+/* Standard Registers                                                   */
+        CPU_TSS_BIT,                            /* Task Stack Segment   */
+        CPU_CR_BIT,                             /* Control Registers    */
+        CPU_DT_BIT,                             /* Descriptor Table     */
+/* End of Registers flags                                               */
+        CPU_REG_ALL_BIT,                        /* Select all Registers */
+};
+
+#define CPU_REG_ALL             (~0)            /* Select all Registers */
+
+#define CPU_MC                  (1 << CPU_MC_BIT)
+#define CPU_MONITOR             (1 << CPU_MONITOR_BIT)
+#define CPU_TIME                (1 << CPU_TIME_BIT)
+#define CPU_PMC                 (1 << CPU_PMC_BIT)
+#define CPU_PLATFORM            (1 << CPU_PLATFORM_BIT)
+#define CPU_APIC                (1 << CPU_APIC_BIT)
+#define CPU_POWERON             (1 << CPU_POWERON_BIT)
+#define CPU_CONTROL             (1 << CPU_CONTROL_BIT)
+#define CPU_FEATURES            (1 << CPU_FEATURES_BIT)
+#define CPU_LBRANCH             (1 << CPU_LBRANCH_BIT)
+#define CPU_BIOS                (1 << CPU_BIOS_BIT)
+#define CPU_FREQ                (1 << CPU_FREQ_BIT)
+#define CPU_MTRR                (1 << CPU_MTTR_BIT)
+#define CPU_PERF                (1 << CPU_PERF_BIT)
+#define CPU_CACHE               (1 << CPU_CACHE_BIT)
+#define CPU_SYSENTER            (1 << CPU_SYSENTER_BIT)
+#define CPU_THERM               (1 << CPU_THERM_BIT)
+#define CPU_MISC                (1 << CPU_MISC_BIT)
+#define CPU_DEBUG               (1 << CPU_DEBUG_BIT)
+#define CPU_PAT                 (1 << CPU_PAT_BIT)
+#define CPU_VMX                 (1 << CPU_VMX_BIT)
+#define CPU_CALL                (1 << CPU_CALL_BIT)
+#define CPU_BASE                (1 << CPU_BASE_BIT)
+#define CPU_VER                 (1 << CPU_VER_BIT)
+#define CPU_CONF                (1 << CPU_CONF_BIT)
+#define CPU_SMM                 (1 << CPU_SMM_BIT)
+#define CPU_SVM                 (1 << CPU_SVM_BIT)
+#define CPU_OSVM                (1 << CPU_OSVM_BIT)
+#define CPU_TSS                 (1 << CPU_TSS_BIT)
+#define CPU_CR                  (1 << CPU_CR_BIT)
+#define CPU_DT                  (1 << CPU_DT_BIT)
+
+/* Register file flags */
+enum cpu_file_bit {
+        CPU_INDEX_BIT,                          /* index                */
+        CPU_VALUE_BIT,                          /* value                */
+};
+
+#define CPU_FILE_VALUE                  (1 << CPU_VALUE_BIT)
+
+/*
+ * DisplayFamily_DisplayModel   Processor Families/Processor Number Series
+ * --------------------------   ------------------------------------------
+ * 05_01, 05_02, 05_04          Pentium, Pentium with MMX
+ *
+ * 06_01                        Pentium Pro
+ * 06_03, 06_05                 Pentium II Xeon, Pentium II
+ * 06_07, 06_08, 06_0A, 06_0B   Pentium III Xeon, Pentum III
+ *
+ * 06_09, 060D                  Pentium M
+ *
+ * 06_0E                        Core Duo, Core Solo
+ *
+ * 06_0F                        Xeon 3000, 3200, 5100, 5300, 7300 series,
+ *                              Core 2 Quad, Core 2 Extreme, Core 2 Duo,
+ *                              Pentium dual-core
+ * 06_17                        Xeon 5200, 5400 series, Core 2 Quad Q9650
+ *
+ * 06_1C                        Atom
+ *
+ * 0F_00, 0F_01, 0F_02          Xeon, Xeon MP, Pentium 4
+ * 0F_03, 0F_04                 Xeon, Xeon MP, Pentium 4, Pentium D
+ *
+ * 0F_06                        Xeon 7100, 5000 Series, Xeon MP,
+ *                              Pentium 4, Pentium D
+ */
+
+/* Register processors bits */
+enum cpu_processor_bit {
+        CPU_NONE,
+/* Intel */
+        CPU_INTEL_PENTIUM_BIT,
+        CPU_INTEL_P6_BIT,
+        CPU_INTEL_PENTIUM_M_BIT,
+        CPU_INTEL_CORE_BIT,
+        CPU_INTEL_CORE2_BIT,
+        CPU_INTEL_ATOM_BIT,
+        CPU_INTEL_XEON_P4_BIT,
+        CPU_INTEL_XEON_MP_BIT,
+/* AMD */
+        CPU_AMD_K6_BIT,
+        CPU_AMD_K7_BIT,
+        CPU_AMD_K8_BIT,
+        CPU_AMD_0F_BIT,
+        CPU_AMD_10_BIT,
+        CPU_AMD_11_BIT,
+};
+
+#define CPU_INTEL_PENTIUM       (1 << CPU_INTEL_PENTIUM_BIT)
+#define CPU_INTEL_P6            (1 << CPU_INTEL_P6_BIT)
+#define CPU_INTEL_PENTIUM_M     (1 << CPU_INTEL_PENTIUM_M_BIT)
+#define CPU_INTEL_CORE          (1 << CPU_INTEL_CORE_BIT)
+#define CPU_INTEL_CORE2         (1 << CPU_INTEL_CORE2_BIT)
+#define CPU_INTEL_ATOM          (1 << CPU_INTEL_ATOM_BIT)
+#define CPU_INTEL_XEON_P4       (1 << CPU_INTEL_XEON_P4_BIT)
+#define CPU_INTEL_XEON_MP       (1 << CPU_INTEL_XEON_MP_BIT)
+
+#define CPU_INTEL_PX            (CPU_INTEL_P6 | CPU_INTEL_PENTIUM_M)
+#define CPU_INTEL_COREX         (CPU_INTEL_CORE | CPU_INTEL_CORE2)
+#define CPU_INTEL_XEON          (CPU_INTEL_XEON_P4 | CPU_INTEL_XEON_MP)
+#define CPU_CO_AT               (CPU_INTEL_CORE | CPU_INTEL_ATOM)
+#define CPU_C2_AT               (CPU_INTEL_CORE2 | CPU_INTEL_ATOM)
+#define CPU_CX_AT               (CPU_INTEL_COREX | CPU_INTEL_ATOM)
+#define CPU_CX_XE               (CPU_INTEL_COREX | CPU_INTEL_XEON)
+#define CPU_P6_XE               (CPU_INTEL_P6 | CPU_INTEL_XEON)
+#define CPU_PM_CO_AT            (CPU_INTEL_PENTIUM_M | CPU_CO_AT)
+#define CPU_C2_AT_XE            (CPU_C2_AT | CPU_INTEL_XEON)
+#define CPU_CX_AT_XE            (CPU_CX_AT | CPU_INTEL_XEON)
+#define CPU_P6_CX_AT            (CPU_INTEL_P6 | CPU_CX_AT)
+#define CPU_P6_CX_XE            (CPU_P6_XE | CPU_INTEL_COREX)
+#define CPU_P6_CX_AT_XE         (CPU_INTEL_P6 | CPU_CX_AT_XE)
+#define CPU_PM_CX_AT_XE         (CPU_INTEL_PENTIUM_M | CPU_CX_AT_XE)
+#define CPU_PM_CX_AT            (CPU_INTEL_PENTIUM_M | CPU_CX_AT)
+#define CPU_PM_CX_XE            (CPU_INTEL_PENTIUM_M | CPU_CX_XE)
+#define CPU_PX_CX_AT            (CPU_INTEL_PX | CPU_CX_AT)
+#define CPU_PX_CX_AT_XE         (CPU_INTEL_PX | CPU_CX_AT_XE)
+
+/* Select all supported Intel CPUs */
+#define CPU_INTEL_ALL           (CPU_INTEL_PENTIUM | CPU_PX_CX_AT_XE)
+
+#define CPU_AMD_K6              (1 << CPU_AMD_K6_BIT)
+#define CPU_AMD_K7              (1 << CPU_AMD_K7_BIT)
+#define CPU_AMD_K8              (1 << CPU_AMD_K8_BIT)
+#define CPU_AMD_0F              (1 << CPU_AMD_0F_BIT)
+#define CPU_AMD_10              (1 << CPU_AMD_10_BIT)
+#define CPU_AMD_11              (1 << CPU_AMD_11_BIT)
+
+#define CPU_K10_PLUS            (CPU_AMD_10 | CPU_AMD_11)
+#define CPU_K0F_PLUS            (CPU_AMD_0F | CPU_K10_PLUS)
+#define CPU_K8_PLUS             (CPU_AMD_K8 | CPU_K0F_PLUS)
+#define CPU_K7_PLUS             (CPU_AMD_K7 | CPU_K8_PLUS)
+
+/* Select all supported AMD CPUs */
+#define CPU_AMD_ALL             (CPU_AMD_K6 | CPU_K7_PLUS)
+
+/* Select all supported CPUs */
+#define CPU_ALL                 (CPU_INTEL_ALL | CPU_AMD_ALL)
+
+#define MAX_CPU_FILES           512
+
+struct cpu_private {
+        unsigned                cpu;
+        unsigned                type;
+        unsigned                reg;
+        unsigned                file;
+};
+
+struct cpu_debug_base {
+        char                    *name;          /* Register name        */
+        unsigned                flag;           /* Register flag        */
+        unsigned                write;          /* Register write flag  */
+};
+
+/*
+ * Currently it looks similar to cpu_debug_base but once we add more files
+ * cpu_file_base will go in different direction
+ */
+struct cpu_file_base {
+        char                    *name;          /* Register file name   */
+        unsigned                flag;           /* Register file flag   */
+        unsigned                write;          /* Register write flag  */
+};
+
+struct cpu_cpuX_base {
+        struct dentry           *dentry;        /* Register dentry      */
+        int                     init;           /* Register index file  */
+};
+
+struct cpu_debug_range {
+        unsigned                min;            /* Register range min   */
+        unsigned                max;            /* Register range max   */
+        unsigned                flag;           /* Supported flags      */
+        unsigned                model;          /* Supported models     */
+};
+
+#endif /* _ASM_X86_CPU_DEBUG_H */
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index dc27705f5443..5623c50d67b2 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -91,7 +91,6 @@ static inline int desc_empty(const void *ptr)
 #define store_gdt(dtr) native_store_gdt(dtr)
 #define store_idt(dtr) native_store_idt(dtr)
 #define store_tr(tr) (tr = native_store_tr())
-#define store_ldt(ldt) asm("sldt %0":"=m" (ldt))
 
 #define load_TLS(t, cpu) native_load_tls(t, cpu)
 #define set_ldt native_set_ldt
@@ -112,6 +111,8 @@ static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 }
 #endif  /* CONFIG_PARAVIRT */
 
+#define store_ldt(ldt) asm("sldt %0" : "=m"(ldt))
+
 static inline void native_write_idt_entry(gate_desc *idt, int entry,
                                           const gate_desc *gate)
 {
diff --git a/arch/x86/include/asm/device.h b/arch/x86/include/asm/device.h
index 3c034f48fdb0..4994a20acbcb 100644
--- a/arch/x86/include/asm/device.h
+++ b/arch/x86/include/asm/device.h
@@ -6,7 +6,7 @@ struct dev_archdata {
         void    *acpi_handle;
 #endif
 #ifdef CONFIG_X86_64
-struct dma_mapping_ops *dma_ops;
+struct dma_map_ops *dma_ops;
 #endif
 #ifdef CONFIG_DMAR
         void *iommu; /* hook for IOMMU specific extension */
diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h
index 132a134d12f2..cea7b74963e9 100644
--- a/arch/x86/include/asm/dma-mapping.h
+++ b/arch/x86/include/asm/dma-mapping.h
@@ -7,6 +7,8 @@
  */
 
 #include <linux/scatterlist.h>
+#include <linux/dma-debug.h>
+#include <linux/dma-attrs.h>
 #include <asm/io.h>
 #include <asm/swiotlb.h>
 #include <asm-generic/dma-coherent.h>
@@ -16,47 +18,9 @@ extern int iommu_merge;
 extern struct device x86_dma_fallback_dev;
 extern int panic_on_overflow;
 
-struct dma_mapping_ops {
-        int             (*mapping_error)(struct device *dev,
-                                         dma_addr_t dma_addr);
-        void*           (*alloc_coherent)(struct device *dev, size_t size,
-                                dma_addr_t *dma_handle, gfp_t gfp);
-        void            (*free_coherent)(struct device *dev, size_t size,
-                                void *vaddr, dma_addr_t dma_handle);
-        dma_addr_t      (*map_single)(struct device *hwdev, phys_addr_t ptr,
-                                size_t size, int direction);
-        void            (*unmap_single)(struct device *dev, dma_addr_t addr,
-                                size_t size, int direction);
-        void            (*sync_single_for_cpu)(struct device *hwdev,
-                                dma_addr_t dma_handle, size_t size,
-                                int direction);
-        void            (*sync_single_for_device)(struct device *hwdev,
-                                dma_addr_t dma_handle, size_t size,
-                                int direction);
-        void            (*sync_single_range_for_cpu)(struct device *hwdev,
-                                dma_addr_t dma_handle, unsigned long offset,
-                                size_t size, int direction);
-        void            (*sync_single_range_for_device)(struct device *hwdev,
-                                dma_addr_t dma_handle, unsigned long offset,
-                                size_t size, int direction);
-        void            (*sync_sg_for_cpu)(struct device *hwdev,
-                                struct scatterlist *sg, int nelems,
-                                int direction);
-        void            (*sync_sg_for_device)(struct device *hwdev,
-                                struct scatterlist *sg, int nelems,
-                                int direction);
-        int             (*map_sg)(struct device *hwdev, struct scatterlist *sg,
-                                int nents, int direction);
-        void            (*unmap_sg)(struct device *hwdev,
-                                struct scatterlist *sg, int nents,
-                                int direction);
-        int             (*dma_supported)(struct device *hwdev, u64 mask);
-        int             is_phys;
-};
-
-extern struct dma_mapping_ops *dma_ops;
-
-static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
+extern struct dma_map_ops *dma_ops;
+
+static inline struct dma_map_ops *get_dma_ops(struct device *dev)
 {
 #ifdef CONFIG_X86_32
         return dma_ops;
@@ -71,7 +35,7 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
 /* Make sure we keep the same behaviour */
 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        struct dma_map_ops *ops = get_dma_ops(dev);
         if (ops->mapping_error)
                 return ops->mapping_error(dev, dma_addr);
 
@@ -90,137 +54,167 @@ extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
 
 static inline dma_addr_t
 dma_map_single(struct device *hwdev, void *ptr, size_t size,
-               int direction)
+               enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
-
-        BUG_ON(!valid_dma_direction(direction));
-        return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
+        dma_addr_t addr;
+
+        BUG_ON(!valid_dma_direction(dir));
+        addr = ops->map_page(hwdev, virt_to_page(ptr),
+                             (unsigned long)ptr & ~PAGE_MASK, size,
+                             dir, NULL);
+        debug_dma_map_page(hwdev, virt_to_page(ptr),
+                           (unsigned long)ptr & ~PAGE_MASK, size,
+                           dir, addr, true);
+        return addr;
 }
 
 static inline void
 dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
-                 int direction)
+                 enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        struct dma_map_ops *ops = get_dma_ops(dev);
 
-        BUG_ON(!valid_dma_direction(direction));
-        if (ops->unmap_single)
-                ops->unmap_single(dev, addr, size, direction);
+        BUG_ON(!valid_dma_direction(dir));
+        if (ops->unmap_page)
+                ops->unmap_page(dev, addr, size, dir, NULL);
+        debug_dma_unmap_page(dev, addr, size, dir, true);
 }
 
 static inline int
 dma_map_sg(struct device *hwdev, struct scatterlist *sg,
-           int nents, int direction)
+           int nents, enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
+        int ents;
+
+        BUG_ON(!valid_dma_direction(dir));
+        ents = ops->map_sg(hwdev, sg, nents, dir, NULL);
+        debug_dma_map_sg(hwdev, sg, nents, ents, dir);
 
-        BUG_ON(!valid_dma_direction(direction));
-        return ops->map_sg(hwdev, sg, nents, direction);
+        return ents;
 }
 
 static inline void
 dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
-             int direction)
+             enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
 
-        BUG_ON(!valid_dma_direction(direction));
+        BUG_ON(!valid_dma_direction(dir));
+        debug_dma_unmap_sg(hwdev, sg, nents, dir);
         if (ops->unmap_sg)
-                ops->unmap_sg(hwdev, sg, nents, direction);
+                ops->unmap_sg(hwdev, sg, nents, dir, NULL);
 }
 
 static inline void
 dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
-                        size_t size, int direction)
+                        size_t size, enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
 
-        BUG_ON(!valid_dma_direction(direction));
+        BUG_ON(!valid_dma_direction(dir));
         if (ops->sync_single_for_cpu)
-                ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
+                ops->sync_single_for_cpu(hwdev, dma_handle, size, dir);
+        debug_dma_sync_single_for_cpu(hwdev, dma_handle, size, dir);
         flush_write_buffers();
 }
 
 static inline void
 dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
-                           size_t size, int direction)
+                           size_t size, enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
 
-        BUG_ON(!valid_dma_direction(direction));
+        BUG_ON(!valid_dma_direction(dir));
         if (ops->sync_single_for_device)
-                ops->sync_single_for_device(hwdev, dma_handle, size, direction);
+                ops->sync_single_for_device(hwdev, dma_handle, size, dir);
+        debug_dma_sync_single_for_device(hwdev, dma_handle, size, dir);
         flush_write_buffers();
 }
 
 static inline void
 dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
-                              unsigned long offset, size_t size, int direction)
+                              unsigned long offset, size_t size,
+                              enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
 
-        BUG_ON(!valid_dma_direction(direction));
+        BUG_ON(!valid_dma_direction(dir));
         if (ops->sync_single_range_for_cpu)
                 ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
-                                               size, direction);
+                                               size, dir);
+        debug_dma_sync_single_range_for_cpu(hwdev, dma_handle,
+                                            offset, size, dir);
         flush_write_buffers();
 }
 
 static inline void
 dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
                                  unsigned long offset, size_t size,
-                                 int direction)
+                                 enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
 
-        BUG_ON(!valid_dma_direction(direction));
+        BUG_ON(!valid_dma_direction(dir));
         if (ops->sync_single_range_for_device)
                 ops->sync_single_range_for_device(hwdev, dma_handle,
-                                                  offset, size, direction);
+                                                  offset, size, dir);
+        debug_dma_sync_single_range_for_device(hwdev, dma_handle,
+                                               offset, size, dir);
         flush_write_buffers();
 }
 
 static inline void
 dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
-                    int nelems, int direction)
+                    int nelems, enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
 
-        BUG_ON(!valid_dma_direction(direction));
+        BUG_ON(!valid_dma_direction(dir));
         if (ops->sync_sg_for_cpu)
-                ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
+                ops->sync_sg_for_cpu(hwdev, sg, nelems, dir);
+        debug_dma_sync_sg_for_cpu(hwdev, sg, nelems, dir);
         flush_write_buffers();
 }
 
 static inline void
 dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
-                       int nelems, int direction)
+                       int nelems, enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
+        struct dma_map_ops *ops = get_dma_ops(hwdev);
 
-        BUG_ON(!valid_dma_direction(direction));
+        BUG_ON(!valid_dma_direction(dir));
         if (ops->sync_sg_for_device)
-                ops->sync_sg_for_device(hwdev, sg, nelems, direction);
+                ops->sync_sg_for_device(hwdev, sg, nelems, dir);
+        debug_dma_sync_sg_for_device(hwdev, sg, nelems, dir);
 
         flush_write_buffers();
 }
 
 static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
                                       size_t offset, size_t size,
-                                      int direction)
+                                      enum dma_data_direction dir)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        struct dma_map_ops *ops = get_dma_ops(dev);
+        dma_addr_t addr;
 
-        BUG_ON(!valid_dma_direction(direction));
-        return ops->map_single(dev, page_to_phys(page) + offset,
-                               size, direction);
+        BUG_ON(!valid_dma_direction(dir));
+        addr = ops->map_page(dev, page, offset, size, dir, NULL);
+        debug_dma_map_page(dev, page, offset, size, dir, addr, false);
+
+        return addr;
 }
 
 static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
-                                  size_t size, int direction)
+                                  size_t size, enum dma_data_direction dir)
 {
-        dma_unmap_single(dev, addr, size, direction);
+        struct dma_map_ops *ops = get_dma_ops(dev);
+
+        BUG_ON(!valid_dma_direction(dir));
+        if (ops->unmap_page)
+                ops->unmap_page(dev, addr, size, dir, NULL);
+        debug_dma_unmap_page(dev, addr, size, dir, false);
 }
 
 static inline void
@@ -266,7 +260,7 @@ static inline void *
 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
                 gfp_t gfp)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        struct dma_map_ops *ops = get_dma_ops(dev);
         void *memory;
 
         gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
@@ -285,20 +279,24 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
         if (!ops->alloc_coherent)
                 return NULL;
 
-        return ops->alloc_coherent(dev, size, dma_handle,
-                                   dma_alloc_coherent_gfp_flags(dev, gfp));
+        memory = ops->alloc_coherent(dev, size, dma_handle,
+                                     dma_alloc_coherent_gfp_flags(dev, gfp));
+        debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
+
+        return memory;
 }
 
 static inline void dma_free_coherent(struct device *dev, size_t size,
                                      void *vaddr, dma_addr_t bus)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        struct dma_map_ops *ops = get_dma_ops(dev);
 
         WARN_ON(irqs_disabled());       /* for portability */
 
         if (dma_release_from_coherent(dev, get_order(size), vaddr))
                 return;
 
+        debug_dma_free_coherent(dev, size, vaddr, bus);
         if (ops->free_coherent)
                 ops->free_coherent(dev, size, vaddr, bus);
 }
diff --git a/arch/x86/include/asm/dmi.h b/arch/x86/include/asm/dmi.h
index bc68212c6bc0..fd8f9e2ca35f 100644
--- a/arch/x86/include/asm/dmi.h
+++ b/arch/x86/include/asm/dmi.h
@@ -1,22 +1,15 @@
 #ifndef _ASM_X86_DMI_H
 #define _ASM_X86_DMI_H
 
-#include <asm/io.h>
-
-#define DMI_MAX_DATA 2048
+#include <linux/compiler.h>
+#include <linux/init.h>
 
-extern int dmi_alloc_index;
-extern char dmi_alloc_data[DMI_MAX_DATA];
+#include <asm/io.h>
+#include <asm/setup.h>
 
-/* This is so early that there is no good way to allocate dynamic memory.
-   Allocate data in an BSS array. */
-static inline void *dmi_alloc(unsigned len)
+static __always_inline __init void *dmi_alloc(unsigned len)
 {
-        int idx = dmi_alloc_index;
-        if ((dmi_alloc_index + len) > DMI_MAX_DATA)
-                return NULL;
-        dmi_alloc_index += len;
-        return dmi_alloc_data + idx;
+        return extend_brk(len, sizeof(int));
 }
 
 /* Use early IO mappings for DMI because it's initialized early */
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 00d41ce4c844..7ecba4d85089 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -72,7 +72,7 @@ extern int e820_all_mapped(u64 start, u64 end, unsigned type);
 extern void e820_add_region(u64 start, u64 size, int type);
 extern void e820_print_map(char *who);
 extern int
-sanitize_e820_map(struct e820entry *biosmap, int max_nr_map, int *pnr_map);
+sanitize_e820_map(struct e820entry *biosmap, int max_nr_map, u32 *pnr_map);
 extern u64 e820_update_range(u64 start, u64 size, unsigned old_type,
                                unsigned new_type);
 extern u64 e820_remove_range(u64 start, u64 size, unsigned old_type,
diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index 854d538ae857..c2e6bedaf258 100644
--- a/arch/x86/include/asm/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -33,6 +33,8 @@ BUILD_INTERRUPT3(invalidate_interrupt7,INVALIDATE_TLB_VECTOR_START+7,
                  smp_invalidate_interrupt)
 #endif
 
+BUILD_INTERRUPT(generic_interrupt, GENERIC_INTERRUPT_VECTOR)
+
 /*
  * every pentium local APIC has two 'local interrupts', with a
  * soft-definable vector attached to both interrupts, one of
diff --git a/arch/x86/include/asm/ftrace.h b/arch/x86/include/asm/ftrace.h
index b55b4a7fbefd..db24c2278be0 100644
--- a/arch/x86/include/asm/ftrace.h
+++ b/arch/x86/include/asm/ftrace.h
@@ -55,29 +55,4 @@ struct dyn_arch_ftrace {
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_FUNCTION_TRACER */
 
-#ifdef CONFIG_FUNCTION_GRAPH_TRACER
-
-#ifndef __ASSEMBLY__
-
-/*
- * Stack of return addresses for functions
- * of a thread.
- * Used in struct thread_info
- */
-struct ftrace_ret_stack {
-        unsigned long ret;
-        unsigned long func;
-        unsigned long long calltime;
-};
-
-/*
- * Primary handler of a function return.
- * It relays on ftrace_return_to_handler.
- * Defined in entry_32/64.S
- */
-extern void return_to_handler(void);
-
-#endif /* __ASSEMBLY__ */
-#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
-
 #endif /* _ASM_X86_FTRACE_H */
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 176f058e7159..039db6aa8e02 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -12,6 +12,7 @@ typedef struct {
         unsigned int apic_timer_irqs;   /* arch dependent */
         unsigned int irq_spurious_count;
 #endif
+        unsigned int generic_irqs;      /* arch dependent */
 #ifdef CONFIG_SMP
         unsigned int irq_resched_count;
         unsigned int irq_call_count;
diff --git a/arch/x86/include/asm/highmem.h b/arch/x86/include/asm/highmem.h
index bf9276bea660..014c2b85ae45 100644
--- a/arch/x86/include/asm/highmem.h
+++ b/arch/x86/include/asm/highmem.h
@@ -63,6 +63,7 @@ void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot);
 void *kmap_atomic(struct page *page, enum km_type type);
 void kunmap_atomic(void *kvaddr, enum km_type type);
 void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
+void *kmap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
 struct page *kmap_atomic_to_page(void *ptr);
 
 #ifndef CONFIG_PARAVIRT
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 370e1c83bb49..b762ea49bd70 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -27,6 +27,7 @@
 
 /* Interrupt handlers registered during init_IRQ */
 extern void apic_timer_interrupt(void);
+extern void generic_interrupt(void);
 extern void error_interrupt(void);
 extern void spurious_interrupt(void);
 extern void thermal_interrupt(void);
diff --git a/arch/x86/include/asm/init.h b/arch/x86/include/asm/init.h
new file mode 100644
index 000000000000..36fb1a6a5109
--- /dev/null
+++ b/arch/x86/include/asm/init.h
@@ -0,0 +1,18 @@
+#ifndef _ASM_X86_INIT_32_H
+#define _ASM_X86_INIT_32_H
+
+#ifdef CONFIG_X86_32
+extern void __init early_ioremap_page_table_range_init(void);
+#endif
+
+extern unsigned long __init
+kernel_physical_mapping_init(unsigned long start,
+                             unsigned long end,
+                             unsigned long page_size_mask);
+
+
+extern unsigned long __initdata e820_table_start;
+extern unsigned long __meminitdata e820_table_end;
+extern unsigned long __meminitdata e820_table_top;
+
+#endif /* _ASM_X86_INIT_32_H */
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index 59cb4a1317b7..373cc2bbcad2 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -162,7 +162,8 @@ extern int (*ioapic_renumber_irq)(int ioapic, int irq);
 extern void ioapic_init_mappings(void);
 
 #ifdef CONFIG_X86_64
-extern int save_mask_IO_APIC_setup(void);
+extern int save_IO_APIC_setup(void);
+extern void mask_IO_APIC_setup(void);
 extern void restore_IO_APIC_setup(void);
 extern void reinit_intr_remapped_IO_APIC(int);
 #endif
@@ -172,7 +173,7 @@ extern void probe_nr_irqs_gsi(void);
 extern int setup_ioapic_entry(int apic, int irq,
                               struct IO_APIC_route_entry *entry,
                               unsigned int destination, int trigger,
-                              int polarity, int vector);
+                              int polarity, int vector, int pin);
 extern void ioapic_write_entry(int apic, int pin,
                                struct IO_APIC_route_entry e);
 #else  /* !CONFIG_X86_IO_APIC */
diff --git a/arch/x86/include/asm/iommu.h b/arch/x86/include/asm/iommu.h
index a6ee9e6f530f..af326a2975b5 100644
--- a/arch/x86/include/asm/iommu.h
+++ b/arch/x86/include/asm/iommu.h
@@ -3,7 +3,7 @@
 
 extern void pci_iommu_shutdown(void);
 extern void no_iommu_init(void);
-extern struct dma_mapping_ops nommu_dma_ops;
+extern struct dma_map_ops nommu_dma_ops;
 extern int force_iommu, no_iommu;
 extern int iommu_detected;
 
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 107eb2196691..f38481bcd455 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -36,6 +36,7 @@ static inline int irq_canonicalize(int irq)
 extern void fixup_irqs(void);
 #endif
 
+extern void (*generic_interrupt_extension)(void);
 extern void init_IRQ(void);
 extern void native_init_IRQ(void);
 extern bool handle_irq(unsigned irq, struct pt_regs *regs);
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 20e1fd588dbf..0396760fccb8 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -1,8 +1,6 @@
 #ifndef _ASM_X86_IRQ_REMAPPING_H
 #define _ASM_X86_IRQ_REMAPPING_H
 
-extern int x2apic;
-
 #define IRTE_DEST(dest) ((x2apic) ? dest : dest << 8)
 
 #endif  /* _ASM_X86_IRQ_REMAPPING_H */
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 8a285f356f8a..3cbd79bbb47c 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -112,6 +112,11 @@
 #define LOCAL_PERF_VECTOR               0xee
 
 /*
+ * Generic system vector for platform specific use
+ */
+#define GENERIC_INTERRUPT_VECTOR        0xed
+
+/*
  * First APIC vector available to drivers: (vectors 0x30-0xee) we
  * start at 0x31(0x41) to spread out vectors evenly between priority
  * levels. (0x80 is the syscall vector)
diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h
index 0ceb6d19ed30..317ff1703d0b 100644
--- a/arch/x86/include/asm/kexec.h
+++ b/arch/x86/include/asm/kexec.h
@@ -9,13 +9,13 @@
 # define PAGES_NR               4
 #else
 # define PA_CONTROL_PAGE        0
-# define PA_TABLE_PAGE          1
-# define PAGES_NR               2
+# define VA_CONTROL_PAGE        1
+# define PA_TABLE_PAGE          2
+# define PA_SWAP_PAGE           3
+# define PAGES_NR               4
 #endif
 
-#ifdef CONFIG_X86_32
 # define KEXEC_CONTROL_CODE_MAX_SIZE    2048
-#endif
 
 #ifndef __ASSEMBLY__
 
@@ -136,10 +136,11 @@ relocate_kernel(unsigned long indirection_page,
                 unsigned int has_pae,
                 unsigned int preserve_context);
 #else
-NORET_TYPE void
+unsigned long
 relocate_kernel(unsigned long indirection_page,
                 unsigned long page_list,
-                unsigned long start_address) ATTRIB_NORET;
+                unsigned long start_address,
+                unsigned int preserve_context);
 #endif
 
 #define ARCH_HAS_KIMAGE_ARCH
diff --git a/arch/x86/include/asm/lguest_hcall.h b/arch/x86/include/asm/lguest_hcall.h
index 43894428c3c2..0f4ee7148afe 100644
--- a/arch/x86/include/asm/lguest_hcall.h
+++ b/arch/x86/include/asm/lguest_hcall.h
@@ -26,36 +26,20 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/hw_irq.h>
+#include <asm/kvm_para.h>
 
 /*G:031 But first, how does our Guest contact the Host to ask for privileged
  * operations?  There are two ways: the direct way is to make a "hypercall",
  * to make requests of the Host Itself.
  *
- * Our hypercall mechanism uses the highest unused trap code (traps 32 and
- * above are used by real hardware interrupts).  Fifteen hypercalls are
+ * We use the KVM hypercall mechanism. Eighteen hypercalls are
  * available: the hypercall number is put in the %eax register, and the
- * arguments (when required) are placed in %edx, %ebx and %ecx.  If a return
+ * arguments (when required) are placed in %ebx, %ecx and %edx.  If a return
  * value makes sense, it's returned in %eax.
  *
  * Grossly invalid calls result in Sudden Death at the hands of the vengeful
  * Host, rather than returning failure.  This reflects Winston Churchill's
  * definition of a gentleman: "someone who is only rude intentionally". */
-static inline unsigned long
-hcall(unsigned long call,
-      unsigned long arg1, unsigned long arg2, unsigned long arg3)
-{
-        /* "int" is the Intel instruction to trigger a trap. */
-        asm volatile("int $" __stringify(LGUEST_TRAP_ENTRY)
-                     /* The call in %eax (aka "a") might be overwritten */
-                     : "=a"(call)
-                       /* The arguments are in %eax, %edx, %ebx & %ecx */
-                     : "a"(call), "d"(arg1), "b"(arg2), "c"(arg3)
-                       /* "memory" means this might write somewhere in memory.
-                        * This isn't true for all calls, but it's safe to tell
-                        * gcc that it might happen so it doesn't get clever. */
-                     : "memory");
-        return call;
-}
 /*:*/
 
 /* Can't use our min() macro here: needs to be a constant */
@@ -64,7 +48,7 @@ hcall(unsigned long call,
 #define LHCALL_RING_SIZE 64
 struct hcall_args {
         /* These map directly onto eax, ebx, ecx, edx in struct lguest_regs */
-        unsigned long arg0, arg2, arg3, arg1;
+        unsigned long arg0, arg1, arg2, arg3;
 };
 
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h
index 9320e2a8a26a..12d55e773eb6 100644
--- a/arch/x86/include/asm/linkage.h
+++ b/arch/x86/include/asm/linkage.h
@@ -1,14 +1,11 @@
 #ifndef _ASM_X86_LINKAGE_H
 #define _ASM_X86_LINKAGE_H
 
+#include <linux/stringify.h>
+
 #undef notrace
 #define notrace __attribute__((no_instrument_function))
 
-#ifdef CONFIG_X86_64
-#define __ALIGN .p2align 4,,15
-#define __ALIGN_STR ".p2align 4,,15"
-#endif
-
 #ifdef CONFIG_X86_32
 #define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))
 /*
@@ -50,16 +47,20 @@
         __asmlinkage_protect_n(ret, "g" (arg1), "g" (arg2), "g" (arg3), \
                               "g" (arg4), "g" (arg5), "g" (arg6))
 
-#endif
+#endif /* CONFIG_X86_32 */
+
+#ifdef __ASSEMBLY__
 
 #define GLOBAL(name)    \
         .globl name;    \
         name:
 
-#ifdef CONFIG_X86_ALIGNMENT_16
-#define __ALIGN .align 16,0x90
-#define __ALIGN_STR ".align 16,0x90"
+#if defined(CONFIG_X86_64) || defined(CONFIG_X86_ALIGNMENT_16)
+#define __ALIGN         .p2align 4, 0x90
+#define __ALIGN_STR     __stringify(__ALIGN)
 #endif
 
+#endif /* __ASSEMBLY__ */
+
 #endif /* _ASM_X86_LINKAGE_H */
 
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 32c6e17b960b..563933e06a35 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -11,6 +11,8 @@
  */
 
 #define MCG_CTL_P        (1UL<<8)   /* MCG_CAP register available */
+#define MCG_EXT_P        (1ULL<<9)   /* Extended registers available */
+#define MCG_CMCI_P       (1ULL<<10)  /* CMCI supported */
 
 #define MCG_STATUS_RIPV  (1UL<<0)   /* restart ip valid */
 #define MCG_STATUS_EIPV  (1UL<<1)   /* ip points to correct instruction */
@@ -90,14 +92,29 @@ extern int mce_disabled;
 
 #include <asm/atomic.h>
 
+void mce_setup(struct mce *m);
 void mce_log(struct mce *m);
 DECLARE_PER_CPU(struct sys_device, device_mce);
 extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
 
+/*
+ * To support more than 128 would need to escape the predefined
+ * Linux defined extended banks first.
+ */
+#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
+
 #ifdef CONFIG_X86_MCE_INTEL
 void mce_intel_feature_init(struct cpuinfo_x86 *c);
+void cmci_clear(void);
+void cmci_reenable(void);
+void cmci_rediscover(int dying);
+void cmci_recheck(void);
 #else
 static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) { }
+static inline void cmci_clear(void) {}
+static inline void cmci_reenable(void) {}
+static inline void cmci_rediscover(int dying) {}
+static inline void cmci_recheck(void) {}
 #endif
 
 #ifdef CONFIG_X86_MCE_AMD
@@ -106,11 +123,23 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c);
 static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
 #endif
 
-void mce_log_therm_throt_event(unsigned int cpu, __u64 status);
+extern int mce_available(struct cpuinfo_x86 *c);
+
+void mce_log_therm_throt_event(__u64 status);
 
 extern atomic_t mce_entry;
 
 extern void do_machine_check(struct pt_regs *, long);
+
+typedef DECLARE_BITMAP(mce_banks_t, MAX_NR_BANKS);
+DECLARE_PER_CPU(mce_banks_t, mce_poll_banks);
+
+enum mcp_flags {
+        MCP_TIMESTAMP = (1 << 0),       /* log time stamp */
+        MCP_UC = (1 << 1),              /* log uncorrected errors */
+};
+extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
+
 extern int mce_notify_user(void);
 
 #endif /* !CONFIG_X86_32 */
@@ -120,8 +149,8 @@ extern void mcheck_init(struct cpuinfo_x86 *c);
 #else
 #define mcheck_init(c) do { } while (0)
 #endif
-extern void stop_mce(void);
-extern void restart_mce(void);
+
+extern void (*mce_threshold_vector)(void);
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_X86_MCE_H */
diff --git a/arch/x86/include/asm/msidef.h b/arch/x86/include/asm/msidef.h
index 6706b3006f13..4cc48af23fef 100644
--- a/arch/x86/include/asm/msidef.h
+++ b/arch/x86/include/asm/msidef.h
@@ -47,6 +47,7 @@
 #define  MSI_ADDR_DEST_ID_MASK          0x00ffff0
 #define  MSI_ADDR_DEST_ID(dest)         (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \
                                          MSI_ADDR_DEST_ID_MASK)
+#define MSI_ADDR_EXT_DEST_ID(dest)      ((dest) & 0xffffff00)
 
 #define MSI_ADDR_IR_EXT_INT             (1 << 4)
 #define MSI_ADDR_IR_SHV                 (1 << 3)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index f4e505f286bc..ec41fc16c167 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -81,6 +81,11 @@
 #define MSR_IA32_MC0_ADDR               0x00000402
 #define MSR_IA32_MC0_MISC               0x00000403
 
+/* These are consecutive and not in the normal 4er MCE bank block */
+#define MSR_IA32_MC0_CTL2               0x00000280
+#define CMCI_EN                 (1ULL << 30)
+#define CMCI_THRESHOLD_MASK             0xffffULL
+
 #define MSR_P6_PERFCTR0                 0x000000c1
 #define MSR_P6_PERFCTR1                 0x000000c2
 #define MSR_P6_EVNTSEL0                 0x00000186
diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h
index f1e4a79a6e41..0f915ae649a7 100644
--- a/arch/x86/include/asm/page_32_types.h
+++ b/arch/x86/include/asm/page_32_types.h
@@ -39,6 +39,11 @@
 #define __VIRTUAL_MASK_SHIFT    32
 #endif  /* CONFIG_X86_PAE */
 
+/*
+ * Kernel image size is limited to 512 MB (see in arch/x86/kernel/head_32.S)
+ */
+#define KERNEL_IMAGE_SIZE       (512 * 1024 * 1024)
+
 #ifndef __ASSEMBLY__
 
 /*
diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h
index 2d625da6603c..826ad37006ab 100644
--- a/arch/x86/include/asm/page_types.h
+++ b/arch/x86/include/asm/page_types.h
@@ -40,14 +40,8 @@
 
 #ifndef __ASSEMBLY__
 
-struct pgprot;
-
 extern int page_is_ram(unsigned long pagenr);
 extern int devmem_is_allowed(unsigned long pagenr);
-extern void map_devmem(unsigned long pfn, unsigned long size,
-                       struct pgprot vma_prot);
-extern void unmap_devmem(unsigned long pfn, unsigned long size,
-                         struct pgprot vma_prot);
 
 extern unsigned long max_low_pfn_mapped;
 extern unsigned long max_pfn_mapped;
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 0617d5cc9712..7727aa8b7dda 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -317,8 +317,6 @@ struct pv_mmu_ops {
 #if PAGETABLE_LEVELS >= 3
 #ifdef CONFIG_X86_PAE
         void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
-        void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
-                                pte_t *ptep, pte_t pte);
         void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
                           pte_t *ptep);
         void (*pmd_clear)(pmd_t *pmdp);
@@ -389,7 +387,7 @@ extern struct pv_lock_ops pv_lock_ops;
 
 #define paravirt_type(op)                               \
         [paravirt_typenum] "i" (PARAVIRT_PATCH(op)),    \
-        [paravirt_opptr] "m" (op)
+        [paravirt_opptr] "i" (&(op))
 #define paravirt_clobber(clobber)               \
         [paravirt_clobber] "i" (clobber)
 
@@ -443,7 +441,7 @@ int paravirt_disable_iospace(void);
  * offset into the paravirt_patch_template structure, and can therefore be
  * freely converted back into a structure offset.
  */
-#define PARAVIRT_CALL   "call *%[paravirt_opptr];"
+#define PARAVIRT_CALL   "call *%c[paravirt_opptr];"
 
 /*
  * These macros are intended to wrap calls through one of the paravirt
@@ -1365,13 +1363,6 @@ static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
                     pte.pte, pte.pte >> 32);
 }
 
-static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
-                                   pte_t *ptep, pte_t pte)
-{
-        /* 5 arg words */
-        pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
-}
-
 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
                              pte_t *ptep)
 {
@@ -1388,12 +1379,6 @@ static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
         set_pte(ptep, pte);
 }
 
-static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
-                                   pte_t *ptep, pte_t pte)
-{
-        set_pte(ptep, pte);
-}
-
 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
                              pte_t *ptep)
 {
diff --git a/arch/x86/include/asm/pat.h b/arch/x86/include/asm/pat.h
index b0e70056838e..2cd07b9422f4 100644
--- a/arch/x86/include/asm/pat.h
+++ b/arch/x86/include/asm/pat.h
@@ -2,6 +2,7 @@
 #define _ASM_X86_PAT_H
 
 #include <linux/types.h>
+#include <asm/pgtable_types.h>
 
 #ifdef CONFIG_X86_PAT
 extern int pat_enabled;
@@ -17,5 +18,9 @@ extern int free_memtype(u64 start, u64 end);
 
 extern int kernel_map_sync_memtype(u64 base, unsigned long size,
                 unsigned long flag);
+extern void map_devmem(unsigned long pfn, unsigned long size,
+                       struct pgprot vma_prot);
+extern void unmap_devmem(unsigned long pfn, unsigned long size,
+                         struct pgprot vma_prot);
 
 #endif /* _ASM_X86_PAT_H */
diff --git a/arch/x86/include/asm/pgtable-2level.h b/arch/x86/include/asm/pgtable-2level.h
index c1774ac9da7a..2334982b339e 100644
--- a/arch/x86/include/asm/pgtable-2level.h
+++ b/arch/x86/include/asm/pgtable-2level.h
@@ -26,13 +26,6 @@ static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
         native_set_pte(ptep, pte);
 }
 
-static inline void native_set_pte_present(struct mm_struct *mm,
-                                          unsigned long addr,
-                                          pte_t *ptep, pte_t pte)
-{
-        native_set_pte(ptep, pte);
-}
-
 static inline void native_pmd_clear(pmd_t *pmdp)
 {
         native_set_pmd(pmdp, __pmd(0));
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 3f13cdf61156..177b0165ea01 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -31,23 +31,6 @@ static inline void native_set_pte(pte_t *ptep, pte_t pte)
         ptep->pte_low = pte.pte_low;
 }
 
-/*
- * Since this is only called on user PTEs, and the page fault handler
- * must handle the already racy situation of simultaneous page faults,
- * we are justified in merely clearing the PTE present bit, followed
- * by a set.  The ordering here is important.
- */
-static inline void native_set_pte_present(struct mm_struct *mm,
-                                          unsigned long addr,
-                                          pte_t *ptep, pte_t pte)
-{
-        ptep->pte_low = 0;
-        smp_wmb();
-        ptep->pte_high = pte.pte_high;
-        smp_wmb();
-        ptep->pte_low = pte.pte_low;
-}
-
 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
 {
         set_64bit((unsigned long long *)(ptep), native_pte_val(pte));
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index d0812e155f1d..29d96d168bc0 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -31,8 +31,6 @@ extern struct list_head pgd_list;
 #define set_pte(ptep, pte)              native_set_pte(ptep, pte)
 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
 
-#define set_pte_present(mm, addr, ptep, pte)                            \
-        native_set_pte_present(mm, addr, ptep, pte)
 #define set_pte_atomic(ptep, pte)                                       \
         native_set_pte_atomic(ptep, pte)
 
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index 97612fc7632f..31bd120cf2a2 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -42,9 +42,6 @@ extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
  */
 #undef TEST_ACCESS_OK
 
-/* The boot page tables (all created as a single array) */
-extern unsigned long pg0[];
-
 #ifdef CONFIG_X86_PAE
 # include <asm/pgtable-3level.h>
 #else
diff --git a/arch/x86/include/asm/pgtable_32_types.h b/arch/x86/include/asm/pgtable_32_types.h
index bd8df3b2fe04..2733fad45f98 100644
--- a/arch/x86/include/asm/pgtable_32_types.h
+++ b/arch/x86/include/asm/pgtable_32_types.h
@@ -25,6 +25,11 @@
  * area for the same reason. ;)
  */
 #define VMALLOC_OFFSET  (8 * 1024 * 1024)
+
+#ifndef __ASSEMBLER__
+extern bool __vmalloc_start_set; /* set once high_memory is set */
+#endif
+
 #define VMALLOC_START   ((unsigned long)high_memory + VMALLOC_OFFSET)
 #ifdef CONFIG_X86_PAE
 #define LAST_PKMAP 512
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index 4d258ad76a0f..b8238dc8786d 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -273,6 +273,7 @@ typedef struct page *pgtable_t;
 
 extern pteval_t __supported_pte_mask;
 extern int nx_enabled;
+extern void set_nx(void);
 
 #define pgprot_writecombine     pgprot_writecombine
 extern pgprot_t pgprot_writecombine(pgprot_t prot);
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 76139506c3e4..ae85a8d66a30 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -75,9 +75,9 @@ struct cpuinfo_x86 {
 #else
         /* Number of 4K pages in DTLB/ITLB combined(in pages): */
         int                     x86_tlbsize;
+#endif
         __u8                    x86_virt_bits;
         __u8                    x86_phys_bits;
-#endif
         /* CPUID returned core id bits: */
         __u8                    x86_coreid_bits;
         /* Max extended CPUID function supported: */
@@ -391,6 +391,9 @@ DECLARE_PER_CPU(union irq_stack_union, irq_stack_union);
 DECLARE_INIT_PER_CPU(irq_stack_union);
 
 DECLARE_PER_CPU(char *, irq_stack_ptr);
+DECLARE_PER_CPU(unsigned int, irq_count);
+extern unsigned long kernel_eflags;
+extern asmlinkage void ignore_sysret(void);
 #else   /* X86_64 */
 #ifdef CONFIG_CC_STACKPROTECTOR
 DECLARE_PER_CPU(unsigned long, stack_canary);
diff --git a/arch/x86/include/asm/sections.h b/arch/x86/include/asm/sections.h
index 2b8c5160388f..1b7ee5d673c2 100644
--- a/arch/x86/include/asm/sections.h
+++ b/arch/x86/include/asm/sections.h
@@ -1 +1,8 @@
+#ifndef _ASM_X86_SECTIONS_H
+#define _ASM_X86_SECTIONS_H
+
 #include <asm-generic/sections.h>
+
+extern char __brk_base[], __brk_limit[];
+
+#endif  /* _ASM_X86_SECTIONS_H */
diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h
index 05c6f6b11fd5..bdc2ada05ae0 100644
--- a/arch/x86/include/asm/setup.h
+++ b/arch/x86/include/asm/setup.h
@@ -64,7 +64,7 @@ extern void x86_quirk_time_init(void);
 #include <asm/bootparam.h>
 
 /* Interrupt control for vSMPowered x86_64 systems */
-#ifdef CONFIG_X86_VSMP
+#ifdef CONFIG_X86_64
 void vsmp_init(void);
 #else
 static inline void vsmp_init(void) { }
@@ -100,20 +100,51 @@ extern struct boot_params boot_params;
  */
 #define LOWMEMSIZE()    (0x9f000)
 
+/* exceedingly early brk-like allocator */
+extern unsigned long _brk_end;
+void *extend_brk(size_t size, size_t align);
+
+/*
+ * Reserve space in the brk section.  The name must be unique within
+ * the file, and somewhat descriptive.  The size is in bytes.  Must be
+ * used at file scope.
+ *
+ * (This uses a temp function to wrap the asm so we can pass it the
+ * size parameter; otherwise we wouldn't be able to.  We can't use a
+ * "section" attribute on a normal variable because it always ends up
+ * being @progbits, which ends up allocating space in the vmlinux
+ * executable.)
+ */
+#define RESERVE_BRK(name,sz)                                            \
+        static void __section(.discard) __used                          \
+        __brk_reservation_fn_##name##__(void) {                         \
+                asm volatile (                                          \
+                        ".pushsection .brk_reservation,\"aw\",@nobits;" \
+                        ".brk." #name ":"                               \
+                        " 1:.skip %c0;"                                 \
+                        " .size .brk." #name ", . - 1b;"                \
+                        " .popsection"                                  \
+                        : : "i" (sz));                                  \
+        }
+
 #ifdef __i386__
 
 void __init i386_start_kernel(void);
 extern void probe_roms(void);
 
-extern unsigned long init_pg_tables_start;
-extern unsigned long init_pg_tables_end;
-
 #else
 void __init x86_64_start_kernel(char *real_mode);
 void __init x86_64_start_reservations(char *real_mode_data);
 
 #endif /* __i386__ */
 #endif /* _SETUP */
+#else
+#define RESERVE_BRK(name,sz)                            \
+        .pushsection .brk_reservation,"aw",@nobits;     \
+.brk.name:                                              \
+1:      .skip sz;                                       \
+        .size .brk.name,.-1b;                           \
+        .popsection
 #endif /* __ASSEMBLY__ */
 #endif  /*  __KERNEL__  */
 
diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
index a81195eaa2b3..bd37ed444a21 100644
--- a/arch/x86/include/asm/timer.h
+++ b/arch/x86/include/asm/timer.h
@@ -12,9 +12,9 @@ unsigned long native_calibrate_tsc(void);
 
 #ifdef CONFIG_X86_32
 extern int timer_ack;
-extern int recalibrate_cpu_khz(void);
 extern irqreturn_t timer_interrupt(int irq, void *dev_id);
 #endif /* CONFIG_X86_32 */
+extern int recalibrate_cpu_khz(void);
 
 extern int no_timer_check;
 
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 77cfb2cfb386..744299c0b774 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -217,10 +217,6 @@ static inline cpumask_t node_to_cpumask(int node)
 {
         return cpu_online_map;
 }
-static inline int node_to_first_cpu(int node)
-{
-        return first_cpu(cpu_online_map);
-}
 
 static inline void setup_node_to_cpumask_map(void) { }
 
@@ -237,14 +233,6 @@ static inline void setup_node_to_cpumask_map(void) { }
 
 #include <asm-generic/topology.h>
 
-#ifdef CONFIG_NUMA
-/* Returns the number of the first CPU on Node 'node'. */
-static inline int node_to_first_cpu(int node)
-{
-        return cpumask_first(cpumask_of_node(node));
-}
-#endif
-
 extern cpumask_t cpu_coregroup_map(int cpu);
 extern const struct cpumask *cpu_coregroup_mask(int cpu);
 
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index 777327ef05c1..9f4dfba33b28 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -199,6 +199,10 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 #define SCIR_CPU_ACTIVITY       0x02    /* not idle */
 #define SCIR_CPU_HB_INTERVAL    (HZ)    /* once per second */
 
+/* Loop through all installed blades */
+#define for_each_possible_blade(bid)            \
+        for ((bid) = 0; (bid) < uv_num_possible_blades(); (bid)++)
+
 /*
  * Macros for converting between kernel virtual addresses, socket local physical
  * addresses, and UV global physical addresses.
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index 5e79ca694326..9c371e4a9fa6 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -296,6 +296,8 @@ HYPERVISOR_get_debugreg(int reg)
 static inline int
 HYPERVISOR_update_descriptor(u64 ma, u64 desc)
 {
+        if (sizeof(u64) == sizeof(long))
+                return _hypercall2(int, update_descriptor, ma, desc);
         return _hypercall4(int, update_descriptor, ma, ma>>32, desc, desc>>32);
 }
 
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 95f216bbfaf1..c611ad64137f 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -70,7 +70,6 @@ obj-$(CONFIG_FUNCTION_GRAPH_TRACER)	+= ftrace.o
 obj-$(CONFIG_KEXEC)             += machine_kexec_$(BITS).o
 obj-$(CONFIG_KEXEC)             += relocate_kernel_$(BITS).o crash.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump_$(BITS).o
-obj-$(CONFIG_X86_VSMP)          += vsmp_64.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
 obj-$(CONFIG_MODULES)           += module_$(BITS).o
 obj-$(CONFIG_EFI)               += efi.o efi_$(BITS).o efi_stub_$(BITS).o
@@ -106,12 +105,12 @@ obj-$(CONFIG_MICROCODE)			+= microcode.o
 
 obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
 
-obj-$(CONFIG_SWIOTLB)                   += pci-swiotlb_64.o # NB rename without _64
+obj-$(CONFIG_SWIOTLB)                   += pci-swiotlb.o
 
 ###
 # 64 bit specific files
 ifeq ($(CONFIG_X86_64),y)
-        obj-$(CONFIG_X86_UV)            += tlb_uv.o bios_uv.o uv_irq.o uv_sysfs.o
+        obj-$(CONFIG_X86_UV)            += tlb_uv.o bios_uv.o uv_irq.o uv_sysfs.o uv_time.o
         obj-$(CONFIG_X86_PM_TIMER)      += pmtimer_64.o
         obj-$(CONFIG_AUDIT)             += audit_64.o
 
@@ -120,4 +119,5 @@ ifeq ($(CONFIG_X86_64),y)
         obj-$(CONFIG_AMD_IOMMU)         += amd_iommu_init.o amd_iommu.o
 
         obj-$(CONFIG_PCI_MMCONFIG)      += mmconf-fam10h_64.o
+        obj-y                           += vsmp_64.o
 endif
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 6907b8e85d52..4c80f1557433 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -414,9 +414,17 @@ void __init alternative_instructions(void)
            that might execute the to be patched code.
            Other CPUs are not running. */
         stop_nmi();
-#ifdef CONFIG_X86_MCE
-        stop_mce();
-#endif
+
+        /*
+         * Don't stop machine check exceptions while patching.
+         * MCEs only happen when something got corrupted and in this
+         * case we must do something about the corruption.
+         * Ignoring it is worse than a unlikely patching race.
+         * Also machine checks tend to be broadcast and if one CPU
+         * goes into machine check the others follow quickly, so we don't
+         * expect a machine check to cause undue problems during to code
+         * patching.
+         */
 
         apply_alternatives(__alt_instructions, __alt_instructions_end);
 
@@ -456,9 +464,6 @@ void __init alternative_instructions(void)
                                 (unsigned long)__smp_locks_end);
 
         restart_nmi();
-#ifdef CONFIG_X86_MCE
-        restart_mce();
-#endif
 }
 
 /**
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 5113c080f0c4..c5962fe3796f 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -22,10 +22,9 @@
 #include <linux/bitops.h>
 #include <linux/debugfs.h>
 #include <linux/scatterlist.h>
+#include <linux/dma-mapping.h>
 #include <linux/iommu-helper.h>
-#ifdef CONFIG_IOMMU_API
 #include <linux/iommu.h>
-#endif
 #include <asm/proto.h>
 #include <asm/iommu.h>
 #include <asm/gart.h>
@@ -1297,8 +1296,10 @@ static void __unmap_single(struct amd_iommu *iommu,
 /*
  * The exported map_single function for dma_ops.
  */
-static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
-                             size_t size, int dir)
+static dma_addr_t map_page(struct device *dev, struct page *page,
+                           unsigned long offset, size_t size,
+                           enum dma_data_direction dir,
+                           struct dma_attrs *attrs)
 {
         unsigned long flags;
         struct amd_iommu *iommu;
@@ -1306,6 +1307,7 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
         u16 devid;
         dma_addr_t addr;
         u64 dma_mask;
+        phys_addr_t paddr = page_to_phys(page) + offset;
 
         INC_STATS_COUNTER(cnt_map_single);
 
@@ -1340,8 +1342,8 @@ out:
 /*
  * The exported unmap_single function for dma_ops.
  */
-static void unmap_single(struct device *dev, dma_addr_t dma_addr,
-                         size_t size, int dir)
+static void unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size,
+                       enum dma_data_direction dir, struct dma_attrs *attrs)
 {
         unsigned long flags;
         struct amd_iommu *iommu;
@@ -1390,7 +1392,8 @@ static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist,
  * lists).
  */
 static int map_sg(struct device *dev, struct scatterlist *sglist,
-                  int nelems, int dir)
+                  int nelems, enum dma_data_direction dir,
+                  struct dma_attrs *attrs)
 {
         unsigned long flags;
         struct amd_iommu *iommu;
@@ -1457,7 +1460,8 @@ unmap:
  * lists).
  */
 static void unmap_sg(struct device *dev, struct scatterlist *sglist,
-                     int nelems, int dir)
+                     int nelems, enum dma_data_direction dir,
+                     struct dma_attrs *attrs)
 {
         unsigned long flags;
         struct amd_iommu *iommu;
@@ -1644,11 +1648,11 @@ static void prealloc_protection_domains(void)
         }
 }
 
-static struct dma_mapping_ops amd_iommu_dma_ops = {
+static struct dma_map_ops amd_iommu_dma_ops = {
         .alloc_coherent = alloc_coherent,
         .free_coherent = free_coherent,
-        .map_single = map_single,
-        .unmap_single = unmap_single,
+        .map_page = map_page,
+        .unmap_page = unmap_page,
         .map_sg = map_sg,
         .unmap_sg = unmap_sg,
         .dma_supported = amd_iommu_dma_supported,
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index f9cecdfd05c5..85eb8e100818 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -46,6 +46,7 @@
 #include <asm/idle.h>
 #include <asm/mtrr.h>
 #include <asm/smp.h>
+#include <asm/mce.h>
 
 unsigned int num_processors;
 
@@ -808,7 +809,7 @@ void clear_local_APIC(void)
         u32 v;
 
         /* APIC hasn't been mapped yet */
-        if (!apic_phys)
+        if (!x2apic && !apic_phys)
                 return;
 
         maxlvt = lapic_get_maxlvt();
@@ -842,6 +843,14 @@ void clear_local_APIC(void)
                 apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED);
         }
 #endif
+#ifdef CONFIG_X86_MCE_INTEL
+        if (maxlvt >= 6) {
+                v = apic_read(APIC_LVTCMCI);
+                if (!(v & APIC_LVT_MASKED))
+                        apic_write(APIC_LVTCMCI, v | APIC_LVT_MASKED);
+        }
+#endif
+
         /*
          * Clean APIC state for other OSs:
          */
@@ -1241,6 +1250,12 @@ void __cpuinit setup_local_APIC(void)
         apic_write(APIC_LVT1, value);
 
         preempt_enable();
+
+#ifdef CONFIG_X86_MCE_INTEL
+        /* Recheck CMCI information after local APIC is up on CPU #0 */
+        if (smp_processor_id() == 0)
+                cmci_recheck();
+#endif
 }
 
 void __cpuinit end_local_APIC_setup(void)
@@ -1319,15 +1334,16 @@ void __init enable_IR_x2apic(void)
                 return;
         }
 
-        local_irq_save(flags);
-        mask_8259A();
-
-        ret = save_mask_IO_APIC_setup();
+        ret = save_IO_APIC_setup();
         if (ret) {
                 pr_info("Saving IO-APIC state failed: %d\n", ret);
                 goto end;
         }
 
+        local_irq_save(flags);
+        mask_IO_APIC_setup();
+        mask_8259A();
+
         ret = enable_intr_remapping(1);
 
         if (ret && x2apic_preenabled) {
@@ -1352,10 +1368,10 @@ end_restore:
         else
                 reinit_intr_remapped_IO_APIC(x2apic_preenabled);
 
-end:
         unmask_8259A();
         local_irq_restore(flags);
 
+end:
         if (!ret) {
                 if (!x2apic_preenabled)
                         pr_info("Enabled x2apic and interrupt-remapping\n");
@@ -1508,12 +1524,10 @@ void __init early_init_lapic_mapping(void)
  */
 void __init init_apic_mappings(void)
 {
-#ifdef CONFIG_X86_X2APIC
         if (x2apic) {
                 boot_cpu_physical_apicid = read_apic_id();
                 return;
         }
-#endif
 
         /*
          * If no local APIC can be found then set up a fake all
@@ -1957,12 +1971,9 @@ static int lapic_resume(struct sys_device *dev)
 
         local_irq_save(flags);
 
-#ifdef CONFIG_X86_X2APIC
         if (x2apic)
                 enable_x2apic();
-        else
-#endif
-        {
+        else {
                 /*
                  * Make sure the APICBASE points to the right address
                  *
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c
index f933822dba18..0014714ea97b 100644
--- a/arch/x86/kernel/apic/apic_flat_64.c
+++ b/arch/x86/kernel/apic/apic_flat_64.c
@@ -159,20 +159,6 @@ static int flat_apic_id_registered(void)
         return physid_isset(read_xapic_id(), phys_cpu_present_map);
 }
 
-static unsigned int flat_cpu_mask_to_apicid(const struct cpumask *cpumask)
-{
-        return cpumask_bits(cpumask)[0] & APIC_ALL_CPUS;
-}
-
-static unsigned int flat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
-                                                const struct cpumask *andmask)
-{
-        unsigned long mask1 = cpumask_bits(cpumask)[0] & APIC_ALL_CPUS;
-        unsigned long mask2 = cpumask_bits(andmask)[0] & APIC_ALL_CPUS;
-
-        return mask1 & mask2;
-}
-
 static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
 {
         return hard_smp_processor_id() >> index_msb;
@@ -213,8 +199,8 @@ struct apic apic_flat =  {
         .set_apic_id                    = set_apic_id,
         .apic_id_mask                   = 0xFFu << 24,
 
-        .cpu_mask_to_apicid             = flat_cpu_mask_to_apicid,
-        .cpu_mask_to_apicid_and         = flat_cpu_mask_to_apicid_and,
+        .cpu_mask_to_apicid             = default_cpu_mask_to_apicid,
+        .cpu_mask_to_apicid_and         = default_cpu_mask_to_apicid_and,
 
         .send_IPI_mask                  = flat_send_IPI_mask,
         .send_IPI_mask_allbutself       = flat_send_IPI_mask_allbutself,
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 00e6071cefc4..da99ffcdfde6 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -389,6 +389,8 @@ struct io_apic {
         unsigned int index;
         unsigned int unused[3];
         unsigned int data;
+        unsigned int unused2[11];
+        unsigned int eoi;
 };
 
 static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)
@@ -397,6 +399,12 @@ static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx)
                 + (mp_ioapics[idx].apicaddr & ~PAGE_MASK);
 }
 
+static inline void io_apic_eoi(unsigned int apic, unsigned int vector)
+{
+        struct io_apic __iomem *io_apic = io_apic_base(apic);
+        writel(vector, &io_apic->eoi);
+}
+
 static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg)
 {
         struct io_apic __iomem *io_apic = io_apic_base(apic);
@@ -546,16 +554,12 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq
 
                 apic = entry->apic;
                 pin = entry->pin;
-#ifdef CONFIG_INTR_REMAP
                 /*
                  * With interrupt-remapping, destination information comes
                  * from interrupt-remapping table entry.
                  */
                 if (!irq_remapped(irq))
                         io_apic_write(apic, 0x11 + pin*2, dest);
-#else
-                io_apic_write(apic, 0x11 + pin*2, dest);
-#endif
                 reg = io_apic_read(apic, 0x10 + pin*2);
                 reg &= ~IO_APIC_REDIR_VECTOR_MASK;
                 reg |= vector;
@@ -588,10 +592,12 @@ set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
         if (assign_irq_vector(irq, cfg, mask))
                 return BAD_APICID;
 
-        cpumask_and(desc->affinity, cfg->domain, mask);
+        /* check that before desc->addinity get updated */
         set_extra_move_desc(desc, mask);
 
-        return apic->cpu_mask_to_apicid_and(desc->affinity, cpu_online_mask);
+        cpumask_copy(desc->affinity, mask);
+
+        return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain);
 }
 
 static void
@@ -849,9 +855,9 @@ __setup("pirq=", ioapic_pirq_setup);
 static struct IO_APIC_route_entry *early_ioapic_entries[MAX_IO_APICS];
 
 /*
- * Saves and masks all the unmasked IO-APIC RTE's
+ * Saves all the IO-APIC RTE's
  */
-int save_mask_IO_APIC_setup(void)
+int save_IO_APIC_setup(void)
 {
         union IO_APIC_reg_01 reg_01;
         unsigned long flags;
@@ -876,16 +882,9 @@ int save_mask_IO_APIC_setup(void)
         }
 
         for (apic = 0; apic < nr_ioapics; apic++)
-                for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
-                        struct IO_APIC_route_entry entry;
-
-                        entry = early_ioapic_entries[apic][pin] =
+                for (pin = 0; pin < nr_ioapic_registers[apic]; pin++)
+                        early_ioapic_entries[apic][pin] =
                                 ioapic_read_entry(apic, pin);
-                        if (!entry.mask) {
-                                entry.mask = 1;
-                                ioapic_write_entry(apic, pin, entry);
-                        }
-                }
 
         return 0;
 
@@ -898,6 +897,25 @@ nomem:
         return -ENOMEM;
 }
 
+void mask_IO_APIC_setup(void)
+{
+        int apic, pin;
+
+        for (apic = 0; apic < nr_ioapics; apic++) {
+                if (!early_ioapic_entries[apic])
+                        break;
+                for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
+                        struct IO_APIC_route_entry entry;
+
+                        entry = early_ioapic_entries[apic][pin];
+                        if (!entry.mask) {
+                                entry.mask = 1;
+                                ioapic_write_entry(apic, pin, entry);
+                        }
+                }
+        }
+}
+
 void restore_IO_APIC_setup(void)
 {
         int apic, pin;
@@ -1411,9 +1429,7 @@ void __setup_vector_irq(int cpu)
 }
 
 static struct irq_chip ioapic_chip;
-#ifdef CONFIG_INTR_REMAP
 static struct irq_chip ir_ioapic_chip;
-#endif
 
 #define IOAPIC_AUTO     -1
 #define IOAPIC_EDGE     0
@@ -1452,7 +1468,6 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t
         else
                 desc->status &= ~IRQ_LEVEL;
 
-#ifdef CONFIG_INTR_REMAP
         if (irq_remapped(irq)) {
                 desc->status |= IRQ_MOVE_PCNTXT;
                 if (trigger)
@@ -1464,7 +1479,7 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t
                                                       handle_edge_irq, "edge");
                 return;
         }
-#endif
+
         if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
             trigger == IOAPIC_LEVEL)
                 set_irq_chip_and_handler_name(irq, &ioapic_chip,
@@ -1478,14 +1493,13 @@ static void ioapic_register_intr(int irq, struct irq_desc *desc, unsigned long t
 int setup_ioapic_entry(int apic_id, int irq,
                        struct IO_APIC_route_entry *entry,
                        unsigned int destination, int trigger,
-                       int polarity, int vector)
+                       int polarity, int vector, int pin)
 {
         /*
          * add it to the IO-APIC irq-routing table:
          */
         memset(entry,0,sizeof(*entry));
 
-#ifdef CONFIG_INTR_REMAP
         if (intr_remapping_enabled) {
                 struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);
                 struct irte irte;
@@ -1504,7 +1518,14 @@ int setup_ioapic_entry(int apic_id, int irq,
 
                 irte.present = 1;
                 irte.dst_mode = apic->irq_dest_mode;
-                irte.trigger_mode = trigger;
+                /*
+                 * Trigger mode in the IRTE will always be edge, and the
+                 * actual level or edge trigger will be setup in the IO-APIC
+                 * RTE. This will help simplify level triggered irq migration.
+                 * For more details, see the comments above explainig IO-APIC
+                 * irq migration in the presence of interrupt-remapping.
+                 */
+                irte.trigger_mode = 0;
                 irte.dlvry_mode = apic->irq_delivery_mode;
                 irte.vector = vector;
                 irte.dest_id = IRTE_DEST(destination);
@@ -1515,18 +1536,21 @@ int setup_ioapic_entry(int apic_id, int irq,
                 ir_entry->zero = 0;
                 ir_entry->format = 1;
                 ir_entry->index = (index & 0x7fff);
-        } else
-#endif
-        {
+                /*
+                 * IO-APIC RTE will be configured with virtual vector.
+                 * irq handler will do the explicit EOI to the io-apic.
+                 */
+                ir_entry->vector = pin;
+        } else {
                 entry->delivery_mode = apic->irq_delivery_mode;
                 entry->dest_mode = apic->irq_dest_mode;
                 entry->dest = destination;
+                entry->vector = vector;
         }
 
         entry->mask = 0;                                /* enable IRQ */
         entry->trigger = trigger;
         entry->polarity = polarity;
-        entry->vector = vector;
 
         /* Mask level triggered irqs.
          * Use IRQ_DELAYED_DISABLE for edge triggered irqs.
@@ -1561,7 +1585,7 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq
 
 
         if (setup_ioapic_entry(mp_ioapics[apic_id].apicid, irq, &entry,
-                               dest, trigger, polarity, cfg->vector)) {
+                               dest, trigger, polarity, cfg->vector, pin)) {
                 printk("Failed to setup ioapic entry for ioapic  %d, pin %d\n",
                        mp_ioapics[apic_id].apicid, pin);
                 __clear_irq_vector(irq, cfg);
@@ -1642,10 +1666,8 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
 {
         struct IO_APIC_route_entry entry;
 
-#ifdef CONFIG_INTR_REMAP
         if (intr_remapping_enabled)
                 return;
-#endif
 
         memset(&entry, 0, sizeof(entry));
 
@@ -2040,8 +2062,13 @@ void disable_IO_APIC(void)
          * If the i8259 is routed through an IOAPIC
          * Put that IOAPIC in virtual wire mode
          * so legacy interrupts can be delivered.
+         *
+         * With interrupt-remapping, for now we will use virtual wire A mode,
+         * as virtual wire B is little complex (need to configure both
+         * IOAPIC RTE aswell as interrupt-remapping table entry).
+         * As this gets called during crash dump, keep this simple for now.
          */
-        if (ioapic_i8259.pin != -1) {
+        if (ioapic_i8259.pin != -1 && !intr_remapping_enabled) {
                 struct IO_APIC_route_entry entry;
 
                 memset(&entry, 0, sizeof(entry));
@@ -2061,7 +2088,10 @@ void disable_IO_APIC(void)
                 ioapic_write_entry(ioapic_i8259.apic, ioapic_i8259.pin, entry);
         }
 
-        disconnect_bsp_APIC(ioapic_i8259.pin != -1);
+        /*
+         * Use virtual wire A mode when interrupt remapping is enabled.
+         */
+        disconnect_bsp_APIC(!intr_remapping_enabled && ioapic_i8259.pin != -1);
 }
 
 #ifdef CONFIG_X86_32
@@ -2303,37 +2333,24 @@ static int ioapic_retrigger_irq(unsigned int irq)
 #ifdef CONFIG_SMP
 
 #ifdef CONFIG_INTR_REMAP
-static void ir_irq_migration(struct work_struct *work);
-
-static DECLARE_DELAYED_WORK(ir_migration_work, ir_irq_migration);
 
 /*
  * Migrate the IO-APIC irq in the presence of intr-remapping.
  *
- * For edge triggered, irq migration is a simple atomic update(of vector
- * and cpu destination) of IRTE and flush the hardware cache.
- *
- * For level triggered, we need to modify the io-apic RTE aswell with the update
- * vector information, along with modifying IRTE with vector and destination.
- * So irq migration for level triggered is little  bit more complex compared to
- * edge triggered migration. But the good news is, we use the same algorithm
- * for level triggered migration as we have today, only difference being,
- * we now initiate the irq migration from process context instead of the
- * interrupt context.
+ * For both level and edge triggered, irq migration is a simple atomic
+ * update(of vector and cpu destination) of IRTE and flush the hardware cache.
  *
- * In future, when we do a directed EOI (combined with cpu EOI broadcast
- * suppression) to the IO-APIC, level triggered irq migration will also be
- * as simple as edge triggered migration and we can do the irq migration
- * with a simple atomic update to IO-APIC RTE.
+ * For level triggered, we eliminate the io-apic RTE modification (with the
+ * updated vector information), by using a virtual vector (io-apic pin number).
+ * Real vector that is used for interrupting cpu will be coming from
+ * the interrupt-remapping table entry.
  */
 static void
 migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
 {
         struct irq_cfg *cfg;
         struct irte irte;
-        int modify_ioapic_rte;
         unsigned int dest;
-        unsigned long flags;
         unsigned int irq;
 
         if (!cpumask_intersects(mask, cpu_online_mask))
@@ -2351,13 +2368,6 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
 
         dest = apic->cpu_mask_to_apicid_and(cfg->domain, mask);
 
-        modify_ioapic_rte = desc->status & IRQ_LEVEL;
-        if (modify_ioapic_rte) {
-                spin_lock_irqsave(&ioapic_lock, flags);
-                __target_IO_APIC_irq(irq, dest, cfg);
-                spin_unlock_irqrestore(&ioapic_lock, flags);
-        }
-
         irte.vector = cfg->vector;
         irte.dest_id = IRTE_DEST(dest);
 
@@ -2372,73 +2382,12 @@ migrate_ioapic_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
         cpumask_copy(desc->affinity, mask);
 }
 
-static int migrate_irq_remapped_level_desc(struct irq_desc *desc)
-{
-        int ret = -1;
-        struct irq_cfg *cfg = desc->chip_data;
-
-        mask_IO_APIC_irq_desc(desc);
-
-        if (io_apic_level_ack_pending(cfg)) {
-                /*
-                 * Interrupt in progress. Migrating irq now will change the
-                 * vector information in the IO-APIC RTE and that will confuse
-                 * the EOI broadcast performed by cpu.
-                 * So, delay the irq migration to the next instance.
-                 */
-                schedule_delayed_work(&ir_migration_work, 1);
-                goto unmask;
-        }
-
-        /* everthing is clear. we have right of way */
-        migrate_ioapic_irq_desc(desc, desc->pending_mask);
-
-        ret = 0;
-        desc->status &= ~IRQ_MOVE_PENDING;
-        cpumask_clear(desc->pending_mask);
-
-unmask:
-        unmask_IO_APIC_irq_desc(desc);
-
-        return ret;
-}
-
-static void ir_irq_migration(struct work_struct *work)
-{
-        unsigned int irq;
-        struct irq_desc *desc;
-
-        for_each_irq_desc(irq, desc) {
-                if (desc->status & IRQ_MOVE_PENDING) {
-                        unsigned long flags;
-
-                        spin_lock_irqsave(&desc->lock, flags);
-                        if (!desc->chip->set_affinity ||
-                            !(desc->status & IRQ_MOVE_PENDING)) {
-                                desc->status &= ~IRQ_MOVE_PENDING;
-                                spin_unlock_irqrestore(&desc->lock, flags);
-                                continue;
-                        }
-
-                        desc->chip->set_affinity(irq, desc->pending_mask);
-                        spin_unlock_irqrestore(&desc->lock, flags);
-                }
-        }
-}
-
 /*
  * Migrates the IRQ destination in the process context.
  */
 static void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
                                             const struct cpumask *mask)
 {
-        if (desc->status & IRQ_LEVEL) {
-                desc->status |= IRQ_MOVE_PENDING;
-                cpumask_copy(desc->pending_mask, mask);
-                migrate_irq_remapped_level_desc(desc);
-                return;
-        }
-
         migrate_ioapic_irq_desc(desc, mask);
 }
 static void set_ir_ioapic_affinity_irq(unsigned int irq,
@@ -2448,6 +2397,11 @@ static void set_ir_ioapic_affinity_irq(unsigned int irq,
 
         set_ir_ioapic_affinity_irq_desc(desc, mask);
 }
+#else
+static inline void set_ir_ioapic_affinity_irq_desc(struct irq_desc *desc,
+                                                   const struct cpumask *mask)
+{
+}
 #endif
 
 asmlinkage void smp_irq_move_cleanup_interrupt(void)
@@ -2461,6 +2415,7 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void)
         me = smp_processor_id();
         for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; vector++) {
                 unsigned int irq;
+                unsigned int irr;
                 struct irq_desc *desc;
                 struct irq_cfg *cfg;
                 irq = __get_cpu_var(vector_irq)[vector];
@@ -2480,6 +2435,18 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void)
                 if (vector == cfg->vector && cpumask_test_cpu(me, cfg->domain))
                         goto unlock;
 
+                irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
+                /*
+                 * Check if the vector that needs to be cleanedup is
+                 * registered at the cpu's IRR. If so, then this is not
+                 * the best time to clean it up. Lets clean it up in the
+                 * next attempt by sending another IRQ_MOVE_CLEANUP_VECTOR
+                 * to myself.
+                 */
+                if (irr  & (1 << (vector % 32))) {
+                        apic->send_IPI_self(IRQ_MOVE_CLEANUP_VECTOR);
+                        goto unlock;
+                }
                 __get_cpu_var(vector_irq)[vector] = -1;
                 cfg->move_cleanup_count--;
 unlock:
@@ -2529,9 +2496,44 @@ static inline void irq_complete_move(struct irq_desc **descp) {}
 #endif
 
 #ifdef CONFIG_INTR_REMAP
+static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
+{
+        int apic, pin;
+        struct irq_pin_list *entry;
+
+        entry = cfg->irq_2_pin;
+        for (;;) {
+
+                if (!entry)
+                        break;
+
+                apic = entry->apic;
+                pin = entry->pin;
+                io_apic_eoi(apic, pin);
+                entry = entry->next;
+        }
+}
+
+static void
+eoi_ioapic_irq(struct irq_desc *desc)
+{
+        struct irq_cfg *cfg;
+        unsigned long flags;
+        unsigned int irq;
+
+        irq = desc->irq;
+        cfg = desc->chip_data;
+
+        spin_lock_irqsave(&ioapic_lock, flags);
+        __eoi_ioapic_irq(irq, cfg);
+        spin_unlock_irqrestore(&ioapic_lock, flags);
+}
+
 static void ack_x2apic_level(unsigned int irq)
 {
+        struct irq_desc *desc = irq_to_desc(irq);
         ack_x2APIC_irq();
+        eoi_ioapic_irq(desc);
 }
 
 static void ack_x2apic_edge(unsigned int irq)
@@ -2662,20 +2664,20 @@ static struct irq_chip ioapic_chip __read_mostly = {
         .retrigger      = ioapic_retrigger_irq,
 };
 
-#ifdef CONFIG_INTR_REMAP
 static struct irq_chip ir_ioapic_chip __read_mostly = {
         .name           = "IR-IO-APIC",
         .startup        = startup_ioapic_irq,
         .mask           = mask_IO_APIC_irq,
         .unmask         = unmask_IO_APIC_irq,
+#ifdef CONFIG_INTR_REMAP
         .ack            = ack_x2apic_edge,
         .eoi            = ack_x2apic_level,
 #ifdef CONFIG_SMP
         .set_affinity   = set_ir_ioapic_affinity_irq,
 #endif
+#endif
         .retrigger      = ioapic_retrigger_irq,
 };
-#endif
 
 static inline void init_IO_APIC_traps(void)
 {
@@ -2901,10 +2903,8 @@ static inline void __init check_timer(void)
          * 8259A.
          */
         if (pin1 == -1) {
-#ifdef CONFIG_INTR_REMAP
                 if (intr_remapping_enabled)
                         panic("BIOS bug: timer not connected to IO-APIC");
-#endif
                 pin1 = pin2;
                 apic1 = apic2;
                 no_pin1 = 1;
@@ -2940,10 +2940,8 @@ static inline void __init check_timer(void)
                                 clear_IO_APIC_pin(0, pin1);
                         goto out;
                 }
-#ifdef CONFIG_INTR_REMAP
                 if (intr_remapping_enabled)
                         panic("timer doesn't work through Interrupt-remapped IO-APIC");
-#endif
                 local_irq_disable();
                 clear_IO_APIC_pin(apic1, pin1);
                 if (!no_pin1)
@@ -3237,9 +3235,7 @@ void destroy_irq(unsigned int irq)
         if (desc)
                 desc->chip_data = cfg;
 
-#ifdef CONFIG_INTR_REMAP
         free_irte(irq);
-#endif
         spin_lock_irqsave(&vector_lock, flags);
         __clear_irq_vector(irq, cfg);
         spin_unlock_irqrestore(&vector_lock, flags);
@@ -3265,7 +3261,6 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
 
         dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
 
-#ifdef CONFIG_INTR_REMAP
         if (irq_remapped(irq)) {
                 struct irte irte;
                 int ir_index;
@@ -3291,10 +3286,13 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
                                   MSI_ADDR_IR_SHV |
                                   MSI_ADDR_IR_INDEX1(ir_index) |
                                   MSI_ADDR_IR_INDEX2(ir_index);
-        } else
-#endif
-        {
-                msg->address_hi = MSI_ADDR_BASE_HI;
+        } else {
+                if (x2apic_enabled())
+                        msg->address_hi = MSI_ADDR_BASE_HI |
+                                          MSI_ADDR_EXT_DEST_ID(dest);
+                else
+                        msg->address_hi = MSI_ADDR_BASE_HI;
+
                 msg->address_lo =
                         MSI_ADDR_BASE_LO |
                         ((apic->irq_dest_mode == 0) ?
@@ -3394,15 +3392,16 @@ static struct irq_chip msi_chip = {
         .retrigger      = ioapic_retrigger_irq,
 };
 
-#ifdef CONFIG_INTR_REMAP
 static struct irq_chip msi_ir_chip = {
         .name           = "IR-PCI-MSI",
         .unmask         = unmask_msi_irq,
         .mask           = mask_msi_irq,
+#ifdef CONFIG_INTR_REMAP
         .ack            = ack_x2apic_edge,
 #ifdef CONFIG_SMP
         .set_affinity   = ir_set_msi_irq_affinity,
 #endif
+#endif
         .retrigger      = ioapic_retrigger_irq,
 };
 
@@ -3432,7 +3431,6 @@ static int msi_alloc_irte(struct pci_dev *dev, int irq, int nvec)
         }
         return index;
 }
-#endif
 
 static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
 {
@@ -3446,7 +3444,6 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
         set_irq_msi(irq, msidesc);
         write_msi_msg(irq, &msg);
 
-#ifdef CONFIG_INTR_REMAP
         if (irq_remapped(irq)) {
                 struct irq_desc *desc = irq_to_desc(irq);
                 /*
@@ -3455,7 +3452,6 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, int irq)
                 desc->status |= IRQ_MOVE_PCNTXT;
                 set_irq_chip_and_handler_name(irq, &msi_ir_chip, handle_edge_irq, "edge");
         } else
-#endif
                 set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge");
 
         dev_printk(KERN_DEBUG, &dev->dev, "irq %d for MSI/MSI-X\n", irq);
@@ -3469,11 +3465,8 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
         int ret, sub_handle;
         struct msi_desc *msidesc;
         unsigned int irq_want;
-
-#ifdef CONFIG_INTR_REMAP
-        struct intel_iommu *iommu = 0;
+        struct intel_iommu *iommu = NULL;
         int index = 0;
-#endif
 
         irq_want = nr_irqs_gsi;
         sub_handle = 0;
@@ -3482,7 +3475,6 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
                 if (irq == 0)
                         return -1;
                 irq_want = irq + 1;
-#ifdef CONFIG_INTR_REMAP
                 if (!intr_remapping_enabled)
                         goto no_ir;
 
@@ -3510,7 +3502,6 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
                         set_irte_irq(irq, iommu, index, sub_handle);
                 }
 no_ir:
-#endif
                 ret = setup_msi_irq(dev, msidesc, irq);
                 if (ret < 0)
                         goto error;
@@ -3528,7 +3519,7 @@ void arch_teardown_msi_irq(unsigned int irq)
         destroy_irq(irq);
 }
 
-#ifdef CONFIG_DMAR
+#if defined (CONFIG_DMAR) || defined (CONFIG_INTR_REMAP)
 #ifdef CONFIG_SMP
 static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
 {
@@ -3609,7 +3600,7 @@ static void hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
 
 #endif /* CONFIG_SMP */
 
-struct irq_chip hpet_msi_type = {
+static struct irq_chip hpet_msi_type = {
         .name = "HPET_MSI",
         .unmask = hpet_msi_unmask,
         .mask = hpet_msi_mask,
@@ -4045,11 +4036,9 @@ void __init setup_ioapic_dest(void)
                         else
                                 mask = apic->target_cpus();
 
-#ifdef CONFIG_INTR_REMAP
                         if (intr_remapping_enabled)
                                 set_ir_ioapic_affinity_irq_desc(desc, mask);
                         else
-#endif
                                 set_ioapic_affinity_irq_desc(desc, mask);
                 }
 
@@ -4142,9 +4131,12 @@ static int __init ioapic_insert_resources(void)
         struct resource *r = ioapic_resources;
 
         if (!r) {
-                printk(KERN_ERR
-                       "IO APIC resources could be not be allocated.\n");
-                return -1;
+                if (nr_ioapics > 0) {
+                        printk(KERN_ERR
+                                "IO APIC resources couldn't be allocated.\n");
+                        return -1;
+                }
+                return 0;
         }
 
         for (i = 0; i < nr_ioapics; i++) {
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c
index 8d7748efe6a8..1783652bb0e5 100644
--- a/arch/x86/kernel/apic/probe_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -68,6 +68,13 @@ void __init default_setup_apic_routing(void)
                         apic = &apic_physflat;
                 printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
         }
+
+        /*
+         * Now that apic routing model is selected, configure the
+         * fault handling for intr remapping.
+         */
+        if (intr_remapping_enabled)
+                enable_drhd_fault_handling();
 }
 
 /* Same for both flat and physical. */
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index 8fb87b6dd633..4a903e2f0d17 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -57,6 +57,8 @@ static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
         unsigned long query_cpu;
         unsigned long flags;
 
+        x2apic_wrmsr_fence();
+
         local_irq_save(flags);
         for_each_cpu(query_cpu, mask) {
                 __x2apic_send_IPI_dest(
@@ -73,6 +75,8 @@ static void
         unsigned long query_cpu;
         unsigned long flags;
 
+        x2apic_wrmsr_fence();
+
         local_irq_save(flags);
         for_each_cpu(query_cpu, mask) {
                 if (query_cpu == this_cpu)
@@ -90,6 +94,8 @@ static void x2apic_send_IPI_allbutself(int vector)
         unsigned long query_cpu;
         unsigned long flags;
 
+        x2apic_wrmsr_fence();
+
         local_irq_save(flags);
         for_each_online_cpu(query_cpu) {
                 if (query_cpu == this_cpu)
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c
index 23625b9f98b2..a284359627e7 100644
--- a/arch/x86/kernel/apic/x2apic_phys.c
+++ b/arch/x86/kernel/apic/x2apic_phys.c
@@ -58,6 +58,8 @@ static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
         unsigned long query_cpu;
         unsigned long flags;
 
+        x2apic_wrmsr_fence();
+
         local_irq_save(flags);
         for_each_cpu(query_cpu, mask) {
                 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
@@ -73,6 +75,8 @@ static void
         unsigned long query_cpu;
         unsigned long flags;
 
+        x2apic_wrmsr_fence();
+
         local_irq_save(flags);
         for_each_cpu(query_cpu, mask) {
                 if (query_cpu != this_cpu)
@@ -89,6 +93,8 @@ static void x2apic_send_IPI_allbutself(int vector)
         unsigned long query_cpu;
         unsigned long flags;
 
+        x2apic_wrmsr_fence();
+
         local_irq_save(flags);
         for_each_online_cpu(query_cpu) {
                 if (query_cpu == this_cpu)
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 10033fe718e0..ac7783a67432 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -1190,8 +1190,10 @@ static int suspend(int vetoable)
         struct apm_user *as;
 
         device_suspend(PMSG_SUSPEND);
-        local_irq_disable();
+
         device_power_down(PMSG_SUSPEND);
+
+        local_irq_disable();
         sysdev_suspend(PMSG_SUSPEND);
 
         local_irq_enable();
@@ -1209,9 +1211,12 @@ static int suspend(int vetoable)
         if (err != APM_SUCCESS)
                 apm_error("suspend", err);
         err = (err == APM_SUCCESS) ? 0 : -EIO;
+
         sysdev_resume();
-        device_power_up(PMSG_RESUME);
         local_irq_enable();
+
+        device_power_up(PMSG_RESUME);
+
         device_resume(PMSG_RESUME);
         queue_event(APM_NORMAL_RESUME, NULL);
         spin_lock(&user_list_lock);
@@ -1228,8 +1233,9 @@ static void standby(void)
 {
         int err;
 
-        local_irq_disable();
         device_power_down(PMSG_SUSPEND);
+
+        local_irq_disable();
         sysdev_suspend(PMSG_SUSPEND);
         local_irq_enable();
 
@@ -1239,8 +1245,9 @@ static void standby(void)
 
         local_irq_disable();
         sysdev_resume();
-        device_power_up(PMSG_RESUME);
         local_irq_enable();
+
+        device_power_up(PMSG_RESUME);
 }
 
 static apm_event_t get_event(void)
diff --git a/arch/x86/kernel/check.c b/arch/x86/kernel/check.c
index 2ac0ab71412a..fc999e6fc46a 100644
--- a/arch/x86/kernel/check.c
+++ b/arch/x86/kernel/check.c
@@ -83,15 +83,15 @@ void __init setup_bios_corruption_check(void)
                 u64 size;
                 addr = find_e820_area_size(addr, &size, PAGE_SIZE);
 
-                if (addr == 0)
+                if (!(addr + 1))
+                        break;
+
+                if (addr >= corruption_check_size)
                         break;
 
                 if ((addr + size) > corruption_check_size)
                         size = corruption_check_size - addr;
 
-                if (size == 0)
-                        break;
-
                 e820_update_range(addr, size, E820_RAM, E820_RESERVED);
                 scan_areas[num_scan_areas].addr = addr;
                 scan_areas[num_scan_areas].size = size;
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 82db7f45e2de..4e242f9a06e4 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -14,11 +14,12 @@ obj-y			+= vmware.o hypervisor.o
 obj-$(CONFIG_X86_32)    += bugs.o cmpxchg.o
 obj-$(CONFIG_X86_64)    += bugs_64.o
 
+obj-$(CONFIG_X86_CPU_DEBUG)             += cpu_debug.o
+
 obj-$(CONFIG_CPU_SUP_INTEL)             += intel.o
 obj-$(CONFIG_CPU_SUP_AMD)               += amd.o
 obj-$(CONFIG_CPU_SUP_CYRIX_32)          += cyrix.o
-obj-$(CONFIG_CPU_SUP_CENTAUR_32)        += centaur.o
-obj-$(CONFIG_CPU_SUP_CENTAUR_64)        += centaur_64.o
+obj-$(CONFIG_CPU_SUP_CENTAUR)           += centaur.o
 obj-$(CONFIG_CPU_SUP_TRANSMETA_32)      += transmeta.o
 obj-$(CONFIG_CPU_SUP_UMC_32)            += umc.o
 
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 6882a735d9c0..8220ae69849d 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -29,7 +29,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
         u32 regs[4];
         const struct cpuid_bit *cb;
 
-        static const struct cpuid_bit cpuid_bits[] = {
+        static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
                 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
                 { 0, 0, 0, 0 }
         };
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 25423a5b80ed..7e4a459daa64 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -5,6 +5,7 @@
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <asm/apic.h>
+#include <asm/cpu.h>
 
 #ifdef CONFIG_X86_64
 # include <asm/numa_64.h>
@@ -141,6 +142,55 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)
         }
 }
 
+static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
+{
+#ifdef CONFIG_SMP
+        /* calling is from identify_secondary_cpu() ? */
+        if (c->cpu_index == boot_cpu_id)
+                return;
+
+        /*
+         * Certain Athlons might work (for various values of 'work') in SMP
+         * but they are not certified as MP capable.
+         */
+        /* Athlon 660/661 is valid. */
+        if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
+            (c->x86_mask == 1)))
+                goto valid_k7;
+
+        /* Duron 670 is valid */
+        if ((c->x86_model == 7) && (c->x86_mask == 0))
+                goto valid_k7;
+
+        /*
+         * Athlon 662, Duron 671, and Athlon >model 7 have capability
+         * bit. It's worth noting that the A5 stepping (662) of some
+         * Athlon XP's have the MP bit set.
+         * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
+         * more.
+         */
+        if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
+            ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
+             (c->x86_model > 7))
+                if (cpu_has_mp)
+                        goto valid_k7;
+
+        /* If we get here, not a certified SMP capable AMD system. */
+
+        /*
+         * Don't taint if we are running SMP kernel on a single non-MP
+         * approved Athlon
+         */
+        WARN_ONCE(1, "WARNING: This combination of AMD"
+                "processors is not suitable for SMP.\n");
+        if (!test_taint(TAINT_UNSAFE_SMP))
+                add_taint(TAINT_UNSAFE_SMP);
+
+valid_k7:
+        ;
+#endif
+}
+
 static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
 {
         u32 l, h;
@@ -175,6 +225,8 @@ static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
         }
 
         set_cpu_cap(c, X86_FEATURE_K7);
+
+        amd_k7_smp_check(c);
 }
 #endif
 
@@ -450,7 +502,7 @@ static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c, unsigned int
 }
 #endif
 
-static struct cpu_dev amd_cpu_dev __cpuinitdata = {
+static const struct cpu_dev __cpuinitconst amd_cpu_dev = {
         .c_vendor       = "AMD",
         .c_ident        = { "AuthenticAMD" },
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index 89bfdd9cacc6..c95e831bb095 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -1,11 +1,11 @@
+#include <linux/bitops.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/bitops.h>
 
 #include <asm/processor.h>
-#include <asm/msr.h>
 #include <asm/e820.h>
 #include <asm/mtrr.h>
+#include <asm/msr.h>
 
 #include "cpu.h"
 
@@ -276,7 +276,7 @@ static void __cpuinit init_c3(struct cpuinfo_x86 *c)
                  */
                 c->x86_capability[5] = cpuid_edx(0xC0000001);
         }
-
+#ifdef CONFIG_X86_32
         /* Cyrix III family needs CX8 & PGE explicitly enabled. */
         if (c->x86_model >= 6 && c->x86_model <= 9) {
                 rdmsr(MSR_VIA_FCR, lo, hi);
@@ -288,6 +288,11 @@ static void __cpuinit init_c3(struct cpuinfo_x86 *c)
         /* Before Nehemiah, the C3's had 3dNOW! */
         if (c->x86_model >= 6 && c->x86_model < 9)
                 set_cpu_cap(c, X86_FEATURE_3DNOW);
+#endif
+        if (c->x86 == 0x6 && c->x86_model >= 0xf) {
+                c->x86_cache_alignment = c->x86_clflush_size * 2;
+                set_cpu_cap(c, X86_FEATURE_REP_GOOD);
+        }
 
         display_cacheinfo(c);
 }
@@ -316,16 +321,25 @@ enum {
 static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
 {
         switch (c->x86) {
+#ifdef CONFIG_X86_32
         case 5:
                 /* Emulate MTRRs using Centaur's MCR. */
                 set_cpu_cap(c, X86_FEATURE_CENTAUR_MCR);
                 break;
+#endif
+        case 6:
+                if (c->x86_model >= 0xf)
+                        set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
+                break;
         }
+#ifdef CONFIG_X86_64
+        set_cpu_cap(c, X86_FEATURE_SYSENTER32);
+#endif
 }
 
 static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
 {
-
+#ifdef CONFIG_X86_32
         char *name;
         u32  fcr_set = 0;
         u32  fcr_clr = 0;
@@ -337,8 +351,10 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
          * 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway
          */
         clear_cpu_cap(c, 0*32+31);
-
+#endif
+        early_init_centaur(c);
         switch (c->x86) {
+#ifdef CONFIG_X86_32
         case 5:
                 switch (c->x86_model) {
                 case 4:
@@ -442,16 +458,20 @@ static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
                 }
                 sprintf(c->x86_model_id, "WinChip %s", name);
                 break;
-
+#endif
         case 6:
                 init_c3(c);
                 break;
         }
+#ifdef CONFIG_X86_64
+        set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
+#endif
 }
 
 static unsigned int __cpuinit
 centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
 {
+#ifdef CONFIG_X86_32
         /* VIA C3 CPUs (670-68F) need further shifting. */
         if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8)))
                 size >>= 8;
@@ -464,11 +484,11 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)
         if ((c->x86 == 6) && (c->x86_model == 9) &&
                                 (c->x86_mask == 1) && (size == 65))
                 size -= 1;
-
+#endif
         return size;
 }
 
-static struct cpu_dev centaur_cpu_dev __cpuinitdata = {
+static const struct cpu_dev __cpuinitconst centaur_cpu_dev = {
         .c_vendor       = "Centaur",
         .c_ident        = { "CentaurHauls" },
         .c_early_init   = early_init_centaur,
diff --git a/arch/x86/kernel/cpu/centaur_64.c b/arch/x86/kernel/cpu/centaur_64.c
deleted file mode 100644
index a1625f5a1e78..000000000000
--- a/arch/x86/kernel/cpu/centaur_64.c
+++ /dev/null
@@ -1,37 +0,0 @@
-#include <linux/init.h>
-#include <linux/smp.h>
-
-#include <asm/cpufeature.h>
-#include <asm/processor.h>
-
-#include "cpu.h"
-
-static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
-{
-        if (c->x86 == 0x6 && c->x86_model >= 0xf)
-                set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
-
-        set_cpu_cap(c, X86_FEATURE_SYSENTER32);
-}
-
-static void __cpuinit init_centaur(struct cpuinfo_x86 *c)
-{
-        early_init_centaur(c);
-
-        if (c->x86 == 0x6 && c->x86_model >= 0xf) {
-                c->x86_cache_alignment = c->x86_clflush_size * 2;
-                set_cpu_cap(c, X86_FEATURE_REP_GOOD);
-        }
-        set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
-}
-
-static struct cpu_dev centaur_cpu_dev __cpuinitdata = {
-        .c_vendor       = "Centaur",
-        .c_ident        = { "CentaurHauls" },
-        .c_early_init   = early_init_centaur,
-        .c_init         = init_centaur,
-        .c_x86_vendor   = X86_VENDOR_CENTAUR,
-};
-
-cpu_dev_register(centaur_cpu_dev);
-
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 826d5c876278..e2962cc1e27b 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1,52 +1,52 @@
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
 #include <linux/bootmem.h>
+#include <linux/linkage.h>
 #include <linux/bitops.h>
+#include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/kgdb.h>
-#include <linux/topology.h>
+#include <linux/percpu.h>
+#include <linux/string.h>
 #include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/kgdb.h>
 #include <linux/smp.h>
-#include <linux/percpu.h>
-#include <asm/i387.h>
-#include <asm/msr.h>
-#include <asm/io.h>
-#include <asm/linkage.h>
+#include <linux/io.h>
+
+#include <asm/stackprotector.h>
 #include <asm/mmu_context.h>
+#include <asm/hypervisor.h>
+#include <asm/processor.h>
+#include <asm/sections.h>
+#include <asm/topology.h>
+#include <asm/cpumask.h>
+#include <asm/pgtable.h>
+#include <asm/atomic.h>
+#include <asm/proto.h>
+#include <asm/setup.h>
+#include <asm/apic.h>
+#include <asm/desc.h>
+#include <asm/i387.h>
 #include <asm/mtrr.h>
+#include <asm/numa.h>
+#include <asm/asm.h>
+#include <asm/cpu.h>
 #include <asm/mce.h>
+#include <asm/msr.h>
 #include <asm/pat.h>
-#include <asm/asm.h>
-#include <asm/numa.h>
 #include <asm/smp.h>
-#include <asm/cpu.h>
-#include <asm/cpumask.h>
-#include <asm/apic.h>
 
 #ifdef CONFIG_X86_LOCAL_APIC
 #include <asm/uv/uv.h>
 #endif
 
-#include <asm/pgtable.h>
-#include <asm/processor.h>
-#include <asm/desc.h>
-#include <asm/atomic.h>
-#include <asm/proto.h>
-#include <asm/sections.h>
-#include <asm/setup.h>
-#include <asm/hypervisor.h>
-#include <asm/stackprotector.h>
-
 #include "cpu.h"
 
 #ifdef CONFIG_X86_64
 
 /* all of these masks are initialized in setup_cpu_local_masks() */
-cpumask_var_t cpu_callin_mask;
-cpumask_var_t cpu_callout_mask;
 cpumask_var_t cpu_initialized_mask;
+cpumask_var_t cpu_callout_mask;
+cpumask_var_t cpu_callin_mask;
 
 /* representing cpus for which sibling maps can be computed */
 cpumask_var_t cpu_sibling_setup_mask;
@@ -62,15 +62,15 @@ void __init setup_cpu_local_masks(void)
 
 #else /* CONFIG_X86_32 */
 
-cpumask_t cpu_callin_map;
+cpumask_t cpu_sibling_setup_map;
 cpumask_t cpu_callout_map;
 cpumask_t cpu_initialized;
-cpumask_t cpu_sibling_setup_map;
+cpumask_t cpu_callin_map;
 
 #endif /* CONFIG_X86_32 */
 
 
-static struct cpu_dev *this_cpu __cpuinitdata;
+static const struct cpu_dev *this_cpu __cpuinitdata;
 
 DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
 #ifdef CONFIG_X86_64
@@ -79,48 +79,48 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
          * IRET will check the segment types  kkeil 2000/10/28
          * Also sysret mandates a special GDT layout
          *
-         * The TLS descriptors are currently at a different place compared to i386.
+         * TLS descriptors are currently at a different place compared to i386.
          * Hopefully nobody expects them at a fixed place (Wine?)
          */
-        [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } },
-        [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } },
-        [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } },
-        [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } },
-        [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } },
-        [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } },
+        [GDT_ENTRY_KERNEL32_CS]         = { { { 0x0000ffff, 0x00cf9b00 } } },
+        [GDT_ENTRY_KERNEL_CS]           = { { { 0x0000ffff, 0x00af9b00 } } },
+        [GDT_ENTRY_KERNEL_DS]           = { { { 0x0000ffff, 0x00cf9300 } } },
+        [GDT_ENTRY_DEFAULT_USER32_CS]   = { { { 0x0000ffff, 0x00cffb00 } } },
+        [GDT_ENTRY_DEFAULT_USER_DS]     = { { { 0x0000ffff, 0x00cff300 } } },
+        [GDT_ENTRY_DEFAULT_USER_CS]     = { { { 0x0000ffff, 0x00affb00 } } },
 #else
-        [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } },
-        [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } },
-        [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } },
-        [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff200 } } },
+        [GDT_ENTRY_KERNEL_CS]           = { { { 0x0000ffff, 0x00cf9a00 } } },
+        [GDT_ENTRY_KERNEL_DS]           = { { { 0x0000ffff, 0x00cf9200 } } },
+        [GDT_ENTRY_DEFAULT_USER_CS]     = { { { 0x0000ffff, 0x00cffa00 } } },
+        [GDT_ENTRY_DEFAULT_USER_DS]     = { { { 0x0000ffff, 0x00cff200 } } },
         /*
          * Segments used for calling PnP BIOS have byte granularity.
          * They code segments and data segments have fixed 64k limits,
          * the transfer segment sizes are set at run time.
          */
         /* 32-bit code */
-        [GDT_ENTRY_PNPBIOS_CS32] = { { { 0x0000ffff, 0x00409a00 } } },
+        [GDT_ENTRY_PNPBIOS_CS32]        = { { { 0x0000ffff, 0x00409a00 } } },
         /* 16-bit code */
-        [GDT_ENTRY_PNPBIOS_CS16] = { { { 0x0000ffff, 0x00009a00 } } },
+        [GDT_ENTRY_PNPBIOS_CS16]        = { { { 0x0000ffff, 0x00009a00 } } },
         /* 16-bit data */
-        [GDT_ENTRY_PNPBIOS_DS] = { { { 0x0000ffff, 0x00009200 } } },
+        [GDT_ENTRY_PNPBIOS_DS]          = { { { 0x0000ffff, 0x00009200 } } },
         /* 16-bit data */
-        [GDT_ENTRY_PNPBIOS_TS1] = { { { 0x00000000, 0x00009200 } } },
+        [GDT_ENTRY_PNPBIOS_TS1]         = { { { 0x00000000, 0x00009200 } } },
         /* 16-bit data */
-        [GDT_ENTRY_PNPBIOS_TS2] = { { { 0x00000000, 0x00009200 } } },
+        [GDT_ENTRY_PNPBIOS_TS2]         = { { { 0x00000000, 0x00009200 } } },
         /*
          * The APM segments have byte granularity and their bases
          * are set at run time.  All have 64k limits.
          */
         /* 32-bit code */
-        [GDT_ENTRY_APMBIOS_BASE] = { { { 0x0000ffff, 0x00409a00 } } },
+        [GDT_ENTRY_APMBIOS_BASE]        = { { { 0x0000ffff, 0x00409a00 } } },
         /* 16-bit code */
-        [GDT_ENTRY_APMBIOS_BASE+1] = { { { 0x0000ffff, 0x00009a00 } } },
+        [GDT_ENTRY_APMBIOS_BASE+1]      = { { { 0x0000ffff, 0x00009a00 } } },
         /* data */
-        [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } },
+        [GDT_ENTRY_APMBIOS_BASE+2]      = { { { 0x0000ffff, 0x00409200 } } },
 
-        [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } },
-        [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } },
+        [GDT_ENTRY_ESPFIX_SS]           = { { { 0x00000000, 0x00c09200 } } },
+        [GDT_ENTRY_PERCPU]              = { { { 0x0000ffff, 0x00cf9200 } } },
         GDT_STACK_CANARY_INIT
 #endif
 } };
@@ -164,16 +164,17 @@ static inline int flag_is_changeable_p(u32 flag)
          * the CPUID. Add "volatile" to not allow gcc to
          * optimize the subsequent calls to this function.
          */
-        asm volatile ("pushfl\n\t"
-                      "pushfl\n\t"
-                      "popl %0\n\t"
-                      "movl %0,%1\n\t"
-                      "xorl %2,%0\n\t"
-                      "pushl %0\n\t"
-                      "popfl\n\t"
-                      "pushfl\n\t"
-                      "popl %0\n\t"
-                      "popfl\n\t"
+        asm volatile ("pushfl           \n\t"
+                      "pushfl           \n\t"
+                      "popl %0          \n\t"
+                      "movl %0, %1      \n\t"
+                      "xorl %2, %0      \n\t"
+                      "pushl %0         \n\t"
+                      "popfl            \n\t"
+                      "pushfl           \n\t"
+                      "popl %0          \n\t"
+                      "popfl            \n\t"
+
                       : "=&r" (f1), "=&r" (f2)
                       : "ir" (flag));
 
@@ -188,18 +189,22 @@ static int __cpuinit have_cpuid_p(void)
 
 static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
 {
-        if (cpu_has(c, X86_FEATURE_PN) && disable_x86_serial_nr) {
-                /* Disable processor serial number */
-                unsigned long lo, hi;
-                rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
-                lo |= 0x200000;
-                wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
-                printk(KERN_NOTICE "CPU serial number disabled.\n");
-                clear_cpu_cap(c, X86_FEATURE_PN);
-
-                /* Disabling the serial number may affect the cpuid level */
-                c->cpuid_level = cpuid_eax(0);
-        }
+        unsigned long lo, hi;
+
+        if (!cpu_has(c, X86_FEATURE_PN) || !disable_x86_serial_nr)
+                return;
+
+        /* Disable processor serial number: */
+
+        rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
+        lo |= 0x200000;
+        wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
+
+        printk(KERN_NOTICE "CPU serial number disabled.\n");
+        clear_cpu_cap(c, X86_FEATURE_PN);
+
+        /* Disabling the serial number may affect the cpuid level */
+        c->cpuid_level = cpuid_eax(0);
 }
 
 static int __init x86_serial_nr_setup(char *s)
@@ -232,6 +237,7 @@ struct cpuid_dependent_feature {
         u32 feature;
         u32 level;
 };
+
 static const struct cpuid_dependent_feature __cpuinitconst
 cpuid_dependent_features[] = {
         { X86_FEATURE_MWAIT,            0x00000005 },
@@ -243,7 +249,11 @@ cpuid_dependent_features[] = {
 static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
 {
         const struct cpuid_dependent_feature *df;
+
         for (df = cpuid_dependent_features; df->feature; df++) {
+
+                if (!cpu_has(c, df->feature))
+                        continue;
                 /*
                  * Note: cpuid_level is set to -1 if unavailable, but
                  * extended_extended_level is set to 0 if unavailable
@@ -251,32 +261,32 @@ static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
                  * when signed; hence the weird messing around with
                  * signs here...
                  */
-                if (cpu_has(c, df->feature) &&
-                    ((s32)df->level < 0 ?
+                if (!((s32)df->level < 0 ?
                      (u32)df->level > (u32)c->extended_cpuid_level :
-                     (s32)df->level > (s32)c->cpuid_level)) {
-                        clear_cpu_cap(c, df->feature);
-                        if (warn)
-                                printk(KERN_WARNING
-                                       "CPU: CPU feature %s disabled "
-                                       "due to lack of CPUID level 0x%x\n",
-                                       x86_cap_flags[df->feature],
-                                       df->level);
-                }
+                     (s32)df->level > (s32)c->cpuid_level))
+                        continue;
+
+                clear_cpu_cap(c, df->feature);
+                if (!warn)
+                        continue;
+
+                printk(KERN_WARNING
+                       "CPU: CPU feature %s disabled, no CPUID level 0x%x\n",
+                                x86_cap_flags[df->feature], df->level);
         }
 }
 
 /*
  * Naming convention should be: <Name> [(<Codename>)]
  * This table only is used unless init_<vendor>() below doesn't set it;
- * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used
- *
+ * in particular, if CPUID levels 0x80000002..4 are supported, this
+ * isn't used
  */
 
 /* Look up CPU names by table lookup. */
-static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c)
+static const char *__cpuinit table_lookup_model(struct cpuinfo_x86 *c)
 {
-        struct cpu_model_info *info;
+        const struct cpu_model_info *info;
 
         if (c->x86_model >= 16)
                 return NULL;    /* Range check */
@@ -307,8 +317,10 @@ void load_percpu_segment(int cpu)
         load_stack_canary_segment();
 }
 
-/* Current gdt points %fs at the "master" per-cpu area: after this,
- * it's on the real one. */
+/*
+ * Current gdt points %fs at the "master" per-cpu area: after this,
+ * it's on the real one.
+ */
 void switch_to_new_gdt(int cpu)
 {
         struct desc_ptr gdt_descr;
@@ -321,7 +333,7 @@ void switch_to_new_gdt(int cpu)
         load_percpu_segment(cpu);
 }
 
-static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {};
+static const struct cpu_dev *__cpuinitdata cpu_devs[X86_VENDOR_NUM] = {};
 
 static void __cpuinit default_init(struct cpuinfo_x86 *c)
 {
@@ -340,7 +352,7 @@ static void __cpuinit default_init(struct cpuinfo_x86 *c)
 #endif
 }
 
-static struct cpu_dev __cpuinitdata default_cpu = {
+static const struct cpu_dev __cpuinitconst default_cpu = {
         .c_init = default_init,
         .c_vendor = "Unknown",
         .c_x86_vendor = X86_VENDOR_UNKNOWN,
@@ -354,22 +366,24 @@ static void __cpuinit get_model_name(struct cpuinfo_x86 *c)
         if (c->extended_cpuid_level < 0x80000004)
                 return;
 
-        v = (unsigned int *) c->x86_model_id;
+        v = (unsigned int *)c->x86_model_id;
         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
         c->x86_model_id[48] = 0;
 
-        /* Intel chips right-justify this string for some dumb reason;
-           undo that brain damage */
+        /*
+         * Intel chips right-justify this string for some dumb reason;
+         * undo that brain damage:
+         */
         p = q = &c->x86_model_id[0];
         while (*p == ' ')
-             p++;
+                p++;
         if (p != q) {
-             while (*p)
-                  *q++ = *p++;
-             while (q <= &c->x86_model_id[48])
-                  *q++ = '\0';  /* Zero-pad the rest */
+                while (*p)
+                        *q++ = *p++;
+                while (q <= &c->x86_model_id[48])
+                        *q++ = '\0';    /* Zero-pad the rest */
         }
 }
 
@@ -438,27 +452,30 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 
         if (smp_num_siblings == 1) {
                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
-        } else if (smp_num_siblings > 1) {
+                goto out;
+        }
 
-                if (smp_num_siblings > nr_cpu_ids) {
-                        printk(KERN_WARNING "CPU: Unsupported number of siblings %d",
-                                        smp_num_siblings);
-                        smp_num_siblings = 1;
-                        return;
-                }
+        if (smp_num_siblings <= 1)
+                goto out;
+
+        if (smp_num_siblings > nr_cpu_ids) {
+                pr_warning("CPU: Unsupported number of siblings %d",
+                           smp_num_siblings);
+                smp_num_siblings = 1;
+                return;
+        }
 
-                index_msb = get_count_order(smp_num_siblings);
-                c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb);
+        index_msb = get_count_order(smp_num_siblings);
+        c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb);
 
-                smp_num_siblings = smp_num_siblings / c->x86_max_cores;
+        smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 
-                index_msb = get_count_order(smp_num_siblings);
+        index_msb = get_count_order(smp_num_siblings);
 
-                core_bits = get_count_order(c->x86_max_cores);
+        core_bits = get_count_order(c->x86_max_cores);
 
-                c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
-                                               ((1 << core_bits) - 1);
-        }
+        c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
+                                       ((1 << core_bits) - 1);
 
 out:
         if ((c->x86_max_cores * smp_num_siblings) > 1) {
@@ -473,8 +490,8 @@ out:
 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
 {
         char *v = c->x86_vendor_id;
-        int i;
         static int printed;
+        int i;
 
         for (i = 0; i < X86_VENDOR_NUM; i++) {
                 if (!cpu_devs[i])
@@ -483,6 +500,7 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
                 if (!strcmp(v, cpu_devs[i]->c_ident[0]) ||
                     (cpu_devs[i]->c_ident[1] &&
                      !strcmp(v, cpu_devs[i]->c_ident[1]))) {
+
                         this_cpu = cpu_devs[i];
                         c->x86_vendor = this_cpu->c_x86_vendor;
                         return;
@@ -491,7 +509,9 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
 
         if (!printed) {
                 printed++;
-                printk(KERN_ERR "CPU: vendor_id '%s' unknown, using generic init.\n", v);
+                printk(KERN_ERR
+                    "CPU: vendor_id '%s' unknown, using generic init.\n", v);
+
                 printk(KERN_ERR "CPU: Your system may be unstable.\n");
         }
 
@@ -511,14 +531,17 @@ void __cpuinit cpu_detect(struct cpuinfo_x86 *c)
         /* Intel-defined flags: level 0x00000001 */
         if (c->cpuid_level >= 0x00000001) {
                 u32 junk, tfms, cap0, misc;
+
                 cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
                 c->x86 = (tfms >> 8) & 0xf;
                 c->x86_model = (tfms >> 4) & 0xf;
                 c->x86_mask = tfms & 0xf;
+
                 if (c->x86 == 0xf)
                         c->x86 += (tfms >> 20) & 0xff;
                 if (c->x86 >= 0x6)
                         c->x86_model += ((tfms >> 16) & 0xf) << 4;
+
                 if (cap0 & (1<<19)) {
                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
                         c->x86_cache_alignment = c->x86_clflush_size;
@@ -534,6 +557,7 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
         /* Intel-defined flags: level 0x00000001 */
         if (c->cpuid_level >= 0x00000001) {
                 u32 capability, excap;
+
                 cpuid(0x00000001, &tfms, &ebx, &excap, &capability);
                 c->x86_capability[0] = capability;
                 c->x86_capability[4] = excap;
@@ -542,6 +566,7 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
         /* AMD-defined flags: level 0x80000001 */
         xlvl = cpuid_eax(0x80000000);
         c->extended_cpuid_level = xlvl;
+
         if ((xlvl & 0xffff0000) == 0x80000000) {
                 if (xlvl >= 0x80000001) {
                         c->x86_capability[1] = cpuid_edx(0x80000001);
@@ -549,13 +574,15 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
                 }
         }
 
-#ifdef CONFIG_X86_64
         if (c->extended_cpuid_level >= 0x80000008) {
                 u32 eax = cpuid_eax(0x80000008);
 
                 c->x86_virt_bits = (eax >> 8) & 0xff;
                 c->x86_phys_bits = eax & 0xff;
         }
+#ifdef CONFIG_X86_32
+        else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
+                c->x86_phys_bits = 36;
 #endif
 
         if (c->extended_cpuid_level >= 0x80000007)
@@ -602,8 +629,12 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_64
         c->x86_clflush_size = 64;
+        c->x86_phys_bits = 36;
+        c->x86_virt_bits = 48;
 #else
         c->x86_clflush_size = 32;
+        c->x86_phys_bits = 32;
+        c->x86_virt_bits = 32;
 #endif
         c->x86_cache_alignment = c->x86_clflush_size;
 
@@ -634,12 +665,12 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
 
 void __init early_cpu_init(void)
 {
-        struct cpu_dev **cdev;
+        const struct cpu_dev *const *cdev;
         int count = 0;
 
-        printk("KERNEL supported cpus:\n");
+        printk(KERN_INFO "KERNEL supported cpus:\n");
         for (cdev = __x86_cpu_dev_start; cdev < __x86_cpu_dev_end; cdev++) {
-                struct cpu_dev *cpudev = *cdev;
+                const struct cpu_dev *cpudev = *cdev;
                 unsigned int j;
 
                 if (count >= X86_VENDOR_NUM)
@@ -650,7 +681,7 @@ void __init early_cpu_init(void)
                 for (j = 0; j < 2; j++) {
                         if (!cpudev->c_ident[j])
                                 continue;
-                        printk("  %s %s\n", cpudev->c_vendor,
+                        printk(KERN_INFO "  %s %s\n", cpudev->c_vendor,
                                 cpudev->c_ident[j]);
                 }
         }
@@ -726,9 +757,13 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
         c->x86_coreid_bits = 0;
 #ifdef CONFIG_X86_64
         c->x86_clflush_size = 64;
+        c->x86_phys_bits = 36;
+        c->x86_virt_bits = 48;
 #else
         c->cpuid_level = -1;    /* CPUID not detected */
         c->x86_clflush_size = 32;
+        c->x86_phys_bits = 32;
+        c->x86_virt_bits = 32;
 #endif
         c->x86_cache_alignment = c->x86_clflush_size;
         memset(&c->x86_capability, 0, sizeof c->x86_capability);
@@ -759,8 +794,8 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
         squash_the_stupid_serial_number(c);
 
         /*
-         * The vendor-specific functions might have changed features.  Now
-         * we do "generic changes."
+         * The vendor-specific functions might have changed features.
+         * Now we do "generic changes."
          */
 
         /* Filter out anything that depends on CPUID levels we don't have */
@@ -768,7 +803,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
 
         /* If the model name is still unset, do table lookup. */
         if (!c->x86_model_id[0]) {
-                char *p;
+                const char *p;
                 p = table_lookup_model(c);
                 if (p)
                         strcpy(c->x86_model_id, p);
@@ -843,11 +878,11 @@ void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
 }
 
 struct msr_range {
-        unsigned min;
-        unsigned max;
+        unsigned        min;
+        unsigned        max;
 };
 
-static struct msr_range msr_range_array[] __cpuinitdata = {
+static const struct msr_range msr_range_array[] __cpuinitconst = {
         { 0x00000000, 0x00000418},
         { 0xc0000000, 0xc000040b},
         { 0xc0010000, 0xc0010142},
@@ -856,14 +891,15 @@ static struct msr_range msr_range_array[] __cpuinitdata = {
 
 static void __cpuinit print_cpu_msr(void)
 {
+        unsigned index_min, index_max;
         unsigned index;
         u64 val;
         int i;
-        unsigned index_min, index_max;
 
         for (i = 0; i < ARRAY_SIZE(msr_range_array); i++) {
                 index_min = msr_range_array[i].min;
                 index_max = msr_range_array[i].max;
+
                 for (index = index_min; index < index_max; index++) {
                         if (rdmsrl_amd_safe(index, &val))
                                 continue;
@@ -873,6 +909,7 @@ static void __cpuinit print_cpu_msr(void)
 }
 
 static int show_msr __cpuinitdata;
+
 static __init int setup_show_msr(char *arg)
 {
         int num;
@@ -894,12 +931,14 @@ __setup("noclflush", setup_noclflush);
 
 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
 {
-        char *vendor = NULL;
+        const char *vendor = NULL;
 
-        if (c->x86_vendor < X86_VENDOR_NUM)
+        if (c->x86_vendor < X86_VENDOR_NUM) {
                 vendor = this_cpu->c_vendor;
-        else if (c->cpuid_level >= 0)
-                vendor = c->x86_vendor_id;
+        } else {
+                if (c->cpuid_level >= 0)
+                        vendor = c->x86_vendor_id;
+        }
 
         if (vendor && !strstr(c->x86_model_id, vendor))
                 printk(KERN_CONT "%s ", vendor);
@@ -926,10 +965,12 @@ void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
 static __init int setup_disablecpuid(char *arg)
 {
         int bit;
+
         if (get_option(&arg, &bit) && bit < NCAPINTS*32)
                 setup_clear_cpu_cap(bit);
         else
                 return 0;
+
         return 1;
 }
 __setup("clearcpuid=", setup_disablecpuid);
@@ -939,6 +980,7 @@ struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
 
 DEFINE_PER_CPU_FIRST(union irq_stack_union,
                      irq_stack_union) __aligned(PAGE_SIZE);
+
 DEFINE_PER_CPU(char *, irq_stack_ptr) =
         init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64;
 
@@ -948,12 +990,21 @@ EXPORT_PER_CPU_SYMBOL(kernel_stack);
 
 DEFINE_PER_CPU(unsigned int, irq_count) = -1;
 
+/*
+ * Special IST stacks which the CPU switches to when it calls
+ * an IST-marked descriptor entry. Up to 7 stacks (hardware
+ * limit), all of them are 4K, except the debug stack which
+ * is 8K.
+ */
+static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = {
+          [0 ... N_EXCEPTION_STACKS - 1]        = EXCEPTION_STKSZ,
+          [DEBUG_STACK - 1]                     = DEBUG_STKSZ
+};
+
 static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
         [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ])
         __aligned(PAGE_SIZE);
 
-extern asmlinkage void ignore_sysret(void);
-
 /* May not be marked __init: used by software suspend */
 void syscall_init(void)
 {
@@ -983,7 +1034,7 @@ unsigned long kernel_eflags;
  */
 DEFINE_PER_CPU(struct orig_ist, orig_ist);
 
-#else   /* x86_64 */
+#else   /* CONFIG_X86_64 */
 
 #ifdef CONFIG_CC_STACKPROTECTOR
 DEFINE_PER_CPU(unsigned long, stack_canary);
@@ -995,9 +1046,26 @@ struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
         memset(regs, 0, sizeof(struct pt_regs));
         regs->fs = __KERNEL_PERCPU;
         regs->gs = __KERNEL_STACK_CANARY;
+
         return regs;
 }
-#endif  /* x86_64 */
+#endif  /* CONFIG_X86_64 */
+
+/*
+ * Clear all 6 debug registers:
+ */
+static void clear_all_debug_regs(void)
+{
+        int i;
+
+        for (i = 0; i < 8; i++) {
+                /* Ignore db4, db5 */
+                if ((i == 4) || (i == 5))
+                        continue;
+
+                set_debugreg(0, i);
+        }
+}
 
 /*
  * cpu_init() initializes state that is per-CPU. Some data is already
@@ -1007,15 +1075,20 @@ struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
  * A lot of state is already set up in PDA init for 64 bit
  */
 #ifdef CONFIG_X86_64
+
 void __cpuinit cpu_init(void)
 {
-        int cpu = stack_smp_processor_id();
-        struct tss_struct *t = &per_cpu(init_tss, cpu);
-        struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
-        unsigned long v;
+        struct orig_ist *orig_ist;
         struct task_struct *me;
+        struct tss_struct *t;
+        unsigned long v;
+        int cpu;
         int i;
 
+        cpu = stack_smp_processor_id();
+        t = &per_cpu(init_tss, cpu);
+        orig_ist = &per_cpu(orig_ist, cpu);
+
 #ifdef CONFIG_NUMA
         if (cpu != 0 && percpu_read(node_number) == 0 &&
             cpu_to_node(cpu) != NUMA_NO_NODE)
@@ -1056,19 +1129,17 @@ void __cpuinit cpu_init(void)
          * set up and load the per-CPU TSS
          */
         if (!orig_ist->ist[0]) {
-                static const unsigned int sizes[N_EXCEPTION_STACKS] = {
-                  [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STKSZ,
-                  [DEBUG_STACK - 1] = DEBUG_STKSZ
-                };
                 char *estacks = per_cpu(exception_stacks, cpu);
+
                 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
-                        estacks += sizes[v];
+                        estacks += exception_stack_sizes[v];
                         orig_ist->ist[v] = t->x86_tss.ist[v] =
                                         (unsigned long)estacks;
                 }
         }
 
         t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
+
         /*
          * <= is required because the CPU will access up to
          * 8 bits beyond the end of the IO permission bitmap.
@@ -1078,8 +1149,7 @@ void __cpuinit cpu_init(void)
 
         atomic_inc(&init_mm.mm_count);
         me->active_mm = &init_mm;
-        if (me->mm)
-                BUG();
+        BUG_ON(me->mm);
         enter_lazy_tlb(&init_mm, me);
 
         load_sp0(t, &current->thread);
@@ -1098,17 +1168,7 @@ void __cpuinit cpu_init(void)
                 arch_kgdb_ops.correct_hw_break();
         else
 #endif
-        {
-                /*
-                 * Clear all 6 debug registers:
-                 */
-                set_debugreg(0UL, 0);
-                set_debugreg(0UL, 1);
-                set_debugreg(0UL, 2);
-                set_debugreg(0UL, 3);
-                set_debugreg(0UL, 6);
-                set_debugreg(0UL, 7);
-        }
+                clear_all_debug_regs();
 
         fpu_init();
 
@@ -1129,7 +1189,8 @@ void __cpuinit cpu_init(void)
 
         if (cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)) {
                 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu);
-                for (;;) local_irq_enable();
+                for (;;)
+                        local_irq_enable();
         }
 
         printk(KERN_INFO "Initializing CPU#%d\n", cpu);
@@ -1145,8 +1206,7 @@ void __cpuinit cpu_init(void)
          */
         atomic_inc(&init_mm.mm_count);
         curr->active_mm = &init_mm;
-        if (curr->mm)
-                BUG();
+        BUG_ON(curr->mm);
         enter_lazy_tlb(&init_mm, curr);
 
         load_sp0(t, thread);
@@ -1159,13 +1219,7 @@ void __cpuinit cpu_init(void)
         __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
 #endif
 
-        /* Clear all 6 debug registers: */
-        set_debugreg(0, 0);
-        set_debugreg(0, 1);
-        set_debugreg(0, 2);
-        set_debugreg(0, 3);
-        set_debugreg(0, 6);
-        set_debugreg(0, 7);
+        clear_all_debug_regs();
 
         /*
          * Force FPU initialization:
@@ -1185,6 +1239,4 @@ void __cpuinit cpu_init(void)
 
         xsave_init();
 }
-
-
 #endif
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index de4094a39210..6de9a908e400 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -3,33 +3,34 @@
 #define ARCH_X86_CPU_H
 
 struct cpu_model_info {
-        int vendor;
-        int family;
-        char *model_names[16];
+        int             vendor;
+        int             family;
+        const char      *model_names[16];
 };
 
 /* attempt to consolidate cpu attributes */
 struct cpu_dev {
-        char    * c_vendor;
+        const char      *c_vendor;
 
         /* some have two possibilities for cpuid string */
-        char    * c_ident[2];   
+        const char      *c_ident[2];
 
         struct          cpu_model_info c_models[4];
 
-        void            (*c_early_init)(struct cpuinfo_x86 *c);
-        void            (*c_init)(struct cpuinfo_x86 * c);
-        void            (*c_identify)(struct cpuinfo_x86 * c);
-        unsigned int    (*c_size_cache)(struct cpuinfo_x86 * c, unsigned int size);
-        int     c_x86_vendor;
+        void            (*c_early_init)(struct cpuinfo_x86 *);
+        void            (*c_init)(struct cpuinfo_x86 *);
+        void            (*c_identify)(struct cpuinfo_x86 *);
+        unsigned int    (*c_size_cache)(struct cpuinfo_x86 *, unsigned int);
+        int             c_x86_vendor;
 };
 
 #define cpu_dev_register(cpu_devX) \
-        static struct cpu_dev *__cpu_dev_##cpu_devX __used \
+        static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \
         __attribute__((__section__(".x86_cpu_dev.init"))) = \
         &cpu_devX;
 
-extern struct cpu_dev *__x86_cpu_dev_start[], *__x86_cpu_dev_end[];
+extern const struct cpu_dev *const __x86_cpu_dev_start[],
+                            *const __x86_cpu_dev_end[];
 
 extern void display_cacheinfo(struct cpuinfo_x86 *c);
 
diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c
new file mode 100755
index 000000000000..46e29ab96c6a
--- /dev/null
+++ b/arch/x86/kernel/cpu/cpu_debug.c
@@ -0,0 +1,901 @@
+/*
+ * CPU x86 architecture debug code
+ *
+ * Copyright(C) 2009 Jaswinder Singh Rajput
+ *
+ * For licencing details see kernel-base/COPYING
+ */
+
+#include <linux/interrupt.h>
+#include <linux/compiler.h>
+#include <linux/seq_file.h>
+#include <linux/debugfs.h>
+#include <linux/kprobes.h>
+#include <linux/uaccess.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/percpu.h>
+#include <linux/signal.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/smp.h>
+
+#include <asm/cpu_debug.h>
+#include <asm/paravirt.h>
+#include <asm/system.h>
+#include <asm/traps.h>
+#include <asm/apic.h>
+#include <asm/desc.h>
+
+static DEFINE_PER_CPU(struct cpu_cpuX_base, cpu_arr[CPU_REG_ALL_BIT]);
+static DEFINE_PER_CPU(struct cpu_private *, priv_arr[MAX_CPU_FILES]);
+static DEFINE_PER_CPU(unsigned, cpu_modelflag);
+static DEFINE_PER_CPU(int, cpu_priv_count);
+static DEFINE_PER_CPU(unsigned, cpu_model);
+
+static DEFINE_MUTEX(cpu_debug_lock);
+
+static struct dentry *cpu_debugfs_dir;
+
+static struct cpu_debug_base cpu_base[] = {
+        { "mc",         CPU_MC,         0       },
+        { "monitor",    CPU_MONITOR,    0       },
+        { "time",       CPU_TIME,       0       },
+        { "pmc",        CPU_PMC,        1       },
+        { "platform",   CPU_PLATFORM,   0       },
+        { "apic",       CPU_APIC,       0       },
+        { "poweron",    CPU_POWERON,    0       },
+        { "control",    CPU_CONTROL,    0       },
+        { "features",   CPU_FEATURES,   0       },
+        { "lastbranch", CPU_LBRANCH,    0       },
+        { "bios",       CPU_BIOS,       0       },
+        { "freq",       CPU_FREQ,       0       },
+        { "mtrr",       CPU_MTRR,       0       },
+        { "perf",       CPU_PERF,       0       },
+        { "cache",      CPU_CACHE,      0       },
+        { "sysenter",   CPU_SYSENTER,   0       },
+        { "therm",      CPU_THERM,      0       },
+        { "misc",       CPU_MISC,       0       },
+        { "debug",      CPU_DEBUG,      0       },
+        { "pat",        CPU_PAT,        0       },
+        { "vmx",        CPU_VMX,        0       },
+        { "call",       CPU_CALL,       0       },
+        { "base",       CPU_BASE,       0       },
+        { "ver",        CPU_VER,        0       },
+        { "conf",       CPU_CONF,       0       },
+        { "smm",        CPU_SMM,        0       },
+        { "svm",        CPU_SVM,        0       },
+        { "osvm",       CPU_OSVM,       0       },
+        { "tss",        CPU_TSS,        0       },
+        { "cr",         CPU_CR,         0       },
+        { "dt",         CPU_DT,         0       },
+        { "registers",  CPU_REG_ALL,    0       },
+};
+
+static struct cpu_file_base cpu_file[] = {
+        { "index",      CPU_REG_ALL,    0       },
+        { "value",      CPU_REG_ALL,    1       },
+};
+
+/* Intel Registers Range */
+static struct cpu_debug_range cpu_intel_range[] = {
+        { 0x00000000, 0x00000001, CPU_MC,       CPU_INTEL_ALL           },
+        { 0x00000006, 0x00000007, CPU_MONITOR,  CPU_CX_AT_XE            },
+        { 0x00000010, 0x00000010, CPU_TIME,     CPU_INTEL_ALL           },
+        { 0x00000011, 0x00000013, CPU_PMC,      CPU_INTEL_PENTIUM       },
+        { 0x00000017, 0x00000017, CPU_PLATFORM, CPU_PX_CX_AT_XE         },
+        { 0x0000001B, 0x0000001B, CPU_APIC,     CPU_P6_CX_AT_XE         },
+
+        { 0x0000002A, 0x0000002A, CPU_POWERON,  CPU_PX_CX_AT_XE         },
+        { 0x0000002B, 0x0000002B, CPU_POWERON,  CPU_INTEL_XEON          },
+        { 0x0000002C, 0x0000002C, CPU_FREQ,     CPU_INTEL_XEON          },
+        { 0x0000003A, 0x0000003A, CPU_CONTROL,  CPU_CX_AT_XE            },
+
+        { 0x00000040, 0x00000043, CPU_LBRANCH,  CPU_PM_CX_AT_XE         },
+        { 0x00000044, 0x00000047, CPU_LBRANCH,  CPU_PM_CO_AT            },
+        { 0x00000060, 0x00000063, CPU_LBRANCH,  CPU_C2_AT               },
+        { 0x00000064, 0x00000067, CPU_LBRANCH,  CPU_INTEL_ATOM          },
+
+        { 0x00000079, 0x00000079, CPU_BIOS,     CPU_P6_CX_AT_XE         },
+        { 0x00000088, 0x0000008A, CPU_CACHE,    CPU_INTEL_P6            },
+        { 0x0000008B, 0x0000008B, CPU_BIOS,     CPU_P6_CX_AT_XE         },
+        { 0x0000009B, 0x0000009B, CPU_MONITOR,  CPU_INTEL_XEON          },
+
+        { 0x000000C1, 0x000000C2, CPU_PMC,      CPU_P6_CX_AT            },
+        { 0x000000CD, 0x000000CD, CPU_FREQ,     CPU_CX_AT               },
+        { 0x000000E7, 0x000000E8, CPU_PERF,     CPU_CX_AT               },
+        { 0x000000FE, 0x000000FE, CPU_MTRR,     CPU_P6_CX_XE            },
+
+        { 0x00000116, 0x00000116, CPU_CACHE,    CPU_INTEL_P6            },
+        { 0x00000118, 0x00000118, CPU_CACHE,    CPU_INTEL_P6            },
+        { 0x00000119, 0x00000119, CPU_CACHE,    CPU_INTEL_PX            },
+        { 0x0000011A, 0x0000011B, CPU_CACHE,    CPU_INTEL_P6            },
+        { 0x0000011E, 0x0000011E, CPU_CACHE,    CPU_PX_CX_AT            },
+
+        { 0x00000174, 0x00000176, CPU_SYSENTER, CPU_P6_CX_AT_XE         },
+        { 0x00000179, 0x0000017A, CPU_MC,       CPU_PX_CX_AT_XE         },
+        { 0x0000017B, 0x0000017B, CPU_MC,       CPU_P6_XE               },
+        { 0x00000186, 0x00000187, CPU_PMC,      CPU_P6_CX_AT            },
+        { 0x00000198, 0x00000199, CPU_PERF,     CPU_PM_CX_AT_XE         },
+        { 0x0000019A, 0x0000019A, CPU_TIME,     CPU_PM_CX_AT_XE         },
+        { 0x0000019B, 0x0000019D, CPU_THERM,    CPU_PM_CX_AT_XE         },
+        { 0x000001A0, 0x000001A0, CPU_MISC,     CPU_PM_CX_AT_XE         },
+
+        { 0x000001C9, 0x000001C9, CPU_LBRANCH,  CPU_PM_CX_AT            },
+        { 0x000001D7, 0x000001D8, CPU_LBRANCH,  CPU_INTEL_XEON          },
+        { 0x000001D9, 0x000001D9, CPU_DEBUG,    CPU_CX_AT_XE            },
+        { 0x000001DA, 0x000001DA, CPU_LBRANCH,  CPU_INTEL_XEON          },
+        { 0x000001DB, 0x000001DB, CPU_LBRANCH,  CPU_P6_XE               },
+        { 0x000001DC, 0x000001DC, CPU_LBRANCH,  CPU_INTEL_P6            },
+        { 0x000001DD, 0x000001DE, CPU_LBRANCH,  CPU_PX_CX_AT_XE         },
+        { 0x000001E0, 0x000001E0, CPU_LBRANCH,  CPU_INTEL_P6            },
+
+        { 0x00000200, 0x0000020F, CPU_MTRR,     CPU_P6_CX_XE            },
+        { 0x00000250, 0x00000250, CPU_MTRR,     CPU_P6_CX_XE            },
+        { 0x00000258, 0x00000259, CPU_MTRR,     CPU_P6_CX_XE            },
+        { 0x00000268, 0x0000026F, CPU_MTRR,     CPU_P6_CX_XE            },
+        { 0x00000277, 0x00000277, CPU_PAT,      CPU_C2_AT_XE            },
+        { 0x000002FF, 0x000002FF, CPU_MTRR,     CPU_P6_CX_XE            },
+
+        { 0x00000300, 0x00000308, CPU_PMC,      CPU_INTEL_XEON          },
+        { 0x00000309, 0x0000030B, CPU_PMC,      CPU_C2_AT_XE            },
+        { 0x0000030C, 0x00000311, CPU_PMC,      CPU_INTEL_XEON          },
+        { 0x00000345, 0x00000345, CPU_PMC,      CPU_C2_AT               },
+        { 0x00000360, 0x00000371, CPU_PMC,      CPU_INTEL_XEON          },
+        { 0x0000038D, 0x00000390, CPU_PMC,      CPU_C2_AT               },
+        { 0x000003A0, 0x000003BE, CPU_PMC,      CPU_INTEL_XEON          },
+        { 0x000003C0, 0x000003CD, CPU_PMC,      CPU_INTEL_XEON          },
+        { 0x000003E0, 0x000003E1, CPU_PMC,      CPU_INTEL_XEON          },
+        { 0x000003F0, 0x000003F0, CPU_PMC,      CPU_INTEL_XEON          },
+        { 0x000003F1, 0x000003F1, CPU_PMC,      CPU_C2_AT_XE            },
+        { 0x000003F2, 0x000003F2, CPU_PMC,      CPU_INTEL_XEON          },
+
+        { 0x00000400, 0x00000402, CPU_MC,       CPU_PM_CX_AT_XE         },
+        { 0x00000403, 0x00000403, CPU_MC,       CPU_INTEL_XEON          },
+        { 0x00000404, 0x00000406, CPU_MC,       CPU_PM_CX_AT_XE         },
+        { 0x00000407, 0x00000407, CPU_MC,       CPU_INTEL_XEON          },
+        { 0x00000408, 0x0000040A, CPU_MC,       CPU_PM_CX_AT_XE         },
+        { 0x0000040B, 0x0000040B, CPU_MC,       CPU_INTEL_XEON          },
+        { 0x0000040C, 0x0000040E, CPU_MC,       CPU_PM_CX_XE            },
+        { 0x0000040F, 0x0000040F, CPU_MC,       CPU_INTEL_XEON          },
+        { 0x00000410, 0x00000412, CPU_MC,       CPU_PM_CX_AT_XE         },
+        { 0x00000413, 0x00000417, CPU_MC,       CPU_CX_AT_XE            },
+        { 0x00000480, 0x0000048B, CPU_VMX,      CPU_CX_AT_XE            },
+
+        { 0x00000600, 0x00000600, CPU_DEBUG,    CPU_PM_CX_AT_XE         },
+        { 0x00000680, 0x0000068F, CPU_LBRANCH,  CPU_INTEL_XEON          },
+        { 0x000006C0, 0x000006CF, CPU_LBRANCH,  CPU_INTEL_XEON          },
+
+        { 0x000107CC, 0x000107D3, CPU_PMC,      CPU_INTEL_XEON_MP       },
+
+        { 0xC0000080, 0xC0000080, CPU_FEATURES, CPU_INTEL_XEON          },
+        { 0xC0000081, 0xC0000082, CPU_CALL,     CPU_INTEL_XEON          },
+        { 0xC0000084, 0xC0000084, CPU_CALL,     CPU_INTEL_XEON          },
+        { 0xC0000100, 0xC0000102, CPU_BASE,     CPU_INTEL_XEON          },
+};
+
+/* AMD Registers Range */
+static struct cpu_debug_range cpu_amd_range[] = {
+        { 0x00000000, 0x00000001, CPU_MC,       CPU_K10_PLUS,           },
+        { 0x00000010, 0x00000010, CPU_TIME,     CPU_K8_PLUS,            },
+        { 0x0000001B, 0x0000001B, CPU_APIC,     CPU_K8_PLUS,            },
+        { 0x0000002A, 0x0000002A, CPU_POWERON,  CPU_K7_PLUS             },
+        { 0x0000008B, 0x0000008B, CPU_VER,      CPU_K8_PLUS             },
+        { 0x000000FE, 0x000000FE, CPU_MTRR,     CPU_K8_PLUS,            },
+
+        { 0x00000174, 0x00000176, CPU_SYSENTER, CPU_K8_PLUS,            },
+        { 0x00000179, 0x0000017B, CPU_MC,       CPU_K8_PLUS,            },
+        { 0x000001D9, 0x000001D9, CPU_DEBUG,    CPU_K8_PLUS,            },
+        { 0x000001DB, 0x000001DE, CPU_LBRANCH,  CPU_K8_PLUS,            },
+
+        { 0x00000200, 0x0000020F, CPU_MTRR,     CPU_K8_PLUS,            },
+        { 0x00000250, 0x00000250, CPU_MTRR,     CPU_K8_PLUS,            },
+        { 0x00000258, 0x00000259, CPU_MTRR,     CPU_K8_PLUS,            },
+        { 0x00000268, 0x0000026F, CPU_MTRR,     CPU_K8_PLUS,            },
+        { 0x00000277, 0x00000277, CPU_PAT,      CPU_K8_PLUS,            },
+        { 0x000002FF, 0x000002FF, CPU_MTRR,     CPU_K8_PLUS,            },
+
+        { 0x00000400, 0x00000413, CPU_MC,       CPU_K8_PLUS,            },
+
+        { 0xC0000080, 0xC0000080, CPU_FEATURES, CPU_AMD_ALL,            },
+        { 0xC0000081, 0xC0000084, CPU_CALL,     CPU_K8_PLUS,            },
+        { 0xC0000100, 0xC0000102, CPU_BASE,     CPU_K8_PLUS,            },
+        { 0xC0000103, 0xC0000103, CPU_TIME,     CPU_K10_PLUS,           },
+
+        { 0xC0010000, 0xC0010007, CPU_PMC,      CPU_K8_PLUS,            },
+        { 0xC0010010, 0xC0010010, CPU_CONF,     CPU_K7_PLUS,            },
+        { 0xC0010015, 0xC0010015, CPU_CONF,     CPU_K7_PLUS,            },
+        { 0xC0010016, 0xC001001A, CPU_MTRR,     CPU_K8_PLUS,            },
+        { 0xC001001D, 0xC001001D, CPU_MTRR,     CPU_K8_PLUS,            },
+        { 0xC001001F, 0xC001001F, CPU_CONF,     CPU_K8_PLUS,            },
+        { 0xC0010030, 0xC0010035, CPU_BIOS,     CPU_K8_PLUS,            },
+        { 0xC0010044, 0xC0010048, CPU_MC,       CPU_K8_PLUS,            },
+        { 0xC0010050, 0xC0010056, CPU_SMM,      CPU_K0F_PLUS,           },
+        { 0xC0010058, 0xC0010058, CPU_CONF,     CPU_K10_PLUS,           },
+        { 0xC0010060, 0xC0010060, CPU_CACHE,    CPU_AMD_11,             },
+        { 0xC0010061, 0xC0010068, CPU_SMM,      CPU_K10_PLUS,           },
+        { 0xC0010069, 0xC001006B, CPU_SMM,      CPU_AMD_11,             },
+        { 0xC0010070, 0xC0010071, CPU_SMM,      CPU_K10_PLUS,           },
+        { 0xC0010111, 0xC0010113, CPU_SMM,      CPU_K8_PLUS,            },
+        { 0xC0010114, 0xC0010118, CPU_SVM,      CPU_K10_PLUS,           },
+        { 0xC0010140, 0xC0010141, CPU_OSVM,     CPU_K10_PLUS,           },
+        { 0xC0011022, 0xC0011023, CPU_CONF,     CPU_K10_PLUS,           },
+};
+
+
+/* Intel */
+static int get_intel_modelflag(unsigned model)
+{
+        int flag;
+
+        switch (model) {
+        case 0x0501:
+        case 0x0502:
+        case 0x0504:
+                flag = CPU_INTEL_PENTIUM;
+                break;
+        case 0x0601:
+        case 0x0603:
+        case 0x0605:
+        case 0x0607:
+        case 0x0608:
+        case 0x060A:
+        case 0x060B:
+                flag = CPU_INTEL_P6;
+                break;
+        case 0x0609:
+        case 0x060D:
+                flag = CPU_INTEL_PENTIUM_M;
+                break;
+        case 0x060E:
+                flag = CPU_INTEL_CORE;
+                break;
+        case 0x060F:
+        case 0x0617:
+                flag = CPU_INTEL_CORE2;
+                break;
+        case 0x061C:
+                flag = CPU_INTEL_ATOM;
+                break;
+        case 0x0F00:
+        case 0x0F01:
+        case 0x0F02:
+        case 0x0F03:
+        case 0x0F04:
+                flag = CPU_INTEL_XEON_P4;
+                break;
+        case 0x0F06:
+                flag = CPU_INTEL_XEON_MP;
+                break;
+        default:
+                flag = CPU_NONE;
+                break;
+        }
+
+        return flag;
+}
+
+/* AMD */
+static int get_amd_modelflag(unsigned model)
+{
+        int flag;
+
+        switch (model >> 8) {
+        case 0x6:
+                flag = CPU_AMD_K6;
+                break;
+        case 0x7:
+                flag = CPU_AMD_K7;
+                break;
+        case 0x8:
+                flag = CPU_AMD_K8;
+                break;
+        case 0xf:
+                flag = CPU_AMD_0F;
+                break;
+        case 0x10:
+                flag = CPU_AMD_10;
+                break;
+        case 0x11:
+                flag = CPU_AMD_11;
+                break;
+        default:
+                flag = CPU_NONE;
+                break;
+        }
+
+        return flag;
+}
+
+static int get_cpu_modelflag(unsigned cpu)
+{
+        int flag;
+
+        flag = per_cpu(cpu_model, cpu);
+
+        switch (flag >> 16) {
+        case X86_VENDOR_INTEL:
+                flag = get_intel_modelflag(flag);
+                break;
+        case X86_VENDOR_AMD:
+                flag = get_amd_modelflag(flag & 0xffff);
+                break;
+        default:
+                flag = CPU_NONE;
+                break;
+        }
+
+        return flag;
+}
+
+static int get_cpu_range_count(unsigned cpu)
+{
+        int index;
+
+        switch (per_cpu(cpu_model, cpu) >> 16) {
+        case X86_VENDOR_INTEL:
+                index = ARRAY_SIZE(cpu_intel_range);
+                break;
+        case X86_VENDOR_AMD:
+                index = ARRAY_SIZE(cpu_amd_range);
+                break;
+        default:
+                index = 0;
+                break;
+        }
+
+        return index;
+}
+
+static int is_typeflag_valid(unsigned cpu, unsigned flag)
+{
+        unsigned vendor, modelflag;
+        int i, index;
+
+        /* Standard Registers should be always valid */
+        if (flag >= CPU_TSS)
+                return 1;
+
+        modelflag = per_cpu(cpu_modelflag, cpu);
+        vendor = per_cpu(cpu_model, cpu) >> 16;
+        index = get_cpu_range_count(cpu);
+
+        for (i = 0; i < index; i++) {
+                switch (vendor) {
+                case X86_VENDOR_INTEL:
+                        if ((cpu_intel_range[i].model & modelflag) &&
+                            (cpu_intel_range[i].flag & flag))
+                                return 1;
+                        break;
+                case X86_VENDOR_AMD:
+                        if ((cpu_amd_range[i].model & modelflag) &&
+                            (cpu_amd_range[i].flag & flag))
+                                return 1;
+                        break;
+                }
+        }
+
+        /* Invalid */
+        return 0;
+}
+
+static unsigned get_cpu_range(unsigned cpu, unsigned *min, unsigned *max,
+                              int index, unsigned flag)
+{
+        unsigned modelflag;
+
+        modelflag = per_cpu(cpu_modelflag, cpu);
+        *max = 0;
+        switch (per_cpu(cpu_model, cpu) >> 16) {
+        case X86_VENDOR_INTEL:
+                if ((cpu_intel_range[index].model & modelflag) &&
+                    (cpu_intel_range[index].flag & flag)) {
+                        *min = cpu_intel_range[index].min;
+                        *max = cpu_intel_range[index].max;
+                }
+                break;
+        case X86_VENDOR_AMD:
+                if ((cpu_amd_range[index].model & modelflag) &&
+                    (cpu_amd_range[index].flag & flag)) {
+                        *min = cpu_amd_range[index].min;
+                        *max = cpu_amd_range[index].max;
+                }
+                break;
+        }
+
+        return *max;
+}
+
+/* This function can also be called with seq = NULL for printk */
+static void print_cpu_data(struct seq_file *seq, unsigned type,
+                           u32 low, u32 high)
+{
+        struct cpu_private *priv;
+        u64 val = high;
+
+        if (seq) {
+                priv = seq->private;
+                if (priv->file) {
+                        val = (val << 32) | low;
+                        seq_printf(seq, "0x%llx\n", val);
+                } else
+                        seq_printf(seq, " %08x: %08x_%08x\n",
+                                   type, high, low);
+        } else
+                printk(KERN_INFO " %08x: %08x_%08x\n", type, high, low);
+}
+
+/* This function can also be called with seq = NULL for printk */
+static void print_msr(struct seq_file *seq, unsigned cpu, unsigned flag)
+{
+        unsigned msr, msr_min, msr_max;
+        struct cpu_private *priv;
+        u32 low, high;
+        int i, range;
+
+        if (seq) {
+                priv = seq->private;
+                if (priv->file) {
+                        if (!rdmsr_safe_on_cpu(priv->cpu, priv->reg,
+                                               &low, &high))
+                                print_cpu_data(seq, priv->reg, low, high);
+                        return;
+                }
+        }
+
+        range = get_cpu_range_count(cpu);
+
+        for (i = 0; i < range; i++) {
+                if (!get_cpu_range(cpu, &msr_min, &msr_max, i, flag))
+                        continue;
+
+                for (msr = msr_min; msr <= msr_max; msr++) {
+                        if (rdmsr_safe_on_cpu(cpu, msr, &low, &high))
+                                continue;
+                        print_cpu_data(seq, msr, low, high);
+                }
+        }
+}
+
+static void print_tss(void *arg)
+{
+        struct pt_regs *regs = task_pt_regs(current);
+        struct seq_file *seq = arg;
+        unsigned int seg;
+
+        seq_printf(seq, " RAX\t: %016lx\n", regs->ax);
+        seq_printf(seq, " RBX\t: %016lx\n", regs->bx);
+        seq_printf(seq, " RCX\t: %016lx\n", regs->cx);
+        seq_printf(seq, " RDX\t: %016lx\n", regs->dx);
+
+        seq_printf(seq, " RSI\t: %016lx\n", regs->si);
+        seq_printf(seq, " RDI\t: %016lx\n", regs->di);
+        seq_printf(seq, " RBP\t: %016lx\n", regs->bp);
+        seq_printf(seq, " ESP\t: %016lx\n", regs->sp);
+
+#ifdef CONFIG_X86_64
+        seq_printf(seq, " R08\t: %016lx\n", regs->r8);
+        seq_printf(seq, " R09\t: %016lx\n", regs->r9);
+        seq_printf(seq, " R10\t: %016lx\n", regs->r10);
+        seq_printf(seq, " R11\t: %016lx\n", regs->r11);
+        seq_printf(seq, " R12\t: %016lx\n", regs->r12);
+        seq_printf(seq, " R13\t: %016lx\n", regs->r13);
+        seq_printf(seq, " R14\t: %016lx\n", regs->r14);
+        seq_printf(seq, " R15\t: %016lx\n", regs->r15);
+#endif
+
+        asm("movl %%cs,%0" : "=r" (seg));
+        seq_printf(seq, " CS\t:             %04x\n", seg);
+        asm("movl %%ds,%0" : "=r" (seg));
+        seq_printf(seq, " DS\t:             %04x\n", seg);
+        seq_printf(seq, " SS\t:             %04lx\n", regs->ss & 0xffff);
+        asm("movl %%es,%0" : "=r" (seg));
+        seq_printf(seq, " ES\t:             %04x\n", seg);
+        asm("movl %%fs,%0" : "=r" (seg));
+        seq_printf(seq, " FS\t:             %04x\n", seg);
+        asm("movl %%gs,%0" : "=r" (seg));
+        seq_printf(seq, " GS\t:             %04x\n", seg);
+
+        seq_printf(seq, " EFLAGS\t: %016lx\n", regs->flags);
+
+        seq_printf(seq, " EIP\t: %016lx\n", regs->ip);
+}
+
+static void print_cr(void *arg)
+{
+        struct seq_file *seq = arg;
+
+        seq_printf(seq, " cr0\t: %016lx\n", read_cr0());
+        seq_printf(seq, " cr2\t: %016lx\n", read_cr2());
+        seq_printf(seq, " cr3\t: %016lx\n", read_cr3());
+        seq_printf(seq, " cr4\t: %016lx\n", read_cr4_safe());
+#ifdef CONFIG_X86_64
+        seq_printf(seq, " cr8\t: %016lx\n", read_cr8());
+#endif
+}
+
+static void print_desc_ptr(char *str, struct seq_file *seq, struct desc_ptr dt)
+{
+        seq_printf(seq, " %s\t: %016llx\n", str, (u64)(dt.address | dt.size));
+}
+
+static void print_dt(void *seq)
+{
+        struct desc_ptr dt;
+        unsigned long ldt;
+
+        /* IDT */
+        store_idt((struct desc_ptr *)&dt);
+        print_desc_ptr("IDT", seq, dt);
+
+        /* GDT */
+        store_gdt((struct desc_ptr *)&dt);
+        print_desc_ptr("GDT", seq, dt);
+
+        /* LDT */
+        store_ldt(ldt);
+        seq_printf(seq, " LDT\t: %016lx\n", ldt);
+
+        /* TR */
+        store_tr(ldt);
+        seq_printf(seq, " TR\t: %016lx\n", ldt);
+}
+
+static void print_dr(void *arg)
+{
+        struct seq_file *seq = arg;
+        unsigned long dr;
+        int i;
+
+        for (i = 0; i < 8; i++) {
+                /* Ignore db4, db5 */
+                if ((i == 4) || (i == 5))
+                        continue;
+                get_debugreg(dr, i);
+                seq_printf(seq, " dr%d\t: %016lx\n", i, dr);
+        }
+
+        seq_printf(seq, "\n MSR\t:\n");
+}
+
+static void print_apic(void *arg)
+{
+        struct seq_file *seq = arg;
+
+#ifdef CONFIG_X86_LOCAL_APIC
+        seq_printf(seq, " LAPIC\t:\n");
+        seq_printf(seq, " ID\t\t: %08x\n",  apic_read(APIC_ID) >> 24);
+        seq_printf(seq, " LVR\t\t: %08x\n",  apic_read(APIC_LVR));
+        seq_printf(seq, " TASKPRI\t: %08x\n",  apic_read(APIC_TASKPRI));
+        seq_printf(seq, " ARBPRI\t\t: %08x\n",  apic_read(APIC_ARBPRI));
+        seq_printf(seq, " PROCPRI\t: %08x\n",  apic_read(APIC_PROCPRI));
+        seq_printf(seq, " LDR\t\t: %08x\n",  apic_read(APIC_LDR));
+        seq_printf(seq, " DFR\t\t: %08x\n",  apic_read(APIC_DFR));
+        seq_printf(seq, " SPIV\t\t: %08x\n",  apic_read(APIC_SPIV));
+        seq_printf(seq, " ISR\t\t: %08x\n",  apic_read(APIC_ISR));
+        seq_printf(seq, " ESR\t\t: %08x\n",  apic_read(APIC_ESR));
+        seq_printf(seq, " ICR\t\t: %08x\n",  apic_read(APIC_ICR));
+        seq_printf(seq, " ICR2\t\t: %08x\n",  apic_read(APIC_ICR2));
+        seq_printf(seq, " LVTT\t\t: %08x\n",  apic_read(APIC_LVTT));
+        seq_printf(seq, " LVTTHMR\t: %08x\n",  apic_read(APIC_LVTTHMR));
+        seq_printf(seq, " LVTPC\t\t: %08x\n",  apic_read(APIC_LVTPC));
+        seq_printf(seq, " LVT0\t\t: %08x\n",  apic_read(APIC_LVT0));
+        seq_printf(seq, " LVT1\t\t: %08x\n",  apic_read(APIC_LVT1));
+        seq_printf(seq, " LVTERR\t\t: %08x\n",  apic_read(APIC_LVTERR));
+        seq_printf(seq, " TMICT\t\t: %08x\n",  apic_read(APIC_TMICT));
+        seq_printf(seq, " TMCCT\t\t: %08x\n",  apic_read(APIC_TMCCT));
+        seq_printf(seq, " TDCR\t\t: %08x\n",  apic_read(APIC_TDCR));
+#endif /* CONFIG_X86_LOCAL_APIC */
+
+        seq_printf(seq, "\n MSR\t:\n");
+}
+
+static int cpu_seq_show(struct seq_file *seq, void *v)
+{
+        struct cpu_private *priv = seq->private;
+
+        if (priv == NULL)
+                return -EINVAL;
+
+        switch (cpu_base[priv->type].flag) {
+        case CPU_TSS:
+                smp_call_function_single(priv->cpu, print_tss, seq, 1);
+                break;
+        case CPU_CR:
+                smp_call_function_single(priv->cpu, print_cr, seq, 1);
+                break;
+        case CPU_DT:
+                smp_call_function_single(priv->cpu, print_dt, seq, 1);
+                break;
+        case CPU_DEBUG:
+                if (priv->file == CPU_INDEX_BIT)
+                        smp_call_function_single(priv->cpu, print_dr, seq, 1);
+                print_msr(seq, priv->cpu, cpu_base[priv->type].flag);
+                break;
+        case CPU_APIC:
+                if (priv->file == CPU_INDEX_BIT)
+                        smp_call_function_single(priv->cpu, print_apic, seq, 1);
+                print_msr(seq, priv->cpu, cpu_base[priv->type].flag);
+                break;
+
+        default:
+                print_msr(seq, priv->cpu, cpu_base[priv->type].flag);
+                break;
+        }
+        seq_printf(seq, "\n");
+
+        return 0;
+}
+
+static void *cpu_seq_start(struct seq_file *seq, loff_t *pos)
+{
+        if (*pos == 0) /* One time is enough ;-) */
+                return seq;
+
+        return NULL;
+}
+
+static void *cpu_seq_next(struct seq_file *seq, void *v, loff_t *pos)
+{
+        (*pos)++;
+
+        return cpu_seq_start(seq, pos);
+}
+
+static void cpu_seq_stop(struct seq_file *seq, void *v)
+{
+}
+
+static const struct seq_operations cpu_seq_ops = {
+        .start          = cpu_seq_start,
+        .next           = cpu_seq_next,
+        .stop           = cpu_seq_stop,
+        .show           = cpu_seq_show,
+};
+
+static int cpu_seq_open(struct inode *inode, struct file *file)
+{
+        struct cpu_private *priv = inode->i_private;
+        struct seq_file *seq;
+        int err;
+
+        err = seq_open(file, &cpu_seq_ops);
+        if (!err) {
+                seq = file->private_data;
+                seq->private = priv;
+        }
+
+        return err;
+}
+
+static int write_msr(struct cpu_private *priv, u64 val)
+{
+        u32 low, high;
+
+        high = (val >> 32) & 0xffffffff;
+        low = val & 0xffffffff;
+
+        if (!wrmsr_safe_on_cpu(priv->cpu, priv->reg, low, high))
+                return 0;
+
+        return -EPERM;
+}
+
+static int write_cpu_register(struct cpu_private *priv, const char *buf)
+{
+        int ret = -EPERM;
+        u64 val;
+
+        ret = strict_strtoull(buf, 0, &val);
+        if (ret < 0)
+                return ret;
+
+        /* Supporting only MSRs */
+        if (priv->type < CPU_TSS_BIT)
+                return write_msr(priv, val);
+
+        return ret;
+}
+
+static ssize_t cpu_write(struct file *file, const char __user *ubuf,
+                             size_t count, loff_t *off)
+{
+        struct seq_file *seq = file->private_data;
+        struct cpu_private *priv = seq->private;
+        char buf[19];
+
+        if ((priv == NULL) || (count >= sizeof(buf)))
+                return -EINVAL;
+
+        if (copy_from_user(&buf, ubuf, count))
+                return -EFAULT;
+
+        buf[count] = 0;
+
+        if ((cpu_base[priv->type].write) && (cpu_file[priv->file].write))
+                if (!write_cpu_register(priv, buf))
+                        return count;
+
+        return -EACCES;
+}
+
+static const struct file_operations cpu_fops = {
+        .owner          = THIS_MODULE,
+        .open           = cpu_seq_open,
+        .read           = seq_read,
+        .write          = cpu_write,
+        .llseek         = seq_lseek,
+        .release        = seq_release,
+};
+
+static int cpu_create_file(unsigned cpu, unsigned type, unsigned reg,
+                           unsigned file, struct dentry *dentry)
+{
+        struct cpu_private *priv = NULL;
+
+        /* Already intialized */
+        if (file == CPU_INDEX_BIT)
+                if (per_cpu(cpu_arr[type].init, cpu))
+                        return 0;
+
+        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+        if (priv == NULL)
+                return -ENOMEM;
+
+        priv->cpu = cpu;
+        priv->type = type;
+        priv->reg = reg;
+        priv->file = file;
+        mutex_lock(&cpu_debug_lock);
+        per_cpu(priv_arr[type], cpu) = priv;
+        per_cpu(cpu_priv_count, cpu)++;
+        mutex_unlock(&cpu_debug_lock);
+
+        if (file)
+                debugfs_create_file(cpu_file[file].name, S_IRUGO,
+                                    dentry, (void *)priv, &cpu_fops);
+        else {
+                debugfs_create_file(cpu_base[type].name, S_IRUGO,
+                                    per_cpu(cpu_arr[type].dentry, cpu),
+                                    (void *)priv, &cpu_fops);
+                mutex_lock(&cpu_debug_lock);
+                per_cpu(cpu_arr[type].init, cpu) = 1;
+                mutex_unlock(&cpu_debug_lock);
+        }
+
+        return 0;
+}
+
+static int cpu_init_regfiles(unsigned cpu, unsigned int type, unsigned reg,
+                             struct dentry *dentry)
+{
+        unsigned file;
+        int err = 0;
+
+        for (file = 0; file <  ARRAY_SIZE(cpu_file); file++) {
+                err = cpu_create_file(cpu, type, reg, file, dentry);
+                if (err)
+                        return err;
+        }
+
+        return err;
+}
+
+static int cpu_init_msr(unsigned cpu, unsigned type, struct dentry *dentry)
+{
+        struct dentry *cpu_dentry = NULL;
+        unsigned reg, reg_min, reg_max;
+        int i, range, err = 0;
+        char reg_dir[12];
+        u32 low, high;
+
+        range = get_cpu_range_count(cpu);
+
+        for (i = 0; i < range; i++) {
+                if (!get_cpu_range(cpu, &reg_min, &reg_max, i,
+                                   cpu_base[type].flag))
+                        continue;
+
+                for (reg = reg_min; reg <= reg_max; reg++) {
+                        if (rdmsr_safe_on_cpu(cpu, reg, &low, &high))
+                                continue;
+
+                        sprintf(reg_dir, "0x%x", reg);
+                        cpu_dentry = debugfs_create_dir(reg_dir, dentry);
+                        err = cpu_init_regfiles(cpu, type, reg, cpu_dentry);
+                        if (err)
+                                return err;
+                }
+        }
+
+        return err;
+}
+
+static int cpu_init_allreg(unsigned cpu, struct dentry *dentry)
+{
+        struct dentry *cpu_dentry = NULL;
+        unsigned type;
+        int err = 0;
+
+        for (type = 0; type <  ARRAY_SIZE(cpu_base) - 1; type++) {
+                if (!is_typeflag_valid(cpu, cpu_base[type].flag))
+                        continue;
+                cpu_dentry = debugfs_create_dir(cpu_base[type].name, dentry);
+                per_cpu(cpu_arr[type].dentry, cpu) = cpu_dentry;
+
+                if (type < CPU_TSS_BIT)
+                        err = cpu_init_msr(cpu, type, cpu_dentry);
+                else
+                        err = cpu_create_file(cpu, type, 0, CPU_INDEX_BIT,
+                                              cpu_dentry);
+                if (err)
+                        return err;
+        }
+
+        return err;
+}
+
+static int cpu_init_cpu(void)
+{
+        struct dentry *cpu_dentry = NULL;
+        struct cpuinfo_x86 *cpui;
+        char cpu_dir[12];
+        unsigned cpu;
+        int err = 0;
+
+        for (cpu = 0; cpu < nr_cpu_ids; cpu++) {
+                cpui = &cpu_data(cpu);
+                if (!cpu_has(cpui, X86_FEATURE_MSR))
+                        continue;
+                per_cpu(cpu_model, cpu) = ((cpui->x86_vendor << 16) |
+                                           (cpui->x86 << 8) |
+                                           (cpui->x86_model));
+                per_cpu(cpu_modelflag, cpu) = get_cpu_modelflag(cpu);
+
+                sprintf(cpu_dir, "cpu%d", cpu);
+                cpu_dentry = debugfs_create_dir(cpu_dir, cpu_debugfs_dir);
+                err = cpu_init_allreg(cpu, cpu_dentry);
+
+                pr_info("cpu%d(%d) debug files %d\n",
+                        cpu, nr_cpu_ids, per_cpu(cpu_priv_count, cpu));
+                if (per_cpu(cpu_priv_count, cpu) > MAX_CPU_FILES) {
+                        pr_err("Register files count %d exceeds limit %d\n",
+                                per_cpu(cpu_priv_count, cpu), MAX_CPU_FILES);
+                        per_cpu(cpu_priv_count, cpu) = MAX_CPU_FILES;
+                        err = -ENFILE;
+                }
+                if (err)
+                        return err;
+        }
+
+        return err;
+}
+
+static int __init cpu_debug_init(void)
+{
+        cpu_debugfs_dir = debugfs_create_dir("cpu", arch_debugfs_dir);
+
+        return cpu_init_cpu();
+}
+
+static void __exit cpu_debug_exit(void)
+{
+        int i, cpu;
+
+        if (cpu_debugfs_dir)
+                debugfs_remove_recursive(cpu_debugfs_dir);
+
+        for (cpu = 0; cpu <  nr_cpu_ids; cpu++)
+                for (i = 0; i < per_cpu(cpu_priv_count, cpu); i++)
+                        kfree(per_cpu(priv_arr[i], cpu));
+}
+
+module_init(cpu_debug_init);
+module_exit(cpu_debug_exit);
+
+MODULE_AUTHOR("Jaswinder Singh Rajput");
+MODULE_DESCRIPTION("CPU Debug module");
+MODULE_LICENSE("GPL");
diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
index ffd0f5ed071a..593171e967ef 100644
--- a/arch/x86/kernel/cpu/cyrix.c
+++ b/arch/x86/kernel/cpu/cyrix.c
@@ -61,23 +61,23 @@ static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
  */
 static unsigned char Cx86_dir0_msb __cpuinitdata = 0;
 
-static char Cx86_model[][9] __cpuinitdata = {
+static const char __cpuinitconst Cx86_model[][9] = {
         "Cx486", "Cx486", "5x86 ", "6x86", "MediaGX ", "6x86MX ",
         "M II ", "Unknown"
 };
-static char Cx486_name[][5] __cpuinitdata = {
+static const char __cpuinitconst Cx486_name[][5] = {
         "SLC", "DLC", "SLC2", "DLC2", "SRx", "DRx",
         "SRx2", "DRx2"
 };
-static char Cx486S_name[][4] __cpuinitdata = {
+static const char __cpuinitconst Cx486S_name[][4] = {
         "S", "S2", "Se", "S2e"
 };
-static char Cx486D_name[][4] __cpuinitdata = {
+static const char __cpuinitconst Cx486D_name[][4] = {
         "DX", "DX2", "?", "?", "?", "DX4"
 };
 static char Cx86_cb[] __cpuinitdata = "?.5x Core/Bus Clock";
-static char cyrix_model_mult1[] __cpuinitdata = "12??43";
-static char cyrix_model_mult2[] __cpuinitdata = "12233445";
+static const char __cpuinitconst cyrix_model_mult1[] = "12??43";
+static const char __cpuinitconst cyrix_model_mult2[] = "12233445";
 
 /*
  * Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old
@@ -435,7 +435,7 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c)
         }
 }
 
-static struct cpu_dev cyrix_cpu_dev __cpuinitdata = {
+static const struct cpu_dev __cpuinitconst cyrix_cpu_dev = {
         .c_vendor       = "Cyrix",
         .c_ident        = { "CyrixInstead" },
         .c_early_init   = early_init_cyrix,
@@ -446,7 +446,7 @@ static struct cpu_dev cyrix_cpu_dev __cpuinitdata = {
 
 cpu_dev_register(cyrix_cpu_dev);
 
-static struct cpu_dev nsc_cpu_dev __cpuinitdata = {
+static const struct cpu_dev __cpuinitconst nsc_cpu_dev = {
         .c_vendor       = "NSC",
         .c_ident        = { "Geode by NSC" },
         .c_init         = init_nsc,
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 1a89a2b68d15..7437fa133c02 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -14,6 +14,7 @@
 #include <asm/uaccess.h>
 #include <asm/ds.h>
 #include <asm/bugs.h>
+#include <asm/cpu.h>
 
 #ifdef CONFIG_X86_64
 #include <asm/topology.h>
@@ -54,6 +55,11 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
                 c->x86_cache_alignment = 128;
 #endif
 
+        /* CPUID workaround for 0F33/0F34 CPU */
+        if (c->x86 == 0xF && c->x86_model == 0x3
+            && (c->x86_mask == 0x3 || c->x86_mask == 0x4))
+                c->x86_phys_bits = 36;
+
         /*
          * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate
          * with P/T states and does not stop in deep C-states.
@@ -116,6 +122,28 @@ static void __cpuinit trap_init_f00f_bug(void)
 }
 #endif
 
+static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
+{
+#ifdef CONFIG_SMP
+        /* calling is from identify_secondary_cpu() ? */
+        if (c->cpu_index == boot_cpu_id)
+                return;
+
+        /*
+         * Mask B, Pentium, but not Pentium MMX
+         */
+        if (c->x86 == 5 &&
+            c->x86_mask >= 1 && c->x86_mask <= 4 &&
+            c->x86_model <= 3) {
+                /*
+                 * Remember we have B step Pentia with bugs
+                 */
+                WARN_ONCE(1, "WARNING: SMP operation may be unreliable"
+                                    "with B stepping processors.\n");
+        }
+#endif
+}
+
 static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
 {
         unsigned long lo, hi;
@@ -192,6 +220,8 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
 #ifdef CONFIG_X86_NUMAQ
         numaq_tsc_disable();
 #endif
+
+        intel_smp_check(c);
 }
 #else
 static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
@@ -391,7 +421,7 @@ static unsigned int __cpuinit intel_size_cache(struct cpuinfo_x86 *c, unsigned i
 }
 #endif
 
-static struct cpu_dev intel_cpu_dev __cpuinitdata = {
+static const struct cpu_dev __cpuinitconst intel_cpu_dev = {
         .c_vendor       = "Intel",
         .c_ident        = { "GenuineIntel" },
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 7293508d8f5c..c471eb1a389c 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -32,7 +32,7 @@ struct _cache_table
 };
 
 /* all the cache descriptor types we care about (no TLB or trace cache entries) */
-static struct _cache_table cache_table[] __cpuinitdata =
+static const struct _cache_table __cpuinitconst cache_table[] =
 {
         { 0x06, LVL_1_INST, 8 },        /* 4-way set assoc, 32 byte line size */
         { 0x08, LVL_1_INST, 16 },       /* 4-way set assoc, 32 byte line size */
@@ -206,15 +206,15 @@ union l3_cache {
         unsigned val;
 };
 
-static unsigned short assocs[] __cpuinitdata = {
+static const unsigned short __cpuinitconst assocs[] = {
         [1] = 1, [2] = 2, [4] = 4, [6] = 8,
         [8] = 16, [0xa] = 32, [0xb] = 48,
         [0xc] = 64,
         [0xf] = 0xffff // ??
 };
 
-static unsigned char levels[] __cpuinitdata = { 1, 1, 2, 3 };
-static unsigned char types[] __cpuinitdata = { 1, 2, 3, 3 };
+static const unsigned char __cpuinitconst levels[] = { 1, 1, 2, 3 };
+static const unsigned char __cpuinitconst types[] = { 1, 2, 3, 3 };
 
 static void __cpuinit
 amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
diff --git a/arch/x86/kernel/cpu/mcheck/Makefile b/arch/x86/kernel/cpu/mcheck/Makefile
index d7d2323bbb69..b2f89829bbe8 100644
--- a/arch/x86/kernel/cpu/mcheck/Makefile
+++ b/arch/x86/kernel/cpu/mcheck/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_X86_32)		+= k7.o p4.o p5.o p6.o winchip.o
 obj-$(CONFIG_X86_MCE_INTEL)     += mce_intel_64.o
 obj-$(CONFIG_X86_MCE_AMD)       += mce_amd_64.o
 obj-$(CONFIG_X86_MCE_NONFATAL)  += non-fatal.o
+obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o
diff --git a/arch/x86/kernel/cpu/mcheck/mce_32.c b/arch/x86/kernel/cpu/mcheck/mce_32.c
index dfaebce3633e..3552119b091d 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_32.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_32.c
@@ -60,20 +60,6 @@ void mcheck_init(struct cpuinfo_x86 *c)
         }
 }
 
-static unsigned long old_cr4 __initdata;
-
-void __init stop_mce(void)
-{
-        old_cr4 = read_cr4();
-        clear_in_cr4(X86_CR4_MCE);
-}
-
-void __init restart_mce(void)
-{
-        if (old_cr4 & X86_CR4_MCE)
-                set_in_cr4(X86_CR4_MCE);
-}
-
 static int __init mcheck_disable(char *str)
 {
         mce_disabled = 1;
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
index fe79985ce0f2..ca14604611ec 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_64.c
@@ -3,6 +3,8 @@
  * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
  * Rest from unknown author(s).
  * 2004 Andi Kleen. Rewrote most of it.
+ * Copyright 2008 Intel Corporation
+ * Author: Andi Kleen
  */
 
 #include <linux/init.h>
@@ -24,6 +26,9 @@
 #include <linux/ctype.h>
 #include <linux/kmod.h>
 #include <linux/kdebug.h>
+#include <linux/kobject.h>
+#include <linux/sysfs.h>
+#include <linux/ratelimit.h>
 #include <asm/processor.h>
 #include <asm/msr.h>
 #include <asm/mce.h>
@@ -32,7 +37,6 @@
 #include <asm/idle.h>
 
 #define MISC_MCELOG_MINOR 227
-#define NR_SYSFS_BANKS 6
 
 atomic_t mce_entry;
 
@@ -47,7 +51,7 @@ static int mce_dont_init;
  */
 static int tolerant = 1;
 static int banks;
-static unsigned long bank[NR_SYSFS_BANKS] = { [0 ... NR_SYSFS_BANKS-1] = ~0UL };
+static u64 *bank;
 static unsigned long notify_user;
 static int rip_msr;
 static int mce_bootlog = -1;
@@ -58,6 +62,19 @@ static char *trigger_argv[2] = { trigger, NULL };
 
 static DECLARE_WAIT_QUEUE_HEAD(mce_wait);
 
+/* MCA banks polled by the period polling timer for corrected events */
+DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
+        [0 ... BITS_TO_LONGS(MAX_NR_BANKS)-1] = ~0UL
+};
+
+/* Do initial initialization of a struct mce */
+void mce_setup(struct mce *m)
+{
+        memset(m, 0, sizeof(struct mce));
+        m->cpu = smp_processor_id();
+        rdtscll(m->tsc);
+}
+
 /*
  * Lockless MCE logging infrastructure.
  * This avoids deadlocks on printk locks without having to break locks. Also
@@ -119,11 +136,11 @@ static void print_mce(struct mce *m)
                         print_symbol("{%s}", m->ip);
                 printk("\n");
         }
-        printk(KERN_EMERG "TSC %Lx ", m->tsc);
+        printk(KERN_EMERG "TSC %llx ", m->tsc);
         if (m->addr)
-                printk("ADDR %Lx ", m->addr);
+                printk("ADDR %llx ", m->addr);
         if (m->misc)
-                printk("MISC %Lx ", m->misc);
+                printk("MISC %llx ", m->misc);
         printk("\n");
         printk(KERN_EMERG "This is not a software problem!\n");
         printk(KERN_EMERG "Run through mcelog --ascii to decode "
@@ -149,8 +166,10 @@ static void mce_panic(char *msg, struct mce *backup, unsigned long start)
         panic(msg);
 }
 
-static int mce_available(struct cpuinfo_x86 *c)
+int mce_available(struct cpuinfo_x86 *c)
 {
+        if (mce_dont_init)
+                return 0;
         return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA);
 }
 
@@ -172,7 +191,77 @@ static inline void mce_get_rip(struct mce *m, struct pt_regs *regs)
 }
 
 /*
- * The actual machine check handler
+ * Poll for corrected events or events that happened before reset.
+ * Those are just logged through /dev/mcelog.
+ *
+ * This is executed in standard interrupt context.
+ */
+void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
+{
+        struct mce m;
+        int i;
+
+        mce_setup(&m);
+
+        rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
+        for (i = 0; i < banks; i++) {
+                if (!bank[i] || !test_bit(i, *b))
+                        continue;
+
+                m.misc = 0;
+                m.addr = 0;
+                m.bank = i;
+                m.tsc = 0;
+
+                barrier();
+                rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
+                if (!(m.status & MCI_STATUS_VAL))
+                        continue;
+
+                /*
+                 * Uncorrected events are handled by the exception handler
+                 * when it is enabled. But when the exception is disabled log
+                 * everything.
+                 *
+                 * TBD do the same check for MCI_STATUS_EN here?
+                 */
+                if ((m.status & MCI_STATUS_UC) && !(flags & MCP_UC))
+                        continue;
+
+                if (m.status & MCI_STATUS_MISCV)
+                        rdmsrl(MSR_IA32_MC0_MISC + i*4, m.misc);
+                if (m.status & MCI_STATUS_ADDRV)
+                        rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);
+
+                if (!(flags & MCP_TIMESTAMP))
+                        m.tsc = 0;
+                /*
+                 * Don't get the IP here because it's unlikely to
+                 * have anything to do with the actual error location.
+                 */
+
+                mce_log(&m);
+                add_taint(TAINT_MACHINE_CHECK);
+
+                /*
+                 * Clear state for this bank.
+                 */
+                wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+        }
+
+        /*
+         * Don't clear MCG_STATUS here because it's only defined for
+         * exceptions.
+         */
+}
+
+/*
+ * The actual machine check handler. This only handles real
+ * exceptions when something got corrupted coming in through int 18.
+ *
+ * This is executed in NMI context not subject to normal locking rules. This
+ * implies that most kernel services cannot be safely used. Don't even
+ * think about putting a printk in there!
  */
 void do_machine_check(struct pt_regs * regs, long error_code)
 {
@@ -190,17 +279,18 @@ void do_machine_check(struct pt_regs * regs, long error_code)
          * error.
          */
         int kill_it = 0;
+        DECLARE_BITMAP(toclear, MAX_NR_BANKS);
 
         atomic_inc(&mce_entry);
 
-        if ((regs
-             && notify_die(DIE_NMI, "machine check", regs, error_code,
+        if (notify_die(DIE_NMI, "machine check", regs, error_code,
                            18, SIGKILL) == NOTIFY_STOP)
-            || !banks)
+                goto out2;
+        if (!banks)
                 goto out2;
 
-        memset(&m, 0, sizeof(struct mce));
-        m.cpu = smp_processor_id();
+        mce_setup(&m);
+
         rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
         /* if the restart IP is not valid, we're done for */
         if (!(m.mcgstatus & MCG_STATUS_RIPV))
@@ -210,18 +300,32 @@ void do_machine_check(struct pt_regs * regs, long error_code)
         barrier();
 
         for (i = 0; i < banks; i++) {
-                if (i < NR_SYSFS_BANKS && !bank[i])
+                __clear_bit(i, toclear);
+                if (!bank[i])
                         continue;
 
                 m.misc = 0;
                 m.addr = 0;
                 m.bank = i;
-                m.tsc = 0;
 
                 rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
                 if ((m.status & MCI_STATUS_VAL) == 0)
                         continue;
 
+                /*
+                 * Non uncorrected errors are handled by machine_check_poll
+                 * Leave them alone.
+                 */
+                if ((m.status & MCI_STATUS_UC) == 0)
+                        continue;
+
+                /*
+                 * Set taint even when machine check was not enabled.
+                 */
+                add_taint(TAINT_MACHINE_CHECK);
+
+                __set_bit(i, toclear);
+
                 if (m.status & MCI_STATUS_EN) {
                         /* if PCC was set, there's no way out */
                         no_way_out |= !!(m.status & MCI_STATUS_PCC);
@@ -235,6 +339,12 @@ void do_machine_check(struct pt_regs * regs, long error_code)
                                         no_way_out = 1;
                                 kill_it = 1;
                         }
+                } else {
+                        /*
+                         * Machine check event was not enabled. Clear, but
+                         * ignore.
+                         */
+                        continue;
                 }
 
                 if (m.status & MCI_STATUS_MISCV)
@@ -243,10 +353,7 @@ void do_machine_check(struct pt_regs * regs, long error_code)
                         rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);
 
                 mce_get_rip(&m, regs);
-                if (error_code >= 0)
-                        rdtscll(m.tsc);
-                if (error_code != -2)
-                        mce_log(&m);
+                mce_log(&m);
 
                 /* Did this bank cause the exception? */
                 /* Assume that the bank with uncorrectable errors did it,
@@ -255,14 +362,8 @@ void do_machine_check(struct pt_regs * regs, long error_code)
                         panicm = m;
                         panicm_found = 1;
                 }
-
-                add_taint(TAINT_MACHINE_CHECK);
         }
 
-        /* Never do anything final in the polling timer */
-        if (!regs)
-                goto out;
-
         /* If we didn't find an uncorrectable error, pick
            the last one (shouldn't happen, just being safe). */
         if (!panicm_found)
@@ -309,10 +410,11 @@ void do_machine_check(struct pt_regs * regs, long error_code)
         /* notify userspace ASAP */
         set_thread_flag(TIF_MCE_NOTIFY);
 
- out:
         /* the last thing we do is clear state */
-        for (i = 0; i < banks; i++)
-                wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+        for (i = 0; i < banks; i++) {
+                if (test_bit(i, toclear))
+                        wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+        }
         wrmsrl(MSR_IA32_MCG_STATUS, 0);
  out2:
         atomic_dec(&mce_entry);
@@ -332,15 +434,13 @@ void do_machine_check(struct pt_regs * regs, long error_code)
  * and historically has been the register value of the
  * MSR_IA32_THERMAL_STATUS (Intel) msr.
  */
-void mce_log_therm_throt_event(unsigned int cpu, __u64 status)
+void mce_log_therm_throt_event(__u64 status)
 {
         struct mce m;
 
-        memset(&m, 0, sizeof(m));
-        m.cpu = cpu;
+        mce_setup(&m);
         m.bank = MCE_THERMAL_BANK;
         m.status = status;
-        rdtscll(m.tsc);
         mce_log(&m);
 }
 #endif /* CONFIG_X86_MCE_INTEL */
@@ -353,18 +453,18 @@ void mce_log_therm_throt_event(unsigned int cpu, __u64 status)
 
 static int check_interval = 5 * 60; /* 5 minutes */
 static int next_interval; /* in jiffies */
-static void mcheck_timer(struct work_struct *work);
-static DECLARE_DELAYED_WORK(mcheck_work, mcheck_timer);
+static void mcheck_timer(unsigned long);
+static DEFINE_PER_CPU(struct timer_list, mce_timer);
 
-static void mcheck_check_cpu(void *info)
+static void mcheck_timer(unsigned long data)
 {
-        if (mce_available(&current_cpu_data))
-                do_machine_check(NULL, 0);
-}
+        struct timer_list *t = &per_cpu(mce_timer, data);
 
-static void mcheck_timer(struct work_struct *work)
-{
-        on_each_cpu(mcheck_check_cpu, NULL, 1);
+        WARN_ON(smp_processor_id() != data);
+
+        if (mce_available(&current_cpu_data))
+                machine_check_poll(MCP_TIMESTAMP,
+                                &__get_cpu_var(mce_poll_banks));
 
         /*
          * Alert userspace if needed.  If we logged an MCE, reduce the
@@ -377,31 +477,41 @@ static void mcheck_timer(struct work_struct *work)
                                 (int)round_jiffies_relative(check_interval*HZ));
         }
 
-        schedule_delayed_work(&mcheck_work, next_interval);
+        t->expires = jiffies + next_interval;
+        add_timer(t);
+}
+
+static void mce_do_trigger(struct work_struct *work)
+{
+        call_usermodehelper(trigger, trigger_argv, NULL, UMH_NO_WAIT);
 }
 
+static DECLARE_WORK(mce_trigger_work, mce_do_trigger);
+
 /*
- * This is only called from process context.  This is where we do
- * anything we need to alert userspace about new MCEs.  This is called
- * directly from the poller and also from entry.S and idle, thanks to
- * TIF_MCE_NOTIFY.
+ * Notify the user(s) about new machine check events.
+ * Can be called from interrupt context, but not from machine check/NMI
+ * context.
  */
 int mce_notify_user(void)
 {
+        /* Not more than two messages every minute */
+        static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2);
+
         clear_thread_flag(TIF_MCE_NOTIFY);
         if (test_and_clear_bit(0, &notify_user)) {
-                static unsigned long last_print;
-                unsigned long now = jiffies;
-
                 wake_up_interruptible(&mce_wait);
-                if (trigger[0])
-                        call_usermodehelper(trigger, trigger_argv, NULL,
-                                                UMH_NO_WAIT);
 
-                if (time_after_eq(now, last_print + (check_interval*HZ))) {
-                        last_print = now;
+                /*
+                 * There is no risk of missing notifications because
+                 * work_pending is always cleared before the function is
+                 * executed.
+                 */
+                if (trigger[0] && !work_pending(&mce_trigger_work))
+                        schedule_work(&mce_trigger_work);
+
+                if (__ratelimit(&ratelimit))
                         printk(KERN_INFO "Machine check events logged\n");
-                }
 
                 return 1;
         }
@@ -425,63 +535,78 @@ static struct notifier_block mce_idle_notifier = {
 
 static __init int periodic_mcheck_init(void)
 {
-        next_interval = check_interval * HZ;
-        if (next_interval)
-                schedule_delayed_work(&mcheck_work,
-                                      round_jiffies_relative(next_interval));
-        idle_notifier_register(&mce_idle_notifier);
-        return 0;
+       idle_notifier_register(&mce_idle_notifier);
+       return 0;
 }
 __initcall(periodic_mcheck_init);
 
-
 /*
  * Initialize Machine Checks for a CPU.
  */
-static void mce_init(void *dummy)
+static int mce_cap_init(void)
 {
         u64 cap;
-        int i;
+        unsigned b;
 
         rdmsrl(MSR_IA32_MCG_CAP, cap);
-        banks = cap & 0xff;
-        if (banks > MCE_EXTENDED_BANK) {
-                banks = MCE_EXTENDED_BANK;
-                printk(KERN_INFO "MCE: warning: using only %d banks\n",
-                       MCE_EXTENDED_BANK);
+        b = cap & 0xff;
+        if (b > MAX_NR_BANKS) {
+                printk(KERN_WARNING
+                       "MCE: Using only %u machine check banks out of %u\n",
+                        MAX_NR_BANKS, b);
+                b = MAX_NR_BANKS;
         }
+
+        /* Don't support asymmetric configurations today */
+        WARN_ON(banks != 0 && b != banks);
+        banks = b;
+        if (!bank) {
+                bank = kmalloc(banks * sizeof(u64), GFP_KERNEL);
+                if (!bank)
+                        return -ENOMEM;
+                memset(bank, 0xff, banks * sizeof(u64));
+        }
+
         /* Use accurate RIP reporting if available. */
         if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9)
                 rip_msr = MSR_IA32_MCG_EIP;
 
-        /* Log the machine checks left over from the previous reset.
-           This also clears all registers */
-        do_machine_check(NULL, mce_bootlog ? -1 : -2);
+        return 0;
+}
+
+static void mce_init(void *dummy)
+{
+        u64 cap;
+        int i;
+        mce_banks_t all_banks;
+
+        /*
+         * Log the machine checks left over from the previous reset.
+         */
+        bitmap_fill(all_banks, MAX_NR_BANKS);
+        machine_check_poll(MCP_UC, &all_banks);
 
         set_in_cr4(X86_CR4_MCE);
 
+        rdmsrl(MSR_IA32_MCG_CAP, cap);
         if (cap & MCG_CTL_P)
                 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
 
         for (i = 0; i < banks; i++) {
-                if (i < NR_SYSFS_BANKS)
-                        wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
-                else
-                        wrmsrl(MSR_IA32_MC0_CTL+4*i, ~0UL);
-
+                wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
                 wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
         }
 }
 
 /* Add per CPU specific workarounds here */
-static void __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c)
+static void mce_cpu_quirks(struct cpuinfo_x86 *c)
 {
         /* This should be disabled by the BIOS, but isn't always */
         if (c->x86_vendor == X86_VENDOR_AMD) {
-                if(c->x86 == 15)
+                if (c->x86 == 15 && banks > 4)
                         /* disable GART TBL walk error reporting, which trips off
                            incorrectly with the IOMMU & 3ware & Cerberus. */
-                        clear_bit(10, &bank[4]);
+                        clear_bit(10, (unsigned long *)&bank[4]);
                 if(c->x86 <= 17 && mce_bootlog < 0)
                         /* Lots of broken BIOS around that don't clear them
                            by default and leave crap in there. Don't log. */
@@ -504,20 +629,38 @@ static void mce_cpu_features(struct cpuinfo_x86 *c)
         }
 }
 
+static void mce_init_timer(void)
+{
+        struct timer_list *t = &__get_cpu_var(mce_timer);
+
+        /* data race harmless because everyone sets to the same value */
+        if (!next_interval)
+                next_interval = check_interval * HZ;
+        if (!next_interval)
+                return;
+        setup_timer(t, mcheck_timer, smp_processor_id());
+        t->expires = round_jiffies(jiffies + next_interval);
+        add_timer(t);
+}
+
 /*
  * Called for each booted CPU to set up machine checks.
  * Must be called with preempt off.
  */
 void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
 {
-        mce_cpu_quirks(c);
+        if (!mce_available(c))
+                return;
 
-        if (mce_dont_init ||
-            !mce_available(c))
+        if (mce_cap_init() < 0) {
+                mce_dont_init = 1;
                 return;
+        }
+        mce_cpu_quirks(c);
 
         mce_init(NULL);
         mce_cpu_features(c);
+        mce_init_timer();
 }
 
 /*
@@ -573,7 +716,7 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
 {
         unsigned long *cpu_tsc;
         static DEFINE_MUTEX(mce_read_mutex);
-        unsigned next;
+        unsigned prev, next;
         char __user *buf = ubuf;
         int i, err;
 
@@ -592,25 +735,32 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
         }
 
         err = 0;
-        for (i = 0; i < next; i++) {
-                unsigned long start = jiffies;
-
-                while (!mcelog.entry[i].finished) {
-                        if (time_after_eq(jiffies, start + 2)) {
-                                memset(mcelog.entry + i,0, sizeof(struct mce));
-                                goto timeout;
+        prev = 0;
+        do {
+                for (i = prev; i < next; i++) {
+                        unsigned long start = jiffies;
+
+                        while (!mcelog.entry[i].finished) {
+                                if (time_after_eq(jiffies, start + 2)) {
+                                        memset(mcelog.entry + i, 0,
+                                               sizeof(struct mce));
+                                        goto timeout;
+                                }
+                                cpu_relax();
                         }
-                        cpu_relax();
+                        smp_rmb();
+                        err |= copy_to_user(buf, mcelog.entry + i,
+                                            sizeof(struct mce));
+                        buf += sizeof(struct mce);
+timeout:
+                        ;
                 }
-                smp_rmb();
-                err |= copy_to_user(buf, mcelog.entry + i, sizeof(struct mce));
-                buf += sizeof(struct mce);
- timeout:
-                ;
-        }
 
-        memset(mcelog.entry, 0, next * sizeof(struct mce));
-        mcelog.next = 0;
+                memset(mcelog.entry + prev, 0,
+                       (next - prev) * sizeof(struct mce));
+                prev = next;
+                next = cmpxchg(&mcelog.next, prev, 0);
+        } while (next != prev);
 
         synchronize_sched();
 
@@ -680,20 +830,6 @@ static struct miscdevice mce_log_device = {
         &mce_chrdev_ops,
 };
 
-static unsigned long old_cr4 __initdata;
-
-void __init stop_mce(void)
-{
-        old_cr4 = read_cr4();
-        clear_in_cr4(X86_CR4_MCE);
-}
-
-void __init restart_mce(void)
-{
-        if (old_cr4 & X86_CR4_MCE)
-                set_in_cr4(X86_CR4_MCE);
-}
-
 /*
  * Old style boot options parsing. Only for compatibility.
  */
@@ -703,8 +839,7 @@ static int __init mcheck_disable(char *str)
         return 1;
 }
 
-/* mce=off disables machine check. Note you can re-enable it later
-   using sysfs.
+/* mce=off disables machine check.
    mce=TOLERANCELEVEL (number, see above)
    mce=bootlog Log MCEs from before booting. Disabled by default on AMD.
    mce=nobootlog Don't log MCEs from before booting. */
@@ -728,6 +863,29 @@ __setup("mce=", mcheck_enable);
  * Sysfs support
  */
 
+/*
+ * Disable machine checks on suspend and shutdown. We can't really handle
+ * them later.
+ */
+static int mce_disable(void)
+{
+        int i;
+
+        for (i = 0; i < banks; i++)
+                wrmsrl(MSR_IA32_MC0_CTL + i*4, 0);
+        return 0;
+}
+
+static int mce_suspend(struct sys_device *dev, pm_message_t state)
+{
+        return mce_disable();
+}
+
+static int mce_shutdown(struct sys_device *dev)
+{
+        return mce_disable();
+}
+
 /* On resume clear all MCE state. Don't want to see leftovers from the BIOS.
    Only one CPU is active at this time, the others get readded later using
    CPU hotplug. */
@@ -738,20 +896,24 @@ static int mce_resume(struct sys_device *dev)
         return 0;
 }
 
+static void mce_cpu_restart(void *data)
+{
+        del_timer_sync(&__get_cpu_var(mce_timer));
+        if (mce_available(&current_cpu_data))
+                mce_init(NULL);
+        mce_init_timer();
+}
+
 /* Reinit MCEs after user configuration changes */
 static void mce_restart(void)
 {
-        if (next_interval)
-                cancel_delayed_work(&mcheck_work);
-        /* Timer race is harmless here */
-        on_each_cpu(mce_init, NULL, 1);
         next_interval = check_interval * HZ;
-        if (next_interval)
-                schedule_delayed_work(&mcheck_work,
-                                      round_jiffies_relative(next_interval));
+        on_each_cpu(mce_cpu_restart, NULL, 1);
 }
 
 static struct sysdev_class mce_sysclass = {
+        .suspend = mce_suspend,
+        .shutdown = mce_shutdown,
         .resume = mce_resume,
         .name = "machinecheck",
 };
@@ -778,16 +940,26 @@ void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu) __cpuinit
         }                                                               \
         static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
 
-/*
- * TBD should generate these dynamically based on number of available banks.
- * Have only 6 contol banks in /sysfs until then.
- */
-ACCESSOR(bank0ctl,bank[0],mce_restart())
-ACCESSOR(bank1ctl,bank[1],mce_restart())
-ACCESSOR(bank2ctl,bank[2],mce_restart())
-ACCESSOR(bank3ctl,bank[3],mce_restart())
-ACCESSOR(bank4ctl,bank[4],mce_restart())
-ACCESSOR(bank5ctl,bank[5],mce_restart())
+static struct sysdev_attribute *bank_attrs;
+
+static ssize_t show_bank(struct sys_device *s, struct sysdev_attribute *attr,
+                         char *buf)
+{
+        u64 b = bank[attr - bank_attrs];
+        return sprintf(buf, "%llx\n", b);
+}
+
+static ssize_t set_bank(struct sys_device *s, struct sysdev_attribute *attr,
+                        const char *buf, size_t siz)
+{
+        char *end;
+        u64 new = simple_strtoull(buf, &end, 0);
+        if (end == buf)
+                return -EINVAL;
+        bank[attr - bank_attrs] = new;
+        mce_restart();
+        return end-buf;
+}
 
 static ssize_t show_trigger(struct sys_device *s, struct sysdev_attribute *attr,
                                 char *buf)
@@ -814,8 +986,6 @@ static SYSDEV_ATTR(trigger, 0644, show_trigger, set_trigger);
 static SYSDEV_INT_ATTR(tolerant, 0644, tolerant);
 ACCESSOR(check_interval,check_interval,mce_restart())
 static struct sysdev_attribute *mce_attributes[] = {
-        &attr_bank0ctl, &attr_bank1ctl, &attr_bank2ctl,
-        &attr_bank3ctl, &attr_bank4ctl, &attr_bank5ctl,
         &attr_tolerant.attr, &attr_check_interval, &attr_trigger,
         NULL
 };
@@ -845,11 +1015,22 @@ static __cpuinit int mce_create_device(unsigned int cpu)
                 if (err)
                         goto error;
         }
+        for (i = 0; i < banks; i++) {
+                err = sysdev_create_file(&per_cpu(device_mce, cpu),
+                                        &bank_attrs[i]);
+                if (err)
+                        goto error2;
+        }
         cpu_set(cpu, mce_device_initialized);
 
         return 0;
+error2:
+        while (--i >= 0) {
+                sysdev_remove_file(&per_cpu(device_mce, cpu),
+                                        &bank_attrs[i]);
+        }
 error:
-        while (i--) {
+        while (--i >= 0) {
                 sysdev_remove_file(&per_cpu(device_mce,cpu),
                                    mce_attributes[i]);
         }
@@ -868,15 +1049,46 @@ static __cpuinit void mce_remove_device(unsigned int cpu)
         for (i = 0; mce_attributes[i]; i++)
                 sysdev_remove_file(&per_cpu(device_mce,cpu),
                         mce_attributes[i]);
+        for (i = 0; i < banks; i++)
+                sysdev_remove_file(&per_cpu(device_mce, cpu),
+                        &bank_attrs[i]);
         sysdev_unregister(&per_cpu(device_mce,cpu));
         cpu_clear(cpu, mce_device_initialized);
 }
 
+/* Make sure there are no machine checks on offlined CPUs. */
+static void mce_disable_cpu(void *h)
+{
+        int i;
+        unsigned long action = *(unsigned long *)h;
+
+        if (!mce_available(&current_cpu_data))
+                return;
+        if (!(action & CPU_TASKS_FROZEN))
+                cmci_clear();
+        for (i = 0; i < banks; i++)
+                wrmsrl(MSR_IA32_MC0_CTL + i*4, 0);
+}
+
+static void mce_reenable_cpu(void *h)
+{
+        int i;
+        unsigned long action = *(unsigned long *)h;
+
+        if (!mce_available(&current_cpu_data))
+                return;
+        if (!(action & CPU_TASKS_FROZEN))
+                cmci_reenable();
+        for (i = 0; i < banks; i++)
+                wrmsrl(MSR_IA32_MC0_CTL + i*4, bank[i]);
+}
+
 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
 static int __cpuinit mce_cpu_callback(struct notifier_block *nfb,
                                       unsigned long action, void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
+        struct timer_list *t = &per_cpu(mce_timer, cpu);
 
         switch (action) {
         case CPU_ONLINE:
@@ -891,6 +1103,21 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb,
                         threshold_cpu_callback(action, cpu);
                 mce_remove_device(cpu);
                 break;
+        case CPU_DOWN_PREPARE:
+        case CPU_DOWN_PREPARE_FROZEN:
+                del_timer_sync(t);
+                smp_call_function_single(cpu, mce_disable_cpu, &action, 1);
+                break;
+        case CPU_DOWN_FAILED:
+        case CPU_DOWN_FAILED_FROZEN:
+                t->expires = round_jiffies(jiffies + next_interval);
+                add_timer_on(t, cpu);
+                smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
+                break;
+        case CPU_POST_DEAD:
+                /* intentionally ignoring frozen here */
+                cmci_rediscover(cpu);
+                break;
         }
         return NOTIFY_OK;
 }
@@ -899,6 +1126,34 @@ static struct notifier_block mce_cpu_notifier __cpuinitdata = {
         .notifier_call = mce_cpu_callback,
 };
 
+static __init int mce_init_banks(void)
+{
+        int i;
+
+        bank_attrs = kzalloc(sizeof(struct sysdev_attribute) * banks,
+                                GFP_KERNEL);
+        if (!bank_attrs)
+                return -ENOMEM;
+
+        for (i = 0; i < banks; i++) {
+                struct sysdev_attribute *a = &bank_attrs[i];
+                a->attr.name = kasprintf(GFP_KERNEL, "bank%d", i);
+                if (!a->attr.name)
+                        goto nomem;
+                a->attr.mode = 0644;
+                a->show = show_bank;
+                a->store = set_bank;
+        }
+        return 0;
+
+nomem:
+        while (--i >= 0)
+                kfree(bank_attrs[i].attr.name);
+        kfree(bank_attrs);
+        bank_attrs = NULL;
+        return -ENOMEM;
+}
+
 static __init int mce_init_device(void)
 {
         int err;
@@ -906,6 +1161,11 @@ static __init int mce_init_device(void)
 
         if (!mce_available(&boot_cpu_data))
                 return -EIO;
+
+        err = mce_init_banks();
+        if (err)
+                return err;
+
         err = sysdev_class_register(&mce_sysclass);
         if (err)
                 return err;
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index 9817506dd469..7d01be868870 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -79,6 +79,8 @@ static unsigned char shared_bank[NR_BANKS] = {
 
 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
 
+static void amd_threshold_interrupt(void);
+
 /*
  * CPU Initialization
  */
@@ -90,7 +92,8 @@ struct thresh_restart {
 };
 
 /* must be called with correct cpu affinity */
-static long threshold_restart_bank(void *_tr)
+/* Called via smp_call_function_single() */
+static void threshold_restart_bank(void *_tr)
 {
         struct thresh_restart *tr = _tr;
         u32 mci_misc_hi, mci_misc_lo;
@@ -117,7 +120,6 @@ static long threshold_restart_bank(void *_tr)
 
         mci_misc_hi |= MASK_COUNT_EN_HI;
         wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
-        return 0;
 }
 
 /* cpu init entry point, called from mce.c with preempt off */
@@ -174,6 +176,8 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
                         tr.reset = 0;
                         tr.old_limit = 0;
                         threshold_restart_bank(&tr);
+
+                        mce_threshold_vector = amd_threshold_interrupt;
                 }
         }
 }
@@ -187,19 +191,13 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
  * the interrupt goes off when error_count reaches threshold_limit.
  * the handler will simply log mcelog w/ software defined bank number.
  */
-asmlinkage void mce_threshold_interrupt(void)
+static void amd_threshold_interrupt(void)
 {
         unsigned int bank, block;
         struct mce m;
         u32 low = 0, high = 0, address = 0;
 
-        ack_APIC_irq();
-        exit_idle();
-        irq_enter();
-
-        memset(&m, 0, sizeof(m));
-        rdtscll(m.tsc);
-        m.cpu = smp_processor_id();
+        mce_setup(&m);
 
         /* assume first bank caused it */
         for (bank = 0; bank < NR_BANKS; ++bank) {
@@ -233,7 +231,8 @@ asmlinkage void mce_threshold_interrupt(void)
 
                         /* Log the machine check that caused the threshold
                            event. */
-                        do_machine_check(NULL, 0);
+                        machine_check_poll(MCP_TIMESTAMP,
+                                        &__get_cpu_var(mce_poll_banks));
 
                         if (high & MASK_OVERFLOW_HI) {
                                 rdmsrl(address, m.misc);
@@ -243,13 +242,10 @@ asmlinkage void mce_threshold_interrupt(void)
                                        + bank * NR_BLOCKS
                                        + block;
                                 mce_log(&m);
-                                goto out;
+                                return;
                         }
                 }
         }
-out:
-        inc_irq_stat(irq_threshold_count);
-        irq_exit();
 }
 
 /*
@@ -283,7 +279,7 @@ static ssize_t store_interrupt_enable(struct threshold_block *b,
         tr.b = b;
         tr.reset = 0;
         tr.old_limit = 0;
-        work_on_cpu(b->cpu, threshold_restart_bank, &tr);
+        smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1);
 
         return end - buf;
 }
@@ -305,23 +301,32 @@ static ssize_t store_threshold_limit(struct threshold_block *b,
         tr.b = b;
         tr.reset = 0;
 
-        work_on_cpu(b->cpu, threshold_restart_bank, &tr);
+        smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1);
 
         return end - buf;
 }
 
-static long local_error_count(void *_b)
+struct threshold_block_cross_cpu {
+        struct threshold_block *tb;
+        long retval;
+};
+
+static void local_error_count_handler(void *_tbcc)
 {
-        struct threshold_block *b = _b;
+        struct threshold_block_cross_cpu *tbcc = _tbcc;
+        struct threshold_block *b = tbcc->tb;
         u32 low, high;
 
         rdmsr(b->address, low, high);
-        return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
+        tbcc->retval = (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
 }
 
 static ssize_t show_error_count(struct threshold_block *b, char *buf)
 {
-        return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
+        struct threshold_block_cross_cpu tbcc = { .tb = b, };
+
+        smp_call_function_single(b->cpu, local_error_count_handler, &tbcc, 1);
+        return sprintf(buf, "%lx\n", tbcc.retval);
 }
 
 static ssize_t store_error_count(struct threshold_block *b,
@@ -329,7 +334,7 @@ static ssize_t store_error_count(struct threshold_block *b,
 {
         struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
 
-        work_on_cpu(b->cpu, threshold_restart_bank, &tr);
+        smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1);
         return 1;
 }
 
@@ -398,7 +403,7 @@ static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
         if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
                 return 0;
 
-        if (rdmsr_safe(address, &low, &high))
+        if (rdmsr_safe_on_cpu(cpu, address, &low, &high))
                 return 0;
 
         if (!(high & MASK_VALID_HI)) {
@@ -462,12 +467,11 @@ out_free:
         return err;
 }
 
-static __cpuinit long local_allocate_threshold_blocks(void *_bank)
+static __cpuinit long
+local_allocate_threshold_blocks(int cpu, unsigned int bank)
 {
-        unsigned int *bank = _bank;
-
-        return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
-                                         MSR_IA32_MC0_MISC + *bank * 4);
+        return allocate_threshold_blocks(cpu, bank, 0,
+                                         MSR_IA32_MC0_MISC + bank * 4);
 }
 
 /* symlinks sibling shared banks to first core.  first core owns dir/files. */
@@ -530,7 +534,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
         per_cpu(threshold_banks, cpu)[bank] = b;
 
-        err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
+        err = local_allocate_threshold_blocks(cpu, bank);
         if (err)
                 goto out_free;
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index aa5e287c98e0..57df3d383470 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -1,6 +1,8 @@
 /*
  * Intel specific MCE features.
  * Copyright 2004 Zwane Mwaikambo <zwane@linuxpower.ca>
+ * Copyright (C) 2008, 2009 Intel Corporation
+ * Author: Andi Kleen
  */
 
 #include <linux/init.h>
@@ -13,6 +15,7 @@
 #include <asm/hw_irq.h>
 #include <asm/idle.h>
 #include <asm/therm_throt.h>
+#include <asm/apic.h>
 
 asmlinkage void smp_thermal_interrupt(void)
 {
@@ -25,7 +28,7 @@ asmlinkage void smp_thermal_interrupt(void)
 
         rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
         if (therm_throt_process(msr_val & 1))
-                mce_log_therm_throt_event(smp_processor_id(), msr_val);
+                mce_log_therm_throt_event(msr_val);
 
         inc_irq_stat(irq_thermal_count);
         irq_exit();
@@ -85,7 +88,209 @@ static void intel_init_thermal(struct cpuinfo_x86 *c)
         return;
 }
 
+/*
+ * Support for Intel Correct Machine Check Interrupts. This allows
+ * the CPU to raise an interrupt when a corrected machine check happened.
+ * Normally we pick those up using a regular polling timer.
+ * Also supports reliable discovery of shared banks.
+ */
+
+static DEFINE_PER_CPU(mce_banks_t, mce_banks_owned);
+
+/*
+ * cmci_discover_lock protects against parallel discovery attempts
+ * which could race against each other.
+ */
+static DEFINE_SPINLOCK(cmci_discover_lock);
+
+#define CMCI_THRESHOLD 1
+
+static int cmci_supported(int *banks)
+{
+        u64 cap;
+
+        /*
+         * Vendor check is not strictly needed, but the initial
+         * initialization is vendor keyed and this
+         * makes sure none of the backdoors are entered otherwise.
+         */
+        if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+                return 0;
+        if (!cpu_has_apic || lapic_get_maxlvt() < 6)
+                return 0;
+        rdmsrl(MSR_IA32_MCG_CAP, cap);
+        *banks = min_t(unsigned, MAX_NR_BANKS, cap & 0xff);
+        return !!(cap & MCG_CMCI_P);
+}
+
+/*
+ * The interrupt handler. This is called on every event.
+ * Just call the poller directly to log any events.
+ * This could in theory increase the threshold under high load,
+ * but doesn't for now.
+ */
+static void intel_threshold_interrupt(void)
+{
+        machine_check_poll(MCP_TIMESTAMP, &__get_cpu_var(mce_banks_owned));
+        mce_notify_user();
+}
+
+static void print_update(char *type, int *hdr, int num)
+{
+        if (*hdr == 0)
+                printk(KERN_INFO "CPU %d MCA banks", smp_processor_id());
+        *hdr = 1;
+        printk(KERN_CONT " %s:%d", type, num);
+}
+
+/*
+ * Enable CMCI (Corrected Machine Check Interrupt) for available MCE banks
+ * on this CPU. Use the algorithm recommended in the SDM to discover shared
+ * banks.
+ */
+static void cmci_discover(int banks, int boot)
+{
+        unsigned long *owned = (void *)&__get_cpu_var(mce_banks_owned);
+        int hdr = 0;
+        int i;
+
+        spin_lock(&cmci_discover_lock);
+        for (i = 0; i < banks; i++) {
+                u64 val;
+
+                if (test_bit(i, owned))
+                        continue;
+
+                rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+
+                /* Already owned by someone else? */
+                if (val & CMCI_EN) {
+                        if (test_and_clear_bit(i, owned) || boot)
+                                print_update("SHD", &hdr, i);
+                        __clear_bit(i, __get_cpu_var(mce_poll_banks));
+                        continue;
+                }
+
+                val |= CMCI_EN | CMCI_THRESHOLD;
+                wrmsrl(MSR_IA32_MC0_CTL2 + i, val);
+                rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+
+                /* Did the enable bit stick? -- the bank supports CMCI */
+                if (val & CMCI_EN) {
+                        if (!test_and_set_bit(i, owned) || boot)
+                                print_update("CMCI", &hdr, i);
+                        __clear_bit(i, __get_cpu_var(mce_poll_banks));
+                } else {
+                        WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks)));
+                }
+        }
+        spin_unlock(&cmci_discover_lock);
+        if (hdr)
+                printk(KERN_CONT "\n");
+}
+
+/*
+ * Just in case we missed an event during initialization check
+ * all the CMCI owned banks.
+ */
+void cmci_recheck(void)
+{
+        unsigned long flags;
+        int banks;
+
+        if (!mce_available(&current_cpu_data) || !cmci_supported(&banks))
+                return;
+        local_irq_save(flags);
+        machine_check_poll(MCP_TIMESTAMP, &__get_cpu_var(mce_banks_owned));
+        local_irq_restore(flags);
+}
+
+/*
+ * Disable CMCI on this CPU for all banks it owns when it goes down.
+ * This allows other CPUs to claim the banks on rediscovery.
+ */
+void cmci_clear(void)
+{
+        int i;
+        int banks;
+        u64 val;
+
+        if (!cmci_supported(&banks))
+                return;
+        spin_lock(&cmci_discover_lock);
+        for (i = 0; i < banks; i++) {
+                if (!test_bit(i, __get_cpu_var(mce_banks_owned)))
+                        continue;
+                /* Disable CMCI */
+                rdmsrl(MSR_IA32_MC0_CTL2 + i, val);
+                val &= ~(CMCI_EN|CMCI_THRESHOLD_MASK);
+                wrmsrl(MSR_IA32_MC0_CTL2 + i, val);
+                __clear_bit(i, __get_cpu_var(mce_banks_owned));
+        }
+        spin_unlock(&cmci_discover_lock);
+}
+
+/*
+ * After a CPU went down cycle through all the others and rediscover
+ * Must run in process context.
+ */
+void cmci_rediscover(int dying)
+{
+        int banks;
+        int cpu;
+        cpumask_var_t old;
+
+        if (!cmci_supported(&banks))
+                return;
+        if (!alloc_cpumask_var(&old, GFP_KERNEL))
+                return;
+        cpumask_copy(old, &current->cpus_allowed);
+
+        for_each_online_cpu (cpu) {
+                if (cpu == dying)
+                        continue;
+                if (set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)))
+                        continue;
+                /* Recheck banks in case CPUs don't all have the same */
+                if (cmci_supported(&banks))
+                        cmci_discover(banks, 0);
+        }
+
+        set_cpus_allowed_ptr(current, old);
+        free_cpumask_var(old);
+}
+
+/*
+ * Reenable CMCI on this CPU in case a CPU down failed.
+ */
+void cmci_reenable(void)
+{
+        int banks;
+        if (cmci_supported(&banks))
+                cmci_discover(banks, 0);
+}
+
+static void intel_init_cmci(void)
+{
+        int banks;
+
+        if (!cmci_supported(&banks))
+                return;
+
+        mce_threshold_vector = intel_threshold_interrupt;
+        cmci_discover(banks, 1);
+        /*
+         * For CPU #0 this runs with still disabled APIC, but that's
+         * ok because only the vector is set up. We still do another
+         * check for the banks later for CPU #0 just to make sure
+         * to not miss any events.
+         */
+        apic_write(APIC_LVTCMCI, THRESHOLD_APIC_VECTOR|APIC_DM_FIXED);
+        cmci_recheck();
+}
+
 void mce_intel_feature_init(struct cpuinfo_x86 *c)
 {
         intel_init_thermal(c);
+        intel_init_cmci();
 }
diff --git a/arch/x86/kernel/cpu/mcheck/threshold.c b/arch/x86/kernel/cpu/mcheck/threshold.c
new file mode 100644
index 000000000000..23ee9e730f78
--- /dev/null
+++ b/arch/x86/kernel/cpu/mcheck/threshold.c
@@ -0,0 +1,29 @@
+/*
+ * Common corrected MCE threshold handler code:
+ */
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+
+#include <asm/irq_vectors.h>
+#include <asm/apic.h>
+#include <asm/idle.h>
+#include <asm/mce.h>
+
+static void default_threshold_interrupt(void)
+{
+        printk(KERN_ERR "Unexpected threshold interrupt at vector %x\n",
+                         THRESHOLD_APIC_VECTOR);
+}
+
+void (*mce_threshold_vector)(void) = default_threshold_interrupt;
+
+asmlinkage void mce_threshold_interrupt(void)
+{
+        exit_idle();
+        irq_enter();
+        inc_irq_stat(irq_threshold_count);
+        mce_threshold_vector();
+        irq_exit();
+        /* Ack only at the end to avoid potential reentry */
+        ack_APIC_irq();
+}
diff --git a/arch/x86/kernel/cpu/mtrr/Makefile b/arch/x86/kernel/cpu/mtrr/Makefile
index 191fc0533649..f4361b56f8e9 100644
--- a/arch/x86/kernel/cpu/mtrr/Makefile
+++ b/arch/x86/kernel/cpu/mtrr/Makefile
@@ -1,3 +1,3 @@
-obj-y           := main.o if.o generic.o state.o
+obj-y           := main.o if.o generic.o state.o cleanup.o
 obj-$(CONFIG_X86_32) += amd.o cyrix.o centaur.o
 
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c
new file mode 100644
index 000000000000..ce0fe4b5c04f
--- /dev/null
+++ b/arch/x86/kernel/cpu/mtrr/cleanup.c
@@ -0,0 +1,1101 @@
+/*  MTRR (Memory Type Range Register) cleanup
+
+    Copyright (C) 2009 Yinghai Lu
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Library General Public
+    License as published by the Free Software Foundation; either
+    version 2 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Library General Public License for more details.
+
+    You should have received a copy of the GNU Library General Public
+    License along with this library; if not, write to the Free
+    Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*/
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/smp.h>
+#include <linux/cpu.h>
+#include <linux/mutex.h>
+#include <linux/sort.h>
+
+#include <asm/e820.h>
+#include <asm/mtrr.h>
+#include <asm/uaccess.h>
+#include <asm/processor.h>
+#include <asm/msr.h>
+#include <asm/kvm_para.h>
+#include "mtrr.h"
+
+/* should be related to MTRR_VAR_RANGES nums */
+#define RANGE_NUM 256
+
+struct res_range {
+        unsigned long start;
+        unsigned long end;
+};
+
+static int __init
+add_range(struct res_range *range, int nr_range, unsigned long start,
+                              unsigned long end)
+{
+        /* out of slots */
+        if (nr_range >= RANGE_NUM)
+                return nr_range;
+
+        range[nr_range].start = start;
+        range[nr_range].end = end;
+
+        nr_range++;
+
+        return nr_range;
+}
+
+static int __init
+add_range_with_merge(struct res_range *range, int nr_range, unsigned long start,
+                              unsigned long end)
+{
+        int i;
+
+        /* try to merge it with old one */
+        for (i = 0; i < nr_range; i++) {
+                unsigned long final_start, final_end;
+                unsigned long common_start, common_end;
+
+                if (!range[i].end)
+                        continue;
+
+                common_start = max(range[i].start, start);
+                common_end = min(range[i].end, end);
+                if (common_start > common_end + 1)
+                        continue;
+
+                final_start = min(range[i].start, start);
+                final_end = max(range[i].end, end);
+
+                range[i].start = final_start;
+                range[i].end =  final_end;
+                return nr_range;
+        }
+
+        /* need to add that */
+        return add_range(range, nr_range, start, end);
+}
+
+static void __init
+subtract_range(struct res_range *range, unsigned long start, unsigned long end)
+{
+        int i, j;
+
+        for (j = 0; j < RANGE_NUM; j++) {
+                if (!range[j].end)
+                        continue;
+
+                if (start <= range[j].start && end >= range[j].end) {
+                        range[j].start = 0;
+                        range[j].end = 0;
+                        continue;
+                }
+
+                if (start <= range[j].start && end < range[j].end &&
+                    range[j].start < end + 1) {
+                        range[j].start = end + 1;
+                        continue;
+                }
+
+
+                if (start > range[j].start && end >= range[j].end &&
+                    range[j].end > start - 1) {
+                        range[j].end = start - 1;
+                        continue;
+                }
+
+                if (start > range[j].start && end < range[j].end) {
+                        /* find the new spare */
+                        for (i = 0; i < RANGE_NUM; i++) {
+                                if (range[i].end == 0)
+                                        break;
+                        }
+                        if (i < RANGE_NUM) {
+                                range[i].end = range[j].end;
+                                range[i].start = end + 1;
+                        } else {
+                                printk(KERN_ERR "run of slot in ranges\n");
+                        }
+                        range[j].end = start - 1;
+                        continue;
+                }
+        }
+}
+
+static int __init cmp_range(const void *x1, const void *x2)
+{
+        const struct res_range *r1 = x1;
+        const struct res_range *r2 = x2;
+        long start1, start2;
+
+        start1 = r1->start;
+        start2 = r2->start;
+
+        return start1 - start2;
+}
+
+struct var_mtrr_range_state {
+        unsigned long base_pfn;
+        unsigned long size_pfn;
+        mtrr_type type;
+};
+
+static struct var_mtrr_range_state __initdata range_state[RANGE_NUM];
+static int __initdata debug_print;
+
+static int __init
+x86_get_mtrr_mem_range(struct res_range *range, int nr_range,
+                       unsigned long extra_remove_base,
+                       unsigned long extra_remove_size)
+{
+        unsigned long base, size;
+        mtrr_type type;
+        int i;
+
+        for (i = 0; i < num_var_ranges; i++) {
+                type = range_state[i].type;
+                if (type != MTRR_TYPE_WRBACK)
+                        continue;
+                base = range_state[i].base_pfn;
+                size = range_state[i].size_pfn;
+                nr_range = add_range_with_merge(range, nr_range, base,
+                                                base + size - 1);
+        }
+        if (debug_print) {
+                printk(KERN_DEBUG "After WB checking\n");
+                for (i = 0; i < nr_range; i++)
+                        printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n",
+                                 range[i].start, range[i].end + 1);
+        }
+
+        /* take out UC ranges */
+        for (i = 0; i < num_var_ranges; i++) {
+                type = range_state[i].type;
+                if (type != MTRR_TYPE_UNCACHABLE &&
+                    type != MTRR_TYPE_WRPROT)
+                        continue;
+                size = range_state[i].size_pfn;
+                if (!size)
+                        continue;
+                base = range_state[i].base_pfn;
+                if (base < (1<<(20-PAGE_SHIFT)) && mtrr_state.have_fixed &&
+                    (mtrr_state.enabled & 1)) {
+                        /* Var MTRR contains UC entry below 1M? Skip it: */
+                        printk(KERN_WARNING "WARNING: BIOS bug: VAR MTRR %d "
+                                "contains strange UC entry under 1M, check "
+                                "with your system vendor!\n", i);
+                        if (base + size <= (1<<(20-PAGE_SHIFT)))
+                                continue;
+                        size -= (1<<(20-PAGE_SHIFT)) - base;
+                        base = 1<<(20-PAGE_SHIFT);
+                }
+                subtract_range(range, base, base + size - 1);
+        }
+        if (extra_remove_size)
+                subtract_range(range, extra_remove_base,
+                                 extra_remove_base + extra_remove_size  - 1);
+
+        /* get new range num */
+        nr_range = 0;
+        for (i = 0; i < RANGE_NUM; i++) {
+                if (!range[i].end)
+                        continue;
+                nr_range++;
+        }
+        if  (debug_print) {
+                printk(KERN_DEBUG "After UC checking\n");
+                for (i = 0; i < nr_range; i++)
+                        printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n",
+                                 range[i].start, range[i].end + 1);
+        }
+
+        /* sort the ranges */
+        sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL);
+        if  (debug_print) {
+                printk(KERN_DEBUG "After sorting\n");
+                for (i = 0; i < nr_range; i++)
+                        printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n",
+                                 range[i].start, range[i].end + 1);
+        }
+
+        /* clear those is not used */
+        for (i = nr_range; i < RANGE_NUM; i++)
+                memset(&range[i], 0, sizeof(range[i]));
+
+        return nr_range;
+}
+
+static struct res_range __initdata range[RANGE_NUM];
+static int __initdata nr_range;
+
+#ifdef CONFIG_MTRR_SANITIZER
+
+static unsigned long __init sum_ranges(struct res_range *range, int nr_range)
+{
+        unsigned long sum;
+        int i;
+
+        sum = 0;
+        for (i = 0; i < nr_range; i++)
+                sum += range[i].end + 1 - range[i].start;
+
+        return sum;
+}
+
+static int enable_mtrr_cleanup __initdata =
+        CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT;
+
+static int __init disable_mtrr_cleanup_setup(char *str)
+{
+        enable_mtrr_cleanup = 0;
+        return 0;
+}
+early_param("disable_mtrr_cleanup", disable_mtrr_cleanup_setup);
+
+static int __init enable_mtrr_cleanup_setup(char *str)
+{
+        enable_mtrr_cleanup = 1;
+        return 0;
+}
+early_param("enable_mtrr_cleanup", enable_mtrr_cleanup_setup);
+
+static int __init mtrr_cleanup_debug_setup(char *str)
+{
+        debug_print = 1;
+        return 0;
+}
+early_param("mtrr_cleanup_debug", mtrr_cleanup_debug_setup);
+
+struct var_mtrr_state {
+        unsigned long   range_startk;
+        unsigned long   range_sizek;
+        unsigned long   chunk_sizek;
+        unsigned long   gran_sizek;
+        unsigned int    reg;
+};
+
+static void __init
+set_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek,
+                unsigned char type, unsigned int address_bits)
+{
+        u32 base_lo, base_hi, mask_lo, mask_hi;
+        u64 base, mask;
+
+        if (!sizek) {
+                fill_mtrr_var_range(reg, 0, 0, 0, 0);
+                return;
+        }
+
+        mask = (1ULL << address_bits) - 1;
+        mask &= ~((((u64)sizek) << 10) - 1);
+
+        base  = ((u64)basek) << 10;
+
+        base |= type;
+        mask |= 0x800;
+
+        base_lo = base & ((1ULL<<32) - 1);
+        base_hi = base >> 32;
+
+        mask_lo = mask & ((1ULL<<32) - 1);
+        mask_hi = mask >> 32;
+
+        fill_mtrr_var_range(reg, base_lo, base_hi, mask_lo, mask_hi);
+}
+
+static void __init
+save_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek,
+                unsigned char type)
+{
+        range_state[reg].base_pfn = basek >> (PAGE_SHIFT - 10);
+        range_state[reg].size_pfn = sizek >> (PAGE_SHIFT - 10);
+        range_state[reg].type = type;
+}
+
+static void __init
+set_var_mtrr_all(unsigned int address_bits)
+{
+        unsigned long basek, sizek;
+        unsigned char type;
+        unsigned int reg;
+
+        for (reg = 0; reg < num_var_ranges; reg++) {
+                basek = range_state[reg].base_pfn << (PAGE_SHIFT - 10);
+                sizek = range_state[reg].size_pfn << (PAGE_SHIFT - 10);
+                type = range_state[reg].type;
+
+                set_var_mtrr(reg, basek, sizek, type, address_bits);
+        }
+}
+
+static unsigned long to_size_factor(unsigned long sizek, char *factorp)
+{
+        char factor;
+        unsigned long base = sizek;
+
+        if (base & ((1<<10) - 1)) {
+                /* not MB alignment */
+                factor = 'K';
+        } else if (base & ((1<<20) - 1)) {
+                factor = 'M';
+                base >>= 10;
+        } else {
+                factor = 'G';
+                base >>= 20;
+        }
+
+        *factorp = factor;
+
+        return base;
+}
+
+static unsigned int __init
+range_to_mtrr(unsigned int reg, unsigned long range_startk,
+              unsigned long range_sizek, unsigned char type)
+{
+        if (!range_sizek || (reg >= num_var_ranges))
+                return reg;
+
+        while (range_sizek) {
+                unsigned long max_align, align;
+                unsigned long sizek;
+
+                /* Compute the maximum size I can make a range */
+                if (range_startk)
+                        max_align = ffs(range_startk) - 1;
+                else
+                        max_align = 32;
+                align = fls(range_sizek) - 1;
+                if (align > max_align)
+                        align = max_align;
+
+                sizek = 1 << align;
+                if (debug_print) {
+                        char start_factor = 'K', size_factor = 'K';
+                        unsigned long start_base, size_base;
+
+                        start_base = to_size_factor(range_startk,
+                                                         &start_factor),
+                        size_base = to_size_factor(sizek, &size_factor),
+
+                        printk(KERN_DEBUG "Setting variable MTRR %d, "
+                                "base: %ld%cB, range: %ld%cB, type %s\n",
+                                reg, start_base, start_factor,
+                                size_base, size_factor,
+                                (type == MTRR_TYPE_UNCACHABLE) ? "UC" :
+                                   ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other")
+                                );
+                }
+                save_var_mtrr(reg++, range_startk, sizek, type);
+                range_startk += sizek;
+                range_sizek -= sizek;
+                if (reg >= num_var_ranges)
+                        break;
+        }
+        return reg;
+}
+
+static unsigned __init
+range_to_mtrr_with_hole(struct var_mtrr_state *state, unsigned long basek,
+                        unsigned long sizek)
+{
+        unsigned long hole_basek, hole_sizek;
+        unsigned long second_basek, second_sizek;
+        unsigned long range0_basek, range0_sizek;
+        unsigned long range_basek, range_sizek;
+        unsigned long chunk_sizek;
+        unsigned long gran_sizek;
+
+        hole_basek = 0;
+        hole_sizek = 0;
+        second_basek = 0;
+        second_sizek = 0;
+        chunk_sizek = state->chunk_sizek;
+        gran_sizek = state->gran_sizek;
+
+        /* align with gran size, prevent small block used up MTRRs */
+        range_basek = ALIGN(state->range_startk, gran_sizek);
+        if ((range_basek > basek) && basek)
+                return second_sizek;
+        state->range_sizek -= (range_basek - state->range_startk);
+        range_sizek = ALIGN(state->range_sizek, gran_sizek);
+
+        while (range_sizek > state->range_sizek) {
+                range_sizek -= gran_sizek;
+                if (!range_sizek)
+                        return 0;
+        }
+        state->range_sizek = range_sizek;
+
+        /* try to append some small hole */
+        range0_basek = state->range_startk;
+        range0_sizek = ALIGN(state->range_sizek, chunk_sizek);
+
+        /* no increase */
+        if (range0_sizek == state->range_sizek) {
+                if (debug_print)
+                        printk(KERN_DEBUG "rangeX: %016lx - %016lx\n",
+                                range0_basek<<10,
+                                (range0_basek + state->range_sizek)<<10);
+                state->reg = range_to_mtrr(state->reg, range0_basek,
+                                state->range_sizek, MTRR_TYPE_WRBACK);
+                return 0;
+        }
+
+        /* only cut back, when it is not the last */
+        if (sizek) {
+                while (range0_basek + range0_sizek > (basek + sizek)) {
+                        if (range0_sizek >= chunk_sizek)
+                                range0_sizek -= chunk_sizek;
+                        else
+                                range0_sizek = 0;
+
+                        if (!range0_sizek)
+                                break;
+                }
+        }
+
+second_try:
+        range_basek = range0_basek + range0_sizek;
+
+        /* one hole in the middle */
+        if (range_basek > basek && range_basek <= (basek + sizek))
+                second_sizek = range_basek - basek;
+
+        if (range0_sizek > state->range_sizek) {
+
+                /* one hole in middle or at end */
+                hole_sizek = range0_sizek - state->range_sizek - second_sizek;
+
+                /* hole size should be less than half of range0 size */
+                if (hole_sizek >= (range0_sizek >> 1) &&
+                    range0_sizek >= chunk_sizek) {
+                        range0_sizek -= chunk_sizek;
+                        second_sizek = 0;
+                        hole_sizek = 0;
+
+                        goto second_try;
+                }
+        }
+
+        if (range0_sizek) {
+                if (debug_print)
+                        printk(KERN_DEBUG "range0: %016lx - %016lx\n",
+                                range0_basek<<10,
+                                (range0_basek + range0_sizek)<<10);
+                state->reg = range_to_mtrr(state->reg, range0_basek,
+                                range0_sizek, MTRR_TYPE_WRBACK);
+        }
+
+        if (range0_sizek < state->range_sizek) {
+                /* need to handle left over */
+                range_sizek = state->range_sizek - range0_sizek;
+
+                if (debug_print)
+                        printk(KERN_DEBUG "range: %016lx - %016lx\n",
+                                 range_basek<<10,
+                                 (range_basek + range_sizek)<<10);
+                state->reg = range_to_mtrr(state->reg, range_basek,
+                                 range_sizek, MTRR_TYPE_WRBACK);
+        }
+
+        if (hole_sizek) {
+                hole_basek = range_basek - hole_sizek - second_sizek;
+                if (debug_print)
+                        printk(KERN_DEBUG "hole: %016lx - %016lx\n",
+                                 hole_basek<<10,
+                                 (hole_basek + hole_sizek)<<10);
+                state->reg = range_to_mtrr(state->reg, hole_basek,
+                                 hole_sizek, MTRR_TYPE_UNCACHABLE);
+        }
+
+        return second_sizek;
+}
+
+static void __init
+set_var_mtrr_range(struct var_mtrr_state *state, unsigned long base_pfn,
+                   unsigned long size_pfn)
+{
+        unsigned long basek, sizek;
+        unsigned long second_sizek = 0;
+
+        if (state->reg >= num_var_ranges)
+                return;
+
+        basek = base_pfn << (PAGE_SHIFT - 10);
+        sizek = size_pfn << (PAGE_SHIFT - 10);
+
+        /* See if I can merge with the last range */
+        if ((basek <= 1024) ||
+            (state->range_startk + state->range_sizek == basek)) {
+                unsigned long endk = basek + sizek;
+                state->range_sizek = endk - state->range_startk;
+                return;
+        }
+        /* Write the range mtrrs */
+        if (state->range_sizek != 0)
+                second_sizek = range_to_mtrr_with_hole(state, basek, sizek);
+
+        /* Allocate an msr */
+        state->range_startk = basek + second_sizek;
+        state->range_sizek  = sizek - second_sizek;
+}
+
+/* mininum size of mtrr block that can take hole */
+static u64 mtrr_chunk_size __initdata = (256ULL<<20);
+
+static int __init parse_mtrr_chunk_size_opt(char *p)
+{
+        if (!p)
+                return -EINVAL;
+        mtrr_chunk_size = memparse(p, &p);
+        return 0;
+}
+early_param("mtrr_chunk_size", parse_mtrr_chunk_size_opt);
+
+/* granity of mtrr of block */
+static u64 mtrr_gran_size __initdata;
+
+static int __init parse_mtrr_gran_size_opt(char *p)
+{
+        if (!p)
+                return -EINVAL;
+        mtrr_gran_size = memparse(p, &p);
+        return 0;
+}
+early_param("mtrr_gran_size", parse_mtrr_gran_size_opt);
+
+static int nr_mtrr_spare_reg __initdata =
+                                 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT;
+
+static int __init parse_mtrr_spare_reg(char *arg)
+{
+        if (arg)
+                nr_mtrr_spare_reg = simple_strtoul(arg, NULL, 0);
+        return 0;
+}
+
+early_param("mtrr_spare_reg_nr", parse_mtrr_spare_reg);
+
+static int __init
+x86_setup_var_mtrrs(struct res_range *range, int nr_range,
+                    u64 chunk_size, u64 gran_size)
+{
+        struct var_mtrr_state var_state;
+        int i;
+        int num_reg;
+
+        var_state.range_startk  = 0;
+        var_state.range_sizek   = 0;
+        var_state.reg           = 0;
+        var_state.chunk_sizek   = chunk_size >> 10;
+        var_state.gran_sizek    = gran_size >> 10;
+
+        memset(range_state, 0, sizeof(range_state));
+
+        /* Write the range etc */
+        for (i = 0; i < nr_range; i++)
+                set_var_mtrr_range(&var_state, range[i].start,
+                                   range[i].end - range[i].start + 1);
+
+        /* Write the last range */
+        if (var_state.range_sizek != 0)
+                range_to_mtrr_with_hole(&var_state, 0, 0);
+
+        num_reg = var_state.reg;
+        /* Clear out the extra MTRR's */
+        while (var_state.reg < num_var_ranges) {
+                save_var_mtrr(var_state.reg, 0, 0, 0);
+                var_state.reg++;
+        }
+
+        return num_reg;
+}
+
+struct mtrr_cleanup_result {
+        unsigned long gran_sizek;
+        unsigned long chunk_sizek;
+        unsigned long lose_cover_sizek;
+        unsigned int num_reg;
+        int bad;
+};
+
+/*
+ * gran_size: 64K, 128K, 256K, 512K, 1M, 2M, ..., 2G
+ * chunk size: gran_size, ..., 2G
+ * so we need (1+16)*8
+ */
+#define NUM_RESULT      136
+#define PSHIFT          (PAGE_SHIFT - 10)
+
+static struct mtrr_cleanup_result __initdata result[NUM_RESULT];
+static unsigned long __initdata min_loss_pfn[RANGE_NUM];
+
+static void __init print_out_mtrr_range_state(void)
+{
+        int i;
+        char start_factor = 'K', size_factor = 'K';
+        unsigned long start_base, size_base;
+        mtrr_type type;
+
+        for (i = 0; i < num_var_ranges; i++) {
+
+                size_base = range_state[i].size_pfn << (PAGE_SHIFT - 10);
+                if (!size_base)
+                        continue;
+
+                size_base = to_size_factor(size_base, &size_factor),
+                start_base = range_state[i].base_pfn << (PAGE_SHIFT - 10);
+                start_base = to_size_factor(start_base, &start_factor),
+                type = range_state[i].type;
+
+                printk(KERN_DEBUG "reg %d, base: %ld%cB, range: %ld%cB, type %s\n",
+                        i, start_base, start_factor,
+                        size_base, size_factor,
+                        (type == MTRR_TYPE_UNCACHABLE) ? "UC" :
+                            ((type == MTRR_TYPE_WRPROT) ? "WP" :
+                             ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other"))
+                        );
+        }
+}
+
+static int __init mtrr_need_cleanup(void)
+{
+        int i;
+        mtrr_type type;
+        unsigned long size;
+        /* extra one for all 0 */
+        int num[MTRR_NUM_TYPES + 1];
+
+        /* check entries number */
+        memset(num, 0, sizeof(num));
+        for (i = 0; i < num_var_ranges; i++) {
+                type = range_state[i].type;
+                size = range_state[i].size_pfn;
+                if (type >= MTRR_NUM_TYPES)
+                        continue;
+                if (!size)
+                        type = MTRR_NUM_TYPES;
+                if (type == MTRR_TYPE_WRPROT)
+                        type = MTRR_TYPE_UNCACHABLE;
+                num[type]++;
+        }
+
+        /* check if we got UC entries */
+        if (!num[MTRR_TYPE_UNCACHABLE])
+                return 0;
+
+        /* check if we only had WB and UC */
+        if (num[MTRR_TYPE_WRBACK] + num[MTRR_TYPE_UNCACHABLE] !=
+                num_var_ranges - num[MTRR_NUM_TYPES])
+                return 0;
+
+        return 1;
+}
+
+static unsigned long __initdata range_sums;
+static void __init mtrr_calc_range_state(u64 chunk_size, u64 gran_size,
+                                         unsigned long extra_remove_base,
+                                         unsigned long extra_remove_size,
+                                         int i)
+{
+        int num_reg;
+        static struct res_range range_new[RANGE_NUM];
+        static int nr_range_new;
+        unsigned long range_sums_new;
+
+        /* convert ranges to var ranges state */
+        num_reg = x86_setup_var_mtrrs(range, nr_range,
+                                                chunk_size, gran_size);
+
+        /* we got new setting in range_state, check it */
+        memset(range_new, 0, sizeof(range_new));
+        nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
+                                extra_remove_base, extra_remove_size);
+        range_sums_new = sum_ranges(range_new, nr_range_new);
+
+        result[i].chunk_sizek = chunk_size >> 10;
+        result[i].gran_sizek = gran_size >> 10;
+        result[i].num_reg = num_reg;
+        if (range_sums < range_sums_new) {
+                result[i].lose_cover_sizek =
+                        (range_sums_new - range_sums) << PSHIFT;
+                result[i].bad = 1;
+        } else
+                result[i].lose_cover_sizek =
+                        (range_sums - range_sums_new) << PSHIFT;
+
+        /* double check it */
+        if (!result[i].bad && !result[i].lose_cover_sizek) {
+                if (nr_range_new != nr_range ||
+                        memcmp(range, range_new, sizeof(range)))
+                                result[i].bad = 1;
+        }
+
+        if (!result[i].bad && (range_sums - range_sums_new <
+                                min_loss_pfn[num_reg])) {
+                min_loss_pfn[num_reg] =
+                        range_sums - range_sums_new;
+        }
+}
+
+static void __init mtrr_print_out_one_result(int i)
+{
+        char gran_factor, chunk_factor, lose_factor;
+        unsigned long gran_base, chunk_base, lose_base;
+
+        gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
+        chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
+        lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
+        printk(KERN_INFO "%sgran_size: %ld%c \tchunk_size: %ld%c \t",
+                        result[i].bad ? "*BAD*" : " ",
+                        gran_base, gran_factor, chunk_base, chunk_factor);
+        printk(KERN_CONT "num_reg: %d  \tlose cover RAM: %s%ld%c\n",
+                        result[i].num_reg, result[i].bad ? "-" : "",
+                        lose_base, lose_factor);
+}
+
+static int __init mtrr_search_optimal_index(void)
+{
+        int i;
+        int num_reg_good;
+        int index_good;
+
+        if (nr_mtrr_spare_reg >= num_var_ranges)
+                nr_mtrr_spare_reg = num_var_ranges - 1;
+        num_reg_good = -1;
+        for (i = num_var_ranges - nr_mtrr_spare_reg; i > 0; i--) {
+                if (!min_loss_pfn[i])
+                        num_reg_good = i;
+        }
+
+        index_good = -1;
+        if (num_reg_good != -1) {
+                for (i = 0; i < NUM_RESULT; i++) {
+                        if (!result[i].bad &&
+                            result[i].num_reg == num_reg_good &&
+                            !result[i].lose_cover_sizek) {
+                                index_good = i;
+                                break;
+                        }
+                }
+        }
+
+        return index_good;
+}
+
+
+int __init mtrr_cleanup(unsigned address_bits)
+{
+        unsigned long extra_remove_base, extra_remove_size;
+        unsigned long base, size, def, dummy;
+        mtrr_type type;
+        u64 chunk_size, gran_size;
+        int index_good;
+        int i;
+
+        if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1)
+                return 0;
+        rdmsr(MTRRdefType_MSR, def, dummy);
+        def &= 0xff;
+        if (def != MTRR_TYPE_UNCACHABLE)
+                return 0;
+
+        /* get it and store it aside */
+        memset(range_state, 0, sizeof(range_state));
+        for (i = 0; i < num_var_ranges; i++) {
+                mtrr_if->get(i, &base, &size, &type);
+                range_state[i].base_pfn = base;
+                range_state[i].size_pfn = size;
+                range_state[i].type = type;
+        }
+
+        /* check if we need handle it and can handle it */
+        if (!mtrr_need_cleanup())
+                return 0;
+
+        /* print original var MTRRs at first, for debugging: */
+        printk(KERN_DEBUG "original variable MTRRs\n");
+        print_out_mtrr_range_state();
+
+        memset(range, 0, sizeof(range));
+        extra_remove_size = 0;
+        extra_remove_base = 1 << (32 - PAGE_SHIFT);
+        if (mtrr_tom2)
+                extra_remove_size =
+                        (mtrr_tom2 >> PAGE_SHIFT) - extra_remove_base;
+        nr_range = x86_get_mtrr_mem_range(range, 0, extra_remove_base,
+                                          extra_remove_size);
+        /*
+         * [0, 1M) should always be coverred by var mtrr with WB
+         * and fixed mtrrs should take effective before var mtrr for it
+         */
+        nr_range = add_range_with_merge(range, nr_range, 0,
+                                        (1ULL<<(20 - PAGE_SHIFT)) - 1);
+        /* sort the ranges */
+        sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL);
+
+        range_sums = sum_ranges(range, nr_range);
+        printk(KERN_INFO "total RAM coverred: %ldM\n",
+               range_sums >> (20 - PAGE_SHIFT));
+
+        if (mtrr_chunk_size && mtrr_gran_size) {
+                i = 0;
+                mtrr_calc_range_state(mtrr_chunk_size, mtrr_gran_size,
+                                      extra_remove_base, extra_remove_size, i);
+
+                mtrr_print_out_one_result(i);
+
+                if (!result[i].bad) {
+                        set_var_mtrr_all(address_bits);
+                        printk(KERN_DEBUG "New variable MTRRs\n");
+                        print_out_mtrr_range_state();
+                        return 1;
+                }
+                printk(KERN_INFO "invalid mtrr_gran_size or mtrr_chunk_size, "
+                       "will find optimal one\n");
+        }
+
+        i = 0;
+        memset(min_loss_pfn, 0xff, sizeof(min_loss_pfn));
+        memset(result, 0, sizeof(result));
+        for (gran_size = (1ULL<<16); gran_size < (1ULL<<32); gran_size <<= 1) {
+
+                for (chunk_size = gran_size; chunk_size < (1ULL<<32);
+                     chunk_size <<= 1) {
+
+                        if (i >= NUM_RESULT)
+                                continue;
+
+                        mtrr_calc_range_state(chunk_size, gran_size,
+                                      extra_remove_base, extra_remove_size, i);
+                        if (debug_print) {
+                                mtrr_print_out_one_result(i);
+                                printk(KERN_INFO "\n");
+                        }
+
+                        i++;
+                }
+        }
+
+        /* try to find the optimal index */
+        index_good = mtrr_search_optimal_index();
+
+        if (index_good != -1) {
+                printk(KERN_INFO "Found optimal setting for mtrr clean up\n");
+                i = index_good;
+                mtrr_print_out_one_result(i);
+
+                /* convert ranges to var ranges state */
+                chunk_size = result[i].chunk_sizek;
+                chunk_size <<= 10;
+                gran_size = result[i].gran_sizek;
+                gran_size <<= 10;
+                x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size);
+                set_var_mtrr_all(address_bits);
+                printk(KERN_DEBUG "New variable MTRRs\n");
+                print_out_mtrr_range_state();
+                return 1;
+        } else {
+                /* print out all */
+                for (i = 0; i < NUM_RESULT; i++)
+                        mtrr_print_out_one_result(i);
+        }
+
+        printk(KERN_INFO "mtrr_cleanup: can not find optimal value\n");
+        printk(KERN_INFO "please specify mtrr_gran_size/mtrr_chunk_size\n");
+
+        return 0;
+}
+#else
+int __init mtrr_cleanup(unsigned address_bits)
+{
+        return 0;
+}
+#endif
+
+static int disable_mtrr_trim;
+
+static int __init disable_mtrr_trim_setup(char *str)
+{
+        disable_mtrr_trim = 1;
+        return 0;
+}
+early_param("disable_mtrr_trim", disable_mtrr_trim_setup);
+
+/*
+ * Newer AMD K8s and later CPUs have a special magic MSR way to force WB
+ * for memory >4GB. Check for that here.
+ * Note this won't check if the MTRRs < 4GB where the magic bit doesn't
+ * apply to are wrong, but so far we don't know of any such case in the wild.
+ */
+#define Tom2Enabled (1U << 21)
+#define Tom2ForceMemTypeWB (1U << 22)
+
+int __init amd_special_default_mtrr(void)
+{
+        u32 l, h;
+
+        if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
+                return 0;
+        if (boot_cpu_data.x86 < 0xf || boot_cpu_data.x86 > 0x11)
+                return 0;
+        /* In case some hypervisor doesn't pass SYSCFG through */
+        if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0)
+                return 0;
+        /*
+         * Memory between 4GB and top of mem is forced WB by this magic bit.
+         * Reserved before K8RevF, but should be zero there.
+         */
+        if ((l & (Tom2Enabled | Tom2ForceMemTypeWB)) ==
+                 (Tom2Enabled | Tom2ForceMemTypeWB))
+                return 1;
+        return 0;
+}
+
+static u64 __init real_trim_memory(unsigned long start_pfn,
+                                   unsigned long limit_pfn)
+{
+        u64 trim_start, trim_size;
+        trim_start = start_pfn;
+        trim_start <<= PAGE_SHIFT;
+        trim_size = limit_pfn;
+        trim_size <<= PAGE_SHIFT;
+        trim_size -= trim_start;
+
+        return e820_update_range(trim_start, trim_size, E820_RAM,
+                                E820_RESERVED);
+}
+/**
+ * mtrr_trim_uncached_memory - trim RAM not covered by MTRRs
+ * @end_pfn: ending page frame number
+ *
+ * Some buggy BIOSes don't setup the MTRRs properly for systems with certain
+ * memory configurations.  This routine checks that the highest MTRR matches
+ * the end of memory, to make sure the MTRRs having a write back type cover
+ * all of the memory the kernel is intending to use. If not, it'll trim any
+ * memory off the end by adjusting end_pfn, removing it from the kernel's
+ * allocation pools, warning the user with an obnoxious message.
+ */
+int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
+{
+        unsigned long i, base, size, highest_pfn = 0, def, dummy;
+        mtrr_type type;
+        u64 total_trim_size;
+
+        /* extra one for all 0 */
+        int num[MTRR_NUM_TYPES + 1];
+        /*
+         * Make sure we only trim uncachable memory on machines that
+         * support the Intel MTRR architecture:
+         */
+        if (!is_cpu(INTEL) || disable_mtrr_trim)
+                return 0;
+        rdmsr(MTRRdefType_MSR, def, dummy);
+        def &= 0xff;
+        if (def != MTRR_TYPE_UNCACHABLE)
+                return 0;
+
+        /* get it and store it aside */
+        memset(range_state, 0, sizeof(range_state));
+        for (i = 0; i < num_var_ranges; i++) {
+                mtrr_if->get(i, &base, &size, &type);
+                range_state[i].base_pfn = base;
+                range_state[i].size_pfn = size;
+                range_state[i].type = type;
+        }
+
+        /* Find highest cached pfn */
+        for (i = 0; i < num_var_ranges; i++) {
+                type = range_state[i].type;
+                if (type != MTRR_TYPE_WRBACK)
+                        continue;
+                base = range_state[i].base_pfn;
+                size = range_state[i].size_pfn;
+                if (highest_pfn < base + size)
+                        highest_pfn = base + size;
+        }
+
+        /* kvm/qemu doesn't have mtrr set right, don't trim them all */
+        if (!highest_pfn) {
+                printk(KERN_INFO "CPU MTRRs all blank - virtualized system.\n");
+                return 0;
+        }
+
+        /* check entries number */
+        memset(num, 0, sizeof(num));
+        for (i = 0; i < num_var_ranges; i++) {
+                type = range_state[i].type;
+                if (type >= MTRR_NUM_TYPES)
+                        continue;
+                size = range_state[i].size_pfn;
+                if (!size)
+                        type = MTRR_NUM_TYPES;
+                num[type]++;
+        }
+
+        /* no entry for WB? */
+        if (!num[MTRR_TYPE_WRBACK])
+                return 0;
+
+        /* check if we only had WB and UC */
+        if (num[MTRR_TYPE_WRBACK] + num[MTRR_TYPE_UNCACHABLE] !=
+                num_var_ranges - num[MTRR_NUM_TYPES])
+                return 0;
+
+        memset(range, 0, sizeof(range));
+        nr_range = 0;
+        if (mtrr_tom2) {
+                range[nr_range].start = (1ULL<<(32 - PAGE_SHIFT));
+                range[nr_range].end = (mtrr_tom2 >> PAGE_SHIFT) - 1;
+                if (highest_pfn < range[nr_range].end + 1)
+                        highest_pfn = range[nr_range].end + 1;
+                nr_range++;
+        }
+        nr_range = x86_get_mtrr_mem_range(range, nr_range, 0, 0);
+
+        total_trim_size = 0;
+        /* check the head */
+        if (range[0].start)
+                total_trim_size += real_trim_memory(0, range[0].start);
+        /* check the holes */
+        for (i = 0; i < nr_range - 1; i++) {
+                if (range[i].end + 1 < range[i+1].start)
+                        total_trim_size += real_trim_memory(range[i].end + 1,
+                                                            range[i+1].start);
+        }
+        /* check the top */
+        i = nr_range - 1;
+        if (range[i].end + 1 < end_pfn)
+                total_trim_size += real_trim_memory(range[i].end + 1,
+                                                         end_pfn);
+
+        if (total_trim_size) {
+                printk(KERN_WARNING "WARNING: BIOS bug: CPU MTRRs don't cover"
+                        " all of memory, losing %lluMB of RAM.\n",
+                        total_trim_size >> 20);
+
+                if (!changed_by_mtrr_cleanup)
+                        WARN_ON(1);
+
+                printk(KERN_INFO "update e820 for mtrr\n");
+                update_e820();
+
+                return 1;
+        }
+
+        return 0;
+}
+
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 0c0a455fe95c..37f28fc7cf95 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -33,13 +33,31 @@ u64 mtrr_tom2;
 struct mtrr_state_type mtrr_state = {};
 EXPORT_SYMBOL_GPL(mtrr_state);
 
-static int __initdata mtrr_show;
-static int __init mtrr_debug(char *opt)
+/**
+ * BIOS is expected to clear MtrrFixDramModEn bit, see for example
+ * "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
+ * Opteron Processors" (26094 Rev. 3.30 February 2006), section
+ * "13.2.1.2 SYSCFG Register": "The MtrrFixDramModEn bit should be set
+ * to 1 during BIOS initalization of the fixed MTRRs, then cleared to
+ * 0 for operation."
+ */
+static inline void k8_check_syscfg_dram_mod_en(void)
 {
-        mtrr_show = 1;
-        return 0;
+        u32 lo, hi;
+
+        if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
+              (boot_cpu_data.x86 >= 0x0f)))
+                return;
+
+        rdmsr(MSR_K8_SYSCFG, lo, hi);
+        if (lo & K8_MTRRFIXRANGE_DRAM_MODIFY) {
+                printk(KERN_ERR FW_WARN "MTRR: CPU %u: SYSCFG[MtrrFixDramModEn]"
+                       " not cleared by BIOS, clearing this bit\n",
+                       smp_processor_id());
+                lo &= ~K8_MTRRFIXRANGE_DRAM_MODIFY;
+                mtrr_wrmsr(MSR_K8_SYSCFG, lo, hi);
+        }
 }
-early_param("mtrr.show", mtrr_debug);
 
 /*
  * Returns the effective MTRR type for the region
@@ -174,6 +192,8 @@ get_fixed_ranges(mtrr_type * frs)
         unsigned int *p = (unsigned int *) frs;
         int i;
 
+        k8_check_syscfg_dram_mod_en();
+
         rdmsr(MTRRfix64K_00000_MSR, p[0], p[1]);
 
         for (i = 0; i < 2; i++)
@@ -188,18 +208,94 @@ void mtrr_save_fixed_ranges(void *info)
                 get_fixed_ranges(mtrr_state.fixed_ranges);
 }
 
-static void print_fixed(unsigned base, unsigned step, const mtrr_type*types)
+static unsigned __initdata last_fixed_start;
+static unsigned __initdata last_fixed_end;
+static mtrr_type __initdata last_fixed_type;
+
+static void __init print_fixed_last(void)
+{
+        if (!last_fixed_end)
+                return;
+
+        printk(KERN_DEBUG "  %05X-%05X %s\n", last_fixed_start,
+                last_fixed_end - 1, mtrr_attrib_to_str(last_fixed_type));
+
+        last_fixed_end = 0;
+}
+
+static void __init update_fixed_last(unsigned base, unsigned end,
+                                       mtrr_type type)
+{
+        last_fixed_start = base;
+        last_fixed_end = end;
+        last_fixed_type = type;
+}
+
+static void __init print_fixed(unsigned base, unsigned step,
+                               const mtrr_type *types)
 {
         unsigned i;
 
-        for (i = 0; i < 8; ++i, ++types, base += step)
-                printk(KERN_INFO "MTRR %05X-%05X %s\n",
-                        base, base + step - 1, mtrr_attrib_to_str(*types));
+        for (i = 0; i < 8; ++i, ++types, base += step) {
+                if (last_fixed_end == 0) {
+                        update_fixed_last(base, base + step, *types);
+                        continue;
+                }
+                if (last_fixed_end == base && last_fixed_type == *types) {
+                        last_fixed_end = base + step;
+                        continue;
+                }
+                /* new segments: gap or different type */
+                print_fixed_last();
+                update_fixed_last(base, base + step, *types);
+        }
 }
 
 static void prepare_set(void);
 static void post_set(void);
 
+static void __init print_mtrr_state(void)
+{
+        unsigned int i;
+        int high_width;
+
+        printk(KERN_DEBUG "MTRR default type: %s\n",
+                         mtrr_attrib_to_str(mtrr_state.def_type));
+        if (mtrr_state.have_fixed) {
+                printk(KERN_DEBUG "MTRR fixed ranges %sabled:\n",
+                       mtrr_state.enabled & 1 ? "en" : "dis");
+                print_fixed(0x00000, 0x10000, mtrr_state.fixed_ranges + 0);
+                for (i = 0; i < 2; ++i)
+                        print_fixed(0x80000 + i * 0x20000, 0x04000, mtrr_state.fixed_ranges + (i + 1) * 8);
+                for (i = 0; i < 8; ++i)
+                        print_fixed(0xC0000 + i * 0x08000, 0x01000, mtrr_state.fixed_ranges + (i + 3) * 8);
+
+                /* tail */
+                print_fixed_last();
+        }
+        printk(KERN_DEBUG "MTRR variable ranges %sabled:\n",
+               mtrr_state.enabled & 2 ? "en" : "dis");
+        high_width = ((size_or_mask ? ffs(size_or_mask) - 1 : 32) - (32 - PAGE_SHIFT) + 3) / 4;
+        for (i = 0; i < num_var_ranges; ++i) {
+                if (mtrr_state.var_ranges[i].mask_lo & (1 << 11))
+                        printk(KERN_DEBUG "  %u base %0*X%05X000 mask %0*X%05X000 %s\n",
+                               i,
+                               high_width,
+                               mtrr_state.var_ranges[i].base_hi,
+                               mtrr_state.var_ranges[i].base_lo >> 12,
+                               high_width,
+                               mtrr_state.var_ranges[i].mask_hi,
+                               mtrr_state.var_ranges[i].mask_lo >> 12,
+                               mtrr_attrib_to_str(mtrr_state.var_ranges[i].base_lo & 0xff));
+                else
+                        printk(KERN_DEBUG "  %u disabled\n", i);
+        }
+        if (mtrr_tom2) {
+                printk(KERN_DEBUG "TOM2: %016llx aka %lldM\n",
+                                  mtrr_tom2, mtrr_tom2>>20);
+        }
+}
+
 /*  Grab all of the MTRR state for this CPU into *state  */
 void __init get_mtrr_state(void)
 {
@@ -231,41 +327,9 @@ void __init get_mtrr_state(void)
                 mtrr_tom2 |= low;
                 mtrr_tom2 &= 0xffffff800000ULL;
         }
-        if (mtrr_show) {
-                int high_width;
-
-                printk(KERN_INFO "MTRR default type: %s\n", mtrr_attrib_to_str(mtrr_state.def_type));
-                if (mtrr_state.have_fixed) {
-                        printk(KERN_INFO "MTRR fixed ranges %sabled:\n",
-                               mtrr_state.enabled & 1 ? "en" : "dis");
-                        print_fixed(0x00000, 0x10000, mtrr_state.fixed_ranges + 0);
-                        for (i = 0; i < 2; ++i)
-                                print_fixed(0x80000 + i * 0x20000, 0x04000, mtrr_state.fixed_ranges + (i + 1) * 8);
-                        for (i = 0; i < 8; ++i)
-                                print_fixed(0xC0000 + i * 0x08000, 0x01000, mtrr_state.fixed_ranges + (i + 3) * 8);
-                }
-                printk(KERN_INFO "MTRR variable ranges %sabled:\n",
-                       mtrr_state.enabled & 2 ? "en" : "dis");
-                high_width = ((size_or_mask ? ffs(size_or_mask) - 1 : 32) - (32 - PAGE_SHIFT) + 3) / 4;
-                for (i = 0; i < num_var_ranges; ++i) {
-                        if (mtrr_state.var_ranges[i].mask_lo & (1 << 11))
-                                printk(KERN_INFO "MTRR %u base %0*X%05X000 mask %0*X%05X000 %s\n",
-                                       i,
-                                       high_width,
-                                       mtrr_state.var_ranges[i].base_hi,
-                                       mtrr_state.var_ranges[i].base_lo >> 12,
-                                       high_width,
-                                       mtrr_state.var_ranges[i].mask_hi,
-                                       mtrr_state.var_ranges[i].mask_lo >> 12,
-                                       mtrr_attrib_to_str(mtrr_state.var_ranges[i].base_lo & 0xff));
-                        else
-                                printk(KERN_INFO "MTRR %u disabled\n", i);
-                }
-                if (mtrr_tom2) {
-                        printk(KERN_INFO "TOM2: %016llx aka %lldM\n",
-                                          mtrr_tom2, mtrr_tom2>>20);
-                }
-        }
+
+        print_mtrr_state();
+
         mtrr_state_set = 1;
 
         /* PAT setup for BP. We need to go through sync steps here */
@@ -308,27 +372,10 @@ void mtrr_wrmsr(unsigned msr, unsigned a, unsigned b)
 }
 
 /**
- * Enable and allow read/write of extended fixed-range MTRR bits on K8 CPUs
- * see AMD publication no. 24593, chapter 3.2.1 for more information
- */
-static inline void k8_enable_fixed_iorrs(void)
-{
-        unsigned lo, hi;
-
-        rdmsr(MSR_K8_SYSCFG, lo, hi);
-        mtrr_wrmsr(MSR_K8_SYSCFG, lo
-                                | K8_MTRRFIXRANGE_DRAM_ENABLE
-                                | K8_MTRRFIXRANGE_DRAM_MODIFY, hi);
-}
-
-/**
  * set_fixed_range - checks & updates a fixed-range MTRR if it differs from the value it should have
  * @msr: MSR address of the MTTR which should be checked and updated
  * @changed: pointer which indicates whether the MTRR needed to be changed
  * @msrwords: pointer to the MSR values which the MSR should have
- *
- * If K8 extentions are wanted, update the K8 SYSCFG MSR also.
- * See AMD publication no. 24593, chapter 7.8.1, page 233 for more information.
  */
 static void set_fixed_range(int msr, bool *changed, unsigned int *msrwords)
 {
@@ -337,10 +384,6 @@ static void set_fixed_range(int msr, bool *changed, unsigned int *msrwords)
         rdmsr(msr, lo, hi);
 
         if (lo != msrwords[0] || hi != msrwords[1]) {
-                if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
-                    (boot_cpu_data.x86 >= 0x0f && boot_cpu_data.x86 <= 0x11) &&
-                    ((msrwords[0] | msrwords[1]) & K8_MTRR_RDMEM_WRMEM_MASK))
-                        k8_enable_fixed_iorrs();
                 mtrr_wrmsr(msr, msrwords[0], msrwords[1]);
                 *changed = true;
         }
@@ -376,22 +419,31 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
 {
         unsigned int mask_lo, mask_hi, base_lo, base_hi;
         unsigned int tmp, hi;
+        int cpu;
+
+        /*
+         * get_mtrr doesn't need to update mtrr_state, also it could be called
+         * from any cpu, so try to print it out directly.
+         */
+        cpu = get_cpu();
 
         rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);
+
         if ((mask_lo & 0x800) == 0) {
                 /*  Invalid (i.e. free) range  */
                 *base = 0;
                 *size = 0;
                 *type = 0;
-                return;
+                goto out_put_cpu;
         }
 
         rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
 
-        /* Work out the shifted address mask. */
+        /* Work out the shifted address mask: */
         tmp = mask_hi << (32 - PAGE_SHIFT) | mask_lo >> PAGE_SHIFT;
         mask_lo = size_or_mask | tmp;
-        /* Expand tmp with high bits to all 1s*/
+
+        /* Expand tmp with high bits to all 1s: */
         hi = fls(tmp);
         if (hi > 0) {
                 tmp |= ~((1<<(hi - 1)) - 1);
@@ -402,11 +454,19 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
                 }
         }
 
-        /* This works correctly if size is a power of two, i.e. a
-           contiguous range. */
+        /*
+         * This works correctly if size is a power of two, i.e. a
+         * contiguous range:
+         */
         *size = -mask_lo;
         *base = base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT;
         *type = base_lo & 0xff;
+
+        printk(KERN_DEBUG "  get_mtrr: cpu%d reg%02d base=%010lx size=%010lx %s\n",
+                        cpu, reg, *base, *size,
+                        mtrr_attrib_to_str(*type & 0xff));
+out_put_cpu:
+        put_cpu();
 }
 
 /**
@@ -419,6 +479,8 @@ static int set_fixed_ranges(mtrr_type * frs)
         bool changed = false;
         int block=-1, range;
 
+        k8_check_syscfg_dram_mod_en();
+
         while (fixed_range_blocks[++block].ranges)
             for (range=0; range < fixed_range_blocks[block].ranges; range++)
                 set_fixed_range(fixed_range_blocks[block].base_msr + range,
diff --git a/arch/x86/kernel/cpu/mtrr/if.c b/arch/x86/kernel/cpu/mtrr/if.c
index 4c4214690dd1..fb73a52913a4 100644
--- a/arch/x86/kernel/cpu/mtrr/if.c
+++ b/arch/x86/kernel/cpu/mtrr/if.c
@@ -377,10 +377,6 @@ static const struct file_operations mtrr_fops = {
         .release = mtrr_close,
 };
 
-
-static struct proc_dir_entry *proc_root_mtrr;
-
-
 static int mtrr_seq_show(struct seq_file *seq, void *offset)
 {
         char factor;
@@ -423,11 +419,7 @@ static int __init mtrr_if_init(void)
             (!cpu_has(c, X86_FEATURE_CENTAUR_MCR)))
                 return -ENODEV;
 
-        proc_root_mtrr =
-                proc_create("mtrr", S_IWUSR | S_IRUGO, NULL, &mtrr_fops);
-
-        if (proc_root_mtrr)
-                proc_root_mtrr->owner = THIS_MODULE;
+        proc_create("mtrr", S_IWUSR | S_IRUGO, NULL, &mtrr_fops);
         return 0;
 }
 
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 236a401b8259..03cda01f57c7 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -574,7 +574,7 @@ struct mtrr_value {
         unsigned long   lsize;
 };
 
-static struct mtrr_value mtrr_state[MTRR_MAX_VAR_RANGES];
+static struct mtrr_value mtrr_value[MTRR_MAX_VAR_RANGES];
 
 static int mtrr_save(struct sys_device * sysdev, pm_message_t state)
 {
@@ -582,9 +582,9 @@ static int mtrr_save(struct sys_device * sysdev, pm_message_t state)
 
         for (i = 0; i < num_var_ranges; i++) {
                 mtrr_if->get(i,
-                             &mtrr_state[i].lbase,
-                             &mtrr_state[i].lsize,
-                             &mtrr_state[i].ltype);
+                             &mtrr_value[i].lbase,
+                             &mtrr_value[i].lsize,
+                             &mtrr_value[i].ltype);
         }
         return 0;
 }
@@ -594,11 +594,11 @@ static int mtrr_restore(struct sys_device * sysdev)
         int i;
 
         for (i = 0; i < num_var_ranges; i++) {
-                if (mtrr_state[i].lsize) 
+                if (mtrr_value[i].lsize)
                         set_mtrr(i,
-                                 mtrr_state[i].lbase,
-                                 mtrr_state[i].lsize,
-                                 mtrr_state[i].ltype);
+                                 mtrr_value[i].lbase,
+                                 mtrr_value[i].lsize,
+                                 mtrr_value[i].ltype);
         }
         return 0;
 }
@@ -610,1058 +610,7 @@ static struct sysdev_driver mtrr_sysdev_driver = {
         .resume         = mtrr_restore,
 };
 
-/* should be related to MTRR_VAR_RANGES nums */
-#define RANGE_NUM 256
-
-struct res_range {
-        unsigned long start;
-        unsigned long end;
-};
-
-static int __init
-add_range(struct res_range *range, int nr_range, unsigned long start,
-                              unsigned long end)
-{
-        /* out of slots */
-        if (nr_range >= RANGE_NUM)
-                return nr_range;
-
-        range[nr_range].start = start;
-        range[nr_range].end = end;
-
-        nr_range++;
-
-        return nr_range;
-}
-
-static int __init
-add_range_with_merge(struct res_range *range, int nr_range, unsigned long start,
-                              unsigned long end)
-{
-        int i;
-
-        /* try to merge it with old one */
-        for (i = 0; i < nr_range; i++) {
-                unsigned long final_start, final_end;
-                unsigned long common_start, common_end;
-
-                if (!range[i].end)
-                        continue;
-
-                common_start = max(range[i].start, start);
-                common_end = min(range[i].end, end);
-                if (common_start > common_end + 1)
-                        continue;
-
-                final_start = min(range[i].start, start);
-                final_end = max(range[i].end, end);
-
-                range[i].start = final_start;
-                range[i].end =  final_end;
-                return nr_range;
-        }
-
-        /* need to add that */
-        return add_range(range, nr_range, start, end);
-}
-
-static void __init
-subtract_range(struct res_range *range, unsigned long start, unsigned long end)
-{
-        int i, j;
-
-        for (j = 0; j < RANGE_NUM; j++) {
-                if (!range[j].end)
-                        continue;
-
-                if (start <= range[j].start && end >= range[j].end) {
-                        range[j].start = 0;
-                        range[j].end = 0;
-                        continue;
-                }
-
-                if (start <= range[j].start && end < range[j].end &&
-                    range[j].start < end + 1) {
-                        range[j].start = end + 1;
-                        continue;
-                }
-
-
-                if (start > range[j].start && end >= range[j].end &&
-                    range[j].end > start - 1) {
-                        range[j].end = start - 1;
-                        continue;
-                }
-
-                if (start > range[j].start && end < range[j].end) {
-                        /* find the new spare */
-                        for (i = 0; i < RANGE_NUM; i++) {
-                                if (range[i].end == 0)
-                                        break;
-                        }
-                        if (i < RANGE_NUM) {
-                                range[i].end = range[j].end;
-                                range[i].start = end + 1;
-                        } else {
-                                printk(KERN_ERR "run of slot in ranges\n");
-                        }
-                        range[j].end = start - 1;
-                        continue;
-                }
-        }
-}
-
-static int __init cmp_range(const void *x1, const void *x2)
-{
-        const struct res_range *r1 = x1;
-        const struct res_range *r2 = x2;
-        long start1, start2;
-
-        start1 = r1->start;
-        start2 = r2->start;
-
-        return start1 - start2;
-}
-
-struct var_mtrr_range_state {
-        unsigned long base_pfn;
-        unsigned long size_pfn;
-        mtrr_type type;
-};
-
-static struct var_mtrr_range_state __initdata range_state[RANGE_NUM];
-static int __initdata debug_print;
-
-static int __init
-x86_get_mtrr_mem_range(struct res_range *range, int nr_range,
-                       unsigned long extra_remove_base,
-                       unsigned long extra_remove_size)
-{
-        unsigned long i, base, size;
-        mtrr_type type;
-
-        for (i = 0; i < num_var_ranges; i++) {
-                type = range_state[i].type;
-                if (type != MTRR_TYPE_WRBACK)
-                        continue;
-                base = range_state[i].base_pfn;
-                size = range_state[i].size_pfn;
-                nr_range = add_range_with_merge(range, nr_range, base,
-                                                base + size - 1);
-        }
-        if (debug_print) {
-                printk(KERN_DEBUG "After WB checking\n");
-                for (i = 0; i < nr_range; i++)
-                        printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n",
-                                 range[i].start, range[i].end + 1);
-        }
-
-        /* take out UC ranges */
-        for (i = 0; i < num_var_ranges; i++) {
-                type = range_state[i].type;
-                if (type != MTRR_TYPE_UNCACHABLE &&
-                    type != MTRR_TYPE_WRPROT)
-                        continue;
-                size = range_state[i].size_pfn;
-                if (!size)
-                        continue;
-                base = range_state[i].base_pfn;
-                subtract_range(range, base, base + size - 1);
-        }
-        if (extra_remove_size)
-                subtract_range(range, extra_remove_base,
-                                 extra_remove_base + extra_remove_size  - 1);
-
-        /* get new range num */
-        nr_range = 0;
-        for (i = 0; i < RANGE_NUM; i++) {
-                if (!range[i].end)
-                        continue;
-                nr_range++;
-        }
-        if  (debug_print) {
-                printk(KERN_DEBUG "After UC checking\n");
-                for (i = 0; i < nr_range; i++)
-                        printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n",
-                                 range[i].start, range[i].end + 1);
-        }
-
-        /* sort the ranges */
-        sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL);
-        if  (debug_print) {
-                printk(KERN_DEBUG "After sorting\n");
-                for (i = 0; i < nr_range; i++)
-                        printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n",
-                                 range[i].start, range[i].end + 1);
-        }
-
-        /* clear those is not used */
-        for (i = nr_range; i < RANGE_NUM; i++)
-                memset(&range[i], 0, sizeof(range[i]));
-
-        return nr_range;
-}
-
-static struct res_range __initdata range[RANGE_NUM];
-static int __initdata nr_range;
-
-#ifdef CONFIG_MTRR_SANITIZER
-
-static unsigned long __init sum_ranges(struct res_range *range, int nr_range)
-{
-        unsigned long sum;
-        int i;
-
-        sum = 0;
-        for (i = 0; i < nr_range; i++)
-                sum += range[i].end + 1 - range[i].start;
-
-        return sum;
-}
-
-static int enable_mtrr_cleanup __initdata =
-        CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT;
-
-static int __init disable_mtrr_cleanup_setup(char *str)
-{
-        enable_mtrr_cleanup = 0;
-        return 0;
-}
-early_param("disable_mtrr_cleanup", disable_mtrr_cleanup_setup);
-
-static int __init enable_mtrr_cleanup_setup(char *str)
-{
-        enable_mtrr_cleanup = 1;
-        return 0;
-}
-early_param("enable_mtrr_cleanup", enable_mtrr_cleanup_setup);
-
-static int __init mtrr_cleanup_debug_setup(char *str)
-{
-        debug_print = 1;
-        return 0;
-}
-early_param("mtrr_cleanup_debug", mtrr_cleanup_debug_setup);
-
-struct var_mtrr_state {
-        unsigned long   range_startk;
-        unsigned long   range_sizek;
-        unsigned long   chunk_sizek;
-        unsigned long   gran_sizek;
-        unsigned int    reg;
-};
-
-static void __init
-set_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek,
-                unsigned char type, unsigned int address_bits)
-{
-        u32 base_lo, base_hi, mask_lo, mask_hi;
-        u64 base, mask;
-
-        if (!sizek) {
-                fill_mtrr_var_range(reg, 0, 0, 0, 0);
-                return;
-        }
-
-        mask = (1ULL << address_bits) - 1;
-        mask &= ~((((u64)sizek) << 10) - 1);
-
-        base  = ((u64)basek) << 10;
-
-        base |= type;
-        mask |= 0x800;
-
-        base_lo = base & ((1ULL<<32) - 1);
-        base_hi = base >> 32;
-
-        mask_lo = mask & ((1ULL<<32) - 1);
-        mask_hi = mask >> 32;
-
-        fill_mtrr_var_range(reg, base_lo, base_hi, mask_lo, mask_hi);
-}
-
-static void __init
-save_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek,
-                unsigned char type)
-{
-        range_state[reg].base_pfn = basek >> (PAGE_SHIFT - 10);
-        range_state[reg].size_pfn = sizek >> (PAGE_SHIFT - 10);
-        range_state[reg].type = type;
-}
-
-static void __init
-set_var_mtrr_all(unsigned int address_bits)
-{
-        unsigned long basek, sizek;
-        unsigned char type;
-        unsigned int reg;
-
-        for (reg = 0; reg < num_var_ranges; reg++) {
-                basek = range_state[reg].base_pfn << (PAGE_SHIFT - 10);
-                sizek = range_state[reg].size_pfn << (PAGE_SHIFT - 10);
-                type = range_state[reg].type;
-
-                set_var_mtrr(reg, basek, sizek, type, address_bits);
-        }
-}
-
-static unsigned long to_size_factor(unsigned long sizek, char *factorp)
-{
-        char factor;
-        unsigned long base = sizek;
-
-        if (base & ((1<<10) - 1)) {
-                /* not MB alignment */
-                factor = 'K';
-        } else if (base & ((1<<20) - 1)){
-                factor = 'M';
-                base >>= 10;
-        } else {
-                factor = 'G';
-                base >>= 20;
-        }
-
-        *factorp = factor;
-
-        return base;
-}
-
-static unsigned int __init
-range_to_mtrr(unsigned int reg, unsigned long range_startk,
-              unsigned long range_sizek, unsigned char type)
-{
-        if (!range_sizek || (reg >= num_var_ranges))
-                return reg;
-
-        while (range_sizek) {
-                unsigned long max_align, align;
-                unsigned long sizek;
-
-                /* Compute the maximum size I can make a range */
-                if (range_startk)
-                        max_align = ffs(range_startk) - 1;
-                else
-                        max_align = 32;
-                align = fls(range_sizek) - 1;
-                if (align > max_align)
-                        align = max_align;
-
-                sizek = 1 << align;
-                if (debug_print) {
-                        char start_factor = 'K', size_factor = 'K';
-                        unsigned long start_base, size_base;
-
-                        start_base = to_size_factor(range_startk, &start_factor),
-                        size_base = to_size_factor(sizek, &size_factor),
-
-                        printk(KERN_DEBUG "Setting variable MTRR %d, "
-                                "base: %ld%cB, range: %ld%cB, type %s\n",
-                                reg, start_base, start_factor,
-                                size_base, size_factor,
-                                (type == MTRR_TYPE_UNCACHABLE)?"UC":
-                                    ((type == MTRR_TYPE_WRBACK)?"WB":"Other")
-                                );
-                }
-                save_var_mtrr(reg++, range_startk, sizek, type);
-                range_startk += sizek;
-                range_sizek -= sizek;
-                if (reg >= num_var_ranges)
-                        break;
-        }
-        return reg;
-}
-
-static unsigned __init
-range_to_mtrr_with_hole(struct var_mtrr_state *state, unsigned long basek,
-                        unsigned long sizek)
-{
-        unsigned long hole_basek, hole_sizek;
-        unsigned long second_basek, second_sizek;
-        unsigned long range0_basek, range0_sizek;
-        unsigned long range_basek, range_sizek;
-        unsigned long chunk_sizek;
-        unsigned long gran_sizek;
-
-        hole_basek = 0;
-        hole_sizek = 0;
-        second_basek = 0;
-        second_sizek = 0;
-        chunk_sizek = state->chunk_sizek;
-        gran_sizek = state->gran_sizek;
-
-        /* align with gran size, prevent small block used up MTRRs */
-        range_basek = ALIGN(state->range_startk, gran_sizek);
-        if ((range_basek > basek) && basek)
-                return second_sizek;
-        state->range_sizek -= (range_basek - state->range_startk);
-        range_sizek = ALIGN(state->range_sizek, gran_sizek);
-
-        while (range_sizek > state->range_sizek) {
-                range_sizek -= gran_sizek;
-                if (!range_sizek)
-                        return 0;
-        }
-        state->range_sizek = range_sizek;
-
-        /* try to append some small hole */
-        range0_basek = state->range_startk;
-        range0_sizek = ALIGN(state->range_sizek, chunk_sizek);
-
-        /* no increase */
-        if (range0_sizek == state->range_sizek) {
-                if (debug_print)
-                        printk(KERN_DEBUG "rangeX: %016lx - %016lx\n",
-                                range0_basek<<10,
-                                (range0_basek + state->range_sizek)<<10);
-                state->reg = range_to_mtrr(state->reg, range0_basek,
-                                state->range_sizek, MTRR_TYPE_WRBACK);
-                return 0;
-        }
-
-        /* only cut back, when it is not the last */
-        if (sizek) {
-                while (range0_basek + range0_sizek > (basek + sizek)) {
-                        if (range0_sizek >= chunk_sizek)
-                                range0_sizek -= chunk_sizek;
-                        else
-                                range0_sizek = 0;
-
-                        if (!range0_sizek)
-                                break;
-                }
-        }
-
-second_try:
-        range_basek = range0_basek + range0_sizek;
-
-        /* one hole in the middle */
-        if (range_basek > basek && range_basek <= (basek + sizek))
-                second_sizek = range_basek - basek;
-
-        if (range0_sizek > state->range_sizek) {
-
-                /* one hole in middle or at end */
-                hole_sizek = range0_sizek - state->range_sizek - second_sizek;
-
-                /* hole size should be less than half of range0 size */
-                if (hole_sizek >= (range0_sizek >> 1) &&
-                    range0_sizek >= chunk_sizek) {
-                        range0_sizek -= chunk_sizek;
-                        second_sizek = 0;
-                        hole_sizek = 0;
-
-                        goto second_try;
-                }
-        }
-
-        if (range0_sizek) {
-                if (debug_print)
-                        printk(KERN_DEBUG "range0: %016lx - %016lx\n",
-                                range0_basek<<10,
-                                (range0_basek + range0_sizek)<<10);
-                state->reg = range_to_mtrr(state->reg, range0_basek,
-                                range0_sizek, MTRR_TYPE_WRBACK);
-        }
-
-        if (range0_sizek < state->range_sizek) {
-                /* need to handle left over */
-                range_sizek = state->range_sizek - range0_sizek;
-
-                if (debug_print)
-                        printk(KERN_DEBUG "range: %016lx - %016lx\n",
-                                 range_basek<<10,
-                                 (range_basek + range_sizek)<<10);
-                state->reg = range_to_mtrr(state->reg, range_basek,
-                                 range_sizek, MTRR_TYPE_WRBACK);
-        }
-
-        if (hole_sizek) {
-                hole_basek = range_basek - hole_sizek - second_sizek;
-                if (debug_print)
-                        printk(KERN_DEBUG "hole: %016lx - %016lx\n",
-                                 hole_basek<<10,
-                                 (hole_basek + hole_sizek)<<10);
-                state->reg = range_to_mtrr(state->reg, hole_basek,
-                                 hole_sizek, MTRR_TYPE_UNCACHABLE);
-        }
-
-        return second_sizek;
-}
-
-static void __init
-set_var_mtrr_range(struct var_mtrr_state *state, unsigned long base_pfn,
-                   unsigned long size_pfn)
-{
-        unsigned long basek, sizek;
-        unsigned long second_sizek = 0;
-
-        if (state->reg >= num_var_ranges)
-                return;
-
-        basek = base_pfn << (PAGE_SHIFT - 10);
-        sizek = size_pfn << (PAGE_SHIFT - 10);
-
-        /* See if I can merge with the last range */
-        if ((basek <= 1024) ||
-            (state->range_startk + state->range_sizek == basek)) {
-                unsigned long endk = basek + sizek;
-                state->range_sizek = endk - state->range_startk;
-                return;
-        }
-        /* Write the range mtrrs */
-        if (state->range_sizek != 0)
-                second_sizek = range_to_mtrr_with_hole(state, basek, sizek);
-
-        /* Allocate an msr */
-        state->range_startk = basek + second_sizek;
-        state->range_sizek  = sizek - second_sizek;
-}
-
-/* mininum size of mtrr block that can take hole */
-static u64 mtrr_chunk_size __initdata = (256ULL<<20);
-
-static int __init parse_mtrr_chunk_size_opt(char *p)
-{
-        if (!p)
-                return -EINVAL;
-        mtrr_chunk_size = memparse(p, &p);
-        return 0;
-}
-early_param("mtrr_chunk_size", parse_mtrr_chunk_size_opt);
-
-/* granity of mtrr of block */
-static u64 mtrr_gran_size __initdata;
-
-static int __init parse_mtrr_gran_size_opt(char *p)
-{
-        if (!p)
-                return -EINVAL;
-        mtrr_gran_size = memparse(p, &p);
-        return 0;
-}
-early_param("mtrr_gran_size", parse_mtrr_gran_size_opt);
-
-static int nr_mtrr_spare_reg __initdata =
-                                 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT;
-
-static int __init parse_mtrr_spare_reg(char *arg)
-{
-        if (arg)
-                nr_mtrr_spare_reg = simple_strtoul(arg, NULL, 0);
-        return 0;
-}
-
-early_param("mtrr_spare_reg_nr", parse_mtrr_spare_reg);
-
-static int __init
-x86_setup_var_mtrrs(struct res_range *range, int nr_range,
-                    u64 chunk_size, u64 gran_size)
-{
-        struct var_mtrr_state var_state;
-        int i;
-        int num_reg;
-
-        var_state.range_startk  = 0;
-        var_state.range_sizek   = 0;
-        var_state.reg           = 0;
-        var_state.chunk_sizek   = chunk_size >> 10;
-        var_state.gran_sizek    = gran_size >> 10;
-
-        memset(range_state, 0, sizeof(range_state));
-
-        /* Write the range etc */
-        for (i = 0; i < nr_range; i++)
-                set_var_mtrr_range(&var_state, range[i].start,
-                                   range[i].end - range[i].start + 1);
-
-        /* Write the last range */
-        if (var_state.range_sizek != 0)
-                range_to_mtrr_with_hole(&var_state, 0, 0);
-
-        num_reg = var_state.reg;
-        /* Clear out the extra MTRR's */
-        while (var_state.reg < num_var_ranges) {
-                save_var_mtrr(var_state.reg, 0, 0, 0);
-                var_state.reg++;
-        }
-
-        return num_reg;
-}
-
-struct mtrr_cleanup_result {
-        unsigned long gran_sizek;
-        unsigned long chunk_sizek;
-        unsigned long lose_cover_sizek;
-        unsigned int num_reg;
-        int bad;
-};
-
-/*
- * gran_size: 64K, 128K, 256K, 512K, 1M, 2M, ..., 2G
- * chunk size: gran_size, ..., 2G
- * so we need (1+16)*8
- */
-#define NUM_RESULT      136
-#define PSHIFT          (PAGE_SHIFT - 10)
-
-static struct mtrr_cleanup_result __initdata result[NUM_RESULT];
-static unsigned long __initdata min_loss_pfn[RANGE_NUM];
-
-static void __init print_out_mtrr_range_state(void)
-{
-        int i;
-        char start_factor = 'K', size_factor = 'K';
-        unsigned long start_base, size_base;
-        mtrr_type type;
-
-        for (i = 0; i < num_var_ranges; i++) {
-
-                size_base = range_state[i].size_pfn << (PAGE_SHIFT - 10);
-                if (!size_base)
-                        continue;
-
-                size_base = to_size_factor(size_base, &size_factor),
-                start_base = range_state[i].base_pfn << (PAGE_SHIFT - 10);
-                start_base = to_size_factor(start_base, &start_factor),
-                type = range_state[i].type;
-
-                printk(KERN_DEBUG "reg %d, base: %ld%cB, range: %ld%cB, type %s\n",
-                        i, start_base, start_factor,
-                        size_base, size_factor,
-                        (type == MTRR_TYPE_UNCACHABLE) ? "UC" :
-                            ((type == MTRR_TYPE_WRPROT) ? "WP" :
-                             ((type == MTRR_TYPE_WRBACK) ? "WB" : "Other"))
-                        );
-        }
-}
-
-static int __init mtrr_need_cleanup(void)
-{
-        int i;
-        mtrr_type type;
-        unsigned long size;
-        /* extra one for all 0 */
-        int num[MTRR_NUM_TYPES + 1];
-
-        /* check entries number */
-        memset(num, 0, sizeof(num));
-        for (i = 0; i < num_var_ranges; i++) {
-                type = range_state[i].type;
-                size = range_state[i].size_pfn;
-                if (type >= MTRR_NUM_TYPES)
-                        continue;
-                if (!size)
-                        type = MTRR_NUM_TYPES;
-                if (type == MTRR_TYPE_WRPROT)
-                        type = MTRR_TYPE_UNCACHABLE;
-                num[type]++;
-        }
-
-        /* check if we got UC entries */
-        if (!num[MTRR_TYPE_UNCACHABLE])
-                return 0;
-
-        /* check if we only had WB and UC */
-        if (num[MTRR_TYPE_WRBACK] + num[MTRR_TYPE_UNCACHABLE] !=
-                num_var_ranges - num[MTRR_NUM_TYPES])
-                return 0;
-
-        return 1;
-}
-
-static unsigned long __initdata range_sums;
-static void __init mtrr_calc_range_state(u64 chunk_size, u64 gran_size,
-                                         unsigned long extra_remove_base,
-                                         unsigned long extra_remove_size,
-                                         int i)
-{
-        int num_reg;
-        static struct res_range range_new[RANGE_NUM];
-        static int nr_range_new;
-        unsigned long range_sums_new;
-
-        /* convert ranges to var ranges state */
-        num_reg = x86_setup_var_mtrrs(range, nr_range,
-                                                chunk_size, gran_size);
-
-        /* we got new setting in range_state, check it */
-        memset(range_new, 0, sizeof(range_new));
-        nr_range_new = x86_get_mtrr_mem_range(range_new, 0,
-                                extra_remove_base, extra_remove_size);
-        range_sums_new = sum_ranges(range_new, nr_range_new);
-
-        result[i].chunk_sizek = chunk_size >> 10;
-        result[i].gran_sizek = gran_size >> 10;
-        result[i].num_reg = num_reg;
-        if (range_sums < range_sums_new) {
-                result[i].lose_cover_sizek =
-                        (range_sums_new - range_sums) << PSHIFT;
-                result[i].bad = 1;
-        } else
-                result[i].lose_cover_sizek =
-                        (range_sums - range_sums_new) << PSHIFT;
-
-        /* double check it */
-        if (!result[i].bad && !result[i].lose_cover_sizek) {
-                if (nr_range_new != nr_range ||
-                        memcmp(range, range_new, sizeof(range)))
-                                result[i].bad = 1;
-        }
-
-        if (!result[i].bad && (range_sums - range_sums_new <
-                                min_loss_pfn[num_reg])) {
-                min_loss_pfn[num_reg] =
-                        range_sums - range_sums_new;
-        }
-}
-
-static void __init mtrr_print_out_one_result(int i)
-{
-        char gran_factor, chunk_factor, lose_factor;
-        unsigned long gran_base, chunk_base, lose_base;
-
-        gran_base = to_size_factor(result[i].gran_sizek, &gran_factor),
-        chunk_base = to_size_factor(result[i].chunk_sizek, &chunk_factor),
-        lose_base = to_size_factor(result[i].lose_cover_sizek, &lose_factor),
-        printk(KERN_INFO "%sgran_size: %ld%c \tchunk_size: %ld%c \t",
-                        result[i].bad ? "*BAD*" : " ",
-                        gran_base, gran_factor, chunk_base, chunk_factor);
-        printk(KERN_CONT "num_reg: %d  \tlose cover RAM: %s%ld%c\n",
-                        result[i].num_reg, result[i].bad ? "-" : "",
-                        lose_base, lose_factor);
-}
-
-static int __init mtrr_search_optimal_index(void)
-{
-        int i;
-        int num_reg_good;
-        int index_good;
-
-        if (nr_mtrr_spare_reg >= num_var_ranges)
-                nr_mtrr_spare_reg = num_var_ranges - 1;
-        num_reg_good = -1;
-        for (i = num_var_ranges - nr_mtrr_spare_reg; i > 0; i--) {
-                if (!min_loss_pfn[i])
-                        num_reg_good = i;
-        }
-
-        index_good = -1;
-        if (num_reg_good != -1) {
-                for (i = 0; i < NUM_RESULT; i++) {
-                        if (!result[i].bad &&
-                            result[i].num_reg == num_reg_good &&
-                            !result[i].lose_cover_sizek) {
-                                index_good = i;
-                                break;
-                        }
-                }
-        }
-
-        return index_good;
-}
-
-
-static int __init mtrr_cleanup(unsigned address_bits)
-{
-        unsigned long extra_remove_base, extra_remove_size;
-        unsigned long base, size, def, dummy;
-        mtrr_type type;
-        u64 chunk_size, gran_size;
-        int index_good;
-        int i;
-
-        if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1)
-                return 0;
-        rdmsr(MTRRdefType_MSR, def, dummy);
-        def &= 0xff;
-        if (def != MTRR_TYPE_UNCACHABLE)
-                return 0;
-
-        /* get it and store it aside */
-        memset(range_state, 0, sizeof(range_state));
-        for (i = 0; i < num_var_ranges; i++) {
-                mtrr_if->get(i, &base, &size, &type);
-                range_state[i].base_pfn = base;
-                range_state[i].size_pfn = size;
-                range_state[i].type = type;
-        }
-
-        /* check if we need handle it and can handle it */
-        if (!mtrr_need_cleanup())
-                return 0;
-
-        /* print original var MTRRs at first, for debugging: */
-        printk(KERN_DEBUG "original variable MTRRs\n");
-        print_out_mtrr_range_state();
-
-        memset(range, 0, sizeof(range));
-        extra_remove_size = 0;
-        extra_remove_base = 1 << (32 - PAGE_SHIFT);
-        if (mtrr_tom2)
-                extra_remove_size =
-                        (mtrr_tom2 >> PAGE_SHIFT) - extra_remove_base;
-        nr_range = x86_get_mtrr_mem_range(range, 0, extra_remove_base,
-                                          extra_remove_size);
-        /*
-         * [0, 1M) should always be coverred by var mtrr with WB
-         * and fixed mtrrs should take effective before var mtrr for it
-         */
-        nr_range = add_range_with_merge(range, nr_range, 0,
-                                        (1ULL<<(20 - PAGE_SHIFT)) - 1);
-        /* sort the ranges */
-        sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL);
-
-        range_sums = sum_ranges(range, nr_range);
-        printk(KERN_INFO "total RAM coverred: %ldM\n",
-               range_sums >> (20 - PAGE_SHIFT));
-
-        if (mtrr_chunk_size && mtrr_gran_size) {
-                i = 0;
-                mtrr_calc_range_state(mtrr_chunk_size, mtrr_gran_size,
-                                      extra_remove_base, extra_remove_size, i);
-
-                mtrr_print_out_one_result(i);
-
-                if (!result[i].bad) {
-                        set_var_mtrr_all(address_bits);
-                        return 1;
-                }
-                printk(KERN_INFO "invalid mtrr_gran_size or mtrr_chunk_size, "
-                       "will find optimal one\n");
-        }
-
-        i = 0;
-        memset(min_loss_pfn, 0xff, sizeof(min_loss_pfn));
-        memset(result, 0, sizeof(result));
-        for (gran_size = (1ULL<<16); gran_size < (1ULL<<32); gran_size <<= 1) {
-
-                for (chunk_size = gran_size; chunk_size < (1ULL<<32);
-                     chunk_size <<= 1) {
-
-                        if (i >= NUM_RESULT)
-                                continue;
-
-                        mtrr_calc_range_state(chunk_size, gran_size,
-                                      extra_remove_base, extra_remove_size, i);
-                        if (debug_print) {
-                                mtrr_print_out_one_result(i);
-                                printk(KERN_INFO "\n");
-                        }
-
-                        i++;
-                }
-        }
-
-        /* try to find the optimal index */
-        index_good = mtrr_search_optimal_index();
-
-        if (index_good != -1) {
-                printk(KERN_INFO "Found optimal setting for mtrr clean up\n");
-                i = index_good;
-                mtrr_print_out_one_result(i);
-
-                /* convert ranges to var ranges state */
-                chunk_size = result[i].chunk_sizek;
-                chunk_size <<= 10;
-                gran_size = result[i].gran_sizek;
-                gran_size <<= 10;
-                x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size);
-                set_var_mtrr_all(address_bits);
-                printk(KERN_DEBUG "New variable MTRRs\n");
-                print_out_mtrr_range_state();
-                return 1;
-        } else {
-                /* print out all */
-                for (i = 0; i < NUM_RESULT; i++)
-                        mtrr_print_out_one_result(i);
-        }
-
-        printk(KERN_INFO "mtrr_cleanup: can not find optimal value\n");
-        printk(KERN_INFO "please specify mtrr_gran_size/mtrr_chunk_size\n");
-
-        return 0;
-}
-#else
-static int __init mtrr_cleanup(unsigned address_bits)
-{
-        return 0;
-}
-#endif
-
-static int __initdata changed_by_mtrr_cleanup;
-
-static int disable_mtrr_trim;
-
-static int __init disable_mtrr_trim_setup(char *str)
-{
-        disable_mtrr_trim = 1;
-        return 0;
-}
-early_param("disable_mtrr_trim", disable_mtrr_trim_setup);
-
-/*
- * Newer AMD K8s and later CPUs have a special magic MSR way to force WB
- * for memory >4GB. Check for that here.
- * Note this won't check if the MTRRs < 4GB where the magic bit doesn't
- * apply to are wrong, but so far we don't know of any such case in the wild.
- */
-#define Tom2Enabled (1U << 21)
-#define Tom2ForceMemTypeWB (1U << 22)
-
-int __init amd_special_default_mtrr(void)
-{
-        u32 l, h;
-
-        if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
-                return 0;
-        if (boot_cpu_data.x86 < 0xf || boot_cpu_data.x86 > 0x11)
-                return 0;
-        /* In case some hypervisor doesn't pass SYSCFG through */
-        if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0)
-                return 0;
-        /*
-         * Memory between 4GB and top of mem is forced WB by this magic bit.
-         * Reserved before K8RevF, but should be zero there.
-         */
-        if ((l & (Tom2Enabled | Tom2ForceMemTypeWB)) ==
-                 (Tom2Enabled | Tom2ForceMemTypeWB))
-                return 1;
-        return 0;
-}
-
-static u64 __init real_trim_memory(unsigned long start_pfn,
-                                   unsigned long limit_pfn)
-{
-        u64 trim_start, trim_size;
-        trim_start = start_pfn;
-        trim_start <<= PAGE_SHIFT;
-        trim_size = limit_pfn;
-        trim_size <<= PAGE_SHIFT;
-        trim_size -= trim_start;
-
-        return e820_update_range(trim_start, trim_size, E820_RAM,
-                                E820_RESERVED);
-}
-/**
- * mtrr_trim_uncached_memory - trim RAM not covered by MTRRs
- * @end_pfn: ending page frame number
- *
- * Some buggy BIOSes don't setup the MTRRs properly for systems with certain
- * memory configurations.  This routine checks that the highest MTRR matches
- * the end of memory, to make sure the MTRRs having a write back type cover
- * all of the memory the kernel is intending to use. If not, it'll trim any
- * memory off the end by adjusting end_pfn, removing it from the kernel's
- * allocation pools, warning the user with an obnoxious message.
- */
-int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
-{
-        unsigned long i, base, size, highest_pfn = 0, def, dummy;
-        mtrr_type type;
-        u64 total_trim_size;
-
-        /* extra one for all 0 */
-        int num[MTRR_NUM_TYPES + 1];
-        /*
-         * Make sure we only trim uncachable memory on machines that
-         * support the Intel MTRR architecture:
-         */
-        if (!is_cpu(INTEL) || disable_mtrr_trim)
-                return 0;
-        rdmsr(MTRRdefType_MSR, def, dummy);
-        def &= 0xff;
-        if (def != MTRR_TYPE_UNCACHABLE)
-                return 0;
-
-        /* get it and store it aside */
-        memset(range_state, 0, sizeof(range_state));
-        for (i = 0; i < num_var_ranges; i++) {
-                mtrr_if->get(i, &base, &size, &type);
-                range_state[i].base_pfn = base;
-                range_state[i].size_pfn = size;
-                range_state[i].type = type;
-        }
-
-        /* Find highest cached pfn */
-        for (i = 0; i < num_var_ranges; i++) {
-                type = range_state[i].type;
-                if (type != MTRR_TYPE_WRBACK)
-                        continue;
-                base = range_state[i].base_pfn;
-                size = range_state[i].size_pfn;
-                if (highest_pfn < base + size)
-                        highest_pfn = base + size;
-        }
-
-        /* kvm/qemu doesn't have mtrr set right, don't trim them all */
-        if (!highest_pfn) {
-                printk(KERN_INFO "CPU MTRRs all blank - virtualized system.\n");
-                return 0;
-        }
-
-        /* check entries number */
-        memset(num, 0, sizeof(num));
-        for (i = 0; i < num_var_ranges; i++) {
-                type = range_state[i].type;
-                if (type >= MTRR_NUM_TYPES)
-                        continue;
-                size = range_state[i].size_pfn;
-                if (!size)
-                        type = MTRR_NUM_TYPES;
-                num[type]++;
-        }
-
-        /* no entry for WB? */
-        if (!num[MTRR_TYPE_WRBACK])
-                return 0;
-
-        /* check if we only had WB and UC */
-        if (num[MTRR_TYPE_WRBACK] + num[MTRR_TYPE_UNCACHABLE] !=
-                num_var_ranges - num[MTRR_NUM_TYPES])
-                return 0;
-
-        memset(range, 0, sizeof(range));
-        nr_range = 0;
-        if (mtrr_tom2) {
-                range[nr_range].start = (1ULL<<(32 - PAGE_SHIFT));
-                range[nr_range].end = (mtrr_tom2 >> PAGE_SHIFT) - 1;
-                if (highest_pfn < range[nr_range].end + 1)
-                        highest_pfn = range[nr_range].end + 1;
-                nr_range++;
-        }
-        nr_range = x86_get_mtrr_mem_range(range, nr_range, 0, 0);
-
-        total_trim_size = 0;
-        /* check the head */
-        if (range[0].start)
-                total_trim_size += real_trim_memory(0, range[0].start);
-        /* check the holes */
-        for (i = 0; i < nr_range - 1; i++) {
-                if (range[i].end + 1 < range[i+1].start)
-                        total_trim_size += real_trim_memory(range[i].end + 1,
-                                                            range[i+1].start);
-        }
-        /* check the top */
-        i = nr_range - 1;
-        if (range[i].end + 1 < end_pfn)
-                total_trim_size += real_trim_memory(range[i].end + 1,
-                                                         end_pfn);
-
-        if (total_trim_size) {
-                printk(KERN_WARNING "WARNING: BIOS bug: CPU MTRRs don't cover"
-                        " all of memory, losing %lluMB of RAM.\n",
-                        total_trim_size >> 20);
-
-                if (!changed_by_mtrr_cleanup)
-                        WARN_ON(1);
-
-                printk(KERN_INFO "update e820 for mtrr\n");
-                update_e820();
-
-                return 1;
-        }
-
-        return 0;
-}
+int __initdata changed_by_mtrr_cleanup;
 
 /**
  * mtrr_bp_init - initialize mtrrs on the boot CPU
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h
index ffd60409cc6d..77f67f7b347a 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.h
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.h
@@ -79,6 +79,7 @@ extern struct mtrr_ops * mtrr_if;
 
 extern unsigned int num_var_ranges;
 extern u64 mtrr_tom2;
+extern struct mtrr_state_type mtrr_state;
 
 void mtrr_state_warn(void);
 const char *mtrr_attrib_to_str(int x);
@@ -88,3 +89,6 @@ void mtrr_wrmsr(unsigned, unsigned, unsigned);
 int amd_init_mtrr(void);
 int cyrix_init_mtrr(void);
 int centaur_init_mtrr(void);
+
+extern int changed_by_mtrr_cleanup;
+extern int mtrr_cleanup(unsigned address_bits);
diff --git a/arch/x86/kernel/cpu/transmeta.c b/arch/x86/kernel/cpu/transmeta.c
index 52b3fefbd5af..bb62b3e5caad 100644
--- a/arch/x86/kernel/cpu/transmeta.c
+++ b/arch/x86/kernel/cpu/transmeta.c
@@ -98,7 +98,7 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c)
 #endif
 }
 
-static struct cpu_dev transmeta_cpu_dev __cpuinitdata = {
+static const struct cpu_dev __cpuinitconst transmeta_cpu_dev = {
         .c_vendor       = "Transmeta",
         .c_ident        = { "GenuineTMx86", "TransmetaCPU" },
         .c_early_init   = early_init_transmeta,
diff --git a/arch/x86/kernel/cpu/umc.c b/arch/x86/kernel/cpu/umc.c
index e777f79e0960..fd2c37bf7acb 100644
--- a/arch/x86/kernel/cpu/umc.c
+++ b/arch/x86/kernel/cpu/umc.c
@@ -8,7 +8,7 @@
  * so no special init takes place.
  */
 
-static struct cpu_dev umc_cpu_dev __cpuinitdata = {
+static const struct cpu_dev __cpuinitconst umc_cpu_dev = {
         .c_vendor       = "UMC",
         .c_ident        = { "UMC UMC UMC" },
         .c_models = {
diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c
index 87d103ded1c3..dd2130b0fb3e 100644
--- a/arch/x86/kernel/dumpstack.c
+++ b/arch/x86/kernel/dumpstack.c
@@ -10,6 +10,7 @@
 #include <linux/kdebug.h>
 #include <linux/module.h>
 #include <linux/ptrace.h>
+#include <linux/ftrace.h>
 #include <linux/kexec.h>
 #include <linux/bug.h>
 #include <linux/nmi.h>
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 508bec1cee27..ef2c3563357d 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -110,19 +110,50 @@ int __init e820_all_mapped(u64 start, u64 end, unsigned type)
 /*
  * Add a memory region to the kernel e820 map.
  */
-void __init e820_add_region(u64 start, u64 size, int type)
+static void __init __e820_add_region(struct e820map *e820x, u64 start, u64 size,
+                                         int type)
 {
-        int x = e820.nr_map;
+        int x = e820x->nr_map;
 
-        if (x == ARRAY_SIZE(e820.map)) {
+        if (x == ARRAY_SIZE(e820x->map)) {
                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
                 return;
         }
 
-        e820.map[x].addr = start;
-        e820.map[x].size = size;
-        e820.map[x].type = type;
-        e820.nr_map++;
+        e820x->map[x].addr = start;
+        e820x->map[x].size = size;
+        e820x->map[x].type = type;
+        e820x->nr_map++;
+}
+
+void __init e820_add_region(u64 start, u64 size, int type)
+{
+        __e820_add_region(&e820, start, size, type);
+}
+
+static void __init e820_print_type(u32 type)
+{
+        switch (type) {
+        case E820_RAM:
+        case E820_RESERVED_KERN:
+                printk(KERN_CONT "(usable)");
+                break;
+        case E820_RESERVED:
+                printk(KERN_CONT "(reserved)");
+                break;
+        case E820_ACPI:
+                printk(KERN_CONT "(ACPI data)");
+                break;
+        case E820_NVS:
+                printk(KERN_CONT "(ACPI NVS)");
+                break;
+        case E820_UNUSABLE:
+                printk(KERN_CONT "(unusable)");
+                break;
+        default:
+                printk(KERN_CONT "type %u", type);
+                break;
+        }
 }
 
 void __init e820_print_map(char *who)
@@ -134,27 +165,8 @@ void __init e820_print_map(char *who)
                        (unsigned long long) e820.map[i].addr,
                        (unsigned long long)
                        (e820.map[i].addr + e820.map[i].size));
-                switch (e820.map[i].type) {
-                case E820_RAM:
-                case E820_RESERVED_KERN:
-                        printk(KERN_CONT "(usable)\n");
-                        break;
-                case E820_RESERVED:
-                        printk(KERN_CONT "(reserved)\n");
-                        break;
-                case E820_ACPI:
-                        printk(KERN_CONT "(ACPI data)\n");
-                        break;
-                case E820_NVS:
-                        printk(KERN_CONT "(ACPI NVS)\n");
-                        break;
-                case E820_UNUSABLE:
-                        printk("(unusable)\n");
-                        break;
-                default:
-                        printk(KERN_CONT "type %u\n", e820.map[i].type);
-                        break;
-                }
+                e820_print_type(e820.map[i].type);
+                printk(KERN_CONT "\n");
         }
 }
 
@@ -221,7 +233,7 @@ void __init e820_print_map(char *who)
  */
 
 int __init sanitize_e820_map(struct e820entry *biosmap, int max_nr_map,
-                                int *pnr_map)
+                             u32 *pnr_map)
 {
         struct change_member {
                 struct e820entry *pbios; /* pointer to original bios entry */
@@ -417,11 +429,12 @@ static int __init append_e820_map(struct e820entry *biosmap, int nr_map)
         return __append_e820_map(biosmap, nr_map);
 }
 
-static u64 __init e820_update_range_map(struct e820map *e820x, u64 start,
+static u64 __init __e820_update_range(struct e820map *e820x, u64 start,
                                         u64 size, unsigned old_type,
                                         unsigned new_type)
 {
-        int i;
+        u64 end;
+        unsigned int i;
         u64 real_updated_size = 0;
 
         BUG_ON(old_type == new_type);
@@ -429,27 +442,55 @@ static u64 __init e820_update_range_map(struct e820map *e820x, u64 start,
         if (size > (ULLONG_MAX - start))
                 size = ULLONG_MAX - start;
 
-        for (i = 0; i < e820.nr_map; i++) {
+        end = start + size;
+        printk(KERN_DEBUG "e820 update range: %016Lx - %016Lx ",
+                       (unsigned long long) start,
+                       (unsigned long long) end);
+        e820_print_type(old_type);
+        printk(KERN_CONT " ==> ");
+        e820_print_type(new_type);
+        printk(KERN_CONT "\n");
+
+        for (i = 0; i < e820x->nr_map; i++) {
                 struct e820entry *ei = &e820x->map[i];
                 u64 final_start, final_end;
+                u64 ei_end;
+
                 if (ei->type != old_type)
                         continue;
-                /* totally covered? */
-                if (ei->addr >= start &&
-                    (ei->addr + ei->size) <= (start + size)) {
+
+                ei_end = ei->addr + ei->size;
+                /* totally covered by new range? */
+                if (ei->addr >= start && ei_end <= end) {
                         ei->type = new_type;
                         real_updated_size += ei->size;
                         continue;
                 }
+
+                /* new range is totally covered? */
+                if (ei->addr < start && ei_end > end) {
+                        __e820_add_region(e820x, start, size, new_type);
+                        __e820_add_region(e820x, end, ei_end - end, ei->type);
+                        ei->size = start - ei->addr;
+                        real_updated_size += size;
+                        continue;
+                }
+
                 /* partially covered */
                 final_start = max(start, ei->addr);
-                final_end = min(start + size, ei->addr + ei->size);
+                final_end = min(end, ei_end);
                 if (final_start >= final_end)
                         continue;
-                e820_add_region(final_start, final_end - final_start,
-                                         new_type);
+
+                __e820_add_region(e820x, final_start, final_end - final_start,
+                                  new_type);
+
                 real_updated_size += final_end - final_start;
 
+                /*
+                 * left range could be head or tail, so need to update
+                 * size at first.
+                 */
                 ei->size -= final_end - final_start;
                 if (ei->addr < final_start)
                         continue;
@@ -461,13 +502,13 @@ static u64 __init e820_update_range_map(struct e820map *e820x, u64 start,
 u64 __init e820_update_range(u64 start, u64 size, unsigned old_type,
                              unsigned new_type)
 {
-        return e820_update_range_map(&e820, start, size, old_type, new_type);
+        return __e820_update_range(&e820, start, size, old_type, new_type);
 }
 
 static u64 __init e820_update_range_saved(u64 start, u64 size,
                                           unsigned old_type, unsigned new_type)
 {
-        return e820_update_range_map(&e820_saved, start, size, old_type,
+        return __e820_update_range(&e820_saved, start, size, old_type,
                                      new_type);
 }
 
@@ -511,7 +552,7 @@ u64 __init e820_remove_range(u64 start, u64 size, unsigned old_type,
 
 void __init update_e820(void)
 {
-        int nr_map;
+        u32 nr_map;
 
         nr_map = e820.nr_map;
         if (sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &nr_map))
@@ -522,7 +563,7 @@ void __init update_e820(void)
 }
 static void __init update_e820_saved(void)
 {
-        int nr_map;
+        u32 nr_map;
 
         nr_map = e820_saved.nr_map;
         if (sanitize_e820_map(e820_saved.map, ARRAY_SIZE(e820_saved.map), &nr_map))
@@ -1020,8 +1061,8 @@ u64 __init find_e820_area_size(u64 start, u64 *sizep, u64 align)
                         continue;
                 return addr;
         }
-        return -1UL;
 
+        return -1ULL;
 }
 
 /*
@@ -1034,13 +1075,22 @@ u64 __init early_reserve_e820(u64 startt, u64 sizet, u64 align)
         u64 start;
 
         start = startt;
-        while (size < sizet)
+        while (size < sizet && (start + 1))
                 start = find_e820_area_size(start, &size, align);
 
         if (size < sizet)
                 return 0;
 
+#ifdef CONFIG_X86_32
+        if (start >= MAXMEM)
+                return 0;
+        if (start + size > MAXMEM)
+                size = MAXMEM - start;
+#endif
+
         addr = round_down(start + size - sizet, align);
+        if (addr < start)
+                return 0;
         e820_update_range(addr, sizet, E820_RAM, E820_RESERVED);
         e820_update_range_saved(addr, sizet, E820_RAM, E820_RESERVED);
         printk(KERN_INFO "update e820 for early_reserve_e820\n");
@@ -1253,7 +1303,7 @@ early_param("memmap", parse_memmap_opt);
 void __init finish_e820_parsing(void)
 {
         if (userdef) {
-                int nr = e820.nr_map;
+                u32 nr = e820.nr_map;
 
                 if (sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &nr) < 0)
                         early_panic("Invalid user supplied memory map");
@@ -1336,7 +1386,7 @@ void __init e820_reserve_resources_late(void)
 char *__init default_machine_specific_memory_setup(void)
 {
         char *who = "BIOS-e820";
-        int new_nr;
+        u32 new_nr;
         /*
          * Try to copy the BIOS-supplied E820-map.
          *
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 639ad98238a2..335f049d110f 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -250,7 +250,7 @@ static int dbgp_wait_until_complete(void)
         return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
 }
 
-static void dbgp_mdelay(int ms)
+static void __init dbgp_mdelay(int ms)
 {
         int i;
 
@@ -311,7 +311,7 @@ static void dbgp_set_data(const void *buf, int size)
         writel(hi, &ehci_debug->data47);
 }
 
-static void dbgp_get_data(void *buf, int size)
+static void __init dbgp_get_data(void *buf, int size)
 {
         unsigned char *bytes = buf;
         u32 lo, hi;
@@ -355,7 +355,7 @@ static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
         return ret;
 }
 
-static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
+static int __init dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
                                  int size)
 {
         u32 pids, addr, ctrl;
@@ -386,8 +386,8 @@ static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
         return ret;
 }
 
-static int dbgp_control_msg(unsigned devnum, int requesttype, int request,
-        int value, int index, void *data, int size)
+static int __init dbgp_control_msg(unsigned devnum, int requesttype,
+        int request, int value, int index, void *data, int size)
 {
         u32 pids, addr, ctrl;
         struct usb_ctrlrequest req;
@@ -489,7 +489,7 @@ static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
         return 0;
 }
 
-static int ehci_reset_port(int port)
+static int __init ehci_reset_port(int port)
 {
         u32 portsc;
         u32 delay_time, delay;
@@ -532,7 +532,7 @@ static int ehci_reset_port(int port)
         return -EBUSY;
 }
 
-static int ehci_wait_for_port(int port)
+static int __init ehci_wait_for_port(int port)
 {
         u32 status;
         int ret, reps;
@@ -557,13 +557,13 @@ static inline void dbgp_printk(const char *fmt, ...) { }
 
 typedef void (*set_debug_port_t)(int port);
 
-static void default_set_debug_port(int port)
+static void __init default_set_debug_port(int port)
 {
 }
 
-static set_debug_port_t set_debug_port = default_set_debug_port;
+static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
 
-static void nvidia_set_debug_port(int port)
+static void __init nvidia_set_debug_port(int port)
 {
         u32 dword;
         dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 899e8938e79f..c929add475c9 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -442,8 +442,7 @@ sysenter_past_esp:
 
         GET_THREAD_INFO(%ebp)
 
-        /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
-        testw $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%ebp)
+        testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%ebp)
         jnz sysenter_audit
 sysenter_do_call:
         cmpl $(nr_syscalls), %eax
@@ -454,7 +453,7 @@ sysenter_do_call:
         DISABLE_INTERRUPTS(CLBR_ANY)
         TRACE_IRQS_OFF
         movl TI_flags(%ebp), %ecx
-        testw $_TIF_ALLWORK_MASK, %cx
+        testl $_TIF_ALLWORK_MASK, %ecx
         jne sysexit_audit
 sysenter_exit:
 /* if something modifies registers it must also disable sysexit */
@@ -468,7 +467,7 @@ sysenter_exit:
 
 #ifdef CONFIG_AUDITSYSCALL
 sysenter_audit:
-        testw $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
+        testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%ebp)
         jnz syscall_trace_entry
         addl $4,%esp
         CFI_ADJUST_CFA_OFFSET -4
@@ -485,7 +484,7 @@ sysenter_audit:
         jmp sysenter_do_call
 
 sysexit_audit:
-        testw $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %cx
+        testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %ecx
         jne syscall_exit_work
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_ANY)
@@ -498,7 +497,7 @@ sysexit_audit:
         DISABLE_INTERRUPTS(CLBR_ANY)
         TRACE_IRQS_OFF
         movl TI_flags(%ebp), %ecx
-        testw $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %cx
+        testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %ecx
         jne syscall_exit_work
         movl PT_EAX(%esp),%eax  /* reload syscall return value */
         jmp sysenter_exit
@@ -523,8 +522,7 @@ ENTRY(system_call)
         SAVE_ALL
         GET_THREAD_INFO(%ebp)
                                         # system call tracing in operation / emulation
-        /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */
-        testw $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%ebp)
+        testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%ebp)
         jnz syscall_trace_entry
         cmpl $(nr_syscalls), %eax
         jae syscall_badsys
@@ -538,7 +536,7 @@ syscall_exit:
                                         # between sampling and the iret
         TRACE_IRQS_OFF
         movl TI_flags(%ebp), %ecx
-        testw $_TIF_ALLWORK_MASK, %cx   # current->work
+        testl $_TIF_ALLWORK_MASK, %ecx  # current->work
         jne syscall_exit_work
 
 restore_all:
@@ -673,7 +671,7 @@ END(syscall_trace_entry)
         # perform syscall exit tracing
         ALIGN
 syscall_exit_work:
-        testb $_TIF_WORK_SYSCALL_EXIT, %cl
+        testl $_TIF_WORK_SYSCALL_EXIT, %ecx
         jz work_pending
         TRACE_IRQS_ON
         ENABLE_INTERRUPTS(CLBR_ANY)     # could let syscall_trace_leave() call
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 83d1836b9467..a331ec38af9e 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -368,6 +368,7 @@ ENTRY(save_rest)
 END(save_rest)
 
 /* save complete stack frame */
+        .pushsection .kprobes.text, "ax"
 ENTRY(save_paranoid)
         XCPT_FRAME 1 RDI+8
         cld
@@ -396,6 +397,7 @@ ENTRY(save_paranoid)
 1:      ret
         CFI_ENDPROC
 END(save_paranoid)
+        .popsection
 
 /*
  * A newly forked process directly context switches into this address.
@@ -416,7 +418,6 @@ ENTRY(ret_from_fork)
 
         GET_THREAD_INFO(%rcx)
 
-        CFI_REMEMBER_STATE
         RESTORE_REST
 
         testl $3, CS-ARGOFFSET(%rsp)            # from kernel_thread?
@@ -428,7 +429,6 @@ ENTRY(ret_from_fork)
         RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET
         jmp ret_from_sys_call                   # go to the SYSRET fastpath
 
-        CFI_RESTORE_STATE
         CFI_ENDPROC
 END(ret_from_fork)
 
@@ -984,6 +984,8 @@ apicinterrupt UV_BAU_MESSAGE \
 #endif
 apicinterrupt LOCAL_TIMER_VECTOR \
         apic_timer_interrupt smp_apic_timer_interrupt
+apicinterrupt GENERIC_INTERRUPT_VECTOR \
+        generic_interrupt smp_generic_interrupt
 
 #ifdef CONFIG_SMP
 apicinterrupt INVALIDATE_TLB_VECTOR_START+0 \
diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c
index 231bdd3c5b1c..76f7141e0f91 100644
--- a/arch/x86/kernel/ftrace.c
+++ b/arch/x86/kernel/ftrace.c
@@ -389,79 +389,6 @@ void ftrace_nmi_exit(void)
 
 #endif /* !CONFIG_DYNAMIC_FTRACE */
 
-/* Add a function return address to the trace stack on thread info.*/
-static int push_return_trace(unsigned long ret, unsigned long long time,
-                                unsigned long func, int *depth)
-{
-        int index;
-
-        if (!current->ret_stack)
-                return -EBUSY;
-
-        /* The return trace stack is full */
-        if (current->curr_ret_stack == FTRACE_RETFUNC_DEPTH - 1) {
-                atomic_inc(&current->trace_overrun);
-                return -EBUSY;
-        }
-
-        index = ++current->curr_ret_stack;
-        barrier();
-        current->ret_stack[index].ret = ret;
-        current->ret_stack[index].func = func;
-        current->ret_stack[index].calltime = time;
-        *depth = index;
-
-        return 0;
-}
-
-/* Retrieve a function return address to the trace stack on thread info.*/
-static void pop_return_trace(struct ftrace_graph_ret *trace, unsigned long *ret)
-{
-        int index;
-
-        index = current->curr_ret_stack;
-
-        if (unlikely(index < 0)) {
-                ftrace_graph_stop();
-                WARN_ON(1);
-                /* Might as well panic, otherwise we have no where to go */
-                *ret = (unsigned long)panic;
-                return;
-        }
-
-        *ret = current->ret_stack[index].ret;
-        trace->func = current->ret_stack[index].func;
-        trace->calltime = current->ret_stack[index].calltime;
-        trace->overrun = atomic_read(&current->trace_overrun);
-        trace->depth = index;
-        barrier();
-        current->curr_ret_stack--;
-
-}
-
-/*
- * Send the trace to the ring-buffer.
- * @return the original return address.
- */
-unsigned long ftrace_return_to_handler(void)
-{
-        struct ftrace_graph_ret trace;
-        unsigned long ret;
-
-        pop_return_trace(&trace, &ret);
-        trace.rettime = cpu_clock(raw_smp_processor_id());
-        ftrace_graph_return(&trace);
-
-        if (unlikely(!ret)) {
-                ftrace_graph_stop();
-                WARN_ON(1);
-                /* Might as well panic. What else to do? */
-                ret = (unsigned long)panic;
-        }
-
-        return ret;
-}
-
 /*
  * Hook the return address and push it in the stack of return addrs
  * in current thread info.
@@ -521,7 +448,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
 
         calltime = cpu_clock(raw_smp_processor_id());
 
-        if (push_return_trace(old, calltime,
+        if (ftrace_push_return_trace(old, calltime,
                                 self_addr, &trace.depth) == -EBUSY) {
                 *parent = old;
                 return;
diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c
index ac108d1fe182..3f8579f8d42c 100644
--- a/arch/x86/kernel/head32.c
+++ b/arch/x86/kernel/head32.c
@@ -18,7 +18,7 @@ void __init i386_start_kernel(void)
 {
         reserve_trampoline_memory();
 
-        reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS");
+        reserve_early(__pa_symbol(&_text), __pa_symbol(&__bss_stop), "TEXT DATA BSS");
 
 #ifdef CONFIG_BLK_DEV_INITRD
         /* Reserve INITRD */
@@ -29,9 +29,6 @@ void __init i386_start_kernel(void)
                 reserve_early(ramdisk_image, ramdisk_end, "RAMDISK");
         }
 #endif
-        reserve_early(init_pg_tables_start, init_pg_tables_end,
-                        "INIT_PG_TABLE");
-
         reserve_ebda_region();
 
         /*
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index f5b272247690..70eaa852c732 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -100,7 +100,7 @@ void __init x86_64_start_reservations(char *real_mode_data)
 
         reserve_trampoline_memory();
 
-        reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS");
+        reserve_early(__pa_symbol(&_text), __pa_symbol(&__bss_stop), "TEXT DATA BSS");
 
 #ifdef CONFIG_BLK_DEV_INITRD
         /* Reserve INITRD */
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index c32ca19d591a..30683883e0cd 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -38,42 +38,40 @@
 #define X86_VENDOR_ID   new_cpu_data+CPUINFO_x86_vendor_id
 
 /*
- * This is how much memory *in addition to the memory covered up to
- * and including _end* we need mapped initially.
+ * This is how much memory in addition to the memory covered up to
+ * and including _end we need mapped initially.
  * We need:
- *  - one bit for each possible page, but only in low memory, which means
- *     2^32/4096/8 = 128K worst case (4G/4G split.)
- *  - enough space to map all low memory, which means
- *     (2^32/4096) / 1024 pages (worst case, non PAE)
- *     (2^32/4096) / 512 + 4 pages (worst case for PAE)
- *  - a few pages for allocator use before the kernel pagetable has
- *     been set up
+ *     (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
+ *     (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
  *
  * Modulo rounding, each megabyte assigned here requires a kilobyte of
  * memory, which is currently unreclaimed.
  *
  * This should be a multiple of a page.
+ *
+ * KERNEL_IMAGE_SIZE should be greater than pa(_end)
+ * and small than max_low_pfn, otherwise will waste some page table entries
  */
-LOW_PAGES = 1<<(32-PAGE_SHIFT_asm)
-
-/*
- * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate
- * pagetables from above the 16MB DMA limit, so we'll have to set
- * up pagetables 16MB more (worst-case):
- */
-#ifdef CONFIG_DEBUG_PAGEALLOC
-LOW_PAGES = LOW_PAGES + 0x1000000
-#endif
 
 #if PTRS_PER_PMD > 1
-PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
+#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
 #else
-PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
+#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
 #endif
-BOOTBITMAP_SIZE = LOW_PAGES / 8
-ALLOCATOR_SLOP = 4
 
-INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
+/* Enough space to fit pagetables for the low memory linear map */
+MAPPING_BEYOND_END = \
+        PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT
+
+/*
+ * Worst-case size of the kernel mapping we need to make:
+ * the worst-case size of the kernel itself, plus the extra we need
+ * to map for the linear map.
+ */
+KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT
+
+INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
+RESERVE_BRK(pagetables, INIT_MAP_SIZE)
 
 /*
  * 32-bit kernel entrypoint; only used by the boot CPU.  On entry,
@@ -166,10 +164,10 @@ num_subarch_entries = (. - subarch_entries) / 4
 
 /*
  * Initialize page tables.  This creates a PDE and a set of page
- * tables, which are located immediately beyond _end.  The variable
- * init_pg_tables_end is set up to point to the first "safe" location.
+ * tables, which are located immediately beyond __brk_base.  The variable
+ * _brk_end is set up to point to the first "safe" location.
  * Mappings are created both at virtual address 0 (identity mapping)
- * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
+ * and PAGE_OFFSET for up to _end.
  *
  * Note that the stack is not yet set up!
  */
@@ -190,8 +188,7 @@ default_entry:
 
         xorl %ebx,%ebx                          /* %ebx is kept at zero */
 
-        movl $pa(pg0), %edi
-        movl %edi, pa(init_pg_tables_start)
+        movl $pa(__brk_base), %edi
         movl $pa(swapper_pg_pmd), %edx
         movl $PTE_IDENT_ATTR, %eax
 10:
@@ -209,14 +206,14 @@ default_entry:
         loop 11b
 
         /*
-         * End condition: we must map up to and including INIT_MAP_BEYOND_END
-         * bytes beyond the end of our own page tables.
+         * End condition: we must map up to the end + MAPPING_BEYOND_END.
          */
-        leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp
+        movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
         cmpl %ebp,%eax
         jb 10b
 1:
-        movl %edi,pa(init_pg_tables_end)
+        addl $__PAGE_OFFSET, %edi
+        movl %edi, pa(_brk_end)
         shrl $12, %eax
         movl %eax, pa(max_pfn_mapped)
 
@@ -227,8 +224,7 @@ default_entry:
 
 page_pde_offset = (__PAGE_OFFSET >> 20);
 
-        movl $pa(pg0), %edi
-        movl %edi, pa(init_pg_tables_start)
+        movl $pa(__brk_base), %edi
         movl $pa(swapper_pg_dir), %edx
         movl $PTE_IDENT_ATTR, %eax
 10:
@@ -242,14 +238,13 @@ page_pde_offset = (__PAGE_OFFSET >> 20);
         addl $0x1000,%eax
         loop 11b
         /*
-         * End condition: we must map up to and including INIT_MAP_BEYOND_END
-         * bytes beyond the end of our own page tables; the +0x007 is
-         * the attribute bits
+         * End condition: we must map up to the end + MAPPING_BEYOND_END.
          */
-        leal (INIT_MAP_BEYOND_END+PTE_IDENT_ATTR)(%edi),%ebp
+        movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
         cmpl %ebp,%eax
         jb 10b
-        movl %edi,pa(init_pg_tables_end)
+        addl $__PAGE_OFFSET, %edi
+        movl %edi, pa(_brk_end)
         shrl $12, %eax
         movl %eax, pa(max_pfn_mapped)
 
@@ -636,6 +631,7 @@ swapper_pg_fixmap:
         .fill 1024,4,0
 ENTRY(empty_zero_page)
         .fill 4096,1,0
+
 /*
  * This starts the data section.
  */
diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c
index 10f92fb532f3..3475440baa54 100644
--- a/arch/x86/kernel/i8253.c
+++ b/arch/x86/kernel/i8253.c
@@ -3,17 +3,17 @@
  *
  */
 #include <linux/clockchips.h>
-#include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/spinlock.h>
 #include <linux/jiffies.h>
 #include <linux/module.h>
-#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/io.h>
 
-#include <asm/smp.h>
-#include <asm/delay.h>
 #include <asm/i8253.h>
-#include <asm/io.h>
 #include <asm/hpet.h>
+#include <asm/smp.h>
 
 DEFINE_SPINLOCK(i8253_lock);
 EXPORT_SYMBOL(i8253_lock);
@@ -40,7 +40,7 @@ static void init_pit_timer(enum clock_event_mode mode,
 {
         spin_lock(&i8253_lock);
 
-        switch(mode) {
+        switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
                 /* binary, mode 2, LSB/MSB, ch 0 */
                 outb_pit(0x34, PIT_MODE);
@@ -95,7 +95,7 @@ static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
  * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
  * !using_apic_timer decisions in do_timer_interrupt_hook()
  */
-static struct clock_event_device pit_clockevent = {
+static struct clock_event_device pit_ce = {
         .name           = "pit",
         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .set_mode       = init_pit_timer,
@@ -114,15 +114,13 @@ void __init setup_pit_timer(void)
          * Start pit with the boot cpu mask and make it global after the
          * IO_APIC has been initialized.
          */
-        pit_clockevent.cpumask = cpumask_of(smp_processor_id());
-        pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
-                                     pit_clockevent.shift);
-        pit_clockevent.max_delta_ns =
-                clockevent_delta2ns(0x7FFF, &pit_clockevent);
-        pit_clockevent.min_delta_ns =
-                clockevent_delta2ns(0xF, &pit_clockevent);
-        clockevents_register_device(&pit_clockevent);
-        global_clock_event = &pit_clockevent;
+        pit_ce.cpumask = cpumask_of(smp_processor_id());
+        pit_ce.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, pit_ce.shift);
+        pit_ce.max_delta_ns = clockevent_delta2ns(0x7FFF, &pit_ce);
+        pit_ce.min_delta_ns = clockevent_delta2ns(0xF, &pit_ce);
+
+        clockevents_register_device(&pit_ce);
+        global_clock_event = &pit_ce;
 }
 
 #ifndef CONFIG_X86_64
@@ -133,11 +131,11 @@ void __init setup_pit_timer(void)
  */
 static cycle_t pit_read(void)
 {
+        static int old_count;
+        static u32 old_jifs;
         unsigned long flags;
         int count;
         u32 jifs;
-        static int old_count;
-        static u32 old_jifs;
 
         spin_lock_irqsave(&i8253_lock, flags);
         /*
@@ -179,9 +177,9 @@ static cycle_t pit_read(void)
          * Previous attempts to handle these cases intelligently were
          * buggy, so we just do the simple thing now.
          */
-        if (count > old_count && jifs == old_jifs) {
+        if (count > old_count && jifs == old_jifs)
                 count = old_count;
-        }
+
         old_count = count;
         old_jifs = jifs;
 
@@ -192,13 +190,13 @@ static cycle_t pit_read(void)
         return (cycle_t)(jifs * LATCH) + count;
 }
 
-static struct clocksource clocksource_pit = {
-        .name   = "pit",
-        .rating = 110,
-        .read   = pit_read,
-        .mask   = CLOCKSOURCE_MASK(32),
-        .mult   = 0,
-        .shift  = 20,
+static struct clocksource pit_cs = {
+        .name           = "pit",
+        .rating         = 110,
+        .read           = pit_read,
+        .mask           = CLOCKSOURCE_MASK(32),
+        .mult           = 0,
+        .shift          = 20,
 };
 
 static void pit_disable_clocksource(void)
@@ -206,9 +204,9 @@ static void pit_disable_clocksource(void)
         /*
          * Use mult to check whether it is registered or not
          */
-        if (clocksource_pit.mult) {
-                clocksource_unregister(&clocksource_pit);
-                clocksource_pit.mult = 0;
+        if (pit_cs.mult) {
+                clocksource_unregister(&pit_cs);
+                pit_cs.mult = 0;
         }
 }
 
@@ -222,13 +220,13 @@ static int __init init_pit_clocksource(void)
           * - when local APIC timer is active (PIT is switched off)
           */
         if (num_possible_cpus() > 1 || is_hpet_enabled() ||
-            pit_clockevent.mode != CLOCK_EVT_MODE_PERIODIC)
+            pit_ce.mode != CLOCK_EVT_MODE_PERIODIC)
                 return 0;
 
-        clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE,
-                                                   clocksource_pit.shift);
-        return clocksource_register(&clocksource_pit);
+        pit_cs.mult = clocksource_hz2mult(CLOCK_TICK_RATE, pit_cs.shift);
+
+        return clocksource_register(&pit_cs);
 }
 arch_initcall(init_pit_clocksource);
 
-#endif
+#endif /* !CONFIG_X86_64 */
diff --git a/arch/x86/kernel/io_delay.c b/arch/x86/kernel/io_delay.c
index 720d2607aacb..a979b5bd2fc0 100644
--- a/arch/x86/kernel/io_delay.c
+++ b/arch/x86/kernel/io_delay.c
@@ -7,10 +7,10 @@
  */
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/init.h>
 #include <linux/delay.h>
+#include <linux/init.h>
 #include <linux/dmi.h>
-#include <asm/io.h>
+#include <linux/io.h>
 
 int io_delay_type __read_mostly = CONFIG_DEFAULT_IO_DELAY_TYPE;
 
@@ -47,8 +47,7 @@ EXPORT_SYMBOL(native_io_delay);
 static int __init dmi_io_delay_0xed_port(const struct dmi_system_id *id)
 {
         if (io_delay_type == CONFIG_IO_DELAY_TYPE_0X80) {
-                printk(KERN_NOTICE "%s: using 0xed I/O delay port\n",
-                        id->ident);
+                pr_notice("%s: using 0xed I/O delay port\n", id->ident);
                 io_delay_type = CONFIG_IO_DELAY_TYPE_0XED;
         }
 
@@ -64,40 +63,40 @@ static struct dmi_system_id __initdata io_delay_0xed_port_dmi_table[] = {
                 .callback       = dmi_io_delay_0xed_port,
                 .ident          = "Compaq Presario V6000",
                 .matches        = {
-                        DMI_MATCH(DMI_BOARD_VENDOR, "Quanta"),
-                        DMI_MATCH(DMI_BOARD_NAME, "30B7")
+                        DMI_MATCH(DMI_BOARD_VENDOR,     "Quanta"),
+                        DMI_MATCH(DMI_BOARD_NAME,       "30B7")
                 }
         },
         {
                 .callback       = dmi_io_delay_0xed_port,
                 .ident          = "HP Pavilion dv9000z",
                 .matches        = {
-                        DMI_MATCH(DMI_BOARD_VENDOR, "Quanta"),
-                        DMI_MATCH(DMI_BOARD_NAME, "30B9")
+                        DMI_MATCH(DMI_BOARD_VENDOR,     "Quanta"),
+                        DMI_MATCH(DMI_BOARD_NAME,       "30B9")
                 }
         },
         {
                 .callback       = dmi_io_delay_0xed_port,
                 .ident          = "HP Pavilion dv6000",
                 .matches        = {
-                        DMI_MATCH(DMI_BOARD_VENDOR, "Quanta"),
-                        DMI_MATCH(DMI_BOARD_NAME, "30B8")
+                        DMI_MATCH(DMI_BOARD_VENDOR,     "Quanta"),
+                        DMI_MATCH(DMI_BOARD_NAME,       "30B8")
                 }
         },
         {
                 .callback       = dmi_io_delay_0xed_port,
                 .ident          = "HP Pavilion tx1000",
                 .matches        = {
-                        DMI_MATCH(DMI_BOARD_VENDOR, "Quanta"),
-                        DMI_MATCH(DMI_BOARD_NAME, "30BF")
+                        DMI_MATCH(DMI_BOARD_VENDOR,     "Quanta"),
+                        DMI_MATCH(DMI_BOARD_NAME,       "30BF")
                 }
         },
         {
                 .callback       = dmi_io_delay_0xed_port,
                 .ident          = "Presario F700",
                 .matches        = {
-                        DMI_MATCH(DMI_BOARD_VENDOR, "Quanta"),
-                        DMI_MATCH(DMI_BOARD_NAME, "30D3")
+                        DMI_MATCH(DMI_BOARD_VENDOR,     "Quanta"),
+                        DMI_MATCH(DMI_BOARD_NAME,       "30D3")
                 }
         },
         { }
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index f13ca1650aaf..3aaf7b9e3a8b 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -15,6 +15,9 @@
 
 atomic_t irq_err_count;
 
+/* Function pointer for generic interrupt vector handling */
+void (*generic_interrupt_extension)(void) = NULL;
+
 /*
  * 'what should we do if we get a hw irq event on an illegal vector'.
  * each architecture has to answer this themselves.
@@ -42,55 +45,60 @@ void ack_bad_irq(unsigned int irq)
 /*
  * /proc/interrupts printing:
  */
-static int show_other_interrupts(struct seq_file *p)
+static int show_other_interrupts(struct seq_file *p, int prec)
 {
         int j;
 
-        seq_printf(p, "NMI: ");
+        seq_printf(p, "%*s: ", prec, "NMI");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
         seq_printf(p, "  Non-maskable interrupts\n");
 #ifdef CONFIG_X86_LOCAL_APIC
-        seq_printf(p, "LOC: ");
+        seq_printf(p, "%*s: ", prec, "LOC");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
         seq_printf(p, "  Local timer interrupts\n");
+
+        seq_printf(p, "%*s: ", prec, "SPU");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
+        seq_printf(p, "  Spurious interrupts\n");
 #endif
+        if (generic_interrupt_extension) {
+                seq_printf(p, "PLT: ");
+                for_each_online_cpu(j)
+                        seq_printf(p, "%10u ", irq_stats(j)->generic_irqs);
+                seq_printf(p, "  Platform interrupts\n");
+        }
 #ifdef CONFIG_SMP
-        seq_printf(p, "RES: ");
+        seq_printf(p, "%*s: ", prec, "RES");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
         seq_printf(p, "  Rescheduling interrupts\n");
-        seq_printf(p, "CAL: ");
+        seq_printf(p, "%*s: ", prec, "CAL");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
         seq_printf(p, "  Function call interrupts\n");
-        seq_printf(p, "TLB: ");
+        seq_printf(p, "%*s: ", prec, "TLB");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
         seq_printf(p, "  TLB shootdowns\n");
 #endif
 #ifdef CONFIG_X86_MCE
-        seq_printf(p, "TRM: ");
+        seq_printf(p, "%*s: ", prec, "TRM");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
         seq_printf(p, "  Thermal event interrupts\n");
 # ifdef CONFIG_X86_64
-        seq_printf(p, "THR: ");
+        seq_printf(p, "%*s: ", prec, "THR");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
         seq_printf(p, "  Threshold APIC interrupts\n");
 # endif
 #endif
-#ifdef CONFIG_X86_LOCAL_APIC
-        seq_printf(p, "SPU: ");
-        for_each_online_cpu(j)
-                seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
-        seq_printf(p, "  Spurious interrupts\n");
-#endif
-        seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
+        seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
 #if defined(CONFIG_X86_IO_APIC)
-        seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
+        seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
 #endif
         return 0;
 }
@@ -98,19 +106,22 @@ static int show_other_interrupts(struct seq_file *p)
 int show_interrupts(struct seq_file *p, void *v)
 {
         unsigned long flags, any_count = 0;
-        int i = *(loff_t *) v, j;
+        int i = *(loff_t *) v, j, prec;
         struct irqaction *action;
         struct irq_desc *desc;
 
         if (i > nr_irqs)
                 return 0;
 
+        for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
+                j *= 10;
+
         if (i == nr_irqs)
-                return show_other_interrupts(p);
+                return show_other_interrupts(p, prec);
 
         /* print header */
         if (i == 0) {
-                seq_printf(p, "           ");
+                seq_printf(p, "%*s", prec + 8, "");
                 for_each_online_cpu(j)
                         seq_printf(p, "CPU%-8d", j);
                 seq_putc(p, '\n');
@@ -121,23 +132,15 @@ int show_interrupts(struct seq_file *p, void *v)
                 return 0;
 
         spin_lock_irqsave(&desc->lock, flags);
-#ifndef CONFIG_SMP
-        any_count = kstat_irqs(i);
-#else
         for_each_online_cpu(j)
                 any_count |= kstat_irqs_cpu(i, j);
-#endif
         action = desc->action;
         if (!action && !any_count)
                 goto out;
 
-        seq_printf(p, "%3d: ", i);
-#ifndef CONFIG_SMP
-        seq_printf(p, "%10u ", kstat_irqs(i));
-#else
+        seq_printf(p, "%*d: ", prec, i);
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
-#endif
         seq_printf(p, " %8s", desc->chip->name);
         seq_printf(p, "-%-8s", desc->name);
 
@@ -162,7 +165,10 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
 
 #ifdef CONFIG_X86_LOCAL_APIC
         sum += irq_stats(cpu)->apic_timer_irqs;
+        sum += irq_stats(cpu)->irq_spurious_count;
 #endif
+        if (generic_interrupt_extension)
+                sum += irq_stats(cpu)->generic_irqs;
 #ifdef CONFIG_SMP
         sum += irq_stats(cpu)->irq_resched_count;
         sum += irq_stats(cpu)->irq_call_count;
@@ -174,9 +180,6 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
         sum += irq_stats(cpu)->irq_threshold_count;
 #endif
 #endif
-#ifdef CONFIG_X86_LOCAL_APIC
-        sum += irq_stats(cpu)->irq_spurious_count;
-#endif
         return sum;
 }
 
@@ -226,4 +229,27 @@ unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
         return 1;
 }
 
+/*
+ * Handler for GENERIC_INTERRUPT_VECTOR.
+ */
+void smp_generic_interrupt(struct pt_regs *regs)
+{
+        struct pt_regs *old_regs = set_irq_regs(regs);
+
+        ack_APIC_irq();
+
+        exit_idle();
+
+        irq_enter();
+
+        inc_irq_stat(generic_irqs);
+
+        if (generic_interrupt_extension)
+                generic_interrupt_extension();
+
+        irq_exit();
+
+        set_irq_regs(old_regs);
+}
+
 EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c
index 50b8c3a3006c..368b0a8836f9 100644
--- a/arch/x86/kernel/irqinit_32.c
+++ b/arch/x86/kernel/irqinit_32.c
@@ -50,7 +50,6 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id)
  */
 static struct irqaction fpu_irq = {
         .handler = math_error_irq,
-        .mask = CPU_MASK_NONE,
         .name = "fpu",
 };
 
@@ -83,7 +82,6 @@ void __init init_ISA_irqs(void)
  */
 static struct irqaction irq2 = {
         .handler = no_action,
-        .mask = CPU_MASK_NONE,
         .name = "cascade",
 };
 
@@ -175,6 +173,9 @@ void __init native_init_IRQ(void)
         /* self generated IPI for local APIC timer */
         alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
 
+        /* generic IPI for platform specific use */
+        alloc_intr_gate(GENERIC_INTERRUPT_VECTOR, generic_interrupt);
+
         /* IPI vectors for APIC spurious and error interrupts */
         alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
         alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
diff --git a/arch/x86/kernel/irqinit_64.c b/arch/x86/kernel/irqinit_64.c
index da481a1e3f30..8cd10537fd46 100644
--- a/arch/x86/kernel/irqinit_64.c
+++ b/arch/x86/kernel/irqinit_64.c
@@ -45,7 +45,6 @@
 
 static struct irqaction irq2 = {
         .handler = no_action,
-        .mask = CPU_MASK_NONE,
         .name = "cascade",
 };
 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
@@ -147,6 +146,9 @@ static void __init apic_intr_init(void)
         /* self generated IPI for local APIC timer */
         alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
 
+        /* generic IPI for platform specific use */
+        alloc_intr_gate(GENERIC_INTERRUPT_VECTOR, generic_interrupt);
+
         /* IPI vectors for APIC spurious and error interrupts */
         alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
         alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
diff --git a/arch/x86/kernel/kdebugfs.c b/arch/x86/kernel/kdebugfs.c
index ff7d3b0124f1..e444357375ce 100644
--- a/arch/x86/kernel/kdebugfs.c
+++ b/arch/x86/kernel/kdebugfs.c
@@ -8,11 +8,11 @@
  */
 #include <linux/debugfs.h>
 #include <linux/uaccess.h>
-#include <linux/stat.h>
+#include <linux/module.h>
 #include <linux/init.h>
+#include <linux/stat.h>
 #include <linux/io.h>
 #include <linux/mm.h>
-#include <linux/module.h>
 
 #include <asm/setup.h>
 
@@ -26,9 +26,8 @@ struct setup_data_node {
         u32 len;
 };
 
-static ssize_t
-setup_data_read(struct file *file, char __user *user_buf, size_t count,
-                loff_t *ppos)
+static ssize_t setup_data_read(struct file *file, char __user *user_buf,
+                               size_t count, loff_t *ppos)
 {
         struct setup_data_node *node = file->private_data;
         unsigned long remain;
@@ -39,20 +38,21 @@ setup_data_read(struct file *file, char __user *user_buf, size_t count,
 
         if (pos < 0)
                 return -EINVAL;
+
         if (pos >= node->len)
                 return 0;
 
         if (count > node->len - pos)
                 count = node->len - pos;
+
         pa = node->paddr + sizeof(struct setup_data) + pos;
         pg = pfn_to_page((pa + count - 1) >> PAGE_SHIFT);
         if (PageHighMem(pg)) {
                 p = ioremap_cache(pa, count);
                 if (!p)
                         return -ENXIO;
-        } else {
+        } else
                 p = __va(pa);
-        }
 
         remain = copy_to_user(user_buf, p, count);
 
@@ -70,12 +70,13 @@ setup_data_read(struct file *file, char __user *user_buf, size_t count,
 static int setup_data_open(struct inode *inode, struct file *file)
 {
         file->private_data = inode->i_private;
+
         return 0;
 }
 
 static const struct file_operations fops_setup_data = {
-        .read =         setup_data_read,
-        .open =         setup_data_open,
+        .read           = setup_data_read,
+        .open           = setup_data_open,
 };
 
 static int __init
@@ -84,57 +85,50 @@ create_setup_data_node(struct dentry *parent, int no,
 {
         struct dentry *d, *type, *data;
         char buf[16];
-        int error;
 
         sprintf(buf, "%d", no);
         d = debugfs_create_dir(buf, parent);
-        if (!d) {
-                error = -ENOMEM;
-                goto err_return;
-        }
+        if (!d)
+                return -ENOMEM;
+
         type = debugfs_create_x32("type", S_IRUGO, d, &node->type);
-        if (!type) {
-                error = -ENOMEM;
+        if (!type)
                 goto err_dir;
-        }
+
         data = debugfs_create_file("data", S_IRUGO, d, node, &fops_setup_data);
-        if (!data) {
-                error = -ENOMEM;
+        if (!data)
                 goto err_type;
-        }
+
         return 0;
 
 err_type:
         debugfs_remove(type);
 err_dir:
         debugfs_remove(d);
-err_return:
-        return error;
+        return -ENOMEM;
 }
 
 static int __init create_setup_data_nodes(struct dentry *parent)
 {
         struct setup_data_node *node;
         struct setup_data *data;
-        int error, no = 0;
+        int error = -ENOMEM;
         struct dentry *d;
         struct page *pg;
         u64 pa_data;
+        int no = 0;
 
         d = debugfs_create_dir("setup_data", parent);
-        if (!d) {
-                error = -ENOMEM;
-                goto err_return;
-        }
+        if (!d)
+                return -ENOMEM;
 
         pa_data = boot_params.hdr.setup_data;
 
         while (pa_data) {
                 node = kmalloc(sizeof(*node), GFP_KERNEL);
-                if (!node) {
-                        error = -ENOMEM;
+                if (!node)
                         goto err_dir;
-                }
+
                 pg = pfn_to_page((pa_data+sizeof(*data)-1) >> PAGE_SHIFT);
                 if (PageHighMem(pg)) {
                         data = ioremap_cache(pa_data, sizeof(*data));
@@ -143,9 +137,8 @@ static int __init create_setup_data_nodes(struct dentry *parent)
                                 error = -ENXIO;
                                 goto err_dir;
                         }
-                } else {
+                } else
                         data = __va(pa_data);
-                }
 
                 node->paddr = pa_data;
                 node->type = data->type;
@@ -159,11 +152,11 @@ static int __init create_setup_data_nodes(struct dentry *parent)
                         goto err_dir;
                 no++;
         }
+
         return 0;
 
 err_dir:
         debugfs_remove(d);
-err_return:
         return error;
 }
 
@@ -175,28 +168,26 @@ static struct debugfs_blob_wrapper boot_params_blob = {
 static int __init boot_params_kdebugfs_init(void)
 {
         struct dentry *dbp, *version, *data;
-        int error;
+        int error = -ENOMEM;
 
         dbp = debugfs_create_dir("boot_params", NULL);
-        if (!dbp) {
-                error = -ENOMEM;
-                goto err_return;
-        }
+        if (!dbp)
+                return -ENOMEM;
+
         version = debugfs_create_x16("version", S_IRUGO, dbp,
                                      &boot_params.hdr.version);
-        if (!version) {
-                error = -ENOMEM;
+        if (!version)
                 goto err_dir;
-        }
+
         data = debugfs_create_blob("data", S_IRUGO, dbp,
                                    &boot_params_blob);
-        if (!data) {
-                error = -ENOMEM;
+        if (!data)
                 goto err_version;
-        }
+
         error = create_setup_data_nodes(dbp);
         if (error)
                 goto err_data;
+
         return 0;
 
 err_data:
@@ -205,10 +196,9 @@ err_version:
         debugfs_remove(version);
 err_dir:
         debugfs_remove(dbp);
-err_return:
         return error;
 }
-#endif
+#endif /* CONFIG_DEBUG_BOOT_PARAMS */
 
 static int __init arch_kdebugfs_init(void)
 {
diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c
index 4558dd3918cf..55b94614e348 100644
--- a/arch/x86/kernel/kprobes.c
+++ b/arch/x86/kernel/kprobes.c
@@ -193,7 +193,7 @@ static int __kprobes can_boost(kprobe_opcode_t *opcodes)
         kprobe_opcode_t opcode;
         kprobe_opcode_t *orig_opcodes = opcodes;
 
-        if (search_exception_tables(opcodes))
+        if (search_exception_tables((unsigned long)opcodes))
                 return 0;       /* Page fault may occur on this address. */
 
 retry:
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 478bca986eca..33019ddb56b4 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -138,12 +138,6 @@ static void kvm_set_pte_atomic(pte_t *ptep, pte_t pte)
         kvm_mmu_write(ptep, pte_val(pte));
 }
 
-static void kvm_set_pte_present(struct mm_struct *mm, unsigned long addr,
-                                pte_t *ptep, pte_t pte)
-{
-        kvm_mmu_write(ptep, pte_val(pte));
-}
-
 static void kvm_pte_clear(struct mm_struct *mm,
                           unsigned long addr, pte_t *ptep)
 {
@@ -220,7 +214,6 @@ static void paravirt_ops_setup(void)
 #if PAGETABLE_LEVELS >= 3
 #ifdef CONFIG_X86_PAE
                 pv_mmu_ops.set_pte_atomic = kvm_set_pte_atomic;
-                pv_mmu_ops.set_pte_present = kvm_set_pte_present;
                 pv_mmu_ops.pte_clear = kvm_pte_clear;
                 pv_mmu_ops.pmd_clear = kvm_pmd_clear;
 #endif
diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c
index f5fc8c781a62..e7368c1da01d 100644
--- a/arch/x86/kernel/machine_kexec_32.c
+++ b/arch/x86/kernel/machine_kexec_32.c
@@ -14,12 +14,12 @@
 #include <linux/ftrace.h>
 #include <linux/suspend.h>
 #include <linux/gfp.h>
+#include <linux/io.h>
 
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
 #include <asm/tlbflush.h>
 #include <asm/mmu_context.h>
-#include <asm/io.h>
 #include <asm/apic.h>
 #include <asm/cpufeature.h>
 #include <asm/desc.h>
@@ -63,7 +63,7 @@ static void load_segments(void)
                 "\tmovl %%eax,%%fs\n"
                 "\tmovl %%eax,%%gs\n"
                 "\tmovl %%eax,%%ss\n"
-                ::: "eax", "memory");
+                : : : "eax", "memory");
 #undef STR
 #undef __STR
 }
@@ -205,7 +205,8 @@ void machine_kexec(struct kimage *image)
 
         if (image->preserve_context) {
 #ifdef CONFIG_X86_IO_APIC
-                /* We need to put APICs in legacy mode so that we can
+                /*
+                 * We need to put APICs in legacy mode so that we can
                  * get timer interrupts in second kernel. kexec/kdump
                  * paths already have calls to disable_IO_APIC() in
                  * one form or other. kexec jump path also need
@@ -227,7 +228,8 @@ void machine_kexec(struct kimage *image)
                 page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page)
                                                 << PAGE_SHIFT);
 
-        /* The segment registers are funny things, they have both a
+        /*
+         * The segment registers are funny things, they have both a
          * visible and an invisible part.  Whenever the visible part is
          * set to a specific selector, the invisible part is loaded
          * with from a table in memory.  At no other time is the
@@ -237,11 +239,12 @@ void machine_kexec(struct kimage *image)
          * segments, before I zap the gdt with an invalid value.
          */
         load_segments();
-        /* The gdt & idt are now invalid.
+        /*
+         * The gdt & idt are now invalid.
          * If you want to load them you must set up your own idt & gdt.
          */
-        set_gdt(phys_to_virt(0),0);
-        set_idt(phys_to_virt(0),0);
+        set_gdt(phys_to_virt(0), 0);
+        set_idt(phys_to_virt(0), 0);
 
         /* now call it */
         image->start = relocate_kernel_ptr((unsigned long)image->head,
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 6993d51b7fd8..89cea4d44679 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -12,11 +12,47 @@
 #include <linux/reboot.h>
 #include <linux/numa.h>
 #include <linux/ftrace.h>
+#include <linux/io.h>
+#include <linux/suspend.h>
 
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
 #include <asm/mmu_context.h>
-#include <asm/io.h>
+
+static int init_one_level2_page(struct kimage *image, pgd_t *pgd,
+                                unsigned long addr)
+{
+        pud_t *pud;
+        pmd_t *pmd;
+        struct page *page;
+        int result = -ENOMEM;
+
+        addr &= PMD_MASK;
+        pgd += pgd_index(addr);
+        if (!pgd_present(*pgd)) {
+                page = kimage_alloc_control_pages(image, 0);
+                if (!page)
+                        goto out;
+                pud = (pud_t *)page_address(page);
+                memset(pud, 0, PAGE_SIZE);
+                set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE));
+        }
+        pud = pud_offset(pgd, addr);
+        if (!pud_present(*pud)) {
+                page = kimage_alloc_control_pages(image, 0);
+                if (!page)
+                        goto out;
+                pmd = (pmd_t *)page_address(page);
+                memset(pmd, 0, PAGE_SIZE);
+                set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
+        }
+        pmd = pmd_offset(pud, addr);
+        if (!pmd_present(*pmd))
+                set_pmd(pmd, __pmd(addr | __PAGE_KERNEL_LARGE_EXEC));
+        result = 0;
+out:
+        return result;
+}
 
 static void init_level2_page(pmd_t *level2p, unsigned long addr)
 {
@@ -83,9 +119,8 @@ static int init_level4_page(struct kimage *image, pgd_t *level4p,
                 }
                 level3p = (pud_t *)page_address(page);
                 result = init_level3_page(image, level3p, addr, last_addr);
-                if (result) {
+                if (result)
                         goto out;
-                }
                 set_pgd(level4p++, __pgd(__pa(level3p) | _KERNPG_TABLE));
                 addr += PGDIR_SIZE;
         }
@@ -156,6 +191,13 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable)
         result = init_level4_page(image, level4p, 0, max_pfn << PAGE_SHIFT);
         if (result)
                 return result;
+        /*
+         * image->start may be outside 0 ~ max_pfn, for example when
+         * jump back to original kernel from kexeced kernel
+         */
+        result = init_one_level2_page(image, level4p, image->start);
+        if (result)
+                return result;
         return init_transition_pgtable(image, level4p);
 }
 
@@ -229,20 +271,45 @@ void machine_kexec(struct kimage *image)
 {
         unsigned long page_list[PAGES_NR];
         void *control_page;
+        int save_ftrace_enabled;
 
-        tracer_disable();
+#ifdef CONFIG_KEXEC_JUMP
+        if (kexec_image->preserve_context)
+                save_processor_state();
+#endif
+
+        save_ftrace_enabled = __ftrace_enabled_save();
 
         /* Interrupts aren't acceptable while we reboot */
         local_irq_disable();
 
+        if (image->preserve_context) {
+#ifdef CONFIG_X86_IO_APIC
+                /*
+                 * We need to put APICs in legacy mode so that we can
+                 * get timer interrupts in second kernel. kexec/kdump
+                 * paths already have calls to disable_IO_APIC() in
+                 * one form or other. kexec jump path also need
+                 * one.
+                 */
+                disable_IO_APIC();
+#endif
+        }
+
         control_page = page_address(image->control_code_page) + PAGE_SIZE;
-        memcpy(control_page, relocate_kernel, PAGE_SIZE);
+        memcpy(control_page, relocate_kernel, KEXEC_CONTROL_CODE_MAX_SIZE);
 
         page_list[PA_CONTROL_PAGE] = virt_to_phys(control_page);
+        page_list[VA_CONTROL_PAGE] = (unsigned long)control_page;
         page_list[PA_TABLE_PAGE] =
           (unsigned long)__pa(page_address(image->control_code_page));
 
-        /* The segment registers are funny things, they have both a
+        if (image->type == KEXEC_TYPE_DEFAULT)
+                page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page)
+                                                << PAGE_SHIFT);
+
+        /*
+         * The segment registers are funny things, they have both a
          * visible and an invisible part.  Whenever the visible part is
          * set to a specific selector, the invisible part is loaded
          * with from a table in memory.  At no other time is the
@@ -252,15 +319,25 @@ void machine_kexec(struct kimage *image)
          * segments, before I zap the gdt with an invalid value.
          */
         load_segments();
-        /* The gdt & idt are now invalid.
+        /*
+         * The gdt & idt are now invalid.
          * If you want to load them you must set up your own idt & gdt.
          */
-        set_gdt(phys_to_virt(0),0);
-        set_idt(phys_to_virt(0),0);
+        set_gdt(phys_to_virt(0), 0);
+        set_idt(phys_to_virt(0), 0);
 
         /* now call it */
-        relocate_kernel((unsigned long)image->head, (unsigned long)page_list,
-                        image->start);
+        image->start = relocate_kernel((unsigned long)image->head,
+                                       (unsigned long)page_list,
+                                       image->start,
+                                       image->preserve_context);
+
+#ifdef CONFIG_KEXEC_JUMP
+        if (kexec_image->preserve_context)
+                restore_processor_state();
+#endif
+
+        __ftrace_enabled_restore(save_ftrace_enabled);
 }
 
 void arch_crash_save_vmcoreinfo(void)
diff --git a/arch/x86/kernel/mfgpt_32.c b/arch/x86/kernel/mfgpt_32.c
index 8815f3c7fec7..846510b78a09 100644
--- a/arch/x86/kernel/mfgpt_32.c
+++ b/arch/x86/kernel/mfgpt_32.c
@@ -348,7 +348,6 @@ static irqreturn_t mfgpt_tick(int irq, void *dev_id)
 static struct irqaction mfgptirq  = {
         .handler = mfgpt_tick,
         .flags = IRQF_DISABLED | IRQF_NOBALANCING,
-        .mask = CPU_MASK_NONE,
         .name = "mfgpt-timer"
 };
 
diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c
index 666e43df51f9..712d15fdc416 100644
--- a/arch/x86/kernel/mmconf-fam10h_64.c
+++ b/arch/x86/kernel/mmconf-fam10h_64.c
@@ -226,7 +226,7 @@ static int __devinit set_check_enable_amd_mmconf(const struct dmi_system_id *d)
         return 0;
 }
 
-static struct dmi_system_id __devinitdata mmconf_dmi_table[] = {
+static const struct dmi_system_id __cpuinitconst mmconf_dmi_table[] = {
         {
                 .callback = set_check_enable_amd_mmconf,
                 .ident = "Sun Microsystems Machine",
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c
index 37cb1bda1baf..dce99dca6cf8 100644
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -109,9 +109,6 @@ static void __init MP_bus_info(struct mpc_bus *m)
         } else
                 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
 }
-#endif
-
-#ifdef CONFIG_X86_IO_APIC
 
 static int bad_ioapic(unsigned long address)
 {
@@ -224,8 +221,12 @@ static void __init MP_intsrc_info(struct mpc_intsrc *m)
         if (++mp_irq_entries == MAX_IRQ_SOURCES)
                 panic("Max # of irq sources exceeded!!\n");
 }
+#else /* CONFIG_X86_IO_APIC */
+static inline void __init MP_bus_info(struct mpc_bus *m) {}
+static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
+static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
+#endif /* CONFIG_X86_IO_APIC */
 
-#endif
 
 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
 {
@@ -275,6 +276,20 @@ static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
         return 1;
 }
 
+static void skip_entry(unsigned char **ptr, int *count, int size)
+{
+        *ptr += size;
+        *count += size;
+}
+
+static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
+{
+        printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
+                "type %x\n", *mpt);
+        print_hex_dump(KERN_ERR, "  ", DUMP_PREFIX_ADDRESS, 16,
+                        1, mpc, mpc->length, 1);
+}
+
 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
 {
         char str[16];
@@ -310,61 +325,30 @@ static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
         while (count < mpc->length) {
                 switch (*mpt) {
                 case MP_PROCESSOR:
-                        {
-                                struct mpc_cpu *m = (struct mpc_cpu *)mpt;
-                                /* ACPI may have already provided this data */
-                                if (!acpi_lapic)
-                                        MP_processor_info(m);
-                                mpt += sizeof(*m);
-                                count += sizeof(*m);
-                                break;
-                        }
+                        /* ACPI may have already provided this data */
+                        if (!acpi_lapic)
+                                MP_processor_info((struct mpc_cpu *)mpt);
+                        skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
+                        break;
                 case MP_BUS:
-                        {
-                                struct mpc_bus *m = (struct mpc_bus *)mpt;
-#ifdef CONFIG_X86_IO_APIC
-                                MP_bus_info(m);
-#endif
-                                mpt += sizeof(*m);
-                                count += sizeof(*m);
-                                break;
-                        }
+                        MP_bus_info((struct mpc_bus *)mpt);
+                        skip_entry(&mpt, &count, sizeof(struct mpc_bus));
+                        break;
                 case MP_IOAPIC:
-                        {
-#ifdef CONFIG_X86_IO_APIC
-                                struct mpc_ioapic *m = (struct mpc_ioapic *)mpt;
-                                MP_ioapic_info(m);
-#endif
-                                mpt += sizeof(struct mpc_ioapic);
-                                count += sizeof(struct mpc_ioapic);
-                                break;
-                        }
+                        MP_ioapic_info((struct mpc_ioapic *)mpt);
+                        skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
+                        break;
                 case MP_INTSRC:
-                        {
-#ifdef CONFIG_X86_IO_APIC
-                                struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
-
-                                MP_intsrc_info(m);
-#endif
-                                mpt += sizeof(struct mpc_intsrc);
-                                count += sizeof(struct mpc_intsrc);
-                                break;
-                        }
+                        MP_intsrc_info((struct mpc_intsrc *)mpt);
+                        skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
+                        break;
                 case MP_LINTSRC:
-                        {
-                                struct mpc_lintsrc *m =
-                                    (struct mpc_lintsrc *)mpt;
-                                MP_lintsrc_info(m);
-                                mpt += sizeof(*m);
-                                count += sizeof(*m);
-                                break;
-                        }
+                        MP_lintsrc_info((struct mpc_lintsrc *)mpt);
+                        skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
+                        break;
                 default:
                         /* wrong mptable */
-                        printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
-                        printk(KERN_ERR "type %x\n", *mpt);
-                        print_hex_dump(KERN_ERR, "  ", DUMP_PREFIX_ADDRESS, 16,
-                                        1, mpc, mpc->length, 1);
+                        smp_dump_mptable(mpc, mpt);
                         count = mpc->length;
                         break;
                 }
@@ -558,6 +542,68 @@ static inline void __init construct_default_ISA_mptable(int mpc_default_type)
 
 static struct mpf_intel *mpf_found;
 
+static unsigned long __init get_mpc_size(unsigned long physptr)
+{
+        struct mpc_table *mpc;
+        unsigned long size;
+
+        mpc = early_ioremap(physptr, PAGE_SIZE);
+        size = mpc->length;
+        early_iounmap(mpc, PAGE_SIZE);
+        apic_printk(APIC_VERBOSE, "  mpc: %lx-%lx\n", physptr, physptr + size);
+
+        return size;
+}
+
+static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
+{
+        struct mpc_table *mpc;
+        unsigned long size;
+
+        size = get_mpc_size(mpf->physptr);
+        mpc = early_ioremap(mpf->physptr, size);
+        /*
+         * Read the physical hardware table.  Anything here will
+         * override the defaults.
+         */
+        if (!smp_read_mpc(mpc, early)) {
+#ifdef CONFIG_X86_LOCAL_APIC
+                smp_found_config = 0;
+#endif
+                printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
+                        "... disabling SMP support. (tell your hw vendor)\n");
+                early_iounmap(mpc, size);
+                return -1;
+        }
+        early_iounmap(mpc, size);
+
+        if (early)
+                return -1;
+
+#ifdef CONFIG_X86_IO_APIC
+        /*
+         * If there are no explicit MP IRQ entries, then we are
+         * broken.  We set up most of the low 16 IO-APIC pins to
+         * ISA defaults and hope it will work.
+         */
+        if (!mp_irq_entries) {
+                struct mpc_bus bus;
+
+                printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
+                       "using default mptable. (tell your hw vendor)\n");
+
+                bus.type = MP_BUS;
+                bus.busid = 0;
+                memcpy(bus.bustype, "ISA   ", 6);
+                MP_bus_info(&bus);
+
+                construct_default_ioirq_mptable(0);
+        }
+#endif
+
+        return 0;
+}
+
 /*
  * Scan the memory blocks for an SMP configuration block.
  */
@@ -611,45 +657,8 @@ static void __init __get_smp_config(unsigned int early)
                 construct_default_ISA_mptable(mpf->feature1);
 
         } else if (mpf->physptr) {
-
-                /*
-                 * Read the physical hardware table.  Anything here will
-                 * override the defaults.
-                 */
-                if (!smp_read_mpc(phys_to_virt(mpf->physptr), early)) {
-#ifdef CONFIG_X86_LOCAL_APIC
-                        smp_found_config = 0;
-#endif
-                        printk(KERN_ERR
-                               "BIOS bug, MP table errors detected!...\n");
-                        printk(KERN_ERR "... disabling SMP support. "
-                               "(tell your hw vendor)\n");
-                        return;
-                }
-
-                if (early)
+                if (check_physptr(mpf, early))
                         return;
-#ifdef CONFIG_X86_IO_APIC
-                /*
-                 * If there are no explicit MP IRQ entries, then we are
-                 * broken.  We set up most of the low 16 IO-APIC pins to
-                 * ISA defaults and hope it will work.
-                 */
-                if (!mp_irq_entries) {
-                        struct mpc_bus bus;
-
-                        printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
-                               "using default mptable. "
-                               "(tell your hw vendor)\n");
-
-                        bus.type = MP_BUS;
-                        bus.busid = 0;
-                        memcpy(bus.bustype, "ISA   ", 6);
-                        MP_bus_info(&bus);
-
-                        construct_default_ioirq_mptable(0);
-                }
-#endif
         } else
                 BUG();
 
@@ -670,6 +679,31 @@ void __init get_smp_config(void)
         __get_smp_config(0);
 }
 
+static void smp_reserve_bootmem(struct mpf_intel *mpf)
+{
+        unsigned long size = get_mpc_size(mpf->physptr);
+#ifdef CONFIG_X86_32
+        /*
+         * We cannot access to MPC table to compute table size yet,
+         * as only few megabytes from the bottom is mapped now.
+         * PC-9800's MPC table places on the very last of physical
+         * memory; so that simply reserving PAGE_SIZE from mpf->physptr
+         * yields BUG() in reserve_bootmem.
+         * also need to make sure physptr is below than max_low_pfn
+         * we don't need reserve the area above max_low_pfn
+         */
+        unsigned long end = max_low_pfn * PAGE_SIZE;
+
+        if (mpf->physptr < end) {
+                if (mpf->physptr + size > end)
+                        size = end - mpf->physptr;
+                reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
+        }
+#else
+        reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
+#endif
+}
+
 static int __init smp_scan_config(unsigned long base, unsigned long length,
                                   unsigned reserve)
 {
@@ -697,36 +731,10 @@ static int __init smp_scan_config(unsigned long base, unsigned long length,
 
                         if (!reserve)
                                 return 1;
-                        reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
-                                        BOOTMEM_DEFAULT);
-                        if (mpf->physptr) {
-                                unsigned long size = PAGE_SIZE;
-#ifdef CONFIG_X86_32
-                                /*
-                                 * We cannot access to MPC table to compute
-                                 * table size yet, as only few megabytes from
-                                 * the bottom is mapped now.
-                                 * PC-9800's MPC table places on the very last
-                                 * of physical memory; so that simply reserving
-                                 * PAGE_SIZE from mpf->physptr yields BUG()
-                                 * in reserve_bootmem.
-                                 * also need to make sure physptr is below than
-                                 * max_low_pfn
-                                 * we don't need reserve the area above max_low_pfn
-                                 */
-                                unsigned long end = max_low_pfn * PAGE_SIZE;
-
-                                if (mpf->physptr < end) {
-                                        if (mpf->physptr + size > end)
-                                                size = end - mpf->physptr;
-                                        reserve_bootmem_generic(mpf->physptr, size,
-                                                        BOOTMEM_DEFAULT);
-                                }
-#else
-                                reserve_bootmem_generic(mpf->physptr, size,
+                        reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf),
                                                 BOOTMEM_DEFAULT);
-#endif
-                        }
+                        if (mpf->physptr)
+                                smp_reserve_bootmem(mpf);
 
                         return 1;
                 }
@@ -829,7 +837,57 @@ static int  __init get_MP_intsrc_index(struct mpc_intsrc *m)
 #define SPARE_SLOT_NUM 20
 
 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
-#endif
+
+static void check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
+{
+        int i;
+
+        apic_printk(APIC_VERBOSE, "OLD ");
+        print_MP_intsrc_info(m);
+
+        i = get_MP_intsrc_index(m);
+        if (i > 0) {
+                assign_to_mpc_intsrc(&mp_irqs[i], m);
+                apic_printk(APIC_VERBOSE, "NEW ");
+                print_mp_irq_info(&mp_irqs[i]);
+                return;
+        }
+        if (!i) {
+                /* legacy, do nothing */
+                return;
+        }
+        if (*nr_m_spare < SPARE_SLOT_NUM) {
+                /*
+                 * not found (-1), or duplicated (-2) are invalid entries,
+                 * we need to use the slot later
+                 */
+                m_spare[*nr_m_spare] = m;
+                *nr_m_spare += 1;
+        }
+}
+#else /* CONFIG_X86_IO_APIC */
+static inline void check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
+#endif /* CONFIG_X86_IO_APIC */
+
+static int check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length,
+                      int count)
+{
+        if (!mpc_new_phys) {
+                pr_info("No spare slots, try to append...take your risk, "
+                        "new mpc_length %x\n", count);
+        } else {
+                if (count <= mpc_new_length)
+                        pr_info("No spare slots, try to append..., "
+                                "new mpc_length %x\n", count);
+                else {
+                        pr_err("mpc_new_length %lx is too small\n",
+                                mpc_new_length);
+                        return -1;
+                }
+        }
+
+        return 0;
+}
 
 static int  __init replace_intsrc_all(struct mpc_table *mpc,
                                         unsigned long mpc_new_phys,
@@ -837,77 +895,33 @@ static int  __init replace_intsrc_all(struct mpc_table *mpc,
 {
 #ifdef CONFIG_X86_IO_APIC
         int i;
-        int nr_m_spare = 0;
 #endif
-
         int count = sizeof(*mpc);
+        int nr_m_spare = 0;
         unsigned char *mpt = ((unsigned char *)mpc) + count;
 
         printk(KERN_INFO "mpc_length %x\n", mpc->length);
         while (count < mpc->length) {
                 switch (*mpt) {
                 case MP_PROCESSOR:
-                        {
-                                struct mpc_cpu *m = (struct mpc_cpu *)mpt;
-                                mpt += sizeof(*m);
-                                count += sizeof(*m);
-                                break;
-                        }
+                        skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
+                        break;
                 case MP_BUS:
-                        {
-                                struct mpc_bus *m = (struct mpc_bus *)mpt;
-                                mpt += sizeof(*m);
-                                count += sizeof(*m);
-                                break;
-                        }
+                        skip_entry(&mpt, &count, sizeof(struct mpc_bus));
+                        break;
                 case MP_IOAPIC:
-                        {
-                                mpt += sizeof(struct mpc_ioapic);
-                                count += sizeof(struct mpc_ioapic);
-                                break;
-                        }
+                        skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
+                        break;
                 case MP_INTSRC:
-                        {
-#ifdef CONFIG_X86_IO_APIC
-                                struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
-
-                                printk(KERN_INFO "OLD ");
-                                print_MP_intsrc_info(m);
-                                i = get_MP_intsrc_index(m);
-                                if (i > 0) {
-                                        assign_to_mpc_intsrc(&mp_irqs[i], m);
-                                        printk(KERN_INFO "NEW ");
-                                        print_mp_irq_info(&mp_irqs[i]);
-                                } else if (!i) {
-                                        /* legacy, do nothing */
-                                } else if (nr_m_spare < SPARE_SLOT_NUM) {
-                                        /*
-                                         * not found (-1), or duplicated (-2)
-                                         * are invalid entries,
-                                         * we need to use the slot  later
-                                         */
-                                        m_spare[nr_m_spare] = m;
-                                        nr_m_spare++;
-                                }
-#endif
-                                mpt += sizeof(struct mpc_intsrc);
-                                count += sizeof(struct mpc_intsrc);
-                                break;
-                        }
+                        check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
+                        skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
+                        break;
                 case MP_LINTSRC:
-                        {
-                                struct mpc_lintsrc *m =
-                                    (struct mpc_lintsrc *)mpt;
-                                mpt += sizeof(*m);
-                                count += sizeof(*m);
-                                break;
-                        }
+                        skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
+                        break;
                 default:
                         /* wrong mptable */
-                        printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
-                        printk(KERN_ERR "type %x\n", *mpt);
-                        print_hex_dump(KERN_ERR, "  ", DUMP_PREFIX_ADDRESS, 16,
-                                        1, mpc, mpc->length, 1);
+                        smp_dump_mptable(mpc, mpt);
                         goto out;
                 }
         }
@@ -924,23 +938,15 @@ static int  __init replace_intsrc_all(struct mpc_table *mpc,
                         continue;
 
                 if (nr_m_spare > 0) {
-                        printk(KERN_INFO "*NEW* found ");
+                        apic_printk(APIC_VERBOSE, "*NEW* found\n");
                         nr_m_spare--;
                         assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
                         m_spare[nr_m_spare] = NULL;
                 } else {
                         struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
                         count += sizeof(struct mpc_intsrc);
-                        if (!mpc_new_phys) {
-                                printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
-                        } else {
-                                if (count <= mpc_new_length)
-                                        printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
-                                else {
-                                        printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
-                                        goto out;
-                                }
-                        }
+                        if (!check_slot(mpc_new_phys, mpc_new_length, count))
+                                goto out;
                         assign_to_mpc_intsrc(&mp_irqs[i], m);
                         mpc->length = count;
                         mpt += sizeof(struct mpc_intsrc);
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 63dd358d8ee1..8e45f4464880 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -470,7 +470,6 @@ struct pv_mmu_ops pv_mmu_ops = {
 #if PAGETABLE_LEVELS >= 3
 #ifdef CONFIG_X86_PAE
         .set_pte_atomic = native_set_pte_atomic,
-        .set_pte_present = native_set_pte_present,
         .pte_clear = native_pte_clear,
         .pmd_clear = native_pmd_clear,
 #endif
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index d28bbdc35e4e..755c21e906f3 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -380,8 +380,9 @@ static inline struct iommu_table *find_iommu_table(struct device *dev)
         return tbl;
 }
 
-static void calgary_unmap_sg(struct device *dev,
-        struct scatterlist *sglist, int nelems, int direction)
+static void calgary_unmap_sg(struct device *dev, struct scatterlist *sglist,
+                             int nelems,enum dma_data_direction dir,
+                             struct dma_attrs *attrs)
 {
         struct iommu_table *tbl = find_iommu_table(dev);
         struct scatterlist *s;
@@ -404,7 +405,8 @@ static void calgary_unmap_sg(struct device *dev,
 }
 
 static int calgary_map_sg(struct device *dev, struct scatterlist *sg,
-        int nelems, int direction)
+                          int nelems, enum dma_data_direction dir,
+                          struct dma_attrs *attrs)
 {
         struct iommu_table *tbl = find_iommu_table(dev);
         struct scatterlist *s;
@@ -429,15 +431,14 @@ static int calgary_map_sg(struct device *dev, struct scatterlist *sg,
                 s->dma_address = (entry << PAGE_SHIFT) | s->offset;
 
                 /* insert into HW table */
-                tce_build(tbl, entry, npages, vaddr & PAGE_MASK,
-                          direction);
+                tce_build(tbl, entry, npages, vaddr & PAGE_MASK, dir);
 
                 s->dma_length = s->length;
         }
 
         return nelems;
 error:
-        calgary_unmap_sg(dev, sg, nelems, direction);
+        calgary_unmap_sg(dev, sg, nelems, dir, NULL);
         for_each_sg(sg, s, nelems, i) {
                 sg->dma_address = bad_dma_address;
                 sg->dma_length = 0;
@@ -445,10 +446,12 @@ error:
         return 0;
 }
 
-static dma_addr_t calgary_map_single(struct device *dev, phys_addr_t paddr,
-        size_t size, int direction)
+static dma_addr_t calgary_map_page(struct device *dev, struct page *page,
+                                   unsigned long offset, size_t size,
+                                   enum dma_data_direction dir,
+                                   struct dma_attrs *attrs)
 {
-        void *vaddr = phys_to_virt(paddr);
+        void *vaddr = page_address(page) + offset;
         unsigned long uaddr;
         unsigned int npages;
         struct iommu_table *tbl = find_iommu_table(dev);
@@ -456,17 +459,18 @@ static dma_addr_t calgary_map_single(struct device *dev, phys_addr_t paddr,
         uaddr = (unsigned long)vaddr;
         npages = iommu_num_pages(uaddr, size, PAGE_SIZE);
 
-        return iommu_alloc(dev, tbl, vaddr, npages, direction);
+        return iommu_alloc(dev, tbl, vaddr, npages, dir);
 }
 
-static void calgary_unmap_single(struct device *dev, dma_addr_t dma_handle,
-        size_t size, int direction)
+static void calgary_unmap_page(struct device *dev, dma_addr_t dma_addr,
+                               size_t size, enum dma_data_direction dir,
+                               struct dma_attrs *attrs)
 {
         struct iommu_table *tbl = find_iommu_table(dev);
         unsigned int npages;
 
-        npages = iommu_num_pages(dma_handle, size, PAGE_SIZE);
-        iommu_free(tbl, dma_handle, npages);
+        npages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
+        iommu_free(tbl, dma_addr, npages);
 }
 
 static void* calgary_alloc_coherent(struct device *dev, size_t size,
@@ -515,13 +519,13 @@ static void calgary_free_coherent(struct device *dev, size_t size,
         free_pages((unsigned long)vaddr, get_order(size));
 }
 
-static struct dma_mapping_ops calgary_dma_ops = {
+static struct dma_map_ops calgary_dma_ops = {
         .alloc_coherent = calgary_alloc_coherent,
         .free_coherent = calgary_free_coherent,
-        .map_single = calgary_map_single,
-        .unmap_single = calgary_unmap_single,
         .map_sg = calgary_map_sg,
         .unmap_sg = calgary_unmap_sg,
+        .map_page = calgary_map_page,
+        .unmap_page = calgary_unmap_page,
 };
 
 static inline void __iomem * busno_to_bbar(unsigned char num)
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index b25428533141..c7c4776ff630 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -1,4 +1,5 @@
 #include <linux/dma-mapping.h>
+#include <linux/dma-debug.h>
 #include <linux/dmar.h>
 #include <linux/bootmem.h>
 #include <linux/pci.h>
@@ -12,7 +13,7 @@
 
 static int forbid_dac __read_mostly;
 
-struct dma_mapping_ops *dma_ops;
+struct dma_map_ops *dma_ops;
 EXPORT_SYMBOL(dma_ops);
 
 static int iommu_sac_force __read_mostly;
@@ -44,6 +45,9 @@ struct device x86_dma_fallback_dev = {
 };
 EXPORT_SYMBOL(x86_dma_fallback_dev);
 
+/* Number of entries preallocated for DMA-API debugging */
+#define PREALLOC_DMA_DEBUG_ENTRIES       32768
+
 int dma_set_mask(struct device *dev, u64 mask)
 {
         if (!dev->dma_mask || !dma_supported(dev, mask))
@@ -224,7 +228,7 @@ early_param("iommu", iommu_setup);
 
 int dma_supported(struct device *dev, u64 mask)
 {
-        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        struct dma_map_ops *ops = get_dma_ops(dev);
 
 #ifdef CONFIG_PCI
         if (mask > 0xffffffff && forbid_dac > 0) {
@@ -265,6 +269,12 @@ EXPORT_SYMBOL(dma_supported);
 
 static int __init pci_iommu_init(void)
 {
+        dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
+
+#ifdef CONFIG_PCI
+        dma_debug_add_bus(&pci_bus_type);
+#endif
+
         calgary_iommu_init();
 
         intel_iommu_init();
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index d5768b1af080..b284b58c035c 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -255,10 +255,13 @@ static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
 }
 
 /* Map a single area into the IOMMU */
-static dma_addr_t
-gart_map_single(struct device *dev, phys_addr_t paddr, size_t size, int dir)
+static dma_addr_t gart_map_page(struct device *dev, struct page *page,
+                                unsigned long offset, size_t size,
+                                enum dma_data_direction dir,
+                                struct dma_attrs *attrs)
 {
         unsigned long bus;
+        phys_addr_t paddr = page_to_phys(page) + offset;
 
         if (!dev)
                 dev = &x86_dma_fallback_dev;
@@ -275,8 +278,9 @@ gart_map_single(struct device *dev, phys_addr_t paddr, size_t size, int dir)
 /*
  * Free a DMA mapping.
  */
-static void gart_unmap_single(struct device *dev, dma_addr_t dma_addr,
-                              size_t size, int direction)
+static void gart_unmap_page(struct device *dev, dma_addr_t dma_addr,
+                            size_t size, enum dma_data_direction dir,
+                            struct dma_attrs *attrs)
 {
         unsigned long iommu_page;
         int npages;
@@ -298,8 +302,8 @@ static void gart_unmap_single(struct device *dev, dma_addr_t dma_addr,
 /*
  * Wrapper for pci_unmap_single working with scatterlists.
  */
-static void
-gart_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, int dir)
+static void gart_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
+                          enum dma_data_direction dir, struct dma_attrs *attrs)
 {
         struct scatterlist *s;
         int i;
@@ -307,7 +311,7 @@ gart_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, int dir)
         for_each_sg(sg, s, nents, i) {
                 if (!s->dma_length || !s->length)
                         break;
-                gart_unmap_single(dev, s->dma_address, s->dma_length, dir);
+                gart_unmap_page(dev, s->dma_address, s->dma_length, dir, NULL);
         }
 }
 
@@ -329,7 +333,7 @@ static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
                         addr = dma_map_area(dev, addr, s->length, dir, 0);
                         if (addr == bad_dma_address) {
                                 if (i > 0)
-                                        gart_unmap_sg(dev, sg, i, dir);
+                                        gart_unmap_sg(dev, sg, i, dir, NULL);
                                 nents = 0;
                                 sg[0].dma_length = 0;
                                 break;
@@ -400,8 +404,8 @@ dma_map_cont(struct device *dev, struct scatterlist *start, int nelems,
  * DMA map all entries in a scatterlist.
  * Merge chunks that have page aligned sizes into a continuous mapping.
  */
-static int
-gart_map_sg(struct device *dev, struct scatterlist *sg, int nents, int dir)
+static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+                       enum dma_data_direction dir, struct dma_attrs *attrs)
 {
         struct scatterlist *s, *ps, *start_sg, *sgmap;
         int need = 0, nextneed, i, out, start;
@@ -468,7 +472,7 @@ gart_map_sg(struct device *dev, struct scatterlist *sg, int nents, int dir)
 
 error:
         flush_gart();
-        gart_unmap_sg(dev, sg, out, dir);
+        gart_unmap_sg(dev, sg, out, dir, NULL);
 
         /* When it was forced or merged try again in a dumb way */
         if (force_iommu || iommu_merge) {
@@ -521,7 +525,7 @@ static void
 gart_free_coherent(struct device *dev, size_t size, void *vaddr,
                    dma_addr_t dma_addr)
 {
-        gart_unmap_single(dev, dma_addr, size, DMA_BIDIRECTIONAL);
+        gart_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL, NULL);
         free_pages((unsigned long)vaddr, get_order(size));
 }
 
@@ -707,11 +711,11 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
         return -1;
 }
 
-static struct dma_mapping_ops gart_dma_ops = {
-        .map_single                     = gart_map_single,
-        .unmap_single                   = gart_unmap_single,
+static struct dma_map_ops gart_dma_ops = {
         .map_sg                         = gart_map_sg,
         .unmap_sg                       = gart_unmap_sg,
+        .map_page                       = gart_map_page,
+        .unmap_page                     = gart_unmap_page,
         .alloc_coherent                 = gart_alloc_coherent,
         .free_coherent                  = gart_free_coherent,
 };
diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c
index c70ab5a5d4c8..c6d703b39326 100644
--- a/arch/x86/kernel/pci-nommu.c
+++ b/arch/x86/kernel/pci-nommu.c
@@ -1,14 +1,14 @@
 /* Fallback functions when the main IOMMU code is not compiled in. This
    code is roughly equivalent to i386. */
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/string.h>
 #include <linux/dma-mapping.h>
 #include <linux/scatterlist.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/mm.h>
 
-#include <asm/iommu.h>
 #include <asm/processor.h>
+#include <asm/iommu.h>
 #include <asm/dma.h>
 
 static int
@@ -25,19 +25,19 @@ check_addr(char *name, struct device *hwdev, dma_addr_t bus, size_t size)
         return 1;
 }
 
-static dma_addr_t
-nommu_map_single(struct device *hwdev, phys_addr_t paddr, size_t size,
-               int direction)
+static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
+                                 unsigned long offset, size_t size,
+                                 enum dma_data_direction dir,
+                                 struct dma_attrs *attrs)
 {
-        dma_addr_t bus = paddr;
+        dma_addr_t bus = page_to_phys(page) + offset;
         WARN_ON(size == 0);
-        if (!check_addr("map_single", hwdev, bus, size))
-                                return bad_dma_address;
+        if (!check_addr("map_single", dev, bus, size))
+                return bad_dma_address;
         flush_write_buffers();
         return bus;
 }
 
-
 /* Map a set of buffers described by scatterlist in streaming
  * mode for DMA.  This is the scatter-gather version of the
  * above pci_map_single interface.  Here the scatter gather list
@@ -54,7 +54,8 @@ nommu_map_single(struct device *hwdev, phys_addr_t paddr, size_t size,
  * the same here.
  */
 static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg,
-               int nents, int direction)
+                        int nents, enum dma_data_direction dir,
+                        struct dma_attrs *attrs)
 {
         struct scatterlist *s;
         int i;
@@ -78,12 +79,12 @@ static void nommu_free_coherent(struct device *dev, size_t size, void *vaddr,
         free_pages((unsigned long)vaddr, get_order(size));
 }
 
-struct dma_mapping_ops nommu_dma_ops = {
-        .alloc_coherent = dma_generic_alloc_coherent,
-        .free_coherent = nommu_free_coherent,
-        .map_single = nommu_map_single,
-        .map_sg = nommu_map_sg,
-        .is_phys = 1,
+struct dma_map_ops nommu_dma_ops = {
+        .alloc_coherent = dma_generic_alloc_coherent,
+        .free_coherent  = nommu_free_coherent,
+        .map_sg         = nommu_map_sg,
+        .map_page       = nommu_map_page,
+        .is_phys        = 1,
 };
 
 void __init no_iommu_init(void)
diff --git a/arch/x86/kernel/pci-swiotlb_64.c b/arch/x86/kernel/pci-swiotlb.c
index d59c91747665..34f12e9996ed 100644
--- a/arch/x86/kernel/pci-swiotlb_64.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -33,18 +33,11 @@ phys_addr_t swiotlb_bus_to_phys(dma_addr_t baddr)
         return baddr;
 }
 
-int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
+int __weak swiotlb_arch_range_needs_mapping(phys_addr_t paddr, size_t size)
 {
         return 0;
 }
 
-static dma_addr_t
-swiotlb_map_single_phys(struct device *hwdev, phys_addr_t paddr, size_t size,
-                        int direction)
-{
-        return swiotlb_map_single(hwdev, phys_to_virt(paddr), size, direction);
-}
-
 static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
                                         dma_addr_t *dma_handle, gfp_t flags)
 {
@@ -57,20 +50,20 @@ static void *x86_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
         return swiotlb_alloc_coherent(hwdev, size, dma_handle, flags);
 }
 
-struct dma_mapping_ops swiotlb_dma_ops = {
+struct dma_map_ops swiotlb_dma_ops = {
         .mapping_error = swiotlb_dma_mapping_error,
         .alloc_coherent = x86_swiotlb_alloc_coherent,
         .free_coherent = swiotlb_free_coherent,
-        .map_single = swiotlb_map_single_phys,
-        .unmap_single = swiotlb_unmap_single,
         .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
         .sync_single_for_device = swiotlb_sync_single_for_device,
         .sync_single_range_for_cpu = swiotlb_sync_single_range_for_cpu,
         .sync_single_range_for_device = swiotlb_sync_single_range_for_device,
         .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
         .sync_sg_for_device = swiotlb_sync_sg_for_device,
-        .map_sg = swiotlb_map_sg,
-        .unmap_sg = swiotlb_unmap_sg,
+        .map_sg = swiotlb_map_sg_attrs,
+        .unmap_sg = swiotlb_unmap_sg_attrs,
+        .map_page = swiotlb_map_page,
+        .unmap_page = swiotlb_unmap_page,
         .dma_supported = NULL,
 };
 
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 6afa5232dbb7..156f87582c6c 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -65,11 +65,11 @@ void exit_thread(void)
 {
         struct task_struct *me = current;
         struct thread_struct *t = &me->thread;
+        unsigned long *bp = t->io_bitmap_ptr;
 
-        if (me->thread.io_bitmap_ptr) {
+        if (bp) {
                 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
 
-                kfree(t->io_bitmap_ptr);
                 t->io_bitmap_ptr = NULL;
                 clear_thread_flag(TIF_IO_BITMAP);
                 /*
@@ -78,6 +78,7 @@ void exit_thread(void)
                 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
                 t->io_bitmap_max = 0;
                 put_cpu();
+                kfree(bp);
         }
 
         ds_exit_thread(current);
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 3d9672e59c16..19378715f415 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -685,9 +685,8 @@ static int ptrace_bts_config(struct task_struct *child,
                 if (!cfg.signal)
                         return -EINVAL;
 
-                return -EOPNOTSUPP;
-
                 child->thread.bts_ovfl_signal = cfg.signal;
+                return -EOPNOTSUPP;
         }
 
         if ((cfg.flags & PTRACE_BTS_O_ALLOC) &&
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 697d1b78cfbf..e95022e4f5d5 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -74,8 +74,7 @@ static void ich_force_hpet_resume(void)
         if (!force_hpet_address)
                 return;
 
-        if (rcba_base == NULL)
-                BUG();
+        BUG_ON(rcba_base == NULL);
 
         /* read the Function Disable register, dword mode only */
         val = readl(rcba_base + 0x3404);
diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S
index 2064d0aa8d28..41235531b11c 100644
--- a/arch/x86/kernel/relocate_kernel_32.S
+++ b/arch/x86/kernel/relocate_kernel_32.S
@@ -17,7 +17,8 @@
 
 #define PTR(x) (x << 2)
 
-/* control_page + KEXEC_CONTROL_CODE_MAX_SIZE
+/*
+ * control_page + KEXEC_CONTROL_CODE_MAX_SIZE
  * ~ control_page + PAGE_SIZE are used as data storage and stack for
  * jumping back
  */
@@ -76,8 +77,10 @@ relocate_kernel:
         movl    %eax, CP_PA_SWAP_PAGE(%edi)
         movl    %ebx, CP_PA_BACKUP_PAGES_MAP(%edi)
 
-        /* get physical address of control page now */
-        /* this is impossible after page table switch */
+        /*
+         * get physical address of control page now
+         * this is impossible after page table switch
+         */
         movl    PTR(PA_CONTROL_PAGE)(%ebp), %edi
 
         /* switch to new set of page tables */
@@ -97,7 +100,8 @@ identity_mapped:
         /* store the start address on the stack */
         pushl   %edx
 
-        /* Set cr0 to a known state:
+        /*
+         * Set cr0 to a known state:
          *  - Paging disabled
          *  - Alignment check disabled
          *  - Write protect disabled
@@ -113,7 +117,8 @@ identity_mapped:
         /* clear cr4 if applicable */
         testl   %ecx, %ecx
         jz      1f
-        /* Set cr4 to a known state:
+        /*
+         * Set cr4 to a known state:
          * Setting everything to zero seems safe.
          */
         xorl    %eax, %eax
@@ -132,15 +137,18 @@ identity_mapped:
         call    swap_pages
         addl    $8, %esp
 
-        /* To be certain of avoiding problems with self-modifying code
+        /*
+         * To be certain of avoiding problems with self-modifying code
          * I need to execute a serializing instruction here.
          * So I flush the TLB, it's handy, and not processor dependent.
          */
         xorl    %eax, %eax
         movl    %eax, %cr3
 
-        /* set all of the registers to known values */
-        /* leave %esp alone */
+        /*
+         * set all of the registers to known values
+         * leave %esp alone
+         */
 
         testl   %esi, %esi
         jnz 1f
diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S
index d32cfb27a479..4de8f5b3d476 100644
--- a/arch/x86/kernel/relocate_kernel_64.S
+++ b/arch/x86/kernel/relocate_kernel_64.S
@@ -19,29 +19,77 @@
 #define PTR(x) (x << 3)
 #define PAGE_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
 
+/*
+ * control_page + KEXEC_CONTROL_CODE_MAX_SIZE
+ * ~ control_page + PAGE_SIZE are used as data storage and stack for
+ * jumping back
+ */
+#define DATA(offset)            (KEXEC_CONTROL_CODE_MAX_SIZE+(offset))
+
+/* Minimal CPU state */
+#define RSP                     DATA(0x0)
+#define CR0                     DATA(0x8)
+#define CR3                     DATA(0x10)
+#define CR4                     DATA(0x18)
+
+/* other data */
+#define CP_PA_TABLE_PAGE        DATA(0x20)
+#define CP_PA_SWAP_PAGE         DATA(0x28)
+#define CP_PA_BACKUP_PAGES_MAP  DATA(0x30)
+
         .text
         .align PAGE_SIZE
         .code64
         .globl relocate_kernel
 relocate_kernel:
-        /* %rdi indirection_page
+        /*
+         * %rdi indirection_page
          * %rsi page_list
          * %rdx start address
+         * %rcx preserve_context
          */
 
+        /* Save the CPU context, used for jumping back */
+        pushq %rbx
+        pushq %rbp
+        pushq %r12
+        pushq %r13
+        pushq %r14
+        pushq %r15
+        pushf
+
+        movq    PTR(VA_CONTROL_PAGE)(%rsi), %r11
+        movq    %rsp, RSP(%r11)
+        movq    %cr0, %rax
+        movq    %rax, CR0(%r11)
+        movq    %cr3, %rax
+        movq    %rax, CR3(%r11)
+        movq    %cr4, %rax
+        movq    %rax, CR4(%r11)
+
         /* zero out flags, and disable interrupts */
         pushq $0
         popfq
 
-        /* get physical address of control page now */
-        /* this is impossible after page table switch */
+        /*
+         * get physical address of control page now
+         * this is impossible after page table switch
+         */
         movq    PTR(PA_CONTROL_PAGE)(%rsi), %r8
 
         /* get physical address of page table now too */
-        movq    PTR(PA_TABLE_PAGE)(%rsi), %rcx
+        movq    PTR(PA_TABLE_PAGE)(%rsi), %r9
+
+        /* get physical address of swap page now */
+        movq    PTR(PA_SWAP_PAGE)(%rsi), %r10
+
+        /* save some information for jumping back */
+        movq    %r9, CP_PA_TABLE_PAGE(%r11)
+        movq    %r10, CP_PA_SWAP_PAGE(%r11)
+        movq    %rdi, CP_PA_BACKUP_PAGES_MAP(%r11)
 
         /* Switch to the identity mapped page tables */
-        movq    %rcx, %cr3
+        movq    %r9, %cr3
 
         /* setup a new stack at the end of the physical control page */
         lea     PAGE_SIZE(%r8), %rsp
@@ -55,7 +103,8 @@ identity_mapped:
         /* store the start address on the stack */
         pushq   %rdx
 
-        /* Set cr0 to a known state:
+        /*
+         * Set cr0 to a known state:
          *  - Paging enabled
          *  - Alignment check disabled
          *  - Write protect disabled
@@ -68,7 +117,8 @@ identity_mapped:
         orl     $(X86_CR0_PG | X86_CR0_PE), %eax
         movq    %rax, %cr0
 
-        /* Set cr4 to a known state:
+        /*
+         * Set cr4 to a known state:
          *  - physical address extension enabled
          */
         movq    $X86_CR4_PAE, %rax
@@ -78,9 +128,87 @@ identity_mapped:
 1:
 
         /* Flush the TLB (needed?) */
-        movq    %rcx, %cr3
+        movq    %r9, %cr3
+
+        movq    %rcx, %r11
+        call    swap_pages
+
+        /*
+         * To be certain of avoiding problems with self-modifying code
+         * I need to execute a serializing instruction here.
+         * So I flush the TLB by reloading %cr3 here, it's handy,
+         * and not processor dependent.
+         */
+        movq    %cr3, %rax
+        movq    %rax, %cr3
+
+        /*
+         * set all of the registers to known values
+         * leave %rsp alone
+         */
+
+        testq   %r11, %r11
+        jnz 1f
+        xorq    %rax, %rax
+        xorq    %rbx, %rbx
+        xorq    %rcx, %rcx
+        xorq    %rdx, %rdx
+        xorq    %rsi, %rsi
+        xorq    %rdi, %rdi
+        xorq    %rbp, %rbp
+        xorq    %r8,  %r8
+        xorq    %r9,  %r9
+        xorq    %r10, %r9
+        xorq    %r11, %r11
+        xorq    %r12, %r12
+        xorq    %r13, %r13
+        xorq    %r14, %r14
+        xorq    %r15, %r15
+
+        ret
+
+1:
+        popq    %rdx
+        leaq    PAGE_SIZE(%r10), %rsp
+        call    *%rdx
+
+        /* get the re-entry point of the peer system */
+        movq    0(%rsp), %rbp
+        call    1f
+1:
+        popq    %r8
+        subq    $(1b - relocate_kernel), %r8
+        movq    CP_PA_SWAP_PAGE(%r8), %r10
+        movq    CP_PA_BACKUP_PAGES_MAP(%r8), %rdi
+        movq    CP_PA_TABLE_PAGE(%r8), %rax
+        movq    %rax, %cr3
+        lea     PAGE_SIZE(%r8), %rsp
+        call    swap_pages
+        movq    $virtual_mapped, %rax
+        pushq   %rax
+        ret
+
+virtual_mapped:
+        movq    RSP(%r8), %rsp
+        movq    CR4(%r8), %rax
+        movq    %rax, %cr4
+        movq    CR3(%r8), %rax
+        movq    CR0(%r8), %r8
+        movq    %rax, %cr3
+        movq    %r8, %cr0
+        movq    %rbp, %rax
+
+        popf
+        popq    %r15
+        popq    %r14
+        popq    %r13
+        popq    %r12
+        popq    %rbp
+        popq    %rbx
+        ret
 
         /* Do the copies */
+swap_pages:
         movq    %rdi, %rcx      /* Put the page_list in %rcx */
         xorq    %rdi, %rdi
         xorq    %rsi, %rsi
@@ -112,36 +240,27 @@ identity_mapped:
         movq    %rcx,   %rsi  /* For ever source page do a copy */
         andq    $0xfffffffffffff000, %rsi
 
+        movq    %rdi, %rdx
+        movq    %rsi, %rax
+
+        movq    %r10, %rdi
         movq    $512,   %rcx
         rep ; movsq
-        jmp     0b
-3:
-
-        /* To be certain of avoiding problems with self-modifying code
-         * I need to execute a serializing instruction here.
-         * So I flush the TLB by reloading %cr3 here, it's handy,
-         * and not processor dependent.
-         */
-        movq    %cr3, %rax
-        movq    %rax, %cr3
 
-        /* set all of the registers to known values */
-        /* leave %rsp alone */
+        movq    %rax, %rdi
+        movq    %rdx, %rsi
+        movq    $512,   %rcx
+        rep ; movsq
 
-        xorq    %rax, %rax
-        xorq    %rbx, %rbx
-        xorq    %rcx, %rcx
-        xorq    %rdx, %rdx
-        xorq    %rsi, %rsi
-        xorq    %rdi, %rdi
-        xorq    %rbp, %rbp
-        xorq    %r8,  %r8
-        xorq    %r9,  %r9
-        xorq    %r10, %r9
-        xorq    %r11, %r11
-        xorq    %r12, %r12
-        xorq    %r13, %r13
-        xorq    %r14, %r14
-        xorq    %r15, %r15
+        movq    %rdx, %rdi
+        movq    %r10, %rsi
+        movq    $512,   %rcx
+        rep ; movsq
 
+        lea     PAGE_SIZE(%rax), %rsi
+        jmp     0b
+3:
         ret
+
+        .globl kexec_control_code_size
+.set kexec_control_code_size, . - relocate_kernel
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index dd6f2b71561b..5d465b207e72 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -1,14 +1,14 @@
 /*
  * RTC related functions
  */
+#include <linux/platform_device.h>
+#include <linux/mc146818rtc.h>
 #include <linux/acpi.h>
 #include <linux/bcd.h>
-#include <linux/mc146818rtc.h>
-#include <linux/platform_device.h>
 #include <linux/pnp.h>
 
-#include <asm/time.h>
 #include <asm/vsyscall.h>
+#include <asm/time.h>
 
 #ifdef CONFIG_X86_32
 /*
@@ -16,9 +16,9 @@
  * register we are working with.  It is required for NMI access to the
  * CMOS/RTC registers.  See include/asm-i386/mc146818rtc.h for details.
  */
-volatile unsigned long cmos_lock = 0;
+volatile unsigned long cmos_lock;
 EXPORT_SYMBOL(cmos_lock);
-#endif
+#endif /* CONFIG_X86_32 */
 
 /* For two digit years assume time is always after that */
 #define CMOS_YEARS_OFFS 2000
@@ -38,9 +38,9 @@ EXPORT_SYMBOL(rtc_lock);
  */
 int mach_set_rtc_mmss(unsigned long nowtime)
 {
-        int retval = 0;
         int real_seconds, real_minutes, cmos_minutes;
         unsigned char save_control, save_freq_select;
+        int retval = 0;
 
          /* tell the clock it's being set */
         save_control = CMOS_READ(RTC_CONTROL);
@@ -72,8 +72,8 @@ int mach_set_rtc_mmss(unsigned long nowtime)
                         real_seconds = bin2bcd(real_seconds);
                         real_minutes = bin2bcd(real_minutes);
                 }
-                CMOS_WRITE(real_seconds,RTC_SECONDS);
-                CMOS_WRITE(real_minutes,RTC_MINUTES);
+                CMOS_WRITE(real_seconds, RTC_SECONDS);
+                CMOS_WRITE(real_minutes, RTC_MINUTES);
         } else {
                 printk(KERN_WARNING
                        "set_rtc_mmss: can't update from %d to %d\n",
@@ -151,6 +151,7 @@ unsigned char rtc_cmos_read(unsigned char addr)
         outb(addr, RTC_PORT(0));
         val = inb(RTC_PORT(1));
         lock_cmos_suffix(addr);
+
         return val;
 }
 EXPORT_SYMBOL(rtc_cmos_read);
@@ -166,8 +167,8 @@ EXPORT_SYMBOL(rtc_cmos_write);
 
 static int set_rtc_mmss(unsigned long nowtime)
 {
-        int retval;
         unsigned long flags;
+        int retval;
 
         spin_lock_irqsave(&rtc_lock, flags);
         retval = set_wallclock(nowtime);
@@ -242,6 +243,7 @@ static __init int add_rtc_cmos(void)
         platform_device_register(&rtc_device);
         dev_info(&rtc_device.dev,
                  "registered platform RTC device (no PNP device found)\n");
+
         return 0;
 }
 device_initcall(add_rtc_cmos);
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index b746deb9ebc6..b4158439bf63 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -112,8 +112,13 @@
 #define ARCH_SETUP
 #endif
 
+RESERVE_BRK(dmi_alloc, 65536);
+
 unsigned int boot_cpu_id __read_mostly;
 
+static __initdata unsigned long _brk_start = (unsigned long)__brk_base;
+unsigned long _brk_end = (unsigned long)__brk_base;
+
 #ifdef CONFIG_X86_64
 int default_cpu_present_to_apicid(int mps_cpu)
 {
@@ -158,12 +163,6 @@ static struct resource bss_resource = {
 
 
 #ifdef CONFIG_X86_32
-/* This value is set up by the early boot code to point to the value
-   immediately after the boot time page tables.  It contains a *physical*
-   address, and must not be in the .bss segment! */
-unsigned long init_pg_tables_start __initdata = ~0UL;
-unsigned long init_pg_tables_end __initdata = ~0UL;
-
 static struct resource video_ram_resource = {
         .name   = "Video RAM area",
         .start  = 0xa0000,
@@ -202,7 +201,9 @@ struct ist_info ist_info;
 #endif
 
 #else
-struct cpuinfo_x86 boot_cpu_data __read_mostly;
+struct cpuinfo_x86 boot_cpu_data __read_mostly = {
+        .x86_phys_bits = MAX_PHYSMEM_BITS,
+};
 EXPORT_SYMBOL(boot_cpu_data);
 #endif
 
@@ -217,12 +218,6 @@ unsigned long mmu_cr4_features = X86_CR4_PAE;
 int bootloader_type;
 
 /*
- * Early DMI memory
- */
-int dmi_alloc_index;
-char dmi_alloc_data[DMI_MAX_DATA];
-
-/*
  * Setup options
  */
 struct screen_info screen_info;
@@ -267,6 +262,35 @@ static inline void copy_edd(void)
 }
 #endif
 
+void * __init extend_brk(size_t size, size_t align)
+{
+        size_t mask = align - 1;
+        void *ret;
+
+        BUG_ON(_brk_start == 0);
+        BUG_ON(align & mask);
+
+        _brk_end = (_brk_end + mask) & ~mask;
+        BUG_ON((char *)(_brk_end + size) > __brk_limit);
+
+        ret = (void *)_brk_end;
+        _brk_end += size;
+
+        memset(ret, 0, size);
+
+        return ret;
+}
+
+static void __init reserve_brk(void)
+{
+        if (_brk_end > _brk_start)
+                reserve_early(__pa(_brk_start), __pa(_brk_end), "BRK");
+
+        /* Mark brk area as locked down and no longer taking any
+           new allocations */
+        _brk_start = 0;
+}
+
 #ifdef CONFIG_BLK_DEV_INITRD
 
 #ifdef CONFIG_X86_32
@@ -715,11 +739,7 @@ void __init setup_arch(char **cmdline_p)
         init_mm.start_code = (unsigned long) _text;
         init_mm.end_code = (unsigned long) _etext;
         init_mm.end_data = (unsigned long) _edata;
-#ifdef CONFIG_X86_32
-        init_mm.brk = init_pg_tables_end + PAGE_OFFSET;
-#else
-        init_mm.brk = (unsigned long) &_end;
-#endif
+        init_mm.brk = _brk_end;
 
         code_resource.start = virt_to_phys(_text);
         code_resource.end = virt_to_phys(_etext)-1;
@@ -840,6 +860,8 @@ void __init setup_arch(char **cmdline_p)
         setup_bios_corruption_check();
 #endif
 
+        reserve_brk();
+
         /* max_pfn_mapped is updated here */
         max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT);
         max_pfn_mapped = max_low_pfn_mapped;
@@ -1027,7 +1049,6 @@ void __init x86_quirk_trap_init(void)
 static struct irqaction irq0  = {
         .handler = timer_interrupt,
         .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
-        .mask = CPU_MASK_NONE,
         .name = "timer"
 };
 
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index d2cc6428c587..dfcc74ab0ab6 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -211,31 +211,27 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
 {
         /* Default to using normal stack */
         unsigned long sp = regs->sp;
+        int onsigstack = on_sig_stack(sp);
 
 #ifdef CONFIG_X86_64
         /* redzone */
         sp -= 128;
 #endif /* CONFIG_X86_64 */
 
-        /*
-         * If we are on the alternate signal stack and would overflow it, don't.
-         * Return an always-bogus address instead so we will die with SIGSEGV.
-         */
-        if (on_sig_stack(sp) && !likely(on_sig_stack(sp - frame_size)))
-                return (void __user *) -1L;
-
-        /* This is the X/Open sanctioned signal stack switching.  */
-        if (ka->sa.sa_flags & SA_ONSTACK) {
-                if (sas_ss_flags(sp) == 0)
-                        sp = current->sas_ss_sp + current->sas_ss_size;
-        } else {
+        if (!onsigstack) {
+                /* This is the X/Open sanctioned signal stack switching.  */
+                if (ka->sa.sa_flags & SA_ONSTACK) {
+                        if (sas_ss_flags(sp) == 0)
+                                sp = current->sas_ss_sp + current->sas_ss_size;
+                } else {
 #ifdef CONFIG_X86_32
-                /* This is the legacy signal stack switching. */
-                if ((regs->ss & 0xffff) != __USER_DS &&
-                        !(ka->sa.sa_flags & SA_RESTORER) &&
-                                ka->sa.sa_restorer)
-                        sp = (unsigned long) ka->sa.sa_restorer;
+                        /* This is the legacy signal stack switching. */
+                        if ((regs->ss & 0xffff) != __USER_DS &&
+                                !(ka->sa.sa_flags & SA_RESTORER) &&
+                                        ka->sa.sa_restorer)
+                                sp = (unsigned long) ka->sa.sa_restorer;
 #endif /* CONFIG_X86_32 */
+                }
         }
 
         if (used_math()) {
@@ -244,12 +240,22 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
                 sp = round_down(sp, 64);
 #endif /* CONFIG_X86_64 */
                 *fpstate = (void __user *)sp;
-
-                if (save_i387_xstate(*fpstate) < 0)
-                        return (void __user *)-1L;
         }
 
-        return (void __user *)align_sigframe(sp - frame_size);
+        sp = align_sigframe(sp - frame_size);
+
+        /*
+         * If we are on the alternate signal stack and would overflow it, don't.
+         * Return an always-bogus address instead so we will die with SIGSEGV.
+         */
+        if (onsigstack && !likely(on_sig_stack(sp)))
+                return (void __user *)-1L;
+
+        /* save i387 state */
+        if (used_math() && save_i387_xstate(*fpstate) < 0)
+                return (void __user *)-1L;
+
+        return (void __user *)sp;
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 249334f5080a..ef7d10170c30 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -114,10 +114,6 @@ EXPORT_PER_CPU_SYMBOL(cpu_info);
 
 atomic_t init_deasserted;
 
-
-/* Set if we find a B stepping CPU */
-static int __cpuinitdata smp_b_stepping;
-
 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
 
 /* which logical CPUs are on which nodes */
@@ -271,8 +267,6 @@ static void __cpuinit smp_callin(void)
         cpumask_set_cpu(cpuid, cpu_callin_mask);
 }
 
-static int __cpuinitdata unsafe_smp;
-
 /*
  * Activate a secondary processor.
  */
@@ -340,76 +334,6 @@ notrace static void __cpuinit start_secondary(void *unused)
         cpu_idle();
 }
 
-static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
-{
-        /*
-         * Mask B, Pentium, but not Pentium MMX
-         */
-        if (c->x86_vendor == X86_VENDOR_INTEL &&
-            c->x86 == 5 &&
-            c->x86_mask >= 1 && c->x86_mask <= 4 &&
-            c->x86_model <= 3)
-                /*
-                 * Remember we have B step Pentia with bugs
-                 */
-                smp_b_stepping = 1;
-
-        /*
-         * Certain Athlons might work (for various values of 'work') in SMP
-         * but they are not certified as MP capable.
-         */
-        if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
-
-                if (num_possible_cpus() == 1)
-                        goto valid_k7;
-
-                /* Athlon 660/661 is valid. */
-                if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
-                    (c->x86_mask == 1)))
-                        goto valid_k7;
-
-                /* Duron 670 is valid */
-                if ((c->x86_model == 7) && (c->x86_mask == 0))
-                        goto valid_k7;
-
-                /*
-                 * Athlon 662, Duron 671, and Athlon >model 7 have capability
-                 * bit. It's worth noting that the A5 stepping (662) of some
-                 * Athlon XP's have the MP bit set.
-                 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
-                 * more.
-                 */
-                if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
-                    ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
-                     (c->x86_model > 7))
-                        if (cpu_has_mp)
-                                goto valid_k7;
-
-                /* If we get here, not a certified SMP capable AMD system. */
-                unsafe_smp = 1;
-        }
-
-valid_k7:
-        ;
-}
-
-static void __cpuinit smp_checks(void)
-{
-        if (smp_b_stepping)
-                printk(KERN_WARNING "WARNING: SMP operation may be unreliable"
-                                    "with B stepping processors.\n");
-
-        /*
-         * Don't taint if we are running SMP kernel on a single non-MP
-         * approved Athlon
-         */
-        if (unsafe_smp && num_online_cpus() > 1) {
-                printk(KERN_INFO "WARNING: This combination of AMD"
-                        "processors is not suitable for SMP.\n");
-                add_taint(TAINT_UNSAFE_SMP);
-        }
-}
-
 /*
  * The bootstrap kernel entry code has set these up. Save them for
  * a given CPU
@@ -423,7 +347,6 @@ void __cpuinit smp_store_cpu_info(int id)
         c->cpu_index = id;
         if (id != 0)
                 identify_secondary_cpu(c);
-        smp_apply_quirks(c);
 }
 
 
@@ -1193,7 +1116,6 @@ void __init native_smp_cpus_done(unsigned int max_cpus)
         pr_debug("Boot done.\n");
 
         impress_friends();
-        smp_checks();
 #ifdef CONFIG_X86_IO_APIC
         setup_ioapic_dest();
 #endif
diff --git a/arch/x86/kernel/time_64.c b/arch/x86/kernel/time_64.c
index 241ec3923f61..5ba343e61844 100644
--- a/arch/x86/kernel/time_64.c
+++ b/arch/x86/kernel/time_64.c
@@ -116,7 +116,6 @@ unsigned long __init calibrate_cpu(void)
 static struct irqaction irq0 = {
         .handler        = timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING | IRQF_TIMER,
-        .mask           = CPU_MASK_NONE,
         .name           = "timer"
 };
 
@@ -125,7 +124,6 @@ void __init hpet_time_init(void)
         if (!hpet_enable())
                 setup_pit_timer();
 
-        irq0.mask = cpumask_of_cpu(0);
         setup_irq(0, &irq0);
 }
 
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index d038b9c45cf8..79c073247284 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -750,7 +750,7 @@ static int __init uv_bau_init(void)
         int node;
         int nblades;
         int last_blade;
-        int cur_cpu = 0;
+        int cur_cpu;
 
         if (!is_uv_system())
                 return 0;
@@ -760,6 +760,7 @@ static int __init uv_bau_init(void)
         uv_mmask = (1UL << uv_hub_info->n_val) - 1;
         nblades = 0;
         last_blade = -1;
+        cur_cpu = 0;
         for_each_online_node(node) {
                 blade = uv_node_to_blade_id(node);
                 if (blade == last_blade)
diff --git a/arch/x86/kernel/topology.c b/arch/x86/kernel/topology.c
index 0fcc95a354f7..7e4515957a1c 100644
--- a/arch/x86/kernel/topology.c
+++ b/arch/x86/kernel/topology.c
@@ -25,10 +25,10 @@
  *
  * Send feedback to <colpatch@us.ibm.com>
  */
-#include <linux/init.h>
-#include <linux/smp.h>
 #include <linux/nodemask.h>
 #include <linux/mmzone.h>
+#include <linux/init.h>
+#include <linux/smp.h>
 #include <asm/cpu.h>
 
 static DEFINE_PER_CPU(struct x86_cpu, cpu_devices);
@@ -47,6 +47,7 @@ int __ref arch_register_cpu(int num)
          */
         if (num)
                 per_cpu(cpu_devices, num).cpu.hotpluggable = 1;
+
         return register_cpu(&per_cpu(cpu_devices, num).cpu, num);
 }
 EXPORT_SYMBOL(arch_register_cpu);
@@ -56,12 +57,13 @@ void arch_unregister_cpu(int num)
         unregister_cpu(&per_cpu(cpu_devices, num).cpu);
 }
 EXPORT_SYMBOL(arch_unregister_cpu);
-#else
+#else /* CONFIG_HOTPLUG_CPU */
+
 static int __init arch_register_cpu(int num)
 {
         return register_cpu(&per_cpu(cpu_devices, num).cpu, num);
 }
-#endif /*CONFIG_HOTPLUG_CPU*/
+#endif /* CONFIG_HOTPLUG_CPU */
 
 static int __init topology_init(void)
 {
@@ -70,11 +72,11 @@ static int __init topology_init(void)
 #ifdef CONFIG_NUMA
         for_each_online_node(i)
                 register_one_node(i);
-#endif /* CONFIG_NUMA */
+#endif
 
         for_each_present_cpu(i)
                 arch_register_cpu(i);
+
         return 0;
 }
-
 subsys_initcall(topology_init);
diff --git a/arch/x86/kernel/uv_time.c b/arch/x86/kernel/uv_time.c
new file mode 100644
index 000000000000..2ffb6c53326e
--- /dev/null
+++ b/arch/x86/kernel/uv_time.c
@@ -0,0 +1,393 @@
+/*
+ * SGI RTC clock/timer routines.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ *  Copyright (c) 2009 Silicon Graphics, Inc.  All Rights Reserved.
+ *  Copyright (c) Dimitri Sivanich
+ */
+#include <linux/clockchips.h>
+
+#include <asm/uv/uv_mmrs.h>
+#include <asm/uv/uv_hub.h>
+#include <asm/uv/bios.h>
+#include <asm/uv/uv.h>
+#include <asm/apic.h>
+#include <asm/cpu.h>
+
+#define RTC_NAME                "sgi_rtc"
+
+static cycle_t uv_read_rtc(void);
+static int uv_rtc_next_event(unsigned long, struct clock_event_device *);
+static void uv_rtc_timer_setup(enum clock_event_mode,
+                                struct clock_event_device *);
+
+static struct clocksource clocksource_uv = {
+        .name           = RTC_NAME,
+        .rating         = 400,
+        .read           = uv_read_rtc,
+        .mask           = (cycle_t)UVH_RTC_REAL_TIME_CLOCK_MASK,
+        .shift          = 10,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static struct clock_event_device clock_event_device_uv = {
+        .name           = RTC_NAME,
+        .features       = CLOCK_EVT_FEAT_ONESHOT,
+        .shift          = 20,
+        .rating         = 400,
+        .irq            = -1,
+        .set_next_event = uv_rtc_next_event,
+        .set_mode       = uv_rtc_timer_setup,
+        .event_handler  = NULL,
+};
+
+static DEFINE_PER_CPU(struct clock_event_device, cpu_ced);
+
+/* There is one of these allocated per node */
+struct uv_rtc_timer_head {
+        spinlock_t      lock;
+        /* next cpu waiting for timer, local node relative: */
+        int             next_cpu;
+        /* number of cpus on this node: */
+        int             ncpus;
+        struct {
+                int     lcpu;           /* systemwide logical cpu number */
+                u64     expires;        /* next timer expiration for this cpu */
+        } cpu[1];
+};
+
+/*
+ * Access to uv_rtc_timer_head via blade id.
+ */
+static struct uv_rtc_timer_head         **blade_info __read_mostly;
+
+static int                              uv_rtc_enable;
+
+/*
+ * Hardware interface routines
+ */
+
+/* Send IPIs to another node */
+static void uv_rtc_send_IPI(int cpu)
+{
+        unsigned long apicid, val;
+        int pnode;
+
+        apicid = cpu_physical_id(cpu);
+        pnode = uv_apicid_to_pnode(apicid);
+        val = (1UL << UVH_IPI_INT_SEND_SHFT) |
+              (apicid << UVH_IPI_INT_APIC_ID_SHFT) |
+              (GENERIC_INTERRUPT_VECTOR << UVH_IPI_INT_VECTOR_SHFT);
+
+        uv_write_global_mmr64(pnode, UVH_IPI_INT, val);
+}
+
+/* Check for an RTC interrupt pending */
+static int uv_intr_pending(int pnode)
+{
+        return uv_read_global_mmr64(pnode, UVH_EVENT_OCCURRED0) &
+                UVH_EVENT_OCCURRED0_RTC1_MASK;
+}
+
+/* Setup interrupt and return non-zero if early expiration occurred. */
+static int uv_setup_intr(int cpu, u64 expires)
+{
+        u64 val;
+        int pnode = uv_cpu_to_pnode(cpu);
+
+        uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG,
+                UVH_RTC1_INT_CONFIG_M_MASK);
+        uv_write_global_mmr64(pnode, UVH_INT_CMPB, -1L);
+
+        uv_write_global_mmr64(pnode, UVH_EVENT_OCCURRED0_ALIAS,
+                UVH_EVENT_OCCURRED0_RTC1_MASK);
+
+        val = (GENERIC_INTERRUPT_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) |
+                ((u64)cpu_physical_id(cpu) << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT);
+
+        /* Set configuration */
+        uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG, val);
+        /* Initialize comparator value */
+        uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires);
+
+        return (expires < uv_read_rtc() && !uv_intr_pending(pnode));
+}
+
+/*
+ * Per-cpu timer tracking routines
+ */
+
+static __init void uv_rtc_deallocate_timers(void)
+{
+        int bid;
+
+        for_each_possible_blade(bid) {
+                kfree(blade_info[bid]);
+        }
+        kfree(blade_info);
+}
+
+/* Allocate per-node list of cpu timer expiration times. */
+static __init int uv_rtc_allocate_timers(void)
+{
+        int cpu;
+
+        blade_info = kmalloc(uv_possible_blades * sizeof(void *), GFP_KERNEL);
+        if (!blade_info)
+                return -ENOMEM;
+        memset(blade_info, 0, uv_possible_blades * sizeof(void *));
+
+        for_each_present_cpu(cpu) {
+                int nid = cpu_to_node(cpu);
+                int bid = uv_cpu_to_blade_id(cpu);
+                int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
+                struct uv_rtc_timer_head *head = blade_info[bid];
+
+                if (!head) {
+                        head = kmalloc_node(sizeof(struct uv_rtc_timer_head) +
+                                (uv_blade_nr_possible_cpus(bid) *
+                                        2 * sizeof(u64)),
+                                GFP_KERNEL, nid);
+                        if (!head) {
+                                uv_rtc_deallocate_timers();
+                                return -ENOMEM;
+                        }
+                        spin_lock_init(&head->lock);
+                        head->ncpus = uv_blade_nr_possible_cpus(bid);
+                        head->next_cpu = -1;
+                        blade_info[bid] = head;
+                }
+
+                head->cpu[bcpu].lcpu = cpu;
+                head->cpu[bcpu].expires = ULLONG_MAX;
+        }
+
+        return 0;
+}
+
+/* Find and set the next expiring timer.  */
+static void uv_rtc_find_next_timer(struct uv_rtc_timer_head *head, int pnode)
+{
+        u64 lowest = ULLONG_MAX;
+        int c, bcpu = -1;
+
+        head->next_cpu = -1;
+        for (c = 0; c < head->ncpus; c++) {
+                u64 exp = head->cpu[c].expires;
+                if (exp < lowest) {
+                        bcpu = c;
+                        lowest = exp;
+                }
+        }
+        if (bcpu >= 0) {
+                head->next_cpu = bcpu;
+                c = head->cpu[bcpu].lcpu;
+                if (uv_setup_intr(c, lowest))
+                        /* If we didn't set it up in time, trigger */
+                        uv_rtc_send_IPI(c);
+        } else {
+                uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG,
+                        UVH_RTC1_INT_CONFIG_M_MASK);
+        }
+}
+
+/*
+ * Set expiration time for current cpu.
+ *
+ * Returns 1 if we missed the expiration time.
+ */
+static int uv_rtc_set_timer(int cpu, u64 expires)
+{
+        int pnode = uv_cpu_to_pnode(cpu);
+        int bid = uv_cpu_to_blade_id(cpu);
+        struct uv_rtc_timer_head *head = blade_info[bid];
+        int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
+        u64 *t = &head->cpu[bcpu].expires;
+        unsigned long flags;
+        int next_cpu;
+
+        spin_lock_irqsave(&head->lock, flags);
+
+        next_cpu = head->next_cpu;
+        *t = expires;
+        /* Will this one be next to go off? */
+        if (next_cpu < 0 || bcpu == next_cpu ||
+                        expires < head->cpu[next_cpu].expires) {
+                head->next_cpu = bcpu;
+                if (uv_setup_intr(cpu, expires)) {
+                        *t = ULLONG_MAX;
+                        uv_rtc_find_next_timer(head, pnode);
+                        spin_unlock_irqrestore(&head->lock, flags);
+                        return 1;
+                }
+        }
+
+        spin_unlock_irqrestore(&head->lock, flags);
+        return 0;
+}
+
+/*
+ * Unset expiration time for current cpu.
+ *
+ * Returns 1 if this timer was pending.
+ */
+static int uv_rtc_unset_timer(int cpu)
+{
+        int pnode = uv_cpu_to_pnode(cpu);
+        int bid = uv_cpu_to_blade_id(cpu);
+        struct uv_rtc_timer_head *head = blade_info[bid];
+        int bcpu = uv_cpu_hub_info(cpu)->blade_processor_id;
+        u64 *t = &head->cpu[bcpu].expires;
+        unsigned long flags;
+        int rc = 0;
+
+        spin_lock_irqsave(&head->lock, flags);
+
+        if (head->next_cpu == bcpu && uv_read_rtc() >= *t)
+                rc = 1;
+
+        *t = ULLONG_MAX;
+
+        /* Was the hardware setup for this timer? */
+        if (head->next_cpu == bcpu)
+                uv_rtc_find_next_timer(head, pnode);
+
+        spin_unlock_irqrestore(&head->lock, flags);
+
+        return rc;
+}
+
+
+/*
+ * Kernel interface routines.
+ */
+
+/*
+ * Read the RTC.
+ */
+static cycle_t uv_read_rtc(void)
+{
+        return (cycle_t)uv_read_local_mmr(UVH_RTC);
+}
+
+/*
+ * Program the next event, relative to now
+ */
+static int uv_rtc_next_event(unsigned long delta,
+                             struct clock_event_device *ced)
+{
+        int ced_cpu = cpumask_first(ced->cpumask);
+
+        return uv_rtc_set_timer(ced_cpu, delta + uv_read_rtc());
+}
+
+/*
+ * Setup the RTC timer in oneshot mode
+ */
+static void uv_rtc_timer_setup(enum clock_event_mode mode,
+                               struct clock_event_device *evt)
+{
+        int ced_cpu = cpumask_first(evt->cpumask);
+
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+        case CLOCK_EVT_MODE_ONESHOT:
+        case CLOCK_EVT_MODE_RESUME:
+                /* Nothing to do here yet */
+                break;
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_SHUTDOWN:
+                uv_rtc_unset_timer(ced_cpu);
+                break;
+        }
+}
+
+static void uv_rtc_interrupt(void)
+{
+        struct clock_event_device *ced = &__get_cpu_var(cpu_ced);
+        int cpu = smp_processor_id();
+
+        if (!ced || !ced->event_handler)
+                return;
+
+        if (uv_rtc_unset_timer(cpu) != 1)
+                return;
+
+        ced->event_handler(ced);
+}
+
+static int __init uv_enable_rtc(char *str)
+{
+        uv_rtc_enable = 1;
+
+        return 1;
+}
+__setup("uvrtc", uv_enable_rtc);
+
+static __init void uv_rtc_register_clockevents(struct work_struct *dummy)
+{
+        struct clock_event_device *ced = &__get_cpu_var(cpu_ced);
+
+        *ced = clock_event_device_uv;
+        ced->cpumask = cpumask_of(smp_processor_id());
+        clockevents_register_device(ced);
+}
+
+static __init int uv_rtc_setup_clock(void)
+{
+        int rc;
+
+        if (!uv_rtc_enable || !is_uv_system() || generic_interrupt_extension)
+                return -ENODEV;
+
+        generic_interrupt_extension = uv_rtc_interrupt;
+
+        clocksource_uv.mult = clocksource_hz2mult(sn_rtc_cycles_per_second,
+                                clocksource_uv.shift);
+
+        rc = clocksource_register(&clocksource_uv);
+        if (rc) {
+                generic_interrupt_extension = NULL;
+                return rc;
+        }
+
+        /* Setup and register clockevents */
+        rc = uv_rtc_allocate_timers();
+        if (rc) {
+                clocksource_unregister(&clocksource_uv);
+                generic_interrupt_extension = NULL;
+                return rc;
+        }
+
+        clock_event_device_uv.mult = div_sc(sn_rtc_cycles_per_second,
+                                NSEC_PER_SEC, clock_event_device_uv.shift);
+
+        clock_event_device_uv.min_delta_ns = NSEC_PER_SEC /
+                                                sn_rtc_cycles_per_second;
+
+        clock_event_device_uv.max_delta_ns = clocksource_uv.mask *
+                                (NSEC_PER_SEC / sn_rtc_cycles_per_second);
+
+        rc = schedule_on_each_cpu(uv_rtc_register_clockevents);
+        if (rc) {
+                clocksource_unregister(&clocksource_uv);
+                generic_interrupt_extension = NULL;
+                uv_rtc_deallocate_timers();
+        }
+
+        return rc;
+}
+arch_initcall(uv_rtc_setup_clock);
diff --git a/arch/x86/kernel/visws_quirks.c b/arch/x86/kernel/visws_quirks.c
index 191a876e9e87..31ffc24eec4d 100644
--- a/arch/x86/kernel/visws_quirks.c
+++ b/arch/x86/kernel/visws_quirks.c
@@ -578,7 +578,7 @@ static struct irq_chip piix4_virtual_irq_type = {
 static irqreturn_t piix4_master_intr(int irq, void *dev_id)
 {
         int realirq;
-        irq_desc_t *desc;
+        struct irq_desc *desc;
         unsigned long flags;
 
         spin_lock_irqsave(&i8259A_lock, flags);
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index 2cc4a90e2cb3..95deb9f2211e 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -395,11 +395,6 @@ static void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval)
         vmi_ops.update_pte(ptep, VMI_PAGE_PT);
 }
 
-static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
-{
-        vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1));
-}
-
 static void vmi_set_pud(pud_t *pudp, pud_t pudval)
 {
         /* Um, eww */
@@ -750,7 +745,6 @@ static inline int __init activate_vmi(void)
                 pv_mmu_ops.set_pmd = vmi_set_pmd;
 #ifdef CONFIG_X86_PAE
                 pv_mmu_ops.set_pte_atomic = vmi_set_pte_atomic;
-                pv_mmu_ops.set_pte_present = vmi_set_pte_present;
                 pv_mmu_ops.set_pud = vmi_set_pud;
                 pv_mmu_ops.pte_clear = vmi_pte_clear;
                 pv_mmu_ops.pmd_clear = vmi_pmd_clear;
diff --git a/arch/x86/kernel/vmiclock_32.c b/arch/x86/kernel/vmiclock_32.c
index 33a788d5879c..d303369a7bad 100644
--- a/arch/x86/kernel/vmiclock_32.c
+++ b/arch/x86/kernel/vmiclock_32.c
@@ -202,7 +202,6 @@ static struct irqaction vmi_clock_action  = {
         .name           = "vmi-timer",
         .handler        = vmi_timer_interrupt,
         .flags          = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
-        .mask           = CPU_MASK_ALL,
 };
 
 static void __devinit vmi_time_init_clockevent(void)
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
index 0d860963f268..62ad500d55f3 100644
--- a/arch/x86/kernel/vmlinux_32.lds.S
+++ b/arch/x86/kernel/vmlinux_32.lds.S
@@ -189,15 +189,24 @@ SECTIONS
         *(.bss)
         . = ALIGN(4);
         __bss_stop = .;
-        _end = . ;
-        /* This is where the kernel creates the early boot page tables */
+  }
+
+  .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
         . = ALIGN(PAGE_SIZE);
-        pg0 = . ;
+        __brk_base = . ;
+        . += 64 * 1024 ;        /* 64k alignment slop space */
+        *(.brk_reservation)     /* areas brk users have reserved */
+        __brk_limit = . ;
+  }
+
+  .end : AT(ADDR(.end) - LOAD_OFFSET) {
+        _end = . ;
   }
 
   /* Sections to be discarded */
   /DISCARD/ : {
         *(.exitcall.exit)
+        *(.discard)
         }
 
   STABS_DEBUG
@@ -205,6 +214,12 @@ SECTIONS
   DWARF_DEBUG
 }
 
+/*
+ * Build-time check on the image size:
+ */
+ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
+        "kernel image bigger than KERNEL_IMAGE_SIZE")
+
 #ifdef CONFIG_KEXEC
 /* Link time checks */
 #include <asm/kexec.h>
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S
index fbfced6f6800..c8742507b030 100644
--- a/arch/x86/kernel/vmlinux_64.lds.S
+++ b/arch/x86/kernel/vmlinux_64.lds.S
@@ -29,8 +29,8 @@ SECTIONS
 {
   . = __START_KERNEL;
   phys_startup_64 = startup_64 - LOAD_OFFSET;
-  _text = .;                    /* Text and read-only data */
   .text :  AT(ADDR(.text) - LOAD_OFFSET) {
+        _text = .;                      /* Text and read-only data */
         /* First the code that has to be first for bootstrapping */
         *(.text.head)
         _stext = .;
@@ -61,13 +61,13 @@ SECTIONS
   .data : AT(ADDR(.data) - LOAD_OFFSET) {
         DATA_DATA
         CONSTRUCTORS
+        _edata = .;                     /* End of data section */
         } :data
 
-  _edata = .;                   /* End of data section */
 
-  . = ALIGN(PAGE_SIZE);
-  . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
   .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) {
+        . = ALIGN(PAGE_SIZE);
+        . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
         *(.data.cacheline_aligned)
   }
   . = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES);
@@ -125,29 +125,29 @@ SECTIONS
 #undef VVIRT_OFFSET
 #undef VVIRT
 
-  . = ALIGN(THREAD_SIZE);       /* init_task */
   .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
+        . = ALIGN(THREAD_SIZE); /* init_task */
         *(.data.init_task)
   }:data.init
 
-  . = ALIGN(PAGE_SIZE);
   .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) {
+        . = ALIGN(PAGE_SIZE);
         *(.data.page_aligned)
   }
 
-  /* might get freed after init */
-  . = ALIGN(PAGE_SIZE);
-  __smp_alt_begin = .;
-  __smp_locks = .;
   .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
+        /* might get freed after init */
+        . = ALIGN(PAGE_SIZE);
+        __smp_alt_begin = .;
+        __smp_locks = .;
         *(.smp_locks)
+        __smp_locks_end = .;
+        . = ALIGN(PAGE_SIZE);
+        __smp_alt_end = .;
   }
-  __smp_locks_end = .;
-  . = ALIGN(PAGE_SIZE);
-  __smp_alt_end = .;
 
   . = ALIGN(PAGE_SIZE);         /* Init code and data */
-  __init_begin = .;
+  __init_begin = .;     /* paired with __init_end */
   .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
         _sinittext = .;
         INIT_TEXT
@@ -159,40 +159,42 @@ SECTIONS
         __initdata_end = .;
    }
 
-  . = ALIGN(16);
-  __setup_start = .;
-  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) { *(.init.setup) }
-  __setup_end = .;
-  __initcall_start = .;
+  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
+        . = ALIGN(16);
+        __setup_start = .;
+        *(.init.setup)
+        __setup_end = .;
+  }
   .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
+        __initcall_start = .;
         INITCALLS
+        __initcall_end = .;
   }
-  __initcall_end = .;
-  __con_initcall_start = .;
   .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
+        __con_initcall_start = .;
         *(.con_initcall.init)
+        __con_initcall_end = .;
   }
-  __con_initcall_end = .;
-  __x86_cpu_dev_start = .;
   .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
+        __x86_cpu_dev_start = .;
         *(.x86_cpu_dev.init)
+        __x86_cpu_dev_end = .;
   }
-  __x86_cpu_dev_end = .;
   SECURITY_INIT
 
   . = ALIGN(8);
   .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
-  __parainstructions = .;
+        __parainstructions = .;
        *(.parainstructions)
-  __parainstructions_end = .;
+        __parainstructions_end = .;
   }
 
-  . = ALIGN(8);
-  __alt_instructions = .;
   .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
+        . = ALIGN(8);
+        __alt_instructions = .;
         *(.altinstructions)
+        __alt_instructions_end = .;
   }
-  __alt_instructions_end = .;
   .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
         *(.altinstr_replacement)
   }
@@ -207,9 +209,11 @@ SECTIONS
 
 #ifdef CONFIG_BLK_DEV_INITRD
   . = ALIGN(PAGE_SIZE);
-  __initramfs_start = .;
-  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { *(.init.ramfs) }
-  __initramfs_end = .;
+  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
+        __initramfs_start = .;
+        *(.init.ramfs)
+        __initramfs_end = .;
+  }
 #endif
 
 #ifdef CONFIG_SMP
@@ -229,20 +233,29 @@ SECTIONS
   . = ALIGN(PAGE_SIZE);
   __init_end = .;
 
-  . = ALIGN(PAGE_SIZE);
-  __nosave_begin = .;
   .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
-      *(.data.nosave)
+        . = ALIGN(PAGE_SIZE);
+        __nosave_begin = .;
+        *(.data.nosave)
+        . = ALIGN(PAGE_SIZE);
+        __nosave_end = .;
   } :data.init2 /* use another section data.init2, see PERCPU_VADDR() above */
-  . = ALIGN(PAGE_SIZE);
-  __nosave_end = .;
 
-  __bss_start = .;              /* BSS */
   .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
+        . = ALIGN(PAGE_SIZE);
+        __bss_start = .;                /* BSS */
         *(.bss.page_aligned)
         *(.bss)
-        }
-  __bss_stop = .;
+        __bss_stop = .;
+  }
+
+  .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
+        . = ALIGN(PAGE_SIZE);
+        __brk_base = . ;
+        . += 64 * 1024 ;        /* 64k alignment slop space */
+        *(.brk_reservation)     /* areas brk users have reserved */
+        __brk_limit = . ;
+  }
 
   _end = . ;
 
@@ -250,6 +263,7 @@ SECTIONS
   /DISCARD/ : {
         *(.exitcall.exit)
         *(.eh_frame)
+        *(.discard)
         }
 
   STABS_DEBUG
@@ -275,3 +289,10 @@ ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
 ASSERT((per_cpu__irq_stack_union == 0),
         "irq_stack_union is not at start of per-cpu area");
 #endif
+
+#ifdef CONFIG_KEXEC
+#include <asm/kexec.h>
+
+ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
+       "kexec control code size is too big")
+#endif
diff --git a/arch/x86/kernel/vsmp_64.c b/arch/x86/kernel/vsmp_64.c
index 74de562812cc..a1d804bcd483 100644
--- a/arch/x86/kernel/vsmp_64.c
+++ b/arch/x86/kernel/vsmp_64.c
@@ -22,7 +22,7 @@
 #include <asm/paravirt.h>
 #include <asm/setup.h>
 
-#ifdef CONFIG_PARAVIRT
+#if defined CONFIG_PCI && defined CONFIG_PARAVIRT
 /*
  * Interrupt control on vSMPowered systems:
  * ~AC is a shadow of IF.  If IF is 'on' AC should be 'off'
@@ -114,6 +114,7 @@ static void __init set_vsmp_pv_ops(void)
 }
 #endif
 
+#ifdef CONFIG_PCI
 static int is_vsmp = -1;
 
 static void __init detect_vsmp_box(void)
@@ -139,6 +140,15 @@ int is_vsmp_box(void)
         }
 }
 
+#else
+static void __init detect_vsmp_box(void)
+{
+}
+int is_vsmp_box(void)
+{
+        return 0;
+}
+#endif
 void __init vsmp_init(void)
 {
         detect_vsmp_box();
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 9fe4ddaa8f6f..e94a11e42f98 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -107,7 +107,7 @@ static void async_hcall(unsigned long call, unsigned long arg1,
         local_irq_save(flags);
         if (lguest_data.hcall_status[next_call] != 0xFF) {
                 /* Table full, so do normal hcall which will flush table. */
-                hcall(call, arg1, arg2, arg3);
+                kvm_hypercall3(call, arg1, arg2, arg3);
         } else {
                 lguest_data.hcalls[next_call].arg0 = call;
                 lguest_data.hcalls[next_call].arg1 = arg1;
@@ -134,13 +134,32 @@ static void async_hcall(unsigned long call, unsigned long arg1,
  *
  * So, when we're in lazy mode, we call async_hcall() to store the call for
  * future processing: */
-static void lazy_hcall(unsigned long call,
+static void lazy_hcall1(unsigned long call,
+                       unsigned long arg1)
+{
+        if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
+                kvm_hypercall1(call, arg1);
+        else
+                async_hcall(call, arg1, 0, 0);
+}
+
+static void lazy_hcall2(unsigned long call,
+                       unsigned long arg1,
+                       unsigned long arg2)
+{
+        if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
+                kvm_hypercall2(call, arg1, arg2);
+        else
+                async_hcall(call, arg1, arg2, 0);
+}
+
+static void lazy_hcall3(unsigned long call,
                        unsigned long arg1,
                        unsigned long arg2,
                        unsigned long arg3)
 {
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
-                hcall(call, arg1, arg2, arg3);
+                kvm_hypercall3(call, arg1, arg2, arg3);
         else
                 async_hcall(call, arg1, arg2, arg3);
 }
@@ -150,7 +169,7 @@ static void lazy_hcall(unsigned long call,
 static void lguest_leave_lazy_mode(void)
 {
         paravirt_leave_lazy(paravirt_get_lazy_mode());
-        hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0);
+        kvm_hypercall0(LHCALL_FLUSH_ASYNC);
 }
 
 /*G:033
@@ -229,7 +248,7 @@ static void lguest_write_idt_entry(gate_desc *dt,
         /* Keep the local copy up to date. */
         native_write_idt_entry(dt, entrynum, g);
         /* Tell Host about this new entry. */
-        hcall(LHCALL_LOAD_IDT_ENTRY, entrynum, desc[0], desc[1]);
+        kvm_hypercall3(LHCALL_LOAD_IDT_ENTRY, entrynum, desc[0], desc[1]);
 }
 
 /* Changing to a different IDT is very rare: we keep the IDT up-to-date every
@@ -241,7 +260,7 @@ static void lguest_load_idt(const struct desc_ptr *desc)
         struct desc_struct *idt = (void *)desc->address;
 
         for (i = 0; i < (desc->size+1)/8; i++)
-                hcall(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b);
+                kvm_hypercall3(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b);
 }
 
 /*
@@ -261,8 +280,8 @@ static void lguest_load_idt(const struct desc_ptr *desc)
  */
 static void lguest_load_gdt(const struct desc_ptr *desc)
 {
-        BUG_ON((desc->size+1)/8 != GDT_ENTRIES);
-        hcall(LHCALL_LOAD_GDT, __pa(desc->address), GDT_ENTRIES, 0);
+        BUG_ON((desc->size + 1) / 8 != GDT_ENTRIES);
+        kvm_hypercall2(LHCALL_LOAD_GDT, __pa(desc->address), GDT_ENTRIES);
 }
 
 /* For a single GDT entry which changes, we do the lazy thing: alter our GDT,
@@ -272,7 +291,7 @@ static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum,
                                    const void *desc, int type)
 {
         native_write_gdt_entry(dt, entrynum, desc, type);
-        hcall(LHCALL_LOAD_GDT, __pa(dt), GDT_ENTRIES, 0);
+        kvm_hypercall2(LHCALL_LOAD_GDT, __pa(dt), GDT_ENTRIES);
 }
 
 /* OK, I lied.  There are three "thread local storage" GDT entries which change
@@ -284,7 +303,7 @@ static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
          * can't handle us removing entries we're currently using.  So we clear
          * the GS register here: if it's needed it'll be reloaded anyway. */
         lazy_load_gs(0);
-        lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0);
+        lazy_hcall2(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu);
 }
 
 /*G:038 That's enough excitement for now, back to ploughing through each of
@@ -382,7 +401,7 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
 static unsigned long current_cr0;
 static void lguest_write_cr0(unsigned long val)
 {
-        lazy_hcall(LHCALL_TS, val & X86_CR0_TS, 0, 0);
+        lazy_hcall1(LHCALL_TS, val & X86_CR0_TS);
         current_cr0 = val;
 }
 
@@ -396,7 +415,7 @@ static unsigned long lguest_read_cr0(void)
  * the vowels have been optimized out. */
 static void lguest_clts(void)
 {
-        lazy_hcall(LHCALL_TS, 0, 0, 0);
+        lazy_hcall1(LHCALL_TS, 0);
         current_cr0 &= ~X86_CR0_TS;
 }
 
@@ -418,7 +437,7 @@ static bool cr3_changed = false;
 static void lguest_write_cr3(unsigned long cr3)
 {
         lguest_data.pgdir = cr3;
-        lazy_hcall(LHCALL_NEW_PGTABLE, cr3, 0, 0);
+        lazy_hcall1(LHCALL_NEW_PGTABLE, cr3);
         cr3_changed = true;
 }
 
@@ -490,11 +509,17 @@ static void lguest_write_cr4(unsigned long val)
  * into a process' address space.  We set the entry then tell the Host the
  * toplevel and address this corresponds to.  The Guest uses one pagetable per
  * process, so we need to tell the Host which one we're changing (mm->pgd). */
+static void lguest_pte_update(struct mm_struct *mm, unsigned long addr,
+                               pte_t *ptep)
+{
+        lazy_hcall3(LHCALL_SET_PTE, __pa(mm->pgd), addr, ptep->pte_low);
+}
+
 static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
                               pte_t *ptep, pte_t pteval)
 {
         *ptep = pteval;
-        lazy_hcall(LHCALL_SET_PTE, __pa(mm->pgd), addr, pteval.pte_low);
+        lguest_pte_update(mm, addr, ptep);
 }
 
 /* The Guest calls this to set a top-level entry.  Again, we set the entry then
@@ -503,8 +528,8 @@ static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
 static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
 {
         *pmdp = pmdval;
-        lazy_hcall(LHCALL_SET_PMD, __pa(pmdp)&PAGE_MASK,
-                   (__pa(pmdp)&(PAGE_SIZE-1))/4, 0);
+        lazy_hcall2(LHCALL_SET_PMD, __pa(pmdp) & PAGE_MASK,
+                   (__pa(pmdp) & (PAGE_SIZE - 1)) / 4);
 }
 
 /* There are a couple of legacy places where the kernel sets a PTE, but we
@@ -520,7 +545,7 @@ static void lguest_set_pte(pte_t *ptep, pte_t pteval)
 {
         *ptep = pteval;
         if (cr3_changed)
-                lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
+                lazy_hcall1(LHCALL_FLUSH_TLB, 1);
 }
 
 /* Unfortunately for Lguest, the pv_mmu_ops for page tables were based on
@@ -536,7 +561,7 @@ static void lguest_set_pte(pte_t *ptep, pte_t pteval)
 static void lguest_flush_tlb_single(unsigned long addr)
 {
         /* Simply set it to zero: if it was not, it will fault back in. */
-        lazy_hcall(LHCALL_SET_PTE, lguest_data.pgdir, addr, 0);
+        lazy_hcall3(LHCALL_SET_PTE, lguest_data.pgdir, addr, 0);
 }
 
 /* This is what happens after the Guest has removed a large number of entries.
@@ -544,7 +569,7 @@ static void lguest_flush_tlb_single(unsigned long addr)
  * have changed, ie. virtual addresses below PAGE_OFFSET. */
 static void lguest_flush_tlb_user(void)
 {
-        lazy_hcall(LHCALL_FLUSH_TLB, 0, 0, 0);
+        lazy_hcall1(LHCALL_FLUSH_TLB, 0);
 }
 
 /* This is called when the kernel page tables have changed.  That's not very
@@ -552,7 +577,7 @@ static void lguest_flush_tlb_user(void)
  * slow), so it's worth separating this from the user flushing above. */
 static void lguest_flush_tlb_kernel(void)
 {
-        lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
+        lazy_hcall1(LHCALL_FLUSH_TLB, 1);
 }
 
 /*
@@ -689,7 +714,7 @@ static int lguest_clockevent_set_next_event(unsigned long delta,
         }
 
         /* Please wake us this far in the future. */
-        hcall(LHCALL_SET_CLOCKEVENT, delta, 0, 0);
+        kvm_hypercall1(LHCALL_SET_CLOCKEVENT, delta);
         return 0;
 }
 
@@ -700,7 +725,7 @@ static void lguest_clockevent_set_mode(enum clock_event_mode mode,
         case CLOCK_EVT_MODE_UNUSED:
         case CLOCK_EVT_MODE_SHUTDOWN:
                 /* A 0 argument shuts the clock down. */
-                hcall(LHCALL_SET_CLOCKEVENT, 0, 0, 0);
+                kvm_hypercall0(LHCALL_SET_CLOCKEVENT);
                 break;
         case CLOCK_EVT_MODE_ONESHOT:
                 /* This is what we expect. */
@@ -775,8 +800,8 @@ static void lguest_time_init(void)
 static void lguest_load_sp0(struct tss_struct *tss,
                             struct thread_struct *thread)
 {
-        lazy_hcall(LHCALL_SET_STACK, __KERNEL_DS|0x1, thread->sp0,
-                   THREAD_SIZE/PAGE_SIZE);
+        lazy_hcall3(LHCALL_SET_STACK, __KERNEL_DS | 0x1, thread->sp0,
+                   THREAD_SIZE / PAGE_SIZE);
 }
 
 /* Let's just say, I wouldn't do debugging under a Guest. */
@@ -849,7 +874,7 @@ static void set_lguest_basic_apic_ops(void)
 /* STOP!  Until an interrupt comes in. */
 static void lguest_safe_halt(void)
 {
-        hcall(LHCALL_HALT, 0, 0, 0);
+        kvm_hypercall0(LHCALL_HALT);
 }
 
 /* The SHUTDOWN hypercall takes a string to describe what's happening, and
@@ -859,7 +884,8 @@ static void lguest_safe_halt(void)
  * rather than virtual addresses, so we use __pa() here. */
 static void lguest_power_off(void)
 {
-        hcall(LHCALL_SHUTDOWN, __pa("Power down"), LGUEST_SHUTDOWN_POWEROFF, 0);
+        kvm_hypercall2(LHCALL_SHUTDOWN, __pa("Power down"),
+                                        LGUEST_SHUTDOWN_POWEROFF);
 }
 
 /*
@@ -869,7 +895,7 @@ static void lguest_power_off(void)
  */
 static int lguest_panic(struct notifier_block *nb, unsigned long l, void *p)
 {
-        hcall(LHCALL_SHUTDOWN, __pa(p), LGUEST_SHUTDOWN_POWEROFF, 0);
+        kvm_hypercall2(LHCALL_SHUTDOWN, __pa(p), LGUEST_SHUTDOWN_POWEROFF);
         /* The hcall won't return, but to keep gcc happy, we're "done". */
         return NOTIFY_DONE;
 }
@@ -910,7 +936,7 @@ static __init int early_put_chars(u32 vtermno, const char *buf, int count)
                 len = sizeof(scratch) - 1;
         scratch[len] = '\0';
         memcpy(scratch, buf, len);
-        hcall(LHCALL_NOTIFY, __pa(scratch), 0, 0);
+        kvm_hypercall1(LHCALL_NOTIFY, __pa(scratch));
 
         /* This routine returns the number of bytes actually written. */
         return len;
@@ -920,7 +946,7 @@ static __init int early_put_chars(u32 vtermno, const char *buf, int count)
  * Launcher to reboot us. */
 static void lguest_restart(char *reason)
 {
-        hcall(LHCALL_SHUTDOWN, __pa(reason), LGUEST_SHUTDOWN_RESTART, 0);
+        kvm_hypercall2(LHCALL_SHUTDOWN, __pa(reason), LGUEST_SHUTDOWN_RESTART);
 }
 
 /*G:050
@@ -1040,6 +1066,8 @@ __init void lguest_init(void)
         pv_mmu_ops.read_cr3 = lguest_read_cr3;
         pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
         pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mode;
+        pv_mmu_ops.pte_update = lguest_pte_update;
+        pv_mmu_ops.pte_update_defer = lguest_pte_update;
 
 #ifdef CONFIG_X86_LOCAL_APIC
         /* apic read/write intercepts */
@@ -1058,14 +1086,6 @@ __init void lguest_init(void)
          * lguest_init() where the rest of the fairly chaotic boot setup
          * occurs. */
 
-        /* The native boot code sets up initial page tables immediately after
-         * the kernel itself, and sets init_pg_tables_end so they're not
-         * clobbered.  The Launcher places our initial pagetables somewhere at
-         * the top of our physical memory, so we don't need extra space: set
-         * init_pg_tables_end to the end of the kernel. */
-        init_pg_tables_start = __pa(pg0);
-        init_pg_tables_end = __pa(pg0);
-
         /* As described in head_32.S, we map the first 128M of memory. */
         max_pfn_mapped = (128*1024*1024) >> PAGE_SHIFT;
 
diff --git a/arch/x86/lguest/i386_head.S b/arch/x86/lguest/i386_head.S
index 10b9bd35a8ff..f79541989471 100644
--- a/arch/x86/lguest/i386_head.S
+++ b/arch/x86/lguest/i386_head.S
@@ -27,8 +27,8 @@ ENTRY(lguest_entry)
         /* We make the "initialization" hypercall now to tell the Host about
          * us, and also find out where it put our page tables. */
         movl $LHCALL_LGUEST_INIT, %eax
-        movl $lguest_data - __PAGE_OFFSET, %edx
-        int $LGUEST_TRAP_ENTRY
+        movl $lguest_data - __PAGE_OFFSET, %ebx
+        .byte 0x0f,0x01,0xc1 /* KVM_HYPERCALL */
 
         /* Set up the initial stack so we can run C code. */
         movl $(init_thread_union+THREAD_SIZE),%esp
diff --git a/arch/x86/lib/memcpy_64.S b/arch/x86/lib/memcpy_64.S
index c22981fa2f3a..ad5441ed1b57 100644
--- a/arch/x86/lib/memcpy_64.S
+++ b/arch/x86/lib/memcpy_64.S
@@ -1,30 +1,38 @@
 /* Copyright 2002 Andi Kleen */
 
 #include <linux/linkage.h>
-#include <asm/dwarf2.h>
+
 #include <asm/cpufeature.h>
+#include <asm/dwarf2.h>
 
 /*
  * memcpy - Copy a memory block.
  *
- * Input:       
- * rdi destination
- * rsi source
- * rdx count
- * 
+ * Input:
+ *  rdi destination
+ *  rsi source
+ *  rdx count
+ *
  * Output:
  * rax original destination
- */     
+ */
 
+/*
+ * memcpy_c() - fast string ops (REP MOVSQ) based variant.
+ *
+ * Calls to this get patched into the kernel image via the
+ * alternative instructions framework:
+ */
         ALIGN
 memcpy_c:
         CFI_STARTPROC
-        movq %rdi,%rax
-        movl %edx,%ecx
-        shrl $3,%ecx
-        andl $7,%edx
+        movq %rdi, %rax
+
+        movl %edx, %ecx
+        shrl $3, %ecx
+        andl $7, %edx
         rep movsq
-        movl %edx,%ecx
+        movl %edx, %ecx
         rep movsb
         ret
         CFI_ENDPROC
@@ -33,99 +41,110 @@ ENDPROC(memcpy_c)
 ENTRY(__memcpy)
 ENTRY(memcpy)
         CFI_STARTPROC
-        pushq %rbx
-        CFI_ADJUST_CFA_OFFSET 8
-        CFI_REL_OFFSET rbx, 0
-        movq %rdi,%rax
 
-        movl %edx,%ecx
-        shrl $6,%ecx
+        /*
+         * Put the number of full 64-byte blocks into %ecx.
+         * Tail portion is handled at the end:
+         */
+        movq %rdi, %rax
+        movl %edx, %ecx
+        shrl   $6, %ecx
         jz .Lhandle_tail
 
         .p2align 4
 .Lloop_64:
+        /*
+         * We decrement the loop index here - and the zero-flag is
+         * checked at the end of the loop (instructions inbetween do
+         * not change the zero flag):
+         */
         decl %ecx
 
-        movq (%rsi),%r11
-        movq 8(%rsi),%r8
+        /*
+         * Move in blocks of 4x16 bytes:
+         */
+        movq 0*8(%rsi),         %r11
+        movq 1*8(%rsi),         %r8
+        movq %r11,              0*8(%rdi)
+        movq %r8,               1*8(%rdi)
 
-        movq %r11,(%rdi)
-        movq %r8,1*8(%rdi)
+        movq 2*8(%rsi),         %r9
+        movq 3*8(%rsi),         %r10
+        movq %r9,               2*8(%rdi)
+        movq %r10,              3*8(%rdi)
 
-        movq 2*8(%rsi),%r9
-        movq 3*8(%rsi),%r10
+        movq 4*8(%rsi),         %r11
+        movq 5*8(%rsi),         %r8
+        movq %r11,              4*8(%rdi)
+        movq %r8,               5*8(%rdi)
 
-        movq %r9,2*8(%rdi)
-        movq %r10,3*8(%rdi)
+        movq 6*8(%rsi),         %r9
+        movq 7*8(%rsi),         %r10
+        movq %r9,               6*8(%rdi)
+        movq %r10,              7*8(%rdi)
 
-        movq 4*8(%rsi),%r11
-        movq 5*8(%rsi),%r8
+        leaq 64(%rsi), %rsi
+        leaq 64(%rdi), %rdi
 
-        movq %r11,4*8(%rdi)
-        movq %r8,5*8(%rdi)
-
-        movq 6*8(%rsi),%r9
-        movq 7*8(%rsi),%r10
-
-        movq %r9,6*8(%rdi)
-        movq %r10,7*8(%rdi)
-
-        leaq 64(%rsi),%rsi
-        leaq 64(%rdi),%rdi
         jnz  .Lloop_64
 
 .Lhandle_tail:
-        movl %edx,%ecx
-        andl $63,%ecx
-        shrl $3,%ecx
+        movl %edx, %ecx
+        andl  $63, %ecx
+        shrl   $3, %ecx
         jz   .Lhandle_7
+
         .p2align 4
 .Lloop_8:
         decl %ecx
-        movq (%rsi),%r8
-        movq %r8,(%rdi)
-        leaq 8(%rdi),%rdi
-        leaq 8(%rsi),%rsi
+        movq (%rsi),            %r8
+        movq %r8,               (%rdi)
+        leaq 8(%rdi),           %rdi
+        leaq 8(%rsi),           %rsi
         jnz  .Lloop_8
 
 .Lhandle_7:
-        movl %edx,%ecx
-        andl $7,%ecx
-        jz .Lende
+        movl %edx, %ecx
+        andl $7, %ecx
+        jz .Lend
+
         .p2align 4
 .Lloop_1:
-        movb (%rsi),%r8b
-        movb %r8b,(%rdi)
+        movb (%rsi), %r8b
+        movb %r8b, (%rdi)
         incq %rdi
         incq %rsi
         decl %ecx
         jnz .Lloop_1
 
-.Lende:
-        popq %rbx
-        CFI_ADJUST_CFA_OFFSET -8
-        CFI_RESTORE rbx
+.Lend:
         ret
-.Lfinal:
         CFI_ENDPROC
 ENDPROC(memcpy)
 ENDPROC(__memcpy)
 
-        /* Some CPUs run faster using the string copy instructions.
-           It is also a lot simpler. Use this when possible */
+        /*
+         * Some CPUs run faster using the string copy instructions.
+         * It is also a lot simpler. Use this when possible:
+         */
 
-        .section .altinstr_replacement,"ax"
+        .section .altinstr_replacement, "ax"
 1:      .byte 0xeb                              /* jmp <disp8> */
         .byte (memcpy_c - memcpy) - (2f - 1b)   /* offset */
 2:
         .previous
-        .section .altinstructions,"a"
+
+        .section .altinstructions, "a"
         .align 8
         .quad memcpy
         .quad 1b
         .byte X86_FEATURE_REP_GOOD
-        /* Replace only beginning, memcpy is used to apply alternatives, so it
-         * is silly to overwrite itself with nops - reboot is only outcome... */
+
+        /*
+         * Replace only beginning, memcpy is used to apply alternatives,
+         * so it is silly to overwrite itself with nops - reboot is the
+         * only outcome...
+         */
         .byte 2b - 1b
         .byte 2b - 1b
         .previous
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index 00f127c80b0e..522db5e3d0bf 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -121,22 +121,13 @@ void kunmap_atomic(void *kvaddr, enum km_type type)
         pagefault_enable();
 }
 
-/* This is the same as kmap_atomic() but can map memory that doesn't
+/*
+ * This is the same as kmap_atomic() but can map memory that doesn't
  * have a struct page associated with it.
  */
 void *kmap_atomic_pfn(unsigned long pfn, enum km_type type)
 {
-        enum fixed_addresses idx;
-        unsigned long vaddr;
-
-        pagefault_disable();
-
-        idx = type + KM_TYPE_NR*smp_processor_id();
-        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
-        set_pte(kmap_pte-idx, pfn_pte(pfn, kmap_prot));
-        arch_flush_lazy_mmu_mode();
-
-        return (void*) vaddr;
+        return kmap_atomic_prot_pfn(pfn, type, kmap_prot);
 }
 EXPORT_SYMBOL_GPL(kmap_atomic_pfn); /* temporarily in use by i915 GEM until vmap */
 
@@ -158,7 +149,6 @@ EXPORT_SYMBOL(kunmap);
 EXPORT_SYMBOL(kmap_atomic);
 EXPORT_SYMBOL(kunmap_atomic);
 
-#ifdef CONFIG_NUMA
 void __init set_highmem_pages_init(void)
 {
         struct zone *zone;
@@ -182,11 +172,3 @@ void __init set_highmem_pages_init(void)
         }
         totalram_pages += totalhigh_pages;
 }
-#else
-void __init set_highmem_pages_init(void)
-{
-        add_highpages_with_active_regions(0, highstart_pfn, highend_pfn);
-
-        totalram_pages += totalhigh_pages;
-}
-#endif /* CONFIG_NUMA */
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index ce6a722587d8..fd3da1dda1c9 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -1,8 +1,345 @@
+#include <linux/ioport.h>
 #include <linux/swap.h>
+
 #include <asm/cacheflush.h>
+#include <asm/e820.h>
+#include <asm/init.h>
 #include <asm/page.h>
+#include <asm/page_types.h>
 #include <asm/sections.h>
 #include <asm/system.h>
+#include <asm/tlbflush.h>
+
+unsigned long __initdata e820_table_start;
+unsigned long __meminitdata e820_table_end;
+unsigned long __meminitdata e820_table_top;
+
+int after_bootmem;
+
+int direct_gbpages
+#ifdef CONFIG_DIRECT_GBPAGES
+                                = 1
+#endif
+;
+
+static void __init find_early_table_space(unsigned long end, int use_pse,
+                                          int use_gbpages)
+{
+        unsigned long puds, pmds, ptes, tables, start;
+
+        puds = (end + PUD_SIZE - 1) >> PUD_SHIFT;
+        tables = roundup(puds * sizeof(pud_t), PAGE_SIZE);
+
+        if (use_gbpages) {
+                unsigned long extra;
+
+                extra = end - ((end>>PUD_SHIFT) << PUD_SHIFT);
+                pmds = (extra + PMD_SIZE - 1) >> PMD_SHIFT;
+        } else
+                pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT;
+
+        tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE);
+
+        if (use_pse) {
+                unsigned long extra;
+
+                extra = end - ((end>>PMD_SHIFT) << PMD_SHIFT);
+#ifdef CONFIG_X86_32
+                extra += PMD_SIZE;
+#endif
+                ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT;
+        } else
+                ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
+
+        tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE);
+
+#ifdef CONFIG_X86_32
+        /* for fixmap */
+        tables += roundup(__end_of_fixed_addresses * sizeof(pte_t), PAGE_SIZE);
+#endif
+
+        /*
+         * RED-PEN putting page tables only on node 0 could
+         * cause a hotspot and fill up ZONE_DMA. The page tables
+         * need roughly 0.5KB per GB.
+         */
+#ifdef CONFIG_X86_32
+        start = 0x7000;
+        e820_table_start = find_e820_area(start, max_pfn_mapped<<PAGE_SHIFT,
+                                        tables, PAGE_SIZE);
+#else /* CONFIG_X86_64 */
+        start = 0x8000;
+        e820_table_start = find_e820_area(start, end, tables, PAGE_SIZE);
+#endif
+        if (e820_table_start == -1UL)
+                panic("Cannot find space for the kernel page tables");
+
+        e820_table_start >>= PAGE_SHIFT;
+        e820_table_end = e820_table_start;
+        e820_table_top = e820_table_start + (tables >> PAGE_SHIFT);
+
+        printk(KERN_DEBUG "kernel direct mapping tables up to %lx @ %lx-%lx\n",
+                end, e820_table_start << PAGE_SHIFT, e820_table_top << PAGE_SHIFT);
+}
+
+struct map_range {
+        unsigned long start;
+        unsigned long end;
+        unsigned page_size_mask;
+};
+
+#ifdef CONFIG_X86_32
+#define NR_RANGE_MR 3
+#else /* CONFIG_X86_64 */
+#define NR_RANGE_MR 5
+#endif
+
+static int __meminit save_mr(struct map_range *mr, int nr_range,
+                             unsigned long start_pfn, unsigned long end_pfn,
+                             unsigned long page_size_mask)
+{
+        if (start_pfn < end_pfn) {
+                if (nr_range >= NR_RANGE_MR)
+                        panic("run out of range for init_memory_mapping\n");
+                mr[nr_range].start = start_pfn<<PAGE_SHIFT;
+                mr[nr_range].end   = end_pfn<<PAGE_SHIFT;
+                mr[nr_range].page_size_mask = page_size_mask;
+                nr_range++;
+        }
+
+        return nr_range;
+}
+
+#ifdef CONFIG_X86_64
+static void __init init_gbpages(void)
+{
+        if (direct_gbpages && cpu_has_gbpages)
+                printk(KERN_INFO "Using GB pages for direct mapping\n");
+        else
+                direct_gbpages = 0;
+}
+#else
+static inline void init_gbpages(void)
+{
+}
+#endif
+
+/*
+ * Setup the direct mapping of the physical memory at PAGE_OFFSET.
+ * This runs before bootmem is initialized and gets pages directly from
+ * the physical memory. To access them they are temporarily mapped.
+ */
+unsigned long __init_refok init_memory_mapping(unsigned long start,
+                                               unsigned long end)
+{
+        unsigned long page_size_mask = 0;
+        unsigned long start_pfn, end_pfn;
+        unsigned long ret = 0;
+        unsigned long pos;
+
+        struct map_range mr[NR_RANGE_MR];
+        int nr_range, i;
+        int use_pse, use_gbpages;
+
+        printk(KERN_INFO "init_memory_mapping: %016lx-%016lx\n", start, end);
+
+        if (!after_bootmem)
+                init_gbpages();
+
+#ifdef CONFIG_DEBUG_PAGEALLOC
+        /*
+         * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
+         * This will simplify cpa(), which otherwise needs to support splitting
+         * large pages into small in interrupt context, etc.
+         */
+        use_pse = use_gbpages = 0;
+#else
+        use_pse = cpu_has_pse;
+        use_gbpages = direct_gbpages;
+#endif
+
+#ifdef CONFIG_X86_32
+#ifdef CONFIG_X86_PAE
+        set_nx();
+        if (nx_enabled)
+                printk(KERN_INFO "NX (Execute Disable) protection: active\n");
+#endif
+
+        /* Enable PSE if available */
+        if (cpu_has_pse)
+                set_in_cr4(X86_CR4_PSE);
+
+        /* Enable PGE if available */
+        if (cpu_has_pge) {
+                set_in_cr4(X86_CR4_PGE);
+                __supported_pte_mask |= _PAGE_GLOBAL;
+        }
+#endif
+
+        if (use_gbpages)
+                page_size_mask |= 1 << PG_LEVEL_1G;
+        if (use_pse)
+                page_size_mask |= 1 << PG_LEVEL_2M;
+
+        memset(mr, 0, sizeof(mr));
+        nr_range = 0;
+
+        /* head if not big page alignment ? */
+        start_pfn = start >> PAGE_SHIFT;
+        pos = start_pfn << PAGE_SHIFT;
+#ifdef CONFIG_X86_32
+        /*
+         * Don't use a large page for the first 2/4MB of memory
+         * because there are often fixed size MTRRs in there
+         * and overlapping MTRRs into large pages can cause
+         * slowdowns.
+         */
+        if (pos == 0)
+                end_pfn = 1<<(PMD_SHIFT - PAGE_SHIFT);
+        else
+                end_pfn = ((pos + (PMD_SIZE - 1))>>PMD_SHIFT)
+                                 << (PMD_SHIFT - PAGE_SHIFT);
+#else /* CONFIG_X86_64 */
+        end_pfn = ((pos + (PMD_SIZE - 1)) >> PMD_SHIFT)
+                        << (PMD_SHIFT - PAGE_SHIFT);
+#endif
+        if (end_pfn > (end >> PAGE_SHIFT))
+                end_pfn = end >> PAGE_SHIFT;
+        if (start_pfn < end_pfn) {
+                nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
+                pos = end_pfn << PAGE_SHIFT;
+        }
+
+        /* big page (2M) range */
+        start_pfn = ((pos + (PMD_SIZE - 1))>>PMD_SHIFT)
+                         << (PMD_SHIFT - PAGE_SHIFT);
+#ifdef CONFIG_X86_32
+        end_pfn = (end>>PMD_SHIFT) << (PMD_SHIFT - PAGE_SHIFT);
+#else /* CONFIG_X86_64 */
+        end_pfn = ((pos + (PUD_SIZE - 1))>>PUD_SHIFT)
+                         << (PUD_SHIFT - PAGE_SHIFT);
+        if (end_pfn > ((end>>PMD_SHIFT)<<(PMD_SHIFT - PAGE_SHIFT)))
+                end_pfn = ((end>>PMD_SHIFT)<<(PMD_SHIFT - PAGE_SHIFT));
+#endif
+
+        if (start_pfn < end_pfn) {
+                nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
+                                page_size_mask & (1<<PG_LEVEL_2M));
+                pos = end_pfn << PAGE_SHIFT;
+        }
+
+#ifdef CONFIG_X86_64
+        /* big page (1G) range */
+        start_pfn = ((pos + (PUD_SIZE - 1))>>PUD_SHIFT)
+                         << (PUD_SHIFT - PAGE_SHIFT);
+        end_pfn = (end >> PUD_SHIFT) << (PUD_SHIFT - PAGE_SHIFT);
+        if (start_pfn < end_pfn) {
+                nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
+                                page_size_mask &
+                                 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
+                pos = end_pfn << PAGE_SHIFT;
+        }
+
+        /* tail is not big page (1G) alignment */
+        start_pfn = ((pos + (PMD_SIZE - 1))>>PMD_SHIFT)
+                         << (PMD_SHIFT - PAGE_SHIFT);
+        end_pfn = (end >> PMD_SHIFT) << (PMD_SHIFT - PAGE_SHIFT);
+        if (start_pfn < end_pfn) {
+                nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
+                                page_size_mask & (1<<PG_LEVEL_2M));
+                pos = end_pfn << PAGE_SHIFT;
+        }
+#endif
+
+        /* tail is not big page (2M) alignment */
+        start_pfn = pos>>PAGE_SHIFT;
+        end_pfn = end>>PAGE_SHIFT;
+        nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
+
+        /* try to merge same page size and continuous */
+        for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
+                unsigned long old_start;
+                if (mr[i].end != mr[i+1].start ||
+                    mr[i].page_size_mask != mr[i+1].page_size_mask)
+                        continue;
+                /* move it */
+                old_start = mr[i].start;
+                memmove(&mr[i], &mr[i+1],
+                        (nr_range - 1 - i) * sizeof(struct map_range));
+                mr[i--].start = old_start;
+                nr_range--;
+        }
+
+        for (i = 0; i < nr_range; i++)
+                printk(KERN_DEBUG " %010lx - %010lx page %s\n",
+                                mr[i].start, mr[i].end,
+                        (mr[i].page_size_mask & (1<<PG_LEVEL_1G))?"1G":(
+                         (mr[i].page_size_mask & (1<<PG_LEVEL_2M))?"2M":"4k"));
+
+        /*
+         * Find space for the kernel direct mapping tables.
+         *
+         * Later we should allocate these tables in the local node of the
+         * memory mapped. Unfortunately this is done currently before the
+         * nodes are discovered.
+         */
+        if (!after_bootmem)
+                find_early_table_space(end, use_pse, use_gbpages);
+
+#ifdef CONFIG_X86_32
+        for (i = 0; i < nr_range; i++)
+                kernel_physical_mapping_init(mr[i].start, mr[i].end,
+                                             mr[i].page_size_mask);
+        ret = end;
+#else /* CONFIG_X86_64 */
+        for (i = 0; i < nr_range; i++)
+                ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
+                                                   mr[i].page_size_mask);
+#endif
+
+#ifdef CONFIG_X86_32
+        early_ioremap_page_table_range_init();
+
+        load_cr3(swapper_pg_dir);
+#endif
+
+#ifdef CONFIG_X86_64
+        if (!after_bootmem)
+                mmu_cr4_features = read_cr4();
+#endif
+        __flush_tlb_all();
+
+        if (!after_bootmem && e820_table_end > e820_table_start)
+                reserve_early(e820_table_start << PAGE_SHIFT,
+                                 e820_table_end << PAGE_SHIFT, "PGTABLE");
+
+        if (!after_bootmem)
+                early_memtest(start, end);
+
+        return ret >> PAGE_SHIFT;
+}
+
+
+/*
+ * devmem_is_allowed() checks to see if /dev/mem access to a certain address
+ * is valid. The argument is a physical page number.
+ *
+ *
+ * On x86, access has to be given to the first megabyte of ram because that area
+ * contains bios code and data regions used by X and dosemu and similar apps.
+ * Access has to be given to non-kernel-ram areas as well, these contain the PCI
+ * mmio resources as well as potential bios/acpi data regions.
+ */
+int devmem_is_allowed(unsigned long pagenr)
+{
+        if (pagenr <= 256)
+                return 1;
+        if (iomem_is_exclusive(pagenr << PAGE_SHIFT))
+                return 0;
+        if (!page_is_ram(pagenr))
+                return 1;
+        return 0;
+}
 
 void free_init_pages(char *what, unsigned long begin, unsigned long end)
 {
@@ -47,3 +384,10 @@ void free_initmem(void)
                         (unsigned long)(&__init_begin),
                         (unsigned long)(&__init_end));
 }
+
+#ifdef CONFIG_BLK_DEV_INITRD
+void free_initrd_mem(unsigned long start, unsigned long end)
+{
+        free_init_pages("initrd memory", start, end);
+}
+#endif
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 47df0e1bbeb9..db81e9a8556b 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -49,6 +49,7 @@
 #include <asm/paravirt.h>
 #include <asm/setup.h>
 #include <asm/cacheflush.h>
+#include <asm/init.h>
 
 unsigned long max_low_pfn_mapped;
 unsigned long max_pfn_mapped;
@@ -58,19 +59,14 @@ unsigned long highstart_pfn, highend_pfn;
 
 static noinline int do_test_wp_bit(void);
 
-
-static unsigned long __initdata table_start;
-static unsigned long __meminitdata table_end;
-static unsigned long __meminitdata table_top;
-
-static int __initdata after_init_bootmem;
+bool __read_mostly __vmalloc_start_set = false;
 
 static __init void *alloc_low_page(void)
 {
-        unsigned long pfn = table_end++;
+        unsigned long pfn = e820_table_end++;
         void *adr;
 
-        if (pfn >= table_top)
+        if (pfn >= e820_table_top)
                 panic("alloc_low_page: ran out of memory");
 
         adr = __va(pfn * PAGE_SIZE);
@@ -90,7 +86,7 @@ static pmd_t * __init one_md_table_init(pgd_t *pgd)
 
 #ifdef CONFIG_X86_PAE
         if (!(pgd_val(*pgd) & _PAGE_PRESENT)) {
-                if (after_init_bootmem)
+                if (after_bootmem)
                         pmd_table = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
                 else
                         pmd_table = (pmd_t *)alloc_low_page();
@@ -117,7 +113,7 @@ static pte_t * __init one_page_table_init(pmd_t *pmd)
         if (!(pmd_val(*pmd) & _PAGE_PRESENT)) {
                 pte_t *page_table = NULL;
 
-                if (after_init_bootmem) {
+                if (after_bootmem) {
 #ifdef CONFIG_DEBUG_PAGEALLOC
                         page_table = (pte_t *) alloc_bootmem_pages(PAGE_SIZE);
 #endif
@@ -168,12 +164,12 @@ static pte_t *__init page_table_kmap_check(pte_t *pte, pmd_t *pmd,
         if (pmd_idx_kmap_begin != pmd_idx_kmap_end
             && (vaddr >> PMD_SHIFT) >= pmd_idx_kmap_begin
             && (vaddr >> PMD_SHIFT) <= pmd_idx_kmap_end
-            && ((__pa(pte) >> PAGE_SHIFT) < table_start
-                || (__pa(pte) >> PAGE_SHIFT) >= table_end)) {
+            && ((__pa(pte) >> PAGE_SHIFT) < e820_table_start
+                || (__pa(pte) >> PAGE_SHIFT) >= e820_table_end)) {
                 pte_t *newpte;
                 int i;
 
-                BUG_ON(after_init_bootmem);
+                BUG_ON(after_bootmem);
                 newpte = alloc_low_page();
                 for (i = 0; i < PTRS_PER_PTE; i++)
                         set_pte(newpte + i, pte[i]);
@@ -242,11 +238,14 @@ static inline int is_kernel_text(unsigned long addr)
  * of max_low_pfn pages, by creating page tables starting from address
  * PAGE_OFFSET:
  */
-static void __init kernel_physical_mapping_init(pgd_t *pgd_base,
-                                                unsigned long start_pfn,
-                                                unsigned long end_pfn,
-                                                int use_pse)
+unsigned long __init
+kernel_physical_mapping_init(unsigned long start,
+                             unsigned long end,
+                             unsigned long page_size_mask)
 {
+        int use_pse = page_size_mask == (1<<PG_LEVEL_2M);
+        unsigned long start_pfn, end_pfn;
+        pgd_t *pgd_base = swapper_pg_dir;
         int pgd_idx, pmd_idx, pte_ofs;
         unsigned long pfn;
         pgd_t *pgd;
@@ -255,6 +254,9 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base,
         unsigned pages_2m, pages_4k;
         int mapping_iter;
 
+        start_pfn = start >> PAGE_SHIFT;
+        end_pfn = end >> PAGE_SHIFT;
+
         /*
          * First iteration will setup identity mapping using large/small pages
          * based on use_pse, with other attributes same as set by
@@ -369,26 +371,6 @@ repeat:
                 mapping_iter = 2;
                 goto repeat;
         }
-}
-
-/*
- * devmem_is_allowed() checks to see if /dev/mem access to a certain address
- * is valid. The argument is a physical page number.
- *
- *
- * On x86, access has to be given to the first megabyte of ram because that area
- * contains bios code and data regions used by X and dosemu and similar apps.
- * Access has to be given to non-kernel-ram areas as well, these contain the PCI
- * mmio resources as well as potential bios/acpi data regions.
- */
-int devmem_is_allowed(unsigned long pagenr)
-{
-        if (pagenr <= 256)
-                return 1;
-        if (iomem_is_exclusive(pagenr << PAGE_SHIFT))
-                return 0;
-        if (!page_is_ram(pagenr))
-                return 1;
         return 0;
 }
 
@@ -545,8 +527,9 @@ void __init native_pagetable_setup_done(pgd_t *base)
  * be partially populated, and so it avoids stomping on any existing
  * mappings.
  */
-static void __init early_ioremap_page_table_range_init(pgd_t *pgd_base)
+void __init early_ioremap_page_table_range_init(void)
 {
+        pgd_t *pgd_base = swapper_pg_dir;
         unsigned long vaddr, end;
 
         /*
@@ -641,7 +624,7 @@ static int __init noexec_setup(char *str)
 }
 early_param("noexec", noexec_setup);
 
-static void __init set_nx(void)
+void __init set_nx(void)
 {
         unsigned int v[4], l, h;
 
@@ -793,6 +776,8 @@ void __init initmem_init(unsigned long start_pfn,
 #ifdef CONFIG_FLATMEM
         max_mapnr = num_physpages;
 #endif
+        __vmalloc_start_set = true;
+
         printk(KERN_NOTICE "%ldMB LOWMEM available.\n",
                         pages_to_mb(max_low_pfn));
 
@@ -814,176 +799,66 @@ static void __init zone_sizes_init(void)
         free_area_init_nodes(max_zone_pfns);
 }
 
+static unsigned long __init setup_node_bootmem(int nodeid,
+                                 unsigned long start_pfn,
+                                 unsigned long end_pfn,
+                                 unsigned long bootmap)
+{
+        unsigned long bootmap_size;
+
+        /* don't touch min_low_pfn */
+        bootmap_size = init_bootmem_node(NODE_DATA(nodeid),
+                                         bootmap >> PAGE_SHIFT,
+                                         start_pfn, end_pfn);
+        printk(KERN_INFO "  node %d low ram: %08lx - %08lx\n",
+                nodeid, start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT);
+        printk(KERN_INFO "  node %d bootmap %08lx - %08lx\n",
+                 nodeid, bootmap, bootmap + bootmap_size);
+        free_bootmem_with_active_regions(nodeid, end_pfn);
+        early_res_to_bootmem(start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT);
+
+        return bootmap + bootmap_size;
+}
+
 void __init setup_bootmem_allocator(void)
 {
-        int i;
+        int nodeid;
         unsigned long bootmap_size, bootmap;
         /*
          * Initialize the boot-time allocator (with low memory only):
          */
         bootmap_size = bootmem_bootmap_pages(max_low_pfn)<<PAGE_SHIFT;
-        bootmap = find_e820_area(min_low_pfn<<PAGE_SHIFT,
-                                 max_pfn_mapped<<PAGE_SHIFT, bootmap_size,
+        bootmap = find_e820_area(0, max_pfn_mapped<<PAGE_SHIFT, bootmap_size,
                                  PAGE_SIZE);
         if (bootmap == -1L)
                 panic("Cannot find bootmem map of size %ld\n", bootmap_size);
         reserve_early(bootmap, bootmap + bootmap_size, "BOOTMAP");
 
-        /* don't touch min_low_pfn */
-        bootmap_size = init_bootmem_node(NODE_DATA(0), bootmap >> PAGE_SHIFT,
-                                         min_low_pfn, max_low_pfn);
         printk(KERN_INFO "  mapped low ram: 0 - %08lx\n",
                  max_pfn_mapped<<PAGE_SHIFT);
-        printk(KERN_INFO "  low ram: %08lx - %08lx\n",
-                 min_low_pfn<<PAGE_SHIFT, max_low_pfn<<PAGE_SHIFT);
-        printk(KERN_INFO "  bootmap %08lx - %08lx\n",
-                 bootmap, bootmap + bootmap_size);
-        for_each_online_node(i)
-                free_bootmem_with_active_regions(i, max_low_pfn);
-        early_res_to_bootmem(0, max_low_pfn<<PAGE_SHIFT);
-
-        after_init_bootmem = 1;
-}
-
-static void __init find_early_table_space(unsigned long end, int use_pse)
-{
-        unsigned long puds, pmds, ptes, tables, start;
+        printk(KERN_INFO "  low ram: 0 - %08lx\n", max_low_pfn<<PAGE_SHIFT);
 
-        puds = (end + PUD_SIZE - 1) >> PUD_SHIFT;
-        tables = roundup(puds * sizeof(pud_t), PAGE_SIZE);
+        for_each_online_node(nodeid) {
+                 unsigned long start_pfn, end_pfn;
 
-        pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT;
-        tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE);
-
-        if (use_pse) {
-                unsigned long extra;
-
-                extra = end - ((end>>PMD_SHIFT) << PMD_SHIFT);
-                extra += PMD_SIZE;
-                ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT;
-        } else
-                ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
-
-        tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE);
-
-        /* for fixmap */
-        tables += roundup(__end_of_fixed_addresses * sizeof(pte_t), PAGE_SIZE);
-
-        /*
-         * RED-PEN putting page tables only on node 0 could
-         * cause a hotspot and fill up ZONE_DMA. The page tables
-         * need roughly 0.5KB per GB.
-         */
-        start = 0x7000;
-        table_start = find_e820_area(start, max_pfn_mapped<<PAGE_SHIFT,
-                                        tables, PAGE_SIZE);
-        if (table_start == -1UL)
-                panic("Cannot find space for the kernel page tables");
-
-        table_start >>= PAGE_SHIFT;
-        table_end = table_start;
-        table_top = table_start + (tables>>PAGE_SHIFT);
-
-        printk(KERN_DEBUG "kernel direct mapping tables up to %lx @ %lx-%lx\n",
-                end, table_start << PAGE_SHIFT,
-                (table_start << PAGE_SHIFT) + tables);
-}
-
-unsigned long __init_refok init_memory_mapping(unsigned long start,
-                                                unsigned long end)
-{
-        pgd_t *pgd_base = swapper_pg_dir;
-        unsigned long start_pfn, end_pfn;
-        unsigned long big_page_start;
-#ifdef CONFIG_DEBUG_PAGEALLOC
-        /*
-         * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
-         * This will simplify cpa(), which otherwise needs to support splitting
-         * large pages into small in interrupt context, etc.
-         */
-        int use_pse = 0;
+#ifdef CONFIG_NEED_MULTIPLE_NODES
+                start_pfn = node_start_pfn[nodeid];
+                end_pfn = node_end_pfn[nodeid];
+                if (start_pfn > max_low_pfn)
+                        continue;
+                if (end_pfn > max_low_pfn)
+                        end_pfn = max_low_pfn;
 #else
-        int use_pse = cpu_has_pse;
+                start_pfn = 0;
+                end_pfn = max_low_pfn;
 #endif
-
-        /*
-         * Find space for the kernel direct mapping tables.
-         */
-        if (!after_init_bootmem)
-                find_early_table_space(end, use_pse);
-
-#ifdef CONFIG_X86_PAE
-        set_nx();
-        if (nx_enabled)
-                printk(KERN_INFO "NX (Execute Disable) protection: active\n");
-#endif
-
-        /* Enable PSE if available */
-        if (cpu_has_pse)
-                set_in_cr4(X86_CR4_PSE);
-
-        /* Enable PGE if available */
-        if (cpu_has_pge) {
-                set_in_cr4(X86_CR4_PGE);
-                __supported_pte_mask |= _PAGE_GLOBAL;
-        }
-
-        /*
-         * Don't use a large page for the first 2/4MB of memory
-         * because there are often fixed size MTRRs in there
-         * and overlapping MTRRs into large pages can cause
-         * slowdowns.
-         */
-        big_page_start = PMD_SIZE;
-
-        if (start < big_page_start) {
-                start_pfn = start >> PAGE_SHIFT;
-                end_pfn = min(big_page_start>>PAGE_SHIFT, end>>PAGE_SHIFT);
-        } else {
-                /* head is not big page alignment ? */
-                start_pfn = start >> PAGE_SHIFT;
-                end_pfn = ((start + (PMD_SIZE - 1))>>PMD_SHIFT)
-                                 << (PMD_SHIFT - PAGE_SHIFT);
+                bootmap = setup_node_bootmem(nodeid, start_pfn, end_pfn,
+                                                 bootmap);
         }
-        if (start_pfn < end_pfn)
-                kernel_physical_mapping_init(pgd_base, start_pfn, end_pfn, 0);
-
-        /* big page range */
-        start_pfn = ((start + (PMD_SIZE - 1))>>PMD_SHIFT)
-                         << (PMD_SHIFT - PAGE_SHIFT);
-        if (start_pfn < (big_page_start >> PAGE_SHIFT))
-                start_pfn =  big_page_start >> PAGE_SHIFT;
-        end_pfn = (end>>PMD_SHIFT) << (PMD_SHIFT - PAGE_SHIFT);
-        if (start_pfn < end_pfn)
-                kernel_physical_mapping_init(pgd_base, start_pfn, end_pfn,
-                                             use_pse);
-
-        /* tail is not big page alignment ? */
-        start_pfn = end_pfn;
-        if (start_pfn > (big_page_start>>PAGE_SHIFT)) {
-                end_pfn = end >> PAGE_SHIFT;
-                if (start_pfn < end_pfn)
-                        kernel_physical_mapping_init(pgd_base, start_pfn,
-                                                         end_pfn, 0);
-        }
-
-        early_ioremap_page_table_range_init(pgd_base);
 
-        load_cr3(swapper_pg_dir);
-
-        __flush_tlb_all();
-
-        if (!after_init_bootmem)
-                reserve_early(table_start << PAGE_SHIFT,
-                                 table_end << PAGE_SHIFT, "PGTABLE");
-
-        if (!after_init_bootmem)
-                early_memtest(start, end);
-
-        return end >> PAGE_SHIFT;
+        after_bootmem = 1;
 }
 
-
 /*
  * paging_init() sets up the page tables - note that the first 8MB are
  * already mapped by head.S.
@@ -1217,13 +1092,6 @@ void mark_rodata_ro(void)
 }
 #endif
 
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
-        free_init_pages("initrd memory", start, end);
-}
-#endif
-
 int __init reserve_bootmem_generic(unsigned long phys, unsigned long len,
                                    int flags)
 {
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 07f44d491df1..54efa57d1c03 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -48,6 +48,7 @@
 #include <asm/kdebug.h>
 #include <asm/numa.h>
 #include <asm/cacheflush.h>
+#include <asm/init.h>
 
 /*
  * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
@@ -61,12 +62,6 @@ static unsigned long dma_reserve __initdata;
 
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 
-int direct_gbpages
-#ifdef CONFIG_DIRECT_GBPAGES
-                                = 1
-#endif
-;
-
 static int __init parse_direct_gbpages_off(char *arg)
 {
         direct_gbpages = 0;
@@ -87,12 +82,10 @@ early_param("gbpages", parse_direct_gbpages_on);
  * around without checking the pgd every time.
  */
 
-int after_bootmem;
-
 pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
 EXPORT_SYMBOL_GPL(__supported_pte_mask);
 
-static int do_not_nx __cpuinitdata;
+static int disable_nx __cpuinitdata;
 
 /*
  * noexec=on|off
@@ -107,9 +100,9 @@ static int __init nonx_setup(char *str)
                 return -EINVAL;
         if (!strncmp(str, "on", 2)) {
                 __supported_pte_mask |= _PAGE_NX;
-                do_not_nx = 0;
+                disable_nx = 0;
         } else if (!strncmp(str, "off", 3)) {
-                do_not_nx = 1;
+                disable_nx = 1;
                 __supported_pte_mask &= ~_PAGE_NX;
         }
         return 0;
@@ -121,7 +114,7 @@ void __cpuinit check_efer(void)
         unsigned long efer;
 
         rdmsrl(MSR_EFER, efer);
-        if (!(efer & EFER_NX) || do_not_nx)
+        if (!(efer & EFER_NX) || disable_nx)
                 __supported_pte_mask &= ~_PAGE_NX;
 }
 
@@ -325,13 +318,9 @@ void __init cleanup_highmap(void)
         }
 }
 
-static unsigned long __initdata table_start;
-static unsigned long __meminitdata table_end;
-static unsigned long __meminitdata table_top;
-
 static __ref void *alloc_low_page(unsigned long *phys)
 {
-        unsigned long pfn = table_end++;
+        unsigned long pfn = e820_table_end++;
         void *adr;
 
         if (after_bootmem) {
@@ -341,7 +330,7 @@ static __ref void *alloc_low_page(unsigned long *phys)
                 return adr;
         }
 
-        if (pfn >= table_top)
+        if (pfn >= e820_table_top)
                 panic("alloc_low_page: ran out of memory");
 
         adr = early_memremap(pfn * PAGE_SIZE, PAGE_SIZE);
@@ -581,58 +570,10 @@ phys_pud_update(pgd_t *pgd, unsigned long addr, unsigned long end,
         return phys_pud_init(pud, addr, end, page_size_mask);
 }
 
-static void __init find_early_table_space(unsigned long end, int use_pse,
-                                          int use_gbpages)
-{
-        unsigned long puds, pmds, ptes, tables, start;
-
-        puds = (end + PUD_SIZE - 1) >> PUD_SHIFT;
-        tables = roundup(puds * sizeof(pud_t), PAGE_SIZE);
-        if (use_gbpages) {
-                unsigned long extra;
-                extra = end - ((end>>PUD_SHIFT) << PUD_SHIFT);
-                pmds = (extra + PMD_SIZE - 1) >> PMD_SHIFT;
-        } else
-                pmds = (end + PMD_SIZE - 1) >> PMD_SHIFT;
-        tables += roundup(pmds * sizeof(pmd_t), PAGE_SIZE);
-
-        if (use_pse) {
-                unsigned long extra;
-                extra = end - ((end>>PMD_SHIFT) << PMD_SHIFT);
-                ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT;
-        } else
-                ptes = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
-        tables += roundup(ptes * sizeof(pte_t), PAGE_SIZE);
-
-        /*
-         * RED-PEN putting page tables only on node 0 could
-         * cause a hotspot and fill up ZONE_DMA. The page tables
-         * need roughly 0.5KB per GB.
-         */
-        start = 0x8000;
-        table_start = find_e820_area(start, end, tables, PAGE_SIZE);
-        if (table_start == -1UL)
-                panic("Cannot find space for the kernel page tables");
-
-        table_start >>= PAGE_SHIFT;
-        table_end = table_start;
-        table_top = table_start + (tables >> PAGE_SHIFT);
-
-        printk(KERN_DEBUG "kernel direct mapping tables up to %lx @ %lx-%lx\n",
-                end, table_start << PAGE_SHIFT, table_top << PAGE_SHIFT);
-}
-
-static void __init init_gbpages(void)
-{
-        if (direct_gbpages && cpu_has_gbpages)
-                printk(KERN_INFO "Using GB pages for direct mapping\n");
-        else
-                direct_gbpages = 0;
-}
-
-static unsigned long __meminit kernel_physical_mapping_init(unsigned long start,
-                                                unsigned long end,
-                                                unsigned long page_size_mask)
+unsigned long __init
+kernel_physical_mapping_init(unsigned long start,
+                             unsigned long end,
+                             unsigned long page_size_mask)
 {
 
         unsigned long next, last_map_addr = end;
@@ -669,176 +610,6 @@ static unsigned long __meminit kernel_physical_mapping_init(unsigned long start,
         return last_map_addr;
 }
 
-struct map_range {
-        unsigned long start;
-        unsigned long end;
-        unsigned page_size_mask;
-};
-
-#define NR_RANGE_MR 5
-
-static int save_mr(struct map_range *mr, int nr_range,
-                   unsigned long start_pfn, unsigned long end_pfn,
-                   unsigned long page_size_mask)
-{
-
-        if (start_pfn < end_pfn) {
-                if (nr_range >= NR_RANGE_MR)
-                        panic("run out of range for init_memory_mapping\n");
-                mr[nr_range].start = start_pfn<<PAGE_SHIFT;
-                mr[nr_range].end   = end_pfn<<PAGE_SHIFT;
-                mr[nr_range].page_size_mask = page_size_mask;
-                nr_range++;
-        }
-
-        return nr_range;
-}
-
-/*
- * Setup the direct mapping of the physical memory at PAGE_OFFSET.
- * This runs before bootmem is initialized and gets pages directly from
- * the physical memory. To access them they are temporarily mapped.
- */
-unsigned long __init_refok init_memory_mapping(unsigned long start,
-                                               unsigned long end)
-{
-        unsigned long last_map_addr = 0;
-        unsigned long page_size_mask = 0;
-        unsigned long start_pfn, end_pfn;
-        unsigned long pos;
-
-        struct map_range mr[NR_RANGE_MR];
-        int nr_range, i;
-        int use_pse, use_gbpages;
-
-        printk(KERN_INFO "init_memory_mapping: %016lx-%016lx\n", start, end);
-
-        /*
-         * Find space for the kernel direct mapping tables.
-         *
-         * Later we should allocate these tables in the local node of the
-         * memory mapped. Unfortunately this is done currently before the
-         * nodes are discovered.
-         */
-        if (!after_bootmem)
-                init_gbpages();
-
-#ifdef CONFIG_DEBUG_PAGEALLOC
-        /*
-         * For CONFIG_DEBUG_PAGEALLOC, identity mapping will use small pages.
-         * This will simplify cpa(), which otherwise needs to support splitting
-         * large pages into small in interrupt context, etc.
-         */
-        use_pse = use_gbpages = 0;
-#else
-        use_pse = cpu_has_pse;
-        use_gbpages = direct_gbpages;
-#endif
-
-        if (use_gbpages)
-                page_size_mask |= 1 << PG_LEVEL_1G;
-        if (use_pse)
-                page_size_mask |= 1 << PG_LEVEL_2M;
-
-        memset(mr, 0, sizeof(mr));
-        nr_range = 0;
-
-        /* head if not big page alignment ?*/
-        start_pfn = start >> PAGE_SHIFT;
-        pos = start_pfn << PAGE_SHIFT;
-        end_pfn = ((pos + (PMD_SIZE - 1)) >> PMD_SHIFT)
-                        << (PMD_SHIFT - PAGE_SHIFT);
-        if (end_pfn > (end >> PAGE_SHIFT))
-                end_pfn = end >> PAGE_SHIFT;
-        if (start_pfn < end_pfn) {
-                nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
-                pos = end_pfn << PAGE_SHIFT;
-        }
-
-        /* big page (2M) range*/
-        start_pfn = ((pos + (PMD_SIZE - 1))>>PMD_SHIFT)
-                         << (PMD_SHIFT - PAGE_SHIFT);
-        end_pfn = ((pos + (PUD_SIZE - 1))>>PUD_SHIFT)
-                         << (PUD_SHIFT - PAGE_SHIFT);
-        if (end_pfn > ((end>>PMD_SHIFT)<<(PMD_SHIFT - PAGE_SHIFT)))
-                end_pfn = ((end>>PMD_SHIFT)<<(PMD_SHIFT - PAGE_SHIFT));
-        if (start_pfn < end_pfn) {
-                nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
-                                page_size_mask & (1<<PG_LEVEL_2M));
-                pos = end_pfn << PAGE_SHIFT;
-        }
-
-        /* big page (1G) range */
-        start_pfn = ((pos + (PUD_SIZE - 1))>>PUD_SHIFT)
-                         << (PUD_SHIFT - PAGE_SHIFT);
-        end_pfn = (end >> PUD_SHIFT) << (PUD_SHIFT - PAGE_SHIFT);
-        if (start_pfn < end_pfn) {
-                nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
-                                page_size_mask &
-                                 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
-                pos = end_pfn << PAGE_SHIFT;
-        }
-
-        /* tail is not big page (1G) alignment */
-        start_pfn = ((pos + (PMD_SIZE - 1))>>PMD_SHIFT)
-                         << (PMD_SHIFT - PAGE_SHIFT);
-        end_pfn = (end >> PMD_SHIFT) << (PMD_SHIFT - PAGE_SHIFT);
-        if (start_pfn < end_pfn) {
-                nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
-                                page_size_mask & (1<<PG_LEVEL_2M));
-                pos = end_pfn << PAGE_SHIFT;
-        }
-
-        /* tail is not big page (2M) alignment */
-        start_pfn = pos>>PAGE_SHIFT;
-        end_pfn = end>>PAGE_SHIFT;
-        nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
-
-        /* try to merge same page size and continuous */
-        for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
-                unsigned long old_start;
-                if (mr[i].end != mr[i+1].start ||
-                    mr[i].page_size_mask != mr[i+1].page_size_mask)
-                        continue;
-                /* move it */
-                old_start = mr[i].start;
-                memmove(&mr[i], &mr[i+1],
-                         (nr_range - 1 - i) * sizeof (struct map_range));
-                mr[i--].start = old_start;
-                nr_range--;
-        }
-
-        for (i = 0; i < nr_range; i++)
-                printk(KERN_DEBUG " %010lx - %010lx page %s\n",
-                                mr[i].start, mr[i].end,
-                        (mr[i].page_size_mask & (1<<PG_LEVEL_1G))?"1G":(
-                         (mr[i].page_size_mask & (1<<PG_LEVEL_2M))?"2M":"4k"));
-
-        if (!after_bootmem)
-                find_early_table_space(end, use_pse, use_gbpages);
-
-        for (i = 0; i < nr_range; i++)
-                last_map_addr = kernel_physical_mapping_init(
-                                        mr[i].start, mr[i].end,
-                                        mr[i].page_size_mask);
-
-        if (!after_bootmem)
-                mmu_cr4_features = read_cr4();
-        __flush_tlb_all();
-
-        if (!after_bootmem && table_end > table_start)
-                reserve_early(table_start << PAGE_SHIFT,
-                                 table_end << PAGE_SHIFT, "PGTABLE");
-
-        printk(KERN_INFO "last_map_addr: %lx end: %lx\n",
-                         last_map_addr, end);
-
-        if (!after_bootmem)
-                early_memtest(start, end);
-
-        return last_map_addr >> PAGE_SHIFT;
-}
-
 #ifndef CONFIG_NUMA
 void __init initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 {
@@ -910,28 +681,6 @@ EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
 
 #endif /* CONFIG_MEMORY_HOTPLUG */
 
-/*
- * devmem_is_allowed() checks to see if /dev/mem access to a certain address
- * is valid. The argument is a physical page number.
- *
- *
- * On x86, access has to be given to the first megabyte of ram because that area
- * contains bios code and data regions used by X and dosemu and similar apps.
- * Access has to be given to non-kernel-ram areas as well, these contain the PCI
- * mmio resources as well as potential bios/acpi data regions.
- */
-int devmem_is_allowed(unsigned long pagenr)
-{
-        if (pagenr <= 256)
-                return 1;
-        if (iomem_is_exclusive(pagenr << PAGE_SHIFT))
-                return 0;
-        if (!page_is_ram(pagenr))
-                return 1;
-        return 0;
-}
-
-
 static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel,
                          kcore_modules, kcore_vsyscall;
 
@@ -1019,13 +768,6 @@ void mark_rodata_ro(void)
 
 #endif
 
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
-        free_init_pages("initrd memory", start, end);
-}
-#endif
-
 int __init reserve_bootmem_generic(unsigned long phys, unsigned long len,
                                    int flags)
 {
diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c
index 04102d42ff42..699c9b2895ae 100644
--- a/arch/x86/mm/iomap_32.c
+++ b/arch/x86/mm/iomap_32.c
@@ -31,16 +31,27 @@ int is_io_mapping_possible(resource_size_t base, unsigned long size)
 }
 EXPORT_SYMBOL_GPL(is_io_mapping_possible);
 
-/* Map 'pfn' using fixed map 'type' and protections 'prot'
- */
-void *
-iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
+void *kmap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
 {
         enum fixed_addresses idx;
         unsigned long vaddr;
 
         pagefault_disable();
 
+        idx = type + KM_TYPE_NR * smp_processor_id();
+        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
+        set_pte(kmap_pte - idx, pfn_pte(pfn, prot));
+        arch_flush_lazy_mmu_mode();
+
+        return (void *)vaddr;
+}
+
+/*
+ * Map 'pfn' using fixed map 'type' and protections 'prot'
+ */
+void *
+iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
+{
         /*
          * For non-PAT systems, promote PAGE_KERNEL_WC to PAGE_KERNEL_UC_MINUS.
          * PAGE_KERNEL_WC maps to PWT, which translates to uncached if the
@@ -50,12 +61,7 @@ iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot)
         if (!pat_enabled && pgprot_val(prot) == pgprot_val(PAGE_KERNEL_WC))
                 prot = PAGE_KERNEL_UC_MINUS;
 
-        idx = type + KM_TYPE_NR*smp_processor_id();
-        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
-        set_pte(kmap_pte-idx, pfn_pte(pfn, prot));
-        arch_flush_lazy_mmu_mode();
-
-        return (void*) vaddr;
+        return kmap_atomic_prot_pfn(pfn, type, prot);
 }
 EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn);
 
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index 433f7bd4648a..0dfa09d69e80 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -22,13 +22,17 @@
 #include <asm/pgalloc.h>
 #include <asm/pat.h>
 
-#ifdef CONFIG_X86_64
-
-static inline int phys_addr_valid(unsigned long addr)
+static inline int phys_addr_valid(resource_size_t addr)
 {
-        return addr < (1UL << boot_cpu_data.x86_phys_bits);
+#ifdef CONFIG_PHYS_ADDR_T_64BIT
+        return !(addr >> boot_cpu_data.x86_phys_bits);
+#else
+        return 1;
+#endif
 }
 
+#ifdef CONFIG_X86_64
+
 unsigned long __phys_addr(unsigned long x)
 {
         if (x >= __START_KERNEL_map) {
@@ -38,8 +42,7 @@ unsigned long __phys_addr(unsigned long x)
         } else {
                 VIRTUAL_BUG_ON(x < PAGE_OFFSET);
                 x -= PAGE_OFFSET;
-                VIRTUAL_BUG_ON(system_state == SYSTEM_BOOTING ? x > MAXMEM :
-                                        !phys_addr_valid(x));
+                VIRTUAL_BUG_ON(!phys_addr_valid(x));
         }
         return x;
 }
@@ -56,10 +59,8 @@ bool __virt_addr_valid(unsigned long x)
                 if (x < PAGE_OFFSET)
                         return false;
                 x -= PAGE_OFFSET;
-                if (system_state == SYSTEM_BOOTING ?
-                                x > MAXMEM : !phys_addr_valid(x)) {
+                if (!phys_addr_valid(x))
                         return false;
-                }
         }
 
         return pfn_valid(x >> PAGE_SHIFT);
@@ -68,18 +69,12 @@ EXPORT_SYMBOL(__virt_addr_valid);
 
 #else
 
-static inline int phys_addr_valid(unsigned long addr)
-{
-        return 1;
-}
-
 #ifdef CONFIG_DEBUG_VIRTUAL
 unsigned long __phys_addr(unsigned long x)
 {
-        /* VMALLOC_* aren't constants; not available at the boot time */
+        /* VMALLOC_* aren't constants  */
         VIRTUAL_BUG_ON(x < PAGE_OFFSET);
-        VIRTUAL_BUG_ON(system_state != SYSTEM_BOOTING &&
-                is_vmalloc_addr((void *) x));
+        VIRTUAL_BUG_ON(__vmalloc_start_set && is_vmalloc_addr((void *) x));
         return x - PAGE_OFFSET;
 }
 EXPORT_SYMBOL(__phys_addr);
@@ -89,7 +84,9 @@ bool __virt_addr_valid(unsigned long x)
 {
         if (x < PAGE_OFFSET)
                 return false;
-        if (system_state != SYSTEM_BOOTING && is_vmalloc_addr((void *) x))
+        if (__vmalloc_start_set && is_vmalloc_addr((void *) x))
+                return false;
+        if (x >= FIXADDR_START)
                 return false;
         return pfn_valid((x - PAGE_OFFSET) >> PAGE_SHIFT);
 }
@@ -508,13 +505,19 @@ static inline pte_t * __init early_ioremap_pte(unsigned long addr)
         return &bm_pte[pte_index(addr)];
 }
 
+static unsigned long slot_virt[FIX_BTMAPS_SLOTS] __initdata;
+
 void __init early_ioremap_init(void)
 {
         pmd_t *pmd;
+        int i;
 
         if (early_ioremap_debug)
                 printk(KERN_INFO "early_ioremap_init()\n");
 
+        for (i = 0; i < FIX_BTMAPS_SLOTS; i++)
+                slot_virt[i] = __fix_to_virt(FIX_BTMAP_BEGIN - NR_FIX_BTMAPS*i);
+
         pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN));
         memset(bm_pte, 0, sizeof(bm_pte));
         pmd_populate_kernel(&init_mm, pmd, bm_pte);
@@ -581,6 +584,7 @@ static inline void __init early_clear_fixmap(enum fixed_addresses idx)
 
 static void __iomem *prev_map[FIX_BTMAPS_SLOTS] __initdata;
 static unsigned long prev_size[FIX_BTMAPS_SLOTS] __initdata;
+
 static int __init check_early_ioremap_leak(void)
 {
         int count = 0;
@@ -602,7 +606,8 @@ static int __init check_early_ioremap_leak(void)
 }
 late_initcall(check_early_ioremap_leak);
 
-static void __init __iomem *__early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot)
+static void __init __iomem *
+__early_ioremap(unsigned long phys_addr, unsigned long size, pgprot_t prot)
 {
         unsigned long offset, last_addr;
         unsigned int nrpages;
@@ -668,9 +673,9 @@ static void __init __iomem *__early_ioremap(unsigned long phys_addr, unsigned lo
                 --nrpages;
         }
         if (early_ioremap_debug)
-                printk(KERN_CONT "%08lx + %08lx\n", offset, fix_to_virt(idx0));
+                printk(KERN_CONT "%08lx + %08lx\n", offset, slot_virt[slot]);
 
-        prev_map[slot] = (void __iomem *)(offset + fix_to_virt(idx0));
+        prev_map[slot] = (void __iomem *)(offset + slot_virt[slot]);
         return prev_map[slot];
 }
 
@@ -738,8 +743,3 @@ void __init early_iounmap(void __iomem *addr, unsigned long size)
         }
         prev_map[slot] = NULL;
 }
-
-void __this_fixmap_does_not_exist(void)
-{
-        WARN_ON(1);
-}
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 6a518dd08a36..4f115e00486b 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -310,7 +310,7 @@ static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs)
         struct kmmio_context *ctx = &get_cpu_var(kmmio_ctx);
 
         if (!ctx->active) {
-                pr_warning("kmmio: spurious debug trap on CPU %d.\n",
+                pr_debug("kmmio: spurious debug trap on CPU %d.\n",
                                                         smp_processor_id());
                 goto out;
         }
diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c
index 0bcd7883d036..605c8be06217 100644
--- a/arch/x86/mm/memtest.c
+++ b/arch/x86/mm/memtest.c
@@ -100,6 +100,9 @@ static int __init parse_memtest(char *arg)
 {
         if (arg)
                 memtest_pattern = simple_strtoul(arg, NULL, 0);
+        else
+                memtest_pattern = ARRAY_SIZE(patterns);
+
         return 0;
 }
 
diff --git a/arch/x86/mm/numa_32.c b/arch/x86/mm/numa_32.c
index 451fe95a0352..3daefa04ace5 100644
--- a/arch/x86/mm/numa_32.c
+++ b/arch/x86/mm/numa_32.c
@@ -416,10 +416,11 @@ void __init initmem_init(unsigned long start_pfn,
         for_each_online_node(nid)
                 propagate_e820_map_node(nid);
 
-        for_each_online_node(nid)
+        for_each_online_node(nid) {
                 memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));
+                NODE_DATA(nid)->bdata = &bootmem_node_data[nid];
+        }
 
-        NODE_DATA(0)->bdata = &bootmem_node_data[0];
         setup_bootmem_allocator();
 }
 
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 9c4294986af7..d71e1b636ce6 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -16,6 +16,7 @@
 #include <asm/processor.h>
 #include <asm/tlbflush.h>
 #include <asm/sections.h>
+#include <asm/setup.h>
 #include <asm/uaccess.h>
 #include <asm/pgalloc.h>
 #include <asm/proto.h>
@@ -33,6 +34,7 @@ struct cpa_data {
         unsigned long   pfn;
         unsigned        force_split : 1;
         int             curpage;
+        struct page     **pages;
 };
 
 /*
@@ -45,6 +47,7 @@ static DEFINE_SPINLOCK(cpa_lock);
 
 #define CPA_FLUSHTLB 1
 #define CPA_ARRAY 2
+#define CPA_PAGES_ARRAY 4
 
 #ifdef CONFIG_PROC_FS
 static unsigned long direct_pages_count[PG_LEVEL_NUM];
@@ -95,7 +98,7 @@ static inline unsigned long highmap_start_pfn(void)
 
 static inline unsigned long highmap_end_pfn(void)
 {
-        return __pa(roundup((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT;
+        return __pa(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
 }
 
 #endif
@@ -201,10 +204,10 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache)
         }
 }
 
-static void cpa_flush_array(unsigned long *start, int numpages, int cache)
+static void cpa_flush_array(unsigned long *start, int numpages, int cache,
+                            int in_flags, struct page **pages)
 {
         unsigned int i, level;
-        unsigned long *addr;
 
         BUG_ON(irqs_disabled());
 
@@ -225,14 +228,22 @@ static void cpa_flush_array(unsigned long *start, int numpages, int cache)
          * will cause all other CPUs to flush the same
          * cachelines:
          */
-        for (i = 0, addr = start; i < numpages; i++, addr++) {
-                pte_t *pte = lookup_address(*addr, &level);
+        for (i = 0; i < numpages; i++) {
+                unsigned long addr;
+                pte_t *pte;
+
+                if (in_flags & CPA_PAGES_ARRAY)
+                        addr = (unsigned long)page_address(pages[i]);
+                else
+                        addr = start[i];
+
+                pte = lookup_address(addr, &level);
 
                 /*
                  * Only flush present addresses:
                  */
                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
-                        clflush_cache_range((void *) *addr, PAGE_SIZE);
+                        clflush_cache_range((void *)addr, PAGE_SIZE);
         }
 }
 
@@ -584,7 +595,9 @@ static int __change_page_attr(struct cpa_data *cpa, int primary)
         unsigned int level;
         pte_t *kpte, old_pte;
 
-        if (cpa->flags & CPA_ARRAY)
+        if (cpa->flags & CPA_PAGES_ARRAY)
+                address = (unsigned long)page_address(cpa->pages[cpa->curpage]);
+        else if (cpa->flags & CPA_ARRAY)
                 address = cpa->vaddr[cpa->curpage];
         else
                 address = *cpa->vaddr;
@@ -687,7 +700,9 @@ static int cpa_process_alias(struct cpa_data *cpa)
          * No need to redo, when the primary call touched the direct
          * mapping already:
          */
-        if (cpa->flags & CPA_ARRAY)
+        if (cpa->flags & CPA_PAGES_ARRAY)
+                vaddr = (unsigned long)page_address(cpa->pages[cpa->curpage]);
+        else if (cpa->flags & CPA_ARRAY)
                 vaddr = cpa->vaddr[cpa->curpage];
         else
                 vaddr = *cpa->vaddr;
@@ -698,7 +713,7 @@ static int cpa_process_alias(struct cpa_data *cpa)
                 alias_cpa = *cpa;
                 temp_cpa_vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
                 alias_cpa.vaddr = &temp_cpa_vaddr;
-                alias_cpa.flags &= ~CPA_ARRAY;
+                alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 
 
                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
@@ -711,7 +726,7 @@ static int cpa_process_alias(struct cpa_data *cpa)
          * No need to redo, when the primary call touched the high
          * mapping already:
          */
-        if (within(vaddr, (unsigned long) _text, (unsigned long) _end))
+        if (within(vaddr, (unsigned long) _text, _brk_end))
                 return 0;
 
         /*
@@ -724,7 +739,7 @@ static int cpa_process_alias(struct cpa_data *cpa)
         alias_cpa = *cpa;
         temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
         alias_cpa.vaddr = &temp_cpa_vaddr;
-        alias_cpa.flags &= ~CPA_ARRAY;
+        alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 
         /*
          * The high mapping range is imprecise, so ignore the return value.
@@ -745,7 +760,7 @@ static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
                  */
                 cpa->numpages = numpages;
                 /* for array changes, we can't use large page */
-                if (cpa->flags & CPA_ARRAY)
+                if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
                         cpa->numpages = 1;
 
                 if (!debug_pagealloc)
@@ -769,7 +784,7 @@ static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
                  */
                 BUG_ON(cpa->numpages > numpages);
                 numpages -= cpa->numpages;
-                if (cpa->flags & CPA_ARRAY)
+                if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
                         cpa->curpage++;
                 else
                         *cpa->vaddr += cpa->numpages * PAGE_SIZE;
@@ -786,7 +801,8 @@ static inline int cache_attr(pgprot_t attr)
 
 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
                                     pgprot_t mask_set, pgprot_t mask_clr,
-                                    int force_split, int array)
+                                    int force_split, int in_flag,
+                                    struct page **pages)
 {
         struct cpa_data cpa;
         int ret, cache, checkalias;
@@ -801,15 +817,7 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
                 return 0;
 
         /* Ensure we are PAGE_SIZE aligned */
-        if (!array) {
-                if (*addr & ~PAGE_MASK) {
-                        *addr &= PAGE_MASK;
-                        /*
-                         * People should not be passing in unaligned addresses:
-                         */
-                        WARN_ON_ONCE(1);
-                }
-        } else {
+        if (in_flag & CPA_ARRAY) {
                 int i;
                 for (i = 0; i < numpages; i++) {
                         if (addr[i] & ~PAGE_MASK) {
@@ -817,6 +825,18 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
                                 WARN_ON_ONCE(1);
                         }
                 }
+        } else if (!(in_flag & CPA_PAGES_ARRAY)) {
+                /*
+                 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
+                 * No need to cehck in that case
+                 */
+                if (*addr & ~PAGE_MASK) {
+                        *addr &= PAGE_MASK;
+                        /*
+                         * People should not be passing in unaligned addresses:
+                         */
+                        WARN_ON_ONCE(1);
+                }
         }
 
         /* Must avoid aliasing mappings in the highmem code */
@@ -832,6 +852,7 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
         arch_flush_lazy_mmu_mode();
 
         cpa.vaddr = addr;
+        cpa.pages = pages;
         cpa.numpages = numpages;
         cpa.mask_set = mask_set;
         cpa.mask_clr = mask_clr;
@@ -839,8 +860,8 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
         cpa.curpage = 0;
         cpa.force_split = force_split;
 
-        if (array)
-                cpa.flags |= CPA_ARRAY;
+        if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
+                cpa.flags |= in_flag;
 
         /* No alias checking for _NX bit modifications */
         checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
@@ -866,9 +887,10 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
          * wbindv):
          */
         if (!ret && cpu_has_clflush) {
-                if (cpa.flags & CPA_ARRAY)
-                        cpa_flush_array(addr, numpages, cache);
-                else
+                if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
+                        cpa_flush_array(addr, numpages, cache,
+                                        cpa.flags, pages);
+                } else
                         cpa_flush_range(*addr, numpages, cache);
         } else
                 cpa_flush_all(cache);
@@ -888,14 +910,28 @@ static inline int change_page_attr_set(unsigned long *addr, int numpages,
                                        pgprot_t mask, int array)
 {
         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
-                array);
+                (array ? CPA_ARRAY : 0), NULL);
 }
 
 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
                                          pgprot_t mask, int array)
 {
         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
-                array);
+                (array ? CPA_ARRAY : 0), NULL);
+}
+
+static inline int cpa_set_pages_array(struct page **pages, int numpages,
+                                       pgprot_t mask)
+{
+        return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
+                CPA_PAGES_ARRAY, pages);
+}
+
+static inline int cpa_clear_pages_array(struct page **pages, int numpages,
+                                         pgprot_t mask)
+{
+        return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
+                CPA_PAGES_ARRAY, pages);
 }
 
 int _set_memory_uc(unsigned long addr, int numpages)
@@ -1043,7 +1079,7 @@ int set_memory_np(unsigned long addr, int numpages)
 int set_memory_4k(unsigned long addr, int numpages)
 {
         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
-                                        __pgprot(0), 1, 0);
+                                        __pgprot(0), 1, 0, NULL);
 }
 
 int set_pages_uc(struct page *page, int numpages)
@@ -1054,6 +1090,35 @@ int set_pages_uc(struct page *page, int numpages)
 }
 EXPORT_SYMBOL(set_pages_uc);
 
+int set_pages_array_uc(struct page **pages, int addrinarray)
+{
+        unsigned long start;
+        unsigned long end;
+        int i;
+        int free_idx;
+
+        for (i = 0; i < addrinarray; i++) {
+                start = (unsigned long)page_address(pages[i]);
+                end = start + PAGE_SIZE;
+                if (reserve_memtype(start, end, _PAGE_CACHE_UC_MINUS, NULL))
+                        goto err_out;
+        }
+
+        if (cpa_set_pages_array(pages, addrinarray,
+                        __pgprot(_PAGE_CACHE_UC_MINUS)) == 0) {
+                return 0; /* Success */
+        }
+err_out:
+        free_idx = i;
+        for (i = 0; i < free_idx; i++) {
+                start = (unsigned long)page_address(pages[i]);
+                end = start + PAGE_SIZE;
+                free_memtype(start, end);
+        }
+        return -EINVAL;
+}
+EXPORT_SYMBOL(set_pages_array_uc);
+
 int set_pages_wb(struct page *page, int numpages)
 {
         unsigned long addr = (unsigned long)page_address(page);
@@ -1062,6 +1127,26 @@ int set_pages_wb(struct page *page, int numpages)
 }
 EXPORT_SYMBOL(set_pages_wb);
 
+int set_pages_array_wb(struct page **pages, int addrinarray)
+{
+        int retval;
+        unsigned long start;
+        unsigned long end;
+        int i;
+
+        retval = cpa_clear_pages_array(pages, addrinarray,
+                        __pgprot(_PAGE_CACHE_MASK));
+
+        for (i = 0; i < addrinarray; i++) {
+                start = (unsigned long)page_address(pages[i]);
+                end = start + PAGE_SIZE;
+                free_memtype(start, end);
+        }
+
+        return retval;
+}
+EXPORT_SYMBOL(set_pages_array_wb);
+
 int set_pages_x(struct page *page, int numpages)
 {
         unsigned long addr = (unsigned long)page_address(page);
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 2ed37158012d..640339ee4fb2 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -677,10 +677,11 @@ static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
         is_ram = pat_pagerange_is_ram(paddr, paddr + size);
 
         /*
-         * reserve_pfn_range() doesn't support RAM pages.
+         * reserve_pfn_range() doesn't support RAM pages. Maintain the current
+         * behavior with RAM pages by returning success.
          */
         if (is_ram != 0)
-                return -EINVAL;
+                return 0;
 
         ret = reserve_memtype(paddr, paddr + size, want_flags, &flags);
         if (ret)
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c
index f2e477c91c1b..46c8834aedc0 100644
--- a/arch/x86/mm/pgtable_32.c
+++ b/arch/x86/mm/pgtable_32.c
@@ -50,7 +50,7 @@ void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
         }
         pte = pte_offset_kernel(pmd, vaddr);
         if (pte_val(pteval))
-                set_pte_present(&init_mm, vaddr, pte, pteval);
+                set_pte_at(&init_mm, vaddr, pte, pteval);
         else
                 pte_clear(&init_mm, vaddr, pte);
 
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index a654d59e4483..821e97017e95 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -187,11 +187,6 @@ static void flush_tlb_others_ipi(const struct cpumask *cpumask,
                        cpumask, cpumask_of(smp_processor_id()));
 
         /*
-         * Make the above memory operations globally visible before
-         * sending the IPI.
-         */
-        smp_mb();
-        /*
          * We have to send the IPI only to
          * CPUs affected.
          */
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 82d22fc601ae..8c362b96b644 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -90,7 +90,7 @@ static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
         return 0;
 }
 
-static struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitdata = {
+static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitconst = {
 /*
  * Systems where PCI IO resource ISA alignment can be skipped
  * when the ISA enable bit in the bridge control is not set
@@ -183,7 +183,7 @@ static int __devinit assign_all_busses(const struct dmi_system_id *d)
 }
 #endif
 
-static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
+static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
 #ifdef __i386__
 /*
  * Laptops which need pci=assign-busses to see Cardbus cards
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index 7d388d5cf548..9c49919e4d1c 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -356,7 +356,7 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev)
 DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
 
 
-static struct dmi_system_id __devinitdata msi_k8t_dmi_table[] = {
+static const struct dmi_system_id __devinitconst msi_k8t_dmi_table[] = {
         {
                 .ident = "MSI-K8T-Neo2Fir",
                 .matches = {
@@ -413,7 +413,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237,
  */
 static u16 toshiba_line_size;
 
-static struct dmi_system_id __devinitdata toshiba_ohci1394_dmi_table[] = {
+static const struct dmi_system_id __devinitconst toshiba_ohci1394_dmi_table[] = {
         {
                 .ident = "Toshiba PS5 based laptop",
                 .matches = {
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 5ead808dd70c..f234a37bd428 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -319,6 +319,9 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
                         return -EINVAL;
                 }
                 flags = new_flags;
+                vma->vm_page_prot = __pgprot(
+                        (pgprot_val(vma->vm_page_prot) & ~_PAGE_CACHE_MASK) |
+                        flags);
         }
 
         if (((vma->vm_pgoff < max_low_pfn_mapped) ||
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index cb6afa4ec95c..db3802fb7b84 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -1723,9 +1723,9 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
 {
         pmd_t *kernel_pmd;
 
-        init_pg_tables_start = __pa(pgd);
-        init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
-        max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
+        max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
+                                  xen_start_info->nr_pt_frames * PAGE_SIZE +
+                                  512*1024);
 
         kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
         memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
@@ -1870,7 +1870,6 @@ const struct pv_mmu_ops xen_mmu_ops __initdata = {
 
 #ifdef CONFIG_X86_PAE
         .set_pte_atomic = xen_set_pte_atomic,
-        .set_pte_present = xen_set_pte_at,
         .pte_clear = xen_pte_clear,
         .pmd_clear = xen_pmd_clear,
 #endif  /* CONFIG_X86_PAE */