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-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts34
-rw-r--r--arch/arm/boot/dts/imx53.dtsi90
2 files changed, 122 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index a0e816f2182b..08948af86d1a 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -25,6 +25,8 @@
25 aips@50000000 { /* AIPS1 */ 25 aips@50000000 { /* AIPS1 */
26 spba@50000000 { 26 spba@50000000 {
27 esdhc@50004000 { /* ESDHC1 */ 27 esdhc@50004000 { /* ESDHC1 */
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_esdhc1_1>;
28 cd-gpios = <&gpio3 13 0>; 30 cd-gpios = <&gpio3 13 0>;
29 status = "okay"; 31 status = "okay";
30 }; 32 };
@@ -35,6 +37,8 @@
35 }; 37 };
36 38
37 esdhc@50020000 { /* ESDHC3 */ 39 esdhc@50020000 { /* ESDHC3 */
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_esdhc3_1>;
38 cd-gpios = <&gpio3 11 0>; 42 cd-gpios = <&gpio3 11 0>;
39 wp-gpios = <&gpio3 12 0>; 43 wp-gpios = <&gpio3 12 0>;
40 status = "okay"; 44 status = "okay";
@@ -42,17 +46,37 @@
42 }; 46 };
43 47
44 iomuxc@53fa8000 { 48 iomuxc@53fa8000 {
45 compatible = "fsl,imx53-iomuxc-qsb"; 49 pinctrl-names = "default";
46 reg = <0x53fa8000 0x4000>; 50 pinctrl-0 = <&pinctrl_hog>;
51
52 hog {
53 pinctrl_hog: hoggrp {
54 fsl,pins = <
55 1071 0x80000000 /* MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK */
56 1141 0x80000000 /* MX53_PAD_GPIO_8__GPIO1_8 */
57 982 0x80000000 /* MX53_PAD_PATA_DATA14__GPIO2_14 */
58 989 0x80000000 /* MX53_PAD_PATA_DATA15__GPIO2_15 */
59 693 0x80000000 /* MX53_PAD_EIM_DA11__GPIO3_11 */
60 697 0x80000000 /* MX53_PAD_EIM_DA12__GPIO3_12 */
61 701 0x80000000 /* MX53_PAD_EIM_DA13__GPIO3_13 */
62 868 0x80000000 /* MX53_PAD_PATA_DA_0__GPIO7_6 */
63 873 0x80000000 /* MX53_PAD_PATA_DA_1__GPIO7_7 */
64 >;
65 };
66 };
47 }; 67 };
48 68
49 uart1: serial@53fbc000 { 69 uart1: serial@53fbc000 {
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_uart1_1>;
50 status = "okay"; 72 status = "okay";
51 }; 73 };
52 }; 74 };
53 75
54 aips@60000000 { /* AIPS2 */ 76 aips@60000000 { /* AIPS2 */
55 i2c@63fc4000 { /* I2C2 */ 77 i2c@63fc4000 { /* I2C2 */
78 pinctrl-names = "default";
79 pinctrl-0 = <&pinctrl_i2c2_1>;
56 status = "okay"; 80 status = "okay";
57 81
58 sgtl5000: codec@0a { 82 sgtl5000: codec@0a {
@@ -64,6 +88,8 @@
64 }; 88 };
65 89
66 i2c@63fc8000 { /* I2C1 */ 90 i2c@63fc8000 { /* I2C1 */
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_i2c1_1>;
67 status = "okay"; 93 status = "okay";
68 94
69 accelerometer: mma8450@1c { 95 accelerometer: mma8450@1c {
@@ -150,10 +176,14 @@
150 }; 176 };
151 177
152 audmux@63fd0000 { 178 audmux@63fd0000 {
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_audmux_1>;
153 status = "okay"; 181 status = "okay";
154 }; 182 };
155 183
156 ethernet@63fec000 { 184 ethernet@63fec000 {
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_fec_1>;
157 phy-mode = "rmii"; 187 phy-mode = "rmii";
158 phy-reset-gpios = <&gpio7 6 0>; 188 phy-reset-gpios = <&gpio7 6 0>;
159 status = "okay"; 189 status = "okay";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 776ce410d057..01fa49abab6d 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -216,6 +216,96 @@
216 status = "disabled"; 216 status = "disabled";
217 }; 217 };
218 218
219 iomuxc@53fa8000 {
220 compatible = "fsl,imx53-iomuxc";
221 reg = <0x53fa8000 0x4000>;
222
223 audmux {
224 pinctrl_audmux_1: audmuxgrp-1 {
225 fsl,pins = <
226 10 0x80000000 /* MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC */
227 17 0x80000000 /* MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD */
228 23 0x80000000 /* MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS */
229 30 0x80000000 /* MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD */
230 >;
231 };
232 };
233
234 fec {
235 pinctrl_fec_1: fecgrp-1 {
236 fsl,pins = <
237 820 0x80000000 /* MX53_PAD_FEC_MDC__FEC_MDC */
238 779 0x80000000 /* MX53_PAD_FEC_MDIO__FEC_MDIO */
239 786 0x80000000 /* MX53_PAD_FEC_REF_CLK__FEC_TX_CLK */
240 791 0x80000000 /* MX53_PAD_FEC_RX_ER__FEC_RX_ER */
241 796 0x80000000 /* MX53_PAD_FEC_CRS_DV__FEC_RX_DV */
242 799 0x80000000 /* MX53_PAD_FEC_RXD1__FEC_RDATA_1 */
243 804 0x80000000 /* MX53_PAD_FEC_RXD0__FEC_RDATA_0 */
244 808 0x80000000 /* MX53_PAD_FEC_TX_EN__FEC_TX_EN */
245 811 0x80000000 /* MX53_PAD_FEC_TXD1__FEC_TDATA_1 */
246 816 0x80000000 /* MX53_PAD_FEC_TXD0__FEC_TDATA_0 */
247 >;
248 };
249 };
250
251 esdhc1 {
252 pinctrl_esdhc1_1: esdhc1grp-1 {
253 fsl,pins = <
254 995 0x1d5 /* MX53_PAD_SD1_DATA0__ESDHC1_DAT0 */
255 1000 0x1d5 /* MX53_PAD_SD1_DATA1__ESDHC1_DAT1 */
256 1010 0x1d5 /* MX53_PAD_SD1_DATA2__ESDHC1_DAT2 */
257 1024 0x1d5 /* MX53_PAD_SD1_DATA3__ESDHC1_DAT3 */
258 1005 0x1d5 /* MX53_PAD_SD1_CMD__ESDHC1_CMD */
259 1018 0x1d5 /* MX53_PAD_SD1_CLK__ESDHC1_CLK */
260 >;
261 };
262 };
263
264 esdhc3 {
265 pinctrl_esdhc3_1: esdhc3grp-1 {
266 fsl,pins = <
267 943 0x1d5 /* MX53_PAD_PATA_DATA8__ESDHC3_DAT0 */
268 950 0x1d5 /* MX53_PAD_PATA_DATA9__ESDHC3_DAT1 */
269 957 0x1d5 /* MX53_PAD_PATA_DATA10__ESDHC3_DAT2 */
270 964 0x1d5 /* MX53_PAD_PATA_DATA11__ESDHC3_DAT3 */
271 893 0x1d5 /* MX53_PAD_PATA_DATA0__ESDHC3_DAT4 */
272 900 0x1d5 /* MX53_PAD_PATA_DATA1__ESDHC3_DAT5 */
273 906 0x1d5 /* MX53_PAD_PATA_DATA2__ESDHC3_DAT6 */
274 912 0x1d5 /* MX53_PAD_PATA_DATA3__ESDHC3_DAT7 */
275 857 0x1d5 /* MX53_PAD_PATA_RESET_B__ESDHC3_CMD */
276 863 0x1d5 /* MX53_PAD_PATA_IORDY__ESDHC3_CLK */
277 >;
278 };
279 };
280
281 i2c1 {
282 pinctrl_i2c1_1: i2c1grp-1 {
283 fsl,pins = <
284 333 0xc0000000 /* MX53_PAD_CSI0_DAT8__I2C1_SDA */
285 341 0xc0000000 /* MX53_PAD_CSI0_DAT9__I2C1_SCL */
286 >;
287 };
288 };
289
290 i2c2 {
291 pinctrl_i2c2_1: i2c2grp-1 {
292 fsl,pins = <
293 61 0xc0000000 /* MX53_PAD_KEY_ROW3__I2C2_SDA */
294 53 0xc0000000 /* MX53_PAD_KEY_COL3__I2C2_SCL */
295 >;
296 };
297 };
298
299 uart1 {
300 pinctrl_uart1_1: uart1grp-1 {
301 fsl,pins = <
302 346 0x1c5 /* MX53_PAD_CSI0_DAT10__UART1_TXD_MUX */
303 354 0x1c5 /* MX53_PAD_CSI0_DAT11__UART1_RXD_MUX */
304 >;
305 };
306 };
307 };
308
219 uart1: serial@53fbc000 { 309 uart1: serial@53fbc000 {
220 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 310 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
221 reg = <0x53fbc000 0x4000>; 311 reg = <0x53fbc000 0x4000>;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-19 01:41:30 -0500