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-rw-r--r--arch/arm/Kconfig9
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mach-nomadik/Kconfig2
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c13
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c2
-rw-r--r--arch/arm/mach-nomadik/i2c-8815nhk.c3
-rw-r--r--arch/arm/mach-nomadik/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-ux500/Kconfig2
-rw-r--r--arch/arm/mach-ux500/board-mop500-audio.c6
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c3
-rw-r--r--arch/arm/mach-ux500/board-mop500-sdi.c2
-rw-r--r--arch/arm/mach-ux500/board-mop500.c6
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c5
-rw-r--r--arch/arm/mach-ux500/devices-common.c4
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c4
-rw-r--r--arch/arm/mach-ux500/devices-db8500.h1
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-ux500/include/mach/msp.h2
-rw-r--r--arch/arm/mach-ux500/timer.c5
-rw-r--r--arch/arm/mach-ux500/usb.c4
-rw-r--r--arch/arm/mach-vt8500/Kconfig12
-rw-r--r--arch/arm/mach-vt8500/common.h3
-rw-r--r--arch/arm/mach-vt8500/include/mach/entry-macro.S26
-rw-r--r--arch/arm/mach-vt8500/include/mach/irqs.h22
-rw-r--r--arch/arm/mach-vt8500/irq.c108
-rw-r--r--arch/arm/mach-vt8500/vt8500.c1
-rw-r--r--arch/arm/plat-nomadik/Kconfig29
-rw-r--r--arch/arm/plat-nomadik/Makefile5
-rw-r--r--arch/arm/plat-nomadik/include/plat/gpio-nomadik.h102
-rw-r--r--arch/arm/plat-nomadik/include/plat/mtu.h9
-rw-r--r--arch/arm/plat-nomadik/include/plat/pincfg.h173
-rw-r--r--arch/arm/plat-nomadik/include/plat/ste_dma40.h223
-rw-r--r--arch/arm/plat-nomadik/timer.c223
33 files changed, 123 insertions, 891 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 22d7a545f55f..9277f503481c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -886,6 +886,7 @@ config ARCH_U8500
886 select GENERIC_CLOCKEVENTS 886 select GENERIC_CLOCKEVENTS
887 select HAVE_SMP 887 select HAVE_SMP
888 select MIGHT_HAVE_CACHE_L2X0 888 select MIGHT_HAVE_CACHE_L2X0
889 select SPARSE_IRQ
889 help 890 help
890 Support for ST-Ericsson's Ux500 architecture 891 Support for ST-Ericsson's Ux500 architecture
891 892
@@ -900,6 +901,7 @@ config ARCH_NOMADIK
900 select MIGHT_HAVE_CACHE_L2X0 901 select MIGHT_HAVE_CACHE_L2X0
901 select PINCTRL 902 select PINCTRL
902 select PINCTRL_STN8815 903 select PINCTRL_STN8815
904 select SPARSE_IRQ
903 help 905 help
904 Support for the Nomadik platform by ST-Ericsson 906 Support for the Nomadik platform by ST-Ericsson
905 907
@@ -942,7 +944,7 @@ config ARCH_OMAP
942 help 944 help
943 Support for TI's OMAP platform (OMAP1/2/3/4). 945 Support for TI's OMAP platform (OMAP1/2/3/4).
944 946
945config ARCH_VT8500 947config ARCH_VT8500_SINGLE
946 bool "VIA/WonderMedia 85xx" 948 bool "VIA/WonderMedia 85xx"
947 select ARCH_HAS_CPUFREQ 949 select ARCH_HAS_CPUFREQ
948 select ARCH_REQUIRE_GPIOLIB 950 select ARCH_REQUIRE_GPIOLIB
@@ -952,6 +954,8 @@ config ARCH_VT8500
952 select GENERIC_CLOCKEVENTS 954 select GENERIC_CLOCKEVENTS
953 select GENERIC_GPIO 955 select GENERIC_GPIO
954 select HAVE_CLK 956 select HAVE_CLK
957 select MULTI_IRQ_HANDLER
958 select SPARSE_IRQ
955 select USE_OF 959 select USE_OF
956 help 960 help
957 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 961 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
@@ -1066,7 +1070,6 @@ source "arch/arm/mach-mxs/Kconfig"
1066source "arch/arm/mach-netx/Kconfig" 1070source "arch/arm/mach-netx/Kconfig"
1067 1071
1068source "arch/arm/mach-nomadik/Kconfig" 1072source "arch/arm/mach-nomadik/Kconfig"
1069source "arch/arm/plat-nomadik/Kconfig"
1070 1073
1071source "arch/arm/plat-omap/Kconfig" 1074source "arch/arm/plat-omap/Kconfig"
1072 1075
@@ -1127,6 +1130,8 @@ source "arch/arm/mach-versatile/Kconfig"
1127source "arch/arm/mach-vexpress/Kconfig" 1130source "arch/arm/mach-vexpress/Kconfig"
1128source "arch/arm/plat-versatile/Kconfig" 1131source "arch/arm/plat-versatile/Kconfig"
1129 1132
1133source "arch/arm/mach-vt8500/Kconfig"
1134
1130source "arch/arm/mach-w90x900/Kconfig" 1135source "arch/arm/mach-w90x900/Kconfig"
1131 1136
1132# Definitions to make life easier 1137# Definitions to make life easier
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 5f914fca911b..89087d599ad2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -201,7 +201,6 @@ plat-$(CONFIG_ARCH_OMAP) += omap
201plat-$(CONFIG_ARCH_S3C64XX) += samsung 201plat-$(CONFIG_ARCH_S3C64XX) += samsung
202plat-$(CONFIG_ARCH_ZYNQ) += versatile 202plat-$(CONFIG_ARCH_ZYNQ) += versatile
203plat-$(CONFIG_PLAT_IOP) += iop 203plat-$(CONFIG_PLAT_IOP) += iop
204plat-$(CONFIG_PLAT_NOMADIK) += nomadik
205plat-$(CONFIG_PLAT_ORION) += orion 204plat-$(CONFIG_PLAT_ORION) += orion
206plat-$(CONFIG_PLAT_PXA) += pxa 205plat-$(CONFIG_PLAT_PXA) += pxa
207plat-$(CONFIG_PLAT_S3C24XX) += s3c24xx samsung 206plat-$(CONFIG_PLAT_S3C24XX) += s3c24xx samsung
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index c744946ef022..706dc5727bbe 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -4,7 +4,7 @@ menu "Nomadik boards"
4 4
5config MACH_NOMADIK_8815NHK 5config MACH_NOMADIK_8815NHK
6 bool "ST 8815 Nomadik Hardware Kit (evaluation board)" 6 bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
7 select HAS_MTU 7 select CLKSRC_NOMADIK_MTU
8 select NOMADIK_8815 8 select NOMADIK_8815
9 9
10endmenu 10endmenu
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index bfa1eab91f41..5ccdf53c5a9d 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -24,20 +24,17 @@
24#include <linux/i2c.h> 24#include <linux/i2c.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/pinctrl/machine.h> 26#include <linux/pinctrl/machine.h>
27#include <linux/platform_data/pinctrl-nomadik.h>
28#include <linux/platform_data/clocksource-nomadik-mtu.h>
29#include <linux/platform_data/mtd-nomadik-nand.h>
27#include <asm/hardware/vic.h> 30#include <asm/hardware/vic.h>
28#include <asm/sizes.h> 31#include <asm/sizes.h>
29#include <asm/mach-types.h> 32#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 33#include <asm/mach/arch.h>
31#include <asm/mach/irq.h>
32#include <asm/mach/flash.h> 34#include <asm/mach/flash.h>
33#include <asm/mach/time.h> 35#include <asm/mach/time.h>
34
35#include <plat/gpio-nomadik.h>
36#include <plat/mtu.h>
37#include <plat/pincfg.h>
38
39#include <linux/platform_data/mtd-nomadik-nand.h>
40#include <mach/fsmc.h> 36#include <mach/fsmc.h>
37#include <mach/irqs.h>
41 38
42#include "cpu-8815.h" 39#include "cpu-8815.h"
43 40
@@ -261,7 +258,7 @@ static void __init nomadik_timer_init(void)
261 src_cr |= SRC_CR_INIT_VAL; 258 src_cr |= SRC_CR_INIT_VAL;
262 writel(src_cr, io_p2v(NOMADIK_SRC_BASE)); 259 writel(src_cr, io_p2v(NOMADIK_SRC_BASE));
263 260
264 nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE)); 261 nmdk_timer_init(io_p2v(NOMADIK_MTU0_BASE), IRQ_MTU0);
265} 262}
266 263
267static struct sys_timer nomadik_timer = { 264static struct sys_timer nomadik_timer = {
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index b617eaed0ce5..1273931303fb 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -26,8 +26,8 @@
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
28#include <linux/platform_data/clk-nomadik.h> 28#include <linux/platform_data/clk-nomadik.h>
29#include <linux/platform_data/pinctrl-nomadik.h>
29 30
30#include <plat/gpio-nomadik.h>
31#include <mach/hardware.h> 31#include <mach/hardware.h>
32#include <mach/irqs.h> 32#include <mach/irqs.h>
33#include <asm/mach/map.h> 33#include <asm/mach/map.h>
diff --git a/arch/arm/mach-nomadik/i2c-8815nhk.c b/arch/arm/mach-nomadik/i2c-8815nhk.c
index 6d14454d4609..0c2f6628299a 100644
--- a/arch/arm/mach-nomadik/i2c-8815nhk.c
+++ b/arch/arm/mach-nomadik/i2c-8815nhk.c
@@ -4,8 +4,7 @@
4#include <linux/i2c-algo-bit.h> 4#include <linux/i2c-algo-bit.h>
5#include <linux/i2c-gpio.h> 5#include <linux/i2c-gpio.h>
6#include <linux/platform_device.h> 6#include <linux/platform_device.h>
7#include <plat/gpio-nomadik.h> 7#include <linux/platform_data/pinctrl-nomadik.h>
8#include <plat/pincfg.h>
9 8
10/* 9/*
11 * There are two busses in the 8815NHK. 10 * There are two busses in the 8815NHK.
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h
index a118e615f865..b549d0571548 100644
--- a/arch/arm/mach-nomadik/include/mach/irqs.h
+++ b/arch/arm/mach-nomadik/include/mach/irqs.h
@@ -72,7 +72,7 @@
72#define NOMADIK_NR_GPIO 128 /* last 4 not wired to pins */ 72#define NOMADIK_NR_GPIO 128 /* last 4 not wired to pins */
73#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + NOMADIK_GPIO_OFFSET) 73#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + NOMADIK_GPIO_OFFSET)
74#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - NOMADIK_GPIO_OFFSET) 74#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - NOMADIK_GPIO_OFFSET)
75#define NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO) 75#define NOMADIK_NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)
76 76
77/* Following two are used by entry_macro.S, to access our dual-vic */ 77/* Following two are used by entry_macro.S, to access our dual-vic */
78#define VIC_REG_IRQSR0 0 78#define VIC_REG_IRQSR0 0
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index e8c3f0d70ca6..5dea90636d94 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -7,8 +7,8 @@ config UX500_SOC_COMMON
7 select ARM_ERRATA_764369 if SMP 7 select ARM_ERRATA_764369 if SMP
8 select ARM_GIC 8 select ARM_GIC
9 select CACHE_L2X0 9 select CACHE_L2X0
10 select CLKSRC_NOMADIK_MTU
10 select COMMON_CLK 11 select COMMON_CLK
11 select HAS_MTU
12 select PINCTRL 12 select PINCTRL
13 select PINCTRL_NOMADIK 13 select PINCTRL_NOMADIK
14 select PL310_ERRATA_753970 if CACHE_PL310 14 select PL310_ERRATA_753970 if CACHE_PL310
diff --git a/arch/arm/mach-ux500/board-mop500-audio.c b/arch/arm/mach-ux500/board-mop500-audio.c
index 070629a95625..71a2ca726476 100644
--- a/arch/arm/mach-ux500/board-mop500-audio.c
+++ b/arch/arm/mach-ux500/board-mop500-audio.c
@@ -7,10 +7,8 @@
7#include <linux/platform_device.h> 7#include <linux/platform_device.h>
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/gpio.h> 9#include <linux/gpio.h>
10 10#include <linux/platform_data/pinctrl-nomadik.h>
11#include <plat/gpio-nomadik.h> 11#include <linux/platform_data/dma-ste-dma40.h>
12#include <plat/pincfg.h>
13#include <plat/ste_dma40.h>
14 12
15#include <mach/devices.h> 13#include <mach/devices.h>
16#include <mach/hardware.h> 14#include <mach/hardware.h>
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index a267c6d30e37..c34d4efd0d5c 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -9,10 +9,9 @@
9#include <linux/bug.h> 9#include <linux/bug.h>
10#include <linux/string.h> 10#include <linux/string.h>
11#include <linux/pinctrl/machine.h> 11#include <linux/pinctrl/machine.h>
12#include <linux/platform_data/pinctrl-nomadik.h>
12 13
13#include <asm/mach-types.h> 14#include <asm/mach-types.h>
14#include <plat/pincfg.h>
15#include <plat/gpio-nomadik.h>
16 15
17#include <mach/hardware.h> 16#include <mach/hardware.h>
18 17
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 9c8e4a9e83ee..051b62c27102 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -11,9 +11,9 @@
11#include <linux/amba/mmci.h> 11#include <linux/amba/mmci.h>
12#include <linux/mmc/host.h> 12#include <linux/mmc/host.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/platform_data/dma-ste-dma40.h>
14 15
15#include <asm/mach-types.h> 16#include <asm/mach-types.h>
16#include <plat/ste_dma40.h>
17#include <mach/devices.h> 17#include <mach/devices.h>
18#include <mach/hardware.h> 18#include <mach/hardware.h>
19 19
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 416d436111f2..92680569bfc6 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -1,4 +1,3 @@
1
2/* 1/*
3 * Copyright (C) 2008-2009 ST-Ericsson 2 * Copyright (C) 2008-2009 ST-Ericsson
4 * 3 *
@@ -37,14 +36,13 @@
37#include <linux/of_platform.h> 36#include <linux/of_platform.h>
38#include <linux/leds.h> 37#include <linux/leds.h>
39#include <linux/pinctrl/consumer.h> 38#include <linux/pinctrl/consumer.h>
39#include <linux/platform_data/pinctrl-nomadik.h>
40#include <linux/platform_data/dma-ste-dma40.h>
40 41
41#include <asm/mach-types.h> 42#include <asm/mach-types.h>
42#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
43#include <asm/hardware/gic.h> 44#include <asm/hardware/gic.h>
44 45
45#include <plat/ste_dma40.h>
46#include <plat/gpio-nomadik.h>
47
48#include <mach/hardware.h> 46#include <mach/hardware.h>
49#include <mach/setup.h> 47#include <mach/setup.h>
50#include <mach/devices.h> 48#include <mach/devices.h>
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index bcdfe6b1d453..8bff078c617c 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -17,15 +17,16 @@
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/mfd/abx500/ab8500.h> 19#include <linux/mfd/abx500/ab8500.h>
20#include <linux/platform_data/usb-musb-ux500.h>
21#include <linux/platform_data/pinctrl-nomadik.h>
20 22
21#include <asm/pmu.h> 23#include <asm/pmu.h>
22#include <asm/mach/map.h> 24#include <asm/mach/map.h>
23#include <plat/gpio-nomadik.h>
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <mach/setup.h> 26#include <mach/setup.h>
26#include <mach/devices.h> 27#include <mach/devices.h>
27#include <linux/platform_data/usb-musb-ux500.h>
28#include <mach/db8500-regs.h> 28#include <mach/db8500-regs.h>
29#include <mach/irqs.h>
29 30
30#include "devices-db8500.h" 31#include "devices-db8500.h"
31#include "ste-dma40-db8500.h" 32#include "ste-dma40-db8500.h"
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c
index dfdd4a54668d..16b5f71e6974 100644
--- a/arch/arm/mach-ux500/devices-common.c
+++ b/arch/arm/mach-ux500/devices-common.c
@@ -11,10 +11,10 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/slab.h> 12#include <linux/slab.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14 14#include <linux/platform_data/pinctrl-nomadik.h>
15#include <plat/gpio-nomadik.h>
16 15
17#include <mach/hardware.h> 16#include <mach/hardware.h>
17#include <mach/irqs.h>
18 18
19#include "devices-common.h" 19#include "devices-common.h"
20 20
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index 91754a8a0d49..318d49020894 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -12,11 +12,11 @@
12#include <linux/gpio.h> 12#include <linux/gpio.h>
13#include <linux/amba/bus.h> 13#include <linux/amba/bus.h>
14#include <linux/amba/pl022.h> 14#include <linux/amba/pl022.h>
15 15#include <linux/platform_data/dma-ste-dma40.h>
16#include <plat/ste_dma40.h>
17 16
18#include <mach/hardware.h> 17#include <mach/hardware.h>
19#include <mach/setup.h> 18#include <mach/setup.h>
19#include <mach/irqs.h>
20 20
21#include "ste-dma40-db8500.h" 21#include "ste-dma40-db8500.h"
22 22
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index 3c8010f4fb3f..4b24c9992654 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -8,6 +8,7 @@
8#ifndef __DEVICES_DB8500_H 8#ifndef __DEVICES_DB8500_H
9#define __DEVICES_DB8500_H 9#define __DEVICES_DB8500_H
10 10
11#include <mach/irqs.h>
11#include "devices-common.h" 12#include "devices-common.h"
12 13
13struct ske_keypad_platform_data; 14struct ske_keypad_platform_data;
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h
index e8928548b6a3..fc77b4274c8d 100644
--- a/arch/arm/mach-ux500/include/mach/irqs.h
+++ b/arch/arm/mach-ux500/include/mach/irqs.h
@@ -46,6 +46,6 @@
46#include <mach/irqs-board-mop500.h> 46#include <mach/irqs-board-mop500.h>
47#endif 47#endif
48 48
49#define NR_IRQS IRQ_BOARD_END 49#define UX500_NR_IRQS IRQ_BOARD_END
50 50
51#endif /* ASM_ARCH_IRQS_H */ 51#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-ux500/include/mach/msp.h b/arch/arm/mach-ux500/include/mach/msp.h
index 3cc7142eee02..9991aea3d577 100644
--- a/arch/arm/mach-ux500/include/mach/msp.h
+++ b/arch/arm/mach-ux500/include/mach/msp.h
@@ -8,7 +8,7 @@
8#ifndef __MSP_H 8#ifndef __MSP_H
9#define __MSP_H 9#define __MSP_H
10 10
11#include <plat/ste_dma40.h> 11#include <linux/platform_data/dma-ste-dma40.h>
12 12
13enum msp_i2s_id { 13enum msp_i2s_id {
14 MSP_I2S_0 = 0, 14 MSP_I2S_0 = 0,
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index 6f39731951b0..875309acb022 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -9,11 +9,10 @@
9#include <linux/clksrc-dbx500-prcmu.h> 9#include <linux/clksrc-dbx500-prcmu.h>
10#include <linux/of.h> 10#include <linux/of.h>
11#include <linux/of_address.h> 11#include <linux/of_address.h>
12#include <linux/platform_data/clocksource-nomadik-mtu.h>
12 13
13#include <asm/smp_twd.h> 14#include <asm/smp_twd.h>
14 15
15#include <plat/mtu.h>
16
17#include <mach/setup.h> 16#include <mach/setup.h>
18#include <mach/hardware.h> 17#include <mach/hardware.h>
19#include <mach/irqs.h> 18#include <mach/irqs.h>
@@ -96,7 +95,7 @@ dt_fail:
96 * 95 *
97 */ 96 */
98 97
99 nmdk_timer_init(mtu_timer_base); 98 nmdk_timer_init(mtu_timer_base, IRQ_MTU0);
100 clksrc_dbx500_prcmu_init(prcmu_timer_base); 99 clksrc_dbx500_prcmu_init(prcmu_timer_base);
101 ux500_twd_init(); 100 ux500_twd_init();
102} 101}
diff --git a/arch/arm/mach-ux500/usb.c b/arch/arm/mach-ux500/usb.c
index 145482e74418..78ac65f62e87 100644
--- a/arch/arm/mach-ux500/usb.c
+++ b/arch/arm/mach-ux500/usb.c
@@ -7,10 +7,10 @@
7#include <linux/platform_device.h> 7#include <linux/platform_device.h>
8#include <linux/usb/musb.h> 8#include <linux/usb/musb.h>
9#include <linux/dma-mapping.h> 9#include <linux/dma-mapping.h>
10#include <linux/platform_data/usb-musb-ux500.h>
11#include <linux/platform_data/dma-ste-dma40.h>
10 12
11#include <plat/ste_dma40.h>
12#include <mach/hardware.h> 13#include <mach/hardware.h>
13#include <linux/platform_data/usb-musb-ux500.h>
14 14
15#define MUSB_DMA40_RX_CH { \ 15#define MUSB_DMA40_RX_CH { \
16 .mode = STEDMA40_MODE_LOGICAL, \ 16 .mode = STEDMA40_MODE_LOGICAL, \
diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig
new file mode 100644
index 000000000000..2ed0b7d95db6
--- /dev/null
+++ b/arch/arm/mach-vt8500/Kconfig
@@ -0,0 +1,12 @@
1config ARCH_VT8500
2 bool "VIA/WonderMedia 85xx" if ARCH_MULTI_V5
3 default ARCH_VT8500_SINGLE
4 select ARCH_HAS_CPUFREQ
5 select ARCH_REQUIRE_GPIOLIB
6 select CLKDEV_LOOKUP
7 select CPU_ARM926T
8 select GENERIC_CLOCKEVENTS
9 select GENERIC_GPIO
10 select HAVE_CLK
11 help
12 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
diff --git a/arch/arm/mach-vt8500/common.h b/arch/arm/mach-vt8500/common.h
index 2b2419646e95..6f2b843115db 100644
--- a/arch/arm/mach-vt8500/common.h
+++ b/arch/arm/mach-vt8500/common.h
@@ -25,4 +25,7 @@ int __init vt8500_irq_init(struct device_node *node,
25/* defined in drivers/clk/clk-vt8500.c */ 25/* defined in drivers/clk/clk-vt8500.c */
26void __init vtwm_clk_init(void __iomem *pmc_base); 26void __init vtwm_clk_init(void __iomem *pmc_base);
27 27
28/* defined in irq.c */
29asmlinkage void vt8500_handle_irq(struct pt_regs *regs);
30
28#endif 31#endif
diff --git a/arch/arm/mach-vt8500/include/mach/entry-macro.S b/arch/arm/mach-vt8500/include/mach/entry-macro.S
deleted file mode 100644
index 367d1b55fb9a..000000000000
--- a/arch/arm/mach-vt8500/include/mach/entry-macro.S
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * arch/arm/mach-vt8500/include/mach/entry-macro.S
3 *
4 * Low-level IRQ helper macros for VIA VT8500
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 .macro get_irqnr_preamble, base, tmp
12 @ physical 0xd8140000 is virtual 0xf8140000
13 mov \base, #0xf8000000
14 orr \base, \base, #0x00140000
15 .endm
16
17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
18 ldr \irqnr, [\base]
19 cmp \irqnr, #63 @ may be false positive, check interrupt status
20 bne 1001f
21 ldr \irqstat, [\base, #0x84]
22 ands \irqstat, #0x80000000
23 moveq \irqnr, #0
241001:
25 .endm
26
diff --git a/arch/arm/mach-vt8500/include/mach/irqs.h b/arch/arm/mach-vt8500/include/mach/irqs.h
deleted file mode 100644
index a129fd1222fb..000000000000
--- a/arch/arm/mach-vt8500/include/mach/irqs.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/arm/mach-vt8500/include/mach/irqs.h
3 *
4 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/* This value is just to make the core happy, never used otherwise */
22#define NR_IRQS 128
diff --git a/arch/arm/mach-vt8500/irq.c b/arch/arm/mach-vt8500/irq.c
index f8f9ab9bc56e..b9cf5ce9efbb 100644
--- a/arch/arm/mach-vt8500/irq.c
+++ b/arch/arm/mach-vt8500/irq.c
@@ -36,7 +36,7 @@
36#include <linux/of_address.h> 36#include <linux/of_address.h>
37 37
38#include <asm/irq.h> 38#include <asm/irq.h>
39 39#include <asm/exception.h>
40 40
41#define VT8500_ICPC_IRQ 0x20 41#define VT8500_ICPC_IRQ 0x20
42#define VT8500_ICPC_FIQ 0x24 42#define VT8500_ICPC_FIQ 0x24
@@ -66,30 +66,34 @@
66#define VT8500_EDGE ( VT8500_TRIGGER_RISING \ 66#define VT8500_EDGE ( VT8500_TRIGGER_RISING \
67 | VT8500_TRIGGER_FALLING) 67 | VT8500_TRIGGER_FALLING)
68 68
69static int irq_cnt; 69/* vt8500 has 1 intc, wm8505 and wm8650 have 2 */
70#define VT8500_INTC_MAX 2
70 71
71struct vt8500_irq_priv { 72struct vt8500_irq_data {
72 void __iomem *base; 73 void __iomem *base; /* IO Memory base address */
74 struct irq_domain *domain; /* Domain for this controller */
73}; 75};
74 76
77/* Global variable for accessing io-mem addresses */
78static struct vt8500_irq_data intc[VT8500_INTC_MAX];
79static u32 active_cnt = 0;
80
75static void vt8500_irq_mask(struct irq_data *d) 81static void vt8500_irq_mask(struct irq_data *d)
76{ 82{
77 struct vt8500_irq_priv *priv = 83 struct vt8500_irq_data *priv = d->domain->host_data;
78 (struct vt8500_irq_priv *)(d->domain->host_data);
79 void __iomem *base = priv->base; 84 void __iomem *base = priv->base;
80 u8 edge; 85 void __iomem *stat_reg = base + VT8500_ICIS + (d->hwirq < 32 ? 0 : 4);
86 u8 edge, dctr;
87 u32 status;
81 88
82 edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE; 89 edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE;
83 if (edge) { 90 if (edge) {
84 void __iomem *stat_reg = base + VT8500_ICIS 91 status = readl(stat_reg);
85 + (d->hwirq < 32 ? 0 : 4);
86 unsigned status = readl(stat_reg);
87 92
88 status |= (1 << (d->hwirq & 0x1f)); 93 status |= (1 << (d->hwirq & 0x1f));
89 writel(status, stat_reg); 94 writel(status, stat_reg);
90 } else { 95 } else {
91 u8 dctr = readb(base + VT8500_ICDC + d->hwirq); 96 dctr = readb(base + VT8500_ICDC + d->hwirq);
92
93 dctr &= ~VT8500_INT_ENABLE; 97 dctr &= ~VT8500_INT_ENABLE;
94 writeb(dctr, base + VT8500_ICDC + d->hwirq); 98 writeb(dctr, base + VT8500_ICDC + d->hwirq);
95 } 99 }
@@ -97,8 +101,7 @@ static void vt8500_irq_mask(struct irq_data *d)
97 101
98static void vt8500_irq_unmask(struct irq_data *d) 102static void vt8500_irq_unmask(struct irq_data *d)
99{ 103{
100 struct vt8500_irq_priv *priv = 104 struct vt8500_irq_data *priv = d->domain->host_data;
101 (struct vt8500_irq_priv *)(d->domain->host_data);
102 void __iomem *base = priv->base; 105 void __iomem *base = priv->base;
103 u8 dctr; 106 u8 dctr;
104 107
@@ -109,8 +112,7 @@ static void vt8500_irq_unmask(struct irq_data *d)
109 112
110static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type) 113static int vt8500_irq_set_type(struct irq_data *d, unsigned int flow_type)
111{ 114{
112 struct vt8500_irq_priv *priv = 115 struct vt8500_irq_data *priv = d->domain->host_data;
113 (struct vt8500_irq_priv *)(d->domain->host_data);
114 void __iomem *base = priv->base; 116 void __iomem *base = priv->base;
115 u8 dctr; 117 u8 dctr;
116 118
@@ -148,17 +150,15 @@ static struct irq_chip vt8500_irq_chip = {
148 150
149static void __init vt8500_init_irq_hw(void __iomem *base) 151static void __init vt8500_init_irq_hw(void __iomem *base)
150{ 152{
151 unsigned int i; 153 u32 i;
152 154
153 /* Enable rotating priority for IRQ */ 155 /* Enable rotating priority for IRQ */
154 writel(ICPC_ROTATE, base + VT8500_ICPC_IRQ); 156 writel(ICPC_ROTATE, base + VT8500_ICPC_IRQ);
155 writel(0x00, base + VT8500_ICPC_FIQ); 157 writel(0x00, base + VT8500_ICPC_FIQ);
156 158
157 for (i = 0; i < 64; i++) { 159 /* Disable all interrupts and route them to IRQ */
158 /* Disable all interrupts and route them to IRQ */ 160 for (i = 0; i < 64; i++)
159 writeb(VT8500_INT_DISABLE | ICDC_IRQ, 161 writeb(VT8500_INT_DISABLE | ICDC_IRQ, base + VT8500_ICDC + i);
160 base + VT8500_ICDC + i);
161 }
162} 162}
163 163
164static int vt8500_irq_map(struct irq_domain *h, unsigned int virq, 164static int vt8500_irq_map(struct irq_domain *h, unsigned int virq,
@@ -175,33 +175,67 @@ static struct irq_domain_ops vt8500_irq_domain_ops = {
175 .xlate = irq_domain_xlate_onecell, 175 .xlate = irq_domain_xlate_onecell,
176}; 176};
177 177
178asmlinkage void __exception_irq_entry vt8500_handle_irq(struct pt_regs *regs)
179{
180 u32 stat, i;
181 int irqnr, virq;
182 void __iomem *base;
183
184 /* Loop through each active controller */
185 for (i=0; i<active_cnt; i++) {
186 base = intc[i].base;
187 irqnr = readl_relaxed(base) & 0x3F;
188 /*
189 Highest Priority register default = 63, so check that this
190 is a real interrupt by checking the status register
191 */
192 if (irqnr == 63) {
193 stat = readl_relaxed(base + VT8500_ICIS + 4);
194 if (!(stat & BIT(31)))
195 continue;
196 }
197
198 virq = irq_find_mapping(intc[i].domain, irqnr);
199 handle_IRQ(virq, regs);
200 }
201}
202
178int __init vt8500_irq_init(struct device_node *node, struct device_node *parent) 203int __init vt8500_irq_init(struct device_node *node, struct device_node *parent)
179{ 204{
180 struct irq_domain *vt8500_irq_domain;
181 struct vt8500_irq_priv *priv;
182 int irq, i; 205 int irq, i;
183 struct device_node *np = node; 206 struct device_node *np = node;
184 207
185 priv = kzalloc(sizeof(struct vt8500_irq_priv), GFP_KERNEL); 208 if (active_cnt == VT8500_INTC_MAX) {
186 priv->base = of_iomap(np, 0); 209 pr_err("%s: Interrupt controllers > VT8500_INTC_MAX\n",
210 __func__);
211 goto out;
212 }
213
214 intc[active_cnt].base = of_iomap(np, 0);
215 intc[active_cnt].domain = irq_domain_add_linear(node, 64,
216 &vt8500_irq_domain_ops, &intc[active_cnt]);
187 217
188 vt8500_irq_domain = irq_domain_add_legacy(node, 64, irq_cnt, 0, 218 if (!intc[active_cnt].base) {
189 &vt8500_irq_domain_ops, priv); 219 pr_err("%s: Unable to map IO memory\n", __func__);
190 if (!vt8500_irq_domain) 220 goto out;
191 pr_err("%s: Unable to add wmt irq domain!\n", __func__); 221 }
222
223 if (!intc[active_cnt].domain) {
224 pr_err("%s: Unable to add irq domain!\n", __func__);
225 goto out;
226 }
192 227
193 irq_set_default_host(vt8500_irq_domain); 228 vt8500_init_irq_hw(intc[active_cnt].base);
194 229
195 vt8500_init_irq_hw(priv->base); 230 pr_info("vt8500-irq: Added interrupt controller\n");
196 231
197 pr_info("Added IRQ Controller @ %x [virq_base = %d]\n", 232 active_cnt++;
198 (u32)(priv->base), irq_cnt);
199 233
200 /* check if this is a slaved controller */ 234 /* check if this is a slaved controller */
201 if (of_irq_count(np) != 0) { 235 if (of_irq_count(np) != 0) {
202 /* check that we have the correct number of interrupts */ 236 /* check that we have the correct number of interrupts */
203 if (of_irq_count(np) != 8) { 237 if (of_irq_count(np) != 8) {
204 pr_err("%s: Incorrect IRQ map for slave controller\n", 238 pr_err("%s: Incorrect IRQ map for slaved controller\n",
205 __func__); 239 __func__);
206 return -EINVAL; 240 return -EINVAL;
207 } 241 }
@@ -213,9 +247,7 @@ int __init vt8500_irq_init(struct device_node *node, struct device_node *parent)
213 247
214 pr_info("vt8500-irq: Enabled slave->parent interrupts\n"); 248 pr_info("vt8500-irq: Enabled slave->parent interrupts\n");
215 } 249 }
216 250out:
217 irq_cnt += 64;
218
219 return 0; 251 return 0;
220} 252}
221 253
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 8d3871f110a5..14def0f9eab0 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -194,5 +194,6 @@ DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
194 .timer = &vt8500_timer, 194 .timer = &vt8500_timer,
195 .init_machine = vt8500_init, 195 .init_machine = vt8500_init,
196 .restart = vt8500_restart, 196 .restart = vt8500_restart,
197 .handle_irq = vt8500_handle_irq,
197MACHINE_END 198MACHINE_END
198 199
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig
deleted file mode 100644
index 19f55cae5d73..000000000000
--- a/arch/arm/plat-nomadik/Kconfig
+++ /dev/null
@@ -1,29 +0,0 @@
1# We keep common IP's here for Nomadik and other similar
2# familiy of processors from ST-Ericsson. At the moment we have
3# just MTU, others to follow soon.
4
5config PLAT_NOMADIK
6 bool
7 depends on ARCH_NOMADIK || ARCH_U8500
8 default y
9 select CLKSRC_MMIO
10 help
11 Common platform code for Nomadik and other ST-Ericsson
12 platforms.
13
14if PLAT_NOMADIK
15
16config HAS_MTU
17 bool
18 help
19 Support for Multi Timer Unit. MTU provides access
20 to multiple interrupt generating programmable
21 32-bit free running decrementing counters.
22
23config NOMADIK_MTU_SCHED_CLOCK
24 bool
25 depends on HAS_MTU
26 help
27 Use the Multi Timer Unit as the sched_clock.
28
29endif
diff --git a/arch/arm/plat-nomadik/Makefile b/arch/arm/plat-nomadik/Makefile
deleted file mode 100644
index 37c7cdd0f8f0..000000000000
--- a/arch/arm/plat-nomadik/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1# arch/arm/plat-nomadik/Makefile
2# Copyright 2009 ST-Ericsson
3# Licensed under GPLv2
4
5obj-$(CONFIG_HAS_MTU) += timer.o
diff --git a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
deleted file mode 100644
index c08a54d9d889..000000000000
--- a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
+++ /dev/null
@@ -1,102 +0,0 @@
1/*
2 * Structures and registers for GPIO access in the Nomadik SoC
3 *
4 * Copyright (C) 2008 STMicroelectronics
5 * Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
6 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __PLAT_NOMADIK_GPIO
14#define __PLAT_NOMADIK_GPIO
15
16/*
17 * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
18 * the "gpio" namespace for generic and cross-machine functions
19 */
20
21/* Register in the logic block */
22#define NMK_GPIO_DAT 0x00
23#define NMK_GPIO_DATS 0x04
24#define NMK_GPIO_DATC 0x08
25#define NMK_GPIO_PDIS 0x0c
26#define NMK_GPIO_DIR 0x10
27#define NMK_GPIO_DIRS 0x14
28#define NMK_GPIO_DIRC 0x18
29#define NMK_GPIO_SLPC 0x1c
30#define NMK_GPIO_AFSLA 0x20
31#define NMK_GPIO_AFSLB 0x24
32#define NMK_GPIO_LOWEMI 0x28
33
34#define NMK_GPIO_RIMSC 0x40
35#define NMK_GPIO_FIMSC 0x44
36#define NMK_GPIO_IS 0x48
37#define NMK_GPIO_IC 0x4c
38#define NMK_GPIO_RWIMSC 0x50
39#define NMK_GPIO_FWIMSC 0x54
40#define NMK_GPIO_WKS 0x58
41
42/* Alternate functions: function C is set in hw by setting both A and B */
43#define NMK_GPIO_ALT_GPIO 0
44#define NMK_GPIO_ALT_A 1
45#define NMK_GPIO_ALT_B 2
46#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
47
48#define NMK_GPIO_ALT_CX_SHIFT 2
49#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
50#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
51#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
52#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
53
54/* Pull up/down values */
55enum nmk_gpio_pull {
56 NMK_GPIO_PULL_NONE,
57 NMK_GPIO_PULL_UP,
58 NMK_GPIO_PULL_DOWN,
59};
60
61/* Sleep mode */
62enum nmk_gpio_slpm {
63 NMK_GPIO_SLPM_INPUT,
64 NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
65 NMK_GPIO_SLPM_NOCHANGE,
66 NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
67};
68
69extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode);
70extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull);
71#ifdef CONFIG_PINCTRL_NOMADIK
72extern int nmk_gpio_set_mode(int gpio, int gpio_mode);
73#else
74static inline int nmk_gpio_set_mode(int gpio, int gpio_mode)
75{
76 return -ENODEV;
77}
78#endif
79extern int nmk_gpio_get_mode(int gpio);
80
81extern void nmk_gpio_wakeups_suspend(void);
82extern void nmk_gpio_wakeups_resume(void);
83
84extern void nmk_gpio_clocks_enable(void);
85extern void nmk_gpio_clocks_disable(void);
86
87extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up);
88
89/*
90 * Platform data to register a block: only the initial gpio/irq number.
91 */
92struct nmk_gpio_platform_data {
93 char *name;
94 int first_gpio;
95 int first_irq;
96 int num_gpio;
97 u32 (*get_secondary_status)(unsigned int bank);
98 void (*set_ioforce)(bool enable);
99 bool supports_sleepmode;
100};
101
102#endif /* __PLAT_NOMADIK_GPIO */
diff --git a/arch/arm/plat-nomadik/include/plat/mtu.h b/arch/arm/plat-nomadik/include/plat/mtu.h
deleted file mode 100644
index 582641f3dc01..000000000000
--- a/arch/arm/plat-nomadik/include/plat/mtu.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef __PLAT_MTU_H
2#define __PLAT_MTU_H
3
4void nmdk_timer_init(void __iomem *base);
5void nmdk_clkevt_reset(void);
6void nmdk_clksrc_reset(void);
7
8#endif /* __PLAT_MTU_H */
9
diff --git a/arch/arm/plat-nomadik/include/plat/pincfg.h b/arch/arm/plat-nomadik/include/plat/pincfg.h
deleted file mode 100644
index 3b8ec60af351..000000000000
--- a/arch/arm/plat-nomadik/include/plat/pincfg.h
+++ /dev/null
@@ -1,173 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
6 *
7 * Based on arch/arm/mach-pxa/include/mach/mfp.h:
8 * Copyright (C) 2007 Marvell International Ltd.
9 * eric miao <eric.miao@marvell.com>
10 */
11
12#ifndef __PLAT_PINCFG_H
13#define __PLAT_PINCFG_H
14
15/*
16 * pin configurations are represented by 32-bit integers:
17 *
18 * bit 0.. 8 - Pin Number (512 Pins Maximum)
19 * bit 9..10 - Alternate Function Selection
20 * bit 11..12 - Pull up/down state
21 * bit 13 - Sleep mode behaviour
22 * bit 14 - Direction
23 * bit 15 - Value (if output)
24 * bit 16..18 - SLPM pull up/down state
25 * bit 19..20 - SLPM direction
26 * bit 21..22 - SLPM Value (if output)
27 * bit 23..25 - PDIS value (if input)
28 * bit 26 - Gpio mode
29 * bit 27 - Sleep mode
30 *
31 * to facilitate the definition, the following macros are provided
32 *
33 * PIN_CFG_DEFAULT - default config (0):
34 * pull up/down = disabled
35 * sleep mode = input/wakeup
36 * direction = input
37 * value = low
38 * SLPM direction = same as normal
39 * SLPM pull = same as normal
40 * SLPM value = same as normal
41 *
42 * PIN_CFG - default config with alternate function
43 */
44
45typedef unsigned long pin_cfg_t;
46
47#define PIN_NUM_MASK 0x1ff
48#define PIN_NUM(x) ((x) & PIN_NUM_MASK)
49
50#define PIN_ALT_SHIFT 9
51#define PIN_ALT_MASK (0x3 << PIN_ALT_SHIFT)
52#define PIN_ALT(x) (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
53#define PIN_GPIO (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
54#define PIN_ALT_A (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
55#define PIN_ALT_B (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
56#define PIN_ALT_C (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
57
58#define PIN_PULL_SHIFT 11
59#define PIN_PULL_MASK (0x3 << PIN_PULL_SHIFT)
60#define PIN_PULL(x) (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
61#define PIN_PULL_NONE (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
62#define PIN_PULL_UP (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
63#define PIN_PULL_DOWN (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
64
65#define PIN_SLPM_SHIFT 13
66#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT)
67#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
68#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
69#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
70/* These two replace the above in DB8500v2+ */
71#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
72#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
73#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
74
75#define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
76#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
77
78#define PIN_DIR_SHIFT 14
79#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT)
80#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
81#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT)
82#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT)
83
84#define PIN_VAL_SHIFT 15
85#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT)
86#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
87#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT)
88#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT)
89
90#define PIN_SLPM_PULL_SHIFT 16
91#define PIN_SLPM_PULL_MASK (0x7 << PIN_SLPM_PULL_SHIFT)
92#define PIN_SLPM_PULL(x) \
93 (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
94#define PIN_SLPM_PULL_NONE \
95 ((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
96#define PIN_SLPM_PULL_UP \
97 ((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
98#define PIN_SLPM_PULL_DOWN \
99 ((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
100
101#define PIN_SLPM_DIR_SHIFT 19
102#define PIN_SLPM_DIR_MASK (0x3 << PIN_SLPM_DIR_SHIFT)
103#define PIN_SLPM_DIR(x) \
104 (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
105#define PIN_SLPM_DIR_INPUT ((1 + 0) << PIN_SLPM_DIR_SHIFT)
106#define PIN_SLPM_DIR_OUTPUT ((1 + 1) << PIN_SLPM_DIR_SHIFT)
107
108#define PIN_SLPM_VAL_SHIFT 21
109#define PIN_SLPM_VAL_MASK (0x3 << PIN_SLPM_VAL_SHIFT)
110#define PIN_SLPM_VAL(x) \
111 (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
112#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT)
113#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT)
114
115#define PIN_SLPM_PDIS_SHIFT 23
116#define PIN_SLPM_PDIS_MASK (0x3 << PIN_SLPM_PDIS_SHIFT)
117#define PIN_SLPM_PDIS(x) \
118 (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
119#define PIN_SLPM_PDIS_NO_CHANGE (0 << PIN_SLPM_PDIS_SHIFT)
120#define PIN_SLPM_PDIS_DISABLED (1 << PIN_SLPM_PDIS_SHIFT)
121#define PIN_SLPM_PDIS_ENABLED (2 << PIN_SLPM_PDIS_SHIFT)
122
123#define PIN_LOWEMI_SHIFT 25
124#define PIN_LOWEMI_MASK (0x1 << PIN_LOWEMI_SHIFT)
125#define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
126#define PIN_LOWEMI_DISABLED (0 << PIN_LOWEMI_SHIFT)
127#define PIN_LOWEMI_ENABLED (1 << PIN_LOWEMI_SHIFT)
128
129#define PIN_GPIOMODE_SHIFT 26
130#define PIN_GPIOMODE_MASK (0x1 << PIN_GPIOMODE_SHIFT)
131#define PIN_GPIOMODE(x) (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
132#define PIN_GPIOMODE_DISABLED (0 << PIN_GPIOMODE_SHIFT)
133#define PIN_GPIOMODE_ENABLED (1 << PIN_GPIOMODE_SHIFT)
134
135#define PIN_SLEEPMODE_SHIFT 27
136#define PIN_SLEEPMODE_MASK (0x1 << PIN_SLEEPMODE_SHIFT)
137#define PIN_SLEEPMODE(x) (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
138#define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT)
139#define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT)
140
141
142/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */
143#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN)
144#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP)
145#define PIN_INPUT_NOPULL (PIN_DIR_INPUT | PIN_PULL_NONE)
146#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW)
147#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
148
149#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
150#define PIN_SLPM_INPUT_PULLUP (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
151#define PIN_SLPM_INPUT_NOPULL (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
152#define PIN_SLPM_OUTPUT_LOW (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
153#define PIN_SLPM_OUTPUT_HIGH (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
154
155#define PIN_CFG_DEFAULT (0)
156
157#define PIN_CFG(num, alt) \
158 (PIN_CFG_DEFAULT |\
159 (PIN_NUM(num) | PIN_##alt))
160
161#define PIN_CFG_INPUT(num, alt, pull) \
162 (PIN_CFG_DEFAULT |\
163 (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
164
165#define PIN_CFG_OUTPUT(num, alt, val) \
166 (PIN_CFG_DEFAULT |\
167 (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
168
169extern int nmk_config_pin(pin_cfg_t cfg, bool sleep);
170extern int nmk_config_pins(pin_cfg_t *cfgs, int num);
171extern int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num);
172
173#endif
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
deleted file mode 100644
index 9ff93b065686..000000000000
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ /dev/null
@@ -1,223 +0,0 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2007-2010
3 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
4 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8
9#ifndef STE_DMA40_H
10#define STE_DMA40_H
11
12#include <linux/dmaengine.h>
13#include <linux/scatterlist.h>
14#include <linux/workqueue.h>
15#include <linux/interrupt.h>
16
17/*
18 * Maxium size for a single dma descriptor
19 * Size is limited to 16 bits.
20 * Size is in the units of addr-widths (1,2,4,8 bytes)
21 * Larger transfers will be split up to multiple linked desc
22 */
23#define STEDMA40_MAX_SEG_SIZE 0xFFFF
24
25/* dev types for memcpy */
26#define STEDMA40_DEV_DST_MEMORY (-1)
27#define STEDMA40_DEV_SRC_MEMORY (-1)
28
29enum stedma40_mode {
30 STEDMA40_MODE_LOGICAL = 0,
31 STEDMA40_MODE_PHYSICAL,
32 STEDMA40_MODE_OPERATION,
33};
34
35enum stedma40_mode_opt {
36 STEDMA40_PCHAN_BASIC_MODE = 0,
37 STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0,
38 STEDMA40_PCHAN_MODULO_MODE,
39 STEDMA40_PCHAN_DOUBLE_DST_MODE,
40 STEDMA40_LCHAN_SRC_PHY_DST_LOG,
41 STEDMA40_LCHAN_SRC_LOG_DST_PHY,
42};
43
44#define STEDMA40_ESIZE_8_BIT 0x0
45#define STEDMA40_ESIZE_16_BIT 0x1
46#define STEDMA40_ESIZE_32_BIT 0x2
47#define STEDMA40_ESIZE_64_BIT 0x3
48
49/* The value 4 indicates that PEN-reg shall be set to 0 */
50#define STEDMA40_PSIZE_PHY_1 0x4
51#define STEDMA40_PSIZE_PHY_2 0x0
52#define STEDMA40_PSIZE_PHY_4 0x1
53#define STEDMA40_PSIZE_PHY_8 0x2
54#define STEDMA40_PSIZE_PHY_16 0x3
55
56/*
57 * The number of elements differ in logical and
58 * physical mode
59 */
60#define STEDMA40_PSIZE_LOG_1 STEDMA40_PSIZE_PHY_2
61#define STEDMA40_PSIZE_LOG_4 STEDMA40_PSIZE_PHY_4
62#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8
63#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16
64
65/* Maximum number of possible physical channels */
66#define STEDMA40_MAX_PHYS 32
67
68enum stedma40_flow_ctrl {
69 STEDMA40_NO_FLOW_CTRL,
70 STEDMA40_FLOW_CTRL,
71};
72
73enum stedma40_periph_data_width {
74 STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
75 STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
76 STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT,
77 STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
78};
79
80enum stedma40_xfer_dir {
81 STEDMA40_MEM_TO_MEM = 1,
82 STEDMA40_MEM_TO_PERIPH,
83 STEDMA40_PERIPH_TO_MEM,
84 STEDMA40_PERIPH_TO_PERIPH
85};
86
87
88/**
89 * struct stedma40_chan_cfg - dst/src channel configuration
90 *
91 * @big_endian: true if the src/dst should be read as big endian
92 * @data_width: Data width of the src/dst hardware
93 * @p_size: Burst size
94 * @flow_ctrl: Flow control on/off.
95 */
96struct stedma40_half_channel_info {
97 bool big_endian;
98 enum stedma40_periph_data_width data_width;
99 int psize;
100 enum stedma40_flow_ctrl flow_ctrl;
101};
102
103/**
104 * struct stedma40_chan_cfg - Structure to be filled by client drivers.
105 *
106 * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
107 * @high_priority: true if high-priority
108 * @realtime: true if realtime mode is to be enabled. Only available on DMA40
109 * version 3+, i.e DB8500v2+
110 * @mode: channel mode: physical, logical, or operation
111 * @mode_opt: options for the chosen channel mode
112 * @src_dev_type: Src device type
113 * @dst_dev_type: Dst device type
114 * @src_info: Parameters for dst half channel
115 * @dst_info: Parameters for dst half channel
116 * @use_fixed_channel: if true, use physical channel specified by phy_channel
117 * @phy_channel: physical channel to use, only if use_fixed_channel is true
118 *
119 * This structure has to be filled by the client drivers.
120 * It is recommended to do all dma configurations for clients in the machine.
121 *
122 */
123struct stedma40_chan_cfg {
124 enum stedma40_xfer_dir dir;
125 bool high_priority;
126 bool realtime;
127 enum stedma40_mode mode;
128 enum stedma40_mode_opt mode_opt;
129 int src_dev_type;
130 int dst_dev_type;
131 struct stedma40_half_channel_info src_info;
132 struct stedma40_half_channel_info dst_info;
133
134 bool use_fixed_channel;
135 int phy_channel;
136};
137
138/**
139 * struct stedma40_platform_data - Configuration struct for the dma device.
140 *
141 * @dev_len: length of dev_tx and dev_rx
142 * @dev_tx: mapping between destination event line and io address
143 * @dev_rx: mapping between source event line and io address
144 * @memcpy: list of memcpy event lines
145 * @memcpy_len: length of memcpy
146 * @memcpy_conf_phy: default configuration of physical channel memcpy
147 * @memcpy_conf_log: default configuration of logical channel memcpy
148 * @disabled_channels: A vector, ending with -1, that marks physical channels
149 * that are for different reasons not available for the driver.
150 */
151struct stedma40_platform_data {
152 u32 dev_len;
153 const dma_addr_t *dev_tx;
154 const dma_addr_t *dev_rx;
155 int *memcpy;
156 u32 memcpy_len;
157 struct stedma40_chan_cfg *memcpy_conf_phy;
158 struct stedma40_chan_cfg *memcpy_conf_log;
159 int disabled_channels[STEDMA40_MAX_PHYS];
160 bool use_esram_lcla;
161};
162
163#ifdef CONFIG_STE_DMA40
164
165/**
166 * stedma40_filter() - Provides stedma40_chan_cfg to the
167 * ste_dma40 dma driver via the dmaengine framework.
168 * does some checking of what's provided.
169 *
170 * Never directly called by client. It used by dmaengine.
171 * @chan: dmaengine handle.
172 * @data: Must be of type: struct stedma40_chan_cfg and is
173 * the configuration of the framework.
174 *
175 *
176 */
177
178bool stedma40_filter(struct dma_chan *chan, void *data);
179
180/**
181 * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave
182 * (=device)
183 *
184 * @chan: dmaengine handle
185 * @addr: source or destination physicall address.
186 * @size: bytes to transfer
187 * @direction: direction of transfer
188 * @flags: is actually enum dma_ctrl_flags. See dmaengine.h
189 */
190
191static inline struct
192dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
193 dma_addr_t addr,
194 unsigned int size,
195 enum dma_transfer_direction direction,
196 unsigned long flags)
197{
198 struct scatterlist sg;
199 sg_init_table(&sg, 1);
200 sg.dma_address = addr;
201 sg.length = size;
202
203 return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags);
204}
205
206#else
207static inline bool stedma40_filter(struct dma_chan *chan, void *data)
208{
209 return false;
210}
211
212static inline struct
213dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
214 dma_addr_t addr,
215 unsigned int size,
216 enum dma_transfer_direction direction,
217 unsigned long flags)
218{
219 return NULL;
220}
221#endif
222
223#endif
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c
deleted file mode 100644
index 9222e5522a43..000000000000
--- a/arch/arm/plat-nomadik/timer.c
+++ /dev/null
@@ -1,223 +0,0 @@
1/*
2 * linux/arch/arm/plat-nomadik/timer.c
3 *
4 * Copyright (C) 2008 STMicroelectronics
5 * Copyright (C) 2010 Alessandro Rubini
6 * Copyright (C) 2010 Linus Walleij for ST-Ericsson
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2, as
10 * published by the Free Software Foundation.
11 */
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/clockchips.h>
17#include <linux/clk.h>
18#include <linux/jiffies.h>
19#include <linux/err.h>
20#include <asm/mach/time.h>
21#include <asm/sched_clock.h>
22
23/*
24 * The MTU device hosts four different counters, with 4 set of
25 * registers. These are register names.
26 */
27
28#define MTU_IMSC 0x00 /* Interrupt mask set/clear */
29#define MTU_RIS 0x04 /* Raw interrupt status */
30#define MTU_MIS 0x08 /* Masked interrupt status */
31#define MTU_ICR 0x0C /* Interrupt clear register */
32
33/* per-timer registers take 0..3 as argument */
34#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */
35#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */
36#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */
37#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */
38
39/* bits for the control register */
40#define MTU_CRn_ENA 0x80
41#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */
42#define MTU_CRn_PRESCALE_MASK 0x0c
43#define MTU_CRn_PRESCALE_1 0x00
44#define MTU_CRn_PRESCALE_16 0x04
45#define MTU_CRn_PRESCALE_256 0x08
46#define MTU_CRn_32BITS 0x02
47#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/
48
49/* Other registers are usual amba/primecell registers, currently not used */
50#define MTU_ITCR 0xff0
51#define MTU_ITOP 0xff4
52
53#define MTU_PERIPH_ID0 0xfe0
54#define MTU_PERIPH_ID1 0xfe4
55#define MTU_PERIPH_ID2 0xfe8
56#define MTU_PERIPH_ID3 0xfeC
57
58#define MTU_PCELL0 0xff0
59#define MTU_PCELL1 0xff4
60#define MTU_PCELL2 0xff8
61#define MTU_PCELL3 0xffC
62
63static void __iomem *mtu_base;
64static bool clkevt_periodic;
65static u32 clk_prescale;
66static u32 nmdk_cycle; /* write-once */
67
68#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
69/*
70 * Override the global weak sched_clock symbol with this
71 * local implementation which uses the clocksource to get some
72 * better resolution when scheduling the kernel.
73 */
74static u32 notrace nomadik_read_sched_clock(void)
75{
76 if (unlikely(!mtu_base))
77 return 0;
78
79 return -readl(mtu_base + MTU_VAL(0));
80}
81#endif
82
83/* Clockevent device: use one-shot mode */
84static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev)
85{
86 writel(1 << 1, mtu_base + MTU_IMSC);
87 writel(evt, mtu_base + MTU_LR(1));
88 /* Load highest value, enable device, enable interrupts */
89 writel(MTU_CRn_ONESHOT | clk_prescale |
90 MTU_CRn_32BITS | MTU_CRn_ENA,
91 mtu_base + MTU_CR(1));
92
93 return 0;
94}
95
96void nmdk_clkevt_reset(void)
97{
98 if (clkevt_periodic) {
99 /* Timer: configure load and background-load, and fire it up */
100 writel(nmdk_cycle, mtu_base + MTU_LR(1));
101 writel(nmdk_cycle, mtu_base + MTU_BGLR(1));
102
103 writel(MTU_CRn_PERIODIC | clk_prescale |
104 MTU_CRn_32BITS | MTU_CRn_ENA,
105 mtu_base + MTU_CR(1));
106 writel(1 << 1, mtu_base + MTU_IMSC);
107 } else {
108 /* Generate an interrupt to start the clockevent again */
109 (void) nmdk_clkevt_next(nmdk_cycle, NULL);
110 }
111}
112
113static void nmdk_clkevt_mode(enum clock_event_mode mode,
114 struct clock_event_device *dev)
115{
116 switch (mode) {
117 case CLOCK_EVT_MODE_PERIODIC:
118 clkevt_periodic = true;
119 nmdk_clkevt_reset();
120 break;
121 case CLOCK_EVT_MODE_ONESHOT:
122 clkevt_periodic = false;
123 break;
124 case CLOCK_EVT_MODE_SHUTDOWN:
125 case CLOCK_EVT_MODE_UNUSED:
126 writel(0, mtu_base + MTU_IMSC);
127 /* disable timer */
128 writel(0, mtu_base + MTU_CR(1));
129 /* load some high default value */
130 writel(0xffffffff, mtu_base + MTU_LR(1));
131 break;
132 case CLOCK_EVT_MODE_RESUME:
133 break;
134 }
135}
136
137static struct clock_event_device nmdk_clkevt = {
138 .name = "mtu_1",
139 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
140 .rating = 200,
141 .set_mode = nmdk_clkevt_mode,
142 .set_next_event = nmdk_clkevt_next,
143};
144
145/*
146 * IRQ Handler for timer 1 of the MTU block.
147 */
148static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id)
149{
150 struct clock_event_device *evdev = dev_id;
151
152 writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */
153 evdev->event_handler(evdev);
154 return IRQ_HANDLED;
155}
156
157static struct irqaction nmdk_timer_irq = {
158 .name = "Nomadik Timer Tick",
159 .flags = IRQF_DISABLED | IRQF_TIMER,
160 .handler = nmdk_timer_interrupt,
161 .dev_id = &nmdk_clkevt,
162};
163
164void nmdk_clksrc_reset(void)
165{
166 /* Disable */
167 writel(0, mtu_base + MTU_CR(0));
168
169 /* ClockSource: configure load and background-load, and fire it up */
170 writel(nmdk_cycle, mtu_base + MTU_LR(0));
171 writel(nmdk_cycle, mtu_base + MTU_BGLR(0));
172
173 writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA,
174 mtu_base + MTU_CR(0));
175}
176
177void __init nmdk_timer_init(void __iomem *base)
178{
179 unsigned long rate;
180 struct clk *clk0;
181
182 mtu_base = base;
183 clk0 = clk_get_sys("mtu0", NULL);
184 BUG_ON(IS_ERR(clk0));
185 BUG_ON(clk_prepare(clk0) < 0);
186 BUG_ON(clk_enable(clk0) < 0);
187
188 /*
189 * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz
190 * for ux500.
191 * Use a divide-by-16 counter if the tick rate is more than 32MHz.
192 * At 32 MHz, the timer (with 32 bit counter) can be programmed
193 * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer
194 * with 16 gives too low timer resolution.
195 */
196 rate = clk_get_rate(clk0);
197 if (rate > 32000000) {
198 rate /= 16;
199 clk_prescale = MTU_CRn_PRESCALE_16;
200 } else {
201 clk_prescale = MTU_CRn_PRESCALE_1;
202 }
203
204 nmdk_cycle = (rate + HZ/2) / HZ;
205
206
207 /* Timer 0 is the free running clocksource */
208 nmdk_clksrc_reset();
209
210 if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
211 rate, 200, 32, clocksource_mmio_readl_down))
212 pr_err("timer: failed to initialize clock source %s\n",
213 "mtu_0");
214
215#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK
216 setup_sched_clock(nomadik_read_sched_clock, 32, rate);
217#endif
218
219 /* Timer 1 is used for events, register irq and clockevents */
220 setup_irq(IRQ_MTU0, &nmdk_timer_irq);
221 nmdk_clkevt.cpumask = cpumask_of(0);
222 clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU);
223}
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