diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/configs/omap3_beagle_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-rx51-peripherals.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-zoom2.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock24xx.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.c | 74 | ||||
-rw-r--r-- | arch/arm/plat-omap/dma.c | 15 | ||||
-rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 2 |
7 files changed, 59 insertions, 40 deletions
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig index 357d4021e2d0..b3c8cce0f8fb 100644 --- a/arch/arm/configs/omap3_beagle_defconfig +++ b/arch/arm/configs/omap3_beagle_defconfig | |||
@@ -969,7 +969,6 @@ CONFIG_USB_ETH_RNDIS=y | |||
969 | # | 969 | # |
970 | CONFIG_USB_OTG_UTILS=y | 970 | CONFIG_USB_OTG_UTILS=y |
971 | # CONFIG_USB_GPIO_VBUS is not set | 971 | # CONFIG_USB_GPIO_VBUS is not set |
972 | # CONFIG_ISP1301_OMAP is not set | ||
973 | CONFIG_TWL4030_USB=y | 972 | CONFIG_TWL4030_USB=y |
974 | # CONFIG_NOP_USB_XCEIV is not set | 973 | # CONFIG_NOP_USB_XCEIV is not set |
975 | CONFIG_MMC=y | 974 | CONFIG_MMC=y |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index c1af5326e92f..2b0eb1ba5d7f 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -444,7 +444,7 @@ static int __init rx51_i2c_init(void) | |||
444 | rx51_twldata.vaux3 = &rx51_vaux3_cam; | 444 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
445 | rx51_twldata.vmmc2 = &rx51_vmmc2; | 445 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
446 | } | 446 | } |
447 | omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1, | 447 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, |
448 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); | 448 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); |
449 | omap_register_i2c_bus(2, 100, NULL, 0); | 449 | omap_register_i2c_bus(2, 100, NULL, 0); |
450 | omap_register_i2c_bus(3, 400, NULL, 0); | 450 | omap_register_i2c_bus(3, 400, NULL, 0); |
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index b7b32208ced7..fd3369d5e5cb 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <mach/keypad.h> | 25 | #include <mach/keypad.h> |
26 | 26 | ||
27 | #include "mmc-twl4030.h" | 27 | #include "mmc-twl4030.h" |
28 | #include "sdram-micron-mt46h32m32lf-6.h" | ||
28 | 29 | ||
29 | /* Zoom2 has Qwerty keyboard*/ | 30 | /* Zoom2 has Qwerty keyboard*/ |
30 | static int board_keymap[] = { | 31 | static int board_keymap[] = { |
@@ -213,7 +214,8 @@ static void __init omap_zoom2_init_irq(void) | |||
213 | { | 214 | { |
214 | omap_board_config = zoom2_config; | 215 | omap_board_config = zoom2_config; |
215 | omap_board_config_size = ARRAY_SIZE(zoom2_config); | 216 | omap_board_config_size = ARRAY_SIZE(zoom2_config); |
216 | omap2_init_common_hw(NULL, NULL); | 217 | omap2_init_common_hw(mt46h32m32lf6_sdrc_params, |
218 | mt46h32m32lf6_sdrc_params); | ||
217 | omap_init_irq(); | 219 | omap_init_irq(); |
218 | omap_gpio_init(); | 220 | omap_gpio_init(); |
219 | } | 221 | } |
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index bc5d3ac66611..e2dbedd581e8 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c | |||
@@ -769,6 +769,7 @@ int __init omap2_clk_init(void) | |||
769 | if (c->cpu & cpu_mask) { | 769 | if (c->cpu & cpu_mask) { |
770 | clkdev_add(&c->lk); | 770 | clkdev_add(&c->lk); |
771 | clk_register(c->lk.clk); | 771 | clk_register(c->lk.clk); |
772 | omap2_init_clk_clkdm(c->lk.clk); | ||
772 | } | 773 | } |
773 | 774 | ||
774 | /* Check the MPU rate set by bootloader */ | 775 | /* Check the MPU rate set by bootloader */ |
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 4ef7b4f5474e..58aff8485df9 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -137,6 +137,36 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm) | |||
137 | } | 137 | } |
138 | } | 138 | } |
139 | 139 | ||
140 | /* | ||
141 | * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit | ||
142 | * @clkdm: struct clockdomain * | ||
143 | * @enable: int 0 to disable, 1 to enable | ||
144 | * | ||
145 | * Internal helper for actually switching the bit that controls hwsup | ||
146 | * idle transitions for clkdm. | ||
147 | */ | ||
148 | static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) | ||
149 | { | ||
150 | u32 v; | ||
151 | |||
152 | if (cpu_is_omap24xx()) { | ||
153 | if (enable) | ||
154 | v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; | ||
155 | else | ||
156 | v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; | ||
157 | } else if (cpu_is_omap34xx()) { | ||
158 | if (enable) | ||
159 | v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; | ||
160 | else | ||
161 | v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; | ||
162 | } else { | ||
163 | BUG(); | ||
164 | } | ||
165 | |||
166 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | ||
167 | v << __ffs(clkdm->clktrctrl_mask), | ||
168 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); | ||
169 | } | ||
140 | 170 | ||
141 | static struct clockdomain *_clkdm_lookup(const char *name) | 171 | static struct clockdomain *_clkdm_lookup(const char *name) |
142 | { | 172 | { |
@@ -456,8 +486,6 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |||
456 | */ | 486 | */ |
457 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | 487 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm) |
458 | { | 488 | { |
459 | u32 v; | ||
460 | |||
461 | if (!clkdm) | 489 | if (!clkdm) |
462 | return; | 490 | return; |
463 | 491 | ||
@@ -473,18 +501,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |||
473 | if (atomic_read(&clkdm->usecount) > 0) | 501 | if (atomic_read(&clkdm->usecount) > 0) |
474 | _clkdm_add_autodeps(clkdm); | 502 | _clkdm_add_autodeps(clkdm); |
475 | 503 | ||
476 | if (cpu_is_omap24xx()) | 504 | _omap2_clkdm_set_hwsup(clkdm, 1); |
477 | v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; | ||
478 | else if (cpu_is_omap34xx()) | ||
479 | v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; | ||
480 | else | ||
481 | BUG(); | ||
482 | |||
483 | |||
484 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | ||
485 | v << __ffs(clkdm->clktrctrl_mask), | ||
486 | clkdm->pwrdm.ptr->prcm_offs, | ||
487 | CM_CLKSTCTRL); | ||
488 | 505 | ||
489 | pwrdm_clkdm_state_switch(clkdm); | 506 | pwrdm_clkdm_state_switch(clkdm); |
490 | } | 507 | } |
@@ -500,8 +517,6 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |||
500 | */ | 517 | */ |
501 | void omap2_clkdm_deny_idle(struct clockdomain *clkdm) | 518 | void omap2_clkdm_deny_idle(struct clockdomain *clkdm) |
502 | { | 519 | { |
503 | u32 v; | ||
504 | |||
505 | if (!clkdm) | 520 | if (!clkdm) |
506 | return; | 521 | return; |
507 | 522 | ||
@@ -514,16 +529,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm) | |||
514 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", | 529 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", |
515 | clkdm->name); | 530 | clkdm->name); |
516 | 531 | ||
517 | if (cpu_is_omap24xx()) | 532 | _omap2_clkdm_set_hwsup(clkdm, 0); |
518 | v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; | ||
519 | else if (cpu_is_omap34xx()) | ||
520 | v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; | ||
521 | else | ||
522 | BUG(); | ||
523 | |||
524 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | ||
525 | v << __ffs(clkdm->clktrctrl_mask), | ||
526 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); | ||
527 | 533 | ||
528 | if (atomic_read(&clkdm->usecount) > 0) | 534 | if (atomic_read(&clkdm->usecount) > 0) |
529 | _clkdm_del_autodeps(clkdm); | 535 | _clkdm_del_autodeps(clkdm); |
@@ -569,10 +575,14 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |||
569 | v = omap2_clkdm_clktrctrl_read(clkdm); | 575 | v = omap2_clkdm_clktrctrl_read(clkdm); |
570 | 576 | ||
571 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || | 577 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || |
572 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) | 578 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { |
579 | /* Disable HW transitions when we are changing deps */ | ||
580 | _omap2_clkdm_set_hwsup(clkdm, 0); | ||
573 | _clkdm_add_autodeps(clkdm); | 581 | _clkdm_add_autodeps(clkdm); |
574 | else | 582 | _omap2_clkdm_set_hwsup(clkdm, 1); |
583 | } else { | ||
575 | omap2_clkdm_wakeup(clkdm); | 584 | omap2_clkdm_wakeup(clkdm); |
585 | } | ||
576 | 586 | ||
577 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | 587 | pwrdm_wait_transition(clkdm->pwrdm.ptr); |
578 | pwrdm_clkdm_state_switch(clkdm); | 588 | pwrdm_clkdm_state_switch(clkdm); |
@@ -623,10 +633,14 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |||
623 | v = omap2_clkdm_clktrctrl_read(clkdm); | 633 | v = omap2_clkdm_clktrctrl_read(clkdm); |
624 | 634 | ||
625 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || | 635 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || |
626 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) | 636 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { |
637 | /* Disable HW transitions when we are changing deps */ | ||
638 | _omap2_clkdm_set_hwsup(clkdm, 0); | ||
627 | _clkdm_del_autodeps(clkdm); | 639 | _clkdm_del_autodeps(clkdm); |
628 | else | 640 | _omap2_clkdm_set_hwsup(clkdm, 1); |
641 | } else { | ||
629 | omap2_clkdm_sleep(clkdm); | 642 | omap2_clkdm_sleep(clkdm); |
643 | } | ||
630 | 644 | ||
631 | pwrdm_clkdm_state_switch(clkdm); | 645 | pwrdm_clkdm_state_switch(clkdm); |
632 | 646 | ||
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index fd3154ae69b1..0eb676d7e807 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -829,10 +829,10 @@ EXPORT_SYMBOL(omap_free_dma); | |||
829 | * | 829 | * |
830 | * @param arb_rate | 830 | * @param arb_rate |
831 | * @param max_fifo_depth | 831 | * @param max_fifo_depth |
832 | * @param tparams - Number of thereads to reserve : DMA_THREAD_RESERVE_NORM | 832 | * @param tparams - Number of threads to reserve : DMA_THREAD_RESERVE_NORM |
833 | * DMA_THREAD_RESERVE_ONET | 833 | * DMA_THREAD_RESERVE_ONET |
834 | * DMA_THREAD_RESERVE_TWOT | 834 | * DMA_THREAD_RESERVE_TWOT |
835 | * DMA_THREAD_RESERVE_THREET | 835 | * DMA_THREAD_RESERVE_THREET |
836 | */ | 836 | */ |
837 | void | 837 | void |
838 | omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) | 838 | omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) |
@@ -844,11 +844,14 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) | |||
844 | return; | 844 | return; |
845 | } | 845 | } |
846 | 846 | ||
847 | if (max_fifo_depth == 0) | ||
848 | max_fifo_depth = 1; | ||
847 | if (arb_rate == 0) | 849 | if (arb_rate == 0) |
848 | arb_rate = 1; | 850 | arb_rate = 1; |
849 | 851 | ||
850 | reg = (arb_rate & 0xff) << 16; | 852 | reg = 0xff & max_fifo_depth; |
851 | reg |= (0xff & max_fifo_depth); | 853 | reg |= (0x3 & tparams) << 12; |
854 | reg |= (arb_rate & 0xff) << 16; | ||
852 | 855 | ||
853 | dma_write(reg, GCR); | 856 | dma_write(reg, GCR); |
854 | } | 857 | } |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 88ac9768f1c1..e664b912d7bb 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -595,7 +595,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) | |||
595 | rx &= 1; | 595 | rx &= 1; |
596 | if (cpu_is_omap2430() || cpu_is_omap34xx()) { | 596 | if (cpu_is_omap2430() || cpu_is_omap34xx()) { |
597 | w = OMAP_MCBSP_READ(io_base, RCCR); | 597 | w = OMAP_MCBSP_READ(io_base, RCCR); |
598 | w |= (tx ? RDISABLE : 0); | 598 | w |= (rx ? RDISABLE : 0); |
599 | OMAP_MCBSP_WRITE(io_base, RCCR, w); | 599 | OMAP_MCBSP_WRITE(io_base, RCCR, w); |
600 | } | 600 | } |
601 | w = OMAP_MCBSP_READ(io_base, SPCR1); | 601 | w = OMAP_MCBSP_READ(io_base, SPCR1); |