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-rw-r--r--arch/arm/Kconfig17
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/.gitignore2
-rw-r--r--arch/arm/boot/compressed/.gitignore1
-rw-r--r--arch/arm/common/dmabounce.c87
-rw-r--r--arch/arm/common/gic.c109
-rw-r--r--arch/arm/configs/at91sam9263ek_defconfig1184
-rw-r--r--arch/arm/configs/ateb9200_defconfig2
-rw-r--r--arch/arm/configs/csb337_defconfig8
-rw-r--r--arch/arm/configs/csb637_defconfig6
-rw-r--r--arch/arm/configs/kafa_defconfig2
-rw-r--r--arch/arm/kernel/Makefile1
-rw-r--r--arch/arm/kernel/calls.S1
-rw-r--r--arch/arm/kernel/crunch.c1
-rw-r--r--arch/arm/kernel/ecard.c2
-rw-r--r--arch/arm/kernel/machine_kexec.c78
-rw-r--r--arch/arm/kernel/relocate_kernel.S74
-rw-r--r--arch/arm/kernel/setup.c3
-rw-r--r--arch/arm/kernel/time.c4
-rw-r--r--arch/arm/mach-at91/Kconfig (renamed from arch/arm/mach-at91rm9200/Kconfig)39
-rw-r--r--arch/arm/mach-at91/Makefile (renamed from arch/arm/mach-at91rm9200/Makefile)4
-rw-r--r--arch/arm/mach-at91/Makefile.boot (renamed from arch/arm/mach-at91rm9200/Makefile.boot)0
-rw-r--r--arch/arm/mach-at91/at91rm9200.c (renamed from arch/arm/mach-at91rm9200/at91rm9200.c)39
-rw-r--r--arch/arm/mach-at91/at91rm9200_devices.c (renamed from arch/arm/mach-at91rm9200/at91rm9200_devices.c)10
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c (renamed from arch/arm/mach-at91rm9200/at91rm9200_time.c)2
-rw-r--r--arch/arm/mach-at91/at91sam9260.c (renamed from arch/arm/mach-at91rm9200/at91sam9260.c)90
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c (renamed from arch/arm/mach-at91rm9200/at91sam9260_devices.c)16
-rw-r--r--arch/arm/mach-at91/at91sam9261.c (renamed from arch/arm/mach-at91rm9200/at91sam9261.c)23
-rw-r--r--arch/arm/mach-at91/at91sam9261_devices.c (renamed from arch/arm/mach-at91rm9200/at91sam9261_devices.c)10
-rw-r--r--arch/arm/mach-at91/at91sam9263.c313
-rw-r--r--arch/arm/mach-at91/at91sam9263_devices.c818
-rw-r--r--arch/arm/mach-at91/at91sam926x_time.c (renamed from arch/arm/mach-at91rm9200/at91sam926x_time.c)5
-rw-r--r--arch/arm/mach-at91/board-1arm.c (renamed from arch/arm/mach-at91rm9200/board-1arm.c)2
-rw-r--r--arch/arm/mach-at91/board-carmeva.c (renamed from arch/arm/mach-at91rm9200/board-carmeva.c)4
-rw-r--r--arch/arm/mach-at91/board-csb337.c (renamed from arch/arm/mach-at91rm9200/board-csb337.c)43
-rw-r--r--arch/arm/mach-at91/board-csb637.c (renamed from arch/arm/mach-at91rm9200/board-csb637.c)41
-rw-r--r--arch/arm/mach-at91/board-dk.c (renamed from arch/arm/mach-at91rm9200/board-dk.c)4
-rw-r--r--arch/arm/mach-at91/board-eb9200.c (renamed from arch/arm/mach-at91rm9200/board-eb9200.c)4
-rw-r--r--arch/arm/mach-at91/board-ek.c (renamed from arch/arm/mach-at91rm9200/board-ek.c)4
-rw-r--r--arch/arm/mach-at91/board-kafa.c (renamed from arch/arm/mach-at91rm9200/board-kafa.c)2
-rw-r--r--arch/arm/mach-at91/board-kb9202.c (renamed from arch/arm/mach-at91rm9200/board-kb9202.c)4
-rw-r--r--arch/arm/mach-at91/board-sam9260ek.c (renamed from arch/arm/mach-at91rm9200/board-sam9260ek.c)6
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c (renamed from arch/arm/mach-at91rm9200/board-sam9261ek.c)4
-rw-r--r--arch/arm/mach-at91/board-sam9263ek.c176
-rw-r--r--arch/arm/mach-at91/clock.c (renamed from arch/arm/mach-at91rm9200/clock.c)64
-rw-r--r--arch/arm/mach-at91/clock.h (renamed from arch/arm/mach-at91rm9200/clock.h)2
-rw-r--r--arch/arm/mach-at91/generic.h (renamed from arch/arm/mach-at91rm9200/generic.h)4
-rw-r--r--arch/arm/mach-at91/gpio.c (renamed from arch/arm/mach-at91rm9200/gpio.c)2
-rw-r--r--arch/arm/mach-at91/irq.c (renamed from arch/arm/mach-at91rm9200/irq.c)2
-rw-r--r--arch/arm/mach-at91/leds.c (renamed from arch/arm/mach-at91rm9200/leds.c)4
-rw-r--r--arch/arm/mach-at91/pm.c (renamed from arch/arm/mach-at91rm9200/pm.c)4
-rw-r--r--arch/arm/mach-ep93xx/clock.c6
-rw-r--r--arch/arm/mach-ep93xx/core.c115
-rw-r--r--arch/arm/mach-pxa/generic.c24
-rw-r--r--arch/arm/mach-realview/Kconfig11
-rw-r--r--arch/arm/mach-realview/platsmp.c4
-rw-r--r--arch/arm/mach-realview/realview_eb.c38
-rw-r--r--arch/arm/mm/Kconfig11
-rw-r--r--arch/arm/mm/Makefile2
-rw-r--r--arch/arm/mm/cache-l2x0.c104
-rw-r--r--arch/arm/mm/consistent.c17
-rw-r--r--arch/arm/mm/context.c12
-rw-r--r--arch/arm/mm/fault-armv.c2
-rw-r--r--arch/arm/mm/mmu.c3
-rw-r--r--arch/arm/mm/proc-v6.S22
-rw-r--r--arch/arm/mm/proc-xsc3.S151
-rw-r--r--arch/arm/mm/tlb-v6.S4
-rw-r--r--arch/avr32/mach-at32ap/clock.c2
-rw-r--r--arch/avr32/mach-at32ap/clock.h2
69 files changed, 3539 insertions, 320 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0f711c4394a9..195650935c78 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -280,6 +280,7 @@ config ARCH_PXA
280 bool "PXA2xx-based" 280 bool "PXA2xx-based"
281 depends on MMU 281 depends on MMU
282 select ARCH_MTD_XIP 282 select ARCH_MTD_XIP
283 select GENERIC_TIME
283 help 284 help
284 Support for Intel's PXA2XX processor line. 285 Support for Intel's PXA2XX processor line.
285 286
@@ -386,7 +387,7 @@ source "arch/arm/mach-aaec2000/Kconfig"
386 387
387source "arch/arm/mach-realview/Kconfig" 388source "arch/arm/mach-realview/Kconfig"
388 389
389source "arch/arm/mach-at91rm9200/Kconfig" 390source "arch/arm/mach-at91/Kconfig"
390 391
391source "arch/arm/mach-netx/Kconfig" 392source "arch/arm/mach-netx/Kconfig"
392 393
@@ -747,6 +748,20 @@ config XIP_PHYS_ADDR
747 be linked for and stored to. This address is dependent on your 748 be linked for and stored to. This address is dependent on your
748 own flash usage. 749 own flash usage.
749 750
751config KEXEC
752 bool "Kexec system call (EXPERIMENTAL)"
753 depends on EXPERIMENTAL
754 help
755 kexec is a system call that implements the ability to shutdown your
756 current kernel, and to start another kernel. It is like a reboot
757 but it is indepedent of the system firmware. And like a reboot
758 you can start any kernel with it, not just Linux.
759
760 It is an ongoing process to be certain the hardware in a machine
761 is properly shutdown, so do not be surprised if this code does not
762 initially work for you. It may help to enable device hotplugging
763 support.
764
750endmenu 765endmenu
751 766
752if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX ) 767if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX )
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 93e474726725..2cd871c82c96 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -124,7 +124,7 @@ endif
124 machine-$(CONFIG_ARCH_H720X) := h720x 124 machine-$(CONFIG_ARCH_H720X) := h720x
125 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000 125 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
126 machine-$(CONFIG_ARCH_REALVIEW) := realview 126 machine-$(CONFIG_ARCH_REALVIEW) := realview
127 machine-$(CONFIG_ARCH_AT91) := at91rm9200 127 machine-$(CONFIG_ARCH_AT91) := at91
128 machine-$(CONFIG_ARCH_EP93XX) := ep93xx 128 machine-$(CONFIG_ARCH_EP93XX) := ep93xx
129 machine-$(CONFIG_ARCH_PNX4008) := pnx4008 129 machine-$(CONFIG_ARCH_PNX4008) := pnx4008
130 machine-$(CONFIG_ARCH_NETX) := netx 130 machine-$(CONFIG_ARCH_NETX) := netx
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
new file mode 100644
index 000000000000..171a0853caf8
--- /dev/null
+++ b/arch/arm/boot/.gitignore
@@ -0,0 +1,2 @@
1Image
2zImage
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
new file mode 100644
index 000000000000..aefee20cbf98
--- /dev/null
+++ b/arch/arm/boot/compressed/.gitignore
@@ -0,0 +1 @@
piggy.gz
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 2e635b814c14..6fbe7722aa44 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -32,7 +32,6 @@
32 32
33#include <asm/cacheflush.h> 33#include <asm/cacheflush.h>
34 34
35#undef DEBUG
36#undef STATS 35#undef STATS
37 36
38#ifdef STATS 37#ifdef STATS
@@ -66,14 +65,13 @@ struct dmabounce_pool {
66}; 65};
67 66
68struct dmabounce_device_info { 67struct dmabounce_device_info {
69 struct list_head node;
70
71 struct device *dev; 68 struct device *dev;
72 struct list_head safe_buffers; 69 struct list_head safe_buffers;
73#ifdef STATS 70#ifdef STATS
74 unsigned long total_allocs; 71 unsigned long total_allocs;
75 unsigned long map_op_count; 72 unsigned long map_op_count;
76 unsigned long bounce_count; 73 unsigned long bounce_count;
74 int attr_res;
77#endif 75#endif
78 struct dmabounce_pool small; 76 struct dmabounce_pool small;
79 struct dmabounce_pool large; 77 struct dmabounce_pool large;
@@ -81,33 +79,23 @@ struct dmabounce_device_info {
81 rwlock_t lock; 79 rwlock_t lock;
82}; 80};
83 81
84static LIST_HEAD(dmabounce_devs);
85
86#ifdef STATS 82#ifdef STATS
87static void print_alloc_stats(struct dmabounce_device_info *device_info) 83static ssize_t dmabounce_show(struct device *dev, struct device_attribute *attr,
84 char *buf)
88{ 85{
89 printk(KERN_INFO 86 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
90 "%s: dmabounce: sbp: %lu, lbp: %lu, other: %lu, total: %lu\n", 87 return sprintf(buf, "%lu %lu %lu %lu %lu %lu\n",
91 device_info->dev->bus_id, 88 device_info->small.allocs,
92 device_info->small.allocs, device_info->large.allocs, 89 device_info->large.allocs,
93 device_info->total_allocs - device_info->small.allocs - 90 device_info->total_allocs - device_info->small.allocs -
94 device_info->large.allocs, 91 device_info->large.allocs,
95 device_info->total_allocs); 92 device_info->total_allocs,
93 device_info->map_op_count,
94 device_info->bounce_count);
96} 95}
97#endif
98
99/* find the given device in the dmabounce device list */
100static inline struct dmabounce_device_info *
101find_dmabounce_dev(struct device *dev)
102{
103 struct dmabounce_device_info *d;
104 96
105 list_for_each_entry(d, &dmabounce_devs, node) 97static DEVICE_ATTR(dmabounce_stats, 0400, dmabounce_show, NULL);
106 if (d->dev == dev) 98#endif
107 return d;
108
109 return NULL;
110}
111 99
112 100
113/* allocate a 'safe' buffer and keep track of it */ 101/* allocate a 'safe' buffer and keep track of it */
@@ -162,8 +150,6 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr,
162 if (pool) 150 if (pool)
163 pool->allocs++; 151 pool->allocs++;
164 device_info->total_allocs++; 152 device_info->total_allocs++;
165 if (device_info->total_allocs % 1000 == 0)
166 print_alloc_stats(device_info);
167#endif 153#endif
168 154
169 write_lock_irqsave(&device_info->lock, flags); 155 write_lock_irqsave(&device_info->lock, flags);
@@ -218,20 +204,11 @@ free_safe_buffer(struct dmabounce_device_info *device_info, struct safe_buffer *
218 204
219/* ************************************************** */ 205/* ************************************************** */
220 206
221#ifdef STATS
222static void print_map_stats(struct dmabounce_device_info *device_info)
223{
224 dev_info(device_info->dev,
225 "dmabounce: map_op_count=%lu, bounce_count=%lu\n",
226 device_info->map_op_count, device_info->bounce_count);
227}
228#endif
229
230static inline dma_addr_t 207static inline dma_addr_t
231map_single(struct device *dev, void *ptr, size_t size, 208map_single(struct device *dev, void *ptr, size_t size,
232 enum dma_data_direction dir) 209 enum dma_data_direction dir)
233{ 210{
234 struct dmabounce_device_info *device_info = find_dmabounce_dev(dev); 211 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
235 dma_addr_t dma_addr; 212 dma_addr_t dma_addr;
236 int needs_bounce = 0; 213 int needs_bounce = 0;
237 214
@@ -281,10 +258,14 @@ map_single(struct device *dev, void *ptr, size_t size,
281 ptr = buf->safe; 258 ptr = buf->safe;
282 259
283 dma_addr = buf->safe_dma_addr; 260 dma_addr = buf->safe_dma_addr;
261 } else {
262 /*
263 * We don't need to sync the DMA buffer since
264 * it was allocated via the coherent allocators.
265 */
266 consistent_sync(ptr, size, dir);
284 } 267 }
285 268
286 consistent_sync(ptr, size, dir);
287
288 return dma_addr; 269 return dma_addr;
289} 270}
290 271
@@ -292,7 +273,7 @@ static inline void
292unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 273unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
293 enum dma_data_direction dir) 274 enum dma_data_direction dir)
294{ 275{
295 struct dmabounce_device_info *device_info = find_dmabounce_dev(dev); 276 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
296 struct safe_buffer *buf = NULL; 277 struct safe_buffer *buf = NULL;
297 278
298 /* 279 /*
@@ -317,12 +298,12 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
317 DO_STATS ( device_info->bounce_count++ ); 298 DO_STATS ( device_info->bounce_count++ );
318 299
319 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) { 300 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
320 unsigned long ptr; 301 void *ptr = buf->ptr;
321 302
322 dev_dbg(dev, 303 dev_dbg(dev,
323 "%s: copy back safe %p to unsafe %p size %d\n", 304 "%s: copy back safe %p to unsafe %p size %d\n",
324 __func__, buf->safe, buf->ptr, size); 305 __func__, buf->safe, ptr, size);
325 memcpy(buf->ptr, buf->safe, size); 306 memcpy(ptr, buf->safe, size);
326 307
327 /* 308 /*
328 * DMA buffers must have the same cache properties 309 * DMA buffers must have the same cache properties
@@ -332,8 +313,8 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
332 * bidirectional case because we know the cache 313 * bidirectional case because we know the cache
333 * lines will be coherent with the data written. 314 * lines will be coherent with the data written.
334 */ 315 */
335 ptr = (unsigned long)buf->ptr;
336 dmac_clean_range(ptr, ptr + size); 316 dmac_clean_range(ptr, ptr + size);
317 outer_clean_range(__pa(ptr), __pa(ptr) + size);
337 } 318 }
338 free_safe_buffer(device_info, buf); 319 free_safe_buffer(device_info, buf);
339 } 320 }
@@ -343,7 +324,7 @@ static inline void
343sync_single(struct device *dev, dma_addr_t dma_addr, size_t size, 324sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
344 enum dma_data_direction dir) 325 enum dma_data_direction dir)
345{ 326{
346 struct dmabounce_device_info *device_info = find_dmabounce_dev(dev); 327 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
347 struct safe_buffer *buf = NULL; 328 struct safe_buffer *buf = NULL;
348 329
349 if (device_info) 330 if (device_info)
@@ -397,7 +378,10 @@ sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
397 default: 378 default:
398 BUG(); 379 BUG();
399 } 380 }
400 consistent_sync(buf->safe, size, dir); 381 /*
382 * No need to sync the safe buffer - it was allocated
383 * via the coherent allocators.
384 */
401 } else { 385 } else {
402 consistent_sync(dma_to_virt(dev, dma_addr), size, dir); 386 consistent_sync(dma_to_virt(dev, dma_addr), size, dir);
403 } 387 }
@@ -604,9 +588,10 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
604 device_info->total_allocs = 0; 588 device_info->total_allocs = 0;
605 device_info->map_op_count = 0; 589 device_info->map_op_count = 0;
606 device_info->bounce_count = 0; 590 device_info->bounce_count = 0;
591 device_info->attr_res = device_create_file(dev, &dev_attr_dmabounce_stats);
607#endif 592#endif
608 593
609 list_add(&device_info->node, &dmabounce_devs); 594 dev->archdata.dmabounce = device_info;
610 595
611 printk(KERN_INFO "dmabounce: registered device %s on %s bus\n", 596 printk(KERN_INFO "dmabounce: registered device %s on %s bus\n",
612 dev->bus_id, dev->bus->name); 597 dev->bus_id, dev->bus->name);
@@ -623,7 +608,9 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size,
623void 608void
624dmabounce_unregister_dev(struct device *dev) 609dmabounce_unregister_dev(struct device *dev)
625{ 610{
626 struct dmabounce_device_info *device_info = find_dmabounce_dev(dev); 611 struct dmabounce_device_info *device_info = dev->archdata.dmabounce;
612
613 dev->archdata.dmabounce = NULL;
627 614
628 if (!device_info) { 615 if (!device_info) {
629 printk(KERN_WARNING 616 printk(KERN_WARNING
@@ -645,12 +632,10 @@ dmabounce_unregister_dev(struct device *dev)
645 dma_pool_destroy(device_info->large.pool); 632 dma_pool_destroy(device_info->large.pool);
646 633
647#ifdef STATS 634#ifdef STATS
648 print_alloc_stats(device_info); 635 if (device_info->attr_res == 0)
649 print_map_stats(device_info); 636 device_remove_file(dev, &dev_attr_dmabounce_stats);
650#endif 637#endif
651 638
652 list_del(&device_info->node);
653
654 kfree(device_info); 639 kfree(device_info);
655 640
656 printk(KERN_INFO "dmabounce: device %s on %s bus unregistered\n", 641 printk(KERN_INFO "dmabounce: device %s on %s bus unregistered\n",
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 09b9d1b6844c..4deece5fbdf4 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -14,7 +14,9 @@
14 * 14 *
15 * o There is one CPU Interface per CPU, which sends interrupts sent 15 * o There is one CPU Interface per CPU, which sends interrupts sent
16 * by the Distributor, and interrupts generated locally, to the 16 * by the Distributor, and interrupts generated locally, to the
17 * associated CPU. 17 * associated CPU. The base address of the CPU interface is usually
18 * aliased so that the same address points to different chips depending
19 * on the CPU it is accessed from.
18 * 20 *
19 * Note that IRQs 0-31 are special - they are local to each CPU. 21 * Note that IRQs 0-31 are special - they are local to each CPU.
20 * As such, the enable set/clear, pending set/clear and active bit 22 * As such, the enable set/clear, pending set/clear and active bit
@@ -31,10 +33,38 @@
31#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
32#include <asm/hardware/gic.h> 34#include <asm/hardware/gic.h>
33 35
34static void __iomem *gic_dist_base;
35static void __iomem *gic_cpu_base;
36static DEFINE_SPINLOCK(irq_controller_lock); 36static DEFINE_SPINLOCK(irq_controller_lock);
37 37
38struct gic_chip_data {
39 unsigned int irq_offset;
40 void __iomem *dist_base;
41 void __iomem *cpu_base;
42};
43
44#ifndef MAX_GIC_NR
45#define MAX_GIC_NR 1
46#endif
47
48static struct gic_chip_data gic_data[MAX_GIC_NR];
49
50static inline void __iomem *gic_dist_base(unsigned int irq)
51{
52 struct gic_chip_data *gic_data = get_irq_chip_data(irq);
53 return gic_data->dist_base;
54}
55
56static inline void __iomem *gic_cpu_base(unsigned int irq)
57{
58 struct gic_chip_data *gic_data = get_irq_chip_data(irq);
59 return gic_data->cpu_base;
60}
61
62static inline unsigned int gic_irq(unsigned int irq)
63{
64 struct gic_chip_data *gic_data = get_irq_chip_data(irq);
65 return irq - gic_data->irq_offset;
66}
67
38/* 68/*
39 * Routines to acknowledge, disable and enable interrupts 69 * Routines to acknowledge, disable and enable interrupts
40 * 70 *
@@ -55,8 +85,8 @@ static void gic_ack_irq(unsigned int irq)
55 u32 mask = 1 << (irq % 32); 85 u32 mask = 1 << (irq % 32);
56 86
57 spin_lock(&irq_controller_lock); 87 spin_lock(&irq_controller_lock);
58 writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4); 88 writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4);
59 writel(irq, gic_cpu_base + GIC_CPU_EOI); 89 writel(gic_irq(irq), gic_cpu_base(irq) + GIC_CPU_EOI);
60 spin_unlock(&irq_controller_lock); 90 spin_unlock(&irq_controller_lock);
61} 91}
62 92
@@ -65,7 +95,7 @@ static void gic_mask_irq(unsigned int irq)
65 u32 mask = 1 << (irq % 32); 95 u32 mask = 1 << (irq % 32);
66 96
67 spin_lock(&irq_controller_lock); 97 spin_lock(&irq_controller_lock);
68 writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4); 98 writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4);
69 spin_unlock(&irq_controller_lock); 99 spin_unlock(&irq_controller_lock);
70} 100}
71 101
@@ -74,14 +104,14 @@ static void gic_unmask_irq(unsigned int irq)
74 u32 mask = 1 << (irq % 32); 104 u32 mask = 1 << (irq % 32);
75 105
76 spin_lock(&irq_controller_lock); 106 spin_lock(&irq_controller_lock);
77 writel(mask, gic_dist_base + GIC_DIST_ENABLE_SET + (irq / 32) * 4); 107 writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_SET + (gic_irq(irq) / 32) * 4);
78 spin_unlock(&irq_controller_lock); 108 spin_unlock(&irq_controller_lock);
79} 109}
80 110
81#ifdef CONFIG_SMP 111#ifdef CONFIG_SMP
82static void gic_set_cpu(unsigned int irq, cpumask_t mask_val) 112static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
83{ 113{
84 void __iomem *reg = gic_dist_base + GIC_DIST_TARGET + (irq & ~3); 114 void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);
85 unsigned int shift = (irq % 4) * 8; 115 unsigned int shift = (irq % 4) * 8;
86 unsigned int cpu = first_cpu(mask_val); 116 unsigned int cpu = first_cpu(mask_val);
87 u32 val; 117 u32 val;
@@ -95,6 +125,37 @@ static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
95} 125}
96#endif 126#endif
97 127
128static void fastcall gic_handle_cascade_irq(unsigned int irq,
129 struct irq_desc *desc)
130{
131 struct gic_chip_data *chip_data = get_irq_data(irq);
132 struct irq_chip *chip = get_irq_chip(irq);
133 unsigned int cascade_irq;
134 unsigned long status;
135
136 /* primary controller ack'ing */
137 chip->ack(irq);
138
139 spin_lock(&irq_controller_lock);
140 status = readl(chip_data->cpu_base + GIC_CPU_INTACK);
141 spin_unlock(&irq_controller_lock);
142
143 cascade_irq = (status & 0x3ff);
144 if (cascade_irq > 1020)
145 goto out;
146 if (cascade_irq < 32 || cascade_irq >= NR_IRQS) {
147 do_bad_IRQ(cascade_irq, desc);
148 goto out;
149 }
150
151 cascade_irq += chip_data->irq_offset;
152 generic_handle_irq(cascade_irq);
153
154 out:
155 /* primary controller unmasking */
156 chip->unmask(irq);
157}
158
98static struct irq_chip gic_chip = { 159static struct irq_chip gic_chip = {
99 .name = "GIC", 160 .name = "GIC",
100 .ack = gic_ack_irq, 161 .ack = gic_ack_irq,
@@ -105,15 +166,29 @@ static struct irq_chip gic_chip = {
105#endif 166#endif
106}; 167};
107 168
108void __init gic_dist_init(void __iomem *base) 169void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
170{
171 if (gic_nr >= MAX_GIC_NR)
172 BUG();
173 if (set_irq_data(irq, &gic_data[gic_nr]) != 0)
174 BUG();
175 set_irq_chained_handler(irq, gic_handle_cascade_irq);
176}
177
178void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
179 unsigned int irq_start)
109{ 180{
110 unsigned int max_irq, i; 181 unsigned int max_irq, i;
111 u32 cpumask = 1 << smp_processor_id(); 182 u32 cpumask = 1 << smp_processor_id();
112 183
184 if (gic_nr >= MAX_GIC_NR)
185 BUG();
186
113 cpumask |= cpumask << 8; 187 cpumask |= cpumask << 8;
114 cpumask |= cpumask << 16; 188 cpumask |= cpumask << 16;
115 189
116 gic_dist_base = base; 190 gic_data[gic_nr].dist_base = base;
191 gic_data[gic_nr].irq_offset = (irq_start - 1) & ~31;
117 192
118 writel(0, base + GIC_DIST_CTRL); 193 writel(0, base + GIC_DIST_CTRL);
119 194
@@ -158,8 +233,9 @@ void __init gic_dist_init(void __iomem *base)
158 /* 233 /*
159 * Setup the Linux IRQ subsystem. 234 * Setup the Linux IRQ subsystem.
160 */ 235 */
161 for (i = 29; i < max_irq; i++) { 236 for (i = irq_start; i < gic_data[gic_nr].irq_offset + max_irq; i++) {
162 set_irq_chip(i, &gic_chip); 237 set_irq_chip(i, &gic_chip);
238 set_irq_chip_data(i, &gic_data[gic_nr]);
163 set_irq_handler(i, handle_level_irq); 239 set_irq_handler(i, handle_level_irq);
164 set_irq_flags(i, IRQF_VALID | IRQF_PROBE); 240 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
165 } 241 }
@@ -167,9 +243,13 @@ void __init gic_dist_init(void __iomem *base)
167 writel(1, base + GIC_DIST_CTRL); 243 writel(1, base + GIC_DIST_CTRL);
168} 244}
169 245
170void __cpuinit gic_cpu_init(void __iomem *base) 246void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
171{ 247{
172 gic_cpu_base = base; 248 if (gic_nr >= MAX_GIC_NR)
249 BUG();
250
251 gic_data[gic_nr].cpu_base = base;
252
173 writel(0xf0, base + GIC_CPU_PRIMASK); 253 writel(0xf0, base + GIC_CPU_PRIMASK);
174 writel(1, base + GIC_CPU_CTRL); 254 writel(1, base + GIC_CPU_CTRL);
175} 255}
@@ -179,6 +259,7 @@ void gic_raise_softirq(cpumask_t cpumask, unsigned int irq)
179{ 259{
180 unsigned long map = *cpus_addr(cpumask); 260 unsigned long map = *cpus_addr(cpumask);
181 261
182 writel(map << 16 | irq, gic_dist_base + GIC_DIST_SOFTINT); 262 /* this always happens on GIC0 */
263 writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);
183} 264}
184#endif 265#endif
diff --git a/arch/arm/configs/at91sam9263ek_defconfig b/arch/arm/configs/at91sam9263ek_defconfig
new file mode 100644
index 000000000000..c72ab82873d5
--- /dev/null
+++ b/arch/arm/configs/at91sam9263ek_defconfig
@@ -0,0 +1,1184 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20-rc1
4# Mon Jan 8 16:06:54 2007
5#
6CONFIG_ARM=y
7# CONFIG_GENERIC_TIME is not set
8CONFIG_MMU=y
9CONFIG_GENERIC_HARDIRQS=y
10CONFIG_TRACE_IRQFLAGS_SUPPORT=y
11CONFIG_HARDIRQS_SW_RESEND=y
12CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_RWSEM_GENERIC_SPINLOCK=y
14# CONFIG_ARCH_HAS_ILOG2_U32 is not set
15# CONFIG_ARCH_HAS_ILOG2_U64 is not set
16CONFIG_GENERIC_HWEIGHT=y
17CONFIG_GENERIC_CALIBRATE_DELAY=y
18CONFIG_VECTORS_BASE=0xffff0000
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
20
21#
22# Code maturity level options
23#
24CONFIG_EXPERIMENTAL=y
25CONFIG_BROKEN_ON_SMP=y
26CONFIG_INIT_ENV_ARG_LIMIT=32
27
28#
29# General setup
30#
31CONFIG_LOCALVERSION=""
32# CONFIG_LOCALVERSION_AUTO is not set
33# CONFIG_SWAP is not set
34CONFIG_SYSVIPC=y
35# CONFIG_IPC_NS is not set
36# CONFIG_POSIX_MQUEUE is not set
37# CONFIG_BSD_PROCESS_ACCT is not set
38# CONFIG_TASKSTATS is not set
39# CONFIG_UTS_NS is not set
40# CONFIG_AUDIT is not set
41# CONFIG_IKCONFIG is not set
42CONFIG_SYSFS_DEPRECATED=y
43# CONFIG_RELAY is not set
44CONFIG_INITRAMFS_SOURCE=""
45CONFIG_CC_OPTIMIZE_FOR_SIZE=y
46CONFIG_SYSCTL=y
47# CONFIG_EMBEDDED is not set
48CONFIG_UID16=y
49CONFIG_SYSCTL_SYSCALL=y
50CONFIG_KALLSYMS=y
51# CONFIG_KALLSYMS_ALL is not set
52# CONFIG_KALLSYMS_EXTRA_PASS is not set
53CONFIG_HOTPLUG=y
54CONFIG_PRINTK=y
55CONFIG_BUG=y
56CONFIG_ELF_CORE=y
57CONFIG_BASE_FULL=y
58CONFIG_FUTEX=y
59CONFIG_EPOLL=y
60CONFIG_SHMEM=y
61CONFIG_SLAB=y
62CONFIG_VM_EVENT_COUNTERS=y
63CONFIG_RT_MUTEXES=y
64# CONFIG_TINY_SHMEM is not set
65CONFIG_BASE_SMALL=0
66# CONFIG_SLOB is not set
67
68#
69# Loadable module support
70#
71CONFIG_MODULES=y
72CONFIG_MODULE_UNLOAD=y
73# CONFIG_MODULE_FORCE_UNLOAD is not set
74# CONFIG_MODVERSIONS is not set
75# CONFIG_MODULE_SRCVERSION_ALL is not set
76CONFIG_KMOD=y
77
78#
79# Block layer
80#
81CONFIG_BLOCK=y
82# CONFIG_LBD is not set
83# CONFIG_BLK_DEV_IO_TRACE is not set
84# CONFIG_LSF is not set
85
86#
87# IO Schedulers
88#
89CONFIG_IOSCHED_NOOP=y
90CONFIG_IOSCHED_AS=y
91# CONFIG_IOSCHED_DEADLINE is not set
92# CONFIG_IOSCHED_CFQ is not set
93CONFIG_DEFAULT_AS=y
94# CONFIG_DEFAULT_DEADLINE is not set
95# CONFIG_DEFAULT_CFQ is not set
96# CONFIG_DEFAULT_NOOP is not set
97CONFIG_DEFAULT_IOSCHED="anticipatory"
98
99#
100# System Type
101#
102# CONFIG_ARCH_AAEC2000 is not set
103# CONFIG_ARCH_INTEGRATOR is not set
104# CONFIG_ARCH_REALVIEW is not set
105# CONFIG_ARCH_VERSATILE is not set
106CONFIG_ARCH_AT91=y
107# CONFIG_ARCH_CLPS7500 is not set
108# CONFIG_ARCH_CLPS711X is not set
109# CONFIG_ARCH_CO285 is not set
110# CONFIG_ARCH_EBSA110 is not set
111# CONFIG_ARCH_EP93XX is not set
112# CONFIG_ARCH_FOOTBRIDGE is not set
113# CONFIG_ARCH_NETX is not set
114# CONFIG_ARCH_H720X is not set
115# CONFIG_ARCH_IMX is not set
116# CONFIG_ARCH_IOP32X is not set
117# CONFIG_ARCH_IOP33X is not set
118# CONFIG_ARCH_IOP13XX is not set
119# CONFIG_ARCH_IXP4XX is not set
120# CONFIG_ARCH_IXP2000 is not set
121# CONFIG_ARCH_IXP23XX is not set
122# CONFIG_ARCH_L7200 is not set
123# CONFIG_ARCH_PNX4008 is not set
124# CONFIG_ARCH_PXA is not set
125# CONFIG_ARCH_RPC is not set
126# CONFIG_ARCH_SA1100 is not set
127# CONFIG_ARCH_S3C2410 is not set
128# CONFIG_ARCH_SHARK is not set
129# CONFIG_ARCH_LH7A40X is not set
130# CONFIG_ARCH_OMAP is not set
131
132#
133# Atmel AT91 System-on-Chip
134#
135# CONFIG_ARCH_AT91RM9200 is not set
136# CONFIG_ARCH_AT91SAM9260 is not set
137# CONFIG_ARCH_AT91SAM9261 is not set
138CONFIG_ARCH_AT91SAM9263=y
139
140#
141# AT91SAM9263 Board Type
142#
143CONFIG_MACH_AT91SAM9263EK=y
144
145#
146# AT91 Board Options
147#
148CONFIG_MTD_AT91_DATAFLASH_CARD=y
149# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
150
151#
152# AT91 Feature Selections
153#
154# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
155
156#
157# Processor Type
158#
159CONFIG_CPU_32=y
160CONFIG_CPU_ARM926T=y
161CONFIG_CPU_32v5=y
162CONFIG_CPU_ABRT_EV5TJ=y
163CONFIG_CPU_CACHE_VIVT=y
164CONFIG_CPU_COPY_V4WB=y
165CONFIG_CPU_TLB_V4WBI=y
166CONFIG_CPU_CP15=y
167CONFIG_CPU_CP15_MMU=y
168
169#
170# Processor Features
171#
172# CONFIG_ARM_THUMB is not set
173# CONFIG_CPU_ICACHE_DISABLE is not set
174# CONFIG_CPU_DCACHE_DISABLE is not set
175# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
176# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
177
178#
179# Bus support
180#
181
182#
183# PCCARD (PCMCIA/CardBus) support
184#
185# CONFIG_PCCARD is not set
186
187#
188# Kernel Features
189#
190# CONFIG_PREEMPT is not set
191# CONFIG_NO_IDLE_HZ is not set
192CONFIG_HZ=100
193# CONFIG_AEABI is not set
194# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
195CONFIG_SELECT_MEMORY_MODEL=y
196CONFIG_FLATMEM_MANUAL=y
197# CONFIG_DISCONTIGMEM_MANUAL is not set
198# CONFIG_SPARSEMEM_MANUAL is not set
199CONFIG_FLATMEM=y
200CONFIG_FLAT_NODE_MEM_MAP=y
201# CONFIG_SPARSEMEM_STATIC is not set
202CONFIG_SPLIT_PTLOCK_CPUS=4096
203# CONFIG_RESOURCES_64BIT is not set
204# CONFIG_LEDS is not set
205CONFIG_ALIGNMENT_TRAP=y
206
207#
208# Boot options
209#
210CONFIG_ZBOOT_ROM_TEXT=0x0
211CONFIG_ZBOOT_ROM_BSS=0x0
212CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
213# CONFIG_XIP_KERNEL is not set
214
215#
216# Floating point emulation
217#
218
219#
220# At least one emulation must be selected
221#
222CONFIG_FPE_NWFPE=y
223# CONFIG_FPE_NWFPE_XP is not set
224# CONFIG_FPE_FASTFPE is not set
225# CONFIG_VFP is not set
226
227#
228# Userspace binary formats
229#
230CONFIG_BINFMT_ELF=y
231# CONFIG_BINFMT_AOUT is not set
232# CONFIG_BINFMT_MISC is not set
233# CONFIG_ARTHUR is not set
234
235#
236# Power management options
237#
238# CONFIG_PM is not set
239# CONFIG_APM is not set
240
241#
242# Networking
243#
244CONFIG_NET=y
245
246#
247# Networking options
248#
249# CONFIG_NETDEBUG is not set
250CONFIG_PACKET=y
251# CONFIG_PACKET_MMAP is not set
252CONFIG_UNIX=y
253# CONFIG_NET_KEY is not set
254CONFIG_INET=y
255# CONFIG_IP_MULTICAST is not set
256# CONFIG_IP_ADVANCED_ROUTER is not set
257CONFIG_IP_FIB_HASH=y
258CONFIG_IP_PNP=y
259# CONFIG_IP_PNP_DHCP is not set
260CONFIG_IP_PNP_BOOTP=y
261CONFIG_IP_PNP_RARP=y
262# CONFIG_NET_IPIP is not set
263# CONFIG_NET_IPGRE is not set
264# CONFIG_ARPD is not set
265# CONFIG_SYN_COOKIES is not set
266# CONFIG_INET_AH is not set
267# CONFIG_INET_ESP is not set
268# CONFIG_INET_IPCOMP is not set
269# CONFIG_INET_XFRM_TUNNEL is not set
270# CONFIG_INET_TUNNEL is not set
271# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
272# CONFIG_INET_XFRM_MODE_TUNNEL is not set
273# CONFIG_INET_XFRM_MODE_BEET is not set
274# CONFIG_INET_DIAG is not set
275# CONFIG_TCP_CONG_ADVANCED is not set
276CONFIG_TCP_CONG_CUBIC=y
277CONFIG_DEFAULT_TCP_CONG="cubic"
278# CONFIG_TCP_MD5SIG is not set
279# CONFIG_IPV6 is not set
280# CONFIG_INET6_XFRM_TUNNEL is not set
281# CONFIG_INET6_TUNNEL is not set
282# CONFIG_NETWORK_SECMARK is not set
283# CONFIG_NETFILTER is not set
284
285#
286# DCCP Configuration (EXPERIMENTAL)
287#
288# CONFIG_IP_DCCP is not set
289
290#
291# SCTP Configuration (EXPERIMENTAL)
292#
293# CONFIG_IP_SCTP is not set
294
295#
296# TIPC Configuration (EXPERIMENTAL)
297#
298# CONFIG_TIPC is not set
299# CONFIG_ATM is not set
300# CONFIG_BRIDGE is not set
301# CONFIG_VLAN_8021Q is not set
302# CONFIG_DECNET is not set
303# CONFIG_LLC2 is not set
304# CONFIG_IPX is not set
305# CONFIG_ATALK is not set
306# CONFIG_X25 is not set
307# CONFIG_LAPB is not set
308# CONFIG_ECONET is not set
309# CONFIG_WAN_ROUTER is not set
310
311#
312# QoS and/or fair queueing
313#
314# CONFIG_NET_SCHED is not set
315
316#
317# Network testing
318#
319# CONFIG_NET_PKTGEN is not set
320# CONFIG_HAMRADIO is not set
321# CONFIG_IRDA is not set
322# CONFIG_BT is not set
323# CONFIG_IEEE80211 is not set
324
325#
326# Device Drivers
327#
328
329#
330# Generic Driver Options
331#
332CONFIG_STANDALONE=y
333CONFIG_PREVENT_FIRMWARE_BUILD=y
334# CONFIG_FW_LOADER is not set
335# CONFIG_DEBUG_DRIVER is not set
336# CONFIG_SYS_HYPERVISOR is not set
337
338#
339# Connector - unified userspace <-> kernelspace linker
340#
341# CONFIG_CONNECTOR is not set
342
343#
344# Memory Technology Devices (MTD)
345#
346CONFIG_MTD=y
347# CONFIG_MTD_DEBUG is not set
348# CONFIG_MTD_CONCAT is not set
349CONFIG_MTD_PARTITIONS=y
350# CONFIG_MTD_REDBOOT_PARTS is not set
351CONFIG_MTD_CMDLINE_PARTS=y
352# CONFIG_MTD_AFS_PARTS is not set
353
354#
355# User Modules And Translation Layers
356#
357CONFIG_MTD_CHAR=y
358CONFIG_MTD_BLKDEVS=y
359CONFIG_MTD_BLOCK=y
360# CONFIG_FTL is not set
361# CONFIG_NFTL is not set
362# CONFIG_INFTL is not set
363# CONFIG_RFD_FTL is not set
364# CONFIG_SSFDC is not set
365
366#
367# RAM/ROM/Flash chip drivers
368#
369# CONFIG_MTD_CFI is not set
370# CONFIG_MTD_JEDECPROBE is not set
371CONFIG_MTD_MAP_BANK_WIDTH_1=y
372CONFIG_MTD_MAP_BANK_WIDTH_2=y
373CONFIG_MTD_MAP_BANK_WIDTH_4=y
374# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
375# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
376# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
377CONFIG_MTD_CFI_I1=y
378CONFIG_MTD_CFI_I2=y
379# CONFIG_MTD_CFI_I4 is not set
380# CONFIG_MTD_CFI_I8 is not set
381# CONFIG_MTD_RAM is not set
382# CONFIG_MTD_ROM is not set
383# CONFIG_MTD_ABSENT is not set
384# CONFIG_MTD_OBSOLETE_CHIPS is not set
385
386#
387# Mapping drivers for chip access
388#
389# CONFIG_MTD_COMPLEX_MAPPINGS is not set
390# CONFIG_MTD_PLATRAM is not set
391
392#
393# Self-contained MTD device drivers
394#
395CONFIG_MTD_DATAFLASH=y
396# CONFIG_MTD_M25P80 is not set
397# CONFIG_MTD_SLRAM is not set
398# CONFIG_MTD_PHRAM is not set
399# CONFIG_MTD_MTDRAM is not set
400# CONFIG_MTD_BLOCK2MTD is not set
401
402#
403# Disk-On-Chip Device Drivers
404#
405# CONFIG_MTD_DOC2000 is not set
406# CONFIG_MTD_DOC2001 is not set
407# CONFIG_MTD_DOC2001PLUS is not set
408
409#
410# NAND Flash Device Drivers
411#
412CONFIG_MTD_NAND=y
413# CONFIG_MTD_NAND_VERIFY_WRITE is not set
414# CONFIG_MTD_NAND_ECC_SMC is not set
415CONFIG_MTD_NAND_IDS=y
416# CONFIG_MTD_NAND_DISKONCHIP is not set
417CONFIG_MTD_NAND_AT91=y
418# CONFIG_MTD_NAND_NANDSIM is not set
419
420#
421# OneNAND Flash Device Drivers
422#
423# CONFIG_MTD_ONENAND is not set
424
425#
426# Parallel port support
427#
428# CONFIG_PARPORT is not set
429
430#
431# Plug and Play support
432#
433
434#
435# Block devices
436#
437# CONFIG_BLK_DEV_COW_COMMON is not set
438CONFIG_BLK_DEV_LOOP=y
439# CONFIG_BLK_DEV_CRYPTOLOOP is not set
440# CONFIG_BLK_DEV_NBD is not set
441# CONFIG_BLK_DEV_UB is not set
442CONFIG_BLK_DEV_RAM=y
443CONFIG_BLK_DEV_RAM_COUNT=16
444CONFIG_BLK_DEV_RAM_SIZE=8192
445CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
446CONFIG_BLK_DEV_INITRD=y
447# CONFIG_CDROM_PKTCDVD is not set
448# CONFIG_ATA_OVER_ETH is not set
449
450#
451# SCSI device support
452#
453# CONFIG_RAID_ATTRS is not set
454CONFIG_SCSI=y
455# CONFIG_SCSI_TGT is not set
456# CONFIG_SCSI_NETLINK is not set
457CONFIG_SCSI_PROC_FS=y
458
459#
460# SCSI support type (disk, tape, CD-ROM)
461#
462CONFIG_BLK_DEV_SD=y
463# CONFIG_CHR_DEV_ST is not set
464# CONFIG_CHR_DEV_OSST is not set
465# CONFIG_BLK_DEV_SR is not set
466# CONFIG_CHR_DEV_SG is not set
467# CONFIG_CHR_DEV_SCH is not set
468
469#
470# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
471#
472CONFIG_SCSI_MULTI_LUN=y
473# CONFIG_SCSI_CONSTANTS is not set
474# CONFIG_SCSI_LOGGING is not set
475# CONFIG_SCSI_SCAN_ASYNC is not set
476
477#
478# SCSI Transports
479#
480# CONFIG_SCSI_SPI_ATTRS is not set
481# CONFIG_SCSI_FC_ATTRS is not set
482# CONFIG_SCSI_ISCSI_ATTRS is not set
483# CONFIG_SCSI_SAS_ATTRS is not set
484# CONFIG_SCSI_SAS_LIBSAS is not set
485
486#
487# SCSI low-level drivers
488#
489# CONFIG_ISCSI_TCP is not set
490# CONFIG_SCSI_DEBUG is not set
491
492#
493# Serial ATA (prod) and Parallel ATA (experimental) drivers
494#
495# CONFIG_ATA is not set
496
497#
498# Multi-device support (RAID and LVM)
499#
500# CONFIG_MD is not set
501
502#
503# Fusion MPT device support
504#
505# CONFIG_FUSION is not set
506
507#
508# IEEE 1394 (FireWire) support
509#
510
511#
512# I2O device support
513#
514
515#
516# Network device support
517#
518CONFIG_NETDEVICES=y
519# CONFIG_DUMMY is not set
520# CONFIG_BONDING is not set
521# CONFIG_EQUALIZER is not set
522# CONFIG_TUN is not set
523
524#
525# PHY device support
526#
527# CONFIG_PHYLIB is not set
528
529#
530# Ethernet (10 or 100Mbit)
531#
532CONFIG_NET_ETHERNET=y
533CONFIG_MII=y
534# CONFIG_SMC91X is not set
535# CONFIG_DM9000 is not set
536
537#
538# Ethernet (1000 Mbit)
539#
540
541#
542# Ethernet (10000 Mbit)
543#
544
545#
546# Token Ring devices
547#
548
549#
550# Wireless LAN (non-hamradio)
551#
552# CONFIG_NET_RADIO is not set
553
554#
555# Wan interfaces
556#
557# CONFIG_WAN is not set
558# CONFIG_PPP is not set
559# CONFIG_SLIP is not set
560# CONFIG_SHAPER is not set
561# CONFIG_NETCONSOLE is not set
562# CONFIG_NETPOLL is not set
563# CONFIG_NET_POLL_CONTROLLER is not set
564
565#
566# ISDN subsystem
567#
568# CONFIG_ISDN is not set
569
570#
571# Input device support
572#
573CONFIG_INPUT=y
574# CONFIG_INPUT_FF_MEMLESS is not set
575
576#
577# Userland interfaces
578#
579CONFIG_INPUT_MOUSEDEV=y
580# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
581CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
582CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
583# CONFIG_INPUT_JOYDEV is not set
584CONFIG_INPUT_TSDEV=y
585CONFIG_INPUT_TSDEV_SCREEN_X=240
586CONFIG_INPUT_TSDEV_SCREEN_Y=320
587CONFIG_INPUT_EVDEV=y
588# CONFIG_INPUT_EVBUG is not set
589
590#
591# Input Device Drivers
592#
593# CONFIG_INPUT_KEYBOARD is not set
594# CONFIG_INPUT_MOUSE is not set
595# CONFIG_INPUT_JOYSTICK is not set
596CONFIG_INPUT_TOUCHSCREEN=y
597CONFIG_TOUCHSCREEN_ADS7846=y
598# CONFIG_TOUCHSCREEN_GUNZE is not set
599# CONFIG_TOUCHSCREEN_ELO is not set
600# CONFIG_TOUCHSCREEN_MTOUCH is not set
601# CONFIG_TOUCHSCREEN_MK712 is not set
602# CONFIG_TOUCHSCREEN_PENMOUNT is not set
603# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
604# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
605# CONFIG_TOUCHSCREEN_UCB1400 is not set
606# CONFIG_INPUT_MISC is not set
607
608#
609# Hardware I/O ports
610#
611# CONFIG_SERIO is not set
612# CONFIG_GAMEPORT is not set
613
614#
615# Character devices
616#
617CONFIG_VT=y
618CONFIG_VT_CONSOLE=y
619CONFIG_HW_CONSOLE=y
620# CONFIG_VT_HW_CONSOLE_BINDING is not set
621# CONFIG_SERIAL_NONSTANDARD is not set
622
623#
624# Serial drivers
625#
626# CONFIG_SERIAL_8250 is not set
627
628#
629# Non-8250 serial port support
630#
631CONFIG_SERIAL_ATMEL=y
632CONFIG_SERIAL_ATMEL_CONSOLE=y
633# CONFIG_SERIAL_ATMEL_TTYAT is not set
634CONFIG_SERIAL_CORE=y
635CONFIG_SERIAL_CORE_CONSOLE=y
636CONFIG_UNIX98_PTYS=y
637CONFIG_LEGACY_PTYS=y
638CONFIG_LEGACY_PTY_COUNT=256
639
640#
641# IPMI
642#
643# CONFIG_IPMI_HANDLER is not set
644
645#
646# Watchdog Cards
647#
648CONFIG_WATCHDOG=y
649CONFIG_WATCHDOG_NOWAYOUT=y
650
651#
652# Watchdog Device Drivers
653#
654# CONFIG_SOFT_WATCHDOG is not set
655
656#
657# USB-based Watchdog Cards
658#
659# CONFIG_USBPCWATCHDOG is not set
660CONFIG_HW_RANDOM=y
661# CONFIG_NVRAM is not set
662# CONFIG_DTLK is not set
663# CONFIG_R3964 is not set
664# CONFIG_RAW_DRIVER is not set
665
666#
667# TPM devices
668#
669# CONFIG_TCG_TPM is not set
670
671#
672# I2C support
673#
674CONFIG_I2C=y
675CONFIG_I2C_CHARDEV=y
676
677#
678# I2C Algorithms
679#
680# CONFIG_I2C_ALGOBIT is not set
681# CONFIG_I2C_ALGOPCF is not set
682# CONFIG_I2C_ALGOPCA is not set
683
684#
685# I2C Hardware Bus support
686#
687CONFIG_I2C_AT91=y
688# CONFIG_I2C_OCORES is not set
689# CONFIG_I2C_PARPORT_LIGHT is not set
690# CONFIG_I2C_STUB is not set
691# CONFIG_I2C_PCA is not set
692# CONFIG_I2C_PCA_ISA is not set
693
694#
695# Miscellaneous I2C Chip support
696#
697# CONFIG_SENSORS_DS1337 is not set
698# CONFIG_SENSORS_DS1374 is not set
699# CONFIG_SENSORS_EEPROM is not set
700# CONFIG_SENSORS_PCF8574 is not set
701# CONFIG_SENSORS_PCA9539 is not set
702# CONFIG_SENSORS_PCF8591 is not set
703# CONFIG_SENSORS_MAX6875 is not set
704# CONFIG_I2C_DEBUG_CORE is not set
705# CONFIG_I2C_DEBUG_ALGO is not set
706# CONFIG_I2C_DEBUG_BUS is not set
707# CONFIG_I2C_DEBUG_CHIP is not set
708
709#
710# SPI support
711#
712CONFIG_SPI=y
713# CONFIG_SPI_DEBUG is not set
714CONFIG_SPI_MASTER=y
715
716#
717# SPI Master Controller Drivers
718#
719CONFIG_SPI_ATMEL=y
720# CONFIG_SPI_BITBANG is not set
721
722#
723# SPI Protocol Masters
724#
725
726#
727# Dallas's 1-wire bus
728#
729# CONFIG_W1 is not set
730
731#
732# Hardware Monitoring support
733#
734# CONFIG_HWMON is not set
735# CONFIG_HWMON_VID is not set
736
737#
738# Misc devices
739#
740# CONFIG_TIFM_CORE is not set
741
742#
743# LED devices
744#
745# CONFIG_NEW_LEDS is not set
746
747#
748# LED drivers
749#
750
751#
752# LED Triggers
753#
754
755#
756# Multimedia devices
757#
758# CONFIG_VIDEO_DEV is not set
759
760#
761# Digital Video Broadcasting Devices
762#
763# CONFIG_DVB is not set
764# CONFIG_USB_DABUSB is not set
765
766#
767# Graphics support
768#
769# CONFIG_FIRMWARE_EDID is not set
770CONFIG_FB=y
771# CONFIG_FB_CFB_FILLRECT is not set
772# CONFIG_FB_CFB_COPYAREA is not set
773# CONFIG_FB_CFB_IMAGEBLIT is not set
774# CONFIG_FB_MACMODES is not set
775# CONFIG_FB_BACKLIGHT is not set
776# CONFIG_FB_MODE_HELPERS is not set
777# CONFIG_FB_TILEBLITTING is not set
778# CONFIG_FB_S1D13XXX is not set
779# CONFIG_FB_VIRTUAL is not set
780
781#
782# Console display driver support
783#
784# CONFIG_VGA_CONSOLE is not set
785CONFIG_DUMMY_CONSOLE=y
786# CONFIG_FRAMEBUFFER_CONSOLE is not set
787
788#
789# Logo configuration
790#
791# CONFIG_LOGO is not set
792# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
793
794#
795# Sound
796#
797# CONFIG_SOUND is not set
798
799#
800# HID Devices
801#
802CONFIG_HID=y
803
804#
805# USB support
806#
807CONFIG_USB_ARCH_HAS_HCD=y
808CONFIG_USB_ARCH_HAS_OHCI=y
809# CONFIG_USB_ARCH_HAS_EHCI is not set
810CONFIG_USB=y
811# CONFIG_USB_DEBUG is not set
812
813#
814# Miscellaneous USB options
815#
816CONFIG_USB_DEVICEFS=y
817# CONFIG_USB_BANDWIDTH is not set
818# CONFIG_USB_DYNAMIC_MINORS is not set
819# CONFIG_USB_MULTITHREAD_PROBE is not set
820# CONFIG_USB_OTG is not set
821
822#
823# USB Host Controller Drivers
824#
825# CONFIG_USB_ISP116X_HCD is not set
826CONFIG_USB_OHCI_HCD=y
827# CONFIG_USB_OHCI_BIG_ENDIAN is not set
828CONFIG_USB_OHCI_LITTLE_ENDIAN=y
829# CONFIG_USB_SL811_HCD is not set
830
831#
832# USB Device Class drivers
833#
834# CONFIG_USB_ACM is not set
835# CONFIG_USB_PRINTER is not set
836
837#
838# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
839#
840
841#
842# may also be needed; see USB_STORAGE Help for more information
843#
844CONFIG_USB_STORAGE=y
845# CONFIG_USB_STORAGE_DEBUG is not set
846# CONFIG_USB_STORAGE_DATAFAB is not set
847# CONFIG_USB_STORAGE_FREECOM is not set
848# CONFIG_USB_STORAGE_DPCM is not set
849# CONFIG_USB_STORAGE_USBAT is not set
850# CONFIG_USB_STORAGE_SDDR09 is not set
851# CONFIG_USB_STORAGE_SDDR55 is not set
852# CONFIG_USB_STORAGE_JUMPSHOT is not set
853# CONFIG_USB_STORAGE_ALAUDA is not set
854# CONFIG_USB_STORAGE_ONETOUCH is not set
855# CONFIG_USB_STORAGE_KARMA is not set
856# CONFIG_USB_LIBUSUAL is not set
857
858#
859# USB Input Devices
860#
861# CONFIG_USB_HID is not set
862
863#
864# USB HID Boot Protocol drivers
865#
866# CONFIG_USB_KBD is not set
867# CONFIG_USB_MOUSE is not set
868# CONFIG_USB_AIPTEK is not set
869# CONFIG_USB_WACOM is not set
870# CONFIG_USB_ACECAD is not set
871# CONFIG_USB_KBTAB is not set
872# CONFIG_USB_POWERMATE is not set
873# CONFIG_USB_TOUCHSCREEN is not set
874# CONFIG_USB_YEALINK is not set
875# CONFIG_USB_XPAD is not set
876# CONFIG_USB_ATI_REMOTE is not set
877# CONFIG_USB_ATI_REMOTE2 is not set
878# CONFIG_USB_KEYSPAN_REMOTE is not set
879# CONFIG_USB_APPLETOUCH is not set
880
881#
882# USB Imaging devices
883#
884# CONFIG_USB_MDC800 is not set
885# CONFIG_USB_MICROTEK is not set
886
887#
888# USB Network Adapters
889#
890# CONFIG_USB_CATC is not set
891# CONFIG_USB_KAWETH is not set
892# CONFIG_USB_PEGASUS is not set
893# CONFIG_USB_RTL8150 is not set
894# CONFIG_USB_USBNET_MII is not set
895# CONFIG_USB_USBNET is not set
896CONFIG_USB_MON=y
897
898#
899# USB port drivers
900#
901
902#
903# USB Serial Converter support
904#
905# CONFIG_USB_SERIAL is not set
906
907#
908# USB Miscellaneous drivers
909#
910# CONFIG_USB_EMI62 is not set
911# CONFIG_USB_EMI26 is not set
912# CONFIG_USB_ADUTUX is not set
913# CONFIG_USB_AUERSWALD is not set
914# CONFIG_USB_RIO500 is not set
915# CONFIG_USB_LEGOTOWER is not set
916# CONFIG_USB_LCD is not set
917# CONFIG_USB_LED is not set
918# CONFIG_USB_CYPRESS_CY7C63 is not set
919# CONFIG_USB_CYTHERM is not set
920# CONFIG_USB_PHIDGET is not set
921# CONFIG_USB_IDMOUSE is not set
922# CONFIG_USB_FTDI_ELAN is not set
923# CONFIG_USB_APPLEDISPLAY is not set
924# CONFIG_USB_LD is not set
925# CONFIG_USB_TRANCEVIBRATOR is not set
926# CONFIG_USB_TEST is not set
927
928#
929# USB DSL modem support
930#
931
932#
933# USB Gadget Support
934#
935CONFIG_USB_GADGET=y
936# CONFIG_USB_GADGET_DEBUG_FILES is not set
937CONFIG_USB_GADGET_SELECTED=y
938# CONFIG_USB_GADGET_NET2280 is not set
939# CONFIG_USB_GADGET_PXA2XX is not set
940# CONFIG_USB_GADGET_GOKU is not set
941# CONFIG_USB_GADGET_LH7A40X is not set
942# CONFIG_USB_GADGET_OMAP is not set
943CONFIG_USB_GADGET_AT91=y
944CONFIG_USB_AT91=y
945# CONFIG_USB_GADGET_DUMMY_HCD is not set
946# CONFIG_USB_GADGET_DUALSPEED is not set
947CONFIG_USB_ZERO=m
948# CONFIG_USB_ETH is not set
949CONFIG_USB_GADGETFS=m
950CONFIG_USB_FILE_STORAGE=m
951# CONFIG_USB_FILE_STORAGE_TEST is not set
952CONFIG_USB_G_SERIAL=m
953# CONFIG_USB_MIDI_GADGET is not set
954
955#
956# MMC/SD Card support
957#
958CONFIG_MMC=y
959# CONFIG_MMC_DEBUG is not set
960CONFIG_MMC_BLOCK=y
961CONFIG_MMC_AT91=m
962# CONFIG_MMC_TIFM_SD is not set
963
964#
965# Real Time Clock
966#
967CONFIG_RTC_LIB=y
968# CONFIG_RTC_CLASS is not set
969
970#
971# File systems
972#
973CONFIG_EXT2_FS=y
974# CONFIG_EXT2_FS_XATTR is not set
975# CONFIG_EXT2_FS_XIP is not set
976# CONFIG_EXT3_FS is not set
977# CONFIG_EXT4DEV_FS is not set
978# CONFIG_REISERFS_FS is not set
979# CONFIG_JFS_FS is not set
980# CONFIG_FS_POSIX_ACL is not set
981# CONFIG_XFS_FS is not set
982# CONFIG_GFS2_FS is not set
983# CONFIG_OCFS2_FS is not set
984# CONFIG_MINIX_FS is not set
985# CONFIG_ROMFS_FS is not set
986CONFIG_INOTIFY=y
987CONFIG_INOTIFY_USER=y
988# CONFIG_QUOTA is not set
989CONFIG_DNOTIFY=y
990# CONFIG_AUTOFS_FS is not set
991# CONFIG_AUTOFS4_FS is not set
992# CONFIG_FUSE_FS is not set
993
994#
995# CD-ROM/DVD Filesystems
996#
997# CONFIG_ISO9660_FS is not set
998# CONFIG_UDF_FS is not set
999
1000#
1001# DOS/FAT/NT Filesystems
1002#
1003CONFIG_FAT_FS=y
1004# CONFIG_MSDOS_FS is not set
1005CONFIG_VFAT_FS=y
1006CONFIG_FAT_DEFAULT_CODEPAGE=437
1007CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1008# CONFIG_NTFS_FS is not set
1009
1010#
1011# Pseudo filesystems
1012#
1013CONFIG_PROC_FS=y
1014CONFIG_PROC_SYSCTL=y
1015CONFIG_SYSFS=y
1016CONFIG_TMPFS=y
1017# CONFIG_TMPFS_POSIX_ACL is not set
1018# CONFIG_HUGETLB_PAGE is not set
1019CONFIG_RAMFS=y
1020# CONFIG_CONFIGFS_FS is not set
1021
1022#
1023# Miscellaneous filesystems
1024#
1025# CONFIG_ADFS_FS is not set
1026# CONFIG_AFFS_FS is not set
1027# CONFIG_HFS_FS is not set
1028# CONFIG_HFSPLUS_FS is not set
1029# CONFIG_BEFS_FS is not set
1030# CONFIG_BFS_FS is not set
1031# CONFIG_EFS_FS is not set
1032CONFIG_JFFS2_FS=y
1033CONFIG_JFFS2_FS_DEBUG=0
1034CONFIG_JFFS2_FS_WRITEBUFFER=y
1035# CONFIG_JFFS2_SUMMARY is not set
1036# CONFIG_JFFS2_FS_XATTR is not set
1037# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1038CONFIG_JFFS2_ZLIB=y
1039CONFIG_JFFS2_RTIME=y
1040# CONFIG_JFFS2_RUBIN is not set
1041CONFIG_CRAMFS=y
1042# CONFIG_VXFS_FS is not set
1043# CONFIG_HPFS_FS is not set
1044# CONFIG_QNX4FS_FS is not set
1045# CONFIG_SYSV_FS is not set
1046# CONFIG_UFS_FS is not set
1047
1048#
1049# Network File Systems
1050#
1051CONFIG_NFS_FS=y
1052# CONFIG_NFS_V3 is not set
1053# CONFIG_NFS_V4 is not set
1054# CONFIG_NFS_DIRECTIO is not set
1055# CONFIG_NFSD is not set
1056CONFIG_ROOT_NFS=y
1057CONFIG_LOCKD=y
1058CONFIG_NFS_COMMON=y
1059CONFIG_SUNRPC=y
1060# CONFIG_RPCSEC_GSS_KRB5 is not set
1061# CONFIG_RPCSEC_GSS_SPKM3 is not set
1062# CONFIG_SMB_FS is not set
1063# CONFIG_CIFS is not set
1064# CONFIG_NCP_FS is not set
1065# CONFIG_CODA_FS is not set
1066# CONFIG_AFS_FS is not set
1067# CONFIG_9P_FS is not set
1068
1069#
1070# Partition Types
1071#
1072# CONFIG_PARTITION_ADVANCED is not set
1073CONFIG_MSDOS_PARTITION=y
1074
1075#
1076# Native Language Support
1077#
1078CONFIG_NLS=y
1079CONFIG_NLS_DEFAULT="iso8859-1"
1080CONFIG_NLS_CODEPAGE_437=y
1081# CONFIG_NLS_CODEPAGE_737 is not set
1082# CONFIG_NLS_CODEPAGE_775 is not set
1083CONFIG_NLS_CODEPAGE_850=y
1084# CONFIG_NLS_CODEPAGE_852 is not set
1085# CONFIG_NLS_CODEPAGE_855 is not set
1086# CONFIG_NLS_CODEPAGE_857 is not set
1087# CONFIG_NLS_CODEPAGE_860 is not set
1088# CONFIG_NLS_CODEPAGE_861 is not set
1089# CONFIG_NLS_CODEPAGE_862 is not set
1090# CONFIG_NLS_CODEPAGE_863 is not set
1091# CONFIG_NLS_CODEPAGE_864 is not set
1092# CONFIG_NLS_CODEPAGE_865 is not set
1093# CONFIG_NLS_CODEPAGE_866 is not set
1094# CONFIG_NLS_CODEPAGE_869 is not set
1095# CONFIG_NLS_CODEPAGE_936 is not set
1096# CONFIG_NLS_CODEPAGE_950 is not set
1097# CONFIG_NLS_CODEPAGE_932 is not set
1098# CONFIG_NLS_CODEPAGE_949 is not set
1099# CONFIG_NLS_CODEPAGE_874 is not set
1100# CONFIG_NLS_ISO8859_8 is not set
1101# CONFIG_NLS_CODEPAGE_1250 is not set
1102# CONFIG_NLS_CODEPAGE_1251 is not set
1103# CONFIG_NLS_ASCII is not set
1104CONFIG_NLS_ISO8859_1=y
1105# CONFIG_NLS_ISO8859_2 is not set
1106# CONFIG_NLS_ISO8859_3 is not set
1107# CONFIG_NLS_ISO8859_4 is not set
1108# CONFIG_NLS_ISO8859_5 is not set
1109# CONFIG_NLS_ISO8859_6 is not set
1110# CONFIG_NLS_ISO8859_7 is not set
1111# CONFIG_NLS_ISO8859_9 is not set
1112# CONFIG_NLS_ISO8859_13 is not set
1113# CONFIG_NLS_ISO8859_14 is not set
1114# CONFIG_NLS_ISO8859_15 is not set
1115# CONFIG_NLS_KOI8_R is not set
1116# CONFIG_NLS_KOI8_U is not set
1117# CONFIG_NLS_UTF8 is not set
1118
1119#
1120# Distributed Lock Manager
1121#
1122# CONFIG_DLM is not set
1123
1124#
1125# Profiling support
1126#
1127# CONFIG_PROFILING is not set
1128
1129#
1130# Kernel hacking
1131#
1132# CONFIG_PRINTK_TIME is not set
1133CONFIG_ENABLE_MUST_CHECK=y
1134# CONFIG_MAGIC_SYSRQ is not set
1135# CONFIG_UNUSED_SYMBOLS is not set
1136# CONFIG_DEBUG_FS is not set
1137# CONFIG_HEADERS_CHECK is not set
1138CONFIG_DEBUG_KERNEL=y
1139CONFIG_LOG_BUF_SHIFT=14
1140CONFIG_DETECT_SOFTLOCKUP=y
1141# CONFIG_SCHEDSTATS is not set
1142# CONFIG_DEBUG_SLAB is not set
1143# CONFIG_DEBUG_RT_MUTEXES is not set
1144# CONFIG_RT_MUTEX_TESTER is not set
1145# CONFIG_DEBUG_SPINLOCK is not set
1146# CONFIG_DEBUG_MUTEXES is not set
1147# CONFIG_DEBUG_RWSEMS is not set
1148# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1149# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1150# CONFIG_DEBUG_KOBJECT is not set
1151CONFIG_DEBUG_BUGVERBOSE=y
1152# CONFIG_DEBUG_INFO is not set
1153# CONFIG_DEBUG_VM is not set
1154# CONFIG_DEBUG_LIST is not set
1155CONFIG_FRAME_POINTER=y
1156CONFIG_FORCED_INLINING=y
1157# CONFIG_RCU_TORTURE_TEST is not set
1158CONFIG_DEBUG_USER=y
1159# CONFIG_DEBUG_ERRORS is not set
1160CONFIG_DEBUG_LL=y
1161# CONFIG_DEBUG_ICEDCC is not set
1162
1163#
1164# Security options
1165#
1166# CONFIG_KEYS is not set
1167# CONFIG_SECURITY is not set
1168
1169#
1170# Cryptographic options
1171#
1172# CONFIG_CRYPTO is not set
1173
1174#
1175# Library routines
1176#
1177CONFIG_BITREVERSE=y
1178# CONFIG_CRC_CCITT is not set
1179# CONFIG_CRC16 is not set
1180CONFIG_CRC32=y
1181# CONFIG_LIBCRC32C is not set
1182CONFIG_ZLIB_INFLATE=y
1183CONFIG_PLIST=y
1184CONFIG_IOMAP_COPY=y
diff --git a/arch/arm/configs/ateb9200_defconfig b/arch/arm/configs/ateb9200_defconfig
index 3de5c643848c..baa97698c744 100644
--- a/arch/arm/configs/ateb9200_defconfig
+++ b/arch/arm/configs/ateb9200_defconfig
@@ -1066,7 +1066,7 @@ CONFIG_RTC_INTF_DEV=y
1066# CONFIG_RTC_DRV_PCF8563 is not set 1066# CONFIG_RTC_DRV_PCF8563 is not set
1067# CONFIG_RTC_DRV_RS5C372 is not set 1067# CONFIG_RTC_DRV_RS5C372 is not set
1068# CONFIG_RTC_DRV_M48T86 is not set 1068# CONFIG_RTC_DRV_M48T86 is not set
1069CONFIG_RTC_DRV_AT91=y 1069CONFIG_RTC_DRV_AT91RM9200=y
1070# CONFIG_RTC_DRV_TEST is not set 1070# CONFIG_RTC_DRV_TEST is not set
1071 1071
1072# 1072#
diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig
index 2cadd51506bb..88e5d28aeec7 100644
--- a/arch/arm/configs/csb337_defconfig
+++ b/arch/arm/configs/csb337_defconfig
@@ -355,10 +355,12 @@ CONFIG_MTD_CFI_UTIL=y
355# Mapping drivers for chip access 355# Mapping drivers for chip access
356# 356#
357# CONFIG_MTD_COMPLEX_MAPPINGS is not set 357# CONFIG_MTD_COMPLEX_MAPPINGS is not set
358# CONFIG_MTD_PHYSMAP is not set 358CONFIG_MTD_PHYSMAP=y
359CONFIG_MTD_PHYSMAP_START=0
360CONFIG_MTD_PHYSMAP_LEN=0
361CONFIG_MTD_PHYSMAP_BANKWIDTH=0
359# CONFIG_MTD_ARM_INTEGRATOR is not set 362# CONFIG_MTD_ARM_INTEGRATOR is not set
360# CONFIG_MTD_PLATRAM is not set 363# CONFIG_MTD_PLATRAM is not set
361CONFIG_MTD_CSB337=y
362 364
363# 365#
364# Self-contained MTD device drivers 366# Self-contained MTD device drivers
@@ -986,7 +988,7 @@ CONFIG_RTC_DRV_DS1307=y
986# CONFIG_RTC_DRV_PCF8583 is not set 988# CONFIG_RTC_DRV_PCF8583 is not set
987# CONFIG_RTC_DRV_RS5C372 is not set 989# CONFIG_RTC_DRV_RS5C372 is not set
988# CONFIG_RTC_DRV_M48T86 is not set 990# CONFIG_RTC_DRV_M48T86 is not set
989CONFIG_RTC_DRV_AT91=y 991CONFIG_RTC_DRV_AT91RM9200=y
990# CONFIG_RTC_DRV_TEST is not set 992# CONFIG_RTC_DRV_TEST is not set
991# CONFIG_RTC_DRV_V3020 is not set 993# CONFIG_RTC_DRV_V3020 is not set
992 994
diff --git a/arch/arm/configs/csb637_defconfig b/arch/arm/configs/csb637_defconfig
index 94908c1df4cf..669f035896f9 100644
--- a/arch/arm/configs/csb637_defconfig
+++ b/arch/arm/configs/csb637_defconfig
@@ -355,10 +355,12 @@ CONFIG_MTD_CFI_UTIL=y
355# Mapping drivers for chip access 355# Mapping drivers for chip access
356# 356#
357# CONFIG_MTD_COMPLEX_MAPPINGS is not set 357# CONFIG_MTD_COMPLEX_MAPPINGS is not set
358# CONFIG_MTD_PHYSMAP is not set 358CONFIG_MTD_PHYSMAP=y
359CONFIG_MTD_PHYSMAP_START=0
360CONFIG_MTD_PHYSMAP_LEN=0
361CONFIG_MTD_PHYSMAP_BANKWIDTH=0
359# CONFIG_MTD_ARM_INTEGRATOR is not set 362# CONFIG_MTD_ARM_INTEGRATOR is not set
360# CONFIG_MTD_PLATRAM is not set 363# CONFIG_MTD_PLATRAM is not set
361CONFIG_MTD_CSB637=y
362 364
363# 365#
364# Self-contained MTD device drivers 366# Self-contained MTD device drivers
diff --git a/arch/arm/configs/kafa_defconfig b/arch/arm/configs/kafa_defconfig
index a4cdafc1548a..a0f48d54fbcc 100644
--- a/arch/arm/configs/kafa_defconfig
+++ b/arch/arm/configs/kafa_defconfig
@@ -718,7 +718,7 @@ CONFIG_RTC_INTF_DEV=y
718# CONFIG_RTC_DRV_PCF8563 is not set 718# CONFIG_RTC_DRV_PCF8563 is not set
719# CONFIG_RTC_DRV_RS5C372 is not set 719# CONFIG_RTC_DRV_RS5C372 is not set
720# CONFIG_RTC_DRV_M48T86 is not set 720# CONFIG_RTC_DRV_M48T86 is not set
721CONFIG_RTC_DRV_AT91=y 721CONFIG_RTC_DRV_AT91RM9200=y
722# CONFIG_RTC_DRV_TEST is not set 722# CONFIG_RTC_DRV_TEST is not set
723 723
724# 724#
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index ab06a86e85d5..d5002889773e 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_ARTHUR) += arthur.o
19obj-$(CONFIG_ISA_DMA) += dma-isa.o 19obj-$(CONFIG_ISA_DMA) += dma-isa.o
20obj-$(CONFIG_PCI) += bios32.o isa.o 20obj-$(CONFIG_PCI) += bios32.o isa.o
21obj-$(CONFIG_SMP) += smp.o 21obj-$(CONFIG_SMP) += smp.o
22obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
22obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o 23obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
23 24
24obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o 25obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index f7598cbc7ec5..ae89cdd82b16 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -356,6 +356,7 @@
356 CALL(sys_move_pages) 356 CALL(sys_move_pages)
357/* 345 */ CALL(sys_getcpu) 357/* 345 */ CALL(sys_getcpu)
358 CALL(sys_ni_syscall) /* eventually epoll_pwait */ 358 CALL(sys_ni_syscall) /* eventually epoll_pwait */
359 CALL(sys_kexec_load)
359#ifndef syscalls_counted 360#ifndef syscalls_counted
360.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 361.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
361#define syscalls_counted 362#define syscalls_counted
diff --git a/arch/arm/kernel/crunch.c b/arch/arm/kernel/crunch.c
index cec83783206e..627d79414c9d 100644
--- a/arch/arm/kernel/crunch.c
+++ b/arch/arm/kernel/crunch.c
@@ -75,6 +75,7 @@ static struct notifier_block crunch_notifier_block = {
75static int __init crunch_init(void) 75static int __init crunch_init(void)
76{ 76{
77 thread_register_notifier(&crunch_notifier_block); 77 thread_register_notifier(&crunch_notifier_block);
78 elf_hwcap |= HWCAP_CRUNCH;
78 79
79 return 0; 80 return 0;
80} 81}
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 71257e3d513f..f1c0fb974177 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -1009,7 +1009,7 @@ ecard_probe(int slot, card_type_t type)
1009 ec->fiqmask = 4; 1009 ec->fiqmask = 4;
1010 } 1010 }
1011 1011
1012 for (i = 0; i < sizeof(blacklist) / sizeof(*blacklist); i++) 1012 for (i = 0; i < ARRAY_SIZE(blacklist); i++)
1013 if (blacklist[i].manufacturer == ec->cid.manufacturer && 1013 if (blacklist[i].manufacturer == ec->cid.manufacturer &&
1014 blacklist[i].product == ec->cid.product) { 1014 blacklist[i].product == ec->cid.product) {
1015 ec->card_desc = blacklist[i].type; 1015 ec->card_desc = blacklist[i].type;
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
new file mode 100644
index 000000000000..863c66454f2b
--- /dev/null
+++ b/arch/arm/kernel/machine_kexec.c
@@ -0,0 +1,78 @@
1/*
2 * machine_kexec.c - handle transition of Linux booting another kernel
3 */
4
5#include <linux/mm.h>
6#include <linux/kexec.h>
7#include <linux/delay.h>
8#include <linux/reboot.h>
9#include <asm/pgtable.h>
10#include <asm/pgalloc.h>
11#include <asm/mmu_context.h>
12#include <asm/io.h>
13#include <asm/cacheflush.h>
14#include <asm/mach-types.h>
15
16const extern unsigned char relocate_new_kernel[];
17const extern unsigned int relocate_new_kernel_size;
18
19extern void setup_mm_for_reboot(char mode);
20
21extern unsigned long kexec_start_address;
22extern unsigned long kexec_indirection_page;
23extern unsigned long kexec_mach_type;
24
25/*
26 * Provide a dummy crash_notes definition while crash dump arrives to arm.
27 * This prevents breakage of crash_notes attribute in kernel/ksysfs.c.
28 */
29
30int machine_kexec_prepare(struct kimage *image)
31{
32 return 0;
33}
34
35void machine_kexec_cleanup(struct kimage *image)
36{
37}
38
39void machine_shutdown(void)
40{
41}
42
43void machine_crash_shutdown(struct pt_regs *regs)
44{
45}
46
47void machine_kexec(struct kimage *image)
48{
49 unsigned long page_list;
50 unsigned long reboot_code_buffer_phys;
51 void *reboot_code_buffer;
52
53
54 page_list = image->head & PAGE_MASK;
55
56 /* we need both effective and real address here */
57 reboot_code_buffer_phys =
58 page_to_pfn(image->control_code_page) << PAGE_SHIFT;
59 reboot_code_buffer = page_address(image->control_code_page);
60
61 /* Prepare parameters for reboot_code_buffer*/
62 kexec_start_address = image->start;
63 kexec_indirection_page = page_list;
64 kexec_mach_type = machine_arch_type;
65
66 /* copy our kernel relocation code to the control code page */
67 memcpy(reboot_code_buffer,
68 relocate_new_kernel, relocate_new_kernel_size);
69
70
71 flush_icache_range((unsigned long) reboot_code_buffer,
72 (unsigned long) reboot_code_buffer + KEXEC_CONTROL_CODE_SIZE);
73 printk(KERN_INFO "Bye!\n");
74
75 cpu_proc_fin();
76 setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/
77 cpu_reset(reboot_code_buffer_phys);
78}
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
new file mode 100644
index 000000000000..7baadae7cb27
--- /dev/null
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -0,0 +1,74 @@
1/*
2 * relocate_kernel.S - put the kernel image in place to boot
3 */
4
5#include <asm/kexec.h>
6
7 .globl relocate_new_kernel
8relocate_new_kernel:
9
10 ldr r0,kexec_indirection_page
11 ldr r1,kexec_start_address
12
13
140: /* top, read another word for the indirection page */
15 ldr r3, [r0],#4
16
17 /* Is it a destination page. Put destination address to r4 */
18 tst r3,#1,0
19 beq 1f
20 bic r4,r3,#1
21 b 0b
221:
23 /* Is it an indirection page */
24 tst r3,#2,0
25 beq 1f
26 bic r0,r3,#2
27 b 0b
281:
29
30 /* are we done ? */
31 tst r3,#4,0
32 beq 1f
33 b 2f
34
351:
36 /* is it source ? */
37 tst r3,#8,0
38 beq 0b
39 bic r3,r3,#8
40 mov r6,#1024
419:
42 ldr r5,[r3],#4
43 str r5,[r4],#4
44 subs r6,r6,#1
45 bne 9b
46 b 0b
47
482:
49 /* Jump to relocated kernel */
50 mov lr,r1
51 mov r0,#0
52 ldr r1,kexec_mach_type
53 mov r2,#0
54 mov pc,lr
55
56 .globl kexec_start_address
57kexec_start_address:
58 .long 0x0
59
60 .globl kexec_indirection_page
61kexec_indirection_page:
62 .long 0x0
63
64 .globl kexec_mach_type
65kexec_mach_type:
66 .long 0x0
67
68relocate_new_kernel_end:
69
70 .globl relocate_new_kernel_size
71relocate_new_kernel_size:
72 .long relocate_new_kernel_end - relocate_new_kernel
73
74
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index bbab134cd82d..243aea458057 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -88,6 +88,9 @@ struct cpu_user_fns cpu_user;
88#ifdef MULTI_CACHE 88#ifdef MULTI_CACHE
89struct cpu_cache_fns cpu_cache; 89struct cpu_cache_fns cpu_cache;
90#endif 90#endif
91#ifdef CONFIG_OUTER_CACHE
92struct outer_cache_fns outer_cache;
93#endif
91 94
92struct stack { 95struct stack {
93 u32 irq[3]; 96 u32 irq[3];
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index 3c8cdcfe8d4a..3825acd6687d 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -40,12 +40,14 @@
40 */ 40 */
41struct sys_timer *system_timer; 41struct sys_timer *system_timer;
42 42
43#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE)
43/* this needs a better home */ 44/* this needs a better home */
44DEFINE_SPINLOCK(rtc_lock); 45DEFINE_SPINLOCK(rtc_lock);
45 46
46#ifdef CONFIG_SA1100_RTC_MODULE 47#ifdef CONFIG_RTC_DRV_CMOS_MODULE
47EXPORT_SYMBOL(rtc_lock); 48EXPORT_SYMBOL(rtc_lock);
48#endif 49#endif
50#endif /* pc-style 'CMOS' RTC support */
49 51
50/* change this if you have some constant time drift */ 52/* change this if you have some constant time drift */
51#define USECS_PER_JIFFY (1000000/HZ) 53#define USECS_PER_JIFFY (1000000/HZ)
diff --git a/arch/arm/mach-at91rm9200/Kconfig b/arch/arm/mach-at91/Kconfig
index 9f11db8af233..bf0d96272e3a 100644
--- a/arch/arm/mach-at91rm9200/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -9,11 +9,14 @@ config ARCH_AT91RM9200
9 bool "AT91RM9200" 9 bool "AT91RM9200"
10 10
11config ARCH_AT91SAM9260 11config ARCH_AT91SAM9260
12 bool "AT91SAM9260" 12 bool "AT91SAM9260 or AT91SAM9XE"
13 13
14config ARCH_AT91SAM9261 14config ARCH_AT91SAM9261
15 bool "AT91SAM9261" 15 bool "AT91SAM9261"
16 16
17config ARCH_AT91SAM9263
18 bool "AT91SAM9263"
19
17endchoice 20endchoice
18 21
19# ---------------------------------------------------------- 22# ----------------------------------------------------------
@@ -90,13 +93,22 @@ endif
90 93
91if ARCH_AT91SAM9260 94if ARCH_AT91SAM9260
92 95
93comment "AT91SAM9260 Board Type" 96comment "AT91SAM9260 Variants"
97
98config ARCH_AT91SAM9260_SAM9XE
99 bool "AT91SAM9XE"
100 depends on ARCH_AT91SAM9260
101 help
102 Select this if you are using Atmel's AT91SAM9XE System-on-Chip.
103 They are basicaly AT91SAM9260s with various sizes of embedded Flash.
104
105comment "AT91SAM9260 / AT91SAM9XE Board Type"
94 106
95config MACH_AT91SAM9260EK 107config MACH_AT91SAM9260EK
96 bool "Atmel AT91SAM9260-EK Evaluation Kit" 108 bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
97 depends on ARCH_AT91SAM9260 109 depends on ARCH_AT91SAM9260
98 help 110 help
99 Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit. 111 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
100 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> 112 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
101 113
102endif 114endif
@@ -118,17 +130,32 @@ endif
118 130
119# ---------------------------------------------------------- 131# ----------------------------------------------------------
120 132
133if ARCH_AT91SAM9263
134
135comment "AT91SAM9263 Board Type"
136
137config MACH_AT91SAM9263EK
138 bool "Atmel AT91SAM9263-EK Evaluation Kit"
139 depends on ARCH_AT91SAM9263
140 help
141 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
142 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
143
144endif
145
146# ----------------------------------------------------------
147
121comment "AT91 Board Options" 148comment "AT91 Board Options"
122 149
123config MTD_AT91_DATAFLASH_CARD 150config MTD_AT91_DATAFLASH_CARD
124 bool "Enable DataFlash Card support" 151 bool "Enable DataFlash Card support"
125 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK) 152 depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK)
126 help 153 help
127 Enable support for the DataFlash card. 154 Enable support for the DataFlash card.
128 155
129config MTD_NAND_AT91_BUSWIDTH_16 156config MTD_NAND_AT91_BUSWIDTH_16
130 bool "Enable 16-bit data bus interface to NAND flash" 157 bool "Enable 16-bit data bus interface to NAND flash"
131 depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK) 158 depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK)
132 help 159 help
133 On AT91SAM926x boards both types of NAND flash can be present 160 On AT91SAM926x boards both types of NAND flash can be present
134 (8 and 16 bit data bus width). 161 (8 and 16 bit data bus width).
diff --git a/arch/arm/mach-at91rm9200/Makefile b/arch/arm/mach-at91/Makefile
index cf777007847a..05de6cdc88f1 100644
--- a/arch/arm/mach-at91rm9200/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_PM) += pm.o
13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o 13obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o 14obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o 15obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
16obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
16 17
17# AT91RM9200 board-specific support 18# AT91RM9200 board-specific support
18obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 19obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
@@ -31,6 +32,9 @@ obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
31# AT91SAM9261 board-specific support 32# AT91SAM9261 board-specific support
32obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o 33obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
33 34
35# AT91SAM9263 board-specific support
36obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
37
34# LEDs support 38# LEDs support
35led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o 39led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o
36led-$(CONFIG_MACH_AT91RM9200EK) += leds.o 40led-$(CONFIG_MACH_AT91RM9200EK) += leds.o
diff --git a/arch/arm/mach-at91rm9200/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
index e667dcc7cd34..e667dcc7cd34 100644
--- a/arch/arm/mach-at91rm9200/Makefile.boot
+++ b/arch/arm/mach-at91/Makefile.boot
diff --git a/arch/arm/mach-at91rm9200/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index a92e9a495b07..2ddcdd69df7d 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/at91rm9200.c 2 * arch/arm/mach-at91/at91rm9200.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
@@ -117,6 +117,36 @@ static struct clk pioD_clk = {
117 .pmc_mask = 1 << AT91RM9200_ID_PIOD, 117 .pmc_mask = 1 << AT91RM9200_ID_PIOD,
118 .type = CLK_TYPE_PERIPHERAL, 118 .type = CLK_TYPE_PERIPHERAL,
119}; 119};
120static struct clk tc0_clk = {
121 .name = "tc0_clk",
122 .pmc_mask = 1 << AT91RM9200_ID_TC0,
123 .type = CLK_TYPE_PERIPHERAL,
124};
125static struct clk tc1_clk = {
126 .name = "tc1_clk",
127 .pmc_mask = 1 << AT91RM9200_ID_TC1,
128 .type = CLK_TYPE_PERIPHERAL,
129};
130static struct clk tc2_clk = {
131 .name = "tc2_clk",
132 .pmc_mask = 1 << AT91RM9200_ID_TC2,
133 .type = CLK_TYPE_PERIPHERAL,
134};
135static struct clk tc3_clk = {
136 .name = "tc3_clk",
137 .pmc_mask = 1 << AT91RM9200_ID_TC3,
138 .type = CLK_TYPE_PERIPHERAL,
139};
140static struct clk tc4_clk = {
141 .name = "tc4_clk",
142 .pmc_mask = 1 << AT91RM9200_ID_TC4,
143 .type = CLK_TYPE_PERIPHERAL,
144};
145static struct clk tc5_clk = {
146 .name = "tc5_clk",
147 .pmc_mask = 1 << AT91RM9200_ID_TC5,
148 .type = CLK_TYPE_PERIPHERAL,
149};
120 150
121static struct clk *periph_clocks[] __initdata = { 151static struct clk *periph_clocks[] __initdata = {
122 &pioA_clk, 152 &pioA_clk,
@@ -132,7 +162,12 @@ static struct clk *periph_clocks[] __initdata = {
132 &twi_clk, 162 &twi_clk,
133 &spi_clk, 163 &spi_clk,
134 // ssc 0 .. ssc2 164 // ssc 0 .. ssc2
135 // tc0 .. tc5 165 &tc0_clk,
166 &tc1_clk,
167 &tc2_clk,
168 &tc3_clk,
169 &tc4_clk,
170 &tc5_clk,
136 &ohci_clk, 171 &ohci_clk,
137 &ether_clk, 172 &ether_clk,
138 // irq0 .. irq6 173 // irq0 .. irq6
diff --git a/arch/arm/mach-at91rm9200/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 57fac7203fe4..2624a4f22d61 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/at91rm9200_devices.c 2 * arch/arm/mach-at91/at91rm9200_devices.c
3 * 3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> 4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell 5 * Copyright (C) 2005 David Brownell
@@ -315,7 +315,7 @@ static struct platform_device at91rm9200_mmc_device = {
315 .num_resources = ARRAY_SIZE(mmc_resources), 315 .num_resources = ARRAY_SIZE(mmc_resources),
316}; 316};
317 317
318void __init at91_add_device_mmc(struct at91_mmc_data *data) 318void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
319{ 319{
320 if (!data) 320 if (!data)
321 return; 321 return;
@@ -361,7 +361,7 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
361 platform_device_register(&at91rm9200_mmc_device); 361 platform_device_register(&at91rm9200_mmc_device);
362} 362}
363#else 363#else
364void __init at91_add_device_mmc(struct at91_mmc_data *data) {} 364void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
365#endif 365#endif
366 366
367 367
@@ -594,6 +594,10 @@ u8 at91_leds_timer;
594 594
595void __init at91_init_leds(u8 cpu_led, u8 timer_led) 595void __init at91_init_leds(u8 cpu_led, u8 timer_led)
596{ 596{
597 /* Enable GPIO to access the LEDs */
598 at91_set_gpio_output(cpu_led, 1);
599 at91_set_gpio_output(timer_led, 1);
600
597 at91_leds_cpu = cpu_led; 601 at91_leds_cpu = cpu_led;
598 at91_leds_timer = timer_led; 602 at91_leds_timer = timer_led;
599} 603}
diff --git a/arch/arm/mach-at91rm9200/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index b999e192a7e9..949199a244c7 100644
--- a/arch/arm/mach-at91rm9200/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/at91rm9200_time.c 2 * linux/arch/arm/mach-at91/at91rm9200_time.c
3 * 3 *
4 * Copyright (C) 2003 SAN People 4 * Copyright (C) 2003 SAN People
5 * Copyright (C) 2003 ATMEL 5 * Copyright (C) 2003 ATMEL
diff --git a/arch/arm/mach-at91rm9200/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b14871adc300..6ea41d8266cb 100644
--- a/arch/arm/mach-at91rm9200/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/at91sam9260.c 2 * arch/arm/mach-at91/at91sam9260.c
3 * 3 *
4 * Copyright (C) 2006 SAN People 4 * Copyright (C) 2006 SAN People
5 * 5 *
@@ -14,6 +14,7 @@
14 14
15#include <asm/mach/arch.h> 15#include <asm/mach/arch.h>
16#include <asm/mach/map.h> 16#include <asm/mach/map.h>
17#include <asm/arch/cpu.h>
17#include <asm/arch/at91sam9260.h> 18#include <asm/arch/at91sam9260.h>
18#include <asm/arch/at91_pmc.h> 19#include <asm/arch/at91_pmc.h>
19#include <asm/arch/at91_rstc.h> 20#include <asm/arch/at91_rstc.h>
@@ -27,7 +28,11 @@ static struct map_desc at91sam9260_io_desc[] __initdata = {
27 .pfn = __phys_to_pfn(AT91_BASE_SYS), 28 .pfn = __phys_to_pfn(AT91_BASE_SYS),
28 .length = SZ_16K, 29 .length = SZ_16K,
29 .type = MT_DEVICE, 30 .type = MT_DEVICE,
30 }, { 31 }
32};
33
34static struct map_desc at91sam9260_sram_desc[] __initdata = {
35 {
31 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE, 36 .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
32 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE), 37 .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
33 .length = AT91SAM9260_SRAM0_SIZE, 38 .length = AT91SAM9260_SRAM0_SIZE,
@@ -37,7 +42,14 @@ static struct map_desc at91sam9260_io_desc[] __initdata = {
37 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE), 42 .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
38 .length = AT91SAM9260_SRAM1_SIZE, 43 .length = AT91SAM9260_SRAM1_SIZE,
39 .type = MT_DEVICE, 44 .type = MT_DEVICE,
40 }, 45 }
46};
47
48static struct map_desc at91sam9xe_sram_desc[] __initdata = {
49 {
50 .pfn = __phys_to_pfn(AT91SAM9XE_SRAM_BASE),
51 .type = MT_DEVICE,
52 }
41}; 53};
42 54
43/* -------------------------------------------------------------------- 55/* --------------------------------------------------------------------
@@ -107,13 +119,28 @@ static struct clk spi1_clk = {
107 .pmc_mask = 1 << AT91SAM9260_ID_SPI1, 119 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
108 .type = CLK_TYPE_PERIPHERAL, 120 .type = CLK_TYPE_PERIPHERAL,
109}; 121};
122static struct clk tc0_clk = {
123 .name = "tc0_clk",
124 .pmc_mask = 1 << AT91SAM9260_ID_TC0,
125 .type = CLK_TYPE_PERIPHERAL,
126};
127static struct clk tc1_clk = {
128 .name = "tc1_clk",
129 .pmc_mask = 1 << AT91SAM9260_ID_TC1,
130 .type = CLK_TYPE_PERIPHERAL,
131};
132static struct clk tc2_clk = {
133 .name = "tc2_clk",
134 .pmc_mask = 1 << AT91SAM9260_ID_TC2,
135 .type = CLK_TYPE_PERIPHERAL,
136};
110static struct clk ohci_clk = { 137static struct clk ohci_clk = {
111 .name = "ohci_clk", 138 .name = "ohci_clk",
112 .pmc_mask = 1 << AT91SAM9260_ID_UHP, 139 .pmc_mask = 1 << AT91SAM9260_ID_UHP,
113 .type = CLK_TYPE_PERIPHERAL, 140 .type = CLK_TYPE_PERIPHERAL,
114}; 141};
115static struct clk ether_clk = { 142static struct clk macb_clk = {
116 .name = "ether_clk", 143 .name = "macb_clk",
117 .pmc_mask = 1 << AT91SAM9260_ID_EMAC, 144 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
118 .type = CLK_TYPE_PERIPHERAL, 145 .type = CLK_TYPE_PERIPHERAL,
119}; 146};
@@ -137,6 +164,21 @@ static struct clk usart5_clk = {
137 .pmc_mask = 1 << AT91SAM9260_ID_US5, 164 .pmc_mask = 1 << AT91SAM9260_ID_US5,
138 .type = CLK_TYPE_PERIPHERAL, 165 .type = CLK_TYPE_PERIPHERAL,
139}; 166};
167static struct clk tc3_clk = {
168 .name = "tc3_clk",
169 .pmc_mask = 1 << AT91SAM9260_ID_TC3,
170 .type = CLK_TYPE_PERIPHERAL,
171};
172static struct clk tc4_clk = {
173 .name = "tc4_clk",
174 .pmc_mask = 1 << AT91SAM9260_ID_TC4,
175 .type = CLK_TYPE_PERIPHERAL,
176};
177static struct clk tc5_clk = {
178 .name = "tc5_clk",
179 .pmc_mask = 1 << AT91SAM9260_ID_TC5,
180 .type = CLK_TYPE_PERIPHERAL,
181};
140 182
141static struct clk *periph_clocks[] __initdata = { 183static struct clk *periph_clocks[] __initdata = {
142 &pioA_clk, 184 &pioA_clk,
@@ -152,14 +194,18 @@ static struct clk *periph_clocks[] __initdata = {
152 &spi0_clk, 194 &spi0_clk,
153 &spi1_clk, 195 &spi1_clk,
154 // ssc 196 // ssc
155 // tc0 .. tc2 197 &tc0_clk,
198 &tc1_clk,
199 &tc2_clk,
156 &ohci_clk, 200 &ohci_clk,
157 &ether_clk, 201 &macb_clk,
158 &isi_clk, 202 &isi_clk,
159 &usart3_clk, 203 &usart3_clk,
160 &usart4_clk, 204 &usart4_clk,
161 &usart5_clk, 205 &usart5_clk,
162 // tc3 .. tc5 206 &tc3_clk,
207 &tc4_clk,
208 &tc5_clk,
163 // irq0 .. irq2 209 // irq0 .. irq2
164}; 210};
165 211
@@ -213,7 +259,7 @@ static struct at91_gpio_bank at91sam9260_gpio[] = {
213 259
214static void at91sam9260_reset(void) 260static void at91sam9260_reset(void)
215{ 261{
216 at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 262 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
217} 263}
218 264
219 265
@@ -221,11 +267,37 @@ static void at91sam9260_reset(void)
221 * AT91SAM9260 processor initialization 267 * AT91SAM9260 processor initialization
222 * -------------------------------------------------------------------- */ 268 * -------------------------------------------------------------------- */
223 269
270static void __init at91sam9xe_initialize(void)
271{
272 unsigned long cidr, sram_size;
273
274 cidr = at91_sys_read(AT91_DBGU_CIDR);
275
276 switch (cidr & AT91_CIDR_SRAMSIZ) {
277 case AT91_CIDR_SRAMSIZ_32K:
278 sram_size = 2 * SZ_16K;
279 break;
280 case AT91_CIDR_SRAMSIZ_16K:
281 default:
282 sram_size = SZ_16K;
283 }
284
285 at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
286 at91sam9xe_sram_desc->length = sram_size;
287
288 iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
289}
290
224void __init at91sam9260_initialize(unsigned long main_clock) 291void __init at91sam9260_initialize(unsigned long main_clock)
225{ 292{
226 /* Map peripherals */ 293 /* Map peripherals */
227 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc)); 294 iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
228 295
296 if (cpu_is_at91sam9xe())
297 at91sam9xe_initialize();
298 else
299 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
300
229 at91_arch_reset = at91sam9260_reset; 301 at91_arch_reset = at91sam9260_reset;
230 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) 302 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
231 | (1 << AT91SAM9260_ID_IRQ2); 303 | (1 << AT91SAM9260_ID_IRQ2);
diff --git a/arch/arm/mach-at91rm9200/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index f42d3a40ec3c..f7d342ccbebf 100644
--- a/arch/arm/mach-at91rm9200/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/at91sam9260_devices.c 2 * arch/arm/mach-at91/at91sam9260_devices.c
3 * 3 *
4 * Copyright (C) 2006 Atmel 4 * Copyright (C) 2006 Atmel
5 * 5 *
@@ -128,7 +128,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {}
128 128
129#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) 129#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
130static u64 eth_dmamask = 0xffffffffUL; 130static u64 eth_dmamask = 0xffffffffUL;
131static struct eth_platform_data eth_data; 131static struct at91_eth_data eth_data;
132 132
133static struct resource eth_resources[] = { 133static struct resource eth_resources[] = {
134 [0] = { 134 [0] = {
@@ -155,7 +155,7 @@ static struct platform_device at91sam9260_eth_device = {
155 .num_resources = ARRAY_SIZE(eth_resources), 155 .num_resources = ARRAY_SIZE(eth_resources),
156}; 156};
157 157
158void __init at91_add_device_eth(struct eth_platform_data *data) 158void __init at91_add_device_eth(struct at91_eth_data *data)
159{ 159{
160 if (!data) 160 if (!data)
161 return; 161 return;
@@ -192,7 +192,7 @@ void __init at91_add_device_eth(struct eth_platform_data *data)
192 platform_device_register(&at91sam9260_eth_device); 192 platform_device_register(&at91sam9260_eth_device);
193} 193}
194#else 194#else
195void __init at91_add_device_eth(struct eth_platform_data *data) {} 195void __init at91_add_device_eth(struct at91_eth_data *data) {}
196#endif 196#endif
197 197
198 198
@@ -229,7 +229,7 @@ static struct platform_device at91sam9260_mmc_device = {
229 .num_resources = ARRAY_SIZE(mmc_resources), 229 .num_resources = ARRAY_SIZE(mmc_resources),
230}; 230};
231 231
232void __init at91_add_device_mmc(struct at91_mmc_data *data) 232void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
233{ 233{
234 if (!data) 234 if (!data)
235 return; 235 return;
@@ -275,7 +275,7 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
275 platform_device_register(&at91sam9260_mmc_device); 275 platform_device_register(&at91sam9260_mmc_device);
276} 276}
277#else 277#else
278void __init at91_add_device_mmc(struct at91_mmc_data *data) {} 278void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
279#endif 279#endif
280 280
281 281
@@ -515,6 +515,10 @@ u8 at91_leds_timer;
515 515
516void __init at91_init_leds(u8 cpu_led, u8 timer_led) 516void __init at91_init_leds(u8 cpu_led, u8 timer_led)
517{ 517{
518 /* Enable GPIO to access the LEDs */
519 at91_set_gpio_output(cpu_led, 1);
520 at91_set_gpio_output(timer_led, 1);
521
518 at91_leds_cpu = cpu_led; 522 at91_leds_cpu = cpu_led;
519 at91_leds_timer = timer_led; 523 at91_leds_timer = timer_led;
520} 524}
diff --git a/arch/arm/mach-at91rm9200/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index d242bb885c6d..784d1e682d6d 100644
--- a/arch/arm/mach-at91rm9200/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/at91sam9261.c 2 * arch/arm/mach-at91/at91sam9261.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
@@ -97,6 +97,21 @@ static struct clk spi1_clk = {
97 .pmc_mask = 1 << AT91SAM9261_ID_SPI1, 97 .pmc_mask = 1 << AT91SAM9261_ID_SPI1,
98 .type = CLK_TYPE_PERIPHERAL, 98 .type = CLK_TYPE_PERIPHERAL,
99}; 99};
100static struct clk tc0_clk = {
101 .name = "tc0_clk",
102 .pmc_mask = 1 << AT91SAM9261_ID_TC0,
103 .type = CLK_TYPE_PERIPHERAL,
104};
105static struct clk tc1_clk = {
106 .name = "tc1_clk",
107 .pmc_mask = 1 << AT91SAM9261_ID_TC1,
108 .type = CLK_TYPE_PERIPHERAL,
109};
110static struct clk tc2_clk = {
111 .name = "tc2_clk",
112 .pmc_mask = 1 << AT91SAM9261_ID_TC2,
113 .type = CLK_TYPE_PERIPHERAL,
114};
100static struct clk ohci_clk = { 115static struct clk ohci_clk = {
101 .name = "ohci_clk", 116 .name = "ohci_clk",
102 .pmc_mask = 1 << AT91SAM9261_ID_UHP, 117 .pmc_mask = 1 << AT91SAM9261_ID_UHP,
@@ -121,7 +136,9 @@ static struct clk *periph_clocks[] __initdata = {
121 &spi0_clk, 136 &spi0_clk,
122 &spi1_clk, 137 &spi1_clk,
123 // ssc 0 .. ssc2 138 // ssc 0 .. ssc2
124 // tc0 .. tc2 139 &tc0_clk,
140 &tc1_clk,
141 &tc2_clk,
125 &ohci_clk, 142 &ohci_clk,
126 &lcdc_clk, 143 &lcdc_clk,
127 // irq0 .. irq2 144 // irq0 .. irq2
@@ -208,7 +225,7 @@ static struct at91_gpio_bank at91sam9261_gpio[] = {
208 225
209static void at91sam9261_reset(void) 226static void at91sam9261_reset(void)
210{ 227{
211 at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); 228 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
212} 229}
213 230
214 231
diff --git a/arch/arm/mach-at91rm9200/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index ed1d79081b35..e1504766fd64 100644
--- a/arch/arm/mach-at91rm9200/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/at91sam9261_devices.c 2 * arch/arm/mach-at91/at91sam9261_devices.c
3 * 3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> 4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell 5 * Copyright (C) 2005 David Brownell
@@ -159,7 +159,7 @@ static struct platform_device at91sam9261_mmc_device = {
159 .num_resources = ARRAY_SIZE(mmc_resources), 159 .num_resources = ARRAY_SIZE(mmc_resources),
160}; 160};
161 161
162void __init at91_add_device_mmc(struct at91_mmc_data *data) 162void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
163{ 163{
164 if (!data) 164 if (!data)
165 return; 165 return;
@@ -192,7 +192,7 @@ void __init at91_add_device_mmc(struct at91_mmc_data *data)
192 platform_device_register(&at91sam9261_mmc_device); 192 platform_device_register(&at91sam9261_mmc_device);
193} 193}
194#else 194#else
195void __init at91_add_device_mmc(struct at91_mmc_data *data) {} 195void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
196#endif 196#endif
197 197
198 198
@@ -513,6 +513,10 @@ u8 at91_leds_timer;
513 513
514void __init at91_init_leds(u8 cpu_led, u8 timer_led) 514void __init at91_init_leds(u8 cpu_led, u8 timer_led)
515{ 515{
516 /* Enable GPIO to access the LEDs */
517 at91_set_gpio_output(cpu_led, 1);
518 at91_set_gpio_output(timer_led, 1);
519
516 at91_leds_cpu = cpu_led; 520 at91_leds_cpu = cpu_led;
517 at91_leds_timer = timer_led; 521 at91_leds_timer = timer_led;
518} 522}
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
new file mode 100644
index 000000000000..6aa342e8f1b1
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -0,0 +1,313 @@
1/*
2 * arch/arm/mach-at91/at91sam9263.c
3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12
13#include <linux/module.h>
14
15#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17#include <asm/arch/at91sam9263.h>
18#include <asm/arch/at91_pmc.h>
19#include <asm/arch/at91_rstc.h>
20
21#include "generic.h"
22#include "clock.h"
23
24static struct map_desc at91sam9263_io_desc[] __initdata = {
25 {
26 .virtual = AT91_VA_BASE_SYS,
27 .pfn = __phys_to_pfn(AT91_BASE_SYS),
28 .length = SZ_16K,
29 .type = MT_DEVICE,
30 }, {
31 .virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE,
32 .pfn = __phys_to_pfn(AT91SAM9263_SRAM0_BASE),
33 .length = AT91SAM9263_SRAM0_SIZE,
34 .type = MT_DEVICE,
35 }, {
36 .virtual = AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE - AT91SAM9263_SRAM1_SIZE,
37 .pfn = __phys_to_pfn(AT91SAM9263_SRAM1_BASE),
38 .length = AT91SAM9263_SRAM1_SIZE,
39 .type = MT_DEVICE,
40 },
41};
42
43/* --------------------------------------------------------------------
44 * Clocks
45 * -------------------------------------------------------------------- */
46
47/*
48 * The peripheral clocks.
49 */
50static struct clk pioA_clk = {
51 .name = "pioA_clk",
52 .pmc_mask = 1 << AT91SAM9263_ID_PIOA,
53 .type = CLK_TYPE_PERIPHERAL,
54};
55static struct clk pioB_clk = {
56 .name = "pioB_clk",
57 .pmc_mask = 1 << AT91SAM9263_ID_PIOB,
58 .type = CLK_TYPE_PERIPHERAL,
59};
60static struct clk pioCDE_clk = {
61 .name = "pioCDE_clk",
62 .pmc_mask = 1 << AT91SAM9263_ID_PIOCDE,
63 .type = CLK_TYPE_PERIPHERAL,
64};
65static struct clk usart0_clk = {
66 .name = "usart0_clk",
67 .pmc_mask = 1 << AT91SAM9263_ID_US0,
68 .type = CLK_TYPE_PERIPHERAL,
69};
70static struct clk usart1_clk = {
71 .name = "usart1_clk",
72 .pmc_mask = 1 << AT91SAM9263_ID_US1,
73 .type = CLK_TYPE_PERIPHERAL,
74};
75static struct clk usart2_clk = {
76 .name = "usart2_clk",
77 .pmc_mask = 1 << AT91SAM9263_ID_US2,
78 .type = CLK_TYPE_PERIPHERAL,
79};
80static struct clk mmc0_clk = {
81 .name = "mci0_clk",
82 .pmc_mask = 1 << AT91SAM9263_ID_MCI0,
83 .type = CLK_TYPE_PERIPHERAL,
84};
85static struct clk mmc1_clk = {
86 .name = "mci1_clk",
87 .pmc_mask = 1 << AT91SAM9263_ID_MCI1,
88 .type = CLK_TYPE_PERIPHERAL,
89};
90static struct clk twi_clk = {
91 .name = "twi_clk",
92 .pmc_mask = 1 << AT91SAM9263_ID_TWI,
93 .type = CLK_TYPE_PERIPHERAL,
94};
95static struct clk spi0_clk = {
96 .name = "spi0_clk",
97 .pmc_mask = 1 << AT91SAM9263_ID_SPI0,
98 .type = CLK_TYPE_PERIPHERAL,
99};
100static struct clk spi1_clk = {
101 .name = "spi1_clk",
102 .pmc_mask = 1 << AT91SAM9263_ID_SPI1,
103 .type = CLK_TYPE_PERIPHERAL,
104};
105static struct clk tcb_clk = {
106 .name = "tcb_clk",
107 .pmc_mask = 1 << AT91SAM9263_ID_TCB,
108 .type = CLK_TYPE_PERIPHERAL,
109};
110static struct clk macb_clk = {
111 .name = "macb_clk",
112 .pmc_mask = 1 << AT91SAM9263_ID_EMAC,
113 .type = CLK_TYPE_PERIPHERAL,
114};
115static struct clk udc_clk = {
116 .name = "udc_clk",
117 .pmc_mask = 1 << AT91SAM9263_ID_UDP,
118 .type = CLK_TYPE_PERIPHERAL,
119};
120static struct clk isi_clk = {
121 .name = "isi_clk",
122 .pmc_mask = 1 << AT91SAM9263_ID_ISI,
123 .type = CLK_TYPE_PERIPHERAL,
124};
125static struct clk lcdc_clk = {
126 .name = "lcdc_clk",
127 .pmc_mask = 1 << AT91SAM9263_ID_ISI,
128 .type = CLK_TYPE_PERIPHERAL,
129};
130static struct clk ohci_clk = {
131 .name = "ohci_clk",
132 .pmc_mask = 1 << AT91SAM9263_ID_UHP,
133 .type = CLK_TYPE_PERIPHERAL,
134};
135
136static struct clk *periph_clocks[] __initdata = {
137 &pioA_clk,
138 &pioB_clk,
139 &pioCDE_clk,
140 &usart0_clk,
141 &usart1_clk,
142 &usart2_clk,
143 &mmc0_clk,
144 &mmc1_clk,
145 // can
146 &twi_clk,
147 &spi0_clk,
148 &spi1_clk,
149 // ssc0 .. ssc1
150 // ac97
151 &tcb_clk,
152 // pwmc
153 &macb_clk,
154 // 2dge
155 &udc_clk,
156 &isi_clk,
157 &lcdc_clk,
158 // dma
159 &ohci_clk,
160 // irq0 .. irq1
161};
162
163/*
164 * The four programmable clocks.
165 * You must configure pin multiplexing to bring these signals out.
166 */
167static struct clk pck0 = {
168 .name = "pck0",
169 .pmc_mask = AT91_PMC_PCK0,
170 .type = CLK_TYPE_PROGRAMMABLE,
171 .id = 0,
172};
173static struct clk pck1 = {
174 .name = "pck1",
175 .pmc_mask = AT91_PMC_PCK1,
176 .type = CLK_TYPE_PROGRAMMABLE,
177 .id = 1,
178};
179static struct clk pck2 = {
180 .name = "pck2",
181 .pmc_mask = AT91_PMC_PCK2,
182 .type = CLK_TYPE_PROGRAMMABLE,
183 .id = 2,
184};
185static struct clk pck3 = {
186 .name = "pck3",
187 .pmc_mask = AT91_PMC_PCK3,
188 .type = CLK_TYPE_PROGRAMMABLE,
189 .id = 3,
190};
191
192static void __init at91sam9263_register_clocks(void)
193{
194 int i;
195
196 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
197 clk_register(periph_clocks[i]);
198
199 clk_register(&pck0);
200 clk_register(&pck1);
201 clk_register(&pck2);
202 clk_register(&pck3);
203}
204
205/* --------------------------------------------------------------------
206 * GPIO
207 * -------------------------------------------------------------------- */
208
209static struct at91_gpio_bank at91sam9263_gpio[] = {
210 {
211 .id = AT91SAM9263_ID_PIOA,
212 .offset = AT91_PIOA,
213 .clock = &pioA_clk,
214 }, {
215 .id = AT91SAM9263_ID_PIOB,
216 .offset = AT91_PIOB,
217 .clock = &pioB_clk,
218 }, {
219 .id = AT91SAM9263_ID_PIOCDE,
220 .offset = AT91_PIOC,
221 .clock = &pioCDE_clk,
222 }, {
223 .id = AT91SAM9263_ID_PIOCDE,
224 .offset = AT91_PIOD,
225 .clock = &pioCDE_clk,
226 }, {
227 .id = AT91SAM9263_ID_PIOCDE,
228 .offset = AT91_PIOE,
229 .clock = &pioCDE_clk,
230 }
231};
232
233static void at91sam9263_reset(void)
234{
235 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
236}
237
238
239/* --------------------------------------------------------------------
240 * AT91SAM9263 processor initialization
241 * -------------------------------------------------------------------- */
242
243void __init at91sam9263_initialize(unsigned long main_clock)
244{
245 /* Map peripherals */
246 iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
247
248 at91_arch_reset = at91sam9263_reset;
249 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
250
251 /* Init clock subsystem */
252 at91_clock_init(main_clock);
253
254 /* Register the processor-specific clocks */
255 at91sam9263_register_clocks();
256
257 /* Register GPIO subsystem */
258 at91_gpio_init(at91sam9263_gpio, 5);
259}
260
261/* --------------------------------------------------------------------
262 * Interrupt initialization
263 * -------------------------------------------------------------------- */
264
265/*
266 * The default interrupt priority levels (0 = lowest, 7 = highest).
267 */
268static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
269 7, /* Advanced Interrupt Controller (FIQ) */
270 7, /* System Peripherals */
271 0, /* Parallel IO Controller A */
272 0, /* Parallel IO Controller B */
273 0, /* Parallel IO Controller C, D and E */
274 0,
275 0,
276 6, /* USART 0 */
277 6, /* USART 1 */
278 6, /* USART 2 */
279 0, /* Multimedia Card Interface 0 */
280 0, /* Multimedia Card Interface 1 */
281 4, /* CAN */
282 0, /* Two-Wire Interface */
283 6, /* Serial Peripheral Interface 0 */
284 6, /* Serial Peripheral Interface 1 */
285 5, /* Serial Synchronous Controller 0 */
286 5, /* Serial Synchronous Controller 1 */
287 6, /* AC97 Controller */
288 0, /* Timer Counter 0, 1 and 2 */
289 0, /* Pulse Width Modulation Controller */
290 3, /* Ethernet */
291 0,
292 0, /* 2D Graphic Engine */
293 3, /* USB Device Port */
294 0, /* Image Sensor Interface */
295 3, /* LDC Controller */
296 0, /* DMA Controller */
297 0,
298 3, /* USB Host port */
299 0, /* Advanced Interrupt Controller (IRQ0) */
300 0, /* Advanced Interrupt Controller (IRQ1) */
301};
302
303void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
304{
305 if (!priority)
306 priority = at91sam9263_default_irq_priority;
307
308 /* Initialize the AIC interrupt controller */
309 at91_aic_init(priority);
310
311 /* Enable GPIO interrupts */
312 at91_gpio_irq_setup();
313}
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
new file mode 100644
index 000000000000..d9af7ca58bce
--- /dev/null
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -0,0 +1,818 @@
1/*
2 * arch/arm/mach-at91/at91sam9263_devices.c
3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/platform_device.h>
16
17#include <asm/arch/board.h>
18#include <asm/arch/gpio.h>
19#include <asm/arch/at91sam9263.h>
20#include <asm/arch/at91sam926x_mc.h>
21#include <asm/arch/at91sam9263_matrix.h>
22
23#include "generic.h"
24
25#define SZ_512 0x00000200
26#define SZ_256 0x00000100
27#define SZ_16 0x00000010
28
29/* --------------------------------------------------------------------
30 * USB Host
31 * -------------------------------------------------------------------- */
32
33#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
34static u64 ohci_dmamask = 0xffffffffUL;
35static struct at91_usbh_data usbh_data;
36
37static struct resource usbh_resources[] = {
38 [0] = {
39 .start = AT91SAM9263_UHP_BASE,
40 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
41 .flags = IORESOURCE_MEM,
42 },
43 [1] = {
44 .start = AT91SAM9263_ID_UHP,
45 .end = AT91SAM9263_ID_UHP,
46 .flags = IORESOURCE_IRQ,
47 },
48};
49
50static struct platform_device at91_usbh_device = {
51 .name = "at91_ohci",
52 .id = -1,
53 .dev = {
54 .dma_mask = &ohci_dmamask,
55 .coherent_dma_mask = 0xffffffff,
56 .platform_data = &usbh_data,
57 },
58 .resource = usbh_resources,
59 .num_resources = ARRAY_SIZE(usbh_resources),
60};
61
62void __init at91_add_device_usbh(struct at91_usbh_data *data)
63{
64 int i;
65
66 if (!data)
67 return;
68
69 /* Enable VBus control for UHP ports */
70 for (i = 0; i < data->ports; i++) {
71 if (data->vbus_pin[i])
72 at91_set_gpio_output(data->vbus_pin[i], 0);
73 }
74
75 usbh_data = *data;
76 platform_device_register(&at91_usbh_device);
77}
78#else
79void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
80#endif
81
82
83/* --------------------------------------------------------------------
84 * USB Device (Gadget)
85 * -------------------------------------------------------------------- */
86
87#ifdef CONFIG_USB_GADGET_AT91
88static struct at91_udc_data udc_data;
89
90static struct resource udc_resources[] = {
91 [0] = {
92 .start = AT91SAM9263_BASE_UDP,
93 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
94 .flags = IORESOURCE_MEM,
95 },
96 [1] = {
97 .start = AT91SAM9263_ID_UDP,
98 .end = AT91SAM9263_ID_UDP,
99 .flags = IORESOURCE_IRQ,
100 },
101};
102
103static struct platform_device at91_udc_device = {
104 .name = "at91_udc",
105 .id = -1,
106 .dev = {
107 .platform_data = &udc_data,
108 },
109 .resource = udc_resources,
110 .num_resources = ARRAY_SIZE(udc_resources),
111};
112
113void __init at91_add_device_udc(struct at91_udc_data *data)
114{
115 if (!data)
116 return;
117
118 if (data->vbus_pin) {
119 at91_set_gpio_input(data->vbus_pin, 0);
120 at91_set_deglitch(data->vbus_pin, 1);
121 }
122
123 /* Pullup pin is handled internally by USB device peripheral */
124
125 udc_data = *data;
126 platform_device_register(&at91_udc_device);
127}
128#else
129void __init at91_add_device_udc(struct at91_udc_data *data) {}
130#endif
131
132
133/* --------------------------------------------------------------------
134 * Ethernet
135 * -------------------------------------------------------------------- */
136
137#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
138static u64 eth_dmamask = 0xffffffffUL;
139static struct at91_eth_data eth_data;
140
141static struct resource eth_resources[] = {
142 [0] = {
143 .start = AT91SAM9263_BASE_EMAC,
144 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
145 .flags = IORESOURCE_MEM,
146 },
147 [1] = {
148 .start = AT91SAM9263_ID_EMAC,
149 .end = AT91SAM9263_ID_EMAC,
150 .flags = IORESOURCE_IRQ,
151 },
152};
153
154static struct platform_device at91sam9263_eth_device = {
155 .name = "macb",
156 .id = -1,
157 .dev = {
158 .dma_mask = &eth_dmamask,
159 .coherent_dma_mask = 0xffffffff,
160 .platform_data = &eth_data,
161 },
162 .resource = eth_resources,
163 .num_resources = ARRAY_SIZE(eth_resources),
164};
165
166void __init at91_add_device_eth(struct at91_eth_data *data)
167{
168 if (!data)
169 return;
170
171 if (data->phy_irq_pin) {
172 at91_set_gpio_input(data->phy_irq_pin, 0);
173 at91_set_deglitch(data->phy_irq_pin, 1);
174 }
175
176 /* Pins used for MII and RMII */
177 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
178 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
179 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
180 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
181 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
182 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
183 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
184 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
185 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
186 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
187
188 if (!data->is_rmii) {
189 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
190 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
191 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
192 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
193 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
194 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
195 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
196 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
197 }
198
199 eth_data = *data;
200 platform_device_register(&at91sam9263_eth_device);
201}
202#else
203void __init at91_add_device_eth(struct at91_eth_data *data) {}
204#endif
205
206
207/* --------------------------------------------------------------------
208 * MMC / SD
209 * -------------------------------------------------------------------- */
210
211#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
212static u64 mmc_dmamask = 0xffffffffUL;
213static struct at91_mmc_data mmc0_data, mmc1_data;
214
215static struct resource mmc0_resources[] = {
216 [0] = {
217 .start = AT91SAM9263_BASE_MCI0,
218 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
219 .flags = IORESOURCE_MEM,
220 },
221 [1] = {
222 .start = AT91SAM9263_ID_MCI0,
223 .end = AT91SAM9263_ID_MCI0,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct platform_device at91sam9263_mmc0_device = {
229 .name = "at91_mci",
230 .id = 0,
231 .dev = {
232 .dma_mask = &mmc_dmamask,
233 .coherent_dma_mask = 0xffffffff,
234 .platform_data = &mmc0_data,
235 },
236 .resource = mmc0_resources,
237 .num_resources = ARRAY_SIZE(mmc0_resources),
238};
239
240static struct resource mmc1_resources[] = {
241 [0] = {
242 .start = AT91SAM9263_BASE_MCI1,
243 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
244 .flags = IORESOURCE_MEM,
245 },
246 [1] = {
247 .start = AT91SAM9263_ID_MCI1,
248 .end = AT91SAM9263_ID_MCI1,
249 .flags = IORESOURCE_IRQ,
250 },
251};
252
253static struct platform_device at91sam9263_mmc1_device = {
254 .name = "at91_mci",
255 .id = 1,
256 .dev = {
257 .dma_mask = &mmc_dmamask,
258 .coherent_dma_mask = 0xffffffff,
259 .platform_data = &mmc1_data,
260 },
261 .resource = mmc1_resources,
262 .num_resources = ARRAY_SIZE(mmc1_resources),
263};
264
265void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
266{
267 if (!data)
268 return;
269
270 /* input/irq */
271 if (data->det_pin) {
272 at91_set_gpio_input(data->det_pin, 1);
273 at91_set_deglitch(data->det_pin, 1);
274 }
275 if (data->wp_pin)
276 at91_set_gpio_input(data->wp_pin, 1);
277 if (data->vcc_pin)
278 at91_set_gpio_output(data->vcc_pin, 0);
279
280 if (mmc_id == 0) { /* MCI0 */
281 /* CLK */
282 at91_set_A_periph(AT91_PIN_PA12, 0);
283
284 if (data->slot_b) {
285 /* CMD */
286 at91_set_A_periph(AT91_PIN_PA16, 1);
287
288 /* DAT0, maybe DAT1..DAT3 */
289 at91_set_A_periph(AT91_PIN_PA17, 1);
290 if (data->wire4) {
291 at91_set_A_periph(AT91_PIN_PA18, 1);
292 at91_set_A_periph(AT91_PIN_PA19, 1);
293 at91_set_A_periph(AT91_PIN_PA20, 1);
294 }
295 } else {
296 /* CMD */
297 at91_set_A_periph(AT91_PIN_PA1, 1);
298
299 /* DAT0, maybe DAT1..DAT3 */
300 at91_set_A_periph(AT91_PIN_PA0, 1);
301 if (data->wire4) {
302 at91_set_A_periph(AT91_PIN_PA3, 1);
303 at91_set_A_periph(AT91_PIN_PA4, 1);
304 at91_set_A_periph(AT91_PIN_PA5, 1);
305 }
306 }
307
308 mmc0_data = *data;
309 at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
310 platform_device_register(&at91sam9263_mmc0_device);
311 } else { /* MCI1 */
312 /* CLK */
313 at91_set_A_periph(AT91_PIN_PA6, 0);
314
315 if (data->slot_b) {
316 /* CMD */
317 at91_set_A_periph(AT91_PIN_PA21, 1);
318
319 /* DAT0, maybe DAT1..DAT3 */
320 at91_set_A_periph(AT91_PIN_PA22, 1);
321 if (data->wire4) {
322 at91_set_A_periph(AT91_PIN_PA23, 1);
323 at91_set_A_periph(AT91_PIN_PA24, 1);
324 at91_set_A_periph(AT91_PIN_PA25, 1);
325 }
326 } else {
327 /* CMD */
328 at91_set_A_periph(AT91_PIN_PA7, 1);
329
330 /* DAT0, maybe DAT1..DAT3 */
331 at91_set_A_periph(AT91_PIN_PA8, 1);
332 if (data->wire4) {
333 at91_set_A_periph(AT91_PIN_PA9, 1);
334 at91_set_A_periph(AT91_PIN_PA10, 1);
335 at91_set_A_periph(AT91_PIN_PA11, 1);
336 }
337 }
338
339 mmc1_data = *data;
340 at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
341 platform_device_register(&at91sam9263_mmc1_device);
342 }
343}
344#else
345void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
346#endif
347
348
349/* --------------------------------------------------------------------
350 * NAND / SmartMedia
351 * -------------------------------------------------------------------- */
352
353#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
354static struct at91_nand_data nand_data;
355
356#define NAND_BASE AT91_CHIPSELECT_3
357
358static struct resource nand_resources[] = {
359 {
360 .start = NAND_BASE,
361 .end = NAND_BASE + SZ_256M - 1,
362 .flags = IORESOURCE_MEM,
363 }
364};
365
366static struct platform_device at91sam9263_nand_device = {
367 .name = "at91_nand",
368 .id = -1,
369 .dev = {
370 .platform_data = &nand_data,
371 },
372 .resource = nand_resources,
373 .num_resources = ARRAY_SIZE(nand_resources),
374};
375
376void __init at91_add_device_nand(struct at91_nand_data *data)
377{
378 unsigned long csa, mode;
379
380 if (!data)
381 return;
382
383 csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
384 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC);
385
386 /* set the bus interface characteristics */
387 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
388 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
389
390 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
391 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
392
393 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
394
395 if (data->bus_width_16)
396 mode = AT91_SMC_DBW_16;
397 else
398 mode = AT91_SMC_DBW_8;
399 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
400
401 /* enable pin */
402 if (data->enable_pin)
403 at91_set_gpio_output(data->enable_pin, 1);
404
405 /* ready/busy pin */
406 if (data->rdy_pin)
407 at91_set_gpio_input(data->rdy_pin, 1);
408
409 /* card detect pin */
410 if (data->det_pin)
411 at91_set_gpio_input(data->det_pin, 1);
412
413 nand_data = *data;
414 platform_device_register(&at91sam9263_nand_device);
415}
416#else
417void __init at91_add_device_nand(struct at91_nand_data *data) {}
418#endif
419
420
421/* --------------------------------------------------------------------
422 * TWI (i2c)
423 * -------------------------------------------------------------------- */
424
425#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
426
427static struct resource twi_resources[] = {
428 [0] = {
429 .start = AT91SAM9263_BASE_TWI,
430 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
431 .flags = IORESOURCE_MEM,
432 },
433 [1] = {
434 .start = AT91SAM9263_ID_TWI,
435 .end = AT91SAM9263_ID_TWI,
436 .flags = IORESOURCE_IRQ,
437 },
438};
439
440static struct platform_device at91sam9263_twi_device = {
441 .name = "at91_i2c",
442 .id = -1,
443 .resource = twi_resources,
444 .num_resources = ARRAY_SIZE(twi_resources),
445};
446
447void __init at91_add_device_i2c(void)
448{
449 /* pins used for TWI interface */
450 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
451 at91_set_multi_drive(AT91_PIN_PB4, 1);
452
453 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
454 at91_set_multi_drive(AT91_PIN_PB5, 1);
455
456 platform_device_register(&at91sam9263_twi_device);
457}
458#else
459void __init at91_add_device_i2c(void) {}
460#endif
461
462
463/* --------------------------------------------------------------------
464 * SPI
465 * -------------------------------------------------------------------- */
466
467#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
468static u64 spi_dmamask = 0xffffffffUL;
469
470static struct resource spi0_resources[] = {
471 [0] = {
472 .start = AT91SAM9263_BASE_SPI0,
473 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
474 .flags = IORESOURCE_MEM,
475 },
476 [1] = {
477 .start = AT91SAM9263_ID_SPI0,
478 .end = AT91SAM9263_ID_SPI0,
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static struct platform_device at91sam9263_spi0_device = {
484 .name = "atmel_spi",
485 .id = 0,
486 .dev = {
487 .dma_mask = &spi_dmamask,
488 .coherent_dma_mask = 0xffffffff,
489 },
490 .resource = spi0_resources,
491 .num_resources = ARRAY_SIZE(spi0_resources),
492};
493
494static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
495
496static struct resource spi1_resources[] = {
497 [0] = {
498 .start = AT91SAM9263_BASE_SPI1,
499 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
500 .flags = IORESOURCE_MEM,
501 },
502 [1] = {
503 .start = AT91SAM9263_ID_SPI1,
504 .end = AT91SAM9263_ID_SPI1,
505 .flags = IORESOURCE_IRQ,
506 },
507};
508
509static struct platform_device at91sam9263_spi1_device = {
510 .name = "atmel_spi",
511 .id = 1,
512 .dev = {
513 .dma_mask = &spi_dmamask,
514 .coherent_dma_mask = 0xffffffff,
515 },
516 .resource = spi1_resources,
517 .num_resources = ARRAY_SIZE(spi1_resources),
518};
519
520static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
521
522void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
523{
524 int i;
525 unsigned long cs_pin;
526 short enable_spi0 = 0;
527 short enable_spi1 = 0;
528
529 /* Choose SPI chip-selects */
530 for (i = 0; i < nr_devices; i++) {
531 if (devices[i].controller_data)
532 cs_pin = (unsigned long) devices[i].controller_data;
533 else if (devices[i].bus_num == 0)
534 cs_pin = spi0_standard_cs[devices[i].chip_select];
535 else
536 cs_pin = spi1_standard_cs[devices[i].chip_select];
537
538 if (devices[i].bus_num == 0)
539 enable_spi0 = 1;
540 else
541 enable_spi1 = 1;
542
543 /* enable chip-select pin */
544 at91_set_gpio_output(cs_pin, 1);
545
546 /* pass chip-select pin to driver */
547 devices[i].controller_data = (void *) cs_pin;
548 }
549
550 spi_register_board_info(devices, nr_devices);
551
552 /* Configure SPI bus(es) */
553 if (enable_spi0) {
554 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
555 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
556 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
557
558 at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
559 platform_device_register(&at91sam9263_spi0_device);
560 }
561 if (enable_spi1) {
562 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
563 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
564 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
565
566 at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
567 platform_device_register(&at91sam9263_spi1_device);
568 }
569}
570#else
571void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
572#endif
573
574
575/* --------------------------------------------------------------------
576 * LEDs
577 * -------------------------------------------------------------------- */
578
579#if defined(CONFIG_LEDS)
580u8 at91_leds_cpu;
581u8 at91_leds_timer;
582
583void __init at91_init_leds(u8 cpu_led, u8 timer_led)
584{
585 /* Enable GPIO to access the LEDs */
586 at91_set_gpio_output(cpu_led, 1);
587 at91_set_gpio_output(timer_led, 1);
588
589 at91_leds_cpu = cpu_led;
590 at91_leds_timer = timer_led;
591}
592#else
593void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
594#endif
595
596
597/* --------------------------------------------------------------------
598 * UART
599 * -------------------------------------------------------------------- */
600
601#if defined(CONFIG_SERIAL_ATMEL)
602
603static struct resource dbgu_resources[] = {
604 [0] = {
605 .start = AT91_VA_BASE_SYS + AT91_DBGU,
606 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
607 .flags = IORESOURCE_MEM,
608 },
609 [1] = {
610 .start = AT91_ID_SYS,
611 .end = AT91_ID_SYS,
612 .flags = IORESOURCE_IRQ,
613 },
614};
615
616static struct atmel_uart_data dbgu_data = {
617 .use_dma_tx = 0,
618 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
619 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
620};
621
622static struct platform_device at91sam9263_dbgu_device = {
623 .name = "atmel_usart",
624 .id = 0,
625 .dev = {
626 .platform_data = &dbgu_data,
627 .coherent_dma_mask = 0xffffffff,
628 },
629 .resource = dbgu_resources,
630 .num_resources = ARRAY_SIZE(dbgu_resources),
631};
632
633static inline void configure_dbgu_pins(void)
634{
635 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
636 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
637}
638
639static struct resource uart0_resources[] = {
640 [0] = {
641 .start = AT91SAM9263_BASE_US0,
642 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
643 .flags = IORESOURCE_MEM,
644 },
645 [1] = {
646 .start = AT91SAM9263_ID_US0,
647 .end = AT91SAM9263_ID_US0,
648 .flags = IORESOURCE_IRQ,
649 },
650};
651
652static struct atmel_uart_data uart0_data = {
653 .use_dma_tx = 1,
654 .use_dma_rx = 1,
655};
656
657static struct platform_device at91sam9263_uart0_device = {
658 .name = "atmel_usart",
659 .id = 1,
660 .dev = {
661 .platform_data = &uart0_data,
662 .coherent_dma_mask = 0xffffffff,
663 },
664 .resource = uart0_resources,
665 .num_resources = ARRAY_SIZE(uart0_resources),
666};
667
668static inline void configure_usart0_pins(void)
669{
670 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
671 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
672 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
673 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
674}
675
676static struct resource uart1_resources[] = {
677 [0] = {
678 .start = AT91SAM9263_BASE_US1,
679 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
680 .flags = IORESOURCE_MEM,
681 },
682 [1] = {
683 .start = AT91SAM9263_ID_US1,
684 .end = AT91SAM9263_ID_US1,
685 .flags = IORESOURCE_IRQ,
686 },
687};
688
689static struct atmel_uart_data uart1_data = {
690 .use_dma_tx = 1,
691 .use_dma_rx = 1,
692};
693
694static struct platform_device at91sam9263_uart1_device = {
695 .name = "atmel_usart",
696 .id = 2,
697 .dev = {
698 .platform_data = &uart1_data,
699 .coherent_dma_mask = 0xffffffff,
700 },
701 .resource = uart1_resources,
702 .num_resources = ARRAY_SIZE(uart1_resources),
703};
704
705static inline void configure_usart1_pins(void)
706{
707 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
708 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
709 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
710 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
711}
712
713static struct resource uart2_resources[] = {
714 [0] = {
715 .start = AT91SAM9263_BASE_US2,
716 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
717 .flags = IORESOURCE_MEM,
718 },
719 [1] = {
720 .start = AT91SAM9263_ID_US2,
721 .end = AT91SAM9263_ID_US2,
722 .flags = IORESOURCE_IRQ,
723 },
724};
725
726static struct atmel_uart_data uart2_data = {
727 .use_dma_tx = 1,
728 .use_dma_rx = 1,
729};
730
731static struct platform_device at91sam9263_uart2_device = {
732 .name = "atmel_usart",
733 .id = 3,
734 .dev = {
735 .platform_data = &uart2_data,
736 .coherent_dma_mask = 0xffffffff,
737 },
738 .resource = uart2_resources,
739 .num_resources = ARRAY_SIZE(uart2_resources),
740};
741
742static inline void configure_usart2_pins(void)
743{
744 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
745 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
746 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
747 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
748}
749
750struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
751struct platform_device *atmel_default_console_device; /* the serial console device */
752
753void __init at91_init_serial(struct at91_uart_config *config)
754{
755 int i;
756
757 /* Fill in list of supported UARTs */
758 for (i = 0; i < config->nr_tty; i++) {
759 switch (config->tty_map[i]) {
760 case 0:
761 configure_usart0_pins();
762 at91_uarts[i] = &at91sam9263_uart0_device;
763 at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart");
764 break;
765 case 1:
766 configure_usart1_pins();
767 at91_uarts[i] = &at91sam9263_uart1_device;
768 at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart");
769 break;
770 case 2:
771 configure_usart2_pins();
772 at91_uarts[i] = &at91sam9263_uart2_device;
773 at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart");
774 break;
775 case 3:
776 configure_dbgu_pins();
777 at91_uarts[i] = &at91sam9263_dbgu_device;
778 at91_clock_associate("mck", &at91sam9263_dbgu_device.dev, "usart");
779 break;
780 default:
781 continue;
782 }
783 at91_uarts[i]->id = i; /* update ID number to mapped ID */
784 }
785
786 /* Set serial console device */
787 if (config->console_tty < ATMEL_MAX_UART)
788 atmel_default_console_device = at91_uarts[config->console_tty];
789 if (!atmel_default_console_device)
790 printk(KERN_INFO "AT91: No default serial console defined.\n");
791}
792
793void __init at91_add_device_serial(void)
794{
795 int i;
796
797 for (i = 0; i < ATMEL_MAX_UART; i++) {
798 if (at91_uarts[i])
799 platform_device_register(at91_uarts[i]);
800 }
801}
802#else
803void __init at91_init_serial(struct at91_uart_config *config) {}
804void __init at91_add_device_serial(void) {}
805#endif
806
807
808/* -------------------------------------------------------------------- */
809/*
810 * These devices are always present and don't need any board-specific
811 * setup.
812 */
813static int __init at91_add_standard_devices(void)
814{
815 return 0;
816}
817
818arch_initcall(at91_add_standard_devices);
diff --git a/arch/arm/mach-at91rm9200/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
index 99df5f6ee42e..a4dded27fa16 100644
--- a/arch/arm/mach-at91rm9200/at91sam926x_time.c
+++ b/arch/arm/mach-at91/at91sam926x_time.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/at91sam926x_time.c 2 * linux/arch/arm/mach-at91/at91sam926x_time.c
3 * 3 *
4 * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France 4 * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
5 * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France 5 * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
@@ -30,7 +30,6 @@
30 * Returns number of microseconds since last timer interrupt. Note that interrupts 30 * Returns number of microseconds since last timer interrupt. Note that interrupts
31 * will have been disabled by do_gettimeofday() 31 * will have been disabled by do_gettimeofday()
32 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. 32 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
33 * 'tick' is usecs per jiffy (linux/timex.h).
34 */ 33 */
35static unsigned long at91sam926x_gettimeoffset(void) 34static unsigned long at91sam926x_gettimeoffset(void)
36{ 35{
@@ -39,7 +38,7 @@ static unsigned long at91sam926x_gettimeoffset(void)
39 38
40 elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */ 39 elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */
41 40
42 return (unsigned long)(elapsed * 1000000) / LATCH; 41 return (unsigned long)(elapsed * jiffies_to_usecs(1)) / LATCH;
43} 42}
44 43
45/* 44/*
diff --git a/arch/arm/mach-at91rm9200/board-1arm.c b/arch/arm/mach-at91/board-1arm.c
index 971c3e2d8e36..2d3d4b6f7b02 100644
--- a/arch/arm/mach-at91rm9200/board-1arm.c
+++ b/arch/arm/mach-at91/board-1arm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-1arm.c 2 * linux/arch/arm/mach-at91/board-1arm.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
diff --git a/arch/arm/mach-at91rm9200/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c
index 654f0379550a..b4518619063a 100644
--- a/arch/arm/mach-at91rm9200/board-carmeva.c
+++ b/arch/arm/mach-at91/board-carmeva.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-carmeva.c 2 * linux/arch/arm/mach-at91/board-carmeva.c
3 * 3 *
4 * Copyright (c) 2005 Peer Georgi 4 * Copyright (c) 2005 Peer Georgi
5 * Conitec Datasystems 5 * Conitec Datasystems
@@ -134,7 +134,7 @@ static void __init carmeva_board_init(void)
134 /* Compact Flash */ 134 /* Compact Flash */
135// at91_add_device_cf(&carmeva_cf_data); 135// at91_add_device_cf(&carmeva_cf_data);
136 /* MMC */ 136 /* MMC */
137 at91_add_device_mmc(&carmeva_mmc_data); 137 at91_add_device_mmc(0, &carmeva_mmc_data);
138} 138}
139 139
140MACHINE_START(CARMEVA, "Carmeva") 140MACHINE_START(CARMEVA, "Carmeva")
diff --git a/arch/arm/mach-at91rm9200/board-csb337.c b/arch/arm/mach-at91/board-csb337.c
index b8bb8052607a..e18a41e61f0c 100644
--- a/arch/arm/mach-at91rm9200/board-csb337.c
+++ b/arch/arm/mach-at91/board-csb337.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-csb337.c 2 * linux/arch/arm/mach-at91/board-csb337.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
@@ -24,6 +24,7 @@
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/spi/spi.h> 26#include <linux/spi/spi.h>
27#include <linux/mtd/physmap.h>
27 28
28#include <asm/hardware.h> 29#include <asm/hardware.h>
29#include <asm/setup.h> 30#include <asm/setup.h>
@@ -112,6 +113,42 @@ static struct spi_board_info csb337_spi_devices[] = {
112 }, 113 },
113}; 114};
114 115
116#define CSB_FLASH_BASE AT91_CHIPSELECT_0
117#define CSB_FLASH_SIZE 0x800000
118
119static struct mtd_partition csb_flash_partitions[] = {
120 {
121 .name = "uMON flash",
122 .offset = 0,
123 .size = MTDPART_SIZ_FULL,
124 .mask_flags = MTD_WRITEABLE, /* read only */
125 }
126};
127
128static struct physmap_flash_data csb_flash_data = {
129 .width = 2,
130 .parts = csb_flash_partitions,
131 .nr_parts = ARRAY_SIZE(csb_flash_partitions),
132};
133
134static struct resource csb_flash_resources[] = {
135 {
136 .start = CSB_FLASH_BASE,
137 .end = CSB_FLASH_BASE + CSB_FLASH_SIZE - 1,
138 .flags = IORESOURCE_MEM,
139 }
140};
141
142static struct platform_device csb_flash = {
143 .name = "physmap-flash",
144 .id = 0,
145 .dev = {
146 .platform_data = &csb_flash_data,
147 },
148 .resource = csb_flash_resources,
149 .num_resources = ARRAY_SIZE(csb_flash_resources),
150};
151
115static void __init csb337_board_init(void) 152static void __init csb337_board_init(void)
116{ 153{
117 /* Serial */ 154 /* Serial */
@@ -130,7 +167,9 @@ static void __init csb337_board_init(void)
130 /* SPI */ 167 /* SPI */
131 at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices)); 168 at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
132 /* MMC */ 169 /* MMC */
133 at91_add_device_mmc(&csb337_mmc_data); 170 at91_add_device_mmc(0, &csb337_mmc_data);
171 /* NOR flash */
172 platform_device_register(&csb_flash);
134} 173}
135 174
136MACHINE_START(CSB337, "Cogent CSB337") 175MACHINE_START(CSB337, "Cogent CSB337")
diff --git a/arch/arm/mach-at91rm9200/board-csb637.c b/arch/arm/mach-at91/board-csb637.c
index a29fa0e822ce..77f04b935b3a 100644
--- a/arch/arm/mach-at91rm9200/board-csb637.c
+++ b/arch/arm/mach-at91/board-csb637.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-csb637.c 2 * linux/arch/arm/mach-at91/board-csb637.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
@@ -23,6 +23,7 @@
23#include <linux/mm.h> 23#include <linux/mm.h>
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/mtd/physmap.h>
26 27
27#include <asm/hardware.h> 28#include <asm/hardware.h>
28#include <asm/setup.h> 29#include <asm/setup.h>
@@ -81,6 +82,42 @@ static struct at91_udc_data __initdata csb637_udc_data = {
81 .pullup_pin = AT91_PIN_PB1, 82 .pullup_pin = AT91_PIN_PB1,
82}; 83};
83 84
85#define CSB_FLASH_BASE AT91_CHIPSELECT_0
86#define CSB_FLASH_SIZE 0x1000000
87
88static struct mtd_partition csb_flash_partitions[] = {
89 {
90 .name = "uMON flash",
91 .offset = 0,
92 .size = MTDPART_SIZ_FULL,
93 .mask_flags = MTD_WRITEABLE, /* read only */
94 }
95};
96
97static struct physmap_flash_data csb_flash_data = {
98 .width = 2,
99 .parts = csb_flash_partitions,
100 .nr_parts = ARRAY_SIZE(csb_flash_partitions),
101};
102
103static struct resource csb_flash_resources[] = {
104 {
105 .start = CSB_FLASH_BASE,
106 .end = CSB_FLASH_BASE + CSB_FLASH_SIZE - 1,
107 .flags = IORESOURCE_MEM,
108 }
109};
110
111static struct platform_device csb_flash = {
112 .name = "physmap-flash",
113 .id = 0,
114 .dev = {
115 .platform_data = &csb_flash_data,
116 },
117 .resource = csb_flash_resources,
118 .num_resources = ARRAY_SIZE(csb_flash_resources),
119};
120
84static void __init csb637_board_init(void) 121static void __init csb637_board_init(void)
85{ 122{
86 /* Serial */ 123 /* Serial */
@@ -95,6 +132,8 @@ static void __init csb637_board_init(void)
95 at91_add_device_i2c(); 132 at91_add_device_i2c();
96 /* SPI */ 133 /* SPI */
97 at91_add_device_spi(NULL, 0); 134 at91_add_device_spi(NULL, 0);
135 /* NOR flash */
136 platform_device_register(&csb_flash);
98} 137}
99 138
100MACHINE_START(CSB637, "Cogent CSB637") 139MACHINE_START(CSB637, "Cogent CSB637")
diff --git a/arch/arm/mach-at91rm9200/board-dk.c b/arch/arm/mach-at91/board-dk.c
index 7522bf91bce8..6043c38c0a9e 100644
--- a/arch/arm/mach-at91rm9200/board-dk.c
+++ b/arch/arm/mach-at91/board-dk.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-dk.c 2 * linux/arch/arm/mach-at91/board-dk.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
@@ -194,7 +194,7 @@ static void __init dk_board_init(void)
194#else 194#else
195 /* MMC */ 195 /* MMC */
196 at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ 196 at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
197 at91_add_device_mmc(&dk_mmc_data); 197 at91_add_device_mmc(0, &dk_mmc_data);
198#endif 198#endif
199 /* NAND */ 199 /* NAND */
200 at91_add_device_nand(&dk_nand_data); 200 at91_add_device_nand(&dk_nand_data);
diff --git a/arch/arm/mach-at91rm9200/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c
index 80b72cf7264c..20458b5548f0 100644
--- a/arch/arm/mach-at91rm9200/board-eb9200.c
+++ b/arch/arm/mach-at91/board-eb9200.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-eb9200.c 2 * linux/arch/arm/mach-at91/board-eb9200.c
3 * 3 *
4 * Copyright (C) 2005 SAN People, adapted for ATEB9200 from Embest 4 * Copyright (C) 2005 SAN People, adapted for ATEB9200 from Embest
5 * by Andrew Patrikalakis 5 * by Andrew Patrikalakis
@@ -109,7 +109,7 @@ static void __init eb9200_board_init(void)
109 at91_add_device_spi(NULL, 0); 109 at91_add_device_spi(NULL, 0);
110 /* MMC */ 110 /* MMC */
111 /* only supports 1 or 4 bit interface, not wired through to SPI */ 111 /* only supports 1 or 4 bit interface, not wired through to SPI */
112 at91_add_device_mmc(&eb9200_mmc_data); 112 at91_add_device_mmc(0, &eb9200_mmc_data);
113} 113}
114 114
115MACHINE_START(ATEB9200, "Embest ATEB9200") 115MACHINE_START(ATEB9200, "Embest ATEB9200")
diff --git a/arch/arm/mach-at91rm9200/board-ek.c b/arch/arm/mach-at91/board-ek.c
index c4fdb415f20e..322fdd75a1e4 100644
--- a/arch/arm/mach-at91rm9200/board-ek.c
+++ b/arch/arm/mach-at91/board-ek.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-ek.c 2 * linux/arch/arm/mach-at91/board-ek.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * 5 *
@@ -154,7 +154,7 @@ static void __init ek_board_init(void)
154#else 154#else
155 /* MMC */ 155 /* MMC */
156 at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */ 156 at91_set_gpio_output(AT91_PIN_PB22, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
157 at91_add_device_mmc(&ek_mmc_data); 157 at91_add_device_mmc(0, &ek_mmc_data);
158#endif 158#endif
159 /* NOR Flash */ 159 /* NOR Flash */
160 platform_device_register(&ek_flash); 160 platform_device_register(&ek_flash);
diff --git a/arch/arm/mach-at91rm9200/board-kafa.c b/arch/arm/mach-at91/board-kafa.c
index 6ef3c4879829..c77d84ce9cae 100644
--- a/arch/arm/mach-at91rm9200/board-kafa.c
+++ b/arch/arm/mach-at91/board-kafa.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-kafa.c 2 * linux/arch/arm/mach-at91/board-kafa.c
3 * 3 *
4 * Copyright (C) 2006 Sperry-Sun 4 * Copyright (C) 2006 Sperry-Sun
5 * 5 *
diff --git a/arch/arm/mach-at91rm9200/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c
index 759d8191854f..76f6e1e553ea 100644
--- a/arch/arm/mach-at91rm9200/board-kb9202.c
+++ b/arch/arm/mach-at91/board-kb9202.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-kb9202.c 2 * linux/arch/arm/mach-at91/board-kb9202.c
3 * 3 *
4 * Copyright (c) 2005 kb_admin 4 * Copyright (c) 2005 kb_admin
5 * KwikByte, Inc. 5 * KwikByte, Inc.
@@ -122,7 +122,7 @@ static void __init kb9202_board_init(void)
122 /* USB Device */ 122 /* USB Device */
123 at91_add_device_udc(&kb9202_udc_data); 123 at91_add_device_udc(&kb9202_udc_data);
124 /* MMC */ 124 /* MMC */
125 at91_add_device_mmc(&kb9202_mmc_data); 125 at91_add_device_mmc(0, &kb9202_mmc_data);
126 /* I2C */ 126 /* I2C */
127 at91_add_device_i2c(); 127 at91_add_device_i2c();
128 /* SPI */ 128 /* SPI */
diff --git a/arch/arm/mach-at91rm9200/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c
index da5d58ac870b..57fb4499d969 100644
--- a/arch/arm/mach-at91rm9200/board-sam9260ek.c
+++ b/arch/arm/mach-at91/board-sam9260ek.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-ek.c 2 * linux/arch/arm/mach-at91/board-sam9260ek.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel 5 * Copyright (C) 2006 Atmel
@@ -118,7 +118,7 @@ static struct spi_board_info ek_spi_devices[] = {
118/* 118/*
119 * MACB Ethernet device 119 * MACB Ethernet device
120 */ 120 */
121static struct __initdata eth_platform_data ek_macb_data = { 121static struct __initdata at91_eth_data ek_macb_data = {
122 .phy_irq_pin = AT91_PIN_PA7, 122 .phy_irq_pin = AT91_PIN_PA7,
123 .is_rmii = 1, 123 .is_rmii = 1,
124}; 124};
@@ -187,7 +187,7 @@ static void __init ek_board_init(void)
187 /* Ethernet */ 187 /* Ethernet */
188 at91_add_device_eth(&ek_macb_data); 188 at91_add_device_eth(&ek_macb_data);
189 /* MMC */ 189 /* MMC */
190 at91_add_device_mmc(&ek_mmc_data); 190 at91_add_device_mmc(0, &ek_mmc_data);
191} 191}
192 192
193MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") 193MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
diff --git a/arch/arm/mach-at91rm9200/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index 30b490d8886b..b7e772467cf6 100644
--- a/arch/arm/mach-at91rm9200/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/board-ek.c 2 * linux/arch/arm/mach-at91/board-sam9261ek.c
3 * 3 *
4 * Copyright (C) 2005 SAN People 4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2006 Atmel 5 * Copyright (C) 2006 Atmel
@@ -243,7 +243,7 @@ static void __init ek_board_init(void)
243 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); 243 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
244#else 244#else
245 /* MMC */ 245 /* MMC */
246 at91_add_device_mmc(&ek_mmc_data); 246 at91_add_device_mmc(0, &ek_mmc_data);
247#endif 247#endif
248} 248}
249 249
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c
new file mode 100644
index 000000000000..8fdce11a880c
--- /dev/null
+++ b/arch/arm/mach-at91/board-sam9263ek.c
@@ -0,0 +1,176 @@
1/*
2 * linux/arch/arm/mach-at91/board-sam9263ek.c
3 *
4 * Copyright (C) 2005 SAN People
5 * Copyright (C) 2007 Atmel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/mm.h>
25#include <linux/module.h>
26#include <linux/platform_device.h>
27#include <linux/spi/spi.h>
28
29#include <asm/hardware.h>
30#include <asm/setup.h>
31#include <asm/mach-types.h>
32#include <asm/irq.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/irq.h>
37
38#include <asm/arch/board.h>
39#include <asm/arch/gpio.h>
40#include <asm/arch/at91sam926x_mc.h>
41
42#include "generic.h"
43
44
45/*
46 * Serial port configuration.
47 * 0 .. 2 = USART0 .. USART2
48 * 3 = DBGU
49 */
50static struct at91_uart_config __initdata ek_uart_config = {
51 .console_tty = 0, /* ttyS0 */
52 .nr_tty = 2,
53 .tty_map = { 3, 0, -1, -1, } /* ttyS0, ..., ttyS3 */
54};
55
56static void __init ek_map_io(void)
57{
58 /* Initialize processor: 16.367 MHz crystal */
59 at91sam9263_initialize(16367660);
60
61 /* Setup the serial ports and console */
62 at91_init_serial(&ek_uart_config);
63}
64
65static void __init ek_init_irq(void)
66{
67 at91sam9263_init_interrupts(NULL);
68}
69
70
71/*
72 * USB Host port
73 */
74static struct at91_usbh_data __initdata ek_usbh_data = {
75 .ports = 2,
76 .vbus_pin = { AT91_PIN_PA24, AT91_PIN_PA21 },
77};
78
79/*
80 * USB Device port
81 */
82static struct at91_udc_data __initdata ek_udc_data = {
83 .vbus_pin = AT91_PIN_PA25,
84 .pullup_pin = 0, /* pull-up driven by UDC */
85};
86
87
88/*
89 * SPI devices.
90 */
91static struct spi_board_info ek_spi_devices[] = {
92#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
93 { /* DataFlash card */
94 .modalias = "mtd_dataflash",
95 .chip_select = 0,
96 .max_speed_hz = 15 * 1000 * 1000,
97 .bus_num = 0,
98 },
99#endif
100};
101
102
103/*
104 * MCI (SD/MMC)
105 */
106static struct at91_mmc_data __initdata ek_mmc_data = {
107 .wire4 = 1,
108 .det_pin = AT91_PIN_PE18,
109 .wp_pin = AT91_PIN_PE19,
110// .vcc_pin = ... not connected
111};
112
113
114/*
115 * NAND flash
116 */
117static struct mtd_partition __initdata ek_nand_partition[] = {
118 {
119 .name = "Partition 1",
120 .offset = 0,
121 .size = 64 * 1024 * 1024,
122 },
123 {
124 .name = "Partition 2",
125 .offset = 64 * 1024 * 1024,
126 .size = MTDPART_SIZ_FULL,
127 },
128};
129
130static struct mtd_partition *nand_partitions(int size, int *num_partitions)
131{
132 *num_partitions = ARRAY_SIZE(ek_nand_partition);
133 return ek_nand_partition;
134}
135
136static struct at91_nand_data __initdata ek_nand_data = {
137 .ale = 21,
138 .cle = 22,
139// .det_pin = ... not connected
140 .rdy_pin = AT91_PIN_PA22,
141 .enable_pin = AT91_PIN_PD15,
142 .partition_info = nand_partitions,
143#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
144 .bus_width_16 = 1,
145#else
146 .bus_width_16 = 0,
147#endif
148};
149
150
151static void __init ek_board_init(void)
152{
153 /* Serial */
154 at91_add_device_serial();
155 /* USB Host */
156 at91_add_device_usbh(&ek_usbh_data);
157 /* USB Device */
158 at91_add_device_udc(&ek_udc_data);
159 /* SPI */
160 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
161 /* MMC */
162 at91_add_device_mmc(1, &ek_mmc_data);
163 /* NAND */
164 at91_add_device_nand(&ek_nand_data);
165}
166
167MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
168 /* Maintainer: Atmel */
169 .phys_io = AT91_BASE_SYS,
170 .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
171 .boot_params = AT91_SDRAM_BASE + 0x100,
172 .timer = &at91sam926x_timer,
173 .map_io = ek_map_io,
174 .init_irq = ek_init_irq,
175 .init_machine = ek_board_init,
176MACHINE_END
diff --git a/arch/arm/mach-at91rm9200/clock.c b/arch/arm/mach-at91/clock.c
index 4dee21fefe5a..f6cb74806043 100644
--- a/arch/arm/mach-at91rm9200/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/clock.c 2 * linux/arch/arm/mach-at91/clock.c
3 * 3 *
4 * Copyright (C) 2005 David Brownell 4 * Copyright (C) 2005 David Brownell
5 * Copyright (C) 2005 Ivan Kokshaysky 5 * Copyright (C) 2005 Ivan Kokshaysky
@@ -525,27 +525,6 @@ fail:
525 return 0; 525 return 0;
526} 526}
527 527
528/*
529 * Several unused clocks may be active. Turn them off.
530 */
531static void __init at91_periphclk_reset(void)
532{
533 unsigned long reg;
534 struct clk *clk;
535
536 reg = at91_sys_read(AT91_PMC_PCSR);
537
538 list_for_each_entry(clk, &clocks, node) {
539 if (clk->mode != pmc_periph_mode)
540 continue;
541
542 if (clk->users > 0)
543 reg &= ~clk->pmc_mask;
544 }
545
546 at91_sys_write(AT91_PMC_PCDR, reg);
547}
548
549static struct clk *const standard_pmc_clocks[] __initdata = { 528static struct clk *const standard_pmc_clocks[] __initdata = {
550 /* four primary clocks */ 529 /* four primary clocks */
551 &clk32k, 530 &clk32k,
@@ -586,7 +565,7 @@ int __init at91_clock_init(unsigned long main_clock)
586 pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000); 565 pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
587 566
588 /* 567 /*
589 * USB clock init: choose 48 MHz PLLB value, turn all clocks off, 568 * USB clock init: choose 48 MHz PLLB value,
590 * disable 48MHz clock during usb peripheral suspend. 569 * disable 48MHz clock during usb peripheral suspend.
591 * 570 *
592 * REVISIT: assumes MCK doesn't derive from PLLB! 571 * REVISIT: assumes MCK doesn't derive from PLLB!
@@ -596,16 +575,10 @@ int __init at91_clock_init(unsigned long main_clock)
596 if (cpu_is_at91rm9200()) { 575 if (cpu_is_at91rm9200()) {
597 uhpck.pmc_mask = AT91RM9200_PMC_UHP; 576 uhpck.pmc_mask = AT91RM9200_PMC_UHP;
598 udpck.pmc_mask = AT91RM9200_PMC_UDP; 577 udpck.pmc_mask = AT91RM9200_PMC_UDP;
599 at91_sys_write(AT91_PMC_SCDR, AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP);
600 at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); 578 at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
601 } else if (cpu_is_at91sam9260()) { 579 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) {
602 uhpck.pmc_mask = AT91SAM926x_PMC_UHP; 580 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
603 udpck.pmc_mask = AT91SAM926x_PMC_UDP; 581 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
604 at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP);
605 } else if (cpu_is_at91sam9261()) {
606 uhpck.pmc_mask = (AT91SAM926x_PMC_UHP | AT91_PMC_HCK0);
607 udpck.pmc_mask = AT91SAM926x_PMC_UDP;
608 at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91_PMC_HCK0 | AT91SAM926x_PMC_UDP);
609 } 582 }
610 at91_sys_write(AT91_CKGR_PLLBR, 0); 583 at91_sys_write(AT91_CKGR_PLLBR, 0);
611 584
@@ -634,11 +607,34 @@ int __init at91_clock_init(unsigned long main_clock)
634 (unsigned) main_clock / 1000000, 607 (unsigned) main_clock / 1000000,
635 ((unsigned) main_clock % 1000000) / 1000); 608 ((unsigned) main_clock % 1000000) / 1000);
636 609
637 /* disable all programmable clocks */ 610 return 0;
638 at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3); 611}
612
613/*
614 * Several unused clocks may be active. Turn them off.
615 */
616static int __init at91_clock_reset(void)
617{
618 unsigned long pcdr = 0;
619 unsigned long scdr = 0;
620 struct clk *clk;
621
622 list_for_each_entry(clk, &clocks, node) {
623 if (clk->users > 0)
624 continue;
625
626 if (clk->mode == pmc_periph_mode)
627 pcdr |= clk->pmc_mask;
628
629 if (clk->mode == pmc_sys_mode)
630 scdr |= clk->pmc_mask;
631
632 pr_debug("Clocks: disable unused %s\n", clk->name);
633 }
639 634
640 /* disable all other unused peripheral clocks */ 635 at91_sys_write(AT91_PMC_PCDR, pcdr);
641 at91_periphclk_reset(); 636 at91_sys_write(AT91_PMC_SCDR, scdr);
642 637
643 return 0; 638 return 0;
644} 639}
640late_initcall(at91_clock_reset);
diff --git a/arch/arm/mach-at91rm9200/clock.h b/arch/arm/mach-at91/clock.h
index b5c7a2eb2d1d..1ba3b95ff359 100644
--- a/arch/arm/mach-at91rm9200/clock.h
+++ b/arch/arm/mach-at91/clock.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/clock.h 2 * linux/arch/arm/mach-at91/clock.h
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-at91rm9200/generic.h b/arch/arm/mach-at91/generic.h
index 8c4d5a77d485..bda26221c522 100644
--- a/arch/arm/mach-at91rm9200/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/generic.h 2 * linux/arch/arm/mach-at91/generic.h
3 * 3 *
4 * Copyright (C) 2005 David Brownell 4 * Copyright (C) 2005 David Brownell
5 * 5 *
@@ -12,11 +12,13 @@
12extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks); 12extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
13extern void __init at91sam9260_initialize(unsigned long main_clock); 13extern void __init at91sam9260_initialize(unsigned long main_clock);
14extern void __init at91sam9261_initialize(unsigned long main_clock); 14extern void __init at91sam9261_initialize(unsigned long main_clock);
15extern void __init at91sam9263_initialize(unsigned long main_clock);
15 16
16 /* Interrupts */ 17 /* Interrupts */
17extern void __init at91rm9200_init_interrupts(unsigned int priority[]); 18extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
18extern void __init at91sam9260_init_interrupts(unsigned int priority[]); 19extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
19extern void __init at91sam9261_init_interrupts(unsigned int priority[]); 20extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
21extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
20extern void __init at91_aic_init(unsigned int priority[]); 22extern void __init at91_aic_init(unsigned int priority[]);
21 23
22 /* Timer */ 24 /* Timer */
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91/gpio.c
index af22659c8a28..9b7495cd555d 100644
--- a/arch/arm/mach-at91rm9200/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/gpio.c 2 * linux/arch/arm/mach-at91/gpio.c
3 * 3 *
4 * Copyright (C) 2005 HP Labs 4 * Copyright (C) 2005 HP Labs
5 * 5 *
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91/irq.c
index 2148daafd29c..78a5cdb746dc 100644
--- a/arch/arm/mach-at91rm9200/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-at91rm9200/irq.c 2 * linux/arch/arm/mach-at91/irq.c
3 * 3 *
4 * Copyright (C) 2004 SAN People 4 * Copyright (C) 2004 SAN People
5 * Copyright (C) 2004 ATMEL 5 * Copyright (C) 2004 ATMEL
diff --git a/arch/arm/mach-at91rm9200/leds.c b/arch/arm/mach-at91/leds.c
index 1a333730466e..0d5144973988 100644
--- a/arch/arm/mach-at91rm9200/leds.c
+++ b/arch/arm/mach-at91/leds.c
@@ -86,10 +86,6 @@ static int __init leds_init(void)
86 if (!at91_leds_timer || !at91_leds_cpu) 86 if (!at91_leds_timer || !at91_leds_cpu)
87 return -ENODEV; 87 return -ENODEV;
88 88
89 /* Enable PIO to access the LEDs */
90 at91_set_gpio_output(at91_leds_timer, 1);
91 at91_set_gpio_output(at91_leds_cpu, 1);
92
93 leds_event = at91_leds_event; 89 leds_event = at91_leds_event;
94 90
95 leds_event(led_start); 91 leds_event(led_start);
diff --git a/arch/arm/mach-at91rm9200/pm.c b/arch/arm/mach-at91/pm.c
index 67aa5572a3ea..b49bfda53d7f 100644
--- a/arch/arm/mach-at91rm9200/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/arm/mach-at91rm9200/pm.c 2 * arch/arm/mach-at91/pm.c
3 * AT91 Power Management 3 * AT91 Power Management
4 * 4 *
5 * Copyright (C) 2005 David Brownell 5 * Copyright (C) 2005 David Brownell
@@ -80,6 +80,8 @@ static int at91_pm_verify_clocks(void)
80#warning "Check SAM9260 USB clocks" 80#warning "Check SAM9260 USB clocks"
81 } else if (cpu_is_at91sam9261()) { 81 } else if (cpu_is_at91sam9261()) {
82#warning "Check SAM9261 USB clocks" 82#warning "Check SAM9261 USB clocks"
83 } else if (cpu_is_at91sam9263()) {
84#warning "Check SAM9263 USB clocks"
83 } 85 }
84 86
85#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS 87#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 08ad782c1649..f174d1a3b11c 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/clk.h> 14#include <linux/clk.h>
15#include <linux/err.h> 15#include <linux/err.h>
16#include <linux/module.h>
16#include <linux/string.h> 17#include <linux/string.h>
17#include <asm/div64.h> 18#include <asm/div64.h>
18#include <asm/hardware.h> 19#include <asm/hardware.h>
@@ -124,7 +125,7 @@ static unsigned long calc_pll_rate(u32 config_word)
124 return (unsigned long)rate; 125 return (unsigned long)rate;
125} 126}
126 127
127void ep93xx_clock_init(void) 128static int __init ep93xx_clock_init(void)
128{ 129{
129 u32 value; 130 u32 value;
130 131
@@ -153,4 +154,7 @@ void ep93xx_clock_init(void)
153 printk(KERN_INFO "ep93xx: FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n", 154 printk(KERN_INFO "ep93xx: FCLK %ld MHz, HCLK %ld MHz, PCLK %ld MHz\n",
154 clk_f.rate / 1000000, clk_h.rate / 1000000, 155 clk_f.rate / 1000000, clk_h.rate / 1000000,
155 clk_p.rate / 1000000); 156 clk_p.rate / 1000000);
157
158 return 0;
156} 159}
160arch_initcall(ep93xx_clock_init);
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 6b26346191c0..829aed696d98 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -152,22 +152,30 @@ struct sys_timer ep93xx_timer = {
152/************************************************************************* 152/*************************************************************************
153 * GPIO handling for EP93xx 153 * GPIO handling for EP93xx
154 *************************************************************************/ 154 *************************************************************************/
155static unsigned char gpio_int_enable[2]; 155static unsigned char gpio_int_unmasked[3];
156static unsigned char gpio_int_type1[2]; 156static unsigned char gpio_int_enabled[3];
157static unsigned char gpio_int_type2[2]; 157static unsigned char gpio_int_type1[3];
158static unsigned char gpio_int_type2[3];
158 159
159static void update_gpio_ab_int_params(int port) 160static void update_gpio_int_params(int abf)
160{ 161{
161 if (port == 0) { 162 if (abf == 0) {
162 __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE); 163 __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE);
163 __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2); 164 __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2);
164 __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1); 165 __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1);
165 __raw_writeb(gpio_int_enable[0], EP93XX_GPIO_A_INT_ENABLE); 166 __raw_writeb(gpio_int_unmasked[0] & gpio_int_enabled[0], EP93XX_GPIO_A_INT_ENABLE);
166 } else if (port == 1) { 167 } else if (abf == 1) {
167 __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE); 168 __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE);
168 __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2); 169 __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2);
169 __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1); 170 __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1);
170 __raw_writeb(gpio_int_enable[1], EP93XX_GPIO_B_INT_ENABLE); 171 __raw_writeb(gpio_int_unmasked[1] & gpio_int_enabled[1], EP93XX_GPIO_B_INT_ENABLE);
172 } else if (abf == 2) {
173 __raw_writeb(0, EP93XX_GPIO_F_INT_ENABLE);
174 __raw_writeb(gpio_int_type2[2], EP93XX_GPIO_F_INT_TYPE2);
175 __raw_writeb(gpio_int_type1[2], EP93XX_GPIO_F_INT_TYPE1);
176 __raw_writeb(gpio_int_unmasked[2] & gpio_int_enabled[2], EP93XX_GPIO_F_INT_ENABLE);
177 } else {
178 BUG();
171 } 179 }
172} 180}
173 181
@@ -192,8 +200,13 @@ void gpio_line_config(int line, int direction)
192 local_irq_save(flags); 200 local_irq_save(flags);
193 if (direction == GPIO_OUT) { 201 if (direction == GPIO_OUT) {
194 if (line >= 0 && line < 16) { 202 if (line >= 0 && line < 16) {
195 gpio_int_enable[line >> 3] &= ~(1 << (line & 7)); 203 /* Port A/B. */
196 update_gpio_ab_int_params(line >> 3); 204 gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
205 update_gpio_int_params(line >> 3);
206 } else if (line >= 40 && line < 48) {
207 /* Port F. */
208 gpio_int_unmasked[2] &= ~(1 << (line & 7));
209 update_gpio_int_params(2);
197 } 210 }
198 211
199 v = __raw_readb(data_direction_register); 212 v = __raw_readb(data_direction_register);
@@ -244,8 +257,7 @@ EXPORT_SYMBOL(gpio_line_set);
244/************************************************************************* 257/*************************************************************************
245 * EP93xx IRQ handling 258 * EP93xx IRQ handling
246 *************************************************************************/ 259 *************************************************************************/
247static void ep93xx_gpio_ab_irq_handler(unsigned int irq, 260static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
248 struct irq_desc *desc)
249{ 261{
250 unsigned char status; 262 unsigned char status;
251 int i; 263 int i;
@@ -267,37 +279,46 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq,
267 } 279 }
268} 280}
269 281
270static void ep93xx_gpio_ab_irq_mask_ack(unsigned int irq) 282static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
283{
284 int gpio_irq = IRQ_EP93XX_GPIO(16) + (((irq + 1) & 7) ^ 4);
285
286 desc_handle_irq(gpio_irq, irq_desc + gpio_irq);
287}
288
289static void ep93xx_gpio_irq_mask_ack(unsigned int irq)
271{ 290{
272 int line = irq - IRQ_EP93XX_GPIO(0); 291 int line = irq - IRQ_EP93XX_GPIO(0);
273 int port = line >> 3; 292 int port = line >> 3;
274 293
275 gpio_int_enable[port] &= ~(1 << (line & 7)); 294 gpio_int_unmasked[port] &= ~(1 << (line & 7));
276 update_gpio_ab_int_params(port); 295 update_gpio_int_params(port);
277 296
278 if (line >> 3) { 297 if (port == 0) {
279 __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK);
280 } else {
281 __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK); 298 __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK);
299 } else if (port == 1) {
300 __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK);
301 } else if (port == 2) {
302 __raw_writel(1 << (line & 7), EP93XX_GPIO_F_INT_ACK);
282 } 303 }
283} 304}
284 305
285static void ep93xx_gpio_ab_irq_mask(unsigned int irq) 306static void ep93xx_gpio_irq_mask(unsigned int irq)
286{ 307{
287 int line = irq - IRQ_EP93XX_GPIO(0); 308 int line = irq - IRQ_EP93XX_GPIO(0);
288 int port = line >> 3; 309 int port = line >> 3;
289 310
290 gpio_int_enable[port] &= ~(1 << (line & 7)); 311 gpio_int_unmasked[port] &= ~(1 << (line & 7));
291 update_gpio_ab_int_params(port); 312 update_gpio_int_params(port);
292} 313}
293 314
294static void ep93xx_gpio_ab_irq_unmask(unsigned int irq) 315static void ep93xx_gpio_irq_unmask(unsigned int irq)
295{ 316{
296 int line = irq - IRQ_EP93XX_GPIO(0); 317 int line = irq - IRQ_EP93XX_GPIO(0);
297 int port = line >> 3; 318 int port = line >> 3;
298 319
299 gpio_int_enable[port] |= 1 << (line & 7); 320 gpio_int_unmasked[port] |= 1 << (line & 7);
300 update_gpio_ab_int_params(port); 321 update_gpio_int_params(port);
301} 322}
302 323
303 324
@@ -306,40 +327,51 @@ static void ep93xx_gpio_ab_irq_unmask(unsigned int irq)
306 * edge (1) triggered, while gpio_int_type2 controls whether it 327 * edge (1) triggered, while gpio_int_type2 controls whether it
307 * triggers on low/falling (0) or high/rising (1). 328 * triggers on low/falling (0) or high/rising (1).
308 */ 329 */
309static int ep93xx_gpio_ab_irq_type(unsigned int irq, unsigned int type) 330static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
310{ 331{
311 int port; 332 int port;
312 int line; 333 int line;
313 334
314 line = irq - IRQ_EP93XX_GPIO(0); 335 line = irq - IRQ_EP93XX_GPIO(0);
315 gpio_line_config(line, GPIO_IN); 336 if (line >= 0 && line < 16) {
337 gpio_line_config(line, GPIO_IN);
338 } else {
339 gpio_line_config(EP93XX_GPIO_LINE_F(line), GPIO_IN);
340 }
316 341
317 port = line >> 3; 342 port = line >> 3;
318 line &= 7; 343 line &= 7;
319 344
320 if (type & IRQT_RISING) { 345 if (type & IRQT_RISING) {
346 gpio_int_enabled[port] |= 1 << line;
321 gpio_int_type1[port] |= 1 << line; 347 gpio_int_type1[port] |= 1 << line;
322 gpio_int_type2[port] |= 1 << line; 348 gpio_int_type2[port] |= 1 << line;
323 } else if (type & IRQT_FALLING) { 349 } else if (type & IRQT_FALLING) {
350 gpio_int_enabled[port] |= 1 << line;
324 gpio_int_type1[port] |= 1 << line; 351 gpio_int_type1[port] |= 1 << line;
325 gpio_int_type2[port] &= ~(1 << line); 352 gpio_int_type2[port] &= ~(1 << line);
326 } else if (type & IRQT_HIGH) { 353 } else if (type & IRQT_HIGH) {
354 gpio_int_enabled[port] |= 1 << line;
327 gpio_int_type1[port] &= ~(1 << line); 355 gpio_int_type1[port] &= ~(1 << line);
328 gpio_int_type2[port] |= 1 << line; 356 gpio_int_type2[port] |= 1 << line;
329 } else if (type & IRQT_LOW) { 357 } else if (type & IRQT_LOW) {
358 gpio_int_enabled[port] |= 1 << line;
330 gpio_int_type1[port] &= ~(1 << line); 359 gpio_int_type1[port] &= ~(1 << line);
331 gpio_int_type2[port] &= ~(1 << line); 360 gpio_int_type2[port] &= ~(1 << line);
361 } else {
362 gpio_int_enabled[port] &= ~(1 << line);
332 } 363 }
333 update_gpio_ab_int_params(port); 364 update_gpio_int_params(port);
334 365
335 return 0; 366 return 0;
336} 367}
337 368
338static struct irq_chip ep93xx_gpio_ab_irq_chip = { 369static struct irq_chip ep93xx_gpio_irq_chip = {
339 .ack = ep93xx_gpio_ab_irq_mask_ack, 370 .name = "GPIO",
340 .mask = ep93xx_gpio_ab_irq_mask, 371 .ack = ep93xx_gpio_irq_mask_ack,
341 .unmask = ep93xx_gpio_ab_irq_unmask, 372 .mask = ep93xx_gpio_irq_mask,
342 .set_type = ep93xx_gpio_ab_irq_type, 373 .unmask = ep93xx_gpio_irq_unmask,
374 .set_type = ep93xx_gpio_irq_type,
343}; 375};
344 376
345 377
@@ -350,12 +382,21 @@ void __init ep93xx_init_irq(void)
350 vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK); 382 vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
351 vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK); 383 vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
352 384
353 for (irq = IRQ_EP93XX_GPIO(0) ; irq <= IRQ_EP93XX_GPIO(15); irq++) { 385 for (irq = IRQ_EP93XX_GPIO(0); irq <= IRQ_EP93XX_GPIO(23); irq++) {
354 set_irq_chip(irq, &ep93xx_gpio_ab_irq_chip); 386 set_irq_chip(irq, &ep93xx_gpio_irq_chip);
355 set_irq_handler(irq, handle_level_irq); 387 set_irq_handler(irq, handle_level_irq);
356 set_irq_flags(irq, IRQF_VALID); 388 set_irq_flags(irq, IRQF_VALID);
357 } 389 }
390
358 set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); 391 set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler);
392 set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler);
393 set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler);
394 set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler);
395 set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler);
396 set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler);
397 set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler);
398 set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler);
399 set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler);
359} 400}
360 401
361 402
@@ -461,8 +502,6 @@ void __init ep93xx_init_devices(void)
461{ 502{
462 unsigned int v; 503 unsigned int v;
463 504
464 ep93xx_clock_init();
465
466 /* 505 /*
467 * Disallow access to MaverickCrunch initially. 506 * Disallow access to MaverickCrunch initially.
468 */ 507 */
@@ -477,8 +516,4 @@ void __init ep93xx_init_devices(void)
477 516
478 platform_device_register(&ep93xx_rtc_device); 517 platform_device_register(&ep93xx_rtc_device);
479 platform_device_register(&ep93xx_ohci_device); 518 platform_device_register(&ep93xx_ohci_device);
480
481#ifdef CONFIG_CRUNCH
482 elf_hwcap |= HWCAP_CRUNCH;
483#endif
484} 519}
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c
index 9de1278d234f..390524c4710f 100644
--- a/arch/arm/mach-pxa/generic.c
+++ b/arch/arm/mach-pxa/generic.c
@@ -338,6 +338,27 @@ static struct platform_device i2c_device = {
338 .num_resources = ARRAY_SIZE(i2c_resources), 338 .num_resources = ARRAY_SIZE(i2c_resources),
339}; 339};
340 340
341#ifdef CONFIG_PXA27x
342static struct resource i2c_power_resources[] = {
343 {
344 .start = 0x40f00180,
345 .end = 0x40f001a3,
346 .flags = IORESOURCE_MEM,
347 }, {
348 .start = IRQ_PWRI2C,
349 .end = IRQ_PWRI2C,
350 .flags = IORESOURCE_IRQ,
351 },
352};
353
354static struct platform_device i2c_power_device = {
355 .name = "pxa2xx-i2c",
356 .id = 1,
357 .resource = i2c_power_resources,
358 .num_resources = ARRAY_SIZE(i2c_resources),
359};
360#endif
361
341void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) 362void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
342{ 363{
343 i2c_device.dev.platform_data = info; 364 i2c_device.dev.platform_data = info;
@@ -392,6 +413,9 @@ static struct platform_device *devices[] __initdata = {
392 &stuart_device, 413 &stuart_device,
393 &pxaficp_device, 414 &pxaficp_device,
394 &i2c_device, 415 &i2c_device,
416#ifdef CONFIG_PXA27x
417 &i2c_power_device,
418#endif
395 &i2s_device, 419 &i2s_device,
396 &pxartc_device, 420 &pxartc_device,
397}; 421};
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 17f5f4439fe7..35156ca39df7 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -10,10 +10,21 @@ config MACH_REALVIEW_EB
10config REALVIEW_MPCORE 10config REALVIEW_MPCORE
11 bool "Support MPcore tile" 11 bool "Support MPcore tile"
12 depends on MACH_REALVIEW_EB 12 depends on MACH_REALVIEW_EB
13 select CACHE_L2X0
13 help 14 help
14 Enable support for the MPCore tile on the Realview platform. 15 Enable support for the MPCore tile on the Realview platform.
15 Since there are device address and interrupt differences, a 16 Since there are device address and interrupt differences, a
16 kernel built with this option enabled is not compatible with 17 kernel built with this option enabled is not compatible with
17 other tiles. 18 other tiles.
18 19
20config REALVIEW_MPCORE_REVB
21 bool "Support MPcore RevB tile"
22 depends on REALVIEW_MPCORE
23 default n
24 help
25 Enable support for the MPCore RevB tile on the Realview platform.
26 Since there are device address differences, a
27 kernel built with this option enabled is not compatible with
28 other tiles.
29
19endmenu 30endmenu
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index b8484e15dacb..fce3596f9950 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -52,13 +52,14 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
52 * core (e.g. timer irq), then they will not have been enabled 52 * core (e.g. timer irq), then they will not have been enabled
53 * for us: do so 53 * for us: do so
54 */ 54 */
55 gic_cpu_init(__io_address(REALVIEW_GIC_CPU_BASE)); 55 gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
56 56
57 /* 57 /*
58 * let the primary processor know we're out of the 58 * let the primary processor know we're out of the
59 * pen, then head off into the C entry point 59 * pen, then head off into the C entry point
60 */ 60 */
61 pen_release = -1; 61 pen_release = -1;
62 smp_wmb();
62 63
63 /* 64 /*
64 * Synchronise with the boot thread. 65 * Synchronise with the boot thread.
@@ -102,6 +103,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
102 103
103 timeout = jiffies + (1 * HZ); 104 timeout = jiffies + (1 * HZ);
104 while (time_before(jiffies, timeout)) { 105 while (time_before(jiffies, timeout)) {
106 smp_rmb();
105 if (pen_release == -1) 107 if (pen_release == -1)
106 break; 108 break;
107 109
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 9741b4d3c9cf..3dba666151db 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -31,6 +31,7 @@
31#include <asm/mach-types.h> 31#include <asm/mach-types.h>
32#include <asm/hardware/gic.h> 32#include <asm/hardware/gic.h>
33#include <asm/hardware/icst307.h> 33#include <asm/hardware/icst307.h>
34#include <asm/hardware/cache-l2x0.h>
34 35
35#include <asm/mach/arch.h> 36#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 37#include <asm/mach/map.h>
@@ -57,7 +58,26 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
57 .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE), 58 .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
58 .length = SZ_4K, 59 .length = SZ_4K,
59 .type = MT_DEVICE, 60 .type = MT_DEVICE,
61 },
62#ifdef CONFIG_REALVIEW_MPCORE
63 {
64 .virtual = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_GIC1_CPU_BASE),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
71 .length = SZ_4K,
72 .type = MT_DEVICE,
60 }, { 73 }, {
74 .virtual = IO_ADDRESS(REALVIEW_MPCORE_L220_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_MPCORE_L220_BASE),
76 .length = SZ_8K,
77 .type = MT_DEVICE,
78 },
79#endif
80 {
61 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), 81 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
62 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), 82 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
63 .length = SZ_4K, 83 .length = SZ_4K,
@@ -138,19 +158,29 @@ static void __init gic_init_irq(void)
138#ifdef CONFIG_REALVIEW_MPCORE 158#ifdef CONFIG_REALVIEW_MPCORE
139 unsigned int pldctrl; 159 unsigned int pldctrl;
140 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK)); 160 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
141 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + 0xd8); 161 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
142 pldctrl |= 0x00800000; /* New irq mode */ 162 pldctrl |= 0x00800000; /* New irq mode */
143 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + 0xd8); 163 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
144 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); 164 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
145#endif 165#endif
146 gic_dist_init(__io_address(REALVIEW_GIC_DIST_BASE)); 166 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
147 gic_cpu_init(__io_address(REALVIEW_GIC_CPU_BASE)); 167 gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
168#ifdef CONFIG_REALVIEW_MPCORE
169 gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
170 gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
171 gic_cascade_irq(1, IRQ_EB_IRQ1);
172#endif
148} 173}
149 174
150static void __init realview_eb_init(void) 175static void __init realview_eb_init(void)
151{ 176{
152 int i; 177 int i;
153 178
179#ifdef CONFIG_REALVIEW_MPCORE
180 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
181 * Bits: .... ...0 0111 1001 0000 .... .... .... */
182 l2x0_init(__io_address(REALVIEW_MPCORE_L220_BASE), 0x00790000, 0xfe000fff);
183#endif
154 clk_register(&realview_clcd_clk); 184 clk_register(&realview_clcd_clk);
155 185
156 platform_device_register(&realview_flash_device); 186 platform_device_register(&realview_flash_device);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index aade2f72c920..da8f043dc2cc 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -171,8 +171,8 @@ config CPU_ARM925T
171# ARM926T 171# ARM926T
172config CPU_ARM926T 172config CPU_ARM926T
173 bool "Support ARM926T processor" 173 bool "Support ARM926T processor"
174 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 174 depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263
175 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 175 default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263
176 select CPU_32v5 176 select CPU_32v5
177 select CPU_ABRT_EV5TJ 177 select CPU_ABRT_EV5TJ
178 select CPU_CACHE_VIVT 178 select CPU_CACHE_VIVT
@@ -609,3 +609,10 @@ config NEEDS_SYSCALL_FOR_CMPXCHG
609 Forget about fast user space cmpxchg support. 609 Forget about fast user space cmpxchg support.
610 It is just not possible. 610 It is just not possible.
611 611
612config OUTER_CACHE
613 bool
614 default n
615
616config CACHE_L2X0
617 bool
618 select OUTER_CACHE
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index d2f5672ecf62..2f8b95947774 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -66,3 +66,5 @@ obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o
66obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o 66obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o
67obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o 67obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o
68obj-$(CONFIG_CPU_V6) += proc-v6.o 68obj-$(CONFIG_CPU_V6) += proc-v6.o
69
70obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
new file mode 100644
index 000000000000..08a36f1b35d2
--- /dev/null
+++ b/arch/arm/mm/cache-l2x0.c
@@ -0,0 +1,104 @@
1/*
2 * arch/arm/mm/cache-l2x0.c - L210/L220 cache controller support
3 *
4 * Copyright (C) 2007 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#include <linux/init.h>
20
21#include <asm/cacheflush.h>
22#include <asm/io.h>
23#include <asm/hardware/cache-l2x0.h>
24
25#define CACHE_LINE_SIZE 32
26
27static void __iomem *l2x0_base;
28
29static inline void sync_writel(unsigned long val, unsigned long reg,
30 unsigned long complete_mask)
31{
32 writel(val, l2x0_base + reg);
33 /* wait for the operation to complete */
34 while (readl(l2x0_base + reg) & complete_mask)
35 ;
36}
37
38static inline void cache_sync(void)
39{
40 sync_writel(0, L2X0_CACHE_SYNC, 1);
41}
42
43static inline void l2x0_inv_all(void)
44{
45 /* invalidate all ways */
46 sync_writel(0xff, L2X0_INV_WAY, 0xff);
47 cache_sync();
48}
49
50static void l2x0_inv_range(unsigned long start, unsigned long end)
51{
52 unsigned long addr;
53
54 start &= ~(CACHE_LINE_SIZE - 1);
55 for (addr = start; addr < end; addr += CACHE_LINE_SIZE)
56 sync_writel(addr, L2X0_INV_LINE_PA, 1);
57 cache_sync();
58}
59
60static void l2x0_clean_range(unsigned long start, unsigned long end)
61{
62 unsigned long addr;
63
64 start &= ~(CACHE_LINE_SIZE - 1);
65 for (addr = start; addr < end; addr += CACHE_LINE_SIZE)
66 sync_writel(addr, L2X0_CLEAN_LINE_PA, 1);
67 cache_sync();
68}
69
70static void l2x0_flush_range(unsigned long start, unsigned long end)
71{
72 unsigned long addr;
73
74 start &= ~(CACHE_LINE_SIZE - 1);
75 for (addr = start; addr < end; addr += CACHE_LINE_SIZE)
76 sync_writel(addr, L2X0_CLEAN_INV_LINE_PA, 1);
77 cache_sync();
78}
79
80void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
81{
82 __u32 aux;
83
84 l2x0_base = base;
85
86 /* disable L2X0 */
87 writel(0, l2x0_base + L2X0_CTRL);
88
89 aux = readl(l2x0_base + L2X0_AUX_CTRL);
90 aux &= aux_mask;
91 aux |= aux_val;
92 writel(aux, l2x0_base + L2X0_AUX_CTRL);
93
94 l2x0_inv_all();
95
96 /* enable L2X0 */
97 writel(1, l2x0_base + L2X0_CTRL);
98
99 outer_cache.inv_range = l2x0_inv_range;
100 outer_cache.clean_range = l2x0_clean_range;
101 outer_cache.flush_range = l2x0_flush_range;
102
103 printk(KERN_INFO "L2X0 cache controller enabled\n");
104}
diff --git a/arch/arm/mm/consistent.c b/arch/arm/mm/consistent.c
index 6a9c362fef5e..1f9f94f9af4b 100644
--- a/arch/arm/mm/consistent.c
+++ b/arch/arm/mm/consistent.c
@@ -205,9 +205,10 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
205 * kernel direct-mapped region for device DMA. 205 * kernel direct-mapped region for device DMA.
206 */ 206 */
207 { 207 {
208 unsigned long kaddr = (unsigned long)page_address(page); 208 void *ptr = page_address(page);
209 memset(page_address(page), 0, size); 209 memset(ptr, 0, size);
210 dmac_flush_range(kaddr, kaddr + size); 210 dmac_flush_range(ptr, ptr + size);
211 outer_flush_range(__pa(ptr), __pa(ptr) + size);
211 } 212 }
212 213
213 /* 214 /*
@@ -480,20 +481,24 @@ core_initcall(consistent_init);
480 * platforms with CONFIG_DMABOUNCE. 481 * platforms with CONFIG_DMABOUNCE.
481 * Use the driver DMA support - see dma-mapping.h (dma_sync_*) 482 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
482 */ 483 */
483void consistent_sync(void *vaddr, size_t size, int direction) 484void consistent_sync(const void *start, size_t size, int direction)
484{ 485{
485 unsigned long start = (unsigned long)vaddr; 486 const void *end = start + size;
486 unsigned long end = start + size; 487
488 BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(end - 1));
487 489
488 switch (direction) { 490 switch (direction) {
489 case DMA_FROM_DEVICE: /* invalidate only */ 491 case DMA_FROM_DEVICE: /* invalidate only */
490 dmac_inv_range(start, end); 492 dmac_inv_range(start, end);
493 outer_inv_range(__pa(start), __pa(end));
491 break; 494 break;
492 case DMA_TO_DEVICE: /* writeback only */ 495 case DMA_TO_DEVICE: /* writeback only */
493 dmac_clean_range(start, end); 496 dmac_clean_range(start, end);
497 outer_clean_range(__pa(start), __pa(end));
494 break; 498 break;
495 case DMA_BIDIRECTIONAL: /* writeback and invalidate */ 499 case DMA_BIDIRECTIONAL: /* writeback and invalidate */
496 dmac_flush_range(start, end); 500 dmac_flush_range(start, end);
501 outer_flush_range(__pa(start), __pa(end));
497 break; 502 break;
498 default: 503 default:
499 BUG(); 504 BUG();
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 79e800202424..9da43a0fdcdf 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -19,7 +19,8 @@ unsigned int cpu_last_asid = { 1 << ASID_BITS };
19/* 19/*
20 * We fork()ed a process, and we need a new context for the child 20 * We fork()ed a process, and we need a new context for the child
21 * to run in. We reserve version 0 for initial tasks so we will 21 * to run in. We reserve version 0 for initial tasks so we will
22 * always allocate an ASID. 22 * always allocate an ASID. The ASID 0 is reserved for the TTBR
23 * register changing sequence.
23 */ 24 */
24void __init_new_context(struct task_struct *tsk, struct mm_struct *mm) 25void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
25{ 26{
@@ -38,8 +39,15 @@ void __new_context(struct mm_struct *mm)
38 * If we've used up all our ASIDs, we need 39 * If we've used up all our ASIDs, we need
39 * to start a new version and flush the TLB. 40 * to start a new version and flush the TLB.
40 */ 41 */
41 if ((asid & ~ASID_MASK) == 0) 42 if ((asid & ~ASID_MASK) == 0) {
43 asid = ++cpu_last_asid;
44 /* set the reserved ASID before flushing the TLB */
45 asm("mcr p15, 0, %0, c13, c0, 1 @ set reserved context ID\n"
46 :
47 : "r" (0));
48 isb();
42 flush_tlb_all(); 49 flush_tlb_all();
50 }
43 51
44 mm->context.id = asid; 52 mm->context.id = asid;
45} 53}
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index cf95c5d0ce4c..44558d5f9313 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -119,8 +119,6 @@ make_coherent(struct address_space *mapping, struct vm_area_struct *vma, unsigne
119 flush_cache_page(vma, addr, pfn); 119 flush_cache_page(vma, addr, pfn);
120} 120}
121 121
122void __flush_dcache_page(struct address_space *mapping, struct page *page);
123
124/* 122/*
125 * Take care of architecture specific things when placing a new PTE into 123 * Take care of architecture specific things when placing a new PTE into
126 * a page table, or changing an existing PTE. Basically, there are two 124 * a page table, or changing an existing PTE. Basically, there are two
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 655c8376f0b5..94fd4bf5cb9e 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -49,8 +49,10 @@ pmd_t *top_pmd;
49 49
50static unsigned int cachepolicy __initdata = CPOLICY_WRITEBACK; 50static unsigned int cachepolicy __initdata = CPOLICY_WRITEBACK;
51static unsigned int ecc_mask __initdata = 0; 51static unsigned int ecc_mask __initdata = 0;
52pgprot_t pgprot_user;
52pgprot_t pgprot_kernel; 53pgprot_t pgprot_kernel;
53 54
55EXPORT_SYMBOL(pgprot_user);
54EXPORT_SYMBOL(pgprot_kernel); 56EXPORT_SYMBOL(pgprot_kernel);
55 57
56struct cachepolicy { 58struct cachepolicy {
@@ -345,6 +347,7 @@ static void __init build_mem_type_table(void)
345 mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1); 347 mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1);
346 } 348 }
347 349
350 pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot);
348 pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | 351 pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG |
349 L_PTE_DIRTY | L_PTE_WRITE | 352 L_PTE_DIRTY | L_PTE_WRITE |
350 L_PTE_EXEC | kern_pgprot); 353 L_PTE_EXEC | kern_pgprot);
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 7b1843befb9c..eb42e5b94863 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -14,10 +14,13 @@
14#include <asm/assembler.h> 14#include <asm/assembler.h>
15#include <asm/asm-offsets.h> 15#include <asm/asm-offsets.h>
16#include <asm/elf.h> 16#include <asm/elf.h>
17#include <asm/hardware/arm_scu.h>
18#include <asm/pgtable-hwdef.h> 17#include <asm/pgtable-hwdef.h>
19#include <asm/pgtable.h> 18#include <asm/pgtable.h>
20 19
20#ifdef CONFIG_SMP
21#include <asm/hardware/arm_scu.h>
22#endif
23
21#include "proc-macros.S" 24#include "proc-macros.S"
22 25
23#define D_CACHE_LINE_SIZE 32 26#define D_CACHE_LINE_SIZE 32
@@ -30,6 +33,12 @@
30#define TTB_RGN_WT (2 << 3) 33#define TTB_RGN_WT (2 << 3)
31#define TTB_RGN_WB (3 << 3) 34#define TTB_RGN_WB (3 << 3)
32 35
36#ifndef CONFIG_SMP
37#define TTB_FLAGS TTB_RGN_WBWA
38#else
39#define TTB_FLAGS TTB_RGN_WBWA|TTB_S
40#endif
41
33ENTRY(cpu_v6_proc_init) 42ENTRY(cpu_v6_proc_init)
34 mov pc, lr 43 mov pc, lr
35 44
@@ -92,9 +101,7 @@ ENTRY(cpu_v6_switch_mm)
92#ifdef CONFIG_MMU 101#ifdef CONFIG_MMU
93 mov r2, #0 102 mov r2, #0
94 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id 103 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id
95#ifdef CONFIG_SMP 104 orr r0, r0, #TTB_FLAGS
96 orr r0, r0, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable
97#endif
98 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB 105 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
99 mcr p15, 0, r2, c7, c10, 4 @ drain write buffer 106 mcr p15, 0, r2, c7, c10, 4 @ drain write buffer
100 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 107 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
@@ -183,8 +190,7 @@ __v6_setup:
183 /* Set up the SCU on core 0 only */ 190 /* Set up the SCU on core 0 only */
184 mrc p15, 0, r0, c0, c0, 5 @ CPU core number 191 mrc p15, 0, r0, c0, c0, 5 @ CPU core number
185 ands r0, r0, #15 192 ands r0, r0, #15
186 moveq r0, #0x10000000 @ SCU_BASE 193 ldreq r0, =SCU_BASE
187 orreq r0, r0, #0x00100000
188 ldreq r5, [r0, #SCU_CTRL] 194 ldreq r5, [r0, #SCU_CTRL]
189 orreq r5, r5, #1 195 orreq r5, r5, #1
190 streq r5, [r0, #SCU_CTRL] 196 streq r5, [r0, #SCU_CTRL]
@@ -204,9 +210,7 @@ __v6_setup:
204#ifdef CONFIG_MMU 210#ifdef CONFIG_MMU
205 mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs 211 mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs
206 mcr p15, 0, r0, c2, c0, 2 @ TTB control register 212 mcr p15, 0, r0, c2, c0, 2 @ TTB control register
207#ifdef CONFIG_SMP 213 orr r4, r4, #TTB_FLAGS
208 orr r4, r4, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable
209#endif
210 mcr p15, 0, r4, c2, c0, 1 @ load TTB1 214 mcr p15, 0, r4, c2, c0, 1 @ load TTB1
211#endif /* CONFIG_MMU */ 215#endif /* CONFIG_MMU */
212 adr r5, v6_crval 216 adr r5, v6_crval
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 94a58455f346..d95921a2ab99 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -5,23 +5,23 @@
5 * Current Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> 5 * Current Maintainer: Lennert Buytenhek <buytenh@wantstofly.org>
6 * 6 *
7 * Copyright 2004 (C) Intel Corp. 7 * Copyright 2004 (C) Intel Corp.
8 * Copyright 2005 (c) MontaVista Software, Inc. 8 * Copyright 2005 (C) MontaVista Software, Inc.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 * MMU functions for the Intel XScale3 Core (XSC3). The XSC3 core is an 14 * MMU functions for the Intel XScale3 Core (XSC3). The XSC3 core is
15 * extension to Intel's original XScale core that adds the following 15 * an extension to Intel's original XScale core that adds the following
16 * features: 16 * features:
17 * 17 *
18 * - ARMv6 Supersections 18 * - ARMv6 Supersections
19 * - Low Locality Reference pages (replaces mini-cache) 19 * - Low Locality Reference pages (replaces mini-cache)
20 * - 36-bit addressing 20 * - 36-bit addressing
21 * - L2 cache 21 * - L2 cache
22 * - Cache-coherency if chipset supports it 22 * - Cache coherency if chipset supports it
23 * 23 *
24 * Based on orignal XScale code by Nicolas Pitre 24 * Based on original XScale code by Nicolas Pitre.
25 */ 25 */
26 26
27#include <linux/linkage.h> 27#include <linux/linkage.h>
@@ -42,12 +42,12 @@
42#define MAX_AREA_SIZE 32768 42#define MAX_AREA_SIZE 32768
43 43
44/* 44/*
45 * The cache line size of the I and D cache. 45 * The cache line size of the L1 I, L1 D and unified L2 cache.
46 */ 46 */
47#define CACHELINESIZE 32 47#define CACHELINESIZE 32
48 48
49/* 49/*
50 * The size of the data cache. 50 * The size of the L1 D cache.
51 */ 51 */
52#define CACHESIZE 32768 52#define CACHESIZE 32768
53 53
@@ -57,9 +57,9 @@
57#define L2_CACHE_ENABLE 1 57#define L2_CACHE_ENABLE 1
58 58
59/* 59/*
60 * This macro is used to wait for a CP15 write and is needed 60 * This macro is used to wait for a CP15 write and is needed when we
61 * when we have to ensure that the last operation to the co-pro 61 * have to ensure that the last operation to the coprocessor was
62 * was completed before continuing with operation. 62 * completed before continuing with operation.
63 */ 63 */
64 .macro cpwait_ret, lr, rd 64 .macro cpwait_ret, lr, rd
65 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15 65 mrc p15, 0, \rd, c2, c0, 0 @ arbitrary read of cp15
@@ -68,13 +68,13 @@
68 .endm 68 .endm
69 69
70/* 70/*
71 * This macro cleans & invalidates the entire xsc3 dcache by set & way. 71 * This macro cleans and invalidates the entire L1 D cache.
72 */ 72 */
73 73
74 .macro clean_d_cache rd, rs 74 .macro clean_d_cache rd, rs
75 mov \rd, #0x1f00 75 mov \rd, #0x1f00
76 orr \rd, \rd, #0x00e0 76 orr \rd, \rd, #0x00e0
771: mcr p15, 0, \rd, c7, c14, 2 @ clean/inv set/way 771: mcr p15, 0, \rd, c7, c14, 2 @ clean/invalidate L1 D line
78 adds \rd, \rd, #0x40000000 78 adds \rd, \rd, #0x40000000
79 bcc 1b 79 bcc 1b
80 subs \rd, \rd, #0x20 80 subs \rd, \rd, #0x20
@@ -119,15 +119,15 @@ ENTRY(cpu_xsc3_reset)
119 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE 119 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
120 msr cpsr_c, r1 @ reset CPSR 120 msr cpsr_c, r1 @ reset CPSR
121 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 121 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
122 bic r1, r1, #0x0086 @ ........B....CA.
123 bic r1, r1, #0x3900 @ ..VIZ..S........ 122 bic r1, r1, #0x3900 @ ..VIZ..S........
123 bic r1, r1, #0x0086 @ ........B....CA.
124 mcr p15, 0, r1, c1, c0, 0 @ ctrl register 124 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
125 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB 125 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
126 bic r1, r1, #0x0001 @ ...............M 126 bic r1, r1, #0x0001 @ ...............M
127 mcr p15, 0, r1, c1, c0, 0 @ ctrl register 127 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
128 @ CAUTION: MMU turned off from this point. We count on the pipeline 128 @ CAUTION: MMU turned off from this point. We count on the pipeline
129 @ already containing those two last instructions to survive. 129 @ already containing those two last instructions to survive.
130 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 130 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs
131 mov pc, r0 131 mov pc, r0
132 132
133/* 133/*
@@ -139,14 +139,12 @@ ENTRY(cpu_xsc3_reset)
139 * 139 *
140 * XScale supports clock switching, but using idle mode support 140 * XScale supports clock switching, but using idle mode support
141 * allows external hardware to react to system state changes. 141 * allows external hardware to react to system state changes.
142
143 MMG: Come back to this one.
144 */ 142 */
145 .align 5 143 .align 5
146 144
147ENTRY(cpu_xsc3_do_idle) 145ENTRY(cpu_xsc3_do_idle)
148 mov r0, #1 146 mov r0, #1
149 mcr p14, 0, r0, c7, c0, 0 @ Go to IDLE 147 mcr p14, 0, r0, c7, c0, 0 @ go to idle
150 mov pc, lr 148 mov pc, lr
151 149
152/* ================================= CACHE ================================ */ 150/* ================================= CACHE ================================ */
@@ -171,9 +169,9 @@ ENTRY(xsc3_flush_kern_cache_all)
171__flush_whole_cache: 169__flush_whole_cache:
172 clean_d_cache r0, r1 170 clean_d_cache r0, r1
173 tst r2, #VM_EXEC 171 tst r2, #VM_EXEC
174 mcrne p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB 172 mcrne p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
175 mcrne p15, 0, ip, c7, c10, 4 @ Drain Write Buffer 173 mcrne p15, 0, ip, c7, c10, 4 @ data write barrier
176 mcrne p15, 0, ip, c7, c5, 4 @ Prefetch Flush 174 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
177 mov pc, lr 175 mov pc, lr
178 176
179/* 177/*
@@ -194,21 +192,21 @@ ENTRY(xsc3_flush_user_cache_range)
194 bhs __flush_whole_cache 192 bhs __flush_whole_cache
195 193
1961: tst r2, #VM_EXEC 1941: tst r2, #VM_EXEC
197 mcrne p15, 0, r0, c7, c5, 1 @ Invalidate I cache line 195 mcrne p15, 0, r0, c7, c5, 1 @ invalidate L1 I line
198 mcr p15, 0, r0, c7, c14, 1 @ Clean/invalidate D cache line 196 mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
199 add r0, r0, #CACHELINESIZE 197 add r0, r0, #CACHELINESIZE
200 cmp r0, r1 198 cmp r0, r1
201 blo 1b 199 blo 1b
202 tst r2, #VM_EXEC 200 tst r2, #VM_EXEC
203 mcrne p15, 0, ip, c7, c5, 6 @ Invalidate BTB 201 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
204 mcrne p15, 0, ip, c7, c10, 4 @ Drain Write Buffer 202 mcrne p15, 0, ip, c7, c10, 4 @ data write barrier
205 mcrne p15, 0, ip, c7, c5, 4 @ Prefetch Flush 203 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
206 mov pc, lr 204 mov pc, lr
207 205
208/* 206/*
209 * coherent_kern_range(start, end) 207 * coherent_kern_range(start, end)
210 * 208 *
211 * Ensure coherency between the Icache and the Dcache in the 209 * Ensure coherency between the I cache and the D cache in the
212 * region described by start. If you have non-snooping 210 * region described by start. If you have non-snooping
213 * Harvard caches, you need to implement this function. 211 * Harvard caches, you need to implement this function.
214 * 212 *
@@ -222,34 +220,34 @@ ENTRY(xsc3_coherent_kern_range)
222/* FALLTHROUGH */ 220/* FALLTHROUGH */
223ENTRY(xsc3_coherent_user_range) 221ENTRY(xsc3_coherent_user_range)
224 bic r0, r0, #CACHELINESIZE - 1 222 bic r0, r0, #CACHELINESIZE - 1
2251: mcr p15, 0, r0, c7, c10, 1 @ clean D entry 2231: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
226 add r0, r0, #CACHELINESIZE 224 add r0, r0, #CACHELINESIZE
227 cmp r0, r1 225 cmp r0, r1
228 blo 1b 226 blo 1b
229 mov r0, #0 227 mov r0, #0
230 mcr p15, 0, r0, c7, c5, 0 @ Invalidate I cache & BTB 228 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
231 mcr p15, 0, r0, c7, c10, 4 @ Drain Write Buffer 229 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
232 mcr p15, 0, r0, c7, c5, 4 @ Prefetch Flush 230 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
233 mov pc, lr 231 mov pc, lr
234 232
235/* 233/*
236 * flush_kern_dcache_page(void *page) 234 * flush_kern_dcache_page(void *page)
237 * 235 *
238 * Ensure no D cache aliasing occurs, either with itself or 236 * Ensure no D cache aliasing occurs, either with itself or
239 * the I cache 237 * the I cache.
240 * 238 *
241 * - addr - page aligned address 239 * - addr - page aligned address
242 */ 240 */
243ENTRY(xsc3_flush_kern_dcache_page) 241ENTRY(xsc3_flush_kern_dcache_page)
244 add r1, r0, #PAGE_SZ 242 add r1, r0, #PAGE_SZ
2451: mcr p15, 0, r0, c7, c14, 1 @ Clean/Invalidate D Cache line 2431: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
246 add r0, r0, #CACHELINESIZE 244 add r0, r0, #CACHELINESIZE
247 cmp r0, r1 245 cmp r0, r1
248 blo 1b 246 blo 1b
249 mov r0, #0 247 mov r0, #0
250 mcr p15, 0, r0, c7, c5, 0 @ Invalidate I cache & BTB 248 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
251 mcr p15, 0, r0, c7, c10, 4 @ Drain Write Buffer 249 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
252 mcr p15, 0, r0, c7, c5, 4 @ Prefetch Flush 250 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
253 mov pc, lr 251 mov pc, lr
254 252
255/* 253/*
@@ -266,17 +264,17 @@ ENTRY(xsc3_flush_kern_dcache_page)
266ENTRY(xsc3_dma_inv_range) 264ENTRY(xsc3_dma_inv_range)
267 tst r0, #CACHELINESIZE - 1 265 tst r0, #CACHELINESIZE - 1
268 bic r0, r0, #CACHELINESIZE - 1 266 bic r0, r0, #CACHELINESIZE - 1
269 mcrne p15, 0, r0, c7, c10, 1 @ clean L1 D entry 267 mcrne p15, 0, r0, c7, c10, 1 @ clean L1 D line
270 mcrne p15, 1, r0, c7, c11, 1 @ clean L2 D entry 268 mcrne p15, 1, r0, c7, c11, 1 @ clean L2 line
271 tst r1, #CACHELINESIZE - 1 269 tst r1, #CACHELINESIZE - 1
272 mcrne p15, 0, r1, c7, c10, 1 @ clean L1 D entry 270 mcrne p15, 0, r1, c7, c10, 1 @ clean L1 D line
273 mcrne p15, 1, r1, c7, c11, 1 @ clean L2 D entry 271 mcrne p15, 1, r1, c7, c11, 1 @ clean L2 line
2741: mcr p15, 0, r0, c7, c6, 1 @ invalidate L1 D entry 2721: mcr p15, 0, r0, c7, c6, 1 @ invalidate L1 D line
275 mcr p15, 1, r0, c7, c7, 1 @ Invalidate L2 D cache line 273 mcr p15, 1, r0, c7, c7, 1 @ invalidate L2 line
276 add r0, r0, #CACHELINESIZE 274 add r0, r0, #CACHELINESIZE
277 cmp r0, r1 275 cmp r0, r1
278 blo 1b 276 blo 1b
279 mcr p15, 0, r0, c7, c10, 4 @ Drain Write Buffer 277 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
280 mov pc, lr 278 mov pc, lr
281 279
282/* 280/*
@@ -289,12 +287,12 @@ ENTRY(xsc3_dma_inv_range)
289 */ 287 */
290ENTRY(xsc3_dma_clean_range) 288ENTRY(xsc3_dma_clean_range)
291 bic r0, r0, #CACHELINESIZE - 1 289 bic r0, r0, #CACHELINESIZE - 1
2921: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D entry 2901: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
293 mcr p15, 1, r0, c7, c11, 1 @ clean L2 D entry 291 mcr p15, 1, r0, c7, c11, 1 @ clean L2 line
294 add r0, r0, #CACHELINESIZE 292 add r0, r0, #CACHELINESIZE
295 cmp r0, r1 293 cmp r0, r1
296 blo 1b 294 blo 1b
297 mcr p15, 0, r0, c7, c10, 4 @ Drain Write Buffer 295 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
298 mov pc, lr 296 mov pc, lr
299 297
300/* 298/*
@@ -307,13 +305,13 @@ ENTRY(xsc3_dma_clean_range)
307 */ 305 */
308ENTRY(xsc3_dma_flush_range) 306ENTRY(xsc3_dma_flush_range)
309 bic r0, r0, #CACHELINESIZE - 1 307 bic r0, r0, #CACHELINESIZE - 1
3101: mcr p15, 0, r0, c7, c14, 1 @ Clean/invalidate L1 D cache line 3081: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
311 mcr p15, 1, r0, c7, c11, 1 @ Clean L2 D cache line 309 mcr p15, 1, r0, c7, c11, 1 @ clean L2 line
312 mcr p15, 1, r0, c7, c7, 1 @ Invalidate L2 D cache line 310 mcr p15, 1, r0, c7, c7, 1 @ invalidate L2 line
313 add r0, r0, #CACHELINESIZE 311 add r0, r0, #CACHELINESIZE
314 cmp r0, r1 312 cmp r0, r1
315 blo 1b 313 blo 1b
316 mcr p15, 0, r0, c7, c10, 4 @ Drain Write Buffer 314 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
317 mov pc, lr 315 mov pc, lr
318 316
319ENTRY(xsc3_cache_fns) 317ENTRY(xsc3_cache_fns)
@@ -328,7 +326,7 @@ ENTRY(xsc3_cache_fns)
328 .long xsc3_dma_flush_range 326 .long xsc3_dma_flush_range
329 327
330ENTRY(cpu_xsc3_dcache_clean_area) 328ENTRY(cpu_xsc3_dcache_clean_area)
3311: mcr p15, 0, r0, c7, c10, 1 @ clean D entry 3291: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
332 add r0, r0, #CACHELINESIZE 330 add r0, r0, #CACHELINESIZE
333 subs r1, r1, #CACHELINESIZE 331 subs r1, r1, #CACHELINESIZE
334 bhi 1b 332 bhi 1b
@@ -346,14 +344,14 @@ ENTRY(cpu_xsc3_dcache_clean_area)
346 .align 5 344 .align 5
347ENTRY(cpu_xsc3_switch_mm) 345ENTRY(cpu_xsc3_switch_mm)
348 clean_d_cache r1, r2 346 clean_d_cache r1, r2
349 mcr p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB 347 mcr p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
350 mcr p15, 0, ip, c7, c10, 4 @ Drain Write Buffer 348 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
351 mcr p15, 0, ip, c7, c5, 4 @ Prefetch Flush 349 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
352#ifdef L2_CACHE_ENABLE 350#ifdef L2_CACHE_ENABLE
353 orr r0, r0, #0x18 @ cache the page table in L2 351 orr r0, r0, #0x18 @ cache the page table in L2
354#endif 352#endif
355 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 353 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
356 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 354 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs
357 cpwait_ret lr, ip 355 cpwait_ret lr, ip
358 356
359/* 357/*
@@ -366,34 +364,34 @@ ENTRY(cpu_xsc3_switch_mm)
366ENTRY(cpu_xsc3_set_pte_ext) 364ENTRY(cpu_xsc3_set_pte_ext)
367 str r1, [r0], #-2048 @ linux version 365 str r1, [r0], #-2048 @ linux version
368 366
369 bic r2, r1, #0xff0 @ Keep C, B bits 367 bic r2, r1, #0xff0 @ keep C, B bits
370 orr r2, r2, #PTE_TYPE_EXT @ extended page 368 orr r2, r2, #PTE_TYPE_EXT @ extended page
371 tst r1, #L_PTE_SHARED @ Shared? 369 tst r1, #L_PTE_SHARED @ shared?
372 orrne r2, r2, #0x200 370 orrne r2, r2, #0x200
373 371
374 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 372 eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
375 373
376 tst r3, #L_PTE_USER @ User? 374 tst r3, #L_PTE_USER @ user?
377 orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w 375 orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w
378 376
379 tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? 377 tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ write and dirty?
380 orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w 378 orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w
381 @ combined with user -> user r/w 379 @ combined with user -> user r/w
382 380
383#if L2_CACHE_ENABLE 381#if L2_CACHE_ENABLE
384 @ If its cacheable it needs to be in L2 also. 382 @ If it's cacheable, it needs to be in L2 also.
385 eor ip, r1, #L_PTE_CACHEABLE 383 eor ip, r1, #L_PTE_CACHEABLE
386 tst ip, #L_PTE_CACHEABLE 384 tst ip, #L_PTE_CACHEABLE
387 orreq r2, r2, #PTE_EXT_TEX(0x5) 385 orreq r2, r2, #PTE_EXT_TEX(0x5)
388#endif 386#endif
389 387
390 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? 388 tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ present and young?
391 movne r2, #0 @ no -> fault 389 movne r2, #0 @ no -> fault
392 390
393 str r2, [r0] @ hardware version 391 str r2, [r0] @ hardware version
394 mov ip, #0 392 mov ip, #0
395 mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line mcr 393 mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
396 mcr p15, 0, ip, c7, c10, 4 @ Drain Write Buffer 394 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
397 mov pc, lr 395 mov pc, lr
398 396
399 .ltorg 397 .ltorg
@@ -406,17 +404,18 @@ ENTRY(cpu_xsc3_set_pte_ext)
406__xsc3_setup: 404__xsc3_setup:
407 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE 405 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
408 msr cpsr_c, r0 406 msr cpsr_c, r0
409 mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB 407 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
410 mcr p15, 0, ip, c7, c10, 4 @ Drain Write Buffer 408 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
411 mcr p15, 0, ip, c7, c5, 4 @ Prefetch Flush 409 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
412 mcr p15, 0, ip, c8, c7, 0 @ invalidate I, D TLBs 410 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs
413#if L2_CACHE_ENABLE 411#if L2_CACHE_ENABLE
414 orr r4, r4, #0x18 @ cache the page table in L2 412 orr r4, r4, #0x18 @ cache the page table in L2
415#endif 413#endif
416 mcr p15, 0, r4, c2, c0, 0 @ load page table pointer 414 mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
417 mov r0, #1 @ Allow access to CP0 and CP13 415
418 orr r0, r0, #1 << 13 @ Its undefined whether this 416 mov r0, #0 @ don't allow CP access
419 mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes 417 mcr p15, 0, r0, c15, c1, 0 @ write CP access register
418
420 mrc p15, 0, r0, c1, c0, 1 @ get auxiliary control reg 419 mrc p15, 0, r0, c1, c0, 1 @ get auxiliary control reg
421 and r0, r0, #2 @ preserve bit P bit setting 420 and r0, r0, #2 @ preserve bit P bit setting
422#if L2_CACHE_ENABLE 421#if L2_CACHE_ENABLE
@@ -427,9 +426,9 @@ __xsc3_setup:
427 adr r5, xsc3_crval 426 adr r5, xsc3_crval
428 ldmia r5, {r5, r6} 427 ldmia r5, {r5, r6}
429 mrc p15, 0, r0, c1, c0, 0 @ get control register 428 mrc p15, 0, r0, c1, c0, 0 @ get control register
430 bic r0, r0, r5 @ .... .... .... ..A. 429 bic r0, r0, r5 @ ..V. ..R. .... ..A.
431 orr r0, r0, r6 @ .... .... .... .C.M 430 orr r0, r0, r6 @ ..VI Z..S .... .C.M (mmu)
432 orr r0, r0, #0x00000800 @ ..VI Z..S .... .... 431 @ ...I Z..S .... .... (uc)
433#if L2_CACHE_ENABLE 432#if L2_CACHE_ENABLE
434 orr r0, r0, #0x04000000 @ L2 enable 433 orr r0, r0, #0x04000000 @ L2 enable
435#endif 434#endif
@@ -439,7 +438,7 @@ __xsc3_setup:
439 438
440 .type xsc3_crval, #object 439 .type xsc3_crval, #object
441xsc3_crval: 440xsc3_crval:
442 crval clear=0x04003b02, mmuset=0x00003105, ucset=0x00001100 441 crval clear=0x04002202, mmuset=0x00003905, ucset=0x00001900
443 442
444 __INITDATA 443 __INITDATA
445 444
@@ -474,7 +473,7 @@ cpu_elf_name:
474 473
475 .type cpu_xsc3_name, #object 474 .type cpu_xsc3_name, #object
476cpu_xsc3_name: 475cpu_xsc3_name:
477 .asciz "XScale-Core3" 476 .asciz "XScale-V3 based processor"
478 .size cpu_xsc3_name, . - cpu_xsc3_name 477 .size cpu_xsc3_name, . - cpu_xsc3_name
479 478
480 .align 479 .align
@@ -490,7 +489,7 @@ __xsc3_proc_info:
490 PMD_SECT_CACHEABLE | \ 489 PMD_SECT_CACHEABLE | \
491 PMD_SECT_AP_WRITE | \ 490 PMD_SECT_AP_WRITE | \
492 PMD_SECT_AP_READ 491 PMD_SECT_AP_READ
493 .long PMD_TYPE_SECT | \ 492 .long PMD_TYPE_SECT | \
494 PMD_SECT_AP_WRITE | \ 493 PMD_SECT_AP_WRITE | \
495 PMD_SECT_AP_READ 494 PMD_SECT_AP_READ
496 b __xsc3_setup 495 b __xsc3_setup
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S
index fd6adde39091..20f84bbaa9bb 100644
--- a/arch/arm/mm/tlb-v6.S
+++ b/arch/arm/mm/tlb-v6.S
@@ -53,6 +53,8 @@ ENTRY(v6wbi_flush_user_tlb_range)
53 add r0, r0, #PAGE_SZ 53 add r0, r0, #PAGE_SZ
54 cmp r0, r1 54 cmp r0, r1
55 blo 1b 55 blo 1b
56 mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB
57 mcr p15, 0, ip, c7, c10, 4 @ data synchronization barrier
56 mov pc, lr 58 mov pc, lr
57 59
58/* 60/*
@@ -80,7 +82,9 @@ ENTRY(v6wbi_flush_kern_tlb_range)
80 add r0, r0, #PAGE_SZ 82 add r0, r0, #PAGE_SZ
81 cmp r0, r1 83 cmp r0, r1
82 blo 1b 84 blo 1b
85 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
83 mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier 86 mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier
87 mcr p15, 0, r2, c7, c5, 4 @ prefetch flush
84 mov pc, lr 88 mov pc, lr
85 89
86 .section ".text.init", #alloc, #execinstr 90 .section ".text.init", #alloc, #execinstr
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index 3d0d1097389f..ecbd4a21e432 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2006 Atmel Corporation 4 * Copyright (C) 2006 Atmel Corporation
5 * 5 *
6 * Based on arch/arm/mach-at91rm9200/clock.c 6 * Based on arch/arm/mach-at91/clock.c
7 * Copyright (C) 2005 David Brownell 7 * Copyright (C) 2005 David Brownell
8 * Copyright (C) 2005 Ivan Kokshaysky 8 * Copyright (C) 2005 Ivan Kokshaysky
9 * 9 *
diff --git a/arch/avr32/mach-at32ap/clock.h b/arch/avr32/mach-at32ap/clock.h
index f953f044ba4d..bb8e1f295835 100644
--- a/arch/avr32/mach-at32ap/clock.h
+++ b/arch/avr32/mach-at32ap/clock.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Copyright (C) 2006 Atmel Corporation 4 * Copyright (C) 2006 Atmel Corporation
5 * 5 *
6 * Based on arch/arm/mach-at91rm9200/clock.c 6 * Based on arch/arm/mach-at91/clock.c
7 * Copyright (C) 2005 David Brownell 7 * Copyright (C) 2005 David Brownell
8 * Copyright (C) 2005 Ivan Kokshaysky 8 * Copyright (C) 2005 Ivan Kokshaysky
9 * 9 *
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 08:52:55 -0500