9 files changed, 32 insertions, 30 deletions

diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index bfe68ec4e1a6..d8c1af025931 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -53,7 +53,7 @@ davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
 
         gc = irq_alloc_generic_chip("AINTC", 1, irq_start, base, handle_edge_irq);
         ct = gc->chip_types;
-        ct->chip.irq_ack = irq_gc_ack;
+        ct->chip.irq_ack = irq_gc_ack_set_bit;
         ct->chip.irq_mask = irq_gc_mask_clr_bit;
         ct->chip.irq_unmask = irq_gc_mask_set_bit;
 
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 72b4e7631583..ab9f999106c7 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -79,7 +79,7 @@ static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
 static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
 static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
 
-static APMU_CLK(nand, NAND, 0x01db, 208000000);
+static APMU_CLK(nand, NAND, 0x19b, 156000000);
 static APMU_CLK(lcd, LCD, 0x7f, 312000000);
 
 /* device and clock bindings */
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 8f92ccd26edf..1464607aa60d 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -110,7 +110,7 @@ static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
 static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
 static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
 
-static APMU_CLK(nand, NAND, 0x01db, 208000000);
+static APMU_CLK(nand, NAND, 0x19b, 156000000);
 static APMU_CLK(u2o, USB, 0x1b, 480000000);
 
 /* device and clock bindings */
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 87ae3129f4f7..b27544bcafcb 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -347,9 +347,9 @@ static int pxa2xx_mfp_suspend(void)
                 if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
                     (GPDR(i) & GPIO_bit(i))) {
                         if (GPLR(i) & GPIO_bit(i))
-                                PGSR(i) |= GPIO_bit(i);
+                                PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
                         else
-                                PGSR(i) &= ~GPIO_bit(i);
+                                PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
                 }
         }
 
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index d130f77b6d11..2f37d43f51b6 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -573,10 +573,10 @@ static struct pxafb_mode_info sharp_lq043t3dx02_mode = {
         .xres           = 480,
         .yres           = 272,
         .bpp            = 16,
-        .hsync_len      = 4,
+        .hsync_len      = 41,
         .left_margin    = 2,
         .right_margin   = 1,
-        .vsync_len      = 1,
+        .vsync_len      = 10,
         .upper_margin   = 3,
         .lower_margin   = 1,
         .sync           = 0,
@@ -596,29 +596,31 @@ static void __init raumfeld_lcd_init(void)
 {
         int ret;
 
-        pxa_set_fb_info(NULL, &raumfeld_sharp_lcd_info);
-
-        /* Earlier devices had the backlight regulator controlled
-         * via PWM, later versions use another controller for that */
-        if ((system_rev & 0xff) < 2) {
-                mfp_cfg_t raumfeld_pwm_pin_config = GPIO17_PWM0_OUT;
-                pxa3xx_mfp_config(&raumfeld_pwm_pin_config, 1);
-                platform_device_register(&raumfeld_pwm_backlight_device);
-        } else
-                platform_device_register(&raumfeld_lt3593_device);
-
         ret = gpio_request(GPIO_TFT_VA_EN, "display VA enable");
         if (ret < 0)
                 pr_warning("Unable to request GPIO_TFT_VA_EN\n");
         else
                 gpio_direction_output(GPIO_TFT_VA_EN, 1);
 
+        msleep(100);
+
         ret = gpio_request(GPIO_DISPLAY_ENABLE, "display enable");
         if (ret < 0)
                 pr_warning("Unable to request GPIO_DISPLAY_ENABLE\n");
         else
                 gpio_direction_output(GPIO_DISPLAY_ENABLE, 1);
 
+        /* Hardware revision 2 has the backlight regulator controlled
+         * by an LT3593, earlier and later devices use PWM for that. */
+        if ((system_rev & 0xff) == 2) {
+                platform_device_register(&raumfeld_lt3593_device);
+        } else {
+                mfp_cfg_t raumfeld_pwm_pin_config = GPIO17_PWM0_OUT;
+                pxa3xx_mfp_config(&raumfeld_pwm_pin_config, 1);
+                platform_device_register(&raumfeld_pwm_backlight_device);
+        }
+
+        pxa_set_fb_info(NULL, &raumfeld_sharp_lcd_info);
         platform_device_register(&pxa3xx_device_gcu);
 }
 
@@ -657,10 +659,10 @@ static struct lis3lv02d_platform_data lis3_pdata = {
 
 #define SPI_AK4104      \
 {                       \
-        .modalias       = "ak4104",     \
-        .max_speed_hz   = 10000,        \
-        .bus_num        = 0,            \
-        .chip_select    = 0,            \
+        .modalias       = "ak4104-codec",       \
+        .max_speed_hz   = 10000,                \
+        .bus_num        = 0,                    \
+        .chip_select    = 0,                    \
         .controller_data = (void *) GPIO_SPDIF_CS,      \
 }
 
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index 5b4fffab1eb4..41ab97ebe4cf 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -432,7 +432,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
         ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF;
         ct->regs.ack = GPIO_EDGE_CAUSE_OFF;
         ct->type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
-        ct->chip.irq_ack = irq_gc_ack;
+        ct->chip.irq_ack = irq_gc_ack_clr_bit;
         ct->chip.irq_mask = irq_gc_mask_clr_bit;
         ct->chip.irq_unmask = irq_gc_mask_set_bit;
         ct->chip.irq_set_type = gpio_irq_set_type;
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index 48ebb9479b61..a11dc3670505 100644
--- a/arch/arm/plat-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -50,7 +50,7 @@ static inline void __iomem *gpio_chip_base(struct gpio_chip *c)
         return container_of(c, struct pxa_gpio_chip, chip)->regbase;
 }
 
-static inline struct pxa_gpio_chip *gpio_to_chip(unsigned gpio)
+static inline struct pxa_gpio_chip *gpio_to_pxachip(unsigned gpio)
 {
         return &pxa_gpio_chips[gpio_to_bank(gpio)];
 }
@@ -161,7 +161,7 @@ static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type)
         int gpio = irq_to_gpio(d->irq);
         unsigned long gpdr, mask = GPIO_bit(gpio);
 
-        c = gpio_to_chip(gpio);
+        c = gpio_to_pxachip(gpio);
 
         if (type == IRQ_TYPE_PROBE) {
                 /* Don't mess with enabled GPIOs using preconfigured edges or
@@ -230,7 +230,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
 static void pxa_ack_muxed_gpio(struct irq_data *d)
 {
         int gpio = irq_to_gpio(d->irq);
-        struct pxa_gpio_chip *c = gpio_to_chip(gpio);
+        struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
         __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET);
 }
@@ -238,7 +238,7 @@ static void pxa_ack_muxed_gpio(struct irq_data *d)
 static void pxa_mask_muxed_gpio(struct irq_data *d)
 {
         int gpio = irq_to_gpio(d->irq);
-        struct pxa_gpio_chip *c = gpio_to_chip(gpio);
+        struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
         uint32_t grer, gfer;
 
         c->irq_mask &= ~GPIO_bit(gpio);
@@ -252,7 +252,7 @@ static void pxa_mask_muxed_gpio(struct irq_data *d)
 static void pxa_unmask_muxed_gpio(struct irq_data *d)
 {
         int gpio = irq_to_gpio(d->irq);
-        struct pxa_gpio_chip *c = gpio_to_chip(gpio);
+        struct pxa_gpio_chip *c = gpio_to_pxachip(gpio);
 
         c->irq_mask |= GPIO_bit(gpio);
         update_edge_detect(c);
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index 135abda31c9a..327ab9f662e8 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -152,7 +152,7 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
         if (!gc)
                 return -ENOMEM;
         ct = gc->chip_types;
-        ct->chip.irq_ack = irq_gc_ack;
+        ct->chip.irq_ack = irq_gc_ack_set_bit;
         ct->chip.irq_mask = irq_gc_mask_set_bit;
         ct->chip.irq_unmask = irq_gc_mask_clr_bit;
         ct->chip.irq_set_type = s5p_gpioint_set_type,
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
index 32582c0958e3..0e46588d847b 100644
--- a/arch/arm/plat-samsung/irq-uart.c
+++ b/arch/arm/plat-samsung/irq-uart.c
@@ -55,7 +55,7 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
         gc = irq_alloc_generic_chip("s3c-uart", 1, uirq->base_irq, reg_base,
                                     handle_level_irq);
         ct = gc->chip_types;
-        ct->chip.irq_ack = irq_gc_ack;
+        ct->chip.irq_ack = irq_gc_ack_set_bit;
         ct->chip.irq_mask = irq_gc_mask_set_bit;
         ct->chip.irq_unmask = irq_gc_mask_clr_bit;
         ct->regs.ack = S3C64XX_UINTP;