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-rw-r--r--arch/mips/emma/markeins/irq.c8
-rw-r--r--arch/mips/include/asm/emma/emma2rh.h4
2 files changed, 5 insertions, 7 deletions
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 9504b7ee0b7c..1d1c806056c5 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -301,7 +301,7 @@ void __init arch_init_irq(void)
301 /* setup cascade interrupts */ 301 /* setup cascade interrupts */
302 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); 302 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
303 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade); 303 setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
304 setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade); 304 setup_irq(MIPS_CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
305} 305}
306 306
307asmlinkage void plat_irq_dispatch(void) 307asmlinkage void plat_irq_dispatch(void)
@@ -309,13 +309,13 @@ asmlinkage void plat_irq_dispatch(void)
309 unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; 309 unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
310 310
311 if (pending & STATUSF_IP7) 311 if (pending & STATUSF_IP7)
312 do_IRQ(CPU_IRQ_BASE + 7); 312 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
313 else if (pending & STATUSF_IP2) 313 else if (pending & STATUSF_IP2)
314 emma2rh_irq_dispatch(); 314 emma2rh_irq_dispatch();
315 else if (pending & STATUSF_IP1) 315 else if (pending & STATUSF_IP1)
316 do_IRQ(CPU_IRQ_BASE + 1); 316 do_IRQ(MIPS_CPU_IRQ_BASE + 1);
317 else if (pending & STATUSF_IP0) 317 else if (pending & STATUSF_IP0)
318 do_IRQ(CPU_IRQ_BASE + 0); 318 do_IRQ(MIPS_CPU_IRQ_BASE + 0);
319 else 319 else
320 spurious_interrupt(); 320 spurious_interrupt();
321} 321}
diff --git a/arch/mips/include/asm/emma/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h
index 2afb2fe11b30..fcc0064d6a86 100644
--- a/arch/mips/include/asm/emma/emma2rh.h
+++ b/arch/mips/include/asm/emma/emma2rh.h
@@ -99,12 +99,10 @@
99#define EMMA2RH_PCI_CONFIG_BASE EMMA2RH_PCI_IO_BASE 99#define EMMA2RH_PCI_CONFIG_BASE EMMA2RH_PCI_IO_BASE
100#define EMMA2RH_PCI_CONFIG_SIZE EMMA2RH_PCI_IO_SIZE 100#define EMMA2RH_PCI_CONFIG_SIZE EMMA2RH_PCI_IO_SIZE
101 101
102#define NUM_CPU_IRQ 8
103#define NUM_EMMA2RH_IRQ 96 102#define NUM_EMMA2RH_IRQ 96
104 103
105#define CPU_EMMA2RH_CASCADE 2 104#define CPU_EMMA2RH_CASCADE 2
106#define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE 105#define EMMA2RH_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
107#define EMMA2RH_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ)
108 106
109/* 107/*
110 * emma2rh irq defs 108 * emma2rh irq defs