450 files changed, 16405 insertions, 5335 deletions

diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index 62b363584b2b..610dff44d94b 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -256,5 +256,5 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 #define smp_mb__before_atomic_inc()     smp_mb()
 #define smp_mb__after_atomic_inc()      smp_mb()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* _ALPHA_ATOMIC_H */
diff --git a/arch/alpha/include/asm/bitsperlong.h b/arch/alpha/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..ad57f7868203
--- /dev/null
+++ b/arch/alpha/include/asm/bitsperlong.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_ALPHA_BITSPERLONG_H
+#define __ASM_ALPHA_BITSPERLONG_H
+
+#define __BITS_PER_LONG 64
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* __ASM_ALPHA_BITSPERLONG_H */
diff --git a/arch/alpha/include/asm/page.h b/arch/alpha/include/asm/page.h
index 0995f9d13417..07af062544fb 100644
--- a/arch/alpha/include/asm/page.h
+++ b/arch/alpha/include/asm/page.h
@@ -93,6 +93,6 @@ typedef struct page *pgtable_t;
                                          VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _ALPHA_PAGE_H */
diff --git a/arch/alpha/include/asm/signal.h b/arch/alpha/include/asm/signal.h
index 13c2305d35ef..a9388300abb1 100644
--- a/arch/alpha/include/asm/signal.h
+++ b/arch/alpha/include/asm/signal.h
@@ -111,7 +111,7 @@ typedef unsigned long sigset_t;
 #define SIG_UNBLOCK        2    /* for unblocking signals */
 #define SIG_SETMASK        3    /* for setting the signal mask */
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct osf_sigaction {
diff --git a/arch/alpha/include/asm/suspend.h b/arch/alpha/include/asm/suspend.h
deleted file mode 100644
index c7042d575851..000000000000
--- a/arch/alpha/include/asm/suspend.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ALPHA_SUSPEND_H
-#define __ALPHA_SUSPEND_H
-
-/* Dummy include. */
-
-#endif  /* __ALPHA_SUSPEND_H */
diff --git a/arch/alpha/include/asm/types.h b/arch/alpha/include/asm/types.h
index f072f344497e..bd621ecd1eb3 100644
--- a/arch/alpha/include/asm/types.h
+++ b/arch/alpha/include/asm/types.h
@@ -25,9 +25,6 @@ typedef unsigned int umode_t;
  * These aren't exported outside the kernel to avoid name space clashes
  */
 #ifdef __KERNEL__
-
-#define BITS_PER_LONG 64
-
 #ifndef __ASSEMBLY__
 
 typedef u64 dma_addr_t;
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 42ee05981e71..9a3334ae282e 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -371,8 +371,6 @@ SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, char __user *, path,
         int retval = -EINVAL;
         char *name;
 
-        lock_kernel();
-
         name = getname(path);
         retval = PTR_ERR(name);
         if (IS_ERR(name))
@@ -392,7 +390,6 @@ SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, char __user *, path,
         }
         putname(name);
  out:
-        unlock_kernel();
         return retval;
 }
 
diff --git a/arch/alpha/mm/extable.c b/arch/alpha/mm/extable.c
index 62dc379d301a..813c9b63c0e1 100644
--- a/arch/alpha/mm/extable.c
+++ b/arch/alpha/mm/extable.c
@@ -48,6 +48,27 @@ void sort_extable(struct exception_table_entry *start,
              cmp_ex, swap_ex);
 }
 
+#ifdef CONFIG_MODULES
+/*
+ * Any entry referring to the module init will be at the beginning or
+ * the end.
+ */
+void trim_init_extable(struct module *m)
+{
+        /*trim the beginning*/
+        while (m->num_exentries &&
+               within_module_init(ex_to_addr(&m->extable[0]), m)) {
+                m->extable++;
+                m->num_exentries--;
+        }
+        /*trim the end*/
+        while (m->num_exentries &&
+               within_module_init(ex_to_addr(&m->extable[m->num_exentries-1]),
+                                  m))
+                m->num_exentries--;
+}
+#endif /* CONFIG_MODULES */
+
 const struct exception_table_entry *
 search_extable(const struct exception_table_entry *first,
                const struct exception_table_entry *last,
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 16b52f397983..9e07fe507029 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -249,6 +249,6 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 #define smp_mb__before_atomic_inc()     smp_mb()
 #define smp_mb__after_atomic_inc()      smp_mb()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif
 #endif
diff --git a/arch/arm/include/asm/bitsperlong.h b/arch/arm/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/arm/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/arm/include/asm/mman.h b/arch/arm/include/asm/mman.h
index 54570d2e95b7..fc26976d8e3a 100644
--- a/arch/arm/include/asm/mman.h
+++ b/arch/arm/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __ARM_MMAN_H__
 #define __ARM_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index 7b522770f29d..be962c1349c4 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -202,6 +202,6 @@ typedef struct page *pgtable_t;
         (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
          VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif
diff --git a/arch/arm/include/asm/signal.h b/arch/arm/include/asm/signal.h
index d0fb487aba4f..43ba0fb1c8ad 100644
--- a/arch/arm/include/asm/signal.h
+++ b/arch/arm/include/asm/signal.h
@@ -111,7 +111,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/arm/include/asm/suspend.h b/arch/arm/include/asm/suspend.h
deleted file mode 100644
index cf0d0bdee74d..000000000000
--- a/arch/arm/include/asm/suspend.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef _ASMARM_SUSPEND_H
-#define _ASMARM_SUSPEND_H
-
-#endif
diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig
index b3f99477bbeb..be27a0218ab4 100644
--- a/arch/avr32/boards/atngw100/Kconfig
+++ b/arch/avr32/boards/atngw100/Kconfig
@@ -2,8 +2,15 @@
 
 if BOARD_ATNGW100
 
+choice
+        prompt "Select an NGW100 add-on board to support"
+        default BOARD_ATNGW100_ADDON_NONE
+
+config BOARD_ATNGW100_ADDON_NONE
+        bool "None"
+
 config BOARD_ATNGW100_EVKLCD10X
-        bool "Add support for EVKLCD10X addon board"
+        bool "EVKLCD10X addon board"
         help
           This enables support for the EVKLCD100 (QVGA) or EVKLCD101 (VGA)
           addon board for the NGW100. By enabling this the LCD controller and
@@ -14,7 +21,19 @@ config BOARD_ATNGW100_EVKLCD10X
           The MCI pins can be reenabled by editing the "add device function" but
           this may break the setup for other displays that use these pins.
 
-          Choose 'Y' here if you have a EVKLCD100/101 connected to the NGW100.
+config BOARD_ATNGW100_MRMT
+        bool "Mediama RMT1/2 add-on board"
+        help
+          This enables support for the Mediama RMT1 or RMT2 board.
+          RMT provides LCD support, AC97 codec and other
+          optional peripherals to the Atmel NGW100.
+
+          This choice disables the detect pin and the write-protect pin for the
+          MCI platform device, since it conflicts with the LCD platform device.
+          The MCI pins can be reenabled by editing the "add device function" but
+          this may break the setup for other displays that use these pins.
+
+endchoice
 
 choice
         prompt "LCD panel resolution on EVKLCD10X"
@@ -32,4 +51,8 @@ config BOARD_ATNGW100_EVKLCD10X_POW_QVGA
 
 endchoice
 
+if BOARD_ATNGW100_MRMT
+source  "arch/avr32/boards/atngw100/Kconfig_mrmt"
+endif
+
 endif   # BOARD_ATNGW100
diff --git a/arch/avr32/boards/atngw100/Kconfig_mrmt b/arch/avr32/boards/atngw100/Kconfig_mrmt
new file mode 100644
index 000000000000..9a199a207f3c
--- /dev/null
+++ b/arch/avr32/boards/atngw100/Kconfig_mrmt
@@ -0,0 +1,80 @@
+# RMT for NGW100 customization
+
+choice
+        prompt "RMT Version"
+        help
+          Select the RMTx board version.
+
+config BOARD_MRMT_REV1
+        bool "RMT1"
+config BOARD_MRMT_REV2
+        bool "RMT2"
+
+endchoice
+
+config BOARD_MRMT_AC97
+        bool "Enable AC97 CODEC"
+        help
+          Enable the UCB1400 AC97 CODEC driver.
+
+choice
+        prompt "Touchscreen Driver"
+        default BOARD_MRMT_ADS7846_TS
+
+config BOARD_MRMT_UCB1400_TS
+        bool "Use UCB1400 Touchscreen"
+
+config BOARD_MRMT_ADS7846_TS
+        bool "Use ADS7846 Touchscreen"
+
+endchoice
+
+choice
+        prompt "RMTx LCD Selection"
+        default BOARD_MRMT_LCD_DISABLE
+
+config BOARD_MRMT_LCD_DISABLE
+        bool "LCD Disabled"
+
+config BOARD_MRMT_LCD_LQ043T3DX0X
+        bool "Sharp LQ043T3DX0x or compatible"
+        help
+          If using RMT2, be sure to load the resistor pack selectors accordingly
+
+if BOARD_MRMT_REV2
+config BOARD_MRMT_LCD_KWH043GM08
+        bool "Formike KWH043GM08 or compatible"
+        help
+          Be sure to load the RMT2 resistor pack selectors accordingly
+endif
+
+endchoice
+
+if !BOARD_MRMT_LCD_DISABLE
+config BOARD_MRMT_BL_PWM
+        bool "Use PWM control for LCD Backlight"
+        help
+                Use PWM driver for controlling LCD Backlight.
+                Otherwise, LCD Backlight is always on.
+endif
+
+config BOARD_MRMT_RTC_I2C
+        bool "Use External RTC on I2C Bus"
+        help
+                RMT1 has an optional RTC device on the I2C bus.
+                It is a SII S35390A.  Be sure to select the
+                matching RTC driver.
+
+choice
+        prompt "Wireless Module on ttyS2"
+        default BOARD_MRMT_WIRELESS_ZB
+
+config BOARD_MRMT_WIRELESS_ZB
+        bool "Use ZigBee/802.15.4 Module"
+
+config BOARD_MRMT_WIRELESS_BT
+        bool "Use Bluetooth (HCI) Module"
+
+config BOARD_MRMT_WIRELESS_NONE
+        bool "Not Installed"
+endchoice
diff --git a/arch/avr32/boards/atngw100/Makefile b/arch/avr32/boards/atngw100/Makefile
index 6376f5322e4d..f4ebe42a8254 100644
--- a/arch/avr32/boards/atngw100/Makefile
+++ b/arch/avr32/boards/atngw100/Makefile
@@ -1,2 +1,3 @@
 obj-y                                   += setup.o flash.o
 obj-$(CONFIG_BOARD_ATNGW100_EVKLCD10X)  += evklcd10x.o
+obj-$(CONFIG_BOARD_ATNGW100_MRMT)       += mrmt.o
diff --git a/arch/avr32/boards/atngw100/mrmt.c b/arch/avr32/boards/atngw100/mrmt.c
new file mode 100644
index 000000000000..bf78e516a85f
--- /dev/null
+++ b/arch/avr32/boards/atngw100/mrmt.c
@@ -0,0 +1,373 @@
+/*
+ * Board-specific setup code for Remote Media Terminal 1 (RMT1)
+ * add-on board for the ATNGW100 Network Gateway
+ *
+ * Copyright (C) 2008 Mediama Technologies
+ * Based on ATNGW100 Network Gateway (Copyright (C) Atmel)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/linkage.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <linux/fb.h>
+#include <linux/leds.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <linux/atmel_serial.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/ads7846.h>
+
+#include <video/atmel_lcdc.h>
+#include <sound/atmel-ac97c.h>
+
+#include <asm/delay.h>
+#include <asm/io.h>
+#include <asm/setup.h>
+
+#include <mach/at32ap700x.h>
+#include <mach/board.h>
+#include <mach/init.h>
+#include <mach/portmux.h>
+
+/* Define board-specifoic GPIO assignments */
+#define PIN_LCD_BL      GPIO_PIN_PA(28)
+#define PWM_CH_BL       0       /* Must match with GPIO pin definition */
+#define PIN_LCD_DISP    GPIO_PIN_PA(31)
+#define PIN_AC97_RST_N  GPIO_PIN_PA(30)
+#define PB_EXTINT_BASE  25
+#define TS_IRQ          0
+#define PIN_TS_EXTINT   GPIO_PIN_PB(PB_EXTINT_BASE+TS_IRQ)
+#define PIN_PB_LEFT     GPIO_PIN_PB(11)
+#define PIN_PB_RIGHT    GPIO_PIN_PB(12)
+#define PIN_PWR_SW_N    GPIO_PIN_PB(14)
+#define PIN_PWR_ON      GPIO_PIN_PB(13)
+#define PIN_ZB_RST_N    GPIO_PIN_PA(21)
+#define PIN_BT_RST      GPIO_PIN_PA(22)
+#define PIN_LED_SYS     GPIO_PIN_PA(16)
+#define PIN_LED_A       GPIO_PIN_PA(19)
+#define PIN_LED_B       GPIO_PIN_PE(19)
+
+#ifdef CONFIG_BOARD_MRMT_LCD_LQ043T3DX0X
+/* Sharp LQ043T3DX0x (or compatible) panel */
+static struct fb_videomode __initdata lcd_fb_modes[] = {
+        {
+                .name           = "480x272 @ 59.94Hz",
+                .refresh        = 59.94,
+                .xres           = 480,          .yres           = 272,
+                .pixclock       = KHZ2PICOS(9000),
+
+                .left_margin    = 2,            .right_margin   = 2,
+                .upper_margin   = 3,            .lower_margin   = 9,
+                .hsync_len      = 41,           .vsync_len      = 1,
+
+                .sync           = 0,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+};
+
+static struct fb_monspecs __initdata lcd_fb_default_monspecs = {
+        .manufacturer           = "SHA",
+        .monitor                = "LQ043T3DX02",
+        .modedb                 = lcd_fb_modes,
+        .modedb_len             = ARRAY_SIZE(lcd_fb_modes),
+        .hfmin                  = 14915,
+        .hfmax                  = 17638,
+        .vfmin                  = 53,
+        .vfmax                  = 61,
+        .dclkmax                = 9260000,
+};
+
+static struct atmel_lcdfb_info __initdata rmt_lcdc_data = {
+        .default_bpp            = 24,
+        .default_dmacon         = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
+        .default_lcdcon2        = (ATMEL_LCDC_DISTYPE_TFT
+                                   | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
+                                   | ATMEL_LCDC_INVCLK_NORMAL
+                                   | ATMEL_LCDC_MEMOR_BIG),
+        .lcd_wiring_mode        = ATMEL_LCDC_WIRING_RGB,
+        .default_monspecs       = &lcd_fb_default_monspecs,
+        .guard_time             = 2,
+};
+#endif
+
+#ifdef CONFIG_BOARD_MRMT_LCD_KWH043GM08
+/* Sharp KWH043GM08-Fxx (or compatible) panel */
+static struct fb_videomode __initdata lcd_fb_modes[] = {
+        {
+                .name           = "480x272 @ 59.94Hz",
+                .refresh        = 59.94,
+                .xres           = 480,          .yres           = 272,
+                .pixclock       = KHZ2PICOS(9000),
+
+                .left_margin    = 2,            .right_margin   = 2,
+                .upper_margin   = 3,            .lower_margin   = 9,
+                .hsync_len      = 41,           .vsync_len      = 1,
+
+                .sync           = 0,
+                .vmode          = FB_VMODE_NONINTERLACED,
+        },
+};
+
+static struct fb_monspecs __initdata lcd_fb_default_monspecs = {
+        .manufacturer           = "FOR",
+        .monitor                = "KWH043GM08",
+        .modedb                 = lcd_fb_modes,
+        .modedb_len             = ARRAY_SIZE(lcd_fb_modes),
+        .hfmin                  = 14915,
+        .hfmax                  = 17638,
+        .vfmin                  = 53,
+        .vfmax                  = 61,
+        .dclkmax                = 9260000,
+};
+
+static struct atmel_lcdfb_info __initdata rmt_lcdc_data = {
+        .default_bpp            = 24,
+        .default_dmacon         = ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
+        .default_lcdcon2        = (ATMEL_LCDC_DISTYPE_TFT
+                                   | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
+                                   | ATMEL_LCDC_INVCLK_INVERTED
+                                   | ATMEL_LCDC_MEMOR_BIG),
+        .lcd_wiring_mode        = ATMEL_LCDC_WIRING_RGB,
+        .default_monspecs       = &lcd_fb_default_monspecs,
+        .guard_time             = 2,
+};
+#endif
+
+#ifdef CONFIG_BOARD_MRMT_AC97
+static struct ac97c_platform_data __initdata ac97c0_data = {
+        .reset_pin              = PIN_AC97_RST_N,
+};
+#endif
+
+#ifdef CONFIG_BOARD_MRMT_UCB1400_TS
+/* NOTE: IRQ assignment relies on kernel module parameter */
+static struct platform_device rmt_ts_device = {
+        .name   = "ucb1400_ts",
+        .id     = -1,
+        }
+};
+#endif
+
+#ifdef CONFIG_BOARD_MRMT_BL_PWM
+/* PWM LEDs: LCD Backlight, etc */
+static struct gpio_led rmt_pwm_led[] = {
+        /* here the "gpio" is actually a PWM channel */
+        { .name = "backlight",  .gpio = PWM_CH_BL, },
+};
+
+static struct gpio_led_platform_data rmt_pwm_led_data = {
+        .num_leds       = ARRAY_SIZE(rmt_pwm_led),
+        .leds           = rmt_pwm_led,
+};
+
+static struct platform_device rmt_pwm_led_dev = {
+        .name           = "leds-atmel-pwm",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &rmt_pwm_led_data,
+        },
+};
+#endif
+
+#ifdef CONFIG_BOARD_MRMT_ADS7846_TS
+static int ads7846_pendown_state(void)
+{
+        return !gpio_get_value( PIN_TS_EXTINT );        /* PENIRQ.*/
+}
+
+static struct ads7846_platform_data ads_info = {
+        .model                          = 7846,
+        .keep_vref_on                   = 0,    /* Use external VREF pin */
+        .vref_delay_usecs               = 0,
+        .vref_mv                        = 3300, /* VREF = 3.3V */
+        .settle_delay_usecs             = 800,
+        .penirq_recheck_delay_usecs     = 800,
+        .x_plate_ohms                   = 750,
+        .y_plate_ohms                   = 300,
+        .pressure_max                   = 4096,
+        .debounce_max                   = 1,
+        .debounce_rep                   = 0,
+        .debounce_tol                   = (~0),
+        .get_pendown_state              = ads7846_pendown_state,
+        .filter                         = NULL,
+        .filter_init                    = NULL,
+};
+
+static struct spi_board_info spi01_board_info[] __initdata = {
+        {
+                .modalias       = "ads7846",
+                .max_speed_hz   = 31250*26,
+                .bus_num        = 0,
+                .chip_select    = 1,
+                .platform_data  = &ads_info,
+                .irq            = AT32_EXTINT(TS_IRQ),
+        },
+};
+#endif
+
+/* GPIO Keys: left, right, power, etc */
+static const struct gpio_keys_button rmt_gpio_keys_buttons[] = {
+        [0] = {
+                .type           = EV_KEY,
+                .code           = KEY_POWER,
+                .gpio           = PIN_PWR_SW_N,
+                .active_low     = 1,
+                .desc           = "power button",
+        },
+        [1] = {
+                .type           = EV_KEY,
+                .code           = KEY_LEFT,
+                .gpio           = PIN_PB_LEFT,
+                .active_low     = 1,
+                .desc           = "left button",
+        },
+        [2] = {
+                .type           = EV_KEY,
+                .code           = KEY_RIGHT,
+                .gpio           = PIN_PB_RIGHT,
+                .active_low     = 1,
+                .desc           = "right button",
+        },
+};
+
+static const struct gpio_keys_platform_data rmt_gpio_keys_data = {
+        .nbuttons =     ARRAY_SIZE(rmt_gpio_keys_buttons),
+        .buttons =      (void *) rmt_gpio_keys_buttons,
+};
+
+static struct platform_device rmt_gpio_keys = {
+        .name =         "gpio-keys",
+        .id =           -1,
+        .dev = {
+                .platform_data = (void *) &rmt_gpio_keys_data,
+        }
+};
+
+#ifdef CONFIG_BOARD_MRMT_RTC_I2C
+static struct i2c_board_info __initdata mrmt1_i2c_rtc = {
+        I2C_BOARD_INFO("s35390a", 0x30),
+        .irq            = 0,
+};
+#endif
+
+static void mrmt_power_off(void)
+{
+        /* PWR_ON=0 will force power off */
+        gpio_set_value( PIN_PWR_ON, 0 );
+}
+
+static int __init mrmt1_init(void)
+{
+        gpio_set_value( PIN_PWR_ON, 1 );        /* Ensure PWR_ON is enabled */
+
+        pm_power_off = mrmt_power_off;
+
+        /* Setup USARTS (other than console) */
+        at32_map_usart(2, 1, 0);        /* USART 2: /dev/ttyS1, RMT1:DB9M */
+        at32_map_usart(3, 2, ATMEL_USART_RTS | ATMEL_USART_CTS);
+                        /* USART 3: /dev/ttyS2, RMT1:Wireless, w/ RTS/CTS */
+        at32_add_device_usart(1);
+        at32_add_device_usart(2);
+
+        /* Select GPIO Key pins */
+        at32_select_gpio( PIN_PWR_SW_N, AT32_GPIOF_DEGLITCH);
+        at32_select_gpio( PIN_PB_LEFT, AT32_GPIOF_DEGLITCH);
+        at32_select_gpio( PIN_PB_RIGHT, AT32_GPIOF_DEGLITCH);
+        platform_device_register(&rmt_gpio_keys);
+
+#ifdef CONFIG_BOARD_MRMT_RTC_I2C
+        i2c_register_board_info(0, &mrmt1_i2c_rtc, 1);
+#endif
+
+#ifndef CONFIG_BOARD_MRMT_LCD_DISABLE
+        /* User "alternate" LCDC inferface on Port E & D */
+        /* NB: exclude LCDC_CC pin, as NGW100 reserves it for other use */
+        at32_add_device_lcdc(0, &rmt_lcdc_data,
+                fbmem_start, fbmem_size,
+                (ATMEL_LCDC_ALT_24BIT | ATMEL_LCDC_PE_DVAL ) );
+#endif
+
+#ifdef CONFIG_BOARD_MRMT_AC97
+        at32_add_device_ac97c(0, &ac97c0_data, AC97C_BOTH);
+#endif
+
+#ifdef CONFIG_BOARD_MRMT_ADS7846_TS
+        /* Select the Touchscreen interrupt pin mode */
+        at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
+                        GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
+        set_irq_type( AT32_EXTINT(TS_IRQ), IRQ_TYPE_EDGE_FALLING );
+        spi_register_board_info(spi01_board_info,ARRAY_SIZE(spi01_board_info));
+#endif
+
+#ifdef CONFIG_BOARD_MRMT_UCB1400_TS
+        /* Select the Touchscreen interrupt pin mode */
+        at32_select_periph( GPIO_PIOB_BASE, 1 << (PB_EXTINT_BASE+TS_IRQ),
+                        GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
+        platform_device_register(&rmt_ts_device);
+#endif
+
+        at32_select_gpio( PIN_LCD_DISP, AT32_GPIOF_OUTPUT );
+        gpio_request( PIN_LCD_DISP, "LCD_DISP" );
+        gpio_direction_output( PIN_LCD_DISP, 0 );       /* LCD DISP */
+#ifdef CONFIG_BOARD_MRMT_LCD_DISABLE
+        /* Keep Backlight and DISP off */
+        at32_select_gpio( PIN_LCD_BL, AT32_GPIOF_OUTPUT );
+        gpio_request( PIN_LCD_BL, "LCD_BL" );
+        gpio_direction_output( PIN_LCD_BL, 0 );         /* Backlight */
+#else
+        gpio_set_value( PIN_LCD_DISP, 1 );      /* DISP asserted first */
+#ifdef CONFIG_BOARD_MRMT_BL_PWM
+        /* Use PWM for Backlight controls */
+        at32_add_device_pwm(1 << PWM_CH_BL);
+        platform_device_register(&rmt_pwm_led_dev);
+#else
+        /* Backlight always on */
+        udelay( 1 );
+        at32_select_gpio( PIN_LCD_BL, AT32_GPIOF_OUTPUT );
+        gpio_request( PIN_LCD_BL, "LCD_BL" );
+        gpio_direction_output( PIN_LCD_BL, 1 );
+#endif
+#endif
+
+        /* Make sure BT and Zigbee modules in reset */
+        at32_select_gpio( PIN_BT_RST, AT32_GPIOF_OUTPUT );
+        gpio_request( PIN_BT_RST, "BT_RST" );
+        gpio_direction_output( PIN_BT_RST, 1 );
+        /* BT Module in Reset */
+
+        at32_select_gpio( PIN_ZB_RST_N, AT32_GPIOF_OUTPUT );
+        gpio_request( PIN_ZB_RST_N, "ZB_RST_N" );
+        gpio_direction_output( PIN_ZB_RST_N, 0 );
+        /* XBee Module in Reset */
+
+#ifdef CONFIG_BOARD_MRMT_WIRELESS_ZB
+        udelay( 1000 );
+        /* Unreset the XBee Module */
+        gpio_set_value( PIN_ZB_RST_N, 1 );
+#endif
+#ifdef CONFIG_BOARD_MRMT_WIRELESS_BT
+        udelay( 1000 );
+        /* Unreset the BT Module */
+        gpio_set_value( PIN_BT_RST, 0 );
+#endif
+
+        return 0;
+}
+arch_initcall(mrmt1_init);
+
+static int __init mrmt1_early_init(void)
+{
+        /* To maintain power-on signal in case boot loader did not already */
+        at32_select_gpio( PIN_PWR_ON, AT32_GPIOF_OUTPUT );
+        gpio_request( PIN_PWR_ON, "PIN_PWR_ON" );
+        gpio_direction_output( PIN_PWR_ON, 1 );
+
+        return 0;
+}
+core_initcall(mrmt1_early_init);
diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
index 5b022aad4bd9..bc299fbbeb4e 100644
--- a/arch/avr32/boards/atngw100/setup.c
+++ b/arch/avr32/boards/atngw100/setup.c
@@ -56,8 +56,13 @@ static struct spi_board_info spi0_board_info[] __initdata = {
 static struct mci_platform_data __initdata mci0_data = {
         .slot[0] = {
                 .bus_width      = 4,
+#if defined(CONFIG_BOARD_ATNGW100_EVKLCD10X) || defined(CONFIG_BOARD_ATNGW100_MRMT1)
+                .detect_pin     = GPIO_PIN_NONE,
+                .wp_pin         = GPIO_PIN_NONE,
+#else
                 .detect_pin     = GPIO_PIN_PC(25),
                 .wp_pin         = GPIO_PIN_PE(0),
+#endif
         },
 };
 
diff --git a/arch/avr32/boards/merisc/setup.c b/arch/avr32/boards/merisc/setup.c
index 20b300cf105a..623b077594fc 100644
--- a/arch/avr32/boards/merisc/setup.c
+++ b/arch/avr32/boards/merisc/setup.c
@@ -94,9 +94,10 @@ static struct spi_board_info __initdata spi0_board_info[] = {
 
 static struct mci_platform_data __initdata mci0_data = {
         .slot[0] = {
-                .bus_width      = 4,
-                .detect_pin     = GPIO_PIN_PE(19),
-                .wp_pin         = GPIO_PIN_PE(20),
+                .bus_width              = 4,
+                .detect_pin             = GPIO_PIN_PE(19),
+                .wp_pin                 = GPIO_PIN_PE(20),
+                .detect_is_active_high  = true,
         },
 };
 
diff --git a/arch/avr32/boards/mimc200/setup.c b/arch/avr32/boards/mimc200/setup.c
index c1b2175b4fea..523d8e183bef 100644
--- a/arch/avr32/boards/mimc200/setup.c
+++ b/arch/avr32/boards/mimc200/setup.c
@@ -43,16 +43,16 @@ unsigned long at32_board_osc_rates[3] = {
 /* Initialized by bootloader-specific startup code. */
 struct tag *bootloader_tags __initdata;
 
-static struct fb_videomode __initdata tx14d14_modes[] = {
+static struct fb_videomode __initdata pt0434827_modes[] = {
         {
-                .name           = "640x480 @ 60",
-                .refresh        = 60,
-                .xres           = 640,          .yres           = 480,
-                .pixclock       = KHZ2PICOS(11666),
+                .name           = "480x272 @ 72",
+                .refresh        = 72,
+                .xres           = 480,          .yres           = 272,
+                .pixclock       = KHZ2PICOS(10000),
 
-                .left_margin    = 80,           .right_margin   = 1,
-                .upper_margin   = 13,           .lower_margin   = 2,
-                .hsync_len      = 64,           .vsync_len      = 1,
+                .left_margin    = 1,            .right_margin   = 1,
+                .upper_margin   = 12,           .lower_margin   = 1,
+                .hsync_len      = 42,           .vsync_len      = 1,
 
                 .sync           = 0,
                 .vmode          = FB_VMODE_NONINTERLACED,
@@ -60,14 +60,14 @@ static struct fb_videomode __initdata tx14d14_modes[] = {
 };
 
 static struct fb_monspecs __initdata mimc200_default_monspecs = {
-        .manufacturer           = "HIT",
-        .monitor                = "TX14D14VM1BAB",
-        .modedb                 = tx14d14_modes,
-        .modedb_len             = ARRAY_SIZE(tx14d14_modes),
+        .manufacturer           = "PT",
+        .monitor                = "PT0434827-A401",
+        .modedb                 = pt0434827_modes,
+        .modedb_len             = ARRAY_SIZE(pt0434827_modes),
         .hfmin                  = 14820,
         .hfmax                  = 22230,
         .vfmin                  = 60,
-        .vfmax                  = 73.3,
+        .vfmax                  = 85,
         .dclkmax                = 25200000,
 };
 
@@ -228,7 +228,8 @@ static int __init mimc200_init(void)
         i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info));
 
         at32_add_device_lcdc(0, &mimc200_lcdc_data,
-                             fbmem_start, fbmem_size, 1);
+                             fbmem_start, fbmem_size,
+                             ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_CONTROL | ATMEL_LCDC_ALT_24B_DATA);
 
         return 0;
 }
diff --git a/arch/avr32/configs/atngw100_mrmt_defconfig b/arch/avr32/configs/atngw100_mrmt_defconfig
new file mode 100644
index 000000000000..17b030777d36
--- /dev/null
+++ b/arch/avr32/configs/atngw100_mrmt_defconfig
@@ -0,0 +1,1363 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-rc1
+# Wed Jun  3 00:24:53 2009
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_CLK=y
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System Type and features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+# CONFIG_BOARD_ATSTK1000 is not set
+CONFIG_BOARD_ATNGW100=y
+# CONFIG_BOARD_HAMMERHEAD is not set
+# CONFIG_BOARD_FAVR_32 is not set
+# CONFIG_BOARD_MERISC is not set
+# CONFIG_BOARD_MIMC200 is not set
+# CONFIG_BOARD_ATNGW100_ADDON_NONE is not set
+# CONFIG_BOARD_ATNGW100_EVKLCD10X is not set
+CONFIG_BOARD_ATNGW100_MRMT=y
+CONFIG_BOARD_MRMT_REV1=y
+# CONFIG_BOARD_MRMT_REV2 is not set
+CONFIG_BOARD_MRMT_AC97=y
+# CONFIG_BOARD_MRMT_UCB1400_TS is not set
+CONFIG_BOARD_MRMT_ADS7846_TS=y
+# CONFIG_BOARD_MRMT_LCD_DISABLE is not set
+CONFIG_BOARD_MRMT_LCD_LQ043T3DX0X=y
+# CONFIG_BOARD_MRMT_LCD_KWH043GM08 is not set
+CONFIG_BOARD_MRMT_BL_PWM=y
+CONFIG_BOARD_MRMT_RTC_I2C=y
+CONFIG_BOARD_MRMT_WIRELESS_ZB=y
+# CONFIG_BOARD_MRMT_WIRELESS_BT is not set
+# CONFIG_BOARD_MRMT_WIRELESS_NONE is not set
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_QUICKLIST=y
+# CONFIG_HAVE_ARCH_BOOTMEM is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+# CONFIG_OWNERSHIP_TRACE is not set
+# CONFIG_NMI_DEBUGGING is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_CMDLINE=""
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_SUSPEND is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_AT32AP=y
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+# CONFIG_BT_SCO is not set
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+# CONFIG_BT_BNEP is not set
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTSDIO is not set
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+# CONFIG_BT_HCIUART_LL is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
+# CONFIG_MTD_DATAFLASH_OTP is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+CONFIG_ATMEL_PWM=y
+# CONFIG_ATMEL_TCLIB is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ATMEL_SSC is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=m
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+CONFIG_SERIAL_ATMEL_PDC=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_GPIO=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT32AP700X_WDT=y
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_LTV350QV is not set
+# CONFIG_LCD_ILI9320 is not set
+# CONFIG_LCD_TDO24M is not set
+# CONFIG_LCD_VGG2432A4 is not set
+# CONFIG_LCD_PLATFORM is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_ATMEL_LCDC is not set
+# CONFIG_BACKLIGHT_ATMEL_PWM is not set
+CONFIG_BACKLIGHT_GENERIC=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+# CONFIG_LOGO is not set
+CONFIG_SOUND=m
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+
+#
+# Atmel devices (AVR32 and AT91)
+#
+# CONFIG_SND_ATMEL_ABDAC is not set
+CONFIG_SND_ATMEL_AC97C=m
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_SOC is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+# CONFIG_HID_PID is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_APPLE is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
+CONFIG_USB_GADGET_DEBUG_FILES=y
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=m
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_ATMELMCI=y
+# CONFIG_MMC_ATMELMCI_DMA is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_ATMEL_PWM=y
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_BD2802 is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_GPIO is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=m
+CONFIG_RTC_CLASS=m
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+CONFIG_RTC_DRV_S35390A=m
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT32AP700X=m
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_DW_DMAC=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+# CONFIG_UIO_PDRV_GENIRQ is not set
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_POSIX_ACL is not set
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+CONFIG_SMB_NLS_DEFAULT=y
+CONFIG_SMB_NLS_REMOTE="cp437"
+CONFIG_CIFS=m
+CONFIG_CIFS_STATS=y
+# CONFIG_CIFS_STATS2 is not set
+CONFIG_CIFS_WEAK_PW_HASH=y
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SAMPLES is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/avr32/include/asm/atomic.h b/arch/avr32/include/asm/atomic.h
index 318815107748..b131c27ddf57 100644
--- a/arch/avr32/include/asm/atomic.h
+++ b/arch/avr32/include/asm/atomic.h
@@ -196,6 +196,6 @@ static inline int atomic_sub_if_positive(int i, atomic_t *v)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 
 #endif /*  __ASM_AVR32_ATOMIC_H */
diff --git a/arch/avr32/include/asm/bitsperlong.h b/arch/avr32/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/avr32/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/avr32/include/asm/hw_irq.h b/arch/avr32/include/asm/hw_irq.h
index 218b0a6bfd1b..a36f9fcb8fcd 100644
--- a/arch/avr32/include/asm/hw_irq.h
+++ b/arch/avr32/include/asm/hw_irq.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_AVR32_HW_IRQ_H
 #define __ASM_AVR32_HW_IRQ_H
 
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
+static inline void hw_resend_irq(struct irq_chip *h, unsigned int i)
 {
         /* Nothing to do */
 }
diff --git a/arch/avr32/include/asm/mman.h b/arch/avr32/include/asm/mman.h
index 648f91e7187a..9a92b15f6a66 100644
--- a/arch/avr32/include/asm/mman.h
+++ b/arch/avr32/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_AVR32_MMAN_H__
 #define __ASM_AVR32_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/avr32/include/asm/signal.h b/arch/avr32/include/asm/signal.h
index caffefeeba1f..8790dfc10d5b 100644
--- a/arch/avr32/include/asm/signal.h
+++ b/arch/avr32/include/asm/signal.h
@@ -112,7 +112,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/avr32/include/asm/termios.h b/arch/avr32/include/asm/termios.h
index 0152aba35154..dd7e9da25488 100644
--- a/arch/avr32/include/asm/termios.h
+++ b/arch/avr32/include/asm/termios.h
@@ -55,7 +55,7 @@ struct termio {
 */
 #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
 
-#include <asm-generic/termios.h>
+#include <asm-generic/termios-base.h>
 
 #endif  /* __KERNEL__ */
 
diff --git a/arch/avr32/kernel/module.c b/arch/avr32/kernel/module.c
index 1167fe9cf6c4..98f94d041d9c 100644
--- a/arch/avr32/kernel/module.c
+++ b/arch/avr32/kernel/module.c
@@ -32,8 +32,6 @@ void module_free(struct module *mod, void *module_region)
         mod->arch.syminfo = NULL;
 
         vfree(module_region);
-        /* FIXME: if module_region == mod->init_region, trim exception
-         * table entries. */
 }
 
 static inline int check_rela(Elf32_Rela *rela, struct module *module,
diff --git a/arch/avr32/kernel/traps.c b/arch/avr32/kernel/traps.c
index d547c8df157d..6e3d491184ea 100644
--- a/arch/avr32/kernel/traps.c
+++ b/arch/avr32/kernel/traps.c
@@ -75,8 +75,17 @@ void _exception(long signr, struct pt_regs *regs, int code,
 {
         siginfo_t info;
 
-        if (!user_mode(regs))
+        if (!user_mode(regs)) {
+                const struct exception_table_entry *fixup;
+
+                /* Are we prepared to handle this kernel fault? */
+                fixup = search_exception_tables(regs->pc);
+                if (fixup) {
+                        regs->pc = fixup->fixup;
+                        return;
+                }
                 die("Unhandled exception in kernel mode", regs, signr);
+        }
 
         memset(&info, 0, sizeof(info));
         info.si_signo = signr;
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
index 0b8164281899..ddedb471f33e 100644
--- a/arch/avr32/mach-at32ap/include/mach/board.h
+++ b/arch/avr32/mach-at32ap/include/mach/board.h
@@ -29,7 +29,7 @@ extern struct platform_device *atmel_default_console_device;
 /* Flags for selecting USART extra pins */
 #define ATMEL_USART_RTS         0x01
 #define ATMEL_USART_CTS         0x02
-#define ATMEL_USART_CLK         0x03
+#define ATMEL_USART_CLK         0x04
 
 struct atmel_uart_data {
         short           use_dma_tx;     /* use transmit DMA? */
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 3640cdc38aac..c56fd3eb7c10 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -223,6 +223,7 @@ endchoice
 
 config SMP
         depends on BF561
+        select GENERIC_TIME
         bool "Symmetric multi-processing support"
         ---help---
           This enables support for systems with more than one CPU,
@@ -241,12 +242,6 @@ config IRQ_PER_CPU
         depends on SMP
         default y
 
-config TICK_SOURCE_SYSTMR0
-        bool
-        select BFIN_GPTIMERS
-        depends on SMP
-        default y
-
 config BF_REV_MIN
         int
         default 0 if (BF51x || BF52x || (BF54x && !BF54xM))
@@ -263,8 +258,8 @@ config BF_REV_MAX
 
 choice
         prompt "Silicon Rev"
-        default BF_REV_0_1 if (BF51x || BF52x || (BF54x && !BF54xM))
-        default BF_REV_0_2 if (BF534 || BF536 || BF537)
+        default BF_REV_0_0 if (BF51x || BF52x)
+        default BF_REV_0_2 if (BF534 || BF536 || BF537 || (BF54x && !BF54xM))
         default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561)
 
 config BF_REV_0_0
@@ -607,7 +602,6 @@ source kernel/Kconfig.hz
 
 config GENERIC_TIME
         bool "Generic time"
-        depends on !SMP
         default y
 
 config GENERIC_CLOCKEVENTS
@@ -615,12 +609,26 @@ config GENERIC_CLOCKEVENTS
         depends on GENERIC_TIME
         default y
 
+choice
+        prompt "Kernel Tick Source"
+        depends on GENERIC_CLOCKEVENTS
+        default TICKSOURCE_CORETMR
+
+config TICKSOURCE_GPTMR0
+        bool "Gptimer0 (SCLK domain)"
+        select BFIN_GPTIMERS
+        depends on !IPIPE
+
+config TICKSOURCE_CORETMR
+        bool "Core timer (CCLK domain)"
+
+endchoice
+
 config CYCLES_CLOCKSOURCE
-        bool "Use 'CYCLES' as a clocksource (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
+        bool "Use 'CYCLES' as a clocksource"
         depends on GENERIC_CLOCKEVENTS
         depends on !BFIN_SCRATCH_REG_CYCLES
-        default n
+        depends on !SMP
         help
           If you say Y here, you will enable support for using the 'cycles'
           registers as a clock source.  Doing so means you will be unable to
@@ -628,6 +636,11 @@ config CYCLES_CLOCKSOURCE
           still be able to read it (such as for performance monitoring), but
           writing the registers will most likely crash the kernel.
 
+config GPTMR0_CLOCKSOURCE
+        bool "Use GPTimer0 as a clocksource (higher rating)"
+        depends on GENERIC_CLOCKEVENTS
+        depends on !TICKSOURCE_GPTMR0
+
 source kernel/time/Kconfig
 
 comment "Misc"
@@ -808,7 +821,7 @@ config APP_STACK_L1
 config EXCEPTION_L1_SCRATCH
         bool "Locate exception stack in L1 Scratch Memory"
         default n
-        depends on !APP_STACK_L1 && !SYSCALL_TAB_L1
+        depends on !APP_STACK_L1
         help
           Whenever an exception occurs, use the L1 Scratch memory for
           stack storage.  You cannot place the stacks of FLAT binaries
@@ -901,7 +914,7 @@ config BFIN_ICACHE_LOCK
         bool "Enable Instruction Cache Locking"
 
 choice
-        prompt "Policy"
+        prompt "External memory cache policy"
         depends on BFIN_DCACHE
         default BFIN_WB if !SMP
         default BFIN_WT if SMP
@@ -942,12 +955,22 @@ config BFIN_WT
 
 endchoice
 
-config BFIN_L2_CACHEABLE
-        bool "Cache L2 SRAM"
-        depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))
-        default n
-        help
-          Select to make L2 SRAM cacheable in L1 data and instruction cache.
+choice
+        prompt "L2 SRAM cache policy"
+        depends on (BF54x || BF561)
+        default BFIN_L2_WT
+config BFIN_L2_WB
+        bool "Write back"
+        depends on !SMP
+
+config BFIN_L2_WT
+        bool "Write through"
+        depends on !SMP
+
+config BFIN_L2_NOT_CACHED
+        bool "Not cached"
+
+endchoice
 
 config MPU
         bool "Enable the memory protection unit (EXPERIMENTAL)"
@@ -1011,21 +1034,34 @@ endmenu
 
 menu "EBIU_AMBCTL Control"
 config BANK_0
-        hex "Bank 0"
+        hex "Bank 0 (AMBCTL0.L)"
         default 0x7BB0
+        help
+          These are the low 16 bits of the EBIU_AMBCTL0 MMR which are
+          used to control the Asynchronous Memory Bank 0 settings.
 
 config BANK_1
-        hex "Bank 1"
+        hex "Bank 1 (AMBCTL0.H)"
         default 0x7BB0
         default 0x5558 if BF54x
+        help
+          These are the high 16 bits of the EBIU_AMBCTL0 MMR which are
+          used to control the Asynchronous Memory Bank 1 settings.
 
 config BANK_2
-        hex "Bank 2"
+        hex "Bank 2 (AMBCTL1.L)"
         default 0x7BB0
+        help
+          These are the low 16 bits of the EBIU_AMBCTL1 MMR which are
+          used to control the Asynchronous Memory Bank 2 settings.
 
 config BANK_3
-        hex "Bank 3"
+        hex "Bank 3 (AMBCTL1.H)"
         default 0x99B3
+        help
+          These are the high 16 bits of the EBIU_AMBCTL1 MMR which are
+          used to control the Asynchronous Memory Bank 3 settings.
+
 endmenu
 
 config EBIU_MBSCTLVAL
diff --git a/arch/blackfin/Kconfig.debug b/arch/blackfin/Kconfig.debug
index 79e7e63ab709..1fc4981d486f 100644
--- a/arch/blackfin/Kconfig.debug
+++ b/arch/blackfin/Kconfig.debug
@@ -54,6 +54,19 @@ config DEBUG_HWERR
           hardware error interrupts and need to know where they are coming
           from.
 
+config EXACT_HWERR
+        bool "Try to make Hardware errors exact"
+        depends on DEBUG_HWERR
+        help
+          By default, the Blackfin hardware errors are not exact - the error
+          be reported multiple cycles after the error happens. This delay
+          can cause the wrong application, or even the kernel to receive a
+          signal to be killed. If you are getting HW errors in your system,
+          try turning this on to ensure they are at least comming from the
+          proper thread.
+
+          On production systems, it is safe (and a small optimization) to say N.
+
 config DEBUG_DOUBLEFAULT
         bool "Debug Double Faults"
         default n
diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig
index c121d6e6e2b8..baec1337f282 100644
--- a/arch/blackfin/configs/BF518F-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -259,7 +259,10 @@ CONFIG_HZ=250
 # CONFIG_SCHED_HRTICK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -404,7 +407,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -688,14 +691,14 @@ CONFIG_INPUT_MISC=y
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 # CONFIG_BFIN_SPORT is not set
 # CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_TWI_LCD is not set
-CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_TWI_LCD is not set
 CONFIG_SIMPLE_GPIO=m
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
@@ -802,7 +805,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -831,6 +857,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_REGULATOR is not set
@@ -962,7 +989,8 @@ CONFIG_RTC_DRV_BFIN=y
 #
 # File systems
 #
-# CONFIG_EXT2_FS is not set
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT3_FS is not set
 # CONFIG_EXT4_FS is not set
 # CONFIG_REISERFS_FS is not set
@@ -988,8 +1016,11 @@ CONFIG_INOTIFY_USER=y
 #
 # DOS/FAT/NT Filesystems
 #
+CONFIG_FAT_FS=m
 # CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 
 #
@@ -1012,8 +1043,8 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_YAFFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_YAFFS_FS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1048,9 +1079,9 @@ CONFIG_SMB_FS=m
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-CONFIG_NLS=y
+CONFIG_NLS=m
 CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_437=m
 # CONFIG_NLS_CODEPAGE_737 is not set
 # CONFIG_NLS_CODEPAGE_775 is not set
 # CONFIG_NLS_CODEPAGE_850 is not set
@@ -1065,7 +1096,7 @@ CONFIG_NLS_CODEPAGE_437=y
 # CONFIG_NLS_CODEPAGE_865 is not set
 # CONFIG_NLS_CODEPAGE_866 is not set
 # CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
+CONFIG_NLS_CODEPAGE_936=m
 # CONFIG_NLS_CODEPAGE_950 is not set
 # CONFIG_NLS_CODEPAGE_932 is not set
 # CONFIG_NLS_CODEPAGE_949 is not set
@@ -1074,7 +1105,7 @@ CONFIG_NLS_CODEPAGE_437=y
 # CONFIG_NLS_CODEPAGE_1250 is not set
 # CONFIG_NLS_CODEPAGE_1251 is not set
 # CONFIG_NLS_ASCII is not set
-CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_1=m
 # CONFIG_NLS_ISO8859_2 is not set
 # CONFIG_NLS_ISO8859_3 is not set
 # CONFIG_NLS_ISO8859_4 is not set
@@ -1087,7 +1118,7 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_ISO8859_15 is not set
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
+CONFIG_NLS_UTF8=m
 # CONFIG_DLM is not set
 
 #
@@ -1102,7 +1133,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1111,8 +1142,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1132,7 +1161,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 
 #
 # Tracers
@@ -1148,16 +1176,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1269,7 +1301,6 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig
index 3e562b2775d4..c06262e41f7c 100644
--- a/arch/blackfin/configs/BF526-EZBRD_defconfig
+++ b/arch/blackfin/configs/BF526-EZBRD_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -144,8 +144,8 @@ CONFIG_BF526=y
 # CONFIG_BF561 is not set
 CONFIG_BF_REV_MIN=0
 CONFIG_BF_REV_MAX=2
-# CONFIG_BF_REV_0_0 is not set
-CONFIG_BF_REV_0_1=y
+CONFIG_BF_REV_0_0=y
+# CONFIG_BF_REV_0_1 is not set
 # CONFIG_BF_REV_0_2 is not set
 # CONFIG_BF_REV_0_3 is not set
 # CONFIG_BF_REV_0_4 is not set
@@ -264,7 +264,10 @@ CONFIG_HZ=250
 # CONFIG_SCHED_HRTICK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -409,7 +412,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -491,7 +494,7 @@ CONFIG_MTD_PARTITIONS=y
 #
 # User Modules And Translation Layers
 #
-CONFIG_MTD_CHAR=m
+CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
@@ -504,9 +507,9 @@ CONFIG_MTD_BLOCK=y
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
-CONFIG_MTD_JEDECPROBE=m
-CONFIG_MTD_GEN_PROBE=m
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
 # CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
 CONFIG_MTD_MAP_BANK_WIDTH_2=y
@@ -518,9 +521,10 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_INTELEXT=y
 # CONFIG_MTD_CFI_AMDSTD is not set
 # CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
 CONFIG_MTD_ROM=m
 # CONFIG_MTD_ABSENT is not set
@@ -529,7 +533,8 @@ CONFIG_MTD_ROM=m
 # Mapping drivers for chip access
 #
 CONFIG_MTD_COMPLEX_MAPPINGS=y
-# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_GPIO_ADDR is not set
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -597,9 +602,42 @@ CONFIG_HAVE_IDE=y
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_DMA is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
 # CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
@@ -644,9 +682,8 @@ CONFIG_BFIN_MAC_RMII=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -715,14 +752,14 @@ CONFIG_INPUT_MISC=y
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 # CONFIG_BFIN_SPORT is not set
 # CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_TWI_LCD is not set
-CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_TWI_LCD is not set
 CONFIG_SIMPLE_GPIO=m
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
@@ -832,11 +869,35 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD5252 is not set
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADCXX is not set
@@ -920,6 +981,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_REGULATOR is not set
@@ -1008,8 +1070,8 @@ CONFIG_USB=y
 #
 # Miscellaneous USB options
 #
-# CONFIG_USB_DEVICEFS is not set
-CONFIG_USB_DEVICE_CLASS=y
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
@@ -1037,10 +1099,10 @@ CONFIG_USB_MUSB_SOC=y
 CONFIG_USB_MUSB_HOST=y
 # CONFIG_USB_MUSB_PERIPHERAL is not set
 # CONFIG_USB_MUSB_OTG is not set
-# CONFIG_USB_GADGET_MUSB_HDRC is not set
 CONFIG_USB_MUSB_HDRC_HCD=y
-CONFIG_MUSB_PIO_ONLY=y
-CONFIG_MUSB_DMA_POLL=y
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_INVENTRA_DMA=y
+# CONFIG_USB_TI_CPPI_DMA is not set
 # CONFIG_USB_MUSB_DEBUG is not set
 
 #
@@ -1058,7 +1120,7 @@ CONFIG_MUSB_DMA_POLL=y
 #
 # see USB_STORAGE Help for more information
 #
-CONFIG_USB_STORAGE=m
+CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
@@ -1107,33 +1169,10 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
-# CONFIG_USB_GADGET_AT91 is not set
-# CONFIG_USB_GADGET_ATMEL_USBA is not set
-# CONFIG_USB_GADGET_FSL_USB2 is not set
-# CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_OMAP is not set
-# CONFIG_USB_GADGET_PXA25X is not set
-# CONFIG_USB_GADGET_PXA27X is not set
-# CONFIG_USB_GADGET_S3C2410 is not set
-# CONFIG_USB_GADGET_M66592 is not set
-# CONFIG_USB_GADGET_AMD5536UDC is not set
-# CONFIG_USB_GADGET_FSL_QE is not set
-# CONFIG_USB_GADGET_NET2272 is not set
-# CONFIG_USB_GADGET_NET2280 is not set
-# CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_ZERO is not set
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_ETH is not set
-# CONFIG_USB_GADGETFS is not set
-# CONFIG_USB_FILE_STORAGE is not set
-# CONFIG_USB_G_SERIAL is not set
-# CONFIG_USB_MIDI_GADGET is not set
-# CONFIG_USB_G_PRINTER is not set
-# CONFIG_USB_CDC_COMPOSITE is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1206,7 +1245,8 @@ CONFIG_RTC_DRV_BFIN=y
 #
 # File systems
 #
-# CONFIG_EXT2_FS is not set
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT3_FS is not set
 # CONFIG_EXT4_FS is not set
 # CONFIG_REISERFS_FS is not set
@@ -1226,14 +1266,19 @@ CONFIG_INOTIFY_USER=y
 #
 # CD-ROM/DVD Filesystems
 #
-# CONFIG_ISO9660_FS is not set
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
 # CONFIG_UDF_FS is not set
 
 #
 # DOS/FAT/NT Filesystems
 #
+CONFIG_FAT_FS=m
 # CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 
 #
@@ -1256,16 +1301,6 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -1277,6 +1312,16 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+CONFIG_YAFFS_FS=m
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1313,7 +1358,7 @@ CONFIG_SMB_FS=m
 CONFIG_MSDOS_PARTITION=y
 CONFIG_NLS=m
 CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
+CONFIG_NLS_CODEPAGE_437=m
 # CONFIG_NLS_CODEPAGE_737 is not set
 # CONFIG_NLS_CODEPAGE_775 is not set
 # CONFIG_NLS_CODEPAGE_850 is not set
@@ -1328,7 +1373,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # CONFIG_NLS_CODEPAGE_865 is not set
 # CONFIG_NLS_CODEPAGE_866 is not set
 # CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
+CONFIG_NLS_CODEPAGE_936=m
 # CONFIG_NLS_CODEPAGE_950 is not set
 # CONFIG_NLS_CODEPAGE_932 is not set
 # CONFIG_NLS_CODEPAGE_949 is not set
@@ -1337,7 +1382,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # CONFIG_NLS_CODEPAGE_1250 is not set
 # CONFIG_NLS_CODEPAGE_1251 is not set
 # CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
+CONFIG_NLS_ISO8859_1=m
 # CONFIG_NLS_ISO8859_2 is not set
 # CONFIG_NLS_ISO8859_3 is not set
 # CONFIG_NLS_ISO8859_4 is not set
@@ -1350,7 +1395,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # CONFIG_NLS_ISO8859_15 is not set
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
+CONFIG_NLS_UTF8=m
 # CONFIG_DLM is not set
 
 #
@@ -1365,7 +1410,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1374,8 +1419,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1395,7 +1438,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 
 #
 # Tracers
@@ -1411,16 +1453,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1534,7 +1580,6 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig
index 911b5dba1dbc..e9175c608aa7 100644
--- a/arch/blackfin/configs/BF527-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF527-EZKIT_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -145,8 +145,8 @@ CONFIG_BF527=y
 CONFIG_BF_REV_MIN=0
 CONFIG_BF_REV_MAX=2
 # CONFIG_BF_REV_0_0 is not set
-CONFIG_BF_REV_0_1=y
-# CONFIG_BF_REV_0_2 is not set
+# CONFIG_BF_REV_0_1 is not set
+CONFIG_BF_REV_0_2=y
 # CONFIG_BF_REV_0_3 is not set
 # CONFIG_BF_REV_0_4 is not set
 # CONFIG_BF_REV_0_5 is not set
@@ -264,7 +264,10 @@ CONFIG_HZ=250
 # CONFIG_SCHED_HRTICK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -318,7 +321,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_VIRT_TO_BUS=y
-CONFIG_BFIN_GPTIMERS=m
+CONFIG_BFIN_GPTIMERS=y
 # CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
@@ -409,7 +412,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -639,9 +642,42 @@ CONFIG_HAVE_IDE=y
 # SCSI device support
 #
 # CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_DMA is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
 # CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
@@ -687,9 +723,8 @@ CONFIG_BFIN_MAC_RMII=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -758,14 +793,14 @@ CONFIG_INPUT_MISC=y
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-CONFIG_BF5xx_PPI=m
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
 # CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_TWI_LCD is not set
-CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_TWI_LCD is not set
 CONFIG_SIMPLE_GPIO=m
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
@@ -875,7 +910,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -909,6 +967,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_REGULATOR is not set
@@ -1091,8 +1150,8 @@ CONFIG_USB=y
 #
 # Miscellaneous USB options
 #
-# CONFIG_USB_DEVICEFS is not set
-CONFIG_USB_DEVICE_CLASS=y
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
@@ -1120,10 +1179,10 @@ CONFIG_USB_MUSB_SOC=y
 CONFIG_USB_MUSB_HOST=y
 # CONFIG_USB_MUSB_PERIPHERAL is not set
 # CONFIG_USB_MUSB_OTG is not set
-# CONFIG_USB_GADGET_MUSB_HDRC is not set
 CONFIG_USB_MUSB_HDRC_HCD=y
-CONFIG_MUSB_PIO_ONLY=y
-CONFIG_MUSB_DMA_POLL=y
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_INVENTRA_DMA=y
+# CONFIG_USB_TI_CPPI_DMA is not set
 # CONFIG_USB_MUSB_DEBUG is not set
 
 #
@@ -1141,7 +1200,7 @@ CONFIG_MUSB_DMA_POLL=y
 #
 # see USB_STORAGE Help for more information
 #
-CONFIG_USB_STORAGE=m
+CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
@@ -1190,33 +1249,10 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
-# CONFIG_USB_GADGET_AT91 is not set
-# CONFIG_USB_GADGET_ATMEL_USBA is not set
-# CONFIG_USB_GADGET_FSL_USB2 is not set
-# CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_OMAP is not set
-# CONFIG_USB_GADGET_PXA25X is not set
-# CONFIG_USB_GADGET_PXA27X is not set
-# CONFIG_USB_GADGET_S3C2410 is not set
-# CONFIG_USB_GADGET_M66592 is not set
-# CONFIG_USB_GADGET_AMD5536UDC is not set
-# CONFIG_USB_GADGET_FSL_QE is not set
-# CONFIG_USB_GADGET_NET2272 is not set
-# CONFIG_USB_GADGET_NET2280 is not set
-# CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_ZERO is not set
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_ETH is not set
-# CONFIG_USB_GADGETFS is not set
-# CONFIG_USB_FILE_STORAGE is not set
-# CONFIG_USB_G_SERIAL is not set
-# CONFIG_USB_MIDI_GADGET is not set
-# CONFIG_USB_G_PRINTER is not set
-# CONFIG_USB_CDC_COMPOSITE is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
@@ -1289,7 +1325,8 @@ CONFIG_RTC_DRV_BFIN=y
 #
 # File systems
 #
-# CONFIG_EXT2_FS is not set
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT3_FS is not set
 # CONFIG_EXT4_FS is not set
 # CONFIG_REISERFS_FS is not set
@@ -1309,14 +1346,20 @@ CONFIG_INOTIFY_USER=y
 #
 # CD-ROM/DVD Filesystems
 #
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
 
 #
 # DOS/FAT/NT Filesystems
 #
+CONFIG_FAT_FS=m
 # CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 # CONFIG_NTFS_FS is not set
 
 #
@@ -1339,16 +1382,6 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -1360,6 +1393,16 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+CONFIG_YAFFS_FS=m
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1396,7 +1439,7 @@ CONFIG_SMB_FS=m
 CONFIG_MSDOS_PARTITION=y
 CONFIG_NLS=m
 CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
+CONFIG_NLS_CODEPAGE_437=m
 # CONFIG_NLS_CODEPAGE_737 is not set
 # CONFIG_NLS_CODEPAGE_775 is not set
 # CONFIG_NLS_CODEPAGE_850 is not set
@@ -1411,7 +1454,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # CONFIG_NLS_CODEPAGE_865 is not set
 # CONFIG_NLS_CODEPAGE_866 is not set
 # CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
+CONFIG_NLS_CODEPAGE_936=m
 # CONFIG_NLS_CODEPAGE_950 is not set
 # CONFIG_NLS_CODEPAGE_932 is not set
 # CONFIG_NLS_CODEPAGE_949 is not set
@@ -1420,7 +1463,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # CONFIG_NLS_CODEPAGE_1250 is not set
 # CONFIG_NLS_CODEPAGE_1251 is not set
 # CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
+CONFIG_NLS_ISO8859_1=m
 # CONFIG_NLS_ISO8859_2 is not set
 # CONFIG_NLS_ISO8859_3 is not set
 # CONFIG_NLS_ISO8859_4 is not set
@@ -1433,7 +1476,7 @@ CONFIG_NLS_DEFAULT="iso8859-1"
 # CONFIG_NLS_ISO8859_15 is not set
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
+CONFIG_NLS_UTF8=m
 # CONFIG_DLM is not set
 
 #
@@ -1448,7 +1491,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1457,8 +1500,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1478,7 +1519,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
 
 #
 # Tracers
@@ -1494,16 +1534,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1611,13 +1655,12 @@ CONFIG_BITREVERSE=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
 # CONFIG_CRC_T10DIF is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=m
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 4c41e03efe0f..5aa63bafdd62 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -225,7 +225,10 @@ CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
 CONFIG_HIGH_RES_TIMERS=y
@@ -382,7 +385,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -613,9 +616,8 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -667,13 +669,13 @@ CONFIG_INPUT_EVDEV=m
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=y
 # CONFIG_BFIN_TIMER_LATENCY is not set
-CONFIG_BFIN_DMA_INTERFACE=m
 CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
@@ -729,7 +731,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -904,16 +929,6 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -925,6 +940,16 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+CONFIG_YAFFS_FS=m
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1013,7 +1038,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1022,8 +1047,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1043,7 +1066,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
 
 #
 # Tracers
@@ -1059,16 +1081,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1181,7 +1207,6 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 9c482cd1b343..fed25329e13c 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -225,7 +225,10 @@ CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
 CONFIG_HIGH_RES_TIMERS=y
@@ -382,7 +385,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -618,9 +621,8 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -674,14 +676,14 @@ CONFIG_CONFIG_INPUT_PCF8574=m
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-CONFIG_BF5xx_PPI=m
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
 # CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_TWI_LCD is not set
-CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_TWI_LCD is not set
 CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
@@ -781,7 +783,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -1068,16 +1093,6 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -1089,6 +1104,16 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+CONFIG_YAFFS_FS=m
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1177,7 +1202,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1186,8 +1211,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1207,7 +1230,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
 
 #
 # Tracers
@@ -1223,16 +1245,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1345,7 +1371,6 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index 591f6edda4f7..f9ac20d55799 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -232,7 +232,10 @@ CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
 CONFIG_HIGH_RES_TIMERS=y
@@ -390,7 +393,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -548,9 +551,7 @@ CONFIG_MTD_ROM=m
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 CONFIG_MTD_PHYSMAP=m
-CONFIG_MTD_PHYSMAP_START=0x20000000
-CONFIG_MTD_PHYSMAP_LEN=0x0
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -649,9 +650,8 @@ CONFIG_BFIN_RX_DESC_NUM=20
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -708,14 +708,14 @@ CONFIG_SERIO_LIBPS2=y
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-CONFIG_BF5xx_PPI=m
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
 # CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_TWI_LCD is not set
-CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_TWI_LCD is not set
 CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
@@ -823,7 +823,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -1123,16 +1146,6 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -1144,6 +1157,16 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+CONFIG_YAFFS_FS=m
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1232,7 +1255,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1241,8 +1264,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1262,7 +1283,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
 
 #
 # Tracers
@@ -1278,16 +1298,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1400,7 +1424,6 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig
index 1a8e8c3adf98..ee98e227b887 100644
--- a/arch/blackfin/configs/BF538-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF538-EZKIT_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -243,7 +243,10 @@ CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
 CONFIG_HIGH_RES_TIMERS=y
@@ -389,7 +392,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -546,9 +549,7 @@ CONFIG_MTD_ROM=m
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 CONFIG_MTD_PHYSMAP=m
-CONFIG_MTD_PHYSMAP_START=0x20000000
-CONFIG_MTD_PHYSMAP_LEN=0x0
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -691,11 +692,11 @@ CONFIG_INPUT_EVDEV=m
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_ADS7846 is not set
 # CONFIG_TOUCHSCREEN_AD7877 is not set
 # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
 CONFIG_TOUCHSCREEN_AD7879_SPI=y
 CONFIG_TOUCHSCREEN_AD7879=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
@@ -720,14 +721,14 @@ CONFIG_INPUT_MISC=y
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-CONFIG_BF5xx_PPI=m
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
 # CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_TWI_LCD is not set
-CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_TWI_LCD is not set
 CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
@@ -833,7 +834,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -1056,16 +1080,6 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -1077,6 +1091,16 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+CONFIG_YAFFS_FS=m
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1165,7 +1189,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1174,8 +1198,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1195,7 +1217,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 
 #
 # Tracers
@@ -1211,16 +1232,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1333,7 +1358,6 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index 2cd1c2b218d7..deeabef8ab80 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -196,6 +196,7 @@ CONFIG_BFIN548_EZKIT=y
 # BF548 Specific Configuration
 #
 # CONFIG_DEB_DMA_URGENT is not set
+# CONFIG_BF548_ATAPI_ALTERNATIVE_PORT is not set
 
 #
 # Interrupt Priority Assignment
@@ -298,7 +299,10 @@ CONFIG_HZ=250
 # CONFIG_SCHED_HRTICK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -367,7 +371,9 @@ CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_ICACHE_LOCK is not set
 CONFIG_BFIN_WB=y
 # CONFIG_BFIN_WT is not set
-# CONFIG_BFIN_L2_CACHEABLE is not set
+# CONFIG_BFIN_L2_WB is not set
+CONFIG_BFIN_L2_WT=y
+# CONFIG_BFIN_L2_NOT_CACHED is not set
 # CONFIG_MPU is not set
 
 #
@@ -447,7 +453,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -616,9 +622,7 @@ CONFIG_MTD_RAM=y
 #
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x20000000
-CONFIG_MTD_PHYSMAP_LEN=0
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_GPIO_ADDR is not set
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
@@ -696,7 +700,7 @@ CONFIG_SCSI_DMA=y
 CONFIG_BLK_DEV_SD=y
 # CONFIG_CHR_DEV_ST is not set
 # CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR=m
 # CONFIG_BLK_DEV_SR_VENDOR is not set
 # CONFIG_CHR_DEV_SG is not set
 # CONFIG_CHR_DEV_SCH is not set
@@ -718,9 +722,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 # CONFIG_SCSI_ISCSI_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
-CONFIG_SCSI_LOWLEVEL=y
-# CONFIG_ISCSI_TCP is not set
-# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_DH is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
@@ -752,9 +754,8 @@ CONFIG_SMSC911X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -821,11 +822,11 @@ CONFIG_KEYBOARD_BFIN=y
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_ADS7846 is not set
 CONFIG_TOUCHSCREEN_AD7877=m
 # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
 # CONFIG_TOUCHSCREEN_AD7879_SPI is not set
 # CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
@@ -858,14 +859,14 @@ CONFIG_INPUT_MISC=y
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-CONFIG_BF5xx_PPI=m
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=m
 # CONFIG_BFIN_TIMER_LATENCY is not set
-# CONFIG_TWI_LCD is not set
-CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_TWI_LCD is not set
 CONFIG_SIMPLE_GPIO=m
 CONFIG_VT=y
 CONFIG_CONSOLE_TRANSLATIONS=y
@@ -977,7 +978,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -1011,6 +1035,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_REGULATOR is not set
@@ -1193,8 +1218,8 @@ CONFIG_USB=y
 #
 # Miscellaneous USB options
 #
-# CONFIG_USB_DEVICEFS is not set
-CONFIG_USB_DEVICE_CLASS=y
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
 # CONFIG_USB_DYNAMIC_MINORS is not set
 # CONFIG_USB_OTG is not set
 # CONFIG_USB_OTG_WHITELIST is not set
@@ -1222,10 +1247,10 @@ CONFIG_USB_MUSB_SOC=y
 CONFIG_USB_MUSB_HOST=y
 # CONFIG_USB_MUSB_PERIPHERAL is not set
 # CONFIG_USB_MUSB_OTG is not set
-# CONFIG_USB_GADGET_MUSB_HDRC is not set
 CONFIG_USB_MUSB_HDRC_HCD=y
-CONFIG_MUSB_PIO_ONLY=y
-CONFIG_MUSB_DMA_POLL=y
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_INVENTRA_DMA=y
+# CONFIG_USB_TI_CPPI_DMA is not set
 # CONFIG_USB_MUSB_DEBUG is not set
 
 #
@@ -1243,7 +1268,7 @@ CONFIG_MUSB_DMA_POLL=y
 #
 # see USB_STORAGE Help for more information
 #
-CONFIG_USB_STORAGE=m
+CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
@@ -1292,33 +1317,10 @@ CONFIG_USB_STORAGE=m
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
 # CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
-# CONFIG_USB_GADGET_AT91 is not set
-# CONFIG_USB_GADGET_ATMEL_USBA is not set
-# CONFIG_USB_GADGET_FSL_USB2 is not set
-# CONFIG_USB_GADGET_LH7A40X is not set
-# CONFIG_USB_GADGET_OMAP is not set
-# CONFIG_USB_GADGET_PXA25X is not set
-# CONFIG_USB_GADGET_PXA27X is not set
-# CONFIG_USB_GADGET_S3C2410 is not set
-# CONFIG_USB_GADGET_M66592 is not set
-# CONFIG_USB_GADGET_AMD5536UDC is not set
-# CONFIG_USB_GADGET_FSL_QE is not set
-# CONFIG_USB_GADGET_NET2272 is not set
-# CONFIG_USB_GADGET_NET2280 is not set
-# CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_ZERO is not set
-# CONFIG_USB_AUDIO is not set
-# CONFIG_USB_ETH is not set
-# CONFIG_USB_GADGETFS is not set
-# CONFIG_USB_FILE_STORAGE is not set
-# CONFIG_USB_G_SERIAL is not set
-# CONFIG_USB_MIDI_GADGET is not set
-# CONFIG_USB_G_PRINTER is not set
-# CONFIG_USB_CDC_COMPOSITE is not set
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_UNSAFE_RESUME is not set
@@ -1414,13 +1416,8 @@ CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 # CONFIG_EXT2_FS_POSIX_ACL is not set
 # CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT3_FS is not set
 # CONFIG_EXT4_FS is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
@@ -1476,16 +1473,6 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -1497,6 +1484,16 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+CONFIG_YAFFS_FS=m
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1539,63 +1536,47 @@ CONFIG_CIFS=y
 #
 # Partition Types
 #
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
+# CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_KARMA_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-# CONFIG_SYSV68_PARTITION is not set
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="iso8859-1"
 CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
 CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
 CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
 CONFIG_NLS_UTF8=m
 # CONFIG_DLM is not set
 
@@ -1611,7 +1592,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1620,8 +1601,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1641,7 +1620,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
 
 #
 # Tracers
@@ -1657,16 +1635,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1780,7 +1762,6 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 4a6ea8e31df7..dcfbe2e2931e 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
+# Thu May 21 05:50:01 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -42,10 +43,11 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -53,16 +55,15 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -71,7 +72,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -148,9 +148,9 @@ CONFIG_BF_REV_MAX=5
 # CONFIG_BF_REV_0_0 is not set
 # CONFIG_BF_REV_0_1 is not set
 # CONFIG_BF_REV_0_2 is not set
-CONFIG_BF_REV_0_3=y
+# CONFIG_BF_REV_0_3 is not set
 # CONFIG_BF_REV_0_4 is not set
-# CONFIG_BF_REV_0_5 is not set
+CONFIG_BF_REV_0_5=y
 # CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
@@ -179,7 +179,6 @@ CONFIG_BFIN561_EZKIT=y
 # Core B Support
 #
 CONFIG_BF561_COREB=y
-CONFIG_BF561_COREB_RESET=y
 
 #
 # Interrupt Priority Assignment
@@ -264,7 +263,10 @@ CONFIG_HZ=250
 CONFIG_SCHED_HRTICK=y
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 CONFIG_TICK_ONESHOT=y
 # CONFIG_NO_HZ is not set
 CONFIG_HIGH_RES_TIMERS=y
@@ -334,7 +336,9 @@ CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_ICACHE_LOCK is not set
 CONFIG_BFIN_WB=y
 # CONFIG_BFIN_WT is not set
-# CONFIG_BFIN_L2_CACHEABLE is not set
+# CONFIG_BFIN_L2_WB is not set
+CONFIG_BFIN_L2_WT=y
+# CONFIG_BFIN_L2_NOT_CACHED is not set
 # CONFIG_MPU is not set
 
 #
@@ -415,7 +419,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -570,9 +574,7 @@ CONFIG_MTD_ROM=m
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 CONFIG_MTD_PHYSMAP=m
-CONFIG_MTD_PHYSMAP_START=0x20000000
-CONFIG_MTD_PHYSMAP_LEN=0x0
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
 # CONFIG_MTD_UCLINUX is not set
 # CONFIG_MTD_PLATRAM is not set
 
@@ -649,9 +651,8 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -703,13 +704,13 @@ CONFIG_INPUT_EVDEV=m
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 # CONFIG_BFIN_SPORT is not set
 # CONFIG_BFIN_TIMER_LATENCY is not set
-CONFIG_BFIN_DMA_INTERFACE=m
 CONFIG_SIMPLE_GPIO=m
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
@@ -765,7 +766,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
@@ -897,16 +921,6 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-CONFIG_YAFFS_FS=m
-CONFIG_YAFFS_YAFFS1=y
-# CONFIG_YAFFS_9BYTE_TAGS is not set
-# CONFIG_YAFFS_DOES_ECC is not set
-CONFIG_YAFFS_YAFFS2=y
-CONFIG_YAFFS_AUTO_YAFFS2=y
-# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
-# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
-# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
-CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 CONFIG_JFFS2_FS=m
 CONFIG_JFFS2_FS_DEBUG=0
 CONFIG_JFFS2_FS_WRITEBUFFER=y
@@ -918,6 +932,16 @@ CONFIG_JFFS2_ZLIB=y
 # CONFIG_JFFS2_LZO is not set
 CONFIG_JFFS2_RTIME=y
 # CONFIG_JFFS2_RUBIN is not set
+CONFIG_YAFFS_FS=m
+CONFIG_YAFFS_YAFFS1=y
+# CONFIG_YAFFS_9BYTE_TAGS is not set
+# CONFIG_YAFFS_DOES_ECC is not set
+CONFIG_YAFFS_YAFFS2=y
+CONFIG_YAFFS_AUTO_YAFFS2=y
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1006,7 +1030,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
@@ -1015,8 +1039,6 @@ CONFIG_SCHED_DEBUG=y
 # CONFIG_TIMER_STATS is not set
 # CONFIG_DEBUG_OBJECTS is not set
 # CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@@ -1036,7 +1058,6 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_BACKTRACE_SELF_TEST is not set
 # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
 
 #
 # Tracers
@@ -1052,16 +1073,20 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_DEBUG_STACK_USAGE is not set
 CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
-# CONFIG_DEBUG_HWERR is not set
-# CONFIG_DEBUG_DOUBLEFAULT is not set
+CONFIG_DEBUG_HWERR=y
+CONFIG_EXACT_HWERR=y
+CONFIG_DEBUG_DOUBLEFAULT=y
+CONFIG_DEBUG_DOUBLEFAULT_PRINT=y
+# CONFIG_DEBUG_DOUBLEFAULT_RESET is not set
+# CONFIG_DEBUG_ICACHE_CHECK is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
-# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE is not set
+# CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF is not set
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 # CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_TWO is not set
-CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=0
+CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION=1
 # CONFIG_DEBUG_BFIN_HWTRACE_EXPAND is not set
-# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_ACCESS_CHECK=y
@@ -1174,7 +1199,6 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/BlackStamp_defconfig b/arch/blackfin/configs/BlackStamp_defconfig
index ef1a2c84ace1..174c578b8ec4 100644
--- a/arch/blackfin/configs/BlackStamp_defconfig
+++ b/arch/blackfin/configs/BlackStamp_defconfig
@@ -46,7 +46,7 @@ CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -381,7 +381,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
diff --git a/arch/blackfin/configs/CM-BF527_defconfig b/arch/blackfin/configs/CM-BF527_defconfig
index e2fc588e4336..e17875e8abe8 100644
--- a/arch/blackfin/configs/CM-BF527_defconfig
+++ b/arch/blackfin/configs/CM-BF527_defconfig
@@ -46,7 +46,7 @@ CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -411,7 +411,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -783,7 +783,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
diff --git a/arch/blackfin/configs/CM-BF533_defconfig b/arch/blackfin/configs/CM-BF533_defconfig
index 65a8bbb8d647..fafd95e84b28 100644
--- a/arch/blackfin/configs/CM-BF533_defconfig
+++ b/arch/blackfin/configs/CM-BF533_defconfig
@@ -49,7 +49,7 @@ CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 # CONFIG_HOTPLUG is not set
@@ -347,7 +347,7 @@ CONFIG_IP_FIB_HASH=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -547,9 +547,9 @@ CONFIG_MII=y
 CONFIG_SMC91X=y
 # CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
-CONFIG_NETDEV_1000=y
+# CONFIG_NETDEV_1000 is not set
 # CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -641,6 +641,10 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
 #
 # SPI support
 #
diff --git a/arch/blackfin/configs/CM-BF537E_defconfig b/arch/blackfin/configs/CM-BF537E_defconfig
index 9b7e9d781145..e73aa5af58b9 100644
--- a/arch/blackfin/configs/CM-BF537E_defconfig
+++ b/arch/blackfin/configs/CM-BF537E_defconfig
@@ -1,6 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.22.16
+# Linux kernel version: 2.6.28.10
+# Wed Jun  3 06:27:41 2009
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -8,48 +9,44 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
 CONFIG_BLACKFIN=y
 CONFIG_ZONE_DMA=y
-CONFIG_SEMAPHORE_SLEEPERS=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_GPIO=y
 CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
-# Code maturity level options
+# General setup
 #
 CONFIG_EXPERIMENTAL=y
 CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
 CONFIG_SYSVIPC_SYSCTL=y
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
 # CONFIG_AUDIT is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
 # CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 # CONFIG_HOTPLUG is not set
@@ -58,37 +55,36 @@ CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_EVENTFD=y
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
-# CONFIG_NP2 is not set
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
-CONFIG_RT_MUTEXES=y
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
 CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_KMOD=y
-
-#
-# Block layer
-#
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
 # CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
 # IO Schedulers
@@ -102,9 +98,11 @@ CONFIG_IOSCHED_CFQ=y
 # CONFIG_DEFAULT_CFQ is not set
 CONFIG_DEFAULT_NOOP=y
 CONFIG_DEFAULT_IOSCHED="noop"
+CONFIG_CLASSIC_RCU=y
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
+# CONFIG_FREEZER is not set
 
 #
 # Blackfin Processor Options
@@ -113,6 +111,10 @@ CONFIG_PREEMPT_NONE=y
 #
 # Processor and Board Settings
 #
+# CONFIG_BF512 is not set
+# CONFIG_BF514 is not set
+# CONFIG_BF516 is not set
+# CONFIG_BF518 is not set
 # CONFIG_BF522 is not set
 # CONFIG_BF523 is not set
 # CONFIG_BF524 is not set
@@ -125,22 +127,31 @@ CONFIG_PREEMPT_NONE=y
 # CONFIG_BF534 is not set
 # CONFIG_BF536 is not set
 CONFIG_BF537=y
+# CONFIG_BF538 is not set
+# CONFIG_BF539 is not set
 # CONFIG_BF542 is not set
+# CONFIG_BF542M is not set
 # CONFIG_BF544 is not set
+# CONFIG_BF544M is not set
 # CONFIG_BF547 is not set
+# CONFIG_BF547M is not set
 # CONFIG_BF548 is not set
+# CONFIG_BF548M is not set
 # CONFIG_BF549 is not set
+# CONFIG_BF549M is not set
 # CONFIG_BF561 is not set
+CONFIG_BF_REV_MIN=2
+CONFIG_BF_REV_MAX=3
 # CONFIG_BF_REV_0_0 is not set
 # CONFIG_BF_REV_0_1 is not set
 CONFIG_BF_REV_0_2=y
 # CONFIG_BF_REV_0_3 is not set
 # CONFIG_BF_REV_0_4 is not set
 # CONFIG_BF_REV_0_5 is not set
+# CONFIG_BF_REV_0_6 is not set
 # CONFIG_BF_REV_ANY is not set
 # CONFIG_BF_REV_NONE is not set
 CONFIG_BF53x=y
-CONFIG_BFIN_SINGLE_CORE=y
 CONFIG_MEM_MT48LC16M16A2TG_75=y
 CONFIG_IRQ_PLL_WAKEUP=7
 CONFIG_IRQ_RTC=8
@@ -150,7 +161,6 @@ CONFIG_IRQ_SPORT0_TX=9
 CONFIG_IRQ_SPORT1_RX=9
 CONFIG_IRQ_SPORT1_TX=9
 CONFIG_IRQ_TWI=10
-CONFIG_IRQ_SPI=10
 CONFIG_IRQ_UART0_RX=10
 CONFIG_IRQ_UART0_TX=10
 CONFIG_IRQ_UART1_RX=10
@@ -169,11 +179,12 @@ CONFIG_IRQ_PORTG_INTB=12
 CONFIG_IRQ_MEM_DMA0=13
 CONFIG_IRQ_MEM_DMA1=13
 CONFIG_IRQ_WATCH=13
+CONFIG_IRQ_SPI=10
 # CONFIG_BFIN537_STAMP is not set
 CONFIG_BFIN537_BLUETECHNIX_CM=y
+# CONFIG_BFIN537_BLUETECHNIX_TCM is not set
 # CONFIG_PNAV10 is not set
 # CONFIG_CAMSIG_MINOTAUR is not set
-# CONFIG_GENERIC_BF537_BOARD is not set
 
 #
 # BF537 Specific Configuration
@@ -196,6 +207,7 @@ CONFIG_IRQ_PROG_INTA=12
 # Board customizations
 #
 # CONFIG_CMDLINE_BOOL is not set
+CONFIG_BOOT_LOAD=0x1000
 
 #
 # Clock/PLL Setup
@@ -215,13 +227,20 @@ CONFIG_HZ_250=y
 # CONFIG_HZ_300 is not set
 # CONFIG_HZ_1000 is not set
 CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
+# CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 
 #
-# Memory Setup
+# Misc
 #
-CONFIG_MAX_MEM_SIZE=32
-CONFIG_MEM_ADD_WIDTH=9
-CONFIG_BOOT_LOAD=0x1000
 CONFIG_BFIN_SCRATCH_REG_RETN=y
 # CONFIG_BFIN_SCRATCH_REG_RETE is not set
 # CONFIG_BFIN_SCRATCH_REG_CYCLES is not set
@@ -248,6 +267,12 @@ CONFIG_IP_CHECKSUM_L1=y
 CONFIG_CACHELINE_ALIGNED_L1=y
 CONFIG_SYSCALL_TAB_L1=y
 CONFIG_CPLB_SWITCH_TAB_L1=y
+CONFIG_APP_STACK_L1=y
+
+#
+# Speed Optimizations
+#
+CONFIG_BFIN_INS_LOWOVERHEAD=y
 CONFIG_RAMKERNEL=y
 # CONFIG_ROMKERNEL is not set
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -256,12 +281,14 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_RESOURCES_64BIT is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
-CONFIG_LARGE_ALLOCS=y
+CONFIG_VIRT_TO_BUS=y
 # CONFIG_BFIN_GPTIMERS is not set
+# CONFIG_DMA_UNCACHED_4M is not set
 # CONFIG_DMA_UNCACHED_2M is not set
 CONFIG_DMA_UNCACHED_1M=y
 # CONFIG_DMA_UNCACHED_NONE is not set
@@ -275,7 +302,6 @@ CONFIG_BFIN_DCACHE=y
 # CONFIG_BFIN_ICACHE_LOCK is not set
 CONFIG_BFIN_WB=y
 # CONFIG_BFIN_WT is not set
-CONFIG_L1_MAX_PIECE=16
 # CONFIG_MPU is not set
 
 #
@@ -304,36 +330,28 @@ CONFIG_BANK_3=0xFFC2
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
 #
-# CONFIG_PCI is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 
 #
-# PCCARD (PCMCIA/CardBus) support
-#
-
-#
 # Executable file formats
 #
 CONFIG_BINFMT_ELF_FDPIC=y
 CONFIG_BINFMT_FLAT=y
 CONFIG_BINFMT_ZFLAT=y
 CONFIG_BINFMT_SHARED_FLAT=y
+# CONFIG_HAVE_AOUT is not set
 # CONFIG_BINFMT_MISC is not set
 
 #
 # Power management options
 #
 # CONFIG_PM is not set
-# CONFIG_PM_WAKEUP_BY_GPIO is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
 
 #
 # CPU Frequency scaling
 #
 # CONFIG_CPU_FREQ is not set
-
-#
-# Networking
-#
 CONFIG_NET=y
 
 #
@@ -346,6 +364,7 @@ CONFIG_XFRM=y
 # CONFIG_XFRM_USER is not set
 # CONFIG_XFRM_SUB_POLICY is not set
 # CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -358,7 +377,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -367,6 +386,7 @@ CONFIG_SYN_COOKIES=y
 CONFIG_INET_XFRM_MODE_TRANSPORT=y
 CONFIG_INET_XFRM_MODE_TUNNEL=y
 CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_DIAG=y
 CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
@@ -374,8 +394,6 @@ CONFIG_TCP_CONG_CUBIC=y
 CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TCP_MD5SIG is not set
 # CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
 # CONFIG_NETLABEL is not set
 # CONFIG_NETWORK_SECMARK is not set
 # CONFIG_NETFILTER is not set
@@ -384,6 +402,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
 # CONFIG_VLAN_8021Q is not set
 # CONFIG_DECNET is not set
 # CONFIG_LLC2 is not set
@@ -393,10 +412,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
 # CONFIG_NET_SCHED is not set
 
 #
@@ -404,18 +419,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-
-#
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_MAC80211 is not set
-# CONFIG_IEEE80211 is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
 # CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
 
 #
 # Device Drivers
@@ -427,10 +438,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 CONFIG_STANDALONE=y
 CONFIG_PREVENT_FIRMWARE_BUILD=y
 # CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
 # CONFIG_CONNECTOR is not set
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
@@ -438,6 +445,7 @@ CONFIG_MTD=y
 CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
 
 #
 # User Modules And Translation Layers
@@ -450,12 +458,15 @@ CONFIG_MTD_BLOCK=y
 # CONFIG_INFTL is not set
 # CONFIG_RFD_FTL is not set
 # CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
 
 #
 # RAM/ROM/Flash chip drivers
 #
-# CONFIG_MTD_CFI is not set
+CONFIG_MTD_CFI=y
 # CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
 CONFIG_MTD_MAP_BANK_WIDTH_1=y
 CONFIG_MTD_MAP_BANK_WIDTH_2=y
 CONFIG_MTD_MAP_BANK_WIDTH_4=y
@@ -466,6 +477,10 @@ CONFIG_MTD_CFI_I1=y
 CONFIG_MTD_CFI_I2=y
 # CONFIG_MTD_CFI_I4 is not set
 # CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_RAM=y
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
@@ -473,7 +488,8 @@ CONFIG_MTD_RAM=y
 #
 # Mapping drivers for chip access
 #
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_GPIO_ADDR=y
 CONFIG_MTD_UCLINUX=y
 # CONFIG_MTD_PLATRAM is not set
 
@@ -498,33 +514,23 @@ CONFIG_MTD_UCLINUX=y
 # UBI - Unsorted block images
 #
 # CONFIG_MTD_UBI is not set
-
-#
-# Parallel port support
-#
 # CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNPACPI is not set
-
-#
-# Block devices
-#
+CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
 # CONFIG_ATA_OVER_ETH is not set
-
-#
-# Misc devices
-#
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
 #
@@ -532,22 +538,17 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
 #
 # CONFIG_RAID_ATTRS is not set
 # CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
 # CONFIG_SCSI_NETLINK is not set
 # CONFIG_ATA is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
 # CONFIG_MD is not set
-
-#
-# Network device support
-#
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
+# CONFIG_VETH is not set
 CONFIG_PHYLIB=y
 
 #
@@ -561,46 +562,44 @@ CONFIG_PHYLIB=y
 # CONFIG_VITESSE_PHY is not set
 # CONFIG_SMSC_PHY is not set
 # CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
 # CONFIG_FIXED_PHY is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
+# CONFIG_MDIO_BITBANG is not set
 CONFIG_NET_ETHERNET=y
 CONFIG_MII=y
-# CONFIG_SMC91X is not set
 CONFIG_BFIN_MAC=y
 CONFIG_BFIN_MAC_USE_L1=y
 CONFIG_BFIN_TX_DESC_NUM=10
 CONFIG_BFIN_RX_DESC_NUM=20
 # CONFIG_BFIN_MAC_RMII is not set
+# CONFIG_SMC91X is not set
 # CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
 # CONFIG_WAN is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
 # CONFIG_NETCONSOLE is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
 # CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
 # CONFIG_PHONE is not set
 
 #
@@ -618,15 +617,17 @@ CONFIG_NETDEV_10000=y
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PFLAGS is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=y
 # CONFIG_BFIN_TIMER_LATENCY is not set
+# CONFIG_SIMPLE_GPIO is not set
 # CONFIG_VT is not set
 # CONFIG_DEVKMEM is not set
+# CONFIG_BFIN_JTAG_COMM is not set
 # CONFIG_SERIAL_NONSTANDARD is not set
 
 #
@@ -655,138 +656,119 @@ CONFIG_UNIX98_PTYS=y
 # CAN, the car bus and industrial fieldbus
 #
 # CONFIG_CAN4LINUX is not set
-
-#
-# IPMI
-#
 # CONFIG_IPMI_HANDLER is not set
-# CONFIG_WATCHDOG is not set
 # CONFIG_HW_RANDOM is not set
-# CONFIG_GEN_RTC is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
 
 #
-# TPM devices
+# Memory mapped GPIO expanders:
 #
-# CONFIG_TCG_TPM is not set
-# CONFIG_I2C is not set
 
 #
-# SPI support
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
 #
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
 
 #
-# Dallas's 1-wire bus
+# SPI GPIO expanders:
 #
 # CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_ABITUGURU is not set
 # CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
 # CONFIG_SENSORS_SMSC47B397 is not set
 # CONFIG_SENSORS_VT1211 is not set
 # CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
 # CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
 
 #
 # Multifunction device drivers
 #
+# CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
 
 #
 # Multimedia devices
 #
+
+#
+# Multimedia core support
+#
 # CONFIG_VIDEO_DEV is not set
 # CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
+# CONFIG_VIDEO_MEDIA is not set
 
 #
-# Graphics support
+# Multimedia drivers
 #
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_DAB is not set
 
 #
-# Display device support
+# Graphics support
 #
-# CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
 # CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
 
 #
-# Sound
+# Display device support
 #
+# CONFIG_DISPLAY_SUPPORT is not set
 # CONFIG_SOUND is not set
-
-#
-# USB support
-#
+CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
 # CONFIG_USB_ARCH_HAS_EHCI is not set
 # CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
 
 #
 # Enable Host or Gadget support to see Inventra options
 #
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
 #
 # CONFIG_USB_GADGET is not set
 # CONFIG_MMC is not set
-
-#
-# LED devices
-#
+# CONFIG_MEMSTICK is not set
 # CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# InfiniBand support
-#
-
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-
-#
-# Real Time Clock
-#
+# CONFIG_ACCESSIBILITY is not set
 # CONFIG_RTC_CLASS is not set
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# PBX support
-#
-# CONFIG_PBX is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
 
 #
 # File systems
@@ -796,20 +778,18 @@ CONFIG_EXT2_FS_XATTR=y
 # CONFIG_EXT2_FS_POSIX_ACL is not set
 # CONFIG_EXT2_FS_SECURITY is not set
 # CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+# CONFIG_DNOTIFY is not set
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 # CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 # CONFIG_FUSE_FS is not set
@@ -835,7 +815,6 @@ CONFIG_PROC_SYSCTL=y
 CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
 # CONFIG_CONFIGFS_FS is not set
 
 #
@@ -848,60 +827,53 @@ CONFIG_RAMFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
-# CONFIG_YAFFS_FS is not set
 # CONFIG_JFFS2_FS is not set
+# CONFIG_YAFFS_FS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
 
 #
 # Partition Types
 #
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
 # CONFIG_NLS is not set
-
-#
-# Distributed Lock Manager
-#
 # CONFIG_DLM is not set
 
 #
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
 # Kernel hacking
 #
 # CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
 # CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_SECTION_MISMATCH=y
 # CONFIG_DEBUG_KERNEL is not set
 # CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_DEBUG_VERBOSE=y
 CONFIG_DEBUG_MMRS=y
+# CONFIG_DEBUG_DOUBLEFAULT is not set
 CONFIG_DEBUG_HUNT_FOR_ZERO=y
 CONFIG_DEBUG_BFIN_HWTRACE_ON=y
 CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_OFF=y
@@ -919,13 +891,95 @@ CONFIG_ACCESS_CHECK=y
 #
 # CONFIG_KEYS is not set
 CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_NETWORK is not set
-CONFIG_SECURITY_CAPABILITIES=y
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
 
 #
-# Cryptographic options
+# Random Number Generation
 #
-# CONFIG_CRYPTO is not set
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
 
 #
 # Library routines
@@ -933,11 +987,12 @@ CONFIG_SECURITY_CAPABILITIES=y
 CONFIG_BITREVERSE=y
 CONFIG_CRC_CCITT=m
 # CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
 # CONFIG_CRC_ITU_T is not set
 CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/CM-BF537U_defconfig b/arch/blackfin/configs/CM-BF537U_defconfig
index 569523c1c034..80211303f6b9 100644
--- a/arch/blackfin/configs/CM-BF537U_defconfig
+++ b/arch/blackfin/configs/CM-BF537U_defconfig
@@ -49,7 +49,7 @@ CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 # CONFIG_HOTPLUG is not set
@@ -355,7 +355,7 @@ CONFIG_IP_FIB_HASH=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -556,9 +556,9 @@ CONFIG_SMC91X=y
 # CONFIG_BFIN_MAC is not set
 # CONFIG_SMSC911X is not set
 # CONFIG_DM9000 is not set
-CONFIG_NETDEV_1000=y
+# CONFIG_NETDEV_1000 is not set
 # CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -652,6 +652,10 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
 #
 # SPI support
 #
diff --git a/arch/blackfin/configs/CM-BF548_defconfig b/arch/blackfin/configs/CM-BF548_defconfig
index 035b635e599c..dd815f0d1517 100644
--- a/arch/blackfin/configs/CM-BF548_defconfig
+++ b/arch/blackfin/configs/CM-BF548_defconfig
@@ -49,7 +49,7 @@ CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 CONFIG_HOTPLUG=y
@@ -125,9 +125,9 @@ CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_BF548=y
 # CONFIG_BF549 is not set
 # CONFIG_BF561 is not set
-CONFIG_BF_REV_0_0=y
+# CONFIG_BF_REV_0_0 is not set
 # CONFIG_BF_REV_0_1 is not set
-# CONFIG_BF_REV_0_2 is not set
+CONFIG_BF_REV_0_2=y
 # CONFIG_BF_REV_0_3 is not set
 # CONFIG_BF_REV_0_4 is not set
 # CONFIG_BF_REV_0_5 is not set
@@ -422,7 +422,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -811,6 +811,10 @@ CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=100
 # CONFIG_I2C_DEBUG_BUS is not set
 # CONFIG_I2C_DEBUG_CHIP is not set
 
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
 #
 # SPI support
 #
diff --git a/arch/blackfin/configs/CM-BF561_defconfig b/arch/blackfin/configs/CM-BF561_defconfig
index 7015e42ccce5..16c198bd40c5 100644
--- a/arch/blackfin/configs/CM-BF561_defconfig
+++ b/arch/blackfin/configs/CM-BF561_defconfig
@@ -49,7 +49,7 @@ CONFIG_FAIR_USER_SCHED=y
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 # CONFIG_HOTPLUG is not set
@@ -389,7 +389,7 @@ CONFIG_IP_FIB_HASH=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -569,9 +569,9 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_TAH is not set
 # CONFIG_IBM_NEW_EMAC_EMAC4 is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
+# CONFIG_NETDEV_1000 is not set
 # CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -646,6 +646,10 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
 #
 # SPI support
 #
diff --git a/arch/blackfin/configs/H8606_defconfig b/arch/blackfin/configs/H8606_defconfig
index dfc8e1ddd77a..6b4c1a982383 100644
--- a/arch/blackfin/configs/H8606_defconfig
+++ b/arch/blackfin/configs/H8606_defconfig
@@ -48,7 +48,7 @@ CONFIG_SYSFS_DEPRECATED=y
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 CONFIG_HOTPLUG=y
@@ -347,7 +347,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -594,8 +594,8 @@ CONFIG_MII=y
 # CONFIG_SMC91X is not set
 # CONFIG_SMSC911X is not set
 CONFIG_DM9000=y
-CONFIG_NETDEV_1000=y
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 # CONFIG_AX88180 is not set
 
 #
diff --git a/arch/blackfin/configs/IP0X_defconfig b/arch/blackfin/configs/IP0X_defconfig
index 95a5f91aebaa..1ec9ae2e964b 100644
--- a/arch/blackfin/configs/IP0X_defconfig
+++ b/arch/blackfin/configs/IP0X_defconfig
@@ -49,7 +49,7 @@ CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 # CONFIG_HOTPLUG is not set
@@ -355,7 +355,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -672,9 +672,9 @@ CONFIG_MII=y
 # CONFIG_SMC91X is not set
 # CONFIG_SMSC911X is not set
 CONFIG_DM9000=y
-CONFIG_NETDEV_1000=y
+# CONFIG_NETDEV_1000 is not set
 # CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig
index 78e24080e7f1..09701f907e9b 100644
--- a/arch/blackfin/configs/PNAV-10_defconfig
+++ b/arch/blackfin/configs/PNAV-10_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28.7
+# Linux kernel version: 2.6.28.10
 #
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
@@ -40,26 +40,26 @@ CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_NAMESPACES is not set
 # CONFIG_BLK_DEV_INITRD is not set
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SYSCTL is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 # CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 # CONFIG_AIO is not set
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -68,7 +68,6 @@ CONFIG_SLAB=y
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
 CONFIG_TINY_SHMEM=y
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
@@ -229,7 +228,10 @@ CONFIG_HZ=250
 # CONFIG_SCHED_HRTICK is not set
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_TICKSOURCE_GPTMR0 is not set
+CONFIG_TICKSOURCE_CORETMR=y
 # CONFIG_CYCLES_CLOCKSOURCE is not set
+# CONFIG_GPTMR0_CLOCKSOURCE is not set
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -374,7 +376,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
@@ -598,9 +600,8 @@ CONFIG_BFIN_MAC_RMII=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
-CONFIG_NETDEV_1000=y
-# CONFIG_AX88180 is not set
-CONFIG_NETDEV_10000=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
 
 #
 # Wireless LAN
@@ -640,11 +641,11 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
-# CONFIG_TOUCHSCREEN_ADS7846 is not set
 CONFIG_TOUCHSCREEN_AD7877=y
 # CONFIG_TOUCHSCREEN_AD7879_I2C is not set
 # CONFIG_TOUCHSCREEN_AD7879_SPI is not set
 # CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
@@ -676,14 +677,14 @@ CONFIG_INPUT_UINPUT=y
 # Character devices
 #
 # CONFIG_AD9960 is not set
-# CONFIG_SPI_ADC_BF533 is not set
-# CONFIG_BF5xx_PPIFCD is not set
+CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_PPI is not set
+# CONFIG_BFIN_PPIFCD is not set
 # CONFIG_BFIN_SIMPLE_TIMER is not set
-# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPI_ADC is not set
 CONFIG_BFIN_SPORT=y
 # CONFIG_BFIN_TIMER_LATENCY is not set
-CONFIG_TWI_LCD=m
-CONFIG_BFIN_DMA_INTERFACE=m
+# CONFIG_BFIN_TWI_LCD is not set
 # CONFIG_SIMPLE_GPIO is not set
 # CONFIG_VT is not set
 CONFIG_DEVKMEM=y
@@ -796,6 +797,7 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
 # CONFIG_POWER_SUPPLY is not set
 CONFIG_HWMON=y
 # CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD5252 is not set
 # CONFIG_SENSORS_AD7414 is not set
 # CONFIG_SENSORS_AD7418 is not set
 # CONFIG_SENSORS_ADCXX is not set
@@ -867,6 +869,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
 # CONFIG_REGULATOR is not set
@@ -1111,6 +1114,7 @@ CONFIG_SYSFS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
 CONFIG_YAFFS_FS=y
 CONFIG_YAFFS_YAFFS1=y
 # CONFIG_YAFFS_9BYTE_TAGS is not set
@@ -1121,7 +1125,6 @@ CONFIG_YAFFS_AUTO_YAFFS2=y
 # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
 # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
 CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
-# CONFIG_JFFS2_FS is not set
 # CONFIG_CRAMFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
@@ -1213,7 +1216,6 @@ CONFIG_FRAME_WARN=1024
 # CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_SYSCTL_SYSCALL_CHECK is not set
 
 #
 # Tracers
@@ -1343,7 +1345,6 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
diff --git a/arch/blackfin/configs/SRV1_defconfig b/arch/blackfin/configs/SRV1_defconfig
index 2bc0779d22ea..ec84a53daae9 100644
--- a/arch/blackfin/configs/SRV1_defconfig
+++ b/arch/blackfin/configs/SRV1_defconfig
@@ -52,7 +52,7 @@ CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -373,7 +373,7 @@ CONFIG_IP_PNP=y
 # CONFIG_NET_IPIP is not set
 # CONFIG_NET_IPGRE is not set
 # CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
+# CONFIG_SYN_COOKIES is not set
 # CONFIG_INET_AH is not set
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
diff --git a/arch/blackfin/configs/TCM-BF537_defconfig b/arch/blackfin/configs/TCM-BF537_defconfig
index e65b3a49214f..6e2796240fdc 100644
--- a/arch/blackfin/configs/TCM-BF537_defconfig
+++ b/arch/blackfin/configs/TCM-BF537_defconfig
@@ -42,7 +42,7 @@ CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_SYSCTL is not set
 CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
-CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
 # CONFIG_HOTPLUG is not set
@@ -537,7 +537,30 @@ CONFIG_SPI_BFIN=y
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-# CONFIG_GPIOLIB is not set
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index 94b2a9b19451..7bbf44e4ddf9 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -208,6 +208,6 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
 #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
 #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 
 #endif                          /* __ARCH_BLACKFIN_ATOMIC __ */
diff --git a/arch/blackfin/include/asm/bitsperlong.h b/arch/blackfin/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/blackfin/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h
index 1b040f5b4feb..94697f0f6f40 100644
--- a/arch/blackfin/include/asm/cacheflush.h
+++ b/arch/blackfin/include/asm/cacheflush.h
@@ -30,7 +30,8 @@
 #ifndef _BLACKFIN_CACHEFLUSH_H
 #define _BLACKFIN_CACHEFLUSH_H
 
-extern void blackfin_icache_dcache_flush_range(unsigned long start_address, unsigned long end_address);
+#include <asm/blackfin.h>       /* for SSYNC() */
+
 extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
 extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
 extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
@@ -54,32 +55,28 @@ extern void blackfin_invalidate_entire_dcache(void);
 
 static inline void flush_icache_range(unsigned start, unsigned end)
 {
-#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_ICACHE)
-
-# if defined(CONFIG_BFIN_WT)
-        blackfin_icache_flush_range((start), (end));
-        flush_icache_range_others(start, end);
-# else
-        blackfin_icache_dcache_flush_range((start), (end));
-# endif
-
-#else
+#if defined(CONFIG_BFIN_WB)
+        blackfin_dcache_flush_range(start, end);
+#endif
 
-# if defined(CONFIG_BFIN_ICACHE)
-        blackfin_icache_flush_range((start), (end));
+        /* Make sure all write buffers in the data side of the core
+         * are flushed before trying to invalidate the icache.  This
+         * needs to be after the data flush and before the icache
+         * flush so that the SSYNC does the right thing in preventing
+         * the instruction prefetcher from hitting things in cached
+         * memory at the wrong time -- it runs much further ahead than
+         * the pipeline.
+         */
+        SSYNC();
+#if defined(CONFIG_BFIN_ICACHE)
+        blackfin_icache_flush_range(start, end);
         flush_icache_range_others(start, end);
-# endif
-# if defined(CONFIG_BFIN_DCACHE)
-        blackfin_dcache_flush_range((start), (end));
-# endif
-
 #endif
 }
 
 #define copy_to_user_page(vma, page, vaddr, dst, src, len)              \
 do { memcpy(dst, src, len);                                             \
      flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len));    \
-     flush_icache_range_others((unsigned long) (dst), (unsigned long) (dst) + (len));\
 } while (0)
 
 #define copy_from_user_page(vma, page, vaddr, dst, src, len)    memcpy(dst, src, len)
@@ -111,6 +108,11 @@ static inline int bfin_addr_dcachable(unsigned long addr)
                 addr >= _ramend && addr < physical_mem_end)
                 return 1;
 
+#ifndef CONFIG_BFIN_L2_NOT_CACHED
+        if (addr >= L2_START && addr < L2_START + L2_LENGTH)
+                return 1;
+#endif
+
         return 0;
 }
 
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index ad566ff9ad16..a75a6a9f0949 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -53,29 +53,32 @@
 #define SDRAM_DGENERIC   (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW  | CPLB_COMMON)
 #endif
 
+#define SDRAM_DNON_CHBL  (CPLB_COMMON)
+#define SDRAM_EBIU       (CPLB_COMMON)
+#define SDRAM_OOPS       (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
+
 #define L1_DMEMORY       (CPLB_LOCK | CPLB_COMMON)
 
 #ifdef CONFIG_SMP
-#define L2_ATTR           (INITIAL_T | I_CPLB | D_CPLB)
-#define L2_IMEMORY         (CPLB_COMMON | CPLB_LOCK)
-#define L2_DMEMORY         (CPLB_COMMON | CPLB_LOCK)
+#define L2_ATTR          (INITIAL_T | I_CPLB | D_CPLB)
+#define L2_IMEMORY       (CPLB_COMMON)
+#define L2_DMEMORY       (CPLB_LOCK | CPLB_COMMON)
 
 #else
-#ifdef CONFIG_BFIN_L2_CACHEABLE
-#define L2_IMEMORY        (SDRAM_IGENERIC)
-#define L2_DMEMORY        (SDRAM_DGENERIC)
-#else
-#define L2_IMEMORY        (CPLB_COMMON)
-#define L2_DMEMORY        (CPLB_COMMON)
-#endif /* CONFIG_BFIN_L2_CACHEABLE */
-
-#define L2_ATTR           (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB)
+#define L2_ATTR          (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB)
+#define L2_IMEMORY       (SDRAM_IGENERIC)
+
+# if defined(CONFIG_BFIN_L2_WB)
+# define L2_DMEMORY      (CPLB_L1_CHBL | CPLB_COMMON)
+# elif defined(CONFIG_BFIN_L2_WT)
+# define L2_DMEMORY      (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW  | CPLB_COMMON)
+# elif defined(CONFIG_BFIN_L2_NOT_CACHED)
+# define L2_DMEMORY      (CPLB_COMMON)
+# else
+# define L2_DMEMORY      (0)
+# endif
 #endif /* CONFIG_SMP */
 
-#define SDRAM_DNON_CHBL  (CPLB_COMMON)
-#define SDRAM_EBIU       (CPLB_COMMON)
-#define SDRAM_OOPS       (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
-
 #define SIZE_1K 0x00000400      /* 1K */
 #define SIZE_4K 0x00001000      /* 4K */
 #define SIZE_1M 0x00100000      /* 1M */
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index e4f7b8043f02..c9a59622e23f 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -206,10 +206,16 @@ static inline unsigned long get_dma_curr_addr(unsigned int channel)
 
 static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize)
 {
+        /* Make sure the internal data buffers in the core are drained
+         * so that the DMA descriptors are completely written when the
+         * DMA engine goes to fetch them below.
+         */
+        SSYNC();
+
+        dma_ch[channel].regs->next_desc_ptr = sg;
         dma_ch[channel].regs->cfg =
                 (dma_ch[channel].regs->cfg & ~(0xf << 8)) |
                 ((ndsize & 0xf) << 8);
-        dma_ch[channel].regs->next_desc_ptr = sg;
 }
 
 static inline int dma_channel_active(unsigned int channel)
@@ -253,5 +259,7 @@ static inline void clear_dma_irqstat(unsigned int channel)
 void *dma_memcpy(void *dest, const void *src, size_t count);
 void *safe_dma_memcpy(void *dest, const void *src, size_t count);
 void blackfin_dma_early_init(void);
+void early_dma_memcpy(void *dest, const void *src, size_t count);
+void early_dma_memcpy_done(void);
 
 #endif
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index cdbfcfc30f6a..230e1605d3fb 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -55,50 +55,50 @@ do {											\
 #define ELF_FDPIC_CORE_EFLAGS   EF_BFIN_FDPIC
 #define ELF_EXEC_PAGESIZE       4096
 
-#define R_unused0       0       /* relocation type 0 is not defined */
-#define R_pcrel5m2      1       /*LSETUP part a */
-#define R_unused1       2       /* relocation type 2 is not defined */
-#define R_pcrel10       3       /* type 3, if cc jump <target>  */
-#define R_pcrel12_jump  4       /* type 4, jump <target> */
-#define R_rimm16        5       /* type 0x5, rN = <target> */
-#define R_luimm16       6       /* # 0x6, preg.l=<target> Load imm 16 to lower half */
-#define R_huimm16       7       /* # 0x7, preg.h=<target> Load imm 16 to upper half */
-#define R_pcrel12_jump_s 8      /* # 0x8 jump.s <target> */
-#define R_pcrel24_jump_x 9      /* # 0x9 jump.x <target> */
-#define R_pcrel24       10      /* # 0xa call <target> , not expandable */
-#define R_unusedb       11      /* # 0xb not generated */
-#define R_unusedc       12      /* # 0xc  not used */
-#define R_pcrel24_jump_l 13     /*0xd jump.l <target> */
-#define R_pcrel24_call_x 14     /* 0xE, call.x <target> if <target> is above 24 bit limit call through P1 */
-#define R_var_eq_symb    15     /* 0xf, linker should treat it same as 0x12 */
-#define R_byte_data      16     /* 0x10, .byte var = symbol */
-#define R_byte2_data     17     /* 0x11, .byte2 var = symbol */
-#define R_byte4_data     18     /* 0x12, .byte4 var = symbol and .var var=symbol */
-#define R_pcrel11        19     /* 0x13, lsetup part b */
-#define R_unused14      20      /* 0x14, undefined */
-#define R_unused15       21     /* not generated by VDSP 3.5 */
+#define R_BFIN_UNUSED0         0   /* relocation type 0 is not defined */
+#define R_BFIN_PCREL5M2        1   /* LSETUP part a */
+#define R_BFIN_UNUSED1         2   /* relocation type 2 is not defined */
+#define R_BFIN_PCREL10         3   /* type 3, if cc jump <target> */
+#define R_BFIN_PCREL12_JUMP    4   /* type 4, jump <target> */
+#define R_BFIN_RIMM16          5   /* type 0x5, rN = <target> */
+#define R_BFIN_LUIMM16         6   /* # 0x6, preg.l=<target> Load imm 16 to lower half */
+#define R_BFIN_HUIMM16         7   /* # 0x7, preg.h=<target> Load imm 16 to upper half */
+#define R_BFIN_PCREL12_JUMP_S  8   /* # 0x8 jump.s <target> */
+#define R_BFIN_PCREL24_JUMP_X  9   /* # 0x9 jump.x <target> */
+#define R_BFIN_PCREL24         10  /* # 0xa call <target> , not expandable */
+#define R_BFIN_UNUSEDB         11  /* # 0xb not generated */
+#define R_BFIN_UNUSEDC         12  /* # 0xc  not used */
+#define R_BFIN_PCREL24_JUMP_L  13  /* 0xd jump.l <target> */
+#define R_BFIN_PCREL24_CALL_X  14  /* 0xE, call.x <target> if <target> is above 24 bit limit call through P1 */
+#define R_BFIN_VAR_EQ_SYMB     15  /* 0xf, linker should treat it same as 0x12 */
+#define R_BFIN_BYTE_DATA       16  /* 0x10, .byte var = symbol */
+#define R_BFIN_BYTE2_DATA      17  /* 0x11, .byte2 var = symbol */
+#define R_BFIN_BYTE4_DATA      18  /* 0x12, .byte4 var = symbol and .var var=symbol */
+#define R_BFIN_PCREL11         19  /* 0x13, lsetup part b */
+#define R_BFIN_UNUSED14        20  /* 0x14, undefined */
+#define R_BFIN_UNUSED15        21  /* not generated by VDSP 3.5 */
 
 /* arithmetic relocations */
-#define R_push           0xE0
-#define R_const          0xE1
-#define R_add            0xE2
-#define R_sub            0xE3
-#define R_mult           0xE4
-#define R_div            0xE5
-#define R_mod            0xE6
-#define R_lshift         0xE7
-#define R_rshift         0xE8
-#define R_and            0xE9
-#define R_or             0xEA
-#define R_xor            0xEB
-#define R_land           0xEC
-#define R_lor            0xED
-#define R_len            0xEE
-#define R_neg            0xEF
-#define R_comp           0xF0
-#define R_page           0xF1
-#define R_hwpage         0xF2
-#define R_addr           0xF3
+#define R_BFIN_PUSH            0xE0
+#define R_BFIN_CONST           0xE1
+#define R_BFIN_ADD             0xE2
+#define R_BFIN_SUB             0xE3
+#define R_BFIN_MULT            0xE4
+#define R_BFIN_DIV             0xE5
+#define R_BFIN_MOD             0xE6
+#define R_BFIN_LSHIFT          0xE7
+#define R_BFIN_RSHIFT          0xE8
+#define R_BFIN_AND             0xE9
+#define R_BFIN_OR              0xEA
+#define R_BFIN_XOR             0xEB
+#define R_BFIN_LAND            0xEC
+#define R_BFIN_LOR             0xED
+#define R_BFIN_LEN             0xEE
+#define R_BFIN_NEG             0xEF
+#define R_BFIN_COMP            0xF0
+#define R_BFIN_PAGE            0xF1
+#define R_BFIN_HWPAGE          0xF2
+#define R_BFIN_ADDR            0xF3
 
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
    use of this is to invoke "./ld.so someprog" to test out a new version of
diff --git a/arch/blackfin/include/asm/entry.h b/arch/blackfin/include/asm/entry.h
index b30a2968e274..ec58efc130e6 100644
--- a/arch/blackfin/include/asm/entry.h
+++ b/arch/blackfin/include/asm/entry.h
@@ -35,21 +35,39 @@
 #else
 # define LOAD_IPIPE_IPEND
 #endif
+
+#ifndef CONFIG_EXACT_HWERR
+/* As a debugging aid - we save IPEND when DEBUG_KERNEL is on,
+ * otherwise it is a waste of cycles.
+ */
+# ifndef CONFIG_DEBUG_KERNEL
+#define INTERRUPT_ENTRY(N)                                              \
+    [--sp] = SYSCFG;                                                    \
+    [--sp] = P0;        /*orig_p0*/                                     \
+    [--sp] = R0;        /*orig_r0*/                                     \
+    [--sp] = (R7:0,P5:0);                                               \
+    R0 = (N);                                                           \
+    LOAD_IPIPE_IPEND                                                    \
+    jump __common_int_entry;
+# else /* CONFIG_DEBUG_KERNEL */
 #define INTERRUPT_ENTRY(N)                                              \
     [--sp] = SYSCFG;                                                    \
-                                                                        \
     [--sp] = P0;        /*orig_p0*/                                     \
     [--sp] = R0;        /*orig_r0*/                                     \
     [--sp] = (R7:0,P5:0);                                               \
+    p0.l = lo(IPEND);                                                   \
+    p0.h = hi(IPEND);                                                   \
+    r1 = [p0];                                                          \
     R0 = (N);                                                           \
     LOAD_IPIPE_IPEND                                                    \
     jump __common_int_entry;
+# endif /* CONFIG_DEBUG_KERNEL */
 
 /* For timer interrupts, we need to save IPEND, since the user_mode
-           macro accesses it to determine where to account time.  */
+ *macro accesses it to determine where to account time.
+ */
 #define TIMER_INTERRUPT_ENTRY(N)                                        \
     [--sp] = SYSCFG;                                                    \
-                                                                        \
     [--sp] = P0;        /*orig_p0*/                                     \
     [--sp] = R0;        /*orig_r0*/                                     \
     [--sp] = (R7:0,P5:0);                                               \
@@ -58,6 +76,74 @@
     r1 = [p0];                                                          \
     R0 = (N);                                                           \
     jump __common_int_entry;
+#else /* CONFIG_EXACT_HWERR is defined */
+
+/* if we want hardware error to be exact, we need to do a SSYNC (which forces
+ * read/writes to complete to the memory controllers), and check to see that
+ * caused a pending HW error condition. If so, we assume it was caused by user
+ * space, by setting the same interrupt that we are in (so it goes off again)
+ * and context restore, and a RTI (without servicing anything). This should
+ * cause the pending HWERR to fire, and when that is done, this interrupt will
+ * be re-serviced properly.
+ * As you can see by the code - we actually need to do two SSYNCS - one to
+ * make sure the read/writes complete, and another to make sure the hardware
+ * error is recognized by the core.
+ */
+#define INTERRUPT_ENTRY(N)                                              \
+    SSYNC;                                                              \
+    SSYNC;                                                              \
+    [--sp] = SYSCFG;                                                    \
+    [--sp] = P0;        /*orig_p0*/                                     \
+    [--sp] = R0;        /*orig_r0*/                                     \
+    [--sp] = (R7:0,P5:0);                                               \
+    R1 = ASTAT;                                                         \
+    P0.L = LO(ILAT);                                                    \
+    P0.H = HI(ILAT);                                                    \
+    R0 = [P0];                                                          \
+    CC = BITTST(R0, EVT_IVHW_P);                                        \
+    IF CC JUMP 1f;                                                      \
+    ASTAT = R1;                                                         \
+    p0.l = lo(IPEND);                                                   \
+    p0.h = hi(IPEND);                                                   \
+    r1 = [p0];                                                          \
+    R0 = (N);                                                           \
+    LOAD_IPIPE_IPEND                                                    \
+    jump __common_int_entry;                                            \
+1:  ASTAT = R1;                                                         \
+    RAISE N;                                                            \
+    (R7:0, P5:0) = [SP++];                                              \
+    SP += 0x8;                                                          \
+    SYSCFG = [SP++];                                                    \
+    CSYNC;                                                              \
+    RTI;
+
+#define TIMER_INTERRUPT_ENTRY(N)                                        \
+    SSYNC;                                                              \
+    SSYNC;                                                              \
+    [--sp] = SYSCFG;                                                    \
+    [--sp] = P0;        /*orig_p0*/                                     \
+    [--sp] = R0;        /*orig_r0*/                                     \
+    [--sp] = (R7:0,P5:0);                                               \
+    R1 = ASTAT;                                                         \
+    P0.L = LO(ILAT);                                                    \
+    P0.H = HI(ILAT);                                                    \
+    R0 = [P0];                                                          \
+    CC = BITTST(R0, EVT_IVHW_P);                                        \
+    IF CC JUMP 1f;                                                      \
+    ASTAT = R1;                                                         \
+    p0.l = lo(IPEND);                                                   \
+    p0.h = hi(IPEND);                                                   \
+    r1 = [p0];                                                          \
+    R0 = (N);                                                           \
+    jump __common_int_entry;                                            \
+1:  ASTAT = R1;                                                         \
+    RAISE N;                                                            \
+    (R7:0, P5:0) = [SP++];                                              \
+    SP += 0x8;                                                          \
+    SYSCFG = [SP++];                                                    \
+    CSYNC;                                                              \
+    RTI;
+#endif  /* CONFIG_EXACT_HWERR */
 
 /* This one pushes RETI without using CLI.  Interrupts are enabled.  */
 #define SAVE_CONTEXT_SYSCALL    save_context_syscall
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h
index b0f847ae4bf4..89f08decb8e0 100644
--- a/arch/blackfin/include/asm/gptimers.h
+++ b/arch/blackfin/include/asm/gptimers.h
@@ -30,6 +30,7 @@
 # else
 #  define MAX_BLACKFIN_GPTIMERS 11
 #  define TIMER8_GROUP_REG      TIMER_ENABLE1
+#  define TIMER_GROUP2          1
 # endif
 # define TIMER0_GROUP_REG       TIMER_ENABLE0
 #endif
@@ -40,10 +41,12 @@
 # define MAX_BLACKFIN_GPTIMERS 12
 # define TIMER0_GROUP_REG      TMRS8_ENABLE
 # define TIMER8_GROUP_REG      TMRS4_ENABLE
+# define TIMER_GROUP2          1
 #endif
 /*
  * All others: 3 timers:
  */
+#define TIMER_GROUP1           0
 #if !defined(MAX_BLACKFIN_GPTIMERS)
 # define MAX_BLACKFIN_GPTIMERS 3
 # define TIMER0_GROUP_REG      TIMER_ENABLE
@@ -109,8 +112,8 @@
 #define TIMER_ERR_PROG_PER  0x8000
 #define TIMER_ERR_PROG_PW   0xC000
 #define TIMER_EMU_RUN       0x0200
-#define TIMER_TOGGLE_HI     0x0100
-#define TIMER_CLK_SEL       0x0080
+#define TIMER_TOGGLE_HI     0x0100
+#define TIMER_CLK_SEL       0x0080
 #define TIMER_OUT_DIS       0x0040
 #define TIMER_TIN_SEL       0x0020
 #define TIMER_IRQ_ENA       0x0010
@@ -169,23 +172,25 @@
 
 /* The actual gptimer API */
 
-void     set_gptimer_pwidth    (int timer_id, uint32_t width);
-uint32_t get_gptimer_pwidth    (int timer_id);
-void     set_gptimer_period    (int timer_id, uint32_t period);
-uint32_t get_gptimer_period    (int timer_id);
-uint32_t get_gptimer_count     (int timer_id);
-uint16_t get_gptimer_intr      (int timer_id);
-void     clear_gptimer_intr    (int timer_id);
-uint16_t get_gptimer_over      (int timer_id);
-void     clear_gptimer_over    (int timer_id);
-void     set_gptimer_config    (int timer_id, uint16_t config);
-uint16_t get_gptimer_config    (int timer_id);
-void     set_gptimer_pulse_hi  (int timer_id);
+void     set_gptimer_pwidth(int timer_id, uint32_t width);
+uint32_t get_gptimer_pwidth(int timer_id);
+void     set_gptimer_period(int timer_id, uint32_t period);
+uint32_t get_gptimer_period(int timer_id);
+uint32_t get_gptimer_count(int timer_id);
+int      get_gptimer_intr(int timer_id);
+void     clear_gptimer_intr(int timer_id);
+int      get_gptimer_over(int timer_id);
+void     clear_gptimer_over(int timer_id);
+void     set_gptimer_config(int timer_id, uint16_t config);
+uint16_t get_gptimer_config(int timer_id);
+int      get_gptimer_run(int timer_id);
+void     set_gptimer_pulse_hi(int timer_id);
 void     clear_gptimer_pulse_hi(int timer_id);
-void     enable_gptimers       (uint16_t mask);
-void     disable_gptimers      (uint16_t mask);
-uint16_t get_enabled_gptimers  (void);
-uint32_t get_gptimer_status    (int group);
-void     set_gptimer_status    (int group, uint32_t value);
+void     enable_gptimers(uint16_t mask);
+void     disable_gptimers(uint16_t mask);
+void     disable_gptimers_sync(uint16_t mask);
+uint16_t get_enabled_gptimers(void);
+uint32_t get_gptimer_status(int group);
+void     set_gptimer_status(int group, uint32_t value);
 
 #endif
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index 63b2d8c78570..3022b5c96b37 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -80,19 +80,22 @@ static inline unsigned int readl(const volatile void __iomem *addr)
 #define memcpy_fromio(a,b,c)    memcpy((a),(void *)(b),(c))
 #define memcpy_toio(a,b,c)      memcpy((void *)(a),(b),(c))
 
-#define inb(addr)    readb(addr)
-#define inw(addr)    readw(addr)
-#define inl(addr)    readl(addr)
-#define outb(x,addr) ((void) writeb(x,addr))
-#define outw(x,addr) ((void) writew(x,addr))
-#define outl(x,addr) ((void) writel(x,addr))
-
-#define inb_p(addr)    inb(addr)
-#define inw_p(addr)    inw(addr)
-#define inl_p(addr)    inl(addr)
-#define outb_p(x,addr) outb(x,addr)
-#define outw_p(x,addr) outw(x,addr)
-#define outl_p(x,addr) outl(x,addr)
+/* Convert "I/O port addresses" to actual addresses.  i.e. ugly casts. */
+#define __io(port) ((void *)(unsigned long)(port))
+
+#define inb(port)    readb(__io(port))
+#define inw(port)    readw(__io(port))
+#define inl(port)    readl(__io(port))
+#define outb(x,port) writeb(x,__io(port))
+#define outw(x,port) writew(x,__io(port))
+#define outl(x,port) writel(x,__io(port))
+
+#define inb_p(port)    inb(__io(port))
+#define inw_p(port)    inw(__io(port))
+#define inl_p(port)    inl(__io(port))
+#define outb_p(x,port) outb(x,__io(port))
+#define outw_p(x,port) outw(x,__io(port))
+#define outl_p(x,port) outl(x,__io(port))
 
 #define ioread8_rep(a,d,c)      readsb(a,d,c)
 #define ioread16_rep(a,d,c)     readsw(a,d,c)
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 343b56361ec9..51d0bf5e2899 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -35,10 +35,10 @@
 #include <asm/atomic.h>
 #include <asm/traps.h>
 
-#define IPIPE_ARCH_STRING     "1.9-00"
+#define IPIPE_ARCH_STRING     "1.9-01"
 #define IPIPE_MAJOR_NUMBER    1
 #define IPIPE_MINOR_NUMBER    9
-#define IPIPE_PATCH_NUMBER    0
+#define IPIPE_PATCH_NUMBER    1
 
 #ifdef CONFIG_SMP
 #error "I-pipe/blackfin: SMP not implemented"
diff --git a/arch/blackfin/include/asm/page.h b/arch/blackfin/include/asm/page.h
index 344f6a8c1f22..3ea2016a1d4a 100644
--- a/arch/blackfin/include/asm/page.h
+++ b/arch/blackfin/include/asm/page.h
@@ -81,7 +81,7 @@ extern unsigned long memory_end;
 #define virt_addr_valid(kaddr)  (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
                                 ((void *)(kaddr) < (void *)memory_end))
 
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif                          /* __ASSEMBLY__ */
 
diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h
index a67142740df0..b42555c1431c 100644
--- a/arch/blackfin/include/asm/pda.h
+++ b/arch/blackfin/include/asm/pda.h
@@ -64,8 +64,6 @@ struct blackfin_pda {			/* Per-processor Data Area */
 
 extern struct blackfin_pda cpu_pda[];
 
-void reserve_pda(void);
-
 #endif  /* __ASSEMBLY__ */
 
 #endif /* _ASM_BLACKFIN_PDA_H */
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h
index 0eece23b41c7..3040415523b2 100644
--- a/arch/blackfin/include/asm/processor.h
+++ b/arch/blackfin/include/asm/processor.h
@@ -131,8 +131,8 @@ unsigned long get_wchan(struct task_struct *p);
 /* Get the Silicon Revision of the chip */
 static inline uint32_t __pure bfin_revid(void)
 {
-        /* stored in the upper 4 bits */
-        uint32_t revid = bfin_read_CHIPID() >> 28;
+        /* Always use CHIPID, to work around ANOMALY_05000234 */
+        uint32_t revid = (bfin_read_CHIPID() & CHIPID_VERSION) >> 28;
 
 #ifdef CONFIG_BF52x
         /* ANOMALY_05000357
diff --git a/arch/blackfin/include/asm/signal.h b/arch/blackfin/include/asm/signal.h
index 87951d251458..2eea90794454 100644
--- a/arch/blackfin/include/asm/signal.h
+++ b/arch/blackfin/include/asm/signal.h
@@ -104,7 +104,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/blackfin/include/asm/time.h b/arch/blackfin/include/asm/time.h
index ddc43ce38533..589e937ed1eb 100644
--- a/arch/blackfin/include/asm/time.h
+++ b/arch/blackfin/include/asm/time.h
@@ -37,4 +37,5 @@ extern unsigned long long __bfin_cycles_off;
 extern unsigned int __bfin_cycles_mod;
 #endif
 
+extern void __init setup_core_timer(void);
 #endif
diff --git a/arch/blackfin/include/asm/uaccess.h b/arch/blackfin/include/asm/uaccess.h
index 3248033531e6..8894e9ffbb57 100644
--- a/arch/blackfin/include/asm/uaccess.h
+++ b/arch/blackfin/include/asm/uaccess.h
@@ -59,12 +59,8 @@ static inline int is_in_rom(unsigned long addr)
 #ifndef CONFIG_ACCESS_CHECK
 static inline int _access_ok(unsigned long addr, unsigned long size) { return 1; }
 #else
-#ifdef CONFIG_ACCESS_OK_L1
-extern int _access_ok(unsigned long addr, unsigned long size)__attribute__((l1_text));
-#else
 extern int _access_ok(unsigned long addr, unsigned long size);
 #endif
-#endif
 
 /*
  * The exception table consists of pairs of addresses: the first is the
@@ -83,9 +79,6 @@ struct exception_table_entry {
         unsigned long insn, fixup;
 };
 
-/* Returns 0 if exception not found and fixup otherwise.  */
-extern unsigned long search_exception_table(unsigned long);
-
 /*
  * These are the main single-value transfer routines.  They automatically
  * use the right size if we just have the right pointer type.
@@ -233,16 +226,29 @@ strncpy_from_user(char *dst, const char *src, long count)
 }
 
 /*
- * Return the size of a string (including the ending 0)
+ * Get the size of a string in user space.
+ *   src: The string to measure
+ *     n: The maximum valid length
  *
- * Return 0 on exception, a value greater than N if too long
+ * Get the size of a NUL-terminated string in user space.
+ *
+ * Returns the size of the string INCLUDING the terminating NUL.
+ * On exception, returns 0.
+ * If the string is too long, returns a value greater than n.
  */
-static inline long strnlen_user(const char *src, long n)
+static inline long __must_check strnlen_user(const char *src, long n)
 {
-        return (strlen(src) + 1);
+        if (!access_ok(VERIFY_READ, src, 1))
+                return 0;
+        return strnlen(src, n) + 1;
 }
 
-#define strlen_user(str) strnlen_user(str, 32767)
+static inline long __must_check strlen_user(const char *src)
+{
+        if (!access_ok(VERIFY_READ, src, 1))
+                return 0;
+        return strlen(src) + 1;
+}
 
 /*
  * Zero Userspace
@@ -251,6 +257,8 @@ static inline long strnlen_user(const char *src, long n)
 static inline unsigned long __must_check
 __clear_user(void *to, unsigned long n)
 {
+        if (!access_ok(VERIFY_WRITE, to, n))
+                return n;
         memset(to, 0, n);
         return 0;
 }
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 8531693fb48d..763ed84ba459 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -20,6 +20,11 @@
 #include <asm/dma.h>
 #include <asm/uaccess.h>
 
+/*
+ * To make sure we work around 05000119 - we always check DMA_DONE bit,
+ * never the DMA_RUN bit
+ */
+
 struct dma_channel dma_ch[MAX_DMA_CHANNELS];
 EXPORT_SYMBOL(dma_ch);
 
@@ -232,6 +237,87 @@ void blackfin_dma_resume(void)
 void __init blackfin_dma_early_init(void)
 {
         bfin_write_MDMA_S0_CONFIG(0);
+        bfin_write_MDMA_S1_CONFIG(0);
+}
+
+void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size)
+{
+        unsigned long dst = (unsigned long)pdst;
+        unsigned long src = (unsigned long)psrc;
+        struct dma_register *dst_ch, *src_ch;
+
+        /* We assume that everything is 4 byte aligned, so include
+         * a basic sanity check
+         */
+        BUG_ON(dst % 4);
+        BUG_ON(src % 4);
+        BUG_ON(size % 4);
+
+        /* Force a sync in case a previous config reset on this channel
+         * occurred.  This is needed so subsequent writes to DMA registers
+         * are not spuriously lost/corrupted.
+         */
+        __builtin_bfin_ssync();
+
+        src_ch = 0;
+        /* Find an avalible memDMA channel */
+        while (1) {
+                if (!src_ch || src_ch == (struct dma_register *)MDMA_S1_NEXT_DESC_PTR) {
+                        dst_ch = (struct dma_register *)MDMA_D0_NEXT_DESC_PTR;
+                        src_ch = (struct dma_register *)MDMA_S0_NEXT_DESC_PTR;
+                } else {
+                        dst_ch = (struct dma_register *)MDMA_D1_NEXT_DESC_PTR;
+                        src_ch = (struct dma_register *)MDMA_S1_NEXT_DESC_PTR;
+                }
+
+                if (!bfin_read16(&src_ch->cfg)) {
+                        break;
+                } else {
+                        if (bfin_read16(&src_ch->irq_status) & DMA_DONE)
+                                bfin_write16(&src_ch->cfg, 0);
+                }
+
+        }
+
+        /* Destination */
+        bfin_write32(&dst_ch->start_addr, dst);
+        bfin_write16(&dst_ch->x_count, size >> 2);
+        bfin_write16(&dst_ch->x_modify, 1 << 2);
+        bfin_write16(&dst_ch->irq_status, DMA_DONE | DMA_ERR);
+
+        /* Source */
+        bfin_write32(&src_ch->start_addr, src);
+        bfin_write16(&src_ch->x_count, size >> 2);
+        bfin_write16(&src_ch->x_modify, 1 << 2);
+        bfin_write16(&src_ch->irq_status, DMA_DONE | DMA_ERR);
+
+        /* Enable */
+        bfin_write16(&src_ch->cfg, DMAEN | WDSIZE_32);
+        bfin_write16(&dst_ch->cfg, WNR | DI_EN | DMAEN | WDSIZE_32);
+
+        /* Since we are atomic now, don't use the workaround ssync */
+        __builtin_bfin_ssync();
+}
+
+void __init early_dma_memcpy_done(void)
+{
+        while ((bfin_read_MDMA_S0_CONFIG() && !(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE)) ||
+               (bfin_read_MDMA_S1_CONFIG() && !(bfin_read_MDMA_D1_IRQ_STATUS() & DMA_DONE)))
+                continue;
+
+        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
+        bfin_write_MDMA_D1_IRQ_STATUS(DMA_DONE | DMA_ERR);
+        /*
+         * Now that DMA is done, we would normally flush cache, but
+         * i/d cache isn't running this early, so we don't bother,
+         * and just clear out the DMA channel for next time
+         */
+        bfin_write_MDMA_S0_CONFIG(0);
+        bfin_write_MDMA_S1_CONFIG(0);
+        bfin_write_MDMA_D0_CONFIG(0);
+        bfin_write_MDMA_D1_CONFIG(0);
+
+        __builtin_bfin_ssync();
 }
 
 /**
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index a0678da40532..beffa00a93c3 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -313,15 +313,6 @@ inline void portmux_setup(unsigned short per)
 # define portmux_setup(...)  do { } while (0)
 #endif
 
-static int __init bfin_gpio_init(void)
-{
-        printk(KERN_INFO "Blackfin GPIO Controller\n");
-
-        return 0;
-}
-arch_initcall(bfin_gpio_init);
-
-
 #ifndef CONFIG_BF54x
 /***********************************************************
 *
@@ -1021,15 +1012,6 @@ int bfin_gpio_irq_request(unsigned gpio, const char *label)
 
         local_irq_save_hw(flags);
 
-        if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
-                if (system_state == SYSTEM_BOOTING)
-                        dump_stack();
-                printk(KERN_ERR
-                       "bfin-gpio: GPIO %d is already reserved as gpio-irq !\n",
-                       gpio);
-                local_irq_restore_hw(flags);
-                return -EBUSY;
-        }
         if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
                 if (system_state == SYSTEM_BOOTING)
                         dump_stack();
diff --git a/arch/blackfin/kernel/bfin_ksyms.c b/arch/blackfin/kernel/bfin_ksyms.c
index 01f917d58b59..53e893ff708a 100644
--- a/arch/blackfin/kernel/bfin_ksyms.c
+++ b/arch/blackfin/kernel/bfin_ksyms.c
@@ -16,7 +16,6 @@ EXPORT_SYMBOL(bfin_return_from_exception);
 
 /* All the Blackfin cache functions: mach-common/cache.S */
 EXPORT_SYMBOL(blackfin_dcache_invalidate_range);
-EXPORT_SYMBOL(blackfin_icache_dcache_flush_range);
 EXPORT_SYMBOL(blackfin_icache_flush_range);
 EXPORT_SYMBOL(blackfin_dcache_flush_range);
 EXPORT_SYMBOL(blackfin_dflush_page);
diff --git a/arch/blackfin/kernel/cplb-mpu/cacheinit.c b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
index c6ff947f9d37..d5a86c3017f7 100644
--- a/arch/blackfin/kernel/cplb-mpu/cacheinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
@@ -55,7 +55,14 @@ void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
         }
 
         ctrl = bfin_read_DMEM_CONTROL();
-        ctrl |= DMEM_CNTR;
+
+        /*
+         *  Anomaly notes:
+         *  05000287 - We implement workaround #2 - Change the DMEM_CONTROL
+         *  register, so that the port preferences for DAG0 and DAG1 are set
+         *  to port B
+         */
+        ctrl |= DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0);
         bfin_write_DMEM_CONTROL(ctrl);
         SSYNC();
 }
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index 3e329a6ce041..c006a44527bf 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -64,7 +64,7 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
         dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
 
         icplb_tbl[cpu][i_i].addr = 0;
-        icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB;
+        icplb_tbl[cpu][i_i++].data = CPLB_VALID | i_cache | CPLB_USER_RD | PAGE_SIZE_1KB;
 
         /* Cover kernel memory with 4M pages.  */
         addr = 0;
diff --git a/arch/blackfin/kernel/cplb-nompu/cacheinit.c b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
index c6ff947f9d37..d5a86c3017f7 100644
--- a/arch/blackfin/kernel/cplb-nompu/cacheinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cacheinit.c
@@ -55,7 +55,14 @@ void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
         }
 
         ctrl = bfin_read_DMEM_CONTROL();
-        ctrl |= DMEM_CNTR;
+
+        /*
+         *  Anomaly notes:
+         *  05000287 - We implement workaround #2 - Change the DMEM_CONTROL
+         *  register, so that the port preferences for DAG0 and DAG1 are set
+         *  to port B
+         */
+        ctrl |= DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0);
         bfin_write_DMEM_CONTROL(ctrl);
         SSYNC();
 }
diff --git a/arch/blackfin/kernel/early_printk.c b/arch/blackfin/kernel/early_printk.c
index c8ad051742e2..3302719173ca 100644
--- a/arch/blackfin/kernel/early_printk.c
+++ b/arch/blackfin/kernel/early_printk.c
@@ -178,25 +178,15 @@ int __init setup_early_printk(char *buf)
 
 asmlinkage void __init init_early_exception_vectors(void)
 {
+        u32 evt;
         SSYNC();
 
         /* cannot program in software:
          * evt0 - emulation (jtag)
          * evt1 - reset
          */
-        bfin_write_EVT2(early_trap);
-        bfin_write_EVT3(early_trap);
-        bfin_write_EVT5(early_trap);
-        bfin_write_EVT6(early_trap);
-        bfin_write_EVT7(early_trap);
-        bfin_write_EVT8(early_trap);
-        bfin_write_EVT9(early_trap);
-        bfin_write_EVT10(early_trap);
-        bfin_write_EVT11(early_trap);
-        bfin_write_EVT12(early_trap);
-        bfin_write_EVT13(early_trap);
-        bfin_write_EVT14(early_trap);
-        bfin_write_EVT15(early_trap);
+        for (evt = EVT2; evt <= EVT15; evt += 4)
+                bfin_write32(evt, early_trap);
         CSYNC();
 
         /* Set all the return from interrupt, exception, NMI to a known place
diff --git a/arch/blackfin/kernel/gptimers.c b/arch/blackfin/kernel/gptimers.c
index 3a3e9615b002..7281a91d26b5 100644
--- a/arch/blackfin/kernel/gptimers.c
+++ b/arch/blackfin/kernel/gptimers.c
@@ -189,10 +189,10 @@ void set_gptimer_status(int group, uint32_t value)
 }
 EXPORT_SYMBOL(set_gptimer_status);
 
-uint16_t get_gptimer_intr(int timer_id)
+int get_gptimer_intr(int timer_id)
 {
         tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
-        return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & timil_mask[timer_id]) ? 1 : 0;
+        return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & timil_mask[timer_id]);
 }
 EXPORT_SYMBOL(get_gptimer_intr);
 
@@ -203,10 +203,10 @@ void clear_gptimer_intr(int timer_id)
 }
 EXPORT_SYMBOL(clear_gptimer_intr);
 
-uint16_t get_gptimer_over(int timer_id)
+int get_gptimer_over(int timer_id)
 {
         tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
-        return (group_regs[BFIN_TIMER_OCTET(timer_id)]->status & tovf_mask[timer_id]) ? 1 : 0;
+        return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & tovf_mask[timer_id]);
 }
 EXPORT_SYMBOL(get_gptimer_over);
 
@@ -217,6 +217,13 @@ void clear_gptimer_over(int timer_id)
 }
 EXPORT_SYMBOL(clear_gptimer_over);
 
+int get_gptimer_run(int timer_id)
+{
+        tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
+        return !!(group_regs[BFIN_TIMER_OCTET(timer_id)]->status & trun_mask[timer_id]);
+}
+EXPORT_SYMBOL(get_gptimer_run);
+
 void set_gptimer_config(int timer_id, uint16_t config)
 {
         tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
@@ -244,7 +251,7 @@ void enable_gptimers(uint16_t mask)
 }
 EXPORT_SYMBOL(enable_gptimers);
 
-void disable_gptimers(uint16_t mask)
+static void _disable_gptimers(uint16_t mask)
 {
         int i;
         uint16_t m = mask;
@@ -253,6 +260,12 @@ void disable_gptimers(uint16_t mask)
                 group_regs[i]->disable = m & 0xFF;
                 m >>= 8;
         }
+}
+
+void disable_gptimers(uint16_t mask)
+{
+        int i;
+        _disable_gptimers(mask);
         for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i)
                 if (mask & (1 << i))
                         group_regs[BFIN_TIMER_OCTET(i)]->status |= trun_mask[i];
@@ -260,6 +273,13 @@ void disable_gptimers(uint16_t mask)
 }
 EXPORT_SYMBOL(disable_gptimers);
 
+void disable_gptimers_sync(uint16_t mask)
+{
+        _disable_gptimers(mask);
+        SSYNC();
+}
+EXPORT_SYMBOL(disable_gptimers_sync);
+
 void set_gptimer_pulse_hi(int timer_id)
 {
         tassert(timer_id < MAX_BLACKFIN_GPTIMERS);
diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c
index a5de8d45424c..5fc424803a17 100644
--- a/arch/blackfin/kernel/ipipe.c
+++ b/arch/blackfin/kernel/ipipe.c
@@ -167,7 +167,7 @@ int __ipipe_check_root(void)
 void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
 {
         struct irq_desc *desc = irq_to_desc(irq);
-        int prio = desc->ic_prio;
+        int prio = __ipipe_get_irq_priority(irq);
 
         desc->depth = 0;
         if (ipd != &ipipe_root &&
@@ -178,8 +178,7 @@ EXPORT_SYMBOL(__ipipe_enable_irqdesc);
 
 void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
 {
-        struct irq_desc *desc = irq_to_desc(irq);
-        int prio = desc->ic_prio;
+        int prio = __ipipe_get_irq_priority(irq);
 
         if (ipd != &ipipe_root &&
             atomic_dec_and_test(&__ipipe_irq_lvdepth[prio]))
@@ -310,12 +309,16 @@ int ipipe_trigger_irq(unsigned irq)
 
 asmlinkage void __ipipe_sync_root(void)
 {
+        void (*irq_tail_hook)(void) = (void (*)(void))__ipipe_irq_tail_hook;
         unsigned long flags;
 
         BUG_ON(irqs_disabled());
 
         local_irq_save_hw(flags);
 
+        if (irq_tail_hook)
+                irq_tail_hook();
+
         clear_thread_flag(TIF_IRQ_SYNC);
 
         if (ipipe_root_cpudom_var(irqpend_himask) != 0)
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index 401bd32aa499..6e31e935bb31 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -59,12 +59,14 @@ static struct irq_chip bad_chip = {
         .unmask = dummy_mask_unmask_irq,
 };
 
+static int bad_stats;
 static struct irq_desc bad_irq_desc = {
         .status = IRQ_DISABLED,
         .chip = &bad_chip,
         .handle_irq = handle_bad_irq,
         .depth = 1,
         .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
+        .kstat_irqs = &bad_stats,
 #ifdef CONFIG_SMP
         .affinity = CPU_MASK_ALL
 #endif
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index b163f6d3330d..da28f796ad78 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -466,7 +466,7 @@ static int validate_memory_access_address(unsigned long addr, int size)
         int cpu = raw_smp_processor_id();
 
         if (size < 0)
-                return EFAULT;
+                return -EFAULT;
         if (addr >= 0x1000 && (addr + size) <= physical_mem_end)
                 return 0;
         if (addr >= SYSMMR_BASE)
@@ -498,7 +498,7 @@ static int validate_memory_access_address(unsigned long addr, int size)
         if (IN_MEM(addr, size, L2_START, L2_LENGTH))
                 return 0;
 
-        return EFAULT;
+        return -EFAULT;
 }
 
 /*
@@ -508,14 +508,15 @@ static int validate_memory_access_address(unsigned long addr, int size)
 int kgdb_mem2hex(char *mem, char *buf, int count)
 {
         char *tmp;
-        int err = 0;
+        int err;
         unsigned char *pch;
         unsigned short mmr16;
         unsigned long mmr32;
         int cpu = raw_smp_processor_id();
 
-        if (validate_memory_access_address((unsigned long)mem, count))
-                return EFAULT;
+        err = validate_memory_access_address((unsigned long)mem, count);
+        if (err)
+                return err;
 
         /*
          * We use the upper half of buf as an intermediate buffer for the
@@ -533,7 +534,7 @@ int kgdb_mem2hex(char *mem, char *buf, int count)
                                 *tmp++ = *pch++;
                                 tmp -= 2;
                         } else
-                                err = EFAULT;
+                                err = -EFAULT;
                         break;
                 case 4:
                         if ((unsigned int)mem % 4 == 0) {
@@ -545,10 +546,10 @@ int kgdb_mem2hex(char *mem, char *buf, int count)
                                 *tmp++ = *pch++;
                                 tmp -= 4;
                         } else
-                                err = EFAULT;
+                                err = -EFAULT;
                         break;
                 default:
-                        err = EFAULT;
+                        err = -EFAULT;
                 }
         } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
 #ifdef CONFIG_SMP
@@ -557,7 +558,7 @@ int kgdb_mem2hex(char *mem, char *buf, int count)
                 ) {
                 /* access L1 instruction SRAM*/
                 if (dma_memcpy(tmp, mem, count) == NULL)
-                        err = EFAULT;
+                        err = -EFAULT;
         } else
                 err = probe_kernel_read(tmp, mem, count);
 
@@ -585,24 +586,24 @@ int kgdb_ebin2mem(char *buf, char *mem, int count)
         char *tmp_new;
         unsigned short *mmr16;
         unsigned long *mmr32;
-        int err = 0;
-        int size = 0;
+        int err;
+        int size;
         int cpu = raw_smp_processor_id();
 
         tmp_old = tmp_new = buf;
 
-        while (count-- > 0) {
+        for (size = 0; size < count; ++size) {
                 if (*tmp_old == 0x7d)
                         *tmp_new = *(++tmp_old) ^ 0x20;
                 else
                         *tmp_new = *tmp_old;
                 tmp_new++;
                 tmp_old++;
-                size++;
         }
 
-        if (validate_memory_access_address((unsigned long)mem, size))
-                return EFAULT;
+        err = validate_memory_access_address((unsigned long)mem, size);
+        if (err)
+                return err;
 
         if ((unsigned int)mem >= SYSMMR_BASE) { /*access MMR registers*/
                 switch (size) {
@@ -611,17 +612,17 @@ int kgdb_ebin2mem(char *buf, char *mem, int count)
                                 mmr16 = (unsigned short *)buf;
                                 *(unsigned short *)mem = *mmr16;
                         } else
-                                return EFAULT;
+                                err = -EFAULT;
                         break;
                 case 4:
                         if ((unsigned int)mem % 4 == 0) {
                                 mmr32 = (unsigned long *)buf;
                                 *(unsigned long *)mem = *mmr32;
                         } else
-                                return EFAULT;
+                                err = -EFAULT;
                         break;
                 default:
-                        return EFAULT;
+                        err = -EFAULT;
                 }
         } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
 #ifdef CONFIG_SMP
@@ -630,7 +631,7 @@ int kgdb_ebin2mem(char *buf, char *mem, int count)
                 ) {
                 /* access L1 instruction SRAM */
                 if (dma_memcpy(mem, buf, size) == NULL)
-                        err = EFAULT;
+                        err = -EFAULT;
         } else
                 err = probe_kernel_write(mem, buf, size);
 
@@ -648,10 +649,12 @@ int kgdb_hex2mem(char *buf, char *mem, int count)
         char *tmp_hex;
         unsigned short *mmr16;
         unsigned long *mmr32;
+        int err;
         int cpu = raw_smp_processor_id();
 
-        if (validate_memory_access_address((unsigned long)mem, count))
-                return EFAULT;
+        err = validate_memory_access_address((unsigned long)mem, count);
+        if (err)
+                return err;
 
         /*
          * We use the upper half of buf as an intermediate buffer for the
@@ -673,17 +676,17 @@ int kgdb_hex2mem(char *buf, char *mem, int count)
                                 mmr16 = (unsigned short *)tmp_raw;
                                 *(unsigned short *)mem = *mmr16;
                         } else
-                                return EFAULT;
+                                err = -EFAULT;
                         break;
                 case 4:
                         if ((unsigned int)mem % 4 == 0) {
                                 mmr32 = (unsigned long *)tmp_raw;
                                 *(unsigned long *)mem = *mmr32;
                         } else
-                                return EFAULT;
+                                err = -EFAULT;
                         break;
                 default:
-                        return EFAULT;
+                        err = -EFAULT;
                 }
         } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
 #ifdef CONFIG_SMP
@@ -692,10 +695,11 @@ int kgdb_hex2mem(char *buf, char *mem, int count)
                 ) {
                 /* access L1 instruction SRAM */
                 if (dma_memcpy(mem, tmp_raw, count) == NULL)
-                        return EFAULT;
+                        err = -EFAULT;
         } else
-                return probe_kernel_write(mem, tmp_raw, count);
-        return 0;
+                err = probe_kernel_write(mem, tmp_raw, count);
+
+        return err;
 }
 
 int kgdb_validate_break_address(unsigned long addr)
@@ -715,7 +719,7 @@ int kgdb_validate_break_address(unsigned long addr)
         if (IN_MEM(addr, BREAK_INSTR_SIZE, L2_START, L2_LENGTH))
                 return 0;
 
-        return EFAULT;
+        return -EFAULT;
 }
 
 int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr)
diff --git a/arch/blackfin/kernel/module.c b/arch/blackfin/kernel/module.c
index 1bd7f2d018a8..d5aee3626688 100644
--- a/arch/blackfin/kernel/module.c
+++ b/arch/blackfin/kernel/module.c
@@ -201,8 +201,8 @@ apply_relocate(Elf_Shdr * sechdrs, const char *strtab,
 /*            Arithmetic relocations are handled.                        */
 /*            We do not expect LSETUP to be split and hence is not       */
 /*            handled.                                                   */
-/*            R_byte and R_byte2 are also not handled as the gas         */
-/*            does not generate it.                                      */
+/*            R_BFIN_BYTE and R_BFIN_BYTE2 are also not handled as the   */
+/*            gas does not generate it.                                  */
 /*************************************************************************/
 int
 apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
@@ -243,8 +243,8 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
 #endif
                 switch (ELF32_R_TYPE(rel[i].r_info)) {
 
-                case R_pcrel24:
-                case R_pcrel24_jump_l:
+                case R_BFIN_PCREL24:
+                case R_BFIN_PCREL24_JUMP_L:
                         /* Add the value, subtract its postition */
                         location16 =
                             (uint16_t *) (sechdrs[sechdrs[relsec].sh_info].
@@ -266,18 +266,18 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
                             (*location16 & 0xff00) | (value >> 16 & 0x00ff);
                         *(location16 + 1) = value & 0xffff;
                         break;
-                case R_pcrel12_jump:
-                case R_pcrel12_jump_s:
+                case R_BFIN_PCREL12_JUMP:
+                case R_BFIN_PCREL12_JUMP_S:
                         value -= (uint32_t) location32;
                         value >>= 1;
                         *location16 = (value & 0xfff);
                         break;
-                case R_pcrel10:
+                case R_BFIN_PCREL10:
                         value -= (uint32_t) location32;
                         value >>= 1;
                         *location16 = (value & 0x3ff);
                         break;
-                case R_luimm16:
+                case R_BFIN_LUIMM16:
                         pr_debug("before %x after %x\n", *location16,
                                        (value & 0xffff));
                         tmp = (value & 0xffff);
@@ -286,7 +286,7 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
                         } else
                                 *location16 = tmp;
                         break;
-                case R_huimm16:
+                case R_BFIN_HUIMM16:
                         pr_debug("before %x after %x\n", *location16,
                                        ((value >> 16) & 0xffff));
                         tmp = ((value >> 16) & 0xffff);
@@ -295,10 +295,10 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
                         } else
                                 *location16 = tmp;
                         break;
-                case R_rimm16:
+                case R_BFIN_RIMM16:
                         *location16 = (value & 0xffff);
                         break;
-                case R_byte4_data:
+                case R_BFIN_BYTE4_DATA:
                         pr_debug("before %x after %x\n", *location32, value);
                         *location32 = value;
                         break;
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index e040e03335ea..30d0843ed701 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -322,6 +322,9 @@ void finish_atomic_sections (struct pt_regs *regs)
 }
 
 #if defined(CONFIG_ACCESS_CHECK)
+#ifdef CONFIG_ACCESS_OK_L1
+__attribute__((l1_text))
+#endif
 /* Return 1 if access to memory range is OK, 0 otherwise */
 int _access_ok(unsigned long addr, unsigned long size)
 {
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index a58687bdee6a..80447f99c2b5 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -18,9 +18,12 @@
 #include <linux/tty.h>
 #include <linux/pfn.h>
 
+#ifdef CONFIG_MTD_UCLINUX
+#include <linux/mtd/map.h>
 #include <linux/ext2_fs.h>
 #include <linux/cramfs_fs.h>
 #include <linux/romfs_fs.h>
+#endif
 
 #include <asm/cplb.h>
 #include <asm/cacheflush.h>
@@ -45,6 +48,7 @@ EXPORT_SYMBOL(_ramend);
 EXPORT_SYMBOL(reserved_mem_dcache_on);
 
 #ifdef CONFIG_MTD_UCLINUX
+extern struct map_info uclinux_ram_map;
 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
 unsigned long _ebss;
 EXPORT_SYMBOL(memory_mtd_end);
@@ -150,40 +154,45 @@ void __init bfin_relocate_l1_mem(void)
         unsigned long l1_data_b_length;
         unsigned long l2_length;
 
+        /*
+         * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
+         * we know that everything about l1 text/data is nice and aligned,
+         * so copy by 4 byte chunks, and don't worry about overlapping
+         * src/dest.
+         *
+         * We can't use the dma_memcpy functions, since they can call
+         * scheduler functions which might be in L1 :( and core writes
+         * into L1 instruction cause bad access errors, so we are stuck,
+         * we are required to use DMA, but can't use the common dma
+         * functions. We can't use memcpy either - since that might be
+         * going to be in the relocated L1
+         */
+
         blackfin_dma_early_init();
 
+        /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
         l1_code_length = _etext_l1 - _stext_l1;
-        if (l1_code_length > L1_CODE_LENGTH)
-                panic("L1 Instruction SRAM Overflow\n");
-        /* cannot complain as printk is not available as yet.
-         * But we can continue booting and complain later!
-         */
-
-        /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
-        dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
+        if (l1_code_length)
+                early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
 
+        /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
         l1_data_a_length = _sbss_l1 - _sdata_l1;
-        if (l1_data_a_length > L1_DATA_A_LENGTH)
-                panic("L1 Data SRAM Bank A Overflow\n");
-
-        /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
-        dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
+        if (l1_data_a_length)
+                early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
 
+        /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
         l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
-        if (l1_data_b_length > L1_DATA_B_LENGTH)
-                panic("L1 Data SRAM Bank B Overflow\n");
-
-        /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
-        dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
+        if (l1_data_b_length)
+                early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
                         l1_data_a_length, l1_data_b_length);
 
+        early_dma_memcpy_done();
+
+        /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */
         if (L2_LENGTH != 0) {
                 l2_length = _sbss_l2 - _stext_l2;
-                if (l2_length > L2_LENGTH)
-                        panic("L2 SRAM Overflow\n");
-
-                /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
-                dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
+                if (l2_length)
+                        memcpy(_stext_l2, _l2_lma_start, l2_length);
         }
 }
 
@@ -472,7 +481,7 @@ static __init void memory_setup(void)
 
         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
                 console_init();
-                panic("DMA region exceeds memory limit: %lu.\n",
+                panic("DMA region exceeds memory limit: %lu.",
                         _ramend - _ramstart);
         }
         memory_end = _ramend - DMA_UNCACHED_REGION;
@@ -526,14 +535,13 @@ static __init void memory_setup(void)
 
         if (mtd_size == 0) {
                 console_init();
-                panic("Don't boot kernel without rootfs attached.\n");
+                panic("Don't boot kernel without rootfs attached.");
         }
 
         /* Relocate MTD image to the top of memory after the uncached memory area */
-        dma_memcpy((char *)memory_end, _end, mtd_size);
-
-        memory_mtd_start = memory_end;
-        _ebss = memory_mtd_start;       /* define _ebss for compatible */
+        uclinux_ram_map.phys = memory_mtd_start = memory_end;
+        uclinux_ram_map.size = mtd_size;
+        dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
 #endif                          /* CONFIG_MTD_UCLINUX */
 
 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
@@ -796,10 +804,8 @@ void __init setup_arch(char **cmdline_p)
         cclk = get_cclk();
         sclk = get_sclk();
 
-#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
-        if (ANOMALY_05000273 && cclk == sclk)
-                panic("ANOMALY 05000273, SCLK can not be same as CCLK");
-#endif
+        if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
+                panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
 
 #ifdef BF561_FAMILY
         if (ANOMALY_05000266) {
@@ -881,7 +887,7 @@ void __init setup_arch(char **cmdline_p)
                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
                                        bfin_compiled_revid(), bfin_revid());
                                 if (bfin_compiled_revid() > bfin_revid())
-                                        panic("Error: you are missing anomaly workarounds for this rev\n");
+                                        panic("Error: you are missing anomaly workarounds for this rev");
                         }
                 }
                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
@@ -891,16 +897,13 @@ void __init setup_arch(char **cmdline_p)
 
         /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
         if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
-                panic("You can't run on this processor due to 05000448\n");
+                panic("You can't run on this processor due to 05000448");
 
         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 
         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
                cclk / 1000000, sclk / 1000000);
 
-        if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
-                printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
-
         setup_bootmem_allocator();
 
         paging_init();
diff --git a/arch/blackfin/kernel/sys_bfin.c b/arch/blackfin/kernel/sys_bfin.c
index fce49d7cf001..a8f1329c15a4 100644
--- a/arch/blackfin/kernel/sys_bfin.c
+++ b/arch/blackfin/kernel/sys_bfin.c
@@ -78,11 +78,6 @@ asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
         return do_mmap2(addr, len, prot, flags, fd, pgoff);
 }
 
-asmlinkage int sys_getpagesize(void)
-{
-        return PAGE_SIZE;
-}
-
 asmlinkage void *sys_sram_alloc(size_t size, unsigned long flags)
 {
         return sram_alloc_with_lsl(size, flags);
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c
index 27646121280a..0791eba40d9f 100644
--- a/arch/blackfin/kernel/time-ts.c
+++ b/arch/blackfin/kernel/time-ts.c
@@ -20,8 +20,9 @@
 
 #include <asm/blackfin.h>
 #include <asm/time.h>
+#include <asm/gptimers.h>
 
-#ifdef CONFIG_CYCLES_CLOCKSOURCE
+#if defined(CONFIG_CYCLES_CLOCKSOURCE)
 
 /* Accelerators for sched_clock()
  * convert from cycles(64bits) => nanoseconds (64bits)
@@ -58,15 +59,15 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc)
         return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
 }
 
-static cycle_t read_cycles(struct clocksource *cs)
+static cycle_t bfin_read_cycles(struct clocksource *cs)
 {
         return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
 }
 
-static struct clocksource clocksource_bfin = {
-        .name           = "bfin_cycles",
+static struct clocksource bfin_cs_cycles = {
+        .name           = "bfin_cs_cycles",
         .rating         = 350,
-        .read           = read_cycles,
+        .read           = bfin_read_cycles,
         .mask           = CLOCKSOURCE_MASK(64),
         .shift          = 22,
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
@@ -74,53 +75,198 @@ static struct clocksource clocksource_bfin = {
 
 unsigned long long sched_clock(void)
 {
-        return cycles_2_ns(read_cycles(&clocksource_bfin));
+        return cycles_2_ns(bfin_read_cycles(&bfin_cs_cycles));
 }
 
-static int __init bfin_clocksource_init(void)
+static int __init bfin_cs_cycles_init(void)
 {
         set_cyc2ns_scale(get_cclk() / 1000);
 
-        clocksource_bfin.mult = clocksource_hz2mult(get_cclk(), clocksource_bfin.shift);
+        bfin_cs_cycles.mult = \
+                clocksource_hz2mult(get_cclk(), bfin_cs_cycles.shift);
 
-        if (clocksource_register(&clocksource_bfin))
+        if (clocksource_register(&bfin_cs_cycles))
                 panic("failed to register clocksource");
 
         return 0;
 }
+#else
+# define bfin_cs_cycles_init()
+#endif
+
+#ifdef CONFIG_GPTMR0_CLOCKSOURCE
+
+void __init setup_gptimer0(void)
+{
+        disable_gptimers(TIMER0bit);
+
+        set_gptimer_config(TIMER0_id, \
+                TIMER_OUT_DIS | TIMER_PERIOD_CNT | TIMER_MODE_PWM);
+        set_gptimer_period(TIMER0_id, -1);
+        set_gptimer_pwidth(TIMER0_id, -2);
+        SSYNC();
+        enable_gptimers(TIMER0bit);
+}
+
+static cycle_t bfin_read_gptimer0(void)
+{
+        return bfin_read_TIMER0_COUNTER();
+}
+
+static struct clocksource bfin_cs_gptimer0 = {
+        .name           = "bfin_cs_gptimer0",
+        .rating         = 400,
+        .read           = bfin_read_gptimer0,
+        .mask           = CLOCKSOURCE_MASK(32),
+        .shift          = 22,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static int __init bfin_cs_gptimer0_init(void)
+{
+        setup_gptimer0();
 
+        bfin_cs_gptimer0.mult = \
+                clocksource_hz2mult(get_sclk(), bfin_cs_gptimer0.shift);
+
+        if (clocksource_register(&bfin_cs_gptimer0))
+                panic("failed to register clocksource");
+
+        return 0;
+}
 #else
-# define bfin_clocksource_init()
+# define bfin_cs_gptimer0_init()
 #endif
 
+#ifdef CONFIG_CORE_TIMER_IRQ_L1
+__attribute__((l1_text))
+#endif
+irqreturn_t timer_interrupt(int irq, void *dev_id);
+
+static int bfin_timer_set_next_event(unsigned long, \
+                struct clock_event_device *);
+
+static void bfin_timer_set_mode(enum clock_event_mode, \
+                struct clock_event_device *);
+
+static struct clock_event_device clockevent_bfin = {
+#if defined(CONFIG_TICKSOURCE_GPTMR0)
+        .name           = "bfin_gptimer0",
+        .rating         = 300,
+        .irq            = IRQ_TIMER0,
+#else
+        .name           = "bfin_core_timer",
+        .rating         = 350,
+        .irq            = IRQ_CORETMR,
+#endif
+        .shift          = 32,
+        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+        .set_next_event = bfin_timer_set_next_event,
+        .set_mode       = bfin_timer_set_mode,
+};
+
+static struct irqaction bfin_timer_irq = {
+#if defined(CONFIG_TICKSOURCE_GPTMR0)
+        .name           = "Blackfin GPTimer0",
+#else
+        .name           = "Blackfin CoreTimer",
+#endif
+        .flags          = IRQF_DISABLED | IRQF_TIMER | \
+                          IRQF_IRQPOLL | IRQF_PERCPU,
+        .handler        = timer_interrupt,
+        .dev_id         = &clockevent_bfin,
+};
+
+#if defined(CONFIG_TICKSOURCE_GPTMR0)
 static int bfin_timer_set_next_event(unsigned long cycles,
                                      struct clock_event_device *evt)
 {
+        disable_gptimers(TIMER0bit);
+
+        /* it starts counting three SCLK cycles after the TIMENx bit is set */
+        set_gptimer_pwidth(TIMER0_id, cycles - 3);
+        enable_gptimers(TIMER0bit);
+        return 0;
+}
+
+static void bfin_timer_set_mode(enum clock_event_mode mode,
+                                struct clock_event_device *evt)
+{
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC: {
+                set_gptimer_config(TIMER0_id, \
+                        TIMER_OUT_DIS | TIMER_IRQ_ENA | \
+                        TIMER_PERIOD_CNT | TIMER_MODE_PWM);
+                set_gptimer_period(TIMER0_id, get_sclk() / HZ);
+                set_gptimer_pwidth(TIMER0_id, get_sclk() / HZ - 1);
+                enable_gptimers(TIMER0bit);
+                break;
+        }
+        case CLOCK_EVT_MODE_ONESHOT:
+                disable_gptimers(TIMER0bit);
+                set_gptimer_config(TIMER0_id, \
+                        TIMER_OUT_DIS | TIMER_IRQ_ENA | TIMER_MODE_PWM);
+                set_gptimer_period(TIMER0_id, 0);
+                break;
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_SHUTDOWN:
+                disable_gptimers(TIMER0bit);
+                break;
+        case CLOCK_EVT_MODE_RESUME:
+                break;
+        }
+}
+
+static void bfin_timer_ack(void)
+{
+        set_gptimer_status(TIMER_GROUP1, TIMER_STATUS_TIMIL0);
+}
+
+static void __init bfin_timer_init(void)
+{
+        disable_gptimers(TIMER0bit);
+}
+
+static unsigned long  __init bfin_clockevent_check(void)
+{
+        setup_irq(IRQ_TIMER0, &bfin_timer_irq);
+        return get_sclk();
+}
+
+#else /* CONFIG_TICKSOURCE_CORETMR */
+
+static int bfin_timer_set_next_event(unsigned long cycles,
+                                struct clock_event_device *evt)
+{
+        bfin_write_TCNTL(TMPWR);
+        CSYNC();
         bfin_write_TCOUNT(cycles);
         CSYNC();
+        bfin_write_TCNTL(TMPWR | TMREN);
         return 0;
 }
 
 static void bfin_timer_set_mode(enum clock_event_mode mode,
-                                struct clock_event_device *evt)
+                                struct clock_event_device *evt)
 {
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC: {
                 unsigned long tcount = ((get_cclk() / (HZ * TIME_SCALE)) - 1);
                 bfin_write_TCNTL(TMPWR);
-                bfin_write_TSCALE(TIME_SCALE - 1);
                 CSYNC();
+                bfin_write_TSCALE(TIME_SCALE - 1);
                 bfin_write_TPERIOD(tcount);
                 bfin_write_TCOUNT(tcount);
-                bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD);
                 CSYNC();
+                bfin_write_TCNTL(TMPWR | TMREN | TAUTORLD);
                 break;
         }
         case CLOCK_EVT_MODE_ONESHOT:
+                bfin_write_TCNTL(TMPWR);
+                CSYNC();
                 bfin_write_TSCALE(TIME_SCALE - 1);
+                bfin_write_TPERIOD(0);
                 bfin_write_TCOUNT(0);
-                bfin_write_TCNTL(TMPWR | TMREN);
-                CSYNC();
                 break;
         case CLOCK_EVT_MODE_UNUSED:
         case CLOCK_EVT_MODE_SHUTDOWN:
@@ -132,6 +278,10 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
         }
 }
 
+static void bfin_timer_ack(void)
+{
+}
+
 static void __init bfin_timer_init(void)
 {
         /* power up the timer, but don't enable it just yet */
@@ -145,38 +295,32 @@ static void __init bfin_timer_init(void)
         bfin_write_TPERIOD(0);
         bfin_write_TCOUNT(0);
 
-        /* now enable the timer */
         CSYNC();
 }
 
+static unsigned long  __init bfin_clockevent_check(void)
+{
+        setup_irq(IRQ_CORETMR, &bfin_timer_irq);
+        return get_cclk() / TIME_SCALE;
+}
+
+void __init setup_core_timer(void)
+{
+        bfin_timer_init();
+        bfin_timer_set_mode(CLOCK_EVT_MODE_PERIODIC, NULL);
+}
+#endif /* CONFIG_TICKSOURCE_GPTMR0 */
+
 /*
  * timer_interrupt() needs to keep up the real-time clock,
  * as well as call the "do_timer()" routine every clocktick
  */
-#ifdef CONFIG_CORE_TIMER_IRQ_L1
-__attribute__((l1_text))
-#endif
-irqreturn_t timer_interrupt(int irq, void *dev_id);
-
-static struct clock_event_device clockevent_bfin = {
-        .name           = "bfin_core_timer",
-        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .shift          = 32,
-        .set_next_event = bfin_timer_set_next_event,
-        .set_mode       = bfin_timer_set_mode,
-};
-
-static struct irqaction bfin_timer_irq = {
-        .name           = "Blackfin Core Timer",
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-        .handler        = timer_interrupt,
-        .dev_id         = &clockevent_bfin,
-};
-
 irqreturn_t timer_interrupt(int irq, void *dev_id)
 {
         struct clock_event_device *evt = dev_id;
+        smp_mb();
         evt->event_handler(evt);
+        bfin_timer_ack();
         return IRQ_HANDLED;
 }
 
@@ -184,9 +328,8 @@ static int __init bfin_clockevent_init(void)
 {
         unsigned long timer_clk;
 
-        timer_clk = get_cclk() / TIME_SCALE;
+        timer_clk = bfin_clockevent_check();
 
-        setup_irq(IRQ_CORETMR, &bfin_timer_irq);
         bfin_timer_init();
 
         clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
@@ -218,6 +361,7 @@ void __init time_init(void)
         xtime.tv_nsec = 0;
         set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
 
-        bfin_clocksource_init();
+        bfin_cs_cycles_init();
+        bfin_cs_gptimer0_init();
         bfin_clockevent_init();
 }
diff --git a/arch/blackfin/kernel/time.c b/arch/blackfin/kernel/time.c
index 1bbacfbd4c5d..adb54aa7d7c8 100644
--- a/arch/blackfin/kernel/time.c
+++ b/arch/blackfin/kernel/time.c
@@ -24,14 +24,10 @@
 
 static struct irqaction bfin_timer_irq = {
         .name = "Blackfin Timer Tick",
-#ifdef CONFIG_IRQ_PER_CPU
-        .flags = IRQF_DISABLED | IRQF_PERCPU,
-#else
         .flags = IRQF_DISABLED
-#endif
 };
 
-#if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE)
+#if defined(CONFIG_IPIPE)
 void __init setup_system_timer0(void)
 {
         /* Power down the core timer, just to play safe. */
@@ -74,7 +70,7 @@ void __init setup_core_timer(void)
 static void __init
 time_sched_init(irqreturn_t(*timer_routine) (int, void *))
 {
-#if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE)
+#if defined(CONFIG_IPIPE)
         setup_system_timer0();
         bfin_timer_irq.handler = timer_routine;
         setup_irq(IRQ_TIMER0, &bfin_timer_irq);
@@ -94,7 +90,7 @@ static unsigned long gettimeoffset(void)
         unsigned long offset;
         unsigned long clocks_per_jiffy;
 
-#if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE)
+#if defined(CONFIG_IPIPE)
         clocks_per_jiffy = bfin_read_TIMER0_PERIOD();
         offset = bfin_read_TIMER0_COUNTER() / \
                 (((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);
@@ -133,36 +129,25 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
         static long last_rtc_update;
 
         write_seqlock(&xtime_lock);
-#if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE)
+        do_timer(1);
+
         /*
-         * TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is
-         * enabled.
+         * If we have an externally synchronized Linux clock, then update
+         * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
+         * called as close as possible to 500 ms before the new second starts.
          */
-        if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) {
-#endif
-                do_timer(1);
-
-                /*
-                 * If we have an externally synchronized Linux clock, then update
-                 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
-                 * called as close as possible to 500 ms before the new second starts.
-                 */
-                if (ntp_synced() &&
-                    xtime.tv_sec > last_rtc_update + 660 &&
-                    (xtime.tv_nsec / NSEC_PER_USEC) >=
-                    500000 - ((unsigned)TICK_SIZE) / 2
-                    && (xtime.tv_nsec / NSEC_PER_USEC) <=
-                    500000 + ((unsigned)TICK_SIZE) / 2) {
-                        if (set_rtc_mmss(xtime.tv_sec) == 0)
-                                last_rtc_update = xtime.tv_sec;
-                        else
-                                /* Do it again in 60s. */
-                                last_rtc_update = xtime.tv_sec - 600;
-                }
-#if defined(CONFIG_TICK_SOURCE_SYSTMR0) && !defined(CONFIG_IPIPE)
-                set_gptimer_status(0, TIMER_STATUS_TIMIL0);
+        if (ntp_synced() &&
+            xtime.tv_sec > last_rtc_update + 660 &&
+            (xtime.tv_nsec / NSEC_PER_USEC) >=
+            500000 - ((unsigned)TICK_SIZE) / 2
+            && (xtime.tv_nsec / NSEC_PER_USEC) <=
+            500000 + ((unsigned)TICK_SIZE) / 2) {
+                if (set_rtc_mmss(xtime.tv_sec) == 0)
+                        last_rtc_update = xtime.tv_sec;
+                else
+                        /* Do it again in 60s. */
+                        last_rtc_update = xtime.tv_sec - 600;
         }
-#endif
         write_sequnlock(&xtime_lock);
 
 #ifdef CONFIG_IPIPE
diff --git a/arch/blackfin/kernel/traps.c b/arch/blackfin/kernel/traps.c
index ffe7fb53eccb..aa76dfb0226e 100644
--- a/arch/blackfin/kernel/traps.c
+++ b/arch/blackfin/kernel/traps.c
@@ -68,6 +68,13 @@
         ({ if (0) printk(fmt, ##arg); 0; })
 #endif
 
+#if defined(CONFIG_DEBUG_MMRS) || defined(CONFIG_DEBUG_MMRS_MODULE)
+u32 last_seqstat;
+#ifdef CONFIG_DEBUG_MMRS_MODULE
+EXPORT_SYMBOL(last_seqstat);
+#endif
+#endif
+
 /* Initiate the event table handler */
 void __init trap_init(void)
 {
@@ -79,7 +86,6 @@ void __init trap_init(void)
 static void decode_address(char *buf, unsigned long address)
 {
 #ifdef CONFIG_DEBUG_VERBOSE
-        struct vm_list_struct *vml;
         struct task_struct *p;
         struct mm_struct *mm;
         unsigned long flags, offset;
@@ -196,6 +202,11 @@ done:
 
 asmlinkage void double_fault_c(struct pt_regs *fp)
 {
+#ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
+        int j;
+        trace_buffer_save(j);
+#endif
+
         console_verbose();
         oops_in_progress = 1;
 #ifdef CONFIG_DEBUG_VERBOSE
@@ -220,9 +231,10 @@ asmlinkage void double_fault_c(struct pt_regs *fp)
                 dump_bfin_process(fp);
                 dump_bfin_mem(fp);
                 show_regs(fp);
+                dump_bfin_trace_buffer();
         }
 #endif
-        panic("Double Fault - unrecoverable event\n");
+        panic("Double Fault - unrecoverable event");
 
 }
 
@@ -239,6 +251,9 @@ asmlinkage void trap_c(struct pt_regs *fp)
         unsigned long trapnr = fp->seqstat & SEQSTAT_EXCAUSE;
 
         trace_buffer_save(j);
+#if defined(CONFIG_DEBUG_MMRS) || defined(CONFIG_DEBUG_MMRS_MODULE)
+        last_seqstat = (u32)fp->seqstat;
+#endif
 
         /* Important - be very careful dereferncing pointers - will lead to
          * double faults if the stack has become corrupt
@@ -588,6 +603,9 @@ asmlinkage void trap_c(struct pt_regs *fp)
                 force_sig_info(sig, &info, current);
         }
 
+        if (ANOMALY_05000461 && trapnr == VEC_HWERR && !access_ok(VERIFY_READ, fp->pc, 8))
+                fp->pc = SAFE_USER_INSTRUCTION;
+
         trace_buffer_restore(j);
         return;
 }
@@ -832,6 +850,11 @@ void show_stack(struct task_struct *task, unsigned long *stack)
         decode_address(buf, (unsigned int)stack);
         printk(KERN_NOTICE " SP: [0x%p] %s\n", stack, buf);
 
+        if (!access_ok(VERIFY_READ, stack, (unsigned int)endstack - (unsigned int)stack)) {
+                printk(KERN_NOTICE "Invalid stack pointer\n");
+                return;
+        }
+
         /* First thing is to look for a frame pointer */
         for (addr = (unsigned int *)((unsigned int)stack & ~0xF); addr < endstack; addr++) {
                 if (*addr & 0x1)
@@ -1066,6 +1089,29 @@ void show_regs(struct pt_regs *fp)
         unsigned int cpu = smp_processor_id();
         unsigned char in_atomic = (bfin_read_IPEND() & 0x10) || in_atomic();
 
+        verbose_printk(KERN_NOTICE "\n");
+        if (CPUID != bfin_cpuid())
+                verbose_printk(KERN_NOTICE "Compiled for cpu family 0x%04x (Rev %d), "
+                        "but running on:0x%04x (Rev %d)\n",
+                        CPUID, bfin_compiled_revid(), bfin_cpuid(), bfin_revid());
+
+        verbose_printk(KERN_NOTICE "ADSP-%s-0.%d",
+                CPU, bfin_compiled_revid());
+
+        if (bfin_compiled_revid() !=  bfin_revid())
+                verbose_printk("(Detected 0.%d)", bfin_revid());
+
+        verbose_printk(" %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n",
+                get_cclk()/1000000, get_sclk()/1000000,
+#ifdef CONFIG_MPU
+                "mpu on"
+#else
+                "mpu off"
+#endif
+                );
+
+        verbose_printk(KERN_NOTICE "%s", linux_banner);
+
         verbose_printk(KERN_NOTICE "\n" KERN_NOTICE "SEQUENCER STATUS:\t\t%s\n", print_tainted());
         verbose_printk(KERN_NOTICE " SEQSTAT: %08lx  IPEND: %04lx  SYSCFG: %04lx\n",
                 (long)fp->seqstat, fp->ipend, fp->syscfg);
@@ -1246,5 +1292,5 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp)
         dump_bfin_mem(fp);
         show_regs(fp);
         dump_stack();
-        panic("Unrecoverable event\n");
+        panic("Unrecoverable event");
 }
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index 27952ae047d8..8b67167cb4f4 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -50,7 +50,9 @@ SECTIONS
                 _text = .;
                 __stext = .;
                 TEXT_TEXT
+#ifndef CONFIG_SCHEDULE_L1
                 SCHED_TEXT
+#endif
                 LOCK_TEXT
                 KPROBES_TEXT
                 *(.text.*)
@@ -180,6 +182,9 @@ SECTIONS
                 . = ALIGN(4);
                 __stext_l1 = .;
                 *(.l1.text)
+#ifdef CONFIG_SCHEDULE_L1
+                SCHED_TEXT
+#endif
                 . = ALIGN(4);
                 __etext_l1 = .;
         }
diff --git a/arch/blackfin/mach-bf518/Kconfig b/arch/blackfin/mach-bf518/Kconfig
index f397ede006bf..4c76fefb7a3b 100644
--- a/arch/blackfin/mach-bf518/Kconfig
+++ b/arch/blackfin/mach-bf518/Kconfig
@@ -156,6 +156,7 @@ config IRQ_PORTH_INTB
         default 11
 config IRQ_TIMER0
         int "IRQ_TIMER0"
+        default 7 if TICKSOURCE_GPTMR0
         default 8
 config IRQ_TIMER1
         int "IRQ_TIMER1"
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 41f2eacfef20..62bba09bcce6 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -82,7 +82,11 @@ static struct physmap_flash_data ezbrd_flash_data = {
 
 static struct resource ezbrd_flash_resource = {
         .start = 0x20000000,
+#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
+        .end   = 0x202fffff,
+#else
         .end   = 0x203fffff,
+#endif
         .flags = IORESOURCE_MEM,
 };
 
@@ -162,8 +166,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -249,8 +253,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
@@ -514,7 +518,7 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
-#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
@@ -678,6 +682,11 @@ static int __init ezbrd_init(void)
                                 ARRAY_SIZE(bfin_i2c_board_info));
         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
+        /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
+        peripheral_request(P_AMS2, "ParaFlash");
+#if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE)
+        peripheral_request(P_AMS3, "ParaFlash");
+#endif
         return 0;
 }
 
diff --git a/arch/blackfin/mach-bf518/include/mach/anomaly.h b/arch/blackfin/mach-bf518/include/mach/anomaly.h
index c847bb101076..b69bd9af38dd 100644
--- a/arch/blackfin/mach-bf518/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf518/include/mach/anomaly.h
@@ -6,14 +6,19 @@
  * Licensed under the GPL-2 or later.
  */
 
-/* This file shoule be up to date with:
+/* This file should be up to date with:
  *  - Revision B, 02/03/2009; ADSP-BF512/BF514/BF516/BF518 Blackfin Processor Anomaly List
  */
 
+/* We plan on not supporting 0.0 silicon, but 0.1 isn't out yet - sorry */
+#if __SILICON_REVISION__ < 0
+# error will not work on BF518 silicon version
+#endif
+
 #ifndef _MACH_ANOMALY_H_
 #define _MACH_ANOMALY_H_
 
-/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
+/* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */
 #define ANOMALY_05000074 (1)
 /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
 #define ANOMALY_05000122 (1)
@@ -47,7 +52,7 @@
 #define ANOMALY_05000435 (1)
 /* PORTx_DRIVE and PORTx_HYSTERESIS Registers Read Back Incorrect Values */
 #define ANOMALY_05000438 (1)
-/* Preboot Cannot be Used to Program the PLL_DIV Register */
+/* Preboot Cannot be Used to Alter the PLL_DIV Register */
 #define ANOMALY_05000439 (1)
 /* bfrom_SysControl() Cannot be Used to Write the PLL_DIV Register */
 #define ANOMALY_05000440 (1)
@@ -61,32 +66,56 @@
 #define ANOMALY_05000453 (1)
 /* PPI_FS3 is Driven One Half Cycle Later Than PPI Data */
 #define ANOMALY_05000455 (1)
+/* False Hardware Error when RETI points to invalid memory */
+#define ANOMALY_05000461 (1)
 
 /* Anomalies that don't exist on this proc */
+#define ANOMALY_05000099 (0)
+#define ANOMALY_05000119 (0)
+#define ANOMALY_05000120 (0)
 #define ANOMALY_05000125 (0)
+#define ANOMALY_05000149 (0)
 #define ANOMALY_05000158 (0)
+#define ANOMALY_05000171 (0)
+#define ANOMALY_05000179 (0)
 #define ANOMALY_05000183 (0)
 #define ANOMALY_05000198 (0)
+#define ANOMALY_05000215 (0)
+#define ANOMALY_05000220 (0)
+#define ANOMALY_05000227 (0)
 #define ANOMALY_05000230 (0)
+#define ANOMALY_05000231 (0)
+#define ANOMALY_05000233 (0)
+#define ANOMALY_05000242 (0)
 #define ANOMALY_05000244 (0)
+#define ANOMALY_05000248 (0)
+#define ANOMALY_05000250 (0)
 #define ANOMALY_05000261 (0)
 #define ANOMALY_05000263 (0)
 #define ANOMALY_05000266 (0)
 #define ANOMALY_05000273 (0)
+#define ANOMALY_05000274 (0)
 #define ANOMALY_05000278 (0)
 #define ANOMALY_05000285 (0)
+#define ANOMALY_05000287 (0)
+#define ANOMALY_05000301 (0)
 #define ANOMALY_05000305 (0)
 #define ANOMALY_05000307 (0)
 #define ANOMALY_05000311 (0)
 #define ANOMALY_05000312 (0)
 #define ANOMALY_05000323 (0)
 #define ANOMALY_05000353 (0)
+#define ANOMALY_05000362 (1)
 #define ANOMALY_05000363 (0)
 #define ANOMALY_05000380 (0)
 #define ANOMALY_05000386 (0)
+#define ANOMALY_05000389 (0)
+#define ANOMALY_05000400 (0)
 #define ANOMALY_05000412 (0)
 #define ANOMALY_05000432 (0)
 #define ANOMALY_05000447 (0)
 #define ANOMALY_05000448 (0)
+#define ANOMALY_05000456 (0)
+#define ANOMALY_05000450 (0)
 
 #endif
diff --git a/arch/blackfin/mach-bf518/include/mach/portmux.h b/arch/blackfin/mach-bf518/include/mach/portmux.h
index f618b487b2b0..a0fc77fd3315 100644
--- a/arch/blackfin/mach-bf518/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf518/include/mach/portmux.h
@@ -185,6 +185,10 @@
 #define P_PTP_PPS               (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(2))
 #define P_PTP_CLKOUT            (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(2))
 
-#define P_HWAIT         (P_DEFINED | P_IDENT(GPIO_PG000000000) | P_FUNCT(1))
+/* AMS */
+#define P_AMS2                  (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1))
+#define P_AMS3                  (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(2))
+
+#define P_HWAIT                 (P_DEFINED | P_IDENT(GPIO_PG000000000) | P_FUNCT(1))
 
 #endif                          /* _MACH_PORTMUX_H_ */
diff --git a/arch/blackfin/mach-bf527/Kconfig b/arch/blackfin/mach-bf527/Kconfig
index 8438ec6d6679..848ac6f86823 100644
--- a/arch/blackfin/mach-bf527/Kconfig
+++ b/arch/blackfin/mach-bf527/Kconfig
@@ -170,6 +170,7 @@ config IRQ_PORTH_INTB
         default 11
 config IRQ_TIMER0
         int "IRQ_TIMER0"
+        default 7 if TICKSOURCE_GPTMR0
         default 8
 config IRQ_TIMER1
         int "IRQ_TIMER1"
diff --git a/arch/blackfin/mach-bf527/boards/cm_bf527.c b/arch/blackfin/mach-bf527/boards/cm_bf527.c
index 48e69eecdba4..6d6f9effa0bb 100644
--- a/arch/blackfin/mach-bf527/boards/cm_bf527.c
+++ b/arch/blackfin/mach-bf527/boards/cm_bf527.c
@@ -463,8 +463,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -554,8 +554,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
@@ -789,7 +789,7 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
-#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
                 .type = "pcf8574_lcd",
diff --git a/arch/blackfin/mach-bf527/boards/ezbrd.c b/arch/blackfin/mach-bf527/boards/ezbrd.c
index 7fe480e4ebe8..1435c5d38cd5 100644
--- a/arch/blackfin/mach-bf527/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf527/boards/ezbrd.c
@@ -247,8 +247,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -354,8 +354,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
@@ -586,7 +586,7 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
-#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index d0864111ef59..147edd1eb1ad 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -485,8 +485,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -509,6 +509,13 @@ static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
 };
 #endif
 
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
+        .enable_dma = 0,
+        .bits_per_word = 8,
+};
+#endif
+
 #if defined(CONFIG_PBX)
 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
         .ctl_reg        = 0x4, /* send zero */
@@ -593,8 +600,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
@@ -624,6 +631,17 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .controller_data = &ad9960_spi_chip_info,
         },
 #endif
+#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
+        {
+                .modalias = "mmc_spi",
+                .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num = 0,
+                .chip_select = 3,
+                .controller_data = &mmc_spi_chip_info,
+                .mode = SPI_MODE_0,
+        },
+#endif
+
 #if defined(CONFIG_PBX)
         {
                 .modalias = "fxs-spi",
@@ -836,7 +854,7 @@ static struct platform_device i2c_bfin_twi_device = {
 #endif
 
 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
-#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
diff --git a/arch/blackfin/mach-bf527/include/mach/anomaly.h b/arch/blackfin/mach-bf527/include/mach/anomaly.h
index df6808d8a6ef..c84ddea95749 100644
--- a/arch/blackfin/mach-bf527/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf527/include/mach/anomaly.h
@@ -6,14 +6,19 @@
  * Licensed under the GPL-2 or later.
  */
 
-/* This file shoule be up to date with:
- *  - Revision B, 08/12/2008; ADSP-BF526 Blackfin Processor Anomaly List
- *  - Revision E, 08/18/2008; ADSP-BF527 Blackfin Processor Anomaly List
+/* This file should be up to date with:
+ *  - Revision C, 03/13/2009; ADSP-BF526 Blackfin Processor Anomaly List
+ *  - Revision F, 03/03/2009; ADSP-BF527 Blackfin Processor Anomaly List
  */
 
 #ifndef _MACH_ANOMALY_H_
 #define _MACH_ANOMALY_H_
 
+/* We do not support old silicon - sorry */
+#if __SILICON_REVISION__ < 0
+# error will not work on BF526/BF527 silicon version
+#endif
+
 #if defined(__ADSPBF522__) || defined(__ADSPBF524__) || defined(__ADSPBF526__)
 # define ANOMALY_BF526 1
 #else
@@ -25,158 +30,203 @@
 # define ANOMALY_BF527 0
 #endif
 
-/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
+#define _ANOMALY_BF526(rev526) (ANOMALY_BF526 && __SILICON_REVISION__ rev526)
+#define _ANOMALY_BF527(rev527) (ANOMALY_BF527 && __SILICON_REVISION__ rev527)
+#define _ANOMALY_BF526_BF527(rev526, rev527) (_ANOMALY_BF526(rev526) || _ANOMALY_BF527(rev527))
+
+/* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */
 #define ANOMALY_05000074 (1)
 /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
 #define ANOMALY_05000119 (1)    /* note: brokenness is noted in documentation, not anomaly sheet */
 /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
 #define ANOMALY_05000122 (1)
-/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
+/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
 #define ANOMALY_05000245 (1)
+/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */
+#define ANOMALY_05000254 (1)
 /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
 #define ANOMALY_05000265 (1)
 /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
 #define ANOMALY_05000310 (1)
 /* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */
-#define ANOMALY_05000313 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000313 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Incorrect Access of OTP_STATUS During otp_write() Function */
-#define ANOMALY_05000328 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000328 (_ANOMALY_BF527(< 2))
+/* Host DMA Boot Modes Are Not Functional */
+#define ANOMALY_05000330 (__SILICON_REVISION__ < 2)
 /* Disallowed Configuration Prevents Subsequent Allowed Configuration on Host DMA Port */
-#define ANOMALY_05000337 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000337 (_ANOMALY_BF527(< 2))
 /* Ethernet MAC MDIO Reads Do Not Meet IEEE Specification */
-#define ANOMALY_05000341 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000341 (_ANOMALY_BF527(< 2))
 /* TWI May Not Operate Correctly Under Certain Signal Termination Conditions */
-#define ANOMALY_05000342 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000342 (_ANOMALY_BF527(< 2))
 /* USB Calibration Value Is Not Initialized */
-#define ANOMALY_05000346 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000346 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* USB Calibration Value to use */
 #define ANOMALY_05000346_value 0xE510
 /* Preboot Routine Incorrectly Alters Reset Value of USB Register */
-#define ANOMALY_05000347 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000347 (_ANOMALY_BF527(< 2))
 /* Security Features Are Not Functional */
-#define ANOMALY_05000348 (ANOMALY_BF527 && __SILICON_REVISION__ < 1)
+#define ANOMALY_05000348 (_ANOMALY_BF527(< 1))
 /* bfrom_SysControl() Firmware Function Performs Improper System Reset */
-#define ANOMALY_05000353 (ANOMALY_BF526)
+#define ANOMALY_05000353 (_ANOMALY_BF526(< 1))
 /* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
-#define ANOMALY_05000355 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000355 (_ANOMALY_BF527(< 2))
 /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
-#define ANOMALY_05000357 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000357 (_ANOMALY_BF527(< 2))
 /* Incorrect Revision Number in DSPID Register */
-#define ANOMALY_05000364 (ANOMALY_BF527 && __SILICON_REVISION__ == 1)
+#define ANOMALY_05000364 (_ANOMALY_BF527(== 1))
 /* PPI Underflow Error Goes Undetected in ITU-R 656 Mode */
 #define ANOMALY_05000366 (1)
 /* Incorrect Default CSEL Value in PLL_DIV */
-#define ANOMALY_05000368 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000368 (_ANOMALY_BF527(< 2))
 /* Possible RETS Register Corruption when Subroutine Is under 5 Cycles in Duration */
-#define ANOMALY_05000371 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000371 (_ANOMALY_BF527(< 2))
 /* Authentication Fails To Initiate */
-#define ANOMALY_05000376 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000376 (_ANOMALY_BF527(< 2))
 /* Data Read From L3 Memory by USB DMA May be Corrupted */
-#define ANOMALY_05000380 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000380 (_ANOMALY_BF527(< 2))
 /* 8-Bit NAND Flash Boot Mode Not Functional */
-#define ANOMALY_05000382 (__SILICON_REVISION__ < 2)
-/* Host Must Not Read Back During Host DMA Boot */
-#define ANOMALY_05000384 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000382 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Boot from OTP Memory Not Functional */
-#define ANOMALY_05000385 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000385 (_ANOMALY_BF527(< 2))
 /* bfrom_SysControl() Firmware Routine Not Functional */
-#define ANOMALY_05000386 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000386 (_ANOMALY_BF527(< 2))
 /* Programmable Preboot Settings Not Functional */
-#define ANOMALY_05000387 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000387 (_ANOMALY_BF527(< 2))
 /* CRC32 Checksum Support Not Functional */
-#define ANOMALY_05000388 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000388 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Reset Vector Must Not Be in SDRAM Memory Space */
-#define ANOMALY_05000389 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000389 (_ANOMALY_BF527(< 2))
 /* pTempCurrent Not Present in ADI_BOOT_DATA Structure */
-#define ANOMALY_05000392 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000392 (_ANOMALY_BF527(< 2))
 /* Deprecated Value of dTempByteCount in ADI_BOOT_DATA Structure */
-#define ANOMALY_05000393 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000393 (_ANOMALY_BF527(< 2))
 /* Log Buffer Not Functional */
-#define ANOMALY_05000394 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000394 (_ANOMALY_BF527(< 2))
 /* Hook Routine Not Functional */
-#define ANOMALY_05000395 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000395 (_ANOMALY_BF527(< 2))
 /* Header Indirect Bit Not Functional */
-#define ANOMALY_05000396 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000396 (_ANOMALY_BF527(< 2))
 /* BK_ONES, BK_ZEROS, and BK_DATECODE Constants Not Functional */
-#define ANOMALY_05000397 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000397 (_ANOMALY_BF527(< 2))
 /* SWRESET, DFRESET and WDRESET Bits in the SYSCR Register Not Functional */
-#define ANOMALY_05000398 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000398 (_ANOMALY_BF527(< 2))
 /* BCODE_NOBOOT in BCODE Field of SYSCR Register Not Functional */
-#define ANOMALY_05000399 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000399 (_ANOMALY_BF527(< 2))
 /* PPI Data Signals D0 and D8 do not Tristate After Disabling PPI */
-#define ANOMALY_05000401 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000401 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Level-Sensitive External GPIO Wakeups May Cause Indefinite Stall */
-#define ANOMALY_05000403 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000403 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Lockbox SESR Disallows Certain User Interrupts */
-#define ANOMALY_05000404 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000404 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Lockbox SESR Firmware Does Not Save/Restore Full Context */
 #define ANOMALY_05000405 (1)
 /* Lockbox SESR Firmware Arguments Are Not Retained After First Initialization */
-#define ANOMALY_05000407 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000407 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Lockbox Firmware Memory Cleanup Routine Does not Clear Registers */
 #define ANOMALY_05000408 (1)
 /* Lockbox firmware leaves MDMA0 channel enabled */
-#define ANOMALY_05000409 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000409 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Incorrect Default Internal Voltage Regulator Setting */
-#define ANOMALY_05000410 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000410 (_ANOMALY_BF527(< 2))
 /* bfrom_SysControl() Firmware Function Cannot be Used to Enter Power Saving Modes */
-#define ANOMALY_05000411 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000411 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* OTP_CHECK_FOR_PREV_WRITE Bit is Not Functional in bfrom_OtpWrite() API */
-#define ANOMALY_05000414 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000414 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* DEB2_URGENT Bit Not Functional */
-#define ANOMALY_05000415 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000415 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Speculative Fetches Can Cause Undesired External FIFO Operations */
 #define ANOMALY_05000416 (1)
 /* SPORT0 Ignores External TSCLK0 on PG14 When TMR6 is an Output */
-#define ANOMALY_05000417 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
-/* tSFSPE and tHFSPE Do Not Meet Data Sheet Specifications */
-#define ANOMALY_05000418 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000417 (_ANOMALY_BF527(< 2))
+/* PPI Timing Requirements tSFSPE and tHFSPE Do Not Meet Data Sheet Specifications */
+#define ANOMALY_05000418 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* USB PLL_STABLE Bit May Not Accurately Reflect the USB PLL's Status */
-#define ANOMALY_05000420 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000420 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* TWI Fall Time (Tof) May Violate the Minimum I2C Specification */
 #define ANOMALY_05000421 (1)
 /* TWI Input Capacitance (Ci) May Violate the Maximum I2C Specification */
-#define ANOMALY_05000422 (ANOMALY_BF527 && __SILICON_REVISION__ > 1)
+#define ANOMALY_05000422 (_ANOMALY_BF526_BF527(> 0, > 1))
 /* Certain Ethernet Frames With Errors are Misclassified in RMII Mode */
-#define ANOMALY_05000423 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000423 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Internal Voltage Regulator Not Trimmed */
-#define ANOMALY_05000424 (ANOMALY_BF527 && __SILICON_REVISION__ < 2)
+#define ANOMALY_05000424 (_ANOMALY_BF527(< 2))
 /* Multichannel SPORT Channel Misalignment Under Specific Configuration */
-#define ANOMALY_05000425 (__SILICON_REVISION__ < 2)
-/* Speculative Fetches of Indirect-Pointer Instructions Can Cause Spurious Hardware Errors */
+#define ANOMALY_05000425 (_ANOMALY_BF526_BF527(< 1, < 2))
+/* Speculative Fetches of Indirect-Pointer Instructions Can Cause False Hardware Errors */
 #define ANOMALY_05000426 (1)
 /* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Reflects Buffer Status Instead of IRQ Status */
-#define ANOMALY_05000429 (__SILICON_REVISION__ < 2)
+#define ANOMALY_05000429 (_ANOMALY_BF526_BF527(< 1, < 2))
 /* Software System Reset Corrupts PLL_LOCKCNT Register */
-#define ANOMALY_05000430 (ANOMALY_BF527 && __SILICON_REVISION__ > 1)
+#define ANOMALY_05000430 (_ANOMALY_BF527(> 1))
+/* Incorrect Use of Stack in Lockbox Firmware During Authentication */
+#define ANOMALY_05000431 (1)
 /* bfrom_SysControl() Does Not Clear SIC_IWR1 Before Executing PLL Programming Sequence */
-#define ANOMALY_05000432 (ANOMALY_BF526)
+#define ANOMALY_05000432 (_ANOMALY_BF526(< 1))
 /* Certain SIC Registers are not Reset After Soft or Core Double Fault Reset */
-#define ANOMALY_05000435 ((ANOMALY_BF526 && __SILICON_REVISION__ < 1) || ANOMALY_BF527)
+#define ANOMALY_05000435 (_ANOMALY_BF526_BF527(< 1, >= 0))
+/* Preboot Cannot be Used to Alter the PLL_DIV Register */
+#define ANOMALY_05000439 (_ANOMALY_BF526_BF527(< 1, >= 0))
+/* bfrom_SysControl() Cannot be Used to Write the PLL_DIV Register */
+#define ANOMALY_05000440 (_ANOMALY_BF526_BF527(< 1, >= 0))
+/* OTP Write Accesses Not Supported */
+#define ANOMALY_05000442 (_ANOMALY_BF527(< 1))
 /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
 #define ANOMALY_05000443 (1)
+/* The WURESET Bit in the SYSCR Register is not Functional */
+#define ANOMALY_05000445 (1)
+/* BCODE_QUICKBOOT, BCODE_ALLBOOT, and BCODE_FULLBOOT Settings in SYSCR Register Not Functional */
+#define ANOMALY_05000451 (1)
+/* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */
+#define ANOMALY_05000452 (_ANOMALY_BF526_BF527(< 1, >= 0))
+/* USB Receive Interrupt Is Not Generated in DMA Mode 1 */
+#define ANOMALY_05000456 (1)
+/* Host DMA Port Responds to Certain Bus Activity Without HOST_CE Assertion */
+#define ANOMALY_05000457 (1)
+/* False Hardware Error when RETI points to invalid memory */
+#define ANOMALY_05000461 (1)
 
 /* Anomalies that don't exist on this proc */
+#define ANOMALY_05000099 (0)
+#define ANOMALY_05000120 (0)
 #define ANOMALY_05000125 (0)
+#define ANOMALY_05000149 (0)
 #define ANOMALY_05000158 (0)
+#define ANOMALY_05000171 (0)
+#define ANOMALY_05000179 (0)
 #define ANOMALY_05000183 (0)
 #define ANOMALY_05000198 (0)
+#define ANOMALY_05000215 (0)
+#define ANOMALY_05000220 (0)
+#define ANOMALY_05000227 (0)
 #define ANOMALY_05000230 (0)
+#define ANOMALY_05000231 (0)
+#define ANOMALY_05000233 (0)
+#define ANOMALY_05000242 (0)
 #define ANOMALY_05000244 (0)
+#define ANOMALY_05000248 (0)
+#define ANOMALY_05000250 (0)
 #define ANOMALY_05000261 (0)
 #define ANOMALY_05000263 (0)
 #define ANOMALY_05000266 (0)
 #define ANOMALY_05000273 (0)
+#define ANOMALY_05000274 (0)
 #define ANOMALY_05000278 (0)
 #define ANOMALY_05000285 (0)
+#define ANOMALY_05000287 (0)
+#define ANOMALY_05000301 (0)
 #define ANOMALY_05000305 (0)
 #define ANOMALY_05000307 (0)
 #define ANOMALY_05000311 (0)
 #define ANOMALY_05000312 (0)
 #define ANOMALY_05000323 (0)
+#define ANOMALY_05000362 (1)
 #define ANOMALY_05000363 (0)
+#define ANOMALY_05000400 (0)
 #define ANOMALY_05000412 (0)
 #define ANOMALY_05000447 (0)
 #define ANOMALY_05000448 (0)
+#define ANOMALY_05000450 (0)
 
 #endif
diff --git a/arch/blackfin/mach-bf533/Kconfig b/arch/blackfin/mach-bf533/Kconfig
index 14427de7d77f..4c572443147e 100644
--- a/arch/blackfin/mach-bf533/Kconfig
+++ b/arch/blackfin/mach-bf533/Kconfig
@@ -59,6 +59,7 @@ config DMA7_UARTTX
         default 10
 config TIMER0
         int "TIMER0"
+        default 7 if TICKSOURCE_GPTMR0
         default 8
 config TIMER1
         int "TIMER1"
diff --git a/arch/blackfin/mach-bf533/boards/H8606.c b/arch/blackfin/mach-bf533/boards/H8606.c
index 0c66bf44cfab..895f213ea454 100644
--- a/arch/blackfin/mach-bf533/boards/H8606.c
+++ b/arch/blackfin/mach-bf533/boards/H8606.c
@@ -173,7 +173,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .ctl_reg = 0x1000,
@@ -216,7 +216,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 4,     /* actual baudrate is SCLK/(2xspeed_hz) */
diff --git a/arch/blackfin/mach-bf533/boards/cm_bf533.c b/arch/blackfin/mach-bf533/boards/cm_bf533.c
index e8974878d8c2..a727e538fa28 100644
--- a/arch/blackfin/mach-bf533/boards/cm_bf533.c
+++ b/arch/blackfin/mach-bf533/boards/cm_bf533.c
@@ -82,7 +82,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 #endif
 
 /* SPI ADC chip */
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
         .bits_per_word = 16,
@@ -117,7 +117,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
diff --git a/arch/blackfin/mach-bf533/boards/ezkit.c b/arch/blackfin/mach-bf533/boards/ezkit.c
index 08cd0969de47..842f1c9c2393 100644
--- a/arch/blackfin/mach-bf533/boards/ezkit.c
+++ b/arch/blackfin/mach-bf533/boards/ezkit.c
@@ -118,7 +118,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -154,7 +154,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index db96f33f72e2..e19c565ade16 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -192,7 +192,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -237,7 +237,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
@@ -448,7 +448,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 .irq = 39,
         },
 #endif
-#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
diff --git a/arch/blackfin/mach-bf533/include/mach/anomaly.h b/arch/blackfin/mach-bf533/include/mach/anomaly.h
index 1cf893e2e55b..31145b509e20 100644
--- a/arch/blackfin/mach-bf533/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf533/include/mach/anomaly.h
@@ -6,7 +6,7 @@
  * Licensed under the GPL-2 or later.
  */
 
-/* This file shoule be up to date with:
+/* This file should be up to date with:
  *  - Revision E, 09/18/2008; ADSP-BF531/BF532/BF533 Blackfin Processor Anomaly List
  */
 
@@ -34,12 +34,12 @@
 # define ANOMALY_BF533 0
 #endif
 
-/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */
+/* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */
 #define ANOMALY_05000074 (1)
 /* UART Line Status Register (UART_LSR) Bits Are Not Updated at the Same Time */
 #define ANOMALY_05000099 (__SILICON_REVISION__ < 5)
 /* Watchpoint Status Register (WPSTAT) Bits Are Set on Every Corresponding Match */
-#define ANOMALY_05000105 (1)
+#define ANOMALY_05000105 (__SILICON_REVISION__ > 2)
 /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
 #define ANOMALY_05000119 (1)
 /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
@@ -48,7 +48,7 @@
 #define ANOMALY_05000158 (__SILICON_REVISION__ < 5)
 /* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */
 #define ANOMALY_05000166 (1)
-/* Turning Serial Ports on with External Frame Syncs */
+/* Turning SPORTs on while External Frame Sync Is Active May Corrupt Data */
 #define ANOMALY_05000167 (1)
 /* PPI_COUNT Cannot Be Programmed to 0 in General Purpose TX or RX Modes */
 #define ANOMALY_05000179 (__SILICON_REVISION__ < 5)
@@ -67,9 +67,9 @@
 /* Current DMA Address Shows Wrong Value During Carry Fix */
 #define ANOMALY_05000199 (__SILICON_REVISION__ < 4)
 /* SPORT TFS and DT Are Incorrectly Driven During Inactive Channels in Certain Conditions */
-#define ANOMALY_05000200 (__SILICON_REVISION__ < 5)
+#define ANOMALY_05000200 (__SILICON_REVISION__ == 3 || __SILICON_REVISION__ == 4)
 /* Receive Frame Sync Not Ignored During Active Frames in SPORT Multi-Channel Mode */
-#define ANOMALY_05000201 (__SILICON_REVISION__ < 4)
+#define ANOMALY_05000201 (__SILICON_REVISION__ == 3)
 /* Possible Infinite Stall with Specific Dual-DAG Situation */
 #define ANOMALY_05000202 (__SILICON_REVISION__ < 5)
 /* Specific Sequence That Can Cause DMA Error or DMA Stopping */
@@ -104,7 +104,7 @@
 #define ANOMALY_05000242 (__SILICON_REVISION__ < 5)
 /* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */
 #define ANOMALY_05000244 (__SILICON_REVISION__ < 5)
-/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
+/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
 #define ANOMALY_05000245 (1)
 /* Data CPLBs Should Prevent Spurious Hardware Errors */
 #define ANOMALY_05000246 (__SILICON_REVISION__ < 5)
@@ -137,7 +137,7 @@
 /* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */
 #define ANOMALY_05000270 (__SILICON_REVISION__ < 5)
 /* Spontaneous Reset of Internal Voltage Regulator */
-#define ANOMALY_05000271 (__SILICON_REVISION__ < 4)
+#define ANOMALY_05000271 (__SILICON_REVISION__ == 3)
 /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
 #define ANOMALY_05000272 (1)
 /* Writes to Synchronous SDRAM Memory May Be Lost */
@@ -165,14 +165,14 @@
 /* New Feature: Additional PPI Frame Sync Sampling Options (Not Available On Older Silicon) */
 #define ANOMALY_05000306 (__SILICON_REVISION__ < 5)
 /* SCKELOW Bit Does Not Maintain State Through Hibernate */
-#define ANOMALY_05000307 (1)
+#define ANOMALY_05000307 (1)    /* note: brokenness is noted in documentation, not anomaly sheet */
 /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
 #define ANOMALY_05000310 (1)
 /* Erroneous Flag (GPIO) Pin Operations under Specific Sequences */
 #define ANOMALY_05000311 (__SILICON_REVISION__ < 6)
 /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
 #define ANOMALY_05000312 (__SILICON_REVISION__ < 6)
-/* PPI Is Level-Sensitive on First Transfer */
+/* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */
 #define ANOMALY_05000313 (__SILICON_REVISION__ < 6)
 /* Killed System MMR Write Completes Erroneously On Next System MMR Access */
 #define ANOMALY_05000315 (__SILICON_REVISION__ < 6)
@@ -200,17 +200,63 @@
 #define ANOMALY_05000426 (1)
 /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
 #define ANOMALY_05000443 (1)
+/* False Hardware Error when RETI points to invalid memory */
+#define ANOMALY_05000461 (1)
 
 /* These anomalies have been "phased" out of analog.com anomaly sheets and are
  * here to show running on older silicon just isn't feasible.
  */
 
+/* Internal voltage regulator can't be modified via register writes */
+#define ANOMALY_05000066 (__SILICON_REVISION__ < 2)
 /* Watchpoints (Hardware Breakpoints) are not supported */
 #define ANOMALY_05000067 (__SILICON_REVISION__ < 3)
+/* SDRAM PSSE bit cannot be set again after SDRAM Powerup */
+#define ANOMALY_05000070 (__SILICON_REVISION__ < 2)
+/* Writing FIO_DIR can corrupt a programmable flag's data */
+#define ANOMALY_05000079 (__SILICON_REVISION__ < 2)
+/* Timer Auto-Baud Mode requires the UART clock to be enabled */
+#define ANOMALY_05000086 (__SILICON_REVISION__ < 2)
+/* Internal Clocking Modes on SPORT0 not supported */
+#define ANOMALY_05000088 (__SILICON_REVISION__ < 2)
+/* Internal voltage regulator does not wake up from an RTC wakeup */
+#define ANOMALY_05000092 (__SILICON_REVISION__ < 2)
+/* The IFLUSH instruction must be preceded by a CSYNC instruction */
+#define ANOMALY_05000093 (__SILICON_REVISION__ < 2)
+/* Vectoring to an instruction that is presently being filled into the instruction cache may cause erroneous behavior */
+#define ANOMALY_05000095 (__SILICON_REVISION__ < 2)
+/* PREFETCH, FLUSH, and FLUSHINV must be followed by a CSYNC */
+#define ANOMALY_05000096 (__SILICON_REVISION__ < 2)
+/* Performance Monitor 0 and 1 are swapped when monitoring memory events */
+#define ANOMALY_05000097 (__SILICON_REVISION__ < 2)
+/* 32-bit SPORT DMA will be word reversed */
+#define ANOMALY_05000098 (__SILICON_REVISION__ < 2)
+/* Incorrect status in the UART_IIR register */
+#define ANOMALY_05000100 (__SILICON_REVISION__ < 2)
+/* Reading X_MODIFY or Y_MODIFY while DMA channel is active */
+#define ANOMALY_05000101 (__SILICON_REVISION__ < 2)
+/* Descriptor-based MemDMA may lock up with 32-bit transfers or if transfers span 64KB buffers */
+#define ANOMALY_05000102 (__SILICON_REVISION__ < 2)
+/* Incorrect value written to the cycle counters */
+#define ANOMALY_05000103 (__SILICON_REVISION__ < 2)
+/* Stores to L1 Data memory incorrect when a specific sequence is followed */
+#define ANOMALY_05000104 (__SILICON_REVISION__ < 2)
+/* Programmable Flag (PF3) functionality not supported in all PPI modes */
+#define ANOMALY_05000106 (__SILICON_REVISION__ < 2)
+/* Data store can be lost when targeting a cache line fill */
+#define ANOMALY_05000107 (__SILICON_REVISION__ < 2)
 /* Reserved bits in SYSCFG register not set at power on */
 #define ANOMALY_05000109 (__SILICON_REVISION__ < 3)
+/* Infinite Core Stall */
+#define ANOMALY_05000114 (__SILICON_REVISION__ < 2)
+/* PPI_FSx may glitch when generated by the on chip Timers */
+#define ANOMALY_05000115 (__SILICON_REVISION__ < 2)
 /* Trace Buffers may record discontinuities into emulation mode and/or exception, NMI, reset handlers */
 #define ANOMALY_05000116 (__SILICON_REVISION__ < 3)
+/* DTEST registers allow access to Data Cache when DTEST_COMMAND< 14 >= 0 */
+#define ANOMALY_05000117 (__SILICON_REVISION__ < 2)
+/* Booting from an 8-bit or 24-bit Addressable SPI device is not supported */
+#define ANOMALY_05000118 (__SILICON_REVISION__ < 2)
 /* DTEST_COMMAND initiated memory access may be incorrect if data cache or DMA is active */
 #define ANOMALY_05000123 (__SILICON_REVISION__ < 3)
 /* DMA Lock-up at CCLK to SCLK ratios of 4:1, 2:1, or 1:1 */
@@ -222,7 +268,9 @@
 /* DMEM_CONTROL is not set on Reset */
 #define ANOMALY_05000137 (__SILICON_REVISION__ < 3)
 /* SPI boot will not complete if there is a zero fill block in the loader file */
-#define ANOMALY_05000138 (__SILICON_REVISION__ < 3)
+#define ANOMALY_05000138 (__SILICON_REVISION__ == 2)
+/* Timerx_Config must be set for using the PPI in GP output mode with internal Frame Syncs */
+#define ANOMALY_05000139 (__SILICON_REVISION__ < 2)
 /* Allowing the SPORT RX FIFO to fill will cause an overflow */
 #define ANOMALY_05000140 (__SILICON_REVISION__ < 3)
 /* An Infinite Stall occurs with a particular sequence of consecutive dual dag events */
@@ -237,17 +285,17 @@
 #define ANOMALY_05000145 (__SILICON_REVISION__ < 3)
 /* MDMA may lose the first few words of a descriptor chain */
 #define ANOMALY_05000146 (__SILICON_REVISION__ < 3)
-/* The source MDMA descriptor may stop with a DMA Error */
+/* Source MDMA descriptor may stop with a DMA Error near beginning of descriptor fetch */
 #define ANOMALY_05000147 (__SILICON_REVISION__ < 3)
 /* When booting from a 16-bit asynchronous memory device, the upper 8-bits of each word must be 0x00 */
 #define ANOMALY_05000148 (__SILICON_REVISION__ < 3)
 /* Frame Delay in SPORT Multichannel Mode */
 #define ANOMALY_05000153 (__SILICON_REVISION__ < 3)
-/* SPORT TFS signal is active in Multi-channel mode outside of valid channels */
+/* SPORT TFS signal stays active in multichannel mode outside of valid channels */
 #define ANOMALY_05000154 (__SILICON_REVISION__ < 3)
 /* Timer1 can not be used for PWMOUT mode when a certain PPI mode is in use */
 #define ANOMALY_05000155 (__SILICON_REVISION__ < 3)
-/* A killed 32-bit System MMR write will lead to the next system MMR access thinking it should be 32-bit. */
+/* Killed 32-bit MMR write leads to next system MMR access thinking it should be 32-bit */
 #define ANOMALY_05000157 (__SILICON_REVISION__ < 3)
 /* SPORT transmit data is not gated by external frame sync in certain conditions */
 #define ANOMALY_05000163 (__SILICON_REVISION__ < 3)
@@ -275,15 +323,27 @@
 #define ANOMALY_05000206 (__SILICON_REVISION__ < 3)
 
 /* Anomalies that don't exist on this proc */
+#define ANOMALY_05000120 (0)
+#define ANOMALY_05000149 (0)
+#define ANOMALY_05000171 (0)
+#define ANOMALY_05000220 (0)
+#define ANOMALY_05000248 (0)
 #define ANOMALY_05000266 (0)
+#define ANOMALY_05000274 (0)
+#define ANOMALY_05000287 (0)
 #define ANOMALY_05000323 (0)
 #define ANOMALY_05000353 (1)
+#define ANOMALY_05000362 (1)
 #define ANOMALY_05000380 (0)
 #define ANOMALY_05000386 (1)
+#define ANOMALY_05000389 (0)
 #define ANOMALY_05000412 (0)
+#define ANOMALY_05000430 (0)
 #define ANOMALY_05000432 (0)
 #define ANOMALY_05000435 (0)
 #define ANOMALY_05000447 (0)
 #define ANOMALY_05000448 (0)
+#define ANOMALY_05000456 (0)
+#define ANOMALY_05000450 (0)
 
 #endif
diff --git a/arch/blackfin/mach-bf537/Kconfig b/arch/blackfin/mach-bf537/Kconfig
index bbc08fd4f122..d81224f9d723 100644
--- a/arch/blackfin/mach-bf537/Kconfig
+++ b/arch/blackfin/mach-bf537/Kconfig
@@ -66,6 +66,7 @@ config IRQ_MAC_TX
         default 11
 config IRQ_TIMER0
         int "IRQ_TIMER0"
+        default 7 if TICKSOURCE_GPTMR0
         default 8
 config IRQ_TIMER1
         int "IRQ_TIMER1"
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index 41c75b9bfac0..4fee19673127 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -86,7 +86,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -129,7 +129,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 4e1de1e53f89..26707ce39f29 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -265,8 +265,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -333,8 +333,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 0572926da23f..dfb5036f8a6b 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -508,8 +508,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -607,6 +607,43 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 };
 #endif
 
+#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
+#include <linux/input.h>
+#include <linux/spi/adxl34x.h>
+static const struct adxl34x_platform_data adxl34x_info = {
+        .x_axis_offset = 0,
+        .y_axis_offset = 0,
+        .z_axis_offset = 0,
+        .tap_threshold = 0x31,
+        .tap_duration = 0x10,
+        .tap_latency = 0x60,
+        .tap_window = 0xF0,
+        .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
+        .act_axis_control = 0xFF,
+        .activity_threshold = 5,
+        .inactivity_threshold = 3,
+        .inactivity_time = 4,
+        .free_fall_threshold = 0x7,
+        .free_fall_time = 0x20,
+        .data_rate = 0x8,
+        .data_range = ADXL_FULL_RES,
+
+        .ev_type = EV_ABS,
+        .ev_code_x = ABS_X,             /* EV_REL */
+        .ev_code_y = ABS_Y,             /* EV_REL */
+        .ev_code_z = ABS_Z,             /* EV_REL */
+
+        .ev_code_tap_x = BTN_TOUCH,             /* EV_KEY */
+        .ev_code_tap_y = BTN_TOUCH,             /* EV_KEY */
+        .ev_code_tap_z = BTN_TOUCH,             /* EV_KEY */
+
+/*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
+/*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
+        .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
+        .fifo_mode = ADXL_FIFO_STREAM,
+};
+#endif
+
 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
         .enable_dma = 0,
@@ -695,8 +732,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .mode = SPI_MODE_3,
         },
 #endif
-#if defined(CONFIG_SPI_ADC_BF533) \
-        || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) \
+        || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
@@ -1280,7 +1317,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 .irq = IRQ_PF5,
         },
 #endif
-#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
@@ -1312,6 +1349,13 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
                 .platform_data = (void *)&adp5520_pdev_data,
         },
 #endif
+#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
+        {
+                I2C_BOARD_INFO("adxl34x", 0x53),
+                .irq = IRQ_PG3,
+                .platform_data = (void *)&adxl34x_info,
+        },
+#endif
 };
 
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
@@ -1358,16 +1402,18 @@ static struct resource bfin_pata_resources[] = {
 static struct pata_platform_info bfin_pata_platform_data = {
         .ioport_shift = 0,
 };
-
+/* CompactFlash Storage Card Memory Mapped Adressing
+ * /REG = A11 = 1
+ */
 static struct resource bfin_pata_resources[] = {
         {
-                .start = 0x20211820,
-                .end = 0x2021183F,
+                .start = 0x20211800,
+                .end = 0x20211807,
                 .flags = IORESOURCE_MEM,
         },
         {
-                .start = 0x2021181C,
-                .end = 0x2021181F,
+                .start = 0x2021180E,    /* Device Ctl */
+                .end = 0x2021180E,
                 .flags = IORESOURCE_MEM,
         },
 };
@@ -1527,7 +1573,8 @@ static int __init stamp_init(void)
         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 
-#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
+#if (defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)) \
+         && defined(PATA_INT)
         irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
 #endif
 
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
index 53ad10f3cd76..280574591201 100644
--- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -86,7 +86,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -129,7 +129,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index 1bfd80c26c90..fc9663425465 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -6,7 +6,7 @@
  * Licensed under the GPL-2 or later.
  */
 
-/* This file shoule be up to date with:
+/* This file should be up to date with:
  *  - Revision D, 09/18/2008; ADSP-BF534/ADSP-BF536/ADSP-BF537 Blackfin Processor Anomaly List
  */
 
@@ -36,77 +36,75 @@
 
 /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */
 #define ANOMALY_05000074 (1)
-/* DMA_RUN bit is not valid after a Peripheral Receive Channel DMA stops */
+/* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
 #define ANOMALY_05000119 (1)
-/* Rx.H cannot be used to access 16-bit System MMR registers */
+/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
 #define ANOMALY_05000122 (1)
 /* Killed 32-bit MMR write leads to next system MMR access thinking it should be 32-bit */
 #define ANOMALY_05000157 (__SILICON_REVISION__ < 2)
-/* Turning SPORTs on while External Frame Sync Is Active May Corrupt Data */
-#define ANOMALY_05000167 (1)
-/* PPI_DELAY not functional in PPI modes with 0 frame syncs */
+/* PPI_DELAY Not Functional in PPI Modes with 0 Frame Syncs */
 #define ANOMALY_05000180 (1)
 /* Instruction Cache Is Not Functional */
 #define ANOMALY_05000237 (__SILICON_REVISION__ < 2)
-/* If i-cache is on, CSYNC/SSYNC/IDLE around Change of Control causes failures */
+/* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */
 #define ANOMALY_05000244 (__SILICON_REVISION__ < 3)
-/* Spurious Hardware Error from an access in the shadow of a conditional branch */
+/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
 #define ANOMALY_05000245 (1)
 /* CLKIN Buffer Output Enable Reset Behavior Is Changed */
 #define ANOMALY_05000247 (1)
-/* Incorrect Bit-Shift of Data Word in Multichannel (TDM) mode in certain conditions */
+/* Incorrect Bit Shift of Data Word in Multichannel (TDM) Mode in Certain Conditions */
 #define ANOMALY_05000250 (__SILICON_REVISION__ < 3)
 /* EMAC Tx DMA error after an early frame abort */
 #define ANOMALY_05000252 (__SILICON_REVISION__ < 3)
-/* Maximum external clock speed for Timers */
+/* Maximum External Clock Speed for Timers */
 #define ANOMALY_05000253 (__SILICON_REVISION__ < 3)
-/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT mode with external clock */
+/* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */
 #define ANOMALY_05000254 (__SILICON_REVISION__ > 2)
-/* Entering Hibernate Mode with RTC Seconds event interrupt not functional */
+/* Entering Hibernate State with RTC Seconds Interrupt Not Functional */
 #define ANOMALY_05000255 (__SILICON_REVISION__ < 3)
 /* EMAC MDIO input latched on wrong MDC edge */
 #define ANOMALY_05000256 (__SILICON_REVISION__ < 3)
-/* Interrupt/Exception during short hardware loop may cause bad instruction fetches */
+/* Interrupt/Exception During Short Hardware Loop May Cause Bad Instruction Fetches */
 #define ANOMALY_05000257 (__SILICON_REVISION__ < 3)
-/* Instruction Cache is corrupted when bits 9 and 12 of the ICPLB Data registers differ */
+/* Instruction Cache Is Corrupted When Bits 9 and 12 of the ICPLB Data Registers Differ */
 #define ANOMALY_05000258 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ == 1) || __SILICON_REVISION__ == 2)
-/* ICPLB_STATUS MMR register may be corrupted */
+/* ICPLB_STATUS MMR Register May Be Corrupted */
 #define ANOMALY_05000260 (__SILICON_REVISION__ == 2)
-/* DCPLB_FAULT_ADDR MMR register may be corrupted */
+/* DCPLB_FAULT_ADDR MMR Register May Be Corrupted */
 #define ANOMALY_05000261 (__SILICON_REVISION__ < 3)
-/* Stores to data cache may be lost */
+/* Stores To Data Cache May Be Lost */
 #define ANOMALY_05000262 (__SILICON_REVISION__ < 3)
-/* Hardware loop corrupted when taking an ICPLB exception */
+/* Hardware Loop Corrupted When Taking an ICPLB Exception */
 #define ANOMALY_05000263 (__SILICON_REVISION__ == 2)
-/* CSYNC/SSYNC/IDLE causes infinite stall in second to last instruction in hardware loop */
+/* CSYNC/SSYNC/IDLE Causes Infinite Stall in Penultimate Instruction in Hardware Loop */
 #define ANOMALY_05000264 (__SILICON_REVISION__ < 3)
-/* Sensitivity to noise with slow input edge rates on external SPORT TX and RX clocks */
+/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
 #define ANOMALY_05000265 (1)
 /* Memory DMA error when peripheral DMA is running with non-zero DEB_TRAFFIC_PERIOD */
 #define ANOMALY_05000268 (__SILICON_REVISION__ < 3)
-/* High I/O activity causes output voltage of internal voltage regulator (VDDint) to decrease */
+/* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */
 #define ANOMALY_05000270 (__SILICON_REVISION__ < 3)
-/* Certain data cache write through modes fail for VDDint <=0.9V */
+/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
 #define ANOMALY_05000272 (1)
-/* Writes to Synchronous SDRAM memory may be lost */
+/* Writes to Synchronous SDRAM Memory May Be Lost */
 #define ANOMALY_05000273 (__SILICON_REVISION__ < 3)
-/* Writes to an I/O data register one SCLK cycle after an edge is detected may clear interrupt */
+/* Writes to an I/O Data Register One SCLK Cycle after an Edge Is Detected May Clear Interrupt */
 #define ANOMALY_05000277 (__SILICON_REVISION__ < 3)
-/* Disabling Peripherals with DMA running may cause DMA system instability */
+/* Disabling Peripherals with DMA Running May Cause DMA System Instability */
 #define ANOMALY_05000278 (((ANOMALY_BF536 || ANOMALY_BF537) && __SILICON_REVISION__ < 3) || (ANOMALY_BF534 && __SILICON_REVISION__ < 2))
 /* SPI Master boot mode does not work well with Atmel Data flash devices */
 #define ANOMALY_05000280 (1)
-/* False Hardware Error Exception when ISR context is not restored */
+/* False Hardware Error Exception When ISR Context Is Not Restored */
 #define ANOMALY_05000281 (__SILICON_REVISION__ < 3)
-/* Memory DMA corruption with 32-bit data and traffic control */
+/* Memory DMA Corruption with 32-Bit Data and Traffic Control */
 #define ANOMALY_05000282 (__SILICON_REVISION__ < 3)
 /* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */
 #define ANOMALY_05000283 (__SILICON_REVISION__ < 3)
 /* New Feature: EMAC TX DMA Word Alignment (Not Available On Older Silicon) */
 #define ANOMALY_05000285 (__SILICON_REVISION__ < 3)
-/* SPORTs may receive bad data if FIFOs fill up */
+/* SPORTs May Receive Bad Data If FIFOs Fill Up */
 #define ANOMALY_05000288 (__SILICON_REVISION__ < 3)
-/* Memory to memory DMA source/destination descriptors must be in same memory space */
+/* Memory-To-Memory DMA Source/Destination Descriptors Must Be in Same Memory Space */
 #define ANOMALY_05000301 (1)
 /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */
 #define ANOMALY_05000304 (__SILICON_REVISION__ < 3)
@@ -116,11 +114,11 @@
 #define ANOMALY_05000307 (__SILICON_REVISION__ < 3)
 /* Writing UART_THR while UART clock is disabled sends erroneous start bit */
 #define ANOMALY_05000309 (__SILICON_REVISION__ < 3)
-/* False hardware errors caused by fetches at the boundary of reserved memory */
+/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
 #define ANOMALY_05000310 (1)
-/* Errors when SSYNC, CSYNC, or loads to LT, LB and LC registers are interrupted */
+/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
 #define ANOMALY_05000312 (1)
-/* PPI is level sensitive on first transfer */
+/* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */
 #define ANOMALY_05000313 (1)
 /* Killed System MMR Write Completes Erroneously On Next System MMR Access */
 #define ANOMALY_05000315 (__SILICON_REVISION__ < 3)
@@ -156,24 +154,46 @@
 #define ANOMALY_05000426 (1)
 /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
 #define ANOMALY_05000443 (1)
+/* False Hardware Error when RETI points to invalid memory */
+#define ANOMALY_05000461 (1)
 
 /* Anomalies that don't exist on this proc */
+#define ANOMALY_05000099 (0)
+#define ANOMALY_05000120 (0)
 #define ANOMALY_05000125 (0)
+#define ANOMALY_05000149 (0)
 #define ANOMALY_05000158 (0)
+#define ANOMALY_05000171 (0)
+#define ANOMALY_05000179 (0)
 #define ANOMALY_05000183 (0)
 #define ANOMALY_05000198 (0)
+#define ANOMALY_05000215 (0)
+#define ANOMALY_05000220 (0)
+#define ANOMALY_05000227 (0)
 #define ANOMALY_05000230 (0)
+#define ANOMALY_05000231 (0)
+#define ANOMALY_05000233 (0)
+#define ANOMALY_05000242 (0)
+#define ANOMALY_05000248 (0)
 #define ANOMALY_05000266 (0)
+#define ANOMALY_05000274 (0)
+#define ANOMALY_05000287 (0)
 #define ANOMALY_05000311 (0)
 #define ANOMALY_05000323 (0)
 #define ANOMALY_05000353 (1)
+#define ANOMALY_05000362 (1)
 #define ANOMALY_05000363 (0)
 #define ANOMALY_05000380 (0)
 #define ANOMALY_05000386 (1)
+#define ANOMALY_05000389 (0)
+#define ANOMALY_05000400 (0)
 #define ANOMALY_05000412 (0)
+#define ANOMALY_05000430 (0)
 #define ANOMALY_05000432 (0)
 #define ANOMALY_05000435 (0)
 #define ANOMALY_05000447 (0)
 #define ANOMALY_05000448 (0)
+#define ANOMALY_05000456 (0)
+#define ANOMALY_05000450 (0)
 
 #endif
diff --git a/arch/blackfin/mach-bf538/Kconfig b/arch/blackfin/mach-bf538/Kconfig
index f068c3523cdc..2d280f504ab0 100644
--- a/arch/blackfin/mach-bf538/Kconfig
+++ b/arch/blackfin/mach-bf538/Kconfig
@@ -57,6 +57,7 @@ config IRQ_UART0_TX
         default 10
 config IRQ_TIMER0
         int "IRQ_TIMER0"
+        default 7 if TICKSOURCE_GPTMR0
         default 8
 config IRQ_TIMER1
         int "IRQ_TIMER1"
diff --git a/arch/blackfin/mach-bf538/include/mach/anomaly.h b/arch/blackfin/mach-bf538/include/mach/anomaly.h
index 3a5699827363..175ca9ef7232 100644
--- a/arch/blackfin/mach-bf538/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf538/include/mach/anomaly.h
@@ -6,7 +6,7 @@
  * Licensed under the GPL-2 or later.
  */
 
-/* This file shoule be up to date with:
+/* This file should be up to date with:
  *  - Revision G, 09/18/2008; ADSP-BF538/BF538F Blackfin Processor Anomaly List
  *  - Revision L, 09/18/2008; ADSP-BF539/BF539F Blackfin Processor Anomaly List
  */
@@ -14,17 +14,29 @@
 #ifndef _MACH_ANOMALY_H_
 #define _MACH_ANOMALY_H_
 
+/* We do not support old silicon - sorry */
 #if __SILICON_REVISION__ < 4
-# error will not work on BF538 silicon version 0.0, 0.1, 0.2, or 0.3
+# error will not work on BF538/BF539 silicon version 0.0, 0.1, 0.2, or 0.3
 #endif
 
-/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
+#if defined(__ADSPBF538__)
+# define ANOMALY_BF538 1
+#else
+# define ANOMALY_BF538 0
+#endif
+#if defined(__ADSPBF539__)
+# define ANOMALY_BF539 1
+#else
+# define ANOMALY_BF539 0
+#endif
+
+/* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */
 #define ANOMALY_05000074 (1)
 /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
 #define ANOMALY_05000119 (1)
 /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
 #define ANOMALY_05000122 (1)
-/* PPI Data Lengths between 8 and 16 Do Not Zero Out Upper Bits */
+/* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */
 #define ANOMALY_05000166 (1)
 /* PPI_COUNT Cannot Be Programmed to 0 in General Purpose TX or RX Modes */
 #define ANOMALY_05000179 (1)
@@ -40,13 +52,13 @@
 #define ANOMALY_05000229 (1)
 /* PPI_FS3 Is Not Driven in 2 or 3 Internal Frame Sync Transmit Modes */
 #define ANOMALY_05000233 (1)
-/* If i-cache is on, CSYNC/SSYNC/IDLE around Change of Control causes failures */
+/* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */
 #define ANOMALY_05000244 (__SILICON_REVISION__ < 3)
-/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
+/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
 #define ANOMALY_05000245 (1)
 /* Maximum External Clock Speed for Timers */
 #define ANOMALY_05000253 (1)
-/* DCPLB_FAULT_ADDR MMR register may be corrupted */
+/* DCPLB_FAULT_ADDR MMR Register May Be Corrupted */
 #define ANOMALY_05000261 (__SILICON_REVISION__ < 3)
 /* High I/O Activity Causes Output Voltage of Internal Voltage Regulator (Vddint) to Decrease */
 #define ANOMALY_05000270 (__SILICON_REVISION__ < 4)
@@ -58,11 +70,11 @@
 #define ANOMALY_05000277 (__SILICON_REVISION__ < 4)
 /* Disabling Peripherals with DMA Running May Cause DMA System Instability */
 #define ANOMALY_05000278 (__SILICON_REVISION__ < 4)
-/* False Hardware Error Exception when ISR Context Is Not Restored */
+/* False Hardware Error Exception When ISR Context Is Not Restored */
 #define ANOMALY_05000281 (__SILICON_REVISION__ < 4)
 /* Memory DMA Corruption with 32-Bit Data and Traffic Control */
 #define ANOMALY_05000282 (__SILICON_REVISION__ < 4)
-/* System MMR Write Is Stalled Indefinitely when Killed in a Particular Stage */
+/* System MMR Write Is Stalled Indefinitely When Killed in a Particular Stage */
 #define ANOMALY_05000283 (__SILICON_REVISION__ < 4)
 /* SPORTs May Receive Bad Data If FIFOs Fill Up */
 #define ANOMALY_05000288 (__SILICON_REVISION__ < 4)
@@ -80,14 +92,14 @@
 #define ANOMALY_05000307 (__SILICON_REVISION__ < 4)
 /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
 #define ANOMALY_05000310 (1)
-/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
+/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
 #define ANOMALY_05000312 (__SILICON_REVISION__ < 5)
-/* PPI Is Level-Sensitive on First Transfer */
+/* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */
 #define ANOMALY_05000313 (__SILICON_REVISION__ < 4)
-/* Killed System MMR Write Completes Erroneously on Next System MMR Access */
+/* Killed System MMR Write Completes Erroneously On Next System MMR Access */
 #define ANOMALY_05000315 (__SILICON_REVISION__ < 4)
 /* PFx Glitch on Write to FIO_FLAG_D or FIO_FLAG_T */
-#define ANOMALY_05000318 (__SILICON_REVISION__ < 4)
+#define ANOMALY_05000318 (ANOMALY_BF539 && __SILICON_REVISION__ < 4)
 /* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */
 #define ANOMALY_05000355 (__SILICON_REVISION__ < 5)
 /* Serial Port (SPORT) Multichannel Transmit Failure when Channel 0 Is Disabled */
@@ -114,23 +126,45 @@
 #define ANOMALY_05000436 (__SILICON_REVISION__ > 3)
 /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
 #define ANOMALY_05000443 (1)
+/* False Hardware Error when RETI points to invalid memory */
+#define ANOMALY_05000461 (1)
 
 /* Anomalies that don't exist on this proc */
+#define ANOMALY_05000099 (0)
+#define ANOMALY_05000120 (0)
+#define ANOMALY_05000149 (0)
 #define ANOMALY_05000158 (0)
+#define ANOMALY_05000171 (0)
 #define ANOMALY_05000198 (0)
+#define ANOMALY_05000215 (0)
+#define ANOMALY_05000220 (0)
+#define ANOMALY_05000227 (0)
 #define ANOMALY_05000230 (0)
+#define ANOMALY_05000231 (0)
+#define ANOMALY_05000242 (0)
+#define ANOMALY_05000248 (0)
+#define ANOMALY_05000250 (0)
+#define ANOMALY_05000254 (0)
 #define ANOMALY_05000263 (0)
+#define ANOMALY_05000274 (0)
+#define ANOMALY_05000287 (0)
 #define ANOMALY_05000305 (0)
 #define ANOMALY_05000311 (0)
 #define ANOMALY_05000323 (0)
 #define ANOMALY_05000353 (1)
+#define ANOMALY_05000362 (1)
 #define ANOMALY_05000363 (0)
 #define ANOMALY_05000380 (0)
 #define ANOMALY_05000386 (1)
+#define ANOMALY_05000389 (0)
+#define ANOMALY_05000400 (0)
 #define ANOMALY_05000412 (0)
+#define ANOMALY_05000430 (0)
 #define ANOMALY_05000432 (0)
 #define ANOMALY_05000435 (0)
 #define ANOMALY_05000447 (0)
 #define ANOMALY_05000448 (0)
+#define ANOMALY_05000456 (0)
+#define ANOMALY_05000450 (0)
 
 #endif
diff --git a/arch/blackfin/mach-bf538/include/mach/blackfin.h b/arch/blackfin/mach-bf538/include/mach/blackfin.h
index ea25371a922b..6f628353dde3 100644
--- a/arch/blackfin/mach-bf538/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf538/include/mach/blackfin.h
@@ -68,25 +68,6 @@
 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
 #define OFFSET_GCTL             0x24    /* Global Control Register              */
 
-
-#define bfin_write_MDMA_D0_IRQ_STATUS   bfin_write_MDMA0_D0_IRQ_STATUS
-#define bfin_write_MDMA_D0_START_ADDR   bfin_write_MDMA0_D0_START_ADDR
-#define bfin_write_MDMA_S0_START_ADDR   bfin_write_MDMA0_S0_START_ADDR
-#define bfin_write_MDMA_D0_X_COUNT      bfin_write_MDMA0_D0_X_COUNT
-#define bfin_write_MDMA_S0_X_COUNT      bfin_write_MDMA0_S0_X_COUNT
-#define bfin_write_MDMA_D0_Y_COUNT      bfin_write_MDMA0_D0_Y_COUNT
-#define bfin_write_MDMA_S0_Y_COUNT      bfin_write_MDMA0_S0_Y_COUNT
-#define bfin_write_MDMA_D0_X_MODIFY     bfin_write_MDMA0_D0_X_MODIFY
-#define bfin_write_MDMA_S0_X_MODIFY     bfin_write_MDMA0_S0_X_MODIFY
-#define bfin_write_MDMA_D0_Y_MODIFY     bfin_write_MDMA0_D0_Y_MODIFY
-#define bfin_write_MDMA_S0_Y_MODIFY     bfin_write_MDMA0_S0_Y_MODIFY
-#define bfin_write_MDMA_S0_CONFIG       bfin_write_MDMA0_S0_CONFIG
-#define bfin_write_MDMA_D0_CONFIG       bfin_write_MDMA0_D0_CONFIG
-#define bfin_read_MDMA_S0_CONFIG        bfin_read_MDMA0_S0_CONFIG
-#define bfin_read_MDMA_D0_IRQ_STATUS    bfin_read_MDMA0_D0_IRQ_STATUS
-#define bfin_write_MDMA_S0_IRQ_STATUS   bfin_write_MDMA0_S0_IRQ_STATUS
-
-
 /* DPMC*/
 #define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
 #define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
diff --git a/arch/blackfin/mach-bf538/include/mach/cdefBF538.h b/arch/blackfin/mach-bf538/include/mach/cdefBF538.h
index 241725bc6988..99ca3f4305e2 100644
--- a/arch/blackfin/mach-bf538/include/mach/cdefBF538.h
+++ b/arch/blackfin/mach-bf538/include/mach/cdefBF538.h
@@ -67,14 +67,14 @@
 #define bfin_write_SIC_ISR0(val)       bfin_write32(SIC_ISR0, val)
 #define bfin_read_SIC_ISR1()           bfin_read32(SIC_ISR1)
 #define bfin_write_SIC_ISR1(val)       bfin_write32(SIC_ISR1, val)
-#define bfin_read_SIC_ISR(x)           bfin_read32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0))
+#define bfin_read_SIC_ISR(x)           bfin_read32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0))
 #define bfin_write_SIC_ISR(x, val)     bfin_write32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0), val)
 #define bfin_read_SIC_IWR0()           bfin_read32(SIC_IWR0)
 #define bfin_write_SIC_IWR0(val)       bfin_write32(SIC_IWR0, val)
 #define bfin_read_SIC_IWR1()           bfin_read32(SIC_IWR1)
 #define bfin_write_SIC_IWR1(val)       bfin_write32(SIC_IWR1, val)
-#define bfin_read_SIC_IWR(x)           bfin_read32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0))
-#define bfin_write_SIC_IWR(x, val)     bfin_write32((SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0), val)
+#define bfin_read_SIC_IWR(x)           bfin_read32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0))
+#define bfin_write_SIC_IWR(x, val)     bfin_write32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0), val)
 #define bfin_read_SIC_IAR0()           bfin_read32(SIC_IAR0)
 #define bfin_write_SIC_IAR0(val)       bfin_write32(SIC_IAR0, val)
 #define bfin_read_SIC_IAR1()           bfin_read32(SIC_IAR1)
@@ -1247,6 +1247,65 @@
 #define bfin_write_MDMA1_S1_CURR_X_COUNT(val) bfin_write16(MDMA1_S1_CURR_X_COUNT, val)
 #define bfin_read_MDMA1_S1_CURR_Y_COUNT() bfin_read16(MDMA1_S1_CURR_Y_COUNT)
 #define bfin_write_MDMA1_S1_CURR_Y_COUNT(val) bfin_write16(MDMA1_S1_CURR_Y_COUNT, val)
+
+#define bfin_read_MDMA_S0_CONFIG()  bfin_read_MDMA0_S0_CONFIG()
+#define bfin_write_MDMA_S0_CONFIG(val) bfin_write_MDMA0_S0_CONFIG(val)
+#define bfin_read_MDMA_S0_IRQ_STATUS()  bfin_read_MDMA0_S0_IRQ_STATUS()
+#define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write_MDMA0_S0_IRQ_STATUS(val)
+#define bfin_read_MDMA_S0_X_MODIFY()  bfin_read_MDMA0_S0_X_MODIFY()
+#define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write_MDMA0_S0_X_MODIFY(val)
+#define bfin_read_MDMA_S0_Y_MODIFY()  bfin_read_MDMA0_S0_Y_MODIFY()
+#define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write_MDMA0_S0_Y_MODIFY(val)
+#define bfin_read_MDMA_S0_X_COUNT()  bfin_read_MDMA0_S0_X_COUNT()
+#define bfin_write_MDMA_S0_X_COUNT(val) bfin_write_MDMA0_S0_X_COUNT(val)
+#define bfin_read_MDMA_S0_Y_COUNT()  bfin_read_MDMA0_S0_Y_COUNT()
+#define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write_MDMA0_S0_Y_COUNT(val)
+#define bfin_read_MDMA_S0_START_ADDR()  bfin_read_MDMA0_S0_START_ADDR()
+#define bfin_write_MDMA_S0_START_ADDR(val) bfin_write_MDMA0_S0_START_ADDR(val)
+#define bfin_read_MDMA_D0_CONFIG()  bfin_read_MDMA0_D0_CONFIG()
+#define bfin_write_MDMA_D0_CONFIG(val) bfin_write_MDMA0_D0_CONFIG(val)
+#define bfin_read_MDMA_D0_IRQ_STATUS()  bfin_read_MDMA0_D0_IRQ_STATUS()
+#define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write_MDMA0_D0_IRQ_STATUS(val)
+#define bfin_read_MDMA_D0_X_MODIFY()  bfin_read_MDMA0_D0_X_MODIFY()
+#define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write_MDMA0_D0_X_MODIFY(val)
+#define bfin_read_MDMA_D0_Y_MODIFY()  bfin_read_MDMA0_D0_Y_MODIFY()
+#define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write_MDMA0_D0_Y_MODIFY(val)
+#define bfin_read_MDMA_D0_X_COUNT()  bfin_read_MDMA0_D0_X_COUNT()
+#define bfin_write_MDMA_D0_X_COUNT(val) bfin_write_MDMA0_D0_X_COUNT(val)
+#define bfin_read_MDMA_D0_Y_COUNT()  bfin_read_MDMA0_D0_Y_COUNT()
+#define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write_MDMA0_D0_Y_COUNT(val)
+#define bfin_read_MDMA_D0_START_ADDR()  bfin_read_MDMA0_D0_START_ADDR()
+#define bfin_write_MDMA_D0_START_ADDR(val) bfin_write_MDMA0_D0_START_ADDR(val)
+
+#define bfin_read_MDMA_S1_CONFIG()  bfin_read_MDMA0_S1_CONFIG()
+#define bfin_write_MDMA_S1_CONFIG(val) bfin_write_MDMA0_S1_CONFIG(val)
+#define bfin_read_MDMA_S1_IRQ_STATUS()  bfin_read_MDMA0_S1_IRQ_STATUS()
+#define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write_MDMA0_S1_IRQ_STATUS(val)
+#define bfin_read_MDMA_S1_X_MODIFY()  bfin_read_MDMA0_S1_X_MODIFY()
+#define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write_MDMA0_S1_X_MODIFY(val)
+#define bfin_read_MDMA_S1_Y_MODIFY()  bfin_read_MDMA0_S1_Y_MODIFY()
+#define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write_MDMA0_S1_Y_MODIFY(val)
+#define bfin_read_MDMA_S1_X_COUNT()  bfin_read_MDMA0_S1_X_COUNT()
+#define bfin_write_MDMA_S1_X_COUNT(val) bfin_write_MDMA0_S1_X_COUNT(val)
+#define bfin_read_MDMA_S1_Y_COUNT()  bfin_read_MDMA0_S1_Y_COUNT()
+#define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write_MDMA0_S1_Y_COUNT(val)
+#define bfin_read_MDMA_S1_START_ADDR()  bfin_read_MDMA0_S1_START_ADDR()
+#define bfin_write_MDMA_S1_START_ADDR(val) bfin_write_MDMA0_S1_START_ADDR(val)
+#define bfin_read_MDMA_D1_CONFIG()  bfin_read_MDMA0_D1_CONFIG()
+#define bfin_write_MDMA_D1_CONFIG(val) bfin_write_MDMA0_D1_CONFIG(val)
+#define bfin_read_MDMA_D1_IRQ_STATUS()  bfin_read_MDMA0_D1_IRQ_STATUS()
+#define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write_MDMA0_D1_IRQ_STATUS(val)
+#define bfin_read_MDMA_D1_X_MODIFY()  bfin_read_MDMA0_D1_X_MODIFY()
+#define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write_MDMA0_D1_X_MODIFY(val)
+#define bfin_read_MDMA_D1_Y_MODIFY()  bfin_read_MDMA0_D1_Y_MODIFY()
+#define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write_MDMA0_D1_Y_MODIFY(val)
+#define bfin_read_MDMA_D1_X_COUNT()  bfin_read_MDMA0_D1_X_COUNT()
+#define bfin_write_MDMA_D1_X_COUNT(val) bfin_write_MDMA0_D1_X_COUNT(val)
+#define bfin_read_MDMA_D1_Y_COUNT()  bfin_read_MDMA0_D1_Y_COUNT()
+#define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write_MDMA0_D1_Y_COUNT(val)
+#define bfin_read_MDMA_D1_START_ADDR()  bfin_read_MDMA0_D1_START_ADDR()
+#define bfin_write_MDMA_D1_START_ADDR(val) bfin_write_MDMA0_D1_START_ADDR(val)
+
 #define bfin_read_PPI_CONTROL()        bfin_read16(PPI_CONTROL)
 #define bfin_write_PPI_CONTROL(val)    bfin_write16(PPI_CONTROL, val)
 #define bfin_read_PPI_STATUS()         bfin_read16(PPI_STATUS)
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h
index 6adbfcc65a35..bdc330cd0e1c 100644
--- a/arch/blackfin/mach-bf538/include/mach/defBF539.h
+++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h
@@ -412,6 +412,62 @@
 #define MDMA0_S1_CURR_X_COUNT   0xFFC00EF0      /* MemDMA0 Stream 1 Source Current X Count Register */
 #define MDMA0_S1_CURR_Y_COUNT   0xFFC00EF8      /* MemDMA0 Stream 1 Source Current Y Count Register */
 
+#define MDMA_D0_NEXT_DESC_PTR MDMA0_D0_NEXT_DESC_PTR
+#define MDMA_D0_START_ADDR MDMA0_D0_START_ADDR
+#define MDMA_D0_CONFIG MDMA0_D0_CONFIG
+#define MDMA_D0_X_COUNT MDMA0_D0_X_COUNT
+#define MDMA_D0_X_MODIFY MDMA0_D0_X_MODIFY
+#define MDMA_D0_Y_COUNT MDMA0_D0_Y_COUNT
+#define MDMA_D0_Y_MODIFY MDMA0_D0_Y_MODIFY
+#define MDMA_D0_CURR_DESC_PTR MDMA0_D0_CURR_DESC_PTR
+#define MDMA_D0_CURR_ADDR MDMA0_D0_CURR_ADDR
+#define MDMA_D0_IRQ_STATUS MDMA0_D0_IRQ_STATUS
+#define MDMA_D0_PERIPHERAL_MAP MDMA0_D0_PERIPHERAL_MAP
+#define MDMA_D0_CURR_X_COUNT MDMA0_D0_CURR_X_COUNT
+#define MDMA_D0_CURR_Y_COUNT MDMA0_D0_CURR_Y_COUNT
+
+#define MDMA_S0_NEXT_DESC_PTR MDMA0_S0_NEXT_DESC_PTR
+#define MDMA_S0_START_ADDR MDMA0_S0_START_ADDR
+#define MDMA_S0_CONFIG MDMA0_S0_CONFIG
+#define MDMA_S0_X_COUNT MDMA0_S0_X_COUNT
+#define MDMA_S0_X_MODIFY MDMA0_S0_X_MODIFY
+#define MDMA_S0_Y_COUNT MDMA0_S0_Y_COUNT
+#define MDMA_S0_Y_MODIFY MDMA0_S0_Y_MODIFY
+#define MDMA_S0_CURR_DESC_PTR MDMA0_S0_CURR_DESC_PTR
+#define MDMA_S0_CURR_ADDR MDMA0_S0_CURR_ADDR
+#define MDMA_S0_IRQ_STATUS MDMA0_S0_IRQ_STATUS
+#define MDMA_S0_PERIPHERAL_MAP MDMA0_S0_PERIPHERAL_MAP
+#define MDMA_S0_CURR_X_COUNT MDMA0_S0_CURR_X_COUNT
+#define MDMA_S0_CURR_Y_COUNT MDMA0_S0_CURR_Y_COUNT
+
+#define MDMA_D1_NEXT_DESC_PTR MDMA0_D1_NEXT_DESC_PTR
+#define MDMA_D1_START_ADDR MDMA0_D1_START_ADDR
+#define MDMA_D1_CONFIG MDMA0_D1_CONFIG
+#define MDMA_D1_X_COUNT MDMA0_D1_X_COUNT
+#define MDMA_D1_X_MODIFY MDMA0_D1_X_MODIFY
+#define MDMA_D1_Y_COUNT MDMA0_D1_Y_COUNT
+#define MDMA_D1_Y_MODIFY MDMA0_D1_Y_MODIFY
+#define MDMA_D1_CURR_DESC_PTR MDMA0_D1_CURR_DESC_PTR
+#define MDMA_D1_CURR_ADDR MDMA0_D1_CURR_ADDR
+#define MDMA_D1_IRQ_STATUS MDMA0_D1_IRQ_STATUS
+#define MDMA_D1_PERIPHERAL_MAP MDMA0_D1_PERIPHERAL_MAP
+#define MDMA_D1_CURR_X_COUNT MDMA0_D1_CURR_X_COUNT
+#define MDMA_D1_CURR_Y_COUNT MDMA0_D1_CURR_Y_COUNT
+
+#define MDMA_S1_NEXT_DESC_PTR MDMA0_S1_NEXT_DESC_PTR
+#define MDMA_S1_START_ADDR MDMA0_S1_START_ADDR
+#define MDMA_S1_CONFIG MDMA0_S1_CONFIG
+#define MDMA_S1_X_COUNT MDMA0_S1_X_COUNT
+#define MDMA_S1_X_MODIFY MDMA0_S1_X_MODIFY
+#define MDMA_S1_Y_COUNT MDMA0_S1_Y_COUNT
+#define MDMA_S1_Y_MODIFY MDMA0_S1_Y_MODIFY
+#define MDMA_S1_CURR_DESC_PTR MDMA0_S1_CURR_DESC_PTR
+#define MDMA_S1_CURR_ADDR MDMA0_S1_CURR_ADDR
+#define MDMA_S1_IRQ_STATUS MDMA0_S1_IRQ_STATUS
+#define MDMA_S1_PERIPHERAL_MAP MDMA0_S1_PERIPHERAL_MAP
+#define MDMA_S1_CURR_X_COUNT MDMA0_S1_CURR_X_COUNT
+#define MDMA_S1_CURR_Y_COUNT MDMA0_S1_CURR_Y_COUNT
+
 
 /* Parallel Peripheral Interface (PPI) (0xFFC01000 - 0xFFC010FF) */
 #define PPI_CONTROL                     0xFFC01000      /* PPI Control Register */
diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig
index dcf657159051..a09623dfd550 100644
--- a/arch/blackfin/mach-bf548/Kconfig
+++ b/arch/blackfin/mach-bf548/Kconfig
@@ -11,6 +11,13 @@ config DEB_DMA_URGENT
         help
           Treat any DEB1, DEB2 and DEB3 request as Urgent
 
+config BF548_ATAPI_ALTERNATIVE_PORT
+        bool "BF548 ATAPI alternative port via GPIO"
+        help
+          BF548 ATAPI data and address PINs can be routed through
+          async address or GPIO port F and G. Select y to route it
+          to GPIO.
+
 comment "Interrupt Priority Assignment"
 menu "Priority"
 
@@ -250,6 +257,7 @@ config IRQ_OTPSEC
         default 11
 config IRQ_TIMER0
         int "IRQ_TIMER0"
+        default 7 if TICKSOURCE_GPTMR0
         default 8
 config IRQ_TIMER1
         int "IRQ_TIMER1"
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 096e661700a7..add5a17452ce 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -208,6 +208,43 @@ static struct platform_device bfin_rotary_device = {
 };
 #endif
 
+#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
+#include <linux/input.h>
+#include <linux/spi/adxl34x.h>
+static const struct adxl34x_platform_data adxl34x_info = {
+        .x_axis_offset = 0,
+        .y_axis_offset = 0,
+        .z_axis_offset = 0,
+        .tap_threshold = 0x31,
+        .tap_duration = 0x10,
+        .tap_latency = 0x60,
+        .tap_window = 0xF0,
+        .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
+        .act_axis_control = 0xFF,
+        .activity_threshold = 5,
+        .inactivity_threshold = 3,
+        .inactivity_time = 4,
+        .free_fall_threshold = 0x7,
+        .free_fall_time = 0x20,
+        .data_rate = 0x8,
+        .data_range = ADXL_FULL_RES,
+
+        .ev_type = EV_ABS,
+        .ev_code_x = ABS_X,             /* EV_REL */
+        .ev_code_y = ABS_Y,             /* EV_REL */
+        .ev_code_z = ABS_Z,             /* EV_REL */
+
+        .ev_code_tap_x = BTN_TOUCH,             /* EV_KEY */
+        .ev_code_tap_y = BTN_TOUCH,             /* EV_KEY */
+        .ev_code_tap_z = BTN_TOUCH,             /* EV_KEY */
+
+/*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
+/*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
+        .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
+        .fifo_mode = ADXL_FIFO_STREAM,
+};
+#endif
+
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 static struct platform_device rtc_device = {
         .name = "rtc-bfin",
@@ -628,6 +665,14 @@ static struct bfin5xx_spi_chip spidev_chip_info = {
 };
 #endif
 
+#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
+static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
+        .enable_dma = 0,         /* use dma transfer with this chip*/
+        .bits_per_word = 8,
+        .cs_change_per_word = 0,
+};
+#endif
+
 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_MTD_M25P80) \
         || defined(CONFIG_MTD_M25P80_MODULE)
@@ -653,15 +698,15 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
-{
-        .modalias               = "ad7877",
-        .platform_data          = &bfin_ad7877_ts_info,
-        .irq                    = IRQ_PB4,      /* old boards (<=Rev 1.3) use IRQ_PJ11 */
-        .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
-        .bus_num                = 0,
-        .chip_select            = 2,
-        .controller_data = &spi_ad7877_chip_info,
-},
+        {
+                .modalias               = "ad7877",
+                .platform_data          = &bfin_ad7877_ts_info,
+                .irq                    = IRQ_PB4,      /* old boards (<=Rev 1.3) use IRQ_PJ11 */
+                .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num                = 0,
+                .chip_select            = 2,
+                .controller_data = &spi_ad7877_chip_info,
+        },
 #endif
 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
         {
@@ -672,8 +717,19 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                 .controller_data = &spidev_chip_info,
         },
 #endif
+#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
+        {
+                .modalias               = "adxl34x",
+                .platform_data          = &adxl34x_info,
+                .irq                    = IRQ_PC5,
+                .max_speed_hz           = 5000000,     /* max spi clock (SCK) speed in HZ */
+                .bus_num                = 1,
+                .chip_select            = 2,
+                .controller_data = &spi_adxl34x_chip_info,
+                .mode = SPI_MODE_3,
+        },
+#endif
 };
-
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 /* SPI (0) */
 static struct resource bfin_spi0_resource[] = {
@@ -786,7 +842,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
 
 #if !defined(CONFIG_BF542)      /* The BF542 only has 1 TWI */
 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
-#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
         {
                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
         },
@@ -797,6 +853,13 @@ static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
                 .irq = 212,
         },
 #endif
+#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
+        {
+                I2C_BOARD_INFO("adxl34x", 0x53),
+                .irq = IRQ_PC5,
+                .platform_data = (void *)&adxl34x_info,
+        },
+#endif
 };
 #endif
 
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h
index 882e40ccf0d1..c510ae688e28 100644
--- a/arch/blackfin/mach-bf548/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h
@@ -6,26 +6,31 @@
  * Licensed under the GPL-2 or later.
  */
 
-/* This file shoule be up to date with:
+/* This file should be up to date with:
  *  - Revision H, 01/16/2009; ADSP-BF542/BF544/BF547/BF548/BF549 Blackfin Processor Anomaly List
  */
 
 #ifndef _MACH_ANOMALY_H_
 #define _MACH_ANOMALY_H_
 
-/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */
+/* We do not support 0.0 or 0.1 silicon - sorry */
+#if __SILICON_REVISION__ < 2
+# error will not work on BF548 silicon version 0.0, or 0.1
+#endif
+
+/* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */
 #define ANOMALY_05000074 (1)
 /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */
 #define ANOMALY_05000119 (1)
 /* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
 #define ANOMALY_05000122 (1)
-/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
+/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
 #define ANOMALY_05000245 (1)
 /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
 #define ANOMALY_05000265 (1)
 /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
 #define ANOMALY_05000272 (1)
-/* False Hardware Error Exception when ISR context is not restored */
+/* False Hardware Error Exception When ISR Context Is Not Restored */
 #define ANOMALY_05000281 (__SILICON_REVISION__ < 1)
 /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */
 #define ANOMALY_05000304 (__SILICON_REVISION__ < 1)
@@ -59,7 +64,7 @@
 #define ANOMALY_05000340 (__SILICON_REVISION__ < 1)
 /* Boot Host Wait (HWAIT) and Boot Host Wait Alternate (HWAITA) Signals Are Swapped */
 #define ANOMALY_05000344 (__SILICON_REVISION__ < 1)
-/* USB Calibration Value Is Not Intialized */
+/* USB Calibration Value Is Not Initialized */
 #define ANOMALY_05000346 (__SILICON_REVISION__ < 1)
 /* USB Calibration Value to use */
 #define ANOMALY_05000346_value 0x5411
@@ -147,11 +152,11 @@
 #define ANOMALY_05000416 (1)
 /* Multichannel SPORT Channel Misalignment Under Specific Configuration */
 #define ANOMALY_05000425 (1)
-/* Speculative Fetches of Indirect-Pointer Instructions Can Cause Spurious Hardware Errors */
+/* Speculative Fetches of Indirect-Pointer Instructions Can Cause False Hardware Errors */
 #define ANOMALY_05000426 (1)
 /* CORE_EPPI_PRIO bit and SYS_EPPI_PRIO bit in the HMDMA1_CONTROL register are not functional */
 #define ANOMALY_05000427 (__SILICON_REVISION__ < 2)
-/* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Behaves as a Buffer Status Bit Instead of an IRQ Status Bit */
+/* WB_EDGE Bit in NFC_IRQSTAT Incorrectly Reflects Buffer Status Instead of IRQ Status */
 #define ANOMALY_05000429 (__SILICON_REVISION__ < 2)
 /* Software System Reset Corrupts PLL_LOCKCNT Register */
 #define ANOMALY_05000430 (__SILICON_REVISION__ >= 2)
@@ -170,26 +175,49 @@
 /* Reduced Timing Margins on DDR Output Setup and Hold (tDS and tDH) */
 #define ANOMALY_05000449 (__SILICON_REVISION__ == 1)
 /* USB DMA Mode 1 Short Packet Data Corruption */
-#define ANOMALY_05000450 (1
+#define ANOMALY_05000450 (1)
+/* USB Receive Interrupt Is Not Generated in DMA Mode 1 */
+#define ANOMALY_05000456 (__SILICON_REVISION__ < 3)
+/* False Hardware Error when RETI points to invalid memory */
+#define ANOMALY_05000461 (1)
 
 /* Anomalies that don't exist on this proc */
+#define ANOMALY_05000099 (0)
+#define ANOMALY_05000120 (0)
 #define ANOMALY_05000125 (0)
+#define ANOMALY_05000149 (0)
 #define ANOMALY_05000158 (0)
+#define ANOMALY_05000171 (0)
+#define ANOMALY_05000179 (0)
 #define ANOMALY_05000183 (0)
 #define ANOMALY_05000198 (0)
+#define ANOMALY_05000215 (0)
+#define ANOMALY_05000220 (0)
+#define ANOMALY_05000227 (0)
 #define ANOMALY_05000230 (0)
+#define ANOMALY_05000231 (0)
+#define ANOMALY_05000233 (0)
+#define ANOMALY_05000242 (0)
 #define ANOMALY_05000244 (0)
+#define ANOMALY_05000248 (0)
+#define ANOMALY_05000250 (0)
+#define ANOMALY_05000254 (0)
 #define ANOMALY_05000261 (0)
 #define ANOMALY_05000263 (0)
 #define ANOMALY_05000266 (0)
 #define ANOMALY_05000273 (0)
+#define ANOMALY_05000274 (0)
 #define ANOMALY_05000278 (0)
+#define ANOMALY_05000287 (0)
+#define ANOMALY_05000301 (0)
 #define ANOMALY_05000305 (0)
 #define ANOMALY_05000307 (0)
 #define ANOMALY_05000311 (0)
 #define ANOMALY_05000323 (0)
+#define ANOMALY_05000362 (1)
 #define ANOMALY_05000363 (0)
 #define ANOMALY_05000380 (0)
+#define ANOMALY_05000400 (0)
 #define ANOMALY_05000412 (0)
 #define ANOMALY_05000432 (0)
 #define ANOMALY_05000435 (0)
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h b/arch/blackfin/mach-bf548/include/mach/portmux.h
index ffb1d0a44b4d..ce372ba0f046 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -167,22 +167,42 @@
 #define P_PPI0_D13      (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0))
 #define P_PPI0_D14      (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0))
 #define P_PPI0_D15      (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0))
-#define P_ATAPI_D0A     (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1))
-#define P_ATAPI_D1A     (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1))
-#define P_ATAPI_D2A     (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1))
-#define P_ATAPI_D3A     (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1))
-#define P_ATAPI_D4A     (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1))
-#define P_ATAPI_D5A     (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1))
-#define P_ATAPI_D6A     (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1))
-#define P_ATAPI_D7A     (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1))
-#define P_ATAPI_D8A     (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1))
-#define P_ATAPI_D9A     (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
-#define P_ATAPI_D10A    (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1))
-#define P_ATAPI_D11A    (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1))
-#define P_ATAPI_D12A    (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1))
-#define P_ATAPI_D13A    (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1))
-#define P_ATAPI_D14A    (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
-#define P_ATAPI_D15A    (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
+
+#ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
+# define P_ATAPI_D0A    (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1))
+# define P_ATAPI_D1A    (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1))
+# define P_ATAPI_D2A    (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1))
+# define P_ATAPI_D3A    (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1))
+# define P_ATAPI_D4A    (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1))
+# define P_ATAPI_D5A    (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1))
+# define P_ATAPI_D6A    (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1))
+# define P_ATAPI_D7A    (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1))
+# define P_ATAPI_D8A    (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1))
+# define P_ATAPI_D9A    (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
+# define P_ATAPI_D10A   (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1))
+# define P_ATAPI_D11A   (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1))
+# define P_ATAPI_D12A   (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1))
+# define P_ATAPI_D13A   (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1))
+# define P_ATAPI_D14A   (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
+# define P_ATAPI_D15A   (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
+#else
+# define P_ATAPI_D0A    (P_DONTCARE)
+# define P_ATAPI_D1A    (P_DONTCARE)
+# define P_ATAPI_D2A    (P_DONTCARE)
+# define P_ATAPI_D3A    (P_DONTCARE)
+# define P_ATAPI_D4A    (P_DONTCARE)
+# define P_ATAPI_D5A    (P_DONTCARE)
+# define P_ATAPI_D6A    (P_DONTCARE)
+# define P_ATAPI_D7A    (P_DONTCARE)
+# define P_ATAPI_D8A    (P_DONTCARE)
+# define P_ATAPI_D9A    (P_DONTCARE)
+# define P_ATAPI_D10A   (P_DONTCARE)
+# define P_ATAPI_D11A   (P_DONTCARE)
+# define P_ATAPI_D12A   (P_DONTCARE)
+# define P_ATAPI_D13A   (P_DONTCARE)
+# define P_ATAPI_D14A   (P_DONTCARE)
+# define P_ATAPI_D15A   (P_DONTCARE)
+#endif
 
 #define P_PPI0_CLK      (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
 #define P_PPI0_FS1      (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
@@ -200,9 +220,15 @@
 #define P_CAN0_RX       (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0))
 #define P_CAN1_TX       (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0))
 #define P_CAN1_RX       (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0))
-#define P_ATAPI_A0A     (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(1))
-#define P_ATAPI_A1A     (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1))
-#define P_ATAPI_A2A     (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1))
+#ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
+# define P_ATAPI_A0A    (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(1))
+# define P_ATAPI_A1A    (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1))
+# define P_ATAPI_A2A    (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1))
+#else
+# define P_ATAPI_A0A    (P_DONTCARE)
+# define P_ATAPI_A1A    (P_DONTCARE)
+# define P_ATAPI_A2A    (P_DONTCARE)
+#endif
 #define P_HOST_CE       (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1))
 #define P_HOST_RD       (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1))
 #define P_HOST_WR       (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1))
diff --git a/arch/blackfin/mach-bf561/Kconfig b/arch/blackfin/mach-bf561/Kconfig
index 638ec38ca470..cb9743641511 100644
--- a/arch/blackfin/mach-bf561/Kconfig
+++ b/arch/blackfin/mach-bf561/Kconfig
@@ -9,22 +9,9 @@ if (!SMP)
 comment "Core B Support"
 
 config BF561_COREB
-        bool "Enable Core B support"
+        bool "Enable Core B loader"
         default y
 
-config BF561_COREB_RESET
-        bool "Enable Core B reset support"
-        default n
-        help
-          This requires code in the application that is loaded
-          into Core B. In order to reset, the application needs
-          to install an interrupt handler for Supplemental
-          Interrupt 0, that sets RETI to 0xff600000 and writes
-          bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0.
-          This causes Core B to stall when Supplemental Interrupt
-          0 is set, and will reset PC to 0xff600000 when
-          COREB_SRAM_INIT is cleared.
-
 endif
 
 comment "Interrupt Priority Assignment"
@@ -138,6 +125,7 @@ config IRQ_DMA2_11
         default 9
 config IRQ_TIMER0
         int "TIMER 0  Interrupt"
+        default 7 if TICKSOURCE_GPTMR0
         default 8
 config IRQ_TIMER1
         int "TIMER 1  Interrupt"
diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c
index f623c6b0719f..0dd9685e5d53 100644
--- a/arch/blackfin/mach-bf561/boards/cm_bf561.c
+++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c
@@ -83,7 +83,7 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 /* SPI ADC chip */
 static struct bfin5xx_spi_chip spi_adc_chip_info = {
         .enable_dma = 1,         /* use dma transfer with this chip*/
@@ -126,7 +126,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
         },
 #endif
 
-#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
+#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
         {
                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
diff --git a/arch/blackfin/mach-bf561/coreb.c b/arch/blackfin/mach-bf561/coreb.c
index 8598098c0840..93635a766f9c 100644
--- a/arch/blackfin/mach-bf561/coreb.c
+++ b/arch/blackfin/mach-bf561/coreb.c
@@ -1,406 +1,74 @@
-/*
- * File:         arch/blackfin/mach-bf561/coreb.c
- * Based on:
- * Author:
+/* Load firmware into Core B on a BF561
  *
- * Created:
- * Description:  Handle CoreB on a BF561
- *
- * Modified:
- *               Copyright 2004-2006 Analog Devices Inc.
- *
- * Bugs:         Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ * Copyright 2004-2009 Analog Devices Inc.
+ * Licensed under the GPL-2 or later.
+ */
+
+/* The Core B reset func requires code in the application that is loaded into
+ * Core B.  In order to reset, the application needs to install an interrupt
+ * handler for Supplemental Interrupt 0, that sets RETI to 0xff600000 and
+ * writes bit 11 of SICB_SYSCR when bit 5 of SICA_SYSCR is 0.  This causes Core
+ * B to stall when Supplemental Interrupt 0 is set, and will reset PC to
+ * 0xff600000 when COREB_SRAM_INIT is cleared.
  */
 
-#include <linux/mm.h>
-#include <linux/miscdevice.h>
 #include <linux/device.h>
-#include <linux/ioport.h>
-#include <linux/module.h>
-#include <linux/uaccess.h>
 #include <linux/fs.h>
-#include <asm/dma.h>
-#include <asm/cacheflush.h>
-
-#define MODULE_VER              "v0.1"
-
-static spinlock_t coreb_lock;
-static wait_queue_head_t coreb_dma_wait;
-
-#define COREB_IS_OPEN           0x00000001
-#define COREB_IS_RUNNING        0x00000010
+#include <linux/kernel.h>
+#include <linux/miscdevice.h>
+#include <linux/module.h>
 
-#define CMD_COREB_INDEX         1
 #define CMD_COREB_START         2
 #define CMD_COREB_STOP          3
 #define CMD_COREB_RESET         4
 
-#define COREB_MINOR             229
-
-static unsigned long coreb_status = 0;
-static unsigned long coreb_base = 0xff600000;
-static unsigned long coreb_size = 0x4000;
-int coreb_dma_done;
-
-static loff_t coreb_lseek(struct file *file, loff_t offset, int origin);
-static ssize_t coreb_read(struct file *file, char *buf, size_t count,
-                          loff_t * ppos);
-static ssize_t coreb_write(struct file *file, const char *buf, size_t count,
-                           loff_t * ppos);
-static int coreb_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
-                       unsigned long arg);
-static int coreb_open(struct inode *inode, struct file *file);
-static int coreb_release(struct inode *inode, struct file *file);
-
-static irqreturn_t coreb_dma_interrupt(int irq, void *dev_id)
-{
-        clear_dma_irqstat(CH_MEM_STREAM2_DEST);
-        coreb_dma_done = 1;
-        wake_up_interruptible(&coreb_dma_wait);
-        return IRQ_HANDLED;
-}
-
-static ssize_t coreb_write(struct file *file, const char *buf, size_t count,
-                           loff_t * ppos)
-{
-        unsigned long p = *ppos;
-        ssize_t wrote = 0;
-
-        if (p + count > coreb_size)
-                return -EFAULT;
-
-        while (count > 0) {
-                int len = count;
-
-                if (len > PAGE_SIZE)
-                        len = PAGE_SIZE;
-
-                coreb_dma_done = 0;
-
-                flush_dcache_range((unsigned long)buf, (unsigned long)(buf+len));
-                /* Source Channel */
-                set_dma_start_addr(CH_MEM_STREAM2_SRC, (unsigned long)buf);
-                set_dma_x_count(CH_MEM_STREAM2_SRC, len);
-                set_dma_x_modify(CH_MEM_STREAM2_SRC, sizeof(char));
-                set_dma_config(CH_MEM_STREAM2_SRC, 0);
-                /* Destination Channel */
-                set_dma_start_addr(CH_MEM_STREAM2_DEST, coreb_base + p);
-                set_dma_x_count(CH_MEM_STREAM2_DEST, len);
-                set_dma_x_modify(CH_MEM_STREAM2_DEST, sizeof(char));
-                set_dma_config(CH_MEM_STREAM2_DEST, WNR | RESTART | DI_EN);
-
-                enable_dma(CH_MEM_STREAM2_SRC);
-                enable_dma(CH_MEM_STREAM2_DEST);
-
-                wait_event_interruptible(coreb_dma_wait, coreb_dma_done);
-
-                disable_dma(CH_MEM_STREAM2_SRC);
-                disable_dma(CH_MEM_STREAM2_DEST);
-
-                count -= len;
-                wrote += len;
-                buf += len;
-                p += len;
-        }
-        *ppos = p;
-        return wrote;
-}
-
-static ssize_t coreb_read(struct file *file, char *buf, size_t count,
-                          loff_t * ppos)
-{
-        unsigned long p = *ppos;
-        ssize_t read = 0;
-
-        if ((p + count) > coreb_size)
-                return -EFAULT;
-
-        while (count > 0) {
-                int len = count;
-
-                if (len > PAGE_SIZE)
-                        len = PAGE_SIZE;
-
-                coreb_dma_done = 0;
-
-                invalidate_dcache_range((unsigned long)buf, (unsigned long)(buf+len));
-                /* Source Channel */
-                set_dma_start_addr(CH_MEM_STREAM2_SRC, coreb_base + p);
-                set_dma_x_count(CH_MEM_STREAM2_SRC, len);
-                set_dma_x_modify(CH_MEM_STREAM2_SRC, sizeof(char));
-                set_dma_config(CH_MEM_STREAM2_SRC, 0);
-                /* Destination Channel */
-                set_dma_start_addr(CH_MEM_STREAM2_DEST, (unsigned long)buf);
-                set_dma_x_count(CH_MEM_STREAM2_DEST, len);
-                set_dma_x_modify(CH_MEM_STREAM2_DEST, sizeof(char));
-                set_dma_config(CH_MEM_STREAM2_DEST, WNR | RESTART | DI_EN);
-
-                enable_dma(CH_MEM_STREAM2_SRC);
-                enable_dma(CH_MEM_STREAM2_DEST);
-
-                wait_event_interruptible(coreb_dma_wait, coreb_dma_done);
-
-                disable_dma(CH_MEM_STREAM2_SRC);
-                disable_dma(CH_MEM_STREAM2_DEST);
-
-                count -= len;
-                read += len;
-                buf += len;
-                p += len;
-        }
-
-        return read;
-}
-
-static loff_t coreb_lseek(struct file *file, loff_t offset, int origin)
+static int
+coreb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
 {
-        loff_t ret;
-
-        mutex_lock(&file->f_dentry->d_inode->i_mutex);
-
-        switch (origin) {
-        case 0 /* SEEK_SET */ :
-                if (offset < coreb_size) {
-                        file->f_pos = offset;
-                        ret = file->f_pos;
-                } else
-                        ret = -EINVAL;
-                break;
-        case 1 /* SEEK_CUR */ :
-                if ((offset + file->f_pos) < coreb_size) {
-                        file->f_pos += offset;
-                        ret = file->f_pos;
-                } else
-                        ret = -EINVAL;
-        default:
-                ret = -EINVAL;
-        }
-        mutex_unlock(&file->f_dentry->d_inode->i_mutex);
-        return ret;
-}
-
-/* No BKL needed here */
-static int coreb_open(struct inode *inode, struct file *file)
-{
-        spin_lock_irq(&coreb_lock);
-
-        if (coreb_status & COREB_IS_OPEN)
-                goto out_busy;
-
-        coreb_status |= COREB_IS_OPEN;
-
-        spin_unlock_irq(&coreb_lock);
-        return 0;
-
- out_busy:
-        spin_unlock_irq(&coreb_lock);
-        return -EBUSY;
-}
-
-static int coreb_release(struct inode *inode, struct file *file)
-{
-        spin_lock_irq(&coreb_lock);
-        coreb_status &= ~COREB_IS_OPEN;
-        spin_unlock_irq(&coreb_lock);
-        return 0;
-}
-
-static int coreb_ioctl(struct inode *inode, struct file *file,
-                       unsigned int cmd, unsigned long arg)
-{
-        int retval = 0;
-        int coreb_index = 0;
+        int ret = 0;
 
         switch (cmd) {
-        case CMD_COREB_INDEX:
-                if (copy_from_user(&coreb_index, (int *)arg, sizeof(int))) {
-                        retval = -EFAULT;
-                        break;
-                }
-
-                spin_lock_irq(&coreb_lock);
-                switch (coreb_index) {
-                case 0:
-                        coreb_base = 0xff600000;
-                        coreb_size = 0x4000;
-                        break;
-                case 1:
-                        coreb_base = 0xff610000;
-                        coreb_size = 0x4000;
-                        break;
-                case 2:
-                        coreb_base = 0xff500000;
-                        coreb_size = 0x8000;
-                        break;
-                case 3:
-                        coreb_base = 0xff400000;
-                        coreb_size = 0x8000;
-                        break;
-                default:
-                        retval = -EINVAL;
-                        break;
-                }
-                spin_unlock_irq(&coreb_lock);
-
-                mutex_lock(&file->f_dentry->d_inode->i_mutex);
-                file->f_pos = 0;
-                mutex_unlock(&file->f_dentry->d_inode->i_mutex);
-                break;
         case CMD_COREB_START:
-                spin_lock_irq(&coreb_lock);
-                if (coreb_status & COREB_IS_RUNNING) {
-                        retval = -EBUSY;
-                        break;
-                }
-                printk(KERN_INFO "Starting Core B\n");
-                coreb_status |= COREB_IS_RUNNING;
                 bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() & ~0x0020);
-                SSYNC();
-                spin_unlock_irq(&coreb_lock);
                 break;
-#if defined(CONFIG_BF561_COREB_RESET)
         case CMD_COREB_STOP:
-                spin_lock_irq(&coreb_lock);
-                printk(KERN_INFO "Stopping Core B\n");
                 bfin_write_SICA_SYSCR(bfin_read_SICA_SYSCR() | 0x0020);
                 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080);
-                coreb_status &= ~COREB_IS_RUNNING;
-                spin_unlock_irq(&coreb_lock);
                 break;
         case CMD_COREB_RESET:
-                printk(KERN_INFO "Resetting Core B\n");
                 bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | 0x0080);
                 break;
-#endif
+        default:
+                ret = -EINVAL;
+                break;
         }
 
-        return retval;
+        CSYNC();
+
+        return ret;
 }
 
 static struct file_operations coreb_fops = {
-        .owner = THIS_MODULE,
-        .llseek = coreb_lseek,
-        .read = coreb_read,
-        .write = coreb_write,
-        .ioctl = coreb_ioctl,
-        .open = coreb_open,
-        .release = coreb_release
+        .owner   = THIS_MODULE,
+        .ioctl   = coreb_ioctl,
 };
 
 static struct miscdevice coreb_dev = {
-        COREB_MINOR,
-        "coreb",
-        &coreb_fops
+        .minor = MISC_DYNAMIC_MINOR,
+        .name  = "coreb",
+        .fops  = &coreb_fops,
 };
 
-static ssize_t coreb_show_status(struct device *dev, struct device_attribute *attr, char *buf)
+static int __init bf561_coreb_init(void)
 {
-        return sprintf(buf,
-                       "Base Address:\t0x%08lx\n"
-                       "Core B is %s\n"
-                       "SICA_SYSCR:\t%04x\n"
-                       "SICB_SYSCR:\t%04x\n"
-                       "\n"
-                       "IRQ Status:\tCore A\t\tCore B\n"
-                       "ISR0:\t\t%08x\t\t%08x\n"
-                       "ISR1:\t\t%08x\t\t%08x\n"
-                       "IMASK0:\t\t%08x\t\t%08x\n"
-                       "IMASK1:\t\t%08x\t\t%08x\n",
-                       coreb_base,
-                       coreb_status & COREB_IS_RUNNING ? "running" : "stalled",
-                       bfin_read_SICA_SYSCR(), bfin_read_SICB_SYSCR(),
-                       bfin_read_SICA_ISR0(), bfin_read_SICB_ISR0(),
-                       bfin_read_SICA_ISR1(), bfin_read_SICB_ISR0(),
-                       bfin_read_SICA_IMASK0(), bfin_read_SICB_IMASK0(),
-                       bfin_read_SICA_IMASK1(), bfin_read_SICB_IMASK1());
-}
-
-static DEVICE_ATTR(coreb_status, S_IRUGO, coreb_show_status, NULL);
-
-int __init bf561_coreb_init(void)
-{
-        init_waitqueue_head(&coreb_dma_wait);
-
-        spin_lock_init(&coreb_lock);
-        /* Request the core memory regions for Core B */
-        if (request_mem_region(0xff600000, 0x4000,
-                               "Core B - Instruction SRAM") == NULL)
-                goto exit;
-
-        if (request_mem_region(0xFF610000, 0x4000,
-                               "Core B - Instruction SRAM") == NULL)
-                goto release_instruction_a_sram;
-
-        if (request_mem_region(0xFF500000, 0x8000,
-                               "Core B - Data Bank B SRAM") == NULL)
-                goto release_instruction_b_sram;
-
-        if (request_mem_region(0xff400000, 0x8000,
-                               "Core B - Data Bank A SRAM") == NULL)
-                goto release_data_b_sram;
-
-        if (request_dma(CH_MEM_STREAM2_DEST, "Core B - DMA Destination") < 0)
-                goto release_data_a_sram;
-
-        if (request_dma(CH_MEM_STREAM2_SRC, "Core B - DMA Source") < 0)
-                goto release_dma_dest;
-
-        set_dma_callback(CH_MEM_STREAM2_DEST, coreb_dma_interrupt, NULL);
-
-        misc_register(&coreb_dev);
-
-        if (device_create_file(coreb_dev.this_device, &dev_attr_coreb_status))
-                goto release_dma_src;
-
-        printk(KERN_INFO "BF561 Core B driver %s initialized.\n", MODULE_VER);
-        return 0;
-
- release_dma_src:
-        free_dma(CH_MEM_STREAM2_SRC);
- release_dma_dest:
-        free_dma(CH_MEM_STREAM2_DEST);
- release_data_a_sram:
-        release_mem_region(0xff400000, 0x8000);
- release_data_b_sram:
-        release_mem_region(0xff500000, 0x8000);
- release_instruction_b_sram:
-        release_mem_region(0xff610000, 0x4000);
- release_instruction_a_sram:
-        release_mem_region(0xff600000, 0x4000);
- exit:
-        return -ENOMEM;
+        return misc_register(&coreb_dev);
 }
+module_init(bf561_coreb_init);
 
-void __exit bf561_coreb_exit(void)
+static void __exit bf561_coreb_exit(void)
 {
-        device_remove_file(coreb_dev.this_device, &dev_attr_coreb_status);
         misc_deregister(&coreb_dev);
-
-        release_mem_region(0xff610000, 0x4000);
-        release_mem_region(0xff600000, 0x4000);
-        release_mem_region(0xff500000, 0x8000);
-        release_mem_region(0xff400000, 0x8000);
-
-        free_dma(CH_MEM_STREAM2_DEST);
-        free_dma(CH_MEM_STREAM2_SRC);
 }
-
-module_init(bf561_coreb_init);
 module_exit(bf561_coreb_exit);
 
 MODULE_AUTHOR("Bas Vermeulen <bvermeul@blackstar.xs4all.nl>");
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h
index d0b0b3506440..dccd396cd931 100644
--- a/arch/blackfin/mach-bf561/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h
@@ -6,7 +6,7 @@
  * Licensed under the GPL-2 or later.
  */
 
-/* This file shoule be up to date with:
+/* This file should be up to date with:
  *  - Revision Q, 11/07/2008; ADSP-BF561 Blackfin Processor Anomaly List
  */
 
@@ -18,11 +18,11 @@
 # error will not work on BF561 silicon version 0.0, 0.1, 0.2, or 0.4
 #endif
 
-/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot 2 Not Supported */
+/* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */
 #define ANOMALY_05000074 (1)
 /* UART Line Status Register (UART_LSR) Bits Are Not Updated at the Same Time */
 #define ANOMALY_05000099 (__SILICON_REVISION__ < 5)
-/* Trace Buffers may contain errors in emulation mode and/or exception, NMI, reset handlers */
+/* Trace Buffers may record discontinuities into emulation mode and/or exception, NMI, reset handlers */
 #define ANOMALY_05000116 (__SILICON_REVISION__ < 3)
 /* Testset instructions restricted to 32-bit aligned memory locations */
 #define ANOMALY_05000120 (1)
@@ -40,7 +40,7 @@
 #define ANOMALY_05000136 (__SILICON_REVISION__ < 3)
 /* Allowing the SPORT RX FIFO to fill will cause an overflow */
 #define ANOMALY_05000140 (__SILICON_REVISION__ < 3)
-/* Infinite Stall may occur with a particular sequence of consecutive dual dag events */
+/* An Infinite Stall occurs with a particular sequence of consecutive dual dag events */
 #define ANOMALY_05000141 (__SILICON_REVISION__ < 3)
 /* Interrupts may be lost when a programmable input flag is configured to be edge sensitive */
 #define ANOMALY_05000142 (__SILICON_REVISION__ < 3)
@@ -80,7 +80,7 @@
 #define ANOMALY_05000163 (__SILICON_REVISION__ < 3)
 /* PPI Data Lengths Between 8 and 16 Do Not Zero Out Upper Bits */
 #define ANOMALY_05000166 (1)
-/* Turning Serial Ports on with External Frame Syncs */
+/* Turning SPORTs on while External Frame Sync Is Active May Corrupt Data */
 #define ANOMALY_05000167 (1)
 /* SDRAM auto-refresh and subsequent Power Ups */
 #define ANOMALY_05000168 (__SILICON_REVISION__ < 5)
@@ -164,7 +164,7 @@
 #define ANOMALY_05000242 (__SILICON_REVISION__ < 5)
 /* If I-Cache Is On, CSYNC/SSYNC/IDLE Around Change of Control Causes Failures */
 #define ANOMALY_05000244 (__SILICON_REVISION__ < 5)
-/* Spurious Hardware Error from an Access in the Shadow of a Conditional Branch */
+/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
 #define ANOMALY_05000245 (__SILICON_REVISION__ < 5)
 /* TESTSET operation forces stall on the other core */
 #define ANOMALY_05000248 (__SILICON_REVISION__ < 5)
@@ -208,7 +208,7 @@
 #define ANOMALY_05000275 (__SILICON_REVISION__ > 2)
 /* Timing Requirements Change for External Frame Sync PPI Modes with Non-Zero PPI_DELAY */
 #define ANOMALY_05000276 (__SILICON_REVISION__ < 5)
-/* Writes to an I/O data register one SCLK cycle after an edge is detected may clear interrupt */
+/* Writes to an I/O Data Register One SCLK Cycle after an Edge Is Detected May Clear Interrupt */
 #define ANOMALY_05000277 (__SILICON_REVISION__ < 3)
 /* Disabling Peripherals with DMA Running May Cause DMA System Instability */
 #define ANOMALY_05000278 (__SILICON_REVISION__ < 5)
@@ -232,7 +232,7 @@
 #define ANOMALY_05000310 (1)
 /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
 #define ANOMALY_05000312 (1)
-/* PPI Is Level-Sensitive on First Transfer */
+/* PPI Is Level-Sensitive on First Transfer In Single Frame Sync Modes */
 #define ANOMALY_05000313 (1)
 /* Killed System MMR Write Completes Erroneously On Next System MMR Access */
 #define ANOMALY_05000315 (1)
@@ -276,18 +276,27 @@
 #define ANOMALY_05000428 (__SILICON_REVISION__ > 3)
 /* IFLUSH Instruction at End of Hardware Loop Causes Infinite Stall */
 #define ANOMALY_05000443 (1)
+/* False Hardware Error when RETI points to invalid memory */
+#define ANOMALY_05000461 (1)
 
 /* Anomalies that don't exist on this proc */
+#define ANOMALY_05000119 (0)
 #define ANOMALY_05000158 (0)
 #define ANOMALY_05000183 (0)
+#define ANOMALY_05000233 (0)
 #define ANOMALY_05000273 (0)
 #define ANOMALY_05000311 (0)
 #define ANOMALY_05000353 (1)
 #define ANOMALY_05000380 (0)
 #define ANOMALY_05000386 (1)
+#define ANOMALY_05000389 (0)
+#define ANOMALY_05000400 (0)
+#define ANOMALY_05000430 (0)
 #define ANOMALY_05000432 (0)
 #define ANOMALY_05000435 (0)
 #define ANOMALY_05000447 (0)
 #define ANOMALY_05000448 (0)
+#define ANOMALY_05000456 (0)
+#define ANOMALY_05000450 (0)
 
 #endif
diff --git a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h
index 95d609f11c97..9d9858c2be68 100644
--- a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h
+++ b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h
@@ -1526,6 +1526,35 @@
 #define bfin_read_MDMA_D0_START_ADDR()  bfin_read_MDMA1_D0_START_ADDR()
 #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write_MDMA1_D0_START_ADDR(val)
 
+#define bfin_read_MDMA_S1_CONFIG()  bfin_read_MDMA1_S1_CONFIG()
+#define bfin_write_MDMA_S1_CONFIG(val) bfin_write_MDMA1_S1_CONFIG(val)
+#define bfin_read_MDMA_S1_IRQ_STATUS()  bfin_read_MDMA1_S1_IRQ_STATUS()
+#define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write_MDMA1_S1_IRQ_STATUS(val)
+#define bfin_read_MDMA_S1_X_MODIFY()  bfin_read_MDMA1_S1_X_MODIFY()
+#define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write_MDMA1_S1_X_MODIFY(val)
+#define bfin_read_MDMA_S1_Y_MODIFY()  bfin_read_MDMA1_S1_Y_MODIFY()
+#define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write_MDMA1_S1_Y_MODIFY(val)
+#define bfin_read_MDMA_S1_X_COUNT()  bfin_read_MDMA1_S1_X_COUNT()
+#define bfin_write_MDMA_S1_X_COUNT(val) bfin_write_MDMA1_S1_X_COUNT(val)
+#define bfin_read_MDMA_S1_Y_COUNT()  bfin_read_MDMA1_S1_Y_COUNT()
+#define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write_MDMA1_S1_Y_COUNT(val)
+#define bfin_read_MDMA_S1_START_ADDR()  bfin_read_MDMA1_S1_START_ADDR()
+#define bfin_write_MDMA_S1_START_ADDR(val) bfin_write_MDMA1_S1_START_ADDR(val)
+#define bfin_read_MDMA_D1_CONFIG()  bfin_read_MDMA1_D1_CONFIG()
+#define bfin_write_MDMA_D1_CONFIG(val) bfin_write_MDMA1_D1_CONFIG(val)
+#define bfin_read_MDMA_D1_IRQ_STATUS()  bfin_read_MDMA1_D1_IRQ_STATUS()
+#define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write_MDMA1_D1_IRQ_STATUS(val)
+#define bfin_read_MDMA_D1_X_MODIFY()  bfin_read_MDMA1_D1_X_MODIFY()
+#define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write_MDMA1_D1_X_MODIFY(val)
+#define bfin_read_MDMA_D1_Y_MODIFY()  bfin_read_MDMA1_D1_Y_MODIFY()
+#define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write_MDMA1_D1_Y_MODIFY(val)
+#define bfin_read_MDMA_D1_X_COUNT()  bfin_read_MDMA1_D1_X_COUNT()
+#define bfin_write_MDMA_D1_X_COUNT(val) bfin_write_MDMA1_D1_X_COUNT(val)
+#define bfin_read_MDMA_D1_Y_COUNT()  bfin_read_MDMA1_D1_Y_COUNT()
+#define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write_MDMA1_D1_Y_COUNT(val)
+#define bfin_read_MDMA_D1_START_ADDR()  bfin_read_MDMA1_D1_START_ADDR()
+#define bfin_write_MDMA_D1_START_ADDR(val) bfin_write_MDMA1_D1_START_ADDR(val)
+
 /* These need to be last due to the cdef/linux inter-dependencies */
 #include <asm/irq.h>
 
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h
index cf922295f4ce..5fc0f05026e0 100644
--- a/arch/blackfin/mach-bf561/include/mach/defBF561.h
+++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h
@@ -796,6 +796,62 @@
 #define MDMA2_S1_IRQ_STATUS 0xFFC00FE8  /*MemDMA2 Stream 1 Source Interrupt/Status Register */
 #define MDMA2_S1_PERIPHERAL_MAP 0xFFC00FEC      /*MemDMA2 Stream 1 Source Peripheral Map register */
 
+#define MDMA_D0_NEXT_DESC_PTR MDMA1_D0_NEXT_DESC_PTR
+#define MDMA_D0_START_ADDR MDMA1_D0_START_ADDR
+#define MDMA_D0_CONFIG MDMA1_D0_CONFIG
+#define MDMA_D0_X_COUNT MDMA1_D0_X_COUNT
+#define MDMA_D0_X_MODIFY MDMA1_D0_X_MODIFY
+#define MDMA_D0_Y_COUNT MDMA1_D0_Y_COUNT
+#define MDMA_D0_Y_MODIFY MDMA1_D0_Y_MODIFY
+#define MDMA_D0_CURR_DESC_PTR MDMA1_D0_CURR_DESC_PTR
+#define MDMA_D0_CURR_ADDR MDMA1_D0_CURR_ADDR
+#define MDMA_D0_IRQ_STATUS MDMA1_D0_IRQ_STATUS
+#define MDMA_D0_PERIPHERAL_MAP MDMA1_D0_PERIPHERAL_MAP
+#define MDMA_D0_CURR_X_COUNT MDMA1_D0_CURR_X_COUNT
+#define MDMA_D0_CURR_Y_COUNT MDMA1_D0_CURR_Y_COUNT
+
+#define MDMA_S0_NEXT_DESC_PTR MDMA1_S0_NEXT_DESC_PTR
+#define MDMA_S0_START_ADDR MDMA1_S0_START_ADDR
+#define MDMA_S0_CONFIG MDMA1_S0_CONFIG
+#define MDMA_S0_X_COUNT MDMA1_S0_X_COUNT
+#define MDMA_S0_X_MODIFY MDMA1_S0_X_MODIFY
+#define MDMA_S0_Y_COUNT MDMA1_S0_Y_COUNT
+#define MDMA_S0_Y_MODIFY MDMA1_S0_Y_MODIFY
+#define MDMA_S0_CURR_DESC_PTR MDMA1_S0_CURR_DESC_PTR
+#define MDMA_S0_CURR_ADDR MDMA1_S0_CURR_ADDR
+#define MDMA_S0_IRQ_STATUS MDMA1_S0_IRQ_STATUS
+#define MDMA_S0_PERIPHERAL_MAP MDMA1_S0_PERIPHERAL_MAP
+#define MDMA_S0_CURR_X_COUNT MDMA1_S0_CURR_X_COUNT
+#define MDMA_S0_CURR_Y_COUNT MDMA1_S0_CURR_Y_COUNT
+
+#define MDMA_D1_NEXT_DESC_PTR MDMA1_D1_NEXT_DESC_PTR
+#define MDMA_D1_START_ADDR MDMA1_D1_START_ADDR
+#define MDMA_D1_CONFIG MDMA1_D1_CONFIG
+#define MDMA_D1_X_COUNT MDMA1_D1_X_COUNT
+#define MDMA_D1_X_MODIFY MDMA1_D1_X_MODIFY
+#define MDMA_D1_Y_COUNT MDMA1_D1_Y_COUNT
+#define MDMA_D1_Y_MODIFY MDMA1_D1_Y_MODIFY
+#define MDMA_D1_CURR_DESC_PTR MDMA1_D1_CURR_DESC_PTR
+#define MDMA_D1_CURR_ADDR MDMA1_D1_CURR_ADDR
+#define MDMA_D1_IRQ_STATUS MDMA1_D1_IRQ_STATUS
+#define MDMA_D1_PERIPHERAL_MAP MDMA1_D1_PERIPHERAL_MAP
+#define MDMA_D1_CURR_X_COUNT MDMA1_D1_CURR_X_COUNT
+#define MDMA_D1_CURR_Y_COUNT MDMA1_D1_CURR_Y_COUNT
+
+#define MDMA_S1_NEXT_DESC_PTR MDMA1_S1_NEXT_DESC_PTR
+#define MDMA_S1_START_ADDR MDMA1_S1_START_ADDR
+#define MDMA_S1_CONFIG MDMA1_S1_CONFIG
+#define MDMA_S1_X_COUNT MDMA1_S1_X_COUNT
+#define MDMA_S1_X_MODIFY MDMA1_S1_X_MODIFY
+#define MDMA_S1_Y_COUNT MDMA1_S1_Y_COUNT
+#define MDMA_S1_Y_MODIFY MDMA1_S1_Y_MODIFY
+#define MDMA_S1_CURR_DESC_PTR MDMA1_S1_CURR_DESC_PTR
+#define MDMA_S1_CURR_ADDR MDMA1_S1_CURR_ADDR
+#define MDMA_S1_IRQ_STATUS MDMA1_S1_IRQ_STATUS
+#define MDMA_S1_PERIPHERAL_MAP MDMA1_S1_PERIPHERAL_MAP
+#define MDMA_S1_CURR_X_COUNT MDMA1_S1_CURR_X_COUNT
+#define MDMA_S1_CURR_Y_COUNT MDMA1_S1_CURR_Y_COUNT
+
 /* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */
 #define IMDMA_D0_CONFIG 0xFFC01808      /*IMDMA Stream 0 Destination Configuration */
 #define IMDMA_D0_NEXT_DESC_PTR 0xFFC01800       /*IMDMA Stream 0 Destination Next Descriptor Ptr Reg */
diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c
index 9b27e698c0b2..8c10701c251f 100644
--- a/arch/blackfin/mach-bf561/smp.c
+++ b/arch/blackfin/mach-bf561/smp.c
@@ -133,9 +133,9 @@ void __init platform_request_ipi(irq_handler_t handler)
         int ret;
 
         ret = request_irq(IRQ_SUPPLE_0, handler, IRQF_DISABLED,
-                          "SMP interrupt", handler);
+                          "Supplemental Interrupt0", handler);
         if (ret)
-                panic("Cannot request supplemental interrupt 0 for IPI service\n");
+                panic("Cannot request supplemental interrupt 0 for IPI service");
 }
 
 void platform_send_ipi(cpumask_t callmap)
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index 80d39b2f9db2..da93d9207165 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -71,3 +71,10 @@
 #if ANOMALY_05000448
 # error You are using a part with anomaly 05000448, this issue causes random memory read/write failures - that means random crashes.
 #endif
+
+/* if 220 exists, can not set External Memory WB and L2 not_cached, either External Memory not_cached and L2 WB */
+#if ANOMALY_05000220 && \
+        ((defined(CONFIG_BFIN_WB) && defined(CONFIG_BFIN_L2_NOT_CACHED)) || \
+         (!defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_L2_WB)))
+# error You are exposing Anomaly 220 in this config, either config L2 as Write Through, or make External Memory WB.
+#endif
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S
index aa0648c6a9fe..d9666fe6c3d6 100644
--- a/arch/blackfin/mach-common/cache.S
+++ b/arch/blackfin/mach-common/cache.S
@@ -15,6 +15,13 @@
 
 .text
 
+/* 05000443 - IFLUSH cannot be last instruction in hardware loop */
+#if ANOMALY_05000443
+# define BROK_FLUSH_INST "IFLUSH"
+#else
+# define BROK_FLUSH_INST "no anomaly! yeah!"
+#endif
+
 /* Since all L1 caches work the same way, we use the same method for flushing
  * them.  Only the actual flush instruction differs.  We write this in asm as
  * GCC can be hard to coax into writing nice hardware loops.
@@ -23,7 +30,7 @@
  * R0 = start address
  * R1 = end address
  */
-.macro do_flush flushins:req optflushins optnopins label
+.macro do_flush flushins:req label
 
         R2 = -L1_CACHE_BYTES;
 
@@ -44,22 +51,15 @@
 \label :
 .endif
         P0 = R0;
+
         LSETUP (1f, 2f) LC1 = P1;
 1:
-.ifnb \optflushins
-        \optflushins [P0];
-.endif
-#if ANOMALY_05000443
-.ifb \optnopins
-2:
-.endif
+.ifeqs "\flushins", BROK_FLUSH_INST
         \flushins [P0++];
-.ifnb \optnopins
-2:      \optnopins;
-.endif
-#else
+2:      nop;
+.else
 2:      \flushins [P0++];
-#endif
+.endif
 
         RTS;
 .endm
@@ -77,25 +77,9 @@ ENTRY(_blackfin_icache_flush_range)
  */
         P0 = R0;
         IFLUSH[P0];
-        do_flush IFLUSH, , nop
+        do_flush IFLUSH
 ENDPROC(_blackfin_icache_flush_range)
 
-/* Flush all cache lines assocoiated with this area of memory. */
-ENTRY(_blackfin_icache_dcache_flush_range)
-/*
- * Walkaround to avoid loading wrong instruction after invalidating icache
- * and following sequence is met.
- *
- * 1) One instruction address is cached in the instruction cache.
- * 2) This instruction in SDRAM is changed.
- * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range().
- * 4) This instruction is executed again, but the old one is loaded.
- */
-        P0 = R0;
-        IFLUSH[P0];
-        do_flush FLUSH, IFLUSH
-ENDPROC(_blackfin_icache_dcache_flush_range)
-
 /* Throw away all D-cached data in specified region without any obligation to
  * write them back.  Since the Blackfin ISA does not have an "invalidate"
  * instruction, we use flush/invalidate.  Perhaps as a speed optimization we
@@ -107,7 +91,7 @@ ENDPROC(_blackfin_dcache_invalidate_range)
 
 /* Flush all data cache lines assocoiated with this memory area */
 ENTRY(_blackfin_dcache_flush_range)
-        do_flush FLUSH, , , .Ldfr
+        do_flush FLUSH, .Ldfr
 ENDPROC(_blackfin_dcache_flush_range)
 
 /* Our headers convert the page structure to an address, so just need to flush
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c
index 35393651359b..ef6870e9eea6 100644
--- a/arch/blackfin/mach-common/clocks-init.c
+++ b/arch/blackfin/mach-common/clocks-init.c
@@ -72,6 +72,7 @@ void init_clocks(void)
 #endif
         bfin_write_PLL_LOCKCNT(0x300);
         do_sync();
+        /* We always write PLL_CTL thus avoiding Anomaly 05000242 */
         bfin_write16(PLL_CTL, PLL_CTL_VAL);
         __asm__ __volatile__("IDLE;");
         bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index 72e16605ca09..70e3411f558c 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -140,7 +140,8 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
         cclk = get_cclk() / 1000;
         sclk = get_sclk() / 1000;
 
-#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
+#if ANOMALY_05000273 || ANOMALY_05000274 || \
+        (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
         min_cclk = sclk * 2;
 #else
         min_cclk = sclk;
diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S
index a063a434f7e3..da0558ad1b1a 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -36,7 +36,6 @@
 #include <linux/init.h>
 #include <linux/linkage.h>
 #include <linux/unistd.h>
-#include <linux/threads.h>
 #include <asm/blackfin.h>
 #include <asm/errno.h>
 #include <asm/fixed_code.h>
@@ -201,7 +200,18 @@ ENTRY(_ex_single_step)
         cc = r7 == 0;
         if !cc jump 1f;
 #endif
-
+#ifdef CONFIG_EXACT_HWERR
+        /* Read the ILAT, and to check to see if the process we are
+         * single stepping caused a previous hardware error
+         * If so, do not single step, (which lowers to IRQ5, and makes
+         * us miss the error).
+         */
+        p5.l = lo(ILAT);
+        p5.h = hi(ILAT);
+        r7 = [p5];
+        cc = bittst(r7, EVT_IVHW_P);
+        if cc jump 1f;
+#endif
         /* Single stepping only a single instruction, so clear the trace
          * bit here.  */
         r7 = syscfg;
@@ -263,15 +273,6 @@ ENTRY(_bfin_return_from_exception)
         r6 = 0x25;
         CC = R7 == R6;
         if CC JUMP _double_fault;
-
-        /* Did we cause a HW error? */
-        p5.l = lo(ILAT);
-        p5.h = hi(ILAT);
-        r6 = [p5];
-        r7 = 0x20;              /* Did I just cause anther HW error? */
-        r6 = r7 & r6;
-        CC = R7 == R6;
-        if CC JUMP _double_fault;
 #endif
 
         (R7:6,P5:4) = [sp++];
@@ -473,6 +474,16 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/
         [--sp] = ASTAT;
         [--sp] = (R7:6,P5:4);
 
+#ifdef CONFIG_EXACT_HWERR
+        /* Make sure all pending read/writes complete. This will ensure any
+         * accesses which could cause hardware errors completes, and signal
+         * the the hardware before we do something silly, like crash the
+         * kernel. We don't need to work around anomaly 05000312, since
+         * we are already atomic
+         */
+        ssync;
+#endif
+
 #if ANOMALY_05000283 || ANOMALY_05000315
         cc = r7 == r7;
         p5.h = HI(CHIPID);
@@ -855,7 +866,7 @@ ENTRY(_ret_from_exception)
         p1.h = _schedule_and_signal;
         [p0] = p1;
         csync;
-        raise 15;               /* raise evt14 to do signal or reschedule */
+        raise 15;               /* raise evt15 to do signal or reschedule */
 4:
         r0 = syscfg;
         bitclr(r0, 0);
@@ -916,7 +927,7 @@ ENTRY(_return_from_int)
         p1.h = _schedule_and_signal_from_int;
         [p0] = p1;
         csync;
-#if ANOMALY_05000281
+#if ANOMALY_05000281 || ANOMALY_05000461
         r0.l = lo(SAFE_USER_INSTRUCTION);
         r0.h = hi(SAFE_USER_INSTRUCTION);
         reti = r0;
@@ -930,18 +941,27 @@ ENTRY(_return_from_int)
 ENDPROC(_return_from_int)
 
 ENTRY(_lower_to_irq14)
-#if ANOMALY_05000281
+#if ANOMALY_05000281 || ANOMALY_05000461
         r0.l = lo(SAFE_USER_INSTRUCTION);
         r0.h = hi(SAFE_USER_INSTRUCTION);
         reti = r0;
 #endif
-        r0 = 0x401f;
+
+#ifdef CONFIG_DEBUG_HWERR
+        /* enable irq14 & hwerr interrupt, until we transition to _evt14_softirq */
+        r0 = (EVT_IVG14 | EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
+#else
+        /* Only enable irq14 interrupt, until we transition to _evt14_softirq */
+        r0 = (EVT_IVG14 | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
+#endif
         sti r0;
         raise 14;
         rti;
+ENDPROC(_lower_to_irq14)
+
 ENTRY(_evt14_softirq)
 #ifdef CONFIG_DEBUG_HWERR
-        r0 = 0x3f;
+        r0 = (EVT_IVHW | EVT_IRPTEN | EVT_EVX | EVT_NMI | EVT_RST | EVT_EMU);
         sti r0;
 #else
         cli r0;
@@ -949,8 +969,9 @@ ENTRY(_evt14_softirq)
         [--sp] = RETI;
         SP += 4;
         rts;
+ENDPROC(_evt14_softirq)
 
-_schedule_and_signal_from_int:
+ENTRY(_schedule_and_signal_from_int)
         /* To end up here, vector 15 was changed - so we have to change it
          * back.
          */
@@ -983,8 +1004,9 @@ _schedule_and_signal_from_int:
         call _finish_atomic_sections;
         sp += 12;
         jump.s .Lresume_userspace;
+ENDPROC(_schedule_and_signal_from_int)
 
-_schedule_and_signal:
+ENTRY(_schedule_and_signal)
         SAVE_CONTEXT_SYSCALL
         /* To end up here, vector 15 was changed - so we have to change it
          * back.
@@ -1002,7 +1024,7 @@ _schedule_and_signal:
 1:
         RESTORE_CONTEXT
         rti;
-ENDPROC(_lower_to_irq14)
+ENDPROC(_schedule_and_signal)
 
 /* We handle this 100% in exception space - to reduce overhead
  * Only potiential problem is if the software buffer gets swapped out of the
@@ -1588,19 +1610,3 @@ ENTRY(_sys_call_table)
         .long _sys_ni_syscall
         .endr
 END(_sys_call_table)
-
-#ifdef CONFIG_EXCEPTION_L1_SCRATCH
-/* .section .l1.bss.scratch */
-.set _exception_stack_top, L1_SCRATCH_START + L1_SCRATCH_LENGTH
-#else
-#ifdef CONFIG_SYSCALL_TAB_L1
-.section .l1.bss
-#else
-.bss
-#endif
-ENTRY(_exception_stack)
-        .rept 1024 * NR_CPUS
-        .long 0
-        .endr
-_exception_stack_top:
-#endif
diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index 698d4c05947e..f826f6b9f917 100644
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -30,8 +30,6 @@ ENTRY(__init_clear_bss)
         rts;
 ENDPROC(__init_clear_bss)
 
-#define INITIAL_STACK   (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
-
 ENTRY(__start)
         /* R0: argument of command line string, passed from uboot, save it */
         R7 = R0;
@@ -126,30 +124,30 @@ ENTRY(__start)
          * below
          */
         GET_PDA(p0, r0);
-        r7 = [p0 + PDA_RETX];
+        r6 = [p0 + PDA_RETX];
         p1.l = _init_saved_retx;
         p1.h = _init_saved_retx;
-        [p1] = r7;
+        [p1] = r6;
 
-        r7 = [p0 + PDA_DCPLB];
+        r6 = [p0 + PDA_DCPLB];
         p1.l = _init_saved_dcplb_fault_addr;
         p1.h = _init_saved_dcplb_fault_addr;
-        [p1] = r7;
+        [p1] = r6;
 
-        r7 = [p0 + PDA_ICPLB];
+        r6 = [p0 + PDA_ICPLB];
         p1.l = _init_saved_icplb_fault_addr;
         p1.h = _init_saved_icplb_fault_addr;
-        [p1] = r7;
+        [p1] = r6;
 
-        r7 = [p0 + PDA_SEQSTAT];
+        r6 = [p0 + PDA_SEQSTAT];
         p1.l = _init_saved_seqstat;
         p1.h = _init_saved_seqstat;
-        [p1] = r7;
+        [p1] = r6;
 #endif
 
         /* Initialize stack pointer */
-        sp.l = lo(INITIAL_STACK);
-        sp.h = hi(INITIAL_STACK);
+        sp.l = _init_thread_union;
+        sp.h = _init_thread_union;
         fp = sp;
         usp = sp;
 
@@ -189,7 +187,15 @@ ENTRY(__start)
         /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
         call _bfin_relocate_l1_mem;
 #ifdef CONFIG_BFIN_KERNEL_CLOCK
+        /* Only use on-chip scratch space for stack when absolutely required
+         * to avoid Anomaly 05000227 ... we know the init_clocks() func only
+         * uses L1 text and stack space and no other memory region.
+         */
+# define KERNEL_CLOCK_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
+        sp.l = lo(KERNEL_CLOCK_STACK);
+        sp.h = hi(KERNEL_CLOCK_STACK);
         call _init_clocks;
+        sp = usp;       /* usp hasnt been touched, so restore from there */
 #endif
 
         /* This section keeps the processor in supervisor mode
@@ -243,9 +249,7 @@ ENTRY(_real_start)
         call _cmdline_init;
 
         /* Load the current thread pointer and stack */
-        sp.l = _init_thread_union;
-        sp.h = _init_thread_union;
-        p1 = THREAD_SIZE (z);
+        p1 = THREAD_SIZE + 4 (z);       /* +4 is for reti loading */
         sp = sp + p1;
         usp = sp;
         fp = sp;
diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S
index 0069c2dd4625..9c46680186e4 100644
--- a/arch/blackfin/mach-common/interrupt.S
+++ b/arch/blackfin/mach-common/interrupt.S
@@ -145,6 +145,14 @@ __common_int_entry:
 
 /* interrupt routine for ivhw - 5 */
 ENTRY(_evt_ivhw)
+        /* In case a single action kicks off multiple memory transactions, (like
+         * a cache line fetch, - this can cause multiple hardware errors, let's
+         * catch them all. First - make sure all the actions are complete, and
+         * the core sees the hardware errors.
+         */
+        SSYNC;
+        SSYNC;
+
         SAVE_ALL_SYS
 #ifdef CONFIG_FRAME_POINTER
         fp = 0;
@@ -159,6 +167,25 @@ ENTRY(_evt_ivhw)
 1:
 #endif
 
+        /* Handle all stacked hardware errors
+         * To make sure we don't hang forever, only do it 10 times
+         */
+        R0 = 0;
+        R2 = 10;
+1:
+        P0.L = LO(ILAT);
+        P0.H = HI(ILAT);
+        R1 = [P0];
+        CC = BITTST(R1, EVT_IVHW_P);
+        IF ! CC JUMP 2f;
+        /* OK a hardware error is pending - clear it */
+        R1 = EVT_IVHW_P;
+        [P0] = R1;
+        R0 += 1;
+        CC = R1 == R2;
+        if CC JUMP 2f;
+        JUMP 1b;
+2:
         # We are going to dump something out, so make sure we print IPEND properly
         p2.l = lo(IPEND);
         p2.h = hi(IPEND);
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index a7d7b2dd4059..351afd0e36d8 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1052,7 +1052,7 @@ int __init init_arch_irq(void)
                         set_irq_chained_handler(irq, bfin_demux_error_irq);
                         break;
 #endif
-#if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE)
+#if defined(CONFIG_TICKSOURCE_GPTMR0)
                 case IRQ_TIMER0:
                         set_irq_handler(irq, handle_percpu_irq);
                         break;
@@ -1116,6 +1116,9 @@ int __init init_arch_irq(void)
             IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
             IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
 
+        /* This implicitly covers ANOMALY_05000171
+         * Boot-ROM code modifies SICA_IWRx wakeup registers
+         */
 #ifdef SIC_IWR0
         bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
 # ifdef SIC_IWR1
@@ -1136,13 +1139,6 @@ int __init init_arch_irq(void)
         bfin_write_SIC_IWR(IWR_DISABLE_ALL);
 #endif
 
-#ifdef CONFIG_IPIPE
-        for (irq = 0; irq < NR_IRQS; irq++) {
-                struct irq_desc *desc = irq_to_desc(irq);
-                desc->ic_prio = __ipipe_get_irq_priority(irq);
-        }
-#endif /* CONFIG_IPIPE */
-
         return 0;
 }
 
@@ -1156,23 +1152,22 @@ void do_irq(int vec, struct pt_regs *fp)
         } else {
                 struct ivgx *ivg = ivg7_13[vec - IVG7].ifirst;
                 struct ivgx *ivg_stop = ivg7_13[vec - IVG7].istop;
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \
-        || defined(BF538_FAMILY) || defined(CONFIG_BF51x)
+#if defined(SIC_ISR0) || defined(SICA_ISR0)
                 unsigned long sic_status[3];
 
                 if (smp_processor_id()) {
-#ifdef CONFIG_SMP
+# ifdef SICB_ISR0
                         /* This will be optimized out in UP mode. */
                         sic_status[0] = bfin_read_SICB_ISR0() & bfin_read_SICB_IMASK0();
                         sic_status[1] = bfin_read_SICB_ISR1() & bfin_read_SICB_IMASK1();
-#endif
+# endif
                 } else {
                         sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
                         sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
                 }
-#ifdef CONFIG_BF54x
+# ifdef SIC_ISR2
                 sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2();
-#endif
+# endif
                 for (;; ivg++) {
                         if (ivg >= ivg_stop) {
                                 atomic_inc(&num_spurious);
@@ -1236,20 +1231,16 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
 
         if (likely(vec == EVT_IVTMR_P)) {
                 irq = IRQ_CORETMR;
-                goto core_tick;
-        }
 
-        SSYNC();
-
-#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
-        {
+        } else {
+#if defined(SIC_ISR0) || defined(SICA_ISR0)
                 unsigned long sic_status[3];
 
                 sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
                 sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
-#ifdef CONFIG_BF54x
+# ifdef SIC_ISR2
                 sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2();
-#endif
+# endif
                 for (;; ivg++) {
                         if (ivg >= ivg_stop) {
                                 atomic_inc(&num_spurious);
@@ -1258,9 +1249,7 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
                         if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag)
                                 break;
                 }
-        }
 #else
-        {
                 unsigned long sic_status;
 
                 sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();
@@ -1272,15 +1261,13 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
                         } else if (sic_status & ivg->isrflag)
                                 break;
                 }
-        }
 #endif
 
-        irq = ivg->irqno;
+                irq = ivg->irqno;
+        }
 
         if (irq == IRQ_SYSTMR) {
-#ifdef CONFIG_GENERIC_CLOCKEVENTS
-core_tick:
-#else
+#ifndef CONFIG_GENERIC_CLOCKEVENTS
                 bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */
 #endif
                 /* This is basically what we need from the register frame. */
@@ -1292,9 +1279,6 @@ core_tick:
                         __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
         }
 
-#ifndef CONFIG_GENERIC_CLOCKEVENTS
-core_tick:
-#endif
         if (this_domain == ipipe_root_domain) {
                 s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status);
                 barrier();
@@ -1312,7 +1296,7 @@ core_tick:
                 }
         }
 
-       return 0;
+        return 0;
 }
 
 #endif /* CONFIG_IPIPE */
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index 93eab6146079..3b8ebaee77f2 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -43,8 +43,13 @@
 #include <asm/processor.h>
 #include <asm/ptrace.h>
 #include <asm/cpu.h>
+#include <asm/time.h>
 #include <linux/err.h>
 
+/*
+ * Anomaly notes:
+ * 05000120 - we always define corelock as 32-bit integer in L2
+ */
 struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
 
 void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
@@ -352,7 +357,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
 
 static void __cpuinit setup_secondary(unsigned int cpu)
 {
-#if !(defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE))
+#if !defined(CONFIG_TICKSOURCE_GPTMR0)
         struct irq_desc *timer_desc;
 #endif
         unsigned long ilat;
@@ -364,16 +369,13 @@ static void __cpuinit setup_secondary(unsigned int cpu)
         bfin_write_ILAT(ilat);
         CSYNC();
 
-        /* Reserve the PDA space for the secondary CPU. */
-        reserve_pda();
-
         /* Enable interrupt levels IVG7-15. IARs have been already
          * programmed by the boot CPU.  */
         bfin_irq_flags |= IMASK_IVG15 |
             IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
             IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
 
-#if defined(CONFIG_TICK_SOURCE_SYSTMR0) || defined(CONFIG_IPIPE)
+#if defined(CONFIG_TICKSOURCE_GPTMR0)
         /* Power down the core timer, just to play safe. */
         bfin_write_TCNTL(0);
 
diff --git a/arch/blackfin/mm/blackfin_sram.h b/arch/blackfin/mm/blackfin_sram.h
index 8cb0945563f9..bc0062884fde 100644
--- a/arch/blackfin/mm/blackfin_sram.h
+++ b/arch/blackfin/mm/blackfin_sram.h
@@ -30,7 +30,6 @@
 #ifndef __BLACKFIN_SRAM_H__
 #define __BLACKFIN_SRAM_H__
 
-extern void bfin_sram_init(void);
 extern void *l1sram_alloc(size_t);
 
 #endif
diff --git a/arch/blackfin/mm/init.c b/arch/blackfin/mm/init.c
index 9c3629b9a689..014a55abd09a 100644
--- a/arch/blackfin/mm/init.c
+++ b/arch/blackfin/mm/init.c
@@ -52,9 +52,14 @@ static unsigned long empty_bad_page_table;
 
 static unsigned long empty_bad_page;
 
-unsigned long empty_zero_page;
+static unsigned long empty_zero_page;
 
-extern unsigned long exception_stack[NR_CPUS][1024];
+#ifndef CONFIG_EXCEPTION_L1_SCRATCH
+#if defined CONFIG_SYSCALL_TAB_L1
+__attribute__((l1_data))
+#endif
+static unsigned long exception_stack[NR_CPUS][1024];
+#endif
 
 struct blackfin_pda cpu_pda[NR_CPUS];
 EXPORT_SYMBOL(cpu_pda);
@@ -117,19 +122,18 @@ asmlinkage void __init init_pda(void)
         cpu_pda[0].next = &cpu_pda[1];
         cpu_pda[1].next = &cpu_pda[0];
 
+#ifdef CONFIG_EXCEPTION_L1_SCRATCH
+        cpu_pda[cpu].ex_stack = (unsigned long *)(L1_SCRATCH_START + \
+                                        L1_SCRATCH_LENGTH);
+#else
         cpu_pda[cpu].ex_stack = exception_stack[cpu + 1];
+#endif
 
 #ifdef CONFIG_SMP
         cpu_pda[cpu].imask = 0x1f;
 #endif
 }
 
-void __cpuinit reserve_pda(void)
-{
-        printk(KERN_INFO "PDA for CPU%u reserved at %p\n", smp_processor_id(),
-                                        &cpu_pda[smp_processor_id()]);
-}
-
 void __init mem_init(void)
 {
         unsigned int codek = 0, datak = 0, initk = 0;
@@ -171,19 +175,6 @@ void __init mem_init(void)
                 initk, codek, datak, DMA_UNCACHED_REGION >> 10, (reservedpages << (PAGE_SHIFT-10)));
 }
 
-static int __init sram_init(void)
-{
-        /* Initialize the blackfin L1 Memory. */
-        bfin_sram_init();
-
-        /* Reserve the PDA space for the boot CPU right after we
-         * initialized the scratch memory allocator.
-         */
-        reserve_pda();
-        return 0;
-}
-pure_initcall(sram_init);
-
 static void __init free_init_pages(const char *what, unsigned long begin, unsigned long end)
 {
         unsigned long addr;
diff --git a/arch/blackfin/mm/isram-driver.c b/arch/blackfin/mm/isram-driver.c
index 22913e7a1818..c080e70f98b0 100644
--- a/arch/blackfin/mm/isram-driver.c
+++ b/arch/blackfin/mm/isram-driver.c
@@ -125,7 +125,7 @@ static bool isram_check_addr(const void *addr, size_t n)
 {
         if ((addr >= (void *)L1_CODE_START) &&
             (addr < (void *)(L1_CODE_START + L1_CODE_LENGTH))) {
-                if ((addr + n) >= (void *)(L1_CODE_START + L1_CODE_LENGTH)) {
+                if ((addr + n) > (void *)(L1_CODE_START + L1_CODE_LENGTH)) {
                         show_stack(NULL, NULL);
                         printk(KERN_ERR "isram_memcpy: copy involving %p length "
                                         "(%zu) too long\n", addr, n);
diff --git a/arch/blackfin/mm/sram-alloc.c b/arch/blackfin/mm/sram-alloc.c
index 530d1393a232..0bc3c4ef0aad 100644
--- a/arch/blackfin/mm/sram-alloc.c
+++ b/arch/blackfin/mm/sram-alloc.c
@@ -83,6 +83,14 @@ static struct kmem_cache *sram_piece_cache;
 static void __init l1sram_init(void)
 {
         unsigned int cpu;
+        unsigned long reserve;
+
+#ifdef CONFIG_SMP
+        reserve = 0;
+#else
+        reserve = sizeof(struct l1_scratch_task_info);
+#endif
+
         for (cpu = 0; cpu < num_possible_cpus(); ++cpu) {
                 per_cpu(free_l1_ssram_head, cpu).next =
                         kmem_cache_alloc(sram_piece_cache, GFP_KERNEL);
@@ -91,8 +99,8 @@ static void __init l1sram_init(void)
                         return;
                 }
 
-                per_cpu(free_l1_ssram_head, cpu).next->paddr = (void *)get_l1_scratch_start_cpu(cpu);
-                per_cpu(free_l1_ssram_head, cpu).next->size = L1_SCRATCH_LENGTH;
+                per_cpu(free_l1_ssram_head, cpu).next->paddr = (void *)get_l1_scratch_start_cpu(cpu) + reserve;
+                per_cpu(free_l1_ssram_head, cpu).next->size = L1_SCRATCH_LENGTH - reserve;
                 per_cpu(free_l1_ssram_head, cpu).next->pid = 0;
                 per_cpu(free_l1_ssram_head, cpu).next->next = NULL;
 
@@ -223,7 +231,7 @@ static void __init l2_sram_init(void)
         spin_lock_init(&l2_sram_lock);
 }
 
-void __init bfin_sram_init(void)
+static int __init bfin_sram_init(void)
 {
         sram_piece_cache = kmem_cache_create("sram_piece_cache",
                                 sizeof(struct sram_piece),
@@ -233,7 +241,10 @@ void __init bfin_sram_init(void)
         l1_data_sram_init();
         l1_inst_sram_init();
         l2_sram_init();
+
+        return 0;
 }
+pure_initcall(bfin_sram_init);
 
 /* SRAM allocate function */
 static void *_sram_alloc(size_t size, struct sram_piece *pfree_head,
@@ -732,6 +743,10 @@ found:
 }
 EXPORT_SYMBOL(sram_free_with_lsl);
 
+/* Allocate memory and keep in L1 SRAM List (lsl) so that the resources are
+ * tracked.  These are designed for userspace so that when a process exits,
+ * we can safely reap their resources.
+ */
 void *sram_alloc_with_lsl(size_t size, unsigned long flags)
 {
         void *addr = NULL;
diff --git a/arch/cris/include/asm/atomic.h b/arch/cris/include/asm/atomic.h
index 5718dd8902a1..a6aca819e9f3 100644
--- a/arch/cris/include/asm/atomic.h
+++ b/arch/cris/include/asm/atomic.h
@@ -158,5 +158,5 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 #define smp_mb__before_atomic_inc()    barrier()
 #define smp_mb__after_atomic_inc()     barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif
diff --git a/arch/cris/include/asm/bitsperlong.h b/arch/cris/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/cris/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/cris/include/asm/mman.h b/arch/cris/include/asm/mman.h
index 1c35e1b66b46..b7f0afba3ce0 100644
--- a/arch/cris/include/asm/mman.h
+++ b/arch/cris/include/asm/mman.h
@@ -3,7 +3,7 @@
 
 /* verbatim copy of asm-i386/ version */
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/cris/include/asm/page.h b/arch/cris/include/asm/page.h
index f3fdbd09c34c..be45ee366be9 100644
--- a/arch/cris/include/asm/page.h
+++ b/arch/cris/include/asm/page.h
@@ -68,7 +68,7 @@ typedef struct page *pgtable_t;
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _CRIS_PAGE_H */
 
diff --git a/arch/cris/include/asm/signal.h b/arch/cris/include/asm/signal.h
index 349ae682b568..ea6af9aad76c 100644
--- a/arch/cris/include/asm/signal.h
+++ b/arch/cris/include/asm/signal.h
@@ -106,7 +106,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/cris/kernel/module.c b/arch/cris/kernel/module.c
index a187833febc8..abc13e368b90 100644
--- a/arch/cris/kernel/module.c
+++ b/arch/cris/kernel/module.c
@@ -48,8 +48,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         FREE_MODULE(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* We don't need anything special. */
diff --git a/arch/frv/include/asm/atomic.h b/arch/frv/include/asm/atomic.h
index 296c35cfb207..0409d981fd39 100644
--- a/arch/frv/include/asm/atomic.h
+++ b/arch/frv/include/asm/atomic.h
@@ -194,5 +194,5 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
 
 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* _ASM_ATOMIC_H */
diff --git a/arch/frv/include/asm/bitsperlong.h b/arch/frv/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/frv/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/frv/include/asm/mman.h b/arch/frv/include/asm/mman.h
index b4371e928683..58c1d11e2ac7 100644
--- a/arch/frv/include/asm/mman.h
+++ b/arch/frv/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_MMAN_H__
 #define __ASM_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/frv/include/asm/page.h b/arch/frv/include/asm/page.h
index bd9c220094c7..25c6a5002355 100644
--- a/arch/frv/include/asm/page.h
+++ b/arch/frv/include/asm/page.h
@@ -73,6 +73,6 @@ extern unsigned long max_pfn;
 #endif /* __ASSEMBLY__ */
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _ASM_PAGE_H */
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
index cc685e60b0f9..492b5c4dfed6 100644
--- a/arch/frv/include/asm/pci.h
+++ b/arch/frv/include/asm/pci.h
@@ -10,8 +10,8 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#ifndef ASM_PCI_H
-#define ASM_PCI_H
+#ifndef _ASM_FRV_PCI_H
+#define _ASM_FRV_PCI_H
 
 #include <linux/mm.h>
 #include <asm/scatterlist.h>
@@ -43,12 +43,6 @@ extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
 /* Return the index of the PCI controller for device PDEV. */
 #define pci_controller_num(PDEV)        (0)
 
-/* The PCI address space does equal the physical memory
- * address space.  The networking and block device layers use
- * this boolean for bounce buffer decisions.
- */
-#define PCI_DMA_BUS_IS_PHYS     (1)
-
 /* pci_unmap_{page,single} is a nop so... */
 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
@@ -111,5 +105,4 @@ static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
                                     sg_dma_address(&sg[i])+sg_dma_len(&sg[i]));
 }
 
-
-#endif
+#endif /* _ASM_FRV_PCI_H */
diff --git a/arch/frv/include/asm/signal.h b/arch/frv/include/asm/signal.h
index 2079197d483d..f071e813dcb3 100644
--- a/arch/frv/include/asm/signal.h
+++ b/arch/frv/include/asm/signal.h
@@ -3,107 +3,15 @@
 
 #include <linux/types.h>
 
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-#ifdef __KERNEL__
-/* Most things should be clean enough to redefine this at will, if care
-   is taken to make libc match.  */
-
-#define _NSIG           64
-#define _NSIG_BPW       32
-#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t;             /* at least 32 bits */
-
-typedef struct {
-        unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#else
+#ifndef __KERNEL__
 /* Here we must cater to libcs that poke about in kernel headers.  */
 
 #define NSIG            32
 typedef unsigned long sigset_t;
 
-#endif /* __KERNEL__ */
-
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-#define SIGBUS           7
-#define SIGFPE           8
-#define SIGKILL          9
-#define SIGUSR1         10
-#define SIGSEGV         11
-#define SIGUSR2         12
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGSTKFLT       16
-#define SIGCHLD         17
-#define SIGCONT         18
-#define SIGSTOP         19
-#define SIGTSTP         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGURG          23
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGIO           29
-#define SIGPOLL         SIGIO
-/*
-#define SIGLOST         29
-*/
-#define SIGPWR          30
-#define SIGSYS          31
-#define SIGUNUSED       31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN        32
-#define SIGRTMAX        (_NSIG-1)
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP    0x00000001
-#define SA_NOCLDWAIT    0x00000002 /* not supported yet */
-#define SA_SIGINFO      0x00000004
-#define SA_ONSTACK      0x08000000
-#define SA_RESTART      0x10000000
-#define SA_NODEFER      0x40000000
-#define SA_RESETHAND    0x80000000
-
-#define SA_NOMASK       SA_NODEFER
-#define SA_ONESHOT      SA_RESETHAND
-
-#define SA_RESTORER     0x04000000
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
+#endif /* !__KERNEL__ */
 
-#define MINSIGSTKSZ     2048
-#define SIGSTKSZ        8192
+#define SA_RESTORER     0x04000000 /* to get struct sigaction correct */
 
 #include <asm-generic/signal.h>
 
@@ -115,16 +23,6 @@ struct old_sigaction {
         __sigrestore_t sa_restorer;
 };
 
-struct sigaction {
-        __sighandler_t sa_handler;
-        unsigned long sa_flags;
-        __sigrestore_t sa_restorer;
-        sigset_t sa_mask;               /* mask last for extensibility */
-};
-
-struct k_sigaction {
-        struct sigaction sa;
-};
 #else
 /* Here we must cater to libcs that poke about in kernel headers.  */
 
@@ -143,19 +41,4 @@ struct sigaction {
 
 #endif /* __KERNEL__ */
 
-typedef struct sigaltstack {
-        void __user *ss_sp;
-        int ss_flags;
-        size_t ss_size;
-} stack_t;
-
-#define ptrace_signal_deliver(regs, cookie) do { } while (0)
-
-#ifdef __KERNEL__
-
-#include <asm/sigcontext.h>
-#undef __HAVE_ARCH_SIG_BITOPS
-
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_SIGNAL_H */
diff --git a/arch/frv/include/asm/termios.h b/arch/frv/include/asm/termios.h
index a62fb5872375..b4868aafe79c 100644
--- a/arch/frv/include/asm/termios.h
+++ b/arch/frv/include/asm/termios.h
@@ -52,7 +52,7 @@ struct termio {
 /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
 
 #ifdef __KERNEL__
-#include <asm-generic/termios.h>
+#include <asm-generic/termios-base.h>
 #endif
 
 #endif /* _ASM_TERMIOS_H */
diff --git a/arch/frv/kernel/module.c b/arch/frv/kernel/module.c
index 850d168f69fc..711763c8a6f3 100644
--- a/arch/frv/kernel/module.c
+++ b/arch/frv/kernel/module.c
@@ -35,8 +35,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* We don't need anything special. */
diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
index 833186c8dc3b..33c8c0fa9583 100644
--- a/arch/h8300/include/asm/atomic.h
+++ b/arch/h8300/include/asm/atomic.h
@@ -141,5 +141,5 @@ static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
 #define smp_mb__before_atomic_inc()    barrier()
 #define smp_mb__after_atomic_inc() barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* __ARCH_H8300_ATOMIC __ */
diff --git a/arch/h8300/include/asm/bitsperlong.h b/arch/h8300/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/h8300/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/h8300/include/asm/mman.h b/arch/h8300/include/asm/mman.h
index b9f104f22a36..cf35f0a6f12e 100644
--- a/arch/h8300/include/asm/mman.h
+++ b/arch/h8300/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __H8300_MMAN_H__
 #define __H8300_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/h8300/include/asm/page.h b/arch/h8300/include/asm/page.h
index 0b6acf0b03aa..837381a2df46 100644
--- a/arch/h8300/include/asm/page.h
+++ b/arch/h8300/include/asm/page.h
@@ -73,6 +73,6 @@ extern unsigned long memory_end;
 #endif /* __ASSEMBLY__ */
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _H8300_PAGE_H */
diff --git a/arch/h8300/include/asm/signal.h b/arch/h8300/include/asm/signal.h
index 7bc15048a64f..fd8b66e40dca 100644
--- a/arch/h8300/include/asm/signal.h
+++ b/arch/h8300/include/asm/signal.h
@@ -105,7 +105,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/h8300/kernel/module.c b/arch/h8300/kernel/module.c
index cfc9127d2ced..0865e291c20d 100644
--- a/arch/h8300/kernel/module.c
+++ b/arch/h8300/kernel/module.c
@@ -23,8 +23,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* We don't need anything special. */
diff --git a/arch/ia64/include/asm/atomic.h b/arch/ia64/include/asm/atomic.h
index d37292bd9875..88405cb0832a 100644
--- a/arch/ia64/include/asm/atomic.h
+++ b/arch/ia64/include/asm/atomic.h
@@ -216,5 +216,5 @@ atomic64_add_negative (__s64 i, atomic64_t *v)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* _ASM_IA64_ATOMIC_H */
diff --git a/arch/ia64/include/asm/bitsperlong.h b/arch/ia64/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..ec4db3c970b7
--- /dev/null
+++ b/arch/ia64/include/asm/bitsperlong.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_IA64_BITSPERLONG_H
+#define __ASM_IA64_BITSPERLONG_H
+
+#define __BITS_PER_LONG 64
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* __ASM_IA64_BITSPERLONG_H */
diff --git a/arch/ia64/include/asm/mman.h b/arch/ia64/include/asm/mman.h
index c73b87832a1e..48cf8b98a0b4 100644
--- a/arch/ia64/include/asm/mman.h
+++ b/arch/ia64/include/asm/mman.h
@@ -8,7 +8,7 @@
  *      David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x00100         /* stack-like segment */
 #define MAP_GROWSUP     0x00200         /* register stack-like segment */
diff --git a/arch/ia64/include/asm/signal.h b/arch/ia64/include/asm/signal.h
index 4f5ca5643cb1..b166248d49a4 100644
--- a/arch/ia64/include/asm/signal.h
+++ b/arch/ia64/include/asm/signal.h
@@ -114,7 +114,7 @@
 
 #endif /* __KERNEL__ */
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 # ifndef __ASSEMBLY__
 
diff --git a/arch/ia64/include/asm/suspend.h b/arch/ia64/include/asm/suspend.h
deleted file mode 100644
index b05bbb6074e2..000000000000
--- a/arch/ia64/include/asm/suspend.h
+++ /dev/null
@@ -1 +0,0 @@
-/* dummy (must be non-empty to prevent prejudicial removal...) */
diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h
index e36b3716e718..fbf1ed3b44ce 100644
--- a/arch/ia64/include/asm/types.h
+++ b/arch/ia64/include/asm/types.h
@@ -19,10 +19,6 @@
 # define __IA64_UL(x)           (x)
 # define __IA64_UL_CONST(x)     x
 
-# ifdef __KERNEL__
-#  define BITS_PER_LONG 64
-# endif
-
 #else
 # define __IA64_UL(x)           ((unsigned long)(x))
 # define __IA64_UL_CONST(x)     x##UL
@@ -34,10 +30,7 @@ typedef unsigned int umode_t;
  */
 # ifdef __KERNEL__
 
-#define BITS_PER_LONG 64
-
 /* DMA addresses are 64-bits wide, in general.  */
-
 typedef u64 dma_addr_t;
 
 # endif /* __KERNEL__ */
diff --git a/arch/ia64/mm/extable.c b/arch/ia64/mm/extable.c
index 71c50dd8f870..e95d5ad9285d 100644
--- a/arch/ia64/mm/extable.c
+++ b/arch/ia64/mm/extable.c
@@ -53,6 +53,32 @@ void sort_extable (struct exception_table_entry *start,
              cmp_ex, swap_ex);
 }
 
+static inline unsigned long ex_to_addr(const struct exception_table_entry *x)
+{
+        return (unsigned long)&x->insn + x->insn;
+}
+
+#ifdef CONFIG_MODULES
+/*
+ * Any entry referring to the module init will be at the beginning or
+ * the end.
+ */
+void trim_init_extable(struct module *m)
+{
+        /*trim the beginning*/
+        while (m->num_exentries &&
+               within_module_init(ex_to_addr(&m->extable[0]), m)) {
+                m->extable++;
+                m->num_exentries--;
+        }
+        /*trim the end*/
+        while (m->num_exentries &&
+               within_module_init(ex_to_addr(&m->extable[m->num_exentries-1]),
+                                  m))
+                m->num_exentries--;
+}
+#endif /* CONFIG_MODULES */
+
 const struct exception_table_entry *
 search_extable (const struct exception_table_entry *first,
                 const struct exception_table_entry *last,
diff --git a/arch/m32r/include/asm/atomic.h b/arch/m32r/include/asm/atomic.h
index 2eed30f84080..63f0cf0f50dd 100644
--- a/arch/m32r/include/asm/atomic.h
+++ b/arch/m32r/include/asm/atomic.h
@@ -314,5 +314,5 @@ static __inline__ void atomic_set_mask(unsigned long  mask, atomic_t *addr)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif  /* _ASM_M32R_ATOMIC_H */
diff --git a/arch/m32r/include/asm/bitsperlong.h b/arch/m32r/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/m32r/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/m32r/include/asm/mman.h b/arch/m32r/include/asm/mman.h
index 516a8973b130..04a5f40aa401 100644
--- a/arch/m32r/include/asm/mman.h
+++ b/arch/m32r/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __M32R_MMAN_H__
 #define __M32R_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/m32r/include/asm/page.h b/arch/m32r/include/asm/page.h
index c9333089fe11..11777f7a5628 100644
--- a/arch/m32r/include/asm/page.h
+++ b/arch/m32r/include/asm/page.h
@@ -82,6 +82,6 @@ typedef struct page *pgtable_t;
 #define devmem_is_allowed(x) 1
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _ASM_M32R_PAGE_H */
diff --git a/arch/m32r/include/asm/pci.h b/arch/m32r/include/asm/pci.h
index fe785d167db6..07d3834c6dec 100644
--- a/arch/m32r/include/asm/pci.h
+++ b/arch/m32r/include/asm/pci.h
@@ -3,6 +3,4 @@
 
 #include <asm-generic/pci.h>
 
-#define PCI_DMA_BUS_IS_PHYS     (1)
-
 #endif /* _ASM_M32R_PCI_H */
diff --git a/arch/m32r/include/asm/signal.h b/arch/m32r/include/asm/signal.h
index 1a607066bc64..9c1acb2b1a92 100644
--- a/arch/m32r/include/asm/signal.h
+++ b/arch/m32r/include/asm/signal.h
@@ -107,7 +107,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/m32r/kernel/module.c b/arch/m32r/kernel/module.c
index 8d4205794380..cb5f37d78d49 100644
--- a/arch/m32r/kernel/module.c
+++ b/arch/m32r/kernel/module.c
@@ -44,8 +44,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* We don't need anything special. */
diff --git a/arch/m68k/include/asm/atomic_mm.h b/arch/m68k/include/asm/atomic_mm.h
index eb0ab9d4ee77..88b7af20a996 100644
--- a/arch/m68k/include/asm/atomic_mm.h
+++ b/arch/m68k/include/asm/atomic_mm.h
@@ -192,5 +192,5 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* __ARCH_M68K_ATOMIC __ */
diff --git a/arch/m68k/include/asm/atomic_no.h b/arch/m68k/include/asm/atomic_no.h
index 6bb674855a3f..5674cb9449bd 100644
--- a/arch/m68k/include/asm/atomic_no.h
+++ b/arch/m68k/include/asm/atomic_no.h
@@ -151,5 +151,5 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
 #define atomic_dec_return(v) atomic_sub_return(1,(v))
 #define atomic_inc_return(v) atomic_add_return(1,(v))
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* __ARCH_M68KNOMMU_ATOMIC __ */
diff --git a/arch/m68k/include/asm/bitsperlong.h b/arch/m68k/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/m68k/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 49d016e6391a..83bbcfd6e8f2 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -59,5 +59,14 @@
 #define MCFPIT_IMR              MCFINTC_IMRL
 #define MCFPIT_IMR_IBIT         (1 << MCFINT_PIT1)
 
+/*
+ *  Reset Controll Unit.
+ */
+#define MCF_RCR                 0xFC0A0000
+#define MCF_RSR                 0xFC0A0001
+
+#define MCF_RCR_SWRESET         0x80            /* Software reset bit */
+#define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
+
 /****************************************************************************/
 #endif  /* m520xsim_h */
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index bf397313e93f..55183b5df1b8 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -41,5 +41,14 @@
 #define MCFSIM_DACR1            0x50            /* SDRAM base address 1 */
 #define MCFSIM_DMR1             0x54            /* SDRAM address mask 1 */
 
+/*
+ *  Reset Controll Unit (relative to IPSBAR).
+ */
+#define MCF_RCR                 0x110000
+#define MCF_RSR                 0x110001
+
+#define MCF_RCR_SWRESET         0x80            /* Software reset bit */
+#define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
+
 /****************************************************************************/
 #endif  /* m523xsim_h */
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 1f63ab3fb3e6..95f4f8ee8f7c 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -70,5 +70,14 @@
 #define UART2_ENABLE_MASK       0x3f00 
 #endif
 
+/*
+ *  Reset Controll Unit (relative to IPSBAR).
+ */
+#define MCF_RCR                 0x110000
+#define MCF_RSR                 0x110001
+
+#define MCF_RCR_SWRESET         0x80            /* Software reset bit */
+#define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
+
 /****************************************************************************/
 #endif  /* m527xsim_h */
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 28bf783a5d6d..d79c49f8134a 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -56,6 +56,14 @@
 #define MCF5282_INTC0_ICR17     (volatile u8 *) (MCF_IPSBAR + 0x0C51)
 
 
+/*
+ *  Reset Control Unit (relative to IPSBAR).
+ */
+#define MCF_RCR                 0x110000
+#define MCF_RSR                 0x110001
+
+#define MCF_RCR_SWRESET         0x80            /* Software reset bit */
+#define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
 
 /*********************************************************************
 *
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index ce603451b55e..eb7fd4448947 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -127,6 +127,18 @@
 
 /*********************************************************************
  *
+ * Reset Controller Module
+ *
+ *********************************************************************/
+
+#define MCF_RCR                 0xFC0A0000
+#define MCF_RSR                 0xFC0A0001
+
+#define MCF_RCR_SWRESET         0x80            /* Software reset bit */
+#define MCF_RCR_FRCSTOUT        0x40            /* Force external reset */
+
+/*********************************************************************
+ *
  * Inter-IC (I2C) Module
  *
  *********************************************************************/
diff --git a/arch/m68k/include/asm/mman.h b/arch/m68k/include/asm/mman.h
index 1626d37f4898..9f5c4c4b3c7b 100644
--- a/arch/m68k/include/asm/mman.h
+++ b/arch/m68k/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __M68K_MMAN_H__
 #define __M68K_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/m68k/include/asm/page_mm.h b/arch/m68k/include/asm/page_mm.h
index a34b8bad7847..d009f3ea39ab 100644
--- a/arch/m68k/include/asm/page_mm.h
+++ b/arch/m68k/include/asm/page_mm.h
@@ -223,6 +223,6 @@ static inline __attribute_const__ int __virt_to_node_shift(void)
 #define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _M68K_PAGE_H */
diff --git a/arch/m68k/include/asm/page_no.h b/arch/m68k/include/asm/page_no.h
index 3a1ede4544cb..9aa3f90f4855 100644
--- a/arch/m68k/include/asm/page_no.h
+++ b/arch/m68k/include/asm/page_no.h
@@ -72,6 +72,6 @@ extern unsigned long memory_end;
 
 #endif /* __ASSEMBLY__ */
 
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _M68KNOMMU_PAGE_H */
diff --git a/arch/m68k/include/asm/processor_no.h b/arch/m68k/include/asm/processor_no.h
index 91cba18acdd3..7a1e0ba35f5a 100644
--- a/arch/m68k/include/asm/processor_no.h
+++ b/arch/m68k/include/asm/processor_no.h
@@ -72,10 +72,10 @@ struct thread_struct {
         unsigned char  fpstate[FPSTATESIZE];  /* floating point state */
 };
 
-#define INIT_THREAD  { \
-        sizeof(init_stack) + (unsigned long) init_stack, 0, \
-        PS_S, __KERNEL_DS, \
-        {0, 0}, 0, {0,}, {0, 0, 0}, {0,}, \
+#define INIT_THREAD  {                                                  \
+        .ksp    = sizeof(init_stack) + (unsigned long) init_stack,      \
+        .sr     = PS_S,                                                 \
+        .fs     = __KERNEL_DS,                                          \
 }
 
 /*
diff --git a/arch/m68k/include/asm/signal.h b/arch/m68k/include/asm/signal.h
index 08788fdefde0..5bc09c787a11 100644
--- a/arch/m68k/include/asm/signal.h
+++ b/arch/m68k/include/asm/signal.h
@@ -103,7 +103,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/m68k/include/asm/suspend.h b/arch/m68k/include/asm/suspend.h
deleted file mode 100644
index 57b3ddb4d269..000000000000
--- a/arch/m68k/include/asm/suspend.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _M68K_SUSPEND_H
-#define _M68K_SUSPEND_H
-
-/* Dummy include. */
-
-#endif  /* _M68K_SUSPEND_H */
diff --git a/arch/m68k/include/asm/swab.h b/arch/m68k/include/asm/swab.h
index 9e3054ea59e9..5b754aace744 100644
--- a/arch/m68k/include/asm/swab.h
+++ b/arch/m68k/include/asm/swab.h
@@ -1,7 +1,7 @@
 #ifndef _M68K_SWAB_H
 #define _M68K_SWAB_H
 
-#include <asm/types.h>
+#include <linux/types.h>
 #include <linux/compiler.h>
 
 #define __SWAB_64_THRU_32__
diff --git a/arch/m68k/include/asm/system_no.h b/arch/m68k/include/asm/system_no.h
index 4496c0aa8379..3c0718d74398 100644
--- a/arch/m68k/include/asm/system_no.h
+++ b/arch/m68k/include/asm/system_no.h
@@ -203,113 +203,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
 #include <asm-generic/cmpxchg.h>
 #endif
 
-#if defined( CONFIG_M68328 ) || defined( CONFIG_M68EZ328 ) || \
-        defined (CONFIG_M68360) || defined( CONFIG_M68VZ328 )
-#define HARD_RESET_NOW() ({             \
-        local_irq_disable();            \
-        asm("                           \
-        moveal #0x10c00000, %a0;        \
-        moveb #0, 0xFFFFF300;           \
-        moveal 0(%a0), %sp;             \
-        moveal 4(%a0), %a0;             \
-        jmp (%a0);                      \
-        ");                             \
-})
-#endif
-
-#ifdef CONFIG_COLDFIRE
-#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
-/*
- * Need to account for broken early mask of 5272 silicon. So don't
- * jump through the original start address. Jump strait into the
- * known start of the FLASH code.
- */
-#define HARD_RESET_NOW() ({             \
-        asm("                           \
-        movew #0x2700, %sr;             \
-        jmp 0xf0000400;                 \
-        ");                             \
-})
-#elif defined(CONFIG_NETtel) || \
-      defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
-#define HARD_RESET_NOW() ({             \
-        asm("                           \
-        movew #0x2700, %sr;             \
-        moveal #0x10000044, %a0;        \
-        movel #0xffffffff, (%a0);       \
-        moveal #0x10000001, %a0;        \
-        moveb #0x00, (%a0);             \
-        moveal #0xf0000004, %a0;        \
-        moveal (%a0), %a0;              \
-        jmp (%a0);                      \
-        ");                             \
-})
-#elif defined(CONFIG_M5272)
-/*
- * Retrieve the boot address in flash using CSBR0 and CSOR0
- * find the reset vector at flash_address + 4 (e.g. 0x400)
- * remap it in the flash's current location (e.g. 0xf0000400)
- * and jump there.
- */ 
-#define HARD_RESET_NOW() ({             \
-        asm("                           \
-        movew #0x2700, %%sr;            \
-        move.l  %0+0x40,%%d0;           \
-        and.l   %0+0x44,%%d0;           \
-        andi.l  #0xfffff000,%%d0;       \
-        mov.l   %%d0,%%a0;              \
-        or.l    4(%%a0),%%d0;           \
-        mov.l   %%d0,%%a0;              \
-        jmp (%%a0);"                    \
-        : /* No output */               \
-        : "o" (*(char *)MCF_MBAR) );    \
-})
-#elif defined(CONFIG_M528x)
-/*
- * The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR),
- * that when set, resets the MCF528x.
- */
-#define HARD_RESET_NOW() \
-({                                              \
-        unsigned char volatile *reset;          \
-        asm("move.w     #0x2700, %sr");         \
-        reset = ((volatile unsigned char *)(MCF_IPSBAR + 0x110000));    \
-        while(1)                                \
-        *reset |= (0x01 << 7);\
-})
-#elif defined(CONFIG_M523x)
-#define HARD_RESET_NOW() ({             \
-        asm("                           \
-        movew #0x2700, %sr;             \
-        movel #0x01000000, %sp;         \
-        moveal #0x40110000, %a0;        \
-        moveb #0x80, (%a0);             \
-        ");                             \
-})
-#elif defined(CONFIG_M520x)
-        /*
-         * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register 
-         * RCR), that when set, resets the MCF5208.
-         */
-#define HARD_RESET_NOW()                \
-({                                      \
-        unsigned char volatile *reset;  \
-        asm("move.w     #0x2700, %sr"); \
-        reset = ((volatile unsigned char *)(MCF_IPSBAR + 0xA0000));     \
-        while(1)                        \
-                *reset |= 0x80;         \
-})
-#else
-#define HARD_RESET_NOW() ({             \
-        asm("                           \
-        movew #0x2700, %sr;             \
-        moveal #0x4, %a0;               \
-        moveal (%a0), %a0;              \
-        jmp (%a0);                      \
-        ");                             \
-})
-#endif
-#endif
 #define arch_align_stack(x) (x)
 
 
diff --git a/arch/m68k/kernel/module.c b/arch/m68k/kernel/module.c
index 774862bc6977..cd6bcb1c957e 100644
--- a/arch/m68k/kernel/module.c
+++ b/arch/m68k/kernel/module.c
@@ -31,8 +31,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* We don't need anything special. */
diff --git a/arch/m68knommu/kernel/entry.S b/arch/m68knommu/kernel/entry.S
index f4782d2dce8f..f56faa5c9cd9 100644
--- a/arch/m68knommu/kernel/entry.S
+++ b/arch/m68knommu/kernel/entry.S
@@ -26,7 +26,6 @@
 
 #include <linux/sys.h>
 #include <linux/linkage.h>
-#include <asm/thread_info.h>
 #include <asm/errno.h>
 #include <asm/setup.h>
 #include <asm/segment.h>
diff --git a/arch/m68knommu/kernel/module.c b/arch/m68knommu/kernel/module.c
index 3b1a2ff61ddc..d11ffae7956a 100644
--- a/arch/m68knommu/kernel/module.c
+++ b/arch/m68knommu/kernel/module.c
@@ -23,8 +23,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* We don't need anything special. */
diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c
index 5985f1989021..5c2bb3eeaaa2 100644
--- a/arch/m68knommu/kernel/setup.c
+++ b/arch/m68knommu/kernel/setup.c
@@ -166,15 +166,13 @@ void __init setup_arch(char **cmdline_p)
         printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
 #endif
 
-#ifdef DEBUG
-        printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
-                "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
-                (int) &_sdata, (int) &_edata,
-                (int) &_sbss, (int) &_ebss);
-        printk(KERN_DEBUG "MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
-                (int) &_ebss, (int) memory_start,
-                (int) memory_start, (int) memory_end);
-#endif
+        pr_debug("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
+                 "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext,
+                 (int) &_sdata, (int) &_edata,
+                 (int) &_sbss, (int) &_ebss);
+        pr_debug("MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
+                 (int) &_ebss, (int) memory_start,
+                 (int) memory_start, (int) memory_end);
 
         /* Keep a copy of command line */
         *cmdline_p = &command_line[0];
diff --git a/arch/m68knommu/mm/init.c b/arch/m68knommu/mm/init.c
index 7befc0c357e0..b1703c67a4f1 100644
--- a/arch/m68knommu/mm/init.c
+++ b/arch/m68knommu/mm/init.c
@@ -126,9 +126,7 @@ void __init mem_init(void)
         unsigned long start_mem = memory_start; /* DAVIDM - these must start at end of kernel */
         unsigned long end_mem   = memory_end; /* DAVIDM - this must not include kernel stack at top */
 
-#ifdef DEBUG
-        printk(KERN_DEBUG "Mem_init: start=%lx, end=%lx\n", start_mem, end_mem);
-#endif
+        pr_debug("Mem_init: start=%lx, end=%lx\n", start_mem, end_mem);
 
         end_mem &= PAGE_MASK;
         high_memory = (void *) end_mem;
diff --git a/arch/m68knommu/platform/5206/config.c b/arch/m68knommu/platform/5206/config.c
index 53a5920c2b71..f6f79874e9af 100644
--- a/arch/m68knommu/platform/5206/config.c
+++ b/arch/m68knommu/platform/5206/config.c
@@ -12,7 +12,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -21,10 +20,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m5206_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
@@ -109,10 +104,21 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
 
 /***************************************************************************/
 
+void m5206_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
         mcf_setimr(MCFSIM_IMR_MASKALL);
-        mach_reset = coldfire_reset;
+        mach_reset = m5206_cpu_reset;
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
index db902540bf2c..65887799db81 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -11,7 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -21,10 +20,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m5206e_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
@@ -109,6 +104,17 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
 
 /***************************************************************************/
 
+void m5206e_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
         mcf_setimr(MCFSIM_IMR_MASKALL);
@@ -119,7 +125,7 @@ void __init config_BSP(char *commandp, int size)
         commandp[size-1] = 0;
 #endif /* CONFIG_NETtel */
 
-        mach_reset = coldfire_reset;
+        mach_reset = m5206e_cpu_reset;
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
index 855fc6a79d72..1c43a8aec69b 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -14,7 +14,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -23,10 +22,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m520x_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
@@ -169,9 +164,17 @@ void mcf_autovector(unsigned int vec)
 
 /***************************************************************************/
 
+static void m520x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
-        mach_reset = coldfire_reset;
+        mach_reset = m520x_cpu_reset;
         m520x_uarts_init();
         m520x_fec_init();
 }
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c
index 74133f27b30c..961fefebca14 100644
--- a/arch/m68knommu/platform/523x/config.c
+++ b/arch/m68knommu/platform/523x/config.c
@@ -15,7 +15,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -24,10 +23,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m523x_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
@@ -145,13 +140,20 @@ void mcf_autovector(unsigned int vec)
 {
         /* Everything is auto-vectored on the 523x */
 }
+/***************************************************************************/
+
+static void m523x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
+}
 
 /***************************************************************************/
 
 void __init config_BSP(char *commandp, int size)
 {
         mcf_disableall();
-        mach_reset = coldfire_reset;
+        mach_reset = m523x_cpu_reset;
         m523x_uarts_init();
         m523x_fec_init();
 }
diff --git a/arch/m68knommu/platform/5249/config.c b/arch/m68knommu/platform/5249/config.c
index 9eab19d01eb1..93d998825925 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68knommu/platform/5249/config.c
@@ -11,7 +11,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -20,10 +19,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m5249_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
@@ -106,10 +101,21 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
 
 /***************************************************************************/
 
+void m5249_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
         mcf_setimr(MCFSIM_IMR_MASKALL);
-        mach_reset = coldfire_reset;
+        mach_reset = m5249_cpu_reset;
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c
index e049245f4092..5f95fcde05fd 100644
--- a/arch/m68knommu/platform/5272/config.c
+++ b/arch/m68knommu/platform/5272/config.c
@@ -12,7 +12,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -21,8 +20,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
 extern unsigned int mcf_timervector;
 extern unsigned int mcf_profilevector;
 extern unsigned int mcf_timerlevel;
@@ -170,6 +167,19 @@ void mcf_settimericr(int timer, int level)
 
 /***************************************************************************/
 
+static void m5272_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to reset, and enabled */
+        __raw_writew(0, MCF_MBAR + MCFSIM_WIRR);
+        __raw_writew(1, MCF_MBAR + MCFSIM_WRRR);
+        __raw_writew(0, MCF_MBAR + MCFSIM_WCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
 #if defined (CONFIG_MOD5272)
@@ -194,7 +204,7 @@ void __init config_BSP(char *commandp, int size)
 
         mcf_timervector = 69;
         mcf_profilevector = 70;
-        mach_reset = coldfire_reset;
+        mach_reset = m5272_cpu_reset;
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c
index 428b15922ef5..f746439cfd3e 100644
--- a/arch/m68knommu/platform/527x/config.c
+++ b/arch/m68knommu/platform/527x/config.c
@@ -15,7 +15,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -24,10 +23,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m527x_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
@@ -227,10 +222,18 @@ void mcf_autovector(unsigned int vec)
 
 /***************************************************************************/
 
+static void m527x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
         mcf_disableall();
-        mach_reset = coldfire_reset;
+        mach_reset = m527x_cpu_reset;
         m527x_uarts_init();
         m527x_fec_init();
 }
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index bee526f4d1af..a1d1a61c4fe6 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -31,10 +31,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
-/***************************************************************************/
-
 static struct mcf_platform_uart m528x_uart_platform[] = {
         {
                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
@@ -171,6 +167,14 @@ void mcf_autovector(unsigned int vec)
 
 /***************************************************************************/
 
+static void m528x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
+}
+
+/***************************************************************************/
+
 #ifdef CONFIG_WILDFIRE
 void wildfire_halt(void)
 {
@@ -214,6 +218,7 @@ void __init config_BSP(char *commandp, int size)
 
 static int __init init_BSP(void)
 {
+        mach_reset = m528x_cpu_reset;
         m528x_uarts_init();
         m528x_fec_init();
         platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
diff --git a/arch/m68knommu/platform/5307/config.c b/arch/m68knommu/platform/5307/config.c
index 44803bf70a6e..39da9e9ff674 100644
--- a/arch/m68knommu/platform/5307/config.c
+++ b/arch/m68knommu/platform/5307/config.c
@@ -12,7 +12,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -22,8 +21,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
 extern unsigned int mcf_timervector;
 extern unsigned int mcf_profilevector;
 extern unsigned int mcf_timerlevel;
@@ -119,6 +116,17 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
 
 /***************************************************************************/
 
+void m5307_cpu_reset(void)
+{
+        local_irq_disable();
+        /* Set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
         mcf_setimr(MCFSIM_IMR_MASKALL);
@@ -134,7 +142,7 @@ void __init config_BSP(char *commandp, int size)
         mcf_timerlevel = 6;
 #endif
 
-        mach_reset = coldfire_reset;
+        mach_reset = m5307_cpu_reset;
 
 #ifdef CONFIG_BDM_DISABLE
         /*
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c
index 591f2f801134..cdb761971f7a 100644
--- a/arch/m68knommu/platform/532x/config.c
+++ b/arch/m68knommu/platform/532x/config.c
@@ -31,8 +31,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
 extern unsigned int mcf_timervector;
 extern unsigned int mcf_profilevector;
 extern unsigned int mcf_timerlevel;
@@ -164,6 +162,14 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
 
 /***************************************************************************/
 
+static void m532x_cpu_reset(void)
+{
+        local_irq_disable();
+        __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
         mcf_setimr(MCFSIM_IMR_MASKALL);
@@ -181,7 +187,7 @@ void __init config_BSP(char *commandp, int size)
 
         mcf_timervector = 64+32;
         mcf_profilevector = 64+33;
-        mach_reset = coldfire_reset;
+        mach_reset = m532x_cpu_reset;
 
 #ifdef CONFIG_BDM_DISABLE
         /*
diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c
index 0ee8c1a200c8..b41d942bf8d0 100644
--- a/arch/m68knommu/platform/5407/config.c
+++ b/arch/m68knommu/platform/5407/config.c
@@ -12,7 +12,6 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
 #include <linux/io.h>
 #include <asm/machdep.h>
 #include <asm/coldfire.h>
@@ -21,8 +20,6 @@
 
 /***************************************************************************/
 
-void coldfire_reset(void);
-
 extern unsigned int mcf_timervector;
 extern unsigned int mcf_profilevector;
 extern unsigned int mcf_timerlevel;
@@ -110,6 +107,17 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
 
 /***************************************************************************/
 
+void m5407_cpu_reset(void)
+{
+        local_irq_disable();
+        /* set watchdog to soft reset, and enabled */
+        __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
+        for (;;)
+                /* wait for watchdog to timeout */;
+}
+
+/***************************************************************************/
+
 void __init config_BSP(char *commandp, int size)
 {
         mcf_setimr(MCFSIM_IMR_MASKALL);
@@ -121,7 +129,7 @@ void __init config_BSP(char *commandp, int size)
         mcf_timerlevel = 6;
 #endif
 
-        mach_reset = coldfire_reset;
+        mach_reset = m5407_cpu_reset;
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/coldfire/vectors.c b/arch/m68knommu/platform/coldfire/vectors.c
index 6cf894620234..bdca0297fa9a 100644
--- a/arch/m68knommu/platform/coldfire/vectors.c
+++ b/arch/m68knommu/platform/coldfire/vectors.c
@@ -96,10 +96,3 @@ void ack_vector(unsigned int irq)
 }
 
 /***************************************************************************/
-
-void coldfire_reset(void)
-{
-        HARD_RESET_NOW();
-}
-
-/***************************************************************************/
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 8cc312b5d4dc..b50b845fdd50 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -6,6 +6,7 @@ mainmenu "Linux/Microblaze Kernel Configuration"
 config MICROBLAZE
         def_bool y
         select HAVE_LMB
+        select ARCH_WANT_OPTIONAL_GPIOLIB
 
 config SWAP
         def_bool n
@@ -49,13 +50,14 @@ config GENERIC_CLOCKEVENTS
 config GENERIC_HARDIRQS_NO__DO_IRQ
         def_bool y
 
+config GENERIC_GPIO
+        def_bool y
+
 config PCI
-        depends on !MMU
         def_bool n
 
 config NO_DMA
-        depends on !MMU
-        def_bool n
+        def_bool y
 
 source "init/Kconfig"
 
@@ -72,7 +74,8 @@ source "kernel/Kconfig.preempt"
 source "kernel/Kconfig.hz"
 
 config MMU
-        def_bool n
+        bool "MMU support"
+        default n
 
 config NO_MMU
         bool
@@ -105,9 +108,6 @@ config CMDLINE_FORCE
 config OF
         def_bool y
 
-config OF_DEVICE
-        def_bool y
-
 config PROC_DEVICETREE
         bool "Support for device tree in /proc"
         depends on PROC_FS
@@ -118,6 +118,113 @@ config PROC_DEVICETREE
 
 endmenu
 
+menu "Advanced setup"
+
+config ADVANCED_OPTIONS
+        bool "Prompt for advanced kernel configuration options"
+        depends on MMU
+        help
+          This option will enable prompting for a variety of advanced kernel
+          configuration options.  These options can cause the kernel to not
+          work if they are set incorrectly, but can be used to optimize certain
+          aspects of kernel memory management.
+
+          Unless you know what you are doing, say N here.
+
+comment "Default settings for advanced configuration options are used"
+        depends on !ADVANCED_OPTIONS
+
+config HIGHMEM_START_BOOL
+        bool "Set high memory pool address"
+        depends on ADVANCED_OPTIONS && HIGHMEM
+        help
+          This option allows you to set the base address of the kernel virtual
+          area used to map high memory pages.  This can be useful in
+          optimizing the layout of kernel virtual memory.
+
+          Say N here unless you know what you are doing.
+
+config HIGHMEM_START
+        hex "Virtual start address of high memory pool" if HIGHMEM_START_BOOL
+        depends on MMU
+        default "0xfe000000"
+
+config LOWMEM_SIZE_BOOL
+        bool "Set maximum low memory"
+        depends on ADVANCED_OPTIONS
+        help
+          This option allows you to set the maximum amount of memory which
+          will be used as "low memory", that is, memory which the kernel can
+          access directly, without having to set up a kernel virtual mapping.
+          This can be useful in optimizing the layout of kernel virtual
+          memory.
+
+          Say N here unless you know what you are doing.
+
+config LOWMEM_SIZE
+        hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
+        depends on MMU
+        default "0x30000000"
+
+config KERNEL_START_BOOL
+        bool "Set custom kernel base address"
+        depends on ADVANCED_OPTIONS
+        help
+          This option allows you to set the kernel virtual address at which
+          the kernel will map low memory (the kernel image will be linked at
+          this address).  This can be useful in optimizing the virtual memory
+          layout of the system.
+
+          Say N here unless you know what you are doing.
+
+config KERNEL_START
+        hex "Virtual address of kernel base" if KERNEL_START_BOOL
+        default "0xc0000000" if MMU
+        default KERNEL_BASE_ADDR if !MMU
+
+config TASK_SIZE_BOOL
+        bool "Set custom user task size"
+        depends on ADVANCED_OPTIONS
+        help
+          This option allows you to set the amount of virtual address space
+          allocated to user tasks.  This can be useful in optimizing the
+          virtual memory layout of the system.
+
+          Say N here unless you know what you are doing.
+
+config TASK_SIZE
+        hex "Size of user task space" if TASK_SIZE_BOOL
+        depends on MMU
+        default "0x80000000"
+
+config CONSISTENT_START_BOOL
+        bool "Set custom consistent memory pool address"
+        depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
+        help
+          This option allows you to set the base virtual address
+          of the the consistent memory pool.  This pool of virtual
+          memory is used to make consistent memory allocations.
+
+config CONSISTENT_START
+        hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
+        depends on MMU
+        default "0xff100000" if NOT_COHERENT_CACHE
+
+config CONSISTENT_SIZE_BOOL
+        bool "Set custom consistent memory pool size"
+        depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
+        help
+          This option allows you to set the size of the the
+          consistent memory pool.  This pool of virtual memory
+          is used to make consistent memory allocations.
+
+config CONSISTENT_SIZE
+        hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
+        depends on MMU
+        default "0x00200000" if NOT_COHERENT_CACHE
+
+endmenu
+
 source "mm/Kconfig"
 
 menu "Exectuable file formats"
diff --git a/arch/microblaze/Makefile b/arch/microblaze/Makefile
index aaadfa701da3..d0bcf80a1136 100644
--- a/arch/microblaze/Makefile
+++ b/arch/microblaze/Makefile
@@ -1,4 +1,8 @@
+ifeq ($(CONFIG_MMU),y)
+UTS_SYSNAME = -DUTS_SYSNAME=\"Linux\"
+else
 UTS_SYSNAME = -DUTS_SYSNAME=\"uClinux\"
+endif
 
 # What CPU vesion are we building for, and crack it open
 # as major.minor.rev
@@ -36,6 +40,8 @@ CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER))
 # r31 holds current when in kernel mode
 CFLAGS_KERNEL += -ffixed-r31 $(CPUFLAGS-1) $(CPUFLAGS-2)
 
+LDFLAGS         :=
+LDFLAGS_vmlinux :=
 LDFLAGS_BLOB := --format binary --oformat elf32-microblaze
 
 LIBGCC := $(shell $(CC) $(CFLAGS_KERNEL) -print-libgcc-file-name)
diff --git a/arch/microblaze/boot/Makefile b/arch/microblaze/boot/Makefile
index 844edf406d34..c2bb043a029d 100644
--- a/arch/microblaze/boot/Makefile
+++ b/arch/microblaze/boot/Makefile
@@ -7,6 +7,8 @@ targets := linux.bin linux.bin.gz
 OBJCOPYFLAGS_linux.bin  := -O binary
 
 $(obj)/linux.bin: vmlinux FORCE
+        [ -n $(CONFIG_INITRAMFS_SOURCE) ] && [ ! -e $(CONFIG_INITRAMFS_SOURCE) ] && \
+        touch $(CONFIG_INITRAMFS_SOURCE) || echo "No CPIO image"
         $(call if_changed,objcopy)
         @echo 'Kernel: $@ is ready' ' (#'`cat .version`')'
 
diff --git a/arch/microblaze/configs/mmu_defconfig b/arch/microblaze/configs/mmu_defconfig
new file mode 100644
index 000000000000..bd0b85ec38f5
--- /dev/null
+++ b/arch/microblaze/configs/mmu_defconfig
@@ -0,0 +1,798 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-rc6
+# Fri May 22 10:02:33 2009
+#
+CONFIG_MICROBLAZE=y
+# CONFIG_SWAP is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_GENERIC_TIME_VSYSCALL is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_INITRAMFS_COMPRESSION_NONE=y
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+# CONFIG_INITRAMFS_COMPRESSION_BZIP2 is not set
+# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_HOTPLUG is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+# CONFIG_SHMEM is not set
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+# CONFIG_SLOW_WORK is not set
+# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
+CONFIG_SLABINFO=y
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# Platform options
+#
+CONFIG_PLATFORM_GENERIC=y
+CONFIG_OPT_LIB_FUNCTION=y
+CONFIG_OPT_LIB_ASM=y
+CONFIG_ALLOW_EDIT_AUTO=y
+
+#
+# Automatic platform settings from Kconfig.auto
+#
+
+#
+# Definitions for MICROBLAZE0
+#
+CONFIG_KERNEL_BASE_ADDR=0x90000000
+CONFIG_XILINX_MICROBLAZE0_FAMILY="virtex5"
+CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
+CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
+CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
+CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
+CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2
+CONFIG_XILINX_MICROBLAZE0_USE_FPU=2
+CONFIG_XILINX_MICROBLAZE0_HW_VER="7.10.d"
+
+#
+# Processor type and features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_MMU=y
+
+#
+# Boot options
+#
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttyUL0,115200"
+CONFIG_CMDLINE_FORCE=y
+CONFIG_OF=y
+CONFIG_PROC_DEVICETREE=y
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+
+#
+# Exectuable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_XILINX_SYSACE is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_ETHOC is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+CONFIG_NETDEV_10000=y
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_UARTLITE=y
+CONFIG_SERIAL_UARTLITE_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_XILINX_HWICAP is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+# CONFIG_GPIOLIB is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+CONFIG_CIFS=y
+CONFIG_CIFS_STATS=y
+CONFIG_CIFS_STATS2=y
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+CONFIG_DEBUG_SLAB=y
+# CONFIG_DEBUG_SLAB_LEAK is not set
+CONFIG_DEBUG_SPINLOCK=y
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+# CONFIG_SAMPLES is not set
+CONFIG_EARLY_PRINTK=y
+CONFIG_HEART_BEAT=y
+CONFIG_DEBUG_BOOTMEM=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+CONFIG_NLATTR=y
diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild
index 31820dfef56b..db5294c30caf 100644
--- a/arch/microblaze/include/asm/Kbuild
+++ b/arch/microblaze/include/asm/Kbuild
@@ -1,26 +1,3 @@
 include include/asm-generic/Kbuild.asm
 
-header-y += auxvec.h
-header-y += errno.h
-header-y += fcntl.h
-header-y += ioctl.h
-header-y += ioctls.h
-header-y += ipcbuf.h
-header-y += linkage.h
-header-y += msgbuf.h
-header-y += poll.h
-header-y += resource.h
-header-y += sembuf.h
-header-y += shmbuf.h
-header-y += sigcontext.h
-header-y += siginfo.h
-header-y += socket.h
-header-y += sockios.h
-header-y += statfs.h
-header-y += stat.h
-header-y += termbits.h
-header-y += ucontext.h
-
-unifdef-y += cputable.h
-unifdef-y += elf.h
-unifdef-y += termios.h
+header-y  += elf.h
diff --git a/arch/microblaze/include/asm/atomic.h b/arch/microblaze/include/asm/atomic.h
index a448d94ab721..0de612ad7cb2 100644
--- a/arch/microblaze/include/asm/atomic.h
+++ b/arch/microblaze/include/asm/atomic.h
@@ -118,6 +118,6 @@ static inline int atomic_dec_if_positive(atomic_t *v)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 
 #endif /* _ASM_MICROBLAZE_ATOMIC_H */
diff --git a/arch/microblaze/include/asm/bitsperlong.h b/arch/microblaze/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/microblaze/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h
index 3300b785049b..f989d6aad648 100644
--- a/arch/microblaze/include/asm/cacheflush.h
+++ b/arch/microblaze/include/asm/cacheflush.h
@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2007 PetaLogix
+ * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2007-2009 PetaLogix
  * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
  * based on v850 version which was
  * Copyright (C) 2001,02,03 NEC Electronics Corporation
@@ -43,6 +44,23 @@
 #define flush_icache_range(start, len)  __invalidate_icache_range(start, len)
 #define flush_icache_page(vma, pg)              do { } while (0)
 
+#ifndef CONFIG_MMU
+# define flush_icache_user_range(start, len)    do { } while (0)
+#else
+# define flush_icache_user_range(vma, pg, adr, len) __invalidate_icache_all()
+
+# define flush_page_to_ram(page)                do { } while (0)
+
+# define flush_icache()                 __invalidate_icache_all()
+# define flush_cache_sigtramp(vaddr) \
+                        __invalidate_icache_range(vaddr, vaddr + 8)
+
+# define flush_dcache_mmap_lock(mapping)        do { } while (0)
+# define flush_dcache_mmap_unlock(mapping)      do { } while (0)
+
+# define flush_cache_dup_mm(mm)                 do { } while (0)
+#endif
+
 #define flush_cache_vmap(start, end)            do { } while (0)
 #define flush_cache_vunmap(start, end)          do { } while (0)
 
diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h
index 92b30762ce59..97ea46b5cf80 100644
--- a/arch/microblaze/include/asm/checksum.h
+++ b/arch/microblaze/include/asm/checksum.h
@@ -51,7 +51,8 @@ extern __wsum csum_partial(const void *buff, int len, __wsum sum);
  * here even more important to align src and dst on a 32-bit (or even
  * better 64-bit) boundary
  */
-extern __wsum csum_partial_copy(const char *src, char *dst, int len, int sum);
+extern __wsum csum_partial_copy(const void *src, void *dst, int len,
+                                                                __wsum sum);
 
 /*
  * the same as csum_partial_copy, but copies from user space.
@@ -59,8 +60,8 @@ extern __wsum csum_partial_copy(const char *src, char *dst, int len, int sum);
  * here even more important to align src and dst on a 32-bit (or even
  * better 64-bit) boundary
  */
-extern __wsum csum_partial_copy_from_user(const char *src, char *dst,
-                                        int len, int sum, int *csum_err);
+extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst,
+                                        int len, __wsum sum, int *csum_err);
 
 #define csum_partial_copy_nocheck(src, dst, len, sum)   \
         csum_partial_copy((src), (dst), (len), (sum))
@@ -75,11 +76,12 @@ extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
 /*
  *      Fold a partial checksum
  */
-static inline __sum16 csum_fold(unsigned int sum)
+static inline __sum16 csum_fold(__wsum csum)
 {
+        u32 sum = (__force u32)csum;
         sum = (sum & 0xffff) + (sum >> 16);
         sum = (sum & 0xffff) + (sum >> 16);
-        return ~sum;
+        return (__force __sum16)~sum;
 }
 
 static inline __sum16
@@ -93,6 +95,6 @@ csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
  * this routine is used for miscellaneous IP-like checksums, mainly
  * in icmp.c
  */
-extern __sum16 ip_compute_csum(const unsigned char *buff, int len);
+extern __sum16 ip_compute_csum(const void *buff, int len);
 
 #endif /* _ASM_MICROBLAZE_CHECKSUM_H */
diff --git a/arch/microblaze/include/asm/current.h b/arch/microblaze/include/asm/current.h
index 8375ea991e26..29303ed825cc 100644
--- a/arch/microblaze/include/asm/current.h
+++ b/arch/microblaze/include/asm/current.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -9,6 +11,12 @@
 #ifndef _ASM_MICROBLAZE_CURRENT_H
 #define _ASM_MICROBLAZE_CURRENT_H
 
+/*
+ * Register used to hold the current task pointer while in the kernel.
+ * Any `call clobbered' register without a special meaning should be OK,
+ * but check asm/microblaze/kernel/entry.S to be sure.
+ */
+#define CURRENT_TASK    r31
 # ifndef __ASSEMBLY__
 /*
  * Dedicate r31 to keeping the current task pointer
diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h
index 17336252a9b8..d00e40099165 100644
--- a/arch/microblaze/include/asm/dma-mapping.h
+++ b/arch/microblaze/include/asm/dma-mapping.h
@@ -1,129 +1 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASM_MICROBLAZE_DMA_MAPPING_H
-#define _ASM_MICROBLAZE_DMA_MAPPING_H
-
-#include <asm/cacheflush.h>
-#include <linux/io.h>
-#include <linux/bug.h>
-
-struct scatterlist;
-
-#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
-#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
-
-/* FIXME */
-static inline int
-dma_supported(struct device *dev, u64 mask)
-{
-        return 1;
-}
-
-static inline dma_addr_t
-dma_map_page(struct device *dev, struct page *page,
-        unsigned long offset, size_t size,
-        enum dma_data_direction direction)
-{
-        BUG();
-        return 0;
-}
-
-static inline void
-dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
-        enum dma_data_direction direction)
-{
-        BUG();
-}
-
-static inline int
-dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
-        enum dma_data_direction direction)
-{
-        BUG();
-        return 0;
-}
-
-static inline void
-dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
-        enum dma_data_direction direction)
-{
-        BUG();
-}
-
-static inline void
-dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
-                        enum dma_data_direction direction)
-{
-        BUG();
-}
-
-static inline void
-dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
-                size_t size, enum dma_data_direction direction)
-{
-        BUG();
-}
-
-static inline void
-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
-                enum dma_data_direction direction)
-{
-        BUG();
-}
-
-static inline void
-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
-                enum dma_data_direction direction)
-{
-        BUG();
-}
-
-static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
-{
-        return 0;
-}
-
-static inline void *dma_alloc_coherent(struct device *dev, size_t size,
-                                dma_addr_t *dma_handle, int flag)
-{
-        return NULL; /* consistent_alloc(flag, size, dma_handle); */
-}
-
-static inline void dma_free_coherent(struct device *dev, size_t size,
-                        void *vaddr, dma_addr_t dma_handle)
-{
-        BUG();
-}
-
-static inline dma_addr_t
-dma_map_single(struct device *dev, void *ptr, size_t size,
-        enum dma_data_direction direction)
-{
-        BUG_ON(direction == DMA_NONE);
-
-        return virt_to_bus(ptr);
-}
-
-static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
-                                    size_t size,
-                                    enum dma_data_direction direction)
-{
-        switch (direction) {
-        case DMA_FROM_DEVICE:
-                flush_dcache_range((unsigned)dma_addr,
-                        (unsigned)dma_addr + size);
-                        /* Fall through */
-        case DMA_TO_DEVICE:
-                break;
-        default:
-                BUG();
-        }
-}
-
-#endif /* _ASM_MICROBLAZE_DMA_MAPPING_H */
+#include <asm-generic/dma-mapping-broken.h>
diff --git a/arch/microblaze/include/asm/dma.h b/arch/microblaze/include/asm/dma.h
index 0967fa04fc5e..08c073badf19 100644
--- a/arch/microblaze/include/asm/dma.h
+++ b/arch/microblaze/include/asm/dma.h
@@ -9,8 +9,13 @@
 #ifndef _ASM_MICROBLAZE_DMA_H
 #define _ASM_MICROBLAZE_DMA_H
 
+#ifndef CONFIG_MMU
 /* we don't have dma address limit. define it as zero to be
  * unlimited. */
 #define MAX_DMA_ADDRESS         (0)
+#else
+/* Virtual address corresponding to last available physical memory address.  */
+#define MAX_DMA_ADDRESS (CONFIG_KERNEL_START + memory_size - 1)
+#endif
 
 #endif /* _ASM_MICROBLAZE_DMA_H */
diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h
index 81337f241347..f92fc0dda006 100644
--- a/arch/microblaze/include/asm/elf.h
+++ b/arch/microblaze/include/asm/elf.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -27,4 +29,95 @@
  */
 #define ELF_CLASS       ELFCLASS32
 
+#ifndef __uClinux__
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/ptrace.h>
+#include <asm/byteorder.h>
+
+#ifndef ELF_GREG_T
+#define ELF_GREG_T
+typedef unsigned long elf_greg_t;
+#endif
+
+#ifndef ELF_NGREG
+#define ELF_NGREG (sizeof(struct pt_regs) / sizeof(elf_greg_t))
+#endif
+
+#ifndef ELF_GREGSET_T
+#define ELF_GREGSET_T
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+#endif
+
+#ifndef ELF_FPREGSET_T
+#define ELF_FPREGSET_T
+
+/* TBD */
+#define ELF_NFPREG      33      /* includes fsr */
+typedef unsigned long elf_fpreg_t;
+typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
+
+/* typedef struct user_fpu_struct elf_fpregset_t; */
+#endif
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+ * use of this is to invoke "./ld.so someprog" to test out a new version of
+ * the loader.  We need to make sure that it is out of the way of the program
+ * that it will "exec", and that there is sufficient room for the brk.
+ */
+
+#define ELF_ET_DYN_BASE         (0x08000000)
+
+#ifdef __LITTLE_ENDIAN__
+#define ELF_DATA        ELFDATA2LSB
+#else
+#define ELF_DATA        ELFDATA2MSB
+#endif
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE       4096
+
+
+#define ELF_CORE_COPY_REGS(_dest, _regs)                        \
+        memcpy((char *) &_dest, (char *) _regs,         \
+        sizeof(struct pt_regs));
+
+/* This yields a mask that user programs can use to figure out what
+ * instruction set this CPU supports.  This could be done in user space,
+ * but it's not easy, and we've already done it here.
+ */
+#define ELF_HWCAP       (0)
+
+/* This yields a string that ld.so will use to load implementation
+ * specific libraries for optimization.  This is more specific in
+ * intent than poking at uname or /proc/cpuinfo.
+
+ * For the moment, we have only optimizations for the Intel generations,
+ * but that could change...
+ */
+#define ELF_PLATFORM  (NULL)
+
+/* Added _f parameter. Is this definition correct: TBD */
+#define ELF_PLAT_INIT(_r, _f)                           \
+do {                                                    \
+        _r->r1 =  _r->r1 =  _r->r2 =  _r->r3 =          \
+        _r->r4 =  _r->r5 =  _r->r6 =  _r->r7 =          \
+        _r->r8 =  _r->r9 =  _r->r10 = _r->r11 =         \
+        _r->r12 = _r->r13 = _r->r14 = _r->r15 =         \
+        _r->r16 = _r->r17 = _r->r18 = _r->r19 =         \
+        _r->r20 = _r->r21 = _r->r22 = _r->r23 =         \
+        _r->r24 = _r->r25 = _r->r26 = _r->r27 =         \
+        _r->r28 = _r->r29 = _r->r30 = _r->r31 =         \
+        0;                                              \
+} while (0)
+
+#ifdef __KERNEL__
+#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT)
+#endif
+
+#endif /* __uClinux__ */
+
 #endif /* _ASM_MICROBLAZE_ELF_H */
diff --git a/arch/microblaze/include/asm/entry.h b/arch/microblaze/include/asm/entry.h
index e4c3aef884df..61abbd232640 100644
--- a/arch/microblaze/include/asm/entry.h
+++ b/arch/microblaze/include/asm/entry.h
@@ -1,8 +1,8 @@
 /*
  * Definitions used by low-level trap handlers
  *
- * Copyright (C) 2008 Michal Simek
- * Copyright (C) 2007 - 2008 PetaLogix
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2007-2009 PetaLogix
  * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
  *
  * This file is subject to the terms and conditions of the GNU General
@@ -31,7 +31,40 @@ DECLARE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */
 DECLARE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */
 # endif /* __ASSEMBLY__ */
 
+#ifndef CONFIG_MMU
+
 /* noMMU hasn't any space for args */
 # define STATE_SAVE_ARG_SPACE   (0)
 
+#else /* CONFIG_MMU */
+
+/* If true, system calls save and restore all registers (except result
+ * registers, of course).  If false, then `call clobbered' registers
+ * will not be preserved, on the theory that system calls are basically
+ * function calls anyway, and the caller should be able to deal with it.
+ * This is a security risk, of course, as `internal' values may leak out
+ * after a system call, but that certainly doesn't matter very much for
+ * a processor with no MMU protection!  For a protected-mode kernel, it
+ * would be faster to just zero those registers before returning.
+ *
+ * I can not rely on the glibc implementation. If you turn it off make
+ * sure that r11/r12 is saved in user-space. --KAA
+ *
+ * These are special variables using by the kernel trap/interrupt code
+ * to save registers in, at a time when there are no spare registers we
+ * can use to do so, and we can't depend on the value of the stack
+ * pointer.  This means that they must be within a signed 16-bit
+ * displacement of 0x00000000.
+ */
+
+/* A `state save frame' is a struct pt_regs preceded by some extra space
+ * suitable for a function call stack frame. */
+
+/* Amount of room on the stack reserved for arguments and to satisfy the
+ * C calling conventions, in addition to the space used by the struct
+ * pt_regs that actually holds saved values. */
+#define STATE_SAVE_ARG_SPACE    (6*4) /* Up to six arguments */
+
+#endif /* CONFIG_MMU */
+
 #endif /* _ASM_MICROBLAZE_ENTRY_H */
diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h
index 24ca540e77c0..90731df9e574 100644
--- a/arch/microblaze/include/asm/exceptions.h
+++ b/arch/microblaze/include/asm/exceptions.h
@@ -1,8 +1,8 @@
 /*
  * Preliminary support for HW exception handing for Microblaze
  *
- * Copyright (C) 2008 Michal Simek
- * Copyright (C) 2008 PetaLogix
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
  *
  * This file is subject to the terms and conditions of the GNU General
@@ -64,21 +64,13 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
 void die(const char *str, struct pt_regs *fp, long err);
 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
 
-#if defined(CONFIG_XMON)
-extern void xmon(struct pt_regs *regs);
-extern int xmon_bpt(struct pt_regs *regs);
-extern int xmon_sstep(struct pt_regs *regs);
-extern int xmon_iabr_match(struct pt_regs *regs);
-extern int xmon_dabr_match(struct pt_regs *regs);
-extern void (*xmon_fault_handler)(struct pt_regs *regs);
+#ifdef CONFIG_MMU
+void __bug(const char *file, int line, void *data);
+int bad_trap(int trap_num, struct pt_regs *regs);
+int debug_trap(struct pt_regs *regs);
+#endif /* CONFIG_MMU */
 
-void (*debugger)(struct pt_regs *regs) = xmon;
-int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
-int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
-int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match;
-int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match;
-void (*debugger_fault_handler)(struct pt_regs *regs);
-#elif defined(CONFIG_KGDB)
+#if defined(CONFIG_KGDB)
 void (*debugger)(struct pt_regs *regs);
 int (*debugger_bpt)(struct pt_regs *regs);
 int (*debugger_sstep)(struct pt_regs *regs);
diff --git a/arch/microblaze/include/asm/flat.h b/arch/microblaze/include/asm/flat.h
index acf0da543ef1..6847c1512c7b 100644
--- a/arch/microblaze/include/asm/flat.h
+++ b/arch/microblaze/include/asm/flat.h
@@ -13,7 +13,6 @@
 
 #include <asm/unaligned.h>
 
-#define flat_stack_align(sp) /* nothing needed */
 #define flat_argvp_envp_on_stack()      0
 #define flat_old_ram_flag(flags)        (flags)
 #define flat_reloc_valid(reloc, size)   ((reloc) <= (size))
diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h
index ea04632399d8..2345ac354d9b 100644
--- a/arch/microblaze/include/asm/gpio.h
+++ b/arch/microblaze/include/asm/gpio.h
@@ -11,8 +11,8 @@
  * (at your option) any later version.
  */
 
-#ifndef __ASM_POWERPC_GPIO_H
-#define __ASM_POWERPC_GPIO_H
+#ifndef _ASM_MICROBLAZE_GPIO_H
+#define _ASM_MICROBLAZE_GPIO_H
 
 #include <linux/errno.h>
 #include <asm-generic/gpio.h>
@@ -53,4 +53,4 @@ static inline int irq_to_gpio(unsigned int irq)
 
 #endif /* CONFIG_GPIOLIB */
 
-#endif /* __ASM_POWERPC_GPIO_H */
+#endif /* _ASM_MICROBLAZE_GPIO_H */
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 8b5853ee6b5c..5c173424d074 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2007-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -12,6 +14,9 @@
 #include <asm/byteorder.h>
 #include <asm/page.h>
 #include <linux/types.h>
+#include <asm/byteorder.h>
+#include <linux/mm.h>          /* Get struct page {...} */
+
 
 #define IO_SPACE_LIMIT (0xFFFFFFFF)
 
@@ -112,6 +117,30 @@ static inline void writel(unsigned int v, volatile void __iomem *addr)
 #define memcpy_fromio(a, b, c)  memcpy((a), (void *)(b), (c))
 #define memcpy_toio(a, b, c)    memcpy((void *)(a), (b), (c))
 
+#ifdef CONFIG_MMU
+
+#define mm_ptov(addr)           ((void *)__phys_to_virt(addr))
+#define mm_vtop(addr)           ((unsigned long)__virt_to_phys(addr))
+#define phys_to_virt(addr)      ((void *)__phys_to_virt(addr))
+#define virt_to_phys(addr)      ((unsigned long)__virt_to_phys(addr))
+#define virt_to_bus(addr)       ((unsigned long)__virt_to_phys(addr))
+
+#define __page_address(page) \
+                (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
+#define page_to_phys(page)      virt_to_phys((void *)__page_address(page))
+#define page_to_bus(page)       (page_to_phys(page))
+#define bus_to_virt(addr)       (phys_to_virt(addr))
+
+extern void iounmap(void *addr);
+/*extern void *__ioremap(phys_addr_t address, unsigned long size,
+                unsigned long flags);*/
+extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
+#define ioremap_writethrough(addr, size) ioremap((addr), (size))
+#define ioremap_nocache(addr, size)      ioremap((addr), (size))
+#define ioremap_fullcache(addr, size)    ioremap((addr), (size))
+
+#else /* CONFIG_MMU */
+
 /**
  *      virt_to_phys - map virtual addresses to physical
  *      @address: address to remap
@@ -160,6 +189,8 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
 #define iounmap(addr)           ((void)0)
 #define ioremap_nocache(physaddr, size) ioremap(physaddr, size)
 
+#endif /* CONFIG_MMU */
+
 /*
  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  * access
diff --git a/arch/microblaze/include/asm/mmu.h b/arch/microblaze/include/asm/mmu.h
index 0e0431d61635..66cad6a99d77 100644
--- a/arch/microblaze/include/asm/mmu.h
+++ b/arch/microblaze/include/asm/mmu.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -9,11 +11,109 @@
 #ifndef _ASM_MICROBLAZE_MMU_H
 #define _ASM_MICROBLAZE_MMU_H
 
-#ifndef __ASSEMBLY__
+# ifndef CONFIG_MMU
+#  ifndef __ASSEMBLY__
 typedef struct {
         struct vm_list_struct   *vmlist;
         unsigned long           end_brk;
 } mm_context_t;
-#endif /* __ASSEMBLY__ */
+#  endif /* __ASSEMBLY__ */
+# else /* CONFIG_MMU */
+#  ifdef __KERNEL__
+#   ifndef __ASSEMBLY__
 
+/* Default "unsigned long" context */
+typedef unsigned long mm_context_t;
+
+/* Hardware Page Table Entry */
+typedef struct _PTE {
+        unsigned long    v:1;   /* Entry is valid */
+        unsigned long vsid:24;  /* Virtual segment identifier */
+        unsigned long    h:1;   /* Hash algorithm indicator */
+        unsigned long  api:6;   /* Abbreviated page index */
+        unsigned long  rpn:20;  /* Real (physical) page number */
+        unsigned long     :3;   /* Unused */
+        unsigned long    r:1;   /* Referenced */
+        unsigned long    c:1;   /* Changed */
+        unsigned long    w:1;   /* Write-thru cache mode */
+        unsigned long    i:1;   /* Cache inhibited */
+        unsigned long    m:1;   /* Memory coherence */
+        unsigned long    g:1;   /* Guarded */
+        unsigned long     :1;   /* Unused */
+        unsigned long   pp:2;   /* Page protection */
+} PTE;
+
+/* Values for PP (assumes Ks=0, Kp=1) */
+#  define PP_RWXX       0 /* Supervisor read/write, User none */
+#  define PP_RWRX       1 /* Supervisor read/write, User read */
+#  define PP_RWRW       2 /* Supervisor read/write, User read/write */
+#  define PP_RXRX       3 /* Supervisor read,       User read */
+
+/* Segment Register */
+typedef struct _SEGREG {
+        unsigned long    t:1;   /* Normal or I/O  type */
+        unsigned long   ks:1;   /* Supervisor 'key' (normally 0) */
+        unsigned long   kp:1;   /* User 'key' (normally 1) */
+        unsigned long    n:1;   /* No-execute */
+        unsigned long     :4;   /* Unused */
+        unsigned long vsid:24;  /* Virtual Segment Identifier */
+} SEGREG;
+
+extern void _tlbie(unsigned long va);   /* invalidate a TLB entry */
+extern void _tlbia(void);               /* invalidate all TLB entries */
+#   endif /* __ASSEMBLY__ */
+
+/*
+ * The MicroBlaze processor has a TLB architecture identical to PPC-40x. The
+ * instruction and data sides share a unified, 64-entry, semi-associative
+ * TLB which is maintained totally under software control. In addition, the
+ * instruction side has a hardware-managed, 2,4, or 8-entry, fully-associative
+ * TLB which serves as a first level to the shared TLB. These two TLBs are
+ * known as the UTLB and ITLB, respectively.
+ */
+
+#  define MICROBLAZE_TLB_SIZE 64
+
+/*
+ * TLB entries are defined by a "high" tag portion and a "low" data
+ * portion. The data portion is 32-bits.
+ *
+ * TLB entries are managed entirely under software control by reading,
+ * writing, and searching using the MTS and MFS instructions.
+ */
+
+#  define TLB_LO                1
+#  define TLB_HI                0
+#  define TLB_DATA              TLB_LO
+#  define TLB_TAG               TLB_HI
+
+/* Tag portion */
+#  define TLB_EPN_MASK          0xFFFFFC00 /* Effective Page Number */
+#  define TLB_PAGESZ_MASK       0x00000380
+#  define TLB_PAGESZ(x)         (((x) & 0x7) << 7)
+#  define PAGESZ_1K             0
+#  define PAGESZ_4K             1
+#  define PAGESZ_16K            2
+#  define PAGESZ_64K            3
+#  define PAGESZ_256K           4
+#  define PAGESZ_1M             5
+#  define PAGESZ_4M             6
+#  define PAGESZ_16M            7
+#  define TLB_VALID             0x00000040 /* Entry is valid */
+
+/* Data portion */
+#  define TLB_RPN_MASK          0xFFFFFC00 /* Real Page Number */
+#  define TLB_PERM_MASK         0x00000300
+#  define TLB_EX                0x00000200 /* Instruction execution allowed */
+#  define TLB_WR                0x00000100 /* Writes permitted */
+#  define TLB_ZSEL_MASK         0x000000F0
+#  define TLB_ZSEL(x)           (((x) & 0xF) << 4)
+#  define TLB_ATTR_MASK         0x0000000F
+#  define TLB_W                 0x00000008 /* Caching is write-through */
+#  define TLB_I                 0x00000004 /* Caching is inhibited */
+#  define TLB_M                 0x00000002 /* Memory is coherent */
+#  define TLB_G                 0x00000001 /* Memory is guarded from prefetch */
+
+#  endif /* __KERNEL__ */
+# endif /* CONFIG_MMU */
 #endif /* _ASM_MICROBLAZE_MMU_H */
diff --git a/arch/microblaze/include/asm/mmu_context.h b/arch/microblaze/include/asm/mmu_context.h
index 150ca01b74ba..385fed16bbfb 100644
--- a/arch/microblaze/include/asm/mmu_context.h
+++ b/arch/microblaze/include/asm/mmu_context.h
@@ -1,21 +1,5 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H
-#define _ASM_MICROBLAZE_MMU_CONTEXT_H
-
-# define init_new_context(tsk, mm)              ({ 0; })
-
-# define enter_lazy_tlb(mm, tsk)                do {} while (0)
-# define change_mm_context(old, ctx, _pml4)     do {} while (0)
-# define destroy_context(mm)                    do {} while (0)
-# define deactivate_mm(tsk, mm)                 do {} while (0)
-# define switch_mm(prev, next, tsk)             do {} while (0)
-# define activate_mm(prev, next)                do {} while (0)
-
-#endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */
+#ifdef CONFIG_MMU
+# include "mmu_context_mm.h"
+#else
+# include "mmu_context_no.h"
+#endif
diff --git a/arch/microblaze/include/asm/mmu_context_mm.h b/arch/microblaze/include/asm/mmu_context_mm.h
new file mode 100644
index 000000000000..3e5c254e8d1c
--- /dev/null
+++ b/arch/microblaze/include/asm/mmu_context_mm.h
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H
+#define _ASM_MICROBLAZE_MMU_CONTEXT_H
+
+#include <asm/atomic.h>
+#include <asm/bitops.h>
+#include <asm/mmu.h>
+#include <asm-generic/mm_hooks.h>
+
+# ifdef __KERNEL__
+/*
+ * This function defines the mapping from contexts to VSIDs (virtual
+ * segment IDs).  We use a skew on both the context and the high 4 bits
+ * of the 32-bit virtual address (the "effective segment ID") in order
+ * to spread out the entries in the MMU hash table.
+ */
+# define CTX_TO_VSID(ctx, va)   (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
+                                 & 0xffffff)
+
+/*
+   MicroBlaze has 256 contexts, so we can just rotate through these
+   as a way of "switching" contexts.  If the TID of the TLB is zero,
+   the PID/TID comparison is disabled, so we can use a TID of zero
+   to represent all kernel pages as shared among all contexts.
+ */
+
+static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
+{
+}
+
+# define NO_CONTEXT     256
+# define LAST_CONTEXT   255
+# define FIRST_CONTEXT  1
+
+/*
+ * Set the current MMU context.
+ * This is done byloading up the segment registers for the user part of the
+ * address space.
+ *
+ * Since the PGD is immediately available, it is much faster to simply
+ * pass this along as a second parameter, which is required for 8xx and
+ * can be used for debugging on all processors (if you happen to have
+ * an Abatron).
+ */
+extern void set_context(mm_context_t context, pgd_t *pgd);
+
+/*
+ * Bitmap of contexts in use.
+ * The size of this bitmap is LAST_CONTEXT + 1 bits.
+ */
+extern unsigned long context_map[];
+
+/*
+ * This caches the next context number that we expect to be free.
+ * Its use is an optimization only, we can't rely on this context
+ * number to be free, but it usually will be.
+ */
+extern mm_context_t next_mmu_context;
+
+/*
+ * Since we don't have sufficient contexts to give one to every task
+ * that could be in the system, we need to be able to steal contexts.
+ * These variables support that.
+ */
+extern atomic_t nr_free_contexts;
+extern struct mm_struct *context_mm[LAST_CONTEXT+1];
+extern void steal_context(void);
+
+/*
+ * Get a new mmu context for the address space described by `mm'.
+ */
+static inline void get_mmu_context(struct mm_struct *mm)
+{
+        mm_context_t ctx;
+
+        if (mm->context != NO_CONTEXT)
+                return;
+        while (atomic_dec_if_positive(&nr_free_contexts) < 0)
+                steal_context();
+        ctx = next_mmu_context;
+        while (test_and_set_bit(ctx, context_map)) {
+                ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
+                if (ctx > LAST_CONTEXT)
+                        ctx = 0;
+        }
+        next_mmu_context = (ctx + 1) & LAST_CONTEXT;
+        mm->context = ctx;
+        context_mm[ctx] = mm;
+}
+
+/*
+ * Set up the context for a new address space.
+ */
+# define init_new_context(tsk, mm)      (((mm)->context = NO_CONTEXT), 0)
+
+/*
+ * We're finished using the context for an address space.
+ */
+static inline void destroy_context(struct mm_struct *mm)
+{
+        if (mm->context != NO_CONTEXT) {
+                clear_bit(mm->context, context_map);
+                mm->context = NO_CONTEXT;
+                atomic_inc(&nr_free_contexts);
+        }
+}
+
+static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
+                             struct task_struct *tsk)
+{
+        tsk->thread.pgdir = next->pgd;
+        get_mmu_context(next);
+        set_context(next->context, next->pgd);
+}
+
+/*
+ * After we have set current->mm to a new value, this activates
+ * the context for the new mm so we see the new mappings.
+ */
+static inline void activate_mm(struct mm_struct *active_mm,
+                        struct mm_struct *mm)
+{
+        current->thread.pgdir = mm->pgd;
+        get_mmu_context(mm);
+        set_context(mm->context, mm->pgd);
+}
+
+extern void mmu_context_init(void);
+
+# endif /* __KERNEL__ */
+#endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */
diff --git a/arch/microblaze/include/asm/mmu_context_no.h b/arch/microblaze/include/asm/mmu_context_no.h
new file mode 100644
index 000000000000..ba5567190154
--- /dev/null
+++ b/arch/microblaze/include/asm/mmu_context_no.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
+ * Copyright (C) 2006 Atmark Techno, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H
+#define _ASM_MICROBLAZE_MMU_CONTEXT_H
+
+# define init_new_context(tsk, mm)              ({ 0; })
+
+# define enter_lazy_tlb(mm, tsk)                do {} while (0)
+# define change_mm_context(old, ctx, _pml4)     do {} while (0)
+# define destroy_context(mm)                    do {} while (0)
+# define deactivate_mm(tsk, mm)                 do {} while (0)
+# define switch_mm(prev, next, tsk)             do {} while (0)
+# define activate_mm(prev, next)                do {} while (0)
+
+#endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */
diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h
index 7238dcfcc517..72aceae88680 100644
--- a/arch/microblaze/include/asm/page.h
+++ b/arch/microblaze/include/asm/page.h
@@ -1,6 +1,8 @@
 /*
- * Copyright (C) 2008 Michal Simek
- * Copyright (C) 2008 PetaLogix
+ * VM ops
+ *
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  * Changes for MMU support:
  *    Copyright (C) 2007 Xilinx, Inc.  All rights reserved.
@@ -15,14 +17,15 @@
 
 #include <linux/pfn.h>
 #include <asm/setup.h>
+#include <linux/const.h>
+
+#ifdef __KERNEL__
 
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT      (12)
-#define PAGE_SIZE       (1UL << PAGE_SHIFT)
+#define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
 #define PAGE_MASK       (~(PAGE_SIZE-1))
 
-#ifdef __KERNEL__
-
 #ifndef __ASSEMBLY__
 
 #define PAGE_UP(addr)   (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1)))
@@ -35,6 +38,7 @@
 /* align addr on a size boundary - adjust address up if needed */
 #define _ALIGN(addr, size)      _ALIGN_UP(addr, size)
 
+#ifndef CONFIG_MMU
 /*
  * PAGE_OFFSET -- the first address of the first page of memory. When not
  * using MMU this corresponds to the first free page in physical memory (aligned
@@ -43,15 +47,44 @@
 extern unsigned int __page_offset;
 #define PAGE_OFFSET __page_offset
 
-#define copy_page(to, from)                     memcpy((to), (from), PAGE_SIZE)
-#define get_user_page(vaddr)                    __get_free_page(GFP_KERNEL)
-#define free_user_page(page, addr)              free_page(addr)
+#else /* CONFIG_MMU */
 
-#define clear_page(pgaddr)                      memset((pgaddr), 0, PAGE_SIZE)
+/*
+ * PAGE_OFFSET -- the first address of the first page of memory. With MMU
+ * it is set to the kernel start address (aligned on a page boundary).
+ *
+ * CONFIG_KERNEL_START is defined in arch/microblaze/config.in and used
+ * in arch/microblaze/Makefile.
+ */
+#define PAGE_OFFSET     CONFIG_KERNEL_START
 
+/*
+ * MAP_NR -- given an address, calculate the index of the page struct which
+ * points to the address's page.
+ */
+#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT)
 
-#define clear_user_page(pgaddr, vaddr, page)    memset((pgaddr), 0, PAGE_SIZE)
-#define copy_user_page(vto, vfrom, vaddr, topg) \
+/*
+ * The basic type of a PTE - 32 bit physical addressing.
+ */
+typedef unsigned long pte_basic_t;
+#define PTE_SHIFT       (PAGE_SHIFT - 2)        /* 1024 ptes per page */
+#define PTE_FMT         "%.8lx"
+
+#endif /* CONFIG_MMU */
+
+#  ifndef CONFIG_MMU
+#  define copy_page(to, from)                   memcpy((to), (from), PAGE_SIZE)
+#  define get_user_page(vaddr)                  __get_free_page(GFP_KERNEL)
+#  define free_user_page(page, addr)            free_page(addr)
+#  else /* CONFIG_MMU */
+extern void copy_page(void *to, void *from);
+#  endif /* CONFIG_MMU */
+
+# define clear_page(pgaddr)                     memset((pgaddr), 0, PAGE_SIZE)
+
+# define clear_user_page(pgaddr, vaddr, page)   memset((pgaddr), 0, PAGE_SIZE)
+# define copy_user_page(vto, vfrom, vaddr, topg) \
                         memcpy((vto), (vfrom), PAGE_SIZE)
 
 /*
@@ -60,21 +93,32 @@ extern unsigned int __page_offset;
 typedef struct page *pgtable_t;
 typedef struct { unsigned long  pte; }          pte_t;
 typedef struct { unsigned long  pgprot; }       pgprot_t;
+/* FIXME this can depend on linux kernel version */
+#   ifdef CONFIG_MMU
+typedef struct { unsigned long pmd; } pmd_t;
+typedef struct { unsigned long pgd; } pgd_t;
+#   else /* CONFIG_MMU */
 typedef struct { unsigned long  ste[64]; }      pmd_t;
 typedef struct { pmd_t          pue[1]; }       pud_t;
 typedef struct { pud_t          pge[1]; }       pgd_t;
+#   endif /* CONFIG_MMU */
 
+# define pte_val(x)     ((x).pte)
+# define pgprot_val(x)  ((x).pgprot)
 
-#define pte_val(x)      ((x).pte)
-#define pgprot_val(x)   ((x).pgprot)
-#define pmd_val(x)      ((x).ste[0])
-#define pud_val(x)      ((x).pue[0])
-#define pgd_val(x)      ((x).pge[0])
+#   ifdef CONFIG_MMU
+#   define pmd_val(x)      ((x).pmd)
+#   define pgd_val(x)      ((x).pgd)
+#   else  /* CONFIG_MMU */
+#   define pmd_val(x)   ((x).ste[0])
+#   define pud_val(x)   ((x).pue[0])
+#   define pgd_val(x)   ((x).pge[0])
+#   endif  /* CONFIG_MMU */
 
-#define __pte(x)        ((pte_t) { (x) })
-#define __pmd(x)        ((pmd_t) { (x) })
-#define __pgd(x)        ((pgd_t) { (x) })
-#define __pgprot(x)     ((pgprot_t) { (x) })
+# define __pte(x)       ((pte_t) { (x) })
+# define __pmd(x)       ((pmd_t) { (x) })
+# define __pgd(x)       ((pgd_t) { (x) })
+# define __pgprot(x)    ((pgprot_t) { (x) })
 
 /**
  * Conversions for virtual address, physical address, pfn, and struct
@@ -94,47 +138,83 @@ extern unsigned long max_low_pfn;
 extern unsigned long min_low_pfn;
 extern unsigned long max_pfn;
 
-#define __pa(vaddr)             ((unsigned long) (vaddr))
-#define __va(paddr)             ((void *) (paddr))
+extern unsigned long memory_start;
+extern unsigned long memory_end;
+extern unsigned long memory_size;
 
-#define phys_to_pfn(phys)       (PFN_DOWN(phys))
-#define pfn_to_phys(pfn)        (PFN_PHYS(pfn))
+extern int page_is_ram(unsigned long pfn);
 
-#define virt_to_pfn(vaddr)      (phys_to_pfn((__pa(vaddr))))
-#define pfn_to_virt(pfn)        __va(pfn_to_phys((pfn)))
+# define phys_to_pfn(phys)      (PFN_DOWN(phys))
+# define pfn_to_phys(pfn)       (PFN_PHYS(pfn))
 
-#define virt_to_page(vaddr)     (pfn_to_page(virt_to_pfn(vaddr)))
-#define page_to_virt(page)      (pfn_to_virt(page_to_pfn(page)))
+# define virt_to_pfn(vaddr)     (phys_to_pfn((__pa(vaddr))))
+# define pfn_to_virt(pfn)       __va(pfn_to_phys((pfn)))
 
-#define page_to_phys(page)      (pfn_to_phys(page_to_pfn(page)))
-#define page_to_bus(page)       (page_to_phys(page))
-#define phys_to_page(paddr)     (pfn_to_page(phys_to_pfn(paddr)))
+#  ifdef CONFIG_MMU
+#  define virt_to_page(kaddr)   (mem_map +  MAP_NR(kaddr))
+#  else /* CONFIG_MMU */
+#  define virt_to_page(vaddr)   (pfn_to_page(virt_to_pfn(vaddr)))
+#  define page_to_virt(page)    (pfn_to_virt(page_to_pfn(page)))
+#  define page_to_phys(page)    (pfn_to_phys(page_to_pfn(page)))
+#  define page_to_bus(page)     (page_to_phys(page))
+#  define phys_to_page(paddr)   (pfn_to_page(phys_to_pfn(paddr)))
+#  endif /* CONFIG_MMU */
 
-extern unsigned int memory_start;
-extern unsigned int memory_end;
-extern unsigned int memory_size;
+#  ifndef CONFIG_MMU
+#  define pfn_valid(pfn)        ((pfn) >= min_low_pfn && (pfn) <= max_mapnr)
+#  define ARCH_PFN_OFFSET       (PAGE_OFFSET >> PAGE_SHIFT)
+#  else /* CONFIG_MMU */
+#  define ARCH_PFN_OFFSET       (memory_start >> PAGE_SHIFT)
+#  define pfn_valid(pfn)        ((pfn) < (max_mapnr + ARCH_PFN_OFFSET))
+#  define VALID_PAGE(page)      ((page - mem_map) < max_mapnr)
+#  endif /* CONFIG_MMU */
 
-#define pfn_valid(pfn)          ((pfn) >= min_low_pfn && (pfn) < max_mapnr)
+# endif /* __ASSEMBLY__ */
 
-#define ARCH_PFN_OFFSET         (PAGE_OFFSET >> PAGE_SHIFT)
+#define virt_addr_valid(vaddr)  (pfn_valid(virt_to_pfn(vaddr)))
 
-#else
-#define tophys(rd, rs)  (addik rd, rs, 0)
-#define tovirt(rd, rs)  (addik rd, rs, 0)
-#endif /* __ASSEMBLY__ */
 
-#define virt_addr_valid(vaddr)  (pfn_valid(virt_to_pfn(vaddr)))
+#  ifndef CONFIG_MMU
+#  define __pa(vaddr)   ((unsigned long) (vaddr))
+#  define __va(paddr)   ((void *) (paddr))
+#  else /* CONFIG_MMU */
+#  define __pa(x)       __virt_to_phys((unsigned long)(x))
+#  define __va(x)       ((void *)__phys_to_virt((unsigned long)(x)))
+#  endif /* CONFIG_MMU */
+
 
-/* Convert between virtual and physical address for MMU.  */
-/* Handle MicroBlaze processor with virtual memory.  */
+/* Convert between virtual and physical address for MMU. */
+/* Handle MicroBlaze processor with virtual memory. */
+#ifndef CONFIG_MMU
 #define __virt_to_phys(addr)    addr
 #define __phys_to_virt(addr)    addr
+#define tophys(rd, rs)  addik rd, rs, 0
+#define tovirt(rd, rs)  addik rd, rs, 0
+#else
+#define __virt_to_phys(addr) \
+        ((addr) + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START)
+#define __phys_to_virt(addr) \
+        ((addr) + CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR)
+#define tophys(rd, rs) \
+        addik rd, rs, (CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START)
+#define tovirt(rd, rs) \
+        addik rd, rs, (CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR)
+#endif /* CONFIG_MMU */
 
 #define TOPHYS(addr)  __virt_to_phys(addr)
 
+#ifdef CONFIG_MMU
+#ifdef CONFIG_CONTIGUOUS_PAGE_ALLOC
+#define WANT_PAGE_VIRTUAL 1 /* page alloc 2 relies on this */
+#endif
+
+#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
+                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+#endif /* CONFIG_MMU */
+
 #endif /* __KERNEL__ */
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _ASM_MICROBLAZE_PAGE_H */
diff --git a/arch/microblaze/include/asm/pgalloc.h b/arch/microblaze/include/asm/pgalloc.h
index 2a4b35484010..59a757e46ba5 100644
--- a/arch/microblaze/include/asm/pgalloc.h
+++ b/arch/microblaze/include/asm/pgalloc.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -9,6 +11,195 @@
 #ifndef _ASM_MICROBLAZE_PGALLOC_H
 #define _ASM_MICROBLAZE_PGALLOC_H
 
+#ifdef CONFIG_MMU
+
+#include <linux/kernel.h>       /* For min/max macros */
+#include <linux/highmem.h>
+#include <asm/setup.h>
+#include <asm/io.h>
+#include <asm/page.h>
+#include <asm/cache.h>
+
+#define PGDIR_ORDER     0
+
+/*
+ * This is handled very differently on MicroBlaze since out page tables
+ * are all 0's and I want to be able to use these zero'd pages elsewhere
+ * as well - it gives us quite a speedup.
+ * -- Cort
+ */
+extern struct pgtable_cache_struct {
+        unsigned long *pgd_cache;
+        unsigned long *pte_cache;
+        unsigned long pgtable_cache_sz;
+} quicklists;
+
+#define pgd_quicklist           (quicklists.pgd_cache)
+#define pmd_quicklist           ((unsigned long *)0)
+#define pte_quicklist           (quicklists.pte_cache)
+#define pgtable_cache_size      (quicklists.pgtable_cache_sz)
+
+extern unsigned long *zero_cache; /* head linked list of pre-zero'd pages */
+extern atomic_t zero_sz; /* # currently pre-zero'd pages */
+extern atomic_t zeropage_hits; /* # zero'd pages request that we've done */
+extern atomic_t zeropage_calls; /* # zero'd pages request that've been made */
+extern atomic_t zerototal; /* # pages zero'd over time */
+
+#define zero_quicklist          (zero_cache)
+#define zero_cache_sz           (zero_sz)
+#define zero_cache_calls        (zeropage_calls)
+#define zero_cache_hits         (zeropage_hits)
+#define zero_cache_total        (zerototal)
+
+/*
+ * return a pre-zero'd page from the list,
+ * return NULL if none available -- Cort
+ */
+extern unsigned long get_zero_page_fast(void);
+
+extern void __bad_pte(pmd_t *pmd);
+
+extern inline pgd_t *get_pgd_slow(void)
+{
+        pgd_t *ret;
+
+        ret = (pgd_t *)__get_free_pages(GFP_KERNEL, PGDIR_ORDER);
+        if (ret != NULL)
+                clear_page(ret);
+        return ret;
+}
+
+extern inline pgd_t *get_pgd_fast(void)
+{
+        unsigned long *ret;
+
+        ret = pgd_quicklist;
+        if (ret != NULL) {
+                pgd_quicklist = (unsigned long *)(*ret);
+                ret[0] = 0;
+                pgtable_cache_size--;
+        } else
+                ret = (unsigned long *)get_pgd_slow();
+        return (pgd_t *)ret;
+}
+
+extern inline void free_pgd_fast(pgd_t *pgd)
+{
+        *(unsigned long **)pgd = pgd_quicklist;
+        pgd_quicklist = (unsigned long *) pgd;
+        pgtable_cache_size++;
+}
+
+extern inline void free_pgd_slow(pgd_t *pgd)
+{
+        free_page((unsigned long)pgd);
+}
+
+#define pgd_free(mm, pgd)        free_pgd_fast(pgd)
+#define pgd_alloc(mm)           get_pgd_fast()
+
+#define pmd_pgtable(pmd)        pmd_page(pmd)
+
+/*
+ * We don't have any real pmd's, and this code never triggers because
+ * the pgd will always be present..
+ */
+#define pmd_alloc_one_fast(mm, address) ({ BUG(); ((pmd_t *)1); })
+#define pmd_alloc_one(mm, address)      ({ BUG(); ((pmd_t *)2); })
+/* FIXME two definition - look below */
+#define pmd_free(mm, x)                 do { } while (0)
+#define pgd_populate(mm, pmd, pte)      BUG()
+
+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+                unsigned long address)
+{
+        pte_t *pte;
+        extern int mem_init_done;
+        extern void *early_get_page(void);
+        if (mem_init_done) {
+                pte = (pte_t *)__get_free_page(GFP_KERNEL |
+                                        __GFP_REPEAT | __GFP_ZERO);
+        } else {
+                pte = (pte_t *)early_get_page();
+                if (pte)
+                        clear_page(pte);
+        }
+        return pte;
+}
+
+static inline struct page *pte_alloc_one(struct mm_struct *mm,
+                unsigned long address)
+{
+        struct page *ptepage;
+
+#ifdef CONFIG_HIGHPTE
+        int flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT;
+#else
+        int flags = GFP_KERNEL | __GFP_REPEAT;
+#endif
+
+        ptepage = alloc_pages(flags, 0);
+        if (ptepage)
+                clear_highpage(ptepage);
+        return ptepage;
+}
+
+static inline pte_t *pte_alloc_one_fast(struct mm_struct *mm,
+                unsigned long address)
+{
+        unsigned long *ret;
+
+        ret = pte_quicklist;
+        if (ret != NULL) {
+                pte_quicklist = (unsigned long *)(*ret);
+                ret[0] = 0;
+                pgtable_cache_size--;
+        }
+        return (pte_t *)ret;
+}
+
+extern inline void pte_free_fast(pte_t *pte)
+{
+        *(unsigned long **)pte = pte_quicklist;
+        pte_quicklist = (unsigned long *) pte;
+        pgtable_cache_size++;
+}
+
+extern inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+        free_page((unsigned long)pte);
+}
+
+extern inline void pte_free_slow(struct page *ptepage)
+{
+        __free_page(ptepage);
+}
+
+extern inline void pte_free(struct mm_struct *mm, struct page *ptepage)
+{
+        __free_page(ptepage);
+}
+
+#define __pte_free_tlb(tlb, pte)        pte_free((tlb)->mm, (pte))
+
+#define pmd_populate(mm, pmd, pte)      (pmd_val(*(pmd)) = page_address(pte))
+
+#define pmd_populate_kernel(mm, pmd, pte) \
+                (pmd_val(*(pmd)) = (unsigned long) (pte))
+
+/*
+ * We don't have any real pmd's, and this code never triggers because
+ * the pgd will always be present..
+ */
+#define pmd_alloc_one(mm, address)      ({ BUG(); ((pmd_t *)2); })
+/*#define pmd_free(mm, x)                       do { } while (0)*/
+#define __pmd_free_tlb(tlb, x)          do { } while (0)
+#define pgd_populate(mm, pmd, pte)      BUG()
+
+extern int do_check_pgt_cache(int, int);
+
+#endif /* CONFIG_MMU */
+
 #define check_pgt_cache()       do {} while (0)
 
 #endif /* _ASM_MICROBLAZE_PGALLOC_H */
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index 4df31e46568e..4c57a586a989 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -14,6 +16,8 @@
 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
                 remap_pfn_range(vma, vaddr, pfn, size, prot)
 
+#ifndef CONFIG_MMU
+
 #define pgd_present(pgd)        (1) /* pages are always present on non MMU */
 #define pgd_none(pgd)           (0)
 #define pgd_bad(pgd)            (0)
@@ -27,6 +31,8 @@
 #define PAGE_READONLY           __pgprot(0) /* these mean nothing to non MMU */
 #define PAGE_KERNEL             __pgprot(0) /* these mean nothing to non MMU */
 
+#define pgprot_noncached(x)     (x)
+
 #define __swp_type(x)           (0)
 #define __swp_offset(x)         (0)
 #define __swp_entry(typ, off)   ((swp_entry_t) { ((typ) | ((off) << 7)) })
@@ -45,6 +51,538 @@ static inline int pte_file(pte_t pte) { return 0; }
 
 #define arch_enter_lazy_cpu_mode()      do {} while (0)
 
+#else /* CONFIG_MMU */
+
+#include <asm-generic/4level-fixup.h>
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+#include <linux/sched.h>
+#include <linux/threads.h>
+#include <asm/processor.h>              /* For TASK_SIZE */
+#include <asm/mmu.h>
+#include <asm/page.h>
+
+#define FIRST_USER_ADDRESS      0
+
+extern unsigned long va_to_phys(unsigned long address);
+extern pte_t *va_to_pte(unsigned long address);
+extern unsigned long ioremap_bot, ioremap_base;
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+
+static inline int pte_special(pte_t pte)        { return 0; }
+
+static inline pte_t pte_mkspecial(pte_t pte)    { return pte; }
+
+/* Start and end of the vmalloc area. */
+/* Make sure to map the vmalloc area above the pinned kernel memory area
+   of 32Mb.  */
+#define VMALLOC_START   (CONFIG_KERNEL_START + \
+                                max(32 * 1024 * 1024UL, memory_size))
+#define VMALLOC_END     ioremap_bot
+#define VMALLOC_VMADDR(x) ((unsigned long)(x))
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * The MicroBlaze MMU is identical to the PPC-40x MMU, and uses a hash
+ * table containing PTEs, together with a set of 16 segment registers, to
+ * define the virtual to physical address mapping.
+ *
+ * We use the hash table as an extended TLB, i.e. a cache of currently
+ * active mappings.  We maintain a two-level page table tree, much
+ * like that used by the i386, for the sake of the Linux memory
+ * management code.  Low-level assembler code in hashtable.S
+ * (procedure hash_page) is responsible for extracting ptes from the
+ * tree and putting them into the hash table when necessary, and
+ * updating the accessed and modified bits in the page table tree.
+ */
+
+/*
+ * The MicroBlaze processor has a TLB architecture identical to PPC-40x. The
+ * instruction and data sides share a unified, 64-entry, semi-associative
+ * TLB which is maintained totally under software control. In addition, the
+ * instruction side has a hardware-managed, 2,4, or 8-entry, fully-associative
+ * TLB which serves as a first level to the shared TLB. These two TLBs are
+ * known as the UTLB and ITLB, respectively (see "mmu.h" for definitions).
+ */
+
+/*
+ * The normal case is that PTEs are 32-bits and we have a 1-page
+ * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages.  -- paulus
+ *
+ */
+
+/* PMD_SHIFT determines the size of the area mapped by the PTE pages */
+#define PMD_SHIFT       (PAGE_SHIFT + PTE_SHIFT)
+#define PMD_SIZE        (1UL << PMD_SHIFT)
+#define PMD_MASK        (~(PMD_SIZE-1))
+
+/* PGDIR_SHIFT determines what a top-level page table entry can map */
+#define PGDIR_SHIFT     PMD_SHIFT
+#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK      (~(PGDIR_SIZE-1))
+
+/*
+ * entries per page directory level: our page-table tree is two-level, so
+ * we don't really have any PMD directory.
+ */
+#define PTRS_PER_PTE    (1 << PTE_SHIFT)
+#define PTRS_PER_PMD    1
+#define PTRS_PER_PGD    (1 << (32 - PGDIR_SHIFT))
+
+#define USER_PTRS_PER_PGD       (TASK_SIZE / PGDIR_SIZE)
+#define FIRST_USER_PGD_NR       0
+
+#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
+#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
+
+#define pte_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pte "PTE_FMT".\n", \
+                __FILE__, __LINE__, pte_val(e))
+#define pmd_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pmd %08lx.\n", \
+                __FILE__, __LINE__, pmd_val(e))
+#define pgd_ERROR(e) \
+        printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
+                __FILE__, __LINE__, pgd_val(e))
+
+/*
+ * Bits in a linux-style PTE.  These match the bits in the
+ * (hardware-defined) PTE as closely as possible.
+ */
+
+/* There are several potential gotchas here.  The hardware TLBLO
+ * field looks like this:
+ *
+ * 0  1  2  3  4  ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
+ * RPN.....................  0  0 EX WR ZSEL.......  W  I  M  G
+ *
+ * Where possible we make the Linux PTE bits match up with this
+ *
+ * - bits 20 and 21 must be cleared, because we use 4k pages (4xx can
+ * support down to 1k pages), this is done in the TLBMiss exception
+ * handler.
+ * - We use only zones 0 (for kernel pages) and 1 (for user pages)
+ * of the 16 available.  Bit 24-26 of the TLB are cleared in the TLB
+ * miss handler.  Bit 27 is PAGE_USER, thus selecting the correct
+ * zone.
+ * - PRESENT *must* be in the bottom two bits because swap cache
+ * entries use the top 30 bits.  Because 4xx doesn't support SMP
+ * anyway, M is irrelevant so we borrow it for PAGE_PRESENT.  Bit 30
+ * is cleared in the TLB miss handler before the TLB entry is loaded.
+ * - All other bits of the PTE are loaded into TLBLO without
+ *  * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
+ * software PTE bits.  We actually use use bits 21, 24, 25, and
+ * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and
+ * PRESENT.
+ */
+
+/* Definitions for MicroBlaze. */
+#define _PAGE_GUARDED   0x001   /* G: page is guarded from prefetch */
+#define _PAGE_PRESENT   0x002   /* software: PTE contains a translation */
+#define _PAGE_NO_CACHE  0x004   /* I: caching is inhibited */
+#define _PAGE_WRITETHRU 0x008   /* W: caching is write-through */
+#define _PAGE_USER      0x010   /* matches one of the zone permission bits */
+#define _PAGE_RW        0x040   /* software: Writes permitted */
+#define _PAGE_DIRTY     0x080   /* software: dirty page */
+#define _PAGE_HWWRITE   0x100   /* hardware: Dirty & RW, set in exception */
+#define _PAGE_HWEXEC    0x200   /* hardware: EX permission */
+#define _PAGE_ACCESSED  0x400   /* software: R: page referenced */
+#define _PMD_PRESENT    PAGE_MASK
+
+/*
+ * Some bits are unused...
+ */
+#ifndef _PAGE_HASHPTE
+#define _PAGE_HASHPTE   0
+#endif
+#ifndef _PTE_NONE_MASK
+#define _PTE_NONE_MASK  0
+#endif
+#ifndef _PAGE_SHARED
+#define _PAGE_SHARED    0
+#endif
+#ifndef _PAGE_HWWRITE
+#define _PAGE_HWWRITE   0
+#endif
+#ifndef _PAGE_HWEXEC
+#define _PAGE_HWEXEC    0
+#endif
+#ifndef _PAGE_EXEC
+#define _PAGE_EXEC      0
+#endif
+
+#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
+
+/*
+ * Note: the _PAGE_COHERENT bit automatically gets set in the hardware
+ * PTE if CONFIG_SMP is defined (hash_page does this); there is no need
+ * to have it in the Linux PTE, and in fact the bit could be reused for
+ * another purpose.  -- paulus.
+ */
+#define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED)
+#define _PAGE_WRENABLE  (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE)
+
+#define _PAGE_KERNEL \
+        (_PAGE_BASE | _PAGE_WRENABLE | _PAGE_SHARED | _PAGE_HWEXEC)
+
+#define _PAGE_IO        (_PAGE_KERNEL | _PAGE_NO_CACHE | _PAGE_GUARDED)
+
+#define PAGE_NONE       __pgprot(_PAGE_BASE)
+#define PAGE_READONLY   __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+#define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
+#define PAGE_SHARED_X \
+                __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
+#define PAGE_COPY       __pgprot(_PAGE_BASE | _PAGE_USER)
+#define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
+
+#define PAGE_KERNEL     __pgprot(_PAGE_KERNEL)
+#define PAGE_KERNEL_RO  __pgprot(_PAGE_BASE | _PAGE_SHARED)
+#define PAGE_KERNEL_CI  __pgprot(_PAGE_IO)
+
+/*
+ * We consider execute permission the same as read.
+ * Also, write permissions imply read permissions.
+ */
+#define __P000  PAGE_NONE
+#define __P001  PAGE_READONLY_X
+#define __P010  PAGE_COPY
+#define __P011  PAGE_COPY_X
+#define __P100  PAGE_READONLY
+#define __P101  PAGE_READONLY_X
+#define __P110  PAGE_COPY
+#define __P111  PAGE_COPY_X
+
+#define __S000  PAGE_NONE
+#define __S001  PAGE_READONLY_X
+#define __S010  PAGE_SHARED
+#define __S011  PAGE_SHARED_X
+#define __S100  PAGE_READONLY
+#define __S101  PAGE_READONLY_X
+#define __S110  PAGE_SHARED
+#define __S111  PAGE_SHARED_X
+
+#ifndef __ASSEMBLY__
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+extern unsigned long empty_zero_page[1024];
+#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+
+#endif /* __ASSEMBLY__ */
+
+#define pte_none(pte)           ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
+#define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
+#define pte_clear(mm, addr, ptep) \
+        do { set_pte_at((mm), (addr), (ptep), __pte(0)); } while (0)
+
+#define pmd_none(pmd)           (!pmd_val(pmd))
+#define pmd_bad(pmd)            ((pmd_val(pmd) & _PMD_PRESENT) == 0)
+#define pmd_present(pmd)        ((pmd_val(pmd) & _PMD_PRESENT) != 0)
+#define pmd_clear(pmdp)         do { pmd_val(*(pmdp)) = 0; } while (0)
+
+#define pte_page(x)             (mem_map + (unsigned long) \
+                                ((pte_val(x) - memory_start) >> PAGE_SHIFT))
+#define PFN_SHIFT_OFFSET        (PAGE_SHIFT)
+
+#define pte_pfn(x)              (pte_val(x) >> PFN_SHIFT_OFFSET)
+
+#define pfn_pte(pfn, prot) \
+        __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) | pgprot_val(prot))
+
+#ifndef __ASSEMBLY__
+/*
+ * The "pgd_xxx()" functions here are trivial for a folded two-level
+ * setup: the pgd is never bad, and a pmd always exists (as it's folded
+ * into the pgd entry)
+ */
+static inline int pgd_none(pgd_t pgd)           { return 0; }
+static inline int pgd_bad(pgd_t pgd)            { return 0; }
+static inline int pgd_present(pgd_t pgd)        { return 1; }
+#define pgd_clear(xp)                           do { } while (0)
+#define pgd_page(pgd) \
+        ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+static inline int pte_read(pte_t pte)  { return pte_val(pte) & _PAGE_USER; }
+static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
+static inline int pte_exec(pte_t pte)  { return pte_val(pte) & _PAGE_EXEC; }
+static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
+static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
+/* FIXME */
+static inline int pte_file(pte_t pte)           { return 0; }
+
+static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
+static inline void pte_cache(pte_t pte)   { pte_val(pte) &= ~_PAGE_NO_CACHE; }
+
+static inline pte_t pte_rdprotect(pte_t pte) \
+                { pte_val(pte) &= ~_PAGE_USER; return pte; }
+static inline pte_t pte_wrprotect(pte_t pte) \
+        { pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
+static inline pte_t pte_exprotect(pte_t pte) \
+        { pte_val(pte) &= ~_PAGE_EXEC; return pte; }
+static inline pte_t pte_mkclean(pte_t pte) \
+        { pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
+static inline pte_t pte_mkold(pte_t pte) \
+        { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
+
+static inline pte_t pte_mkread(pte_t pte) \
+        { pte_val(pte) |= _PAGE_USER; return pte; }
+static inline pte_t pte_mkexec(pte_t pte) \
+        { pte_val(pte) |= _PAGE_USER | _PAGE_EXEC; return pte; }
+static inline pte_t pte_mkwrite(pte_t pte) \
+        { pte_val(pte) |= _PAGE_RW; return pte; }
+static inline pte_t pte_mkdirty(pte_t pte) \
+        { pte_val(pte) |= _PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkyoung(pte_t pte) \
+        { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
+
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ */
+
+static inline pte_t mk_pte_phys(phys_addr_t physpage, pgprot_t pgprot)
+{
+        pte_t pte;
+        pte_val(pte) = physpage | pgprot_val(pgprot);
+        return pte;
+}
+
+#define mk_pte(page, pgprot) \
+({                                                                         \
+        pte_t pte;                                                         \
+        pte_val(pte) = (((page - mem_map) << PAGE_SHIFT) + memory_start) |  \
+                        pgprot_val(pgprot);                                \
+        pte;                                                               \
+})
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+        pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
+        return pte;
+}
+
+/*
+ * Atomic PTE updates.
+ *
+ * pte_update clears and sets bit atomically, and returns
+ * the old pte value.
+ * The ((unsigned long)(p+1) - 4) hack is to get to the least-significant
+ * 32 bits of the PTE regardless of whether PTEs are 32 or 64 bits.
+ */
+static inline unsigned long pte_update(pte_t *p, unsigned long clr,
+                                unsigned long set)
+{
+        unsigned long old, tmp, msr;
+
+        __asm__ __volatile__("\
+        msrclr  %2, 0x2\n\
+        nop\n\
+        lw      %0, %4, r0\n\
+        andn    %1, %0, %5\n\
+        or      %1, %1, %6\n\
+        sw      %1, %4, r0\n\
+        mts     rmsr, %2\n\
+        nop"
+        : "=&r" (old), "=&r" (tmp), "=&r" (msr), "=m" (*p)
+        : "r" ((unsigned long)(p+1) - 4), "r" (clr), "r" (set), "m" (*p)
+        : "cc");
+
+        return old;
+}
+
+/*
+ * set_pte stores a linux PTE into the linux page table.
+ */
+static inline void set_pte(struct mm_struct *mm, unsigned long addr,
+                pte_t *ptep, pte_t pte)
+{
+        *ptep = pte;
+}
+
+static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
+                pte_t *ptep, pte_t pte)
+{
+        *ptep = pte;
+}
+
+static inline int ptep_test_and_clear_young(struct mm_struct *mm,
+                unsigned long addr, pte_t *ptep)
+{
+        return (pte_update(ptep, _PAGE_ACCESSED, 0) & _PAGE_ACCESSED) != 0;
+}
+
+static inline int ptep_test_and_clear_dirty(struct mm_struct *mm,
+                unsigned long addr, pte_t *ptep)
+{
+        return (pte_update(ptep, \
+                (_PAGE_DIRTY | _PAGE_HWWRITE), 0) & _PAGE_DIRTY) != 0;
+}
+
+static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
+                unsigned long addr, pte_t *ptep)
+{
+        return __pte(pte_update(ptep, ~_PAGE_HASHPTE, 0));
+}
+
+/*static inline void ptep_set_wrprotect(struct mm_struct *mm,
+                unsigned long addr, pte_t *ptep)
+{
+        pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), 0);
+}*/
+
+static inline void ptep_mkdirty(struct mm_struct *mm,
+                unsigned long addr, pte_t *ptep)
+{
+        pte_update(ptep, 0, _PAGE_DIRTY);
+}
+
+/*#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)*/
+
+/* Convert pmd entry to page */
+/* our pmd entry is an effective address of pte table*/
+/* returns effective address of the pmd entry*/
+#define pmd_page_kernel(pmd)    ((unsigned long) (pmd_val(pmd) & PAGE_MASK))
+
+/* returns struct *page of the pmd entry*/
+#define pmd_page(pmd)   (pfn_to_page(__pa(pmd_val(pmd)) >> PAGE_SHIFT))
+
+/* to find an entry in a kernel page-table-directory */
+#define pgd_offset_k(address) pgd_offset(&init_mm, address)
+
+/* to find an entry in a page-table-directory */
+#define pgd_index(address)       ((address) >> PGDIR_SHIFT)
+#define pgd_offset(mm, address)  ((mm)->pgd + pgd_index(address))
+
+/* Find an entry in the second-level page table.. */
+static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
+{
+        return (pmd_t *) dir;
+}
+
+/* Find an entry in the third-level page table.. */
+#define pte_index(address)              \
+        (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset_kernel(dir, addr)    \
+        ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(addr))
+#define pte_offset_map(dir, addr)               \
+        ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE0) + pte_index(addr))
+#define pte_offset_map_nested(dir, addr)        \
+        ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE1) + pte_index(addr))
+
+#define pte_unmap(pte)          kunmap_atomic(pte, KM_PTE0)
+#define pte_unmap_nested(pte)   kunmap_atomic(pte, KM_PTE1)
+
+/* Encode and decode a nonlinear file mapping entry */
+#define PTE_FILE_MAX_BITS       29
+#define pte_to_pgoff(pte)       (pte_val(pte) >> 3)
+#define pgoff_to_pte(off)       ((pte_t) { ((off) << 3) })
+
+extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+
+/*
+ * When flushing the tlb entry for a page, we also need to flush the hash
+ * table entry.  flush_hash_page is assembler (for speed) in hashtable.S.
+ */
+extern int flush_hash_page(unsigned context, unsigned long va, pte_t *ptep);
+
+/* Add an HPTE to the hash table */
+extern void add_hash_page(unsigned context, unsigned long va, pte_t *ptep);
+
+/*
+ * Encode and decode a swap entry.
+ * Note that the bits we use in a PTE for representing a swap entry
+ * must not include the _PAGE_PRESENT bit, or the _PAGE_HASHPTE bit
+ * (if used).  -- paulus
+ */
+#define __swp_type(entry)               ((entry).val & 0x3f)
+#define __swp_offset(entry)     ((entry).val >> 6)
+#define __swp_entry(type, offset) \
+                ((swp_entry_t) { (type) | ((offset) << 6) })
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 2 })
+#define __swp_entry_to_pte(x)   ((pte_t) { (x).val << 2 })
+
+
+/* CONFIG_APUS */
+/* For virtual address to physical address conversion */
+extern void cache_clear(__u32 addr, int length);
+extern void cache_push(__u32 addr, int length);
+extern int mm_end_of_chunk(unsigned long addr, int len);
+extern unsigned long iopa(unsigned long addr);
+/* extern unsigned long mm_ptov(unsigned long addr) \
+        __attribute__ ((const)); TBD */
+
+/* Values for nocacheflag and cmode */
+/* These are not used by the APUS kernel_map, but prevents
+ * compilation errors.
+ */
+#define IOMAP_FULL_CACHING      0
+#define IOMAP_NOCACHE_SER       1
+#define IOMAP_NOCACHE_NONSER    2
+#define IOMAP_NO_COPYBACK       3
+
+/*
+ * Map some physical address range into the kernel address space.
+ */
+extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
+                                int nocacheflag, unsigned long *memavailp);
+
+/*
+ * Set cache mode of (kernel space) address range.
+ */
+extern void kernel_set_cachemode(unsigned long address, unsigned long size,
+                                unsigned int cmode);
+
+/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
+#define kern_addr_valid(addr)   (1)
+
+#define io_remap_page_range remap_page_range
+
+/*
+ * No page table caches to initialise
+ */
+#define pgtable_cache_init()    do { } while (0)
+
+void do_page_fault(struct pt_regs *regs, unsigned long address,
+                   unsigned long error_code);
+
+void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
+                             unsigned int size, int flags);
+
+void __init adjust_total_lowmem(void);
+void mapin_ram(void);
+int map_page(unsigned long va, phys_addr_t pa, int flags);
+
+extern int mem_init_done;
+extern unsigned long ioremap_base;
+extern unsigned long ioremap_bot;
+
+asmlinkage void __init mmu_init(void);
+
+void __init *early_get_page(void);
+
+void *consistent_alloc(int gfp, size_t size, dma_addr_t *dma_handle);
+void consistent_free(void *vaddr);
+void consistent_sync(void *vaddr, size_t size, int direction);
+void consistent_sync_page(struct page *page, unsigned long offset,
+        size_t size, int direction);
+#endif /* __ASSEMBLY__ */
+#endif /* __KERNEL__ */
+
+#endif /* CONFIG_MMU */
+
 #ifndef __ASSEMBLY__
 #include <asm-generic/pgtable.h>
 
diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h
index b4df41c5dde2..8c758b231f37 100644
--- a/arch/microblaze/include/asm/posix_types.h
+++ b/arch/microblaze/include/asm/posix_types.h
@@ -16,7 +16,7 @@
  */
 
 typedef unsigned long   __kernel_ino_t;
-typedef unsigned int    __kernel_mode_t;
+typedef unsigned short  __kernel_mode_t;
 typedef unsigned int    __kernel_nlink_t;
 typedef long            __kernel_off_t;
 typedef int             __kernel_pid_t;
diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index 9329029d2614..563c6b9453f0 100644
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -1,6 +1,6 @@
 /*
- * Copyright (C) 2008 Michal Simek
- * Copyright (C) 2008 PetaLogix
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -26,14 +26,15 @@ extern const struct seq_operations cpuinfo_op;
 # define cpu_sleep()            do {} while (0)
 # define prepare_to_copy(tsk)   do {} while (0)
 
-# endif /* __ASSEMBLY__ */
-
 #define task_pt_regs(tsk) \
                 (((struct pt_regs *)(THREAD_SIZE + task_stack_page(tsk))) - 1)
 
 /* Do necessary setup to start up a newly executed thread. */
 void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp);
 
+# endif /* __ASSEMBLY__ */
+
+# ifndef CONFIG_MMU
 /*
  * User space process size: memory size
  *
@@ -85,4 +86,90 @@ extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
 # define KSTK_EIP(tsk)  (0)
 # define KSTK_ESP(tsk)  (0)
 
+# else /* CONFIG_MMU */
+
+/*
+ * This is used to define STACK_TOP, and with MMU it must be below
+ * kernel base to select the correct PGD when handling MMU exceptions.
+ */
+# define TASK_SIZE      (CONFIG_KERNEL_START)
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+# define TASK_UNMAPPED_BASE     (TASK_SIZE / 8 * 3)
+
+# define THREAD_KSP     0
+
+#  ifndef __ASSEMBLY__
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#  define current_text_addr()   ({ __label__ _l; _l: &&_l; })
+
+/* If you change this, you must change the associated assembly-languages
+ * constants defined below, THREAD_*.
+ */
+struct thread_struct {
+        /* kernel stack pointer (must be first field in structure) */
+        unsigned long   ksp;
+        unsigned long   ksp_limit;      /* if ksp <= ksp_limit stack overflow */
+        void            *pgdir;         /* root of page-table tree */
+        struct pt_regs  *regs;          /* Pointer to saved register state */
+};
+
+#  define INIT_THREAD { \
+        .ksp   = sizeof init_stack + (unsigned long)init_stack, \
+        .pgdir = swapper_pg_dir, \
+}
+
+/* Do necessary setup to start up a newly executed thread.  */
+void start_thread(struct pt_regs *regs,
+                unsigned long pc, unsigned long usp);
+
+/* Free all resources held by a thread. */
+extern inline void release_thread(struct task_struct *dead_task)
+{
+}
+
+extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
+
+/* Free current thread data structures etc.  */
+static inline void exit_thread(void)
+{
+}
+
+/* Return saved (kernel) PC of a blocked thread.  */
+#  define thread_saved_pc(tsk)  \
+        ((tsk)->thread.regs ? (tsk)->thread.regs->r15 : 0)
+
+unsigned long get_wchan(struct task_struct *p);
+
+/* The size allocated for kernel stacks. This _must_ be a power of two! */
+# define KERNEL_STACK_SIZE      0x2000
+
+/* Return some info about the user process TASK.  */
+#  define task_tos(task)        ((unsigned long)(task) + KERNEL_STACK_SIZE)
+#  define task_regs(task) ((struct pt_regs *)task_tos(task) - 1)
+
+#  define task_pt_regs_plus_args(tsk) \
+        (((void *)task_pt_regs(tsk)) - STATE_SAVE_ARG_SPACE)
+
+#  define task_sp(task) (task_regs(task)->r1)
+#  define task_pc(task) (task_regs(task)->pc)
+/* Grotty old names for some.  */
+#  define KSTK_EIP(task)        (task_pc(task))
+#  define KSTK_ESP(task)        (task_sp(task))
+
+/* FIXME */
+#  define deactivate_mm(tsk, mm)        do { } while (0)
+
+#  define STACK_TOP     TASK_SIZE
+#  define STACK_TOP_MAX STACK_TOP
+
+#  endif /* __ASSEMBLY__ */
+# endif /* CONFIG_MMU */
 #endif /* _ASM_MICROBLAZE_PROCESSOR_H */
diff --git a/arch/microblaze/include/asm/ptrace.h b/arch/microblaze/include/asm/ptrace.h
index 55015bce5e47..a917dc517736 100644
--- a/arch/microblaze/include/asm/ptrace.h
+++ b/arch/microblaze/include/asm/ptrace.h
@@ -10,7 +10,6 @@
 #define _ASM_MICROBLAZE_PTRACE_H
 
 #ifndef __ASSEMBLY__
-#include <linux/types.h>
 
 typedef unsigned long microblaze_reg_t;
 
diff --git a/arch/microblaze/include/asm/registers.h b/arch/microblaze/include/asm/registers.h
index 834142d9356f..68c3afb73877 100644
--- a/arch/microblaze/include/asm/registers.h
+++ b/arch/microblaze/include/asm/registers.h
@@ -1,6 +1,6 @@
 /*
- * Copyright (C) 2008 Michal Simek
- * Copyright (C) 2008 PetaLogix
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -30,4 +30,21 @@
 #define FSR_UF          (1<<1) /* Underflow */
 #define FSR_DO          (1<<0) /* Denormalized operand error */
 
+# ifdef CONFIG_MMU
+/* Machine State Register (MSR) Fields */
+# define MSR_UM         (1<<11) /* User Mode */
+# define MSR_UMS        (1<<12) /* User Mode Save */
+# define MSR_VM         (1<<13) /* Virtual Mode */
+# define MSR_VMS        (1<<14) /* Virtual Mode Save */
+
+# define MSR_KERNEL     (MSR_EE | MSR_VM)
+/* # define MSR_USER    (MSR_KERNEL | MSR_UM | MSR_IE) */
+# define MSR_KERNEL_VMS (MSR_EE | MSR_VMS)
+/* # define MSR_USER_VMS        (MSR_KERNEL_VMS | MSR_UMS | MSR_IE) */
+
+/* Exception State Register (ESR) Fields */
+# define          ESR_DIZ       (1<<11) /* Zone Protection */
+# define          ESR_S         (1<<10) /* Store instruction */
+
+# endif /* CONFIG_MMU */
 #endif /* _ASM_MICROBLAZE_REGISTERS_H */
diff --git a/arch/microblaze/include/asm/sections.h b/arch/microblaze/include/asm/sections.h
index 8434a43e5421..4487e150b455 100644
--- a/arch/microblaze/include/asm/sections.h
+++ b/arch/microblaze/include/asm/sections.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -14,6 +16,7 @@
 # ifndef __ASSEMBLY__
 extern char _ssbss[], _esbss[];
 extern unsigned long __ivt_start[], __ivt_end[];
+extern char _etext[], _stext[];
 
 #  ifdef CONFIG_MTD_UCLINUX
 extern char *_ebss;
diff --git a/arch/microblaze/include/asm/segment.h b/arch/microblaze/include/asm/segment.h
index 7f5dcc56eea1..0e7102c3fb11 100644
--- a/arch/microblaze/include/asm/segment.h
+++ b/arch/microblaze/include/asm/segment.h
@@ -1,6 +1,6 @@
 /*
- * Copyright (C) 2008 Michal Simek
- * Copyright (C) 2008 PetaLogix
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -11,7 +11,7 @@
 #ifndef _ASM_MICROBLAZE_SEGMENT_H
 #define _ASM_MICROBLAZE_SEGMENT_H
 
-#ifndef __ASSEMBLY__
+# ifndef __ASSEMBLY__
 
 typedef struct {
         unsigned long seg;
@@ -29,15 +29,21 @@ typedef struct {
  *
  * For non-MMU arch like Microblaze, KERNEL_DS and USER_DS is equal.
  */
-#  define KERNEL_DS     ((mm_segment_t){0})
+# define MAKE_MM_SEG(s)       ((mm_segment_t) { (s) })
+
+#  ifndef CONFIG_MMU
+#  define KERNEL_DS     MAKE_MM_SEG(0)
 #  define USER_DS       KERNEL_DS
+#  else
+#  define KERNEL_DS     MAKE_MM_SEG(0xFFFFFFFF)
+#  define USER_DS       MAKE_MM_SEG(TASK_SIZE - 1)
+#  endif
 
 # define get_ds()       (KERNEL_DS)
 # define get_fs()       (current_thread_info()->addr_limit)
-# define set_fs(x) \
-                do { current_thread_info()->addr_limit = (x); } while (0)
+# define set_fs(val)    (current_thread_info()->addr_limit = (val))
 
-# define segment_eq(a, b)               ((a).seg == (b).seg)
+# define segment_eq(a, b)       ((a).seg == (b).seg)
 
 # endif /* __ASSEMBLY__ */
 #endif /* _ASM_MICROBLAZE_SEGMENT_H */
diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h
index 9b98e8e6abae..27f8dafd8c34 100644
--- a/arch/microblaze/include/asm/setup.h
+++ b/arch/microblaze/include/asm/setup.h
@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2007-2008 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2007-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -18,7 +19,6 @@
 extern unsigned int boot_cpuid; /* move to smp.h */
 
 extern char cmd_line[COMMAND_LINE_SIZE];
-#  endif/* __KERNEL__ */
 
 void early_printk(const char *fmt, ...);
 
@@ -30,6 +30,11 @@ void setup_heartbeat(void);
 
 unsigned long long sched_clock(void);
 
+#   ifdef CONFIG_MMU
+extern void mmu_reset(void);
+extern void early_console_reg_tlb_alloc(unsigned int addr);
+#   endif /* CONFIG_MMU */
+
 void time_init(void);
 void init_IRQ(void);
 void machine_early_init(const char *cmdline, unsigned int ram,
@@ -40,5 +45,6 @@ void machine_shutdown(void);
 void machine_halt(void);
 void machine_power_off(void);
 
+#  endif/* __KERNEL__ */
 # endif /* __ASSEMBLY__ */
 #endif /* _ASM_MICROBLAZE_SETUP_H */
diff --git a/arch/microblaze/include/asm/signal.h b/arch/microblaze/include/asm/signal.h
index 9676fad3486c..46bc2267d949 100644
--- a/arch/microblaze/include/asm/signal.h
+++ b/arch/microblaze/include/asm/signal.h
@@ -90,7 +90,7 @@
 
 # ifndef __ASSEMBLY__
 # include <linux/types.h>
-# include <asm-generic/signal.h>
+# include <asm-generic/signal-defs.h>
 
 /* Avoid too many header ordering problems. */
 struct siginfo;
diff --git a/arch/microblaze/include/asm/stat.h b/arch/microblaze/include/asm/stat.h
index 5f18b8aed220..a15f77520bfd 100644
--- a/arch/microblaze/include/asm/stat.h
+++ b/arch/microblaze/include/asm/stat.h
@@ -16,58 +16,53 @@
 
 #include <linux/posix_types.h>
 
+#define STAT_HAVE_NSEC 1
+
 struct stat {
-        unsigned int    st_dev;
+        unsigned long   st_dev;
         unsigned long   st_ino;
         unsigned int    st_mode;
         unsigned int    st_nlink;
         unsigned int    st_uid;
         unsigned int    st_gid;
-        unsigned int    st_rdev;
-        unsigned long   st_size;
-        unsigned long   st_blksize;
-        unsigned long   st_blocks;
-        unsigned long   st_atime;
-        unsigned long   __unused1; /* unsigned long  st_atime_nsec */
-        unsigned long   st_mtime;
-        unsigned long   __unused2; /* unsigned long  st_mtime_nsec */
-        unsigned long   st_ctime;
-        unsigned long   __unused3; /* unsigned long  st_ctime_nsec */
+        unsigned long   st_rdev;
+        unsigned long   __pad1;
+        long            st_size;
+        int             st_blksize;
+        int             __pad2;
+        long            st_blocks;
+        int             st_atime;
+        unsigned int    st_atime_nsec;
+        int             st_mtime;
+        unsigned int    st_mtime_nsec;
+        int             st_ctime;
+        unsigned int    st_ctime_nsec;
         unsigned long   __unused4;
         unsigned long   __unused5;
 };
 
 struct stat64 {
-        unsigned long long      st_dev;
-        unsigned long   __unused1;
-
-        unsigned long long      st_ino;
-
-        unsigned int    st_mode;
-        unsigned int    st_nlink;
-
-        unsigned int    st_uid;
-        unsigned int    st_gid;
-
-        unsigned long long      st_rdev;
-        unsigned long   __unused3;
-
-        long long       st_size;
-        unsigned long   st_blksize;
-
-        unsigned long   st_blocks; /* No. of 512-byte blocks allocated */
-        unsigned long   __unused4; /* future possible st_blocks high bits */
-
-        unsigned long   st_atime;
-        unsigned long   st_atime_nsec;
-
-        unsigned long   st_mtime;
-        unsigned long   st_mtime_nsec;
-
-        unsigned long   st_ctime;
-        unsigned long   st_ctime_nsec;
-
-        unsigned long   __unused8;
+        unsigned long long      st_dev;         /* Device.  */
+        unsigned long long      st_ino;         /* File serial number.  */
+        unsigned int            st_mode;        /* File mode.  */
+        unsigned int            st_nlink;       /* Link count.  */
+        unsigned int            st_uid;         /* User ID of the file's owner.  */
+        unsigned int            st_gid;         /* Group ID of the file's group. */
+        unsigned long long      st_rdev;        /* Device number, if device.  */
+        unsigned long long      __pad1;
+        long long               st_size;        /* Size of file, in bytes.  */
+        int                     st_blksize;     /* Optimal block size for I/O.  */
+        int                     __pad2;
+        long long               st_blocks;      /* Number 512-byte blocks allocated. */
+        int                     st_atime;       /* Time of last access.  */
+        unsigned int            st_atime_nsec;
+        int                     st_mtime;       /* Time of last modification.  */
+        unsigned int            st_mtime_nsec;
+        int                     st_ctime;       /* Time of last status change.  */
+        unsigned int            st_ctime_nsec;
+        unsigned int            __unused4;
+        unsigned int            __unused5;
 };
 
 #endif /* _ASM_MICROBLAZE_STAT_H */
+
diff --git a/arch/microblaze/include/asm/string.h b/arch/microblaze/include/asm/string.h
index f7728c90fc18..aec2f59298b8 100644
--- a/arch/microblaze/include/asm/string.h
+++ b/arch/microblaze/include/asm/string.h
@@ -9,7 +9,7 @@
 #ifndef _ASM_MICROBLAZE_STRING_H
 #define _ASM_MICROBLAZE_STRING_H
 
-#ifndef __KERNEL__
+#ifdef __KERNEL__
 
 #define __HAVE_ARCH_MEMSET
 #define __HAVE_ARCH_MEMCPY
diff --git a/arch/microblaze/include/asm/syscalls.h b/arch/microblaze/include/asm/syscalls.h
index 9cb4ff0edeb2..ddea9eb31f8d 100644
--- a/arch/microblaze/include/asm/syscalls.h
+++ b/arch/microblaze/include/asm/syscalls.h
@@ -34,6 +34,9 @@ asmlinkage int sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize,
 asmlinkage int sys_sigaction(int sig, const struct old_sigaction *act,
                 struct old_sigaction *oact);
 
+asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act,
+                struct sigaction __user *oact, size_t sigsetsize);
+
 asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
                 struct pt_regs *regs);
 
diff --git a/arch/microblaze/include/asm/termios.h b/arch/microblaze/include/asm/termios.h
index 102d77258668..47a46d1fbe26 100644
--- a/arch/microblaze/include/asm/termios.h
+++ b/arch/microblaze/include/asm/termios.h
@@ -81,7 +81,7 @@ struct termio {
 
 #ifdef __KERNEL__
 
-#include <asm-generic/termios.h>
+#include <asm-generic/termios-base.h>
 
 #endif  /* __KERNEL__ */
 
diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h
index 4c3943e3f403..7fac44498445 100644
--- a/arch/microblaze/include/asm/thread_info.h
+++ b/arch/microblaze/include/asm/thread_info.h
@@ -122,6 +122,8 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SINGLESTEP          4
 #define TIF_IRET                5 /* return with iret */
 #define TIF_MEMDIE              6
+#define TIF_SYSCALL_AUDIT       9       /* syscall auditing active */
+#define TIF_SECCOMP             10      /* secure computing */
 #define TIF_FREEZE              14      /* Freezing for suspend */
 
 /* FIXME change in entry.S */
@@ -138,10 +140,17 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_IRET               (1<<TIF_IRET)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_FREEZE             (1<<TIF_FREEZE)
+#define _TIF_SYSCALL_AUDIT      (1 << TIF_SYSCALL_AUDIT)
+#define _TIF_SECCOMP            (1 << TIF_SECCOMP)
 #define _TIF_KERNEL_TRACE       (1 << TIF_KERNEL_TRACE)
 
+/* work to do in syscall trace */
+#define _TIF_WORK_SYSCALL_MASK  (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \
+                                 _TIF_SYSCALL_AUDIT | _TIF_SECCOMP)
+
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK          0x0000FFFE
+
 /* work to do on any return to u-space */
 #define _TIF_ALLWORK_MASK       0x0000FFFF
 
@@ -154,6 +163,17 @@ static inline struct thread_info *current_thread_info(void)
  */
 /* FPU was used by this task this quantum (SMP) */
 #define TS_USEDFPU              0x0001
+#define TS_RESTORE_SIGMASK      0x0002
+
+#ifndef __ASSEMBLY__
+#define HAVE_SET_RESTORE_SIGMASK 1
+static inline void set_restore_sigmask(void)
+{
+        struct thread_info *ti = current_thread_info();
+        ti->status |= TS_RESTORE_SIGMASK;
+        set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags);
+}
+#endif
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_MICROBLAZE_THREAD_INFO_H */
diff --git a/arch/microblaze/include/asm/tlb.h b/arch/microblaze/include/asm/tlb.h
index d1dfe3791127..c472d2801132 100644
--- a/arch/microblaze/include/asm/tlb.h
+++ b/arch/microblaze/include/asm/tlb.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -13,4 +15,10 @@
 
 #include <asm-generic/tlb.h>
 
+#ifdef CONFIG_MMU
+#define tlb_start_vma(tlb, vma)         do { } while (0)
+#define tlb_end_vma(tlb, vma)           do { } while (0)
+#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
+#endif
+
 #endif /* _ASM_MICROBLAZE_TLB_H */
diff --git a/arch/microblaze/include/asm/tlbflush.h b/arch/microblaze/include/asm/tlbflush.h
index d7fe7629001b..eb31a0e8a772 100644
--- a/arch/microblaze/include/asm/tlbflush.h
+++ b/arch/microblaze/include/asm/tlbflush.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -9,6 +11,50 @@
 #ifndef _ASM_MICROBLAZE_TLBFLUSH_H
 #define _ASM_MICROBLAZE_TLBFLUSH_H
 
+#ifdef CONFIG_MMU
+
+#include <linux/sched.h>
+#include <linux/threads.h>
+#include <asm/processor.h>      /* For TASK_SIZE */
+#include <asm/mmu.h>
+#include <asm/page.h>
+#include <asm/pgalloc.h>
+
+extern void _tlbie(unsigned long address);
+extern void _tlbia(void);
+
+#define __tlbia()       _tlbia()
+
+static inline void local_flush_tlb_all(void)
+        { __tlbia(); }
+static inline void local_flush_tlb_mm(struct mm_struct *mm)
+        { __tlbia(); }
+static inline void local_flush_tlb_page(struct vm_area_struct *vma,
+                                unsigned long vmaddr)
+        { _tlbie(vmaddr); }
+static inline void local_flush_tlb_range(struct vm_area_struct *vma,
+                unsigned long start, unsigned long end)
+        { __tlbia(); }
+
+#define flush_tlb_kernel_range(start, end)      do { } while (0)
+
+#define update_mmu_cache(vma, addr, pte)        do { } while (0)
+
+#define flush_tlb_all local_flush_tlb_all
+#define flush_tlb_mm local_flush_tlb_mm
+#define flush_tlb_page local_flush_tlb_page
+#define flush_tlb_range local_flush_tlb_range
+
+/*
+ * This is called in munmap when we have freed up some page-table
+ * pages.  We don't need to do anything here, there's nothing special
+ * about our page-table pages.  -- paulus
+ */
+static inline void flush_tlb_pgtables(struct mm_struct *mm,
+        unsigned long start, unsigned long end) { }
+
+#else /* CONFIG_MMU */
+
 #define flush_tlb()                             BUG()
 #define flush_tlb_all()                         BUG()
 #define flush_tlb_mm(mm)                        BUG()
@@ -17,4 +63,6 @@
 #define flush_tlb_pgtables(mm, start, end)      BUG()
 #define flush_tlb_kernel_range(start, end)      BUG()
 
+#endif /* CONFIG_MMU */
+
 #endif /* _ASM_MICROBLAZE_TLBFLUSH_H */
diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h
index 5a3ffc308e12..65adad61e7e9 100644
--- a/arch/microblaze/include/asm/uaccess.h
+++ b/arch/microblaze/include/asm/uaccess.h
@@ -1,4 +1,6 @@
 /*
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -26,6 +28,10 @@
 #define VERIFY_READ     0
 #define VERIFY_WRITE    1
 
+#define __clear_user(addr, n)   (memset((void *)(addr), 0, (n)), 0)
+
+#ifndef CONFIG_MMU
+
 extern int ___range_ok(unsigned long addr, unsigned long size);
 
 #define __range_ok(addr, size) \
@@ -34,68 +40,68 @@ extern int ___range_ok(unsigned long addr, unsigned long size);
 #define access_ok(type, addr, size) (__range_ok((addr), (size)) == 0)
 #define __access_ok(add, size) (__range_ok((addr), (size)) == 0)
 
-extern inline int bad_user_access_length(void)
-{
-        return 0;
-}
+/* Undefined function to trigger linker error */
+extern int bad_user_access_length(void);
+
 /* FIXME this is function for optimalization -> memcpy */
-#define __get_user(var, ptr)                                    \
-        ({                                                      \
-                int __gu_err = 0;                               \
-                switch (sizeof(*(ptr))) {                       \
-                case 1:                                         \
-                case 2:                                         \
-                case 4:                                         \
-                        (var) = *(ptr);                         \
-                        break;                                  \
-                case 8:                                         \
-                        memcpy((void *) &(var), (ptr), 8);      \
-                        break;                                  \
-                default:                                        \
-                        (var) = 0;                              \
-                        __gu_err = __get_user_bad();            \
-                        break;                                  \
-                }                                               \
-                __gu_err;                                       \
-        })
+#define __get_user(var, ptr)                            \
+({                                                      \
+        int __gu_err = 0;                               \
+        switch (sizeof(*(ptr))) {                       \
+        case 1:                                         \
+        case 2:                                         \
+        case 4:                                         \
+                (var) = *(ptr);                         \
+                break;                                  \
+        case 8:                                         \
+                memcpy((void *) &(var), (ptr), 8);      \
+                break;                                  \
+        default:                                        \
+                (var) = 0;                              \
+                __gu_err = __get_user_bad();            \
+                break;                                  \
+        }                                               \
+        __gu_err;                                       \
+})
 
 #define __get_user_bad()        (bad_user_access_length(), (-EFAULT))
 
+/* FIXME is not there defined __pu_val */
 #define __put_user(var, ptr)                                    \
-        ({                                                      \
-                int __pu_err = 0;                               \
-                switch (sizeof(*(ptr))) {                       \
-                case 1:                                         \
-                case 2:                                         \
-                case 4:                                         \
-                        *(ptr) = (var);                         \
-                        break;                                  \
-                case 8: {                                       \
-                        typeof(*(ptr)) __pu_val = var;          \
-                        memcpy(ptr, &__pu_val, sizeof(__pu_val));\
-                        }                                       \
-                        break;                                  \
-                default:                                        \
-                        __pu_err = __put_user_bad();            \
-                        break;                                  \
-                }                                                       \
-                __pu_err;                                               \
-        })
+({                                                              \
+        int __pu_err = 0;                                       \
+        switch (sizeof(*(ptr))) {                               \
+        case 1:                                                 \
+        case 2:                                                 \
+        case 4:                                                 \
+                *(ptr) = (var);                                 \
+                break;                                          \
+        case 8: {                                               \
+                typeof(*(ptr)) __pu_val = (var);                \
+                memcpy(ptr, &__pu_val, sizeof(__pu_val));       \
+                }                                               \
+                break;                                          \
+        default:                                                \
+                __pu_err = __put_user_bad();                    \
+                break;                                          \
+        }                                                       \
+        __pu_err;                                               \
+})
 
 #define __put_user_bad()        (bad_user_access_length(), (-EFAULT))
 
-#define put_user(x, ptr)        __put_user(x, ptr)
-#define get_user(x, ptr)        __get_user(x, ptr)
+#define put_user(x, ptr)        __put_user((x), (ptr))
+#define get_user(x, ptr)        __get_user((x), (ptr))
 
-#define copy_to_user(to, from, n)               (memcpy(to, from, n), 0)
-#define copy_from_user(to, from, n)             (memcpy(to, from, n), 0)
+#define copy_to_user(to, from, n)       (memcpy((to), (from), (n)), 0)
+#define copy_from_user(to, from, n)     (memcpy((to), (from), (n)), 0)
 
-#define __copy_to_user(to, from, n)             (copy_to_user(to, from, n))
-#define __copy_from_user(to, from, n)           (copy_from_user(to, from, n))
-#define __copy_to_user_inatomic(to, from, n)    (__copy_to_user(to, from, n))
-#define __copy_from_user_inatomic(to, from, n)  (__copy_from_user(to, from, n))
-
-#define __clear_user(addr, n)   (memset((void *)addr, 0, n), 0)
+#define __copy_to_user(to, from, n)     (copy_to_user((to), (from), (n)))
+#define __copy_from_user(to, from, n)   (copy_from_user((to), (from), (n)))
+#define __copy_to_user_inatomic(to, from, n) \
+                        (__copy_to_user((to), (from), (n)))
+#define __copy_from_user_inatomic(to, from, n) \
+                        (__copy_from_user((to), (from), (n)))
 
 static inline unsigned long clear_user(void *addr, unsigned long size)
 {
@@ -104,13 +110,200 @@ static inline unsigned long clear_user(void *addr, unsigned long size)
         return size;
 }
 
-/* Returns 0 if exception not found and fixup otherwise. */
+/* Returns 0 if exception not found and fixup otherwise.  */
 extern unsigned long search_exception_table(unsigned long);
 
+extern long strncpy_from_user(char *dst, const char *src, long count);
+extern long strnlen_user(const char *src, long count);
+
+#else /* CONFIG_MMU */
+
+/*
+ * Address is valid if:
+ *  - "addr", "addr + size" and "size" are all below the limit
+ */
+#define access_ok(type, addr, size) \
+        (get_fs().seg > (((unsigned long)(addr)) | \
+                (size) | ((unsigned long)(addr) + (size))))
+
+/* || printk("access_ok failed for %s at 0x%08lx (size %d), seg 0x%08x\n",
+ type?"WRITE":"READ",addr,size,get_fs().seg)) */
+
+/*
+ * All the __XXX versions macros/functions below do not perform
+ * access checking. It is assumed that the necessary checks have been
+ * already performed before the finction (macro) is called.
+ */
+
+#define get_user(x, ptr)                                                \
+({                                                                      \
+        access_ok(VERIFY_READ, (ptr), sizeof(*(ptr)))                   \
+                ? __get_user((x), (ptr)) : -EFAULT;                     \
+})
+
+#define put_user(x, ptr)                                                \
+({                                                                      \
+        access_ok(VERIFY_WRITE, (ptr), sizeof(*(ptr)))                  \
+                ? __put_user((x), (ptr)) : -EFAULT;                     \
+})
+
+#define __get_user(x, ptr)                                              \
+({                                                                      \
+        unsigned long __gu_val;                                         \
+        /*unsigned long __gu_ptr = (unsigned long)(ptr);*/              \
+        long __gu_err;                                                  \
+        switch (sizeof(*(ptr))) {                                       \
+        case 1:                                                         \
+                __get_user_asm("lbu", (ptr), __gu_val, __gu_err);       \
+                break;                                                  \
+        case 2:                                                         \
+                __get_user_asm("lhu", (ptr), __gu_val, __gu_err);       \
+                break;                                                  \
+        case 4:                                                         \
+                __get_user_asm("lw", (ptr), __gu_val, __gu_err);        \
+                break;                                                  \
+        default:                                                        \
+                __gu_val = 0; __gu_err = -EINVAL;                       \
+        }                                                               \
+        x = (__typeof__(*(ptr))) __gu_val;                              \
+        __gu_err;                                                       \
+})
+
+#define __get_user_asm(insn, __gu_ptr, __gu_val, __gu_err)              \
+({                                                                      \
+        __asm__ __volatile__ (                                          \
+                        "1:"    insn    " %1, %2, r0;                   \
+                                addk    %0, r0, r0;                     \
+                        2:                                              \
+                        .section .fixup,\"ax\";                         \
+                        3:      brid    2b;                             \
+                                addik   %0, r0, %3;                     \
+                        .previous;                                      \
+                        .section __ex_table,\"a\";                      \
+                        .word   1b,3b;                                  \
+                        .previous;"                                     \
+                : "=r"(__gu_err), "=r"(__gu_val)                        \
+                : "r"(__gu_ptr), "i"(-EFAULT)                           \
+        );                                                              \
+})
+
+#define __put_user(x, ptr)                                              \
+({                                                                      \
+        __typeof__(*(ptr)) __gu_val = x;                                \
+        long __gu_err = 0;                                              \
+        switch (sizeof(__gu_val)) {                                     \
+        case 1:                                                         \
+                __put_user_asm("sb", (ptr), __gu_val, __gu_err);        \
+                break;                                                  \
+        case 2:                                                         \
+                __put_user_asm("sh", (ptr), __gu_val, __gu_err);        \
+                break;                                                  \
+        case 4:                                                         \
+                __put_user_asm("sw", (ptr), __gu_val, __gu_err);        \
+                break;                                                  \
+        case 8:                                                         \
+                __put_user_asm_8((ptr), __gu_val, __gu_err);            \
+                break;                                                  \
+        default:                                                        \
+                __gu_err = -EINVAL;                                     \
+        }                                                               \
+        __gu_err;                                                       \
+})
+
+#define __put_user_asm_8(__gu_ptr, __gu_val, __gu_err)  \
+({                                                      \
+__asm__ __volatile__ (" lwi     %0, %1, 0;              \
+                1:      swi     %0, %2, 0;              \
+                        lwi     %0, %1, 4;              \
+                2:      swi     %0, %2, 4;              \
+                        addk    %0,r0,r0;               \
+                3:                                      \
+                .section .fixup,\"ax\";                 \
+                4:      brid    3b;                     \
+                        addik   %0, r0, %3;             \
+                .previous;                              \
+                .section __ex_table,\"a\";              \
+                .word   1b,4b,2b,4b;                    \
+                .previous;"                             \
+        : "=&r"(__gu_err)                               \
+        : "r"(&__gu_val),                               \
+        "r"(__gu_ptr), "i"(-EFAULT)                     \
+        );                                              \
+})
+
+#define __put_user_asm(insn, __gu_ptr, __gu_val, __gu_err)      \
+({                                                              \
+        __asm__ __volatile__ (                                  \
+                        "1:"    insn    " %1, %2, r0;           \
+                                addk    %0, r0, r0;             \
+                        2:                                      \
+                        .section .fixup,\"ax\";                 \
+                        3:      brid    2b;                     \
+                                addik   %0, r0, %3;             \
+                        .previous;                              \
+                        .section __ex_table,\"a\";              \
+                        .word   1b,3b;                          \
+                        .previous;"                             \
+                : "=r"(__gu_err)                                \
+                : "r"(__gu_val), "r"(__gu_ptr), "i"(-EFAULT)    \
+        );                                                      \
+})
+
+/*
+ * Return: number of not copied bytes, i.e. 0 if OK or non-zero if fail.
+ */
+static inline int clear_user(char *to, int size)
+{
+        if (size && access_ok(VERIFY_WRITE, to, size)) {
+                __asm__ __volatile__ ("                         \
+                                1:                              \
+                                        sb      r0, %2, r0;     \
+                                        addik   %0, %0, -1;     \
+                                        bneid   %0, 1b;         \
+                                        addik   %2, %2, 1;      \
+                                2:                              \
+                                .section __ex_table,\"a\";      \
+                                .word   1b,2b;                  \
+                                .section .text;"                \
+                        : "=r"(size)                            \
+                        : "0"(size), "r"(to)
+                );
+        }
+        return size;
+}
+
+extern unsigned long __copy_tofrom_user(void __user *to,
+                const void __user *from, unsigned long size);
+
+#define copy_to_user(to, from, n)                                       \
+        (access_ok(VERIFY_WRITE, (to), (n)) ?                           \
+                __copy_tofrom_user((void __user *)(to),                 \
+                        (__force const void __user *)(from), (n))       \
+                : -EFAULT)
+
+#define __copy_to_user(to, from, n)     copy_to_user((to), (from), (n))
+#define __copy_to_user_inatomic(to, from, n)    copy_to_user((to), (from), (n))
+
+#define copy_from_user(to, from, n)                                     \
+        (access_ok(VERIFY_READ, (from), (n)) ?                          \
+                __copy_tofrom_user((__force void __user *)(to),         \
+                        (void __user *)(from), (n))                     \
+                : -EFAULT)
+
+#define __copy_from_user(to, from, n)   copy_from_user((to), (from), (n))
+#define __copy_from_user_inatomic(to, from, n) \
+                copy_from_user((to), (from), (n))
+
+extern int __strncpy_user(char *to, const char __user *from, int len);
+extern int __strnlen_user(const char __user *sstr, int len);
+
+#define strncpy_from_user(to, from, len)        \
+                (access_ok(VERIFY_READ, from, 1) ?      \
+                        __strncpy_user(to, from, len) : -EFAULT)
+#define strnlen_user(str, len)  \
+                (access_ok(VERIFY_READ, str, 1) ? __strnlen_user(str, len) : 0)
 
-extern long strncpy_from_user(char *dst, const char __user *src, long count);
-extern long strnlen_user(const char __user *src, long count);
-extern long __strncpy_from_user(char *dst, const char __user *src, long count);
+#endif /* CONFIG_MMU */
 
 /*
  * The exception table consists of pairs of addresses: the first is the
diff --git a/arch/microblaze/include/asm/unaligned.h b/arch/microblaze/include/asm/unaligned.h
index 9d66b640c910..3658d91ac0fb 100644
--- a/arch/microblaze/include/asm/unaligned.h
+++ b/arch/microblaze/include/asm/unaligned.h
@@ -12,7 +12,8 @@
 
 # ifdef __KERNEL__
 
-# include <linux/unaligned/access_ok.h>
+# include <linux/unaligned/be_struct.h>
+# include <linux/unaligned/le_byteshift.h>
 # include <linux/unaligned/generic.h>
 
 # define get_unaligned  __get_unaligned_be
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile
index da94bec4ecba..f4a5e19a20eb 100644
--- a/arch/microblaze/kernel/Makefile
+++ b/arch/microblaze/kernel/Makefile
@@ -15,5 +15,6 @@ obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
 obj-$(CONFIG_SELFMOD)           += selfmod.o
 obj-$(CONFIG_HEART_BEAT)        += heartbeat.o
 obj-$(CONFIG_MODULES)           += microblaze_ksyms.o module.o
+obj-$(CONFIG_MMU)               += misc.o
 
 obj-y   += entry$(MMUEXT).o
diff --git a/arch/microblaze/kernel/asm-offsets.c b/arch/microblaze/kernel/asm-offsets.c
index aabd9e9423a6..7bc7b68f97db 100644
--- a/arch/microblaze/kernel/asm-offsets.c
+++ b/arch/microblaze/kernel/asm-offsets.c
@@ -1,4 +1,5 @@
 /*
+ * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
  * Copyright (C) 2007-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
@@ -68,16 +69,26 @@ int main(int argc, char *argv[])
 
         /* struct task_struct */
         DEFINE(TS_THREAD_INFO, offsetof(struct task_struct, stack));
+#ifdef CONFIG_MMU
+        DEFINE(TASK_STATE, offsetof(struct task_struct, state));
+        DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags));
+        DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
+        DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));
+        DEFINE(TASK_MM, offsetof(struct task_struct, mm));
+        DEFINE(TASK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
+        DEFINE(TASK_PID, offsetof(struct task_struct, pid));
+        DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
+        DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
+        BLANK();
+
+        DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
+        BLANK();
+#endif
 
         /* struct thread_info */
         DEFINE(TI_TASK, offsetof(struct thread_info, task));
-        DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
         DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
-        DEFINE(TI_STATUS, offsetof(struct thread_info, status));
-        DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
-        DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
         DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
-        DEFINE(TI_RESTART_BLOCK, offsetof(struct thread_info, restart_block));
         DEFINE(TI_CPU_CONTEXT, offsetof(struct thread_info, cpu_context));
         BLANK();
 
diff --git a/arch/microblaze/kernel/early_printk.c b/arch/microblaze/kernel/early_printk.c
index 4b0f0fdb9ca0..7de84923ba07 100644
--- a/arch/microblaze/kernel/early_printk.c
+++ b/arch/microblaze/kernel/early_printk.c
@@ -87,6 +87,9 @@ int __init setup_early_printk(char *opt)
         base_addr = early_uartlite_console();
         if (base_addr) {
                 early_console_initialized = 1;
+#ifdef CONFIG_MMU
+                early_console_reg_tlb_alloc(base_addr);
+#endif
                 early_printk("early_printk_console is enabled at 0x%08x\n",
                                                         base_addr);
 
diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S
index f24b1268baaf..1fce6b803f54 100644
--- a/arch/microblaze/kernel/entry-nommu.S
+++ b/arch/microblaze/kernel/entry-nommu.S
@@ -10,7 +10,7 @@
 
 #include <linux/linkage.h>
 #include <asm/thread_info.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/entry.h>
 #include <asm/asm-offsets.h>
 #include <asm/registers.h>
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
new file mode 100644
index 000000000000..91a0e7b185dd
--- /dev/null
+++ b/arch/microblaze/kernel/entry.S
@@ -0,0 +1,1116 @@
+/*
+ * Low-level system-call handling, trap handlers and context-switching
+ *
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
+ * Copyright (C) 2003           John Williams <jwilliams@itee.uq.edu.au>
+ * Copyright (C) 2001,2002      NEC Corporation
+ * Copyright (C) 2001,2002      Miles Bader <miles@gnu.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * Written by Miles Bader <miles@gnu.org>
+ * Heavily modified by John Williams for Microblaze
+ */
+
+#include <linux/sys.h>
+#include <linux/linkage.h>
+
+#include <asm/entry.h>
+#include <asm/current.h>
+#include <asm/processor.h>
+#include <asm/exceptions.h>
+#include <asm/asm-offsets.h>
+#include <asm/thread_info.h>
+
+#include <asm/page.h>
+#include <asm/unistd.h>
+
+#include <linux/errno.h>
+#include <asm/signal.h>
+
+/* The size of a state save frame. */
+#define STATE_SAVE_SIZE         (PT_SIZE + STATE_SAVE_ARG_SPACE)
+
+/* The offset of the struct pt_regs in a `state save frame' on the stack. */
+#define PTO     STATE_SAVE_ARG_SPACE /* 24 the space for args */
+
+#define C_ENTRY(name)   .globl name; .align 4; name
+
+/*
+ * Various ways of setting and clearing BIP in flags reg.
+ * This is mucky, but necessary using microblaze version that
+ * allows msr ops to write to BIP
+ */
+#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
+        .macro  clear_bip
+        msrclr  r11, MSR_BIP
+        nop
+        .endm
+
+        .macro  set_bip
+        msrset  r11, MSR_BIP
+        nop
+        .endm
+
+        .macro  clear_eip
+        msrclr  r11, MSR_EIP
+        nop
+        .endm
+
+        .macro  set_ee
+        msrset  r11, MSR_EE
+        nop
+        .endm
+
+        .macro  disable_irq
+        msrclr  r11, MSR_IE
+        nop
+        .endm
+
+        .macro  enable_irq
+        msrset  r11, MSR_IE
+        nop
+        .endm
+
+        .macro  set_ums
+        msrset  r11, MSR_UMS
+        nop
+        msrclr  r11, MSR_VMS
+        nop
+        .endm
+
+        .macro  set_vms
+        msrclr  r11, MSR_UMS
+        nop
+        msrset  r11, MSR_VMS
+        nop
+        .endm
+
+        .macro  clear_vms_ums
+        msrclr  r11, MSR_VMS
+        nop
+        msrclr  r11, MSR_UMS
+        nop
+        .endm
+#else
+        .macro  clear_bip
+        mfs     r11, rmsr
+        nop
+        andi    r11, r11, ~MSR_BIP
+        mts     rmsr, r11
+        nop
+        .endm
+
+        .macro  set_bip
+        mfs     r11, rmsr
+        nop
+        ori     r11, r11, MSR_BIP
+        mts     rmsr, r11
+        nop
+        .endm
+
+        .macro  clear_eip
+        mfs     r11, rmsr
+        nop
+        andi    r11, r11, ~MSR_EIP
+        mts     rmsr, r11
+        nop
+        .endm
+
+        .macro  set_ee
+        mfs     r11, rmsr
+        nop
+        ori     r11, r11, MSR_EE
+        mts     rmsr, r11
+        nop
+        .endm
+
+        .macro  disable_irq
+        mfs     r11, rmsr
+        nop
+        andi    r11, r11, ~MSR_IE
+        mts     rmsr, r11
+        nop
+        .endm
+
+        .macro  enable_irq
+        mfs     r11, rmsr
+        nop
+        ori     r11, r11, MSR_IE
+        mts     rmsr, r11
+        nop
+        .endm
+
+        .macro set_ums
+        mfs     r11, rmsr
+        nop
+        ori     r11, r11, MSR_VMS
+        andni   r11, r11, MSR_UMS
+        mts     rmsr, r11
+        nop
+        .endm
+
+        .macro  set_vms
+        mfs     r11, rmsr
+        nop
+        ori     r11, r11, MSR_VMS
+        andni   r11, r11, MSR_UMS
+        mts     rmsr, r11
+        nop
+        .endm
+
+        .macro  clear_vms_ums
+        mfs     r11, rmsr
+        nop
+        andni   r11, r11, (MSR_VMS|MSR_UMS)
+        mts     rmsr,r11
+        nop
+        .endm
+#endif
+
+/* Define how to call high-level functions. With MMU, virtual mode must be
+ * enabled when calling the high-level function. Clobbers R11.
+ * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL
+ */
+
+/* turn on virtual protected mode save */
+#define VM_ON           \
+        set_ums;                \
+        rted    r0, 2f; \
+2: nop;
+
+/* turn off virtual protected mode save and user mode save*/
+#define VM_OFF                  \
+        clear_vms_ums;                  \
+        rted    r0, TOPHYS(1f); \
+1: nop;
+
+#define SAVE_REGS \
+        swi     r2, r1, PTO+PT_R2;      /* Save SDA */                  \
+        swi     r5, r1, PTO+PT_R5;                                      \
+        swi     r6, r1, PTO+PT_R6;                                      \
+        swi     r7, r1, PTO+PT_R7;                                      \
+        swi     r8, r1, PTO+PT_R8;                                      \
+        swi     r9, r1, PTO+PT_R9;                                      \
+        swi     r10, r1, PTO+PT_R10;                                    \
+        swi     r11, r1, PTO+PT_R11;    /* save clobbered regs after rval */\
+        swi     r12, r1, PTO+PT_R12;                                    \
+        swi     r13, r1, PTO+PT_R13;    /* Save SDA2 */                 \
+        swi     r14, r1, PTO+PT_PC;     /* PC, before IRQ/trap */       \
+        swi     r15, r1, PTO+PT_R15;    /* Save LP */                   \
+        swi     r18, r1, PTO+PT_R18;    /* Save asm scratch reg */      \
+        swi     r19, r1, PTO+PT_R19;                                    \
+        swi     r20, r1, PTO+PT_R20;                                    \
+        swi     r21, r1, PTO+PT_R21;                                    \
+        swi     r22, r1, PTO+PT_R22;                                    \
+        swi     r23, r1, PTO+PT_R23;                                    \
+        swi     r24, r1, PTO+PT_R24;                                    \
+        swi     r25, r1, PTO+PT_R25;                                    \
+        swi     r26, r1, PTO+PT_R26;                                    \
+        swi     r27, r1, PTO+PT_R27;                                    \
+        swi     r28, r1, PTO+PT_R28;                                    \
+        swi     r29, r1, PTO+PT_R29;                                    \
+        swi     r30, r1, PTO+PT_R30;                                    \
+        swi     r31, r1, PTO+PT_R31;    /* Save current task reg */     \
+        mfs     r11, rmsr;              /* save MSR */                  \
+        nop;                                                            \
+        swi     r11, r1, PTO+PT_MSR;
+
+#define RESTORE_REGS \
+        lwi     r11, r1, PTO+PT_MSR;                                    \
+        mts     rmsr , r11;                                             \
+        nop;                                                            \
+        lwi     r2, r1, PTO+PT_R2;      /* restore SDA */               \
+        lwi     r5, r1, PTO+PT_R5;                                      \
+        lwi     r6, r1, PTO+PT_R6;                                      \
+        lwi     r7, r1, PTO+PT_R7;                                      \
+        lwi     r8, r1, PTO+PT_R8;                                      \
+        lwi     r9, r1, PTO+PT_R9;                                      \
+        lwi     r10, r1, PTO+PT_R10;                                    \
+        lwi     r11, r1, PTO+PT_R11;    /* restore clobbered regs after rval */\
+        lwi     r12, r1, PTO+PT_R12;                                    \
+        lwi     r13, r1, PTO+PT_R13;    /* restore SDA2 */              \
+        lwi     r14, r1, PTO+PT_PC;     /* RESTORE_LINK PC, before IRQ/trap */\
+        lwi     r15, r1, PTO+PT_R15;    /* restore LP */                \
+        lwi     r18, r1, PTO+PT_R18;    /* restore asm scratch reg */   \
+        lwi     r19, r1, PTO+PT_R19;                                    \
+        lwi     r20, r1, PTO+PT_R20;                                    \
+        lwi     r21, r1, PTO+PT_R21;                                    \
+        lwi     r22, r1, PTO+PT_R22;                                    \
+        lwi     r23, r1, PTO+PT_R23;                                    \
+        lwi     r24, r1, PTO+PT_R24;                                    \
+        lwi     r25, r1, PTO+PT_R25;                                    \
+        lwi     r26, r1, PTO+PT_R26;                                    \
+        lwi     r27, r1, PTO+PT_R27;                                    \
+        lwi     r28, r1, PTO+PT_R28;                                    \
+        lwi     r29, r1, PTO+PT_R29;                                    \
+        lwi     r30, r1, PTO+PT_R30;                                    \
+        lwi     r31, r1, PTO+PT_R31;    /* Restore cur task reg */
+
+.text
+
+/*
+ * User trap.
+ *
+ * System calls are handled here.
+ *
+ * Syscall protocol:
+ * Syscall number in r12, args in r5-r10
+ * Return value in r3
+ *
+ * Trap entered via brki instruction, so BIP bit is set, and interrupts
+ * are masked. This is nice, means we don't have to CLI before state save
+ */
+C_ENTRY(_user_exception):
+        swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
+        addi    r14, r14, 4     /* return address is 4 byte after call */
+        swi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */
+
+        lwi     r11, r0, TOPHYS(PER_CPU(KM));/* See if already in kernel mode.*/
+        beqi    r11, 1f;                /* Jump ahead if coming from user */
+/* Kernel-mode state save. */
+        lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
+        tophys(r1,r11);
+        swi     r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */
+        lwi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
+
+        addik   r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
+        SAVE_REGS
+
+        addi    r11, r0, 1;             /* Was in kernel-mode. */
+        swi     r11, r1, PTO+PT_MODE; /* pt_regs -> kernel mode */
+        brid    2f;
+        nop;                            /* Fill delay slot */
+
+/* User-mode state save.  */
+1:
+        lwi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
+        lwi     r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
+        tophys(r1,r1);
+        lwi     r1, r1, TS_THREAD_INFO; /* get stack from task_struct */
+/* calculate kernel stack pointer from task struct 8k */
+        addik   r1, r1, THREAD_SIZE;
+        tophys(r1,r1);
+
+        addik   r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack.  */
+        SAVE_REGS
+
+        swi     r0, r1, PTO+PT_MODE;                    /* Was in user-mode. */
+        lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
+        swi     r11, r1, PTO+PT_R1;             /* Store user SP.  */
+        addi    r11, r0, 1;
+        swi     r11, r0, TOPHYS(PER_CPU(KM));   /* Now we're in kernel-mode.  */
+2:      lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
+        /* Save away the syscall number.  */
+        swi     r12, r1, PTO+PT_R0;
+        tovirt(r1,r1)
+
+        la      r15, r0, ret_from_trap-8
+/* where the trap should return need -8 to adjust for rtsd r15, 8*/
+/* Jump to the appropriate function for the system call number in r12
+ * (r12 is not preserved), or return an error if r12 is not valid. The LP
+ * register should point to the location where
+ * the called function should return.  [note that MAKE_SYS_CALL uses label 1] */
+        /* See if the system call number is valid.  */
+        addi    r11, r12, -__NR_syscalls;
+        bgei    r11,1f;
+        /* Figure out which function to use for this system call.  */
+        /* Note Microblaze barrel shift is optional, so don't rely on it */
+        add     r12, r12, r12;                  /* convert num -> ptr */
+        add     r12, r12, r12;
+
+        /* Trac syscalls and stored them to r0_ram */
+        lwi     r3, r12, 0x400 + TOPHYS(r0_ram)
+        addi    r3, r3, 1
+        swi     r3, r12, 0x400 + TOPHYS(r0_ram)
+
+        lwi     r12, r12, TOPHYS(sys_call_table); /* Function ptr */
+        /* Make the system call.  to r12*/
+        set_vms;
+        rtid    r12, 0;
+        nop;
+        /* The syscall number is invalid, return an error.  */
+1:      VM_ON;  /* RETURN() expects virtual mode*/
+        addi    r3, r0, -ENOSYS;
+        rtsd    r15,8;          /* looks like a normal subroutine return */
+        or      r0, r0, r0
+
+
+/* Entry point used to return from a syscall/trap.  */
+/* We re-enable BIP bit before state restore */
+C_ENTRY(ret_from_trap):
+        set_bip;                        /*  Ints masked for state restore*/
+        lwi     r11, r1, PTO+PT_MODE;
+/* See if returning to kernel mode, if so, skip resched &c.  */
+        bnei    r11, 2f;
+
+        /* We're returning to user mode, so check for various conditions that
+         * trigger rescheduling. */
+        /* Get current task ptr into r11 */
+        add     r11, r0, CURRENT_TASK;  /* Get current task ptr into r11 */
+        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, r11, TI_FLAGS;             /* get flags in thread info */
+        andi    r11, r11, _TIF_NEED_RESCHED;
+        beqi    r11, 5f;
+
+        swi     r3, r1, PTO + PT_R3; /* store syscall result */
+        swi     r4, r1, PTO + PT_R4;
+        bralid  r15, schedule;  /* Call scheduler */
+        nop;                            /* delay slot */
+        lwi     r3, r1, PTO + PT_R3; /* restore syscall result */
+        lwi     r4, r1, PTO + PT_R4;
+
+        /* Maybe handle a signal */
+5:      add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
+        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
+        andi    r11, r11, _TIF_SIGPENDING;
+        beqi    r11, 1f;                /* Signals to handle, handle them */
+
+        swi     r3, r1, PTO + PT_R3; /* store syscall result */
+        swi     r4, r1, PTO + PT_R4;
+        la      r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
+        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
+        addi    r7, r0, 1;              /* Arg 3: int in_syscall */
+        bralid  r15, do_signal; /* Handle any signals */
+        nop;
+        lwi     r3, r1, PTO + PT_R3; /* restore syscall result */
+        lwi     r4, r1, PTO + PT_R4;
+
+/* Finally, return to user state.  */
+1:      swi     r0, r0, PER_CPU(KM);    /* Now officially in user state. */
+        add     r11, r0, CURRENT_TASK;  /* Get current task ptr into r11 */
+        swi     r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
+        VM_OFF;
+        tophys(r1,r1);
+        RESTORE_REGS;
+        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+        lwi     r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
+        bri     6f;
+
+/* Return to kernel state.  */
+2:      VM_OFF;
+        tophys(r1,r1);
+        RESTORE_REGS;
+        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+        tovirt(r1,r1);
+6:
+TRAP_return:            /* Make global symbol for debugging */
+        rtbd    r14, 0; /* Instructions to return from an IRQ */
+        nop;
+
+
+/* These syscalls need access to the struct pt_regs on the stack, so we
+   implement them in assembly (they're basically all wrappers anyway).  */
+
+C_ENTRY(sys_fork_wrapper):
+        addi    r5, r0, SIGCHLD                 /* Arg 0: flags */
+        lwi     r6, r1, PTO+PT_R1       /* Arg 1: child SP (use parent's) */
+        la      r7, r1, PTO                     /* Arg 2: parent context */
+        add     r8. r0, r0                      /* Arg 3: (unused) */
+        add     r9, r0, r0;                     /* Arg 4: (unused) */
+        add     r10, r0, r0;                    /* Arg 5: (unused) */
+        brid    do_fork         /* Do real work (tail-call) */
+        nop;
+
+/* This the initial entry point for a new child thread, with an appropriate
+   stack in place that makes it look the the child is in the middle of an
+   syscall.  This function is actually `returned to' from switch_thread
+   (copy_thread makes ret_from_fork the return address in each new thread's
+   saved context).  */
+C_ENTRY(ret_from_fork):
+        bralid  r15, schedule_tail; /* ...which is schedule_tail's arg */
+        add     r3, r5, r0;     /* switch_thread returns the prev task */
+                                /* ( in the delay slot ) */
+        add     r3, r0, r0;     /* Child's fork call should return 0. */
+        brid    ret_from_trap;  /* Do normal trap return */
+        nop;
+
+C_ENTRY(sys_vfork_wrapper):
+        la      r5, r1, PTO
+        brid    sys_vfork       /* Do real work (tail-call) */
+        nop
+
+C_ENTRY(sys_clone_wrapper):
+        bnei    r6, 1f;                 /* See if child SP arg (arg 1) is 0. */
+        lwi     r6, r1, PTO+PT_R1;      /* If so, use paret's stack ptr */
+1:      la      r7, r1, PTO;                    /* Arg 2: parent context */
+        add     r8, r0, r0;                     /* Arg 3: (unused) */
+        add     r9, r0, r0;                     /* Arg 4: (unused) */
+        add     r10, r0, r0;                    /* Arg 5: (unused) */
+        brid    do_fork         /* Do real work (tail-call) */
+        nop;
+
+C_ENTRY(sys_execve_wrapper):
+        la      r8, r1, PTO;            /* add user context as 4th arg */
+        brid    sys_execve;     /* Do real work (tail-call).*/
+        nop;
+
+C_ENTRY(sys_sigsuspend_wrapper):
+        swi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        swi     r4, r1, PTO+PT_R4;
+        la      r6, r1, PTO;            /* add user context as 2nd arg */
+        bralid  r15, sys_sigsuspend; /* Do real work.*/
+        nop;
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+        bri ret_from_trap /* fall through will not work here due to align */
+        nop;
+
+C_ENTRY(sys_rt_sigsuspend_wrapper):
+        swi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        swi     r4, r1, PTO+PT_R4;
+        la      r7, r1, PTO;            /* add user context as 3rd arg */
+        brlid   r15, sys_rt_sigsuspend; /* Do real work.*/
+        nop;
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+        bri ret_from_trap /* fall through will not work here due to align */
+        nop;
+
+
+C_ENTRY(sys_sigreturn_wrapper):
+        swi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        swi     r4, r1, PTO+PT_R4;
+        la      r5, r1, PTO;            /* add user context as 1st arg */
+        brlid   r15, sys_sigreturn;     /* Do real work.*/
+        nop;
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+        bri ret_from_trap /* fall through will not work here due to align */
+        nop;
+
+C_ENTRY(sys_rt_sigreturn_wrapper):
+        swi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        swi     r4, r1, PTO+PT_R4;
+        la      r5, r1, PTO;            /* add user context as 1st arg */
+        brlid   r15, sys_rt_sigreturn   /* Do real work */
+        nop;
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+        bri ret_from_trap /* fall through will not work here due to align */
+        nop;
+
+/*
+ * HW EXCEPTION rutine start
+ */
+
+#define SAVE_STATE      \
+        swi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */  \
+        set_bip;        /*equalize initial state for all possible entries*/\
+        clear_eip;                                                      \
+        enable_irq;                                                     \
+        set_ee;                                                         \
+        /* See if already in kernel mode.*/                             \
+        lwi     r11, r0, TOPHYS(PER_CPU(KM));                           \
+        beqi    r11, 1f;                /* Jump ahead if coming from user */\
+        /* Kernel-mode state save.  */                                  \
+        /* Reload kernel stack-ptr. */                                  \
+        lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));                     \
+        tophys(r1,r11);                                                 \
+        swi     r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */       \
+        lwi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\
+        addik   r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack.  */\
+        /* store return registers separately because                    \
+         * this macros is use for others exceptions */                  \
+        swi     r3, r1, PTO + PT_R3;                                    \
+        swi     r4, r1, PTO + PT_R4;                                    \
+        SAVE_REGS                                                       \
+        /* PC, before IRQ/trap - this is one instruction above */       \
+        swi     r17, r1, PTO+PT_PC;                                     \
+                                                                        \
+        addi    r11, r0, 1;             /* Was in kernel-mode.  */      \
+        swi     r11, r1, PTO+PT_MODE;                                   \
+        brid    2f;                                                     \
+        nop;                            /* Fill delay slot */           \
+1:      /* User-mode state save.  */                                    \
+        lwi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\
+        lwi     r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
+        tophys(r1,r1);                                                  \
+        lwi     r1, r1, TS_THREAD_INFO; /* get the thread info */       \
+        addik   r1, r1, THREAD_SIZE;    /* calculate kernel stack pointer */\
+        tophys(r1,r1);                                                  \
+                                                                        \
+        addik   r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack.  */\
+        /* store return registers separately because this macros        \
+         * is use for others exceptions */                              \
+        swi     r3, r1, PTO + PT_R3;                                    \
+        swi     r4, r1, PTO + PT_R4;                                    \
+        SAVE_REGS                                                       \
+        /* PC, before IRQ/trap - this is one instruction above FIXME*/  \
+        swi     r17, r1, PTO+PT_PC;                                     \
+                                                                        \
+        swi     r0, r1, PTO+PT_MODE; /* Was in user-mode.  */           \
+        lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));                     \
+        swi     r11, r1, PTO+PT_R1; /* Store user SP.  */               \
+        addi    r11, r0, 1;                                             \
+        swi     r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode.*/\
+2:      lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
+        /* Save away the syscall number.  */                            \
+        swi     r0, r1, PTO+PT_R0;                                      \
+        tovirt(r1,r1)
+
+C_ENTRY(full_exception_trap):
+        swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
+        /* adjust exception address for privileged instruction
+         * for finding where is it */
+        addik   r17, r17, -4
+        SAVE_STATE /* Save registers */
+        /* FIXME this can be store directly in PT_ESR reg.
+         * I tested it but there is a fault */
+        /* where the trap should return need -8 to adjust for rtsd r15, 8 */
+        la      r15, r0, ret_from_exc - 8
+        la      r5, r1, PTO              /* parameter struct pt_regs * regs */
+        mfs     r6, resr
+        nop
+        mfs     r7, rfsr;               /* save FSR */
+        nop
+        la      r12, r0, full_exception
+        set_vms;
+        rtbd    r12, 0;
+        nop;
+
+/*
+ * Unaligned data trap.
+ *
+ * Unaligned data trap last on 4k page is handled here.
+ *
+ * Trap entered via exception, so EE bit is set, and interrupts
+ * are masked.  This is nice, means we don't have to CLI before state save
+ *
+ * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S"
+ */
+C_ENTRY(unaligned_data_trap):
+        swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
+        SAVE_STATE              /* Save registers.*/
+        /* where the trap should return need -8 to adjust for rtsd r15, 8 */
+        la      r15, r0, ret_from_exc-8
+        mfs     r3, resr                /* ESR */
+        nop
+        mfs     r4, rear                /* EAR */
+        nop
+        la      r7, r1, PTO             /* parameter struct pt_regs * regs */
+        la      r12, r0, _unaligned_data_exception
+        set_vms;
+        rtbd    r12, 0; /* interrupts enabled */
+        nop;
+
+/*
+ * Page fault traps.
+ *
+ * If the real exception handler (from hw_exception_handler.S) didn't find
+ * the mapping for the process, then we're thrown here to handle such situation.
+ *
+ * Trap entered via exceptions, so EE bit is set, and interrupts
+ * are masked.  This is nice, means we don't have to CLI before state save
+ *
+ * Build a standard exception frame for TLB Access errors.  All TLB exceptions
+ * will bail out to this point if they can't resolve the lightweight TLB fault.
+ *
+ * The C function called is in "arch/microblaze/mm/fault.c", declared as:
+ * void do_page_fault(struct pt_regs *regs,
+ *                              unsigned long address,
+ *                              unsigned long error_code)
+ */
+/* data and intruction trap - which is choose is resolved int fault.c */
+C_ENTRY(page_fault_data_trap):
+        swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
+        SAVE_STATE              /* Save registers.*/
+        /* where the trap should return need -8 to adjust for rtsd r15, 8 */
+        la      r15, r0, ret_from_exc-8
+        la      r5, r1, PTO             /* parameter struct pt_regs * regs */
+        mfs     r6, rear                /* parameter unsigned long address */
+        nop
+        mfs     r7, resr                /* parameter unsigned long error_code */
+        nop
+        la      r12, r0, do_page_fault
+        set_vms;
+        rtbd    r12, 0; /* interrupts enabled */
+        nop;
+
+C_ENTRY(page_fault_instr_trap):
+        swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
+        SAVE_STATE              /* Save registers.*/
+        /* where the trap should return need -8 to adjust for rtsd r15, 8 */
+        la      r15, r0, ret_from_exc-8
+        la      r5, r1, PTO             /* parameter struct pt_regs * regs */
+        mfs     r6, rear                /* parameter unsigned long address */
+        nop
+        ori     r7, r0, 0               /* parameter unsigned long error_code */
+        la      r12, r0, do_page_fault
+        set_vms;
+        rtbd    r12, 0; /* interrupts enabled */
+        nop;
+
+/* Entry point used to return from an exception.  */
+C_ENTRY(ret_from_exc):
+        set_bip;                        /*  Ints masked for state restore*/
+        lwi     r11, r1, PTO+PT_MODE;
+        bnei    r11, 2f;                /* See if returning to kernel mode, */
+                                        /* ... if so, skip resched &c.  */
+
+        /* We're returning to user mode, so check for various conditions that
+           trigger rescheduling. */
+        /* Get current task ptr into r11 */
+        add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
+        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
+        andi    r11, r11, _TIF_NEED_RESCHED;
+        beqi    r11, 5f;
+
+/* Call the scheduler before returning from a syscall/trap. */
+        bralid  r15, schedule;  /* Call scheduler */
+        nop;                            /* delay slot */
+
+        /* Maybe handle a signal */
+5:      add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
+        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
+        andi    r11, r11, _TIF_SIGPENDING;
+        beqi    r11, 1f;                /* Signals to handle, handle them */
+
+        /*
+         * Handle a signal return; Pending signals should be in r18.
+         *
+         * Not all registers are saved by the normal trap/interrupt entry
+         * points (for instance, call-saved registers (because the normal
+         * C-compiler calling sequence in the kernel makes sure they're
+         * preserved), and call-clobbered registers in the case of
+         * traps), but signal handlers may want to examine or change the
+         * complete register state.  Here we save anything not saved by
+         * the normal entry sequence, so that it may be safely restored
+         * (in a possibly modified form) after do_signal returns.
+         * store return registers separately because this macros is use
+         * for others exceptions */
+        swi     r3, r1, PTO + PT_R3;
+        swi     r4, r1, PTO + PT_R4;
+        la      r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
+        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
+        addi    r7, r0, 0;              /* Arg 3: int in_syscall */
+        bralid  r15, do_signal; /* Handle any signals */
+        nop;
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+
+/* Finally, return to user state.  */
+1:      swi     r0, r0, PER_CPU(KM);    /* Now officially in user state. */
+        add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
+        swi     r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
+        VM_OFF;
+        tophys(r1,r1);
+
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+        RESTORE_REGS;
+        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+
+        lwi     r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
+        bri     6f;
+/* Return to kernel state.  */
+2:      VM_OFF;
+        tophys(r1,r1);
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+        RESTORE_REGS;
+        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+
+        tovirt(r1,r1);
+6:
+EXC_return:             /* Make global symbol for debugging */
+        rtbd    r14, 0; /* Instructions to return from an IRQ */
+        nop;
+
+/*
+ * HW EXCEPTION rutine end
+ */
+
+/*
+ * Hardware maskable interrupts.
+ *
+ * The stack-pointer (r1) should have already been saved to the memory
+ * location PER_CPU(ENTRY_SP).
+ */
+C_ENTRY(_interrupt):
+/* MS: we are in physical address */
+/* Save registers, switch to proper stack, convert SP to virtual.*/
+        swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
+        swi     r11, r0, TOPHYS(PER_CPU(R11_SAVE));
+        /* MS: See if already in kernel mode. */
+        lwi     r11, r0, TOPHYS(PER_CPU(KM));
+        beqi    r11, 1f; /* MS: Jump ahead if coming from user */
+
+/* Kernel-mode state save. */
+        or      r11, r1, r0
+        tophys(r1,r11); /* MS: I have in r1 physical address where stack is */
+/* MS: Save original SP - position PT_R1 to next stack frame 4 *1 - 152*/
+        swi     r11, r1, (PT_R1 - PT_SIZE);
+/* MS: restore r11 because of saving in SAVE_REGS */
+        lwi     r11, r0, TOPHYS(PER_CPU(R11_SAVE));
+        /* save registers */
+/* MS: Make room on the stack -> activation record */
+        addik   r1, r1, -STATE_SAVE_SIZE;
+/* MS: store return registers separately because
+ * this macros is use for others exceptions */
+        swi     r3, r1, PTO + PT_R3;
+        swi     r4, r1, PTO + PT_R4;
+        SAVE_REGS
+        /* MS: store mode */
+        addi    r11, r0, 1; /* MS: Was in kernel-mode. */
+        swi     r11, r1, PTO + PT_MODE; /* MS: and save it */
+        brid    2f;
+        nop; /* MS: Fill delay slot */
+
+1:
+/* User-mode state save. */
+/* MS: restore r11 -> FIXME move before SAVE_REG */
+        lwi     r11, r0, TOPHYS(PER_CPU(R11_SAVE));
+ /* MS: get the saved current */
+        lwi     r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
+        tophys(r1,r1);
+        lwi     r1, r1, TS_THREAD_INFO;
+        addik   r1, r1, THREAD_SIZE;
+        tophys(r1,r1);
+        /* save registers */
+        addik   r1, r1, -STATE_SAVE_SIZE;
+        swi     r3, r1, PTO+PT_R3;
+        swi     r4, r1, PTO+PT_R4;
+        SAVE_REGS
+        /* calculate mode */
+        swi     r0, r1, PTO + PT_MODE;
+        lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
+        swi     r11, r1, PTO+PT_R1;
+        /* setup kernel mode to KM */
+        addi    r11, r0, 1;
+        swi     r11, r0, TOPHYS(PER_CPU(KM));
+
+2:
+        lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
+        swi     r0, r1, PTO + PT_R0;
+        tovirt(r1,r1)
+        la      r5, r1, PTO;
+        set_vms;
+        la      r11, r0, do_IRQ;
+        la      r15, r0, irq_call;
+irq_call:rtbd   r11, 0;
+        nop;
+
+/* MS: we are in virtual mode */
+ret_from_irq:
+        lwi     r11, r1, PTO + PT_MODE;
+        bnei    r11, 2f;
+
+        add     r11, r0, CURRENT_TASK;
+        lwi     r11, r11, TS_THREAD_INFO;
+        lwi     r11, r11, TI_FLAGS; /* MS: get flags from thread info */
+        andi    r11, r11, _TIF_NEED_RESCHED;
+        beqi    r11, 5f
+        bralid  r15, schedule;
+        nop; /* delay slot */
+
+    /* Maybe handle a signal */
+5:      add     r11, r0, CURRENT_TASK;
+        lwi     r11, r11, TS_THREAD_INFO; /* MS: get thread info */
+        lwi     r11, r11, TI_FLAGS; /* get flags in thread info */
+        andi    r11, r11, _TIF_SIGPENDING;
+        beqid   r11, no_intr_resched
+/* Handle a signal return; Pending signals should be in r18. */
+        addi    r7, r0, 0; /* Arg 3: int in_syscall */
+        la      r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
+        bralid  r15, do_signal; /* Handle any signals */
+        add     r6, r0, r0; /* Arg 2: sigset_t *oldset */
+
+/* Finally, return to user state. */
+no_intr_resched:
+    /* Disable interrupts, we are now committed to the state restore */
+        disable_irq
+        swi     r0, r0, PER_CPU(KM); /* MS: Now officially in user state. */
+        add     r11, r0, CURRENT_TASK;
+        swi     r11, r0, PER_CPU(CURRENT_SAVE);
+        VM_OFF;
+        tophys(r1,r1);
+        lwi     r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */
+        lwi     r4, r1, PTO + PT_R4;
+        RESTORE_REGS
+        addik   r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
+        lwi     r1, r1, PT_R1 - PT_SIZE;
+        bri     6f;
+/* MS: Return to kernel state. */
+2:      VM_OFF /* MS: turn off MMU */
+        tophys(r1,r1)
+        lwi     r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */
+        lwi     r4, r1, PTO + PT_R4;
+        RESTORE_REGS
+        addik   r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
+        tovirt(r1,r1);
+6:
+IRQ_return: /* MS: Make global symbol for debugging */
+        rtid    r14, 0
+        nop
+
+/*
+ * `Debug' trap
+ *  We enter dbtrap in "BIP" (breakpoint) mode.
+ *  So we exit the breakpoint mode with an 'rtbd' and proceed with the
+ *  original dbtrap.
+ *  however, wait to save state first
+ */
+C_ENTRY(_debug_exception):
+        /* BIP bit is set on entry, no interrupts can occur */
+        swi     r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
+
+        swi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */
+        set_bip;        /*equalize initial state for all possible entries*/
+        clear_eip;
+        enable_irq;
+        lwi     r11, r0, TOPHYS(PER_CPU(KM));/* See if already in kernel mode.*/
+        beqi    r11, 1f;                /* Jump ahead if coming from user */
+        /* Kernel-mode state save.  */
+        lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
+        tophys(r1,r11);
+        swi     r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */
+        lwi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
+
+        addik   r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack.  */
+        swi     r3, r1, PTO + PT_R3;
+        swi     r4, r1, PTO + PT_R4;
+        SAVE_REGS;
+
+        addi    r11, r0, 1;             /* Was in kernel-mode.  */
+        swi     r11, r1, PTO + PT_MODE;
+        brid    2f;
+        nop;                            /* Fill delay slot */
+1:      /* User-mode state save.  */
+        lwi     r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
+        lwi     r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
+        tophys(r1,r1);
+        lwi     r1, r1, TS_THREAD_INFO; /* get the thread info */
+        addik   r1, r1, THREAD_SIZE;    /* calculate kernel stack pointer */
+        tophys(r1,r1);
+
+        addik   r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack.  */
+        swi     r3, r1, PTO + PT_R3;
+        swi     r4, r1, PTO + PT_R4;
+        SAVE_REGS;
+
+        swi     r0, r1, PTO+PT_MODE; /* Was in user-mode.  */
+        lwi     r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
+        swi     r11, r1, PTO+PT_R1; /* Store user SP.  */
+        addi    r11, r0, 1;
+        swi     r11, r0, TOPHYS(PER_CPU(KM));   /* Now we're in kernel-mode.  */
+2:      lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
+        /* Save away the syscall number.  */
+        swi     r0, r1, PTO+PT_R0;
+        tovirt(r1,r1)
+
+        addi    r5, r0, SIGTRAP              /* send the trap signal */
+        add     r6, r0, CURRENT_TASK; /* Get current task ptr into r11 */
+        addk    r7, r0, r0                   /* 3rd param zero */
+
+        set_vms;
+        la      r11, r0, send_sig;
+        la      r15, r0, dbtrap_call;
+dbtrap_call:    rtbd    r11, 0;
+        nop;
+
+        set_bip;                        /*  Ints masked for state restore*/
+        lwi     r11, r1, PTO+PT_MODE;
+        bnei    r11, 2f;
+
+        /* Get current task ptr into r11 */
+        add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
+        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
+        andi    r11, r11, _TIF_NEED_RESCHED;
+        beqi    r11, 5f;
+
+/* Call the scheduler before returning from a syscall/trap. */
+
+        bralid  r15, schedule;  /* Call scheduler */
+        nop;                            /* delay slot */
+        /* XXX Is PT_DTRACE handling needed here? */
+        /* XXX m68knommu also checks TASK_STATE & TASK_COUNTER here.  */
+
+        /* Maybe handle a signal */
+5:      add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
+        lwi     r11, r11, TS_THREAD_INFO;       /* get thread info */
+        lwi     r11, r11, TI_FLAGS;     /* get flags in thread info */
+        andi    r11, r11, _TIF_SIGPENDING;
+        beqi    r11, 1f;                /* Signals to handle, handle them */
+
+/* Handle a signal return; Pending signals should be in r18.  */
+        /* Not all registers are saved by the normal trap/interrupt entry
+           points (for instance, call-saved registers (because the normal
+           C-compiler calling sequence in the kernel makes sure they're
+           preserved), and call-clobbered registers in the case of
+           traps), but signal handlers may want to examine or change the
+           complete register state.  Here we save anything not saved by
+           the normal entry sequence, so that it may be safely restored
+           (in a possibly modified form) after do_signal returns.  */
+
+        la      r5, r1, PTO;            /* Arg 1: struct pt_regs *regs */
+        add     r6, r0, r0;             /* Arg 2: sigset_t *oldset */
+        addi  r7, r0, 0;        /* Arg 3: int in_syscall */
+        bralid  r15, do_signal; /* Handle any signals */
+        nop;
+
+
+/* Finally, return to user state.  */
+1:      swi     r0, r0, PER_CPU(KM);    /* Now officially in user state. */
+        add     r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
+        swi     r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
+        VM_OFF;
+        tophys(r1,r1);
+
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+        RESTORE_REGS
+        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+
+
+        lwi     r1, r1, PT_R1 - PT_SIZE;
+                                        /* Restore user stack pointer. */
+        bri     6f;
+
+/* Return to kernel state.  */
+2:      VM_OFF;
+        tophys(r1,r1);
+        lwi     r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
+        lwi     r4, r1, PTO+PT_R4;
+        RESTORE_REGS
+        addik   r1, r1, STATE_SAVE_SIZE         /* Clean up stack space.  */
+
+        tovirt(r1,r1);
+6:
+DBTRAP_return:          /* Make global symbol for debugging */
+        rtbd    r14, 0; /* Instructions to return from an IRQ */
+        nop;
+
+
+
+ENTRY(_switch_to)
+        /* prepare return value */
+        addk    r3, r0, r31
+
+        /* save registers in cpu_context */
+        /* use r11 and r12, volatile registers, as temp register */
+        /* give start of cpu_context for previous process */
+        addik   r11, r5, TI_CPU_CONTEXT
+        swi     r1, r11, CC_R1
+        swi     r2, r11, CC_R2
+        /* skip volatile registers.
+         * they are saved on stack when we jumped to _switch_to() */
+        /* dedicated registers */
+        swi     r13, r11, CC_R13
+        swi     r14, r11, CC_R14
+        swi     r15, r11, CC_R15
+        swi     r16, r11, CC_R16
+        swi     r17, r11, CC_R17
+        swi     r18, r11, CC_R18
+        /* save non-volatile registers */
+        swi     r19, r11, CC_R19
+        swi     r20, r11, CC_R20
+        swi     r21, r11, CC_R21
+        swi     r22, r11, CC_R22
+        swi     r23, r11, CC_R23
+        swi     r24, r11, CC_R24
+        swi     r25, r11, CC_R25
+        swi     r26, r11, CC_R26
+        swi     r27, r11, CC_R27
+        swi     r28, r11, CC_R28
+        swi     r29, r11, CC_R29
+        swi     r30, r11, CC_R30
+        /* special purpose registers */
+        mfs     r12, rmsr
+        nop
+        swi     r12, r11, CC_MSR
+        mfs     r12, rear
+        nop
+        swi     r12, r11, CC_EAR
+        mfs     r12, resr
+        nop
+        swi     r12, r11, CC_ESR
+        mfs     r12, rfsr
+        nop
+        swi     r12, r11, CC_FSR
+
+        /* update r31, the current */
+        lwi     r31, r6, TI_TASK/* give me pointer to task which will be next */
+        /* stored it to current_save too */
+        swi     r31, r0, PER_CPU(CURRENT_SAVE)
+
+        /* get new process' cpu context and restore */
+        /* give me start where start context of next task */
+        addik   r11, r6, TI_CPU_CONTEXT
+
+        /* non-volatile registers */
+        lwi     r30, r11, CC_R30
+        lwi     r29, r11, CC_R29
+        lwi     r28, r11, CC_R28
+        lwi     r27, r11, CC_R27
+        lwi     r26, r11, CC_R26
+        lwi     r25, r11, CC_R25
+        lwi     r24, r11, CC_R24
+        lwi     r23, r11, CC_R23
+        lwi     r22, r11, CC_R22
+        lwi     r21, r11, CC_R21
+        lwi     r20, r11, CC_R20
+        lwi     r19, r11, CC_R19
+        /* dedicated registers */
+        lwi     r18, r11, CC_R18
+        lwi     r17, r11, CC_R17
+        lwi     r16, r11, CC_R16
+        lwi     r15, r11, CC_R15
+        lwi     r14, r11, CC_R14
+        lwi     r13, r11, CC_R13
+        /* skip volatile registers */
+        lwi     r2, r11, CC_R2
+        lwi     r1, r11, CC_R1
+
+        /* special purpose registers */
+        lwi     r12, r11, CC_FSR
+        mts     rfsr, r12
+        nop
+        lwi     r12, r11, CC_MSR
+        mts     rmsr, r12
+        nop
+
+        rtsd    r15, 8
+        nop
+
+ENTRY(_reset)
+        brai    0x70; /* Jump back to FS-boot */
+
+ENTRY(_break)
+        mfs     r5, rmsr
+        nop
+        swi     r5, r0, 0x250 + TOPHYS(r0_ram)
+        mfs     r5, resr
+        nop
+        swi     r5, r0, 0x254 + TOPHYS(r0_ram)
+        bri     0
+
+        /* These are compiled and loaded into high memory, then
+         * copied into place in mach_early_setup */
+        .section        .init.ivt, "ax"
+        .org    0x0
+        /* this is very important - here is the reset vector */
+        /* in current MMU branch you don't care what is here - it is
+         * used from bootloader site - but this is correct for FS-BOOT */
+        brai    0x70
+        nop
+        brai    TOPHYS(_user_exception); /* syscall handler */
+        brai    TOPHYS(_interrupt);     /* Interrupt handler */
+        brai    TOPHYS(_break);         /* nmi trap handler */
+        brai    TOPHYS(_hw_exception_handler);  /* HW exception handler */
+
+        .org    0x60
+        brai    TOPHYS(_debug_exception);       /* debug trap handler*/
+
+.section .rodata,"a"
+#include "syscall_table.S"
+
+syscall_table_size=(.-sys_call_table)
+
diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c
index 4a8a4064c7ee..0cb64a31e89a 100644
--- a/arch/microblaze/kernel/exceptions.c
+++ b/arch/microblaze/kernel/exceptions.c
@@ -21,9 +21,9 @@
 
 #include <asm/exceptions.h>
 #include <asm/entry.h>          /* For KM CPU var */
-#include <asm/uaccess.h>
-#include <asm/errno.h>
-#include <asm/ptrace.h>
+#include <linux/uaccess.h>
+#include <linux/errno.h>
+#include <linux/ptrace.h>
 #include <asm/current.h>
 
 #define MICROBLAZE_ILL_OPCODE_EXCEPTION 0x02
@@ -31,7 +31,7 @@
 #define MICROBLAZE_DBUS_EXCEPTION       0x04
 #define MICROBLAZE_DIV_ZERO_EXCEPTION   0x05
 #define MICROBLAZE_FPU_EXCEPTION        0x06
-#define MICROBLAZE_PRIVILEG_EXCEPTION   0x07
+#define MICROBLAZE_PRIVILEGED_EXCEPTION 0x07
 
 static DEFINE_SPINLOCK(die_lock);
 
@@ -66,6 +66,11 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
 asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                                                         int fsr, int addr)
 {
+#ifdef CONFIG_MMU
+        int code;
+        addr = regs->pc;
+#endif
+
 #if 0
         printk(KERN_WARNING "Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n",
                         type, user_mode(regs) ? "user" : "kernel", fsr,
@@ -74,7 +79,13 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
 
         switch (type & 0x1F) {
         case MICROBLAZE_ILL_OPCODE_EXCEPTION:
-                _exception(SIGILL, regs, ILL_ILLOPC, addr);
+                if (user_mode(regs)) {
+                        printk(KERN_WARNING "Illegal opcode exception in user mode.\n");
+                        _exception(SIGILL, regs, ILL_ILLOPC, addr);
+                        return;
+                }
+                printk(KERN_WARNING "Illegal opcode exception in kernel mode.\n");
+                die("opcode exception", regs, SIGBUS);
                 break;
         case MICROBLAZE_IBUS_EXCEPTION:
                 if (user_mode(regs)) {
@@ -95,11 +106,16 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                 die("bus exception", regs, SIGBUS);
                 break;
         case MICROBLAZE_DIV_ZERO_EXCEPTION:
-                printk(KERN_WARNING "Divide by zero exception\n");
-                _exception(SIGILL, regs, ILL_ILLOPC, addr);
+                if (user_mode(regs)) {
+                        printk(KERN_WARNING "Divide by zero exception in user mode\n");
+                        _exception(SIGILL, regs, ILL_ILLOPC, addr);
+                        return;
+                }
+                printk(KERN_WARNING "Divide by zero exception in kernel mode.\n");
+                die("Divide by exception", regs, SIGBUS);
                 break;
-
         case MICROBLAZE_FPU_EXCEPTION:
+                printk(KERN_WARNING "FPU exception\n");
                 /* IEEE FP exception */
                 /* I removed fsr variable and use code var for storing fsr */
                 if (fsr & FSR_IO)
@@ -115,7 +131,20 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
                 _exception(SIGFPE, regs, fsr, addr);
                 break;
 
+#ifdef CONFIG_MMU
+        case MICROBLAZE_PRIVILEGED_EXCEPTION:
+                printk(KERN_WARNING "Privileged exception\n");
+                /* "brk r0,r0" - used as debug breakpoint */
+                if (get_user(code, (unsigned long *)regs->pc) == 0
+                        && code == 0x980c0000) {
+                        _exception(SIGTRAP, regs, TRAP_BRKPT, addr);
+                } else {
+                        _exception(SIGILL, regs, ILL_PRVOPC, addr);
+                }
+                break;
+#endif
         default:
+        /* FIXME what to do in unexpected exception */
                 printk(KERN_WARNING "Unexpected exception %02x "
                         "PC=%08x in %s mode\n", type, (unsigned int) addr,
                         kernel_mode(regs) ? "kernel" : "user");
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 319dc35fc922..e568d6ec621b 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -3,6 +3,26 @@
  * Copyright (C) 2007-2009 PetaLogix
  * Copyright (C) 2006 Atmark Techno, Inc.
  *
+ * MMU code derived from arch/ppc/kernel/head_4xx.S:
+ *    Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
+ *      Initial PowerPC version.
+ *    Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
+ *      Rewritten for PReP
+ *    Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
+ *      Low-level exception handers, MMU support, and rewrite.
+ *    Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
+ *      PowerPC 8xx modifications.
+ *    Copyright (c) 1998-1999 TiVo, Inc.
+ *      PowerPC 403GCX modifications.
+ *    Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
+ *      PowerPC 403GCX/405GP modifications.
+ *    Copyright 2000 MontaVista Software Inc.
+ *      PPC405 modifications
+ *      PowerPC 403GCX/405GP modifications.
+ *      Author: MontaVista Software, Inc.
+ *              frank_rowand@mvista.com or source@mvista.com
+ *              debbie_chu@mvista.com
+ *
  * This file is subject to the terms and conditions of the GNU General Public
  * License. See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -12,6 +32,22 @@
 #include <asm/thread_info.h>
 #include <asm/page.h>
 
+#ifdef CONFIG_MMU
+#include <asm/setup.h> /* COMMAND_LINE_SIZE */
+#include <asm/mmu.h>
+#include <asm/processor.h>
+
+.data
+.global empty_zero_page
+.align 12
+empty_zero_page:
+        .space  4096
+.global swapper_pg_dir
+swapper_pg_dir:
+        .space  4096
+
+#endif /* CONFIG_MMU */
+
         .text
 ENTRY(_start)
         mfs     r1, rmsr
@@ -32,6 +68,123 @@ _copy_fdt:
         addik   r3, r3, -4 /* descrement loop */
 no_fdt_arg:
 
+#ifdef CONFIG_MMU
+
+#ifndef CONFIG_CMDLINE_BOOL
+/*
+ * handling command line
+ * copy command line to __init_end. There is space for storing command line.
+ */
+        or      r6, r0, r0              /* incremment */
+        ori     r4, r0, __init_end      /* load address of command line */
+        tophys(r4,r4)                   /* convert to phys address */
+        ori     r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */
+_copy_command_line:
+        lbu     r7, r5, r6 /* r7=r5+r6 - r5 contain pointer to command line */
+        sb      r7, r4, r6              /* addr[r4+r6]= r7*/
+        addik   r6, r6, 1               /* increment counting */
+        bgtid   r3, _copy_command_line  /* loop for all entries       */
+        addik   r3, r3, -1              /* descrement loop */
+        addik   r5, r4, 0               /* add new space for command line */
+        tovirt(r5,r5)
+#endif /* CONFIG_CMDLINE_BOOL */
+
+#ifdef NOT_COMPILE
+/* save bram context */
+        or      r6, r0, r0                              /* incremment */
+        ori     r4, r0, TOPHYS(_bram_load_start)        /* save bram context */
+        ori     r3, r0, (LMB_SIZE - 4)
+_copy_bram:
+        lw      r7, r0, r6              /* r7 = r0 + r6 */
+        sw      r7, r4, r6              /* addr[r4 + r6] = r7*/
+        addik   r6, r6, 4               /* increment counting */
+        bgtid   r3, _copy_bram          /* loop for all entries */
+        addik   r3, r3, -4              /* descrement loop */
+#endif
+        /* We have to turn on the MMU right away. */
+
+        /*
+         * Set up the initial MMU state so we can do the first level of
+         * kernel initialization.  This maps the first 16 MBytes of memory 1:1
+         * virtual to physical.
+         */
+        nop
+        addik   r3, r0, 63              /* Invalidate all TLB entries */
+_invalidate:
+        mts     rtlbx, r3
+        mts     rtlbhi, r0                      /* flush: ensure V is clear   */
+        bgtid   r3, _invalidate         /* loop for all entries       */
+        addik   r3, r3, -1
+        /* sync */
+
+        /*
+         * We should still be executing code at physical address area
+         * RAM_BASEADDR at this point. However, kernel code is at
+         * a virtual address. So, set up a TLB mapping to cover this once
+         * translation is enabled.
+         */
+
+        addik   r3,r0, CONFIG_KERNEL_START /* Load the kernel virtual address */
+        tophys(r4,r3)                   /* Load the kernel physical address */
+
+        mts     rpid,r0                 /* Load the kernel PID */
+        nop
+        bri     4
+
+        /*
+         * Configure and load two entries into TLB slots 0 and 1.
+         * In case we are pinning TLBs, these are reserved in by the
+         * other TLB functions.  If not reserving, then it doesn't
+         * matter where they are loaded.
+         */
+        andi    r4,r4,0xfffffc00        /* Mask off the real page number */
+        ori     r4,r4,(TLB_WR | TLB_EX) /* Set the write and execute bits */
+
+        andi    r3,r3,0xfffffc00        /* Mask off the effective page number */
+        ori     r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M))
+
+        mts     rtlbx,r0                /* TLB slow 0 */
+
+        mts     rtlblo,r4               /* Load the data portion of the entry */
+        mts     rtlbhi,r3               /* Load the tag portion of the entry */
+
+        addik   r4, r4, 0x01000000      /* Map next 16 M entries */
+        addik   r3, r3, 0x01000000
+
+        ori     r6,r0,1                 /* TLB slot 1 */
+        mts     rtlbx,r6
+
+        mts     rtlblo,r4               /* Load the data portion of the entry */
+        mts     rtlbhi,r3               /* Load the tag portion of the entry */
+
+        /*
+         * Load a TLB entry for LMB, since we need access to
+         * the exception vectors, using a 4k real==virtual mapping.
+         */
+        ori     r6,r0,3                 /* TLB slot 3 */
+        mts     rtlbx,r6
+
+        ori     r4,r0,(TLB_WR | TLB_EX)
+        ori     r3,r0,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K))
+
+        mts     rtlblo,r4               /* Load the data portion of the entry */
+        mts     rtlbhi,r3               /* Load the tag portion of the entry */
+
+        /*
+         * We now have the lower 16 Meg of RAM mapped into TLB entries, and the
+         * caches ready to work.
+         */
+turn_on_mmu:
+        ori     r15,r0,start_here
+        ori     r4,r0,MSR_KERNEL_VMS
+        mts     rmsr,r4
+        nop
+        rted    r15,0                   /* enables MMU */
+        nop
+
+start_here:
+#endif /* CONFIG_MMU */
+
         /* Initialize small data anchors */
         la      r13, r0, _KERNEL_SDA_BASE_
         la      r2, r0, _KERNEL_SDA2_BASE_
@@ -51,6 +204,43 @@ no_fdt_arg:
         brald   r15, r8
         nop
 
+#ifndef CONFIG_MMU
         la      r15, r0, machine_halt
         braid   start_kernel
         nop
+#else
+        /*
+         * Initialize the MMU.
+         */
+        bralid  r15, mmu_init
+        nop
+
+        /* Go back to running unmapped so we can load up new values
+         * and change to using our exception vectors.
+         * On the MicroBlaze, all we invalidate the used TLB entries to clear
+         * the old 16M byte TLB mappings.
+         */
+        ori     r15,r0,TOPHYS(kernel_load_context)
+        ori     r4,r0,MSR_KERNEL
+        mts     rmsr,r4
+        nop
+        bri     4
+        rted    r15,0
+        nop
+
+        /* Load up the kernel context */
+kernel_load_context:
+        # Keep entry 0 and 1 valid. Entry 3 mapped to LMB can go away.
+        ori     r5,r0,3
+        mts     rtlbx,r5
+        nop
+        mts     rtlbhi,r0
+        nop
+        addi    r15, r0, machine_halt
+        ori     r17, r0, start_kernel
+        ori     r4, r0, MSR_KERNEL_VMS
+        mts     rmsr, r4
+        nop
+        rted    r17, 0          /* enable MMU and jump to start_kernel */
+        nop
+#endif /* CONFIG_MMU */
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index cf9486d99838..9d591cd74fc2 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -53,6 +53,12 @@
  *   - Illegal instruction opcode
  *   - Divide-by-zero
  *
+ *   - Privileged instruction exception (MMU)
+ *   - Data storage exception (MMU)
+ *   - Instruction storage exception (MMU)
+ *   - Data TLB miss exception (MMU)
+ *   - Instruction TLB miss exception (MMU)
+ *
  * Note we disable interrupts during exception handling, otherwise we will
  * possibly get multiple re-entrancy if interrupt handles themselves cause
  * exceptions. JW
@@ -71,9 +77,24 @@
 #include <asm/asm-offsets.h>
 
 /* Helpful Macros */
+#ifndef CONFIG_MMU
 #define EX_HANDLER_STACK_SIZ    (4*19)
+#endif
 #define NUM_TO_REG(num)         r ## num
 
+#ifdef CONFIG_MMU
+/* FIXME you can't change first load of MSR because there is
+ * hardcoded jump bri 4 */
+        #define RESTORE_STATE                   \
+                lwi     r3, r1, PT_R3;          \
+                lwi     r4, r1, PT_R4;          \
+                lwi     r5, r1, PT_R5;          \
+                lwi     r6, r1, PT_R6;          \
+                lwi     r11, r1, PT_R11;        \
+                lwi     r31, r1, PT_R31;        \
+                lwi     r1, r0, TOPHYS(r0_ram + 0);
+#endif /* CONFIG_MMU */
+
 #define LWREG_NOP                       \
         bri     ex_handler_unhandled;   \
         nop;
@@ -106,6 +127,54 @@
         or      r3, r0, NUM_TO_REG (regnum);            \
         bri     ex_sw_tail;
 
+#ifdef CONFIG_MMU
+        #define R3_TO_LWREG_VM_V(regnum)                \
+                brid    ex_lw_end_vm;                   \
+                swi     r3, r7, 4 * regnum;
+
+        #define R3_TO_LWREG_VM(regnum)                  \
+                brid    ex_lw_end_vm;                   \
+                or      NUM_TO_REG (regnum), r0, r3;
+
+        #define SWREG_TO_R3_VM_V(regnum)                \
+                brid    ex_sw_tail_vm;                  \
+                lwi     r3, r7, 4 * regnum;
+
+        #define SWREG_TO_R3_VM(regnum)                  \
+                brid    ex_sw_tail_vm;                  \
+                or      r3, r0, NUM_TO_REG (regnum);
+
+        /* Shift right instruction depending on available configuration */
+        #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL > 0
+        #define BSRLI(rD, rA, imm)      \
+                bsrli rD, rA, imm
+        #elif CONFIG_XILINX_MICROBLAZE0_USE_DIV > 0
+        #define BSRLI(rD, rA, imm)      \
+                ori rD, r0, (1 << imm); \
+                idivu rD, rD, rA
+        #else
+        #define BSRLI(rD, rA, imm) BSRLI ## imm (rD, rA)
+        /* Only the used shift constants defined here - add more if needed */
+        #define BSRLI2(rD, rA)                          \
+                srl rD, rA;             /* << 1 */      \
+                srl rD, rD;             /* << 2 */
+        #define BSRLI10(rD, rA)                         \
+                srl rD, rA;             /* << 1 */      \
+                srl rD, rD;             /* << 2 */      \
+                srl rD, rD;             /* << 3 */      \
+                srl rD, rD;             /* << 4 */      \
+                srl rD, rD;             /* << 5 */      \
+                srl rD, rD;             /* << 6 */      \
+                srl rD, rD;             /* << 7 */      \
+                srl rD, rD;             /* << 8 */      \
+                srl rD, rD;             /* << 9 */      \
+                srl rD, rD              /* << 10 */
+        #define BSRLI20(rD, rA)         \
+                BSRLI10(rD, rA);        \
+                BSRLI10(rD, rD)
+        #endif
+#endif /* CONFIG_MMU */
+
 .extern other_exception_handler /* Defined in exception.c */
 
 /*
@@ -163,34 +232,119 @@
 
 /* wrappers to restore state before coming to entry.S */
 
+#ifdef CONFIG_MMU
+.section .rodata
+.align 4
+_MB_HW_ExceptionVectorTable:
+/*  0 - Undefined */
+        .long   TOPHYS(ex_handler_unhandled)
+/*  1 - Unaligned data access exception */
+        .long   TOPHYS(handle_unaligned_ex)
+/*  2 - Illegal op-code exception */
+        .long   TOPHYS(full_exception_trapw)
+/*  3 - Instruction bus error exception */
+        .long   TOPHYS(full_exception_trapw)
+/*  4 - Data bus error exception */
+        .long   TOPHYS(full_exception_trapw)
+/*  5 - Divide by zero exception */
+        .long   TOPHYS(full_exception_trapw)
+/*  6 - Floating point unit exception */
+        .long   TOPHYS(full_exception_trapw)
+/*  7 - Privileged instruction exception */
+        .long   TOPHYS(full_exception_trapw)
+/*  8 - 15 - Undefined */
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+/* 16 - Data storage exception */
+        .long   TOPHYS(handle_data_storage_exception)
+/* 17 - Instruction storage exception */
+        .long   TOPHYS(handle_instruction_storage_exception)
+/* 18 - Data TLB miss exception */
+        .long   TOPHYS(handle_data_tlb_miss_exception)
+/* 19 - Instruction TLB miss exception */
+        .long   TOPHYS(handle_instruction_tlb_miss_exception)
+/* 20 - 31 - Undefined */
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+        .long   TOPHYS(ex_handler_unhandled)
+#endif
+
 .global _hw_exception_handler
 .section .text
 .align 4
 .ent _hw_exception_handler
 _hw_exception_handler:
+#ifndef CONFIG_MMU
         addik   r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */
+#else
+        swi     r1, r0, TOPHYS(r0_ram + 0); /* GET_SP */
+        /* Save date to kernel memory. Here is the problem
+         * when you came from user space */
+        ori     r1, r0, TOPHYS(r0_ram + 28);
+#endif
         swi     r3, r1, PT_R3
         swi     r4, r1, PT_R4
         swi     r5, r1, PT_R5
         swi     r6, r1, PT_R6
 
-        mfs     r5, rmsr;
-        nop
-        swi     r5, r1, 0;
-        mfs     r4, rbtr        /* Save BTR before jumping to handler */
-        nop
+#ifdef CONFIG_MMU
+        swi     r11, r1, PT_R11
+        swi     r31, r1, PT_R31
+        lwi     r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)) /* get saved current */
+#endif
+
         mfs     r3, resr
         nop
+        mfs     r4, rear;
+        nop
 
+#ifndef CONFIG_MMU
         andi    r5, r3, 0x1000;         /* Check ESR[DS] */
         beqi    r5, not_in_delay_slot;  /* Branch if ESR[DS] not set */
         mfs     r17, rbtr;      /* ESR[DS] set - return address in BTR */
         nop
 not_in_delay_slot:
         swi     r17, r1, PT_R17
+#endif
 
         andi    r5, r3, 0x1F;           /* Extract ESR[EXC] */
 
+#ifdef CONFIG_MMU
+        /* Calculate exception vector offset = r5 << 2 */
+        addk    r6, r5, r5; /* << 1 */
+        addk    r6, r6, r6; /* << 2 */
+
+/* counting which exception happen */
+        lwi     r5, r0, 0x200 + TOPHYS(r0_ram)
+        addi    r5, r5, 1
+        swi     r5, r0, 0x200 + TOPHYS(r0_ram)
+        lwi     r5, r6, 0x200 + TOPHYS(r0_ram)
+        addi    r5, r5, 1
+        swi     r5, r6, 0x200 + TOPHYS(r0_ram)
+/* end */
+        /* Load the HW Exception vector */
+        lwi     r6, r6, TOPHYS(_MB_HW_ExceptionVectorTable)
+        bra     r6
+
+full_exception_trapw:
+        RESTORE_STATE
+        bri     full_exception_trap
+#else
         /* Exceptions enabled here. This will allow nested exceptions */
         mfs     r6, rmsr;
         nop
@@ -254,6 +408,7 @@ handle_other_ex: /* Handle Other exceptions here */
         lwi     r18, r1, PT_R18
 
         bri     ex_handler_done; /* Complete exception handling */
+#endif
 
 /* 0x01 - Unaligned data access exception
  * This occurs when a word access is not aligned on a word boundary,
@@ -265,11 +420,28 @@ handle_other_ex: /* Handle Other exceptions here */
 handle_unaligned_ex:
         /* Working registers already saved: R3, R4, R5, R6
          *  R3 = ESR
-         *  R4 = BTR
+         *  R4 = EAR
          */
-        mfs     r4, rear;
+#ifdef CONFIG_MMU
+        andi    r6, r3, 0x1000                  /* Check ESR[DS] */
+        beqi    r6, _no_delayslot               /* Branch if ESR[DS] not set */
+        mfs     r17, rbtr;      /* ESR[DS] set - return address in BTR */
         nop
+_no_delayslot:
+#endif
+
+#ifdef CONFIG_MMU
+        /* Check if unaligned address is last on a 4k page */
+                andi    r5, r4, 0xffc
+                xori    r5, r5, 0xffc
+                bnei    r5, _unaligned_ex2
+        _unaligned_ex1:
+                RESTORE_STATE;
+/* Another page must be accessed or physical address not in page table */
+                bri     unaligned_data_trap
 
+        _unaligned_ex2:
+#endif
         andi    r6, r3, 0x3E0; /* Mask and extract the register operand */
         srl     r6, r6; /* r6 >> 5 */
         srl     r6, r6;
@@ -278,6 +450,45 @@ handle_unaligned_ex:
         srl     r6, r6;
         /* Store the register operand in a temporary location */
         sbi     r6, r0, TOPHYS(ex_reg_op);
+#ifdef CONFIG_MMU
+        /* Get physical address */
+        /* If we are faulting a kernel address, we have to use the
+         * kernel page tables.
+         */
+        ori     r5, r0, CONFIG_KERNEL_START
+        cmpu    r5, r4, r5
+        bgti    r5, _unaligned_ex3
+        ori     r5, r0, swapper_pg_dir
+        bri     _unaligned_ex4
+
+        /* Get the PGD for the current thread. */
+_unaligned_ex3: /* user thread */
+        addi    r5 ,CURRENT_TASK, TOPHYS(0); /* get current task address */
+        lwi     r5, r5, TASK_THREAD + PGDIR
+_unaligned_ex4:
+        tophys(r5,r5)
+        BSRLI(r6,r4,20)                 /* Create L1 (pgdir/pmd) address */
+        andi    r6, r6, 0xffc
+/* Assume pgdir aligned on 4K boundary, no need for "andi r5,r5,0xfffff003" */
+        or      r5, r5, r6
+        lwi     r6, r5, 0               /* Get L1 entry */
+        andi    r5, r6, 0xfffff000      /* Extract L2 (pte) base address. */
+        beqi    r5, _unaligned_ex1      /* Bail if no table */
+
+        tophys(r5,r5)
+        BSRLI(r6,r4,10)                 /* Compute PTE address */
+        andi    r6, r6, 0xffc
+        andi    r5, r5, 0xfffff003
+        or      r5, r5, r6
+        lwi     r5, r5, 0               /* Get Linux PTE */
+
+        andi    r6, r5, _PAGE_PRESENT
+        beqi    r6, _unaligned_ex1      /* Bail if no page */
+
+        andi    r5, r5, 0xfffff000      /* Extract RPN */
+        andi    r4, r4, 0x00000fff      /* Extract offset */
+        or      r4, r4, r5              /* Create physical address */
+#endif /* CONFIG_MMU */
 
         andi    r6, r3, 0x400; /* Extract ESR[S] */
         bnei    r6, ex_sw;
@@ -355,6 +566,7 @@ ex_shw:
 ex_sw_end: /* Exception handling of store word, ends. */
 
 ex_handler_done:
+#ifndef CONFIG_MMU
         lwi     r5, r1, 0 /* RMSR */
         mts     rmsr, r5
         nop
@@ -366,13 +578,455 @@ ex_handler_done:
 
         rted    r17, 0
         addik   r1, r1, (EX_HANDLER_STACK_SIZ); /* Restore stack frame */
+#else
+        RESTORE_STATE;
+        rted    r17, 0
+        nop
+#endif
+
+#ifdef CONFIG_MMU
+        /* Exception vector entry code. This code runs with address translation
+         * turned off (i.e. using physical addresses). */
+
+        /* Exception vectors. */
+
+        /* 0x10 - Data Storage Exception
+         * This happens for just a few reasons. U0 set (but we don't do that),
+         * or zone protection fault (user violation, write to protected page).
+         * If this is just an update of modified status, we do that quickly
+         * and exit. Otherwise, we call heavyweight functions to do the work.
+         */
+        handle_data_storage_exception:
+                /* Working registers already saved: R3, R4, R5, R6
+                 * R3 = ESR
+                 */
+                mfs     r11, rpid
+                nop
+                bri     4
+                mfs     r3, rear                /* Get faulting address */
+                nop
+                /* If we are faulting a kernel address, we have to use the
+                 * kernel page tables.
+                 */
+                ori     r4, r0, CONFIG_KERNEL_START
+                cmpu    r4, r3, r4
+                bgti    r4, ex3
+                /* First, check if it was a zone fault (which means a user
+                 * tried to access a kernel or read-protected page - always
+                 * a SEGV). All other faults here must be stores, so no
+                 * need to check ESR_S as well. */
+                mfs     r4, resr
+                nop
+                andi    r4, r4, 0x800           /* ESR_Z - zone protection */
+                bnei    r4, ex2
+
+                ori     r4, r0, swapper_pg_dir
+                mts     rpid, r0                /* TLB will have 0 TID */
+                nop
+                bri     ex4
+
+                /* Get the PGD for the current thread. */
+        ex3:
+                /* First, check if it was a zone fault (which means a user
+                 * tried to access a kernel or read-protected page - always
+                 * a SEGV). All other faults here must be stores, so no
+                 * need to check ESR_S as well. */
+                mfs     r4, resr
+                nop
+                andi    r4, r4, 0x800           /* ESR_Z */
+                bnei    r4, ex2
+                /* get current task address */
+                addi    r4 ,CURRENT_TASK, TOPHYS(0);
+                lwi     r4, r4, TASK_THREAD+PGDIR
+        ex4:
+                tophys(r4,r4)
+                BSRLI(r5,r3,20)         /* Create L1 (pgdir/pmd) address */
+                andi    r5, r5, 0xffc
+/* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */
+                or      r4, r4, r5
+                lwi     r4, r4, 0               /* Get L1 entry */
+                andi    r5, r4, 0xfffff000 /* Extract L2 (pte) base address */
+                beqi    r5, ex2                 /* Bail if no table */
+
+                tophys(r5,r5)
+                BSRLI(r6,r3,10)                 /* Compute PTE address */
+                andi    r6, r6, 0xffc
+                andi    r5, r5, 0xfffff003
+                or      r5, r5, r6
+                lwi     r4, r5, 0               /* Get Linux PTE */
+
+                andi    r6, r4, _PAGE_RW        /* Is it writeable? */
+                beqi    r6, ex2                 /* Bail if not */
+
+                /* Update 'changed' */
+                ori     r4, r4, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
+                swi     r4, r5, 0               /* Update Linux page table */
+
+                /* Most of the Linux PTE is ready to load into the TLB LO.
+                 * We set ZSEL, where only the LS-bit determines user access.
+                 * We set execute, because we don't have the granularity to
+                 * properly set this at the page level (Linux problem).
+                 * If shared is set, we cause a zero PID->TID load.
+                 * Many of these bits are software only. Bits we don't set
+                 * here we (properly should) assume have the appropriate value.
+                 */
+                andni   r4, r4, 0x0ce2          /* Make sure 20, 21 are zero */
+                ori     r4, r4, _PAGE_HWEXEC    /* make it executable */
+
+                /* find the TLB index that caused the fault. It has to be here*/
+                mts     rtlbsx, r3
+                nop
+                mfs     r5, rtlbx               /* DEBUG: TBD */
+                nop
+                mts     rtlblo, r4              /* Load TLB LO */
+                nop
+                                                /* Will sync shadow TLBs */
+
+                /* Done...restore registers and get out of here. */
+                mts     rpid, r11
+                nop
+                bri 4
+
+                RESTORE_STATE;
+                rted    r17, 0
+                nop
+        ex2:
+                /* The bailout. Restore registers to pre-exception conditions
+                 * and call the heavyweights to help us out. */
+                mts     rpid, r11
+                nop
+                bri 4
+                RESTORE_STATE;
+                bri     page_fault_data_trap
+
+
+        /* 0x11 - Instruction Storage Exception
+         * This is caused by a fetch from non-execute or guarded pages. */
+        handle_instruction_storage_exception:
+                /* Working registers already saved: R3, R4, R5, R6
+                 * R3 = ESR
+                 */
+
+                mfs     r3, rear                /* Get faulting address */
+                nop
+                RESTORE_STATE;
+                bri     page_fault_instr_trap
+
+        /* 0x12 - Data TLB Miss Exception
+         * As the name implies, translation is not in the MMU, so search the
+         * page tables and fix it. The only purpose of this function is to
+         * load TLB entries from the page table if they exist.
+         */
+        handle_data_tlb_miss_exception:
+                /* Working registers already saved: R3, R4, R5, R6
+                 * R3 = ESR
+                 */
+                mfs     r11, rpid
+                nop
+                bri     4
+                mfs     r3, rear                /* Get faulting address */
+                nop
+
+                /* If we are faulting a kernel address, we have to use the
+                 * kernel page tables. */
+                ori     r4, r0, CONFIG_KERNEL_START
+                cmpu    r4, r3, r4
+                bgti    r4, ex5
+                ori     r4, r0, swapper_pg_dir
+                mts     rpid, r0                /* TLB will have 0 TID */
+                nop
+                bri     ex6
 
+                /* Get the PGD for the current thread. */
+        ex5:
+                /* get current task address */
+                addi    r4 ,CURRENT_TASK, TOPHYS(0);
+                lwi     r4, r4, TASK_THREAD+PGDIR
+        ex6:
+                tophys(r4,r4)
+                BSRLI(r5,r3,20)         /* Create L1 (pgdir/pmd) address */
+                andi    r5, r5, 0xffc
+/* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */
+                or      r4, r4, r5
+                lwi     r4, r4, 0               /* Get L1 entry */
+                andi    r5, r4, 0xfffff000 /* Extract L2 (pte) base address */
+                beqi    r5, ex7                 /* Bail if no table */
+
+                tophys(r5,r5)
+                BSRLI(r6,r3,10)                 /* Compute PTE address */
+                andi    r6, r6, 0xffc
+                andi    r5, r5, 0xfffff003
+                or      r5, r5, r6
+                lwi     r4, r5, 0               /* Get Linux PTE */
+
+                andi    r6, r4, _PAGE_PRESENT
+                beqi    r6, ex7
+
+                ori     r4, r4, _PAGE_ACCESSED
+                swi     r4, r5, 0
+
+                /* Most of the Linux PTE is ready to load into the TLB LO.
+                 * We set ZSEL, where only the LS-bit determines user access.
+                 * We set execute, because we don't have the granularity to
+                 * properly set this at the page level (Linux problem).
+                 * If shared is set, we cause a zero PID->TID load.
+                 * Many of these bits are software only. Bits we don't set
+                 * here we (properly should) assume have the appropriate value.
+                 */
+                andni   r4, r4, 0x0ce2          /* Make sure 20, 21 are zero */
+
+                bri     finish_tlb_load
+        ex7:
+                /* The bailout. Restore registers to pre-exception conditions
+                 * and call the heavyweights to help us out.
+                 */
+                mts     rpid, r11
+                nop
+                bri     4
+                RESTORE_STATE;
+                bri     page_fault_data_trap
+
+        /* 0x13 - Instruction TLB Miss Exception
+         * Nearly the same as above, except we get our information from
+         * different registers and bailout to a different point.
+         */
+        handle_instruction_tlb_miss_exception:
+                /* Working registers already saved: R3, R4, R5, R6
+                 *  R3 = ESR
+                 */
+                mfs     r11, rpid
+                nop
+                bri     4
+                mfs     r3, rear                /* Get faulting address */
+                nop
+
+                /* If we are faulting a kernel address, we have to use the
+                 * kernel page tables.
+                 */
+                ori     r4, r0, CONFIG_KERNEL_START
+                cmpu    r4, r3, r4
+                bgti    r4, ex8
+                ori     r4, r0, swapper_pg_dir
+                mts     rpid, r0                /* TLB will have 0 TID */
+                nop
+                bri     ex9
+
+                /* Get the PGD for the current thread. */
+        ex8:
+                /* get current task address */
+                addi    r4 ,CURRENT_TASK, TOPHYS(0);
+                lwi     r4, r4, TASK_THREAD+PGDIR
+        ex9:
+                tophys(r4,r4)
+                BSRLI(r5,r3,20)         /* Create L1 (pgdir/pmd) address */
+                andi    r5, r5, 0xffc
+/* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */
+                or      r4, r4, r5
+                lwi     r4, r4, 0               /* Get L1 entry */
+                andi    r5, r4, 0xfffff000 /* Extract L2 (pte) base address */
+                beqi    r5, ex10                /* Bail if no table */
+
+                tophys(r5,r5)
+                BSRLI(r6,r3,10)                 /* Compute PTE address */
+                andi    r6, r6, 0xffc
+                andi    r5, r5, 0xfffff003
+                or      r5, r5, r6
+                lwi     r4, r5, 0               /* Get Linux PTE */
+
+                andi    r6, r4, _PAGE_PRESENT
+                beqi    r6, ex7
+
+                ori     r4, r4, _PAGE_ACCESSED
+                swi     r4, r5, 0
+
+                /* Most of the Linux PTE is ready to load into the TLB LO.
+                 * We set ZSEL, where only the LS-bit determines user access.
+                 * We set execute, because we don't have the granularity to
+                 * properly set this at the page level (Linux problem).
+                 * If shared is set, we cause a zero PID->TID load.
+                 * Many of these bits are software only. Bits we don't set
+                 * here we (properly should) assume have the appropriate value.
+                 */
+                andni   r4, r4, 0x0ce2          /* Make sure 20, 21 are zero */
+
+                bri     finish_tlb_load
+        ex10:
+                /* The bailout. Restore registers to pre-exception conditions
+                 * and call the heavyweights to help us out.
+                 */
+                mts     rpid, r11
+                nop
+                bri 4
+                RESTORE_STATE;
+                bri     page_fault_instr_trap
+
+/* Both the instruction and data TLB miss get to this point to load the TLB.
+ *      r3 - EA of fault
+ *      r4 - TLB LO (info from Linux PTE)
+ *      r5, r6 - available to use
+ *      PID - loaded with proper value when we get here
+ *      Upon exit, we reload everything and RFI.
+ * A common place to load the TLB.
+ */
+        tlb_index:
+                .long   1 /* MS: storing last used tlb index */
+        finish_tlb_load:
+                /* MS: load the last used TLB index. */
+                lwi     r5, r0, TOPHYS(tlb_index)
+                addik   r5, r5, 1 /* MS: inc tlb_index -> use next one */
+
+/* MS: FIXME this is potential fault, because this is mask not count */
+                andi    r5, r5, (MICROBLAZE_TLB_SIZE-1)
+                ori     r6, r0, 1
+                cmp     r31, r5, r6
+                blti    r31, sem
+                addik   r5, r6, 1
+        sem:
+                /* MS: save back current TLB index */
+                swi     r5, r0, TOPHYS(tlb_index)
+
+                ori     r4, r4, _PAGE_HWEXEC    /* make it executable */
+                mts     rtlbx, r5               /* MS: save current TLB */
+                nop
+                mts     rtlblo, r4              /* MS: save to TLB LO */
+                nop
+
+                /* Create EPN. This is the faulting address plus a static
+                 * set of bits. These are size, valid, E, U0, and ensure
+                 * bits 20 and 21 are zero.
+                 */
+                andi    r3, r3, 0xfffff000
+                ori     r3, r3, 0x0c0
+                mts     rtlbhi, r3              /* Load TLB HI */
+                nop
+
+                /* Done...restore registers and get out of here. */
+        ex12:
+                mts     rpid, r11
+                nop
+                bri 4
+                RESTORE_STATE;
+                rted    r17, 0
+                nop
+
+        /* extern void giveup_fpu(struct task_struct *prev)
+         *
+         * The MicroBlaze processor may have an FPU, so this should not just
+         * return: TBD.
+         */
+        .globl giveup_fpu;
+        .align 4;
+        giveup_fpu:
+                bralid  r15,0                   /* TBD */
+                nop
+
+        /* At present, this routine just hangs. - extern void abort(void) */
+        .globl abort;
+        .align 4;
+        abort:
+                br      r0
+
+        .globl set_context;
+        .align 4;
+        set_context:
+                mts     rpid, r5        /* Shadow TLBs are automatically */
+                nop
+                bri     4               /* flushed by changing PID */
+                rtsd    r15,8
+                nop
+
+#endif
 .end _hw_exception_handler
 
+#ifdef CONFIG_MMU
+/* Unaligned data access exception last on a 4k page for MMU.
+ * When this is called, we are in virtual mode with exceptions enabled
+ * and registers 1-13,15,17,18 saved.
+ *
+ * R3 = ESR
+ * R4 = EAR
+ * R7 = pointer to saved registers (struct pt_regs *regs)
+ *
+ * This handler perform the access, and returns via ret_from_exc.
+ */
+.global _unaligned_data_exception
+.ent _unaligned_data_exception
+_unaligned_data_exception:
+        andi    r8, r3, 0x3E0;  /* Mask and extract the register operand */
+        BSRLI(r8,r8,2);         /* r8 >> 2 = register operand * 8 */
+        andi    r6, r3, 0x400;  /* Extract ESR[S] */
+        bneid   r6, ex_sw_vm;
+        andi    r6, r3, 0x800;  /* Extract ESR[W] - delay slot */
+ex_lw_vm:
+        beqid   r6, ex_lhw_vm;
+        lbui    r5, r4, 0;      /* Exception address in r4 - delay slot */
+/* Load a word, byte-by-byte from destination address and save it in tmp space*/
+        la      r6, r0, ex_tmp_data_loc_0;
+        sbi     r5, r6, 0;
+        lbui    r5, r4, 1;
+        sbi     r5, r6, 1;
+        lbui    r5, r4, 2;
+        sbi     r5, r6, 2;
+        lbui    r5, r4, 3;
+        sbi     r5, r6, 3;
+        brid    ex_lw_tail_vm;
+/* Get the destination register value into r3 - delay slot */
+        lwi     r3, r6, 0;
+ex_lhw_vm:
+        /* Load a half-word, byte-by-byte from destination address and
+         * save it in tmp space */
+        la      r6, r0, ex_tmp_data_loc_0;
+        sbi     r5, r6, 0;
+        lbui    r5, r4, 1;
+        sbi     r5, r6, 1;
+        lhui    r3, r6, 0;      /* Get the destination register value into r3 */
+ex_lw_tail_vm:
+        /* Form load_word jump table offset (lw_table_vm + (8 * regnum)) */
+        addik   r5, r8, lw_table_vm;
+        bra     r5;
+ex_lw_end_vm:                   /* Exception handling of load word, ends */
+        brai    ret_from_exc;
+ex_sw_vm:
+/* Form store_word jump table offset (sw_table_vm + (8 * regnum)) */
+        addik   r5, r8, sw_table_vm;
+        bra     r5;
+ex_sw_tail_vm:
+        la      r5, r0, ex_tmp_data_loc_0;
+        beqid   r6, ex_shw_vm;
+        swi     r3, r5, 0;      /* Get the word - delay slot */
+        /* Store the word, byte-by-byte into destination address */
+        lbui    r3, r5, 0;
+        sbi     r3, r4, 0;
+        lbui    r3, r5, 1;
+        sbi     r3, r4, 1;
+        lbui    r3, r5, 2;
+        sbi     r3, r4, 2;
+        lbui    r3, r5, 3;
+        brid    ret_from_exc;
+        sbi     r3, r4, 3;      /* Delay slot */
+ex_shw_vm:
+        /* Store the lower half-word, byte-by-byte into destination address */
+        lbui    r3, r5, 2;
+        sbi     r3, r4, 0;
+        lbui    r3, r5, 3;
+        brid    ret_from_exc;
+        sbi     r3, r4, 1;      /* Delay slot */
+ex_sw_end_vm:                   /* Exception handling of store word, ends. */
+.end _unaligned_data_exception
+#endif /* CONFIG_MMU */
+
 ex_handler_unhandled:
 /* FIXME add handle function for unhandled exception - dump register */
         bri 0
 
+/*
+ * hw_exception_handler Jump Table
+ * - Contains code snippets for each register that caused the unalign exception
+ * - Hence exception handler is NOT self-modifying
+ * - Separate table for load exceptions and store exceptions.
+ * - Each table is of size: (8 * 32) = 256 bytes
+ */
+
 .section .text
 .align 4
 lw_table:
@@ -407,7 +1061,11 @@ lw_r27:		R3_TO_LWREG	(27);
 lw_r28:         R3_TO_LWREG     (28);
 lw_r29:         R3_TO_LWREG     (29);
 lw_r30:         R3_TO_LWREG     (30);
+#ifdef CONFIG_MMU
+lw_r31:         R3_TO_LWREG_V   (31);
+#else
 lw_r31:         R3_TO_LWREG     (31);
+#endif
 
 sw_table:
 sw_r0:          SWREG_TO_R3     (0);
@@ -441,7 +1099,81 @@ sw_r27:		SWREG_TO_R3	(27);
 sw_r28:         SWREG_TO_R3     (28);
 sw_r29:         SWREG_TO_R3     (29);
 sw_r30:         SWREG_TO_R3     (30);
+#ifdef CONFIG_MMU
+sw_r31:         SWREG_TO_R3_V   (31);
+#else
 sw_r31:         SWREG_TO_R3     (31);
+#endif
+
+#ifdef CONFIG_MMU
+lw_table_vm:
+lw_r0_vm:       R3_TO_LWREG_VM          (0);
+lw_r1_vm:       R3_TO_LWREG_VM_V        (1);
+lw_r2_vm:       R3_TO_LWREG_VM_V        (2);
+lw_r3_vm:       R3_TO_LWREG_VM_V        (3);
+lw_r4_vm:       R3_TO_LWREG_VM_V        (4);
+lw_r5_vm:       R3_TO_LWREG_VM_V        (5);
+lw_r6_vm:       R3_TO_LWREG_VM_V        (6);
+lw_r7_vm:       R3_TO_LWREG_VM_V        (7);
+lw_r8_vm:       R3_TO_LWREG_VM_V        (8);
+lw_r9_vm:       R3_TO_LWREG_VM_V        (9);
+lw_r10_vm:      R3_TO_LWREG_VM_V        (10);
+lw_r11_vm:      R3_TO_LWREG_VM_V        (11);
+lw_r12_vm:      R3_TO_LWREG_VM_V        (12);
+lw_r13_vm:      R3_TO_LWREG_VM_V        (13);
+lw_r14_vm:      R3_TO_LWREG_VM          (14);
+lw_r15_vm:      R3_TO_LWREG_VM_V        (15);
+lw_r16_vm:      R3_TO_LWREG_VM          (16);
+lw_r17_vm:      R3_TO_LWREG_VM_V        (17);
+lw_r18_vm:      R3_TO_LWREG_VM_V        (18);
+lw_r19_vm:      R3_TO_LWREG_VM          (19);
+lw_r20_vm:      R3_TO_LWREG_VM          (20);
+lw_r21_vm:      R3_TO_LWREG_VM          (21);
+lw_r22_vm:      R3_TO_LWREG_VM          (22);
+lw_r23_vm:      R3_TO_LWREG_VM          (23);
+lw_r24_vm:      R3_TO_LWREG_VM          (24);
+lw_r25_vm:      R3_TO_LWREG_VM          (25);
+lw_r26_vm:      R3_TO_LWREG_VM          (26);
+lw_r27_vm:      R3_TO_LWREG_VM          (27);
+lw_r28_vm:      R3_TO_LWREG_VM          (28);
+lw_r29_vm:      R3_TO_LWREG_VM          (29);
+lw_r30_vm:      R3_TO_LWREG_VM          (30);
+lw_r31_vm:      R3_TO_LWREG_VM_V        (31);
+
+sw_table_vm:
+sw_r0_vm:       SWREG_TO_R3_VM          (0);
+sw_r1_vm:       SWREG_TO_R3_VM_V        (1);
+sw_r2_vm:       SWREG_TO_R3_VM_V        (2);
+sw_r3_vm:       SWREG_TO_R3_VM_V        (3);
+sw_r4_vm:       SWREG_TO_R3_VM_V        (4);
+sw_r5_vm:       SWREG_TO_R3_VM_V        (5);
+sw_r6_vm:       SWREG_TO_R3_VM_V        (6);
+sw_r7_vm:       SWREG_TO_R3_VM_V        (7);
+sw_r8_vm:       SWREG_TO_R3_VM_V        (8);
+sw_r9_vm:       SWREG_TO_R3_VM_V        (9);
+sw_r10_vm:      SWREG_TO_R3_VM_V        (10);
+sw_r11_vm:      SWREG_TO_R3_VM_V        (11);
+sw_r12_vm:      SWREG_TO_R3_VM_V        (12);
+sw_r13_vm:      SWREG_TO_R3_VM_V        (13);
+sw_r14_vm:      SWREG_TO_R3_VM          (14);
+sw_r15_vm:      SWREG_TO_R3_VM_V        (15);
+sw_r16_vm:      SWREG_TO_R3_VM          (16);
+sw_r17_vm:      SWREG_TO_R3_VM_V        (17);
+sw_r18_vm:      SWREG_TO_R3_VM_V        (18);
+sw_r19_vm:      SWREG_TO_R3_VM          (19);
+sw_r20_vm:      SWREG_TO_R3_VM          (20);
+sw_r21_vm:      SWREG_TO_R3_VM          (21);
+sw_r22_vm:      SWREG_TO_R3_VM          (22);
+sw_r23_vm:      SWREG_TO_R3_VM          (23);
+sw_r24_vm:      SWREG_TO_R3_VM          (24);
+sw_r25_vm:      SWREG_TO_R3_VM          (25);
+sw_r26_vm:      SWREG_TO_R3_VM          (26);
+sw_r27_vm:      SWREG_TO_R3_VM          (27);
+sw_r28_vm:      SWREG_TO_R3_VM          (28);
+sw_r29_vm:      SWREG_TO_R3_VM          (29);
+sw_r30_vm:      SWREG_TO_R3_VM          (30);
+sw_r31_vm:      SWREG_TO_R3_VM_V        (31);
+#endif /* CONFIG_MMU */
 
 /* Temporary data structures used in the handler */
 .section .data
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c
index 5f71790e3c3c..59ff20e33e0c 100644
--- a/arch/microblaze/kernel/microblaze_ksyms.c
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -45,3 +45,5 @@ extern void __udivsi3(void);
 EXPORT_SYMBOL(__udivsi3);
 extern void __umodsi3(void);
 EXPORT_SYMBOL(__umodsi3);
+extern char *_ebss;
+EXPORT_SYMBOL_GPL(_ebss);
diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S
new file mode 100644
index 000000000000..df16c6287a8e
--- /dev/null
+++ b/arch/microblaze/kernel/misc.S
@@ -0,0 +1,120 @@
+/*
+ * Miscellaneous low-level MMU functions.
+ *
+ * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2008-2009 PetaLogix
+ * Copyright (C) 2007 Xilinx, Inc.  All rights reserved.
+ *
+ * Derived from arch/ppc/kernel/misc.S
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#include <linux/linkage.h>
+#include <linux/sys.h>
+#include <asm/unistd.h>
+#include <linux/errno.h>
+#include <asm/mmu.h>
+#include <asm/page.h>
+
+        .text
+/*
+ * Flush MMU TLB
+ *
+ * We avoid flushing the pinned 0, 1 and possibly 2 entries.
+ */
+.globl _tlbia;
+.align 4;
+_tlbia:
+        addik   r12, r0, 63 /* flush all entries (63 - 3) */
+        /* isync */
+_tlbia_1:
+        mts     rtlbx, r12
+        nop
+        mts     rtlbhi, r0 /* flush: ensure V is clear */
+        nop
+        addik   r11, r12, -2
+        bneid   r11, _tlbia_1 /* loop for all entries */
+        addik   r12, r12, -1
+        /* sync */
+        rtsd    r15, 8
+        nop
+
+/*
+ * Flush MMU TLB for a particular address (in r5)
+ */
+.globl _tlbie;
+.align 4;
+_tlbie:
+        mts     rtlbsx, r5 /* look up the address in TLB */
+        nop
+        mfs     r12, rtlbx /* Retrieve index */
+        nop
+        blti    r12, _tlbie_1 /* Check if found */
+        mts     rtlbhi, r0 /* flush: ensure V is clear */
+        nop
+_tlbie_1:
+        rtsd    r15, 8
+        nop
+
+/*
+ * Allocate TLB entry for early console
+ */
+.globl early_console_reg_tlb_alloc;
+.align 4;
+early_console_reg_tlb_alloc:
+        /*
+         * Load a TLB entry for the UART, so that microblaze_progress() can use
+         * the UARTs nice and early.  We use a 4k real==virtual mapping.
+         */
+        ori     r4, r0, 63
+        mts     rtlbx, r4 /* TLB slot 2 */
+
+        or      r4,r5,r0
+        andi    r4,r4,0xfffff000
+        ori     r4,r4,(TLB_WR|TLB_I|TLB_M|TLB_G)
+
+        andi    r5,r5,0xfffff000
+        ori     r5,r5,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K))
+
+        mts     rtlblo,r4 /* Load the data portion of the entry */
+        nop
+        mts     rtlbhi,r5 /* Load the tag portion of the entry */
+        nop
+        rtsd    r15, 8
+        nop
+
+/*
+ * Copy a whole page (4096 bytes).
+ */
+#define COPY_16_BYTES           \
+        lwi     r7, r6, 0;      \
+        lwi     r8, r6, 4;      \
+        lwi     r9, r6, 8;      \
+        lwi     r10, r6, 12;    \
+        swi     r7, r5, 0;      \
+        swi     r8, r5, 4;      \
+        swi     r9, r5, 8;      \
+        swi     r10, r5, 12
+
+
+/* FIXME DCACHE_LINE_BYTES (CONFIG_XILINX_MICROBLAZE0_DCACHE_LINE_LEN * 4)*/
+#define DCACHE_LINE_BYTES (4 * 4)
+
+.globl copy_page;
+.align 4;
+copy_page:
+        ori     r11, r0, (PAGE_SIZE/DCACHE_LINE_BYTES) - 1
+_copy_page_loop:
+        COPY_16_BYTES
+#if DCACHE_LINE_BYTES >= 32
+        COPY_16_BYTES
+#endif
+        addik   r6, r6, DCACHE_LINE_BYTES
+        addik   r5, r5, DCACHE_LINE_BYTES
+        bneid   r11, _copy_page_loop
+        addik   r11, r11, -1
+        rtsd    r15, 8
+        nop
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index 07d4fa339eda..00b12c6d5326 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -126,9 +126,54 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
         else
                 childregs->r1 = ((unsigned long) ti) + THREAD_SIZE;
 
+#ifndef CONFIG_MMU
         memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
         ti->cpu_context.r1 = (unsigned long)childregs;
         ti->cpu_context.msr = (unsigned long)childregs->msr;
+#else
+
+        /* if creating a kernel thread then update the current reg (we don't
+         * want to use the parent's value when restoring by POP_STATE) */
+        if (kernel_mode(regs))
+                /* save new current on stack to use POP_STATE */
+                childregs->CURRENT_TASK = (unsigned long)p;
+        /* if returning to user then use the parent's value of this register */
+
+        /* if we're creating a new kernel thread then just zeroing all
+         * the registers. That's OK for a brand new thread.*/
+        /* Pls. note that some of them will be restored in POP_STATE */
+        if (kernel_mode(regs))
+                memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
+        /* if this thread is created for fork/vfork/clone, then we want to
+         * restore all the parent's context */
+        /* in addition to the registers which will be restored by POP_STATE */
+        else {
+                ti->cpu_context = *(struct cpu_context *)regs;
+                childregs->msr |= MSR_UMS;
+        }
+
+        /* FIXME STATE_SAVE_PT_OFFSET; */
+        ti->cpu_context.r1  = (unsigned long)childregs - STATE_SAVE_ARG_SPACE;
+        /* we should consider the fact that childregs is a copy of the parent
+         * regs which were saved immediately after entering the kernel state
+         * before enabling VM. This MSR will be restored in switch_to and
+         * RETURN() and we want to have the right machine state there
+         * specifically this state must have INTs disabled before and enabled
+         * after performing rtbd
+         * compose the right MSR for RETURN(). It will work for switch_to also
+         * excepting for VM and UMS
+         * don't touch UMS , CARRY and cache bits
+         * right now MSR is a copy of parent one */
+        childregs->msr |= MSR_BIP;
+        childregs->msr &= ~MSR_EIP;
+        childregs->msr |= MSR_IE;
+        childregs->msr &= ~MSR_VM;
+        childregs->msr |= MSR_VMS;
+        childregs->msr |= MSR_EE; /* exceptions will be enabled*/
+
+        ti->cpu_context.msr = (childregs->msr|MSR_VM);
+        ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
+#endif
         ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
 
         if (clone_flags & CLONE_SETTLS)
@@ -137,6 +182,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
         return 0;
 }
 
+#ifndef CONFIG_MMU
 /*
  * Return saved PC of a blocked thread.
  */
@@ -151,6 +197,7 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
         else
                 return ctx->r14;
 }
+#endif
 
 static void kernel_thread_helper(int (*fn)(void *), void *arg)
 {
@@ -173,6 +220,7 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
                         &regs, 0, NULL, NULL);
 }
+EXPORT_SYMBOL_GPL(kernel_thread);
 
 unsigned long get_wchan(struct task_struct *p)
 {
@@ -188,3 +236,14 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
         regs->r1 = usp;
         regs->pt_mode = 0;
 }
+
+#ifdef CONFIG_MMU
+#include <linux/elfcore.h>
+/*
+ * Set up a thread for executing a new program
+ */
+int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
+{
+        return 0; /* MicroBlaze has no separate FPU registers */
+}
+#endif /* CONFIG_MMU */
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index 34c48718061a..c005cc6f1aaf 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -509,12 +509,13 @@ static void __init early_init_dt_check_for_initrd(unsigned long node)
 
         prop = of_get_flat_dt_prop(node, "linux,initrd-start", &l);
         if (prop) {
-                initrd_start = (unsigned long)__va(of_read_ulong(prop, l/4));
+                initrd_start = (unsigned long)
+                                        __va((u32)of_read_ulong(prop, l/4));
 
                 prop = of_get_flat_dt_prop(node, "linux,initrd-end", &l);
                 if (prop) {
                         initrd_end = (unsigned long)
-                                        __va(of_read_ulong(prop, l/4));
+                                        __va((u32)of_read_ulong(prop, 1/4));
                         initrd_below_start_ok = 1;
                 } else {
                         initrd_start = 0;
@@ -563,7 +564,9 @@ static int __init early_init_dt_scan_chosen(unsigned long node,
                 strlcpy(cmd_line, p, min((int)l, COMMAND_LINE_SIZE));
 
 #ifdef CONFIG_CMDLINE
+#ifndef CONFIG_CMDLINE_FORCE
         if (p == NULL || l == 0 || (l == 1 && (*p) == 0))
+#endif
                 strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
 #endif /* CONFIG_CMDLINE */
 
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index eb6b41758e23..8709bea09604 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -42,10 +42,6 @@ char cmd_line[COMMAND_LINE_SIZE];
 
 void __init setup_arch(char **cmdline_p)
 {
-#ifdef CONFIG_CMDLINE_FORCE
-        strlcpy(cmd_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
-        strlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
-#endif
         *cmdline_p = cmd_line;
 
         console_verbose();
@@ -102,14 +98,34 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
 {
         unsigned long *src, *dst = (unsigned long *)0x0;
 
+        /* If CONFIG_MTD_UCLINUX is defined, assume ROMFS is at the
+         * end of kernel. There are two position which we want to check.
+         * The first is __init_end and the second __bss_start.
+         */
+#ifdef CONFIG_MTD_UCLINUX
+        int romfs_size;
+        unsigned int romfs_base;
+        char *old_klimit = klimit;
+
+        romfs_base = (ram ? ram : (unsigned int)&__init_end);
+        romfs_size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
+        if (!romfs_size) {
+                romfs_base = (unsigned int)&__bss_start;
+                romfs_size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
+        }
+
+        /* Move ROMFS out of BSS before clearing it */
+        if (romfs_size > 0) {
+                memmove(&_ebss, (int *)romfs_base, romfs_size);
+                klimit += romfs_size;
+        }
+#endif
+
 /* clearing bss section */
         memset(__bss_start, 0, __bss_stop-__bss_start);
         memset(_ssbss, 0, _esbss-_ssbss);
 
-        /*
-         * Copy command line passed from bootloader, or use default
-         * if none provided, or forced
-         */
+        /* Copy command line passed from bootloader */
 #ifndef CONFIG_CMDLINE_BOOL
         if (cmdline && cmdline[0] != '\0')
                 strlcpy(cmd_line, cmdline, COMMAND_LINE_SIZE);
@@ -126,27 +142,15 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
         printk(KERN_NOTICE "Found FDT at 0x%08x\n", fdt);
 
 #ifdef CONFIG_MTD_UCLINUX
-        {
-                int size;
-                unsigned int romfs_base;
-                romfs_base = (ram ? ram : (unsigned int)&__init_end);
-                /* if CONFIG_MTD_UCLINUX_EBSS is defined, assume ROMFS is at the
-                 * end of kernel, which is ROMFS_LOCATION defined above. */
-                size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
-                early_printk("Found romfs @ 0x%08x (0x%08x)\n",
-                                romfs_base, size);
-                early_printk("#### klimit %p ####\n", klimit);
-                BUG_ON(size < 0); /* What else can we do? */
-
-                /* Use memmove to handle likely case of memory overlap */
-                early_printk("Moving 0x%08x bytes from 0x%08x to 0x%08x\n",
-                        size, romfs_base, (unsigned)&_ebss);
-                memmove(&_ebss, (int *)romfs_base, size);
-
-                /* update klimit */
-                klimit += PAGE_ALIGN(size);
-                early_printk("New klimit: 0x%08x\n", (unsigned)klimit);
-        }
+        early_printk("Found romfs @ 0x%08x (0x%08x)\n",
+                        romfs_base, romfs_size);
+        early_printk("#### klimit %p ####\n", old_klimit);
+        BUG_ON(romfs_size < 0); /* What else can we do? */
+
+        early_printk("Moved 0x%08x bytes from 0x%08x to 0x%08x\n",
+                        romfs_size, romfs_base, (unsigned)&_ebss);
+
+        early_printk("New klimit: 0x%08x\n", (unsigned)klimit);
 #endif
 
         for (src = __ivt_start; src < __ivt_end; src++, dst++)
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index 40d36931e363..4c0e6521b114 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -152,8 +152,8 @@ struct rt_sigframe {
         unsigned long tramp[2]; /* signal trampoline */
 };
 
-static int
-restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *rval_p)
+static int restore_sigcontext(struct pt_regs *regs,
+                                struct sigcontext __user *sc, int *rval_p)
 {
         unsigned int err = 0;
 
@@ -211,11 +211,10 @@ badframe:
 
 asmlinkage int sys_rt_sigreturn(struct pt_regs *regs)
 {
-        struct rt_sigframe *frame =
-                        (struct rt_sigframe *)(regs->r1 + STATE_SAVE_ARG_SPACE);
+        struct rt_sigframe __user *frame =
+                (struct rt_sigframe __user *)(regs->r1 + STATE_SAVE_ARG_SPACE);
 
         sigset_t set;
-        stack_t st;
         int rval;
 
         if (!access_ok(VERIFY_READ, frame, sizeof(*frame)))
@@ -233,11 +232,10 @@ asmlinkage int sys_rt_sigreturn(struct pt_regs *regs)
         if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &rval))
                 goto badframe;
 
-        if (__copy_from_user((void *)&st, &frame->uc.uc_stack, sizeof(st)))
-                goto badframe;
         /* It is more difficult to avoid calling this function than to
          call it and ignore errors. */
-        do_sigaltstack(&st, NULL, regs->r1);
+        if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->r1))
+                goto badframe;
 
         return rval;
 
@@ -251,7 +249,7 @@ badframe:
  */
 
 static int
-setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
+setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
                 unsigned long mask)
 {
         int err = 0;
@@ -278,7 +276,7 @@ setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
 /*
  * Determine which stack to use..
  */
-static inline void *
+static inline void __user *
 get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
 {
         /* Default to using normal stack */
@@ -287,87 +285,13 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
         if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && !on_sig_stack(sp))
                 sp = current->sas_ss_sp + current->sas_ss_size;
 
-        return (void *)((sp - frame_size) & -8UL);
-}
-
-static void setup_frame(int sig, struct k_sigaction *ka,
-                        sigset_t *set, struct pt_regs *regs)
-{
-        struct sigframe *frame;
-        int err = 0;
-        int signal;
-
-        frame = get_sigframe(ka, regs, sizeof(*frame));
-
-        if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
-                goto give_sigsegv;
-
-        signal = current_thread_info()->exec_domain
-                && current_thread_info()->exec_domain->signal_invmap
-                && sig < 32
-                ? current_thread_info()->exec_domain->signal_invmap[sig]
-                : sig;
-
-        err |= setup_sigcontext(&frame->sc, regs, set->sig[0]);
-
-        if (_NSIG_WORDS > 1) {
-                err |= __copy_to_user(frame->extramask, &set->sig[1],
-                                        sizeof(frame->extramask));
-        }
-
-        /* Set up to return from userspace. If provided, use a stub
-         already in userspace. */
-        /* minus 8 is offset to cater for "rtsd r15,8" offset */
-        if (ka->sa.sa_flags & SA_RESTORER) {
-                regs->r15 = ((unsigned long)ka->sa.sa_restorer)-8;
-        } else {
-                /* Note, these encodings are _big endian_! */
-
-                /* addi r12, r0, __NR_sigreturn */
-                err |= __put_user(0x31800000 | __NR_sigreturn ,
-                                frame->tramp + 0);
-                /* brki r14, 0x8 */
-                err |= __put_user(0xb9cc0008, frame->tramp + 1);
-
-                /* Return from sighandler will jump to the tramp.
-                 Negative 8 offset because return is rtsd r15, 8 */
-                regs->r15 = ((unsigned long)frame->tramp)-8;
-
-                __invalidate_cache_sigtramp((unsigned long)frame->tramp);
-        }
-
-        if (err)
-                goto give_sigsegv;
-
-        /* Set up registers for signal handler */
-        regs->r1 = (unsigned long) frame - STATE_SAVE_ARG_SPACE;
-
-        /* Signal handler args: */
-        regs->r5 = signal; /* Arg 0: signum */
-        regs->r6 = (unsigned long) &frame->sc; /* arg 1: sigcontext */
-
-        /* Offset of 4 to handle microblaze rtid r14, 0 */
-        regs->pc = (unsigned long)ka->sa.sa_handler;
-
-        set_fs(USER_DS);
-
-#ifdef DEBUG_SIG
-        printk(KERN_INFO "SIG deliver (%s:%d): sp=%p pc=%08lx\n",
-                current->comm, current->pid, frame, regs->pc);
-#endif
-
-        return;
-
-give_sigsegv:
-        if (sig == SIGSEGV)
-                ka->sa.sa_handler = SIG_DFL;
-        force_sig(SIGSEGV, current);
+        return (void __user *)((sp - frame_size) & -8UL);
 }
 
 static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                         sigset_t *set, struct pt_regs *regs)
 {
-        struct rt_sigframe *frame;
+        struct rt_sigframe __user *frame;
         int err = 0;
         int signal;
 
@@ -382,7 +306,8 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
                 ? current_thread_info()->exec_domain->signal_invmap[sig]
                 : sig;
 
-        err |= copy_siginfo_to_user(&frame->info, info);
+        if (info)
+                err |= copy_siginfo_to_user(&frame->info, info);
 
         /* Create the ucontext. */
         err |= __put_user(0, &frame->uc.uc_flags);
@@ -463,7 +388,15 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
         case -ERESTARTNOINTR:
 do_restart:
                 /* offset of 4 bytes to re-execute trap (brki) instruction */
+#ifndef CONFIG_MMU
                 regs->pc -= 4;
+#else
+                /* offset of 8 bytes required = 4 for rtbd
+                   offset, plus 4 for size of
+                        "brki r14,8"
+                   instruction. */
+                regs->pc -= 8;
+#endif
                 break;
         }
 }
@@ -480,7 +413,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
         if (ka->sa.sa_flags & SA_SIGINFO)
                 setup_rt_frame(sig, ka, info, oldset, regs);
         else
-                setup_frame(sig, ka, oldset, regs);
+                setup_rt_frame(sig, ka, NULL, oldset, regs);
 
         if (ka->sa.sa_flags & SA_ONESHOT)
                 ka->sa.sa_handler = SIG_DFL;
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index 3bb42ec924c2..376d1789f7c0 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -2,7 +2,11 @@ ENTRY(sys_call_table)
         .long sys_restart_syscall       /* 0 - old "setup()" system call,
                                          * used for restarting */
         .long sys_exit
-        .long sys_ni_syscall            /* was fork */
+#ifdef CONFIG_MMU
+        .long sys_fork_wrapper
+#else
+        .long sys_ni_syscall
+#endif
         .long sys_read
         .long sys_write
         .long sys_open                  /* 5 */
diff --git a/arch/microblaze/kernel/traps.c b/arch/microblaze/kernel/traps.c
index 293ef486013a..eaaaf805f31b 100644
--- a/arch/microblaze/kernel/traps.c
+++ b/arch/microblaze/kernel/traps.c
@@ -22,14 +22,6 @@ void trap_init(void)
         __enable_hw_exceptions();
 }
 
-void __bad_xchg(volatile void *ptr, int size)
-{
-        printk(KERN_INFO "xchg: bad data size: pc 0x%p, ptr 0x%p, size %d\n",
-                __builtin_return_address(0), ptr, size);
-        BUG();
-}
-EXPORT_SYMBOL(__bad_xchg);
-
 static int kstack_depth_to_print = 24;
 
 static int __init kstack_setup(char *s)
@@ -105,3 +97,37 @@ void dump_stack(void)
         show_stack(NULL, NULL);
 }
 EXPORT_SYMBOL(dump_stack);
+
+#ifdef CONFIG_MMU
+void __bug(const char *file, int line, void *data)
+{
+        if (data)
+                printk(KERN_CRIT "kernel BUG at %s:%d (data = %p)!\n",
+                        file, line, data);
+        else
+                printk(KERN_CRIT "kernel BUG at %s:%d!\n", file, line);
+
+        machine_halt();
+}
+
+int bad_trap(int trap_num, struct pt_regs *regs)
+{
+        printk(KERN_CRIT
+                "unimplemented trap %d called at 0x%08lx, pid %d!\n",
+                trap_num, regs->pc, current->pid);
+        return -ENOSYS;
+}
+
+int debug_trap(struct pt_regs *regs)
+{
+        int i;
+        printk(KERN_CRIT "debug trap\n");
+        for (i = 0; i < 32; i++) {
+                /* printk("r%i:%08X\t",i,regs->gpr[i]); */
+                if ((i % 4) == 3)
+                        printk(KERN_CRIT "\n");
+        }
+        printk(KERN_CRIT "pc:%08lX\tmsr:%08lX\n", regs->pc, regs->msr);
+        return -ENOSYS;
+}
+#endif
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index 840385e51291..8ae807ab7a51 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -17,8 +17,7 @@ ENTRY(_start)
 jiffies = jiffies_64 + 4;
 
 SECTIONS {
-        . = CONFIG_KERNEL_BASE_ADDR;
-
+        . = CONFIG_KERNEL_START;
         .text : {
                 _text = . ;
                 _stext = . ;
@@ -132,6 +131,8 @@ SECTIONS {
                 __con_initcall_end = .;
         }
 
+        SECURITY_INIT
+
         __init_end_before_initramfs = .;
 
         .init.ramfs ALIGN(4096) : {
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile
index d27126bf306a..71c8cb6c9e43 100644
--- a/arch/microblaze/lib/Makefile
+++ b/arch/microblaze/lib/Makefile
@@ -10,4 +10,5 @@ else
 lib-y += memcpy.o memmove.o
 endif
 
-lib-y +=  uaccess.o
+lib-$(CONFIG_NO_MMU) += uaccess.o
+lib-$(CONFIG_MMU) += uaccess_old.o
diff --git a/arch/microblaze/lib/checksum.c b/arch/microblaze/lib/checksum.c
index 809340070a13..f08e74591418 100644
--- a/arch/microblaze/lib/checksum.c
+++ b/arch/microblaze/lib/checksum.c
@@ -32,9 +32,10 @@
 /* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access
  kills, so most of the assembly has to go. */
 
-#include <net/checksum.h>
-#include <asm/checksum.h>
 #include <linux/module.h>
+#include <net/checksum.h>
+
+#include <asm/byteorder.h>
 
 static inline unsigned short from32to16(unsigned long x)
 {
@@ -102,6 +103,7 @@ __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
 {
         return (__force __sum16)~do_csum(iph, ihl*4);
 }
+EXPORT_SYMBOL(ip_fast_csum);
 
 /*
  * computes the checksum of a memory block at buff, length len,
@@ -115,15 +117,16 @@ __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
  *
  * it's best to have buff aligned on a 32-bit boundary
  */
-__wsum csum_partial(const void *buff, int len, __wsum sum)
+__wsum csum_partial(const void *buff, int len, __wsum wsum)
 {
+        unsigned int sum = (__force unsigned int)wsum;
         unsigned int result = do_csum(buff, len);
 
         /* add in old sum, and carry.. */
         result += sum;
         if (sum > result)
                 result += 1;
-        return result;
+        return (__force __wsum)result;
 }
 EXPORT_SYMBOL(csum_partial);
 
@@ -131,9 +134,9 @@ EXPORT_SYMBOL(csum_partial);
  * this routine is used for miscellaneous IP-like checksums, mainly
  * in icmp.c
  */
-__sum16 ip_compute_csum(const unsigned char *buff, int len)
+__sum16 ip_compute_csum(const void *buff, int len)
 {
-        return ~do_csum(buff, len);
+        return (__force __sum16)~do_csum(buff, len);
 }
 EXPORT_SYMBOL(ip_compute_csum);
 
@@ -141,12 +144,18 @@ EXPORT_SYMBOL(ip_compute_csum);
  * copy from fs while checksumming, otherwise like csum_partial
  */
 __wsum
-csum_partial_copy_from_user(const char __user *src, char *dst, int len,
-                                                int sum, int *csum_err)
+csum_partial_copy_from_user(const void __user *src, void *dst, int len,
+                                                __wsum sum, int *csum_err)
 {
-        if (csum_err)
+        int missing;
+
+        missing = __copy_from_user(dst, src, len);
+        if (missing) {
+                memset(dst + len - missing, 0, missing);
+                *csum_err = -EFAULT;
+        } else
                 *csum_err = 0;
-        memcpy(dst, src, len);
+
         return csum_partial(dst, len, sum);
 }
 EXPORT_SYMBOL(csum_partial_copy_from_user);
@@ -155,7 +164,7 @@ EXPORT_SYMBOL(csum_partial_copy_from_user);
  * copy from ds while checksumming, otherwise like csum_partial
  */
 __wsum
-csum_partial_copy(const char *src, char *dst, int len, int sum)
+csum_partial_copy(const void *src, void *dst, int len, __wsum sum)
 {
         memcpy(dst, src, len);
         return csum_partial(dst, len, sum);
diff --git a/arch/microblaze/lib/memcpy.c b/arch/microblaze/lib/memcpy.c
index 5880119c4487..6a907c58a4bc 100644
--- a/arch/microblaze/lib/memcpy.c
+++ b/arch/microblaze/lib/memcpy.c
@@ -154,8 +154,3 @@ void *memcpy(void *v_dst, const void *v_src, __kernel_size_t c)
 }
 EXPORT_SYMBOL(memcpy);
 #endif /* __HAVE_ARCH_MEMCPY */
-
-void *cacheable_memcpy(void *d, const void *s, __kernel_size_t c)
-{
-        return memcpy(d, s, c);
-}
diff --git a/arch/microblaze/lib/uaccess_old.S b/arch/microblaze/lib/uaccess_old.S
new file mode 100644
index 000000000000..67f991c14b8a
--- /dev/null
+++ b/arch/microblaze/lib/uaccess_old.S
@@ -0,0 +1,135 @@
+/*
+ * Copyright (C) 2009 Michal Simek <monstr@monstr.eu>
+ * Copyright (C) 2009 PetaLogix
+ * Copyright (C) 2007 LynuxWorks, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/errno.h>
+#include <linux/linkage.h>
+
+/*
+ * int __strncpy_user(char *to, char *from, int len);
+ *
+ * Returns:
+ *  -EFAULT  for an exception
+ *  len      if we hit the buffer limit
+ *  bytes copied
+ */
+
+        .text
+.globl __strncpy_user;
+.align 4;
+__strncpy_user:
+
+        /*
+         * r5 - to
+         * r6 - from
+         * r7 - len
+         * r3 - temp count
+         * r4 - temp val
+         */
+        addik   r3,r7,0         /* temp_count = len */
+        beqi    r3,3f
+1:
+        lbu     r4,r6,r0
+        sb      r4,r5,r0
+
+        addik   r3,r3,-1
+        beqi    r3,2f           /* break on len */
+
+        addik   r5,r5,1
+        bneid   r4,1b
+        addik   r6,r6,1         /* delay slot */
+        addik   r3,r3,1         /* undo "temp_count--" */
+2:
+        rsubk   r3,r3,r7        /* temp_count = len - temp_count */
+3:
+        rtsd    r15,8
+        nop
+
+
+        .section        .fixup, "ax"
+        .align  2
+4:
+        brid    3b
+        addik   r3,r0, -EFAULT
+
+        .section        __ex_table, "a"
+        .word   1b,4b
+
+/*
+ * int __strnlen_user(char __user *str, int maxlen);
+ *
+ * Returns:
+ *  0 on error
+ *  maxlen + 1  if no NUL byte found within maxlen bytes
+ *  size of the string (including NUL byte)
+ */
+
+        .text
+.globl __strnlen_user;
+.align 4;
+__strnlen_user:
+        addik   r3,r6,0
+        beqi    r3,3f
+1:
+        lbu     r4,r5,r0
+        beqid   r4,2f           /* break on NUL */
+        addik   r3,r3,-1        /* delay slot */
+
+        bneid   r3,1b
+        addik   r5,r5,1         /* delay slot */
+
+        addik   r3,r3,-1        /* for break on len */
+2:
+        rsubk   r3,r3,r6
+3:
+        rtsd    r15,8
+        nop
+
+
+        .section        .fixup,"ax"
+4:
+        brid    3b
+        addk    r3,r0,r0
+
+        .section        __ex_table,"a"
+        .word   1b,4b
+
+/*
+ * int __copy_tofrom_user(char *to, char *from, int len)
+ * Return:
+ *   0 on success
+ *   number of not copied bytes on error
+ */
+        .text
+.globl __copy_tofrom_user;
+.align 4;
+__copy_tofrom_user:
+        /*
+         * r5 - to
+         * r6 - from
+         * r7, r3 - count
+         * r4 - tempval
+         */
+        addik   r3,r7,0
+        beqi    r3,3f
+1:
+        lbu     r4,r6,r0
+        addik   r6,r6,1
+2:
+        sb      r4,r5,r0
+        addik   r3,r3,-1
+        bneid   r3,1b
+        addik   r5,r5,1         /* delay slot */
+3:
+        rtsd    r15,8
+        nop
+
+
+        .section        __ex_table,"a"
+        .word   1b,3b,2b,3b
diff --git a/arch/microblaze/mm/Makefile b/arch/microblaze/mm/Makefile
index bf9e4479a1fd..6c8a924d9e26 100644
--- a/arch/microblaze/mm/Makefile
+++ b/arch/microblaze/mm/Makefile
@@ -3,3 +3,5 @@
 #
 
 obj-y := init.o
+
+obj-$(CONFIG_MMU) += pgtable.o mmu_context.o fault.o
diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c
new file mode 100644
index 000000000000..5e67cd1fab40
--- /dev/null
+++ b/arch/microblaze/mm/fault.c
@@ -0,0 +1,304 @@
+/*
+ *  arch/microblaze/mm/fault.c
+ *
+ *    Copyright (C) 2007 Xilinx, Inc.  All rights reserved.
+ *
+ *  Derived from "arch/ppc/mm/fault.c"
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Derived from "arch/i386/mm/fault.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  Modified by Cort Dougan and Paul Mackerras.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/mman.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/mmu.h>
+#include <asm/mmu_context.h>
+#include <asm/system.h>
+#include <linux/uaccess.h>
+#include <asm/exceptions.h>
+
+#if defined(CONFIG_KGDB)
+int debugger_kernel_faults = 1;
+#endif
+
+static unsigned long pte_misses;        /* updated by do_page_fault() */
+static unsigned long pte_errors;        /* updated by do_page_fault() */
+
+/*
+ * Check whether the instruction at regs->pc is a store using
+ * an update addressing form which will update r1.
+ */
+static int store_updates_sp(struct pt_regs *regs)
+{
+        unsigned int inst;
+
+        if (get_user(inst, (unsigned int *)regs->pc))
+                return 0;
+        /* check for 1 in the rD field */
+        if (((inst >> 21) & 0x1f) != 1)
+                return 0;
+        /* check for store opcodes */
+        if ((inst & 0xd0000000) == 0xd0000000)
+                return 1;
+        return 0;
+}
+
+
+/*
+ * bad_page_fault is called when we have a bad access from the kernel.
+ * It is called from do_page_fault above and from some of the procedures
+ * in traps.c.
+ */
+static void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
+{
+        const struct exception_table_entry *fixup;
+/* MS: no context */
+        /* Are we prepared to handle this fault?  */
+        fixup = search_exception_tables(regs->pc);
+        if (fixup) {
+                regs->pc = fixup->fixup;
+                return;
+        }
+
+        /* kernel has accessed a bad area */
+#if defined(CONFIG_KGDB)
+        if (debugger_kernel_faults)
+                debugger(regs);
+#endif
+        die("kernel access of bad area", regs, sig);
+}
+
+/*
+ * The error_code parameter is ESR for a data fault,
+ * 0 for an instruction fault.
+ */
+void do_page_fault(struct pt_regs *regs, unsigned long address,
+                   unsigned long error_code)
+{
+        struct vm_area_struct *vma;
+        struct mm_struct *mm = current->mm;
+        siginfo_t info;
+        int code = SEGV_MAPERR;
+        int is_write = error_code & ESR_S;
+        int fault;
+
+        regs->ear = address;
+        regs->esr = error_code;
+
+        /* On a kernel SLB miss we can only check for a valid exception entry */
+        if (kernel_mode(regs) && (address >= TASK_SIZE)) {
+                printk(KERN_WARNING "kernel task_size exceed");
+                _exception(SIGSEGV, regs, code, address);
+        }
+
+        /* for instr TLB miss and instr storage exception ESR_S is undefined */
+        if ((error_code & 0x13) == 0x13 || (error_code & 0x11) == 0x11)
+                is_write = 0;
+
+#if defined(CONFIG_KGDB)
+        if (debugger_fault_handler && regs->trap == 0x300) {
+                debugger_fault_handler(regs);
+                return;
+        }
+#endif /* CONFIG_KGDB */
+
+        if (in_atomic() || mm == NULL) {
+                /* FIXME */
+                if (kernel_mode(regs)) {
+                        printk(KERN_EMERG
+                                "Page fault in kernel mode - Oooou!!! pid %d\n",
+                                current->pid);
+                        _exception(SIGSEGV, regs, code, address);
+                        return;
+                }
+                /* in_atomic() in user mode is really bad,
+                   as is current->mm == NULL. */
+                printk(KERN_EMERG "Page fault in user mode with "
+                       "in_atomic(), mm = %p\n", mm);
+                printk(KERN_EMERG "r15 = %lx  MSR = %lx\n",
+                       regs->r15, regs->msr);
+                die("Weird page fault", regs, SIGSEGV);
+        }
+
+        /* When running in the kernel we expect faults to occur only to
+         * addresses in user space.  All other faults represent errors in the
+         * kernel and should generate an OOPS.  Unfortunately, in the case of an
+         * erroneous fault occurring in a code path which already holds mmap_sem
+         * we will deadlock attempting to validate the fault against the
+         * address space.  Luckily the kernel only validly references user
+         * space from well defined areas of code, which are listed in the
+         * exceptions table.
+         *
+         * As the vast majority of faults will be valid we will only perform
+         * the source reference check when there is a possibility of a deadlock.
+         * Attempt to lock the address space, if we cannot we then validate the
+         * source.  If this is invalid we can skip the address space check,
+         * thus avoiding the deadlock.
+         */
+        if (!down_read_trylock(&mm->mmap_sem)) {
+                if (kernel_mode(regs) && !search_exception_tables(regs->pc))
+                        goto bad_area_nosemaphore;
+
+                down_read(&mm->mmap_sem);
+        }
+
+        vma = find_vma(mm, address);
+        if (!vma)
+                goto bad_area;
+
+        if (vma->vm_start <= address)
+                goto good_area;
+
+        if (!(vma->vm_flags & VM_GROWSDOWN))
+                goto bad_area;
+
+        if (!is_write)
+                goto bad_area;
+
+        /*
+         * N.B. The ABI allows programs to access up to
+         * a few hundred bytes below the stack pointer (TBD).
+         * The kernel signal delivery code writes up to about 1.5kB
+         * below the stack pointer (r1) before decrementing it.
+         * The exec code can write slightly over 640kB to the stack
+         * before setting the user r1.  Thus we allow the stack to
+         * expand to 1MB without further checks.
+         */
+        if (address + 0x100000 < vma->vm_end) {
+
+                /* get user regs even if this fault is in kernel mode */
+                struct pt_regs *uregs = current->thread.regs;
+                if (uregs == NULL)
+                        goto bad_area;
+
+                /*
+                 * A user-mode access to an address a long way below
+                 * the stack pointer is only valid if the instruction
+                 * is one which would update the stack pointer to the
+                 * address accessed if the instruction completed,
+                 * i.e. either stwu rs,n(r1) or stwux rs,r1,rb
+                 * (or the byte, halfword, float or double forms).
+                 *
+                 * If we don't check this then any write to the area
+                 * between the last mapped region and the stack will
+                 * expand the stack rather than segfaulting.
+                 */
+                if (address + 2048 < uregs->r1
+                        && (kernel_mode(regs) || !store_updates_sp(regs)))
+                                goto bad_area;
+        }
+        if (expand_stack(vma, address))
+                goto bad_area;
+
+good_area:
+        code = SEGV_ACCERR;
+
+        /* a write */
+        if (is_write) {
+                if (!(vma->vm_flags & VM_WRITE))
+                        goto bad_area;
+        /* a read */
+        } else {
+                /* protection fault */
+                if (error_code & 0x08000000)
+                        goto bad_area;
+                if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
+                        goto bad_area;
+        }
+
+        /*
+         * If for any reason at all we couldn't handle the fault,
+         * make sure we exit gracefully rather than endlessly redo
+         * the fault.
+         */
+survive:
+        fault = handle_mm_fault(mm, vma, address, is_write);
+        if (unlikely(fault & VM_FAULT_ERROR)) {
+                if (fault & VM_FAULT_OOM)
+                        goto out_of_memory;
+                else if (fault & VM_FAULT_SIGBUS)
+                        goto do_sigbus;
+                BUG();
+        }
+        if (fault & VM_FAULT_MAJOR)
+                current->maj_flt++;
+        else
+                current->min_flt++;
+        up_read(&mm->mmap_sem);
+        /*
+         * keep track of tlb+htab misses that are good addrs but
+         * just need pte's created via handle_mm_fault()
+         * -- Cort
+         */
+        pte_misses++;
+        return;
+
+bad_area:
+        up_read(&mm->mmap_sem);
+
+bad_area_nosemaphore:
+        pte_errors++;
+
+        /* User mode accesses cause a SIGSEGV */
+        if (user_mode(regs)) {
+                _exception(SIGSEGV, regs, code, address);
+/*              info.si_signo = SIGSEGV;
+                info.si_errno = 0;
+                info.si_code = code;
+                info.si_addr = (void *) address;
+                force_sig_info(SIGSEGV, &info, current);*/
+                return;
+        }
+
+        bad_page_fault(regs, address, SIGSEGV);
+        return;
+
+/*
+ * We ran out of memory, or some other thing happened to us that made
+ * us unable to handle the page fault gracefully.
+ */
+out_of_memory:
+        if (current->pid == 1) {
+                yield();
+                down_read(&mm->mmap_sem);
+                goto survive;
+        }
+        up_read(&mm->mmap_sem);
+        printk(KERN_WARNING "VM: killing process %s\n", current->comm);
+        if (user_mode(regs))
+                do_exit(SIGKILL);
+        bad_page_fault(regs, address, SIGKILL);
+        return;
+
+do_sigbus:
+        up_read(&mm->mmap_sem);
+        if (user_mode(regs)) {
+                info.si_signo = SIGBUS;
+                info.si_errno = 0;
+                info.si_code = BUS_ADRERR;
+                info.si_addr = (void __user *)address;
+                force_sig_info(SIGBUS, &info, current);
+                return;
+        }
+        bad_page_fault(regs, address, SIGBUS);
+}
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c
index b0c8213cd6cf..b5a701cd71e0 100644
--- a/arch/microblaze/mm/init.c
+++ b/arch/microblaze/mm/init.c
@@ -23,8 +23,16 @@
 #include <asm/sections.h>
 #include <asm/tlb.h>
 
+#ifndef CONFIG_MMU
 unsigned int __page_offset;
-/* EXPORT_SYMBOL(__page_offset); */
+EXPORT_SYMBOL(__page_offset);
+
+#else
+DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
+
+int mem_init_done;
+static int init_bootmem_done;
+#endif /* CONFIG_MMU */
 
 char *klimit = _end;
 
@@ -32,28 +40,26 @@ char *klimit = _end;
  * Initialize the bootmem system and give it all the memory we
  * have available.
  */
-unsigned int memory_start;
-unsigned int memory_end; /* due to mm/nommu.c */
-unsigned int memory_size;
+unsigned long memory_start;
+unsigned long memory_end; /* due to mm/nommu.c */
+unsigned long memory_size;
 
 /*
  * paging_init() sets up the page tables - in fact we've already done this.
  */
 static void __init paging_init(void)
 {
-        int i;
         unsigned long zones_size[MAX_NR_ZONES];
 
+        /* Clean every zones */
+        memset(zones_size, 0, sizeof(zones_size));
+
         /*
          * old: we can DMA to/from any address.put all page into ZONE_DMA
          * We use only ZONE_NORMAL
          */
         zones_size[ZONE_NORMAL] = max_mapnr;
 
-        /* every other zones are empty */
-        for (i = 1; i < MAX_NR_ZONES; i++)
-                zones_size[i] = 0;
-
         free_area_init(zones_size);
 }
 
@@ -61,6 +67,7 @@ void __init setup_memory(void)
 {
         int i;
         unsigned long map_size;
+#ifndef CONFIG_MMU
         u32 kernel_align_start, kernel_align_size;
 
         /* Find main memory where is the kernel */
@@ -93,6 +100,7 @@ void __init setup_memory(void)
                 __func__, kernel_align_start, kernel_align_start
                         + kernel_align_size, kernel_align_size);
 
+#endif
         /*
          * Kernel:
          * start: base phys address of kernel - page align
@@ -121,9 +129,13 @@ void __init setup_memory(void)
          * for 4GB of memory, using 4kB pages), plus 1 page
          * (in case the address isn't page-aligned).
          */
+#ifndef CONFIG_MMU
         map_size = init_bootmem_node(NODE_DATA(0), PFN_UP(TOPHYS((u32)_end)),
                                         min_low_pfn, max_low_pfn);
-
+#else
+        map_size = init_bootmem_node(&contig_page_data,
+                PFN_UP(TOPHYS((u32)_end)), min_low_pfn, max_low_pfn);
+#endif
         lmb_reserve(PFN_UP(TOPHYS((u32)_end)) << PAGE_SHIFT, map_size);
 
         /* free bootmem is whole main memory */
@@ -137,6 +149,9 @@ void __init setup_memory(void)
                 reserve_bootmem(lmb.reserved.region[i].base,
                         lmb_size_bytes(&lmb.reserved, i) - 1, BOOTMEM_DEFAULT);
         }
+#ifdef CONFIG_MMU
+        init_bootmem_done = 1;
+#endif
         paging_init();
 }
 
@@ -191,11 +206,145 @@ void __init mem_init(void)
         printk(KERN_INFO "Memory: %luk/%luk available\n",
                (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
                num_physpages << (PAGE_SHIFT-10));
+#ifdef CONFIG_MMU
+        mem_init_done = 1;
+#endif
 }
 
+#ifndef CONFIG_MMU
 /* Check against bounds of physical memory */
 int ___range_ok(unsigned long addr, unsigned long size)
 {
         return ((addr < memory_start) ||
                 ((addr + size) > memory_end));
 }
+EXPORT_SYMBOL(___range_ok);
+
+#else
+int page_is_ram(unsigned long pfn)
+{
+        return pfn < max_low_pfn;
+}
+
+/*
+ * Check for command-line options that affect what MMU_init will do.
+ */
+static void mm_cmdline_setup(void)
+{
+        unsigned long maxmem = 0;
+        char *p = cmd_line;
+
+        /* Look for mem= option on command line */
+        p = strstr(cmd_line, "mem=");
+        if (p) {
+                p += 4;
+                maxmem = memparse(p, &p);
+                if (maxmem && memory_size > maxmem) {
+                        memory_size = maxmem;
+                        memory_end = memory_start + memory_size;
+                        lmb.memory.region[0].size = memory_size;
+                }
+        }
+}
+
+/*
+ * MMU_init_hw does the chip-specific initialization of the MMU hardware.
+ */
+static void __init mmu_init_hw(void)
+{
+        /*
+         * The Zone Protection Register (ZPR) defines how protection will
+         * be applied to every page which is a member of a given zone. At
+         * present, we utilize only two of the zones.
+         * The zone index bits (of ZSEL) in the PTE are used for software
+         * indicators, except the LSB.  For user access, zone 1 is used,
+         * for kernel access, zone 0 is used.  We set all but zone 1
+         * to zero, allowing only kernel access as indicated in the PTE.
+         * For zone 1, we set a 01 binary (a value of 10 will not work)
+         * to allow user access as indicated in the PTE.  This also allows
+         * kernel access as indicated in the PTE.
+         */
+        __asm__ __volatile__ ("ori r11, r0, 0x10000000;" \
+                        "mts rzpr, r11;"
+                        : : : "r11");
+}
+
+/*
+ * MMU_init sets up the basic memory mappings for the kernel,
+ * including both RAM and possibly some I/O regions,
+ * and sets up the page tables and the MMU hardware ready to go.
+ */
+
+/* called from head.S */
+asmlinkage void __init mmu_init(void)
+{
+        unsigned int kstart, ksize;
+
+        if (!lmb.reserved.cnt) {
+                printk(KERN_EMERG "Error memory count\n");
+                machine_restart(NULL);
+        }
+
+        if ((u32) lmb.memory.region[0].size < 0x1000000) {
+                printk(KERN_EMERG "Memory must be greater than 16MB\n");
+                machine_restart(NULL);
+        }
+        /* Find main memory where the kernel is */
+        memory_start = (u32) lmb.memory.region[0].base;
+        memory_end = (u32) lmb.memory.region[0].base +
+                                (u32) lmb.memory.region[0].size;
+        memory_size = memory_end - memory_start;
+
+        mm_cmdline_setup(); /* FIXME parse args from command line - not used */
+
+        /*
+         * Map out the kernel text/data/bss from the available physical
+         * memory.
+         */
+        kstart = __pa(CONFIG_KERNEL_START); /* kernel start */
+        /* kernel size */
+        ksize = PAGE_ALIGN(((u32)_end - (u32)CONFIG_KERNEL_START));
+        lmb_reserve(kstart, ksize);
+
+#if defined(CONFIG_BLK_DEV_INITRD)
+        /* Remove the init RAM disk from the available memory. */
+/*      if (initrd_start) {
+                mem_pieces_remove(&phys_avail, __pa(initrd_start),
+                                  initrd_end - initrd_start, 1);
+        }*/
+#endif /* CONFIG_BLK_DEV_INITRD */
+
+        /* Initialize the MMU hardware */
+        mmu_init_hw();
+
+        /* Map in all of RAM starting at CONFIG_KERNEL_START */
+        mapin_ram();
+
+#ifdef HIGHMEM_START_BOOL
+        ioremap_base = HIGHMEM_START;
+#else
+        ioremap_base = 0xfe000000UL;    /* for now, could be 0xfffff000 */
+#endif /* CONFIG_HIGHMEM */
+        ioremap_bot = ioremap_base;
+
+        /* Initialize the context management stuff */
+        mmu_context_init();
+}
+
+/* This is only called until mem_init is done. */
+void __init *early_get_page(void)
+{
+        void *p;
+        if (init_bootmem_done) {
+                p = alloc_bootmem_pages(PAGE_SIZE);
+        } else {
+                /*
+                 * Mem start + 32MB -> here is limit
+                 * because of mem mapping from head.S
+                 */
+                p = __va(lmb_alloc_base(PAGE_SIZE, PAGE_SIZE,
+                                        memory_start + 0x2000000));
+        }
+        return p;
+}
+#endif /* CONFIG_MMU */
diff --git a/arch/microblaze/mm/mmu_context.c b/arch/microblaze/mm/mmu_context.c
new file mode 100644
index 000000000000..26ff82f4fa8f
--- /dev/null
+++ b/arch/microblaze/mm/mmu_context.c
@@ -0,0 +1,70 @@
+/*
+ * This file contains the routines for handling the MMU.
+ *
+ *    Copyright (C) 2007 Xilinx, Inc.  All rights reserved.
+ *
+ *  Derived from arch/ppc/mm/4xx_mmu.c:
+ *  -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#include <asm/tlbflush.h>
+#include <asm/mmu_context.h>
+
+mm_context_t next_mmu_context;
+unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
+atomic_t nr_free_contexts;
+struct mm_struct *context_mm[LAST_CONTEXT+1];
+
+/*
+ * Initialize the context management stuff.
+ */
+void __init mmu_context_init(void)
+{
+        /*
+         * The use of context zero is reserved for the kernel.
+         * This code assumes FIRST_CONTEXT < 32.
+         */
+        context_map[0] = (1 << FIRST_CONTEXT) - 1;
+        next_mmu_context = FIRST_CONTEXT;
+        atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
+}
+
+/*
+ * Steal a context from a task that has one at the moment.
+ *
+ * This isn't an LRU system, it just frees up each context in
+ * turn (sort-of pseudo-random replacement :).  This would be the
+ * place to implement an LRU scheme if anyone were motivated to do it.
+ */
+void steal_context(void)
+{
+        struct mm_struct *mm;
+
+        /* free up context `next_mmu_context' */
+        /* if we shouldn't free context 0, don't... */
+        if (next_mmu_context < FIRST_CONTEXT)
+                next_mmu_context = FIRST_CONTEXT;
+        mm = context_mm[next_mmu_context];
+        flush_tlb_mm(mm);
+        destroy_context(mm);
+}
diff --git a/arch/microblaze/mm/pgtable.c b/arch/microblaze/mm/pgtable.c
new file mode 100644
index 000000000000..46c4ca5d15c5
--- /dev/null
+++ b/arch/microblaze/mm/pgtable.c
@@ -0,0 +1,286 @@
+/*
+ *  This file contains the routines setting up the linux page tables.
+ *
+ * Copyright (C) 2008 Michal Simek
+ * Copyright (C) 2008 PetaLogix
+ *
+ *    Copyright (C) 2007 Xilinx, Inc.  All rights reserved.
+ *
+ *  Derived from arch/ppc/mm/pgtable.c:
+ *    -- paulus
+ *
+ *  Derived from arch/ppc/mm/init.c:
+ *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
+ *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
+ *    Copyright (C) 1996 Paul Mackerras
+ *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
+ *
+ *  Derived from "arch/i386/mm/init.c"
+ *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
+ *
+ *  This file is subject to the terms and conditions of the GNU General
+ *  Public License.  See the file COPYING in the main directory of this
+ *  archive for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+
+#include <asm/pgtable.h>
+#include <asm/pgalloc.h>
+#include <linux/io.h>
+#include <asm/mmu.h>
+#include <asm/sections.h>
+
+#define flush_HPTE(X, va, pg)   _tlbie(va)
+
+unsigned long ioremap_base;
+unsigned long ioremap_bot;
+
+/* The maximum lowmem defaults to 768Mb, but this can be configured to
+ * another value.
+ */
+#define MAX_LOW_MEM     CONFIG_LOWMEM_SIZE
+
+#ifndef CONFIG_SMP
+struct pgtable_cache_struct quicklists;
+#endif
+
+static void __iomem *__ioremap(phys_addr_t addr, unsigned long size,
+                unsigned long flags)
+{
+        unsigned long v, i;
+        phys_addr_t p;
+        int err;
+
+        /*
+         * Choose an address to map it to.
+         * Once the vmalloc system is running, we use it.
+         * Before then, we use space going down from ioremap_base
+         * (ioremap_bot records where we're up to).
+         */
+        p = addr & PAGE_MASK;
+        size = PAGE_ALIGN(addr + size) - p;
+
+        /*
+         * Don't allow anybody to remap normal RAM that we're using.
+         * mem_init() sets high_memory so only do the check after that.
+         *
+         * However, allow remap of rootfs: TBD
+         */
+        if (mem_init_done &&
+                p >= memory_start && p < virt_to_phys(high_memory) &&
+                !(p >= virt_to_phys((unsigned long)&__bss_stop) &&
+                p < virt_to_phys((unsigned long)__bss_stop))) {
+                printk(KERN_WARNING "__ioremap(): phys addr "PTE_FMT
+                        " is RAM lr %p\n", (unsigned long)p,
+                        __builtin_return_address(0));
+                return NULL;
+        }
+
+        if (size == 0)
+                return NULL;
+
+        /*
+         * Is it already mapped? If the whole area is mapped then we're
+         * done, otherwise remap it since we want to keep the virt addrs for
+         * each request contiguous.
+         *
+         * We make the assumption here that if the bottom and top
+         * of the range we want are mapped then it's mapped to the
+         * same virt address (and this is contiguous).
+         *  -- Cort
+         */
+
+        if (mem_init_done) {
+                struct vm_struct *area;
+                area = get_vm_area(size, VM_IOREMAP);
+                if (area == NULL)
+                        return NULL;
+                v = VMALLOC_VMADDR(area->addr);
+        } else {
+                v = (ioremap_bot -= size);
+        }
+
+        if ((flags & _PAGE_PRESENT) == 0)
+                flags |= _PAGE_KERNEL;
+        if (flags & _PAGE_NO_CACHE)
+                flags |= _PAGE_GUARDED;
+
+        err = 0;
+        for (i = 0; i < size && err == 0; i += PAGE_SIZE)
+                err = map_page(v + i, p + i, flags);
+        if (err) {
+                if (mem_init_done)
+                        vfree((void *)v);
+                return NULL;
+        }
+
+        return (void __iomem *) (v + ((unsigned long)addr & ~PAGE_MASK));
+}
+
+void __iomem *ioremap(phys_addr_t addr, unsigned long size)
+{
+        return __ioremap(addr, size, _PAGE_NO_CACHE);
+}
+EXPORT_SYMBOL(ioremap);
+
+void iounmap(void *addr)
+{
+        if (addr > high_memory && (unsigned long) addr < ioremap_bot)
+                vfree((void *) (PAGE_MASK & (unsigned long) addr));
+}
+EXPORT_SYMBOL(iounmap);
+
+
+int map_page(unsigned long va, phys_addr_t pa, int flags)
+{
+        pmd_t *pd;
+        pte_t *pg;
+        int err = -ENOMEM;
+        /* spin_lock(&init_mm.page_table_lock); */
+        /* Use upper 10 bits of VA to index the first level map */
+        pd = pmd_offset(pgd_offset_k(va), va);
+        /* Use middle 10 bits of VA to index the second-level map */
+        pg = pte_alloc_kernel(pd, va); /* from powerpc - pgtable.c */
+        /* pg = pte_alloc_kernel(&init_mm, pd, va); */
+
+        if (pg != NULL) {
+                err = 0;
+                set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT,
+                                __pgprot(flags)));
+                if (mem_init_done)
+                        flush_HPTE(0, va, pmd_val(*pd));
+                        /* flush_HPTE(0, va, pg); */
+
+        }
+        /* spin_unlock(&init_mm.page_table_lock); */
+        return err;
+}
+
+void __init adjust_total_lowmem(void)
+{
+/* TBD */
+#if 0
+        unsigned long max_low_mem = MAX_LOW_MEM;
+
+        if (total_lowmem > max_low_mem) {
+                total_lowmem = max_low_mem;
+#ifndef CONFIG_HIGHMEM
+                printk(KERN_INFO "Warning, memory limited to %ld Mb, use "
+                                "CONFIG_HIGHMEM to reach %ld Mb\n",
+                                max_low_mem >> 20, total_memory >> 20);
+                total_memory = total_lowmem;
+#endif /* CONFIG_HIGHMEM */
+        }
+#endif
+}
+
+static void show_tmem(unsigned long tmem)
+{
+        volatile unsigned long a;
+        a = a + tmem;
+}
+
+/*
+ * Map in all of physical memory starting at CONFIG_KERNEL_START.
+ */
+void __init mapin_ram(void)
+{
+        unsigned long v, p, s, f;
+
+        v = CONFIG_KERNEL_START;
+        p = memory_start;
+        show_tmem(memory_size);
+        for (s = 0; s < memory_size; s += PAGE_SIZE) {
+                f = _PAGE_PRESENT | _PAGE_ACCESSED |
+                                _PAGE_SHARED | _PAGE_HWEXEC;
+                if ((char *) v < _stext || (char *) v >= _etext)
+                        f |= _PAGE_WRENABLE;
+                else
+                        /* On the MicroBlaze, no user access
+                           forces R/W kernel access */
+                        f |= _PAGE_USER;
+                map_page(v, p, f);
+                v += PAGE_SIZE;
+                p += PAGE_SIZE;
+        }
+}
+
+/* is x a power of 2? */
+#define is_power_of_2(x)        ((x) != 0 && (((x) & ((x) - 1)) == 0))
+
+/*
+ * Set up a mapping for a block of I/O.
+ * virt, phys, size must all be page-aligned.
+ * This should only be called before ioremap is called.
+ */
+void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
+                             unsigned int size, int flags)
+{
+        int i;
+
+        if (virt > CONFIG_KERNEL_START && virt < ioremap_bot)
+                ioremap_bot = ioremap_base = virt;
+
+        /* Put it in the page tables. */
+        for (i = 0; i < size; i += PAGE_SIZE)
+                map_page(virt + i, phys + i, flags);
+}
+
+/* Scan the real Linux page tables and return a PTE pointer for
+ * a virtual address in a context.
+ * Returns true (1) if PTE was found, zero otherwise.  The pointer to
+ * the PTE pointer is unmodified if PTE is not found.
+ */
+static int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep)
+{
+        pgd_t   *pgd;
+        pmd_t   *pmd;
+        pte_t   *pte;
+        int     retval = 0;
+
+        pgd = pgd_offset(mm, addr & PAGE_MASK);
+        if (pgd) {
+                pmd = pmd_offset(pgd, addr & PAGE_MASK);
+                if (pmd_present(*pmd)) {
+                        pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
+                        if (pte) {
+                                retval = 1;
+                                *ptep = pte;
+                        }
+                }
+        }
+        return retval;
+}
+
+/* Find physical address for this virtual address.  Normally used by
+ * I/O functions, but anyone can call it.
+ */
+unsigned long iopa(unsigned long addr)
+{
+        unsigned long pa;
+
+        pte_t *pte;
+        struct mm_struct *mm;
+
+        /* Allow mapping of user addresses (within the thread)
+         * for DMA if necessary.
+         */
+        if (addr < TASK_SIZE)
+                mm = current->mm;
+        else
+                mm = &init_mm;
+
+        pa = 0;
+        if (get_pteptr(mm, addr, &pte))
+                pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK);
+
+        return pa;
+}
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 1b332e15ab52..eb7f01cfd1ac 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -793,6 +793,6 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 #define smp_mb__before_atomic_inc()     smp_llsc_mb()
 #define smp_mb__after_atomic_inc()      smp_llsc_mb()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 
 #endif /* _ASM_ATOMIC_H */
diff --git a/arch/mips/include/asm/bitsperlong.h b/arch/mips/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..3e4c10a8e787
--- /dev/null
+++ b/arch/mips/include/asm/bitsperlong.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_MIPS_BITSPERLONG_H
+#define __ASM_MIPS_BITSPERLONG_H
+
+#define __BITS_PER_LONG _MIPS_SZLONG
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* __ASM_MIPS_BITSPERLONG_H */
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index 9f946e4ca057..72c80d2034c2 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -189,6 +189,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #define CAC_ADDR(addr)          ((addr) - UNCAC_BASE + PAGE_OFFSET)
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _ASM_PAGE_H */
diff --git a/arch/mips/include/asm/signal.h b/arch/mips/include/asm/signal.h
index bee5153aca48..c783f364938c 100644
--- a/arch/mips/include/asm/signal.h
+++ b/arch/mips/include/asm/signal.h
@@ -109,7 +109,7 @@ typedef unsigned long old_sigset_t;		/* at least 32 bits */
 #define SIG_UNBLOCK     2       /* for unblocking signals */
 #define SIG_SETMASK     3       /* for setting the signal mask */
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 struct sigaction {
         unsigned int    sa_flags;
diff --git a/arch/mips/include/asm/suspend.h b/arch/mips/include/asm/suspend.h
deleted file mode 100644
index 2562f8f9be0e..000000000000
--- a/arch/mips/include/asm/suspend.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_SUSPEND_H
-#define __ASM_SUSPEND_H
-
-/* Somewhen...  Maybe :-)  */
-
-#endif /* __ASM_SUSPEND_H */
diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h
index 7956e69a3bd5..544a2854598f 100644
--- a/arch/mips/include/asm/types.h
+++ b/arch/mips/include/asm/types.h
@@ -31,9 +31,6 @@ typedef unsigned short umode_t;
  * These aren't exported outside the kernel to avoid name space clashes
  */
 #ifdef __KERNEL__
-
-#define BITS_PER_LONG _MIPS_SZLONG
-
 #ifndef __ASSEMBLY__
 
 #if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index 1f60e27523d9..3e9100dcc12d 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -68,8 +68,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
diff --git a/arch/mn10300/include/asm/atomic.h b/arch/mn10300/include/asm/atomic.h
index bc064825f9b1..5bf5be9566de 100644
--- a/arch/mn10300/include/asm/atomic.h
+++ b/arch/mn10300/include/asm/atomic.h
@@ -151,7 +151,7 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_ATOMIC_H */
diff --git a/arch/mn10300/include/asm/bitsperlong.h b/arch/mn10300/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/mn10300/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/mn10300/include/asm/mman.h b/arch/mn10300/include/asm/mman.h
index b7986b65addf..d04fac1da5aa 100644
--- a/arch/mn10300/include/asm/mman.h
+++ b/arch/mn10300/include/asm/mman.h
@@ -12,7 +12,7 @@
 #ifndef _ASM_MMAN_H
 #define _ASM_MMAN_H
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/mn10300/include/asm/signal.h b/arch/mn10300/include/asm/signal.h
index e98817cec5f7..7e891fce2370 100644
--- a/arch/mn10300/include/asm/signal.h
+++ b/arch/mn10300/include/asm/signal.h
@@ -115,7 +115,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/mn10300/kernel/module.c b/arch/mn10300/kernel/module.c
index 6b287f2e8e84..4fa0e3648d8e 100644
--- a/arch/mn10300/kernel/module.c
+++ b/arch/mn10300/kernel/module.c
@@ -48,8 +48,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-         * table entries. */
 }
 
 /*
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
index ada3e5364d82..7eeaff944360 100644
--- a/arch/parisc/include/asm/atomic.h
+++ b/arch/parisc/include/asm/atomic.h
@@ -338,6 +338,6 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 
 #endif /* CONFIG_64BIT */
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 
 #endif /* _ASM_PARISC_ATOMIC_H_ */
diff --git a/arch/parisc/include/asm/bitsperlong.h b/arch/parisc/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..75196b415d3f
--- /dev/null
+++ b/arch/parisc/include/asm/bitsperlong.h
@@ -0,0 +1,20 @@
+#ifndef __ASM_PARISC_BITSPERLONG_H
+#define __ASM_PARISC_BITSPERLONG_H
+
+/*
+ * using CONFIG_* outside of __KERNEL__ is wrong,
+ * __LP64__ was also removed from headers, so what
+ * is the right approach on parisc?
+ *      -arnd
+ */
+#if (defined(__KERNEL__) && defined(CONFIG_64BIT)) || defined (__LP64__)
+#define __BITS_PER_LONG 64
+#define SHIFT_PER_LONG 6
+#else
+#define __BITS_PER_LONG 32
+#define SHIFT_PER_LONG 5
+#endif
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* __ASM_PARISC_BITSPERLONG_H */
diff --git a/arch/parisc/include/asm/page.h b/arch/parisc/include/asm/page.h
index 7bc5125d7d4c..a84cc1f925f6 100644
--- a/arch/parisc/include/asm/page.h
+++ b/arch/parisc/include/asm/page.h
@@ -159,6 +159,6 @@ extern int npmem_ranges;
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _PARISC_PAGE_H */
diff --git a/arch/parisc/include/asm/types.h b/arch/parisc/include/asm/types.h
index 7f5a39bfb4ce..20135cc80039 100644
--- a/arch/parisc/include/asm/types.h
+++ b/arch/parisc/include/asm/types.h
@@ -14,14 +14,6 @@ typedef unsigned short umode_t;
  */
 #ifdef __KERNEL__
 
-#ifdef CONFIG_64BIT
-#define BITS_PER_LONG 64
-#define SHIFT_PER_LONG 6
-#else
-#define BITS_PER_LONG 32
-#define SHIFT_PER_LONG 5
-#endif
-
 #ifndef __ASSEMBLY__
 
 /* Dma addresses are 32-bits wide.  */
diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h
index cd4c0b2a8e70..7cf799d70b4c 100644
--- a/arch/parisc/include/asm/uaccess.h
+++ b/arch/parisc/include/asm/uaccess.h
@@ -7,7 +7,7 @@
 #include <asm/page.h>
 #include <asm/system.h>
 #include <asm/cache.h>
-#include <asm-generic/uaccess.h>
+#include <asm-generic/uaccess-unaligned.h>
 
 #define VERIFY_READ 0
 #define VERIFY_WRITE 1
diff --git a/arch/parisc/kernel/module.c b/arch/parisc/kernel/module.c
index ecd1c5024447..ef5caf2e6ed0 100644
--- a/arch/parisc/kernel/module.c
+++ b/arch/parisc/kernel/module.c
@@ -267,8 +267,6 @@ void module_free(struct module *mod, void *module_region)
         mod->arch.section = NULL;
 
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* Additional bytes needed in front of individual sections */
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index b401950f5259..b7d2d07b6f96 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -472,6 +472,6 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 
 #endif /* __powerpc64__ */
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_ATOMIC_H_ */
diff --git a/arch/powerpc/include/asm/bitsperlong.h b/arch/powerpc/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..5f1659032c40
--- /dev/null
+++ b/arch/powerpc/include/asm/bitsperlong.h
@@ -0,0 +1,12 @@
+#ifndef __ASM_POWERPC_BITSPERLONG_H
+#define __ASM_POWERPC_BITSPERLONG_H
+
+#if defined(__powerpc64__)
+# define __BITS_PER_LONG 64
+#else
+# define __BITS_PER_LONG 32
+#endif
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* __ASM_POWERPC_BITSPERLONG_H */
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index 20a44d0c9fdd..53512374e1c9 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -156,8 +156,6 @@ static inline void clear_perf_counter_pending(void)
                 "i" (offsetof(struct paca_struct, perf_counter_pending)));
 }
 
-extern void perf_counter_do_pending(void);
-
 #else
 
 static inline unsigned long test_perf_counter_pending(void)
@@ -167,7 +165,6 @@ static inline unsigned long test_perf_counter_pending(void)
 
 static inline void set_perf_counter_pending(void) {}
 static inline void clear_perf_counter_pending(void) {}
-static inline void perf_counter_do_pending(void) {}
 #endif /* CONFIG_PERF_COUNTERS */
 
 #endif  /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/mman.h b/arch/powerpc/include/asm/mman.h
index e7b99bac9f48..7b1c49811a24 100644
--- a/arch/powerpc/include/asm/mman.h
+++ b/arch/powerpc/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef _ASM_POWERPC_MMAN_H
 #define _ASM_POWERPC_MMAN_H
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 /*
  * This program is free software; you can redistribute it and/or
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h
index a218da6bec7c..fb8412057450 100644
--- a/arch/powerpc/include/asm/mpc52xx_psc.h
+++ b/arch/powerpc/include/asm/mpc52xx_psc.h
@@ -28,6 +28,10 @@
 #define MPC52xx_PSC_MAXNUM      6
 
 /* Programmable Serial Controller (PSC) status register bits */
+#define MPC52xx_PSC_SR_UNEX_RX  0x0001
+#define MPC52xx_PSC_SR_DATA_VAL 0x0002
+#define MPC52xx_PSC_SR_DATA_OVR 0x0004
+#define MPC52xx_PSC_SR_CMDSEND  0x0008
 #define MPC52xx_PSC_SR_CDE      0x0080
 #define MPC52xx_PSC_SR_RXRDY    0x0100
 #define MPC52xx_PSC_SR_RXFULL   0x0200
@@ -61,6 +65,12 @@
 #define MPC52xx_PSC_RXTX_FIFO_EMPTY     0x0001
 
 /* PSC interrupt status/mask bits */
+#define MPC52xx_PSC_IMR_UNEX_RX_SLOT 0x0001
+#define MPC52xx_PSC_IMR_DATA_VALID      0x0002
+#define MPC52xx_PSC_IMR_DATA_OVR        0x0004
+#define MPC52xx_PSC_IMR_CMD_SEND        0x0008
+#define MPC52xx_PSC_IMR_ERROR           0x0040
+#define MPC52xx_PSC_IMR_DEOF            0x0080
 #define MPC52xx_PSC_IMR_TXRDY           0x0100
 #define MPC52xx_PSC_IMR_RXRDY           0x0200
 #define MPC52xx_PSC_IMR_DB              0x0400
@@ -117,6 +127,7 @@
 #define MPC52xx_PSC_SICR_SIM_FIR                (0x6 << 24)
 #define MPC52xx_PSC_SICR_SIM_CODEC_24           (0x7 << 24)
 #define MPC52xx_PSC_SICR_SIM_CODEC_32           (0xf << 24)
+#define MPC52xx_PSC_SICR_AWR                    (1 << 30)
 #define MPC52xx_PSC_SICR_GENCLK                 (1 << 23)
 #define MPC52xx_PSC_SICR_I2S                    (1 << 22)
 #define MPC52xx_PSC_SICR_CLKPOL                 (1 << 21)
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h
index a0e3f6e6b4ee..bd0849dbcaaa 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -41,7 +41,7 @@ extern void clear_pages(void *page, int order);
 static inline void clear_page(void *page) { clear_pages(page, 0); }
 extern void copy_page(void *to, void *from);
 
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #define PGD_T_LOG2      (__builtin_ffs(sizeof(pgd_t)) - 1)
 #define PTE_T_LOG2      (__builtin_ffs(sizeof(pte_t)) - 1)
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h
index 043bfdfe4f73..5817a3b747e5 100644
--- a/arch/powerpc/include/asm/page_64.h
+++ b/arch/powerpc/include/asm/page_64.h
@@ -180,6 +180,6 @@ do {						\
         (test_thread_flag(TIF_32BIT) ? \
          VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
 
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _ASM_POWERPC_PAGE_64_H */
diff --git a/arch/powerpc/include/asm/signal.h b/arch/powerpc/include/asm/signal.h
index 69f709d8e8e7..3eb13be11d8f 100644
--- a/arch/powerpc/include/asm/signal.h
+++ b/arch/powerpc/include/asm/signal.h
@@ -94,7 +94,7 @@ typedef struct {
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 struct old_sigaction {
         __sighandler_t sa_handler;
diff --git a/arch/powerpc/include/asm/termios.h b/arch/powerpc/include/asm/termios.h
index 2c14fea07c8a..a24f48704a34 100644
--- a/arch/powerpc/include/asm/termios.h
+++ b/arch/powerpc/include/asm/termios.h
@@ -78,7 +78,7 @@ struct termio {
 
 #ifdef __KERNEL__
 
-#include <asm-generic/termios.h>
+#include <asm-generic/termios-base.h>
 
 #endif  /* __KERNEL__ */
 
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index 7ce27a52bb34..a5aea0ca34e9 100644
--- a/arch/powerpc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
@@ -40,15 +40,6 @@ typedef struct {
 #endif /* __ASSEMBLY__ */
 
 #ifdef __KERNEL__
-/*
- * These aren't exported outside the kernel to avoid name space clashes
- */
-#ifdef __powerpc64__
-#define BITS_PER_LONG 64
-#else
-#define BITS_PER_LONG 32
-#endif
-
 #ifndef __ASSEMBLY__
 
 typedef __vector128 vector128;
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index feff792ed0f9..844d3f882a15 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -53,6 +53,7 @@
 #include <linux/bootmem.h>
 #include <linux/pci.h>
 #include <linux/debugfs.h>
+#include <linux/perf_counter.h>
 
 #include <asm/uaccess.h>
 #include <asm/system.h>
diff --git a/arch/powerpc/kernel/module.c b/arch/powerpc/kernel/module.c
index 43e7e3a7f130..477c663e0140 100644
--- a/arch/powerpc/kernel/module.c
+++ b/arch/powerpc/kernel/module.c
@@ -43,8 +43,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 static const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
diff --git a/arch/powerpc/kernel/power7-pmu.c b/arch/powerpc/kernel/power7-pmu.c
index b3f7d1216bae..b72e7a19d054 100644
--- a/arch/powerpc/kernel/power7-pmu.c
+++ b/arch/powerpc/kernel/power7-pmu.c
@@ -294,12 +294,12 @@ static void power7_disable_pmc(unsigned int pmc, u64 mmcr[])
 }
 
 static int power7_generic_events[] = {
-        [PERF_COUNT_CPU_CYCLES] = 0x1e,
-        [PERF_COUNT_INSTRUCTIONS] = 2,
-        [PERF_COUNT_CACHE_REFERENCES] = 0xc880,         /* LD_REF_L1_LSU */
-        [PERF_COUNT_CACHE_MISSES] = 0x400f0,            /* LD_MISS_L1 */
-        [PERF_COUNT_BRANCH_INSTRUCTIONS] = 0x10068,     /* BRU_FIN */
-        [PERF_COUNT_BRANCH_MISSES] = 0x400f6,           /* BR_MPRED */
+        [PERF_COUNT_HW_CPU_CYCLES] = 0x1e,
+        [PERF_COUNT_HW_INSTRUCTIONS] = 2,
+        [PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880,      /* LD_REF_L1_LSU*/
+        [PERF_COUNT_HW_CACHE_MISSES] = 0x400f0,         /* LD_MISS_L1   */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068,  /* BRU_FIN      */
+        [PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6,        /* BR_MPRED     */
 };
 
 #define C(x)    PERF_COUNT_HW_CACHE_##x
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 2eca5fe0e75b..99dc3ded6b49 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -82,6 +82,11 @@ config S390
         select USE_GENERIC_SMP_HELPERS if SMP
         select HAVE_SYSCALL_WRAPPERS
         select HAVE_FUNCTION_TRACER
+        select HAVE_FUNCTION_TRACE_MCOUNT_TEST
+        select HAVE_FTRACE_MCOUNT_RECORD
+        select HAVE_FTRACE_SYSCALLS
+        select HAVE_DYNAMIC_FTRACE
+        select HAVE_FUNCTION_GRAPH_TRACER
         select HAVE_DEFAULT_NO_SPIN_MUTEXES
         select HAVE_OPROFILE
         select HAVE_KPROBES
@@ -567,6 +572,24 @@ bool "s390 guest support for KVM (EXPERIMENTAL)"
           the KVM hypervisor. This will add detection for KVM as well  as a
           virtio transport. If KVM is detected, the virtio console will be
           the default console.
+
+config SECCOMP
+        bool "Enable seccomp to safely compute untrusted bytecode"
+        depends on PROC_FS
+        default y
+        help
+          This kernel feature is useful for number crunching applications
+          that may need to compute untrusted bytecode during their
+          execution. By using pipes or other transports made available to
+          the process as file descriptors supporting the read/write
+          syscalls, it's possible to isolate those applications in
+          their own address space using seccomp. Once seccomp is
+          enabled via /proc/<pid>/seccomp, it cannot be disabled
+          and the task is only allowed to execute a few safe syscalls
+          defined by each seccomp mode.
+
+          If unsure, say Y.
+
 endmenu
 
 source "net/Kconfig"
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h
index de432f2de2d2..fca9dffcc669 100644
--- a/arch/s390/include/asm/atomic.h
+++ b/arch/s390/include/asm/atomic.h
@@ -275,6 +275,6 @@ static __inline__ int atomic64_add_unless(atomic64_t *v,
 #define smp_mb__before_atomic_inc()     smp_mb()
 #define smp_mb__after_atomic_inc()      smp_mb()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* __KERNEL__ */
 #endif /* __ARCH_S390_ATOMIC__  */
diff --git a/arch/s390/include/asm/bitsperlong.h b/arch/s390/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6b235aea9c66
--- /dev/null
+++ b/arch/s390/include/asm/bitsperlong.h
@@ -0,0 +1,13 @@
+#ifndef __ASM_S390_BITSPERLONG_H
+#define __ASM_S390_BITSPERLONG_H
+
+#ifndef __s390x__
+#define __BITS_PER_LONG 32
+#else
+#define __BITS_PER_LONG 64
+#endif
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* __ASM_S390_BITSPERLONG_H */
+
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index de065b32381a..01a08020bc0e 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -5,6 +5,7 @@
  */
 #include <linux/types.h>
 #include <linux/sched.h>
+#include <linux/thread_info.h>
 
 #define PSW32_MASK_PER          0x40000000UL
 #define PSW32_MASK_DAT          0x04000000UL
@@ -163,12 +164,28 @@ static inline compat_uptr_t ptr_to_compat(void __user *uptr)
         return (u32)(unsigned long)uptr;
 }
 
+#ifdef CONFIG_COMPAT
+
+static inline int is_compat_task(void)
+{
+        return test_thread_flag(TIF_31BIT);
+}
+
+#else
+
+static inline int is_compat_task(void)
+{
+        return 0;
+}
+
+#endif
+
 static inline void __user *compat_alloc_user_space(long len)
 {
         unsigned long stack;
 
         stack = KSTK_ESP(current);
-        if (test_thread_flag(TIF_31BIT))
+        if (is_compat_task())
                 stack &= 0x7fffffffUL;
         return (void __user *) (stack - len);
 }
diff --git a/arch/s390/include/asm/cpu.h b/arch/s390/include/asm/cpu.h
deleted file mode 100644
index d60a2eefb17b..000000000000
--- a/arch/s390/include/asm/cpu.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- *  include/asm-s390/cpu.h
- *
- *    Copyright IBM Corp. 2007
- *    Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
- */
-
-#ifndef _ASM_S390_CPU_H_
-#define _ASM_S390_CPU_H_
-
-#include <linux/types.h>
-#include <linux/percpu.h>
-#include <linux/spinlock.h>
-
-struct s390_idle_data {
-        spinlock_t lock;
-        unsigned long long idle_count;
-        unsigned long long idle_enter;
-        unsigned long long idle_time;
-};
-
-DECLARE_PER_CPU(struct s390_idle_data, s390_idle);
-
-void vtime_start_cpu(void);
-
-static inline void s390_idle_check(void)
-{
-        if ((&__get_cpu_var(s390_idle))->idle_enter != 0ULL)
-                vtime_start_cpu();
-}
-
-#endif /* _ASM_S390_CPU_H_ */
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index 941384fbd39c..ec917d42ee6d 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -9,6 +9,9 @@
 #ifndef _S390_CPUTIME_H
 #define _S390_CPUTIME_H
 
+#include <linux/types.h>
+#include <linux/percpu.h>
+#include <linux/spinlock.h>
 #include <asm/div64.h>
 
 /* We want to use full resolution of the CPU timer: 2**-12 micro-seconds. */
@@ -174,8 +177,24 @@ cputime64_to_clock_t(cputime64_t cputime)
        return __div(cputime, 4096000000ULL / USER_HZ);
 }
 
+struct s390_idle_data {
+        spinlock_t lock;
+        unsigned long long idle_count;
+        unsigned long long idle_enter;
+        unsigned long long idle_time;
+};
+
+DECLARE_PER_CPU(struct s390_idle_data, s390_idle);
+
+void vtime_start_cpu(void);
 cputime64_t s390_get_idle_time(int cpu);
 
 #define arch_idle_time(cpu) s390_get_idle_time(cpu)
 
+static inline void s390_idle_check(void)
+{
+        if ((&__get_cpu_var(s390_idle))->idle_enter != 0ULL)
+                vtime_start_cpu();
+}
+
 #endif /* _S390_CPUTIME_H */
diff --git a/arch/s390/include/asm/ftrace.h b/arch/s390/include/asm/ftrace.h
index 5a5bc75e19d4..96c14a9102b8 100644
--- a/arch/s390/include/asm/ftrace.h
+++ b/arch/s390/include/asm/ftrace.h
@@ -2,7 +2,28 @@
 #define _ASM_S390_FTRACE_H
 
 #ifndef __ASSEMBLY__
+
 extern void _mcount(void);
+extern unsigned long ftrace_dyn_func;
+
+struct dyn_arch_ftrace { };
+
+#define MCOUNT_ADDR ((long)_mcount)
+
+#ifdef CONFIG_64BIT
+#define MCOUNT_OFFSET_RET 18
+#define MCOUNT_INSN_SIZE  24
+#define MCOUNT_OFFSET     14
+#else
+#define MCOUNT_OFFSET_RET 26
+#define MCOUNT_INSN_SIZE  30
+#define MCOUNT_OFFSET      8
 #endif
 
+static inline unsigned long ftrace_call_adjust(unsigned long addr)
+{
+        return addr - MCOUNT_OFFSET;
+}
+
+#endif /* __ASSEMBLY__ */
 #endif /* _ASM_S390_FTRACE_H */
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 3aeca492b147..5046ad6b7a63 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -30,6 +30,7 @@
 #define __LC_SUBCHANNEL_NR              0x00ba
 #define __LC_IO_INT_PARM                0x00bc
 #define __LC_IO_INT_WORD                0x00c0
+#define __LC_STFL_FAC_LIST              0x00c8
 #define __LC_MCCK_CODE                  0x00e8
 
 #define __LC_DUMP_REIPL                 0x0e00
@@ -67,6 +68,7 @@
 #define __LC_CPUID                      0x02b0
 #define __LC_INT_CLOCK                  0x02c8
 #define __LC_MACHINE_FLAGS              0x02d8
+#define __LC_FTRACE_FUNC                0x02dc
 #define __LC_IRB                        0x0300
 #define __LC_PFAULT_INTPARM             0x0080
 #define __LC_CPU_TIMER_SAVE_AREA        0x00d8
@@ -112,6 +114,7 @@
 #define __LC_INT_CLOCK                  0x0340
 #define __LC_VDSO_PER_CPU               0x0350
 #define __LC_MACHINE_FLAGS              0x0358
+#define __LC_FTRACE_FUNC                0x0360
 #define __LC_IRB                        0x0380
 #define __LC_PASTE                      0x03c0
 #define __LC_PFAULT_INTPARM             0x11b8
@@ -280,7 +283,8 @@ struct _lowcore
         __u64   int_clock;                      /* 0x02c8 */
         __u64   clock_comparator;               /* 0x02d0 */
         __u32   machine_flags;                  /* 0x02d8 */
-        __u8    pad_0x02dc[0x0300-0x02dc];      /* 0x02dc */
+        __u32   ftrace_func;                    /* 0x02dc */
+        __u8    pad_0x02f0[0x0300-0x02f0];      /* 0x02f0 */
 
         /* Interrupt response block */
         __u8    irb[64];                        /* 0x0300 */
@@ -385,7 +389,8 @@ struct _lowcore
         __u64   clock_comparator;               /* 0x0348 */
         __u64   vdso_per_cpu_data;              /* 0x0350 */
         __u64   machine_flags;                  /* 0x0358 */
-        __u8    pad_0x0360[0x0380-0x0360];      /* 0x0360 */
+        __u64   ftrace_func;                    /* 0x0360 */
+        __u8    pad_0x0368[0x0380-0x0368];      /* 0x0368 */
 
         /* Interrupt response block. */
         __u8    irb[64];                        /* 0x0380 */
diff --git a/arch/s390/include/asm/mman.h b/arch/s390/include/asm/mman.h
index da01432e8f44..f63fe7b431ed 100644
--- a/arch/s390/include/asm/mman.h
+++ b/arch/s390/include/asm/mman.h
@@ -9,7 +9,7 @@
 #ifndef __S390_MMAN_H__
 #define __S390_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 32e8f6aa4384..3e3594d01f83 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -150,7 +150,7 @@ void arch_alloc_page(struct page *page, int order);
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #define __HAVE_ARCH_GATE_AREA 1
 
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 5caddd4f7bed..60a7b1a1702f 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -112,12 +112,15 @@ extern char empty_zero_page[PAGE_SIZE];
  * effect, this also makes sure that 64 bit module code cannot be used
  * as system call address.
  */
+
+extern unsigned long VMALLOC_START;
+
 #ifndef __s390x__
-#define VMALLOC_START   0x78000000UL
+#define VMALLOC_SIZE    (96UL << 20)
 #define VMALLOC_END     0x7e000000UL
 #define VMEM_MAP_END    0x80000000UL
 #else /* __s390x__ */
-#define VMALLOC_START   0x3e000000000UL
+#define VMALLOC_SIZE    (1UL << 30)
 #define VMALLOC_END     0x3e040000000UL
 #define VMEM_MAP_END    0x40000000000UL
 #endif /* __s390x__ */
diff --git a/arch/s390/include/asm/seccomp.h b/arch/s390/include/asm/seccomp.h
new file mode 100644
index 000000000000..781a9cf9b002
--- /dev/null
+++ b/arch/s390/include/asm/seccomp.h
@@ -0,0 +1,16 @@
+#ifndef _ASM_S390_SECCOMP_H
+#define _ASM_S390_SECCOMP_H
+
+#include <linux/unistd.h>
+
+#define __NR_seccomp_read       __NR_read
+#define __NR_seccomp_write      __NR_write
+#define __NR_seccomp_exit       __NR_exit
+#define __NR_seccomp_sigreturn  __NR_sigreturn
+
+#define __NR_seccomp_read_32    __NR_read
+#define __NR_seccomp_write_32   __NR_write
+#define __NR_seccomp_exit_32    __NR_exit
+#define __NR_seccomp_sigreturn_32 __NR_sigreturn
+
+#endif  /* _ASM_S390_SECCOMP_H */
diff --git a/arch/s390/include/asm/signal.h b/arch/s390/include/asm/signal.h
index f6cfddb278cb..cdf5cb2fe03f 100644
--- a/arch/s390/include/asm/signal.h
+++ b/arch/s390/include/asm/signal.h
@@ -115,7 +115,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/s390/include/asm/spinlock.h b/arch/s390/include/asm/spinlock.h
index f3861b09ebb0..c9af0d19c7ab 100644
--- a/arch/s390/include/asm/spinlock.h
+++ b/arch/s390/include/asm/spinlock.h
@@ -122,8 +122,10 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lp)
 #define __raw_write_can_lock(x) ((x)->lock == 0)
 
 extern void _raw_read_lock_wait(raw_rwlock_t *lp);
+extern void _raw_read_lock_wait_flags(raw_rwlock_t *lp, unsigned long flags);
 extern int _raw_read_trylock_retry(raw_rwlock_t *lp);
 extern void _raw_write_lock_wait(raw_rwlock_t *lp);
+extern void _raw_write_lock_wait_flags(raw_rwlock_t *lp, unsigned long flags);
 extern int _raw_write_trylock_retry(raw_rwlock_t *lp);
 
 static inline void __raw_read_lock(raw_rwlock_t *rw)
@@ -134,6 +136,14 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
                 _raw_read_lock_wait(rw);
 }
 
+static inline void __raw_read_lock_flags(raw_rwlock_t *rw, unsigned long flags)
+{
+        unsigned int old;
+        old = rw->lock & 0x7fffffffU;
+        if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old)
+                _raw_read_lock_wait_flags(rw, flags);
+}
+
 static inline void __raw_read_unlock(raw_rwlock_t *rw)
 {
         unsigned int old, cmp;
@@ -151,6 +161,12 @@ static inline void __raw_write_lock(raw_rwlock_t *rw)
                 _raw_write_lock_wait(rw);
 }
 
+static inline void __raw_write_lock_flags(raw_rwlock_t *rw, unsigned long flags)
+{
+        if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0))
+                _raw_write_lock_wait_flags(rw, flags);
+}
+
 static inline void __raw_write_unlock(raw_rwlock_t *rw)
 {
         _raw_compare_and_swap(&rw->lock, 0x80000000, 0);
@@ -172,9 +188,6 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw)
         return _raw_write_trylock_retry(rw);
 }
 
-#define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock)
-#define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock)
-
 #define _raw_read_relax(lock)   cpu_relax()
 #define _raw_write_relax(lock)  cpu_relax()
 
diff --git a/arch/s390/include/asm/suspend.h b/arch/s390/include/asm/suspend.h
deleted file mode 100644
index 1f34580e67a7..000000000000
--- a/arch/s390/include/asm/suspend.h
+++ /dev/null
@@ -1,5 +0,0 @@
-#ifndef __ASM_S390_SUSPEND_H
-#define __ASM_S390_SUSPEND_H
-
-#endif
-
diff --git a/arch/s390/include/asm/syscall.h b/arch/s390/include/asm/syscall.h
index 2429b87eb28d..e0a73d3eb837 100644
--- a/arch/s390/include/asm/syscall.h
+++ b/arch/s390/include/asm/syscall.h
@@ -12,6 +12,7 @@
 #ifndef _ASM_SYSCALL_H
 #define _ASM_SYSCALL_H  1
 
+#include <linux/sched.h>
 #include <asm/ptrace.h>
 
 static inline long syscall_get_nr(struct task_struct *task,
diff --git a/arch/s390/include/asm/termios.h b/arch/s390/include/asm/termios.h
index 67f66278f533..bc3a35cefc96 100644
--- a/arch/s390/include/asm/termios.h
+++ b/arch/s390/include/asm/termios.h
@@ -60,7 +60,7 @@ struct termio {
 #define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
 #define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
 
-#include <asm-generic/termios.h>
+#include <asm-generic/termios-base.h>
 
 #endif  /* __KERNEL__ */
 
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index 461f2abd2e6f..925bcc649035 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -83,14 +83,16 @@ static inline struct thread_info *current_thread_info(void)
 /*
  * thread information flags bit numbers
  */
-#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
 #define TIF_NOTIFY_RESUME       1       /* callback before returning to user */
 #define TIF_SIGPENDING          2       /* signal pending */
 #define TIF_NEED_RESCHED        3       /* rescheduling necessary */
 #define TIF_RESTART_SVC         4       /* restart svc with new svc number */
-#define TIF_SYSCALL_AUDIT       5       /* syscall auditing active */
 #define TIF_SINGLE_STEP         6       /* deliver sigtrap on return to user */
 #define TIF_MCCK_PENDING        7       /* machine check handling is pending */
+#define TIF_SYSCALL_TRACE       8       /* syscall trace active */
+#define TIF_SYSCALL_AUDIT       9       /* syscall auditing active */
+#define TIF_SECCOMP             10      /* secure computing */
+#define TIF_SYSCALL_FTRACE      11      /* ftrace syscall instrumentation */
 #define TIF_USEDFPU             16      /* FPU was used by this task this quantum (SMP) */
 #define TIF_POLLING_NRFLAG      17      /* true if poll_idle() is polling 
                                            TIF_NEED_RESCHED */
@@ -99,15 +101,17 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_RESTORE_SIGMASK     20      /* restore signal mask in do_signal() */
 #define TIF_FREEZE              21      /* thread is freezing for suspend */
 
-#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
 #define _TIF_RESTART_SVC        (1<<TIF_RESTART_SVC)
-#define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SINGLE_STEP        (1<<TIF_SINGLE_STEP)
 #define _TIF_MCCK_PENDING       (1<<TIF_MCCK_PENDING)
+#define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
+#define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
+#define _TIF_SECCOMP            (1<<TIF_SECCOMP)
+#define _TIF_SYSCALL_FTRACE     (1<<TIF_SYSCALL_FTRACE)
 #define _TIF_USEDFPU            (1<<TIF_USEDFPU)
 #define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_31BIT              (1<<TIF_31BIT)
diff --git a/arch/s390/include/asm/types.h b/arch/s390/include/asm/types.h
index 3dc3fc228812..04d6b95a89c6 100644
--- a/arch/s390/include/asm/types.h
+++ b/arch/s390/include/asm/types.h
@@ -28,12 +28,6 @@ typedef __signed__ long saddr_t;
  */
 #ifdef __KERNEL__
 
-#ifndef __s390x__
-#define BITS_PER_LONG 32
-#else
-#define BITS_PER_LONG 64
-#endif
-
 #ifndef __ASSEMBLY__
 
 typedef u64 dma64_addr_t;
diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h
index 0235970278f0..8377e91533d2 100644
--- a/arch/s390/include/asm/uaccess.h
+++ b/arch/s390/include/asm/uaccess.h
@@ -131,7 +131,7 @@ static inline int __get_user_fn(size_t size, const void __user *ptr, void *x)
 
 #define put_user(x, ptr)                                        \
 ({                                                              \
-        might_sleep();                                          \
+        might_fault();                                          \
         __put_user(x, ptr);                                     \
 })
 
@@ -180,7 +180,7 @@ extern int __put_user_bad(void) __attribute__((noreturn));
 
 #define get_user(x, ptr)                                        \
 ({                                                              \
-        might_sleep();                                          \
+        might_fault();                                          \
         __get_user(x, ptr);                                     \
 })
 
@@ -231,7 +231,7 @@ __copy_to_user(void __user *to, const void *from, unsigned long n)
 static inline unsigned long __must_check
 copy_to_user(void __user *to, const void *from, unsigned long n)
 {
-        might_sleep();
+        might_fault();
         if (access_ok(VERIFY_WRITE, to, n))
                 n = __copy_to_user(to, from, n);
         return n;
@@ -282,7 +282,7 @@ __copy_from_user(void *to, const void __user *from, unsigned long n)
 static inline unsigned long __must_check
 copy_from_user(void *to, const void __user *from, unsigned long n)
 {
-        might_sleep();
+        might_fault();
         if (access_ok(VERIFY_READ, from, n))
                 n = __copy_from_user(to, from, n);
         else
@@ -299,7 +299,7 @@ __copy_in_user(void __user *to, const void __user *from, unsigned long n)
 static inline unsigned long __must_check
 copy_in_user(void __user *to, const void __user *from, unsigned long n)
 {
-        might_sleep();
+        might_fault();
         if (__access_ok(from,n) && __access_ok(to,n))
                 n = __copy_in_user(to, from, n);
         return n;
@@ -312,7 +312,7 @@ static inline long __must_check
 strncpy_from_user(char *dst, const char __user *src, long count)
 {
         long res = -EFAULT;
-        might_sleep();
+        might_fault();
         if (access_ok(VERIFY_READ, src, 1))
                 res = uaccess.strncpy_from_user(count, src, dst);
         return res;
@@ -321,7 +321,7 @@ strncpy_from_user(char *dst, const char __user *src, long count)
 static inline unsigned long
 strnlen_user(const char __user * src, unsigned long n)
 {
-        might_sleep();
+        might_fault();
         return uaccess.strnlen_user(n, src);
 }
 
@@ -354,7 +354,7 @@ __clear_user(void __user *to, unsigned long n)
 static inline unsigned long __must_check
 clear_user(void __user *to, unsigned long n)
 {
-        might_sleep();
+        might_fault();
         if (access_ok(VERIFY_WRITE, to, n))
                 n = uaccess.clear_user(n, to);
         return n;
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index f0f19e6ace6c..c80602d7c880 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -267,7 +267,9 @@
 #define __NR_epoll_create1      327
 #define __NR_preadv             328
 #define __NR_pwritev            329
-#define NR_syscalls 330
+#define __NR_rt_tgsigqueueinfo  330
+#define __NR_perf_counter_open  331
+#define NR_syscalls 332
 
 /* 
  * There are some system calls that are not present on 64 bit, some
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 228e3105ded7..c75ed43b1a18 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -3,8 +3,9 @@
 #
 
 ifdef CONFIG_FUNCTION_TRACER
-# Do not trace early boot code
+# Don't trace early setup code and tracing code
 CFLAGS_REMOVE_early.o = -pg
+CFLAGS_REMOVE_ftrace.o = -pg
 endif
 
 #
@@ -22,7 +23,7 @@ CFLAGS_sysinfo.o += -Iinclude/math-emu -Iarch/s390/math-emu -w
 obj-y   :=  bitmap.o traps.o time.o process.o base.o early.o setup.o \
             processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \
             s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o \
-            vdso.o vtime.o sysinfo.o nmi.o
+            vdso.o vtime.o sysinfo.o nmi.o sclp.o
 
 obj-y   += $(if $(CONFIG_64BIT),entry64.o,entry.o)
 obj-y   += $(if $(CONFIG_64BIT),reipl64.o,reipl.o)
@@ -41,6 +42,8 @@ obj-$(CONFIG_COMPAT)		+= compat_linux.o compat_signal.o \
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-$(CONFIG_KPROBES)           += kprobes.o
 obj-$(CONFIG_FUNCTION_TRACER)   += mcount.o
+obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
+obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
 
 # Kexec part
 S390_KEXEC_OBJS := machine_kexec.o crash.o
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index fb38af6316bb..88a83366819f 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1823,3 +1823,20 @@ compat_sys_pwritev_wrapper:
         llgfr   %r5,%r5                 # u32
         llgfr   %r6,%r6                 # u32
         jg      compat_sys_pwritev      # branch to system call
+
+        .globl  compat_sys_rt_tgsigqueueinfo_wrapper
+compat_sys_rt_tgsigqueueinfo_wrapper:
+        lgfr    %r2,%r2                 # compat_pid_t
+        lgfr    %r3,%r3                 # compat_pid_t
+        lgfr    %r4,%r4                 # int
+        llgtr   %r5,%r5                 # struct compat_siginfo *
+        jg      compat_sys_rt_tgsigqueueinfo_wrapper # branch to system call
+
+        .globl  sys_perf_counter_open_wrapper
+sys_perf_counter_open_wrapper:
+        llgtr   %r2,%r2                 # const struct perf_counter_attr *
+        lgfr    %r3,%r3                 # pid_t
+        lgfr    %r4,%r4                 # int
+        lgfr    %r5,%r5                 # int
+        llgfr   %r6,%r6                 # unsigned long
+        jg      sys_perf_counter_open   # branch to system call
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index cf09948faad6..fb263736826c 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -11,6 +11,7 @@
 #include <linux/errno.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
+#include <linux/ftrace.h>
 #include <linux/lockdep.h>
 #include <linux/module.h>
 #include <linux/pfn.h>
@@ -410,5 +411,8 @@ void __init startup_init(void)
         sclp_facilities_detect();
         detect_memory_layout(memory_chunk);
         S390_lowcore.machine_flags = machine_flags;
+#ifdef CONFIG_DYNAMIC_FTRACE
+        S390_lowcore.ftrace_func = (unsigned long)ftrace_caller;
+#endif
         lockdep_on();
 }
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index f3e275934213..c4c80a22bc1f 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -53,6 +53,8 @@ _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
                  _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
                  _TIF_MCCK_PENDING)
+_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
+                _TIF_SECCOMP>>8 | _TIF_SYSCALL_FTRACE>>8)
 
 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
 STACK_SIZE  = 1 << STACK_SHIFT
@@ -265,7 +267,7 @@ sysc_do_restart:
         sth     %r7,SP_SVCNR(%r15)
         sll     %r7,2             # svc number *4
         l       %r8,BASED(.Lsysc_table)
-        tm      __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
+        tm      __TI_flags+2(%r9),_TIF_SYSCALL
         l       %r8,0(%r7,%r8)    # get system call addr.
         bnz     BASED(sysc_tracesys)
         basr    %r14,%r8          # call sys_xxxx
@@ -405,7 +407,7 @@ sysc_tracego:
         basr    %r14,%r8                # call sys_xxx
         st      %r2,SP_R2(%r15)         # store return value
 sysc_tracenogo:
-        tm      __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
+        tm      __TI_flags+2(%r9),_TIF_SYSCALL
         bz      BASED(sysc_return)
         l       %r1,BASED(.Ltrace_exit)
         la      %r2,SP_PTREGS(%r15)     # load pt_regs
@@ -1107,6 +1109,7 @@ cleanup_io_leave_insn:
 
                 .section .rodata, "a"
 #define SYSCALL(esa,esame,emu)  .long esa
+        .globl  sys_call_table
 sys_call_table:
 #include "syscalls.S"
 #undef SYSCALL
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 84a105838e03..f6618e9e15ef 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -56,6 +56,8 @@ _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
                  _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
                  _TIF_MCCK_PENDING)
+_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
+                _TIF_SECCOMP>>8 | _TIF_SYSCALL_FTRACE>>8)
 
 #define BASED(name) name-system_call(%r13)
 
@@ -260,7 +262,7 @@ sysc_do_restart:
         larl    %r10,sys_call_table_emu  # use 31 bit emulation system calls
 sysc_noemu:
 #endif
-        tm      __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
+        tm      __TI_flags+6(%r9),_TIF_SYSCALL
         lgf     %r8,0(%r7,%r10) # load address of system call routine
         jnz     sysc_tracesys
         basr    %r14,%r8        # call sys_xxxx
@@ -391,7 +393,7 @@ sysc_tracego:
         basr    %r14,%r8                # call sys_xxx
         stg     %r2,SP_R2(%r15)         # store return value
 sysc_tracenogo:
-        tm      __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
+        tm      __TI_flags+6(%r9),_TIF_SYSCALL
         jz      sysc_return
         la      %r2,SP_PTREGS(%r15)     # load pt_regs
         larl    %r14,sysc_return        # return point is sysc_return
@@ -1058,6 +1060,7 @@ cleanup_io_leave_insn:
 
                 .section .rodata, "a"
 #define SYSCALL(esa,esame,emu)  .long esame
+        .globl  sys_call_table
 sys_call_table:
 #include "syscalls.S"
 #undef SYSCALL
diff --git a/arch/s390/kernel/ftrace.c b/arch/s390/kernel/ftrace.c
new file mode 100644
index 000000000000..82ddfd3a75af
--- /dev/null
+++ b/arch/s390/kernel/ftrace.c
@@ -0,0 +1,260 @@
+/*
+ * Dynamic function tracer architecture backend.
+ *
+ * Copyright IBM Corp. 2009
+ *
+ *   Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>,
+ *
+ */
+
+#include <linux/hardirq.h>
+#include <linux/uaccess.h>
+#include <linux/ftrace.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <trace/syscall.h>
+#include <asm/lowcore.h>
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+
+void ftrace_disable_code(void);
+void ftrace_disable_return(void);
+void ftrace_call_code(void);
+void ftrace_nop_code(void);
+
+#define FTRACE_INSN_SIZE 4
+
+#ifdef CONFIG_64BIT
+
+asm(
+        "       .align  4\n"
+        "ftrace_disable_code:\n"
+        "       j       0f\n"
+        "       .word   0x0024\n"
+        "       lg      %r1,"__stringify(__LC_FTRACE_FUNC)"\n"
+        "       basr    %r14,%r1\n"
+        "ftrace_disable_return:\n"
+        "       lg      %r14,8(15)\n"
+        "       lgr     %r0,%r0\n"
+        "0:\n");
+
+asm(
+        "       .align  4\n"
+        "ftrace_nop_code:\n"
+        "       j       .+"__stringify(MCOUNT_INSN_SIZE)"\n");
+
+asm(
+        "       .align  4\n"
+        "ftrace_call_code:\n"
+        "       stg     %r14,8(%r15)\n");
+
+#else /* CONFIG_64BIT */
+
+asm(
+        "       .align  4\n"
+        "ftrace_disable_code:\n"
+        "       j       0f\n"
+        "       l       %r1,"__stringify(__LC_FTRACE_FUNC)"\n"
+        "       basr    %r14,%r1\n"
+        "ftrace_disable_return:\n"
+        "       l       %r14,4(%r15)\n"
+        "       j       0f\n"
+        "       bcr     0,%r7\n"
+        "       bcr     0,%r7\n"
+        "       bcr     0,%r7\n"
+        "       bcr     0,%r7\n"
+        "       bcr     0,%r7\n"
+        "       bcr     0,%r7\n"
+        "0:\n");
+
+asm(
+        "       .align  4\n"
+        "ftrace_nop_code:\n"
+        "       j       .+"__stringify(MCOUNT_INSN_SIZE)"\n");
+
+asm(
+        "       .align  4\n"
+        "ftrace_call_code:\n"
+        "       st      %r14,4(%r15)\n");
+
+#endif /* CONFIG_64BIT */
+
+static int ftrace_modify_code(unsigned long ip,
+                              void *old_code, int old_size,
+                              void *new_code, int new_size)
+{
+        unsigned char replaced[MCOUNT_INSN_SIZE];
+
+        /*
+         * Note: Due to modules code can disappear and change.
+         *  We need to protect against faulting as well as code
+         *  changing. We do this by using the probe_kernel_*
+         *  functions.
+         *  This however is just a simple sanity check.
+         */
+        if (probe_kernel_read(replaced, (void *)ip, old_size))
+                return -EFAULT;
+        if (memcmp(replaced, old_code, old_size) != 0)
+                return -EINVAL;
+        if (probe_kernel_write((void *)ip, new_code, new_size))
+                return -EPERM;
+        return 0;
+}
+
+static int ftrace_make_initial_nop(struct module *mod, struct dyn_ftrace *rec,
+                                   unsigned long addr)
+{
+        return ftrace_modify_code(rec->ip,
+                                  ftrace_call_code, FTRACE_INSN_SIZE,
+                                  ftrace_disable_code, MCOUNT_INSN_SIZE);
+}
+
+int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec,
+                    unsigned long addr)
+{
+        if (addr == MCOUNT_ADDR)
+                return ftrace_make_initial_nop(mod, rec, addr);
+        return ftrace_modify_code(rec->ip,
+                                  ftrace_call_code, FTRACE_INSN_SIZE,
+                                  ftrace_nop_code, FTRACE_INSN_SIZE);
+}
+
+int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
+{
+        return ftrace_modify_code(rec->ip,
+                                  ftrace_nop_code, FTRACE_INSN_SIZE,
+                                  ftrace_call_code, FTRACE_INSN_SIZE);
+}
+
+int ftrace_update_ftrace_func(ftrace_func_t func)
+{
+        ftrace_dyn_func = (unsigned long)func;
+        return 0;
+}
+
+int __init ftrace_dyn_arch_init(void *data)
+{
+        *(unsigned long *)data = 0;
+        return 0;
+}
+
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+#ifdef CONFIG_DYNAMIC_FTRACE
+/*
+ * Patch the kernel code at ftrace_graph_caller location:
+ * The instruction there is branch relative on condition. The condition mask
+ * is either all ones (always branch aka disable ftrace_graph_caller) or all
+ * zeroes (nop aka enable ftrace_graph_caller).
+ * Instruction format for brc is a7m4xxxx where m is the condition mask.
+ */
+int ftrace_enable_ftrace_graph_caller(void)
+{
+        unsigned short opcode = 0xa704;
+
+        return probe_kernel_write(ftrace_graph_caller, &opcode, sizeof(opcode));
+}
+
+int ftrace_disable_ftrace_graph_caller(void)
+{
+        unsigned short opcode = 0xa7f4;
+
+        return probe_kernel_write(ftrace_graph_caller, &opcode, sizeof(opcode));
+}
+
+static inline unsigned long ftrace_mcount_call_adjust(unsigned long addr)
+{
+        return addr - (ftrace_disable_return - ftrace_disable_code);
+}
+
+#else /* CONFIG_DYNAMIC_FTRACE */
+
+static inline unsigned long ftrace_mcount_call_adjust(unsigned long addr)
+{
+        return addr - MCOUNT_OFFSET_RET;
+}
+
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+/*
+ * Hook the return address and push it in the stack of return addresses
+ * in current thread info.
+ */
+unsigned long prepare_ftrace_return(unsigned long ip, unsigned long parent)
+{
+        struct ftrace_graph_ent trace;
+
+        /* Nmi's are currently unsupported. */
+        if (unlikely(in_nmi()))
+                goto out;
+        if (unlikely(atomic_read(&current->tracing_graph_pause)))
+                goto out;
+        if (ftrace_push_return_trace(parent, ip, &trace.depth) == -EBUSY)
+                goto out;
+        trace.func = ftrace_mcount_call_adjust(ip) & PSW_ADDR_INSN;
+        /* Only trace if the calling function expects to. */
+        if (!ftrace_graph_entry(&trace)) {
+                current->curr_ret_stack--;
+                goto out;
+        }
+        parent = (unsigned long)return_to_handler;
+out:
+        return parent;
+}
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+
+#ifdef CONFIG_FTRACE_SYSCALLS
+
+extern unsigned long __start_syscalls_metadata[];
+extern unsigned long __stop_syscalls_metadata[];
+extern unsigned int sys_call_table[];
+
+static struct syscall_metadata **syscalls_metadata;
+
+struct syscall_metadata *syscall_nr_to_meta(int nr)
+{
+        if (!syscalls_metadata || nr >= NR_syscalls || nr < 0)
+                return NULL;
+
+        return syscalls_metadata[nr];
+}
+
+static struct syscall_metadata *find_syscall_meta(unsigned long syscall)
+{
+        struct syscall_metadata *start;
+        struct syscall_metadata *stop;
+        char str[KSYM_SYMBOL_LEN];
+
+        start = (struct syscall_metadata *)__start_syscalls_metadata;
+        stop = (struct syscall_metadata *)__stop_syscalls_metadata;
+        kallsyms_lookup(syscall, NULL, NULL, NULL, str);
+
+        for ( ; start < stop; start++) {
+                if (start->name && !strcmp(start->name + 3, str + 3))
+                        return start;
+        }
+        return NULL;
+}
+
+void arch_init_ftrace_syscalls(void)
+{
+        struct syscall_metadata *meta;
+        int i;
+        static atomic_t refs;
+
+        if (atomic_inc_return(&refs) != 1)
+                goto out;
+        syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) * NR_syscalls,
+                                    GFP_KERNEL);
+        if (!syscalls_metadata)
+                goto out;
+        for (i = 0; i < NR_syscalls; i++) {
+                meta = find_syscall_meta((unsigned long)sys_call_table[i]);
+                syscalls_metadata[i] = meta;
+        }
+        return;
+out:
+        atomic_dec(&refs);
+}
+#endif
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 22596d70fc2e..6d227413cbe7 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -1,7 +1,5 @@
 /*
- *  arch/s390/kernel/head.S
- *
- * Copyright (C) IBM Corp. 1999,2006
+ * Copyright IBM Corp. 1999,2009
  *
  *    Author(s): Hartmut Penner <hp@de.ibm.com>
  *               Martin Schwidefsky <schwidefsky@de.ibm.com>
@@ -479,27 +477,58 @@ startup:basr	%r13,0			# get base
         mvc     __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
         mvc     __LC_EXIT_TIMER(8),5f-.LPG0(%r13)
 #ifndef CONFIG_MARCH_G5
-        # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
-        stidp   __LC_CPUID              # store cpuid
-        lhi     %r0,(3f-2f) / 2
-        la      %r1,2f-.LPG0(%r13)
-0:      clc     __LC_CPUID+4(2),0(%r1)
-        jne     3f
-        lpsw    1f-.LPG0(13)            # machine type not good enough, crash
+        # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10}
+        xc      __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST
+        stfl    __LC_STFL_FAC_LIST      # store facility list
+        tm      __LC_STFL_FAC_LIST,0x01 # stfle available ?
+        jz      0f
+        la      %r0,0
+        .insn   s,0xb2b00000,__LC_STFL_FAC_LIST # store facility list extended
+0:      l       %r0,__LC_STFL_FAC_LIST
+        n       %r0,2f+8-.LPG0(%r13)
+        cl      %r0,2f+8-.LPG0(%r13)
+        jne     1f
+        l       %r0,__LC_STFL_FAC_LIST+4
+        n       %r0,2f+12-.LPG0(%r13)
+        cl      %r0,2f+12-.LPG0(%r13)
+        je      3f
+1:      l       %r15,.Lstack-.LPG0(%r13)
+        ahi     %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
+        ahi     %r15,-96
+        la      %r2,.Lals_string-.LPG0(%r13)
+        l       %r3,.Lsclp_print-.LPG0(%r13)
+        basr    %r14,%r3
+        lpsw    2f-.LPG0(%r13)          # machine type not good enough, crash
+.Lals_string:
+        .asciz  "The Linux kernel requires more recent processor hardware"
+.Lsclp_print:
+        .long   _sclp_print_early
+.Lstack:
+        .long   init_thread_union
         .align 16
-1:      .long   0x000a0000,0x00000000
-2:
+2:      .long   0x000a0000,0x8badcccc
+#if defined(CONFIG_64BIT)
 #if defined(CONFIG_MARCH_Z10)
-        .short 0x9672, 0x2064, 0x2066, 0x2084, 0x2086, 0x2094, 0x2096
+        .long 0xc100efe3, 0xf0680000
 #elif defined(CONFIG_MARCH_Z9_109)
-        .short 0x9672, 0x2064, 0x2066, 0x2084, 0x2086
+        .long 0xc100efc3, 0x00000000
 #elif defined(CONFIG_MARCH_Z990)
-        .short 0x9672, 0x2064, 0x2066
+        .long 0xc0002000, 0x00000000
 #elif defined(CONFIG_MARCH_Z900)
-        .short 0x9672
+        .long 0xc0000000, 0x00000000
+#endif
+#else
+#if defined(CONFIG_MARCH_Z10)
+        .long 0x8100c880, 0x00000000
+#elif defined(CONFIG_MARCH_Z9_109)
+        .long 0x8100c880, 0x00000000
+#elif defined(CONFIG_MARCH_Z990)
+        .long 0x80002000, 0x00000000
+#elif defined(CONFIG_MARCH_Z900)
+        .long 0x80000000, 0x00000000
+#endif
 #endif
-3:      la      %r1,2(%r1)
-        brct    %r0,0b
+3:
 #endif
 
         l       %r13,4f-.LPG0(%r13)
diff --git a/arch/s390/kernel/kprobes.c b/arch/s390/kernel/kprobes.c
index a01cf0284db2..9bb2f6241d9f 100644
--- a/arch/s390/kernel/kprobes.c
+++ b/arch/s390/kernel/kprobes.c
@@ -25,9 +25,9 @@
 #include <linux/preempt.h>
 #include <linux/stop_machine.h>
 #include <linux/kdebug.h>
+#include <linux/uaccess.h>
 #include <asm/cacheflush.h>
 #include <asm/sections.h>
-#include <asm/uaccess.h>
 #include <linux/module.h>
 
 DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
@@ -155,35 +155,8 @@ void __kprobes get_instruction_type(struct arch_specific_insn *ainsn)
 static int __kprobes swap_instruction(void *aref)
 {
         struct ins_replace_args *args = aref;
-        u32 *addr;
-        u32 instr;
-        int err = -EFAULT;
 
-        /*
-         * Text segment is read-only, hence we use stura to bypass dynamic
-         * address translation to exchange the instruction. Since stura
-         * always operates on four bytes, but we only want to exchange two
-         * bytes do some calculations to get things right. In addition we
-         * shall not cross any page boundaries (vmalloc area!) when writing
-         * the new instruction.
-         */
-        addr = (u32 *)((unsigned long)args->ptr & -4UL);
-        if ((unsigned long)args->ptr & 2)
-                instr = ((*addr) & 0xffff0000) | args->new;
-        else
-                instr = ((*addr) & 0x0000ffff) | args->new << 16;
-
-        asm volatile(
-                "       lra     %1,0(%1)\n"
-                "0:     stura   %2,%1\n"
-                "1:     la      %0,0\n"
-                "2:\n"
-                EX_TABLE(0b,2b)
-                : "+d" (err)
-                : "a" (addr), "d" (instr)
-                : "memory", "cc");
-
-        return err;
+        return probe_kernel_write(args->ptr, &args->new, sizeof(args->new));
 }
 
 void __kprobes arch_arm_kprobe(struct kprobe *p)
diff --git a/arch/s390/kernel/mcount.S b/arch/s390/kernel/mcount.S
index 80641224a095..2a0a5e97ba8c 100644
--- a/arch/s390/kernel/mcount.S
+++ b/arch/s390/kernel/mcount.S
@@ -1,5 +1,5 @@
 /*
- * Copyright IBM Corp. 2008
+ * Copyright IBM Corp. 2008,2009
  *
  *   Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>,
  *
@@ -7,36 +7,64 @@
 
 #include <asm/asm-offsets.h>
 
-#ifndef CONFIG_64BIT
-.globl _mcount
+        .globl ftrace_stub
+ftrace_stub:
+        br      %r14
+
+#ifdef CONFIG_64BIT
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+
+        .globl _mcount
 _mcount:
-        stm     %r0,%r5,8(%r15)
-        st      %r14,56(%r15)
-        lr      %r1,%r15
-        ahi     %r15,-96
-        l       %r3,100(%r15)
-        la      %r2,0(%r14)
-        st      %r1,__SF_BACKCHAIN(%r15)
-        la      %r3,0(%r3)
-        bras    %r14,0f
-        .long   ftrace_trace_function
-0:      l       %r14,0(%r14)
-        l       %r14,0(%r14)
-        basr    %r14,%r14
-        ahi     %r15,96
-        lm      %r0,%r5,8(%r15)
-        l       %r14,56(%r15)
         br      %r14
 
-.globl ftrace_stub
-ftrace_stub:
+        .globl ftrace_caller
+ftrace_caller:
+        larl    %r1,function_trace_stop
+        icm     %r1,0xf,0(%r1)
+        bnzr    %r14
+        stmg    %r2,%r5,32(%r15)
+        stg     %r14,112(%r15)
+        lgr     %r1,%r15
+        aghi    %r15,-160
+        stg     %r1,__SF_BACKCHAIN(%r15)
+        lgr     %r2,%r14
+        lg      %r3,168(%r15)
+        larl    %r14,ftrace_dyn_func
+        lg      %r14,0(%r14)
+        basr    %r14,%r14
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        .globl  ftrace_graph_caller
+ftrace_graph_caller:
+        # This unconditional branch gets runtime patched. Change only if
+        # you know what you are doing. See ftrace_enable_graph_caller().
+        j       0f
+        lg      %r2,272(%r15)
+        lg      %r3,168(%r15)
+        brasl   %r14,prepare_ftrace_return
+        stg     %r2,168(%r15)
+0:
+#endif
+        aghi    %r15,160
+        lmg     %r2,%r5,32(%r15)
+        lg      %r14,112(%r15)
         br      %r14
 
-#else /* CONFIG_64BIT */
+        .data
+        .globl  ftrace_dyn_func
+ftrace_dyn_func:
+        .quad   ftrace_stub
+        .previous
+
+#else /* CONFIG_DYNAMIC_FTRACE */
 
-.globl _mcount
+        .globl _mcount
 _mcount:
-        stmg    %r0,%r5,16(%r15)
+        larl    %r1,function_trace_stop
+        icm     %r1,0xf,0(%r1)
+        bnzr    %r14
+        stmg    %r2,%r5,32(%r15)
         stg     %r14,112(%r15)
         lgr     %r1,%r15
         aghi    %r15,-160
@@ -46,13 +74,143 @@ _mcount:
         larl    %r14,ftrace_trace_function
         lg      %r14,0(%r14)
         basr    %r14,%r14
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        lg      %r2,272(%r15)
+        lg      %r3,168(%r15)
+        brasl   %r14,prepare_ftrace_return
+        stg     %r2,168(%r15)
+#endif
         aghi    %r15,160
-        lmg     %r0,%r5,16(%r15)
+        lmg     %r2,%r5,32(%r15)
         lg      %r14,112(%r15)
         br      %r14
 
-.globl ftrace_stub
-ftrace_stub:
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+
+        .globl  return_to_handler
+return_to_handler:
+        stmg    %r2,%r5,32(%r15)
+        lgr     %r1,%r15
+        aghi    %r15,-160
+        stg     %r1,__SF_BACKCHAIN(%r15)
+        brasl   %r14,ftrace_return_to_handler
+        aghi    %r15,160
+        lgr     %r14,%r2
+        lmg     %r2,%r5,32(%r15)
+        br      %r14
+
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+
+#else /* CONFIG_64BIT */
+
+#ifdef CONFIG_DYNAMIC_FTRACE
+
+        .globl _mcount
+_mcount:
+        br      %r14
+
+        .globl ftrace_caller
+ftrace_caller:
+        stm     %r2,%r5,16(%r15)
+        bras    %r1,2f
+0:      .long   ftrace_trace_function
+1:      .long   function_trace_stop
+2:      l       %r2,1b-0b(%r1)
+        icm     %r2,0xf,0(%r2)
+        jnz     3f
+        st      %r14,56(%r15)
+        lr      %r0,%r15
+        ahi     %r15,-96
+        l       %r3,100(%r15)
+        la      %r2,0(%r14)
+        st      %r0,__SF_BACKCHAIN(%r15)
+        la      %r3,0(%r3)
+        l       %r14,0b-0b(%r1)
+        l       %r14,0(%r14)
+        basr    %r14,%r14
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        .globl  ftrace_graph_caller
+ftrace_graph_caller:
+        # This unconditional branch gets runtime patched. Change only if
+        # you know what you are doing. See ftrace_enable_graph_caller().
+        j       1f
+        bras    %r1,0f
+        .long   prepare_ftrace_return
+0:      l       %r2,152(%r15)
+        l       %r4,0(%r1)
+        l       %r3,100(%r15)
+        basr    %r14,%r4
+        st      %r2,100(%r15)
+1:
+#endif
+        ahi     %r15,96
+        l       %r14,56(%r15)
+3:      lm      %r2,%r5,16(%r15)
         br      %r14
 
+        .data
+        .globl  ftrace_dyn_func
+ftrace_dyn_func:
+        .long   ftrace_stub
+        .previous
+
+#else /* CONFIG_DYNAMIC_FTRACE */
+
+        .globl _mcount
+_mcount:
+        stm     %r2,%r5,16(%r15)
+        bras    %r1,2f
+0:      .long   ftrace_trace_function
+1:      .long   function_trace_stop
+2:      l       %r2,1b-0b(%r1)
+        icm     %r2,0xf,0(%r2)
+        jnz     3f
+        st      %r14,56(%r15)
+        lr      %r0,%r15
+        ahi     %r15,-96
+        l       %r3,100(%r15)
+        la      %r2,0(%r14)
+        st      %r0,__SF_BACKCHAIN(%r15)
+        la      %r3,0(%r3)
+        l       %r14,0b-0b(%r1)
+        l       %r14,0(%r14)
+        basr    %r14,%r14
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+        bras    %r1,0f
+        .long   prepare_ftrace_return
+0:      l       %r2,152(%r15)
+        l       %r4,0(%r1)
+        l       %r3,100(%r15)
+        basr    %r14,%r4
+        st      %r2,100(%r15)
+#endif
+        ahi     %r15,96
+        l       %r14,56(%r15)
+3:      lm      %r2,%r5,16(%r15)
+        br      %r14
+
+#endif /* CONFIG_DYNAMIC_FTRACE */
+
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+
+        .globl  return_to_handler
+return_to_handler:
+        stm     %r2,%r5,16(%r15)
+        st      %r14,56(%r15)
+        lr      %r0,%r15
+        ahi     %r15,-96
+        st      %r0,__SF_BACKCHAIN(%r15)
+        bras    %r1,0f
+        .long   ftrace_return_to_handler
+0:      l       %r2,0b-0b(%r1)
+        basr    %r14,%r2
+        lr      %r14,%r2
+        ahi     %r15,96
+        lm      %r2,%r5,16(%r15)
+        br      %r14
+
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+
 #endif /* CONFIG_64BIT */
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c
index eed4a00cb676..ab2e3ed28abc 100644
--- a/arch/s390/kernel/module.c
+++ b/arch/s390/kernel/module.c
@@ -56,8 +56,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 static void
diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c
index 28cf196ba775..015e27da40eb 100644
--- a/arch/s390/kernel/nmi.c
+++ b/arch/s390/kernel/nmi.c
@@ -16,7 +16,7 @@
 #include <asm/lowcore.h>
 #include <asm/smp.h>
 #include <asm/etr.h>
-#include <asm/cpu.h>
+#include <asm/cputime.h>
 #include <asm/nmi.h>
 #include <asm/crw.h>
 
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index a3acd8e60aff..355f7a30c3f1 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -32,6 +32,7 @@
 #include <linux/elfcore.h>
 #include <linux/kernel_stat.h>
 #include <linux/syscalls.h>
+#include <asm/compat.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -204,7 +205,7 @@ int copy_thread(unsigned long clone_flags, unsigned long new_stackp,
         save_fp_regs(&p->thread.fp_regs);
         /* Set a new TLS ?  */
         if (clone_flags & CLONE_SETTLS) {
-                if (test_thread_flag(TIF_31BIT)) {
+                if (is_compat_task()) {
                         p->thread.acrs[0] = (unsigned int) regs->gprs[6];
                 } else {
                         p->thread.acrs[0] = (unsigned int)(regs->gprs[6] >> 32);
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index 75c496f4f16d..490b39934d65 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -36,7 +36,9 @@
 #include <linux/elf.h>
 #include <linux/regset.h>
 #include <linux/tracehook.h>
-
+#include <linux/seccomp.h>
+#include <trace/syscall.h>
+#include <asm/compat.h>
 #include <asm/segment.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
@@ -69,7 +71,7 @@ FixPerRegisters(struct task_struct *task)
         if (per_info->single_step) {
                 per_info->control_regs.bits.starting_addr = 0;
 #ifdef CONFIG_COMPAT
-                if (test_thread_flag(TIF_31BIT))
+                if (is_compat_task())
                         per_info->control_regs.bits.ending_addr = 0x7fffffffUL;
                 else
 #endif
@@ -482,8 +484,7 @@ static int peek_user_compat(struct task_struct *child,
 {
         __u32 tmp;
 
-        if (!test_thread_flag(TIF_31BIT) ||
-            (addr & 3) || addr > sizeof(struct user) - 3)
+        if (!is_compat_task() || (addr & 3) || addr > sizeof(struct user) - 3)
                 return -EIO;
 
         tmp = __peek_user_compat(child, addr);
@@ -584,8 +585,7 @@ static int __poke_user_compat(struct task_struct *child,
 static int poke_user_compat(struct task_struct *child,
                             addr_t addr, addr_t data)
 {
-        if (!test_thread_flag(TIF_31BIT) ||
-            (addr & 3) || addr > sizeof(struct user32) - 3)
+        if (!is_compat_task() || (addr & 3) || addr > sizeof(struct user32) - 3)
                 return -EIO;
 
         return __poke_user_compat(child, addr, data);
@@ -642,6 +642,9 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
 {
         long ret;
 
+        /* Do the secure computing check first. */
+        secure_computing(regs->gprs[2]);
+
         /*
          * The sysc_tracesys code in entry.S stored the system
          * call number to gprs[2].
@@ -659,8 +662,11 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
                 ret = -1;
         }
 
+        if (unlikely(test_thread_flag(TIF_SYSCALL_FTRACE)))
+                ftrace_syscall_enter(regs);
+
         if (unlikely(current->audit_context))
-                audit_syscall_entry(test_thread_flag(TIF_31BIT) ?
+                audit_syscall_entry(is_compat_task() ?
                                         AUDIT_ARCH_S390 : AUDIT_ARCH_S390X,
                                     regs->gprs[2], regs->orig_gpr2,
                                     regs->gprs[3], regs->gprs[4],
@@ -674,6 +680,9 @@ asmlinkage void do_syscall_trace_exit(struct pt_regs *regs)
                 audit_syscall_exit(AUDITSC_RESULT(regs->gprs[2]),
                                    regs->gprs[2]);
 
+        if (unlikely(test_thread_flag(TIF_SYSCALL_FTRACE)))
+                ftrace_syscall_exit(regs);
+
         if (test_thread_flag(TIF_SYSCALL_TRACE))
                 tracehook_report_syscall_exit(regs, 0);
 }
diff --git a/arch/s390/kernel/s390_ext.c b/arch/s390/kernel/s390_ext.c
index a0d2d55d7fb3..0de305b598ce 100644
--- a/arch/s390/kernel/s390_ext.c
+++ b/arch/s390/kernel/s390_ext.c
@@ -10,10 +10,11 @@
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/slab.h>
+#include <linux/ftrace.h>
 #include <linux/errno.h>
 #include <linux/kernel_stat.h>
 #include <linux/interrupt.h>
-#include <asm/cpu.h>
+#include <asm/cputime.h>
 #include <asm/lowcore.h>
 #include <asm/s390_ext.h>
 #include <asm/irq_regs.h>
@@ -112,7 +113,7 @@ int unregister_early_external_interrupt(__u16 code, ext_int_handler_t handler,
         return 0;
 }
 
-void do_extint(struct pt_regs *regs, unsigned short code)
+void __irq_entry do_extint(struct pt_regs *regs, unsigned short code)
 {
         ext_int_info_t *p;
         int index;
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
new file mode 100644
index 000000000000..20639dfe0c42
--- /dev/null
+++ b/arch/s390/kernel/sclp.S
@@ -0,0 +1,327 @@
+/*
+ * Mini SCLP driver.
+ *
+ * Copyright IBM Corp. 2004,2009
+ *
+ *   Author(s): Peter Oberparleiter <Peter.Oberparleiter@de.ibm.com>,
+ *              Heiko Carstens <heiko.carstens@de.ibm.com>,
+ *
+ */
+
+LC_EXT_NEW_PSW          = 0x58                  # addr of ext int handler
+LC_EXT_INT_PARAM        = 0x80                  # addr of ext int parameter
+LC_EXT_INT_CODE         = 0x86                  # addr of ext int code
+
+#
+# Subroutine which waits synchronously until either an external interruption
+# or a timeout occurs.
+#
+# Parameters:
+#   R2  = 0 for no timeout, non-zero for timeout in (approximated) seconds
+#
+# Returns:
+#   R2  = 0 on interrupt, 2 on timeout
+#   R3  = external interruption parameter if R2=0
+#
+
+.section ".init.text","ax"
+
+_sclp_wait_int:
+        stm     %r6,%r15,24(%r15)               # save registers
+        basr    %r13,0                          # get base register
+.LbaseS1:
+        ahi     %r15,-96                        # create stack frame
+        la      %r8,LC_EXT_NEW_PSW              # register int handler
+        mvc     .LoldpswS1-.LbaseS1(8,%r13),0(%r8)
+        mvc     0(8,%r8),.LextpswS1-.LbaseS1(%r13)
+        lhi     %r6,0x0200                      # cr mask for ext int (cr0.54)
+        ltr     %r2,%r2
+        jz      .LsetctS1
+        ahi     %r6,0x0800                      # cr mask for clock int (cr0.52)
+        stck    .LtimeS1-.LbaseS1(%r13)         # initiate timeout
+        al      %r2,.LtimeS1-.LbaseS1(%r13)
+        st      %r2,.LtimeS1-.LbaseS1(%r13)
+        sckc    .LtimeS1-.LbaseS1(%r13)
+
+.LsetctS1:
+        stctl   %c0,%c0,.LctlS1-.LbaseS1(%r13)  # enable required interrupts
+        l       %r0,.LctlS1-.LbaseS1(%r13)
+        lhi     %r1,~(0x200 | 0x800)            # clear old values
+        nr      %r1,%r0
+        or      %r1,%r6                         # set new value
+        st      %r1,.LctlS1-.LbaseS1(%r13)
+        lctl    %c0,%c0,.LctlS1-.LbaseS1(%r13)
+        st      %r0,.LctlS1-.LbaseS1(%r13)
+        lhi     %r2,2                           # return code for timeout
+.LloopS1:
+        lpsw    .LwaitpswS1-.LbaseS1(%r13)      # wait until interrupt
+.LwaitS1:
+        lh      %r7,LC_EXT_INT_CODE
+        chi     %r7,0x1004                      # timeout?
+        je      .LtimeoutS1
+        chi     %r7,0x2401                      # service int?
+        jne     .LloopS1
+        sr      %r2,%r2
+        l       %r3,LC_EXT_INT_PARAM
+.LtimeoutS1:
+        lctl    %c0,%c0,.LctlS1-.LbaseS1(%r13)  # restore interrupt setting
+        # restore old handler
+        mvc     0(8,%r8),.LoldpswS1-.LbaseS1(%r13)
+        lm      %r6,%r15,120(%r15)              # restore registers
+        br      %r14                            # return to caller
+
+        .align  8
+.LoldpswS1:
+        .long   0, 0                            # old ext int PSW
+.LextpswS1:
+        .long   0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
+.LwaitpswS1:
+        .long   0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
+.LtimeS1:
+        .quad   0                               # current time
+.LctlS1:
+        .long   0                               # CT0 contents
+
+#
+# Subroutine to synchronously issue a service call.
+#
+# Parameters:
+#   R2  = command word
+#   R3  = sccb address
+#
+# Returns:
+#   R2  = 0 on success, 1 on failure
+#   R3  = sccb response code if R2 = 0
+#
+
+_sclp_servc:
+        stm     %r6,%r15,24(%r15)               # save registers
+        ahi     %r15,-96                        # create stack frame
+        lr      %r6,%r2                         # save command word
+        lr      %r7,%r3                         # save sccb address
+.LretryS2:
+        lhi     %r2,1                           # error return code
+        .insn   rre,0xb2200000,%r6,%r7          # servc
+        brc     1,.LendS2                       # exit if not operational
+        brc     8,.LnotbusyS2                   # go on if not busy
+        sr      %r2,%r2                         # wait until no longer busy
+        bras    %r14,_sclp_wait_int
+        j       .LretryS2                       # retry
+.LnotbusyS2:
+        sr      %r2,%r2                         # wait until result
+        bras    %r14,_sclp_wait_int
+        sr      %r2,%r2
+        lh      %r3,6(%r7)
+.LendS2:
+        lm      %r6,%r15,120(%r15)              # restore registers
+        br      %r14
+
+#
+# Subroutine to set up the SCLP interface.
+#
+# Parameters:
+#   R2  = 0 to activate, non-zero to deactivate
+#
+# Returns:
+#   R2  = 0 on success, non-zero on failure
+#
+
+_sclp_setup:
+        stm     %r6,%r15,24(%r15)               # save registers
+        ahi     %r15,-96                        # create stack frame
+        basr    %r13,0                          # get base register
+.LbaseS3:
+        l       %r6,.LsccbS0-.LbaseS3(%r13)     # prepare init mask sccb
+        mvc     0(.LinitendS3-.LinitsccbS3,%r6),.LinitsccbS3-.LbaseS3(%r13)
+        ltr     %r2,%r2                         # initialization?
+        jz      .LdoinitS3                      # go ahead
+        # clear masks
+        xc      .LinitmaskS3-.LinitsccbS3(8,%r6),.LinitmaskS3-.LinitsccbS3(%r6)
+.LdoinitS3:
+        l       %r2,.LwritemaskS3-.LbaseS3(%r13)# get command word
+        lr      %r3,%r6                         # get sccb address
+        bras    %r14,_sclp_servc                # issue service call
+        ltr     %r2,%r2                         # servc successful?
+        jnz     .LerrorS3
+        chi     %r3,0x20                        # write mask successful?
+        jne     .LerrorS3
+        # check masks
+        la      %r2,.LinitmaskS3-.LinitsccbS3(%r6)
+        l       %r1,0(%r2)                      # receive mask ok?
+        n       %r1,12(%r2)
+        cl      %r1,0(%r2)
+        jne     .LerrorS3
+        l       %r1,4(%r2)                      # send mask ok?
+        n       %r1,8(%r2)
+        cl      %r1,4(%r2)
+        sr      %r2,%r2
+        je      .LendS3
+.LerrorS3:
+        lhi     %r2,1                           # error return code
+.LendS3:
+        lm      %r6,%r15,120(%r15)              # restore registers
+        br      %r14
+.LwritemaskS3:
+        .long   0x00780005                      # SCLP command for write mask
+.LinitsccbS3:
+        .word   .LinitendS3-.LinitsccbS3
+        .byte   0,0,0,0
+        .word   0
+        .word   0
+        .word   4
+.LinitmaskS3:
+        .long   0x80000000
+        .long   0x40000000
+        .long   0
+        .long   0
+.LinitendS3:
+
+#
+# Subroutine which prints a given text to the SCLP console.
+#
+# Parameters:
+#   R2  = address of nil-terminated ASCII text
+#
+# Returns:
+#   R2  = 0 on success, 1 on failure
+#
+
+_sclp_print:
+        stm     %r6,%r15,24(%r15)               # save registers
+        ahi     %r15,-96                        # create stack frame
+        basr    %r13,0                          # get base register
+.LbaseS4:
+        l       %r8,.LsccbS0-.LbaseS4(%r13)     # prepare write data sccb
+        mvc     0(.LmtoS4-.LwritesccbS4,%r8),.LwritesccbS4-.LbaseS4(%r13)
+        la      %r7,.LmtoS4-.LwritesccbS4(%r8)  # current mto addr
+        sr      %r0,%r0
+        l       %r10,.Lascebc-.LbaseS4(%r13)    # address of translation table
+.LinitmtoS4:
+        # initialize mto
+        mvc     0(.LmtoendS4-.LmtoS4,%r7),.LmtoS4-.LbaseS4(%r13)
+        lhi     %r6,.LmtoendS4-.LmtoS4          # current mto length
+.LloopS4:
+        ic      %r0,0(%r2)                      # get character
+        ahi     %r2,1
+        ltr     %r0,%r0                         # end of string?
+        jz      .LfinalizemtoS4
+        chi     %r0,0x15                        # end of line (NL)?
+        jz      .LfinalizemtoS4
+        stc     %r0,0(%r6,%r7)                  # copy to mto
+        la      %r11,0(%r6,%r7)
+        tr      0(1,%r11),0(%r10)               # translate to EBCDIC
+        ahi     %r6,1
+        j       .LloopS4
+.LfinalizemtoS4:
+        sth     %r6,0(%r7)                      # update mto length
+        lh      %r9,.LmdbS4-.LwritesccbS4(%r8)  # update mdb length
+        ar      %r9,%r6
+        sth     %r9,.LmdbS4-.LwritesccbS4(%r8)
+        lh      %r9,.LevbufS4-.LwritesccbS4(%r8)# update evbuf length
+        ar      %r9,%r6
+        sth     %r9,.LevbufS4-.LwritesccbS4(%r8)
+        lh      %r9,0(%r8)                      # update sccb length
+        ar      %r9,%r6
+        sth     %r9,0(%r8)
+        ar      %r7,%r6                         # update current mto adress
+        ltr     %r0,%r0                         # more characters?
+        jnz     .LinitmtoS4
+        l       %r2,.LwritedataS4-.LbaseS4(%r13)# write data
+        lr      %r3,%r8
+        bras    %r14,_sclp_servc
+        ltr     %r2,%r2                         # servc successful?
+        jnz     .LendS4
+        chi     %r3,0x20                        # write data successful?
+        je      .LendS4
+        lhi     %r2,1                           # error return code
+.LendS4:
+        lm      %r6,%r15,120(%r15)              # restore registers
+        br      %r14
+
+#
+# Function which prints a given text to the SCLP console.
+#
+# Parameters:
+#   R2  = address of nil-terminated ASCII text
+#
+# Returns:
+#   R2  = 0 on success, 1 on failure
+#
+
+        .globl _sclp_print_early
+_sclp_print_early:
+        stm     %r6,%r15,24(%r15)               # save registers
+        ahi     %r15,-96                        # create stack frame
+        lr      %r10,%r2                        # save string pointer
+        lhi     %r2,0
+        bras    %r14,_sclp_setup                # enable console
+        ltr     %r2,%r2
+        jnz     .LendS5
+        lr      %r2,%r10
+        bras    %r14,_sclp_print                # print string
+        ltr     %r2,%r2
+        jnz     .LendS5
+        lhi     %r2,1
+        bras    %r14,_sclp_setup                # disable console
+.LendS5:
+        lm      %r6,%r15,120(%r15)              # restore registers
+        br      %r14
+
+.LwritedataS4:
+        .long   0x00760005                      # SCLP command for write data
+.LwritesccbS4:
+        # sccb
+        .word   .LmtoS4-.LwritesccbS4
+        .byte   0
+        .byte   0,0,0
+        .word   0
+
+        # evbuf
+.LevbufS4:
+        .word   .LmtoS4-.LevbufS4
+        .byte   0x02
+        .byte   0
+        .word   0
+
+.LmdbS4:
+        # mdb
+        .word   .LmtoS4-.LmdbS4
+        .word   1
+        .long   0xd4c4c240
+        .long   1
+
+        # go
+.LgoS4:
+        .word   .LmtoS4-.LgoS4
+        .word   1
+        .long   0
+        .byte   0,0,0,0,0,0,0,0
+        .byte   0,0,0
+        .byte   0
+        .byte   0,0,0,0,0,0,0
+        .byte   0
+        .word   0
+        .byte   0,0,0,0,0,0,0,0,0,0
+        .byte   0,0,0,0,0,0,0,0
+        .byte   0,0,0,0,0,0,0,0
+
+.LmtoS4:
+        .word   .LmtoendS4-.LmtoS4
+        .word   4
+        .word   0x1000
+        .byte   0
+        .byte   0,0,0
+.LmtoendS4:
+
+        # Global constants
+.LsccbS0:
+        .long   _sclp_work_area
+.Lascebc:
+        .long   _ascebc
+.previous
+
+.section ".init.data","a"
+        .balign 4096
+_sclp_work_area:
+        .fill   4096
+.previous
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index 7402b6a39ead..9717717c6fea 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -42,6 +42,7 @@
 #include <linux/ctype.h>
 #include <linux/reboot.h>
 #include <linux/topology.h>
+#include <linux/ftrace.h>
 
 #include <asm/ipl.h>
 #include <asm/uaccess.h>
@@ -442,6 +443,7 @@ setup_lowcore(void)
         lc->steal_timer = S390_lowcore.steal_timer;
         lc->last_update_timer = S390_lowcore.last_update_timer;
         lc->last_update_clock = S390_lowcore.last_update_clock;
+        lc->ftrace_func = S390_lowcore.ftrace_func;
         set_prefix((u32)(unsigned long) lc);
         lowcore_ptr[0] = lc;
 }
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index 3cf74c3ccb69..062bd64e65fa 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -26,6 +26,7 @@
 #include <linux/binfmts.h>
 #include <linux/tracehook.h>
 #include <linux/syscalls.h>
+#include <linux/compat.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
 #include <asm/lowcore.h>
@@ -482,7 +483,7 @@ void do_signal(struct pt_regs *regs)
                 /* Whee!  Actually deliver the signal.  */
                 int ret;
 #ifdef CONFIG_COMPAT
-                if (test_thread_flag(TIF_31BIT)) {
+                if (is_compat_task()) {
                         ret = handle_signal32(signr, &ka, &info, oldset, regs);
                 }
                 else
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index a985a3ba4401..cc8c484984e3 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -47,7 +47,7 @@
 #include <asm/timer.h>
 #include <asm/lowcore.h>
 #include <asm/sclp.h>
-#include <asm/cpu.h>
+#include <asm/cputime.h>
 #include <asm/vdso.h>
 #include "entry.h"
 
@@ -572,6 +572,7 @@ int __cpuinit __cpu_up(unsigned int cpu)
         cpu_lowcore->cpu_nr = cpu;
         cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
         cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
+        cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func;
         eieio();
 
         while (signal_processor(cpu, sigp_restart) == sigp_busy)
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S
index 2c7739fe70b1..ad1acd200385 100644
--- a/arch/s390/kernel/syscalls.S
+++ b/arch/s390/kernel/syscalls.S
@@ -338,3 +338,5 @@ SYSCALL(sys_dup3,sys_dup3,sys_dup3_wrapper)
 SYSCALL(sys_epoll_create1,sys_epoll_create1,sys_epoll_create1_wrapper)
 SYSCALL(sys_preadv,sys_preadv,compat_sys_preadv_wrapper)
 SYSCALL(sys_pwritev,sys_pwritev,compat_sys_pwritev_wrapper)
+SYSCALL(sys_rt_tgsigqueueinfo,sys_rt_tgsigqueueinfo,compat_sys_rt_tgsigqueueinfo_wrapper) /* 330 */
+SYSCALL(sys_perf_counter_open,sys_perf_counter_open,sys_perf_counter_open_wrapper)
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index ef596d020573..215330a2c128 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -70,7 +70,7 @@ static DEFINE_PER_CPU(struct clock_event_device, comparators);
 /*
  * Scheduler clock - returns current time in nanosec units.
  */
-unsigned long long sched_clock(void)
+unsigned long long notrace sched_clock(void)
 {
         return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
 }
@@ -95,12 +95,6 @@ void tod_to_timeval(__u64 todval, struct timespec *xtime)
         xtime->tv_nsec = ((todval * 1000) >> 12);
 }
 
-#ifdef CONFIG_PROFILING
-#define s390_do_profile()       profile_tick(CPU_PROFILING)
-#else
-#define s390_do_profile()       do { ; } while(0)
-#endif /* CONFIG_PROFILING */
-
 void clock_comparator_work(void)
 {
         struct clock_event_device *cd;
@@ -109,7 +103,6 @@ void clock_comparator_work(void)
         set_clock_comparator(S390_lowcore.clock_comparator);
         cd = &__get_cpu_var(comparators);
         cd->event_handler(cd);
-        s390_do_profile();
 }
 
 /*
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index 89b2e7f1b7a9..45e1708b70fd 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -22,7 +22,7 @@
 #include <linux/elf.h>
 #include <linux/security.h>
 #include <linux/bootmem.h>
-
+#include <linux/compat.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
 #include <asm/processor.h>
@@ -53,8 +53,19 @@ unsigned int __read_mostly vdso_enabled = 1;
 
 static int __init vdso_setup(char *s)
 {
-        vdso_enabled = simple_strtoul(s, NULL, 0);
-        return 1;
+        unsigned long val;
+        int rc;
+
+        rc = 0;
+        if (strncmp(s, "on", 3) == 0)
+                vdso_enabled = 1;
+        else if (strncmp(s, "off", 4) == 0)
+                vdso_enabled = 0;
+        else {
+                rc = strict_strtoul(s, 0, &val);
+                vdso_enabled = rc ? 0 : !!val;
+        }
+        return !rc;
 }
 __setup("vdso=", vdso_setup);
 
@@ -203,7 +214,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
         vdso_pagelist = vdso64_pagelist;
         vdso_pages = vdso64_pages;
 #ifdef CONFIG_COMPAT
-        if (test_thread_flag(TIF_31BIT)) {
+        if (is_compat_task()) {
                 vdso_pagelist = vdso32_pagelist;
                 vdso_pages = vdso32_pages;
         }
diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S
index 89399b8756c2..a53db23ee092 100644
--- a/arch/s390/kernel/vmlinux.lds.S
+++ b/arch/s390/kernel/vmlinux.lds.S
@@ -34,6 +34,7 @@ SECTIONS
                 SCHED_TEXT
                 LOCK_TEXT
                 KPROBES_TEXT
+                IRQENTRY_TEXT
                 *(.fixup)
                 *(.gnu.warning)
         } :text = 0x0700
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index c87f59bd8246..c8eb7255332b 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -23,7 +23,7 @@
 #include <asm/s390_ext.h>
 #include <asm/timer.h>
 #include <asm/irq_regs.h>
-#include <asm/cpu.h>
+#include <asm/cputime.h>
 
 static ext_int_info_t ext_int_info_timer;
 
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 10bccd1f8aee..c18b21d6991c 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -512,7 +512,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 BUG();
         }
 
-        might_sleep();
+        might_fault();
 
         do {
                 __vcpu_run(vcpu);
diff --git a/arch/s390/lib/spinlock.c b/arch/s390/lib/spinlock.c
index e41f4008afc5..f7e0d30250b7 100644
--- a/arch/s390/lib/spinlock.c
+++ b/arch/s390/lib/spinlock.c
@@ -124,6 +124,27 @@ void _raw_read_lock_wait(raw_rwlock_t *rw)
 }
 EXPORT_SYMBOL(_raw_read_lock_wait);
 
+void _raw_read_lock_wait_flags(raw_rwlock_t *rw, unsigned long flags)
+{
+        unsigned int old;
+        int count = spin_retry;
+
+        local_irq_restore(flags);
+        while (1) {
+                if (count-- <= 0) {
+                        _raw_yield();
+                        count = spin_retry;
+                }
+                if (!__raw_read_can_lock(rw))
+                        continue;
+                old = rw->lock & 0x7fffffffU;
+                local_irq_disable();
+                if (_raw_compare_and_swap(&rw->lock, old, old + 1) == old)
+                        return;
+        }
+}
+EXPORT_SYMBOL(_raw_read_lock_wait_flags);
+
 int _raw_read_trylock_retry(raw_rwlock_t *rw)
 {
         unsigned int old;
@@ -157,6 +178,25 @@ void _raw_write_lock_wait(raw_rwlock_t *rw)
 }
 EXPORT_SYMBOL(_raw_write_lock_wait);
 
+void _raw_write_lock_wait_flags(raw_rwlock_t *rw, unsigned long flags)
+{
+        int count = spin_retry;
+
+        local_irq_restore(flags);
+        while (1) {
+                if (count-- <= 0) {
+                        _raw_yield();
+                        count = spin_retry;
+                }
+                if (!__raw_write_can_lock(rw))
+                        continue;
+                local_irq_disable();
+                if (_raw_compare_and_swap(&rw->lock, 0, 0x80000000) == 0)
+                        return;
+        }
+}
+EXPORT_SYMBOL(_raw_write_lock_wait_flags);
+
 int _raw_write_trylock_retry(raw_rwlock_t *rw)
 {
         int count = spin_retry;
diff --git a/arch/s390/mm/Makefile b/arch/s390/mm/Makefile
index 2a7458134544..db05661ac895 100644
--- a/arch/s390/mm/Makefile
+++ b/arch/s390/mm/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the linux s390-specific parts of the memory manager.
 #
 
-obj-y    := init.o fault.o extmem.o mmap.o vmem.o pgtable.o
+obj-y    := init.o fault.o extmem.o mmap.o vmem.o pgtable.o maccess.o
 obj-$(CONFIG_CMM) += cmm.o
 obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
 obj-$(CONFIG_PAGE_STATES) += page-states.o
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 833e8366c351..220a152c836c 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -19,6 +19,7 @@
 #include <linux/ptrace.h>
 #include <linux/mman.h>
 #include <linux/mm.h>
+#include <linux/compat.h>
 #include <linux/smp.h>
 #include <linux/kdebug.h>
 #include <linux/smp_lock.h>
@@ -239,7 +240,7 @@ static int signal_return(struct mm_struct *mm, struct pt_regs *regs,
         up_read(&mm->mmap_sem);
         clear_tsk_thread_flag(current, TIF_SINGLE_STEP);
 #ifdef CONFIG_COMPAT
-        compat = test_tsk_thread_flag(current, TIF_31BIT);
+        compat = is_compat_task();
         if (compat && instruction == 0x0a77)
                 sys32_sigreturn();
         else if (compat && instruction == 0x0aad)
diff --git a/arch/s390/mm/maccess.c b/arch/s390/mm/maccess.c
new file mode 100644
index 000000000000..81756271dc44
--- /dev/null
+++ b/arch/s390/mm/maccess.c
@@ -0,0 +1,61 @@
+/*
+ * Access kernel memory without faulting -- s390 specific implementation.
+ *
+ * Copyright IBM Corp. 2009
+ *
+ *   Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>,
+ *
+ */
+
+#include <linux/uaccess.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <asm/system.h>
+
+/*
+ * This function writes to kernel memory bypassing DAT and possible
+ * write protection. It copies one to four bytes from src to dst
+ * using the stura instruction.
+ * Returns the number of bytes copied or -EFAULT.
+ */
+static long probe_kernel_write_odd(void *dst, void *src, size_t size)
+{
+        unsigned long count, aligned;
+        int offset, mask;
+        int rc = -EFAULT;
+
+        aligned = (unsigned long) dst & ~3UL;
+        offset = (unsigned long) dst & 3;
+        count = min_t(unsigned long, 4 - offset, size);
+        mask = (0xf << (4 - count)) & 0xf;
+        mask >>= offset;
+        asm volatile(
+                "       bras    1,0f\n"
+                "       icm     0,0,0(%3)\n"
+                "0:     l       0,0(%1)\n"
+                "       lra     %1,0(%1)\n"
+                "1:     ex      %2,0(1)\n"
+                "2:     stura   0,%1\n"
+                "       la      %0,0\n"
+                "3:\n"
+                EX_TABLE(0b,3b) EX_TABLE(1b,3b) EX_TABLE(2b,3b)
+                : "+d" (rc), "+a" (aligned)
+                : "a" (mask), "a" (src) : "cc", "memory", "0", "1");
+        return rc ? rc : count;
+}
+
+long probe_kernel_write(void *dst, void *src, size_t size)
+{
+        long copied = 0;
+
+        while (size) {
+                copied = probe_kernel_write_odd(dst, src, size);
+                if (copied < 0)
+                        break;
+                dst += copied;
+                src += copied;
+                size -= copied;
+        }
+        return copied < 0 ? -EFAULT : 0;
+}
diff --git a/arch/s390/mm/mmap.c b/arch/s390/mm/mmap.c
index e008d236cc15..f4558ccf02b9 100644
--- a/arch/s390/mm/mmap.c
+++ b/arch/s390/mm/mmap.c
@@ -28,6 +28,7 @@
 #include <linux/mm.h>
 #include <linux/module.h>
 #include <asm/pgalloc.h>
+#include <asm/compat.h>
 
 /*
  * Top of mmap area (just below the process stack).
@@ -55,7 +56,7 @@ static inline int mmap_is_legacy(void)
         /*
          * Force standard allocation for 64 bit programs.
          */
-        if (!test_thread_flag(TIF_31BIT))
+        if (!is_compat_task())
                 return 1;
 #endif
         return sysctl_legacy_va_layout ||
@@ -91,7 +92,7 @@ EXPORT_SYMBOL_GPL(arch_pick_mmap_layout);
 
 int s390_mmap_check(unsigned long addr, unsigned long len)
 {
-        if (!test_thread_flag(TIF_31BIT) &&
+        if (!is_compat_task() &&
             len >= TASK_SIZE && TASK_SIZE < (1UL << 53))
                 return crst_table_upgrade(current->mm, 1UL << 53);
         return 0;
@@ -108,8 +109,7 @@ s390_get_unmapped_area(struct file *filp, unsigned long addr,
         area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
         if (!(area & ~PAGE_MASK))
                 return area;
-        if (area == -ENOMEM &&
-            !test_thread_flag(TIF_31BIT) && TASK_SIZE < (1UL << 53)) {
+        if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < (1UL << 53)) {
                 /* Upgrade the page table to 4 levels and retry. */
                 rc = crst_table_upgrade(mm, 1UL << 53);
                 if (rc)
@@ -131,8 +131,7 @@ s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr,
         area = arch_get_unmapped_area_topdown(filp, addr, len, pgoff, flags);
         if (!(area & ~PAGE_MASK))
                 return area;
-        if (area == -ENOMEM &&
-            !test_thread_flag(TIF_31BIT) && TASK_SIZE < (1UL << 53)) {
+        if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < (1UL << 53)) {
                 /* Upgrade the page table to 4 levels and retry. */
                 rc = crst_table_upgrade(mm, 1UL << 53);
                 if (rc)
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index be6c1cf4ad5a..4ca8e826bf30 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -1,7 +1,5 @@
 /*
- *  arch/s390/mm/pgtable.c
- *
- *    Copyright IBM Corp. 2007
+ *    Copyright IBM Corp. 2007,2009
  *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
  */
 
@@ -53,6 +51,18 @@ void clear_table_pgstes(unsigned long *table)
 
 #endif
 
+unsigned long VMALLOC_START = VMALLOC_END - VMALLOC_SIZE;
+EXPORT_SYMBOL(VMALLOC_START);
+
+static int __init parse_vmalloc(char *arg)
+{
+        if (!arg)
+                return -EINVAL;
+        VMALLOC_START = (VMALLOC_END - memparse(arg, &arg)) & PAGE_MASK;
+        return 0;
+}
+early_param("vmalloc", parse_vmalloc);
+
 unsigned long *crst_table_alloc(struct mm_struct *mm, int noexec)
 {
         struct page *page = alloc_pages(GFP_KERNEL, ALLOC_ORDER);
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index 978b58efb1e9..157c320272cb 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -84,5 +84,5 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* __ASM_SH_ATOMIC_H */
diff --git a/arch/sh/include/asm/bitsperlong.h b/arch/sh/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/sh/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/sh/include/asm/mman.h b/arch/sh/include/asm/mman.h
index 156eb0225cf6..7d8b72c91a5f 100644
--- a/arch/sh/include/asm/mman.h
+++ b/arch/sh/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_SH_MMAN_H
 #define __ASM_SH_MMAN_H
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_GROWSDOWN   0x0100          /* stack-like segment */
 #define MAP_DENYWRITE   0x0800          /* ETXTBSY */
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 9c6d21ec0240..49592c780a6e 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -163,7 +163,7 @@ typedef struct page *pgtable_t;
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 /* vDSO support */
 #ifdef CONFIG_VSYSCALL
diff --git a/arch/sh/include/asm/signal.h b/arch/sh/include/asm/signal.h
index 5c5c1e852089..9cc5f0144689 100644
--- a/arch/sh/include/asm/signal.h
+++ b/arch/sh/include/asm/signal.h
@@ -106,7 +106,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifdef __KERNEL__
 struct old_sigaction {
diff --git a/arch/sh/kernel/module.c b/arch/sh/kernel/module.c
index c19b0f7d2cc1..c2efdcde266f 100644
--- a/arch/sh/kernel/module.c
+++ b/arch/sh/kernel/module.c
@@ -46,8 +46,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* We don't need anything special. */
diff --git a/arch/sparc/include/asm/atomic_32.h b/arch/sparc/include/asm/atomic_32.h
index bb91b1248cd1..f0d343c3b956 100644
--- a/arch/sparc/include/asm/atomic_32.h
+++ b/arch/sparc/include/asm/atomic_32.h
@@ -161,5 +161,5 @@ static inline int __atomic24_sub(int i, atomic24_t *v)
 
 #endif /* !(__KERNEL__) */
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* !(__ARCH_SPARC_ATOMIC__) */
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index a0a706492696..f2e48009989e 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -114,5 +114,5 @@ static inline int atomic64_add_unless(atomic64_t *v, long a, long u)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* !(__ARCH_SPARC64_ATOMIC__) */
diff --git a/arch/sparc/include/asm/bitsperlong.h b/arch/sparc/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..40dcaa3aaa56
--- /dev/null
+++ b/arch/sparc/include/asm/bitsperlong.h
@@ -0,0 +1,13 @@
+#ifndef __ASM_ALPHA_BITSPERLONG_H
+#define __ASM_ALPHA_BITSPERLONG_H
+
+#if defined(__sparc__) && defined(__arch64__)
+#define __BITS_PER_LONG 64
+#else
+#define __BITS_PER_LONG 32
+#endif
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* __ASM_ALPHA_BITSPERLONG_H */
+
diff --git a/arch/sparc/include/asm/mman.h b/arch/sparc/include/asm/mman.h
index fdfbbf0a4736..988192e8e956 100644
--- a/arch/sparc/include/asm/mman.h
+++ b/arch/sparc/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef __SPARC_MMAN_H__
 #define __SPARC_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 /* SunOS'ified... */
 
diff --git a/arch/sparc/include/asm/page_32.h b/arch/sparc/include/asm/page_32.h
index d1806edc0958..f72080bdda94 100644
--- a/arch/sparc/include/asm/page_32.h
+++ b/arch/sparc/include/asm/page_32.h
@@ -152,6 +152,6 @@ extern unsigned long pfn_base;
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _SPARC_PAGE_H */
diff --git a/arch/sparc/include/asm/page_64.h b/arch/sparc/include/asm/page_64.h
index 4274ed13ddb2..f0d09b401036 100644
--- a/arch/sparc/include/asm/page_64.h
+++ b/arch/sparc/include/asm/page_64.h
@@ -132,6 +132,6 @@ typedef struct page *pgtable_t;
 #define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif /* _SPARC64_PAGE_H */
diff --git a/arch/sparc/include/asm/signal.h b/arch/sparc/include/asm/signal.h
index cba45206b7f2..e49b828a2471 100644
--- a/arch/sparc/include/asm/signal.h
+++ b/arch/sparc/include/asm/signal.h
@@ -176,7 +176,7 @@ struct sigstack {
 #define SA_STATIC_ALLOC         0x8000
 #endif
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 struct __new_sigaction {
         __sighandler_t          sa_handler;
diff --git a/arch/sparc/include/asm/types.h b/arch/sparc/include/asm/types.h
index 2237118825d0..de671d73baed 100644
--- a/arch/sparc/include/asm/types.h
+++ b/arch/sparc/include/asm/types.h
@@ -21,8 +21,6 @@ typedef unsigned short umode_t;
 
 #ifdef __KERNEL__
 
-#define BITS_PER_LONG 64
-
 #ifndef __ASSEMBLY__
 
 /* Dma addresses come in generic and 64-bit flavours.  */
@@ -46,8 +44,6 @@ typedef unsigned short umode_t;
 
 #ifdef __KERNEL__
 
-#define BITS_PER_LONG 32
-
 #ifndef __ASSEMBLY__
 
 typedef u32 dma_addr_t;
diff --git a/arch/sparc/include/asm/uaccess_32.h b/arch/sparc/include/asm/uaccess_32.h
index 47d5619d43fa..8303ac481034 100644
--- a/arch/sparc/include/asm/uaccess_32.h
+++ b/arch/sparc/include/asm/uaccess_32.h
@@ -17,6 +17,9 @@
 
 #ifndef __ASSEMBLY__
 
+#define ARCH_HAS_SORT_EXTABLE
+#define ARCH_HAS_SEARCH_EXTABLE
+
 /* Sparc is not segmented, however we need to be able to fool access_ok()
  * when doing system calls from kernel mode legitimately.
  *
diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/uaccess_64.h
index c64e767a3e4b..a38c03238918 100644
--- a/arch/sparc/include/asm/uaccess_64.h
+++ b/arch/sparc/include/asm/uaccess_64.h
@@ -12,7 +12,7 @@
 #include <asm/asi.h>
 #include <asm/system.h>
 #include <asm/spitfire.h>
-#include <asm-generic/uaccess.h>
+#include <asm-generic/uaccess-unaligned.h>
 #endif
 
 #ifndef __ASSEMBLY__
diff --git a/arch/sparc/kernel/module.c b/arch/sparc/kernel/module.c
index 90273765e81f..0ee642f63234 100644
--- a/arch/sparc/kernel/module.c
+++ b/arch/sparc/kernel/module.c
@@ -75,8 +75,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 /* Make generic code ignore STT_REGISTER dummy undefined symbols.  */
diff --git a/arch/sparc/mm/extable.c b/arch/sparc/mm/extable.c
index 16cc28935e39..a61c349448e1 100644
--- a/arch/sparc/mm/extable.c
+++ b/arch/sparc/mm/extable.c
@@ -28,6 +28,10 @@ search_extable(const struct exception_table_entry *start,
          *      word 3: last insn address + 4 bytes
          *      word 4: fixup code address
          *
+         * Deleted entries are encoded as:
+         *      word 1: unused
+         *      word 2: -1
+         *
          * See asm/uaccess.h for more details.
          */
 
@@ -39,6 +43,10 @@ search_extable(const struct exception_table_entry *start,
                         continue;
                 }
 
+                /* A deleted entry; see trim_init_extable */
+                if (walk->fixup == -1)
+                        continue;
+
                 if (walk->insn == value)
                         return walk;
         }
@@ -57,6 +65,27 @@ search_extable(const struct exception_table_entry *start,
         return NULL;
 }
 
+#ifdef CONFIG_MODULES
+/* We could memmove them around; easier to mark the trimmed ones. */
+void trim_init_extable(struct module *m)
+{
+        unsigned int i;
+        bool range;
+
+        for (i = 0; i < m->num_exentries; i += range ? 2 : 1) {
+                range = m->extable[i].fixup == 0;
+
+                if (within_module_init(m->extable[i].insn, m)) {
+                        m->extable[i].fixup = -1;
+                        if (range)
+                                m->extable[i+1].fixup = -1;
+                }
+                if (range)
+                        i++;
+        }
+}
+#endif /* CONFIG_MODULES */
+
 /* Special extable search, which handles ranges.  Returns fixup */
 unsigned long search_extables_range(unsigned long addr, unsigned long *g2)
 {
diff --git a/arch/um/include/asm/page.h b/arch/um/include/asm/page.h
index 55f28a0bae6d..4cc9b6cf480a 100644
--- a/arch/um/include/asm/page.h
+++ b/arch/um/include/asm/page.h
@@ -116,7 +116,7 @@ extern unsigned long uml_physmem;
 #define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v)))
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #endif  /* __ASSEMBLY__ */
 #endif  /* __UM_PAGE_H */
diff --git a/arch/um/include/asm/pgtable.h b/arch/um/include/asm/pgtable.h
index 58da2480a7f4..9ce3f165111a 100644
--- a/arch/um/include/asm/pgtable.h
+++ b/arch/um/include/asm/pgtable.h
@@ -53,16 +53,21 @@ extern unsigned long end_iomem;
 #else
 # define VMALLOC_END    (FIXADDR_START-2*PAGE_SIZE)
 #endif
+#define MODULES_VADDR   VMALLOC_START
+#define MODULES_END     VMALLOC_END
+#define MODULES_LEN     (MODULES_VADDR - MODULES_END)
 
 #define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
 #define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
 #define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
-
+#define __PAGE_KERNEL_EXEC                                              \
+         (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
 #define PAGE_NONE       __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
 #define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
 #define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
 #define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
+#define PAGE_KERNEL_EXEC        __pgprot(__PAGE_KERNEL_EXEC)
 
 /*
  * The i386 can't do page protection for execute, and considers that the same
diff --git a/arch/um/include/asm/suspend.h b/arch/um/include/asm/suspend.h
deleted file mode 100644
index f4e8e007f468..000000000000
--- a/arch/um/include/asm/suspend.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef __UM_SUSPEND_H
-#define __UM_SUSPEND_H
-
-#endif
diff --git a/arch/um/sys-i386/Makefile b/arch/um/sys-i386/Makefile
index 598b5c1903af..1b549bca4645 100644
--- a/arch/um/sys-i386/Makefile
+++ b/arch/um/sys-i386/Makefile
@@ -8,7 +8,7 @@ obj-y = bug.o bugs.o checksum.o delay.o fault.o ksyms.o ldt.o ptrace.o \
 
 subarch-obj-y = lib/semaphore_32.o lib/string_32.o
 subarch-obj-$(CONFIG_HIGHMEM) += mm/highmem_32.o
-subarch-obj-$(CONFIG_MODULES) += kernel/module_32.o
+subarch-obj-$(CONFIG_MODULES) += kernel/module.o
 
 USER_OBJS := bugs.o ptrace_user.o fault.o
 
diff --git a/arch/um/sys-x86_64/Makefile b/arch/um/sys-x86_64/Makefile
index c8b4cce9cfe1..2201e9c20e4a 100644
--- a/arch/um/sys-x86_64/Makefile
+++ b/arch/um/sys-x86_64/Makefile
@@ -8,10 +8,8 @@ obj-y = bug.o bugs.o delay.o fault.o ldt.o mem.o ptrace.o ptrace_user.o \
         setjmp.o signal.o stub.o stub_segv.o syscalls.o syscall_table.o \
         sysrq.o ksyms.o tls.o
 
-obj-$(CONFIG_MODULES) += um_module.o
-
 subarch-obj-y = lib/csum-partial_64.o lib/memcpy_64.o lib/thunk_64.o
-subarch-obj-$(CONFIG_MODULES) += kernel/module_64.o
+subarch-obj-$(CONFIG_MODULES) += kernel/module.o
 
 ldt-y = ../sys-i386/ldt.o
 
diff --git a/arch/um/sys-x86_64/um_module.c b/arch/um/sys-x86_64/um_module.c
deleted file mode 100644
index 3dead392a415..000000000000
--- a/arch/um/sys-x86_64/um_module.c
+++ /dev/null
@@ -1,21 +0,0 @@
-#include <linux/vmalloc.h>
-#include <linux/moduleloader.h>
-
-/* Copied from i386 arch/i386/kernel/module.c */
-void *module_alloc(unsigned long size)
-{
-        if (size == 0)
-                return NULL;
-        return vmalloc_exec(size);
-}
-
-/* Free memory returned from module_alloc */
-void module_free(struct module *mod, void *module_region)
-{
-        vfree(module_region);
-        /*
-         * FIXME: If module_region == mod->init_region, trim exception
-         * table entries.
-         */
-}
-
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 68f5578fe38e..356d2ec8e2fb 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -789,10 +789,26 @@ config X86_MCE
           to disable it.  MCE support simply ignores non-MCE processors like
           the 386 and 486, so nearly everyone can say Y here.
 
+config X86_OLD_MCE
+        depends on X86_32 && X86_MCE
+        bool "Use legacy machine check code (will go away)"
+        default n
+        select X86_ANCIENT_MCE
+        ---help---
+          Use the old i386 machine check code. This is merely intended for
+          testing in a transition period. Try this if you run into any machine
+          check related software problems, but report the problem to
+          linux-kernel.  When in doubt say no.
+
+config X86_NEW_MCE
+        depends on X86_MCE
+        bool
+        default y if (!X86_OLD_MCE && X86_32) || X86_64
+
 config X86_MCE_INTEL
         def_bool y
         prompt "Intel MCE features"
-        depends on X86_64 && X86_MCE && X86_LOCAL_APIC
+        depends on X86_NEW_MCE && X86_LOCAL_APIC
         ---help---
            Additional support for intel specific MCE features such as
            the thermal monitor.
@@ -800,19 +816,36 @@ config X86_MCE_INTEL
 config X86_MCE_AMD
         def_bool y
         prompt "AMD MCE features"
-        depends on X86_64 && X86_MCE && X86_LOCAL_APIC
+        depends on X86_NEW_MCE && X86_LOCAL_APIC
         ---help---
            Additional support for AMD specific MCE features such as
            the DRAM Error Threshold.
 
+config X86_ANCIENT_MCE
+        def_bool n
+        depends on X86_32
+        prompt "Support for old Pentium 5 / WinChip machine checks"
+        ---help---
+          Include support for machine check handling on old Pentium 5 or WinChip
+          systems. These typically need to be enabled explicitely on the command
+          line.
+
 config X86_MCE_THRESHOLD
         depends on X86_MCE_AMD || X86_MCE_INTEL
         bool
         default y
 
+config X86_MCE_INJECT
+        depends on X86_NEW_MCE
+        tristate "Machine check injector support"
+        ---help---
+          Provide support for injecting machine checks for testing purposes.
+          If you don't know what a machine check is and you don't do kernel
+          QA it is safe to say n.
+
 config X86_MCE_NONFATAL
         tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4"
-        depends on X86_32 && X86_MCE
+        depends on X86_OLD_MCE
         ---help---
           Enabling this feature starts a timer that triggers every 5 seconds which
           will look at the machine check registers to see if anything happened.
@@ -825,11 +858,15 @@ config X86_MCE_NONFATAL
 
 config X86_MCE_P4THERMAL
         bool "check for P4 thermal throttling interrupt."
-        depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP)
+        depends on X86_OLD_MCE && X86_MCE && (X86_UP_APIC || SMP)
         ---help---
           Enabling this feature will cause a message to be printed when the P4
           enters thermal throttling.
 
+config X86_THERMAL_VECTOR
+        def_bool y
+        depends on X86_MCE_P4THERMAL || X86_MCE_INTEL
+
 config VM86
         bool "Enable VM86 support" if EMBEDDED
         default y
diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile
index ebe7deedd5b4..cfb0010fa940 100644
--- a/arch/x86/crypto/Makefile
+++ b/arch/x86/crypto/Makefile
@@ -2,6 +2,8 @@
 # Arch-specific CryptoAPI modules.
 #
 
+obj-$(CONFIG_CRYPTO_FPU) += fpu.o
+
 obj-$(CONFIG_CRYPTO_AES_586) += aes-i586.o
 obj-$(CONFIG_CRYPTO_TWOFISH_586) += twofish-i586.o
 obj-$(CONFIG_CRYPTO_SALSA20_586) += salsa20-i586.o
diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c
index 02af0af65497..4e663398f77f 100644
--- a/arch/x86/crypto/aesni-intel_glue.c
+++ b/arch/x86/crypto/aesni-intel_glue.c
@@ -21,6 +21,22 @@
 #include <asm/i387.h>
 #include <asm/aes.h>
 
+#if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
+#define HAS_CTR
+#endif
+
+#if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
+#define HAS_LRW
+#endif
+
+#if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
+#define HAS_PCBC
+#endif
+
+#if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
+#define HAS_XTS
+#endif
+
 struct async_aes_ctx {
         struct cryptd_ablkcipher *cryptd_tfm;
 };
@@ -137,6 +153,41 @@ static struct crypto_alg aesni_alg = {
         }
 };
 
+static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
+
+        aesni_enc(ctx, dst, src);
+}
+
+static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
+
+        aesni_dec(ctx, dst, src);
+}
+
+static struct crypto_alg __aesni_alg = {
+        .cra_name               = "__aes-aesni",
+        .cra_driver_name        = "__driver-aes-aesni",
+        .cra_priority           = 0,
+        .cra_flags              = CRYPTO_ALG_TYPE_CIPHER,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
+        .cra_alignmask          = 0,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(__aesni_alg.cra_list),
+        .cra_u  = {
+                .cipher = {
+                        .cia_min_keysize        = AES_MIN_KEY_SIZE,
+                        .cia_max_keysize        = AES_MAX_KEY_SIZE,
+                        .cia_setkey             = aes_set_key,
+                        .cia_encrypt            = __aes_encrypt,
+                        .cia_decrypt            = __aes_decrypt
+                }
+        }
+};
+
 static int ecb_encrypt(struct blkcipher_desc *desc,
                        struct scatterlist *dst, struct scatterlist *src,
                        unsigned int nbytes)
@@ -277,8 +328,16 @@ static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
                         unsigned int key_len)
 {
         struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+        struct crypto_ablkcipher *child = &ctx->cryptd_tfm->base;
+        int err;
 
-        return crypto_ablkcipher_setkey(&ctx->cryptd_tfm->base, key, key_len);
+        crypto_ablkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
+        crypto_ablkcipher_set_flags(child, crypto_ablkcipher_get_flags(tfm)
+                                    & CRYPTO_TFM_REQ_MASK);
+        err = crypto_ablkcipher_setkey(child, key, key_len);
+        crypto_ablkcipher_set_flags(tfm, crypto_ablkcipher_get_flags(child)
+                                    & CRYPTO_TFM_RES_MASK);
+        return err;
 }
 
 static int ablk_encrypt(struct ablkcipher_request *req)
@@ -411,6 +470,163 @@ static struct crypto_alg ablk_cbc_alg = {
         },
 };
 
+#ifdef HAS_CTR
+static int ablk_ctr_init(struct crypto_tfm *tfm)
+{
+        struct cryptd_ablkcipher *cryptd_tfm;
+
+        cryptd_tfm = cryptd_alloc_ablkcipher("fpu(ctr(__driver-aes-aesni))",
+                                             0, 0);
+        if (IS_ERR(cryptd_tfm))
+                return PTR_ERR(cryptd_tfm);
+        ablk_init_common(tfm, cryptd_tfm);
+        return 0;
+}
+
+static struct crypto_alg ablk_ctr_alg = {
+        .cra_name               = "ctr(aes)",
+        .cra_driver_name        = "ctr-aes-aesni",
+        .cra_priority           = 400,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = 1,
+        .cra_ctxsize            = sizeof(struct async_aes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(ablk_ctr_alg.cra_list),
+        .cra_init               = ablk_ctr_init,
+        .cra_exit               = ablk_exit,
+        .cra_u = {
+                .ablkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .ivsize         = AES_BLOCK_SIZE,
+                        .setkey         = ablk_set_key,
+                        .encrypt        = ablk_encrypt,
+                        .decrypt        = ablk_decrypt,
+                        .geniv          = "chainiv",
+                },
+        },
+};
+#endif
+
+#ifdef HAS_LRW
+static int ablk_lrw_init(struct crypto_tfm *tfm)
+{
+        struct cryptd_ablkcipher *cryptd_tfm;
+
+        cryptd_tfm = cryptd_alloc_ablkcipher("fpu(lrw(__driver-aes-aesni))",
+                                             0, 0);
+        if (IS_ERR(cryptd_tfm))
+                return PTR_ERR(cryptd_tfm);
+        ablk_init_common(tfm, cryptd_tfm);
+        return 0;
+}
+
+static struct crypto_alg ablk_lrw_alg = {
+        .cra_name               = "lrw(aes)",
+        .cra_driver_name        = "lrw-aes-aesni",
+        .cra_priority           = 400,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct async_aes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(ablk_lrw_alg.cra_list),
+        .cra_init               = ablk_lrw_init,
+        .cra_exit               = ablk_exit,
+        .cra_u = {
+                .ablkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
+                        .ivsize         = AES_BLOCK_SIZE,
+                        .setkey         = ablk_set_key,
+                        .encrypt        = ablk_encrypt,
+                        .decrypt        = ablk_decrypt,
+                },
+        },
+};
+#endif
+
+#ifdef HAS_PCBC
+static int ablk_pcbc_init(struct crypto_tfm *tfm)
+{
+        struct cryptd_ablkcipher *cryptd_tfm;
+
+        cryptd_tfm = cryptd_alloc_ablkcipher("fpu(pcbc(__driver-aes-aesni))",
+                                             0, 0);
+        if (IS_ERR(cryptd_tfm))
+                return PTR_ERR(cryptd_tfm);
+        ablk_init_common(tfm, cryptd_tfm);
+        return 0;
+}
+
+static struct crypto_alg ablk_pcbc_alg = {
+        .cra_name               = "pcbc(aes)",
+        .cra_driver_name        = "pcbc-aes-aesni",
+        .cra_priority           = 400,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct async_aes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(ablk_pcbc_alg.cra_list),
+        .cra_init               = ablk_pcbc_init,
+        .cra_exit               = ablk_exit,
+        .cra_u = {
+                .ablkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .ivsize         = AES_BLOCK_SIZE,
+                        .setkey         = ablk_set_key,
+                        .encrypt        = ablk_encrypt,
+                        .decrypt        = ablk_decrypt,
+                },
+        },
+};
+#endif
+
+#ifdef HAS_XTS
+static int ablk_xts_init(struct crypto_tfm *tfm)
+{
+        struct cryptd_ablkcipher *cryptd_tfm;
+
+        cryptd_tfm = cryptd_alloc_ablkcipher("fpu(xts(__driver-aes-aesni))",
+                                             0, 0);
+        if (IS_ERR(cryptd_tfm))
+                return PTR_ERR(cryptd_tfm);
+        ablk_init_common(tfm, cryptd_tfm);
+        return 0;
+}
+
+static struct crypto_alg ablk_xts_alg = {
+        .cra_name               = "xts(aes)",
+        .cra_driver_name        = "xts-aes-aesni",
+        .cra_priority           = 400,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct async_aes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(ablk_xts_alg.cra_list),
+        .cra_init               = ablk_xts_init,
+        .cra_exit               = ablk_exit,
+        .cra_u = {
+                .ablkcipher = {
+                        .min_keysize    = 2 * AES_MIN_KEY_SIZE,
+                        .max_keysize    = 2 * AES_MAX_KEY_SIZE,
+                        .ivsize         = AES_BLOCK_SIZE,
+                        .setkey         = ablk_set_key,
+                        .encrypt        = ablk_encrypt,
+                        .decrypt        = ablk_decrypt,
+                },
+        },
+};
+#endif
+
 static int __init aesni_init(void)
 {
         int err;
@@ -421,6 +637,8 @@ static int __init aesni_init(void)
         }
         if ((err = crypto_register_alg(&aesni_alg)))
                 goto aes_err;
+        if ((err = crypto_register_alg(&__aesni_alg)))
+                goto __aes_err;
         if ((err = crypto_register_alg(&blk_ecb_alg)))
                 goto blk_ecb_err;
         if ((err = crypto_register_alg(&blk_cbc_alg)))
@@ -429,9 +647,41 @@ static int __init aesni_init(void)
                 goto ablk_ecb_err;
         if ((err = crypto_register_alg(&ablk_cbc_alg)))
                 goto ablk_cbc_err;
+#ifdef HAS_CTR
+        if ((err = crypto_register_alg(&ablk_ctr_alg)))
+                goto ablk_ctr_err;
+#endif
+#ifdef HAS_LRW
+        if ((err = crypto_register_alg(&ablk_lrw_alg)))
+                goto ablk_lrw_err;
+#endif
+#ifdef HAS_PCBC
+        if ((err = crypto_register_alg(&ablk_pcbc_alg)))
+                goto ablk_pcbc_err;
+#endif
+#ifdef HAS_XTS
+        if ((err = crypto_register_alg(&ablk_xts_alg)))
+                goto ablk_xts_err;
+#endif
 
         return err;
 
+#ifdef HAS_XTS
+ablk_xts_err:
+#endif
+#ifdef HAS_PCBC
+        crypto_unregister_alg(&ablk_pcbc_alg);
+ablk_pcbc_err:
+#endif
+#ifdef HAS_LRW
+        crypto_unregister_alg(&ablk_lrw_alg);
+ablk_lrw_err:
+#endif
+#ifdef HAS_CTR
+        crypto_unregister_alg(&ablk_ctr_alg);
+ablk_ctr_err:
+#endif
+        crypto_unregister_alg(&ablk_cbc_alg);
 ablk_cbc_err:
         crypto_unregister_alg(&ablk_ecb_alg);
 ablk_ecb_err:
@@ -439,6 +689,8 @@ ablk_ecb_err:
 blk_cbc_err:
         crypto_unregister_alg(&blk_ecb_alg);
 blk_ecb_err:
+        crypto_unregister_alg(&__aesni_alg);
+__aes_err:
         crypto_unregister_alg(&aesni_alg);
 aes_err:
         return err;
@@ -446,10 +698,23 @@ aes_err:
 
 static void __exit aesni_exit(void)
 {
+#ifdef HAS_XTS
+        crypto_unregister_alg(&ablk_xts_alg);
+#endif
+#ifdef HAS_PCBC
+        crypto_unregister_alg(&ablk_pcbc_alg);
+#endif
+#ifdef HAS_LRW
+        crypto_unregister_alg(&ablk_lrw_alg);
+#endif
+#ifdef HAS_CTR
+        crypto_unregister_alg(&ablk_ctr_alg);
+#endif
         crypto_unregister_alg(&ablk_cbc_alg);
         crypto_unregister_alg(&ablk_ecb_alg);
         crypto_unregister_alg(&blk_cbc_alg);
         crypto_unregister_alg(&blk_ecb_alg);
+        crypto_unregister_alg(&__aesni_alg);
         crypto_unregister_alg(&aesni_alg);
 }
 
diff --git a/arch/x86/crypto/fpu.c b/arch/x86/crypto/fpu.c
new file mode 100644
index 000000000000..5f9781a3815f
--- /dev/null
+++ b/arch/x86/crypto/fpu.c
@@ -0,0 +1,166 @@
+/*
+ * FPU: Wrapper for blkcipher touching fpu
+ *
+ * Copyright (c) Intel Corp.
+ *   Author: Huang Ying <ying.huang@intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ */
+
+#include <crypto/algapi.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <asm/i387.h>
+
+struct crypto_fpu_ctx {
+        struct crypto_blkcipher *child;
+};
+
+static int crypto_fpu_setkey(struct crypto_tfm *parent, const u8 *key,
+                             unsigned int keylen)
+{
+        struct crypto_fpu_ctx *ctx = crypto_tfm_ctx(parent);
+        struct crypto_blkcipher *child = ctx->child;
+        int err;
+
+        crypto_blkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
+        crypto_blkcipher_set_flags(child, crypto_tfm_get_flags(parent) &
+                                   CRYPTO_TFM_REQ_MASK);
+        err = crypto_blkcipher_setkey(child, key, keylen);
+        crypto_tfm_set_flags(parent, crypto_blkcipher_get_flags(child) &
+                                     CRYPTO_TFM_RES_MASK);
+        return err;
+}
+
+static int crypto_fpu_encrypt(struct blkcipher_desc *desc_in,
+                              struct scatterlist *dst, struct scatterlist *src,
+                              unsigned int nbytes)
+{
+        int err;
+        struct crypto_fpu_ctx *ctx = crypto_blkcipher_ctx(desc_in->tfm);
+        struct crypto_blkcipher *child = ctx->child;
+        struct blkcipher_desc desc = {
+                .tfm = child,
+                .info = desc_in->info,
+                .flags = desc_in->flags,
+        };
+
+        kernel_fpu_begin();
+        err = crypto_blkcipher_crt(desc.tfm)->encrypt(&desc, dst, src, nbytes);
+        kernel_fpu_end();
+        return err;
+}
+
+static int crypto_fpu_decrypt(struct blkcipher_desc *desc_in,
+                              struct scatterlist *dst, struct scatterlist *src,
+                              unsigned int nbytes)
+{
+        int err;
+        struct crypto_fpu_ctx *ctx = crypto_blkcipher_ctx(desc_in->tfm);
+        struct crypto_blkcipher *child = ctx->child;
+        struct blkcipher_desc desc = {
+                .tfm = child,
+                .info = desc_in->info,
+                .flags = desc_in->flags,
+        };
+
+        kernel_fpu_begin();
+        err = crypto_blkcipher_crt(desc.tfm)->decrypt(&desc, dst, src, nbytes);
+        kernel_fpu_end();
+        return err;
+}
+
+static int crypto_fpu_init_tfm(struct crypto_tfm *tfm)
+{
+        struct crypto_instance *inst = crypto_tfm_alg_instance(tfm);
+        struct crypto_spawn *spawn = crypto_instance_ctx(inst);
+        struct crypto_fpu_ctx *ctx = crypto_tfm_ctx(tfm);
+        struct crypto_blkcipher *cipher;
+
+        cipher = crypto_spawn_blkcipher(spawn);
+        if (IS_ERR(cipher))
+                return PTR_ERR(cipher);
+
+        ctx->child = cipher;
+        return 0;
+}
+
+static void crypto_fpu_exit_tfm(struct crypto_tfm *tfm)
+{
+        struct crypto_fpu_ctx *ctx = crypto_tfm_ctx(tfm);
+        crypto_free_blkcipher(ctx->child);
+}
+
+static struct crypto_instance *crypto_fpu_alloc(struct rtattr **tb)
+{
+        struct crypto_instance *inst;
+        struct crypto_alg *alg;
+        int err;
+
+        err = crypto_check_attr_type(tb, CRYPTO_ALG_TYPE_BLKCIPHER);
+        if (err)
+                return ERR_PTR(err);
+
+        alg = crypto_get_attr_alg(tb, CRYPTO_ALG_TYPE_BLKCIPHER,
+                                  CRYPTO_ALG_TYPE_MASK);
+        if (IS_ERR(alg))
+                return ERR_CAST(alg);
+
+        inst = crypto_alloc_instance("fpu", alg);
+        if (IS_ERR(inst))
+                goto out_put_alg;
+
+        inst->alg.cra_flags = alg->cra_flags;
+        inst->alg.cra_priority = alg->cra_priority;
+        inst->alg.cra_blocksize = alg->cra_blocksize;
+        inst->alg.cra_alignmask = alg->cra_alignmask;
+        inst->alg.cra_type = alg->cra_type;
+        inst->alg.cra_blkcipher.ivsize = alg->cra_blkcipher.ivsize;
+        inst->alg.cra_blkcipher.min_keysize = alg->cra_blkcipher.min_keysize;
+        inst->alg.cra_blkcipher.max_keysize = alg->cra_blkcipher.max_keysize;
+        inst->alg.cra_ctxsize = sizeof(struct crypto_fpu_ctx);
+        inst->alg.cra_init = crypto_fpu_init_tfm;
+        inst->alg.cra_exit = crypto_fpu_exit_tfm;
+        inst->alg.cra_blkcipher.setkey = crypto_fpu_setkey;
+        inst->alg.cra_blkcipher.encrypt = crypto_fpu_encrypt;
+        inst->alg.cra_blkcipher.decrypt = crypto_fpu_decrypt;
+
+out_put_alg:
+        crypto_mod_put(alg);
+        return inst;
+}
+
+static void crypto_fpu_free(struct crypto_instance *inst)
+{
+        crypto_drop_spawn(crypto_instance_ctx(inst));
+        kfree(inst);
+}
+
+static struct crypto_template crypto_fpu_tmpl = {
+        .name = "fpu",
+        .alloc = crypto_fpu_alloc,
+        .free = crypto_fpu_free,
+        .module = THIS_MODULE,
+};
+
+static int __init crypto_fpu_module_init(void)
+{
+        return crypto_register_template(&crypto_fpu_tmpl);
+}
+
+static void __exit crypto_fpu_module_exit(void)
+{
+        crypto_unregister_template(&crypto_fpu_tmpl);
+}
+
+module_init(crypto_fpu_module_init);
+module_exit(crypto_fpu_module_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("FPU block cipher wrapper");
diff --git a/arch/x86/include/asm/atomic_32.h b/arch/x86/include/asm/atomic_32.h
index aff9f1fcdcd7..8cb9c814e120 100644
--- a/arch/x86/include/asm/atomic_32.h
+++ b/arch/x86/include/asm/atomic_32.h
@@ -483,5 +483,5 @@ atomic64_add_negative(unsigned long long delta, atomic64_t *ptr)
         return old_val < 0;
 }
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* _ASM_X86_ATOMIC_32_H */
diff --git a/arch/x86/include/asm/atomic_64.h b/arch/x86/include/asm/atomic_64.h
index 8c21731984da..0d6360220007 100644
--- a/arch/x86/include/asm/atomic_64.h
+++ b/arch/x86/include/asm/atomic_64.h
@@ -455,5 +455,5 @@ static inline void atomic_or_long(unsigned long *v1, unsigned long v2)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* _ASM_X86_ATOMIC_64_H */
diff --git a/arch/x86/include/asm/bitsperlong.h b/arch/x86/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..b0ae1c4dc791
--- /dev/null
+++ b/arch/x86/include/asm/bitsperlong.h
@@ -0,0 +1,13 @@
+#ifndef __ASM_X86_BITSPERLONG_H
+#define __ASM_X86_BITSPERLONG_H
+
+#ifdef __x86_64__
+# define __BITS_PER_LONG 64
+#else
+# define __BITS_PER_LONG 32
+#endif
+
+#include <asm-generic/bitsperlong.h>
+
+#endif /* __ASM_X86_BITSPERLONG_H */
+
diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index d750a10ccad6..ff8cbfa07851 100644
--- a/arch/x86/include/asm/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -14,6 +14,7 @@ BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
 BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
 BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
 BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
+BUILD_INTERRUPT(reboot_interrupt,REBOOT_VECTOR)
 
 BUILD_INTERRUPT3(invalidate_interrupt0,INVALIDATE_TLB_VECTOR_START+0,
                  smp_invalidate_interrupt)
@@ -52,8 +53,16 @@ BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
 BUILD_INTERRUPT(perf_pending_interrupt, LOCAL_PENDING_VECTOR)
 #endif
 
-#ifdef CONFIG_X86_MCE_P4THERMAL
+#ifdef CONFIG_X86_THERMAL_VECTOR
 BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
 #endif
 
+#ifdef CONFIG_X86_MCE_THRESHOLD
+BUILD_INTERRUPT(threshold_interrupt,THRESHOLD_APIC_VECTOR)
+#endif
+
+#ifdef CONFIG_X86_NEW_MCE
+BUILD_INTERRUPT(mce_self_interrupt,MCE_SELF_VECTOR)
+#endif
+
 #endif
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 9ebc5c255032..82e3e8f01043 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -22,7 +22,7 @@ typedef struct {
 #endif
 #ifdef CONFIG_X86_MCE
         unsigned int irq_thermal_count;
-# ifdef CONFIG_X86_64
+# ifdef CONFIG_X86_MCE_THRESHOLD
         unsigned int irq_threshold_count;
 # endif
 #endif
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 6df45f639666..ba180d93b08c 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -34,6 +34,7 @@ extern void perf_pending_interrupt(void);
 extern void spurious_interrupt(void);
 extern void thermal_interrupt(void);
 extern void reschedule_interrupt(void);
+extern void mce_self_interrupt(void);
 
 extern void invalidate_interrupt(void);
 extern void invalidate_interrupt0(void);
@@ -46,6 +47,7 @@ extern void invalidate_interrupt6(void);
 extern void invalidate_interrupt7(void);
 
 extern void irq_move_cleanup_interrupt(void);
+extern void reboot_interrupt(void);
 extern void threshold_interrupt(void);
 
 extern void call_function_interrupt(void);
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index e997be98c9b9..5b21f0ec3df2 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -25,6 +25,7 @@
  */
 
 #define NMI_VECTOR                      0x02
+#define MCE_VECTOR                      0x12
 
 /*
  * IDT vectors usable for external interrupt sources start
@@ -87,13 +88,8 @@
 #define CALL_FUNCTION_VECTOR            0xfc
 #define CALL_FUNCTION_SINGLE_VECTOR     0xfb
 #define THERMAL_APIC_VECTOR             0xfa
-
-#ifdef CONFIG_X86_32
-/* 0xf8 - 0xf9 : free */
-#else
-# define THRESHOLD_APIC_VECTOR          0xf9
-# define UV_BAU_MESSAGE                 0xf8
-#endif
+#define THRESHOLD_APIC_VECTOR           0xf9
+#define REBOOT_VECTOR                   0xf8
 
 /* f0-f7 used for spreading out TLB flushes: */
 #define INVALIDATE_TLB_VECTOR_END       0xf7
@@ -117,6 +113,13 @@
  */
 #define LOCAL_PENDING_VECTOR            0xec
 
+#define UV_BAU_MESSAGE                  0xec
+
+/*
+ * Self IPI vector for machine checks
+ */
+#define MCE_SELF_VECTOR                 0xeb
+
 /*
  * First APIC vector available to drivers: (vectors 0x30-0xee) we
  * start at 0x31(0x41) to spread out vectors evenly between priority
diff --git a/arch/x86/include/asm/lguest.h b/arch/x86/include/asm/lguest.h
index 1caf57628b9c..313389cd50d2 100644
--- a/arch/x86/include/asm/lguest.h
+++ b/arch/x86/include/asm/lguest.h
@@ -17,8 +17,13 @@
 /* Pages for switcher itself, then two pages per cpu */
 #define TOTAL_SWITCHER_PAGES (SHARED_SWITCHER_PAGES + 2 * nr_cpu_ids)
 
-/* We map at -4M for ease of mapping into the guest (one PTE page). */
+/* We map at -4M (-2M when PAE is activated) for ease of mapping
+ * into the guest (one PTE page). */
+#ifdef CONFIG_X86_PAE
+#define SWITCHER_ADDR 0xFFE00000
+#else
 #define SWITCHER_ADDR 0xFFC00000
+#endif
 
 /* Found in switcher.S */
 extern unsigned long default_idt_entries[];
diff --git a/arch/x86/include/asm/lguest_hcall.h b/arch/x86/include/asm/lguest_hcall.h
index faae1996487b..d31c4a684078 100644
--- a/arch/x86/include/asm/lguest_hcall.h
+++ b/arch/x86/include/asm/lguest_hcall.h
@@ -12,11 +12,13 @@
 #define LHCALL_TS               8
 #define LHCALL_SET_CLOCKEVENT   9
 #define LHCALL_HALT             10
+#define LHCALL_SET_PMD          13
 #define LHCALL_SET_PTE          14
-#define LHCALL_SET_PMD          15
+#define LHCALL_SET_PGD          15
 #define LHCALL_LOAD_TLS         16
 #define LHCALL_NOTIFY           17
 #define LHCALL_LOAD_GDT_ENTRY   18
+#define LHCALL_SEND_INTERRUPTS  19
 
 #define LGUEST_TRAP_ENTRY 0x1F
 
@@ -32,10 +34,10 @@
  * operations?  There are two ways: the direct way is to make a "hypercall",
  * to make requests of the Host Itself.
  *
- * We use the KVM hypercall mechanism. Eighteen hypercalls are
+ * We use the KVM hypercall mechanism. Seventeen hypercalls are
  * available: the hypercall number is put in the %eax register, and the
- * arguments (when required) are placed in %ebx, %ecx and %edx.  If a return
- * value makes sense, it's returned in %eax.
+ * arguments (when required) are placed in %ebx, %ecx, %edx and %esi.
+ * If a return value makes sense, it's returned in %eax.
  *
  * Grossly invalid calls result in Sudden Death at the hands of the vengeful
  * Host, rather than returning failure.  This reflects Winston Churchill's
@@ -47,8 +49,9 @@
 
 #define LHCALL_RING_SIZE 64
 struct hcall_args {
-        /* These map directly onto eax, ebx, ecx, edx in struct lguest_regs */
-        unsigned long arg0, arg1, arg2, arg3;
+        /* These map directly onto eax, ebx, ecx, edx and esi
+         * in struct lguest_regs */
+        unsigned long arg0, arg1, arg2, arg3, arg4;
 };
 
 #endif /* !__ASSEMBLY__ */
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 4f8c199584e7..540a466e50f5 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -1,8 +1,6 @@
 #ifndef _ASM_X86_MCE_H
 #define _ASM_X86_MCE_H
 
-#ifdef __x86_64__
-
 #include <linux/types.h>
 #include <asm/ioctls.h>
 
@@ -10,21 +8,35 @@
  * Machine Check support for x86
  */
 
-#define MCG_CTL_P        (1UL<<8)   /* MCG_CAP register available */
-#define MCG_EXT_P        (1ULL<<9)   /* Extended registers available */
-#define MCG_CMCI_P       (1ULL<<10)  /* CMCI supported */
-
-#define MCG_STATUS_RIPV  (1UL<<0)   /* restart ip valid */
-#define MCG_STATUS_EIPV  (1UL<<1)   /* ip points to correct instruction */
-#define MCG_STATUS_MCIP  (1UL<<2)   /* machine check in progress */
-
-#define MCI_STATUS_VAL   (1UL<<63)  /* valid error */
-#define MCI_STATUS_OVER  (1UL<<62)  /* previous errors lost */
-#define MCI_STATUS_UC    (1UL<<61)  /* uncorrected error */
-#define MCI_STATUS_EN    (1UL<<60)  /* error enabled */
-#define MCI_STATUS_MISCV (1UL<<59)  /* misc error reg. valid */
-#define MCI_STATUS_ADDRV (1UL<<58)  /* addr reg. valid */
-#define MCI_STATUS_PCC   (1UL<<57)  /* processor context corrupt */
+#define MCG_BANKCNT_MASK        0xff         /* Number of Banks */
+#define MCG_CTL_P               (1ULL<<8)    /* MCG_CAP register available */
+#define MCG_EXT_P               (1ULL<<9)    /* Extended registers available */
+#define MCG_CMCI_P              (1ULL<<10)   /* CMCI supported */
+#define MCG_EXT_CNT_MASK        0xff0000     /* Number of Extended registers */
+#define MCG_EXT_CNT_SHIFT       16
+#define MCG_EXT_CNT(c)          (((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT)
+#define MCG_SER_P               (1ULL<<24)   /* MCA recovery/new status bits */
+
+#define MCG_STATUS_RIPV  (1ULL<<0)   /* restart ip valid */
+#define MCG_STATUS_EIPV  (1ULL<<1)   /* ip points to correct instruction */
+#define MCG_STATUS_MCIP  (1ULL<<2)   /* machine check in progress */
+
+#define MCI_STATUS_VAL   (1ULL<<63)  /* valid error */
+#define MCI_STATUS_OVER  (1ULL<<62)  /* previous errors lost */
+#define MCI_STATUS_UC    (1ULL<<61)  /* uncorrected error */
+#define MCI_STATUS_EN    (1ULL<<60)  /* error enabled */
+#define MCI_STATUS_MISCV (1ULL<<59)  /* misc error reg. valid */
+#define MCI_STATUS_ADDRV (1ULL<<58)  /* addr reg. valid */
+#define MCI_STATUS_PCC   (1ULL<<57)  /* processor context corrupt */
+#define MCI_STATUS_S     (1ULL<<56)  /* Signaled machine check */
+#define MCI_STATUS_AR    (1ULL<<55)  /* Action required */
+
+/* MISC register defines */
+#define MCM_ADDR_SEGOFF  0      /* segment offset */
+#define MCM_ADDR_LINEAR  1      /* linear address */
+#define MCM_ADDR_PHYS    2      /* physical address */
+#define MCM_ADDR_MEM     3      /* memory address */
+#define MCM_ADDR_GENERIC 7      /* generic */
 
 /* Fields are zero when not available */
 struct mce {
@@ -34,13 +46,19 @@ struct mce {
         __u64 mcgstatus;
         __u64 ip;
         __u64 tsc;      /* cpu time stamp counter */
-        __u64 res1;     /* for future extension */
-        __u64 res2;     /* dito. */
+        __u64 time;     /* wall time_t when error was detected */
+        __u8  cpuvendor;        /* cpu vendor as encoded in system.h */
+        __u8  pad1;
+        __u16 pad2;
+        __u32 cpuid;    /* CPUID 1 EAX */
         __u8  cs;               /* code segment */
         __u8  bank;     /* machine check bank */
-        __u8  cpu;      /* cpu that raised the error */
+        __u8  cpu;      /* cpu number; obsolete; use extcpu now */
         __u8  finished;   /* entry is valid */
-        __u32 pad;
+        __u32 extcpu;   /* linux cpu number that detected the error */
+        __u32 socketid; /* CPU socket ID */
+        __u32 apicid;   /* CPU initial apic ID */
+        __u64 mcgcap;   /* MCGCAP MSR: machine check capabilities of CPU */
 };
 
 /*
@@ -57,7 +75,7 @@ struct mce_log {
         unsigned len;       /* = MCE_LOG_LEN */
         unsigned next;
         unsigned flags;
-        unsigned pad0;
+        unsigned recordlen;     /* length of struct mce */
         struct mce entry[MCE_LOG_LEN];
 };
 
@@ -82,19 +100,16 @@ struct mce_log {
 #define K8_MCE_THRESHOLD_BANK_5    (MCE_THRESHOLD_BASE + 5 * 9)
 #define K8_MCE_THRESHOLD_DRAM_ECC  (MCE_THRESHOLD_BANK_4 + 0)
 
-#endif /* __x86_64__ */
-
 #ifdef __KERNEL__
 
-#ifdef CONFIG_X86_32
 extern int mce_disabled;
-#else /* CONFIG_X86_32 */
 
 #include <asm/atomic.h>
+#include <linux/percpu.h>
 
 void mce_setup(struct mce *m);
 void mce_log(struct mce *m);
-DECLARE_PER_CPU(struct sys_device, device_mce);
+DECLARE_PER_CPU(struct sys_device, mce_dev);
 extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
 
 /*
@@ -104,6 +119,8 @@ extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
 #define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
 
 #ifdef CONFIG_X86_MCE_INTEL
+extern int mce_cmci_disabled;
+extern int mce_ignore_ce;
 void mce_intel_feature_init(struct cpuinfo_x86 *c);
 void cmci_clear(void);
 void cmci_reenable(void);
@@ -123,13 +140,16 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c);
 static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
 #endif
 
-extern int mce_available(struct cpuinfo_x86 *c);
+int mce_available(struct cpuinfo_x86 *c);
+
+DECLARE_PER_CPU(unsigned, mce_exception_count);
+DECLARE_PER_CPU(unsigned, mce_poll_count);
 
 void mce_log_therm_throt_event(__u64 status);
 
 extern atomic_t mce_entry;
 
-extern void do_machine_check(struct pt_regs *, long);
+void do_machine_check(struct pt_regs *, long);
 
 typedef DECLARE_BITMAP(mce_banks_t, MAX_NR_BANKS);
 DECLARE_PER_CPU(mce_banks_t, mce_poll_banks);
@@ -139,14 +159,16 @@ enum mcp_flags {
         MCP_UC = (1 << 1),              /* log uncorrected errors */
         MCP_DONTLOG = (1 << 2),         /* only clear, don't log */
 };
-extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
+void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
 
-extern int mce_notify_user(void);
+int mce_notify_irq(void);
+void mce_notify_process(void);
 
-#endif /* !CONFIG_X86_32 */
+DECLARE_PER_CPU(struct mce, injectm);
+extern struct file_operations mce_chrdev_ops;
 
 #ifdef CONFIG_X86_MCE
-extern void mcheck_init(struct cpuinfo_x86 *c);
+void mcheck_init(struct cpuinfo_x86 *c);
 #else
 #define mcheck_init(c) do { } while (0)
 #endif
diff --git a/arch/x86/include/asm/mman.h b/arch/x86/include/asm/mman.h
index 90bc4108a4fd..751af2550ed9 100644
--- a/arch/x86/include/asm/mman.h
+++ b/arch/x86/include/asm/mman.h
@@ -1,7 +1,7 @@
 #ifndef _ASM_X86_MMAN_H
 #define _ASM_X86_MMAN_H
 
-#include <asm-generic/mman.h>
+#include <asm-generic/mman-common.h>
 
 #define MAP_32BIT       0x40            /* only give out 32bit addresses */
 
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 4d58d04fca83..1692fb5050e3 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -207,7 +207,14 @@
 
 #define MSR_IA32_THERM_CONTROL          0x0000019a
 #define MSR_IA32_THERM_INTERRUPT        0x0000019b
+
+#define THERM_INT_LOW_ENABLE            (1 << 0)
+#define THERM_INT_HIGH_ENABLE           (1 << 1)
+
 #define MSR_IA32_THERM_STATUS           0x0000019c
+
+#define THERM_STATUS_PROCHOT            (1 << 0)
+
 #define MSR_IA32_MISC_ENABLE            0x000001a0
 
 /* MISC_ENABLE bits: architectural */
diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h
index 89ed9d70b0aa..625c3f0e741a 100644
--- a/arch/x86/include/asm/page.h
+++ b/arch/x86/include/asm/page.h
@@ -56,7 +56,7 @@ extern bool __virt_addr_valid(unsigned long kaddr);
 #endif  /* __ASSEMBLY__ */
 
 #include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
+#include <asm-generic/getorder.h>
 
 #define __HAVE_ARCH_GATE_AREA 1
 
diff --git a/arch/x86/include/asm/pgtable_32_types.h b/arch/x86/include/asm/pgtable_32_types.h
index 2733fad45f98..5e67c1532314 100644
--- a/arch/x86/include/asm/pgtable_32_types.h
+++ b/arch/x86/include/asm/pgtable_32_types.h
@@ -46,6 +46,10 @@ extern bool __vmalloc_start_set; /* set once high_memory is set */
 # define VMALLOC_END    (FIXADDR_START - 2 * PAGE_SIZE)
 #endif
 
+#define MODULES_VADDR   VMALLOC_START
+#define MODULES_END     VMALLOC_END
+#define MODULES_LEN     (MODULES_VADDR - MODULES_END)
+
 #define MAXMEM  (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
 
 #endif /* _ASM_X86_PGTABLE_32_DEFS_H */
diff --git a/arch/x86/include/asm/signal.h b/arch/x86/include/asm/signal.h
index 7761a5d554bb..598457cbd0f8 100644
--- a/arch/x86/include/asm/signal.h
+++ b/arch/x86/include/asm/signal.h
@@ -117,7 +117,7 @@ typedef unsigned long sigset_t;
 #define MINSIGSTKSZ     2048
 #define SIGSTKSZ        8192
 
-#include <asm-generic/signal.h>
+#include <asm-generic/signal-defs.h>
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index a5ecc9c33e92..7f3eba08e7de 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -172,6 +172,6 @@ static inline void flush_tlb_kernel_range(unsigned long start,
         flush_tlb_all();
 }
 
-extern void zap_low_mappings(void);
+extern void zap_low_mappings(bool early);
 
 #endif /* _ASM_X86_TLBFLUSH_H */
diff --git a/arch/x86/include/asm/types.h b/arch/x86/include/asm/types.h
index e6f736320077..09b97745772f 100644
--- a/arch/x86/include/asm/types.h
+++ b/arch/x86/include/asm/types.h
@@ -14,12 +14,6 @@ typedef unsigned short umode_t;
  */
 #ifdef __KERNEL__
 
-#ifdef CONFIG_X86_32
-# define BITS_PER_LONG 32
-#else
-# define BITS_PER_LONG 64
-#endif
-
 #ifndef __ASSEMBLY__
 
 typedef u64 dma64_addr_t;
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 4f78bd682125..f3477bb84566 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -73,7 +73,7 @@ obj-$(CONFIG_KEXEC)		+= machine_kexec_$(BITS).o
 obj-$(CONFIG_KEXEC)             += relocate_kernel_$(BITS).o crash.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump_$(BITS).o
 obj-$(CONFIG_KPROBES)           += kprobes.o
-obj-$(CONFIG_MODULES)           += module_$(BITS).o
+obj-$(CONFIG_MODULES)           += module.o
 obj-$(CONFIG_EFI)               += efi.o efi_$(BITS).o efi_stub_$(BITS).o
 obj-$(CONFIG_DOUBLEFAULT)       += doublefault_32.o
 obj-$(CONFIG_KGDB)              += kgdb.o
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 7c243a2c5115..ca93638ba430 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -104,7 +104,7 @@ int acpi_save_state_mem(void)
         initial_gs = per_cpu_offset(smp_processor_id());
 #endif
         initial_code = (unsigned long)wakeup_long64;
-        saved_magic = 0x123456789abcdef0;
+       saved_magic = 0x123456789abcdef0L;
 #endif /* CONFIG_64BIT */
 
         return 0;
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 076d3881f3da..8c7c042ecad1 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -899,7 +899,7 @@ void clear_local_APIC(void)
         }
 
         /* lets not touch this if we didn't frob it */
-#if defined(CONFIG_X86_MCE_P4THERMAL) || defined(CONFIG_X86_MCE_INTEL)
+#ifdef CONFIG_X86_THERMAL_VECTOR
         if (maxlvt >= 5) {
                 v = apic_read(APIC_LVTTHMR);
                 apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED);
@@ -2017,7 +2017,7 @@ static int lapic_suspend(struct sys_device *dev, pm_message_t state)
         apic_pm_state.apic_lvterr = apic_read(APIC_LVTERR);
         apic_pm_state.apic_tmict = apic_read(APIC_TMICT);
         apic_pm_state.apic_tdcr = apic_read(APIC_TDCR);
-#if defined(CONFIG_X86_MCE_P4THERMAL) || defined(CONFIG_X86_MCE_INTEL)
+#ifdef CONFIG_X86_THERMAL_VECTOR
         if (maxlvt >= 5)
                 apic_pm_state.apic_thmr = apic_read(APIC_LVTTHMR);
 #endif
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 94605e7f6a54..ef8d9290c7ea 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -187,8 +187,8 @@ int __init arch_early_irq_init(void)
         for (i = 0; i < count; i++) {
                 desc = irq_to_desc(i);
                 desc->chip_data = &cfg[i];
-                alloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node);
-                alloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node);
+                zalloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node);
+                zalloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node);
                 if (i < NR_IRQS_LEGACY)
                         cpumask_setall(cfg[i].domain);
         }
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c
index a691302dc3ff..b3025b43b63a 100644
--- a/arch/x86/kernel/apic/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -66,7 +66,7 @@ static inline unsigned int get_nmi_count(int cpu)
 
 static inline int mce_in_progress(void)
 {
-#if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
+#if defined(CONFIG_X86_NEW_MCE)
         return atomic_read(&mce_entry) > 0;
 #endif
         return 0;
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index 49e0939bac42..79302e9a33a4 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -1233,9 +1233,9 @@ static int suspend(int vetoable)
         int err;
         struct apm_user *as;
 
-        device_suspend(PMSG_SUSPEND);
+        dpm_suspend_start(PMSG_SUSPEND);
 
-        device_power_down(PMSG_SUSPEND);
+        dpm_suspend_noirq(PMSG_SUSPEND);
 
         local_irq_disable();
         sysdev_suspend(PMSG_SUSPEND);
@@ -1259,9 +1259,9 @@ static int suspend(int vetoable)
         sysdev_resume();
         local_irq_enable();
 
-        device_power_up(PMSG_RESUME);
+        dpm_resume_noirq(PMSG_RESUME);
 
-        device_resume(PMSG_RESUME);
+        dpm_resume_end(PMSG_RESUME);
         queue_event(APM_NORMAL_RESUME, NULL);
         spin_lock(&user_list_lock);
         for (as = user_list; as != NULL; as = as->next) {
@@ -1277,7 +1277,7 @@ static void standby(void)
 {
         int err;
 
-        device_power_down(PMSG_SUSPEND);
+        dpm_suspend_noirq(PMSG_SUSPEND);
 
         local_irq_disable();
         sysdev_suspend(PMSG_SUSPEND);
@@ -1291,7 +1291,7 @@ static void standby(void)
         sysdev_resume();
         local_irq_enable();
 
-        device_power_up(PMSG_RESUME);
+        dpm_resume_noirq(PMSG_RESUME);
 }
 
 static apm_event_t get_event(void)
@@ -1376,7 +1376,7 @@ static void check_events(void)
                         ignore_bounce = 1;
                         if ((event != APM_NORMAL_RESUME)
                             || (ignore_normal_resume == 0)) {
-                                device_resume(PMSG_RESUME);
+                                dpm_resume_end(PMSG_RESUME);
                                 queue_event(event, NULL);
                         }
                         ignore_normal_resume = 0;
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index 1a830cbd7015..dfdbf6403895 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -126,6 +126,7 @@ void foo(void)
 #if defined(CONFIG_LGUEST) || defined(CONFIG_LGUEST_GUEST) || defined(CONFIG_LGUEST_MODULE)
         BLANK();
         OFFSET(LGUEST_DATA_irq_enabled, lguest_data, irq_enabled);
+        OFFSET(LGUEST_DATA_irq_pending, lguest_data, irq_pending);
         OFFSET(LGUEST_DATA_pgdir, lguest_data, pgdir);
 
         BLANK();
diff --git a/arch/x86/kernel/cpu/mcheck/Makefile b/arch/x86/kernel/cpu/mcheck/Makefile
index b2f89829bbe8..45004faf67ea 100644
--- a/arch/x86/kernel/cpu/mcheck/Makefile
+++ b/arch/x86/kernel/cpu/mcheck/Makefile
@@ -1,7 +1,11 @@
-obj-y                           =  mce_$(BITS).o therm_throt.o
+obj-y                           =  mce.o therm_throt.o
 
-obj-$(CONFIG_X86_32)            += k7.o p4.o p5.o p6.o winchip.o
-obj-$(CONFIG_X86_MCE_INTEL)     += mce_intel_64.o
+obj-$(CONFIG_X86_NEW_MCE)       += mce-severity.o
+obj-$(CONFIG_X86_OLD_MCE)       += k7.o p4.o p6.o
+obj-$(CONFIG_X86_ANCIENT_MCE)   += winchip.o p5.o
+obj-$(CONFIG_X86_MCE_P4THERMAL) += mce_intel.o
+obj-$(CONFIG_X86_MCE_INTEL)     += mce_intel_64.o mce_intel.o
 obj-$(CONFIG_X86_MCE_AMD)       += mce_amd_64.o
 obj-$(CONFIG_X86_MCE_NONFATAL)  += non-fatal.o
 obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o
+obj-$(CONFIG_X86_MCE_INJECT)    += mce-inject.o
diff --git a/arch/x86/kernel/cpu/mcheck/k7.c b/arch/x86/kernel/cpu/mcheck/k7.c
index dd3af6e7b39a..89e510424152 100644
--- a/arch/x86/kernel/cpu/mcheck/k7.c
+++ b/arch/x86/kernel/cpu/mcheck/k7.c
@@ -2,11 +2,10 @@
  * Athlon specific Machine Check Exception Reporting
  * (C) Copyright 2002 Dave Jones <davej@redhat.com>
  */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
 #include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
 #include <linux/smp.h>
 
 #include <asm/processor.h>
@@ -15,12 +14,12 @@
 
 #include "mce.h"
 
-/* Machine Check Handler For AMD Athlon/Duron */
+/* Machine Check Handler For AMD Athlon/Duron: */
 static void k7_machine_check(struct pt_regs *regs, long error_code)
 {
-        int recover = 1;
         u32 alow, ahigh, high, low;
         u32 mcgstl, mcgsth;
+        int recover = 1;
         int i;
 
         rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
@@ -32,15 +31,19 @@ static void k7_machine_check(struct pt_regs *regs, long error_code)
 
         for (i = 1; i < nr_mce_banks; i++) {
                 rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);
-                if (high&(1<<31)) {
+                if (high & (1<<31)) {
                         char misc[20];
                         char addr[24];
-                        misc[0] = addr[0] = '\0';
+
+                        misc[0] = '\0';
+                        addr[0] = '\0';
+
                         if (high & (1<<29))
                                 recover |= 1;
                         if (high & (1<<25))
                                 recover |= 2;
                         high &= ~(1<<31);
+
                         if (high & (1<<27)) {
                                 rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
                                 snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
@@ -49,27 +52,31 @@ static void k7_machine_check(struct pt_regs *regs, long error_code)
                                 rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
                                 snprintf(addr, 24, " at %08x%08x", ahigh, alow);
                         }
+
                         printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
                                 smp_processor_id(), i, high, low, misc, addr);
-                        /* Clear it */
+
+                        /* Clear it: */
                         wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
-                        /* Serialize */
+                        /* Serialize: */
                         wmb();
                         add_taint(TAINT_MACHINE_CHECK);
                 }
         }
 
-        if (recover&2)
+        if (recover & 2)
                 panic("CPU context corrupt");
-        if (recover&1)
+        if (recover & 1)
                 panic("Unable to continue");
+
         printk(KERN_EMERG "Attempting to continue.\n");
+
         mcgstl &= ~(1<<2);
         wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
 }
 
 
-/* AMD K7 machine check is Intel like */
+/* AMD K7 machine check is Intel like: */
 void amd_mcheck_init(struct cpuinfo_x86 *c)
 {
         u32 l, h;
@@ -79,21 +86,26 @@ void amd_mcheck_init(struct cpuinfo_x86 *c)
                 return;
 
         machine_check_vector = k7_machine_check;
+        /* Make sure the vector pointer is visible before we enable MCEs: */
         wmb();
 
         printk(KERN_INFO "Intel machine check architecture supported.\n");
+
         rdmsr(MSR_IA32_MCG_CAP, l, h);
         if (l & (1<<8)) /* Control register present ? */
                 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
         nr_mce_banks = l & 0xff;
 
-        /* Clear status for MC index 0 separately, we don't touch CTL,
-         * as some K7 Athlons cause spurious MCEs when its enabled. */
+        /*
+         * Clear status for MC index 0 separately, we don't touch CTL,
+         * as some K7 Athlons cause spurious MCEs when its enabled:
+         */
         if (boot_cpu_data.x86 == 6) {
                 wrmsr(MSR_IA32_MC0_STATUS, 0x0, 0x0);
                 i = 1;
         } else
                 i = 0;
+
         for (; i < nr_mce_banks; i++) {
                 wrmsr(MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
                 wrmsr(MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
diff --git a/arch/x86/kernel/cpu/mcheck/mce-inject.c b/arch/x86/kernel/cpu/mcheck/mce-inject.c
new file mode 100644
index 000000000000..a3a235a53f09
--- /dev/null
+++ b/arch/x86/kernel/cpu/mcheck/mce-inject.c
@@ -0,0 +1,127 @@
+/*
+ * Machine check injection support.
+ * Copyright 2008 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ *
+ * Authors:
+ * Andi Kleen
+ * Ying Huang
+ */
+#include <linux/uaccess.h>
+#include <linux/module.h>
+#include <linux/timer.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/fs.h>
+#include <linux/smp.h>
+#include <asm/mce.h>
+
+/* Update fake mce registers on current CPU. */
+static void inject_mce(struct mce *m)
+{
+        struct mce *i = &per_cpu(injectm, m->extcpu);
+
+        /* Make sure noone reads partially written injectm */
+        i->finished = 0;
+        mb();
+        m->finished = 0;
+        /* First set the fields after finished */
+        i->extcpu = m->extcpu;
+        mb();
+        /* Now write record in order, finished last (except above) */
+        memcpy(i, m, sizeof(struct mce));
+        /* Finally activate it */
+        mb();
+        i->finished = 1;
+}
+
+struct delayed_mce {
+        struct timer_list timer;
+        struct mce m;
+};
+
+/* Inject mce on current CPU */
+static void raise_mce(unsigned long data)
+{
+        struct delayed_mce *dm = (struct delayed_mce *)data;
+        struct mce *m = &dm->m;
+        int cpu = m->extcpu;
+
+        inject_mce(m);
+        if (m->status & MCI_STATUS_UC) {
+                struct pt_regs regs;
+                memset(&regs, 0, sizeof(struct pt_regs));
+                regs.ip = m->ip;
+                regs.cs = m->cs;
+                printk(KERN_INFO "Triggering MCE exception on CPU %d\n", cpu);
+                do_machine_check(&regs, 0);
+                printk(KERN_INFO "MCE exception done on CPU %d\n", cpu);
+        } else {
+                mce_banks_t b;
+                memset(&b, 0xff, sizeof(mce_banks_t));
+                printk(KERN_INFO "Starting machine check poll CPU %d\n", cpu);
+                machine_check_poll(0, &b);
+                mce_notify_irq();
+                printk(KERN_INFO "Finished machine check poll on CPU %d\n",
+                       cpu);
+        }
+        kfree(dm);
+}
+
+/* Error injection interface */
+static ssize_t mce_write(struct file *filp, const char __user *ubuf,
+                         size_t usize, loff_t *off)
+{
+        struct delayed_mce *dm;
+        struct mce m;
+
+        if (!capable(CAP_SYS_ADMIN))
+                return -EPERM;
+        /*
+         * There are some cases where real MSR reads could slip
+         * through.
+         */
+        if (!boot_cpu_has(X86_FEATURE_MCE) || !boot_cpu_has(X86_FEATURE_MCA))
+                return -EIO;
+
+        if ((unsigned long)usize > sizeof(struct mce))
+                usize = sizeof(struct mce);
+        if (copy_from_user(&m, ubuf, usize))
+                return -EFAULT;
+
+        if (m.extcpu >= num_possible_cpus() || !cpu_online(m.extcpu))
+                return -EINVAL;
+
+        dm = kmalloc(sizeof(struct delayed_mce), GFP_KERNEL);
+        if (!dm)
+                return -ENOMEM;
+
+        /*
+         * Need to give user space some time to set everything up,
+         * so do it a jiffie or two later everywhere.
+         * Should we use a hrtimer here for better synchronization?
+         */
+        memcpy(&dm->m, &m, sizeof(struct mce));
+        setup_timer(&dm->timer, raise_mce, (unsigned long)dm);
+        dm->timer.expires = jiffies + 2;
+        add_timer_on(&dm->timer, m.extcpu);
+        return usize;
+}
+
+static int inject_init(void)
+{
+        printk(KERN_INFO "Machine check injector initialized\n");
+        mce_chrdev_ops.write = mce_write;
+        return 0;
+}
+
+module_init(inject_init);
+/*
+ * Cannot tolerate unloading currently because we cannot
+ * guarantee all openers of mce_chrdev will get a reference to us.
+ */
+MODULE_LICENSE("GPL");
diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h
new file mode 100644
index 000000000000..54dcb8ff12e5
--- /dev/null
+++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h
@@ -0,0 +1,15 @@
+#include <asm/mce.h>
+
+enum severity_level {
+        MCE_NO_SEVERITY,
+        MCE_KEEP_SEVERITY,
+        MCE_SOME_SEVERITY,
+        MCE_AO_SEVERITY,
+        MCE_UC_SEVERITY,
+        MCE_AR_SEVERITY,
+        MCE_PANIC_SEVERITY,
+};
+
+int mce_severity(struct mce *a, int tolerant, char **msg);
+
+extern int mce_ser;
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
new file mode 100644
index 000000000000..ff0807f97056
--- /dev/null
+++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
@@ -0,0 +1,218 @@
+/*
+ * MCE grading rules.
+ * Copyright 2008, 2009 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ *
+ * Author: Andi Kleen
+ */
+#include <linux/kernel.h>
+#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/debugfs.h>
+#include <asm/mce.h>
+
+#include "mce-internal.h"
+
+/*
+ * Grade an mce by severity. In general the most severe ones are processed
+ * first. Since there are quite a lot of combinations test the bits in a
+ * table-driven way. The rules are simply processed in order, first
+ * match wins.
+ *
+ * Note this is only used for machine check exceptions, the corrected
+ * errors use much simpler rules. The exceptions still check for the corrected
+ * errors, but only to leave them alone for the CMCI handler (except for
+ * panic situations)
+ */
+
+enum context { IN_KERNEL = 1, IN_USER = 2 };
+enum ser { SER_REQUIRED = 1, NO_SER = 2 };
+
+static struct severity {
+        u64 mask;
+        u64 result;
+        unsigned char sev;
+        unsigned char mcgmask;
+        unsigned char mcgres;
+        unsigned char ser;
+        unsigned char context;
+        unsigned char covered;
+        char *msg;
+} severities[] = {
+#define KERNEL .context = IN_KERNEL
+#define USER .context = IN_USER
+#define SER .ser = SER_REQUIRED
+#define NOSER .ser = NO_SER
+#define SEV(s) .sev = MCE_ ## s ## _SEVERITY
+#define BITCLR(x, s, m, r...) { .mask = x, .result = 0, SEV(s), .msg = m, ## r }
+#define BITSET(x, s, m, r...) { .mask = x, .result = x, SEV(s), .msg = m, ## r }
+#define MCGMASK(x, res, s, m, r...) \
+        { .mcgmask = x, .mcgres = res, SEV(s), .msg = m, ## r }
+#define MASK(x, y, s, m, r...) \
+        { .mask = x, .result = y, SEV(s), .msg = m, ## r }
+#define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)
+#define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
+#define MCACOD 0xffff
+
+        BITCLR(MCI_STATUS_VAL, NO, "Invalid"),
+        BITCLR(MCI_STATUS_EN, NO, "Not enabled"),
+        BITSET(MCI_STATUS_PCC, PANIC, "Processor context corrupt"),
+        /* When MCIP is not set something is very confused */
+        MCGMASK(MCG_STATUS_MCIP, 0, PANIC, "MCIP not set in MCA handler"),
+        /* Neither return not error IP -- no chance to recover -> PANIC */
+        MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, 0, PANIC,
+                "Neither restart nor error IP"),
+        MCGMASK(MCG_STATUS_RIPV, 0, PANIC, "In kernel and no restart IP",
+                KERNEL),
+        BITCLR(MCI_STATUS_UC, KEEP, "Corrected error", NOSER),
+        MASK(MCI_STATUS_OVER|MCI_STATUS_UC|MCI_STATUS_EN, MCI_STATUS_UC, SOME,
+             "Spurious not enabled", SER),
+
+        /* ignore OVER for UCNA */
+        MASK(MCI_UC_SAR, MCI_STATUS_UC, KEEP,
+             "Uncorrected no action required", SER),
+        MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_UC|MCI_STATUS_AR, PANIC,
+             "Illegal combination (UCNA with AR=1)", SER),
+        MASK(MCI_STATUS_S, 0, KEEP, "Non signalled machine check", SER),
+
+        /* AR add known MCACODs here */
+        MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_OVER|MCI_UC_SAR, PANIC,
+             "Action required with lost events", SER),
+        MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_SAR, PANIC,
+             "Action required; unknown MCACOD", SER),
+
+        /* known AO MCACODs: */
+        MASK(MCI_UC_SAR|MCI_STATUS_OVER|0xfff0, MCI_UC_S|0xc0, AO,
+             "Action optional: memory scrubbing error", SER),
+        MASK(MCI_UC_SAR|MCI_STATUS_OVER|MCACOD, MCI_UC_S|0x17a, AO,
+             "Action optional: last level cache writeback error", SER),
+
+        MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_S, SOME,
+             "Action optional unknown MCACOD", SER),
+        MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_S|MCI_STATUS_OVER, SOME,
+             "Action optional with lost events", SER),
+        BITSET(MCI_STATUS_UC|MCI_STATUS_OVER, PANIC, "Overflowed uncorrected"),
+        BITSET(MCI_STATUS_UC, UC, "Uncorrected"),
+        BITSET(0, SOME, "No match")     /* always matches. keep at end */
+};
+
+/*
+ * If the EIPV bit is set, it means the saved IP is the
+ * instruction which caused the MCE.
+ */
+static int error_context(struct mce *m)
+{
+        if (m->mcgstatus & MCG_STATUS_EIPV)
+                return (m->ip && (m->cs & 3) == 3) ? IN_USER : IN_KERNEL;
+        /* Unknown, assume kernel */
+        return IN_KERNEL;
+}
+
+int mce_severity(struct mce *a, int tolerant, char **msg)
+{
+        enum context ctx = error_context(a);
+        struct severity *s;
+
+        for (s = severities;; s++) {
+                if ((a->status & s->mask) != s->result)
+                        continue;
+                if ((a->mcgstatus & s->mcgmask) != s->mcgres)
+                        continue;
+                if (s->ser == SER_REQUIRED && !mce_ser)
+                        continue;
+                if (s->ser == NO_SER && mce_ser)
+                        continue;
+                if (s->context && ctx != s->context)
+                        continue;
+                if (msg)
+                        *msg = s->msg;
+                s->covered = 1;
+                if (s->sev >= MCE_UC_SEVERITY && ctx == IN_KERNEL) {
+                        if (panic_on_oops || tolerant < 1)
+                                return MCE_PANIC_SEVERITY;
+                }
+                return s->sev;
+        }
+}
+
+static void *s_start(struct seq_file *f, loff_t *pos)
+{
+        if (*pos >= ARRAY_SIZE(severities))
+                return NULL;
+        return &severities[*pos];
+}
+
+static void *s_next(struct seq_file *f, void *data, loff_t *pos)
+{
+        if (++(*pos) >= ARRAY_SIZE(severities))
+                return NULL;
+        return &severities[*pos];
+}
+
+static void s_stop(struct seq_file *f, void *data)
+{
+}
+
+static int s_show(struct seq_file *f, void *data)
+{
+        struct severity *ser = data;
+        seq_printf(f, "%d\t%s\n", ser->covered, ser->msg);
+        return 0;
+}
+
+static const struct seq_operations severities_seq_ops = {
+        .start  = s_start,
+        .next   = s_next,
+        .stop   = s_stop,
+        .show   = s_show,
+};
+
+static int severities_coverage_open(struct inode *inode, struct file *file)
+{
+        return seq_open(file, &severities_seq_ops);
+}
+
+static ssize_t severities_coverage_write(struct file *file,
+                                         const char __user *ubuf,
+                                         size_t count, loff_t *ppos)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(severities); i++)
+                severities[i].covered = 0;
+        return count;
+}
+
+static const struct file_operations severities_coverage_fops = {
+        .open           = severities_coverage_open,
+        .release        = seq_release,
+        .read           = seq_read,
+        .write          = severities_coverage_write,
+};
+
+static int __init severities_debugfs_init(void)
+{
+        struct dentry *dmce = NULL, *fseverities_coverage = NULL;
+
+        dmce = debugfs_create_dir("mce", NULL);
+        if (dmce == NULL)
+                goto err_out;
+        fseverities_coverage = debugfs_create_file("severities-coverage",
+                                                   0444, dmce, NULL,
+                                                   &severities_coverage_fops);
+        if (fseverities_coverage == NULL)
+                goto err_out;
+
+        return 0;
+
+err_out:
+        if (fseverities_coverage)
+                debugfs_remove(fseverities_coverage);
+        if (dmce)
+                debugfs_remove(dmce);
+        return -ENOMEM;
+}
+late_initcall(severities_debugfs_init);
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
new file mode 100644
index 000000000000..fabba15e4558
--- /dev/null
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -0,0 +1,1964 @@
+/*
+ * Machine check handler.
+ *
+ * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
+ * Rest from unknown author(s).
+ * 2004 Andi Kleen. Rewrote most of it.
+ * Copyright 2008 Intel Corporation
+ * Author: Andi Kleen
+ */
+#include <linux/thread_info.h>
+#include <linux/capability.h>
+#include <linux/miscdevice.h>
+#include <linux/interrupt.h>
+#include <linux/ratelimit.h>
+#include <linux/kallsyms.h>
+#include <linux/rcupdate.h>
+#include <linux/kobject.h>
+#include <linux/uaccess.h>
+#include <linux/kdebug.h>
+#include <linux/kernel.h>
+#include <linux/percpu.h>
+#include <linux/string.h>
+#include <linux/sysdev.h>
+#include <linux/delay.h>
+#include <linux/ctype.h>
+#include <linux/sched.h>
+#include <linux/sysfs.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kmod.h>
+#include <linux/poll.h>
+#include <linux/nmi.h>
+#include <linux/cpu.h>
+#include <linux/smp.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+
+#include <asm/processor.h>
+#include <asm/hw_irq.h>
+#include <asm/apic.h>
+#include <asm/idle.h>
+#include <asm/ipi.h>
+#include <asm/mce.h>
+#include <asm/msr.h>
+
+#include "mce-internal.h"
+#include "mce.h"
+
+/* Handle unconfigured int18 (should never happen) */
+static void unexpected_machine_check(struct pt_regs *regs, long error_code)
+{
+        printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n",
+               smp_processor_id());
+}
+
+/* Call the installed machine check handler for this CPU setup. */
+void (*machine_check_vector)(struct pt_regs *, long error_code) =
+                                                unexpected_machine_check;
+
+int                             mce_disabled;
+
+#ifdef CONFIG_X86_NEW_MCE
+
+#define MISC_MCELOG_MINOR       227
+
+#define SPINUNIT 100    /* 100ns */
+
+atomic_t mce_entry;
+
+DEFINE_PER_CPU(unsigned, mce_exception_count);
+
+/*
+ * Tolerant levels:
+ *   0: always panic on uncorrected errors, log corrected errors
+ *   1: panic or SIGBUS on uncorrected errors, log corrected errors
+ *   2: SIGBUS or log uncorrected errors (if possible), log corrected errors
+ *   3: never panic or SIGBUS, log all errors (for testing only)
+ */
+static int                      tolerant = 1;
+static int                      banks;
+static u64                      *bank;
+static unsigned long            notify_user;
+static int                      rip_msr;
+static int                      mce_bootlog = -1;
+static int                      monarch_timeout = -1;
+static int                      mce_panic_timeout;
+static int                      mce_dont_log_ce;
+int                             mce_cmci_disabled;
+int                             mce_ignore_ce;
+int                             mce_ser;
+
+static char                     trigger[128];
+static char                     *trigger_argv[2] = { trigger, NULL };
+
+static unsigned long            dont_init_banks;
+
+static DECLARE_WAIT_QUEUE_HEAD(mce_wait);
+static DEFINE_PER_CPU(struct mce, mces_seen);
+static int                      cpu_missing;
+
+
+/* MCA banks polled by the period polling timer for corrected events */
+DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
+        [0 ... BITS_TO_LONGS(MAX_NR_BANKS)-1] = ~0UL
+};
+
+static inline int skip_bank_init(int i)
+{
+        return i < BITS_PER_LONG && test_bit(i, &dont_init_banks);
+}
+
+static DEFINE_PER_CPU(struct work_struct, mce_work);
+
+/* Do initial initialization of a struct mce */
+void mce_setup(struct mce *m)
+{
+        memset(m, 0, sizeof(struct mce));
+        m->cpu = m->extcpu = smp_processor_id();
+        rdtscll(m->tsc);
+        /* We hope get_seconds stays lockless */
+        m->time = get_seconds();
+        m->cpuvendor = boot_cpu_data.x86_vendor;
+        m->cpuid = cpuid_eax(1);
+#ifdef CONFIG_SMP
+        m->socketid = cpu_data(m->extcpu).phys_proc_id;
+#endif
+        m->apicid = cpu_data(m->extcpu).initial_apicid;
+        rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap);
+}
+
+DEFINE_PER_CPU(struct mce, injectm);
+EXPORT_PER_CPU_SYMBOL_GPL(injectm);
+
+/*
+ * Lockless MCE logging infrastructure.
+ * This avoids deadlocks on printk locks without having to break locks. Also
+ * separate MCEs from kernel messages to avoid bogus bug reports.
+ */
+
+static struct mce_log mcelog = {
+        .signature      = MCE_LOG_SIGNATURE,
+        .len            = MCE_LOG_LEN,
+        .recordlen      = sizeof(struct mce),
+};
+
+void mce_log(struct mce *mce)
+{
+        unsigned next, entry;
+
+        mce->finished = 0;
+        wmb();
+        for (;;) {
+                entry = rcu_dereference(mcelog.next);
+                for (;;) {
+                        /*
+                         * When the buffer fills up discard new entries.
+                         * Assume that the earlier errors are the more
+                         * interesting ones:
+                         */
+                        if (entry >= MCE_LOG_LEN) {
+                                set_bit(MCE_OVERFLOW,
+                                        (unsigned long *)&mcelog.flags);
+                                return;
+                        }
+                        /* Old left over entry. Skip: */
+                        if (mcelog.entry[entry].finished) {
+                                entry++;
+                                continue;
+                        }
+                        break;
+                }
+                smp_rmb();
+                next = entry + 1;
+                if (cmpxchg(&mcelog.next, entry, next) == entry)
+                        break;
+        }
+        memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
+        wmb();
+        mcelog.entry[entry].finished = 1;
+        wmb();
+
+        mce->finished = 1;
+        set_bit(0, &notify_user);
+}
+
+static void print_mce(struct mce *m)
+{
+        printk(KERN_EMERG
+               "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n",
+               m->extcpu, m->mcgstatus, m->bank, m->status);
+        if (m->ip) {
+                printk(KERN_EMERG "RIP%s %02x:<%016Lx> ",
+                       !(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "",
+                       m->cs, m->ip);
+                if (m->cs == __KERNEL_CS)
+                        print_symbol("{%s}", m->ip);
+                printk("\n");
+        }
+        printk(KERN_EMERG "TSC %llx ", m->tsc);
+        if (m->addr)
+                printk("ADDR %llx ", m->addr);
+        if (m->misc)
+                printk("MISC %llx ", m->misc);
+        printk("\n");
+        printk(KERN_EMERG "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x\n",
+                        m->cpuvendor, m->cpuid, m->time, m->socketid,
+                        m->apicid);
+}
+
+static void print_mce_head(void)
+{
+        printk(KERN_EMERG "\n" KERN_EMERG "HARDWARE ERROR\n");
+}
+
+static void print_mce_tail(void)
+{
+        printk(KERN_EMERG "This is not a software problem!\n"
+               KERN_EMERG "Run through mcelog --ascii to decode and contact your hardware vendor\n");
+}
+
+#define PANIC_TIMEOUT 5 /* 5 seconds */
+
+static atomic_t mce_paniced;
+
+/* Panic in progress. Enable interrupts and wait for final IPI */
+static void wait_for_panic(void)
+{
+        long timeout = PANIC_TIMEOUT*USEC_PER_SEC;
+        preempt_disable();
+        local_irq_enable();
+        while (timeout-- > 0)
+                udelay(1);
+        if (panic_timeout == 0)
+                panic_timeout = mce_panic_timeout;
+        panic("Panicing machine check CPU died");
+}
+
+static void mce_panic(char *msg, struct mce *final, char *exp)
+{
+        int i;
+
+        /*
+         * Make sure only one CPU runs in machine check panic
+         */
+        if (atomic_add_return(1, &mce_paniced) > 1)
+                wait_for_panic();
+        barrier();
+
+        bust_spinlocks(1);
+        console_verbose();
+        print_mce_head();
+        /* First print corrected ones that are still unlogged */
+        for (i = 0; i < MCE_LOG_LEN; i++) {
+                struct mce *m = &mcelog.entry[i];
+                if (!(m->status & MCI_STATUS_VAL))
+                        continue;
+                if (!(m->status & MCI_STATUS_UC))
+                        print_mce(m);
+        }
+        /* Now print uncorrected but with the final one last */
+        for (i = 0; i < MCE_LOG_LEN; i++) {
+                struct mce *m = &mcelog.entry[i];
+                if (!(m->status & MCI_STATUS_VAL))
+                        continue;
+                if (!(m->status & MCI_STATUS_UC))
+                        continue;
+                if (!final || memcmp(m, final, sizeof(struct mce)))
+                        print_mce(m);
+        }
+        if (final)
+                print_mce(final);
+        if (cpu_missing)
+                printk(KERN_EMERG "Some CPUs didn't answer in synchronization\n");
+        print_mce_tail();
+        if (exp)
+                printk(KERN_EMERG "Machine check: %s\n", exp);
+        if (panic_timeout == 0)
+                panic_timeout = mce_panic_timeout;
+        panic(msg);
+}
+
+/* Support code for software error injection */
+
+static int msr_to_offset(u32 msr)
+{
+        unsigned bank = __get_cpu_var(injectm.bank);
+        if (msr == rip_msr)
+                return offsetof(struct mce, ip);
+        if (msr == MSR_IA32_MC0_STATUS + bank*4)
+                return offsetof(struct mce, status);
+        if (msr == MSR_IA32_MC0_ADDR + bank*4)
+                return offsetof(struct mce, addr);
+        if (msr == MSR_IA32_MC0_MISC + bank*4)
+                return offsetof(struct mce, misc);
+        if (msr == MSR_IA32_MCG_STATUS)
+                return offsetof(struct mce, mcgstatus);
+        return -1;
+}
+
+/* MSR access wrappers used for error injection */
+static u64 mce_rdmsrl(u32 msr)
+{
+        u64 v;
+        if (__get_cpu_var(injectm).finished) {
+                int offset = msr_to_offset(msr);
+                if (offset < 0)
+                        return 0;
+                return *(u64 *)((char *)&__get_cpu_var(injectm) + offset);
+        }
+        rdmsrl(msr, v);
+        return v;
+}
+
+static void mce_wrmsrl(u32 msr, u64 v)
+{
+        if (__get_cpu_var(injectm).finished) {
+                int offset = msr_to_offset(msr);
+                if (offset >= 0)
+                        *(u64 *)((char *)&__get_cpu_var(injectm) + offset) = v;
+                return;
+        }
+        wrmsrl(msr, v);
+}
+
+/*
+ * Simple lockless ring to communicate PFNs from the exception handler with the
+ * process context work function. This is vastly simplified because there's
+ * only a single reader and a single writer.
+ */
+#define MCE_RING_SIZE 16        /* we use one entry less */
+
+struct mce_ring {
+        unsigned short start;
+        unsigned short end;
+        unsigned long ring[MCE_RING_SIZE];
+};
+static DEFINE_PER_CPU(struct mce_ring, mce_ring);
+
+/* Runs with CPU affinity in workqueue */
+static int mce_ring_empty(void)
+{
+        struct mce_ring *r = &__get_cpu_var(mce_ring);
+
+        return r->start == r->end;
+}
+
+static int mce_ring_get(unsigned long *pfn)
+{
+        struct mce_ring *r;
+        int ret = 0;
+
+        *pfn = 0;
+        get_cpu();
+        r = &__get_cpu_var(mce_ring);
+        if (r->start == r->end)
+                goto out;
+        *pfn = r->ring[r->start];
+        r->start = (r->start + 1) % MCE_RING_SIZE;
+        ret = 1;
+out:
+        put_cpu();
+        return ret;
+}
+
+/* Always runs in MCE context with preempt off */
+static int mce_ring_add(unsigned long pfn)
+{
+        struct mce_ring *r = &__get_cpu_var(mce_ring);
+        unsigned next;
+
+        next = (r->end + 1) % MCE_RING_SIZE;
+        if (next == r->start)
+                return -1;
+        r->ring[r->end] = pfn;
+        wmb();
+        r->end = next;
+        return 0;
+}
+
+int mce_available(struct cpuinfo_x86 *c)
+{
+        if (mce_disabled)
+                return 0;
+        return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA);
+}
+
+static void mce_schedule_work(void)
+{
+        if (!mce_ring_empty()) {
+                struct work_struct *work = &__get_cpu_var(mce_work);
+                if (!work_pending(work))
+                        schedule_work(work);
+        }
+}
+
+/*
+ * Get the address of the instruction at the time of the machine check
+ * error.
+ */
+static inline void mce_get_rip(struct mce *m, struct pt_regs *regs)
+{
+
+        if (regs && (m->mcgstatus & (MCG_STATUS_RIPV|MCG_STATUS_EIPV))) {
+                m->ip = regs->ip;
+                m->cs = regs->cs;
+        } else {
+                m->ip = 0;
+                m->cs = 0;
+        }
+        if (rip_msr)
+                m->ip = mce_rdmsrl(rip_msr);
+}
+
+#ifdef CONFIG_X86_LOCAL_APIC 
+/*
+ * Called after interrupts have been reenabled again
+ * when a MCE happened during an interrupts off region
+ * in the kernel.
+ */
+asmlinkage void smp_mce_self_interrupt(struct pt_regs *regs)
+{
+        ack_APIC_irq();
+        exit_idle();
+        irq_enter();
+        mce_notify_irq();
+        mce_schedule_work();
+        irq_exit();
+}
+#endif
+
+static void mce_report_event(struct pt_regs *regs)
+{
+        if (regs->flags & (X86_VM_MASK|X86_EFLAGS_IF)) {
+                mce_notify_irq();
+                /*
+                 * Triggering the work queue here is just an insurance
+                 * policy in case the syscall exit notify handler
+                 * doesn't run soon enough or ends up running on the
+                 * wrong CPU (can happen when audit sleeps)
+                 */
+                mce_schedule_work();
+                return;
+        }
+
+#ifdef CONFIG_X86_LOCAL_APIC
+        /*
+         * Without APIC do not notify. The event will be picked
+         * up eventually.
+         */
+        if (!cpu_has_apic)
+                return;
+
+        /*
+         * When interrupts are disabled we cannot use
+         * kernel services safely. Trigger an self interrupt
+         * through the APIC to instead do the notification
+         * after interrupts are reenabled again.
+         */
+        apic->send_IPI_self(MCE_SELF_VECTOR);
+
+        /*
+         * Wait for idle afterwards again so that we don't leave the
+         * APIC in a non idle state because the normal APIC writes
+         * cannot exclude us.
+         */
+        apic_wait_icr_idle();
+#endif
+}
+
+DEFINE_PER_CPU(unsigned, mce_poll_count);
+
+/*
+ * Poll for corrected events or events that happened before reset.
+ * Those are just logged through /dev/mcelog.
+ *
+ * This is executed in standard interrupt context.
+ *
+ * Note: spec recommends to panic for fatal unsignalled
+ * errors here. However this would be quite problematic --
+ * we would need to reimplement the Monarch handling and
+ * it would mess up the exclusion between exception handler
+ * and poll hander -- * so we skip this for now.
+ * These cases should not happen anyways, or only when the CPU
+ * is already totally * confused. In this case it's likely it will
+ * not fully execute the machine check handler either.
+ */
+void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
+{
+        struct mce m;
+        int i;
+
+        __get_cpu_var(mce_poll_count)++;
+
+        mce_setup(&m);
+
+        m.mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
+        for (i = 0; i < banks; i++) {
+                if (!bank[i] || !test_bit(i, *b))
+                        continue;
+
+                m.misc = 0;
+                m.addr = 0;
+                m.bank = i;
+                m.tsc = 0;
+
+                barrier();
+                m.status = mce_rdmsrl(MSR_IA32_MC0_STATUS + i*4);
+                if (!(m.status & MCI_STATUS_VAL))
+                        continue;
+
+                /*
+                 * Uncorrected or signalled events are handled by the exception
+                 * handler when it is enabled, so don't process those here.
+                 *
+                 * TBD do the same check for MCI_STATUS_EN here?
+                 */
+                if (!(flags & MCP_UC) &&
+                    (m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC)))
+                        continue;
+
+                if (m.status & MCI_STATUS_MISCV)
+                        m.misc = mce_rdmsrl(MSR_IA32_MC0_MISC + i*4);
+                if (m.status & MCI_STATUS_ADDRV)
+                        m.addr = mce_rdmsrl(MSR_IA32_MC0_ADDR + i*4);
+
+                if (!(flags & MCP_TIMESTAMP))
+                        m.tsc = 0;
+                /*
+                 * Don't get the IP here because it's unlikely to
+                 * have anything to do with the actual error location.
+                 */
+                if (!(flags & MCP_DONTLOG) && !mce_dont_log_ce) {
+                        mce_log(&m);
+                        add_taint(TAINT_MACHINE_CHECK);
+                }
+
+                /*
+                 * Clear state for this bank.
+                 */
+                mce_wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+        }
+
+        /*
+         * Don't clear MCG_STATUS here because it's only defined for
+         * exceptions.
+         */
+
+        sync_core();
+}
+EXPORT_SYMBOL_GPL(machine_check_poll);
+
+/*
+ * Do a quick check if any of the events requires a panic.
+ * This decides if we keep the events around or clear them.
+ */
+static int mce_no_way_out(struct mce *m, char **msg)
+{
+        int i;
+
+        for (i = 0; i < banks; i++) {
+                m->status = mce_rdmsrl(MSR_IA32_MC0_STATUS + i*4);
+                if (mce_severity(m, tolerant, msg) >= MCE_PANIC_SEVERITY)
+                        return 1;
+        }
+        return 0;
+}
+
+/*
+ * Variable to establish order between CPUs while scanning.
+ * Each CPU spins initially until executing is equal its number.
+ */
+static atomic_t mce_executing;
+
+/*
+ * Defines order of CPUs on entry. First CPU becomes Monarch.
+ */
+static atomic_t mce_callin;
+
+/*
+ * Check if a timeout waiting for other CPUs happened.
+ */
+static int mce_timed_out(u64 *t)
+{
+        /*
+         * The others already did panic for some reason.
+         * Bail out like in a timeout.
+         * rmb() to tell the compiler that system_state
+         * might have been modified by someone else.
+         */
+        rmb();
+        if (atomic_read(&mce_paniced))
+                wait_for_panic();
+        if (!monarch_timeout)
+                goto out;
+        if ((s64)*t < SPINUNIT) {
+                /* CHECKME: Make panic default for 1 too? */
+                if (tolerant < 1)
+                        mce_panic("Timeout synchronizing machine check over CPUs",
+                                  NULL, NULL);
+                cpu_missing = 1;
+                return 1;
+        }
+        *t -= SPINUNIT;
+out:
+        touch_nmi_watchdog();
+        return 0;
+}
+
+/*
+ * The Monarch's reign.  The Monarch is the CPU who entered
+ * the machine check handler first. It waits for the others to
+ * raise the exception too and then grades them. When any
+ * error is fatal panic. Only then let the others continue.
+ *
+ * The other CPUs entering the MCE handler will be controlled by the
+ * Monarch. They are called Subjects.
+ *
+ * This way we prevent any potential data corruption in a unrecoverable case
+ * and also makes sure always all CPU's errors are examined.
+ *
+ * Also this detects the case of an machine check event coming from outer
+ * space (not detected by any CPUs) In this case some external agent wants
+ * us to shut down, so panic too.
+ *
+ * The other CPUs might still decide to panic if the handler happens
+ * in a unrecoverable place, but in this case the system is in a semi-stable
+ * state and won't corrupt anything by itself. It's ok to let the others
+ * continue for a bit first.
+ *
+ * All the spin loops have timeouts; when a timeout happens a CPU
+ * typically elects itself to be Monarch.
+ */
+static void mce_reign(void)
+{
+        int cpu;
+        struct mce *m = NULL;
+        int global_worst = 0;
+        char *msg = NULL;
+        char *nmsg = NULL;
+
+        /*
+         * This CPU is the Monarch and the other CPUs have run
+         * through their handlers.
+         * Grade the severity of the errors of all the CPUs.
+         */
+        for_each_possible_cpu(cpu) {
+                int severity = mce_severity(&per_cpu(mces_seen, cpu), tolerant,
+                                            &nmsg);
+                if (severity > global_worst) {
+                        msg = nmsg;
+                        global_worst = severity;
+                        m = &per_cpu(mces_seen, cpu);
+                }
+        }
+
+        /*
+         * Cannot recover? Panic here then.
+         * This dumps all the mces in the log buffer and stops the
+         * other CPUs.
+         */
+        if (m && global_worst >= MCE_PANIC_SEVERITY && tolerant < 3)
+                mce_panic("Fatal Machine check", m, msg);
+
+        /*
+         * For UC somewhere we let the CPU who detects it handle it.
+         * Also must let continue the others, otherwise the handling
+         * CPU could deadlock on a lock.
+         */
+
+        /*
+         * No machine check event found. Must be some external
+         * source or one CPU is hung. Panic.
+         */
+        if (!m && tolerant < 3)
+                mce_panic("Machine check from unknown source", NULL, NULL);
+
+        /*
+         * Now clear all the mces_seen so that they don't reappear on
+         * the next mce.
+         */
+        for_each_possible_cpu(cpu)
+                memset(&per_cpu(mces_seen, cpu), 0, sizeof(struct mce));
+}
+
+static atomic_t global_nwo;
+
+/*
+ * Start of Monarch synchronization. This waits until all CPUs have
+ * entered the exception handler and then determines if any of them
+ * saw a fatal event that requires panic. Then it executes them
+ * in the entry order.
+ * TBD double check parallel CPU hotunplug
+ */
+static int mce_start(int no_way_out, int *order)
+{
+        int nwo;
+        int cpus = num_online_cpus();
+        u64 timeout = (u64)monarch_timeout * NSEC_PER_USEC;
+
+        if (!timeout) {
+                *order = -1;
+                return no_way_out;
+        }
+
+        atomic_add(no_way_out, &global_nwo);
+
+        /*
+         * Wait for everyone.
+         */
+        while (atomic_read(&mce_callin) != cpus) {
+                if (mce_timed_out(&timeout)) {
+                        atomic_set(&global_nwo, 0);
+                        *order = -1;
+                        return no_way_out;
+                }
+                ndelay(SPINUNIT);
+        }
+
+        /*
+         * Cache the global no_way_out state.
+         */
+        nwo = atomic_read(&global_nwo);
+
+        /*
+         * Monarch starts executing now, the others wait.
+         */
+        if (*order == 1) {
+                atomic_set(&mce_executing, 1);
+                return nwo;
+        }
+
+        /*
+         * Now start the scanning loop one by one
+         * in the original callin order.
+         * This way when there are any shared banks it will
+         * be only seen by one CPU before cleared, avoiding duplicates.
+         */
+        while (atomic_read(&mce_executing) < *order) {
+                if (mce_timed_out(&timeout)) {
+                        atomic_set(&global_nwo, 0);
+                        *order = -1;
+                        return no_way_out;
+                }
+                ndelay(SPINUNIT);
+        }
+        return nwo;
+}
+
+/*
+ * Synchronize between CPUs after main scanning loop.
+ * This invokes the bulk of the Monarch processing.
+ */
+static int mce_end(int order)
+{
+        int ret = -1;
+        u64 timeout = (u64)monarch_timeout * NSEC_PER_USEC;
+
+        if (!timeout)
+                goto reset;
+        if (order < 0)
+                goto reset;
+
+        /*
+         * Allow others to run.
+         */
+        atomic_inc(&mce_executing);
+
+        if (order == 1) {
+                /* CHECKME: Can this race with a parallel hotplug? */
+                int cpus = num_online_cpus();
+
+                /*
+                 * Monarch: Wait for everyone to go through their scanning
+                 * loops.
+                 */
+                while (atomic_read(&mce_executing) <= cpus) {
+                        if (mce_timed_out(&timeout))
+                                goto reset;
+                        ndelay(SPINUNIT);
+                }
+
+                mce_reign();
+                barrier();
+                ret = 0;
+        } else {
+                /*
+                 * Subject: Wait for Monarch to finish.
+                 */
+                while (atomic_read(&mce_executing) != 0) {
+                        if (mce_timed_out(&timeout))
+                                goto reset;
+                        ndelay(SPINUNIT);
+                }
+
+                /*
+                 * Don't reset anything. That's done by the Monarch.
+                 */
+                return 0;
+        }
+
+        /*
+         * Reset all global state.
+         */
+reset:
+        atomic_set(&global_nwo, 0);
+        atomic_set(&mce_callin, 0);
+        barrier();
+
+        /*
+         * Let others run again.
+         */
+        atomic_set(&mce_executing, 0);
+        return ret;
+}
+
+/*
+ * Check if the address reported by the CPU is in a format we can parse.
+ * It would be possible to add code for most other cases, but all would
+ * be somewhat complicated (e.g. segment offset would require an instruction
+ * parser). So only support physical addresses upto page granuality for now.
+ */
+static int mce_usable_address(struct mce *m)
+{
+        if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
+                return 0;
+        if ((m->misc & 0x3f) > PAGE_SHIFT)
+                return 0;
+        if (((m->misc >> 6) & 7) != MCM_ADDR_PHYS)
+                return 0;
+        return 1;
+}
+
+static void mce_clear_state(unsigned long *toclear)
+{
+        int i;
+
+        for (i = 0; i < banks; i++) {
+                if (test_bit(i, toclear))
+                        mce_wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+        }
+}
+
+/*
+ * The actual machine check handler. This only handles real
+ * exceptions when something got corrupted coming in through int 18.
+ *
+ * This is executed in NMI context not subject to normal locking rules. This
+ * implies that most kernel services cannot be safely used. Don't even
+ * think about putting a printk in there!
+ *
+ * On Intel systems this is entered on all CPUs in parallel through
+ * MCE broadcast. However some CPUs might be broken beyond repair,
+ * so be always careful when synchronizing with others.
+ */
+void do_machine_check(struct pt_regs *regs, long error_code)
+{
+        struct mce m, *final;
+        int i;
+        int worst = 0;
+        int severity;
+        /*
+         * Establish sequential order between the CPUs entering the machine
+         * check handler.
+         */
+        int order;
+
+        /*
+         * If no_way_out gets set, there is no safe way to recover from this
+         * MCE.  If tolerant is cranked up, we'll try anyway.
+         */
+        int no_way_out = 0;
+        /*
+         * If kill_it gets set, there might be a way to recover from this
+         * error.
+         */
+        int kill_it = 0;
+        DECLARE_BITMAP(toclear, MAX_NR_BANKS);
+        char *msg = "Unknown";
+
+        atomic_inc(&mce_entry);
+
+        __get_cpu_var(mce_exception_count)++;
+
+        if (notify_die(DIE_NMI, "machine check", regs, error_code,
+                           18, SIGKILL) == NOTIFY_STOP)
+                goto out;
+        if (!banks)
+                goto out;
+
+        order = atomic_add_return(1, &mce_callin);
+        mce_setup(&m);
+
+        m.mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
+        no_way_out = mce_no_way_out(&m, &msg);
+
+        final = &__get_cpu_var(mces_seen);
+        *final = m;
+
+        barrier();
+
+        /*
+         * When no restart IP must always kill or panic.
+         */
+        if (!(m.mcgstatus & MCG_STATUS_RIPV))
+                kill_it = 1;
+
+        /*
+         * Go through all the banks in exclusion of the other CPUs.
+         * This way we don't report duplicated events on shared banks
+         * because the first one to see it will clear it.
+         */
+        no_way_out = mce_start(no_way_out, &order);
+        for (i = 0; i < banks; i++) {
+                __clear_bit(i, toclear);
+                if (!bank[i])
+                        continue;
+
+                m.misc = 0;
+                m.addr = 0;
+                m.bank = i;
+
+                m.status = mce_rdmsrl(MSR_IA32_MC0_STATUS + i*4);
+                if ((m.status & MCI_STATUS_VAL) == 0)
+                        continue;
+
+                /*
+                 * Non uncorrected or non signaled errors are handled by
+                 * machine_check_poll. Leave them alone, unless this panics.
+                 */
+                if (!(m.status & (mce_ser ? MCI_STATUS_S : MCI_STATUS_UC)) &&
+                        !no_way_out)
+                        continue;
+
+                /*
+                 * Set taint even when machine check was not enabled.
+                 */
+                add_taint(TAINT_MACHINE_CHECK);
+
+                severity = mce_severity(&m, tolerant, NULL);
+
+                /*
+                 * When machine check was for corrected handler don't touch,
+                 * unless we're panicing.
+                 */
+                if (severity == MCE_KEEP_SEVERITY && !no_way_out)
+                        continue;
+                __set_bit(i, toclear);
+                if (severity == MCE_NO_SEVERITY) {
+                        /*
+                         * Machine check event was not enabled. Clear, but
+                         * ignore.
+                         */
+                        continue;
+                }
+
+                /*
+                 * Kill on action required.
+                 */
+                if (severity == MCE_AR_SEVERITY)
+                        kill_it = 1;
+
+                if (m.status & MCI_STATUS_MISCV)
+                        m.misc = mce_rdmsrl(MSR_IA32_MC0_MISC + i*4);
+                if (m.status & MCI_STATUS_ADDRV)
+                        m.addr = mce_rdmsrl(MSR_IA32_MC0_ADDR + i*4);
+
+                /*
+                 * Action optional error. Queue address for later processing.
+                 * When the ring overflows we just ignore the AO error.
+                 * RED-PEN add some logging mechanism when
+                 * usable_address or mce_add_ring fails.
+                 * RED-PEN don't ignore overflow for tolerant == 0
+                 */
+                if (severity == MCE_AO_SEVERITY && mce_usable_address(&m))
+                        mce_ring_add(m.addr >> PAGE_SHIFT);
+
+                mce_get_rip(&m, regs);
+                mce_log(&m);
+
+                if (severity > worst) {
+                        *final = m;
+                        worst = severity;
+                }
+        }
+
+        if (!no_way_out)
+                mce_clear_state(toclear);
+
+        /*
+         * Do most of the synchronization with other CPUs.
+         * When there's any problem use only local no_way_out state.
+         */
+        if (mce_end(order) < 0)
+                no_way_out = worst >= MCE_PANIC_SEVERITY;
+
+        /*
+         * If we have decided that we just CAN'T continue, and the user
+         * has not set tolerant to an insane level, give up and die.
+         *
+         * This is mainly used in the case when the system doesn't
+         * support MCE broadcasting or it has been disabled.
+         */
+        if (no_way_out && tolerant < 3)
+                mce_panic("Fatal machine check on current CPU", final, msg);
+
+        /*
+         * If the error seems to be unrecoverable, something should be
+         * done.  Try to kill as little as possible.  If we can kill just
+         * one task, do that.  If the user has set the tolerance very
+         * high, don't try to do anything at all.
+         */
+
+        if (kill_it && tolerant < 3)
+                force_sig(SIGBUS, current);
+
+        /* notify userspace ASAP */
+        set_thread_flag(TIF_MCE_NOTIFY);
+
+        if (worst > 0)
+                mce_report_event(regs);
+        mce_wrmsrl(MSR_IA32_MCG_STATUS, 0);
+out:
+        atomic_dec(&mce_entry);
+        sync_core();
+}
+EXPORT_SYMBOL_GPL(do_machine_check);
+
+/* dummy to break dependency. actual code is in mm/memory-failure.c */
+void __attribute__((weak)) memory_failure(unsigned long pfn, int vector)
+{
+        printk(KERN_ERR "Action optional memory failure at %lx ignored\n", pfn);
+}
+
+/*
+ * Called after mce notification in process context. This code
+ * is allowed to sleep. Call the high level VM handler to process
+ * any corrupted pages.
+ * Assume that the work queue code only calls this one at a time
+ * per CPU.
+ * Note we don't disable preemption, so this code might run on the wrong
+ * CPU. In this case the event is picked up by the scheduled work queue.
+ * This is merely a fast path to expedite processing in some common
+ * cases.
+ */
+void mce_notify_process(void)
+{
+        unsigned long pfn;
+        mce_notify_irq();
+        while (mce_ring_get(&pfn))
+                memory_failure(pfn, MCE_VECTOR);
+}
+
+static void mce_process_work(struct work_struct *dummy)
+{
+        mce_notify_process();
+}
+
+#ifdef CONFIG_X86_MCE_INTEL
+/***
+ * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog
+ * @cpu: The CPU on which the event occurred.
+ * @status: Event status information
+ *
+ * This function should be called by the thermal interrupt after the
+ * event has been processed and the decision was made to log the event
+ * further.
+ *
+ * The status parameter will be saved to the 'status' field of 'struct mce'
+ * and historically has been the register value of the
+ * MSR_IA32_THERMAL_STATUS (Intel) msr.
+ */
+void mce_log_therm_throt_event(__u64 status)
+{
+        struct mce m;
+
+        mce_setup(&m);
+        m.bank = MCE_THERMAL_BANK;
+        m.status = status;
+        mce_log(&m);
+}
+#endif /* CONFIG_X86_MCE_INTEL */
+
+/*
+ * Periodic polling timer for "silent" machine check errors.  If the
+ * poller finds an MCE, poll 2x faster.  When the poller finds no more
+ * errors, poll 2x slower (up to check_interval seconds).
+ */
+static int check_interval = 5 * 60; /* 5 minutes */
+
+static DEFINE_PER_CPU(int, next_interval); /* in jiffies */
+static DEFINE_PER_CPU(struct timer_list, mce_timer);
+
+static void mcheck_timer(unsigned long data)
+{
+        struct timer_list *t = &per_cpu(mce_timer, data);
+        int *n;
+
+        WARN_ON(smp_processor_id() != data);
+
+        if (mce_available(&current_cpu_data)) {
+                machine_check_poll(MCP_TIMESTAMP,
+                                &__get_cpu_var(mce_poll_banks));
+        }
+
+        /*
+         * Alert userspace if needed.  If we logged an MCE, reduce the
+         * polling interval, otherwise increase the polling interval.
+         */
+        n = &__get_cpu_var(next_interval);
+        if (mce_notify_irq())
+                *n = max(*n/2, HZ/100);
+        else
+                *n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ));
+
+        t->expires = jiffies + *n;
+        add_timer(t);
+}
+
+static void mce_do_trigger(struct work_struct *work)
+{
+        call_usermodehelper(trigger, trigger_argv, NULL, UMH_NO_WAIT);
+}
+
+static DECLARE_WORK(mce_trigger_work, mce_do_trigger);
+
+/*
+ * Notify the user(s) about new machine check events.
+ * Can be called from interrupt context, but not from machine check/NMI
+ * context.
+ */
+int mce_notify_irq(void)
+{
+        /* Not more than two messages every minute */
+        static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2);
+
+        clear_thread_flag(TIF_MCE_NOTIFY);
+
+        if (test_and_clear_bit(0, &notify_user)) {
+                wake_up_interruptible(&mce_wait);
+
+                /*
+                 * There is no risk of missing notifications because
+                 * work_pending is always cleared before the function is
+                 * executed.
+                 */
+                if (trigger[0] && !work_pending(&mce_trigger_work))
+                        schedule_work(&mce_trigger_work);
+
+                if (__ratelimit(&ratelimit))
+                        printk(KERN_INFO "Machine check events logged\n");
+
+                return 1;
+        }
+        return 0;
+}
+EXPORT_SYMBOL_GPL(mce_notify_irq);
+
+/*
+ * Initialize Machine Checks for a CPU.
+ */
+static int mce_cap_init(void)
+{
+        unsigned b;
+        u64 cap;
+
+        rdmsrl(MSR_IA32_MCG_CAP, cap);
+
+        b = cap & MCG_BANKCNT_MASK;
+        printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b);
+
+        if (b > MAX_NR_BANKS) {
+                printk(KERN_WARNING
+                       "MCE: Using only %u machine check banks out of %u\n",
+                        MAX_NR_BANKS, b);
+                b = MAX_NR_BANKS;
+        }
+
+        /* Don't support asymmetric configurations today */
+        WARN_ON(banks != 0 && b != banks);
+        banks = b;
+        if (!bank) {
+                bank = kmalloc(banks * sizeof(u64), GFP_KERNEL);
+                if (!bank)
+                        return -ENOMEM;
+                memset(bank, 0xff, banks * sizeof(u64));
+        }
+
+        /* Use accurate RIP reporting if available. */
+        if ((cap & MCG_EXT_P) && MCG_EXT_CNT(cap) >= 9)
+                rip_msr = MSR_IA32_MCG_EIP;
+
+        if (cap & MCG_SER_P)
+                mce_ser = 1;
+
+        return 0;
+}
+
+static void mce_init(void)
+{
+        mce_banks_t all_banks;
+        u64 cap;
+        int i;
+
+        /*
+         * Log the machine checks left over from the previous reset.
+         */
+        bitmap_fill(all_banks, MAX_NR_BANKS);
+        machine_check_poll(MCP_UC|(!mce_bootlog ? MCP_DONTLOG : 0), &all_banks);
+
+        set_in_cr4(X86_CR4_MCE);
+
+        rdmsrl(MSR_IA32_MCG_CAP, cap);
+        if (cap & MCG_CTL_P)
+                wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
+
+        for (i = 0; i < banks; i++) {
+                if (skip_bank_init(i))
+                        continue;
+                wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
+                wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
+        }
+}
+
+/* Add per CPU specific workarounds here */
+static void mce_cpu_quirks(struct cpuinfo_x86 *c)
+{
+        /* This should be disabled by the BIOS, but isn't always */
+        if (c->x86_vendor == X86_VENDOR_AMD) {
+                if (c->x86 == 15 && banks > 4) {
+                        /*
+                         * disable GART TBL walk error reporting, which
+                         * trips off incorrectly with the IOMMU & 3ware
+                         * & Cerberus:
+                         */
+                        clear_bit(10, (unsigned long *)&bank[4]);
+                }
+                if (c->x86 <= 17 && mce_bootlog < 0) {
+                        /*
+                         * Lots of broken BIOS around that don't clear them
+                         * by default and leave crap in there. Don't log:
+                         */
+                        mce_bootlog = 0;
+                }
+                /*
+                 * Various K7s with broken bank 0 around. Always disable
+                 * by default.
+                 */
+                 if (c->x86 == 6)
+                        bank[0] = 0;
+        }
+
+        if (c->x86_vendor == X86_VENDOR_INTEL) {
+                /*
+                 * SDM documents that on family 6 bank 0 should not be written
+                 * because it aliases to another special BIOS controlled
+                 * register.
+                 * But it's not aliased anymore on model 0x1a+
+                 * Don't ignore bank 0 completely because there could be a
+                 * valid event later, merely don't write CTL0.
+                 */
+
+                if (c->x86 == 6 && c->x86_model < 0x1A)
+                        __set_bit(0, &dont_init_banks);
+
+                /*
+                 * All newer Intel systems support MCE broadcasting. Enable
+                 * synchronization with a one second timeout.
+                 */
+                if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xe)) &&
+                        monarch_timeout < 0)
+                        monarch_timeout = USEC_PER_SEC;
+        }
+        if (monarch_timeout < 0)
+                monarch_timeout = 0;
+        if (mce_bootlog != 0)
+                mce_panic_timeout = 30;
+}
+
+static void __cpuinit mce_ancient_init(struct cpuinfo_x86 *c)
+{
+        if (c->x86 != 5)
+                return;
+        switch (c->x86_vendor) {
+        case X86_VENDOR_INTEL:
+                if (mce_p5_enabled())
+                        intel_p5_mcheck_init(c);
+                break;
+        case X86_VENDOR_CENTAUR:
+                winchip_mcheck_init(c);
+                break;
+        }
+}
+
+static void mce_cpu_features(struct cpuinfo_x86 *c)
+{
+        switch (c->x86_vendor) {
+        case X86_VENDOR_INTEL:
+                mce_intel_feature_init(c);
+                break;
+        case X86_VENDOR_AMD:
+                mce_amd_feature_init(c);
+                break;
+        default:
+                break;
+        }
+}
+
+static void mce_init_timer(void)
+{
+        struct timer_list *t = &__get_cpu_var(mce_timer);
+        int *n = &__get_cpu_var(next_interval);
+
+        if (mce_ignore_ce)
+                return;
+
+        *n = check_interval * HZ;
+        if (!*n)
+                return;
+        setup_timer(t, mcheck_timer, smp_processor_id());
+        t->expires = round_jiffies(jiffies + *n);
+        add_timer(t);
+}
+
+/*
+ * Called for each booted CPU to set up machine checks.
+ * Must be called with preempt off:
+ */
+void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
+{
+        if (mce_disabled)
+                return;
+
+        mce_ancient_init(c);
+
+        if (!mce_available(c))
+                return;
+
+        if (mce_cap_init() < 0) {
+                mce_disabled = 1;
+                return;
+        }
+        mce_cpu_quirks(c);
+
+        machine_check_vector = do_machine_check;
+
+        mce_init();
+        mce_cpu_features(c);
+        mce_init_timer();
+        INIT_WORK(&__get_cpu_var(mce_work), mce_process_work);
+}
+
+/*
+ * Character device to read and clear the MCE log.
+ */
+
+static DEFINE_SPINLOCK(mce_state_lock);
+static int              open_count;             /* #times opened */
+static int              open_exclu;             /* already open exclusive? */
+
+static int mce_open(struct inode *inode, struct file *file)
+{
+        spin_lock(&mce_state_lock);
+
+        if (open_exclu || (open_count && (file->f_flags & O_EXCL))) {
+                spin_unlock(&mce_state_lock);
+
+                return -EBUSY;
+        }
+
+        if (file->f_flags & O_EXCL)
+                open_exclu = 1;
+        open_count++;
+
+        spin_unlock(&mce_state_lock);
+
+        return nonseekable_open(inode, file);
+}
+
+static int mce_release(struct inode *inode, struct file *file)
+{
+        spin_lock(&mce_state_lock);
+
+        open_count--;
+        open_exclu = 0;
+
+        spin_unlock(&mce_state_lock);
+
+        return 0;
+}
+
+static void collect_tscs(void *data)
+{
+        unsigned long *cpu_tsc = (unsigned long *)data;
+
+        rdtscll(cpu_tsc[smp_processor_id()]);
+}
+
+static DEFINE_MUTEX(mce_read_mutex);
+
+static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
+                        loff_t *off)
+{
+        char __user *buf = ubuf;
+        unsigned long *cpu_tsc;
+        unsigned prev, next;
+        int i, err;
+
+        cpu_tsc = kmalloc(nr_cpu_ids * sizeof(long), GFP_KERNEL);
+        if (!cpu_tsc)
+                return -ENOMEM;
+
+        mutex_lock(&mce_read_mutex);
+        next = rcu_dereference(mcelog.next);
+
+        /* Only supports full reads right now */
+        if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
+                mutex_unlock(&mce_read_mutex);
+                kfree(cpu_tsc);
+
+                return -EINVAL;
+        }
+
+        err = 0;
+        prev = 0;
+        do {
+                for (i = prev; i < next; i++) {
+                        unsigned long start = jiffies;
+
+                        while (!mcelog.entry[i].finished) {
+                                if (time_after_eq(jiffies, start + 2)) {
+                                        memset(mcelog.entry + i, 0,
+                                               sizeof(struct mce));
+                                        goto timeout;
+                                }
+                                cpu_relax();
+                        }
+                        smp_rmb();
+                        err |= copy_to_user(buf, mcelog.entry + i,
+                                            sizeof(struct mce));
+                        buf += sizeof(struct mce);
+timeout:
+                        ;
+                }
+
+                memset(mcelog.entry + prev, 0,
+                       (next - prev) * sizeof(struct mce));
+                prev = next;
+                next = cmpxchg(&mcelog.next, prev, 0);
+        } while (next != prev);
+
+        synchronize_sched();
+
+        /*
+         * Collect entries that were still getting written before the
+         * synchronize.
+         */
+        on_each_cpu(collect_tscs, cpu_tsc, 1);
+
+        for (i = next; i < MCE_LOG_LEN; i++) {
+                if (mcelog.entry[i].finished &&
+                    mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) {
+                        err |= copy_to_user(buf, mcelog.entry+i,
+                                            sizeof(struct mce));
+                        smp_rmb();
+                        buf += sizeof(struct mce);
+                        memset(&mcelog.entry[i], 0, sizeof(struct mce));
+                }
+        }
+        mutex_unlock(&mce_read_mutex);
+        kfree(cpu_tsc);
+
+        return err ? -EFAULT : buf - ubuf;
+}
+
+static unsigned int mce_poll(struct file *file, poll_table *wait)
+{
+        poll_wait(file, &mce_wait, wait);
+        if (rcu_dereference(mcelog.next))
+                return POLLIN | POLLRDNORM;
+        return 0;
+}
+
+static long mce_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
+{
+        int __user *p = (int __user *)arg;
+
+        if (!capable(CAP_SYS_ADMIN))
+                return -EPERM;
+
+        switch (cmd) {
+        case MCE_GET_RECORD_LEN:
+                return put_user(sizeof(struct mce), p);
+        case MCE_GET_LOG_LEN:
+                return put_user(MCE_LOG_LEN, p);
+        case MCE_GETCLEAR_FLAGS: {
+                unsigned flags;
+
+                do {
+                        flags = mcelog.flags;
+                } while (cmpxchg(&mcelog.flags, flags, 0) != flags);
+
+                return put_user(flags, p);
+        }
+        default:
+                return -ENOTTY;
+        }
+}
+
+/* Modified in mce-inject.c, so not static or const */
+struct file_operations mce_chrdev_ops = {
+        .open                   = mce_open,
+        .release                = mce_release,
+        .read                   = mce_read,
+        .poll                   = mce_poll,
+        .unlocked_ioctl         = mce_ioctl,
+};
+EXPORT_SYMBOL_GPL(mce_chrdev_ops);
+
+static struct miscdevice mce_log_device = {
+        MISC_MCELOG_MINOR,
+        "mcelog",
+        &mce_chrdev_ops,
+};
+
+/*
+ * mce=off Disables machine check
+ * mce=no_cmci Disables CMCI
+ * mce=dont_log_ce Clears corrected events silently, no log created for CEs.
+ * mce=ignore_ce Disables polling and CMCI, corrected events are not cleared.
+ * mce=TOLERANCELEVEL[,monarchtimeout] (number, see above)
+ *      monarchtimeout is how long to wait for other CPUs on machine
+ *      check, or 0 to not wait
+ * mce=bootlog Log MCEs from before booting. Disabled by default on AMD.
+ * mce=nobootlog Don't log MCEs from before booting.
+ */
+static int __init mcheck_enable(char *str)
+{
+        if (*str == 0)
+                enable_p5_mce();
+        if (*str == '=')
+                str++;
+        if (!strcmp(str, "off"))
+                mce_disabled = 1;
+        else if (!strcmp(str, "no_cmci"))
+                mce_cmci_disabled = 1;
+        else if (!strcmp(str, "dont_log_ce"))
+                mce_dont_log_ce = 1;
+        else if (!strcmp(str, "ignore_ce"))
+                mce_ignore_ce = 1;
+        else if (!strcmp(str, "bootlog") || !strcmp(str, "nobootlog"))
+                mce_bootlog = (str[0] == 'b');
+        else if (isdigit(str[0])) {
+                get_option(&str, &tolerant);
+                if (*str == ',') {
+                        ++str;
+                        get_option(&str, &monarch_timeout);
+                }
+        } else {
+                printk(KERN_INFO "mce argument %s ignored. Please use /sys\n",
+                       str);
+                return 0;
+        }
+        return 1;
+}
+__setup("mce", mcheck_enable);
+
+/*
+ * Sysfs support
+ */
+
+/*
+ * Disable machine checks on suspend and shutdown. We can't really handle
+ * them later.
+ */
+static int mce_disable(void)
+{
+        int i;
+
+        for (i = 0; i < banks; i++) {
+                if (!skip_bank_init(i))
+                        wrmsrl(MSR_IA32_MC0_CTL + i*4, 0);
+        }
+        return 0;
+}
+
+static int mce_suspend(struct sys_device *dev, pm_message_t state)
+{
+        return mce_disable();
+}
+
+static int mce_shutdown(struct sys_device *dev)
+{
+        return mce_disable();
+}
+
+/*
+ * On resume clear all MCE state. Don't want to see leftovers from the BIOS.
+ * Only one CPU is active at this time, the others get re-added later using
+ * CPU hotplug:
+ */
+static int mce_resume(struct sys_device *dev)
+{
+        mce_init();
+        mce_cpu_features(&current_cpu_data);
+
+        return 0;
+}
+
+static void mce_cpu_restart(void *data)
+{
+        del_timer_sync(&__get_cpu_var(mce_timer));
+        if (mce_available(&current_cpu_data))
+                mce_init();
+        mce_init_timer();
+}
+
+/* Reinit MCEs after user configuration changes */
+static void mce_restart(void)
+{
+        on_each_cpu(mce_cpu_restart, NULL, 1);
+}
+
+static struct sysdev_class mce_sysclass = {
+        .suspend        = mce_suspend,
+        .shutdown       = mce_shutdown,
+        .resume         = mce_resume,
+        .name           = "machinecheck",
+};
+
+DEFINE_PER_CPU(struct sys_device, mce_dev);
+
+__cpuinitdata
+void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
+
+static struct sysdev_attribute *bank_attrs;
+
+static ssize_t show_bank(struct sys_device *s, struct sysdev_attribute *attr,
+                         char *buf)
+{
+        u64 b = bank[attr - bank_attrs];
+
+        return sprintf(buf, "%llx\n", b);
+}
+
+static ssize_t set_bank(struct sys_device *s, struct sysdev_attribute *attr,
+                        const char *buf, size_t size)
+{
+        u64 new;
+
+        if (strict_strtoull(buf, 0, &new) < 0)
+                return -EINVAL;
+
+        bank[attr - bank_attrs] = new;
+        mce_restart();
+
+        return size;
+}
+
+static ssize_t
+show_trigger(struct sys_device *s, struct sysdev_attribute *attr, char *buf)
+{
+        strcpy(buf, trigger);
+        strcat(buf, "\n");
+        return strlen(trigger) + 1;
+}
+
+static ssize_t set_trigger(struct sys_device *s, struct sysdev_attribute *attr,
+                                const char *buf, size_t siz)
+{
+        char *p;
+        int len;
+
+        strncpy(trigger, buf, sizeof(trigger));
+        trigger[sizeof(trigger)-1] = 0;
+        len = strlen(trigger);
+        p = strchr(trigger, '\n');
+
+        if (*p)
+                *p = 0;
+
+        return len;
+}
+
+static ssize_t store_int_with_restart(struct sys_device *s,
+                                      struct sysdev_attribute *attr,
+                                      const char *buf, size_t size)
+{
+        ssize_t ret = sysdev_store_int(s, attr, buf, size);
+        mce_restart();
+        return ret;
+}
+
+static SYSDEV_ATTR(trigger, 0644, show_trigger, set_trigger);
+static SYSDEV_INT_ATTR(tolerant, 0644, tolerant);
+static SYSDEV_INT_ATTR(monarch_timeout, 0644, monarch_timeout);
+
+static struct sysdev_ext_attribute attr_check_interval = {
+        _SYSDEV_ATTR(check_interval, 0644, sysdev_show_int,
+                     store_int_with_restart),
+        &check_interval
+};
+
+static struct sysdev_attribute *mce_attrs[] = {
+        &attr_tolerant.attr, &attr_check_interval.attr, &attr_trigger,
+        &attr_monarch_timeout.attr,
+        NULL
+};
+
+static cpumask_var_t mce_dev_initialized;
+
+/* Per cpu sysdev init. All of the cpus still share the same ctrl bank: */
+static __cpuinit int mce_create_device(unsigned int cpu)
+{
+        int err;
+        int i;
+
+        if (!mce_available(&boot_cpu_data))
+                return -EIO;
+
+        memset(&per_cpu(mce_dev, cpu).kobj, 0, sizeof(struct kobject));
+        per_cpu(mce_dev, cpu).id        = cpu;
+        per_cpu(mce_dev, cpu).cls       = &mce_sysclass;
+
+        err = sysdev_register(&per_cpu(mce_dev, cpu));
+        if (err)
+                return err;
+
+        for (i = 0; mce_attrs[i]; i++) {
+                err = sysdev_create_file(&per_cpu(mce_dev, cpu), mce_attrs[i]);
+                if (err)
+                        goto error;
+        }
+        for (i = 0; i < banks; i++) {
+                err = sysdev_create_file(&per_cpu(mce_dev, cpu),
+                                        &bank_attrs[i]);
+                if (err)
+                        goto error2;
+        }
+        cpumask_set_cpu(cpu, mce_dev_initialized);
+
+        return 0;
+error2:
+        while (--i >= 0)
+                sysdev_remove_file(&per_cpu(mce_dev, cpu), &bank_attrs[i]);
+error:
+        while (--i >= 0)
+                sysdev_remove_file(&per_cpu(mce_dev, cpu), mce_attrs[i]);
+
+        sysdev_unregister(&per_cpu(mce_dev, cpu));
+
+        return err;
+}
+
+static __cpuinit void mce_remove_device(unsigned int cpu)
+{
+        int i;
+
+        if (!cpumask_test_cpu(cpu, mce_dev_initialized))
+                return;
+
+        for (i = 0; mce_attrs[i]; i++)
+                sysdev_remove_file(&per_cpu(mce_dev, cpu), mce_attrs[i]);
+
+        for (i = 0; i < banks; i++)
+                sysdev_remove_file(&per_cpu(mce_dev, cpu), &bank_attrs[i]);
+
+        sysdev_unregister(&per_cpu(mce_dev, cpu));
+        cpumask_clear_cpu(cpu, mce_dev_initialized);
+}
+
+/* Make sure there are no machine checks on offlined CPUs. */
+static void mce_disable_cpu(void *h)
+{
+        unsigned long action = *(unsigned long *)h;
+        int i;
+
+        if (!mce_available(&current_cpu_data))
+                return;
+        if (!(action & CPU_TASKS_FROZEN))
+                cmci_clear();
+        for (i = 0; i < banks; i++) {
+                if (!skip_bank_init(i))
+                        wrmsrl(MSR_IA32_MC0_CTL + i*4, 0);
+        }
+}
+
+static void mce_reenable_cpu(void *h)
+{
+        unsigned long action = *(unsigned long *)h;
+        int i;
+
+        if (!mce_available(&current_cpu_data))
+                return;
+
+        if (!(action & CPU_TASKS_FROZEN))
+                cmci_reenable();
+        for (i = 0; i < banks; i++) {
+                if (!skip_bank_init(i))
+                        wrmsrl(MSR_IA32_MC0_CTL + i*4, bank[i]);
+        }
+}
+
+/* Get notified when a cpu comes on/off. Be hotplug friendly. */
+static int __cpuinit
+mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
+{
+        unsigned int cpu = (unsigned long)hcpu;
+        struct timer_list *t = &per_cpu(mce_timer, cpu);
+
+        switch (action) {
+        case CPU_ONLINE:
+        case CPU_ONLINE_FROZEN:
+                mce_create_device(cpu);
+                if (threshold_cpu_callback)
+                        threshold_cpu_callback(action, cpu);
+                break;
+        case CPU_DEAD:
+        case CPU_DEAD_FROZEN:
+                if (threshold_cpu_callback)
+                        threshold_cpu_callback(action, cpu);
+                mce_remove_device(cpu);
+                break;
+        case CPU_DOWN_PREPARE:
+        case CPU_DOWN_PREPARE_FROZEN:
+                del_timer_sync(t);
+                smp_call_function_single(cpu, mce_disable_cpu, &action, 1);
+                break;
+        case CPU_DOWN_FAILED:
+        case CPU_DOWN_FAILED_FROZEN:
+                t->expires = round_jiffies(jiffies +
+                                                __get_cpu_var(next_interval));
+                add_timer_on(t, cpu);
+                smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
+                break;
+        case CPU_POST_DEAD:
+                /* intentionally ignoring frozen here */
+                cmci_rediscover(cpu);
+                break;
+        }
+        return NOTIFY_OK;
+}
+
+static struct notifier_block mce_cpu_notifier __cpuinitdata = {
+        .notifier_call = mce_cpu_callback,
+};
+
+static __init int mce_init_banks(void)
+{
+        int i;
+
+        bank_attrs = kzalloc(sizeof(struct sysdev_attribute) * banks,
+                                GFP_KERNEL);
+        if (!bank_attrs)
+                return -ENOMEM;
+
+        for (i = 0; i < banks; i++) {
+                struct sysdev_attribute *a = &bank_attrs[i];
+
+                a->attr.name    = kasprintf(GFP_KERNEL, "bank%d", i);
+                if (!a->attr.name)
+                        goto nomem;
+
+                a->attr.mode    = 0644;
+                a->show         = show_bank;
+                a->store        = set_bank;
+        }
+        return 0;
+
+nomem:
+        while (--i >= 0)
+                kfree(bank_attrs[i].attr.name);
+        kfree(bank_attrs);
+        bank_attrs = NULL;
+
+        return -ENOMEM;
+}
+
+static __init int mce_init_device(void)
+{
+        int err;
+        int i = 0;
+
+        if (!mce_available(&boot_cpu_data))
+                return -EIO;
+
+        alloc_cpumask_var(&mce_dev_initialized, GFP_KERNEL);
+
+        err = mce_init_banks();
+        if (err)
+                return err;
+
+        err = sysdev_class_register(&mce_sysclass);
+        if (err)
+                return err;
+
+        for_each_online_cpu(i) {
+                err = mce_create_device(i);
+                if (err)
+                        return err;
+        }
+
+        register_hotcpu_notifier(&mce_cpu_notifier);
+        misc_register(&mce_log_device);
+
+        return err;
+}
+
+device_initcall(mce_init_device);
+
+#else /* CONFIG_X86_OLD_MCE: */
+
+int nr_mce_banks;
+EXPORT_SYMBOL_GPL(nr_mce_banks);        /* non-fatal.o */
+
+/* This has to be run for each processor */
+void mcheck_init(struct cpuinfo_x86 *c)
+{
+        if (mce_disabled == 1)
+                return;
+
+        switch (c->x86_vendor) {
+        case X86_VENDOR_AMD:
+                amd_mcheck_init(c);
+                break;
+
+        case X86_VENDOR_INTEL:
+                if (c->x86 == 5)
+                        intel_p5_mcheck_init(c);
+                if (c->x86 == 6)
+                        intel_p6_mcheck_init(c);
+                if (c->x86 == 15)
+                        intel_p4_mcheck_init(c);
+                break;
+
+        case X86_VENDOR_CENTAUR:
+                if (c->x86 == 5)
+                        winchip_mcheck_init(c);
+                break;
+
+        default:
+                break;
+        }
+        printk(KERN_INFO "mce: CPU supports %d MCE banks\n", nr_mce_banks);
+}
+
+static int __init mcheck_enable(char *str)
+{
+        mce_disabled = -1;
+        return 1;
+}
+
+__setup("mce", mcheck_enable);
+
+#endif /* CONFIG_X86_OLD_MCE */
+
+/*
+ * Old style boot options parsing. Only for compatibility.
+ */
+static int __init mcheck_disable(char *str)
+{
+        mce_disabled = 1;
+        return 1;
+}
+__setup("nomce", mcheck_disable);
diff --git a/arch/x86/kernel/cpu/mcheck/mce.h b/arch/x86/kernel/cpu/mcheck/mce.h
index ae9f628838f1..84a552b458c8 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.h
+++ b/arch/x86/kernel/cpu/mcheck/mce.h
@@ -1,14 +1,38 @@
 #include <linux/init.h>
 #include <asm/mce.h>
 
+#ifdef CONFIG_X86_OLD_MCE
 void amd_mcheck_init(struct cpuinfo_x86 *c);
 void intel_p4_mcheck_init(struct cpuinfo_x86 *c);
-void intel_p5_mcheck_init(struct cpuinfo_x86 *c);
 void intel_p6_mcheck_init(struct cpuinfo_x86 *c);
+#endif
+
+#ifdef CONFIG_X86_ANCIENT_MCE
+void intel_p5_mcheck_init(struct cpuinfo_x86 *c);
 void winchip_mcheck_init(struct cpuinfo_x86 *c);
+extern int mce_p5_enable;
+static inline int mce_p5_enabled(void) { return mce_p5_enable; }
+static inline void enable_p5_mce(void) { mce_p5_enable = 1; }
+#else
+static inline void intel_p5_mcheck_init(struct cpuinfo_x86 *c) {}
+static inline void winchip_mcheck_init(struct cpuinfo_x86 *c) {}
+static inline int mce_p5_enabled(void) { return 0; }
+static inline void enable_p5_mce(void) { }
+#endif
 
 /* Call the installed machine check handler for this CPU setup. */
 extern void (*machine_check_vector)(struct pt_regs *, long error_code);
 
+#ifdef CONFIG_X86_OLD_MCE
+
 extern int nr_mce_banks;
 
+void intel_set_thermal_handler(void);
+
+#else
+
+static inline void intel_set_thermal_handler(void) { }
+
+#endif
+
+void intel_init_thermal(struct cpuinfo_x86 *c);
diff --git a/arch/x86/kernel/cpu/mcheck/mce_32.c b/arch/x86/kernel/cpu/mcheck/mce_32.c
deleted file mode 100644
index 3552119b091d..000000000000
--- a/arch/x86/kernel/cpu/mcheck/mce_32.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * mce.c - x86 Machine Check Exception Reporting
- * (c) 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>, Dave Jones <davej@redhat.com>
- */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/smp.h>
-#include <linux/thread_info.h>
-
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/mce.h>
-
-#include "mce.h"
-
-int mce_disabled;
-int nr_mce_banks;
-
-EXPORT_SYMBOL_GPL(nr_mce_banks);        /* non-fatal.o */
-
-/* Handle unconfigured int18 (should never happen) */
-static void unexpected_machine_check(struct pt_regs *regs, long error_code)
-{
-        printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n", smp_processor_id());
-}
-
-/* Call the installed machine check handler for this CPU setup. */
-void (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
-
-/* This has to be run for each processor */
-void mcheck_init(struct cpuinfo_x86 *c)
-{
-        if (mce_disabled == 1)
-                return;
-
-        switch (c->x86_vendor) {
-        case X86_VENDOR_AMD:
-                amd_mcheck_init(c);
-                break;
-
-        case X86_VENDOR_INTEL:
-                if (c->x86 == 5)
-                        intel_p5_mcheck_init(c);
-                if (c->x86 == 6)
-                        intel_p6_mcheck_init(c);
-                if (c->x86 == 15)
-                        intel_p4_mcheck_init(c);
-                break;
-
-        case X86_VENDOR_CENTAUR:
-                if (c->x86 == 5)
-                        winchip_mcheck_init(c);
-                break;
-
-        default:
-                break;
-        }
-}
-
-static int __init mcheck_disable(char *str)
-{
-        mce_disabled = 1;
-        return 1;
-}
-
-static int __init mcheck_enable(char *str)
-{
-        mce_disabled = -1;
-        return 1;
-}
-
-__setup("nomce", mcheck_disable);
-__setup("mce", mcheck_enable);
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c
deleted file mode 100644
index 289cc4815028..000000000000
--- a/arch/x86/kernel/cpu/mcheck/mce_64.c
+++ /dev/null
@@ -1,1188 +0,0 @@
-/*
- * Machine check handler.
- * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
- * Rest from unknown author(s).
- * 2004 Andi Kleen. Rewrote most of it.
- * Copyright 2008 Intel Corporation
- * Author: Andi Kleen
- */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/smp_lock.h>
-#include <linux/string.h>
-#include <linux/rcupdate.h>
-#include <linux/kallsyms.h>
-#include <linux/sysdev.h>
-#include <linux/miscdevice.h>
-#include <linux/fs.h>
-#include <linux/capability.h>
-#include <linux/cpu.h>
-#include <linux/percpu.h>
-#include <linux/poll.h>
-#include <linux/thread_info.h>
-#include <linux/ctype.h>
-#include <linux/kmod.h>
-#include <linux/kdebug.h>
-#include <linux/kobject.h>
-#include <linux/sysfs.h>
-#include <linux/ratelimit.h>
-#include <asm/processor.h>
-#include <asm/msr.h>
-#include <asm/mce.h>
-#include <asm/uaccess.h>
-#include <asm/smp.h>
-#include <asm/idle.h>
-
-#define MISC_MCELOG_MINOR 227
-
-atomic_t mce_entry;
-
-static int mce_dont_init;
-
-/*
- * Tolerant levels:
- *   0: always panic on uncorrected errors, log corrected errors
- *   1: panic or SIGBUS on uncorrected errors, log corrected errors
- *   2: SIGBUS or log uncorrected errors (if possible), log corrected errors
- *   3: never panic or SIGBUS, log all errors (for testing only)
- */
-static int tolerant = 1;
-static int banks;
-static u64 *bank;
-static unsigned long notify_user;
-static int rip_msr;
-static int mce_bootlog = -1;
-static atomic_t mce_events;
-
-static char trigger[128];
-static char *trigger_argv[2] = { trigger, NULL };
-
-static DECLARE_WAIT_QUEUE_HEAD(mce_wait);
-
-/* MCA banks polled by the period polling timer for corrected events */
-DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
-        [0 ... BITS_TO_LONGS(MAX_NR_BANKS)-1] = ~0UL
-};
-
-/* Do initial initialization of a struct mce */
-void mce_setup(struct mce *m)
-{
-        memset(m, 0, sizeof(struct mce));
-        m->cpu = smp_processor_id();
-        rdtscll(m->tsc);
-}
-
-/*
- * Lockless MCE logging infrastructure.
- * This avoids deadlocks on printk locks without having to break locks. Also
- * separate MCEs from kernel messages to avoid bogus bug reports.
- */
-
-static struct mce_log mcelog = {
-        MCE_LOG_SIGNATURE,
-        MCE_LOG_LEN,
-};
-
-void mce_log(struct mce *mce)
-{
-        unsigned next, entry;
-        atomic_inc(&mce_events);
-        mce->finished = 0;
-        wmb();
-        for (;;) {
-                entry = rcu_dereference(mcelog.next);
-                for (;;) {
-                        /* When the buffer fills up discard new entries. Assume
-                           that the earlier errors are the more interesting. */
-                        if (entry >= MCE_LOG_LEN) {
-                                set_bit(MCE_OVERFLOW, (unsigned long *)&mcelog.flags);
-                                return;
-                        }
-                        /* Old left over entry. Skip. */
-                        if (mcelog.entry[entry].finished) {
-                                entry++;
-                                continue;
-                        }
-                        break;
-                }
-                smp_rmb();
-                next = entry + 1;
-                if (cmpxchg(&mcelog.next, entry, next) == entry)
-                        break;
-        }
-        memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
-        wmb();
-        mcelog.entry[entry].finished = 1;
-        wmb();
-
-        set_bit(0, &notify_user);
-}
-
-static void print_mce(struct mce *m)
-{
-        printk(KERN_EMERG "\n"
-               KERN_EMERG "HARDWARE ERROR\n"
-               KERN_EMERG
-               "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n",
-               m->cpu, m->mcgstatus, m->bank, m->status);
-        if (m->ip) {
-                printk(KERN_EMERG "RIP%s %02x:<%016Lx> ",
-                       !(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "",
-                       m->cs, m->ip);
-                if (m->cs == __KERNEL_CS)
-                        print_symbol("{%s}", m->ip);
-                printk("\n");
-        }
-        printk(KERN_EMERG "TSC %llx ", m->tsc);
-        if (m->addr)
-                printk("ADDR %llx ", m->addr);
-        if (m->misc)
-                printk("MISC %llx ", m->misc);
-        printk("\n");
-        printk(KERN_EMERG "This is not a software problem!\n");
-        printk(KERN_EMERG "Run through mcelog --ascii to decode "
-               "and contact your hardware vendor\n");
-}
-
-static void mce_panic(char *msg, struct mce *backup, unsigned long start)
-{
-        int i;
-
-        oops_begin();
-        for (i = 0; i < MCE_LOG_LEN; i++) {
-                unsigned long tsc = mcelog.entry[i].tsc;
-
-                if (time_before(tsc, start))
-                        continue;
-                print_mce(&mcelog.entry[i]);
-                if (backup && mcelog.entry[i].tsc == backup->tsc)
-                        backup = NULL;
-        }
-        if (backup)
-                print_mce(backup);
-        panic(msg);
-}
-
-int mce_available(struct cpuinfo_x86 *c)
-{
-        if (mce_dont_init)
-                return 0;
-        return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA);
-}
-
-static inline void mce_get_rip(struct mce *m, struct pt_regs *regs)
-{
-        if (regs && (m->mcgstatus & MCG_STATUS_RIPV)) {
-                m->ip = regs->ip;
-                m->cs = regs->cs;
-        } else {
-                m->ip = 0;
-                m->cs = 0;
-        }
-        if (rip_msr) {
-                /* Assume the RIP in the MSR is exact. Is this true? */
-                m->mcgstatus |= MCG_STATUS_EIPV;
-                rdmsrl(rip_msr, m->ip);
-                m->cs = 0;
-        }
-}
-
-/*
- * Poll for corrected events or events that happened before reset.
- * Those are just logged through /dev/mcelog.
- *
- * This is executed in standard interrupt context.
- */
-void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
-{
-        struct mce m;
-        int i;
-
-        mce_setup(&m);
-
-        rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
-        for (i = 0; i < banks; i++) {
-                if (!bank[i] || !test_bit(i, *b))
-                        continue;
-
-                m.misc = 0;
-                m.addr = 0;
-                m.bank = i;
-                m.tsc = 0;
-
-                barrier();
-                rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
-                if (!(m.status & MCI_STATUS_VAL))
-                        continue;
-
-                /*
-                 * Uncorrected events are handled by the exception handler
-                 * when it is enabled. But when the exception is disabled log
-                 * everything.
-                 *
-                 * TBD do the same check for MCI_STATUS_EN here?
-                 */
-                if ((m.status & MCI_STATUS_UC) && !(flags & MCP_UC))
-                        continue;
-
-                if (m.status & MCI_STATUS_MISCV)
-                        rdmsrl(MSR_IA32_MC0_MISC + i*4, m.misc);
-                if (m.status & MCI_STATUS_ADDRV)
-                        rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);
-
-                if (!(flags & MCP_TIMESTAMP))
-                        m.tsc = 0;
-                /*
-                 * Don't get the IP here because it's unlikely to
-                 * have anything to do with the actual error location.
-                 */
-                if (!(flags & MCP_DONTLOG)) {
-                        mce_log(&m);
-                        add_taint(TAINT_MACHINE_CHECK);
-                }
-
-                /*
-                 * Clear state for this bank.
-                 */
-                wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
-        }
-
-        /*
-         * Don't clear MCG_STATUS here because it's only defined for
-         * exceptions.
-         */
-}
-
-/*
- * The actual machine check handler. This only handles real
- * exceptions when something got corrupted coming in through int 18.
- *
- * This is executed in NMI context not subject to normal locking rules. This
- * implies that most kernel services cannot be safely used. Don't even
- * think about putting a printk in there!
- */
-void do_machine_check(struct pt_regs * regs, long error_code)
-{
-        struct mce m, panicm;
-        u64 mcestart = 0;
-        int i;
-        int panicm_found = 0;
-        /*
-         * If no_way_out gets set, there is no safe way to recover from this
-         * MCE.  If tolerant is cranked up, we'll try anyway.
-         */
-        int no_way_out = 0;
-        /*
-         * If kill_it gets set, there might be a way to recover from this
-         * error.
-         */
-        int kill_it = 0;
-        DECLARE_BITMAP(toclear, MAX_NR_BANKS);
-
-        atomic_inc(&mce_entry);
-
-        if (notify_die(DIE_NMI, "machine check", regs, error_code,
-                           18, SIGKILL) == NOTIFY_STOP)
-                goto out2;
-        if (!banks)
-                goto out2;
-
-        mce_setup(&m);
-
-        rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
-        /* if the restart IP is not valid, we're done for */
-        if (!(m.mcgstatus & MCG_STATUS_RIPV))
-                no_way_out = 1;
-
-        rdtscll(mcestart);
-        barrier();
-
-        for (i = 0; i < banks; i++) {
-                __clear_bit(i, toclear);
-                if (!bank[i])
-                        continue;
-
-                m.misc = 0;
-                m.addr = 0;
-                m.bank = i;
-
-                rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
-                if ((m.status & MCI_STATUS_VAL) == 0)
-                        continue;
-
-                /*
-                 * Non uncorrected errors are handled by machine_check_poll
-                 * Leave them alone.
-                 */
-                if ((m.status & MCI_STATUS_UC) == 0)
-                        continue;
-
-                /*
-                 * Set taint even when machine check was not enabled.
-                 */
-                add_taint(TAINT_MACHINE_CHECK);
-
-                __set_bit(i, toclear);
-
-                if (m.status & MCI_STATUS_EN) {
-                        /* if PCC was set, there's no way out */
-                        no_way_out |= !!(m.status & MCI_STATUS_PCC);
-                        /*
-                         * If this error was uncorrectable and there was
-                         * an overflow, we're in trouble.  If no overflow,
-                         * we might get away with just killing a task.
-                         */
-                        if (m.status & MCI_STATUS_UC) {
-                                if (tolerant < 1 || m.status & MCI_STATUS_OVER)
-                                        no_way_out = 1;
-                                kill_it = 1;
-                        }
-                } else {
-                        /*
-                         * Machine check event was not enabled. Clear, but
-                         * ignore.
-                         */
-                        continue;
-                }
-
-                if (m.status & MCI_STATUS_MISCV)
-                        rdmsrl(MSR_IA32_MC0_MISC + i*4, m.misc);
-                if (m.status & MCI_STATUS_ADDRV)
-                        rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);
-
-                mce_get_rip(&m, regs);
-                mce_log(&m);
-
-                /* Did this bank cause the exception? */
-                /* Assume that the bank with uncorrectable errors did it,
-                   and that there is only a single one. */
-                if ((m.status & MCI_STATUS_UC) && (m.status & MCI_STATUS_EN)) {
-                        panicm = m;
-                        panicm_found = 1;
-                }
-        }
-
-        /* If we didn't find an uncorrectable error, pick
-           the last one (shouldn't happen, just being safe). */
-        if (!panicm_found)
-                panicm = m;
-
-        /*
-         * If we have decided that we just CAN'T continue, and the user
-         *  has not set tolerant to an insane level, give up and die.
-         */
-        if (no_way_out && tolerant < 3)
-                mce_panic("Machine check", &panicm, mcestart);
-
-        /*
-         * If the error seems to be unrecoverable, something should be
-         * done.  Try to kill as little as possible.  If we can kill just
-         * one task, do that.  If the user has set the tolerance very
-         * high, don't try to do anything at all.
-         */
-        if (kill_it && tolerant < 3) {
-                int user_space = 0;
-
-                /*
-                 * If the EIPV bit is set, it means the saved IP is the
-                 * instruction which caused the MCE.
-                 */
-                if (m.mcgstatus & MCG_STATUS_EIPV)
-                        user_space = panicm.ip && (panicm.cs & 3);
-
-                /*
-                 * If we know that the error was in user space, send a
-                 * SIGBUS.  Otherwise, panic if tolerance is low.
-                 *
-                 * force_sig() takes an awful lot of locks and has a slight
-                 * risk of deadlocking.
-                 */
-                if (user_space) {
-                        force_sig(SIGBUS, current);
-                } else if (panic_on_oops || tolerant < 2) {
-                        mce_panic("Uncorrected machine check",
-                                &panicm, mcestart);
-                }
-        }
-
-        /* notify userspace ASAP */
-        set_thread_flag(TIF_MCE_NOTIFY);
-
-        /* the last thing we do is clear state */
-        for (i = 0; i < banks; i++) {
-                if (test_bit(i, toclear))
-                        wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
-        }
-        wrmsrl(MSR_IA32_MCG_STATUS, 0);
- out2:
-        atomic_dec(&mce_entry);
-}
-EXPORT_SYMBOL_GPL(do_machine_check);
-
-#ifdef CONFIG_X86_MCE_INTEL
-/***
- * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog
- * @cpu: The CPU on which the event occurred.
- * @status: Event status information
- *
- * This function should be called by the thermal interrupt after the
- * event has been processed and the decision was made to log the event
- * further.
- *
- * The status parameter will be saved to the 'status' field of 'struct mce'
- * and historically has been the register value of the
- * MSR_IA32_THERMAL_STATUS (Intel) msr.
- */
-void mce_log_therm_throt_event(__u64 status)
-{
-        struct mce m;
-
-        mce_setup(&m);
-        m.bank = MCE_THERMAL_BANK;
-        m.status = status;
-        mce_log(&m);
-}
-#endif /* CONFIG_X86_MCE_INTEL */
-
-/*
- * Periodic polling timer for "silent" machine check errors.  If the
- * poller finds an MCE, poll 2x faster.  When the poller finds no more
- * errors, poll 2x slower (up to check_interval seconds).
- */
-
-static int check_interval = 5 * 60; /* 5 minutes */
-static DEFINE_PER_CPU(int, next_interval); /* in jiffies */
-static void mcheck_timer(unsigned long);
-static DEFINE_PER_CPU(struct timer_list, mce_timer);
-
-static void mcheck_timer(unsigned long data)
-{
-        struct timer_list *t = &per_cpu(mce_timer, data);
-        int *n;
-
-        WARN_ON(smp_processor_id() != data);
-
-        if (mce_available(&current_cpu_data))
-                machine_check_poll(MCP_TIMESTAMP,
-                                &__get_cpu_var(mce_poll_banks));
-
-        /*
-         * Alert userspace if needed.  If we logged an MCE, reduce the
-         * polling interval, otherwise increase the polling interval.
-         */
-        n = &__get_cpu_var(next_interval);
-        if (mce_notify_user()) {
-                *n = max(*n/2, HZ/100);
-        } else {
-                *n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ));
-        }
-
-        t->expires = jiffies + *n;
-        add_timer(t);
-}
-
-static void mce_do_trigger(struct work_struct *work)
-{
-        call_usermodehelper(trigger, trigger_argv, NULL, UMH_NO_WAIT);
-}
-
-static DECLARE_WORK(mce_trigger_work, mce_do_trigger);
-
-/*
- * Notify the user(s) about new machine check events.
- * Can be called from interrupt context, but not from machine check/NMI
- * context.
- */
-int mce_notify_user(void)
-{
-        /* Not more than two messages every minute */
-        static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2);
-
-        clear_thread_flag(TIF_MCE_NOTIFY);
-        if (test_and_clear_bit(0, &notify_user)) {
-                wake_up_interruptible(&mce_wait);
-
-                /*
-                 * There is no risk of missing notifications because
-                 * work_pending is always cleared before the function is
-                 * executed.
-                 */
-                if (trigger[0] && !work_pending(&mce_trigger_work))
-                        schedule_work(&mce_trigger_work);
-
-                if (__ratelimit(&ratelimit))
-                        printk(KERN_INFO "Machine check events logged\n");
-
-                return 1;
-        }
-        return 0;
-}
-
-/* see if the idle task needs to notify userspace */
-static int
-mce_idle_callback(struct notifier_block *nfb, unsigned long action, void *junk)
-{
-        /* IDLE_END should be safe - interrupts are back on */
-        if (action == IDLE_END && test_thread_flag(TIF_MCE_NOTIFY))
-                mce_notify_user();
-
-        return NOTIFY_OK;
-}
-
-static struct notifier_block mce_idle_notifier = {
-        .notifier_call = mce_idle_callback,
-};
-
-static __init int periodic_mcheck_init(void)
-{
-       idle_notifier_register(&mce_idle_notifier);
-       return 0;
-}
-__initcall(periodic_mcheck_init);
-
-/*
- * Initialize Machine Checks for a CPU.
- */
-static int mce_cap_init(void)
-{
-        u64 cap;
-        unsigned b;
-
-        rdmsrl(MSR_IA32_MCG_CAP, cap);
-        b = cap & 0xff;
-        if (b > MAX_NR_BANKS) {
-                printk(KERN_WARNING
-                       "MCE: Using only %u machine check banks out of %u\n",
-                        MAX_NR_BANKS, b);
-                b = MAX_NR_BANKS;
-        }
-
-        /* Don't support asymmetric configurations today */
-        WARN_ON(banks != 0 && b != banks);
-        banks = b;
-        if (!bank) {
-                bank = kmalloc(banks * sizeof(u64), GFP_KERNEL);
-                if (!bank)
-                        return -ENOMEM;
-                memset(bank, 0xff, banks * sizeof(u64));
-        }
-
-        /* Use accurate RIP reporting if available. */
-        if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9)
-                rip_msr = MSR_IA32_MCG_EIP;
-
-        return 0;
-}
-
-static void mce_init(void *dummy)
-{
-        u64 cap;
-        int i;
-        mce_banks_t all_banks;
-
-        /*
-         * Log the machine checks left over from the previous reset.
-         */
-        bitmap_fill(all_banks, MAX_NR_BANKS);
-        machine_check_poll(MCP_UC|(!mce_bootlog ? MCP_DONTLOG : 0), &all_banks);
-
-        set_in_cr4(X86_CR4_MCE);
-
-        rdmsrl(MSR_IA32_MCG_CAP, cap);
-        if (cap & MCG_CTL_P)
-                wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
-
-        for (i = 0; i < banks; i++) {
-                wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
-                wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
-        }
-}
-
-/* Add per CPU specific workarounds here */
-static void mce_cpu_quirks(struct cpuinfo_x86 *c)
-{
-        /* This should be disabled by the BIOS, but isn't always */
-        if (c->x86_vendor == X86_VENDOR_AMD) {
-                if (c->x86 == 15 && banks > 4)
-                        /* disable GART TBL walk error reporting, which trips off
-                           incorrectly with the IOMMU & 3ware & Cerberus. */
-                        clear_bit(10, (unsigned long *)&bank[4]);
-                if(c->x86 <= 17 && mce_bootlog < 0)
-                        /* Lots of broken BIOS around that don't clear them
-                           by default and leave crap in there. Don't log. */
-                        mce_bootlog = 0;
-        }
-
-}
-
-static void mce_cpu_features(struct cpuinfo_x86 *c)
-{
-        switch (c->x86_vendor) {
-        case X86_VENDOR_INTEL:
-                mce_intel_feature_init(c);
-                break;
-        case X86_VENDOR_AMD:
-                mce_amd_feature_init(c);
-                break;
-        default:
-                break;
-        }
-}
-
-static void mce_init_timer(void)
-{
-        struct timer_list *t = &__get_cpu_var(mce_timer);
-        int *n = &__get_cpu_var(next_interval);
-
-        *n = check_interval * HZ;
-        if (!*n)
-                return;
-        setup_timer(t, mcheck_timer, smp_processor_id());
-        t->expires = round_jiffies(jiffies + *n);
-        add_timer(t);
-}
-
-/*
- * Called for each booted CPU to set up machine checks.
- * Must be called with preempt off.
- */
-void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
-{
-        if (!mce_available(c))
-                return;
-
-        if (mce_cap_init() < 0) {
-                mce_dont_init = 1;
-                return;
-        }
-        mce_cpu_quirks(c);
-
-        mce_init(NULL);
-        mce_cpu_features(c);
-        mce_init_timer();
-}
-
-/*
- * Character device to read and clear the MCE log.
- */
-
-static DEFINE_SPINLOCK(mce_state_lock);
-static int open_count;  /* #times opened */
-static int open_exclu;  /* already open exclusive? */
-
-static int mce_open(struct inode *inode, struct file *file)
-{
-        lock_kernel();
-        spin_lock(&mce_state_lock);
-
-        if (open_exclu || (open_count && (file->f_flags & O_EXCL))) {
-                spin_unlock(&mce_state_lock);
-                unlock_kernel();
-                return -EBUSY;
-        }
-
-        if (file->f_flags & O_EXCL)
-                open_exclu = 1;
-        open_count++;
-
-        spin_unlock(&mce_state_lock);
-        unlock_kernel();
-
-        return nonseekable_open(inode, file);
-}
-
-static int mce_release(struct inode *inode, struct file *file)
-{
-        spin_lock(&mce_state_lock);
-
-        open_count--;
-        open_exclu = 0;
-
-        spin_unlock(&mce_state_lock);
-
-        return 0;
-}
-
-static void collect_tscs(void *data)
-{
-        unsigned long *cpu_tsc = (unsigned long *)data;
-
-        rdtscll(cpu_tsc[smp_processor_id()]);
-}
-
-static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize,
-                        loff_t *off)
-{
-        unsigned long *cpu_tsc;
-        static DEFINE_MUTEX(mce_read_mutex);
-        unsigned prev, next;
-        char __user *buf = ubuf;
-        int i, err;
-
-        cpu_tsc = kmalloc(nr_cpu_ids * sizeof(long), GFP_KERNEL);
-        if (!cpu_tsc)
-                return -ENOMEM;
-
-        mutex_lock(&mce_read_mutex);
-        next = rcu_dereference(mcelog.next);
-
-        /* Only supports full reads right now */
-        if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
-                mutex_unlock(&mce_read_mutex);
-                kfree(cpu_tsc);
-                return -EINVAL;
-        }
-
-        err = 0;
-        prev = 0;
-        do {
-                for (i = prev; i < next; i++) {
-                        unsigned long start = jiffies;
-
-                        while (!mcelog.entry[i].finished) {
-                                if (time_after_eq(jiffies, start + 2)) {
-                                        memset(mcelog.entry + i, 0,
-                                               sizeof(struct mce));
-                                        goto timeout;
-                                }
-                                cpu_relax();
-                        }
-                        smp_rmb();
-                        err |= copy_to_user(buf, mcelog.entry + i,
-                                            sizeof(struct mce));
-                        buf += sizeof(struct mce);
-timeout:
-                        ;
-                }
-
-                memset(mcelog.entry + prev, 0,
-                       (next - prev) * sizeof(struct mce));
-                prev = next;
-                next = cmpxchg(&mcelog.next, prev, 0);
-        } while (next != prev);
-
-        synchronize_sched();
-
-        /*
-         * Collect entries that were still getting written before the
-         * synchronize.
-         */
-        on_each_cpu(collect_tscs, cpu_tsc, 1);
-        for (i = next; i < MCE_LOG_LEN; i++) {
-                if (mcelog.entry[i].finished &&
-                    mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) {
-                        err |= copy_to_user(buf, mcelog.entry+i,
-                                            sizeof(struct mce));
-                        smp_rmb();
-                        buf += sizeof(struct mce);
-                        memset(&mcelog.entry[i], 0, sizeof(struct mce));
-                }
-        }
-        mutex_unlock(&mce_read_mutex);
-        kfree(cpu_tsc);
-        return err ? -EFAULT : buf - ubuf;
-}
-
-static unsigned int mce_poll(struct file *file, poll_table *wait)
-{
-        poll_wait(file, &mce_wait, wait);
-        if (rcu_dereference(mcelog.next))
-                return POLLIN | POLLRDNORM;
-        return 0;
-}
-
-static long mce_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
-{
-        int __user *p = (int __user *)arg;
-
-        if (!capable(CAP_SYS_ADMIN))
-                return -EPERM;
-        switch (cmd) {
-        case MCE_GET_RECORD_LEN:
-                return put_user(sizeof(struct mce), p);
-        case MCE_GET_LOG_LEN:
-                return put_user(MCE_LOG_LEN, p);
-        case MCE_GETCLEAR_FLAGS: {
-                unsigned flags;
-
-                do {
-                        flags = mcelog.flags;
-                } while (cmpxchg(&mcelog.flags, flags, 0) != flags);
-                return put_user(flags, p);
-        }
-        default:
-                return -ENOTTY;
-        }
-}
-
-static const struct file_operations mce_chrdev_ops = {
-        .open = mce_open,
-        .release = mce_release,
-        .read = mce_read,
-        .poll = mce_poll,
-        .unlocked_ioctl = mce_ioctl,
-};
-
-static struct miscdevice mce_log_device = {
-        MISC_MCELOG_MINOR,
-        "mcelog",
-        &mce_chrdev_ops,
-};
-
-/*
- * Old style boot options parsing. Only for compatibility.
- */
-static int __init mcheck_disable(char *str)
-{
-        mce_dont_init = 1;
-        return 1;
-}
-
-/* mce=off disables machine check.
-   mce=TOLERANCELEVEL (number, see above)
-   mce=bootlog Log MCEs from before booting. Disabled by default on AMD.
-   mce=nobootlog Don't log MCEs from before booting. */
-static int __init mcheck_enable(char *str)
-{
-        if (!strcmp(str, "off"))
-                mce_dont_init = 1;
-        else if (!strcmp(str, "bootlog") || !strcmp(str,"nobootlog"))
-                mce_bootlog = str[0] == 'b';
-        else if (isdigit(str[0]))
-                get_option(&str, &tolerant);
-        else
-                printk("mce= argument %s ignored. Please use /sys", str);
-        return 1;
-}
-
-__setup("nomce", mcheck_disable);
-__setup("mce=", mcheck_enable);
-
-/*
- * Sysfs support
- */
-
-/*
- * Disable machine checks on suspend and shutdown. We can't really handle
- * them later.
- */
-static int mce_disable(void)
-{
-        int i;
-
-        for (i = 0; i < banks; i++)
-                wrmsrl(MSR_IA32_MC0_CTL + i*4, 0);
-        return 0;
-}
-
-static int mce_suspend(struct sys_device *dev, pm_message_t state)
-{
-        return mce_disable();
-}
-
-static int mce_shutdown(struct sys_device *dev)
-{
-        return mce_disable();
-}
-
-/* On resume clear all MCE state. Don't want to see leftovers from the BIOS.
-   Only one CPU is active at this time, the others get readded later using
-   CPU hotplug. */
-static int mce_resume(struct sys_device *dev)
-{
-        mce_init(NULL);
-        mce_cpu_features(&current_cpu_data);
-        return 0;
-}
-
-static void mce_cpu_restart(void *data)
-{
-        del_timer_sync(&__get_cpu_var(mce_timer));
-        if (mce_available(&current_cpu_data))
-                mce_init(NULL);
-        mce_init_timer();
-}
-
-/* Reinit MCEs after user configuration changes */
-static void mce_restart(void)
-{
-        on_each_cpu(mce_cpu_restart, NULL, 1);
-}
-
-static struct sysdev_class mce_sysclass = {
-        .suspend = mce_suspend,
-        .shutdown = mce_shutdown,
-        .resume = mce_resume,
-        .name = "machinecheck",
-};
-
-DEFINE_PER_CPU(struct sys_device, device_mce);
-void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu) __cpuinitdata;
-
-/* Why are there no generic functions for this? */
-#define ACCESSOR(name, var, start) \
-        static ssize_t show_ ## name(struct sys_device *s,              \
-                                     struct sysdev_attribute *attr,     \
-                                     char *buf) {                       \
-                return sprintf(buf, "%lx\n", (unsigned long)var);       \
-        }                                                               \
-        static ssize_t set_ ## name(struct sys_device *s,               \
-                                    struct sysdev_attribute *attr,      \
-                                    const char *buf, size_t siz) {      \
-                char *end;                                              \
-                unsigned long new = simple_strtoul(buf, &end, 0);       \
-                if (end == buf) return -EINVAL;                         \
-                var = new;                                              \
-                start;                                                  \
-                return end-buf;                                         \
-        }                                                               \
-        static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
-
-static struct sysdev_attribute *bank_attrs;
-
-static ssize_t show_bank(struct sys_device *s, struct sysdev_attribute *attr,
-                         char *buf)
-{
-        u64 b = bank[attr - bank_attrs];
-        return sprintf(buf, "%llx\n", b);
-}
-
-static ssize_t set_bank(struct sys_device *s, struct sysdev_attribute *attr,
-                        const char *buf, size_t siz)
-{
-        char *end;
-        u64 new = simple_strtoull(buf, &end, 0);
-        if (end == buf)
-                return -EINVAL;
-        bank[attr - bank_attrs] = new;
-        mce_restart();
-        return end-buf;
-}
-
-static ssize_t show_trigger(struct sys_device *s, struct sysdev_attribute *attr,
-                                char *buf)
-{
-        strcpy(buf, trigger);
-        strcat(buf, "\n");
-        return strlen(trigger) + 1;
-}
-
-static ssize_t set_trigger(struct sys_device *s, struct sysdev_attribute *attr,
-                                const char *buf,size_t siz)
-{
-        char *p;
-        int len;
-        strncpy(trigger, buf, sizeof(trigger));
-        trigger[sizeof(trigger)-1] = 0;
-        len = strlen(trigger);
-        p = strchr(trigger, '\n');
-        if (*p) *p = 0;
-        return len;
-}
-
-static SYSDEV_ATTR(trigger, 0644, show_trigger, set_trigger);
-static SYSDEV_INT_ATTR(tolerant, 0644, tolerant);
-ACCESSOR(check_interval,check_interval,mce_restart())
-static struct sysdev_attribute *mce_attributes[] = {
-        &attr_tolerant.attr, &attr_check_interval, &attr_trigger,
-        NULL
-};
-
-static cpumask_var_t mce_device_initialized;
-
-/* Per cpu sysdev init.  All of the cpus still share the same ctl bank */
-static __cpuinit int mce_create_device(unsigned int cpu)
-{
-        int err;
-        int i;
-
-        if (!mce_available(&boot_cpu_data))
-                return -EIO;
-
-        memset(&per_cpu(device_mce, cpu).kobj, 0, sizeof(struct kobject));
-        per_cpu(device_mce,cpu).id = cpu;
-        per_cpu(device_mce,cpu).cls = &mce_sysclass;
-
-        err = sysdev_register(&per_cpu(device_mce,cpu));
-        if (err)
-                return err;
-
-        for (i = 0; mce_attributes[i]; i++) {
-                err = sysdev_create_file(&per_cpu(device_mce,cpu),
-                                         mce_attributes[i]);
-                if (err)
-                        goto error;
-        }
-        for (i = 0; i < banks; i++) {
-                err = sysdev_create_file(&per_cpu(device_mce, cpu),
-                                        &bank_attrs[i]);
-                if (err)
-                        goto error2;
-        }
-        cpumask_set_cpu(cpu, mce_device_initialized);
-
-        return 0;
-error2:
-        while (--i >= 0) {
-                sysdev_remove_file(&per_cpu(device_mce, cpu),
-                                        &bank_attrs[i]);
-        }
-error:
-        while (--i >= 0) {
-                sysdev_remove_file(&per_cpu(device_mce,cpu),
-                                   mce_attributes[i]);
-        }
-        sysdev_unregister(&per_cpu(device_mce,cpu));
-
-        return err;
-}
-
-static __cpuinit void mce_remove_device(unsigned int cpu)
-{
-        int i;
-
-        if (!cpumask_test_cpu(cpu, mce_device_initialized))
-                return;
-
-        for (i = 0; mce_attributes[i]; i++)
-                sysdev_remove_file(&per_cpu(device_mce,cpu),
-                        mce_attributes[i]);
-        for (i = 0; i < banks; i++)
-                sysdev_remove_file(&per_cpu(device_mce, cpu),
-                        &bank_attrs[i]);
-        sysdev_unregister(&per_cpu(device_mce,cpu));
-        cpumask_clear_cpu(cpu, mce_device_initialized);
-}
-
-/* Make sure there are no machine checks on offlined CPUs. */
-static void mce_disable_cpu(void *h)
-{
-        int i;
-        unsigned long action = *(unsigned long *)h;
-
-        if (!mce_available(&current_cpu_data))
-                return;
-        if (!(action & CPU_TASKS_FROZEN))
-                cmci_clear();
-        for (i = 0; i < banks; i++)
-                wrmsrl(MSR_IA32_MC0_CTL + i*4, 0);
-}
-
-static void mce_reenable_cpu(void *h)
-{
-        int i;
-        unsigned long action = *(unsigned long *)h;
-
-        if (!mce_available(&current_cpu_data))
-                return;
-        if (!(action & CPU_TASKS_FROZEN))
-                cmci_reenable();
-        for (i = 0; i < banks; i++)
-                wrmsrl(MSR_IA32_MC0_CTL + i*4, bank[i]);
-}
-
-/* Get notified when a cpu comes on/off. Be hotplug friendly. */
-static int __cpuinit mce_cpu_callback(struct notifier_block *nfb,
-                                      unsigned long action, void *hcpu)
-{
-        unsigned int cpu = (unsigned long)hcpu;
-        struct timer_list *t = &per_cpu(mce_timer, cpu);
-
-        switch (action) {
-        case CPU_ONLINE:
-        case CPU_ONLINE_FROZEN:
-                mce_create_device(cpu);
-                if (threshold_cpu_callback)
-                        threshold_cpu_callback(action, cpu);
-                break;
-        case CPU_DEAD:
-        case CPU_DEAD_FROZEN:
-                if (threshold_cpu_callback)
-                        threshold_cpu_callback(action, cpu);
-                mce_remove_device(cpu);
-                break;
-        case CPU_DOWN_PREPARE:
-        case CPU_DOWN_PREPARE_FROZEN:
-                del_timer_sync(t);
-                smp_call_function_single(cpu, mce_disable_cpu, &action, 1);
-                break;
-        case CPU_DOWN_FAILED:
-        case CPU_DOWN_FAILED_FROZEN:
-                t->expires = round_jiffies(jiffies +
-                                                __get_cpu_var(next_interval));
-                add_timer_on(t, cpu);
-                smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
-                break;
-        case CPU_POST_DEAD:
-                /* intentionally ignoring frozen here */
-                cmci_rediscover(cpu);
-                break;
-        }
-        return NOTIFY_OK;
-}
-
-static struct notifier_block mce_cpu_notifier __cpuinitdata = {
-        .notifier_call = mce_cpu_callback,
-};
-
-static __init int mce_init_banks(void)
-{
-        int i;
-
-        bank_attrs = kzalloc(sizeof(struct sysdev_attribute) * banks,
-                                GFP_KERNEL);
-        if (!bank_attrs)
-                return -ENOMEM;
-
-        for (i = 0; i < banks; i++) {
-                struct sysdev_attribute *a = &bank_attrs[i];
-                a->attr.name = kasprintf(GFP_KERNEL, "bank%d", i);
-                if (!a->attr.name)
-                        goto nomem;
-                a->attr.mode = 0644;
-                a->show = show_bank;
-                a->store = set_bank;
-        }
-        return 0;
-
-nomem:
-        while (--i >= 0)
-                kfree(bank_attrs[i].attr.name);
-        kfree(bank_attrs);
-        bank_attrs = NULL;
-        return -ENOMEM;
-}
-
-static __init int mce_init_device(void)
-{
-        int err;
-        int i = 0;
-
-        if (!mce_available(&boot_cpu_data))
-                return -EIO;
-
-        zalloc_cpumask_var(&mce_device_initialized, GFP_KERNEL);
-
-        err = mce_init_banks();
-        if (err)
-                return err;
-
-        err = sysdev_class_register(&mce_sysclass);
-        if (err)
-                return err;
-
-        for_each_online_cpu(i) {
-                err = mce_create_device(i);
-                if (err)
-                        return err;
-        }
-
-        register_hotcpu_notifier(&mce_cpu_notifier);
-        misc_register(&mce_log_device);
-        return err;
-}
-
-device_initcall(mce_init_device);
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
index 56dde9c4bc96..ddae21620bda 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c
@@ -13,22 +13,22 @@
  *
  *  All MC4_MISCi registers are shared between multi-cores
  */
-
-#include <linux/cpu.h>
-#include <linux/errno.h>
-#include <linux/init.h>
 #include <linux/interrupt.h>
-#include <linux/kobject.h>
 #include <linux/notifier.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
+#include <linux/kobject.h>
+#include <linux/percpu.h>
 #include <linux/sysdev.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
 #include <linux/sysfs.h>
+#include <linux/init.h>
+#include <linux/cpu.h>
+#include <linux/smp.h>
+
 #include <asm/apic.h>
+#include <asm/idle.h>
 #include <asm/mce.h>
 #include <asm/msr.h>
-#include <asm/percpu.h>
-#include <asm/idle.h>
 
 #define PFX               "mce_threshold: "
 #define VERSION           "version 1.1.1"
@@ -48,26 +48,26 @@
 #define MCG_XBLK_ADDR     0xC0000400
 
 struct threshold_block {
-        unsigned int block;
-        unsigned int bank;
-        unsigned int cpu;
-        u32 address;
-        u16 interrupt_enable;
-        u16 threshold_limit;
-        struct kobject kobj;
-        struct list_head miscj;
+        unsigned int            block;
+        unsigned int            bank;
+        unsigned int            cpu;
+        u32                     address;
+        u16                     interrupt_enable;
+        u16                     threshold_limit;
+        struct kobject          kobj;
+        struct list_head        miscj;
 };
 
 /* defaults used early on boot */
 static struct threshold_block threshold_defaults = {
-        .interrupt_enable = 0,
-        .threshold_limit = THRESHOLD_MAX,
+        .interrupt_enable       = 0,
+        .threshold_limit        = THRESHOLD_MAX,
 };
 
 struct threshold_bank {
-        struct kobject *kobj;
-        struct threshold_block *blocks;
-        cpumask_var_t cpus;
+        struct kobject          *kobj;
+        struct threshold_block  *blocks;
+        cpumask_var_t           cpus;
 };
 static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
 
@@ -86,9 +86,9 @@ static void amd_threshold_interrupt(void);
  */
 
 struct thresh_restart {
-        struct threshold_block *b;
-        int reset;
-        u16 old_limit;
+        struct threshold_block  *b;
+        int                     reset;
+        u16                     old_limit;
 };
 
 /* must be called with correct cpu affinity */
@@ -110,6 +110,7 @@ static void threshold_restart_bank(void *_tr)
         } else if (tr->old_limit) {     /* change limit w/o reset */
                 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
                     (tr->old_limit - tr->b->threshold_limit);
+
                 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
                     (new_count & THRESHOLD_MAX);
         }
@@ -125,11 +126,11 @@ static void threshold_restart_bank(void *_tr)
 /* cpu init entry point, called from mce.c with preempt off */
 void mce_amd_feature_init(struct cpuinfo_x86 *c)
 {
-        unsigned int bank, block;
         unsigned int cpu = smp_processor_id();
-        u8 lvt_off;
         u32 low = 0, high = 0, address = 0;
+        unsigned int bank, block;
         struct thresh_restart tr;
+        u8 lvt_off;
 
         for (bank = 0; bank < NR_BANKS; ++bank) {
                 for (block = 0; block < NR_BLOCKS; ++block) {
@@ -140,8 +141,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
                                 if (!address)
                                         break;
                                 address += MCG_XBLK_ADDR;
-                        }
-                        else
+                        } else
                                 ++address;
 
                         if (rdmsr_safe(address, &low, &high))
@@ -193,9 +193,9 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
  */
 static void amd_threshold_interrupt(void)
 {
+        u32 low = 0, high = 0, address = 0;
         unsigned int bank, block;
         struct mce m;
-        u32 low = 0, high = 0, address = 0;
 
         mce_setup(&m);
 
@@ -204,16 +204,16 @@ static void amd_threshold_interrupt(void)
                 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
                         continue;
                 for (block = 0; block < NR_BLOCKS; ++block) {
-                        if (block == 0)
+                        if (block == 0) {
                                 address = MSR_IA32_MC0_MISC + bank * 4;
-                        else if (block == 1) {
+                        } else if (block == 1) {
                                 address = (low & MASK_BLKPTR_LO) >> 21;
                                 if (!address)
                                         break;
                                 address += MCG_XBLK_ADDR;
-                        }
-                        else
+                        } else {
                                 ++address;
+                        }
 
                         if (rdmsr_safe(address, &low, &high))
                                 break;
@@ -229,8 +229,10 @@ static void amd_threshold_interrupt(void)
                              (high & MASK_LOCKED_HI))
                                 continue;
 
-                        /* Log the machine check that caused the threshold
-                           event. */
+                        /*
+                         * Log the machine check that caused the threshold
+                         * event.
+                         */
                         machine_check_poll(MCP_TIMESTAMP,
                                         &__get_cpu_var(mce_poll_banks));
 
@@ -254,48 +256,52 @@ static void amd_threshold_interrupt(void)
 
 struct threshold_attr {
         struct attribute attr;
-        ssize_t(*show) (struct threshold_block *, char *);
-        ssize_t(*store) (struct threshold_block *, const char *, size_t count);
+        ssize_t (*show) (struct threshold_block *, char *);
+        ssize_t (*store) (struct threshold_block *, const char *, size_t count);
 };
 
-#define SHOW_FIELDS(name)                                           \
-static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
-{                                                                   \
-        return sprintf(buf, "%lx\n", (unsigned long) b->name);      \
+#define SHOW_FIELDS(name)                                               \
+static ssize_t show_ ## name(struct threshold_block *b, char *buf)      \
+{                                                                       \
+        return sprintf(buf, "%lx\n", (unsigned long) b->name);          \
 }
 SHOW_FIELDS(interrupt_enable)
 SHOW_FIELDS(threshold_limit)
 
-static ssize_t store_interrupt_enable(struct threshold_block *b,
-                                      const char *buf, size_t count)
+static ssize_t
+store_interrupt_enable(struct threshold_block *b, const char *buf, size_t size)
 {
-        char *end;
         struct thresh_restart tr;
-        unsigned long new = simple_strtoul(buf, &end, 0);
-        if (end == buf)
+        unsigned long new;
+
+        if (strict_strtoul(buf, 0, &new) < 0)
                 return -EINVAL;
+
         b->interrupt_enable = !!new;
 
-        tr.b = b;
-        tr.reset = 0;
-        tr.old_limit = 0;
+        tr.b            = b;
+        tr.reset        = 0;
+        tr.old_limit    = 0;
+
         smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1);
 
-        return end - buf;
+        return size;
 }
 
-static ssize_t store_threshold_limit(struct threshold_block *b,
-                                     const char *buf, size_t count)
+static ssize_t
+store_threshold_limit(struct threshold_block *b, const char *buf, size_t size)
 {
-        char *end;
         struct thresh_restart tr;
-        unsigned long new = simple_strtoul(buf, &end, 0);
-        if (end == buf)
+        unsigned long new;
+
+        if (strict_strtoul(buf, 0, &new) < 0)
                 return -EINVAL;
+
         if (new > THRESHOLD_MAX)
                 new = THRESHOLD_MAX;
         if (new < 1)
                 new = 1;
+
         tr.old_limit = b->threshold_limit;
         b->threshold_limit = new;
         tr.b = b;
@@ -303,12 +309,12 @@ static ssize_t store_threshold_limit(struct threshold_block *b,
 
         smp_call_function_single(b->cpu, threshold_restart_bank, &tr, 1);
 
-        return end - buf;
+        return size;
 }
 
 struct threshold_block_cross_cpu {
-        struct threshold_block *tb;
-        long retval;
+        struct threshold_block  *tb;
+        long                    retval;
 };
 
 static void local_error_count_handler(void *_tbcc)
@@ -338,16 +344,13 @@ static ssize_t store_error_count(struct threshold_block *b,
         return 1;
 }
 
-#define THRESHOLD_ATTR(_name,_mode,_show,_store) {            \
-        .attr = {.name = __stringify(_name), .mode = _mode }, \
-        .show = _show,                                        \
-        .store = _store,                                      \
+#define RW_ATTR(val)                                                    \
+static struct threshold_attr val = {                                    \
+        .attr   = {.name = __stringify(val), .mode = 0644 },            \
+        .show   = show_## val,                                          \
+        .store  = store_## val,                                         \
 };
 
-#define RW_ATTR(name)                                           \
-static struct threshold_attr name =                             \
-        THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
-
 RW_ATTR(interrupt_enable);
 RW_ATTR(threshold_limit);
 RW_ATTR(error_count);
@@ -359,15 +362,17 @@ static struct attribute *default_attrs[] = {
         NULL
 };
 
-#define to_block(k) container_of(k, struct threshold_block, kobj)
-#define to_attr(a) container_of(a, struct threshold_attr, attr)
+#define to_block(k)     container_of(k, struct threshold_block, kobj)
+#define to_attr(a)      container_of(a, struct threshold_attr, attr)
 
 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
 {
         struct threshold_block *b = to_block(kobj);
         struct threshold_attr *a = to_attr(attr);
         ssize_t ret;
+
         ret = a->show ? a->show(b, buf) : -EIO;
+
         return ret;
 }
 
@@ -377,18 +382,20 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,
         struct threshold_block *b = to_block(kobj);
         struct threshold_attr *a = to_attr(attr);
         ssize_t ret;
+
         ret = a->store ? a->store(b, buf, count) : -EIO;
+
         return ret;
 }
 
 static struct sysfs_ops threshold_ops = {
-        .show = show,
-        .store = store,
+        .show                   = show,
+        .store                  = store,
 };
 
 static struct kobj_type threshold_ktype = {
-        .sysfs_ops = &threshold_ops,
-        .default_attrs = default_attrs,
+        .sysfs_ops              = &threshold_ops,
+        .default_attrs          = default_attrs,
 };
 
 static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
@@ -396,9 +403,9 @@ static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
                                                unsigned int block,
                                                u32 address)
 {
-        int err;
-        u32 low, high;
         struct threshold_block *b = NULL;
+        u32 low, high;
+        int err;
 
         if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
                 return 0;
@@ -421,20 +428,21 @@ static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
         if (!b)
                 return -ENOMEM;
 
-        b->block = block;
-        b->bank = bank;
-        b->cpu = cpu;
-        b->address = address;
-        b->interrupt_enable = 0;
-        b->threshold_limit = THRESHOLD_MAX;
+        b->block                = block;
+        b->bank                 = bank;
+        b->cpu                  = cpu;
+        b->address              = address;
+        b->interrupt_enable     = 0;
+        b->threshold_limit      = THRESHOLD_MAX;
 
         INIT_LIST_HEAD(&b->miscj);
 
-        if (per_cpu(threshold_banks, cpu)[bank]->blocks)
+        if (per_cpu(threshold_banks, cpu)[bank]->blocks) {
                 list_add(&b->miscj,
                          &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
-        else
+        } else {
                 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
+        }
 
         err = kobject_init_and_add(&b->kobj, &threshold_ktype,
                                    per_cpu(threshold_banks, cpu)[bank]->kobj,
@@ -447,8 +455,9 @@ recurse:
                 if (!address)
                         return 0;
                 address += MCG_XBLK_ADDR;
-        } else
+        } else {
                 ++address;
+        }
 
         err = allocate_threshold_blocks(cpu, bank, ++block, address);
         if (err)
@@ -500,13 +509,14 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
                 if (!b)
                         goto out;
 
-                err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
+                err = sysfs_create_link(&per_cpu(mce_dev, cpu).kobj,
                                         b->kobj, name);
                 if (err)
                         goto out;
 
                 cpumask_copy(b->cpus, cpu_core_mask(cpu));
                 per_cpu(threshold_banks, cpu)[bank] = b;
+
                 goto out;
         }
 #endif
@@ -522,7 +532,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
                 goto out;
         }
 
-        b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
+        b->kobj = kobject_create_and_add(name, &per_cpu(mce_dev, cpu).kobj);
         if (!b->kobj)
                 goto out_free;
 
@@ -542,7 +552,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
                 if (i == cpu)
                         continue;
 
-                err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
+                err = sysfs_create_link(&per_cpu(mce_dev, i).kobj,
                                         b->kobj, name);
                 if (err)
                         goto out;
@@ -605,15 +615,13 @@ static void deallocate_threshold_block(unsigned int cpu,
 
 static void threshold_remove_bank(unsigned int cpu, int bank)
 {
-        int i = 0;
         struct threshold_bank *b;
         char name[32];
+        int i = 0;
 
         b = per_cpu(threshold_banks, cpu)[bank];
-
         if (!b)
                 return;
-
         if (!b->blocks)
                 goto free_out;
 
@@ -622,8 +630,9 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
 #ifdef CONFIG_SMP
         /* sibling symlink */
         if (shared_bank[bank] && b->blocks->cpu != cpu) {
-                sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
+                sysfs_remove_link(&per_cpu(mce_dev, cpu).kobj, name);
                 per_cpu(threshold_banks, cpu)[bank] = NULL;
+
                 return;
         }
 #endif
@@ -633,7 +642,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank)
                 if (i == cpu)
                         continue;
 
-                sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
+                sysfs_remove_link(&per_cpu(mce_dev, i).kobj, name);
                 per_cpu(threshold_banks, i)[bank] = NULL;
         }
 
@@ -659,12 +668,9 @@ static void threshold_remove_device(unsigned int cpu)
 }
 
 /* get notified when a cpu comes on/off */
-static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
-                                                     unsigned int cpu)
+static void __cpuinit
+amd_64_threshold_cpu_callback(unsigned long action, unsigned int cpu)
 {
-        if (cpu >= NR_CPUS)
-                return;
-
         switch (action) {
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
@@ -686,11 +692,12 @@ static __init int threshold_init_device(void)
         /* to hit CPUs online before the notifier is up */
         for_each_online_cpu(lcpu) {
                 int err = threshold_create_device(lcpu);
+
                 if (err)
                         return err;
         }
         threshold_cpu_callback = amd_64_threshold_cpu_callback;
+
         return 0;
 }
-
 device_initcall(threshold_init_device);
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
new file mode 100644
index 000000000000..2b011d2d8579
--- /dev/null
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -0,0 +1,74 @@
+/*
+ * Common code for Intel machine checks
+ */
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+
+#include <asm/therm_throt.h>
+#include <asm/processor.h>
+#include <asm/system.h>
+#include <asm/apic.h>
+#include <asm/msr.h>
+
+#include "mce.h"
+
+void intel_init_thermal(struct cpuinfo_x86 *c)
+{
+        unsigned int cpu = smp_processor_id();
+        int tm2 = 0;
+        u32 l, h;
+
+        /* Thermal monitoring depends on ACPI and clock modulation*/
+        if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
+                return;
+
+        /*
+         * First check if its enabled already, in which case there might
+         * be some SMM goo which handles it, so we can't even put a handler
+         * since it might be delivered via SMI already:
+         */
+        rdmsr(MSR_IA32_MISC_ENABLE, l, h);
+        h = apic_read(APIC_LVTTHMR);
+        if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
+                printk(KERN_DEBUG
+                       "CPU%d: Thermal monitoring handled by SMI\n", cpu);
+                return;
+        }
+
+        if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))
+                tm2 = 1;
+
+        /* Check whether a vector already exists */
+        if (h & APIC_VECTOR_MASK) {
+                printk(KERN_DEBUG
+                       "CPU%d: Thermal LVT vector (%#x) already installed\n",
+                       cpu, (h & APIC_VECTOR_MASK));
+                return;
+        }
+
+        /* We'll mask the thermal vector in the lapic till we're ready: */
+        h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
+        apic_write(APIC_LVTTHMR, h);
+
+        rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
+        wrmsr(MSR_IA32_THERM_INTERRUPT,
+                l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
+
+        intel_set_thermal_handler();
+
+        rdmsr(MSR_IA32_MISC_ENABLE, l, h);
+        wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
+
+        /* Unmask the thermal vector: */
+        l = apic_read(APIC_LVTTHMR);
+        apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
+
+        printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",
+               cpu, tm2 ? "TM2" : "TM1");
+
+        /* enable thermal throttle processing */
+        atomic_set(&therm_throt_en, 1);
+}
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index 65a0fceedcd7..f2ef6952c400 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -16,6 +16,8 @@
 #include <asm/idle.h>
 #include <asm/therm_throt.h>
 
+#include "mce.h"
+
 asmlinkage void smp_thermal_interrupt(void)
 {
         __u64 msr_val;
@@ -26,67 +28,13 @@ asmlinkage void smp_thermal_interrupt(void)
         irq_enter();
 
         rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
-        if (therm_throt_process(msr_val & 1))
+        if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT))
                 mce_log_therm_throt_event(msr_val);
 
         inc_irq_stat(irq_thermal_count);
         irq_exit();
 }
 
-static void intel_init_thermal(struct cpuinfo_x86 *c)
-{
-        u32 l, h;
-        int tm2 = 0;
-        unsigned int cpu = smp_processor_id();
-
-        if (!cpu_has(c, X86_FEATURE_ACPI))
-                return;
-
-        if (!cpu_has(c, X86_FEATURE_ACC))
-                return;
-
-        /* first check if TM1 is already enabled by the BIOS, in which
-         * case there might be some SMM goo which handles it, so we can't even
-         * put a handler since it might be delivered via SMI already.
-         */
-        rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-        h = apic_read(APIC_LVTTHMR);
-        if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
-                printk(KERN_DEBUG
-                       "CPU%d: Thermal monitoring handled by SMI\n", cpu);
-                return;
-        }
-
-        if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))
-                tm2 = 1;
-
-        if (h & APIC_VECTOR_MASK) {
-                printk(KERN_DEBUG
-                       "CPU%d: Thermal LVT vector (%#x) already "
-                       "installed\n", cpu, (h & APIC_VECTOR_MASK));
-                return;
-        }
-
-        h = THERMAL_APIC_VECTOR;
-        h |= (APIC_DM_FIXED | APIC_LVT_MASKED);
-        apic_write(APIC_LVTTHMR, h);
-
-        rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
-        wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);
-
-        rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-        wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
-
-        l = apic_read(APIC_LVTTHMR);
-        apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
-        printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",
-                cpu, tm2 ? "TM2" : "TM1");
-
-        /* enable thermal throttle processing */
-        atomic_set(&therm_throt_en, 1);
-        return;
-}
-
 /*
  * Support for Intel Correct Machine Check Interrupts. This allows
  * the CPU to raise an interrupt when a corrected machine check happened.
@@ -108,6 +56,9 @@ static int cmci_supported(int *banks)
 {
         u64 cap;
 
+        if (mce_cmci_disabled || mce_ignore_ce)
+                return 0;
+
         /*
          * Vendor check is not strictly needed, but the initial
          * initialization is vendor keyed and this
@@ -131,7 +82,7 @@ static int cmci_supported(int *banks)
 static void intel_threshold_interrupt(void)
 {
         machine_check_poll(MCP_TIMESTAMP, &__get_cpu_var(mce_banks_owned));
-        mce_notify_user();
+        mce_notify_irq();
 }
 
 static void print_update(char *type, int *hdr, int num)
@@ -247,7 +198,7 @@ void cmci_rediscover(int dying)
                 return;
         cpumask_copy(old, &current->cpus_allowed);
 
-        for_each_online_cpu (cpu) {
+        for_each_online_cpu(cpu) {
                 if (cpu == dying)
                         continue;
                 if (set_cpus_allowed_ptr(current, cpumask_of(cpu)))
diff --git a/arch/x86/kernel/cpu/mcheck/non-fatal.c b/arch/x86/kernel/cpu/mcheck/non-fatal.c
index a74af128efc9..70b710420f74 100644
--- a/arch/x86/kernel/cpu/mcheck/non-fatal.c
+++ b/arch/x86/kernel/cpu/mcheck/non-fatal.c
@@ -6,15 +6,14 @@
  * This file contains routines to check for non-fatal MCEs every 15s
  *
  */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/jiffies.h>
-#include <linux/workqueue.h>
 #include <linux/interrupt.h>
-#include <linux/smp.h>
+#include <linux/workqueue.h>
+#include <linux/jiffies.h>
+#include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/smp.h>
 
 #include <asm/processor.h>
 #include <asm/system.h>
@@ -22,9 +21,9 @@
 
 #include "mce.h"
 
-static int firstbank;
+static int              firstbank;
 
-#define MCE_RATE        15*HZ   /* timer rate is 15s */
+#define MCE_RATE        (15*HZ) /* timer rate is 15s */
 
 static void mce_checkregs(void *info)
 {
@@ -34,23 +33,24 @@ static void mce_checkregs(void *info)
         for (i = firstbank; i < nr_mce_banks; i++) {
                 rdmsr(MSR_IA32_MC0_STATUS+i*4, low, high);
 
-                if (high & (1<<31)) {
-                        printk(KERN_INFO "MCE: The hardware reports a non "
-                                "fatal, correctable incident occurred on "
-                                "CPU %d.\n",
+                if (!(high & (1<<31)))
+                        continue;
+
+                printk(KERN_INFO "MCE: The hardware reports a non fatal, "
+                        "correctable incident occurred on CPU %d.\n",
                                 smp_processor_id());
-                        printk(KERN_INFO "Bank %d: %08x%08x\n", i, high, low);
-
-                        /*
-                         * Scrub the error so we don't pick it up in MCE_RATE
-                         * seconds time.
-                         */
-                        wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
-
-                        /* Serialize */
-                        wmb();
-                        add_taint(TAINT_MACHINE_CHECK);
-                }
+
+                printk(KERN_INFO "Bank %d: %08x%08x\n", i, high, low);
+
+                /*
+                 * Scrub the error so we don't pick it up in MCE_RATE
+                 * seconds time:
+                 */
+                wrmsr(MSR_IA32_MC0_STATUS+i*4, 0UL, 0UL);
+
+                /* Serialize: */
+                wmb();
+                add_taint(TAINT_MACHINE_CHECK);
         }
 }
 
@@ -77,16 +77,17 @@ static int __init init_nonfatal_mce_checker(void)
 
         /* Some Athlons misbehave when we frob bank 0 */
         if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
-                boot_cpu_data.x86 == 6)
-                        firstbank = 1;
+                                                boot_cpu_data.x86 == 6)
+                firstbank = 1;
         else
-                        firstbank = 0;
+                firstbank = 0;
 
         /*
          * Check for non-fatal errors every MCE_RATE s
          */
         schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE));
         printk(KERN_INFO "Machine check exception polling timer started.\n");
+
         return 0;
 }
 module_init(init_nonfatal_mce_checker);
diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c
index f53bdcbaf382..82cee108a2d3 100644
--- a/arch/x86/kernel/cpu/mcheck/p4.c
+++ b/arch/x86/kernel/cpu/mcheck/p4.c
@@ -2,18 +2,17 @@
  * P4 specific Machine Check Exception Reporting
  */
 
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
 #include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
 #include <linux/smp.h>
 
+#include <asm/therm_throt.h>
 #include <asm/processor.h>
 #include <asm/system.h>
-#include <asm/msr.h>
 #include <asm/apic.h>
-
-#include <asm/therm_throt.h>
+#include <asm/msr.h>
 
 #include "mce.h"
 
@@ -36,6 +35,7 @@ static int mce_num_extended_msrs;
 
 
 #ifdef CONFIG_X86_MCE_P4THERMAL
+
 static void unexpected_thermal_interrupt(struct pt_regs *regs)
 {
         printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n",
@@ -43,7 +43,7 @@ static void unexpected_thermal_interrupt(struct pt_regs *regs)
         add_taint(TAINT_MACHINE_CHECK);
 }
 
-/* P4/Xeon Thermal transition interrupt handler */
+/* P4/Xeon Thermal transition interrupt handler: */
 static void intel_thermal_interrupt(struct pt_regs *regs)
 {
         __u64 msr_val;
@@ -51,11 +51,12 @@ static void intel_thermal_interrupt(struct pt_regs *regs)
         ack_APIC_irq();
 
         rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
-        therm_throt_process(msr_val & 0x1);
+        therm_throt_process(msr_val & THERM_STATUS_PROCHOT);
 }
 
-/* Thermal interrupt handler for this CPU setup */
-static void (*vendor_thermal_interrupt)(struct pt_regs *regs) = unexpected_thermal_interrupt;
+/* Thermal interrupt handler for this CPU setup: */
+static void (*vendor_thermal_interrupt)(struct pt_regs *regs) =
+                                                unexpected_thermal_interrupt;
 
 void smp_thermal_interrupt(struct pt_regs *regs)
 {
@@ -65,67 +66,15 @@ void smp_thermal_interrupt(struct pt_regs *regs)
         irq_exit();
 }
 
-/* P4/Xeon Thermal regulation detect and init */
-static void intel_init_thermal(struct cpuinfo_x86 *c)
+void intel_set_thermal_handler(void)
 {
-        u32 l, h;
-        unsigned int cpu = smp_processor_id();
-
-        /* Thermal monitoring */
-        if (!cpu_has(c, X86_FEATURE_ACPI))
-                return; /* -ENODEV */
-
-        /* Clock modulation */
-        if (!cpu_has(c, X86_FEATURE_ACC))
-                return; /* -ENODEV */
-
-        /* first check if its enabled already, in which case there might
-         * be some SMM goo which handles it, so we can't even put a handler
-         * since it might be delivered via SMI already -zwanem.
-         */
-        rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-        h = apic_read(APIC_LVTTHMR);
-        if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
-                printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n",
-                                cpu);
-                return; /* -EBUSY */
-        }
-
-        /* check whether a vector already exists, temporarily masked? */
-        if (h & APIC_VECTOR_MASK) {
-                printk(KERN_DEBUG "CPU%d: Thermal LVT vector (%#x) already "
-                                "installed\n",
-                        cpu, (h & APIC_VECTOR_MASK));
-                return; /* -EBUSY */
-        }
-
-        /* The temperature transition interrupt handler setup */
-        h = THERMAL_APIC_VECTOR;                /* our delivery vector */
-        h |= (APIC_DM_FIXED | APIC_LVT_MASKED); /* we'll mask till we're ready */
-        apic_write(APIC_LVTTHMR, h);
-
-        rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
-        wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03 , h);
-
-        /* ok we're good to go... */
         vendor_thermal_interrupt = intel_thermal_interrupt;
-
-        rdmsr(MSR_IA32_MISC_ENABLE, l, h);
-        wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
-
-        l = apic_read(APIC_LVTTHMR);
-        apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
-        printk(KERN_INFO "CPU%d: Thermal monitoring enabled\n", cpu);
-
-        /* enable thermal throttle processing */
-        atomic_set(&therm_throt_en, 1);
-        return;
 }
-#endif /* CONFIG_X86_MCE_P4THERMAL */
 
+#endif /* CONFIG_X86_MCE_P4THERMAL */
 
 /* P4/Xeon Extended MCE MSR retrieval, return 0 if unsupported */
-static inline void intel_get_extended_msrs(struct intel_mce_extended_msrs *r)
+static void intel_get_extended_msrs(struct intel_mce_extended_msrs *r)
 {
         u32 h;
 
@@ -143,9 +92,9 @@ static inline void intel_get_extended_msrs(struct intel_mce_extended_msrs *r)
 
 static void intel_machine_check(struct pt_regs *regs, long error_code)
 {
-        int recover = 1;
         u32 alow, ahigh, high, low;
         u32 mcgstl, mcgsth;
+        int recover = 1;
         int i;
 
         rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
@@ -157,7 +106,9 @@ static void intel_machine_check(struct pt_regs *regs, long error_code)
 
         if (mce_num_extended_msrs > 0) {
                 struct intel_mce_extended_msrs dbg;
+
                 intel_get_extended_msrs(&dbg);
+
                 printk(KERN_DEBUG "CPU %d: EIP: %08x EFLAGS: %08x\n"
                         "\teax: %08x ebx: %08x ecx: %08x edx: %08x\n"
                         "\tesi: %08x edi: %08x ebp: %08x esp: %08x\n",
@@ -171,6 +122,7 @@ static void intel_machine_check(struct pt_regs *regs, long error_code)
                 if (high & (1<<31)) {
                         char misc[20];
                         char addr[24];
+
                         misc[0] = addr[0] = '\0';
                         if (high & (1<<29))
                                 recover |= 1;
@@ -196,6 +148,7 @@ static void intel_machine_check(struct pt_regs *regs, long error_code)
                 panic("Unable to continue");
 
         printk(KERN_EMERG "Attempting to continue.\n");
+
         /*
          * Do not clear the MSR_IA32_MCi_STATUS if the error is not
          * recoverable/continuable.This will allow BIOS to look at the MSRs
@@ -217,7 +170,6 @@ static void intel_machine_check(struct pt_regs *regs, long error_code)
         wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
 }
 
-
 void intel_p4_mcheck_init(struct cpuinfo_x86 *c)
 {
         u32 l, h;
diff --git a/arch/x86/kernel/cpu/mcheck/p5.c b/arch/x86/kernel/cpu/mcheck/p5.c
index c9f77ea69edc..015f481ab1b0 100644
--- a/arch/x86/kernel/cpu/mcheck/p5.c
+++ b/arch/x86/kernel/cpu/mcheck/p5.c
@@ -2,11 +2,10 @@
  * P5 specific Machine Check Exception Reporting
  * (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>
  */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
 #include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
 #include <linux/smp.h>
 
 #include <asm/processor.h>
@@ -15,39 +14,58 @@
 
 #include "mce.h"
 
-/* Machine check handler for Pentium class Intel */
+/* By default disabled */
+int             mce_p5_enable;
+
+/* Machine check handler for Pentium class Intel CPUs: */
 static void pentium_machine_check(struct pt_regs *regs, long error_code)
 {
         u32 loaddr, hi, lotype;
+
         rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi);
         rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi);
-        printk(KERN_EMERG "CPU#%d: Machine Check Exception:  0x%8X (type 0x%8X).\n", smp_processor_id(), loaddr, lotype);
-        if (lotype&(1<<5))
-                printk(KERN_EMERG "CPU#%d: Possible thermal failure (CPU on fire ?).\n", smp_processor_id());
+
+        printk(KERN_EMERG
+                "CPU#%d: Machine Check Exception:  0x%8X (type 0x%8X).\n",
+                smp_processor_id(), loaddr, lotype);
+
+        if (lotype & (1<<5)) {
+                printk(KERN_EMERG
+                        "CPU#%d: Possible thermal failure (CPU on fire ?).\n",
+                        smp_processor_id());
+        }
+
         add_taint(TAINT_MACHINE_CHECK);
 }
 
-/* Set up machine check reporting for processors with Intel style MCE */
+/* Set up machine check reporting for processors with Intel style MCE: */
 void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
 {
         u32 l, h;
 
-        /*Check for MCE support */
+        /* Check for MCE support: */
         if (!cpu_has(c, X86_FEATURE_MCE))
                 return;
 
-        /* Default P5 to off as its often misconnected */
+#ifdef CONFIG_X86_OLD_MCE
+        /* Default P5 to off as its often misconnected: */
         if (mce_disabled != -1)
                 return;
+#endif
+
         machine_check_vector = pentium_machine_check;
+        /* Make sure the vector pointer is visible before we enable MCEs: */
         wmb();
 
-        /* Read registers before enabling */
+        /* Read registers before enabling: */
         rdmsr(MSR_IA32_P5_MC_ADDR, l, h);
         rdmsr(MSR_IA32_P5_MC_TYPE, l, h);
-        printk(KERN_INFO "Intel old style machine check architecture supported.\n");
+        printk(KERN_INFO
+               "Intel old style machine check architecture supported.\n");
 
-        /* Enable MCE */
+        /* Enable MCE: */
         set_in_cr4(X86_CR4_MCE);
-        printk(KERN_INFO "Intel old style machine check reporting enabled on CPU#%d.\n", smp_processor_id());
+        printk(KERN_INFO
+               "Intel old style machine check reporting enabled on CPU#%d.\n",
+               smp_processor_id());
 }
diff --git a/arch/x86/kernel/cpu/mcheck/p6.c b/arch/x86/kernel/cpu/mcheck/p6.c
index 2ac52d7b434b..43c24e667457 100644
--- a/arch/x86/kernel/cpu/mcheck/p6.c
+++ b/arch/x86/kernel/cpu/mcheck/p6.c
@@ -2,11 +2,10 @@
  * P6 specific Machine Check Exception Reporting
  * (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>
  */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
 #include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
 #include <linux/smp.h>
 
 #include <asm/processor.h>
@@ -18,9 +17,9 @@
 /* Machine Check Handler For PII/PIII */
 static void intel_machine_check(struct pt_regs *regs, long error_code)
 {
-        int recover = 1;
         u32 alow, ahigh, high, low;
         u32 mcgstl, mcgsth;
+        int recover = 1;
         int i;
 
         rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
@@ -35,12 +34,16 @@ static void intel_machine_check(struct pt_regs *regs, long error_code)
                 if (high & (1<<31)) {
                         char misc[20];
                         char addr[24];
-                        misc[0] = addr[0] = '\0';
+
+                        misc[0] = '\0';
+                        addr[0] = '\0';
+
                         if (high & (1<<29))
                                 recover |= 1;
                         if (high & (1<<25))
                                 recover |= 2;
                         high &= ~(1<<31);
+
                         if (high & (1<<27)) {
                                 rdmsr(MSR_IA32_MC0_MISC+i*4, alow, ahigh);
                                 snprintf(misc, 20, "[%08x%08x]", ahigh, alow);
@@ -49,6 +52,7 @@ static void intel_machine_check(struct pt_regs *regs, long error_code)
                                 rdmsr(MSR_IA32_MC0_ADDR+i*4, alow, ahigh);
                                 snprintf(addr, 24, " at %08x%08x", ahigh, alow);
                         }
+
                         printk(KERN_EMERG "CPU %d: Bank %d: %08x%08x%s%s\n",
                                 smp_processor_id(), i, high, low, misc, addr);
                 }
@@ -63,16 +67,17 @@ static void intel_machine_check(struct pt_regs *regs, long error_code)
         /*
          * Do not clear the MSR_IA32_MCi_STATUS if the error is not
          * recoverable/continuable.This will allow BIOS to look at the MSRs
-         * for errors if the OS could not log the error.
+         * for errors if the OS could not log the error:
          */
         for (i = 0; i < nr_mce_banks; i++) {
                 unsigned int msr;
+
                 msr = MSR_IA32_MC0_STATUS+i*4;
                 rdmsr(msr, low, high);
                 if (high & (1<<31)) {
-                        /* Clear it */
+                        /* Clear it: */
                         wrmsr(msr, 0UL, 0UL);
-                        /* Serialize */
+                        /* Serialize: */
                         wmb();
                         add_taint(TAINT_MACHINE_CHECK);
                 }
@@ -81,7 +86,7 @@ static void intel_machine_check(struct pt_regs *regs, long error_code)
         wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth);
 }
 
-/* Set up machine check reporting for processors with Intel style MCE */
+/* Set up machine check reporting for processors with Intel style MCE: */
 void intel_p6_mcheck_init(struct cpuinfo_x86 *c)
 {
         u32 l, h;
@@ -97,6 +102,7 @@ void intel_p6_mcheck_init(struct cpuinfo_x86 *c)
 
         /* Ok machine check is available */
         machine_check_vector = intel_machine_check;
+        /* Make sure the vector pointer is visible before we enable MCEs: */
         wmb();
 
         printk(KERN_INFO "Intel machine check architecture supported.\n");
diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
index d5ae2243f0b9..7b1ae2e20ba5 100644
--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
@@ -1,7 +1,7 @@
 /*
- *
  * Thermal throttle event support code (such as syslog messaging and rate
  * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
+ *
  * This allows consistent reporting of CPU thermal throttle events.
  *
  * Maintains a counter in /sys that keeps track of the number of thermal
@@ -13,43 +13,43 @@
  * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
  *          Inspired by Ross Biro's and Al Borchers' counter code.
  */
-
+#include <linux/notifier.h>
+#include <linux/jiffies.h>
 #include <linux/percpu.h>
 #include <linux/sysdev.h>
 #include <linux/cpu.h>
-#include <asm/cpu.h>
-#include <linux/notifier.h>
-#include <linux/jiffies.h>
+
 #include <asm/therm_throt.h>
 
 /* How long to wait between reporting thermal events */
-#define CHECK_INTERVAL              (300 * HZ)
+#define CHECK_INTERVAL          (300 * HZ)
 
 static DEFINE_PER_CPU(__u64, next_check) = INITIAL_JIFFIES;
 static DEFINE_PER_CPU(unsigned long, thermal_throttle_count);
-atomic_t therm_throt_en = ATOMIC_INIT(0);
+
+atomic_t therm_throt_en         = ATOMIC_INIT(0);
 
 #ifdef CONFIG_SYSFS
-#define define_therm_throt_sysdev_one_ro(_name)                              \
-        static SYSDEV_ATTR(_name, 0444, therm_throt_sysdev_show_##_name, NULL)
-
-#define define_therm_throt_sysdev_show_func(name)                            \
-static ssize_t therm_throt_sysdev_show_##name(struct sys_device *dev,        \
-                                        struct sysdev_attribute *attr,       \
-                                              char *buf)                     \
-{                                                                            \
-        unsigned int cpu = dev->id;                                          \
-        ssize_t ret;                                                         \
-                                                                             \
-        preempt_disable();              /* CPU hotplug */                    \
-        if (cpu_online(cpu))                                                 \
-                ret = sprintf(buf, "%lu\n",                                  \
-                              per_cpu(thermal_throttle_##name, cpu));        \
-        else                                                                 \
-                ret = 0;                                                     \
-        preempt_enable();                                                    \
-                                                                             \
-        return ret;                                                          \
+#define define_therm_throt_sysdev_one_ro(_name)                         \
+        static SYSDEV_ATTR(_name, 0444, therm_throt_sysdev_show_##_name, NULL)
+
+#define define_therm_throt_sysdev_show_func(name)                       \
+static ssize_t therm_throt_sysdev_show_##name(struct sys_device *dev,   \
+                                        struct sysdev_attribute *attr,  \
+                                              char *buf)                \
+{                                                                       \
+        unsigned int cpu = dev->id;                                     \
+        ssize_t ret;                                                    \
+                                                                        \
+        preempt_disable();      /* CPU hotplug */                       \
+        if (cpu_online(cpu))                                            \
+                ret = sprintf(buf, "%lu\n",                             \
+                              per_cpu(thermal_throttle_##name, cpu));   \
+        else                                                            \
+                ret = 0;                                                \
+        preempt_enable();                                               \
+                                                                        \
+        return ret;                                                     \
 }
 
 define_therm_throt_sysdev_show_func(count);
@@ -61,8 +61,8 @@ static struct attribute *thermal_throttle_attrs[] = {
 };
 
 static struct attribute_group thermal_throttle_attr_group = {
-        .attrs = thermal_throttle_attrs,
-        .name = "thermal_throttle"
+        .attrs  = thermal_throttle_attrs,
+        .name   = "thermal_throttle"
 };
 #endif /* CONFIG_SYSFS */
 
@@ -110,10 +110,11 @@ int therm_throt_process(int curr)
 }
 
 #ifdef CONFIG_SYSFS
-/* Add/Remove thermal_throttle interface for CPU device */
+/* Add/Remove thermal_throttle interface for CPU device: */
 static __cpuinit int thermal_throttle_add_dev(struct sys_device *sys_dev)
 {
-        return sysfs_create_group(&sys_dev->kobj, &thermal_throttle_attr_group);
+        return sysfs_create_group(&sys_dev->kobj,
+                                  &thermal_throttle_attr_group);
 }
 
 static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
@@ -121,19 +122,21 @@ static __cpuinit void thermal_throttle_remove_dev(struct sys_device *sys_dev)
         sysfs_remove_group(&sys_dev->kobj, &thermal_throttle_attr_group);
 }
 
-/* Mutex protecting device creation against CPU hotplug */
+/* Mutex protecting device creation against CPU hotplug: */
 static DEFINE_MUTEX(therm_cpu_lock);
 
 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
-static __cpuinit int thermal_throttle_cpu_callback(struct notifier_block *nfb,
-                                                   unsigned long action,
-                                                   void *hcpu)
+static __cpuinit int
+thermal_throttle_cpu_callback(struct notifier_block *nfb,
+                              unsigned long action,
+                              void *hcpu)
 {
         unsigned int cpu = (unsigned long)hcpu;
         struct sys_device *sys_dev;
         int err = 0;
 
         sys_dev = get_cpu_sysdev(cpu);
+
         switch (action) {
         case CPU_UP_PREPARE:
         case CPU_UP_PREPARE_FROZEN:
diff --git a/arch/x86/kernel/cpu/mcheck/threshold.c b/arch/x86/kernel/cpu/mcheck/threshold.c
index 23ee9e730f78..d746df2909c9 100644
--- a/arch/x86/kernel/cpu/mcheck/threshold.c
+++ b/arch/x86/kernel/cpu/mcheck/threshold.c
@@ -17,7 +17,7 @@ static void default_threshold_interrupt(void)
 
 void (*mce_threshold_vector)(void) = default_threshold_interrupt;
 
-asmlinkage void mce_threshold_interrupt(void)
+asmlinkage void smp_threshold_interrupt(void)
 {
         exit_idle();
         irq_enter();
diff --git a/arch/x86/kernel/cpu/mcheck/winchip.c b/arch/x86/kernel/cpu/mcheck/winchip.c
index 2a043d89811d..81b02487090b 100644
--- a/arch/x86/kernel/cpu/mcheck/winchip.c
+++ b/arch/x86/kernel/cpu/mcheck/winchip.c
@@ -2,11 +2,10 @@
  * IDT Winchip specific Machine Check Exception Reporting
  * (C) Copyright 2002 Alan Cox <alan@lxorguk.ukuu.org.uk>
  */
-
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
 #include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
 
 #include <asm/processor.h>
 #include <asm/system.h>
@@ -14,7 +13,7 @@
 
 #include "mce.h"
 
-/* Machine check handler for WinChip C6 */
+/* Machine check handler for WinChip C6: */
 static void winchip_machine_check(struct pt_regs *regs, long error_code)
 {
         printk(KERN_EMERG "CPU0: Machine Check Exception.\n");
@@ -25,12 +24,18 @@ static void winchip_machine_check(struct pt_regs *regs, long error_code)
 void winchip_mcheck_init(struct cpuinfo_x86 *c)
 {
         u32 lo, hi;
+
         machine_check_vector = winchip_machine_check;
+        /* Make sure the vector pointer is visible before we enable MCEs: */
         wmb();
+
         rdmsr(MSR_IDT_FCR1, lo, hi);
         lo |= (1<<2);   /* Enable EIERRINT (int 18 MCE) */
         lo &= ~(1<<4);  /* Enable MCE */
         wrmsr(MSR_IDT_FCR1, lo, hi);
+
         set_in_cr4(X86_CR4_MCE);
-        printk(KERN_INFO "Winchip machine check reporting enabled on CPU#0.\n");
+
+        printk(KERN_INFO
+               "Winchip machine check reporting enabled on CPU#0.\n");
 }
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
index 895c82e78455..275bc142cd5d 100644
--- a/arch/x86/kernel/cpu/perf_counter.c
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -968,6 +968,13 @@ fixed_mode_idx(struct perf_counter *counter, struct hw_perf_counter *hwc)
         if (!x86_pmu.num_counters_fixed)
                 return -1;
 
+        /*
+         * Quirk, IA32_FIXED_CTRs do not work on current Atom processors:
+         */
+        if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+                                        boot_cpu_data.x86_model == 28)
+                return -1;
+
         event = hwc->config & ARCH_PERFMON_EVENT_MASK;
 
         if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS)))
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index a4742a340d8d..de74f0a3e0ed 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -963,6 +963,8 @@ END(\sym)
 #ifdef CONFIG_SMP
 apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \
         irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
+apicinterrupt REBOOT_VECTOR \
+        reboot_interrupt smp_reboot_interrupt
 #endif
 
 #ifdef CONFIG_X86_UV
@@ -994,10 +996,15 @@ apicinterrupt INVALIDATE_TLB_VECTOR_START+7 \
 #endif
 
 apicinterrupt THRESHOLD_APIC_VECTOR \
-        threshold_interrupt mce_threshold_interrupt
+        threshold_interrupt smp_threshold_interrupt
 apicinterrupt THERMAL_APIC_VECTOR \
         thermal_interrupt smp_thermal_interrupt
 
+#ifdef CONFIG_X86_MCE
+apicinterrupt MCE_SELF_VECTOR \
+        mce_self_interrupt smp_mce_self_interrupt
+#endif
+
 #ifdef CONFIG_SMP
 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
         call_function_single_interrupt smp_call_function_single_interrupt
@@ -1379,7 +1386,7 @@ errorentry xen_stack_segment do_stack_segment
 errorentry general_protection do_general_protection
 errorentry page_fault do_page_fault
 #ifdef CONFIG_X86_MCE
-paranoidzeroentry machine_check do_machine_check
+paranoidzeroentry machine_check *machine_check_vector(%rip)
 #endif
 
         /*
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 38287b5f116e..b0cdde6932f5 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -12,6 +12,7 @@
 #include <asm/io_apic.h>
 #include <asm/irq.h>
 #include <asm/idle.h>
+#include <asm/mce.h>
 #include <asm/hw_irq.h>
 
 atomic_t irq_err_count;
@@ -96,13 +97,23 @@ static int show_other_interrupts(struct seq_file *p, int prec)
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
         seq_printf(p, "  Thermal event interrupts\n");
-# ifdef CONFIG_X86_64
+# ifdef CONFIG_X86_MCE_THRESHOLD
         seq_printf(p, "%*s: ", prec, "THR");
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
         seq_printf(p, "  Threshold APIC interrupts\n");
 # endif
 #endif
+#ifdef CONFIG_X86_NEW_MCE
+        seq_printf(p, "%*s: ", prec, "MCE");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
+        seq_printf(p, "  Machine check exceptions\n");
+        seq_printf(p, "%*s: ", prec, "MCP");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", per_cpu(mce_poll_count, j));
+        seq_printf(p, "  Machine check polls\n");
+#endif
         seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
 #if defined(CONFIG_X86_IO_APIC)
         seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
@@ -185,10 +196,14 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
 #endif
 #ifdef CONFIG_X86_MCE
         sum += irq_stats(cpu)->irq_thermal_count;
-# ifdef CONFIG_X86_64
+# ifdef CONFIG_X86_MCE_THRESHOLD
         sum += irq_stats(cpu)->irq_threshold_count;
 # endif
 #endif
+#ifdef CONFIG_X86_NEW_MCE
+        sum += per_cpu(mce_exception_count, cpu);
+        sum += per_cpu(mce_poll_count, cpu);
+#endif
         return sum;
 }
 
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 267c6624c77f..696f0e475c2d 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -173,6 +173,9 @@ static void __init smp_intr_init(void)
         /* Low priority IPI to cleanup after moving an irq */
         set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
         set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors);
+
+        /* IPI used for rebooting/stopping */
+        alloc_intr_gate(REBOOT_VECTOR, reboot_interrupt);
 #endif
 #endif /* CONFIG_SMP */
 }
diff --git a/arch/x86/kernel/module_64.c b/arch/x86/kernel/module.c
index c23880b90b5c..89f386f044e4 100644
--- a/arch/x86/kernel/module_64.c
+++ b/arch/x86/kernel/module.c
@@ -1,6 +1,5 @@
-/*  Kernel module help for x86-64
+/*  Kernel module help for x86.
     Copyright (C) 2001 Rusty Russell.
-    Copyright (C) 2002,2003 Andi Kleen, SuSE Labs.
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -22,23 +21,18 @@
 #include <linux/fs.h>
 #include <linux/string.h>
 #include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
 #include <linux/bug.h>
+#include <linux/mm.h>
 
 #include <asm/system.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 
+#if 0
+#define DEBUGP printk
+#else
 #define DEBUGP(fmt...)
-
-#ifndef CONFIG_UML
-void module_free(struct module *mod, void *module_region)
-{
-        vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
-}
+#endif
 
 void *module_alloc(unsigned long size)
 {
@@ -54,9 +48,15 @@ void *module_alloc(unsigned long size)
         if (!area)
                 return NULL;
 
-        return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL_EXEC);
+        return __vmalloc_area(area, GFP_KERNEL | __GFP_HIGHMEM,
+                                        PAGE_KERNEL_EXEC);
+}
+
+/* Free memory returned from module_alloc */
+void module_free(struct module *mod, void *module_region)
+{
+        vfree(module_region);
 }
-#endif
 
 /* We don't need anything special. */
 int module_frob_arch_sections(Elf_Ehdr *hdr,
@@ -67,6 +67,58 @@ int module_frob_arch_sections(Elf_Ehdr *hdr,
         return 0;
 }
 
+#ifdef CONFIG_X86_32
+int apply_relocate(Elf32_Shdr *sechdrs,
+                   const char *strtab,
+                   unsigned int symindex,
+                   unsigned int relsec,
+                   struct module *me)
+{
+        unsigned int i;
+        Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
+        Elf32_Sym *sym;
+        uint32_t *location;
+
+        DEBUGP("Applying relocate section %u to %u\n", relsec,
+               sechdrs[relsec].sh_info);
+        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+                /* This is where to make the change */
+                location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+                        + rel[i].r_offset;
+                /* This is the symbol it is referring to.  Note that all
+                   undefined symbols have been resolved.  */
+                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
+                        + ELF32_R_SYM(rel[i].r_info);
+
+                switch (ELF32_R_TYPE(rel[i].r_info)) {
+                case R_386_32:
+                        /* We add the value into the location given */
+                        *location += sym->st_value;
+                        break;
+                case R_386_PC32:
+                        /* Add the value, subtract its postition */
+                        *location += sym->st_value - (uint32_t)location;
+                        break;
+                default:
+                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
+                               me->name, ELF32_R_TYPE(rel[i].r_info));
+                        return -ENOEXEC;
+                }
+        }
+        return 0;
+}
+
+int apply_relocate_add(Elf32_Shdr *sechdrs,
+                       const char *strtab,
+                       unsigned int symindex,
+                       unsigned int relsec,
+                       struct module *me)
+{
+        printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
+               me->name);
+        return -ENOEXEC;
+}
+#else /*X86_64*/
 int apply_relocate_add(Elf64_Shdr *sechdrs,
                    const char *strtab,
                    unsigned int symindex,
@@ -147,6 +199,8 @@ int apply_relocate(Elf_Shdr *sechdrs,
         return -ENOSYS;
 }
 
+#endif
+
 int module_finalize(const Elf_Ehdr *hdr,
                     const Elf_Shdr *sechdrs,
                     struct module *me)
diff --git a/arch/x86/kernel/module_32.c b/arch/x86/kernel/module_32.c
deleted file mode 100644
index 0edd819050e7..000000000000
--- a/arch/x86/kernel/module_32.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/*  Kernel module help for i386.
-    Copyright (C) 2001 Rusty Russell.
-
-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
-
-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-#include <linux/moduleloader.h>
-#include <linux/elf.h>
-#include <linux/vmalloc.h>
-#include <linux/fs.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/bug.h>
-
-#if 0
-#define DEBUGP printk
-#else
-#define DEBUGP(fmt...)
-#endif
-
-void *module_alloc(unsigned long size)
-{
-        if (size == 0)
-                return NULL;
-        return vmalloc_exec(size);
-}
-
-
-/* Free memory returned from module_alloc */
-void module_free(struct module *mod, void *module_region)
-{
-        vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
-}
-
-/* We don't need anything special. */
-int module_frob_arch_sections(Elf_Ehdr *hdr,
-                              Elf_Shdr *sechdrs,
-                              char *secstrings,
-                              struct module *mod)
-{
-        return 0;
-}
-
-int apply_relocate(Elf32_Shdr *sechdrs,
-                   const char *strtab,
-                   unsigned int symindex,
-                   unsigned int relsec,
-                   struct module *me)
-{
-        unsigned int i;
-        Elf32_Rel *rel = (void *)sechdrs[relsec].sh_addr;
-        Elf32_Sym *sym;
-        uint32_t *location;
-
-        DEBUGP("Applying relocate section %u to %u\n", relsec,
-               sechdrs[relsec].sh_info);
-        for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
-                /* This is where to make the change */
-                location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
-                        + rel[i].r_offset;
-                /* This is the symbol it is referring to.  Note that all
-                   undefined symbols have been resolved.  */
-                sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
-                        + ELF32_R_SYM(rel[i].r_info);
-
-                switch (ELF32_R_TYPE(rel[i].r_info)) {
-                case R_386_32:
-                        /* We add the value into the location given */
-                        *location += sym->st_value;
-                        break;
-                case R_386_PC32:
-                        /* Add the value, subtract its postition */
-                        *location += sym->st_value - (uint32_t)location;
-                        break;
-                default:
-                        printk(KERN_ERR "module %s: Unknown relocation: %u\n",
-                               me->name, ELF32_R_TYPE(rel[i].r_info));
-                        return -ENOEXEC;
-                }
-        }
-        return 0;
-}
-
-int apply_relocate_add(Elf32_Shdr *sechdrs,
-                       const char *strtab,
-                       unsigned int symindex,
-                       unsigned int relsec,
-                       struct module *me)
-{
-        printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
-               me->name);
-        return -ENOEXEC;
-}
-
-int module_finalize(const Elf_Ehdr *hdr,
-                    const Elf_Shdr *sechdrs,
-                    struct module *me)
-{
-        const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL,
-                *para = NULL;
-        char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
-
-        for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) {
-                if (!strcmp(".text", secstrings + s->sh_name))
-                        text = s;
-                if (!strcmp(".altinstructions", secstrings + s->sh_name))
-                        alt = s;
-                if (!strcmp(".smp_locks", secstrings + s->sh_name))
-                        locks = s;
-                if (!strcmp(".parainstructions", secstrings + s->sh_name))
-                        para = s;
-        }
-
-        if (alt) {
-                /* patch .altinstructions */
-                void *aseg = (void *)alt->sh_addr;
-                apply_alternatives(aseg, aseg + alt->sh_size);
-        }
-        if (locks && text) {
-                void *lseg = (void *)locks->sh_addr;
-                void *tseg = (void *)text->sh_addr;
-                alternatives_smp_module_add(me, me->name,
-                                            lseg, lseg + locks->sh_size,
-                                            tseg, tseg + text->sh_size);
-        }
-
-        if (para) {
-                void *pseg = (void *)para->sh_addr;
-                apply_paravirt(pseg, pseg + para->sh_size);
-        }
-
-        return module_bug_finalize(hdr, sechdrs, me);
-}
-
-void module_arch_cleanup(struct module *mod)
-{
-        alternatives_smp_module_del(mod);
-        module_bug_cleanup(mod);
-}
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d1c636bf31a7..be5ae80f897f 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -301,15 +301,13 @@ static void __init reserve_brk(void)
 
 #ifdef CONFIG_BLK_DEV_INITRD
 
-#ifdef CONFIG_X86_32
-
 #define MAX_MAP_CHUNK   (NR_FIX_BTMAPS << PAGE_SHIFT)
 static void __init relocate_initrd(void)
 {
 
         u64 ramdisk_image = boot_params.hdr.ramdisk_image;
         u64 ramdisk_size  = boot_params.hdr.ramdisk_size;
-        u64 end_of_lowmem = max_low_pfn << PAGE_SHIFT;
+        u64 end_of_lowmem = max_low_pfn_mapped << PAGE_SHIFT;
         u64 ramdisk_here;
         unsigned long slop, clen, mapaddr;
         char *p, *q;
@@ -365,14 +363,13 @@ static void __init relocate_initrd(void)
                 ramdisk_image, ramdisk_image + ramdisk_size - 1,
                 ramdisk_here, ramdisk_here + ramdisk_size - 1);
 }
-#endif
 
 static void __init reserve_initrd(void)
 {
         u64 ramdisk_image = boot_params.hdr.ramdisk_image;
         u64 ramdisk_size  = boot_params.hdr.ramdisk_size;
         u64 ramdisk_end   = ramdisk_image + ramdisk_size;
-        u64 end_of_lowmem = max_low_pfn << PAGE_SHIFT;
+        u64 end_of_lowmem = max_low_pfn_mapped << PAGE_SHIFT;
 
         if (!boot_params.hdr.type_of_loader ||
             !ramdisk_image || !ramdisk_size)
@@ -402,14 +399,8 @@ static void __init reserve_initrd(void)
                 return;
         }
 
-#ifdef CONFIG_X86_32
         relocate_initrd();
-#else
-        printk(KERN_ERR "initrd extends beyond end of memory "
-               "(0x%08llx > 0x%08llx)\ndisabling initrd\n",
-               ramdisk_end, end_of_lowmem);
-        initrd_start = 0;
-#endif
+
         free_early(ramdisk_image, ramdisk_end);
 }
 #else
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index 0a813b17b172..4c578751e94e 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -24,11 +24,11 @@
 #include <asm/ucontext.h>
 #include <asm/i387.h>
 #include <asm/vdso.h>
+#include <asm/mce.h>
 
 #ifdef CONFIG_X86_64
 #include <asm/proto.h>
 #include <asm/ia32_unistd.h>
-#include <asm/mce.h>
 #endif /* CONFIG_X86_64 */
 
 #include <asm/syscall.h>
@@ -856,10 +856,10 @@ static void do_signal(struct pt_regs *regs)
 void
 do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
 {
-#if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE)
+#ifdef CONFIG_X86_NEW_MCE
         /* notify userspace of pending MCEs */
         if (thread_info_flags & _TIF_MCE_NOTIFY)
-                mce_notify_user();
+                mce_notify_process();
 #endif /* CONFIG_X86_64 && CONFIG_X86_MCE */
 
         /* deal with pending signal delivery */
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 28f5fb495a66..ec1de97600e7 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -150,14 +150,40 @@ void native_send_call_func_ipi(const struct cpumask *mask)
  * this function calls the 'stop' function on all other CPUs in the system.
  */
 
+asmlinkage void smp_reboot_interrupt(void)
+{
+        ack_APIC_irq();
+        irq_enter();
+        stop_this_cpu(NULL);
+        irq_exit();
+}
+
 static void native_smp_send_stop(void)
 {
         unsigned long flags;
+        unsigned long wait;
 
         if (reboot_force)
                 return;
 
-        smp_call_function(stop_this_cpu, NULL, 0);
+        /*
+         * Use an own vector here because smp_call_function
+         * does lots of things not suitable in a panic situation.
+         * On most systems we could also use an NMI here,
+         * but there are a few systems around where NMI
+         * is problematic so stay with an non NMI for now
+         * (this implies we cannot stop CPUs spinning with irq off
+         * currently)
+         */
+        if (num_online_cpus() > 1) {
+                apic->send_IPI_allbutself(REBOOT_VECTOR);
+
+                /* Don't wait longer than a second */
+                wait = USEC_PER_SEC;
+                while (num_online_cpus() > 1 && wait--)
+                        udelay(1);
+        }
+
         local_irq_save(flags);
         disable_local_APIC();
         local_irq_restore(flags);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 7c80007ea5f7..2fecda69ee64 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -873,7 +873,7 @@ int __cpuinit native_cpu_up(unsigned int cpu)
 
         err = do_boot_cpu(apicid, cpu);
 
-        zap_low_mappings();
+        zap_low_mappings(false);
         low_mappings = 0;
 #else
         err = do_boot_cpu(apicid, cpu);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 07d60c870ce2..1e1e27b7d438 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -798,15 +798,15 @@ unsigned long patch_espfix_desc(unsigned long uesp, unsigned long kesp)
 
         return new_kesp;
 }
-#else
+#endif
+
 asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
 {
 }
 
-asmlinkage void __attribute__((weak)) mce_threshold_interrupt(void)
+asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
 {
 }
-#endif
 
 /*
  * 'math_state_restore()' saves the current math information in the
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 4c85b2e2bb65..367e87882041 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -108,6 +108,8 @@ SECTIONS
         /* Data */
         . = ALIGN(PAGE_SIZE);
         .data : AT(ADDR(.data) - LOAD_OFFSET) {
+                /* Start of data section */
+                _sdata = .;
                 DATA_DATA
                 CONSTRUCTORS
 
diff --git a/arch/x86/lguest/Kconfig b/arch/x86/lguest/Kconfig
index 8dab8f7844d3..38718041efc3 100644
--- a/arch/x86/lguest/Kconfig
+++ b/arch/x86/lguest/Kconfig
@@ -2,7 +2,6 @@ config LGUEST_GUEST
         bool "Lguest guest support"
         select PARAVIRT
         depends on X86_32
-        depends on !X86_PAE
         select VIRTIO
         select VIRTIO_RING
         select VIRTIO_CONSOLE
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 4e0c26559395..7bc65f0f62c4 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -87,7 +87,7 @@ struct lguest_data lguest_data = {
 
 /*G:037 async_hcall() is pretty simple: I'm quite proud of it really.  We have a
  * ring buffer of stored hypercalls which the Host will run though next time we
- * do a normal hypercall.  Each entry in the ring has 4 slots for the hypercall
+ * do a normal hypercall.  Each entry in the ring has 5 slots for the hypercall
  * arguments, and a "hcall_status" word which is 0 if the call is ready to go,
  * and 255 once the Host has finished with it.
  *
@@ -96,7 +96,8 @@ struct lguest_data lguest_data = {
  * effect of causing the Host to run all the stored calls in the ring buffer
  * which empties it for next time! */
 static void async_hcall(unsigned long call, unsigned long arg1,
-                        unsigned long arg2, unsigned long arg3)
+                        unsigned long arg2, unsigned long arg3,
+                        unsigned long arg4)
 {
         /* Note: This code assumes we're uniprocessor. */
         static unsigned int next_call;
@@ -108,12 +109,13 @@ static void async_hcall(unsigned long call, unsigned long arg1,
         local_irq_save(flags);
         if (lguest_data.hcall_status[next_call] != 0xFF) {
                 /* Table full, so do normal hcall which will flush table. */
-                kvm_hypercall3(call, arg1, arg2, arg3);
+                kvm_hypercall4(call, arg1, arg2, arg3, arg4);
         } else {
                 lguest_data.hcalls[next_call].arg0 = call;
                 lguest_data.hcalls[next_call].arg1 = arg1;
                 lguest_data.hcalls[next_call].arg2 = arg2;
                 lguest_data.hcalls[next_call].arg3 = arg3;
+                lguest_data.hcalls[next_call].arg4 = arg4;
                 /* Arguments must all be written before we mark it to go */
                 wmb();
                 lguest_data.hcall_status[next_call] = 0;
@@ -141,7 +143,7 @@ static void lazy_hcall1(unsigned long call,
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
                 kvm_hypercall1(call, arg1);
         else
-                async_hcall(call, arg1, 0, 0);
+                async_hcall(call, arg1, 0, 0, 0);
 }
 
 static void lazy_hcall2(unsigned long call,
@@ -151,7 +153,7 @@ static void lazy_hcall2(unsigned long call,
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
                 kvm_hypercall2(call, arg1, arg2);
         else
-                async_hcall(call, arg1, arg2, 0);
+                async_hcall(call, arg1, arg2, 0, 0);
 }
 
 static void lazy_hcall3(unsigned long call,
@@ -162,9 +164,23 @@ static void lazy_hcall3(unsigned long call,
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
                 kvm_hypercall3(call, arg1, arg2, arg3);
         else
-                async_hcall(call, arg1, arg2, arg3);
+                async_hcall(call, arg1, arg2, arg3, 0);
 }
 
+#ifdef CONFIG_X86_PAE
+static void lazy_hcall4(unsigned long call,
+                       unsigned long arg1,
+                       unsigned long arg2,
+                       unsigned long arg3,
+                       unsigned long arg4)
+{
+        if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_NONE)
+                kvm_hypercall4(call, arg1, arg2, arg3, arg4);
+        else
+                async_hcall(call, arg1, arg2, arg3, arg4);
+}
+#endif
+
 /* When lazy mode is turned off reset the per-cpu lazy mode variable and then
  * issue the do-nothing hypercall to flush any stored calls. */
 static void lguest_leave_lazy_mmu_mode(void)
@@ -179,7 +195,7 @@ static void lguest_end_context_switch(struct task_struct *next)
         paravirt_end_context_switch(next);
 }
 
-/*G:033
+/*G:032
  * After that diversion we return to our first native-instruction
  * replacements: four functions for interrupt control.
  *
@@ -199,30 +215,28 @@ static unsigned long save_fl(void)
 {
         return lguest_data.irq_enabled;
 }
-PV_CALLEE_SAVE_REGS_THUNK(save_fl);
-
-/* restore_flags() just sets the flags back to the value given. */
-static void restore_fl(unsigned long flags)
-{
-        lguest_data.irq_enabled = flags;
-}
-PV_CALLEE_SAVE_REGS_THUNK(restore_fl);
 
 /* Interrupts go off... */
 static void irq_disable(void)
 {
         lguest_data.irq_enabled = 0;
 }
+
+/* Let's pause a moment.  Remember how I said these are called so often?
+ * Jeremy Fitzhardinge optimized them so hard early in 2009 that he had to
+ * break some rules.  In particular, these functions are assumed to save their
+ * own registers if they need to: normal C functions assume they can trash the
+ * eax register.  To use normal C functions, we use
+ * PV_CALLEE_SAVE_REGS_THUNK(), which pushes %eax onto the stack, calls the
+ * C function, then restores it. */
+PV_CALLEE_SAVE_REGS_THUNK(save_fl);
 PV_CALLEE_SAVE_REGS_THUNK(irq_disable);
+/*:*/
 
-/* Interrupts go on... */
-static void irq_enable(void)
-{
-        lguest_data.irq_enabled = X86_EFLAGS_IF;
-}
-PV_CALLEE_SAVE_REGS_THUNK(irq_enable);
+/* These are in i386_head.S */
+extern void lg_irq_enable(void);
+extern void lg_restore_fl(unsigned long flags);
 
-/*:*/
 /*M:003 Note that we don't check for outstanding interrupts when we re-enable
  * them (or when we unmask an interrupt).  This seems to work for the moment,
  * since interrupts are rare and we'll just get the interrupt on the next timer
@@ -368,8 +382,8 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
         case 1: /* Basic feature request. */
                 /* We only allow kernel to see SSE3, CMPXCHG16B and SSSE3 */
                 *cx &= 0x00002201;
-                /* SSE, SSE2, FXSR, MMX, CMOV, CMPXCHG8B, TSC, FPU. */
-                *dx &= 0x07808111;
+                /* SSE, SSE2, FXSR, MMX, CMOV, CMPXCHG8B, TSC, FPU, PAE. */
+                *dx &= 0x07808151;
                 /* The Host can do a nice optimization if it knows that the
                  * kernel mappings (addresses above 0xC0000000 or whatever
                  * PAGE_OFFSET is set to) haven't changed.  But Linux calls
@@ -388,6 +402,11 @@ static void lguest_cpuid(unsigned int *ax, unsigned int *bx,
                 if (*ax > 0x80000008)
                         *ax = 0x80000008;
                 break;
+        case 0x80000001:
+                /* Here we should fix nx cap depending on host. */
+                /* For this version of PAE, we just clear NX bit. */
+                *dx &= ~(1 << 20);
+                break;
         }
 }
 
@@ -521,25 +540,52 @@ static void lguest_write_cr4(unsigned long val)
 static void lguest_pte_update(struct mm_struct *mm, unsigned long addr,
                                pte_t *ptep)
 {
+#ifdef CONFIG_X86_PAE
+        lazy_hcall4(LHCALL_SET_PTE, __pa(mm->pgd), addr,
+                    ptep->pte_low, ptep->pte_high);
+#else
         lazy_hcall3(LHCALL_SET_PTE, __pa(mm->pgd), addr, ptep->pte_low);
+#endif
 }
 
 static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
                               pte_t *ptep, pte_t pteval)
 {
-        *ptep = pteval;
+        native_set_pte(ptep, pteval);
         lguest_pte_update(mm, addr, ptep);
 }
 
-/* The Guest calls this to set a top-level entry.  Again, we set the entry then
- * tell the Host which top-level page we changed, and the index of the entry we
- * changed. */
+/* The Guest calls lguest_set_pud to set a top-level entry and lguest_set_pmd
+ * to set a middle-level entry when PAE is activated.
+ * Again, we set the entry then tell the Host which page we changed,
+ * and the index of the entry we changed. */
+#ifdef CONFIG_X86_PAE
+static void lguest_set_pud(pud_t *pudp, pud_t pudval)
+{
+        native_set_pud(pudp, pudval);
+
+        /* 32 bytes aligned pdpt address and the index. */
+        lazy_hcall2(LHCALL_SET_PGD, __pa(pudp) & 0xFFFFFFE0,
+                   (__pa(pudp) & 0x1F) / sizeof(pud_t));
+}
+
 static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
 {
-        *pmdp = pmdval;
+        native_set_pmd(pmdp, pmdval);
         lazy_hcall2(LHCALL_SET_PMD, __pa(pmdp) & PAGE_MASK,
-                   (__pa(pmdp) & (PAGE_SIZE - 1)) / 4);
+                   (__pa(pmdp) & (PAGE_SIZE - 1)) / sizeof(pmd_t));
 }
+#else
+
+/* The Guest calls lguest_set_pmd to set a top-level entry when PAE is not
+ * activated. */
+static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
+{
+        native_set_pmd(pmdp, pmdval);
+        lazy_hcall2(LHCALL_SET_PGD, __pa(pmdp) & PAGE_MASK,
+                   (__pa(pmdp) & (PAGE_SIZE - 1)) / sizeof(pmd_t));
+}
+#endif
 
 /* There are a couple of legacy places where the kernel sets a PTE, but we
  * don't know the top level any more.  This is useless for us, since we don't
@@ -552,11 +598,31 @@ static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
  * which brings boot back to 0.25 seconds. */
 static void lguest_set_pte(pte_t *ptep, pte_t pteval)
 {
-        *ptep = pteval;
+        native_set_pte(ptep, pteval);
+        if (cr3_changed)
+                lazy_hcall1(LHCALL_FLUSH_TLB, 1);
+}
+
+#ifdef CONFIG_X86_PAE
+static void lguest_set_pte_atomic(pte_t *ptep, pte_t pte)
+{
+        native_set_pte_atomic(ptep, pte);
         if (cr3_changed)
                 lazy_hcall1(LHCALL_FLUSH_TLB, 1);
 }
 
+void lguest_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+{
+        native_pte_clear(mm, addr, ptep);
+        lguest_pte_update(mm, addr, ptep);
+}
+
+void lguest_pmd_clear(pmd_t *pmdp)
+{
+        lguest_set_pmd(pmdp, __pmd(0));
+}
+#endif
+
 /* Unfortunately for Lguest, the pv_mmu_ops for page tables were based on
  * native page table operations.  On native hardware you can set a new page
  * table entry whenever you want, but if you want to remove one you have to do
@@ -628,13 +694,12 @@ static void __init lguest_init_IRQ(void)
 {
         unsigned int i;
 
-        for (i = 0; i < LGUEST_IRQS; i++) {
-                int vector = FIRST_EXTERNAL_VECTOR + i;
+        for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
                 /* Some systems map "vectors" to interrupts weirdly.  Lguest has
                  * a straightforward 1 to 1 mapping, so force that here. */
-                __get_cpu_var(vector_irq)[vector] = i;
-                if (vector != SYSCALL_VECTOR)
-                        set_intr_gate(vector, interrupt[i]);
+                __get_cpu_var(vector_irq)[i] = i - FIRST_EXTERNAL_VECTOR;
+                if (i != SYSCALL_VECTOR)
+                        set_intr_gate(i, interrupt[i - FIRST_EXTERNAL_VECTOR]);
         }
         /* This call is required to set up for 4k stacks, where we have
          * separate stacks for hard and soft interrupts. */
@@ -973,10 +1038,10 @@ static void lguest_restart(char *reason)
  *
  * Our current solution is to allow the paravirt back end to optionally patch
  * over the indirect calls to replace them with something more efficient.  We
- * patch the four most commonly called functions: disable interrupts, enable
- * interrupts, restore interrupts and save interrupts.  We usually have 6 or 10
- * bytes to patch into: the Guest versions of these operations are small enough
- * that we can fit comfortably.
+ * patch two of the simplest of the most commonly called functions: disable
+ * interrupts and save interrupts.  We usually have 6 or 10 bytes to patch
+ * into: the Guest versions of these operations are small enough that we can
+ * fit comfortably.
  *
  * First we need assembly templates of each of the patchable Guest operations,
  * and these are in i386_head.S. */
@@ -987,8 +1052,6 @@ static const struct lguest_insns
         const char *start, *end;
 } lguest_insns[] = {
         [PARAVIRT_PATCH(pv_irq_ops.irq_disable)] = { lgstart_cli, lgend_cli },
-        [PARAVIRT_PATCH(pv_irq_ops.irq_enable)] = { lgstart_sti, lgend_sti },
-        [PARAVIRT_PATCH(pv_irq_ops.restore_fl)] = { lgstart_popf, lgend_popf },
         [PARAVIRT_PATCH(pv_irq_ops.save_fl)] = { lgstart_pushf, lgend_pushf },
 };
 
@@ -1026,6 +1089,7 @@ __init void lguest_init(void)
         pv_info.name = "lguest";
         pv_info.paravirt_enabled = 1;
         pv_info.kernel_rpl = 1;
+        pv_info.shared_kernel_pmd = 1;
 
         /* We set up all the lguest overrides for sensitive operations.  These
          * are detailed with the operations themselves. */
@@ -1033,9 +1097,9 @@ __init void lguest_init(void)
         /* interrupt-related operations */
         pv_irq_ops.init_IRQ = lguest_init_IRQ;
         pv_irq_ops.save_fl = PV_CALLEE_SAVE(save_fl);
-        pv_irq_ops.restore_fl = PV_CALLEE_SAVE(restore_fl);
+        pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(lg_restore_fl);
         pv_irq_ops.irq_disable = PV_CALLEE_SAVE(irq_disable);
-        pv_irq_ops.irq_enable = PV_CALLEE_SAVE(irq_enable);
+        pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(lg_irq_enable);
         pv_irq_ops.safe_halt = lguest_safe_halt;
 
         /* init-time operations */
@@ -1071,6 +1135,12 @@ __init void lguest_init(void)
         pv_mmu_ops.set_pte = lguest_set_pte;
         pv_mmu_ops.set_pte_at = lguest_set_pte_at;
         pv_mmu_ops.set_pmd = lguest_set_pmd;
+#ifdef CONFIG_X86_PAE
+        pv_mmu_ops.set_pte_atomic = lguest_set_pte_atomic;
+        pv_mmu_ops.pte_clear = lguest_pte_clear;
+        pv_mmu_ops.pmd_clear = lguest_pmd_clear;
+        pv_mmu_ops.set_pud = lguest_set_pud;
+#endif
         pv_mmu_ops.read_cr2 = lguest_read_cr2;
         pv_mmu_ops.read_cr3 = lguest_read_cr3;
         pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
diff --git a/arch/x86/lguest/i386_head.S b/arch/x86/lguest/i386_head.S
index f79541989471..a9c8cfe61cd4 100644
--- a/arch/x86/lguest/i386_head.S
+++ b/arch/x86/lguest/i386_head.S
@@ -46,10 +46,64 @@ ENTRY(lguest_entry)
         .globl lgstart_##name; .globl lgend_##name
 
 LGUEST_PATCH(cli, movl $0, lguest_data+LGUEST_DATA_irq_enabled)
-LGUEST_PATCH(sti, movl $X86_EFLAGS_IF, lguest_data+LGUEST_DATA_irq_enabled)
-LGUEST_PATCH(popf, movl %eax, lguest_data+LGUEST_DATA_irq_enabled)
 LGUEST_PATCH(pushf, movl lguest_data+LGUEST_DATA_irq_enabled, %eax)
-/*:*/
+
+/*G:033 But using those wrappers is inefficient (we'll see why that doesn't
+ * matter for save_fl and irq_disable later).  If we write our routines
+ * carefully in assembler, we can avoid clobbering any registers and avoid
+ * jumping through the wrapper functions.
+ *
+ * I skipped over our first piece of assembler, but this one is worth studying
+ * in a bit more detail so I'll describe in easy stages.  First, the routine
+ * to enable interrupts: */
+ENTRY(lg_irq_enable)
+        /* The reverse of irq_disable, this sets lguest_data.irq_enabled to
+         * X86_EFLAGS_IF (ie. "Interrupts enabled"). */
+        movl $X86_EFLAGS_IF, lguest_data+LGUEST_DATA_irq_enabled
+        /* But now we need to check if the Host wants to know: there might have
+         * been interrupts waiting to be delivered, in which case it will have
+         * set lguest_data.irq_pending to X86_EFLAGS_IF.  If it's not zero, we
+         * jump to send_interrupts, otherwise we're done. */
+        testl $0, lguest_data+LGUEST_DATA_irq_pending
+        jnz send_interrupts
+        /* One cool thing about x86 is that you can do many things without using
+         * a register.  In this case, the normal path hasn't needed to save or
+         * restore any registers at all! */
+        ret
+send_interrupts:
+        /* OK, now we need a register: eax is used for the hypercall number,
+         * which is LHCALL_SEND_INTERRUPTS.
+         *
+         * We used not to bother with this pending detection at all, which was
+         * much simpler.  Sooner or later the Host would realize it had to
+         * send us an interrupt.  But that turns out to make performance 7
+         * times worse on a simple tcp benchmark.  So now we do this the hard
+         * way. */
+        pushl %eax
+        movl $LHCALL_SEND_INTERRUPTS, %eax
+        /* This is a vmcall instruction (same thing that KVM uses).  Older
+         * assembler versions might not know the "vmcall" instruction, so we
+         * create one manually here. */
+        .byte 0x0f,0x01,0xc1 /* KVM_HYPERCALL */
+        popl %eax
+        ret
+
+/* Finally, the "popf" or "restore flags" routine.  The %eax register holds the
+ * flags (in practice, either X86_EFLAGS_IF or 0): if it's X86_EFLAGS_IF we're
+ * enabling interrupts again, if it's 0 we're leaving them off. */
+ENTRY(lg_restore_fl)
+        /* This is just "lguest_data.irq_enabled = flags;" */
+        movl %eax, lguest_data+LGUEST_DATA_irq_enabled
+        /* Now, if the %eax value has enabled interrupts and
+         * lguest_data.irq_pending is set, we want to tell the Host so it can
+         * deliver any outstanding interrupts.  Fortunately, both values will
+         * be X86_EFLAGS_IF (ie. 512) in that case, and the "testl"
+         * instruction will AND them together for us.  If both are set, we
+         * jump to send_interrupts. */
+        testl lguest_data+LGUEST_DATA_irq_pending, %eax
+        jnz send_interrupts
+        /* Again, the normal path has used no extra registers.  Clever, huh? */
+        ret
 
 /* These demark the EIP range where host should never deliver interrupts. */
 .global lguest_noirq_start
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 949708d7a481..9ff3c0816d15 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -564,7 +564,7 @@ static inline void save_pg_dir(void)
 }
 #endif /* !CONFIG_ACPI_SLEEP */
 
-void zap_low_mappings(void)
+void zap_low_mappings(bool early)
 {
         int i;
 
@@ -581,7 +581,11 @@ void zap_low_mappings(void)
                 set_pgd(swapper_pg_dir+i, __pgd(0));
 #endif
         }
-        flush_tlb_all();
+
+        if (early)
+                __flush_tlb();
+        else
+                flush_tlb_all();
 }
 
 pteval_t __supported_pte_mask __read_mostly = ~(_PAGE_NX | _PAGE_GLOBAL | _PAGE_IOMAP);
@@ -956,7 +960,7 @@ void __init mem_init(void)
                 test_wp_bit();
 
         save_pg_dir();
-        zap_low_mappings();
+        zap_low_mappings(true);
 }
 
 #ifdef CONFIG_MEMORY_HOTPLUG
diff --git a/arch/x86/power/Makefile b/arch/x86/power/Makefile
index 58b32db33125..de2abbd07544 100644
--- a/arch/x86/power/Makefile
+++ b/arch/x86/power/Makefile
@@ -3,5 +3,5 @@
 nostackp := $(call cc-option, -fno-stack-protector)
 CFLAGS_cpu_$(BITS).o    := $(nostackp)
 
-obj-$(CONFIG_PM_SLEEP)          += cpu_$(BITS).o
+obj-$(CONFIG_PM_SLEEP)          += cpu.o
 obj-$(CONFIG_HIBERNATION)       += hibernate_$(BITS).o hibernate_asm_$(BITS).o
diff --git a/arch/x86/power/cpu_64.c b/arch/x86/power/cpu.c
index 5343540f2607..d277ef1eea51 100644
--- a/arch/x86/power/cpu_64.c
+++ b/arch/x86/power/cpu.c
@@ -1,5 +1,5 @@
 /*
- * Suspend and hibernation support for x86-64
+ * Suspend support specific for i386/x86-64.
  *
  * Distribute under GPLv2
  *
@@ -8,18 +8,28 @@
  * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
  */
 
-#include <linux/smp.h>
 #include <linux/suspend.h>
-#include <asm/proto.h>
-#include <asm/page.h>
+#include <linux/smp.h>
+
 #include <asm/pgtable.h>
+#include <asm/proto.h>
 #include <asm/mtrr.h>
+#include <asm/page.h>
+#include <asm/mce.h>
 #include <asm/xcr.h>
 #include <asm/suspend.h>
 
-static void fix_processor_context(void);
+#ifdef CONFIG_X86_32
+static struct saved_context saved_context;
 
+unsigned long saved_context_ebx;
+unsigned long saved_context_esp, saved_context_ebp;
+unsigned long saved_context_esi, saved_context_edi;
+unsigned long saved_context_eflags;
+#else
+/* CONFIG_X86_64 */
 struct saved_context saved_context;
+#endif
 
 /**
  *      __save_processor_state - save CPU registers before creating a
@@ -38,19 +48,35 @@ struct saved_context saved_context;
  */
 static void __save_processor_state(struct saved_context *ctxt)
 {
+#ifdef CONFIG_X86_32
+        mtrr_save_fixed_ranges(NULL);
+#endif
         kernel_fpu_begin();
 
         /*
          * descriptor tables
          */
+#ifdef CONFIG_X86_32
+        store_gdt(&ctxt->gdt);
+        store_idt(&ctxt->idt);
+#else
+/* CONFIG_X86_64 */
         store_gdt((struct desc_ptr *)&ctxt->gdt_limit);
         store_idt((struct desc_ptr *)&ctxt->idt_limit);
+#endif
         store_tr(ctxt->tr);
 
         /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */
         /*
          * segment registers
          */
+#ifdef CONFIG_X86_32
+        savesegment(es, ctxt->es);
+        savesegment(fs, ctxt->fs);
+        savesegment(gs, ctxt->gs);
+        savesegment(ss, ctxt->ss);
+#else
+/* CONFIG_X86_64 */
         asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds));
         asm volatile ("movw %%es, %0" : "=m" (ctxt->es));
         asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs));
@@ -62,30 +88,87 @@ static void __save_processor_state(struct saved_context *ctxt)
         rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
         mtrr_save_fixed_ranges(NULL);
 
+        rdmsrl(MSR_EFER, ctxt->efer);
+#endif
+
         /*
          * control registers
          */
-        rdmsrl(MSR_EFER, ctxt->efer);
         ctxt->cr0 = read_cr0();
         ctxt->cr2 = read_cr2();
         ctxt->cr3 = read_cr3();
+#ifdef CONFIG_X86_32
+        ctxt->cr4 = read_cr4_safe();
+#else
+/* CONFIG_X86_64 */
         ctxt->cr4 = read_cr4();
         ctxt->cr8 = read_cr8();
+#endif
 }
 
+/* Needed by apm.c */
 void save_processor_state(void)
 {
         __save_processor_state(&saved_context);
 }
+#ifdef CONFIG_X86_32
+EXPORT_SYMBOL(save_processor_state);
+#endif
 
 static void do_fpu_end(void)
 {
         /*
-         * Restore FPU regs if necessary
+         * Restore FPU regs if necessary.
          */
         kernel_fpu_end();
 }
 
+static void fix_processor_context(void)
+{
+        int cpu = smp_processor_id();
+        struct tss_struct *t = &per_cpu(init_tss, cpu);
+
+        set_tss_desc(cpu, t);   /*
+                                 * This just modifies memory; should not be
+                                 * necessary. But... This is necessary, because
+                                 * 386 hardware has concept of busy TSS or some
+                                 * similar stupidity.
+                                 */
+
+#ifdef CONFIG_X86_64
+        get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS].type = 9;
+
+        syscall_init();                         /* This sets MSR_*STAR and related */
+#endif
+        load_TR_desc();                         /* This does ltr */
+        load_LDT(&current->active_mm->context); /* This does lldt */
+
+        /*
+         * Now maybe reload the debug registers
+         */
+        if (current->thread.debugreg7) {
+#ifdef CONFIG_X86_32
+                set_debugreg(current->thread.debugreg0, 0);
+                set_debugreg(current->thread.debugreg1, 1);
+                set_debugreg(current->thread.debugreg2, 2);
+                set_debugreg(current->thread.debugreg3, 3);
+                /* no 4 and 5 */
+                set_debugreg(current->thread.debugreg6, 6);
+                set_debugreg(current->thread.debugreg7, 7);
+#else
+                /* CONFIG_X86_64 */
+                loaddebug(&current->thread, 0);
+                loaddebug(&current->thread, 1);
+                loaddebug(&current->thread, 2);
+                loaddebug(&current->thread, 3);
+                /* no 4 and 5 */
+                loaddebug(&current->thread, 6);
+                loaddebug(&current->thread, 7);
+#endif
+        }
+
+}
+
 /**
  *      __restore_processor_state - restore the contents of CPU registers saved
  *              by __save_processor_state()
@@ -96,9 +179,16 @@ static void __restore_processor_state(struct saved_context *ctxt)
         /*
          * control registers
          */
+        /* cr4 was introduced in the Pentium CPU */
+#ifdef CONFIG_X86_32
+        if (ctxt->cr4)
+                write_cr4(ctxt->cr4);
+#else
+/* CONFIG X86_64 */
         wrmsrl(MSR_EFER, ctxt->efer);
         write_cr8(ctxt->cr8);
         write_cr4(ctxt->cr4);
+#endif
         write_cr3(ctxt->cr3);
         write_cr2(ctxt->cr2);
         write_cr0(ctxt->cr0);
@@ -107,13 +197,31 @@ static void __restore_processor_state(struct saved_context *ctxt)
          * now restore the descriptor tables to their proper values
          * ltr is done i fix_processor_context().
          */
+#ifdef CONFIG_X86_32
+        load_gdt(&ctxt->gdt);
+        load_idt(&ctxt->idt);
+#else
+/* CONFIG_X86_64 */
         load_gdt((const struct desc_ptr *)&ctxt->gdt_limit);
         load_idt((const struct desc_ptr *)&ctxt->idt_limit);
-
+#endif
 
         /*
          * segment registers
          */
+#ifdef CONFIG_X86_32
+        loadsegment(es, ctxt->es);
+        loadsegment(fs, ctxt->fs);
+        loadsegment(gs, ctxt->gs);
+        loadsegment(ss, ctxt->ss);
+
+        /*
+         * sysenter MSRs
+         */
+        if (boot_cpu_has(X86_FEATURE_SEP))
+                enable_sep_cpu();
+#else
+/* CONFIG_X86_64 */
         asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds));
         asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
         asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));
@@ -123,6 +231,7 @@ static void __restore_processor_state(struct saved_context *ctxt)
         wrmsrl(MSR_FS_BASE, ctxt->fs_base);
         wrmsrl(MSR_GS_BASE, ctxt->gs_base);
         wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
+#endif
 
         /*
          * restore XCR0 for xsave capable cpu's.
@@ -134,41 +243,17 @@ static void __restore_processor_state(struct saved_context *ctxt)
 
         do_fpu_end();
         mtrr_ap_init();
+
+#ifdef CONFIG_X86_32
+        mcheck_init(&boot_cpu_data);
+#endif
 }
 
+/* Needed by apm.c */
 void restore_processor_state(void)
 {
         __restore_processor_state(&saved_context);
 }
-
-static void fix_processor_context(void)
-{
-        int cpu = smp_processor_id();
-        struct tss_struct *t = &per_cpu(init_tss, cpu);
-
-        /*
-         * This just modifies memory; should not be necessary. But... This
-         * is necessary, because 386 hardware has concept of busy TSS or some
-         * similar stupidity.
-         */
-        set_tss_desc(cpu, t);
-
-        get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS].type = 9;
-
-        syscall_init();                         /* This sets MSR_*STAR and related */
-        load_TR_desc();                         /* This does ltr */
-        load_LDT(&current->active_mm->context); /* This does lldt */
-
-        /*
-         * Now maybe reload the debug registers
-         */
-        if (current->thread.debugreg7){
-                loaddebug(&current->thread, 0);
-                loaddebug(&current->thread, 1);
-                loaddebug(&current->thread, 2);
-                loaddebug(&current->thread, 3);
-                /* no 4 and 5 */
-                loaddebug(&current->thread, 6);
-                loaddebug(&current->thread, 7);
-        }
-}
+#ifdef CONFIG_X86_32
+EXPORT_SYMBOL(restore_processor_state);
+#endif
diff --git a/arch/x86/power/cpu_32.c b/arch/x86/power/cpu_32.c
deleted file mode 100644
index ce702c5b3a2c..000000000000
--- a/arch/x86/power/cpu_32.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * Suspend support specific for i386.
- *
- * Distribute under GPLv2
- *
- * Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
- * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
- */
-
-#include <linux/module.h>
-#include <linux/suspend.h>
-#include <asm/mtrr.h>
-#include <asm/mce.h>
-#include <asm/xcr.h>
-#include <asm/suspend.h>
-
-static struct saved_context saved_context;
-
-unsigned long saved_context_ebx;
-unsigned long saved_context_esp, saved_context_ebp;
-unsigned long saved_context_esi, saved_context_edi;
-unsigned long saved_context_eflags;
-
-static void __save_processor_state(struct saved_context *ctxt)
-{
-        mtrr_save_fixed_ranges(NULL);
-        kernel_fpu_begin();
-
-        /*
-         * descriptor tables
-         */
-        store_gdt(&ctxt->gdt);
-        store_idt(&ctxt->idt);
-        store_tr(ctxt->tr);
-
-        /*
-         * segment registers
-         */
-        savesegment(es, ctxt->es);
-        savesegment(fs, ctxt->fs);
-        savesegment(gs, ctxt->gs);
-        savesegment(ss, ctxt->ss);
-
-        /*
-         * control registers
-         */
-        ctxt->cr0 = read_cr0();
-        ctxt->cr2 = read_cr2();
-        ctxt->cr3 = read_cr3();
-        ctxt->cr4 = read_cr4_safe();
-}
-
-/* Needed by apm.c */
-void save_processor_state(void)
-{
-        __save_processor_state(&saved_context);
-}
-EXPORT_SYMBOL(save_processor_state);
-
-static void do_fpu_end(void)
-{
-        /*
-         * Restore FPU regs if necessary.
-         */
-        kernel_fpu_end();
-}
-
-static void fix_processor_context(void)
-{
-        int cpu = smp_processor_id();
-        struct tss_struct *t = &per_cpu(init_tss, cpu);
-
-        set_tss_desc(cpu, t);   /*
-                                 * This just modifies memory; should not be
-                                 * necessary. But... This is necessary, because
-                                 * 386 hardware has concept of busy TSS or some
-                                 * similar stupidity.
-                                 */
-
-        load_TR_desc();                         /* This does ltr */
-        load_LDT(&current->active_mm->context); /* This does lldt */
-
-        /*
-         * Now maybe reload the debug registers
-         */
-        if (current->thread.debugreg7) {
-                set_debugreg(current->thread.debugreg0, 0);
-                set_debugreg(current->thread.debugreg1, 1);
-                set_debugreg(current->thread.debugreg2, 2);
-                set_debugreg(current->thread.debugreg3, 3);
-                /* no 4 and 5 */
-                set_debugreg(current->thread.debugreg6, 6);
-                set_debugreg(current->thread.debugreg7, 7);
-        }
-
-}
-
-static void __restore_processor_state(struct saved_context *ctxt)
-{
-        /*
-         * control registers
-         */
-        /* cr4 was introduced in the Pentium CPU */
-        if (ctxt->cr4)
-                write_cr4(ctxt->cr4);
-        write_cr3(ctxt->cr3);
-        write_cr2(ctxt->cr2);
-        write_cr0(ctxt->cr0);
-
-        /*
-         * now restore the descriptor tables to their proper values
-         * ltr is done i fix_processor_context().
-         */
-        load_gdt(&ctxt->gdt);
-        load_idt(&ctxt->idt);
-
-        /*
-         * segment registers
-         */
-        loadsegment(es, ctxt->es);
-        loadsegment(fs, ctxt->fs);
-        loadsegment(gs, ctxt->gs);
-        loadsegment(ss, ctxt->ss);
-
-        /*
-         * sysenter MSRs
-         */
-        if (boot_cpu_has(X86_FEATURE_SEP))
-                enable_sep_cpu();
-
-        /*
-         * restore XCR0 for xsave capable cpu's.
-         */
-        if (cpu_has_xsave)
-                xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask);
-
-        fix_processor_context();
-        do_fpu_end();
-        mtrr_ap_init();
-        mcheck_init(&boot_cpu_data);
-}
-
-/* Needed by apm.c */
-void restore_processor_state(void)
-{
-        __restore_processor_state(&saved_context);
-}
-EXPORT_SYMBOL(restore_processor_state);
diff --git a/arch/xtensa/include/asm/atomic.h b/arch/xtensa/include/asm/atomic.h
index 67ad67bed8c1..22d6dde42619 100644
--- a/arch/xtensa/include/asm/atomic.h
+++ b/arch/xtensa/include/asm/atomic.h
@@ -292,7 +292,7 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
-#include <asm-generic/atomic.h>
+#include <asm-generic/atomic-long.h>
 #endif /* __KERNEL__ */
 
 #endif /* _XTENSA_ATOMIC_H */
diff --git a/arch/xtensa/include/asm/bitsperlong.h b/arch/xtensa/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/xtensa/include/asm/bitsperlong.h
@@ -0,0 +1 @@
+#include <asm-generic/bitsperlong.h>
diff --git a/arch/xtensa/include/asm/page.h b/arch/xtensa/include/asm/page.h
index 17e0c5383b10..161bb89e98c8 100644
--- a/arch/xtensa/include/asm/page.h
+++ b/arch/xtensa/include/asm/page.h
@@ -129,7 +129,7 @@ static inline __attribute_const__ int get_order(unsigned long size)
 
 #else
 
-# include <asm-generic/page.h>
+# include <asm-generic/getorder.h>
 
 #endif
 
diff --git a/arch/xtensa/kernel/module.c b/arch/xtensa/kernel/module.c
index 3981a466c779..c1accea8cb56 100644
--- a/arch/xtensa/kernel/module.c
+++ b/arch/xtensa/kernel/module.c
@@ -34,8 +34,6 @@ void *module_alloc(unsigned long size)
 void module_free(struct module *mod, void *module_region)
 {
         vfree(module_region);
-        /* FIXME: If module_region == mod->init_region, trim exception
-           table entries. */
 }
 
 int module_frob_arch_sections(Elf32_Ehdr *hdr,