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-rw-r--r--arch/blackfin/Kconfig4
-rw-r--r--arch/blackfin/configs/BF527-AD7160-EVAL_defconfig105
-rw-r--r--arch/blackfin/mach-bf527/boards/Kconfig5
-rw-r--r--arch/blackfin/mach-bf527/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf527/boards/ad7160eval.c870
5 files changed, 984 insertions, 1 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 5a3152b75cdb..d243e2285121 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -356,7 +356,7 @@ config MEM_MT48LC8M32B2B5_7
356 356
357config MEM_MT48LC32M16A2TG_75 357config MEM_MT48LC32M16A2TG_75
358 bool 358 bool
359 depends on (BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN532_IP0X || BLACKSTAMP) 359 depends on (BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN532_IP0X || BLACKSTAMP || BFIN527_AD7160EVAL)
360 default y 360 default y
361 361
362config MEM_MT48H32M16LFCJ_75 362config MEM_MT48H32M16LFCJ_75
@@ -426,6 +426,7 @@ config CLKIN_HZ
426 default "25000000" # most people use this 426 default "25000000" # most people use this
427 default "27000000" if BFIN533_EZKIT 427 default "27000000" if BFIN533_EZKIT
428 default "30000000" if BFIN561_EZKIT 428 default "30000000" if BFIN561_EZKIT
429 default "24000000" if BFIN527_AD7160EVAL
429 help 430 help
430 The frequency of CLKIN crystal oscillator on the board in Hz. 431 The frequency of CLKIN crystal oscillator on the board in Hz.
431 Warning: This value should match the crystal on the board. Otherwise, 432 Warning: This value should match the crystal on the board. Otherwise,
@@ -463,6 +464,7 @@ config VCO_MULT
463 default "20" if (BFIN537_BLUETECHNIX_CM_E || BFIN537_BLUETECHNIX_CM_U || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM) 464 default "20" if (BFIN537_BLUETECHNIX_CM_E || BFIN537_BLUETECHNIX_CM_U || BFIN527_BLUETECHNIX_CM || BFIN561_BLUETECHNIX_CM)
464 default "20" if BFIN561_EZKIT 465 default "20" if BFIN561_EZKIT
465 default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN518F_EZBRD) 466 default "16" if (H8606_HVSISTEMAS || BLACKSTAMP || BFIN526_EZBRD || BFIN518F_EZBRD)
467 default "25" if BFIN527_AD7160EVAL
466 help 468 help
467 This controls the frequency of the on-chip PLL. This can be between 1 and 64. 469 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
468 PLL Frequency = (Crystal Frequency) * (this setting) 470 PLL Frequency = (Crystal Frequency) * (this setting)
diff --git a/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig b/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig
new file mode 100644
index 000000000000..08c55f6b8b7a
--- /dev/null
+++ b/arch/blackfin/configs/BF527-AD7160-EVAL_defconfig
@@ -0,0 +1,105 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_BLK_DEV_INITRD=y
7# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
8CONFIG_EMBEDDED=y
9# CONFIG_ELF_CORE is not set
10# CONFIG_AIO is not set
11CONFIG_SLAB=y
12CONFIG_MODULES=y
13CONFIG_MODULE_UNLOAD=y
14# CONFIG_BLK_DEV_BSG is not set
15# CONFIG_IOSCHED_DEADLINE is not set
16CONFIG_PREEMPT=y
17CONFIG_BF527=y
18CONFIG_BF_REV_0_2=y
19CONFIG_IRQ_TWI=7
20CONFIG_IRQ_PORTH_INTA=7
21CONFIG_IRQ_PORTH_INTB=7
22CONFIG_BFIN527_AD7160EVAL=y
23CONFIG_BF527_SPORT0_PORTF=y
24CONFIG_BF527_UART1_PORTG=y
25CONFIG_IRQ_USB_INT0=11
26CONFIG_IRQ_USB_INT1=11
27CONFIG_IRQ_USB_INT2=11
28CONFIG_IRQ_USB_DMA=11
29CONFIG_CMDLINE_BOOL=y
30CONFIG_CMDLINE="bootargs=root=/dev/mtdblock0 rw clkin_hz=24000000 earlyprintk=serial,uart0,57600 console=tty0 console=ttyBF0,57600"
31CONFIG_CLKIN_HZ=24000000
32CONFIG_HZ_300=y
33# CONFIG_CYCLES_CLOCKSOURCE is not set
34CONFIG_IP_CHECKSUM_L1=y
35CONFIG_SYSCALL_TAB_L1=y
36CONFIG_CPLB_SWITCH_TAB_L1=y
37CONFIG_BFIN_GPTIMERS=y
38CONFIG_C_CDPRIO=y
39CONFIG_BANK_1=0x5554
40CONFIG_BANK_3=0xFFC0
41CONFIG_BINFMT_FLAT=y
42CONFIG_BINFMT_ZFLAT=y
43CONFIG_NET=y
44CONFIG_UNIX=y
45# CONFIG_WIRELESS is not set
46CONFIG_BLK_DEV_LOOP=y
47CONFIG_BLK_DEV_RAM=y
48# CONFIG_MISC_DEVICES is not set
49# CONFIG_INPUT_MOUSEDEV is not set
50CONFIG_INPUT_EVDEV=y
51# CONFIG_INPUT_KEYBOARD is not set
52# CONFIG_INPUT_MOUSE is not set
53CONFIG_INPUT_TOUCHSCREEN=y
54CONFIG_TOUCHSCREEN_AD7160=y
55CONFIG_TOUCHSCREEN_AD7160_FW=y
56# CONFIG_SERIO is not set
57# CONFIG_BFIN_DMA_INTERFACE is not set
58# CONFIG_DEVKMEM is not set
59CONFIG_SERIAL_BFIN=y
60CONFIG_SERIAL_BFIN_CONSOLE=y
61CONFIG_SERIAL_BFIN_UART0=y
62# CONFIG_LEGACY_PTYS is not set
63# CONFIG_BFIN_OTP is not set
64# CONFIG_HW_RANDOM is not set
65CONFIG_I2C=y
66# CONFIG_I2C_HELPER_AUTO is not set
67CONFIG_I2C_ALGOBIT=y
68CONFIG_I2C_BLACKFIN_TWI=y
69CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ=400
70CONFIG_SPI=y
71CONFIG_SPI_BFIN=y
72CONFIG_GPIOLIB=y
73CONFIG_GPIO_SYSFS=y
74# CONFIG_HWMON is not set
75CONFIG_FB=y
76CONFIG_FRAMEBUFFER_CONSOLE=y
77CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
78CONFIG_LOGO=y
79# CONFIG_LOGO_LINUX_MONO is not set
80# CONFIG_LOGO_LINUX_VGA16 is not set
81# CONFIG_LOGO_LINUX_CLUT224 is not set
82# CONFIG_LOGO_BLACKFIN_VGA16 is not set
83# CONFIG_HID_SUPPORT is not set
84CONFIG_USB_MUSB_HDRC=y
85CONFIG_USB_GADGET_MUSB_HDRC=y
86CONFIG_USB_GADGET=y
87CONFIG_USB_GADGET_VBUS_DRAW=500
88CONFIG_USB_G_SERIAL=y
89CONFIG_MMC=y
90CONFIG_MMC_SPI=y
91CONFIG_EXT2_FS=y
92# CONFIG_DNOTIFY is not set
93CONFIG_MSDOS_FS=y
94CONFIG_VFAT_FS=y
95CONFIG_NLS_CODEPAGE_437=y
96CONFIG_NLS_ISO8859_1=y
97CONFIG_DEBUG_KERNEL=y
98CONFIG_DETECT_HUNG_TASK=y
99# CONFIG_SCHED_DEBUG is not set
100# CONFIG_DEBUG_BUGVERBOSE is not set
101# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
102CONFIG_EARLY_PRINTK=y
103CONFIG_CPLB_INFO=y
104CONFIG_SECURITY=y
105CONFIG_CRC_CCITT=m
diff --git a/arch/blackfin/mach-bf527/boards/Kconfig b/arch/blackfin/mach-bf527/boards/Kconfig
index b14c28810a44..646bc66def64 100644
--- a/arch/blackfin/mach-bf527/boards/Kconfig
+++ b/arch/blackfin/mach-bf527/boards/Kconfig
@@ -24,4 +24,9 @@ config BFIN526_EZBRD
24 help 24 help
25 BF526-EZBRD/EZKIT Lite board support. 25 BF526-EZBRD/EZKIT Lite board support.
26 26
27config BFIN527_AD7160EVAL
28 bool "BF527-AD7160-EVAL"
29 help
30 BF527-AD7160-EVAL board support.
31
27endchoice 32endchoice
diff --git a/arch/blackfin/mach-bf527/boards/Makefile b/arch/blackfin/mach-bf527/boards/Makefile
index 51a5817c4a90..751d45cdf722 100644
--- a/arch/blackfin/mach-bf527/boards/Makefile
+++ b/arch/blackfin/mach-bf527/boards/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_BFIN527_EZKIT) += ezkit.o
6obj-$(CONFIG_BFIN527_EZKIT_V2) += ezkit.o 6obj-$(CONFIG_BFIN527_EZKIT_V2) += ezkit.o
7obj-$(CONFIG_BFIN527_BLUETECHNIX_CM) += cm_bf527.o 7obj-$(CONFIG_BFIN527_BLUETECHNIX_CM) += cm_bf527.o
8obj-$(CONFIG_BFIN526_EZBRD) += ezbrd.o 8obj-$(CONFIG_BFIN526_EZBRD) += ezbrd.o
9obj-$(CONFIG_BFIN527_AD7160EVAL) += ad7160eval.o
diff --git a/arch/blackfin/mach-bf527/boards/ad7160eval.c b/arch/blackfin/mach-bf527/boards/ad7160eval.c
new file mode 100644
index 000000000000..fc767ac76381
--- /dev/null
+++ b/arch/blackfin/mach-bf527/boards/ad7160eval.c
@@ -0,0 +1,870 @@
1/*
2 * Copyright 2004-20010 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
13#include <linux/mtd/physmap.h>
14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
16#include <linux/i2c.h>
17#include <linux/irq.h>
18#include <linux/interrupt.h>
19#include <linux/usb/musb.h>
20#include <linux/leds.h>
21#include <linux/input.h>
22#include <asm/dma.h>
23#include <asm/bfin5xx_spi.h>
24#include <asm/reboot.h>
25#include <asm/nand.h>
26#include <asm/portmux.h>
27#include <asm/dpmc.h>
28
29
30/*
31 * Name the Board for the /proc/cpuinfo
32 */
33const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
34
35/*
36 * Driver needs to know address, irq and flag pin.
37 */
38
39#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
40static struct resource musb_resources[] = {
41 [0] = {
42 .start = 0xffc03800,
43 .end = 0xffc03cff,
44 .flags = IORESOURCE_MEM,
45 },
46 [1] = { /* general IRQ */
47 .start = IRQ_USB_INT0,
48 .end = IRQ_USB_INT0,
49 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
50 },
51 [2] = { /* DMA IRQ */
52 .start = IRQ_USB_DMA,
53 .end = IRQ_USB_DMA,
54 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
55 },
56};
57
58static struct musb_hdrc_config musb_config = {
59 .multipoint = 0,
60 .dyn_fifo = 0,
61 .soft_con = 1,
62 .dma = 1,
63 .num_eps = 8,
64 .dma_channels = 8,
65 .gpio_vrsel = GPIO_PG13,
66 /* Some custom boards need to be active low, just set it to "0"
67 * if it is the case.
68 */
69 .gpio_vrsel_active = 1,
70};
71
72static struct musb_hdrc_platform_data musb_plat = {
73#if defined(CONFIG_USB_MUSB_OTG)
74 .mode = MUSB_OTG,
75#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
76 .mode = MUSB_HOST,
77#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
78 .mode = MUSB_PERIPHERAL,
79#endif
80 .config = &musb_config,
81};
82
83static u64 musb_dmamask = ~(u32)0;
84
85static struct platform_device musb_device = {
86 .name = "musb_hdrc",
87 .id = 0,
88 .dev = {
89 .dma_mask = &musb_dmamask,
90 .coherent_dma_mask = 0xffffffff,
91 .platform_data = &musb_plat,
92 },
93 .num_resources = ARRAY_SIZE(musb_resources),
94 .resource = musb_resources,
95};
96#endif
97
98#if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
99static struct resource bf52x_ra158z_resources[] = {
100 {
101 .start = IRQ_PPI_ERROR,
102 .end = IRQ_PPI_ERROR,
103 .flags = IORESOURCE_IRQ,
104 },
105};
106
107static struct platform_device bf52x_ra158z_device = {
108 .name = "bfin-ra158z",
109 .id = -1,
110 .num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
111 .resource = bf52x_ra158z_resources,
112};
113#endif
114
115#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
116static struct mtd_partition ad7160eval_partitions[] = {
117 {
118 .name = "bootloader(nor)",
119 .size = 0x40000,
120 .offset = 0,
121 }, {
122 .name = "linux kernel(nor)",
123 .size = 0x1C0000,
124 .offset = MTDPART_OFS_APPEND,
125 }, {
126 .name = "file system(nor)",
127 .size = MTDPART_SIZ_FULL,
128 .offset = MTDPART_OFS_APPEND,
129 }
130};
131
132static struct physmap_flash_data ad7160eval_flash_data = {
133 .width = 2,
134 .parts = ad7160eval_partitions,
135 .nr_parts = ARRAY_SIZE(ad7160eval_partitions),
136};
137
138static struct resource ad7160eval_flash_resource = {
139 .start = 0x20000000,
140 .end = 0x203fffff,
141 .flags = IORESOURCE_MEM,
142};
143
144static struct platform_device ad7160eval_flash_device = {
145 .name = "physmap-flash",
146 .id = 0,
147 .dev = {
148 .platform_data = &ad7160eval_flash_data,
149 },
150 .num_resources = 1,
151 .resource = &ad7160eval_flash_resource,
152};
153#endif
154
155#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
156static struct mtd_partition partition_info[] = {
157 {
158 .name = "linux kernel(nand)",
159 .offset = 0,
160 .size = 4 * 1024 * 1024,
161 },
162 {
163 .name = "file system(nand)",
164 .offset = MTDPART_OFS_APPEND,
165 .size = MTDPART_SIZ_FULL,
166 },
167};
168
169static struct bf5xx_nand_platform bf5xx_nand_platform = {
170 .data_width = NFC_NWIDTH_8,
171 .partitions = partition_info,
172 .nr_partitions = ARRAY_SIZE(partition_info),
173 .rd_dly = 3,
174 .wr_dly = 3,
175};
176
177static struct resource bf5xx_nand_resources[] = {
178 {
179 .start = NFC_CTL,
180 .end = NFC_DATA_RD + 2,
181 .flags = IORESOURCE_MEM,
182 },
183 {
184 .start = CH_NFC,
185 .end = CH_NFC,
186 .flags = IORESOURCE_IRQ,
187 },
188};
189
190static struct platform_device bf5xx_nand_device = {
191 .name = "bf5xx-nand",
192 .id = 0,
193 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
194 .resource = bf5xx_nand_resources,
195 .dev = {
196 .platform_data = &bf5xx_nand_platform,
197 },
198};
199#endif
200
201#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
202static struct platform_device rtc_device = {
203 .name = "rtc-bfin",
204 .id = -1,
205};
206#endif
207
208#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
209#include <linux/bfin_mac.h>
210static const unsigned short bfin_mac_peripherals[] = P_RMII0;
211
212static struct bfin_phydev_platform_data bfin_phydev_data[] = {
213 {
214 .addr = 1,
215 .irq = IRQ_MAC_PHYINT,
216 },
217};
218
219static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
220 .phydev_number = 1,
221 .phydev_data = bfin_phydev_data,
222 .phy_mode = PHY_INTERFACE_MODE_RMII,
223 .mac_peripherals = bfin_mac_peripherals,
224};
225
226static struct platform_device bfin_mii_bus = {
227 .name = "bfin_mii_bus",
228 .dev = {
229 .platform_data = &bfin_mii_bus_data,
230 }
231};
232
233static struct platform_device bfin_mac_device = {
234 .name = "bfin_mac",
235 .dev = {
236 .platform_data = &bfin_mii_bus,
237 }
238};
239#endif
240
241
242#if defined(CONFIG_MTD_M25P80) \
243 || defined(CONFIG_MTD_M25P80_MODULE)
244static struct mtd_partition bfin_spi_flash_partitions[] = {
245 {
246 .name = "bootloader(spi)",
247 .size = 0x00040000,
248 .offset = 0,
249 .mask_flags = MTD_CAP_ROM
250 }, {
251 .name = "linux kernel(spi)",
252 .size = MTDPART_SIZ_FULL,
253 .offset = MTDPART_OFS_APPEND,
254 }
255};
256
257static struct flash_platform_data bfin_spi_flash_data = {
258 .name = "m25p80",
259 .parts = bfin_spi_flash_partitions,
260 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
261 .type = "m25p16",
262};
263
264/* SPI flash chip (m25p64) */
265static struct bfin5xx_spi_chip spi_flash_chip_info = {
266 .enable_dma = 0, /* use dma transfer with this chip*/
267 .bits_per_word = 8,
268};
269#endif
270
271#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
272 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
273static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
274 .enable_dma = 0,
275 .bits_per_word = 16,
276};
277#endif
278
279#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
280static struct bfin5xx_spi_chip mmc_spi_chip_info = {
281 .enable_dma = 0,
282 .bits_per_word = 8,
283};
284#endif
285
286#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
287static struct bfin5xx_spi_chip spidev_chip_info = {
288 .enable_dma = 0,
289 .bits_per_word = 8,
290};
291#endif
292
293#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
294static struct platform_device bfin_i2s = {
295 .name = "bfin-i2s",
296 .id = CONFIG_SND_BF5XX_SPORT_NUM,
297 /* TODO: add platform data here */
298};
299#endif
300
301#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
302static struct platform_device bfin_tdm = {
303 .name = "bfin-tdm",
304 .id = CONFIG_SND_BF5XX_SPORT_NUM,
305 /* TODO: add platform data here */
306};
307#endif
308
309static struct spi_board_info bfin_spi_board_info[] __initdata = {
310#if defined(CONFIG_MTD_M25P80) \
311 || defined(CONFIG_MTD_M25P80_MODULE)
312 {
313 /* the modalias must be the same as spi device driver name */
314 .modalias = "m25p80", /* Name of spi_driver for this device */
315 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
316 .bus_num = 0, /* Framework bus number */
317 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
318 .platform_data = &bfin_spi_flash_data,
319 .controller_data = &spi_flash_chip_info,
320 .mode = SPI_MODE_3,
321 },
322#endif
323#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
324 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
325 {
326 .modalias = "ad183x",
327 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
328 .bus_num = 0,
329 .chip_select = 4,
330 .controller_data = &ad1836_spi_chip_info,
331 },
332#endif
333#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
334 {
335 .modalias = "mmc_spi",
336 .max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
337 .bus_num = 0,
338 .chip_select = GPIO_PH3 + MAX_CTRL_CS,
339 .controller_data = &mmc_spi_chip_info,
340 .mode = SPI_MODE_3,
341 },
342#endif
343#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
344 {
345 .modalias = "spidev",
346 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
347 .bus_num = 0,
348 .chip_select = 1,
349 .controller_data = &spidev_chip_info,
350 },
351#endif
352};
353
354#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
355/* SPI controller data */
356static struct bfin5xx_spi_master bfin_spi0_info = {
357 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
358 .enable_dma = 1, /* master has the ability to do dma transfer */
359 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
360};
361
362/* SPI (0) */
363static struct resource bfin_spi0_resource[] = {
364 [0] = {
365 .start = SPI0_REGBASE,
366 .end = SPI0_REGBASE + 0xFF,
367 .flags = IORESOURCE_MEM,
368 },
369 [1] = {
370 .start = CH_SPI,
371 .end = CH_SPI,
372 .flags = IORESOURCE_DMA,
373 },
374 [2] = {
375 .start = IRQ_SPI,
376 .end = IRQ_SPI,
377 .flags = IORESOURCE_IRQ,
378 },
379};
380
381static struct platform_device bfin_spi0_device = {
382 .name = "bfin-spi",
383 .id = 0, /* Bus number */
384 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
385 .resource = bfin_spi0_resource,
386 .dev = {
387 .platform_data = &bfin_spi0_info, /* Passed to driver */
388 },
389};
390#endif /* spi master and devices */
391
392#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
393#ifdef CONFIG_SERIAL_BFIN_UART0
394static struct resource bfin_uart0_resources[] = {
395 {
396 .start = UART0_THR,
397 .end = UART0_GCTL+2,
398 .flags = IORESOURCE_MEM,
399 },
400 {
401 .start = IRQ_UART0_RX,
402 .end = IRQ_UART0_RX+1,
403 .flags = IORESOURCE_IRQ,
404 },
405 {
406 .start = IRQ_UART0_ERROR,
407 .end = IRQ_UART0_ERROR,
408 .flags = IORESOURCE_IRQ,
409 },
410 {
411 .start = CH_UART0_TX,
412 .end = CH_UART0_TX,
413 .flags = IORESOURCE_DMA,
414 },
415 {
416 .start = CH_UART0_RX,
417 .end = CH_UART0_RX,
418 .flags = IORESOURCE_DMA,
419 },
420};
421
422unsigned short bfin_uart0_peripherals[] = {
423 P_UART0_TX, P_UART0_RX, 0
424};
425
426static struct platform_device bfin_uart0_device = {
427 .name = "bfin-uart",
428 .id = 0,
429 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
430 .resource = bfin_uart0_resources,
431 .dev = {
432 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
433 },
434};
435#endif
436#ifdef CONFIG_SERIAL_BFIN_UART1
437static struct resource bfin_uart1_resources[] = {
438 {
439 .start = UART1_THR,
440 .end = UART1_GCTL+2,
441 .flags = IORESOURCE_MEM,
442 },
443 {
444 .start = IRQ_UART1_RX,
445 .end = IRQ_UART1_RX+1,
446 .flags = IORESOURCE_IRQ,
447 },
448 {
449 .start = IRQ_UART1_ERROR,
450 .end = IRQ_UART1_ERROR,
451 .flags = IORESOURCE_IRQ,
452 },
453 {
454 .start = CH_UART1_TX,
455 .end = CH_UART1_TX,
456 .flags = IORESOURCE_DMA,
457 },
458 {
459 .start = CH_UART1_RX,
460 .end = CH_UART1_RX,
461 .flags = IORESOURCE_DMA,
462 },
463#ifdef CONFIG_BFIN_UART1_CTSRTS
464 { /* CTS pin */
465 .start = GPIO_PF9,
466 .end = GPIO_PF9,
467 .flags = IORESOURCE_IO,
468 },
469 { /* RTS pin */
470 .start = GPIO_PF10,
471 .end = GPIO_PF10,
472 .flags = IORESOURCE_IO,
473 },
474#endif
475};
476
477unsigned short bfin_uart1_peripherals[] = {
478 P_UART1_TX, P_UART1_RX, 0
479};
480
481static struct platform_device bfin_uart1_device = {
482 .name = "bfin-uart",
483 .id = 1,
484 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
485 .resource = bfin_uart1_resources,
486 .dev = {
487 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
488 },
489};
490#endif
491#endif
492
493#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
494#ifdef CONFIG_BFIN_SIR0
495static struct resource bfin_sir0_resources[] = {
496 {
497 .start = 0xFFC00400,
498 .end = 0xFFC004FF,
499 .flags = IORESOURCE_MEM,
500 },
501 {
502 .start = IRQ_UART0_RX,
503 .end = IRQ_UART0_RX+1,
504 .flags = IORESOURCE_IRQ,
505 },
506 {
507 .start = CH_UART0_RX,
508 .end = CH_UART0_RX+1,
509 .flags = IORESOURCE_DMA,
510 },
511};
512
513static struct platform_device bfin_sir0_device = {
514 .name = "bfin_sir",
515 .id = 0,
516 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
517 .resource = bfin_sir0_resources,
518};
519#endif
520#ifdef CONFIG_BFIN_SIR1
521static struct resource bfin_sir1_resources[] = {
522 {
523 .start = 0xFFC02000,
524 .end = 0xFFC020FF,
525 .flags = IORESOURCE_MEM,
526 },
527 {
528 .start = IRQ_UART1_RX,
529 .end = IRQ_UART1_RX+1,
530 .flags = IORESOURCE_IRQ,
531 },
532 {
533 .start = CH_UART1_RX,
534 .end = CH_UART1_RX+1,
535 .flags = IORESOURCE_DMA,
536 },
537};
538
539static struct platform_device bfin_sir1_device = {
540 .name = "bfin_sir",
541 .id = 1,
542 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
543 .resource = bfin_sir1_resources,
544};
545#endif
546#endif
547
548#if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
549#include <linux/input/ad7160.h>
550static const struct ad7160_platform_data bfin_ad7160_ts_info = {
551 .sensor_x_res = 854,
552 .sensor_y_res = 480,
553 .pressure = 100,
554 .filter_coef = 3,
555 .coord_pref = AD7160_ORIG_TOP_LEFT,
556 .first_touch_window = 5,
557 .move_window = 3,
558 .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
559 AD7160_EMIT_ABS_MT_PRESSURE |
560 AD7160_TRACKING_ID_ASCENDING,
561 .finger_act_ctrl = 0x64,
562 .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
563 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
564 AD7160_HAPTIC_SLOT_B(60) |
565 AD7160_HAPTIC_SLOT_B_LVL_LOW,
566
567 .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
568 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
569 AD7160_HAPTIC_SLOT_B(80) |
570 AD7160_HAPTIC_SLOT_B_LVL_LOW |
571 AD7160_HAPTIC_SLOT_C(120) |
572 AD7160_HAPTIC_SLOT_C_LVL_HIGH |
573 AD7160_HAPTIC_SLOT_D(30) |
574 AD7160_HAPTIC_SLOT_D_LVL_LOW,
575};
576#endif
577
578#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
579static struct resource bfin_twi0_resource[] = {
580 [0] = {
581 .start = TWI0_REGBASE,
582 .end = TWI0_REGBASE,
583 .flags = IORESOURCE_MEM,
584 },
585 [1] = {
586 .start = IRQ_TWI,
587 .end = IRQ_TWI,
588 .flags = IORESOURCE_IRQ,
589 },
590};
591
592static struct platform_device i2c_bfin_twi_device = {
593 .name = "i2c-bfin-twi",
594 .id = 0,
595 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
596 .resource = bfin_twi0_resource,
597};
598#endif
599
600static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
601#if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
602 {
603 I2C_BOARD_INFO("ad7160", 0x33),
604 .irq = IRQ_PH1,
605 .platform_data = (void *)&bfin_ad7160_ts_info,
606 },
607#endif
608};
609
610#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
611#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
612static struct resource bfin_sport0_uart_resources[] = {
613 {
614 .start = SPORT0_TCR1,
615 .end = SPORT0_MRCS3+4,
616 .flags = IORESOURCE_MEM,
617 },
618 {
619 .start = IRQ_SPORT0_RX,
620 .end = IRQ_SPORT0_RX+1,
621 .flags = IORESOURCE_IRQ,
622 },
623 {
624 .start = IRQ_SPORT0_ERROR,
625 .end = IRQ_SPORT0_ERROR,
626 .flags = IORESOURCE_IRQ,
627 },
628};
629
630unsigned short bfin_sport0_peripherals[] = {
631 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
632 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
633};
634
635static struct platform_device bfin_sport0_uart_device = {
636 .name = "bfin-sport-uart",
637 .id = 0,
638 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
639 .resource = bfin_sport0_uart_resources,
640 .dev = {
641 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
642 },
643};
644#endif
645#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
646static struct resource bfin_sport1_uart_resources[] = {
647 {
648 .start = SPORT1_TCR1,
649 .end = SPORT1_MRCS3+4,
650 .flags = IORESOURCE_MEM,
651 },
652 {
653 .start = IRQ_SPORT1_RX,
654 .end = IRQ_SPORT1_RX+1,
655 .flags = IORESOURCE_IRQ,
656 },
657 {
658 .start = IRQ_SPORT1_ERROR,
659 .end = IRQ_SPORT1_ERROR,
660 .flags = IORESOURCE_IRQ,
661 },
662};
663
664unsigned short bfin_sport1_peripherals[] = {
665 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
666 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
667};
668
669static struct platform_device bfin_sport1_uart_device = {
670 .name = "bfin-sport-uart",
671 .id = 1,
672 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
673 .resource = bfin_sport1_uart_resources,
674 .dev = {
675 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
676 },
677};
678#endif
679#endif
680
681#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
682#include <asm/bfin_rotary.h>
683
684static struct bfin_rotary_platform_data bfin_rotary_data = {
685 /*.rotary_up_key = KEY_UP,*/
686 /*.rotary_down_key = KEY_DOWN,*/
687 .rotary_rel_code = REL_WHEEL,
688 .rotary_button_key = KEY_ENTER,
689 .debounce = 10, /* 0..17 */
690 .mode = ROT_QUAD_ENC | ROT_DEBE,
691};
692
693static struct resource bfin_rotary_resources[] = {
694 {
695 .start = IRQ_CNT,
696 .end = IRQ_CNT,
697 .flags = IORESOURCE_IRQ,
698 },
699};
700
701static struct platform_device bfin_rotary_device = {
702 .name = "bfin-rotary",
703 .id = -1,
704 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
705 .resource = bfin_rotary_resources,
706 .dev = {
707 .platform_data = &bfin_rotary_data,
708 },
709};
710#endif
711
712static const unsigned int cclk_vlev_datasheet[] = {
713 VRPAIR(VLEV_100, 400000000),
714 VRPAIR(VLEV_105, 426000000),
715 VRPAIR(VLEV_110, 500000000),
716 VRPAIR(VLEV_115, 533000000),
717 VRPAIR(VLEV_120, 600000000),
718};
719
720static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
721 .tuple_tab = cclk_vlev_datasheet,
722 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
723 .vr_settling_time = 25 /* us */,
724};
725
726static struct platform_device bfin_dpmc = {
727 .name = "bfin dpmc",
728 .dev = {
729 .platform_data = &bfin_dmpc_vreg_data,
730 },
731};
732
733static struct platform_device *stamp_devices[] __initdata = {
734
735 &bfin_dpmc,
736
737#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
738 &bf5xx_nand_device,
739#endif
740
741#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
742 &rtc_device,
743#endif
744
745#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
746 &musb_device,
747#endif
748
749#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
750 &bfin_mii_bus,
751 &bfin_mac_device,
752#endif
753
754#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
755 &bfin_spi0_device,
756#endif
757
758#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
759#ifdef CONFIG_SERIAL_BFIN_UART0
760 &bfin_uart0_device,
761#endif
762#ifdef CONFIG_SERIAL_BFIN_UART1
763 &bfin_uart1_device,
764#endif
765#endif
766
767#if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
768 &bf52x_ra158z_device,
769#endif
770
771#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
772#ifdef CONFIG_BFIN_SIR0
773 &bfin_sir0_device,
774#endif
775#ifdef CONFIG_BFIN_SIR1
776 &bfin_sir1_device,
777#endif
778#endif
779
780#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
781 &i2c_bfin_twi_device,
782#endif
783
784#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
785#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
786 &bfin_sport0_uart_device,
787#endif
788#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
789 &bfin_sport1_uart_device,
790#endif
791#endif
792
793#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
794 &bfin_rotary_device,
795#endif
796
797#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
798 &ad7160eval_flash_device,
799#endif
800
801#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
802 &bfin_i2s,
803#endif
804
805#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
806 &bfin_tdm,
807#endif
808};
809
810static int __init ad7160eval_init(void)
811{
812 printk(KERN_INFO "%s(): registering device resources\n", __func__);
813 i2c_register_board_info(0, bfin_i2c_board_info,
814 ARRAY_SIZE(bfin_i2c_board_info));
815 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
816 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
817 return 0;
818}
819
820arch_initcall(ad7160eval_init);
821
822static struct platform_device *ad7160eval_early_devices[] __initdata = {
823#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
824#ifdef CONFIG_SERIAL_BFIN_UART0
825 &bfin_uart0_device,
826#endif
827#ifdef CONFIG_SERIAL_BFIN_UART1
828 &bfin_uart1_device,
829#endif
830#endif
831
832#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
833#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
834 &bfin_sport0_uart_device,
835#endif
836#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
837 &bfin_sport1_uart_device,
838#endif
839#endif
840};
841
842void __init native_machine_early_platform_add_devices(void)
843{
844 printk(KERN_INFO "register early platform devices\n");
845 early_platform_add_devices(ad7160eval_early_devices,
846 ARRAY_SIZE(ad7160eval_early_devices));
847}
848
849void native_machine_restart(char *cmd)
850{
851 /* workaround reboot hang when booting from SPI */
852 if ((bfin_read_SYSCR() & 0x7) == 0x3)
853 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
854}
855
856void bfin_get_ether_addr(char *addr)
857{
858 /* the MAC is stored in OTP memory page 0xDF */
859 u32 ret;
860 u64 otp_mac;
861 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
862
863 ret = otp_read(0xDF, 0x00, &otp_mac);
864 if (!(ret & 0x1)) {
865 char *otp_mac_p = (char *)&otp_mac;
866 for (ret = 0; ret < 6; ++ret)
867 addr[ret] = otp_mac_p[5 - ret];
868 }
869}
870EXPORT_SYMBOL(bfin_get_ether_addr);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 06:57:12 -0500