diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.c | 59 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomains.h | 54 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/clockdomain.h | 24 |
3 files changed, 72 insertions, 65 deletions
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 4c3ce9cfd948..e9b4f6c564e4 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/limits.h> | 24 | #include <linux/limits.h> |
25 | #include <linux/err.h> | ||
25 | 26 | ||
26 | #include <linux/io.h> | 27 | #include <linux/io.h> |
27 | 28 | ||
@@ -71,14 +72,14 @@ static void _autodep_lookup(struct clkdm_pwrdm_autodep *autodep) | |||
71 | if (!omap_chip_is(autodep->omap_chip)) | 72 | if (!omap_chip_is(autodep->omap_chip)) |
72 | return; | 73 | return; |
73 | 74 | ||
74 | pwrdm = pwrdm_lookup(autodep->pwrdm_name); | 75 | pwrdm = pwrdm_lookup(autodep->pwrdm.name); |
75 | if (!pwrdm) { | 76 | if (!pwrdm) { |
76 | pr_debug("clockdomain: _autodep_lookup: powerdomain %s " | 77 | pr_debug("clockdomain: _autodep_lookup: powerdomain %s " |
77 | "does not exist\n", autodep->pwrdm_name); | 78 | "does not exist\n", autodep->pwrdm.name); |
78 | WARN_ON(1); | 79 | WARN_ON(1); |
79 | return; | 80 | pwrdm = ERR_PTR(-ENOENT); |
80 | } | 81 | } |
81 | autodep->pwrdm = pwrdm; | 82 | autodep->pwrdm.ptr = pwrdm; |
82 | 83 | ||
83 | return; | 84 | return; |
84 | } | 85 | } |
@@ -95,16 +96,16 @@ static void _clkdm_add_autodeps(struct clockdomain *clkdm) | |||
95 | { | 96 | { |
96 | struct clkdm_pwrdm_autodep *autodep; | 97 | struct clkdm_pwrdm_autodep *autodep; |
97 | 98 | ||
98 | for (autodep = autodeps; autodep->pwrdm_name; autodep++) { | 99 | for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) { |
99 | if (!autodep->pwrdm) | 100 | if (IS_ERR(autodep->pwrdm.ptr)) |
100 | continue; | 101 | continue; |
101 | 102 | ||
102 | pr_debug("clockdomain: adding %s sleepdep/wkdep for " | 103 | pr_debug("clockdomain: adding %s sleepdep/wkdep for " |
103 | "pwrdm %s\n", autodep->pwrdm_name, | 104 | "pwrdm %s\n", autodep->pwrdm.ptr->name, |
104 | clkdm->pwrdm->name); | 105 | clkdm->pwrdm.ptr->name); |
105 | 106 | ||
106 | pwrdm_add_sleepdep(clkdm->pwrdm, autodep->pwrdm); | 107 | pwrdm_add_sleepdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); |
107 | pwrdm_add_wkdep(clkdm->pwrdm, autodep->pwrdm); | 108 | pwrdm_add_wkdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); |
108 | } | 109 | } |
109 | } | 110 | } |
110 | 111 | ||
@@ -120,16 +121,16 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm) | |||
120 | { | 121 | { |
121 | struct clkdm_pwrdm_autodep *autodep; | 122 | struct clkdm_pwrdm_autodep *autodep; |
122 | 123 | ||
123 | for (autodep = autodeps; autodep->pwrdm_name; autodep++) { | 124 | for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) { |
124 | if (!autodep->pwrdm) | 125 | if (IS_ERR(autodep->pwrdm.ptr)) |
125 | continue; | 126 | continue; |
126 | 127 | ||
127 | pr_debug("clockdomain: removing %s sleepdep/wkdep for " | 128 | pr_debug("clockdomain: removing %s sleepdep/wkdep for " |
128 | "pwrdm %s\n", autodep->pwrdm_name, | 129 | "pwrdm %s\n", autodep->pwrdm.ptr->name, |
129 | clkdm->pwrdm->name); | 130 | clkdm->pwrdm.ptr->name); |
130 | 131 | ||
131 | pwrdm_del_sleepdep(clkdm->pwrdm, autodep->pwrdm); | 132 | pwrdm_del_sleepdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); |
132 | pwrdm_del_wkdep(clkdm->pwrdm, autodep->pwrdm); | 133 | pwrdm_del_wkdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); |
133 | } | 134 | } |
134 | } | 135 | } |
135 | 136 | ||
@@ -179,7 +180,7 @@ void clkdm_init(struct clockdomain **clkdms, | |||
179 | 180 | ||
180 | autodeps = init_autodeps; | 181 | autodeps = init_autodeps; |
181 | if (autodeps) | 182 | if (autodeps) |
182 | for (autodep = autodeps; autodep->pwrdm_name; autodep++) | 183 | for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) |
183 | _autodep_lookup(autodep); | 184 | _autodep_lookup(autodep); |
184 | } | 185 | } |
185 | 186 | ||
@@ -202,13 +203,13 @@ int clkdm_register(struct clockdomain *clkdm) | |||
202 | if (!omap_chip_is(clkdm->omap_chip)) | 203 | if (!omap_chip_is(clkdm->omap_chip)) |
203 | return -EINVAL; | 204 | return -EINVAL; |
204 | 205 | ||
205 | pwrdm = pwrdm_lookup(clkdm->pwrdm_name); | 206 | pwrdm = pwrdm_lookup(clkdm->pwrdm.name); |
206 | if (!pwrdm) { | 207 | if (!pwrdm) { |
207 | pr_debug("clockdomain: clkdm_register %s: powerdomain %s " | 208 | pr_debug("clockdomain: clkdm_register %s: powerdomain %s " |
208 | "does not exist\n", clkdm->name, clkdm->pwrdm_name); | 209 | "does not exist\n", clkdm->name, clkdm->pwrdm.name); |
209 | return -EINVAL; | 210 | return -EINVAL; |
210 | } | 211 | } |
211 | clkdm->pwrdm = pwrdm; | 212 | clkdm->pwrdm.ptr = pwrdm; |
212 | 213 | ||
213 | mutex_lock(&clkdm_mutex); | 214 | mutex_lock(&clkdm_mutex); |
214 | /* Verify that the clockdomain is not already registered */ | 215 | /* Verify that the clockdomain is not already registered */ |
@@ -242,7 +243,7 @@ int clkdm_unregister(struct clockdomain *clkdm) | |||
242 | if (!clkdm) | 243 | if (!clkdm) |
243 | return -EINVAL; | 244 | return -EINVAL; |
244 | 245 | ||
245 | pwrdm_del_clkdm(clkdm->pwrdm, clkdm); | 246 | pwrdm_del_clkdm(clkdm->pwrdm.ptr, clkdm); |
246 | 247 | ||
247 | mutex_lock(&clkdm_mutex); | 248 | mutex_lock(&clkdm_mutex); |
248 | list_del(&clkdm->node); | 249 | list_del(&clkdm->node); |
@@ -327,7 +328,7 @@ struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm) | |||
327 | if (!clkdm) | 328 | if (!clkdm) |
328 | return NULL; | 329 | return NULL; |
329 | 330 | ||
330 | return clkdm->pwrdm; | 331 | return clkdm->pwrdm.ptr; |
331 | } | 332 | } |
332 | 333 | ||
333 | 334 | ||
@@ -348,7 +349,7 @@ static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm) | |||
348 | if (!clkdm) | 349 | if (!clkdm) |
349 | return -EINVAL; | 350 | return -EINVAL; |
350 | 351 | ||
351 | v = cm_read_mod_reg(clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); | 352 | v = cm_read_mod_reg(clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); |
352 | v &= clkdm->clktrctrl_mask; | 353 | v &= clkdm->clktrctrl_mask; |
353 | v >>= __ffs(clkdm->clktrctrl_mask); | 354 | v >>= __ffs(clkdm->clktrctrl_mask); |
354 | 355 | ||
@@ -380,7 +381,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm) | |||
380 | if (cpu_is_omap24xx()) { | 381 | if (cpu_is_omap24xx()) { |
381 | 382 | ||
382 | cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, | 383 | cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, |
383 | clkdm->pwrdm->prcm_offs, PM_PWSTCTRL); | 384 | clkdm->pwrdm.ptr->prcm_offs, PM_PWSTCTRL); |
384 | 385 | ||
385 | } else if (cpu_is_omap34xx()) { | 386 | } else if (cpu_is_omap34xx()) { |
386 | 387 | ||
@@ -388,7 +389,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm) | |||
388 | __ffs(clkdm->clktrctrl_mask)); | 389 | __ffs(clkdm->clktrctrl_mask)); |
389 | 390 | ||
390 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, | 391 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, |
391 | clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); | 392 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); |
392 | 393 | ||
393 | } else { | 394 | } else { |
394 | BUG(); | 395 | BUG(); |
@@ -422,7 +423,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |||
422 | if (cpu_is_omap24xx()) { | 423 | if (cpu_is_omap24xx()) { |
423 | 424 | ||
424 | cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, | 425 | cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, |
425 | clkdm->pwrdm->prcm_offs, PM_PWSTCTRL); | 426 | clkdm->pwrdm.ptr->prcm_offs, PM_PWSTCTRL); |
426 | 427 | ||
427 | } else if (cpu_is_omap34xx()) { | 428 | } else if (cpu_is_omap34xx()) { |
428 | 429 | ||
@@ -430,7 +431,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |||
430 | __ffs(clkdm->clktrctrl_mask)); | 431 | __ffs(clkdm->clktrctrl_mask)); |
431 | 432 | ||
432 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, | 433 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, |
433 | clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); | 434 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); |
434 | 435 | ||
435 | } else { | 436 | } else { |
436 | BUG(); | 437 | BUG(); |
@@ -478,7 +479,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |||
478 | 479 | ||
479 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | 480 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, |
480 | v << __ffs(clkdm->clktrctrl_mask), | 481 | v << __ffs(clkdm->clktrctrl_mask), |
481 | clkdm->pwrdm->prcm_offs, | 482 | clkdm->pwrdm.ptr->prcm_offs, |
482 | CM_CLKSTCTRL); | 483 | CM_CLKSTCTRL); |
483 | } | 484 | } |
484 | 485 | ||
@@ -516,7 +517,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm) | |||
516 | 517 | ||
517 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | 518 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, |
518 | v << __ffs(clkdm->clktrctrl_mask), | 519 | v << __ffs(clkdm->clktrctrl_mask), |
519 | clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); | 520 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); |
520 | 521 | ||
521 | if (atomic_read(&clkdm->usecount) > 0) | 522 | if (atomic_read(&clkdm->usecount) > 0) |
522 | _clkdm_del_autodeps(clkdm); | 523 | _clkdm_del_autodeps(clkdm); |
diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h index cd86dcc7b424..e17c3693542c 100644 --- a/arch/arm/mach-omap2/clockdomains.h +++ b/arch/arm/mach-omap2/clockdomains.h | |||
@@ -19,7 +19,7 @@ | |||
19 | /* This is an implicit clockdomain - it is never defined as such in TRM */ | 19 | /* This is an implicit clockdomain - it is never defined as such in TRM */ |
20 | static struct clockdomain wkup_clkdm = { | 20 | static struct clockdomain wkup_clkdm = { |
21 | .name = "wkup_clkdm", | 21 | .name = "wkup_clkdm", |
22 | .pwrdm_name = "wkup_pwrdm", | 22 | .pwrdm = { .name = "wkup_pwrdm" }, |
23 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), | 23 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), |
24 | }; | 24 | }; |
25 | 25 | ||
@@ -31,7 +31,7 @@ static struct clockdomain wkup_clkdm = { | |||
31 | 31 | ||
32 | static struct clockdomain mpu_2420_clkdm = { | 32 | static struct clockdomain mpu_2420_clkdm = { |
33 | .name = "mpu_clkdm", | 33 | .name = "mpu_clkdm", |
34 | .pwrdm_name = "mpu_pwrdm", | 34 | .pwrdm = { .name = "mpu_pwrdm" }, |
35 | .flags = CLKDM_CAN_HWSUP, | 35 | .flags = CLKDM_CAN_HWSUP, |
36 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, | 36 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, |
37 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | 37 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), |
@@ -39,7 +39,7 @@ static struct clockdomain mpu_2420_clkdm = { | |||
39 | 39 | ||
40 | static struct clockdomain iva1_2420_clkdm = { | 40 | static struct clockdomain iva1_2420_clkdm = { |
41 | .name = "iva1_clkdm", | 41 | .name = "iva1_clkdm", |
42 | .pwrdm_name = "dsp_pwrdm", | 42 | .pwrdm = { .name = "dsp_pwrdm" }, |
43 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 43 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
44 | .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, | 44 | .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, |
45 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | 45 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), |
@@ -56,7 +56,7 @@ static struct clockdomain iva1_2420_clkdm = { | |||
56 | 56 | ||
57 | static struct clockdomain mpu_2430_clkdm = { | 57 | static struct clockdomain mpu_2430_clkdm = { |
58 | .name = "mpu_clkdm", | 58 | .name = "mpu_clkdm", |
59 | .pwrdm_name = "mpu_pwrdm", | 59 | .pwrdm = { .name = "mpu_pwrdm" }, |
60 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 60 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
61 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, | 61 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, |
62 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | 62 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), |
@@ -64,7 +64,7 @@ static struct clockdomain mpu_2430_clkdm = { | |||
64 | 64 | ||
65 | static struct clockdomain mdm_clkdm = { | 65 | static struct clockdomain mdm_clkdm = { |
66 | .name = "mdm_clkdm", | 66 | .name = "mdm_clkdm", |
67 | .pwrdm_name = "mdm_pwrdm", | 67 | .pwrdm = { .name = "mdm_pwrdm" }, |
68 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 68 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
69 | .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK, | 69 | .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK, |
70 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | 70 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), |
@@ -81,7 +81,7 @@ static struct clockdomain mdm_clkdm = { | |||
81 | 81 | ||
82 | static struct clockdomain dsp_clkdm = { | 82 | static struct clockdomain dsp_clkdm = { |
83 | .name = "dsp_clkdm", | 83 | .name = "dsp_clkdm", |
84 | .pwrdm_name = "dsp_pwrdm", | 84 | .pwrdm = { .name = "dsp_pwrdm" }, |
85 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 85 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
86 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, | 86 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, |
87 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | 87 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), |
@@ -89,7 +89,7 @@ static struct clockdomain dsp_clkdm = { | |||
89 | 89 | ||
90 | static struct clockdomain gfx_24xx_clkdm = { | 90 | static struct clockdomain gfx_24xx_clkdm = { |
91 | .name = "gfx_clkdm", | 91 | .name = "gfx_clkdm", |
92 | .pwrdm_name = "gfx_pwrdm", | 92 | .pwrdm = { .name = "gfx_pwrdm" }, |
93 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 93 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
94 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, | 94 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, |
95 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | 95 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), |
@@ -97,7 +97,7 @@ static struct clockdomain gfx_24xx_clkdm = { | |||
97 | 97 | ||
98 | static struct clockdomain core_l3_24xx_clkdm = { | 98 | static struct clockdomain core_l3_24xx_clkdm = { |
99 | .name = "core_l3_clkdm", | 99 | .name = "core_l3_clkdm", |
100 | .pwrdm_name = "core_pwrdm", | 100 | .pwrdm = { .name = "core_pwrdm" }, |
101 | .flags = CLKDM_CAN_HWSUP, | 101 | .flags = CLKDM_CAN_HWSUP, |
102 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, | 102 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, |
103 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | 103 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), |
@@ -105,7 +105,7 @@ static struct clockdomain core_l3_24xx_clkdm = { | |||
105 | 105 | ||
106 | static struct clockdomain core_l4_24xx_clkdm = { | 106 | static struct clockdomain core_l4_24xx_clkdm = { |
107 | .name = "core_l4_clkdm", | 107 | .name = "core_l4_clkdm", |
108 | .pwrdm_name = "core_pwrdm", | 108 | .pwrdm = { .name = "core_pwrdm" }, |
109 | .flags = CLKDM_CAN_HWSUP, | 109 | .flags = CLKDM_CAN_HWSUP, |
110 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, | 110 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, |
111 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | 111 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), |
@@ -113,7 +113,7 @@ static struct clockdomain core_l4_24xx_clkdm = { | |||
113 | 113 | ||
114 | static struct clockdomain dss_24xx_clkdm = { | 114 | static struct clockdomain dss_24xx_clkdm = { |
115 | .name = "dss_clkdm", | 115 | .name = "dss_clkdm", |
116 | .pwrdm_name = "core_pwrdm", | 116 | .pwrdm = { .name = "core_pwrdm" }, |
117 | .flags = CLKDM_CAN_HWSUP, | 117 | .flags = CLKDM_CAN_HWSUP, |
118 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, | 118 | .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, |
119 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | 119 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), |
@@ -130,7 +130,7 @@ static struct clockdomain dss_24xx_clkdm = { | |||
130 | 130 | ||
131 | static struct clockdomain mpu_34xx_clkdm = { | 131 | static struct clockdomain mpu_34xx_clkdm = { |
132 | .name = "mpu_clkdm", | 132 | .name = "mpu_clkdm", |
133 | .pwrdm_name = "mpu_pwrdm", | 133 | .pwrdm = { .name = "mpu_pwrdm" }, |
134 | .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP, | 134 | .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP, |
135 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK, | 135 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK, |
136 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 136 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -138,7 +138,7 @@ static struct clockdomain mpu_34xx_clkdm = { | |||
138 | 138 | ||
139 | static struct clockdomain neon_clkdm = { | 139 | static struct clockdomain neon_clkdm = { |
140 | .name = "neon_clkdm", | 140 | .name = "neon_clkdm", |
141 | .pwrdm_name = "neon_pwrdm", | 141 | .pwrdm = { .name = "neon_pwrdm" }, |
142 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 142 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
143 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK, | 143 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK, |
144 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 144 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -146,7 +146,7 @@ static struct clockdomain neon_clkdm = { | |||
146 | 146 | ||
147 | static struct clockdomain iva2_clkdm = { | 147 | static struct clockdomain iva2_clkdm = { |
148 | .name = "iva2_clkdm", | 148 | .name = "iva2_clkdm", |
149 | .pwrdm_name = "iva2_pwrdm", | 149 | .pwrdm = { .name = "iva2_pwrdm" }, |
150 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 150 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
151 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, | 151 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, |
152 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 152 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -154,7 +154,7 @@ static struct clockdomain iva2_clkdm = { | |||
154 | 154 | ||
155 | static struct clockdomain gfx_3430es1_clkdm = { | 155 | static struct clockdomain gfx_3430es1_clkdm = { |
156 | .name = "gfx_clkdm", | 156 | .name = "gfx_clkdm", |
157 | .pwrdm_name = "gfx_pwrdm", | 157 | .pwrdm = { .name = "gfx_pwrdm" }, |
158 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 158 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
159 | .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK, | 159 | .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK, |
160 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1), | 160 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1), |
@@ -162,7 +162,7 @@ static struct clockdomain gfx_3430es1_clkdm = { | |||
162 | 162 | ||
163 | static struct clockdomain sgx_clkdm = { | 163 | static struct clockdomain sgx_clkdm = { |
164 | .name = "sgx_clkdm", | 164 | .name = "sgx_clkdm", |
165 | .pwrdm_name = "sgx_pwrdm", | 165 | .pwrdm = { .name = "sgx_pwrdm" }, |
166 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 166 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
167 | .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK, | 167 | .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK, |
168 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), | 168 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), |
@@ -177,7 +177,7 @@ static struct clockdomain sgx_clkdm = { | |||
177 | */ | 177 | */ |
178 | static struct clockdomain d2d_clkdm = { | 178 | static struct clockdomain d2d_clkdm = { |
179 | .name = "d2d_clkdm", | 179 | .name = "d2d_clkdm", |
180 | .pwrdm_name = "core_pwrdm", | 180 | .pwrdm = { .name = "core_pwrdm" }, |
181 | .flags = CLKDM_CAN_HWSUP, | 181 | .flags = CLKDM_CAN_HWSUP, |
182 | .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK, | 182 | .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK, |
183 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 183 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -185,7 +185,7 @@ static struct clockdomain d2d_clkdm = { | |||
185 | 185 | ||
186 | static struct clockdomain core_l3_34xx_clkdm = { | 186 | static struct clockdomain core_l3_34xx_clkdm = { |
187 | .name = "core_l3_clkdm", | 187 | .name = "core_l3_clkdm", |
188 | .pwrdm_name = "core_pwrdm", | 188 | .pwrdm = { .name = "core_pwrdm" }, |
189 | .flags = CLKDM_CAN_HWSUP, | 189 | .flags = CLKDM_CAN_HWSUP, |
190 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK, | 190 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK, |
191 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 191 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -193,7 +193,7 @@ static struct clockdomain core_l3_34xx_clkdm = { | |||
193 | 193 | ||
194 | static struct clockdomain core_l4_34xx_clkdm = { | 194 | static struct clockdomain core_l4_34xx_clkdm = { |
195 | .name = "core_l4_clkdm", | 195 | .name = "core_l4_clkdm", |
196 | .pwrdm_name = "core_pwrdm", | 196 | .pwrdm = { .name = "core_pwrdm" }, |
197 | .flags = CLKDM_CAN_HWSUP, | 197 | .flags = CLKDM_CAN_HWSUP, |
198 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK, | 198 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK, |
199 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 199 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -201,7 +201,7 @@ static struct clockdomain core_l4_34xx_clkdm = { | |||
201 | 201 | ||
202 | static struct clockdomain dss_34xx_clkdm = { | 202 | static struct clockdomain dss_34xx_clkdm = { |
203 | .name = "dss_clkdm", | 203 | .name = "dss_clkdm", |
204 | .pwrdm_name = "dss_pwrdm", | 204 | .pwrdm = { .name = "dss_pwrdm" }, |
205 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 205 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
206 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK, | 206 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK, |
207 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 207 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -209,7 +209,7 @@ static struct clockdomain dss_34xx_clkdm = { | |||
209 | 209 | ||
210 | static struct clockdomain cam_clkdm = { | 210 | static struct clockdomain cam_clkdm = { |
211 | .name = "cam_clkdm", | 211 | .name = "cam_clkdm", |
212 | .pwrdm_name = "cam_pwrdm", | 212 | .pwrdm = { .name = "cam_pwrdm" }, |
213 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 213 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
214 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK, | 214 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK, |
215 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 215 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -217,7 +217,7 @@ static struct clockdomain cam_clkdm = { | |||
217 | 217 | ||
218 | static struct clockdomain usbhost_clkdm = { | 218 | static struct clockdomain usbhost_clkdm = { |
219 | .name = "usbhost_clkdm", | 219 | .name = "usbhost_clkdm", |
220 | .pwrdm_name = "usbhost_pwrdm", | 220 | .pwrdm = { .name = "usbhost_pwrdm" }, |
221 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 221 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
222 | .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK, | 222 | .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK, |
223 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), | 223 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), |
@@ -225,7 +225,7 @@ static struct clockdomain usbhost_clkdm = { | |||
225 | 225 | ||
226 | static struct clockdomain per_clkdm = { | 226 | static struct clockdomain per_clkdm = { |
227 | .name = "per_clkdm", | 227 | .name = "per_clkdm", |
228 | .pwrdm_name = "per_pwrdm", | 228 | .pwrdm = { .name = "per_pwrdm" }, |
229 | .flags = CLKDM_CAN_HWSUP_SWSUP, | 229 | .flags = CLKDM_CAN_HWSUP_SWSUP, |
230 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK, | 230 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK, |
231 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 231 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -233,7 +233,7 @@ static struct clockdomain per_clkdm = { | |||
233 | 233 | ||
234 | static struct clockdomain emu_clkdm = { | 234 | static struct clockdomain emu_clkdm = { |
235 | .name = "emu_clkdm", | 235 | .name = "emu_clkdm", |
236 | .pwrdm_name = "emu_pwrdm", | 236 | .pwrdm = { .name = "emu_pwrdm" }, |
237 | .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP, | 237 | .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP, |
238 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK, | 238 | .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK, |
239 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | 239 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), |
@@ -247,14 +247,16 @@ static struct clockdomain emu_clkdm = { | |||
247 | 247 | ||
248 | static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { | 248 | static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { |
249 | { | 249 | { |
250 | .pwrdm_name = "mpu_pwrdm", | 250 | .pwrdm = { .name = "mpu_pwrdm" }, |
251 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) | 251 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) |
252 | }, | 252 | }, |
253 | { | 253 | { |
254 | .pwrdm_name = "iva2_pwrdm", | 254 | .pwrdm = { .name = "iva2_pwrdm" }, |
255 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) | 255 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) |
256 | }, | 256 | }, |
257 | { NULL } | 257 | { |
258 | .pwrdm = { .name = NULL }, | ||
259 | } | ||
258 | }; | 260 | }; |
259 | 261 | ||
260 | /* | 262 | /* |
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h index 1f51f0173784..b9d0dd2da89b 100644 --- a/arch/arm/plat-omap/include/mach/clockdomain.h +++ b/arch/arm/plat-omap/include/mach/clockdomain.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-omap/clockdomain.h | 2 | * arch/arm/plat-omap/include/mach/clockdomain.h |
3 | * | 3 | * |
4 | * OMAP2/3 clockdomain framework functions | 4 | * OMAP2/3 clockdomain framework functions |
5 | * | 5 | * |
@@ -48,11 +48,13 @@ | |||
48 | */ | 48 | */ |
49 | struct clkdm_pwrdm_autodep { | 49 | struct clkdm_pwrdm_autodep { |
50 | 50 | ||
51 | /* Name of the powerdomain to add a wkdep/sleepdep on */ | 51 | union { |
52 | const char *pwrdm_name; | 52 | /* Name of the powerdomain to add a wkdep/sleepdep on */ |
53 | const char *name; | ||
53 | 54 | ||
54 | /* Powerdomain pointer (looked up at clkdm_init() time) */ | 55 | /* Powerdomain pointer (looked up at clkdm_init() time) */ |
55 | struct powerdomain *pwrdm; | 56 | struct powerdomain *ptr; |
57 | } pwrdm; | ||
56 | 58 | ||
57 | /* OMAP chip types that this clockdomain dep is valid on */ | 59 | /* OMAP chip types that this clockdomain dep is valid on */ |
58 | const struct omap_chip_id omap_chip; | 60 | const struct omap_chip_id omap_chip; |
@@ -64,8 +66,13 @@ struct clockdomain { | |||
64 | /* Clockdomain name */ | 66 | /* Clockdomain name */ |
65 | const char *name; | 67 | const char *name; |
66 | 68 | ||
67 | /* Powerdomain enclosing this clockdomain */ | 69 | union { |
68 | const char *pwrdm_name; | 70 | /* Powerdomain enclosing this clockdomain */ |
71 | const char *name; | ||
72 | |||
73 | /* Powerdomain pointer assigned at clkdm_register() */ | ||
74 | struct powerdomain *ptr; | ||
75 | } pwrdm; | ||
69 | 76 | ||
70 | /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */ | 77 | /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */ |
71 | const u16 clktrctrl_mask; | 78 | const u16 clktrctrl_mask; |
@@ -79,9 +86,6 @@ struct clockdomain { | |||
79 | /* Usecount tracking */ | 86 | /* Usecount tracking */ |
80 | atomic_t usecount; | 87 | atomic_t usecount; |
81 | 88 | ||
82 | /* Powerdomain pointer assigned at clkdm_register() */ | ||
83 | struct powerdomain *pwrdm; | ||
84 | |||
85 | struct list_head node; | 89 | struct list_head node; |
86 | 90 | ||
87 | }; | 91 | }; |