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-rw-r--r--arch/ia64/sn/pci/tioca_provider.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 2234d61cdd4b..54a0dd447e76 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -171,15 +171,15 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
171 * use agp op-combining 171 * use agp op-combining
172 * use GET semantics to fetch memory 172 * use GET semantics to fetch memory
173 * participate in coherency domain 173 * participate in coherency domain
174 * prefetch TLB entries 174 * DISABLE GART PREFETCHING due to hw bug tracked in SGI PV930029
175 */ 175 */
176 176
177 ca_base->ca_control1 |= CA_AGPDMA_OP_ENB_COMBDELAY; /* PV895469 ? */ 177 ca_base->ca_control1 |= CA_AGPDMA_OP_ENB_COMBDELAY; /* PV895469 ? */
178 ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM); 178 ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
179 ca_base->ca_control2 |= (0x2ull << CA_GART_MEM_PARAM_SHFT); 179 ca_base->ca_control2 |= (0x2ull << CA_GART_MEM_PARAM_SHFT);
180 tioca_kern->ca_gart_iscoherent = 1; 180 tioca_kern->ca_gart_iscoherent = 1;
181 ca_base->ca_control2 |= 181 ca_base->ca_control2 &=
182 (CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB); 182 ~(CA_GART_WR_PREFETCH_ENB | CA_GART_RD_PREFETCH_ENB);
183 183
184 /* 184 /*
185 * Unmask GART fetch error interrupts. Clear residual errors first. 185 * Unmask GART fetch error interrupts. Clear residual errors first.