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-rw-r--r--arch/arm/mm/mm-armv.c2
-rw-r--r--arch/i386/kernel/msr.c9
-rw-r--r--arch/i386/mach-voyager/voyager_smp.c6
-rw-r--r--arch/i386/mm/pgtable.c14
-rw-r--r--arch/ia64/Kconfig5
-rw-r--r--arch/s390/appldata/appldata_base.c1
-rw-r--r--arch/s390/appldata/appldata_mem.c23
-rw-r--r--arch/sparc/kernel/ioport.c17
-rw-r--r--arch/sparc/kernel/of_device.c477
-rw-r--r--arch/sparc/kernel/prom.c30
-rw-r--r--arch/sparc/kernel/sys_sunos.c2
-rw-r--r--arch/sparc/kernel/time.c109
-rw-r--r--arch/sparc64/kernel/auxio.c78
-rw-r--r--arch/sparc64/kernel/ebus.c150
-rw-r--r--arch/sparc64/kernel/irq.c4
-rw-r--r--arch/sparc64/kernel/isa.c101
-rw-r--r--arch/sparc64/kernel/of_device.c689
-rw-r--r--arch/sparc64/kernel/pci.c8
-rw-r--r--arch/sparc64/kernel/pci_common.c291
-rw-r--r--arch/sparc64/kernel/pci_psycho.c165
-rw-r--r--arch/sparc64/kernel/pci_sabre.c158
-rw-r--r--arch/sparc64/kernel/pci_schizo.c311
-rw-r--r--arch/sparc64/kernel/pci_sun4v.c10
-rw-r--r--arch/sparc64/kernel/power.c59
-rw-r--r--arch/sparc64/kernel/prom.c787
-rw-r--r--arch/sparc64/kernel/sbus.c6
-rw-r--r--arch/sparc64/kernel/starfire.c4
-rw-r--r--arch/sparc64/kernel/sys_sunos32.c2
-rw-r--r--arch/sparc64/kernel/time.c258
-rw-r--r--arch/sparc64/kernel/unaligned.c4
-rw-r--r--arch/um/Makefile-x86_647
-rw-r--r--arch/um/drivers/stderr_console.c22
-rw-r--r--arch/um/kernel/skas/mmu.c2
-rw-r--r--arch/um/kernel/time.c172
-rw-r--r--arch/um/kernel/time_kern.c32
-rw-r--r--arch/um/kernel/vmlinux.lds.S2
-rw-r--r--arch/um/os-Linux/mem.c21
-rw-r--r--arch/um/sys-i386/sys_call_table.S2
-rw-r--r--arch/um/sys-x86_64/syscall_table.c6
-rw-r--r--arch/x86_64/kernel/functionlist1
40 files changed, 2389 insertions, 1658 deletions
diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c
index 95273de4f772..931be1798122 100644
--- a/arch/arm/mm/mm-armv.c
+++ b/arch/arm/mm/mm-armv.c
@@ -227,7 +227,7 @@ void free_pgd_slow(pgd_t *pgd)
227 227
228 pte = pmd_page(*pmd); 228 pte = pmd_page(*pmd);
229 pmd_clear(pmd); 229 pmd_clear(pmd);
230 dec_page_state(nr_page_table_pages); 230 dec_zone_page_state(virt_to_page((unsigned long *)pgd), NR_PAGETABLE);
231 pte_lock_deinit(pte); 231 pte_lock_deinit(pte);
232 pte_free(pte); 232 pte_free(pte);
233 pmd_free(pmd); 233 pmd_free(pmd);
diff --git a/arch/i386/kernel/msr.c b/arch/i386/kernel/msr.c
index d022cb8fd725..5c29a9fb4a44 100644
--- a/arch/i386/kernel/msr.c
+++ b/arch/i386/kernel/msr.c
@@ -251,7 +251,9 @@ static int msr_class_device_create(int i)
251 return err; 251 return err;
252} 252}
253 253
254static int msr_class_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) 254#ifdef CONFIG_HOTPLUG_CPU
255static int msr_class_cpu_callback(struct notifier_block *nfb,
256 unsigned long action, void *hcpu)
255{ 257{
256 unsigned int cpu = (unsigned long)hcpu; 258 unsigned int cpu = (unsigned long)hcpu;
257 259
@@ -270,6 +272,7 @@ static struct notifier_block __cpuinitdata msr_class_cpu_notifier =
270{ 272{
271 .notifier_call = msr_class_cpu_callback, 273 .notifier_call = msr_class_cpu_callback,
272}; 274};
275#endif
273 276
274static int __init msr_init(void) 277static int __init msr_init(void)
275{ 278{
@@ -292,7 +295,7 @@ static int __init msr_init(void)
292 if (err != 0) 295 if (err != 0)
293 goto out_class; 296 goto out_class;
294 } 297 }
295 register_cpu_notifier(&msr_class_cpu_notifier); 298 register_hotcpu_notifier(&msr_class_cpu_notifier);
296 299
297 err = 0; 300 err = 0;
298 goto out; 301 goto out;
@@ -315,7 +318,7 @@ static void __exit msr_exit(void)
315 class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu)); 318 class_device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
316 class_destroy(msr_class); 319 class_destroy(msr_class);
317 unregister_chrdev(MSR_MAJOR, "cpu/msr"); 320 unregister_chrdev(MSR_MAJOR, "cpu/msr");
318 unregister_cpu_notifier(&msr_class_cpu_notifier); 321 unregister_hotcpu_notifier(&msr_class_cpu_notifier);
319} 322}
320 323
321module_init(msr_init); 324module_init(msr_init);
diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c
index 5b8b579a079f..6e9e494c6c3d 100644
--- a/arch/i386/mach-voyager/voyager_smp.c
+++ b/arch/i386/mach-voyager/voyager_smp.c
@@ -1938,3 +1938,9 @@ smp_cpus_done(unsigned int max_cpus)
1938{ 1938{
1939 zap_low_mappings(); 1939 zap_low_mappings();
1940} 1940}
1941
1942void __init
1943smp_setup_processor_id(void)
1944{
1945 current_thread_info()->cpu = hard_smp_processor_id();
1946}
diff --git a/arch/i386/mm/pgtable.c b/arch/i386/mm/pgtable.c
index 2889567e21a1..5e735ff90e8a 100644
--- a/arch/i386/mm/pgtable.c
+++ b/arch/i386/mm/pgtable.c
@@ -30,7 +30,6 @@ void show_mem(void)
30 struct page *page; 30 struct page *page;
31 pg_data_t *pgdat; 31 pg_data_t *pgdat;
32 unsigned long i; 32 unsigned long i;
33 struct page_state ps;
34 unsigned long flags; 33 unsigned long flags;
35 34
36 printk(KERN_INFO "Mem-info:\n"); 35 printk(KERN_INFO "Mem-info:\n");
@@ -58,12 +57,13 @@ void show_mem(void)
58 printk(KERN_INFO "%d pages shared\n", shared); 57 printk(KERN_INFO "%d pages shared\n", shared);
59 printk(KERN_INFO "%d pages swap cached\n", cached); 58 printk(KERN_INFO "%d pages swap cached\n", cached);
60 59
61 get_page_state(&ps); 60 printk(KERN_INFO "%lu pages dirty\n", global_page_state(NR_FILE_DIRTY));
62 printk(KERN_INFO "%lu pages dirty\n", ps.nr_dirty); 61 printk(KERN_INFO "%lu pages writeback\n",
63 printk(KERN_INFO "%lu pages writeback\n", ps.nr_writeback); 62 global_page_state(NR_WRITEBACK));
64 printk(KERN_INFO "%lu pages mapped\n", ps.nr_mapped); 63 printk(KERN_INFO "%lu pages mapped\n", global_page_state(NR_FILE_MAPPED));
65 printk(KERN_INFO "%lu pages slab\n", ps.nr_slab); 64 printk(KERN_INFO "%lu pages slab\n", global_page_state(NR_SLAB));
66 printk(KERN_INFO "%lu pages pagetables\n", ps.nr_page_table_pages); 65 printk(KERN_INFO "%lu pages pagetables\n",
66 global_page_state(NR_PAGETABLE));
67} 67}
68 68
69/* 69/*
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index b487e227a1f7..47de9ee6bcd6 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -70,6 +70,11 @@ config DMA_IS_DMA32
70 bool 70 bool
71 default y 71 default y
72 72
73config DMA_IS_NORMAL
74 bool
75 depends on IA64_SGI_SN2
76 default y
77
73choice 78choice
74 prompt "System type" 79 prompt "System type"
75 default IA64_GENERIC 80 default IA64_GENERIC
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 61bc44626c04..2476ca739c1e 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -766,7 +766,6 @@ unsigned long nr_iowait(void)
766#endif /* MODULE */ 766#endif /* MODULE */
767EXPORT_SYMBOL_GPL(si_swapinfo); 767EXPORT_SYMBOL_GPL(si_swapinfo);
768EXPORT_SYMBOL_GPL(nr_threads); 768EXPORT_SYMBOL_GPL(nr_threads);
769EXPORT_SYMBOL_GPL(get_full_page_state);
770EXPORT_SYMBOL_GPL(nr_running); 769EXPORT_SYMBOL_GPL(nr_running);
771EXPORT_SYMBOL_GPL(nr_iowait); 770EXPORT_SYMBOL_GPL(nr_iowait);
772//EXPORT_SYMBOL_GPL(nr_context_switches); 771//EXPORT_SYMBOL_GPL(nr_context_switches);
diff --git a/arch/s390/appldata/appldata_mem.c b/arch/s390/appldata/appldata_mem.c
index 7915a197d96d..4811e2dac864 100644
--- a/arch/s390/appldata/appldata_mem.c
+++ b/arch/s390/appldata/appldata_mem.c
@@ -107,21 +107,21 @@ static void appldata_get_mem_data(void *data)
107 * serialized through the appldata_ops_lock and can use static 107 * serialized through the appldata_ops_lock and can use static
108 */ 108 */
109 static struct sysinfo val; 109 static struct sysinfo val;
110 static struct page_state ps; 110 unsigned long ev[NR_VM_EVENT_ITEMS];
111 struct appldata_mem_data *mem_data; 111 struct appldata_mem_data *mem_data;
112 112
113 mem_data = data; 113 mem_data = data;
114 mem_data->sync_count_1++; 114 mem_data->sync_count_1++;
115 115
116 get_full_page_state(&ps); 116 all_vm_events(ev);
117 mem_data->pgpgin = ps.pgpgin >> 1; 117 mem_data->pgpgin = ev[PGPGIN] >> 1;
118 mem_data->pgpgout = ps.pgpgout >> 1; 118 mem_data->pgpgout = ev[PGPGOUT] >> 1;
119 mem_data->pswpin = ps.pswpin; 119 mem_data->pswpin = ev[PSWPIN];
120 mem_data->pswpout = ps.pswpout; 120 mem_data->pswpout = ev[PSWPOUT];
121 mem_data->pgalloc = ps.pgalloc_high + ps.pgalloc_normal + 121 mem_data->pgalloc = ev[PGALLOC_HIGH] + ev[PGALLOC_NORMAL] +
122 ps.pgalloc_dma; 122 ev[PGALLOC_DMA];
123 mem_data->pgfault = ps.pgfault; 123 mem_data->pgfault = ev[PGFAULT];
124 mem_data->pgmajfault = ps.pgmajfault; 124 mem_data->pgmajfault = ev[PGMAJFAULT];
125 125
126 si_meminfo(&val); 126 si_meminfo(&val);
127 mem_data->sharedram = val.sharedram; 127 mem_data->sharedram = val.sharedram;
@@ -130,7 +130,8 @@ static void appldata_get_mem_data(void *data)
130 mem_data->totalhigh = P2K(val.totalhigh); 130 mem_data->totalhigh = P2K(val.totalhigh);
131 mem_data->freehigh = P2K(val.freehigh); 131 mem_data->freehigh = P2K(val.freehigh);
132 mem_data->bufferram = P2K(val.bufferram); 132 mem_data->bufferram = P2K(val.bufferram);
133 mem_data->cached = P2K(atomic_read(&nr_pagecache) - val.bufferram); 133 mem_data->cached = P2K(global_page_state(NR_FILE_PAGES)
134 - val.bufferram);
134 135
135 si_swapinfo(&val); 136 si_swapinfo(&val);
136 mem_data->totalswap = P2K(val.totalswap); 137 mem_data->totalswap = P2K(val.totalswap);
diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c
index 79d177149fdb..8654b446ac9e 100644
--- a/arch/sparc/kernel/ioport.c
+++ b/arch/sparc/kernel/ioport.c
@@ -26,6 +26,7 @@
26 */ 26 */
27 27
28#include <linux/config.h> 28#include <linux/config.h>
29#include <linux/module.h>
29#include <linux/sched.h> 30#include <linux/sched.h>
30#include <linux/kernel.h> 31#include <linux/kernel.h>
31#include <linux/errno.h> 32#include <linux/errno.h>
@@ -40,6 +41,7 @@
40#include <asm/vaddrs.h> 41#include <asm/vaddrs.h>
41#include <asm/oplib.h> 42#include <asm/oplib.h>
42#include <asm/prom.h> 43#include <asm/prom.h>
44#include <asm/of_device.h>
43#include <asm/sbus.h> 45#include <asm/sbus.h>
44#include <asm/page.h> 46#include <asm/page.h>
45#include <asm/pgalloc.h> 47#include <asm/pgalloc.h>
@@ -143,6 +145,21 @@ void __iomem *sbus_ioremap(struct resource *phyres, unsigned long offset,
143 phyres->start + offset, size, name); 145 phyres->start + offset, size, name);
144} 146}
145 147
148void __iomem *of_ioremap(struct resource *res, unsigned long offset,
149 unsigned long size, char *name)
150{
151 return _sparc_alloc_io(res->flags & 0xF,
152 res->start + offset,
153 size, name);
154}
155EXPORT_SYMBOL(of_ioremap);
156
157void of_iounmap(void __iomem *base, unsigned long size)
158{
159 iounmap(base);
160}
161EXPORT_SYMBOL(of_iounmap);
162
146/* 163/*
147 */ 164 */
148void sbus_iounmap(volatile void __iomem *addr, unsigned long size) 165void sbus_iounmap(volatile void __iomem *addr, unsigned long size)
diff --git a/arch/sparc/kernel/of_device.c b/arch/sparc/kernel/of_device.c
index 80a809478781..bc956c530376 100644
--- a/arch/sparc/kernel/of_device.c
+++ b/arch/sparc/kernel/of_device.c
@@ -129,6 +129,26 @@ static int of_device_resume(struct device * dev)
129 return error; 129 return error;
130} 130}
131 131
132static int node_match(struct device *dev, void *data)
133{
134 struct of_device *op = to_of_device(dev);
135 struct device_node *dp = data;
136
137 return (op->node == dp);
138}
139
140struct of_device *of_find_device_by_node(struct device_node *dp)
141{
142 struct device *dev = bus_find_device(&of_bus_type, NULL,
143 dp, node_match);
144
145 if (dev)
146 return to_of_device(dev);
147
148 return NULL;
149}
150EXPORT_SYMBOL(of_find_device_by_node);
151
132#ifdef CONFIG_PCI 152#ifdef CONFIG_PCI
133struct bus_type ebus_bus_type = { 153struct bus_type ebus_bus_type = {
134 .name = "ebus", 154 .name = "ebus",
@@ -153,10 +173,459 @@ struct bus_type sbus_bus_type = {
153EXPORT_SYMBOL(sbus_bus_type); 173EXPORT_SYMBOL(sbus_bus_type);
154#endif 174#endif
155 175
176struct bus_type of_bus_type = {
177 .name = "of",
178 .match = of_platform_bus_match,
179 .probe = of_device_probe,
180 .remove = of_device_remove,
181 .suspend = of_device_suspend,
182 .resume = of_device_resume,
183};
184EXPORT_SYMBOL(of_bus_type);
185
186static inline u64 of_read_addr(u32 *cell, int size)
187{
188 u64 r = 0;
189 while (size--)
190 r = (r << 32) | *(cell++);
191 return r;
192}
193
194static void __init get_cells(struct device_node *dp,
195 int *addrc, int *sizec)
196{
197 if (addrc)
198 *addrc = of_n_addr_cells(dp);
199 if (sizec)
200 *sizec = of_n_size_cells(dp);
201}
202
203/* Max address size we deal with */
204#define OF_MAX_ADDR_CELLS 4
205
206struct of_bus {
207 const char *name;
208 const char *addr_prop_name;
209 int (*match)(struct device_node *parent);
210 void (*count_cells)(struct device_node *child,
211 int *addrc, int *sizec);
212 u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
213 int (*translate)(u32 *addr, u64 offset, int na);
214 unsigned int (*get_flags)(u32 *addr);
215};
216
217/*
218 * Default translator (generic bus)
219 */
220
221static void of_bus_default_count_cells(struct device_node *dev,
222 int *addrc, int *sizec)
223{
224 get_cells(dev, addrc, sizec);
225}
226
227static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
228{
229 u64 cp, s, da;
230
231 cp = of_read_addr(range, na);
232 s = of_read_addr(range + na + pna, ns);
233 da = of_read_addr(addr, na);
234
235 if (da < cp || da >= (cp + s))
236 return OF_BAD_ADDR;
237 return da - cp;
238}
239
240static int of_bus_default_translate(u32 *addr, u64 offset, int na)
241{
242 u64 a = of_read_addr(addr, na);
243 memset(addr, 0, na * 4);
244 a += offset;
245 if (na > 1)
246 addr[na - 2] = a >> 32;
247 addr[na - 1] = a & 0xffffffffu;
248
249 return 0;
250}
251
252static unsigned int of_bus_default_get_flags(u32 *addr)
253{
254 return IORESOURCE_MEM;
255}
256
257
258/*
259 * PCI bus specific translator
260 */
261
262static int of_bus_pci_match(struct device_node *np)
263{
264 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex");
265}
266
267static void of_bus_pci_count_cells(struct device_node *np,
268 int *addrc, int *sizec)
269{
270 if (addrc)
271 *addrc = 3;
272 if (sizec)
273 *sizec = 2;
274}
275
276static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
277{
278 u64 cp, s, da;
279
280 /* Check address type match */
281 if ((addr[0] ^ range[0]) & 0x03000000)
282 return OF_BAD_ADDR;
283
284 /* Read address values, skipping high cell */
285 cp = of_read_addr(range + 1, na - 1);
286 s = of_read_addr(range + na + pna, ns);
287 da = of_read_addr(addr + 1, na - 1);
288
289 if (da < cp || da >= (cp + s))
290 return OF_BAD_ADDR;
291 return da - cp;
292}
293
294static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
295{
296 return of_bus_default_translate(addr + 1, offset, na - 1);
297}
298
299static unsigned int of_bus_pci_get_flags(u32 *addr)
300{
301 unsigned int flags = 0;
302 u32 w = addr[0];
303
304 switch((w >> 24) & 0x03) {
305 case 0x01:
306 flags |= IORESOURCE_IO;
307 case 0x02: /* 32 bits */
308 case 0x03: /* 64 bits */
309 flags |= IORESOURCE_MEM;
310 }
311 if (w & 0x40000000)
312 flags |= IORESOURCE_PREFETCH;
313 return flags;
314}
315
316/*
317 * SBUS bus specific translator
318 */
319
320static int of_bus_sbus_match(struct device_node *np)
321{
322 return !strcmp(np->name, "sbus") ||
323 !strcmp(np->name, "sbi");
324}
325
326static void of_bus_sbus_count_cells(struct device_node *child,
327 int *addrc, int *sizec)
328{
329 if (addrc)
330 *addrc = 2;
331 if (sizec)
332 *sizec = 1;
333}
334
335static u64 of_bus_sbus_map(u32 *addr, u32 *range, int na, int ns, int pna)
336{
337 return of_bus_default_map(addr, range, na, ns, pna);
338}
339
340static int of_bus_sbus_translate(u32 *addr, u64 offset, int na)
341{
342 return of_bus_default_translate(addr, offset, na);
343}
344
345static unsigned int of_bus_sbus_get_flags(u32 *addr)
346{
347 return IORESOURCE_MEM;
348}
349
350
351/*
352 * Array of bus specific translators
353 */
354
355static struct of_bus of_busses[] = {
356 /* PCI */
357 {
358 .name = "pci",
359 .addr_prop_name = "assigned-addresses",
360 .match = of_bus_pci_match,
361 .count_cells = of_bus_pci_count_cells,
362 .map = of_bus_pci_map,
363 .translate = of_bus_pci_translate,
364 .get_flags = of_bus_pci_get_flags,
365 },
366 /* SBUS */
367 {
368 .name = "sbus",
369 .addr_prop_name = "reg",
370 .match = of_bus_sbus_match,
371 .count_cells = of_bus_sbus_count_cells,
372 .map = of_bus_sbus_map,
373 .translate = of_bus_sbus_translate,
374 .get_flags = of_bus_sbus_get_flags,
375 },
376 /* Default */
377 {
378 .name = "default",
379 .addr_prop_name = "reg",
380 .match = NULL,
381 .count_cells = of_bus_default_count_cells,
382 .map = of_bus_default_map,
383 .translate = of_bus_default_translate,
384 .get_flags = of_bus_default_get_flags,
385 },
386};
387
388static struct of_bus *of_match_bus(struct device_node *np)
389{
390 int i;
391
392 for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
393 if (!of_busses[i].match || of_busses[i].match(np))
394 return &of_busses[i];
395 BUG();
396 return NULL;
397}
398
399static int __init build_one_resource(struct device_node *parent,
400 struct of_bus *bus,
401 struct of_bus *pbus,
402 u32 *addr,
403 int na, int ns, int pna)
404{
405 u32 *ranges;
406 unsigned int rlen;
407 int rone;
408 u64 offset = OF_BAD_ADDR;
409
410 ranges = of_get_property(parent, "ranges", &rlen);
411 if (ranges == NULL || rlen == 0) {
412 offset = of_read_addr(addr, na);
413 memset(addr, 0, pna * 4);
414 goto finish;
415 }
416
417 /* Now walk through the ranges */
418 rlen /= 4;
419 rone = na + pna + ns;
420 for (; rlen >= rone; rlen -= rone, ranges += rone) {
421 offset = bus->map(addr, ranges, na, ns, pna);
422 if (offset != OF_BAD_ADDR)
423 break;
424 }
425 if (offset == OF_BAD_ADDR)
426 return 1;
427
428 memcpy(addr, ranges + na, 4 * pna);
429
430finish:
431 /* Translate it into parent bus space */
432 return pbus->translate(addr, offset, pna);
433}
434
435static void __init build_device_resources(struct of_device *op,
436 struct device *parent)
437{
438 struct of_device *p_op;
439 struct of_bus *bus;
440 int na, ns;
441 int index, num_reg;
442 void *preg;
443
444 if (!parent)
445 return;
446
447 p_op = to_of_device(parent);
448 bus = of_match_bus(p_op->node);
449 bus->count_cells(op->node, &na, &ns);
450
451 preg = of_get_property(op->node, bus->addr_prop_name, &num_reg);
452 if (!preg || num_reg == 0)
453 return;
454
455 /* Convert to num-cells. */
456 num_reg /= 4;
457
458 /* Conver to num-entries. */
459 num_reg /= na + ns;
460
461 for (index = 0; index < num_reg; index++) {
462 struct resource *r = &op->resource[index];
463 u32 addr[OF_MAX_ADDR_CELLS];
464 u32 *reg = (preg + (index * ((na + ns) * 4)));
465 struct device_node *dp = op->node;
466 struct device_node *pp = p_op->node;
467 struct of_bus *pbus;
468 u64 size, result = OF_BAD_ADDR;
469 unsigned long flags;
470 int dna, dns;
471 int pna, pns;
472
473 size = of_read_addr(reg + na, ns);
474 flags = bus->get_flags(reg);
475
476 memcpy(addr, reg, na * 4);
477
478 /* If the immediate parent has no ranges property to apply,
479 * just use a 1<->1 mapping.
480 */
481 if (of_find_property(pp, "ranges", NULL) == NULL) {
482 result = of_read_addr(addr, na);
483 goto build_res;
484 }
485
486 dna = na;
487 dns = ns;
488
489 while (1) {
490 dp = pp;
491 pp = dp->parent;
492 if (!pp) {
493 result = of_read_addr(addr, dna);
494 break;
495 }
496
497 pbus = of_match_bus(pp);
498 pbus->count_cells(dp, &pna, &pns);
499
500 if (build_one_resource(dp, bus, pbus, addr, dna, dns, pna))
501 break;
502
503 dna = pna;
504 dns = pns;
505 bus = pbus;
506 }
507
508 build_res:
509 memset(r, 0, sizeof(*r));
510 if (result != OF_BAD_ADDR) {
511 r->start = result & 0xffffffff;
512 r->end = result + size - 1;
513 r->flags = flags | ((result >> 32ULL) & 0xffUL);
514 } else {
515 r->start = ~0UL;
516 r->end = ~0UL;
517 }
518 r->name = op->node->name;
519 }
520}
521
522static struct of_device * __init scan_one_device(struct device_node *dp,
523 struct device *parent)
524{
525 struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
526 struct linux_prom_irqs *intr;
527 int len, i;
528
529 if (!op)
530 return NULL;
531
532 op->node = dp;
533
534 op->clock_freq = of_getintprop_default(dp, "clock-frequency",
535 (25*1000*1000));
536 op->portid = of_getintprop_default(dp, "upa-portid", -1);
537 if (op->portid == -1)
538 op->portid = of_getintprop_default(dp, "portid", -1);
539
540 intr = of_get_property(dp, "intr", &len);
541 if (intr) {
542 op->num_irqs = len / sizeof(struct linux_prom_irqs);
543 for (i = 0; i < op->num_irqs; i++)
544 op->irqs[i] = intr[i].pri;
545 } else {
546 unsigned int *irq = of_get_property(dp, "interrupts", &len);
547
548 if (irq) {
549 op->num_irqs = len / sizeof(unsigned int);
550 for (i = 0; i < op->num_irqs; i++)
551 op->irqs[i] = irq[i];
552 } else {
553 op->num_irqs = 0;
554 }
555 }
556 if (sparc_cpu_model == sun4d) {
557 static int pil_to_sbus[] = {
558 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
559 };
560 struct device_node *busp = dp->parent;
561 struct linux_prom_registers *regs;
562 int board = of_getintprop_default(busp, "board#", 0);
563 int slot;
564
565 regs = of_get_property(dp, "reg", NULL);
566 slot = regs->which_io;
567
568 for (i = 0; i < op->num_irqs; i++) {
569 int this_irq = op->irqs[i];
570 int sbusl = pil_to_sbus[this_irq];
571
572 if (sbusl)
573 this_irq = (((board + 1) << 5) +
574 (sbusl << 2) +
575 slot);
576
577 op->irqs[i] = this_irq;
578 }
579 }
580
581 build_device_resources(op, parent);
582
583 op->dev.parent = parent;
584 op->dev.bus = &of_bus_type;
585 if (!parent)
586 strcpy(op->dev.bus_id, "root");
587 else
588 strcpy(op->dev.bus_id, dp->path_component_name);
589
590 if (of_device_register(op)) {
591 printk("%s: Could not register of device.\n",
592 dp->full_name);
593 kfree(op);
594 op = NULL;
595 }
596
597 return op;
598}
599
600static void __init scan_tree(struct device_node *dp, struct device *parent)
601{
602 while (dp) {
603 struct of_device *op = scan_one_device(dp, parent);
604
605 if (op)
606 scan_tree(dp->child, &op->dev);
607
608 dp = dp->sibling;
609 }
610}
611
612static void __init scan_of_devices(void)
613{
614 struct device_node *root = of_find_node_by_path("/");
615 struct of_device *parent;
616
617 parent = scan_one_device(root, NULL);
618 if (!parent)
619 return;
620
621 scan_tree(root->child, &parent->dev);
622}
623
156static int __init of_bus_driver_init(void) 624static int __init of_bus_driver_init(void)
157{ 625{
158 int err = 0; 626 int err;
159 627
628 err = bus_register(&of_bus_type);
160#ifdef CONFIG_PCI 629#ifdef CONFIG_PCI
161 if (!err) 630 if (!err)
162 err = bus_register(&ebus_bus_type); 631 err = bus_register(&ebus_bus_type);
@@ -165,7 +634,11 @@ static int __init of_bus_driver_init(void)
165 if (!err) 634 if (!err)
166 err = bus_register(&sbus_bus_type); 635 err = bus_register(&sbus_bus_type);
167#endif 636#endif
168 return 0; 637
638 if (!err)
639 scan_of_devices();
640
641 return err;
169} 642}
170 643
171postcore_initcall(of_bus_driver_init); 644postcore_initcall(of_bus_driver_init);
diff --git a/arch/sparc/kernel/prom.c b/arch/sparc/kernel/prom.c
index 946ce6d15819..4b06dcb00ebd 100644
--- a/arch/sparc/kernel/prom.c
+++ b/arch/sparc/kernel/prom.c
@@ -190,6 +190,36 @@ int of_getintprop_default(struct device_node *np, const char *name, int def)
190} 190}
191EXPORT_SYMBOL(of_getintprop_default); 191EXPORT_SYMBOL(of_getintprop_default);
192 192
193int of_n_addr_cells(struct device_node *np)
194{
195 int* ip;
196 do {
197 if (np->parent)
198 np = np->parent;
199 ip = of_get_property(np, "#address-cells", NULL);
200 if (ip != NULL)
201 return *ip;
202 } while (np->parent);
203 /* No #address-cells property for the root node, default to 2 */
204 return 2;
205}
206EXPORT_SYMBOL(of_n_addr_cells);
207
208int of_n_size_cells(struct device_node *np)
209{
210 int* ip;
211 do {
212 if (np->parent)
213 np = np->parent;
214 ip = of_get_property(np, "#size-cells", NULL);
215 if (ip != NULL)
216 return *ip;
217 } while (np->parent);
218 /* No #size-cells property for the root node, default to 1 */
219 return 1;
220}
221EXPORT_SYMBOL(of_n_size_cells);
222
193int of_set_property(struct device_node *dp, const char *name, void *val, int len) 223int of_set_property(struct device_node *dp, const char *name, void *val, int len)
194{ 224{
195 struct property **prevp; 225 struct property **prevp;
diff --git a/arch/sparc/kernel/sys_sunos.c b/arch/sparc/kernel/sys_sunos.c
index 288de276d9ff..aa0fb2efb615 100644
--- a/arch/sparc/kernel/sys_sunos.c
+++ b/arch/sparc/kernel/sys_sunos.c
@@ -196,7 +196,7 @@ asmlinkage int sunos_brk(unsigned long brk)
196 * simple, it hopefully works in most obvious cases.. Easy to 196 * simple, it hopefully works in most obvious cases.. Easy to
197 * fool it, but this should catch most mistakes. 197 * fool it, but this should catch most mistakes.
198 */ 198 */
199 freepages = get_page_cache_size(); 199 freepages = global_page_state(NR_FILE_PAGES);
200 freepages >>= 1; 200 freepages >>= 1;
201 freepages += nr_free_pages(); 201 freepages += nr_free_pages();
202 freepages += nr_swap_pages; 202 freepages += nr_swap_pages;
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c
index 7dadcdb4ca42..9631e8f4ae60 100644
--- a/arch/sparc/kernel/time.c
+++ b/arch/sparc/kernel/time.c
@@ -42,6 +42,7 @@
42#include <asm/sun4paddr.h> 42#include <asm/sun4paddr.h>
43#include <asm/page.h> 43#include <asm/page.h>
44#include <asm/pcic.h> 44#include <asm/pcic.h>
45#include <asm/of_device.h>
45 46
46extern unsigned long wall_jiffies; 47extern unsigned long wall_jiffies;
47 48
@@ -273,83 +274,31 @@ static __inline__ void sun4_clock_probe(void)
273#endif 274#endif
274} 275}
275 276
276/* Probe for the mostek real time clock chip. */ 277static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
277static __inline__ void clock_probe(void)
278{ 278{
279 struct linux_prom_registers clk_reg[2]; 279 struct device_node *dp = op->node;
280 char model[128]; 280 char *model = of_get_property(dp, "model", NULL);
281 register int node, cpuunit, bootbus;
282 struct resource r;
283
284 cpuunit = bootbus = 0;
285 memset(&r, 0, sizeof(r));
286
287 /* Determine the correct starting PROM node for the probe. */
288 node = prom_getchild(prom_root_node);
289 switch (sparc_cpu_model) {
290 case sun4c:
291 break;
292 case sun4m:
293 node = prom_getchild(prom_searchsiblings(node, "obio"));
294 break;
295 case sun4d:
296 node = prom_getchild(bootbus = prom_searchsiblings(prom_getchild(cpuunit = prom_searchsiblings(node, "cpu-unit")), "bootbus"));
297 break;
298 default:
299 prom_printf("CLOCK: Unsupported architecture!\n");
300 prom_halt();
301 }
302 281
303 /* Find the PROM node describing the real time clock. */ 282 if (!model)
304 sp_clock_typ = MSTK_INVALID; 283 return -ENODEV;
305 node = prom_searchsiblings(node,"eeprom");
306 if (!node) {
307 prom_printf("CLOCK: No clock found!\n");
308 prom_halt();
309 }
310 284
311 /* Get the model name and setup everything up. */ 285 if (!strcmp(model, "mk48t02")) {
312 model[0] = '\0';
313 prom_getstring(node, "model", model, sizeof(model));
314 if (strcmp(model, "mk48t02") == 0) {
315 sp_clock_typ = MSTK48T02; 286 sp_clock_typ = MSTK48T02;
316 if (prom_getproperty(node, "reg", (char *) clk_reg, sizeof(clk_reg)) == -1) { 287
317 prom_printf("clock_probe: FAILED!\n");
318 prom_halt();
319 }
320 if (sparc_cpu_model == sun4d)
321 prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
322 else
323 prom_apply_obio_ranges(clk_reg, 1);
324 /* Map the clock register io area read-only */ 288 /* Map the clock register io area read-only */
325 r.flags = clk_reg[0].which_io; 289 mstk48t02_regs = of_ioremap(&op->resource[0], 0,
326 r.start = clk_reg[0].phys_addr; 290 sizeof(struct mostek48t02),
327 mstk48t02_regs = sbus_ioremap(&r, 0, 291 "mk48t02");
328 sizeof(struct mostek48t02), "mk48t02");
329 mstk48t08_regs = NULL; /* To catch weirdness */ 292 mstk48t08_regs = NULL; /* To catch weirdness */
330 } else if (strcmp(model, "mk48t08") == 0) { 293 } else if (!strcmp(model, "mk48t08")) {
331 sp_clock_typ = MSTK48T08; 294 sp_clock_typ = MSTK48T08;
332 if(prom_getproperty(node, "reg", (char *) clk_reg, 295 mstk48t08_regs = of_ioremap(&op->resource[0], 0,
333 sizeof(clk_reg)) == -1) { 296 sizeof(struct mostek48t08),
334 prom_printf("clock_probe: FAILED!\n"); 297 "mk48t08");
335 prom_halt();
336 }
337 if (sparc_cpu_model == sun4d)
338 prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
339 else
340 prom_apply_obio_ranges(clk_reg, 1);
341 /* Map the clock register io area read-only */
342 /* XXX r/o attribute is somewhere in r.flags */
343 r.flags = clk_reg[0].which_io;
344 r.start = clk_reg[0].phys_addr;
345 mstk48t08_regs = sbus_ioremap(&r, 0,
346 sizeof(struct mostek48t08), "mk48t08");
347 298
348 mstk48t02_regs = &mstk48t08_regs->regs; 299 mstk48t02_regs = &mstk48t08_regs->regs;
349 } else { 300 } else
350 prom_printf("CLOCK: Unknown model name '%s'\n",model); 301 return -ENODEV;
351 prom_halt();
352 }
353 302
354 /* Report a low battery voltage condition. */ 303 /* Report a low battery voltage condition. */
355 if (has_low_battery()) 304 if (has_low_battery())
@@ -358,6 +307,28 @@ static __inline__ void clock_probe(void)
358 /* Kick start the clock if it is completely stopped. */ 307 /* Kick start the clock if it is completely stopped. */
359 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP) 308 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
360 kick_start_clock(); 309 kick_start_clock();
310
311 return 0;
312}
313
314static struct of_device_id clock_match[] = {
315 {
316 .name = "eeprom",
317 },
318 {},
319};
320
321static struct of_platform_driver clock_driver = {
322 .name = "clock",
323 .match_table = clock_match,
324 .probe = clock_probe,
325};
326
327
328/* Probe for the mostek real time clock chip. */
329static void clock_init(void)
330{
331 of_register_driver(&clock_driver, &of_bus_type);
361} 332}
362 333
363void __init sbus_time_init(void) 334void __init sbus_time_init(void)
@@ -376,7 +347,7 @@ void __init sbus_time_init(void)
376 if (ARCH_SUN4) 347 if (ARCH_SUN4)
377 sun4_clock_probe(); 348 sun4_clock_probe();
378 else 349 else
379 clock_probe(); 350 clock_init();
380 351
381 sparc_init_timers(timer_interrupt); 352 sparc_init_timers(timer_interrupt);
382 353
diff --git a/arch/sparc64/kernel/auxio.c b/arch/sparc64/kernel/auxio.c
index c2c69c167d18..718350aba1ec 100644
--- a/arch/sparc64/kernel/auxio.c
+++ b/arch/sparc64/kernel/auxio.c
@@ -11,10 +11,9 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/ioport.h> 12#include <linux/ioport.h>
13 13
14#include <asm/oplib.h> 14#include <asm/prom.h>
15#include <asm/of_device.h>
15#include <asm/io.h> 16#include <asm/io.h>
16#include <asm/sbus.h>
17#include <asm/ebus.h>
18#include <asm/auxio.h> 17#include <asm/auxio.h>
19 18
20void __iomem *auxio_register = NULL; 19void __iomem *auxio_register = NULL;
@@ -111,12 +110,6 @@ void auxio_set_lte(int on)
111 } 110 }
112} 111}
113 112
114static void __devinit auxio_report_dev(struct device_node *dp)
115{
116 printk(KERN_INFO "AUXIO: Found device at %s\n",
117 dp->full_name);
118}
119
120static struct of_device_id auxio_match[] = { 113static struct of_device_id auxio_match[] = {
121 { 114 {
122 .name = "auxio", 115 .name = "auxio",
@@ -126,67 +119,48 @@ static struct of_device_id auxio_match[] = {
126 119
127MODULE_DEVICE_TABLE(of, auxio_match); 120MODULE_DEVICE_TABLE(of, auxio_match);
128 121
129#ifdef CONFIG_SBUS 122static int __devinit auxio_probe(struct of_device *dev, const struct of_device_id *match)
130static int __devinit auxio_sbus_probe(struct of_device *dev, const struct of_device_id *match)
131{ 123{
132 struct sbus_dev *sdev = to_sbus_device(&dev->dev); 124 struct device_node *dp = dev->node;
133 125 unsigned long size;
134 auxio_devtype = AUXIO_TYPE_SBUS; 126
135 auxio_register = sbus_ioremap(&sdev->resource[0], 0, 127 if (!strcmp(dp->parent->name, "ebus")) {
136 sdev->reg_addrs[0].reg_size, 128 auxio_devtype = AUXIO_TYPE_EBUS;
137 "auxiliaryIO"); 129 size = sizeof(u32);
138 if (!auxio_register) 130 } else if (!strcmp(dp->parent->name, "sbus")) {
131 auxio_devtype = AUXIO_TYPE_SBUS;
132 size = 1;
133 } else {
134 printk("auxio: Unknown parent bus type [%s]\n",
135 dp->parent->name);
139 return -ENODEV; 136 return -ENODEV;
140 137 }
141 auxio_report_dev(dev->node); 138 auxio_register = of_ioremap(&dev->resource[0], 0, size, "auxio");
142 return 0;
143}
144
145static struct of_platform_driver auxio_sbus_driver = {
146 .name = "auxio",
147 .match_table = auxio_match,
148 .probe = auxio_sbus_probe,
149};
150#endif
151
152#ifdef CONFIG_PCI
153static int __devinit auxio_ebus_probe(struct of_device *dev, const struct of_device_id *match)
154{
155 struct linux_ebus_device *edev = to_ebus_device(&dev->dev);
156
157 auxio_devtype = AUXIO_TYPE_EBUS;
158 auxio_register = ioremap(edev->resource[0].start, sizeof(u32));
159 if (!auxio_register) 139 if (!auxio_register)
160 return -ENODEV; 140 return -ENODEV;
161 141
162 auxio_report_dev(dev->node); 142 printk(KERN_INFO "AUXIO: Found device at %s\n",
143 dp->full_name);
163 144
164 auxio_set_led(AUXIO_LED_ON); 145 if (auxio_devtype == AUXIO_TYPE_EBUS)
146 auxio_set_led(AUXIO_LED_ON);
165 147
166 return 0; 148 return 0;
167} 149}
168 150
169static struct of_platform_driver auxio_ebus_driver = { 151static struct of_platform_driver auxio_driver = {
170 .name = "auxio", 152 .name = "auxio",
171 .match_table = auxio_match, 153 .match_table = auxio_match,
172 .probe = auxio_ebus_probe, 154 .probe = auxio_probe,
173}; 155};
174#endif
175 156
176static int __init auxio_probe(void) 157static int __init auxio_init(void)
177{ 158{
178#ifdef CONFIG_SBUS 159 return of_register_driver(&auxio_driver, &of_bus_type);
179 of_register_driver(&auxio_sbus_driver, &sbus_bus_type);
180#endif
181#ifdef CONFIG_PCI
182 of_register_driver(&auxio_ebus_driver, &ebus_bus_type);
183#endif
184
185 return 0;
186} 160}
187 161
188/* Must be after subsys_initcall() so that busses are probed. Must 162/* Must be after subsys_initcall() so that busses are probed. Must
189 * be before device_initcall() because things like the floppy driver 163 * be before device_initcall() because things like the floppy driver
190 * need to use the AUXIO register. 164 * need to use the AUXIO register.
191 */ 165 */
192fs_initcall(auxio_probe); 166fs_initcall(auxio_init);
diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc64/kernel/ebus.c
index 98e0a8cbeecd..aac014d15ad3 100644
--- a/arch/sparc64/kernel/ebus.c
+++ b/arch/sparc64/kernel/ebus.c
@@ -20,6 +20,8 @@
20#include <asm/pbm.h> 20#include <asm/pbm.h>
21#include <asm/ebus.h> 21#include <asm/ebus.h>
22#include <asm/oplib.h> 22#include <asm/oplib.h>
23#include <asm/prom.h>
24#include <asm/of_device.h>
23#include <asm/bpp.h> 25#include <asm/bpp.h>
24#include <asm/irq.h> 26#include <asm/irq.h>
25 27
@@ -279,45 +281,12 @@ static inline void *ebus_alloc(size_t size)
279 return mem; 281 return mem;
280} 282}
281 283
282int __init ebus_intmap_match(struct linux_ebus *ebus, 284static void __init fill_ebus_child(struct device_node *dp,
283 struct linux_prom_registers *reg, 285 struct linux_ebus_child *dev,
284 int *interrupt) 286 int non_standard_regs)
285{
286 struct linux_prom_ebus_intmap *imap;
287 struct linux_prom_ebus_intmask *imask;
288 unsigned int hi, lo, irq;
289 int i, len, n_imap;
290
291 imap = of_get_property(ebus->prom_node, "interrupt-map", &len);
292 if (!imap)
293 return 0;
294 n_imap = len / sizeof(imap[0]);
295
296 imask = of_get_property(ebus->prom_node, "interrupt-map-mask", NULL);
297 if (!imask)
298 return 0;
299
300 hi = reg->which_io & imask->phys_hi;
301 lo = reg->phys_addr & imask->phys_lo;
302 irq = *interrupt & imask->interrupt;
303 for (i = 0; i < n_imap; i++) {
304 if ((imap[i].phys_hi == hi) &&
305 (imap[i].phys_lo == lo) &&
306 (imap[i].interrupt == irq)) {
307 *interrupt = imap[i].cinterrupt;
308 return 0;
309 }
310 }
311 return -1;
312}
313
314void __init fill_ebus_child(struct device_node *dp,
315 struct linux_prom_registers *preg,
316 struct linux_ebus_child *dev,
317 int non_standard_regs)
318{ 287{
288 struct of_device *op;
319 int *regs; 289 int *regs;
320 int *irqs;
321 int i, len; 290 int i, len;
322 291
323 dev->prom_node = dp; 292 dev->prom_node = dp;
@@ -354,12 +323,16 @@ void __init fill_ebus_child(struct device_node *dp,
354 } 323 }
355 } 324 }
356 325
357 for (i = 0; i < PROMINTR_MAX; i++) 326 op = of_find_device_by_node(dp);
358 dev->irqs[i] = PCI_IRQ_NONE; 327 if (!op) {
359
360 irqs = of_get_property(dp, "interrupts", &len);
361 if (!irqs) {
362 dev->num_irqs = 0; 328 dev->num_irqs = 0;
329 } else {
330 dev->num_irqs = op->num_irqs;
331 for (i = 0; i < dev->num_irqs; i++)
332 dev->irqs[i] = op->irqs[i];
333 }
334
335 if (!dev->num_irqs) {
363 /* 336 /*
364 * Oh, well, some PROMs don't export interrupts 337 * Oh, well, some PROMs don't export interrupts
365 * property to children of EBus devices... 338 * property to children of EBus devices...
@@ -375,23 +348,6 @@ void __init fill_ebus_child(struct device_node *dp,
375 dev->irqs[0] = dev->parent->irqs[1]; 348 dev->irqs[0] = dev->parent->irqs[1];
376 } 349 }
377 } 350 }
378 } else {
379 dev->num_irqs = len / sizeof(irqs[0]);
380 for (i = 0; i < dev->num_irqs; i++) {
381 struct pci_pbm_info *pbm = dev->bus->parent;
382 struct pci_controller_info *p = pbm->parent;
383
384 if (ebus_intmap_match(dev->bus, preg, &irqs[i]) != -1) {
385 dev->irqs[i] = p->irq_build(pbm,
386 dev->bus->self,
387 irqs[i]);
388 } else {
389 /* If we get a bogus interrupt property, just
390 * record the raw value instead of punting.
391 */
392 dev->irqs[i] = irqs[i];
393 }
394 }
395 } 351 }
396} 352}
397 353
@@ -403,72 +359,32 @@ static int __init child_regs_nonstandard(struct linux_ebus_device *dev)
403 return 0; 359 return 0;
404} 360}
405 361
406void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev) 362static void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev)
407{ 363{
408 struct linux_prom_registers *regs;
409 struct linux_ebus_child *child; 364 struct linux_ebus_child *child;
410 int *irqs; 365 struct of_device *op;
411 int i, n, len; 366 int i, len;
412 367
413 dev->prom_node = dp; 368 dev->prom_node = dp;
414 369
415 printk(" [%s", dp->name); 370 printk(" [%s", dp->name);
416 371
417 regs = of_get_property(dp, "reg", &len); 372 op = of_find_device_by_node(dp);
418 if (!regs) { 373 if (!op) {
419 dev->num_addrs = 0; 374 dev->num_addrs = 0;
420 goto probe_interrupts;
421 }
422
423 if (len % sizeof(struct linux_prom_registers)) {
424 prom_printf("UGH: proplen for %s was %d, need multiple of %d\n",
425 dev->prom_node->name, len,
426 (int)sizeof(struct linux_prom_registers));
427 prom_halt();
428 }
429 dev->num_addrs = len / sizeof(struct linux_prom_registers);
430
431 for (i = 0; i < dev->num_addrs; i++) {
432 /* XXX Learn how to interpret ebus ranges... -DaveM */
433 if (regs[i].which_io >= 0x10)
434 n = (regs[i].which_io - 0x10) >> 2;
435 else
436 n = regs[i].which_io;
437
438 dev->resource[i].start = dev->bus->self->resource[n].start;
439 dev->resource[i].start += (unsigned long)regs[i].phys_addr;
440 dev->resource[i].end =
441 (dev->resource[i].start + (unsigned long)regs[i].reg_size - 1UL);
442 dev->resource[i].flags = IORESOURCE_MEM;
443 dev->resource[i].name = dev->prom_node->name;
444 request_resource(&dev->bus->self->resource[n],
445 &dev->resource[i]);
446 }
447
448probe_interrupts:
449 for (i = 0; i < PROMINTR_MAX; i++)
450 dev->irqs[i] = PCI_IRQ_NONE;
451
452 irqs = of_get_property(dp, "interrupts", &len);
453 if (!irqs) {
454 dev->num_irqs = 0; 375 dev->num_irqs = 0;
455 } else { 376 } else {
456 dev->num_irqs = len / sizeof(irqs[0]); 377 (void) of_get_property(dp, "reg", &len);
457 for (i = 0; i < dev->num_irqs; i++) { 378 dev->num_addrs = len / sizeof(struct linux_prom_registers);
458 struct pci_pbm_info *pbm = dev->bus->parent; 379
459 struct pci_controller_info *p = pbm->parent; 380 for (i = 0; i < dev->num_addrs; i++)
460 381 memcpy(&dev->resource[i],
461 if (ebus_intmap_match(dev->bus, &regs[0], &irqs[i]) != -1) { 382 &op->resource[i],
462 dev->irqs[i] = p->irq_build(pbm, 383 sizeof(struct resource));
463 dev->bus->self, 384
464 irqs[i]); 385 dev->num_irqs = op->num_irqs;
465 } else { 386 for (i = 0; i < dev->num_irqs; i++)
466 /* If we get a bogus interrupt property, just 387 dev->irqs[i] = op->irqs[i];
467 * record the raw value instead of punting.
468 */
469 dev->irqs[i] = irqs[i];
470 }
471 }
472 } 388 }
473 389
474 dev->ofdev.node = dp; 390 dev->ofdev.node = dp;
@@ -490,7 +406,7 @@ probe_interrupts:
490 child->next = NULL; 406 child->next = NULL;
491 child->parent = dev; 407 child->parent = dev;
492 child->bus = dev->bus; 408 child->bus = dev->bus;
493 fill_ebus_child(dp, regs, child, 409 fill_ebus_child(dp, child,
494 child_regs_nonstandard(dev)); 410 child_regs_nonstandard(dev));
495 411
496 while ((dp = dp->sibling) != NULL) { 412 while ((dp = dp->sibling) != NULL) {
@@ -500,7 +416,7 @@ probe_interrupts:
500 child->next = NULL; 416 child->next = NULL;
501 child->parent = dev; 417 child->parent = dev;
502 child->bus = dev->bus; 418 child->bus = dev->bus;
503 fill_ebus_child(dp, regs, child, 419 fill_ebus_child(dp, child,
504 child_regs_nonstandard(dev)); 420 child_regs_nonstandard(dev));
505 } 421 }
506 } 422 }
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index ab9e640df228..eebe02f3f4cb 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -414,6 +414,10 @@ void irq_install_pre_handler(int virt_irq,
414 data->pre_handler_arg1 = arg1; 414 data->pre_handler_arg1 = arg1;
415 data->pre_handler_arg2 = arg2; 415 data->pre_handler_arg2 = arg2;
416 416
417 if (desc->chip == &sun4u_irq_ack ||
418 desc->chip == &sun4v_irq_ack)
419 return;
420
417 desc->chip = (desc->chip == &sun4u_irq ? 421 desc->chip = (desc->chip == &sun4u_irq ?
418 &sun4u_irq_ack : &sun4v_irq_ack); 422 &sun4u_irq_ack : &sun4v_irq_ack);
419} 423}
diff --git a/arch/sparc64/kernel/isa.c b/arch/sparc64/kernel/isa.c
index 6f16dee280a8..0f3aec72ef5f 100644
--- a/arch/sparc64/kernel/isa.c
+++ b/arch/sparc64/kernel/isa.c
@@ -3,6 +3,8 @@
3#include <linux/pci.h> 3#include <linux/pci.h>
4#include <linux/slab.h> 4#include <linux/slab.h>
5#include <asm/oplib.h> 5#include <asm/oplib.h>
6#include <asm/prom.h>
7#include <asm/of_device.h>
6#include <asm/isa.h> 8#include <asm/isa.h>
7 9
8struct sparc_isa_bridge *isa_chain; 10struct sparc_isa_bridge *isa_chain;
@@ -46,107 +48,16 @@ isa_dev_get_resource(struct sparc_isa_device *isa_dev)
46 return pregs; 48 return pregs;
47} 49}
48 50
49/* I can't believe they didn't put a real INO in the isa device
50 * interrupts property. The whole point of the OBP properties
51 * is to shield the kernel from IRQ routing details.
52 *
53 * The P1275 standard for ISA devices seems to also have been
54 * totally ignored.
55 *
56 * On later systems, an interrupt-map and interrupt-map-mask scheme
57 * akin to EBUS is used.
58 */
59static struct {
60 int obp_irq;
61 int pci_ino;
62} grover_irq_table[] = {
63 { 1, 0x00 }, /* dma, unknown ino at this point */
64 { 2, 0x27 }, /* floppy */
65 { 3, 0x22 }, /* parallel */
66 { 4, 0x2b }, /* serial */
67 { 5, 0x25 }, /* acpi power management */
68
69 { 0, 0x00 } /* end of table */
70};
71
72static int __init isa_dev_get_irq_using_imap(struct sparc_isa_device *isa_dev,
73 struct sparc_isa_bridge *isa_br,
74 int *interrupt,
75 struct linux_prom_registers *reg)
76{
77 struct linux_prom_ebus_intmap *imap;
78 struct linux_prom_ebus_intmap *imask;
79 unsigned int hi, lo, irq;
80 int i, len, n_imap;
81
82 imap = of_get_property(isa_br->prom_node, "interrupt-map", &len);
83 if (!imap)
84 return 0;
85 n_imap = len / sizeof(imap[0]);
86
87 imask = of_get_property(isa_br->prom_node, "interrupt-map-mask", NULL);
88 if (!imask)
89 return 0;
90
91 hi = reg->which_io & imask->phys_hi;
92 lo = reg->phys_addr & imask->phys_lo;
93 irq = *interrupt & imask->interrupt;
94 for (i = 0; i < n_imap; i++) {
95 if ((imap[i].phys_hi == hi) &&
96 (imap[i].phys_lo == lo) &&
97 (imap[i].interrupt == irq)) {
98 *interrupt = imap[i].cinterrupt;
99 return 0;
100 }
101 }
102 return -1;
103}
104
105static void __init isa_dev_get_irq(struct sparc_isa_device *isa_dev, 51static void __init isa_dev_get_irq(struct sparc_isa_device *isa_dev,
106 struct linux_prom_registers *pregs) 52 struct linux_prom_registers *pregs)
107{ 53{
108 int irq_prop; 54 struct of_device *op = of_find_device_by_node(isa_dev->prom_node);
109 55
110 irq_prop = of_getintprop_default(isa_dev->prom_node, 56 if (!op || !op->num_irqs) {
111 "interrupts", -1); 57 isa_dev->irq = PCI_IRQ_NONE;
112 if (irq_prop <= 0) {
113 goto no_irq;
114 } else { 58 } else {
115 struct pci_controller_info *pcic; 59 isa_dev->irq = op->irqs[0];
116 struct pci_pbm_info *pbm;
117 int i;
118
119 if (of_find_property(isa_dev->bus->prom_node,
120 "interrupt-map", NULL)) {
121 if (!isa_dev_get_irq_using_imap(isa_dev,
122 isa_dev->bus,
123 &irq_prop,
124 pregs))
125 goto route_irq;
126 }
127
128 for (i = 0; grover_irq_table[i].obp_irq != 0; i++) {
129 if (grover_irq_table[i].obp_irq == irq_prop) {
130 int ino = grover_irq_table[i].pci_ino;
131
132 if (ino == 0)
133 goto no_irq;
134
135 irq_prop = ino;
136 goto route_irq;
137 }
138 }
139 goto no_irq;
140
141route_irq:
142 pbm = isa_dev->bus->parent;
143 pcic = pbm->parent;
144 isa_dev->irq = pcic->irq_build(pbm, NULL, irq_prop);
145 return;
146 } 60 }
147
148no_irq:
149 isa_dev->irq = PCI_IRQ_NONE;
150} 61}
151 62
152static void __init isa_fill_children(struct sparc_isa_device *parent_isa_dev) 63static void __init isa_fill_children(struct sparc_isa_device *parent_isa_dev)
diff --git a/arch/sparc64/kernel/of_device.c b/arch/sparc64/kernel/of_device.c
index 768475bbce82..3670dc8a7d5f 100644
--- a/arch/sparc64/kernel/of_device.c
+++ b/arch/sparc64/kernel/of_device.c
@@ -129,6 +129,43 @@ static int of_device_resume(struct device * dev)
129 return error; 129 return error;
130} 130}
131 131
132void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name)
133{
134 unsigned long ret = res->start + offset;
135
136 if (!request_region(ret, size, name))
137 ret = 0;
138
139 return (void __iomem *) ret;
140}
141EXPORT_SYMBOL(of_ioremap);
142
143void of_iounmap(void __iomem *base, unsigned long size)
144{
145 release_region((unsigned long) base, size);
146}
147EXPORT_SYMBOL(of_iounmap);
148
149static int node_match(struct device *dev, void *data)
150{
151 struct of_device *op = to_of_device(dev);
152 struct device_node *dp = data;
153
154 return (op->node == dp);
155}
156
157struct of_device *of_find_device_by_node(struct device_node *dp)
158{
159 struct device *dev = bus_find_device(&of_bus_type, NULL,
160 dp, node_match);
161
162 if (dev)
163 return to_of_device(dev);
164
165 return NULL;
166}
167EXPORT_SYMBOL(of_find_device_by_node);
168
132#ifdef CONFIG_PCI 169#ifdef CONFIG_PCI
133struct bus_type isa_bus_type = { 170struct bus_type isa_bus_type = {
134 .name = "isa", 171 .name = "isa",
@@ -163,10 +200,654 @@ struct bus_type sbus_bus_type = {
163EXPORT_SYMBOL(sbus_bus_type); 200EXPORT_SYMBOL(sbus_bus_type);
164#endif 201#endif
165 202
203struct bus_type of_bus_type = {
204 .name = "of",
205 .match = of_platform_bus_match,
206 .probe = of_device_probe,
207 .remove = of_device_remove,
208 .suspend = of_device_suspend,
209 .resume = of_device_resume,
210};
211EXPORT_SYMBOL(of_bus_type);
212
213static inline u64 of_read_addr(u32 *cell, int size)
214{
215 u64 r = 0;
216 while (size--)
217 r = (r << 32) | *(cell++);
218 return r;
219}
220
221static void __init get_cells(struct device_node *dp,
222 int *addrc, int *sizec)
223{
224 if (addrc)
225 *addrc = of_n_addr_cells(dp);
226 if (sizec)
227 *sizec = of_n_size_cells(dp);
228}
229
230/* Max address size we deal with */
231#define OF_MAX_ADDR_CELLS 4
232
233struct of_bus {
234 const char *name;
235 const char *addr_prop_name;
236 int (*match)(struct device_node *parent);
237 void (*count_cells)(struct device_node *child,
238 int *addrc, int *sizec);
239 u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
240 int (*translate)(u32 *addr, u64 offset, int na);
241 unsigned int (*get_flags)(u32 *addr);
242};
243
244/*
245 * Default translator (generic bus)
246 */
247
248static void of_bus_default_count_cells(struct device_node *dev,
249 int *addrc, int *sizec)
250{
251 get_cells(dev, addrc, sizec);
252}
253
254static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
255{
256 u64 cp, s, da;
257
258 cp = of_read_addr(range, na);
259 s = of_read_addr(range + na + pna, ns);
260 da = of_read_addr(addr, na);
261
262 if (da < cp || da >= (cp + s))
263 return OF_BAD_ADDR;
264 return da - cp;
265}
266
267static int of_bus_default_translate(u32 *addr, u64 offset, int na)
268{
269 u64 a = of_read_addr(addr, na);
270 memset(addr, 0, na * 4);
271 a += offset;
272 if (na > 1)
273 addr[na - 2] = a >> 32;
274 addr[na - 1] = a & 0xffffffffu;
275
276 return 0;
277}
278
279static unsigned int of_bus_default_get_flags(u32 *addr)
280{
281 return IORESOURCE_MEM;
282}
283
284/*
285 * PCI bus specific translator
286 */
287
288static int of_bus_pci_match(struct device_node *np)
289{
290 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex");
291}
292
293static void of_bus_pci_count_cells(struct device_node *np,
294 int *addrc, int *sizec)
295{
296 if (addrc)
297 *addrc = 3;
298 if (sizec)
299 *sizec = 2;
300}
301
302static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
303{
304 u64 cp, s, da;
305
306 /* Check address type match */
307 if ((addr[0] ^ range[0]) & 0x03000000)
308 return OF_BAD_ADDR;
309
310 /* Read address values, skipping high cell */
311 cp = of_read_addr(range + 1, na - 1);
312 s = of_read_addr(range + na + pna, ns);
313 da = of_read_addr(addr + 1, na - 1);
314
315 if (da < cp || da >= (cp + s))
316 return OF_BAD_ADDR;
317 return da - cp;
318}
319
320static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
321{
322 return of_bus_default_translate(addr + 1, offset, na - 1);
323}
324
325static unsigned int of_bus_pci_get_flags(u32 *addr)
326{
327 unsigned int flags = 0;
328 u32 w = addr[0];
329
330 switch((w >> 24) & 0x03) {
331 case 0x01:
332 flags |= IORESOURCE_IO;
333 case 0x02: /* 32 bits */
334 case 0x03: /* 64 bits */
335 flags |= IORESOURCE_MEM;
336 }
337 if (w & 0x40000000)
338 flags |= IORESOURCE_PREFETCH;
339 return flags;
340}
341
342/*
343 * ISA bus specific translator
344 */
345
346static int of_bus_isa_match(struct device_node *np)
347{
348 return !strcmp(np->name, "isa");
349}
350
351static void of_bus_isa_count_cells(struct device_node *child,
352 int *addrc, int *sizec)
353{
354 if (addrc)
355 *addrc = 2;
356 if (sizec)
357 *sizec = 1;
358}
359
360static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna)
361{
362 u64 cp, s, da;
363
364 /* Check address type match */
365 if ((addr[0] ^ range[0]) & 0x00000001)
366 return OF_BAD_ADDR;
367
368 /* Read address values, skipping high cell */
369 cp = of_read_addr(range + 1, na - 1);
370 s = of_read_addr(range + na + pna, ns);
371 da = of_read_addr(addr + 1, na - 1);
372
373 if (da < cp || da >= (cp + s))
374 return OF_BAD_ADDR;
375 return da - cp;
376}
377
378static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
379{
380 return of_bus_default_translate(addr + 1, offset, na - 1);
381}
382
383static unsigned int of_bus_isa_get_flags(u32 *addr)
384{
385 unsigned int flags = 0;
386 u32 w = addr[0];
387
388 if (w & 1)
389 flags |= IORESOURCE_IO;
390 else
391 flags |= IORESOURCE_MEM;
392 return flags;
393}
394
395/*
396 * SBUS bus specific translator
397 */
398
399static int of_bus_sbus_match(struct device_node *np)
400{
401 return !strcmp(np->name, "sbus") ||
402 !strcmp(np->name, "sbi");
403}
404
405static void of_bus_sbus_count_cells(struct device_node *child,
406 int *addrc, int *sizec)
407{
408 if (addrc)
409 *addrc = 2;
410 if (sizec)
411 *sizec = 1;
412}
413
414static u64 of_bus_sbus_map(u32 *addr, u32 *range, int na, int ns, int pna)
415{
416 return of_bus_default_map(addr, range, na, ns, pna);
417}
418
419static int of_bus_sbus_translate(u32 *addr, u64 offset, int na)
420{
421 return of_bus_default_translate(addr, offset, na);
422}
423
424static unsigned int of_bus_sbus_get_flags(u32 *addr)
425{
426 return IORESOURCE_MEM;
427}
428
429
430/*
431 * Array of bus specific translators
432 */
433
434static struct of_bus of_busses[] = {
435 /* PCI */
436 {
437 .name = "pci",
438 .addr_prop_name = "assigned-addresses",
439 .match = of_bus_pci_match,
440 .count_cells = of_bus_pci_count_cells,
441 .map = of_bus_pci_map,
442 .translate = of_bus_pci_translate,
443 .get_flags = of_bus_pci_get_flags,
444 },
445 /* ISA */
446 {
447 .name = "isa",
448 .addr_prop_name = "reg",
449 .match = of_bus_isa_match,
450 .count_cells = of_bus_isa_count_cells,
451 .map = of_bus_isa_map,
452 .translate = of_bus_isa_translate,
453 .get_flags = of_bus_isa_get_flags,
454 },
455 /* SBUS */
456 {
457 .name = "sbus",
458 .addr_prop_name = "reg",
459 .match = of_bus_sbus_match,
460 .count_cells = of_bus_sbus_count_cells,
461 .map = of_bus_sbus_map,
462 .translate = of_bus_sbus_translate,
463 .get_flags = of_bus_sbus_get_flags,
464 },
465 /* Default */
466 {
467 .name = "default",
468 .addr_prop_name = "reg",
469 .match = NULL,
470 .count_cells = of_bus_default_count_cells,
471 .map = of_bus_default_map,
472 .translate = of_bus_default_translate,
473 .get_flags = of_bus_default_get_flags,
474 },
475};
476
477static struct of_bus *of_match_bus(struct device_node *np)
478{
479 int i;
480
481 for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
482 if (!of_busses[i].match || of_busses[i].match(np))
483 return &of_busses[i];
484 BUG();
485 return NULL;
486}
487
488static int __init build_one_resource(struct device_node *parent,
489 struct of_bus *bus,
490 struct of_bus *pbus,
491 u32 *addr,
492 int na, int ns, int pna)
493{
494 u32 *ranges;
495 unsigned int rlen;
496 int rone;
497 u64 offset = OF_BAD_ADDR;
498
499 ranges = of_get_property(parent, "ranges", &rlen);
500 if (ranges == NULL || rlen == 0) {
501 offset = of_read_addr(addr, na);
502 memset(addr, 0, pna * 4);
503 goto finish;
504 }
505
506 /* Now walk through the ranges */
507 rlen /= 4;
508 rone = na + pna + ns;
509 for (; rlen >= rone; rlen -= rone, ranges += rone) {
510 offset = bus->map(addr, ranges, na, ns, pna);
511 if (offset != OF_BAD_ADDR)
512 break;
513 }
514 if (offset == OF_BAD_ADDR)
515 return 1;
516
517 memcpy(addr, ranges + na, 4 * pna);
518
519finish:
520 /* Translate it into parent bus space */
521 return pbus->translate(addr, offset, pna);
522}
523
524static void __init build_device_resources(struct of_device *op,
525 struct device *parent)
526{
527 struct of_device *p_op;
528 struct of_bus *bus;
529 int na, ns;
530 int index, num_reg;
531 void *preg;
532
533 if (!parent)
534 return;
535
536 p_op = to_of_device(parent);
537 bus = of_match_bus(p_op->node);
538 bus->count_cells(op->node, &na, &ns);
539
540 preg = of_get_property(op->node, bus->addr_prop_name, &num_reg);
541 if (!preg || num_reg == 0)
542 return;
543
544 /* Convert to num-cells. */
545 num_reg /= 4;
546
547 /* Conver to num-entries. */
548 num_reg /= na + ns;
549
550 for (index = 0; index < num_reg; index++) {
551 struct resource *r = &op->resource[index];
552 u32 addr[OF_MAX_ADDR_CELLS];
553 u32 *reg = (preg + (index * ((na + ns) * 4)));
554 struct device_node *dp = op->node;
555 struct device_node *pp = p_op->node;
556 struct of_bus *pbus;
557 u64 size, result = OF_BAD_ADDR;
558 unsigned long flags;
559 int dna, dns;
560 int pna, pns;
561
562 size = of_read_addr(reg + na, ns);
563 flags = bus->get_flags(reg);
564
565 memcpy(addr, reg, na * 4);
566
567 /* If the immediate parent has no ranges property to apply,
568 * just use a 1<->1 mapping. Unless it is the 'dma' child
569 * of an isa bus, which must be passed up towards the root.
570 *
571 * Also, don't try to translate PMU bus device registers.
572 */
573 if ((of_find_property(pp, "ranges", NULL) == NULL &&
574 strcmp(pp->name, "dma") != 0) ||
575 !strcmp(pp->name, "pmu")) {
576 result = of_read_addr(addr, na);
577 goto build_res;
578 }
579
580 dna = na;
581 dns = ns;
582
583 while (1) {
584 dp = pp;
585 pp = dp->parent;
586 if (!pp) {
587 result = of_read_addr(addr, dna);
588 break;
589 }
590
591 pbus = of_match_bus(pp);
592 pbus->count_cells(dp, &pna, &pns);
593
594 if (build_one_resource(dp, bus, pbus, addr, dna, dns, pna))
595 break;
596
597 dna = pna;
598 dns = pns;
599 bus = pbus;
600 }
601
602 build_res:
603 memset(r, 0, sizeof(*r));
604 if (result != OF_BAD_ADDR) {
605 r->start = result;
606 r->end = result + size - 1;
607 r->flags = flags;
608 } else {
609 r->start = ~0UL;
610 r->end = ~0UL;
611 }
612 r->name = op->node->name;
613 }
614}
615
616static struct device_node * __init
617apply_interrupt_map(struct device_node *dp, struct device_node *pp,
618 u32 *imap, int imlen, u32 *imask,
619 unsigned int *irq_p)
620{
621 struct device_node *cp;
622 unsigned int irq = *irq_p;
623 struct of_bus *bus;
624 phandle handle;
625 u32 *reg;
626 int na, num_reg, i;
627
628 bus = of_match_bus(pp);
629 bus->count_cells(dp, &na, NULL);
630
631 reg = of_get_property(dp, "reg", &num_reg);
632 if (!reg || !num_reg)
633 return NULL;
634
635 imlen /= ((na + 3) * 4);
636 handle = 0;
637 for (i = 0; i < imlen; i++) {
638 int j;
639
640 for (j = 0; j < na; j++) {
641 if ((reg[j] & imask[j]) != imap[j])
642 goto next;
643 }
644 if (imap[na] == irq) {
645 handle = imap[na + 1];
646 irq = imap[na + 2];
647 break;
648 }
649
650 next:
651 imap += (na + 3);
652 }
653 if (i == imlen)
654 return NULL;
655
656 *irq_p = irq;
657 cp = of_find_node_by_phandle(handle);
658
659 return cp;
660}
661
662static unsigned int __init pci_irq_swizzle(struct device_node *dp,
663 struct device_node *pp,
664 unsigned int irq)
665{
666 struct linux_prom_pci_registers *regs;
667 unsigned int devfn, slot, ret;
668
669 if (irq < 1 || irq > 4)
670 return irq;
671
672 regs = of_get_property(dp, "reg", NULL);
673 if (!regs)
674 return irq;
675
676 devfn = (regs->phys_hi >> 8) & 0xff;
677 slot = (devfn >> 3) & 0x1f;
678
679 ret = ((irq - 1 + (slot & 3)) & 3) + 1;
680
681 return ret;
682}
683
684static unsigned int __init build_one_device_irq(struct of_device *op,
685 struct device *parent,
686 unsigned int irq)
687{
688 struct device_node *dp = op->node;
689 struct device_node *pp, *ip;
690 unsigned int orig_irq = irq;
691
692 if (irq == 0xffffffff)
693 return irq;
694
695 if (dp->irq_trans) {
696 irq = dp->irq_trans->irq_build(dp, irq,
697 dp->irq_trans->data);
698#if 1
699 printk("%s: direct translate %x --> %x\n",
700 dp->full_name, orig_irq, irq);
701#endif
702 return irq;
703 }
704
705 /* Something more complicated. Walk up to the root, applying
706 * interrupt-map or bus specific translations, until we hit
707 * an IRQ translator.
708 *
709 * If we hit a bus type or situation we cannot handle, we
710 * stop and assume that the original IRQ number was in a
711 * format which has special meaning to it's immediate parent.
712 */
713 pp = dp->parent;
714 ip = NULL;
715 while (pp) {
716 void *imap, *imsk;
717 int imlen;
718
719 imap = of_get_property(pp, "interrupt-map", &imlen);
720 imsk = of_get_property(pp, "interrupt-map-mask", NULL);
721 if (imap && imsk) {
722 struct device_node *iret;
723 int this_orig_irq = irq;
724
725 iret = apply_interrupt_map(dp, pp,
726 imap, imlen, imsk,
727 &irq);
728#if 1
729 printk("%s: Apply [%s:%x] imap --> [%s:%x]\n",
730 op->node->full_name,
731 pp->full_name, this_orig_irq,
732 (iret ? iret->full_name : "NULL"), irq);
733#endif
734 if (!iret)
735 break;
736
737 if (iret->irq_trans) {
738 ip = iret;
739 break;
740 }
741 } else {
742 if (!strcmp(pp->type, "pci") ||
743 !strcmp(pp->type, "pciex")) {
744 unsigned int this_orig_irq = irq;
745
746 irq = pci_irq_swizzle(dp, pp, irq);
747#if 1
748 printk("%s: PCI swizzle [%s] %x --> %x\n",
749 op->node->full_name,
750 pp->full_name, this_orig_irq, irq);
751#endif
752 }
753
754 if (pp->irq_trans) {
755 ip = pp;
756 break;
757 }
758 }
759 dp = pp;
760 pp = pp->parent;
761 }
762 if (!ip)
763 return orig_irq;
764
765 irq = ip->irq_trans->irq_build(op->node, irq,
766 ip->irq_trans->data);
767#if 1
768 printk("%s: Apply IRQ trans [%s] %x --> %x\n",
769 op->node->full_name, ip->full_name, orig_irq, irq);
770#endif
771
772 return irq;
773}
774
775static struct of_device * __init scan_one_device(struct device_node *dp,
776 struct device *parent)
777{
778 struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL);
779 unsigned int *irq;
780 int len, i;
781
782 if (!op)
783 return NULL;
784
785 op->node = dp;
786
787 op->clock_freq = of_getintprop_default(dp, "clock-frequency",
788 (25*1000*1000));
789 op->portid = of_getintprop_default(dp, "upa-portid", -1);
790 if (op->portid == -1)
791 op->portid = of_getintprop_default(dp, "portid", -1);
792
793 irq = of_get_property(dp, "interrupts", &len);
794 if (irq) {
795 memcpy(op->irqs, irq, len);
796 op->num_irqs = len / 4;
797 } else {
798 op->num_irqs = 0;
799 }
800
801 build_device_resources(op, parent);
802 for (i = 0; i < op->num_irqs; i++)
803 op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]);
804
805 op->dev.parent = parent;
806 op->dev.bus = &of_bus_type;
807 if (!parent)
808 strcpy(op->dev.bus_id, "root");
809 else
810 strcpy(op->dev.bus_id, dp->path_component_name);
811
812 if (of_device_register(op)) {
813 printk("%s: Could not register of device.\n",
814 dp->full_name);
815 kfree(op);
816 op = NULL;
817 }
818
819 return op;
820}
821
822static void __init scan_tree(struct device_node *dp, struct device *parent)
823{
824 while (dp) {
825 struct of_device *op = scan_one_device(dp, parent);
826
827 if (op)
828 scan_tree(dp->child, &op->dev);
829
830 dp = dp->sibling;
831 }
832}
833
834static void __init scan_of_devices(void)
835{
836 struct device_node *root = of_find_node_by_path("/");
837 struct of_device *parent;
838
839 parent = scan_one_device(root, NULL);
840 if (!parent)
841 return;
842
843 scan_tree(root->child, &parent->dev);
844}
845
166static int __init of_bus_driver_init(void) 846static int __init of_bus_driver_init(void)
167{ 847{
168 int err = 0; 848 int err;
169 849
850 err = bus_register(&of_bus_type);
170#ifdef CONFIG_PCI 851#ifdef CONFIG_PCI
171 if (!err) 852 if (!err)
172 err = bus_register(&isa_bus_type); 853 err = bus_register(&isa_bus_type);
@@ -177,7 +858,11 @@ static int __init of_bus_driver_init(void)
177 if (!err) 858 if (!err)
178 err = bus_register(&sbus_bus_type); 859 err = bus_register(&sbus_bus_type);
179#endif 860#endif
180 return 0; 861
862 if (!err)
863 scan_of_devices();
864
865 return err;
181} 866}
182 867
183postcore_initcall(of_bus_driver_init); 868postcore_initcall(of_bus_driver_init);
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 20ca9ec8fd3b..04ea6c2eb7a1 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -307,7 +307,6 @@ static void __init pci_scan_each_controller_bus(void)
307 p->scan_bus(p); 307 p->scan_bus(p);
308} 308}
309 309
310extern void clock_probe(void);
311extern void power_init(void); 310extern void power_init(void);
312 311
313static int __init pcibios_init(void) 312static int __init pcibios_init(void)
@@ -320,7 +319,6 @@ static int __init pcibios_init(void)
320 319
321 isa_init(); 320 isa_init();
322 ebus_init(); 321 ebus_init();
323 clock_probe();
324 power_init(); 322 power_init();
325 323
326 return 0; 324 return 0;
@@ -406,14 +404,8 @@ void pcibios_bus_to_resource(struct pci_dev *pdev, struct resource *res,
406} 404}
407EXPORT_SYMBOL(pcibios_bus_to_resource); 405EXPORT_SYMBOL(pcibios_bus_to_resource);
408 406
409extern int pci_irq_verbose;
410
411char * __init pcibios_setup(char *str) 407char * __init pcibios_setup(char *str)
412{ 408{
413 if (!strcmp(str, "irq_verbose")) {
414 pci_irq_verbose = 1;
415 return NULL;
416 }
417 return str; 409 return str;
418} 410}
419 411
diff --git a/arch/sparc64/kernel/pci_common.c b/arch/sparc64/kernel/pci_common.c
index b06a2955bf5f..7a59cc72c844 100644
--- a/arch/sparc64/kernel/pci_common.c
+++ b/arch/sparc64/kernel/pci_common.c
@@ -10,12 +10,10 @@
10 10
11#include <asm/pbm.h> 11#include <asm/pbm.h>
12#include <asm/prom.h> 12#include <asm/prom.h>
13#include <asm/of_device.h>
13 14
14#include "pci_impl.h" 15#include "pci_impl.h"
15 16
16/* Pass "pci=irq_verbose" on the kernel command line to enable this. */
17int pci_irq_verbose;
18
19/* Fix self device of BUS and hook it into BUS->self. 17/* Fix self device of BUS and hook it into BUS->self.
20 * The pci_scan_bus does not do this for the host bridge. 18 * The pci_scan_bus does not do this for the host bridge.
21 */ 19 */
@@ -169,6 +167,7 @@ static void __init pdev_cookie_fillin(struct pci_pbm_info *pbm,
169 } 167 }
170 pcp->pbm = pbm; 168 pcp->pbm = pbm;
171 pcp->prom_node = dp; 169 pcp->prom_node = dp;
170 pcp->op = of_find_device_by_node(dp);
172 memcpy(pcp->prom_regs, pregs, 171 memcpy(pcp->prom_regs, pregs,
173 nregs * sizeof(struct linux_prom_pci_registers)); 172 nregs * sizeof(struct linux_prom_pci_registers));
174 pcp->num_prom_regs = nregs; 173 pcp->num_prom_regs = nregs;
@@ -549,296 +548,18 @@ void __init pci_assign_unassigned(struct pci_pbm_info *pbm,
549 pci_assign_unassigned(pbm, bus); 548 pci_assign_unassigned(pbm, bus);
550} 549}
551 550
552static inline unsigned int pci_slot_swivel(struct pci_pbm_info *pbm,
553 struct pci_dev *toplevel_pdev,
554 struct pci_dev *pdev,
555 unsigned int interrupt)
556{
557 unsigned int ret;
558
559 if (unlikely(interrupt < 1 || interrupt > 4)) {
560 printk("%s: Device %s interrupt value of %u is strange.\n",
561 pbm->name, pci_name(pdev), interrupt);
562 return interrupt;
563 }
564
565 ret = ((interrupt - 1 + (PCI_SLOT(pdev->devfn) & 3)) & 3) + 1;
566
567 if (pci_irq_verbose)
568 printk("%s: %s IRQ Swivel %s [%x:%x] -> [%x]\n",
569 pbm->name, pci_name(toplevel_pdev), pci_name(pdev),
570 interrupt, PCI_SLOT(pdev->devfn), ret);
571
572 return ret;
573}
574
575static inline unsigned int pci_apply_intmap(struct pci_pbm_info *pbm,
576 struct pci_dev *toplevel_pdev,
577 struct pci_dev *pbus,
578 struct pci_dev *pdev,
579 unsigned int interrupt,
580 struct device_node **cnode)
581{
582 struct linux_prom_pci_intmap *imap;
583 struct linux_prom_pci_intmask *imask;
584 struct pcidev_cookie *pbus_pcp = pbus->sysdata;
585 struct pcidev_cookie *pdev_pcp = pdev->sysdata;
586 struct linux_prom_pci_registers *pregs = pdev_pcp->prom_regs;
587 struct property *prop;
588 int plen, num_imap, i;
589 unsigned int hi, mid, lo, irq, orig_interrupt;
590
591 *cnode = pbus_pcp->prom_node;
592
593 prop = of_find_property(pbus_pcp->prom_node, "interrupt-map", &plen);
594 if (!prop ||
595 (plen % sizeof(struct linux_prom_pci_intmap)) != 0) {
596 printk("%s: Device %s interrupt-map has bad len %d\n",
597 pbm->name, pci_name(pbus), plen);
598 goto no_intmap;
599 }
600 imap = prop->value;
601 num_imap = plen / sizeof(struct linux_prom_pci_intmap);
602
603 prop = of_find_property(pbus_pcp->prom_node, "interrupt-map-mask", &plen);
604 if (!prop ||
605 (plen % sizeof(struct linux_prom_pci_intmask)) != 0) {
606 printk("%s: Device %s interrupt-map-mask has bad len %d\n",
607 pbm->name, pci_name(pbus), plen);
608 goto no_intmap;
609 }
610 imask = prop->value;
611
612 orig_interrupt = interrupt;
613
614 hi = pregs->phys_hi & imask->phys_hi;
615 mid = pregs->phys_mid & imask->phys_mid;
616 lo = pregs->phys_lo & imask->phys_lo;
617 irq = interrupt & imask->interrupt;
618
619 for (i = 0; i < num_imap; i++) {
620 if (imap[i].phys_hi == hi &&
621 imap[i].phys_mid == mid &&
622 imap[i].phys_lo == lo &&
623 imap[i].interrupt == irq) {
624 *cnode = of_find_node_by_phandle(imap[i].cnode);
625 interrupt = imap[i].cinterrupt;
626 }
627 }
628
629 if (pci_irq_verbose)
630 printk("%s: %s MAP BUS %s DEV %s [%x] -> [%x]\n",
631 pbm->name, pci_name(toplevel_pdev),
632 pci_name(pbus), pci_name(pdev),
633 orig_interrupt, interrupt);
634
635no_intmap:
636 return interrupt;
637}
638
639/* For each PCI bus on the way to the root:
640 * 1) If it has an interrupt-map property, apply it.
641 * 2) Else, swivel the interrupt number based upon the PCI device number.
642 *
643 * Return the "IRQ controller" node. If this is the PBM's device node,
644 * all interrupt translations are complete, else we should use that node's
645 * "reg" property to apply the PBM's "interrupt-{map,mask}" to the interrupt.
646 */
647static struct device_node * __init
648pci_intmap_match_to_root(struct pci_pbm_info *pbm,
649 struct pci_dev *pdev,
650 unsigned int *interrupt)
651{
652 struct pci_dev *toplevel_pdev = pdev;
653 struct pcidev_cookie *toplevel_pcp = toplevel_pdev->sysdata;
654 struct device_node *cnode = toplevel_pcp->prom_node;
655
656 while (pdev->bus->number != pbm->pci_first_busno) {
657 struct pci_dev *pbus = pdev->bus->self;
658 struct pcidev_cookie *pcp = pbus->sysdata;
659 struct property *prop;
660
661 prop = of_find_property(pcp->prom_node, "interrupt-map", NULL);
662 if (!prop) {
663 *interrupt = pci_slot_swivel(pbm, toplevel_pdev,
664 pdev, *interrupt);
665 cnode = pcp->prom_node;
666 } else {
667 *interrupt = pci_apply_intmap(pbm, toplevel_pdev,
668 pbus, pdev,
669 *interrupt, &cnode);
670
671 while (pcp->prom_node != cnode &&
672 pbus->bus->number != pbm->pci_first_busno) {
673 pbus = pbus->bus->self;
674 pcp = pbus->sysdata;
675 }
676 }
677 pdev = pbus;
678
679 if (cnode == pbm->prom_node)
680 break;
681 }
682
683 return cnode;
684}
685
686static int __init pci_intmap_match(struct pci_dev *pdev, unsigned int *interrupt)
687{
688 struct pcidev_cookie *dev_pcp = pdev->sysdata;
689 struct pci_pbm_info *pbm = dev_pcp->pbm;
690 struct linux_prom_pci_registers *reg;
691 struct device_node *cnode;
692 struct property *prop;
693 unsigned int hi, mid, lo, irq;
694 int i, plen;
695
696 cnode = pci_intmap_match_to_root(pbm, pdev, interrupt);
697 if (cnode == pbm->prom_node)
698 goto success;
699
700 prop = of_find_property(cnode, "reg", &plen);
701 if (!prop ||
702 (plen % sizeof(struct linux_prom_pci_registers)) != 0) {
703 printk("%s: OBP node %s reg property has bad len %d\n",
704 pbm->name, cnode->full_name, plen);
705 goto fail;
706 }
707 reg = prop->value;
708
709 hi = reg[0].phys_hi & pbm->pbm_intmask->phys_hi;
710 mid = reg[0].phys_mid & pbm->pbm_intmask->phys_mid;
711 lo = reg[0].phys_lo & pbm->pbm_intmask->phys_lo;
712 irq = *interrupt & pbm->pbm_intmask->interrupt;
713
714 for (i = 0; i < pbm->num_pbm_intmap; i++) {
715 struct linux_prom_pci_intmap *intmap;
716
717 intmap = &pbm->pbm_intmap[i];
718
719 if (intmap->phys_hi == hi &&
720 intmap->phys_mid == mid &&
721 intmap->phys_lo == lo &&
722 intmap->interrupt == irq) {
723 *interrupt = intmap->cinterrupt;
724 goto success;
725 }
726 }
727
728fail:
729 return 0;
730
731success:
732 if (pci_irq_verbose)
733 printk("%s: Routing bus[%2x] slot[%2x] to INO[%02x]\n",
734 pbm->name,
735 pdev->bus->number, PCI_SLOT(pdev->devfn),
736 *interrupt);
737 return 1;
738}
739
740static void __init pdev_fixup_irq(struct pci_dev *pdev) 551static void __init pdev_fixup_irq(struct pci_dev *pdev)
741{ 552{
742 struct pcidev_cookie *pcp = pdev->sysdata; 553 struct pcidev_cookie *pcp = pdev->sysdata;
743 struct pci_pbm_info *pbm = pcp->pbm; 554 struct of_device *op = pcp->op;
744 struct pci_controller_info *p = pbm->parent;
745 unsigned int portid = pbm->portid;
746 unsigned int prom_irq;
747 struct device_node *dp = pcp->prom_node;
748 struct property *prop;
749
750 /* If this is an empty EBUS device, sometimes OBP fails to
751 * give it a valid fully specified interrupts property.
752 * The EBUS hooked up to SunHME on PCI I/O boards of
753 * Ex000 systems is one such case.
754 *
755 * The interrupt is not important so just ignore it.
756 */
757 if (pdev->vendor == PCI_VENDOR_ID_SUN &&
758 pdev->device == PCI_DEVICE_ID_SUN_EBUS &&
759 !dp->child) {
760 pdev->irq = 0;
761 return;
762 }
763 555
764 prop = of_find_property(dp, "interrupts", NULL); 556 if (op->irqs[0] == 0xffffffff) {
765 if (!prop) { 557 pdev->irq = PCI_IRQ_NONE;
766 pdev->irq = 0;
767 return; 558 return;
768 } 559 }
769 prom_irq = *(unsigned int *) prop->value;
770
771 if (tlb_type != hypervisor) {
772 /* Fully specified already? */
773 if (((prom_irq & PCI_IRQ_IGN) >> 6) == portid) {
774 pdev->irq = p->irq_build(pbm, pdev, prom_irq);
775 goto have_irq;
776 }
777
778 /* An onboard device? (bit 5 set) */
779 if ((prom_irq & PCI_IRQ_INO) & 0x20) {
780 pdev->irq = p->irq_build(pbm, pdev, (portid << 6 | prom_irq));
781 goto have_irq;
782 }
783 }
784
785 /* Can we find a matching entry in the interrupt-map? */
786 if (pci_intmap_match(pdev, &prom_irq)) {
787 pdev->irq = p->irq_build(pbm, pdev, (portid << 6) | prom_irq);
788 goto have_irq;
789 }
790
791 /* Ok, we have to do it the hard way. */
792 {
793 unsigned int bus, slot, line;
794
795 bus = (pbm == &pbm->parent->pbm_B) ? (1 << 4) : 0;
796
797 /* If we have a legal interrupt property, use it as
798 * the IRQ line.
799 */
800 if (prom_irq > 0 && prom_irq < 5) {
801 line = ((prom_irq - 1) & 3);
802 } else {
803 u8 pci_irq_line;
804 560
805 /* Else just directly consult PCI config space. */ 561 pdev->irq = op->irqs[0];
806 pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pci_irq_line);
807 line = ((pci_irq_line - 1) & 3);
808 }
809
810 /* Now figure out the slot.
811 *
812 * Basically, device number zero on the top-level bus is
813 * always the PCI host controller. Slot 0 is then device 1.
814 * PBM A supports two external slots (0 and 1), and PBM B
815 * supports 4 external slots (0, 1, 2, and 3). On-board PCI
816 * devices are wired to device numbers outside of these
817 * ranges. -DaveM
818 */
819 if (pdev->bus->number == pbm->pci_first_busno) {
820 slot = PCI_SLOT(pdev->devfn) - pbm->pci_first_slot;
821 } else {
822 struct pci_dev *bus_dev;
823
824 /* Underneath a bridge, use slot number of parent
825 * bridge which is closest to the PBM.
826 */
827 bus_dev = pdev->bus->self;
828 while (bus_dev->bus &&
829 bus_dev->bus->number != pbm->pci_first_busno)
830 bus_dev = bus_dev->bus->self;
831
832 slot = PCI_SLOT(bus_dev->devfn) - pbm->pci_first_slot;
833 }
834 slot = slot << 2;
835
836 pdev->irq = p->irq_build(pbm, pdev,
837 ((portid << 6) & PCI_IRQ_IGN) |
838 (bus | slot | line));
839 }
840 562
841have_irq:
842 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 563 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE,
843 pdev->irq & PCI_IRQ_INO); 564 pdev->irq & PCI_IRQ_INO);
844} 565}
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index 5b2261ebda6f..bf7b32b36705 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -18,6 +18,7 @@
18#include <asm/irq.h> 18#include <asm/irq.h>
19#include <asm/starfire.h> 19#include <asm/starfire.h>
20#include <asm/prom.h> 20#include <asm/prom.h>
21#include <asm/of_device.h>
21 22
22#include "pci_impl.h" 23#include "pci_impl.h"
23#include "iommu_common.h" 24#include "iommu_common.h"
@@ -208,110 +209,6 @@ static struct pci_ops psycho_ops = {
208 .write = psycho_write_pci_cfg, 209 .write = psycho_write_pci_cfg,
209}; 210};
210 211
211/* PSYCHO interrupt mapping support. */
212#define PSYCHO_IMAP_A_SLOT0 0x0c00UL
213#define PSYCHO_IMAP_B_SLOT0 0x0c20UL
214static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
215{
216 unsigned int bus = (ino & 0x10) >> 4;
217 unsigned int slot = (ino & 0x0c) >> 2;
218
219 if (bus == 0)
220 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
221 else
222 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
223}
224
225#define PSYCHO_IMAP_SCSI 0x1000UL
226#define PSYCHO_IMAP_ETH 0x1008UL
227#define PSYCHO_IMAP_BPP 0x1010UL
228#define PSYCHO_IMAP_AU_REC 0x1018UL
229#define PSYCHO_IMAP_AU_PLAY 0x1020UL
230#define PSYCHO_IMAP_PFAIL 0x1028UL
231#define PSYCHO_IMAP_KMS 0x1030UL
232#define PSYCHO_IMAP_FLPY 0x1038UL
233#define PSYCHO_IMAP_SHW 0x1040UL
234#define PSYCHO_IMAP_KBD 0x1048UL
235#define PSYCHO_IMAP_MS 0x1050UL
236#define PSYCHO_IMAP_SER 0x1058UL
237#define PSYCHO_IMAP_TIM0 0x1060UL
238#define PSYCHO_IMAP_TIM1 0x1068UL
239#define PSYCHO_IMAP_UE 0x1070UL
240#define PSYCHO_IMAP_CE 0x1078UL
241#define PSYCHO_IMAP_A_ERR 0x1080UL
242#define PSYCHO_IMAP_B_ERR 0x1088UL
243#define PSYCHO_IMAP_PMGMT 0x1090UL
244#define PSYCHO_IMAP_GFX 0x1098UL
245#define PSYCHO_IMAP_EUPA 0x10a0UL
246
247static unsigned long __onboard_imap_off[] = {
248/*0x20*/ PSYCHO_IMAP_SCSI,
249/*0x21*/ PSYCHO_IMAP_ETH,
250/*0x22*/ PSYCHO_IMAP_BPP,
251/*0x23*/ PSYCHO_IMAP_AU_REC,
252/*0x24*/ PSYCHO_IMAP_AU_PLAY,
253/*0x25*/ PSYCHO_IMAP_PFAIL,
254/*0x26*/ PSYCHO_IMAP_KMS,
255/*0x27*/ PSYCHO_IMAP_FLPY,
256/*0x28*/ PSYCHO_IMAP_SHW,
257/*0x29*/ PSYCHO_IMAP_KBD,
258/*0x2a*/ PSYCHO_IMAP_MS,
259/*0x2b*/ PSYCHO_IMAP_SER,
260/*0x2c*/ PSYCHO_IMAP_TIM0,
261/*0x2d*/ PSYCHO_IMAP_TIM1,
262/*0x2e*/ PSYCHO_IMAP_UE,
263/*0x2f*/ PSYCHO_IMAP_CE,
264/*0x30*/ PSYCHO_IMAP_A_ERR,
265/*0x31*/ PSYCHO_IMAP_B_ERR,
266/*0x32*/ PSYCHO_IMAP_PMGMT
267};
268#define PSYCHO_ONBOARD_IRQ_BASE 0x20
269#define PSYCHO_ONBOARD_IRQ_LAST 0x32
270#define psycho_onboard_imap_offset(__ino) \
271 __onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
272
273#define PSYCHO_ICLR_A_SLOT0 0x1400UL
274#define PSYCHO_ICLR_SCSI 0x1800UL
275
276#define psycho_iclr_offset(ino) \
277 ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
278 (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
279
280static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
281 struct pci_dev *pdev,
282 unsigned int ino)
283{
284 unsigned long imap, iclr;
285 unsigned long imap_off, iclr_off;
286 int inofixup = 0;
287
288 ino &= PCI_IRQ_INO;
289 if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
290 /* PCI slot */
291 imap_off = psycho_pcislot_imap_offset(ino);
292 } else {
293 /* Onboard device */
294 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
295 prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
296 prom_halt();
297 }
298 imap_off = psycho_onboard_imap_offset(ino);
299 }
300
301 /* Now build the IRQ bucket. */
302 imap = pbm->controller_regs + imap_off;
303 imap += 4;
304
305 iclr_off = psycho_iclr_offset(ino);
306 iclr = pbm->controller_regs + iclr_off;
307 iclr += 4;
308
309 if ((ino & 0x20) == 0)
310 inofixup = ino & 0x03;
311
312 return build_irq(inofixup, iclr, imap);
313}
314
315/* PSYCHO error handling support. */ 212/* PSYCHO error handling support. */
316enum psycho_error_type { 213enum psycho_error_type {
317 UE_ERR, CE_ERR, PCI_ERR 214 UE_ERR, CE_ERR, PCI_ERR
@@ -944,51 +841,34 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *reg
944#define PSYCHO_ECCCTRL_EE 0x8000000000000000UL /* Enable ECC Checking */ 841#define PSYCHO_ECCCTRL_EE 0x8000000000000000UL /* Enable ECC Checking */
945#define PSYCHO_ECCCTRL_UE 0x4000000000000000UL /* Enable UE Interrupts */ 842#define PSYCHO_ECCCTRL_UE 0x4000000000000000UL /* Enable UE Interrupts */
946#define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */ 843#define PSYCHO_ECCCTRL_CE 0x2000000000000000UL /* Enable CE INterrupts */
947#define PSYCHO_UE_INO 0x2e
948#define PSYCHO_CE_INO 0x2f
949#define PSYCHO_PCIERR_A_INO 0x30
950#define PSYCHO_PCIERR_B_INO 0x31
951static void psycho_register_error_handlers(struct pci_controller_info *p) 844static void psycho_register_error_handlers(struct pci_controller_info *p)
952{ 845{
953 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ 846 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
847 struct of_device *op = of_find_device_by_node(pbm->prom_node);
954 unsigned long base = p->pbm_A.controller_regs; 848 unsigned long base = p->pbm_A.controller_regs;
955 unsigned int irq, portid = pbm->portid;
956 u64 tmp; 849 u64 tmp;
957 850
958 /* Build IRQs and register handlers. */ 851 if (!op)
959 irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_UE_INO); 852 return;
960 if (request_irq(irq, psycho_ue_intr,
961 SA_SHIRQ, "PSYCHO UE", p) < 0) {
962 prom_printf("PSYCHO%d: Cannot register UE interrupt.\n",
963 p->index);
964 prom_halt();
965 }
966 853
967 irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_CE_INO); 854 /* Psycho interrupt property order is:
968 if (request_irq(irq, psycho_ce_intr, 855 * 0: PCIERR PBM B INO
969 SA_SHIRQ, "PSYCHO CE", p) < 0) { 856 * 1: UE ERR
970 prom_printf("PSYCHO%d: Cannot register CE interrupt.\n", 857 * 2: CE ERR
971 p->index); 858 * 3: POWER FAIL
972 prom_halt(); 859 * 4: SPARE HARDWARE
973 } 860 * 5: PCIERR PBM A INO
861 */
974 862
975 pbm = &p->pbm_A; 863 if (op->num_irqs < 6)
976 irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_PCIERR_A_INO); 864 return;
977 if (request_irq(irq, psycho_pcierr_intr,
978 SA_SHIRQ, "PSYCHO PCIERR", &p->pbm_A) < 0) {
979 prom_printf("PSYCHO%d(PBMA): Cannot register PciERR interrupt.\n",
980 p->index);
981 prom_halt();
982 }
983 865
984 pbm = &p->pbm_B; 866 request_irq(op->irqs[1], psycho_ue_intr, SA_SHIRQ, "PSYCHO UE", p);
985 irq = psycho_irq_build(pbm, NULL, (portid << 6) | PSYCHO_PCIERR_B_INO); 867 request_irq(op->irqs[2], psycho_ce_intr, SA_SHIRQ, "PSYCHO CE", p);
986 if (request_irq(irq, psycho_pcierr_intr, 868 request_irq(op->irqs[5], psycho_pcierr_intr, SA_SHIRQ,
987 SA_SHIRQ, "PSYCHO PCIERR", &p->pbm_B) < 0) { 869 "PSYCHO PCIERR-A", &p->pbm_A);
988 prom_printf("PSYCHO%d(PBMB): Cannot register PciERR interrupt.\n", 870 request_irq(op->irqs[0], psycho_pcierr_intr, SA_SHIRQ,
989 p->index); 871 "PSYCHO PCIERR-B", &p->pbm_B);
990 prom_halt();
991 }
992 872
993 /* Enable UE and CE interrupts for controller. */ 873 /* Enable UE and CE interrupts for controller. */
994 psycho_write(base + PSYCHO_ECC_CTRL, 874 psycho_write(base + PSYCHO_ECC_CTRL,
@@ -1171,9 +1051,7 @@ static void psycho_iommu_init(struct pci_controller_info *p)
1171 1051
1172 /* If necessary, hook us up for starfire IRQ translations. */ 1052 /* If necessary, hook us up for starfire IRQ translations. */
1173 if (this_is_starfire) 1053 if (this_is_starfire)
1174 p->starfire_cookie = starfire_hookup(p->pbm_A.portid); 1054 starfire_hookup(p->pbm_A.portid);
1175 else
1176 p->starfire_cookie = NULL;
1177} 1055}
1178 1056
1179#define PSYCHO_IRQ_RETRY 0x1a00UL 1057#define PSYCHO_IRQ_RETRY 0x1a00UL
@@ -1408,7 +1286,6 @@ void psycho_init(struct device_node *dp, char *model_name)
1408 p->index = pci_num_controllers++; 1286 p->index = pci_num_controllers++;
1409 p->pbms_same_domain = 0; 1287 p->pbms_same_domain = 0;
1410 p->scan_bus = psycho_scan_bus; 1288 p->scan_bus = psycho_scan_bus;
1411 p->irq_build = psycho_irq_build;
1412 p->base_address_update = psycho_base_address_update; 1289 p->base_address_update = psycho_base_address_update;
1413 p->resource_adjust = psycho_resource_adjust; 1290 p->resource_adjust = psycho_resource_adjust;
1414 p->pci_ops = &psycho_ops; 1291 p->pci_ops = &psycho_ops;
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 26f194ce4400..5e087b0fb4c9 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -485,114 +485,6 @@ static struct pci_ops sabre_ops = {
485 .write = sabre_write_pci_cfg, 485 .write = sabre_write_pci_cfg,
486}; 486};
487 487
488static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
489{
490 unsigned int bus = (ino & 0x10) >> 4;
491 unsigned int slot = (ino & 0x0c) >> 2;
492
493 if (bus == 0)
494 return SABRE_IMAP_A_SLOT0 + (slot * 8);
495 else
496 return SABRE_IMAP_B_SLOT0 + (slot * 8);
497}
498
499static unsigned long __onboard_imap_off[] = {
500/*0x20*/ SABRE_IMAP_SCSI,
501/*0x21*/ SABRE_IMAP_ETH,
502/*0x22*/ SABRE_IMAP_BPP,
503/*0x23*/ SABRE_IMAP_AU_REC,
504/*0x24*/ SABRE_IMAP_AU_PLAY,
505/*0x25*/ SABRE_IMAP_PFAIL,
506/*0x26*/ SABRE_IMAP_KMS,
507/*0x27*/ SABRE_IMAP_FLPY,
508/*0x28*/ SABRE_IMAP_SHW,
509/*0x29*/ SABRE_IMAP_KBD,
510/*0x2a*/ SABRE_IMAP_MS,
511/*0x2b*/ SABRE_IMAP_SER,
512/*0x2c*/ 0 /* reserved */,
513/*0x2d*/ 0 /* reserved */,
514/*0x2e*/ SABRE_IMAP_UE,
515/*0x2f*/ SABRE_IMAP_CE,
516/*0x30*/ SABRE_IMAP_PCIERR,
517};
518#define SABRE_ONBOARD_IRQ_BASE 0x20
519#define SABRE_ONBOARD_IRQ_LAST 0x30
520#define sabre_onboard_imap_offset(__ino) \
521 __onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
522
523#define sabre_iclr_offset(ino) \
524 ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
525 (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
526
527/* When a device lives behind a bridge deeper in the PCI bus topology
528 * than APB, a special sequence must run to make sure all pending DMA
529 * transfers at the time of IRQ delivery are visible in the coherency
530 * domain by the cpu. This sequence is to perform a read on the far
531 * side of the non-APB bridge, then perform a read of Sabre's DMA
532 * write-sync register.
533 */
534static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
535{
536 struct pci_dev *pdev = _arg1;
537 unsigned long sync_reg = (unsigned long) _arg2;
538 u16 _unused;
539
540 pci_read_config_word(pdev, PCI_VENDOR_ID, &_unused);
541 sabre_read(sync_reg);
542}
543
544static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
545 struct pci_dev *pdev,
546 unsigned int ino)
547{
548 unsigned long imap, iclr;
549 unsigned long imap_off, iclr_off;
550 int inofixup = 0;
551 int virt_irq;
552
553 ino &= PCI_IRQ_INO;
554 if (ino < SABRE_ONBOARD_IRQ_BASE) {
555 /* PCI slot */
556 imap_off = sabre_pcislot_imap_offset(ino);
557 } else {
558 /* onboard device */
559 if (ino > SABRE_ONBOARD_IRQ_LAST) {
560 prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
561 prom_halt();
562 }
563 imap_off = sabre_onboard_imap_offset(ino);
564 }
565
566 /* Now build the IRQ bucket. */
567 imap = pbm->controller_regs + imap_off;
568 imap += 4;
569
570 iclr_off = sabre_iclr_offset(ino);
571 iclr = pbm->controller_regs + iclr_off;
572 iclr += 4;
573
574 if ((ino & 0x20) == 0)
575 inofixup = ino & 0x03;
576
577 virt_irq = build_irq(inofixup, iclr, imap);
578
579 if (pdev) {
580 struct pcidev_cookie *pcp = pdev->sysdata;
581
582 if (pdev->bus->number != pcp->pbm->pci_first_busno) {
583 struct pci_controller_info *p = pcp->pbm->parent;
584
585 irq_install_pre_handler(virt_irq,
586 sabre_wsync_handler,
587 pdev,
588 (void *)
589 p->pbm_A.controller_regs +
590 SABRE_WRSYNC);
591 }
592 }
593 return virt_irq;
594}
595
596/* SABRE error handling support. */ 488/* SABRE error handling support. */
597static void sabre_check_iommu_error(struct pci_controller_info *p, 489static void sabre_check_iommu_error(struct pci_controller_info *p,
598 unsigned long afsr, 490 unsigned long afsr,
@@ -929,17 +821,30 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs
929 return IRQ_HANDLED; 821 return IRQ_HANDLED;
930} 822}
931 823
932/* XXX What about PowerFail/PowerManagement??? -DaveM */
933#define SABRE_UE_INO 0x2e
934#define SABRE_CE_INO 0x2f
935#define SABRE_PCIERR_INO 0x30
936static void sabre_register_error_handlers(struct pci_controller_info *p) 824static void sabre_register_error_handlers(struct pci_controller_info *p)
937{ 825{
938 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ 826 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
827 struct device_node *dp = pbm->prom_node;
828 struct of_device *op;
939 unsigned long base = pbm->controller_regs; 829 unsigned long base = pbm->controller_regs;
940 unsigned long irq, portid = pbm->portid;
941 u64 tmp; 830 u64 tmp;
942 831
832 if (pbm->chip_type == PBM_CHIP_TYPE_SABRE)
833 dp = dp->parent;
834
835 op = of_find_device_by_node(dp);
836 if (!op)
837 return;
838
839 /* Sabre/Hummingbird IRQ property layout is:
840 * 0: PCI ERR
841 * 1: UE ERR
842 * 2: CE ERR
843 * 3: POWER FAIL
844 */
845 if (op->num_irqs < 4)
846 return;
847
943 /* We clear the error bits in the appropriate AFSR before 848 /* We clear the error bits in the appropriate AFSR before
944 * registering the handler so that we don't get spurious 849 * registering the handler so that we don't get spurious
945 * interrupts. 850 * interrupts.
@@ -948,32 +853,16 @@ static void sabre_register_error_handlers(struct pci_controller_info *p)
948 (SABRE_UEAFSR_PDRD | SABRE_UEAFSR_PDWR | 853 (SABRE_UEAFSR_PDRD | SABRE_UEAFSR_PDWR |
949 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR | 854 SABRE_UEAFSR_SDRD | SABRE_UEAFSR_SDWR |
950 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE)); 855 SABRE_UEAFSR_SDTE | SABRE_UEAFSR_PDTE));
951 irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_UE_INO); 856
952 if (request_irq(irq, sabre_ue_intr, 857 request_irq(op->irqs[1], sabre_ue_intr, SA_SHIRQ, "SABRE UE", p);
953 SA_SHIRQ, "SABRE UE", p) < 0) {
954 prom_printf("SABRE%d: Cannot register UE interrupt.\n",
955 p->index);
956 prom_halt();
957 }
958 858
959 sabre_write(base + SABRE_CE_AFSR, 859 sabre_write(base + SABRE_CE_AFSR,
960 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | 860 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR |
961 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR)); 861 SABRE_CEAFSR_SDRD | SABRE_CEAFSR_SDWR));
962 irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_CE_INO);
963 if (request_irq(irq, sabre_ce_intr,
964 SA_SHIRQ, "SABRE CE", p) < 0) {
965 prom_printf("SABRE%d: Cannot register CE interrupt.\n",
966 p->index);
967 prom_halt();
968 }
969 862
970 irq = sabre_irq_build(pbm, NULL, (portid << 6) | SABRE_PCIERR_INO); 863 request_irq(op->irqs[2], sabre_ce_intr, SA_SHIRQ, "SABRE CE", p);
971 if (request_irq(irq, sabre_pcierr_intr, 864 request_irq(op->irqs[0], sabre_pcierr_intr, SA_SHIRQ,
972 SA_SHIRQ, "SABRE PCIERR", p) < 0) { 865 "SABRE PCIERR", p);
973 prom_printf("SABRE%d: Cannot register PciERR interrupt.\n",
974 p->index);
975 prom_halt();
976 }
977 866
978 tmp = sabre_read(base + SABRE_PCICTRL); 867 tmp = sabre_read(base + SABRE_PCICTRL);
979 tmp |= SABRE_PCICTRL_ERREN; 868 tmp |= SABRE_PCICTRL_ERREN;
@@ -1492,7 +1381,6 @@ void sabre_init(struct device_node *dp, char *model_name)
1492 p->index = pci_num_controllers++; 1381 p->index = pci_num_controllers++;
1493 p->pbms_same_domain = 1; 1382 p->pbms_same_domain = 1;
1494 p->scan_bus = sabre_scan_bus; 1383 p->scan_bus = sabre_scan_bus;
1495 p->irq_build = sabre_irq_build;
1496 p->base_address_update = sabre_base_address_update; 1384 p->base_address_update = sabre_base_address_update;
1497 p->resource_adjust = sabre_resource_adjust; 1385 p->resource_adjust = sabre_resource_adjust;
1498 p->pci_ops = &sabre_ops; 1386 p->pci_ops = &sabre_ops;
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index f16449ccd7bc..5c6e2a9b91f8 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -217,116 +217,6 @@ static struct pci_ops schizo_ops = {
217 .write = schizo_write_pci_cfg, 217 .write = schizo_write_pci_cfg,
218}; 218};
219 219
220/* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
221 * imap/iclr registers are per-PBM.
222 */
223#define SCHIZO_IMAP_BASE 0x1000UL
224#define SCHIZO_ICLR_BASE 0x1400UL
225
226static unsigned long schizo_imap_offset(unsigned long ino)
227{
228 return SCHIZO_IMAP_BASE + (ino * 8UL);
229}
230
231static unsigned long schizo_iclr_offset(unsigned long ino)
232{
233 return SCHIZO_ICLR_BASE + (ino * 8UL);
234}
235
236static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
237{
238 unsigned long sync_reg = (unsigned long) _arg2;
239 u64 mask = 1UL << (ino & IMAP_INO);
240 u64 val;
241 int limit;
242
243 schizo_write(sync_reg, mask);
244
245 limit = 100000;
246 val = 0;
247 while (--limit) {
248 val = schizo_read(sync_reg);
249 if (!(val & mask))
250 break;
251 }
252 if (limit <= 0) {
253 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
254 val, mask);
255 }
256
257 if (_arg1) {
258 static unsigned char cacheline[64]
259 __attribute__ ((aligned (64)));
260
261 __asm__ __volatile__("rd %%fprs, %0\n\t"
262 "or %0, %4, %1\n\t"
263 "wr %1, 0x0, %%fprs\n\t"
264 "stda %%f0, [%5] %6\n\t"
265 "wr %0, 0x0, %%fprs\n\t"
266 "membar #Sync"
267 : "=&r" (mask), "=&r" (val)
268 : "0" (mask), "1" (val),
269 "i" (FPRS_FEF), "r" (&cacheline[0]),
270 "i" (ASI_BLK_COMMIT_P));
271 }
272}
273
274static unsigned long schizo_ino_to_iclr(struct pci_pbm_info *pbm,
275 unsigned int ino)
276{
277 ino &= PCI_IRQ_INO;
278 return pbm->pbm_regs + schizo_iclr_offset(ino) + 4;
279}
280
281static unsigned long schizo_ino_to_imap(struct pci_pbm_info *pbm,
282 unsigned int ino)
283{
284 ino &= PCI_IRQ_INO;
285 return pbm->pbm_regs + schizo_imap_offset(ino) + 4;
286}
287
288static unsigned int schizo_irq_build(struct pci_pbm_info *pbm,
289 struct pci_dev *pdev,
290 unsigned int ino)
291{
292 unsigned long imap, iclr;
293 int ign_fixup;
294 int virt_irq;
295
296 ino &= PCI_IRQ_INO;
297
298 /* Now build the IRQ bucket. */
299 imap = schizo_ino_to_imap(pbm, ino);
300 iclr = schizo_ino_to_iclr(pbm, ino);
301
302 /* On Schizo, no inofixup occurs. This is because each
303 * INO has it's own IMAP register. On Psycho and Sabre
304 * there is only one IMAP register for each PCI slot even
305 * though four different INOs can be generated by each
306 * PCI slot.
307 *
308 * But, for JBUS variants (essentially, Tomatillo), we have
309 * to fixup the lowest bit of the interrupt group number.
310 */
311 ign_fixup = 0;
312 if (pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
313 if (pbm->portid & 1)
314 ign_fixup = (1 << 6);
315 }
316
317 virt_irq = build_irq(ign_fixup, iclr, imap);
318
319 if (pdev && pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
320 irq_install_pre_handler(virt_irq,
321 tomatillo_wsync_handler,
322 ((pbm->chip_version <= 4) ?
323 (void *) 1 : (void *) 0),
324 (void *) pbm->sync_reg);
325 }
326
327 return virt_irq;
328}
329
330/* SCHIZO error handling support. */ 220/* SCHIZO error handling support. */
331enum schizo_error_type { 221enum schizo_error_type {
332 UE_ERR, CE_ERR, PCI_ERR, SAFARI_ERR 222 UE_ERR, CE_ERR, PCI_ERR, SAFARI_ERR
@@ -362,34 +252,6 @@ struct pci_pbm_info *pbm_for_ino(struct pci_controller_info *p, u32 ino)
362 return &p->pbm_A; 252 return &p->pbm_A;
363} 253}
364 254
365static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq)
366{
367 struct pci_pbm_info *pbm;
368 unsigned long iclr;
369
370 /* Do not clear the interrupt for the other PCI bus.
371 *
372 * This "ACK both PBM IRQs" only needs to be performed
373 * for chip-wide error interrupts.
374 */
375 if ((irq & IMAP_INO) == SCHIZO_PCIERR_A_INO ||
376 (irq & IMAP_INO) == SCHIZO_PCIERR_B_INO)
377 return;
378
379 pbm = pbm_for_ino(p, irq);
380 if (pbm == &p->pbm_A)
381 pbm = &p->pbm_B;
382 else
383 pbm = &p->pbm_A;
384
385 schizo_irq_build(pbm, NULL,
386 (pbm->portid << 6) | (irq & IMAP_INO));
387
388 iclr = schizo_ino_to_iclr(pbm,
389 (pbm->portid << 6) | (irq & IMAP_INO));
390 upa_writel(ICLR_IDLE, iclr);
391}
392
393#define SCHIZO_STC_ERR 0xb800UL /* --> 0xba00 */ 255#define SCHIZO_STC_ERR 0xb800UL /* --> 0xba00 */
394#define SCHIZO_STC_TAG 0xba00UL /* --> 0xba80 */ 256#define SCHIZO_STC_TAG 0xba00UL /* --> 0xba80 */
395#define SCHIZO_STC_LINE 0xbb00UL /* --> 0xbb80 */ 257#define SCHIZO_STC_LINE 0xbb00UL /* --> 0xbb80 */
@@ -720,8 +582,6 @@ static irqreturn_t schizo_ue_intr(int irq, void *dev_id, struct pt_regs *regs)
720 /* Interrogate IOMMU for error status. */ 582 /* Interrogate IOMMU for error status. */
721 schizo_check_iommu_error(p, UE_ERR); 583 schizo_check_iommu_error(p, UE_ERR);
722 584
723 schizo_clear_other_err_intr(p, irq);
724
725 return IRQ_HANDLED; 585 return IRQ_HANDLED;
726} 586}
727 587
@@ -811,8 +671,6 @@ static irqreturn_t schizo_ce_intr(int irq, void *dev_id, struct pt_regs *regs)
811 printk("(none)"); 671 printk("(none)");
812 printk("]\n"); 672 printk("]\n");
813 673
814 schizo_clear_other_err_intr(p, irq);
815
816 return IRQ_HANDLED; 674 return IRQ_HANDLED;
817} 675}
818 676
@@ -1033,8 +891,6 @@ static irqreturn_t schizo_pcierr_intr(int irq, void *dev_id, struct pt_regs *reg
1033 if (error_bits & (SCHIZO_PCIAFSR_PPERR | SCHIZO_PCIAFSR_SPERR)) 891 if (error_bits & (SCHIZO_PCIAFSR_PPERR | SCHIZO_PCIAFSR_SPERR))
1034 pci_scan_for_parity_error(p, pbm, pbm->pci_bus); 892 pci_scan_for_parity_error(p, pbm, pbm->pci_bus);
1035 893
1036 schizo_clear_other_err_intr(p, irq);
1037
1038 return IRQ_HANDLED; 894 return IRQ_HANDLED;
1039} 895}
1040 896
@@ -1090,7 +946,6 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *
1090 printk("PCI%d: Unexpected Safari/JBUS error interrupt, errlog[%016lx]\n", 946 printk("PCI%d: Unexpected Safari/JBUS error interrupt, errlog[%016lx]\n",
1091 p->index, errlog); 947 p->index, errlog);
1092 948
1093 schizo_clear_other_err_intr(p, irq);
1094 return IRQ_HANDLED; 949 return IRQ_HANDLED;
1095 } 950 }
1096 951
@@ -1098,7 +953,6 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *
1098 p->index); 953 p->index);
1099 schizo_check_iommu_error(p, SAFARI_ERR); 954 schizo_check_iommu_error(p, SAFARI_ERR);
1100 955
1101 schizo_clear_other_err_intr(p, irq);
1102 return IRQ_HANDLED; 956 return IRQ_HANDLED;
1103} 957}
1104 958
@@ -1130,74 +984,47 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *
1130static void tomatillo_register_error_handlers(struct pci_controller_info *p) 984static void tomatillo_register_error_handlers(struct pci_controller_info *p)
1131{ 985{
1132 struct pci_pbm_info *pbm; 986 struct pci_pbm_info *pbm;
1133 unsigned int irq; 987 struct of_device *op;
1134 u64 tmp, err_mask, err_no_mask; 988 u64 tmp, err_mask, err_no_mask;
1135 989
1136 /* Build IRQs and register handlers. */ 990 /* Tomatillo IRQ property layout is:
991 * 0: PCIERR
992 * 1: UE ERR
993 * 2: CE ERR
994 * 3: SERR
995 * 4: POWER FAIL?
996 */
997
1137 pbm = pbm_for_ino(p, SCHIZO_UE_INO); 998 pbm = pbm_for_ino(p, SCHIZO_UE_INO);
1138 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_UE_INO); 999 op = of_find_device_by_node(pbm->prom_node);
1139 if (request_irq(irq, schizo_ue_intr, 1000 if (op)
1140 SA_SHIRQ, "TOMATILLO UE", p) < 0) { 1001 request_irq(op->irqs[1], schizo_ue_intr, SA_SHIRQ,
1141 prom_printf("%s: Cannot register UE interrupt.\n", 1002 "TOMATILLO_UE", p);
1142 pbm->name);
1143 prom_halt();
1144 }
1145 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
1146 upa_writel(tmp, (pbm->pbm_regs +
1147 schizo_imap_offset(SCHIZO_UE_INO) + 4));
1148 1003
1149 pbm = pbm_for_ino(p, SCHIZO_CE_INO); 1004 pbm = pbm_for_ino(p, SCHIZO_CE_INO);
1150 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_CE_INO); 1005 op = of_find_device_by_node(pbm->prom_node);
1151 if (request_irq(irq, schizo_ce_intr, 1006 if (op)
1152 SA_SHIRQ, "TOMATILLO CE", p) < 0) { 1007 request_irq(op->irqs[2], schizo_ce_intr, SA_SHIRQ,
1153 prom_printf("%s: Cannot register CE interrupt.\n", 1008 "TOMATILLO CE", p);
1154 pbm->name);
1155 prom_halt();
1156 }
1157 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
1158 upa_writel(tmp, (pbm->pbm_regs +
1159 schizo_imap_offset(SCHIZO_CE_INO) + 4));
1160 1009
1161 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO); 1010 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
1162 irq = schizo_irq_build(pbm, NULL, ((pbm->portid << 6) | 1011 op = of_find_device_by_node(pbm->prom_node);
1163 SCHIZO_PCIERR_A_INO)); 1012 if (op)
1164 if (request_irq(irq, schizo_pcierr_intr, 1013 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
1165 SA_SHIRQ, "TOMATILLO PCIERR", pbm) < 0) { 1014 "TOMATILLO PCIERR-A", pbm);
1166 prom_printf("%s: Cannot register PBM A PciERR interrupt.\n", 1015
1167 pbm->name);
1168 prom_halt();
1169 }
1170 tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
1171 SCHIZO_PCIERR_A_INO)));
1172 upa_writel(tmp, (pbm->pbm_regs +
1173 schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
1174 1016
1175 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO); 1017 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
1176 irq = schizo_irq_build(pbm, NULL, ((pbm->portid << 6) | 1018 op = of_find_device_by_node(pbm->prom_node);
1177 SCHIZO_PCIERR_B_INO)); 1019 if (op)
1178 if (request_irq(irq, schizo_pcierr_intr, 1020 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
1179 SA_SHIRQ, "TOMATILLO PCIERR", pbm) < 0) { 1021 "TOMATILLO PCIERR-B", pbm);
1180 prom_printf("%s: Cannot register PBM B PciERR interrupt.\n",
1181 pbm->name);
1182 prom_halt();
1183 }
1184 tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
1185 SCHIZO_PCIERR_B_INO)));
1186 upa_writel(tmp, (pbm->pbm_regs +
1187 schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
1188 1022
1189 pbm = pbm_for_ino(p, SCHIZO_SERR_INO); 1023 pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
1190 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_SERR_INO); 1024 op = of_find_device_by_node(pbm->prom_node);
1191 if (request_irq(irq, schizo_safarierr_intr, 1025 if (op)
1192 SA_SHIRQ, "TOMATILLO SERR", p) < 0) { 1026 request_irq(op->irqs[3], schizo_safarierr_intr, SA_SHIRQ,
1193 prom_printf("%s: Cannot register SafariERR interrupt.\n", 1027 "TOMATILLO SERR", p);
1194 pbm->name);
1195 prom_halt();
1196 }
1197 tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
1198 SCHIZO_SERR_INO)));
1199 upa_writel(tmp, (pbm->pbm_regs +
1200 schizo_imap_offset(SCHIZO_SERR_INO) + 4));
1201 1028
1202 /* Enable UE and CE interrupts for controller. */ 1029 /* Enable UE and CE interrupts for controller. */
1203 schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL, 1030 schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL,
@@ -1265,64 +1092,47 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
1265static void schizo_register_error_handlers(struct pci_controller_info *p) 1092static void schizo_register_error_handlers(struct pci_controller_info *p)
1266{ 1093{
1267 struct pci_pbm_info *pbm; 1094 struct pci_pbm_info *pbm;
1268 unsigned int irq; 1095 struct of_device *op;
1269 u64 tmp, err_mask, err_no_mask; 1096 u64 tmp, err_mask, err_no_mask;
1270 1097
1271 /* Build IRQs and register handlers. */ 1098 /* Schizo IRQ property layout is:
1099 * 0: PCIERR
1100 * 1: UE ERR
1101 * 2: CE ERR
1102 * 3: SERR
1103 * 4: POWER FAIL?
1104 */
1105
1272 pbm = pbm_for_ino(p, SCHIZO_UE_INO); 1106 pbm = pbm_for_ino(p, SCHIZO_UE_INO);
1273 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_UE_INO); 1107 op = of_find_device_by_node(pbm->prom_node);
1274 if (request_irq(irq, schizo_ue_intr, 1108 if (op)
1275 SA_SHIRQ, "SCHIZO UE", p) < 0) { 1109 request_irq(op->irqs[1], schizo_ue_intr, SA_SHIRQ,
1276 prom_printf("%s: Cannot register UE interrupt.\n", 1110 "SCHIZO_UE", p);
1277 pbm->name);
1278 prom_halt();
1279 }
1280 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
1281 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4));
1282 1111
1283 pbm = pbm_for_ino(p, SCHIZO_CE_INO); 1112 pbm = pbm_for_ino(p, SCHIZO_CE_INO);
1284 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_CE_INO); 1113 op = of_find_device_by_node(pbm->prom_node);
1285 if (request_irq(irq, schizo_ce_intr, 1114 if (op)
1286 SA_SHIRQ, "SCHIZO CE", p) < 0) { 1115 request_irq(op->irqs[2], schizo_ce_intr, SA_SHIRQ,
1287 prom_printf("%s: Cannot register CE interrupt.\n", 1116 "SCHIZO CE", p);
1288 pbm->name);
1289 prom_halt();
1290 }
1291 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
1292 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4));
1293 1117
1294 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO); 1118 pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
1295 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO); 1119 op = of_find_device_by_node(pbm->prom_node);
1296 if (request_irq(irq, schizo_pcierr_intr, 1120 if (op)
1297 SA_SHIRQ, "SCHIZO PCIERR", pbm) < 0) { 1121 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
1298 prom_printf("%s: Cannot register PBM A PciERR interrupt.\n", 1122 "SCHIZO PCIERR-A", pbm);
1299 pbm->name); 1123
1300 prom_halt();
1301 }
1302 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO));
1303 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
1304 1124
1305 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO); 1125 pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
1306 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO); 1126 op = of_find_device_by_node(pbm->prom_node);
1307 if (request_irq(irq, schizo_pcierr_intr, 1127 if (op)
1308 SA_SHIRQ, "SCHIZO PCIERR", &p->pbm_B) < 0) { 1128 request_irq(op->irqs[0], schizo_pcierr_intr, SA_SHIRQ,
1309 prom_printf("%s: Cannot register PBM B PciERR interrupt.\n", 1129 "SCHIZO PCIERR-B", pbm);
1310 pbm->name);
1311 prom_halt();
1312 }
1313 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO));
1314 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
1315 1130
1316 pbm = pbm_for_ino(p, SCHIZO_SERR_INO); 1131 pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
1317 irq = schizo_irq_build(pbm, NULL, (pbm->portid << 6) | SCHIZO_SERR_INO); 1132 op = of_find_device_by_node(pbm->prom_node);
1318 if (request_irq(irq, schizo_safarierr_intr, 1133 if (op)
1319 SA_SHIRQ, "SCHIZO SERR", p) < 0) { 1134 request_irq(op->irqs[3], schizo_safarierr_intr, SA_SHIRQ,
1320 prom_printf("%s: Cannot register SafariERR interrupt.\n", 1135 "SCHIZO SERR", p);
1321 pbm->name);
1322 prom_halt();
1323 }
1324 tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_SERR_INO));
1325 upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4));
1326 1136
1327 /* Enable UE and CE interrupts for controller. */ 1137 /* Enable UE and CE interrupts for controller. */
1328 schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL, 1138 schizo_write(p->pbm_A.controller_regs + SCHIZO_ECC_CTRL,
@@ -2022,7 +1832,6 @@ static void __schizo_init(struct device_node *dp, char *model_name, int chip_typ
2022 p->scan_bus = (chip_type == PBM_CHIP_TYPE_TOMATILLO ? 1832 p->scan_bus = (chip_type == PBM_CHIP_TYPE_TOMATILLO ?
2023 tomatillo_scan_bus : 1833 tomatillo_scan_bus :
2024 schizo_scan_bus); 1834 schizo_scan_bus);
2025 p->irq_build = schizo_irq_build;
2026 p->base_address_update = schizo_base_address_update; 1835 p->base_address_update = schizo_base_address_update;
2027 p->resource_adjust = schizo_resource_adjust; 1836 p->resource_adjust = schizo_resource_adjust;
2028 p->pci_ops = &schizo_ops; 1837 p->pci_ops = &schizo_ops;
diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c
index b69e2270a721..03ad4c06758e 100644
--- a/arch/sparc64/kernel/pci_sun4v.c
+++ b/arch/sparc64/kernel/pci_sun4v.c
@@ -843,15 +843,6 @@ static void pci_sun4v_scan_bus(struct pci_controller_info *p)
843 /* XXX register error interrupt handlers XXX */ 843 /* XXX register error interrupt handlers XXX */
844} 844}
845 845
846static unsigned int pci_sun4v_irq_build(struct pci_pbm_info *pbm,
847 struct pci_dev *pdev,
848 unsigned int devino)
849{
850 u32 devhandle = pbm->devhandle;
851
852 return sun4v_build_irq(devhandle, devino);
853}
854
855static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource) 846static void pci_sun4v_base_address_update(struct pci_dev *pdev, int resource)
856{ 847{
857 struct pcidev_cookie *pcp = pdev->sysdata; 848 struct pcidev_cookie *pcp = pdev->sysdata;
@@ -1200,7 +1191,6 @@ void sun4v_pci_init(struct device_node *dp, char *model_name)
1200 p->pbms_same_domain = 0; 1191 p->pbms_same_domain = 0;
1201 1192
1202 p->scan_bus = pci_sun4v_scan_bus; 1193 p->scan_bus = pci_sun4v_scan_bus;
1203 p->irq_build = pci_sun4v_irq_build;
1204 p->base_address_update = pci_sun4v_base_address_update; 1194 p->base_address_update = pci_sun4v_base_address_update;
1205 p->resource_adjust = pci_sun4v_resource_adjust; 1195 p->resource_adjust = pci_sun4v_resource_adjust;
1206 p->pci_ops = &pci_sun4v_ops; 1196 p->pci_ops = &pci_sun4v_ops;
diff --git a/arch/sparc64/kernel/power.c b/arch/sparc64/kernel/power.c
index 9496c7734014..4febeda958a3 100644
--- a/arch/sparc64/kernel/power.c
+++ b/arch/sparc64/kernel/power.c
@@ -17,9 +17,10 @@
17#include <linux/pm.h> 17#include <linux/pm.h>
18 18
19#include <asm/system.h> 19#include <asm/system.h>
20#include <asm/ebus.h>
21#include <asm/isa.h>
22#include <asm/auxio.h> 20#include <asm/auxio.h>
21#include <asm/prom.h>
22#include <asm/of_device.h>
23#include <asm/io.h>
23 24
24#include <linux/unistd.h> 25#include <linux/unistd.h>
25 26
@@ -30,6 +31,7 @@
30int scons_pwroff = 1; 31int scons_pwroff = 1;
31 32
32#ifdef CONFIG_PCI 33#ifdef CONFIG_PCI
34#include <linux/pci.h>
33static void __iomem *power_reg; 35static void __iomem *power_reg;
34 36
35static DECLARE_WAIT_QUEUE_HEAD(powerd_wait); 37static DECLARE_WAIT_QUEUE_HEAD(powerd_wait);
@@ -115,27 +117,33 @@ static int __init has_button_interrupt(unsigned int irq, struct device_node *dp)
115 return 1; 117 return 1;
116} 118}
117 119
118static void __devinit power_probe_common(struct of_device *dev, struct resource *res, unsigned int irq) 120static int __devinit power_probe(struct of_device *op, const struct of_device_id *match)
119{ 121{
120 power_reg = ioremap(res->start, 0x4); 122 struct resource *res = &op->resource[0];
123 unsigned int irq= op->irqs[0];
121 124
122 printk("power: Control reg at %p ... ", power_reg); 125 power_reg = of_ioremap(res, 0, 0x4, "power");
126
127 printk("%s: Control reg at %lx ... ",
128 op->node->name, res->start);
123 129
124 poweroff_method = machine_halt; /* able to use the standard halt */ 130 poweroff_method = machine_halt; /* able to use the standard halt */
125 131
126 if (has_button_interrupt(irq, dev->node)) { 132 if (has_button_interrupt(irq, op->node)) {
127 if (kernel_thread(powerd, NULL, CLONE_FS) < 0) { 133 if (kernel_thread(powerd, NULL, CLONE_FS) < 0) {
128 printk("Failed to start power daemon.\n"); 134 printk("Failed to start power daemon.\n");
129 return; 135 return 0;
130 } 136 }
131 printk("powerd running.\n"); 137 printk("powerd running.\n");
132 138
133 if (request_irq(irq, 139 if (request_irq(irq,
134 power_handler, SA_SHIRQ, "power", NULL) < 0) 140 power_handler, 0, "power", NULL) < 0)
135 printk("power: Error, cannot register IRQ handler.\n"); 141 printk("power: Error, cannot register IRQ handler.\n");
136 } else { 142 } else {
137 printk("not using powerd.\n"); 143 printk("not using powerd.\n");
138 } 144 }
145
146 return 0;
139} 147}
140 148
141static struct of_device_id power_match[] = { 149static struct of_device_id power_match[] = {
@@ -145,44 +153,15 @@ static struct of_device_id power_match[] = {
145 {}, 153 {},
146}; 154};
147 155
148static int __devinit ebus_power_probe(struct of_device *dev, const struct of_device_id *match) 156static struct of_platform_driver power_driver = {
149{
150 struct linux_ebus_device *edev = to_ebus_device(&dev->dev);
151 struct resource *res = &edev->resource[0];
152 unsigned int irq = edev->irqs[0];
153
154 power_probe_common(dev, res,irq);
155
156 return 0;
157}
158
159static struct of_platform_driver ebus_power_driver = {
160 .name = "power",
161 .match_table = power_match,
162 .probe = ebus_power_probe,
163};
164
165static int __devinit isa_power_probe(struct of_device *dev, const struct of_device_id *match)
166{
167 struct sparc_isa_device *idev = to_isa_device(&dev->dev);
168 struct resource *res = &idev->resource;
169 unsigned int irq = idev->irq;
170
171 power_probe_common(dev, res,irq);
172
173 return 0;
174}
175
176static struct of_platform_driver isa_power_driver = {
177 .name = "power", 157 .name = "power",
178 .match_table = power_match, 158 .match_table = power_match,
179 .probe = isa_power_probe, 159 .probe = power_probe,
180}; 160};
181 161
182void __init power_init(void) 162void __init power_init(void)
183{ 163{
184 of_register_driver(&ebus_power_driver, &ebus_bus_type); 164 of_register_driver(&power_driver, &of_bus_type);
185 of_register_driver(&isa_power_driver, &isa_bus_type);
186 return; 165 return;
187} 166}
188#endif /* CONFIG_PCI */ 167#endif /* CONFIG_PCI */
diff --git a/arch/sparc64/kernel/prom.c b/arch/sparc64/kernel/prom.c
index 8e87e7ea0325..8a70c52c0447 100644
--- a/arch/sparc64/kernel/prom.c
+++ b/arch/sparc64/kernel/prom.c
@@ -15,6 +15,7 @@
15 * 2 of the License, or (at your option) any later version. 15 * 2 of the License, or (at your option) any later version.
16 */ 16 */
17 17
18#include <linux/config.h>
18#include <linux/kernel.h> 19#include <linux/kernel.h>
19#include <linux/types.h> 20#include <linux/types.h>
20#include <linux/string.h> 21#include <linux/string.h>
@@ -23,7 +24,11 @@
23#include <linux/module.h> 24#include <linux/module.h>
24 25
25#include <asm/prom.h> 26#include <asm/prom.h>
27#include <asm/of_device.h>
26#include <asm/oplib.h> 28#include <asm/oplib.h>
29#include <asm/irq.h>
30#include <asm/asi.h>
31#include <asm/upa.h>
27 32
28static struct device_node *allnodes; 33static struct device_node *allnodes;
29 34
@@ -190,6 +195,36 @@ int of_getintprop_default(struct device_node *np, const char *name, int def)
190} 195}
191EXPORT_SYMBOL(of_getintprop_default); 196EXPORT_SYMBOL(of_getintprop_default);
192 197
198int of_n_addr_cells(struct device_node *np)
199{
200 int* ip;
201 do {
202 if (np->parent)
203 np = np->parent;
204 ip = of_get_property(np, "#address-cells", NULL);
205 if (ip != NULL)
206 return *ip;
207 } while (np->parent);
208 /* No #address-cells property for the root node, default to 2 */
209 return 2;
210}
211EXPORT_SYMBOL(of_n_addr_cells);
212
213int of_n_size_cells(struct device_node *np)
214{
215 int* ip;
216 do {
217 if (np->parent)
218 np = np->parent;
219 ip = of_get_property(np, "#size-cells", NULL);
220 if (ip != NULL)
221 return *ip;
222 } while (np->parent);
223 /* No #size-cells property for the root node, default to 1 */
224 return 1;
225}
226EXPORT_SYMBOL(of_n_size_cells);
227
193int of_set_property(struct device_node *dp, const char *name, void *val, int len) 228int of_set_property(struct device_node *dp, const char *name, void *val, int len)
194{ 229{
195 struct property **prevp; 230 struct property **prevp;
@@ -253,6 +288,754 @@ static void * __init prom_early_alloc(unsigned long size)
253 return ret; 288 return ret;
254} 289}
255 290
291#ifdef CONFIG_PCI
292/* PSYCHO interrupt mapping support. */
293#define PSYCHO_IMAP_A_SLOT0 0x0c00UL
294#define PSYCHO_IMAP_B_SLOT0 0x0c20UL
295static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
296{
297 unsigned int bus = (ino & 0x10) >> 4;
298 unsigned int slot = (ino & 0x0c) >> 2;
299
300 if (bus == 0)
301 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
302 else
303 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
304}
305
306#define PSYCHO_IMAP_SCSI 0x1000UL
307#define PSYCHO_IMAP_ETH 0x1008UL
308#define PSYCHO_IMAP_BPP 0x1010UL
309#define PSYCHO_IMAP_AU_REC 0x1018UL
310#define PSYCHO_IMAP_AU_PLAY 0x1020UL
311#define PSYCHO_IMAP_PFAIL 0x1028UL
312#define PSYCHO_IMAP_KMS 0x1030UL
313#define PSYCHO_IMAP_FLPY 0x1038UL
314#define PSYCHO_IMAP_SHW 0x1040UL
315#define PSYCHO_IMAP_KBD 0x1048UL
316#define PSYCHO_IMAP_MS 0x1050UL
317#define PSYCHO_IMAP_SER 0x1058UL
318#define PSYCHO_IMAP_TIM0 0x1060UL
319#define PSYCHO_IMAP_TIM1 0x1068UL
320#define PSYCHO_IMAP_UE 0x1070UL
321#define PSYCHO_IMAP_CE 0x1078UL
322#define PSYCHO_IMAP_A_ERR 0x1080UL
323#define PSYCHO_IMAP_B_ERR 0x1088UL
324#define PSYCHO_IMAP_PMGMT 0x1090UL
325#define PSYCHO_IMAP_GFX 0x1098UL
326#define PSYCHO_IMAP_EUPA 0x10a0UL
327
328static unsigned long __psycho_onboard_imap_off[] = {
329/*0x20*/ PSYCHO_IMAP_SCSI,
330/*0x21*/ PSYCHO_IMAP_ETH,
331/*0x22*/ PSYCHO_IMAP_BPP,
332/*0x23*/ PSYCHO_IMAP_AU_REC,
333/*0x24*/ PSYCHO_IMAP_AU_PLAY,
334/*0x25*/ PSYCHO_IMAP_PFAIL,
335/*0x26*/ PSYCHO_IMAP_KMS,
336/*0x27*/ PSYCHO_IMAP_FLPY,
337/*0x28*/ PSYCHO_IMAP_SHW,
338/*0x29*/ PSYCHO_IMAP_KBD,
339/*0x2a*/ PSYCHO_IMAP_MS,
340/*0x2b*/ PSYCHO_IMAP_SER,
341/*0x2c*/ PSYCHO_IMAP_TIM0,
342/*0x2d*/ PSYCHO_IMAP_TIM1,
343/*0x2e*/ PSYCHO_IMAP_UE,
344/*0x2f*/ PSYCHO_IMAP_CE,
345/*0x30*/ PSYCHO_IMAP_A_ERR,
346/*0x31*/ PSYCHO_IMAP_B_ERR,
347/*0x32*/ PSYCHO_IMAP_PMGMT
348};
349#define PSYCHO_ONBOARD_IRQ_BASE 0x20
350#define PSYCHO_ONBOARD_IRQ_LAST 0x32
351#define psycho_onboard_imap_offset(__ino) \
352 __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
353
354#define PSYCHO_ICLR_A_SLOT0 0x1400UL
355#define PSYCHO_ICLR_SCSI 0x1800UL
356
357#define psycho_iclr_offset(ino) \
358 ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
359 (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
360
361static unsigned int psycho_irq_build(struct device_node *dp,
362 unsigned int ino,
363 void *_data)
364{
365 unsigned long controller_regs = (unsigned long) _data;
366 unsigned long imap, iclr;
367 unsigned long imap_off, iclr_off;
368 int inofixup = 0;
369
370 ino &= 0x3f;
371 if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
372 /* PCI slot */
373 imap_off = psycho_pcislot_imap_offset(ino);
374 } else {
375 /* Onboard device */
376 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
377 prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
378 prom_halt();
379 }
380 imap_off = psycho_onboard_imap_offset(ino);
381 }
382
383 /* Now build the IRQ bucket. */
384 imap = controller_regs + imap_off;
385 imap += 4;
386
387 iclr_off = psycho_iclr_offset(ino);
388 iclr = controller_regs + iclr_off;
389 iclr += 4;
390
391 if ((ino & 0x20) == 0)
392 inofixup = ino & 0x03;
393
394 return build_irq(inofixup, iclr, imap);
395}
396
397static void psycho_irq_trans_init(struct device_node *dp)
398{
399 struct linux_prom64_registers *regs;
400
401 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
402 dp->irq_trans->irq_build = psycho_irq_build;
403
404 regs = of_get_property(dp, "reg", NULL);
405 dp->irq_trans->data = (void *) regs[2].phys_addr;
406}
407
408#define sabre_read(__reg) \
409({ u64 __ret; \
410 __asm__ __volatile__("ldxa [%1] %2, %0" \
411 : "=r" (__ret) \
412 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
413 : "memory"); \
414 __ret; \
415})
416
417struct sabre_irq_data {
418 unsigned long controller_regs;
419 unsigned int pci_first_busno;
420};
421#define SABRE_CONFIGSPACE 0x001000000UL
422#define SABRE_WRSYNC 0x1c20UL
423
424#define SABRE_CONFIG_BASE(CONFIG_SPACE) \
425 (CONFIG_SPACE | (1UL << 24))
426#define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \
427 (((unsigned long)(BUS) << 16) | \
428 ((unsigned long)(DEVFN) << 8) | \
429 ((unsigned long)(REG)))
430
431/* When a device lives behind a bridge deeper in the PCI bus topology
432 * than APB, a special sequence must run to make sure all pending DMA
433 * transfers at the time of IRQ delivery are visible in the coherency
434 * domain by the cpu. This sequence is to perform a read on the far
435 * side of the non-APB bridge, then perform a read of Sabre's DMA
436 * write-sync register.
437 */
438static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
439{
440 unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
441 struct sabre_irq_data *irq_data = _arg2;
442 unsigned long controller_regs = irq_data->controller_regs;
443 unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
444 unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
445 unsigned int bus, devfn;
446 u16 _unused;
447
448 config_space = SABRE_CONFIG_BASE(config_space);
449
450 bus = (phys_hi >> 16) & 0xff;
451 devfn = (phys_hi >> 8) & 0xff;
452
453 config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
454
455 __asm__ __volatile__("membar #Sync\n\t"
456 "lduha [%1] %2, %0\n\t"
457 "membar #Sync"
458 : "=r" (_unused)
459 : "r" ((u16 *) config_space),
460 "i" (ASI_PHYS_BYPASS_EC_E_L)
461 : "memory");
462
463 sabre_read(sync_reg);
464}
465
466#define SABRE_IMAP_A_SLOT0 0x0c00UL
467#define SABRE_IMAP_B_SLOT0 0x0c20UL
468#define SABRE_IMAP_SCSI 0x1000UL
469#define SABRE_IMAP_ETH 0x1008UL
470#define SABRE_IMAP_BPP 0x1010UL
471#define SABRE_IMAP_AU_REC 0x1018UL
472#define SABRE_IMAP_AU_PLAY 0x1020UL
473#define SABRE_IMAP_PFAIL 0x1028UL
474#define SABRE_IMAP_KMS 0x1030UL
475#define SABRE_IMAP_FLPY 0x1038UL
476#define SABRE_IMAP_SHW 0x1040UL
477#define SABRE_IMAP_KBD 0x1048UL
478#define SABRE_IMAP_MS 0x1050UL
479#define SABRE_IMAP_SER 0x1058UL
480#define SABRE_IMAP_UE 0x1070UL
481#define SABRE_IMAP_CE 0x1078UL
482#define SABRE_IMAP_PCIERR 0x1080UL
483#define SABRE_IMAP_GFX 0x1098UL
484#define SABRE_IMAP_EUPA 0x10a0UL
485#define SABRE_ICLR_A_SLOT0 0x1400UL
486#define SABRE_ICLR_B_SLOT0 0x1480UL
487#define SABRE_ICLR_SCSI 0x1800UL
488#define SABRE_ICLR_ETH 0x1808UL
489#define SABRE_ICLR_BPP 0x1810UL
490#define SABRE_ICLR_AU_REC 0x1818UL
491#define SABRE_ICLR_AU_PLAY 0x1820UL
492#define SABRE_ICLR_PFAIL 0x1828UL
493#define SABRE_ICLR_KMS 0x1830UL
494#define SABRE_ICLR_FLPY 0x1838UL
495#define SABRE_ICLR_SHW 0x1840UL
496#define SABRE_ICLR_KBD 0x1848UL
497#define SABRE_ICLR_MS 0x1850UL
498#define SABRE_ICLR_SER 0x1858UL
499#define SABRE_ICLR_UE 0x1870UL
500#define SABRE_ICLR_CE 0x1878UL
501#define SABRE_ICLR_PCIERR 0x1880UL
502
503static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
504{
505 unsigned int bus = (ino & 0x10) >> 4;
506 unsigned int slot = (ino & 0x0c) >> 2;
507
508 if (bus == 0)
509 return SABRE_IMAP_A_SLOT0 + (slot * 8);
510 else
511 return SABRE_IMAP_B_SLOT0 + (slot * 8);
512}
513
514static unsigned long __sabre_onboard_imap_off[] = {
515/*0x20*/ SABRE_IMAP_SCSI,
516/*0x21*/ SABRE_IMAP_ETH,
517/*0x22*/ SABRE_IMAP_BPP,
518/*0x23*/ SABRE_IMAP_AU_REC,
519/*0x24*/ SABRE_IMAP_AU_PLAY,
520/*0x25*/ SABRE_IMAP_PFAIL,
521/*0x26*/ SABRE_IMAP_KMS,
522/*0x27*/ SABRE_IMAP_FLPY,
523/*0x28*/ SABRE_IMAP_SHW,
524/*0x29*/ SABRE_IMAP_KBD,
525/*0x2a*/ SABRE_IMAP_MS,
526/*0x2b*/ SABRE_IMAP_SER,
527/*0x2c*/ 0 /* reserved */,
528/*0x2d*/ 0 /* reserved */,
529/*0x2e*/ SABRE_IMAP_UE,
530/*0x2f*/ SABRE_IMAP_CE,
531/*0x30*/ SABRE_IMAP_PCIERR,
532};
533#define SABRE_ONBOARD_IRQ_BASE 0x20
534#define SABRE_ONBOARD_IRQ_LAST 0x30
535#define sabre_onboard_imap_offset(__ino) \
536 __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
537
538#define sabre_iclr_offset(ino) \
539 ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
540 (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
541
542static unsigned int sabre_irq_build(struct device_node *dp,
543 unsigned int ino,
544 void *_data)
545{
546 struct sabre_irq_data *irq_data = _data;
547 unsigned long controller_regs = irq_data->controller_regs;
548 struct linux_prom_pci_registers *regs;
549 unsigned long imap, iclr;
550 unsigned long imap_off, iclr_off;
551 int inofixup = 0;
552 int virt_irq;
553
554 ino &= 0x3f;
555 if (ino < SABRE_ONBOARD_IRQ_BASE) {
556 /* PCI slot */
557 imap_off = sabre_pcislot_imap_offset(ino);
558 } else {
559 /* onboard device */
560 if (ino > SABRE_ONBOARD_IRQ_LAST) {
561 prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
562 prom_halt();
563 }
564 imap_off = sabre_onboard_imap_offset(ino);
565 }
566
567 /* Now build the IRQ bucket. */
568 imap = controller_regs + imap_off;
569 imap += 4;
570
571 iclr_off = sabre_iclr_offset(ino);
572 iclr = controller_regs + iclr_off;
573 iclr += 4;
574
575 if ((ino & 0x20) == 0)
576 inofixup = ino & 0x03;
577
578 virt_irq = build_irq(inofixup, iclr, imap);
579
580 regs = of_get_property(dp, "reg", NULL);
581 if (regs &&
582 ((regs->phys_hi >> 16) & 0xff) != irq_data->pci_first_busno) {
583 irq_install_pre_handler(virt_irq,
584 sabre_wsync_handler,
585 (void *) (long) regs->phys_hi,
586 (void *)
587 controller_regs +
588 SABRE_WRSYNC);
589 }
590
591 return virt_irq;
592}
593
594static void sabre_irq_trans_init(struct device_node *dp)
595{
596 struct linux_prom64_registers *regs;
597 struct sabre_irq_data *irq_data;
598 u32 *busrange;
599
600 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
601 dp->irq_trans->irq_build = sabre_irq_build;
602
603 irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
604
605 regs = of_get_property(dp, "reg", NULL);
606 irq_data->controller_regs = regs[0].phys_addr;
607
608 busrange = of_get_property(dp, "bus-range", NULL);
609 irq_data->pci_first_busno = busrange[0];
610
611 dp->irq_trans->data = irq_data;
612}
613
614/* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
615 * imap/iclr registers are per-PBM.
616 */
617#define SCHIZO_IMAP_BASE 0x1000UL
618#define SCHIZO_ICLR_BASE 0x1400UL
619
620static unsigned long schizo_imap_offset(unsigned long ino)
621{
622 return SCHIZO_IMAP_BASE + (ino * 8UL);
623}
624
625static unsigned long schizo_iclr_offset(unsigned long ino)
626{
627 return SCHIZO_ICLR_BASE + (ino * 8UL);
628}
629
630static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
631 unsigned int ino)
632{
633 return pbm_regs + schizo_iclr_offset(ino) + 4;
634}
635
636static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
637 unsigned int ino)
638{
639 return pbm_regs + schizo_imap_offset(ino) + 4;
640}
641
642#define schizo_read(__reg) \
643({ u64 __ret; \
644 __asm__ __volatile__("ldxa [%1] %2, %0" \
645 : "=r" (__ret) \
646 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
647 : "memory"); \
648 __ret; \
649})
650#define schizo_write(__reg, __val) \
651 __asm__ __volatile__("stxa %0, [%1] %2" \
652 : /* no outputs */ \
653 : "r" (__val), "r" (__reg), \
654 "i" (ASI_PHYS_BYPASS_EC_E) \
655 : "memory")
656
657static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
658{
659 unsigned long sync_reg = (unsigned long) _arg2;
660 u64 mask = 1UL << (ino & IMAP_INO);
661 u64 val;
662 int limit;
663
664 schizo_write(sync_reg, mask);
665
666 limit = 100000;
667 val = 0;
668 while (--limit) {
669 val = schizo_read(sync_reg);
670 if (!(val & mask))
671 break;
672 }
673 if (limit <= 0) {
674 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
675 val, mask);
676 }
677
678 if (_arg1) {
679 static unsigned char cacheline[64]
680 __attribute__ ((aligned (64)));
681
682 __asm__ __volatile__("rd %%fprs, %0\n\t"
683 "or %0, %4, %1\n\t"
684 "wr %1, 0x0, %%fprs\n\t"
685 "stda %%f0, [%5] %6\n\t"
686 "wr %0, 0x0, %%fprs\n\t"
687 "membar #Sync"
688 : "=&r" (mask), "=&r" (val)
689 : "0" (mask), "1" (val),
690 "i" (FPRS_FEF), "r" (&cacheline[0]),
691 "i" (ASI_BLK_COMMIT_P));
692 }
693}
694
695struct schizo_irq_data {
696 unsigned long pbm_regs;
697 unsigned long sync_reg;
698 u32 portid;
699 int chip_version;
700};
701
702static unsigned int schizo_irq_build(struct device_node *dp,
703 unsigned int ino,
704 void *_data)
705{
706 struct schizo_irq_data *irq_data = _data;
707 unsigned long pbm_regs = irq_data->pbm_regs;
708 unsigned long imap, iclr;
709 int ign_fixup;
710 int virt_irq;
711 int is_tomatillo;
712
713 ino &= 0x3f;
714
715 /* Now build the IRQ bucket. */
716 imap = schizo_ino_to_imap(pbm_regs, ino);
717 iclr = schizo_ino_to_iclr(pbm_regs, ino);
718
719 /* On Schizo, no inofixup occurs. This is because each
720 * INO has it's own IMAP register. On Psycho and Sabre
721 * there is only one IMAP register for each PCI slot even
722 * though four different INOs can be generated by each
723 * PCI slot.
724 *
725 * But, for JBUS variants (essentially, Tomatillo), we have
726 * to fixup the lowest bit of the interrupt group number.
727 */
728 ign_fixup = 0;
729
730 is_tomatillo = (irq_data->sync_reg != 0UL);
731
732 if (is_tomatillo) {
733 if (irq_data->portid & 1)
734 ign_fixup = (1 << 6);
735 }
736
737 virt_irq = build_irq(ign_fixup, iclr, imap);
738
739 if (is_tomatillo) {
740 irq_install_pre_handler(virt_irq,
741 tomatillo_wsync_handler,
742 ((irq_data->chip_version <= 4) ?
743 (void *) 1 : (void *) 0),
744 (void *) irq_data->sync_reg);
745 }
746
747 return virt_irq;
748}
749
750static void schizo_irq_trans_init(struct device_node *dp)
751{
752 struct linux_prom64_registers *regs;
753 struct schizo_irq_data *irq_data;
754
755 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
756 dp->irq_trans->irq_build = schizo_irq_build;
757
758 irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
759
760 regs = of_get_property(dp, "reg", NULL);
761 dp->irq_trans->data = irq_data;
762
763 irq_data->pbm_regs = regs[0].phys_addr;
764 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
765 irq_data->portid = of_getintprop_default(dp, "portid", 0);
766 irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
767}
768
769static unsigned int pci_sun4v_irq_build(struct device_node *dp,
770 unsigned int devino,
771 void *_data)
772{
773 u32 devhandle = (u32) (unsigned long) _data;
774
775 return sun4v_build_irq(devhandle, devino);
776}
777
778static void pci_sun4v_irq_trans_init(struct device_node *dp)
779{
780 struct linux_prom64_registers *regs;
781
782 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
783 dp->irq_trans->irq_build = pci_sun4v_irq_build;
784
785 regs = of_get_property(dp, "reg", NULL);
786 dp->irq_trans->data = (void *) (unsigned long)
787 ((regs->phys_addr >> 32UL) & 0x0fffffff);
788}
789#endif /* CONFIG_PCI */
790
791#ifdef CONFIG_SBUS
792/* INO number to IMAP register offset for SYSIO external IRQ's.
793 * This should conform to both Sunfire/Wildfire server and Fusion
794 * desktop designs.
795 */
796#define SYSIO_IMAP_SLOT0 0x2c04UL
797#define SYSIO_IMAP_SLOT1 0x2c0cUL
798#define SYSIO_IMAP_SLOT2 0x2c14UL
799#define SYSIO_IMAP_SLOT3 0x2c1cUL
800#define SYSIO_IMAP_SCSI 0x3004UL
801#define SYSIO_IMAP_ETH 0x300cUL
802#define SYSIO_IMAP_BPP 0x3014UL
803#define SYSIO_IMAP_AUDIO 0x301cUL
804#define SYSIO_IMAP_PFAIL 0x3024UL
805#define SYSIO_IMAP_KMS 0x302cUL
806#define SYSIO_IMAP_FLPY 0x3034UL
807#define SYSIO_IMAP_SHW 0x303cUL
808#define SYSIO_IMAP_KBD 0x3044UL
809#define SYSIO_IMAP_MS 0x304cUL
810#define SYSIO_IMAP_SER 0x3054UL
811#define SYSIO_IMAP_TIM0 0x3064UL
812#define SYSIO_IMAP_TIM1 0x306cUL
813#define SYSIO_IMAP_UE 0x3074UL
814#define SYSIO_IMAP_CE 0x307cUL
815#define SYSIO_IMAP_SBERR 0x3084UL
816#define SYSIO_IMAP_PMGMT 0x308cUL
817#define SYSIO_IMAP_GFX 0x3094UL
818#define SYSIO_IMAP_EUPA 0x309cUL
819
820#define bogon ((unsigned long) -1)
821static unsigned long sysio_irq_offsets[] = {
822 /* SBUS Slot 0 --> 3, level 1 --> 7 */
823 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
824 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
825 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
826 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
827 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
828 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
829 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
830 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
831
832 /* Onboard devices (not relevant/used on SunFire). */
833 SYSIO_IMAP_SCSI,
834 SYSIO_IMAP_ETH,
835 SYSIO_IMAP_BPP,
836 bogon,
837 SYSIO_IMAP_AUDIO,
838 SYSIO_IMAP_PFAIL,
839 bogon,
840 bogon,
841 SYSIO_IMAP_KMS,
842 SYSIO_IMAP_FLPY,
843 SYSIO_IMAP_SHW,
844 SYSIO_IMAP_KBD,
845 SYSIO_IMAP_MS,
846 SYSIO_IMAP_SER,
847 bogon,
848 bogon,
849 SYSIO_IMAP_TIM0,
850 SYSIO_IMAP_TIM1,
851 bogon,
852 bogon,
853 SYSIO_IMAP_UE,
854 SYSIO_IMAP_CE,
855 SYSIO_IMAP_SBERR,
856 SYSIO_IMAP_PMGMT,
857};
858
859#undef bogon
860
861#define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
862
863/* Convert Interrupt Mapping register pointer to associated
864 * Interrupt Clear register pointer, SYSIO specific version.
865 */
866#define SYSIO_ICLR_UNUSED0 0x3400UL
867#define SYSIO_ICLR_SLOT0 0x340cUL
868#define SYSIO_ICLR_SLOT1 0x344cUL
869#define SYSIO_ICLR_SLOT2 0x348cUL
870#define SYSIO_ICLR_SLOT3 0x34ccUL
871static unsigned long sysio_imap_to_iclr(unsigned long imap)
872{
873 unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
874 return imap + diff;
875}
876
877static unsigned int sbus_of_build_irq(struct device_node *dp,
878 unsigned int ino,
879 void *_data)
880{
881 unsigned long reg_base = (unsigned long) _data;
882 struct linux_prom_registers *regs;
883 unsigned long imap, iclr;
884 int sbus_slot = 0;
885 int sbus_level = 0;
886
887 ino &= 0x3f;
888
889 regs = of_get_property(dp, "reg", NULL);
890 if (regs)
891 sbus_slot = regs->which_io;
892
893 if (ino < 0x20)
894 ino += (sbus_slot * 8);
895
896 imap = sysio_irq_offsets[ino];
897 if (imap == ((unsigned long)-1)) {
898 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
899 ino);
900 prom_halt();
901 }
902 imap += reg_base;
903
904 /* SYSIO inconsistency. For external SLOTS, we have to select
905 * the right ICLR register based upon the lower SBUS irq level
906 * bits.
907 */
908 if (ino >= 0x20) {
909 iclr = sysio_imap_to_iclr(imap);
910 } else {
911 sbus_level = ino & 0x7;
912
913 switch(sbus_slot) {
914 case 0:
915 iclr = reg_base + SYSIO_ICLR_SLOT0;
916 break;
917 case 1:
918 iclr = reg_base + SYSIO_ICLR_SLOT1;
919 break;
920 case 2:
921 iclr = reg_base + SYSIO_ICLR_SLOT2;
922 break;
923 default:
924 case 3:
925 iclr = reg_base + SYSIO_ICLR_SLOT3;
926 break;
927 };
928
929 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
930 }
931 return build_irq(sbus_level, iclr, imap);
932}
933
934static void sbus_irq_trans_init(struct device_node *dp)
935{
936 struct linux_prom64_registers *regs;
937
938 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
939 dp->irq_trans->irq_build = sbus_of_build_irq;
940
941 regs = of_get_property(dp, "reg", NULL);
942 dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
943}
944#endif /* CONFIG_SBUS */
945
946
947static unsigned int central_build_irq(struct device_node *dp,
948 unsigned int ino,
949 void *_data)
950{
951 struct device_node *central_dp = _data;
952 struct of_device *central_op = of_find_device_by_node(central_dp);
953 struct resource *res;
954 unsigned long imap, iclr;
955 u32 tmp;
956
957 if (!strcmp(dp->name, "eeprom")) {
958 res = &central_op->resource[5];
959 } else if (!strcmp(dp->name, "zs")) {
960 res = &central_op->resource[4];
961 } else if (!strcmp(dp->name, "clock-board")) {
962 res = &central_op->resource[3];
963 } else {
964 return ino;
965 }
966
967 imap = res->start + 0x00UL;
968 iclr = res->start + 0x10UL;
969
970 /* Set the INO state to idle, and disable. */
971 upa_writel(0, iclr);
972 upa_readl(iclr);
973
974 tmp = upa_readl(imap);
975 tmp &= ~0x80000000;
976 upa_writel(tmp, imap);
977
978 return build_irq(0, iclr, imap);
979}
980
981static void central_irq_trans_init(struct device_node *dp)
982{
983 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
984 dp->irq_trans->irq_build = central_build_irq;
985
986 dp->irq_trans->data = dp;
987}
988
989struct irq_trans {
990 const char *name;
991 void (*init)(struct device_node *);
992};
993
994#ifdef CONFIG_PCI
995static struct irq_trans pci_irq_trans_table[] = {
996 { "SUNW,sabre", sabre_irq_trans_init },
997 { "pci108e,a000", sabre_irq_trans_init },
998 { "pci108e,a001", sabre_irq_trans_init },
999 { "SUNW,psycho", psycho_irq_trans_init },
1000 { "pci108e,8000", psycho_irq_trans_init },
1001 { "SUNW,schizo", schizo_irq_trans_init },
1002 { "pci108e,8001", schizo_irq_trans_init },
1003 { "SUNW,schizo+", schizo_irq_trans_init },
1004 { "pci108e,8002", schizo_irq_trans_init },
1005 { "SUNW,tomatillo", schizo_irq_trans_init },
1006 { "pci108e,a801", schizo_irq_trans_init },
1007 { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1008};
1009#endif
1010
1011static void irq_trans_init(struct device_node *dp)
1012{
1013 const char *model;
1014 int i;
1015
1016 model = of_get_property(dp, "model", NULL);
1017 if (!model)
1018 model = of_get_property(dp, "compatible", NULL);
1019 if (!model)
1020 return;
1021
1022#ifdef CONFIG_PCI
1023 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1024 struct irq_trans *t = &pci_irq_trans_table[i];
1025
1026 if (!strcmp(model, t->name))
1027 return t->init(dp);
1028 }
1029#endif
1030#ifdef CONFIG_SBUS
1031 if (!strcmp(dp->name, "sbus") ||
1032 !strcmp(dp->name, "sbi"))
1033 return sbus_irq_trans_init(dp);
1034#endif
1035 if (!strcmp(dp->name, "central"))
1036 return central_irq_trans_init(dp->child);
1037}
1038
256static int is_root_node(const struct device_node *dp) 1039static int is_root_node(const struct device_node *dp)
257{ 1040{
258 if (!dp) 1041 if (!dp)
@@ -676,10 +1459,10 @@ static struct device_node * __init create_node(phandle node)
676 dp->type = get_one_property(node, "device_type"); 1459 dp->type = get_one_property(node, "device_type");
677 dp->node = node; 1460 dp->node = node;
678 1461
679 /* Build interrupts later... */
680
681 dp->properties = build_prop_list(node); 1462 dp->properties = build_prop_list(node);
682 1463
1464 irq_trans_init(dp);
1465
683 return dp; 1466 return dp;
684} 1467}
685 1468
diff --git a/arch/sparc64/kernel/sbus.c b/arch/sparc64/kernel/sbus.c
index ac05e0f692ef..ef68aa4fec65 100644
--- a/arch/sparc64/kernel/sbus.c
+++ b/arch/sparc64/kernel/sbus.c
@@ -1221,9 +1221,7 @@ static void __init sbus_iommu_init(int __node, struct sbus_bus *sbus)
1221 1221
1222 /* Now some Xfire specific grot... */ 1222 /* Now some Xfire specific grot... */
1223 if (this_is_starfire) 1223 if (this_is_starfire)
1224 sbus->starfire_cookie = starfire_hookup(sbus->portid); 1224 starfire_hookup(sbus->portid);
1225 else
1226 sbus->starfire_cookie = NULL;
1227 1225
1228 sysio_register_error_handlers(sbus); 1226 sysio_register_error_handlers(sbus);
1229} 1227}
@@ -1269,8 +1267,6 @@ int __init sbus_arch_preinit(void)
1269void __init sbus_arch_postinit(void) 1267void __init sbus_arch_postinit(void)
1270{ 1268{
1271 extern void firetruck_init(void); 1269 extern void firetruck_init(void);
1272 extern void clock_probe(void);
1273 1270
1274 firetruck_init(); 1271 firetruck_init();
1275 clock_probe();
1276} 1272}
diff --git a/arch/sparc64/kernel/starfire.c b/arch/sparc64/kernel/starfire.c
index ae859d40771e..b930fee7708a 100644
--- a/arch/sparc64/kernel/starfire.c
+++ b/arch/sparc64/kernel/starfire.c
@@ -54,7 +54,7 @@ struct starfire_irqinfo {
54static struct starfire_irqinfo *sflist = NULL; 54static struct starfire_irqinfo *sflist = NULL;
55 55
56/* Beam me up Scott(McNeil)y... */ 56/* Beam me up Scott(McNeil)y... */
57void *starfire_hookup(int upaid) 57void starfire_hookup(int upaid)
58{ 58{
59 struct starfire_irqinfo *p; 59 struct starfire_irqinfo *p;
60 unsigned long treg_base, hwmid, i; 60 unsigned long treg_base, hwmid, i;
@@ -81,8 +81,6 @@ void *starfire_hookup(int upaid)
81 p->upaid = upaid; 81 p->upaid = upaid;
82 p->next = sflist; 82 p->next = sflist;
83 sflist = p; 83 sflist = p;
84
85 return (void *) p;
86} 84}
87 85
88unsigned int starfire_translate(unsigned long imap, 86unsigned int starfire_translate(unsigned long imap,
diff --git a/arch/sparc64/kernel/sys_sunos32.c b/arch/sparc64/kernel/sys_sunos32.c
index ae5b32f817f0..87ebdf858a3a 100644
--- a/arch/sparc64/kernel/sys_sunos32.c
+++ b/arch/sparc64/kernel/sys_sunos32.c
@@ -155,7 +155,7 @@ asmlinkage int sunos_brk(u32 baddr)
155 * simple, it hopefully works in most obvious cases.. Easy to 155 * simple, it hopefully works in most obvious cases.. Easy to
156 * fool it, but this should catch most mistakes. 156 * fool it, but this should catch most mistakes.
157 */ 157 */
158 freepages = get_page_cache_size(); 158 freepages = global_page_state(NR_FILE_PAGES);
159 freepages >>= 1; 159 freepages >>= 1;
160 freepages += nr_free_pages(); 160 freepages += nr_free_pages();
161 freepages += nr_swap_pages; 161 freepages += nr_swap_pages;
diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c
index 348b82035561..5f3dd4d800cd 100644
--- a/arch/sparc64/kernel/time.c
+++ b/arch/sparc64/kernel/time.c
@@ -38,11 +38,8 @@
38#include <asm/timer.h> 38#include <asm/timer.h>
39#include <asm/irq.h> 39#include <asm/irq.h>
40#include <asm/io.h> 40#include <asm/io.h>
41#include <asm/sbus.h> 41#include <asm/prom.h>
42#include <asm/fhc.h> 42#include <asm/of_device.h>
43#include <asm/pbm.h>
44#include <asm/ebus.h>
45#include <asm/isa.h>
46#include <asm/starfire.h> 43#include <asm/starfire.h>
47#include <asm/smp.h> 44#include <asm/smp.h>
48#include <asm/sections.h> 45#include <asm/sections.h>
@@ -770,237 +767,106 @@ static int __init clock_model_matches(char *model)
770 return 1; 767 return 1;
771} 768}
772 769
773static void __init __clock_assign_common(void __iomem *addr, char *model) 770static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
774{ 771{
775 if (model[5] == '0' && model[6] == '2') { 772 struct device_node *dp = op->node;
776 mstk48t02_regs = addr; 773 char *model = of_get_property(dp, "model", NULL);
777 } else if(model[5] == '0' && model[6] == '8') { 774 unsigned long size, flags;
778 mstk48t08_regs = addr; 775 void __iomem *regs;
779 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
780 } else {
781 mstk48t59_regs = addr;
782 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
783 }
784}
785
786static void __init clock_assign_clk_reg(struct linux_prom_registers *clk_reg,
787 char *model)
788{
789 unsigned long addr;
790
791 addr = ((unsigned long) clk_reg[0].phys_addr |
792 (((unsigned long) clk_reg[0].which_io) << 32UL));
793
794 __clock_assign_common((void __iomem *) addr, model);
795}
796
797static int __init clock_probe_central(void)
798{
799 struct linux_prom_registers clk_reg[2], *pr;
800 struct device_node *dp;
801 char *model;
802 776
803 if (!central_bus) 777 if (!model || !clock_model_matches(model))
804 return 0; 778 return -ENODEV;
805
806 /* Get Central FHC's prom node. */
807 dp = central_bus->child->prom_node;
808
809 /* Then get the first child device below it. */
810 dp = dp->child;
811
812 while (dp) {
813 model = of_get_property(dp, "model", NULL);
814 if (!model || !clock_model_matches(model))
815 goto next_sibling;
816
817 pr = of_get_property(dp, "reg", NULL);
818 memcpy(clk_reg, pr, sizeof(clk_reg));
819
820 apply_fhc_ranges(central_bus->child, clk_reg, 1);
821 apply_central_ranges(central_bus, clk_reg, 1);
822
823 clock_assign_clk_reg(clk_reg, model);
824 return 1;
825 779
826 next_sibling: 780 /* On an Enterprise system there can be multiple mostek clocks.
827 dp = dp->sibling; 781 * We should only match the one that is on the central FHC bus.
828 } 782 */
783 if (!strcmp(dp->parent->name, "fhc") &&
784 strcmp(dp->parent->parent->name, "central") != 0)
785 return -ENODEV;
829 786
830 return 0; 787 size = (op->resource[0].end - op->resource[0].start) + 1;
831} 788 regs = of_ioremap(&op->resource[0], 0, size, "clock");
789 if (!regs)
790 return -ENOMEM;
832 791
833#ifdef CONFIG_PCI
834static void __init clock_isa_ebus_assign_regs(struct resource *res, char *model)
835{
836 if (!strcmp(model, "ds1287") || 792 if (!strcmp(model, "ds1287") ||
837 !strcmp(model, "m5819") || 793 !strcmp(model, "m5819") ||
838 !strcmp(model, "m5819p") || 794 !strcmp(model, "m5819p") ||
839 !strcmp(model, "m5823")) { 795 !strcmp(model, "m5823")) {
840 ds1287_regs = res->start; 796 ds1287_regs = (unsigned long) regs;
797 } else if (model[5] == '0' && model[6] == '2') {
798 mstk48t02_regs = regs;
799 } else if(model[5] == '0' && model[6] == '8') {
800 mstk48t08_regs = regs;
801 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
841 } else { 802 } else {
842 mstk48t59_regs = (void __iomem *) res->start; 803 mstk48t59_regs = regs;
843 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02; 804 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
844 } 805 }
845}
846
847static int __init clock_probe_one_ebus_dev(struct linux_ebus_device *edev)
848{
849 struct device_node *dp = edev->prom_node;
850 char *model;
851
852 model = of_get_property(dp, "model", NULL);
853 if (!clock_model_matches(model))
854 return 0;
855 806
856 clock_isa_ebus_assign_regs(&edev->resource[0], model); 807 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
857 808
858 return 1; 809 local_irq_save(flags);
859}
860
861static int __init clock_probe_ebus(void)
862{
863 struct linux_ebus *ebus;
864 810
865 for_each_ebus(ebus) { 811 if (mstk48t02_regs != NULL) {
866 struct linux_ebus_device *edev; 812 /* Report a low battery voltage condition. */
813 if (has_low_battery())
814 prom_printf("NVRAM: Low battery voltage!\n");
867 815
868 for_each_ebusdev(edev, ebus) { 816 /* Kick start the clock if it is completely stopped. */
869 if (clock_probe_one_ebus_dev(edev)) 817 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
870 return 1; 818 kick_start_clock();
871 }
872 } 819 }
873 820
874 return 0; 821 set_system_time();
875} 822
876 823 local_irq_restore(flags);
877static int __init clock_probe_one_isa_dev(struct sparc_isa_device *idev)
878{
879 struct device_node *dp = idev->prom_node;
880 char *model;
881
882 model = of_get_property(dp, "model", NULL);
883 if (!clock_model_matches(model))
884 return 0;
885
886 clock_isa_ebus_assign_regs(&idev->resource, model);
887
888 return 1;
889}
890
891static int __init clock_probe_isa(void)
892{
893 struct sparc_isa_bridge *isa_br;
894
895 for_each_isa(isa_br) {
896 struct sparc_isa_device *isa_dev;
897
898 for_each_isadev(isa_dev, isa_br) {
899 if (clock_probe_one_isa_dev(isa_dev))
900 return 1;
901 }
902 }
903 824
904 return 0; 825 return 0;
905} 826}
906#endif /* CONFIG_PCI */
907
908#ifdef CONFIG_SBUS
909static int __init clock_probe_one_sbus_dev(struct sbus_bus *sbus, struct sbus_dev *sdev)
910{
911 struct resource *res;
912 char model[64];
913 void __iomem *addr;
914
915 prom_getstring(sdev->prom_node, "model", model, sizeof(model));
916 if (!clock_model_matches(model))
917 return 0;
918
919 res = &sdev->resource[0];
920 addr = sbus_ioremap(res, 0, 0x800UL, "eeprom");
921 827
922 __clock_assign_common(addr, model); 828static struct of_device_id clock_match[] = {
923 829 {
924 return 1; 830 .name = "eeprom",
925} 831 },
926 832 {
927static int __init clock_probe_sbus(void) 833 .name = "rtc",
928{ 834 },
929 struct sbus_bus *sbus; 835 {},
930 836};
931 for_each_sbus(sbus) {
932 struct sbus_dev *sdev;
933
934 for_each_sbusdev(sdev, sbus) {
935 if (clock_probe_one_sbus_dev(sbus, sdev))
936 return 1;
937 }
938 }
939 837
940 return 0; 838static struct of_platform_driver clock_driver = {
941} 839 .name = "clock",
942#endif 840 .match_table = clock_match,
841 .probe = clock_probe,
842};
943 843
944void __init clock_probe(void) 844static int __init clock_init(void)
945{ 845{
946 static int invoked;
947 unsigned long flags;
948
949 if (invoked)
950 return;
951 invoked = 1;
952
953 if (this_is_starfire) { 846 if (this_is_starfire) {
954 xtime.tv_sec = starfire_get_time(); 847 xtime.tv_sec = starfire_get_time();
955 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 848 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
956 set_normalized_timespec(&wall_to_monotonic, 849 set_normalized_timespec(&wall_to_monotonic,
957 -xtime.tv_sec, -xtime.tv_nsec); 850 -xtime.tv_sec, -xtime.tv_nsec);
958 return; 851 return 0;
959 } 852 }
960 if (tlb_type == hypervisor) { 853 if (tlb_type == hypervisor) {
961 xtime.tv_sec = hypervisor_get_time(); 854 xtime.tv_sec = hypervisor_get_time();
962 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 855 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
963 set_normalized_timespec(&wall_to_monotonic, 856 set_normalized_timespec(&wall_to_monotonic,
964 -xtime.tv_sec, -xtime.tv_nsec); 857 -xtime.tv_sec, -xtime.tv_nsec);
965 return; 858 return 0;
966 }
967
968 /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
969 * That way we handle the presence of multiple properly.
970 *
971 * As a special case, machines with Central must provide the
972 * timer chip there.
973 */
974 if (!clock_probe_central() &&
975#ifdef CONFIG_PCI
976 !clock_probe_ebus() &&
977 !clock_probe_isa() &&
978#endif
979#ifdef CONFIG_SBUS
980 !clock_probe_sbus()
981#endif
982 ) {
983 printk(KERN_WARNING "No clock chip found.\n");
984 return;
985 }
986
987 local_irq_save(flags);
988
989 if (mstk48t02_regs != NULL) {
990 /* Report a low battery voltage condition. */
991 if (has_low_battery())
992 prom_printf("NVRAM: Low battery voltage!\n");
993
994 /* Kick start the clock if it is completely stopped. */
995 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
996 kick_start_clock();
997 } 859 }
998 860
999 set_system_time(); 861 return of_register_driver(&clock_driver, &of_bus_type);
1000
1001 local_irq_restore(flags);
1002} 862}
1003 863
864/* Must be after subsys_initcall() so that busses are probed. Must
865 * be before device_initcall() because things like the RTC driver
866 * need to see the clock registers.
867 */
868fs_initcall(clock_init);
869
1004/* This is gets the master TICK_INT timer going. */ 870/* This is gets the master TICK_INT timer going. */
1005static unsigned long sparc64_init_timers(void) 871static unsigned long sparc64_init_timers(void)
1006{ 872{
diff --git a/arch/sparc64/kernel/unaligned.c b/arch/sparc64/kernel/unaligned.c
index bb2d68577855..a9b765271b85 100644
--- a/arch/sparc64/kernel/unaligned.c
+++ b/arch/sparc64/kernel/unaligned.c
@@ -20,6 +20,7 @@
20#include <linux/smp.h> 20#include <linux/smp.h>
21#include <linux/smp_lock.h> 21#include <linux/smp_lock.h>
22#include <linux/bitops.h> 22#include <linux/bitops.h>
23#include <linux/kallsyms.h>
23#include <asm/fpumacro.h> 24#include <asm/fpumacro.h>
24 25
25/* #define DEBUG_MNA */ 26/* #define DEBUG_MNA */
@@ -291,7 +292,8 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
291 if (count < 5) { 292 if (count < 5) {
292 last_time = jiffies; 293 last_time = jiffies;
293 count++; 294 count++;
294 printk("Kernel unaligned access at TPC[%lx]\n", regs->tpc); 295 printk("Kernel unaligned access at TPC[%lx] ", regs->tpc);
296 print_symbol("%s\n", regs->tpc);
295 } 297 }
296 298
297 if (!ok_for_kernel(insn) || dir == both) { 299 if (!ok_for_kernel(insn) || dir == both) {
diff --git a/arch/um/Makefile-x86_64 b/arch/um/Makefile-x86_64
index dfd88b652fbe..dffd1184c956 100644
--- a/arch/um/Makefile-x86_64
+++ b/arch/um/Makefile-x86_64
@@ -6,9 +6,11 @@ START := 0x60000000
6 6
7#We #undef __x86_64__ for kernelspace, not for userspace where 7#We #undef __x86_64__ for kernelspace, not for userspace where
8#it's needed for headers to work! 8#it's needed for headers to work!
9CFLAGS += -U__$(SUBARCH)__ -fno-builtin 9CFLAGS += -U__$(SUBARCH)__ -fno-builtin -m64
10USER_CFLAGS += -fno-builtin 10USER_CFLAGS += -fno-builtin -m64
11CHECKFLAGS += -m64 11CHECKFLAGS += -m64
12AFLAGS += -m64
13LDFLAGS += -m elf_x86_64
12 14
13ELF_ARCH := i386:x86-64 15ELF_ARCH := i386:x86-64
14ELF_FORMAT := elf64-x86-64 16ELF_FORMAT := elf64-x86-64
@@ -16,3 +18,4 @@ ELF_FORMAT := elf64-x86-64
16# Not on all 64-bit distros /lib is a symlink to /lib64. PLD is an example. 18# Not on all 64-bit distros /lib is a symlink to /lib64. PLD is an example.
17 19
18LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib64 20LINK-$(CONFIG_LD_SCRIPT_DYN) += -Wl,-rpath,/lib64
21LINK-y += -m64
diff --git a/arch/um/drivers/stderr_console.c b/arch/um/drivers/stderr_console.c
index 429ae8e6c7e5..6d2cf32a9e8f 100644
--- a/arch/um/drivers/stderr_console.c
+++ b/arch/um/drivers/stderr_console.c
@@ -8,10 +8,7 @@
8 8
9/* 9/*
10 * Don't register by default -- as this registeres very early in the 10 * Don't register by default -- as this registeres very early in the
11 * boot process it becomes the default console. And as this isn't a 11 * boot process it becomes the default console.
12 * real tty driver init isn't able to open /dev/console then.
13 *
14 * In most cases this isn't what you want ...
15 */ 12 */
16static int use_stderr_console = 0; 13static int use_stderr_console = 0;
17 14
@@ -43,3 +40,20 @@ static int stderr_setup(char *str)
43 return 1; 40 return 1;
44} 41}
45__setup("stderr=", stderr_setup); 42__setup("stderr=", stderr_setup);
43
44/* The previous behavior of not unregistering led to /dev/console being
45 * impossible to open. My FC5 filesystem started having init die, and the
46 * system panicing because of this. Unregistering causes the real
47 * console to become the default console, and /dev/console can then be
48 * opened. Making this an initcall makes this happen late enough that
49 * there is no added value in dumping everything to stderr, and the
50 * normal console is good enough to show you all available output.
51 */
52static int __init unregister_stderr(void)
53{
54 unregister_console(&stderr_console);
55
56 return 0;
57}
58
59__initcall(unregister_stderr);
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index c5c9885a8297..624ca238d1fd 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -152,7 +152,7 @@ void destroy_context_skas(struct mm_struct *mm)
152 free_page(mmu->id.stack); 152 free_page(mmu->id.stack);
153 pte_lock_deinit(virt_to_page(mmu->last_page_table)); 153 pte_lock_deinit(virt_to_page(mmu->last_page_table));
154 pte_free_kernel((pte_t *) mmu->last_page_table); 154 pte_free_kernel((pte_t *) mmu->last_page_table);
155 dec_page_state(nr_page_table_pages); 155 dec_zone_page_state(virt_to_page(mmu->last_page_table), NR_PAGETABLE);
156#ifdef CONFIG_3_LEVEL_PGTABLES 156#ifdef CONFIG_3_LEVEL_PGTABLES
157 pmd_free((pmd_t *) mmu->last_pmd); 157 pmd_free((pmd_t *) mmu->last_pmd);
158#endif 158#endif
diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
deleted file mode 100644
index 8fa2ae7f3026..000000000000
--- a/arch/um/kernel/time.c
+++ /dev/null
@@ -1,172 +0,0 @@
1/*
2 * Copyright (C) 2000, 2001, 2002 Jeff Dike (jdike@karaya.com)
3 * Licensed under the GPL
4 */
5
6#include <stdio.h>
7#include <stdlib.h>
8#include <unistd.h>
9#include <time.h>
10#include <sys/time.h>
11#include <signal.h>
12#include <errno.h>
13#include "user_util.h"
14#include "kern_util.h"
15#include "user.h"
16#include "process.h"
17#include "time_user.h"
18#include "kern_constants.h"
19#include "os.h"
20
21/* XXX This really needs to be declared and initialized in a kernel file since
22 * it's in <linux/time.h>
23 */
24extern struct timespec wall_to_monotonic;
25
26extern struct timeval xtime;
27
28struct timeval local_offset = { 0, 0 };
29
30void timer(void)
31{
32 gettimeofday(&xtime, NULL);
33 timeradd(&xtime, &local_offset, &xtime);
34}
35
36static void set_interval(int timer_type)
37{
38 int usec = 1000000/hz();
39 struct itimerval interval = ((struct itimerval) { { 0, usec },
40 { 0, usec } });
41
42 if(setitimer(timer_type, &interval, NULL) == -1)
43 panic("setitimer failed - errno = %d\n", errno);
44}
45
46void enable_timer(void)
47{
48 set_interval(ITIMER_VIRTUAL);
49}
50
51void prepare_timer(void * ptr)
52{
53 int usec = 1000000/hz();
54 *(struct itimerval *)ptr = ((struct itimerval) { { 0, usec },
55 { 0, usec }});
56}
57
58void disable_timer(void)
59{
60 struct itimerval disable = ((struct itimerval) { { 0, 0 }, { 0, 0 }});
61 if((setitimer(ITIMER_VIRTUAL, &disable, NULL) < 0) ||
62 (setitimer(ITIMER_REAL, &disable, NULL) < 0))
63 printk("disnable_timer - setitimer failed, errno = %d\n",
64 errno);
65 /* If there are signals already queued, after unblocking ignore them */
66 set_handler(SIGALRM, SIG_IGN, 0, -1);
67 set_handler(SIGVTALRM, SIG_IGN, 0, -1);
68}
69
70void switch_timers(int to_real)
71{
72 struct itimerval disable = ((struct itimerval) { { 0, 0 }, { 0, 0 }});
73 struct itimerval enable = ((struct itimerval) { { 0, 1000000/hz() },
74 { 0, 1000000/hz() }});
75 int old, new;
76
77 if(to_real){
78 old = ITIMER_VIRTUAL;
79 new = ITIMER_REAL;
80 }
81 else {
82 old = ITIMER_REAL;
83 new = ITIMER_VIRTUAL;
84 }
85
86 if((setitimer(old, &disable, NULL) < 0) ||
87 (setitimer(new, &enable, NULL)))
88 printk("switch_timers - setitimer failed, errno = %d\n",
89 errno);
90}
91
92void uml_idle_timer(void)
93{
94 if(signal(SIGVTALRM, SIG_IGN) == SIG_ERR)
95 panic("Couldn't unset SIGVTALRM handler");
96
97 set_handler(SIGALRM, (__sighandler_t) alarm_handler,
98 SA_RESTART, SIGUSR1, SIGIO, SIGWINCH, SIGVTALRM, -1);
99 set_interval(ITIMER_REAL);
100}
101
102extern void ktime_get_ts(struct timespec *ts);
103#define do_posix_clock_monotonic_gettime(ts) ktime_get_ts(ts)
104
105void time_init(void)
106{
107 struct timespec now;
108
109 if(signal(SIGVTALRM, boot_timer_handler) == SIG_ERR)
110 panic("Couldn't set SIGVTALRM handler");
111 set_interval(ITIMER_VIRTUAL);
112
113 do_posix_clock_monotonic_gettime(&now);
114 wall_to_monotonic.tv_sec = -now.tv_sec;
115 wall_to_monotonic.tv_nsec = -now.tv_nsec;
116}
117
118/* Defined in linux/ktimer.h, which can't be included here */
119#define clock_was_set() do { } while (0)
120
121void do_gettimeofday(struct timeval *tv)
122{
123 unsigned long flags;
124
125 flags = time_lock();
126 gettimeofday(tv, NULL);
127 timeradd(tv, &local_offset, tv);
128 time_unlock(flags);
129 clock_was_set();
130}
131
132int do_settimeofday(struct timespec *tv)
133{
134 struct timeval now;
135 unsigned long flags;
136 struct timeval tv_in;
137
138 if ((unsigned long) tv->tv_nsec >= UM_NSEC_PER_SEC)
139 return -EINVAL;
140
141 tv_in.tv_sec = tv->tv_sec;
142 tv_in.tv_usec = tv->tv_nsec / 1000;
143
144 flags = time_lock();
145 gettimeofday(&now, NULL);
146 timersub(&tv_in, &now, &local_offset);
147 time_unlock(flags);
148
149 return(0);
150}
151
152void idle_sleep(int secs)
153{
154 struct timespec ts;
155
156 ts.tv_sec = secs;
157 ts.tv_nsec = 0;
158 nanosleep(&ts, NULL);
159}
160
161/* XXX This partly duplicates init_irq_signals */
162
163void user_time_init(void)
164{
165 set_handler(SIGVTALRM, (__sighandler_t) alarm_handler,
166 SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGWINCH,
167 SIGALRM, SIGUSR2, -1);
168 set_handler(SIGALRM, (__sighandler_t) alarm_handler,
169 SA_ONSTACK | SA_RESTART, SIGUSR1, SIGIO, SIGWINCH,
170 SIGVTALRM, SIGUSR2, -1);
171 set_interval(ITIMER_VIRTUAL);
172}
diff --git a/arch/um/kernel/time_kern.c b/arch/um/kernel/time_kern.c
index 87cdbc560d36..820fa3615a3f 100644
--- a/arch/um/kernel/time_kern.c
+++ b/arch/um/kernel/time_kern.c
@@ -96,11 +96,15 @@ void time_init_kern(void)
96 96
97void do_boot_timer_handler(struct sigcontext * sc) 97void do_boot_timer_handler(struct sigcontext * sc)
98{ 98{
99 unsigned long flags;
99 struct pt_regs regs; 100 struct pt_regs regs;
100 101
101 CHOOSE_MODE((void) (UPT_SC(&regs.regs) = sc), 102 CHOOSE_MODE((void) (UPT_SC(&regs.regs) = sc),
102 (void) (regs.regs.skas.is_user = 0)); 103 (void) (regs.regs.skas.is_user = 0));
104
105 write_seqlock_irqsave(&xtime_lock, flags);
103 do_timer(&regs); 106 do_timer(&regs);
107 write_sequnlock_irqrestore(&xtime_lock, flags);
104} 108}
105 109
106static DEFINE_SPINLOCK(timer_spinlock); 110static DEFINE_SPINLOCK(timer_spinlock);
@@ -125,25 +129,17 @@ irqreturn_t um_timer(int irq, void *dev, struct pt_regs *regs)
125 unsigned long long nsecs; 129 unsigned long long nsecs;
126 unsigned long flags; 130 unsigned long flags;
127 131
132 write_seqlock_irqsave(&xtime_lock, flags);
133
128 do_timer(regs); 134 do_timer(regs);
129 135
130 write_seqlock_irqsave(&xtime_lock, flags);
131 nsecs = get_time() + local_offset; 136 nsecs = get_time() + local_offset;
132 xtime.tv_sec = nsecs / NSEC_PER_SEC; 137 xtime.tv_sec = nsecs / NSEC_PER_SEC;
133 xtime.tv_nsec = nsecs - xtime.tv_sec * NSEC_PER_SEC; 138 xtime.tv_nsec = nsecs - xtime.tv_sec * NSEC_PER_SEC;
134 write_sequnlock_irqrestore(&xtime_lock, flags);
135
136 return(IRQ_HANDLED);
137}
138 139
139long um_time(int __user *tloc) 140 write_sequnlock_irqrestore(&xtime_lock, flags);
140{
141 long ret = get_time() / NSEC_PER_SEC;
142
143 if((tloc != NULL) && put_user(ret, tloc))
144 return -EFAULT;
145 141
146 return ret; 142 return IRQ_HANDLED;
147} 143}
148 144
149void do_gettimeofday(struct timeval *tv) 145void do_gettimeofday(struct timeval *tv)
@@ -174,18 +170,6 @@ static inline void set_time(unsigned long long nsecs)
174 clock_was_set(); 170 clock_was_set();
175} 171}
176 172
177long um_stime(int __user *tptr)
178{
179 int value;
180
181 if (get_user(value, tptr))
182 return -EFAULT;
183
184 set_time((unsigned long long) value * NSEC_PER_SEC);
185
186 return 0;
187}
188
189int do_settimeofday(struct timespec *tv) 173int do_settimeofday(struct timespec *tv)
190{ 174{
191 set_time((unsigned long long) tv->tv_sec * NSEC_PER_SEC + tv->tv_nsec); 175 set_time((unsigned long long) tv->tv_sec * NSEC_PER_SEC + tv->tv_nsec);
diff --git a/arch/um/kernel/vmlinux.lds.S b/arch/um/kernel/vmlinux.lds.S
index 1660a769674b..0a7d50ff9a4c 100644
--- a/arch/um/kernel/vmlinux.lds.S
+++ b/arch/um/kernel/vmlinux.lds.S
@@ -1,4 +1,6 @@
1#include <linux/config.h> 1#include <linux/config.h>
2/* in case the preprocessor is a 32bit one */
3#undef i386
2#ifdef CONFIG_LD_SCRIPT_STATIC 4#ifdef CONFIG_LD_SCRIPT_STATIC
3#include "uml.lds.S" 5#include "uml.lds.S"
4#else 6#else
diff --git a/arch/um/os-Linux/mem.c b/arch/um/os-Linux/mem.c
index c6432e729241..560c8063c77c 100644
--- a/arch/um/os-Linux/mem.c
+++ b/arch/um/os-Linux/mem.c
@@ -55,7 +55,7 @@ static void __init find_tempdir(void)
55 */ 55 */
56static int next(int fd, char *buf, int size, char c) 56static int next(int fd, char *buf, int size, char c)
57{ 57{
58 int n; 58 int n, len;
59 char *ptr; 59 char *ptr;
60 60
61 while((ptr = strchr(buf, c)) == NULL){ 61 while((ptr = strchr(buf, c)) == NULL){
@@ -69,7 +69,17 @@ static int next(int fd, char *buf, int size, char c)
69 } 69 }
70 70
71 ptr++; 71 ptr++;
72 memmove(buf, ptr, strlen(ptr) + 1); 72 len = strlen(ptr);
73 memmove(buf, ptr, len + 1);
74
75 /* Refill the buffer so that if there's a partial string that we care
76 * about, it will be completed, and we can recognize it.
77 */
78 n = read(fd, &buf[len], size - len - 1);
79 if(n < 0)
80 return -errno;
81
82 buf[len + n] = '\0';
73 return 1; 83 return 1;
74} 84}
75 85
@@ -200,8 +210,11 @@ int create_tmp_file(unsigned long long len)
200 exit(1); 210 exit(1);
201 } 211 }
202 212
203 if (lseek64(fd, len, SEEK_SET) < 0) { 213 /* Seek to len - 1 because writing a character there will
204 perror("os_seek_file"); 214 * increase the file size by one byte, to the desired length.
215 */
216 if (lseek64(fd, len - 1, SEEK_SET) < 0) {
217 perror("os_seek_file");
205 exit(1); 218 exit(1);
206 } 219 }
207 220
diff --git a/arch/um/sys-i386/sys_call_table.S b/arch/um/sys-i386/sys_call_table.S
index 1ff61474b25c..2497554b7b95 100644
--- a/arch/um/sys-i386/sys_call_table.S
+++ b/arch/um/sys-i386/sys_call_table.S
@@ -7,8 +7,6 @@
7#define sys_vm86old sys_ni_syscall 7#define sys_vm86old sys_ni_syscall
8#define sys_vm86 sys_ni_syscall 8#define sys_vm86 sys_ni_syscall
9 9
10#define sys_stime um_stime
11#define sys_time um_time
12#define old_mmap old_mmap_i386 10#define old_mmap old_mmap_i386
13 11
14#include "../../i386/kernel/syscall_table.S" 12#include "../../i386/kernel/syscall_table.S"
diff --git a/arch/um/sys-x86_64/syscall_table.c b/arch/um/sys-x86_64/syscall_table.c
index 34b2e842864f..3c4318165de0 100644
--- a/arch/um/sys-x86_64/syscall_table.c
+++ b/arch/um/sys-x86_64/syscall_table.c
@@ -20,12 +20,6 @@
20/*#define sys_set_thread_area sys_ni_syscall 20/*#define sys_set_thread_area sys_ni_syscall
21#define sys_get_thread_area sys_ni_syscall*/ 21#define sys_get_thread_area sys_ni_syscall*/
22 22
23/* For __NR_time. The x86-64 name hopefully will change from sys_time64 to
24 * sys_time (since the current situation is bogus). I've sent a patch to cleanup
25 * this. Remove below the obsoleted line. */
26#define sys_time64 um_time
27#define sys_time um_time
28
29/* On UML we call it this way ("old" means it's not mmap2) */ 23/* On UML we call it this way ("old" means it's not mmap2) */
30#define sys_mmap old_mmap 24#define sys_mmap old_mmap
31/* On x86-64 sys_uname is actually sys_newuname plus a compatibility trick. 25/* On x86-64 sys_uname is actually sys_newuname plus a compatibility trick.
diff --git a/arch/x86_64/kernel/functionlist b/arch/x86_64/kernel/functionlist
index 2bcebdc3eedb..01fa23580c85 100644
--- a/arch/x86_64/kernel/functionlist
+++ b/arch/x86_64/kernel/functionlist
@@ -384,7 +384,6 @@
384*(.text.__end_that_request_first) 384*(.text.__end_that_request_first)
385*(.text.wake_up_bit) 385*(.text.wake_up_bit)
386*(.text.unuse_mm) 386*(.text.unuse_mm)
387*(.text.skb_release_data)
388*(.text.shrink_icache_memory) 387*(.text.shrink_icache_memory)
389*(.text.sched_balance_self) 388*(.text.sched_balance_self)
390*(.text.__pmd_alloc) 389*(.text.__pmd_alloc)
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 05:54:03 -0500